commit edc749eab28bce08a257f80aec3429d81b314c5d Author: mzhoot Date: Sat Jul 4 16:41:08 2026 +0300 создание проекта diff --git a/Makefile b/Makefile new file mode 100644 index 0000000..f383d5d --- /dev/null +++ b/Makefile @@ -0,0 +1,46 @@ +# Makefile для ndisasm-ru + +CC = gcc +CFLAGS = -g -O2 -std=c17 -U__STRICT_ANSI__ -g3 -ggdb -fwrapv -fno-common \ + -ffunction-sections -fdata-sections -fvisibility=hidden \ + -Wall -W -pedantic -Werror=implicit -Werror=missing-braces \ + -Werror=return-type -Werror=trigraphs -Werror=pointer-arith \ + -Werror=comment -Werror=vla -Werror=strict-prototypes \ + -Werror=missing-prototypes -Werror=missing-declarations \ + -Wno-variadic-macros -Wno-long-long -Wno-stringop-truncation \ + -Wno-shift-negative-value -DHAVE_CONFIG_H +CPPFLAGS = -Werror=attributes +INCLUDES = -Iinclude -Isrc +LDFLAGS = -Wl,--as-needed -Wl,--gc-sections +LIBS = -lz + +SRCS_NDISASM = src/ndisasm.c src/zamenyator.c src/disasm.c src/sync.c \ + src/prefix.c src/diserror.c + +SRCS_NASMLIB = $(wildcard src/nasmlib/*.c) +SRCS_COMMON = $(wildcard src/common/*.c) +SRCS_X86 = $(wildcard src/x86/*.c) +SRCS_STDLIB = $(wildcard src/stdlib/*.c) +SRCS_OUTPUT = $(wildcard src/output/*.c) + +OBJS = $(SRCS_NDISASM:.c=.o) \ + $(SRCS_NASMLIB:.c=.o) \ + $(SRCS_COMMON:.c=.o) \ + $(SRCS_X86:.c=.o) \ + $(SRCS_STDLIB:.c=.o) \ + $(SRCS_OUTPUT:.c=.o) + +TARGET = ndisasm-ru + +all: $(TARGET) + +$(TARGET): $(OBJS) + $(CC) $(LDFLAGS) -o $@ $(OBJS) $(LIBS) + +%.o: %.c + $(CC) -c $(CFLAGS) $(CPPFLAGS) $(INCLUDES) -o $@ $< + +clean: + rm -f $(OBJS) $(TARGET) + +.PHONY: all clean \ No newline at end of file diff --git a/README.md b/README.md new file mode 100644 index 0000000..b34bd23 --- /dev/null +++ b/README.md @@ -0,0 +1,292 @@ +```markdown +# ndisasm-ru — Русский дизассемблер x86-64 для языка КВС + +**ndisasm-ru** — это модифицированная версия утилиты `ndisasm` из пакета **Netwide Assembler (NASM)**, адаптированная для вывода дизассемблированного кода на русском языке в синтаксисе языка **КВС**. + +--- + +## 📌 Особенности + +- ✅ **Перевод мнемоник** инструкций x86-64 на русский язык +- ✅ **Перевод регистров** (64, 32, 16, 8-битных) на русский язык +- ✅ **Числовые значения** остаются без изменений +- ✅ **Синтаксис** соответствует языку программирования КВС +- ✅ **Полная совместимость** с оригинальным `ndisasm` по функциональности +- ✅ **Независимая сборка** — не требует наличия NASM + +--- + +## 🚀 Быстрый старт + +### Сборка + +```bash +git clone https://github.com/artradeskz/ndisasm-ru.git +cd ndisasm-ru +make +``` + +### Использование + +```bash +./ndisasm-ru -b 32 файл.bin +./ndisasm-ru -b 64 файл.elf +``` + +### Пример + +Входные байты: `B8 01 00 00 00` + +| Оригинальный ndisasm | ndisasm-ru | +|---|---| +| `mov eax,0x1` | `переместить еаикс,0x1` | +| `add eax,0x2` | `прибавить еаикс,0x2` | +| `cmp eax,ebx` | `сравнить еаикс,ебикс` | +| `jmp 0x1234` | `переход 0x1234` | + +--- + +## 📂 Структура проекта + +``` +ndisasm-ru/ +├── src/ +│ ├── ndisasm.c # Основной файл дизассемблера (с патчем) +│ ├── zamenyator.c # Модуль перевода мнемоник и регистров +│ ├── zamenyator.h # Заголовок модуля перевода +│ ├── disasm.c # Ядро дизассемблера (оригинал) +│ ├── sync.c # Синхронизация (оригинал) +│ └── ... # Остальные файлы из NASM +├── include/ # Заголовочные файлы +├── Makefile # Makefile для сборки +└── README.md # Этот файл +``` + +--- + +## 📋 Таблица перевода + +### Мнемоники (основные) + +| Английская | Русская (КВС) | +|---|---| +| `mov` | `переместить` | +| `add` | `прибавить` | +| `sub` | `вычесть` | +| `cmp` | `сравнить` | +| `jmp` | `переход` | +| `je` / `jz` | `переход_если_равно` / `переход_если_ноль` | +| `jne` / `jnz` | `переход_если_неравно` / `переход_если_не_ноль` | +| `call` | `вызвать` | +| `ret` | `вернуться` | +| `push` | `втолкнуть` | +| `pop` | `вытолкнуть` | +| `test` | `проверить` | +| `xor` | `исключающее_или` | +| `and` | `и` | +| `or` | `или` | +| `inc` | `увеличить` | +| `dec` | `уменьшить` | +| `syscall` | `вызов_системы` | +| `nop` | `нет_операции` | +| `lea` | `загрузить_адрес` | + +Полный список мнемоник и регистров см. в файле `src/zamenyator.c`. + +### Регистры + +| Английский | Русский (КВС) | +|---|---| +| `rax` | `раикс` | +| `rbx` | `рбикс` | +| `rcx` | `рсикс` | +| `rdx` | `рдикс` | +| `rsi` | `рсиай` | +| `rdi` | `рдиай` | +| `rsp` | `рсипи` | +| `rbp` | `рбипи` | +| `r8` – `r15` | `р8` – `р15` | +| `eax` | `еаикс` | +| `ebx` | `ебикс` | +| ... | ... | + +--- + +## 🔧 Сборка из исходников + +```bash +# Клонирование репозитория +git clone https://github.com/artradeskz/ndisasm-ru.git +cd ndisasm-ru + +# Сборка +make clean +make + +# Проверка +echo -n -e "\xB8\x01\x00\x00\x00" > test.bin +./ndisasm-ru -b 32 test.bin +# Ожидаемый вывод: 00000000 B801000000 переместить еаикс,0x1 +``` + +--- + +## 📖 Использование + +### Основные опции + +```bash +./ndisasm-ru -b 16/32/64 файл # Установка разрядности +./ndisasm-ru -o смещение файл # Установка базового адреса +./ndisasm-ru -e байты файл # Пропуск заголовка +./ndisasm-ru -k старт,байты # Пропуск региона +./ndisasm-ru -h # Справка +``` + +### Примеры + +```bash +# Дизассемблирование 32-битного бинарного файла +./ndisasm-ru -b 32 program.bin + +# Дизассемблирование 64-битного ELF-файла с пропуском заголовка +./ndisasm-ru -b 64 -e 0x40 program.elf + +# Дизассемблирование с указанием виртуального адреса +./ndisasm-ru -b 64 -o 0x400000 -e 0x81380 program.elf +``` + +--- + +## 🧪 Тестирование + +```bash +# Сборка и тестирование +make test +``` + +Или вручную: + +```bash +# Создание тестового файла +echo -n -e "\xB8\x01\x00\x00\x00" > test.bin + +# Запуск теста +./ndisasm-ru -b 32 test.bin + +# Ожидаемый вывод: 00000000 B801000000 переместить еаикс,0x1 +``` + +--- + + +Я добавил пример вывода дизассемблирования самого `ndisasm-ru`. Вот обновлённый раздел `README.md` с этим примером: + +--- + +## 📖 Пример вывода + +Ниже приведён фрагмент дизассемблирования самого `ndisasm-ru` в 64-битном режиме. Хорошо видно, как инструкции и регистры переводятся на русский язык: + +```bash +$ ./ndisasm-ru -b 64 -o 0x81380 -e 0x81380 ndisasm-ru | head -20 +00081380 B957040000 переместить есикс,0x457 +00081385 488D154C6A0000 загрузить_адрес рдикс,[rel 0x87dd8] +0008138C 488D355D6F0000 загрузить_адрес рсиай,[rel 0x882f0] +00081393 488D3D4B6A0000 загрузить_адрес рдиай,[rel 0x87de5] +0008139A E87F010000 вызвать 0x8151e +0008139F F30F1EFA endbr64 +000813A3 50 втолкнуть раикс +000813A4 58 вытолкнуть раикс +000813A5 50 втолкнуть раикс +000813A6 E8B5540000 вызвать 0x86860 +000813AB E860FEFFFF вызвать 0x81210 +000813B0 F30F1EFA endbr64 +000813B4 50 втолкнуть раикс +000813B5 58 вытолкнуть раикс +000813B6 488D3DC3720000 загрузить_адрес рдиай,[rel 0x88680] +000813BD 50 втолкнуть раикс +000813BE 31C0 исключающее_или еаикс,еаикс +000813C0 E805000000 вызвать 0x813ca +000813C5 E8E6FFFFFF вызвать 0x813b0 +000813CA F30F1EFA endbr64 +``` + +**Что мы видим в этом выводе:** +- `mov ecx,0x457` → `переместить есикс,0x457` +- `lea rdx,[rel 0x87dd8]` → `загрузить_адрес рдикс,[rel 0x87dd8]` +- `call 0x8151e` → `вызвать 0x8151e` +- `push rax` → `втолкнуть раикс` +- `pop rax` → `вытолкнуть раикс` +- `xor eax,eax` → `исключающее_или еаикс,еаикс` + +--- + +Этот пример наглядно демонстрирует, как `ndisasm-ru` переводит реальный машинный код в читаемый синтаксис КВС. + + +--- + + +## ⚠️ Ограничения + +- Поддерживаются только инструкции x86-64, присутствующие в таблице перевода +- Некоторые специфические инструкции (SSE, AVX, CET) могут отображаться на английском +- Сегментные префиксы пока не переведены + +--- + +## 📜 Лицензия и авторство + +### Оригинальный проект NASM + +Исходный код основан на проекте **Netwide Assembler (NASM)**. + +- **Автор:** Simon Tatham, Julian Hall и другие участники проекта NASM +- **Официальный сайт:** https://www.nasm.us/ +- **Исходный код:** https://git.nasm.us/nasm.git +- **Лицензия:** BSD 2-Clause License + +``` +Авторские права © 1996-2025 Авторы NASM. Все права защищены. + +Распространение и использование разрешены при условии сохранения +уведомления об авторских правах и списка условий. +Подробнее: https://opensource.org/licenses/BSD-2-Clause +``` + +### Модификация для КВС + +- **Автор модификации:** artradeskz +- **Проект:** https://github.com/artradeskz/ndisasm-ru +- **Назначение:** Адаптация для языка программирования КВС + +Модификация включает: +- Добавление модуля `zamenyator` для перевода мнемоник и регистров +- Патч `ndisasm.c` для вызова переводчика в функции `output_ins()` +- Сборка в независимый проект + +--- + +## 🤝 Благодарности + +- Команде разработчиков **NASM** за отличный инструмент +- Сообществу **КВС** за вдохновение + +--- + +## 🔗 Ссылки + +- [Проект КВС](https://github.com/artradeskz/kvs) +- [Официальный сайт NASM](https://www.nasm.us/) +- [Исходный код NASM](https://git.nasm.us/nasm.git) + +--- + +## 📧 Контакты + +По вопросам и предложениям: [GitHub Issues](https://github.com/artradeskz/ndisasm-ru/issues) + +--- + +*ndisasm-ru — Русский дизассемблер для КВС* \ No newline at end of file diff --git a/include/alloc.h b/include/alloc.h new file mode 100644 index 0000000..767bcaf --- /dev/null +++ b/include/alloc.h @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 1996-2018 The NASM Authors - All Rights Reserved */ + +#ifndef NASMLIB_ALLOC_H +#define NASMLIB_ALLOC_H + +#include "compiler.h" + +fatal_func nasm_alloc_failed(void); + +static inline void * pure_func validate_ptr(void *p) +{ + if (unlikely(!p)) + nasm_alloc_failed(); + return p; +} + +extern size_t _nasm_last_string_size; + +#endif /* NASMLIB_ALLOC_H */ diff --git a/include/asmutil.h b/include/asmutil.h new file mode 100644 index 0000000..6548b97 --- /dev/null +++ b/include/asmutil.h @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 2025 The NASM Authors - All Rights Reserved */ + +#ifndef NASM_ASMUTIL_H +#define NASM_ASMUTIL_H + +/* + * Get a boolean option value; can be an expression or a set of special + * ("yes", "no", "false", "true", ...) + * + * If the result is not a valid value, print an error message, leave + * the option value unchanged, and return NULL. + * + * Returns the first character past the boolean expression. + */ +char *get_boolean_option(const char *, bool *); + +#endif diff --git a/include/assemble.h b/include/assemble.h new file mode 100644 index 0000000..d62c2de --- /dev/null +++ b/include/assemble.h @@ -0,0 +1,55 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 1996-2025 The NASM Authors - All Rights Reserved */ + +/* + * assemble.h - header file for stuff private to the assembler + */ + +#ifndef NASM_ASSEMBLE_H +#define NASM_ASSEMBLE_H + +#include "nasm.h" +#include "iflag.h" +#include "asmutil.h" + +extern iflag_t cpu, cmd_cpu; +void set_cpu(const char *cpuspec); + +extern bool in_absolute; /* Are we in an absolute segment? */ +extern struct location absolute; + +int64_t increment_offset(int64_t delta); +void process_insn(insn *instruction); + +bool directive_valid(const char *); +bool process_directives(char *); +void process_pragma(char *); + +/* Is this a compile-time absolute constant? */ +static inline bool op_compile_abs(const struct operand * const op) +{ + if (op->opflags & OPFLAG_UNKNOWN) + return true; /* Be optimistic in pass 1 */ + if (op->opflags & OPFLAG_RELATIVE) + return false; + if (op->wrt != NO_SEG) + return false; + + return op->segment == NO_SEG; +} + +/* Is this a compile-time relative constant? */ +static inline bool op_compile_rel(const insn * const ins, + const struct operand * const op) +{ + if (op->opflags & OPFLAG_UNKNOWN) + return true; /* Be optimistic in pass 1 */ + if (!(op->opflags & OPFLAG_RELATIVE)) + return false; + if (op->wrt != NO_SEG) /* Is this correct?! */ + return false; + + return op->segment == ins->loc.segment; +} + +#endif diff --git a/include/attribute.h b/include/attribute.h new file mode 100644 index 0000000..fae3666 --- /dev/null +++ b/include/attribute.h @@ -0,0 +1,38 @@ +/* + * Define a macro for compiler attributes. Use either gcc + * syntax if __GNUC__ is defined, or try to look for the + * modern standard [[x]] attributes. + * + * Unfortunately [[x]] doesn't always work when it comes to + * GNUC-specific attributes, and some compilers support GCC + * syntax without __attribute__ just to be confusing. + * Therefore, this also needs an autoconf module to test + * the validity. + * + * Use #ifdef and not defined() here; some compilers do the wrong + * thing in the latter case. + */ + +#ifndef ATTRIBUTE +# define MODERN_ATTRIBUTE(x) [[x]] +# ifndef __GNUC__ +# ifdef __cplusplus +# ifdef __has_cpp_attribute +# define ATTRIBUTE(x) MODERN_ATTRIBUTE(x) +# endif +# endif +# ifndef ATTRIBUTE +# ifdef __has_c_attribute +# define ATTRIBUTE(x) MODERN_ATTRIBUTE(x) +# endif +# endif +# ifndef ATTRIBUTE +# ifdef __has_attribute +# define ATTRIBUTE(x) MODERN_ATTRIBUTE(x) +# endif +# endif +# endif +# ifndef ATTRIBUTE +# define ATTRIBUTE(x) __attribute__((x)) +# endif +#endif diff --git a/include/autoconf/attribute.h b/include/autoconf/attribute.h new file mode 100644 index 0000000..fae3666 --- /dev/null +++ b/include/autoconf/attribute.h @@ -0,0 +1,38 @@ +/* + * Define a macro for compiler attributes. Use either gcc + * syntax if __GNUC__ is defined, or try to look for the + * modern standard [[x]] attributes. + * + * Unfortunately [[x]] doesn't always work when it comes to + * GNUC-specific attributes, and some compilers support GCC + * syntax without __attribute__ just to be confusing. + * Therefore, this also needs an autoconf module to test + * the validity. + * + * Use #ifdef and not defined() here; some compilers do the wrong + * thing in the latter case. + */ + +#ifndef ATTRIBUTE +# define MODERN_ATTRIBUTE(x) [[x]] +# ifndef __GNUC__ +# ifdef __cplusplus +# ifdef __has_cpp_attribute +# define ATTRIBUTE(x) MODERN_ATTRIBUTE(x) +# endif +# endif +# ifndef ATTRIBUTE +# ifdef __has_c_attribute +# define ATTRIBUTE(x) MODERN_ATTRIBUTE(x) +# endif +# endif +# ifndef ATTRIBUTE +# ifdef __has_attribute +# define ATTRIBUTE(x) MODERN_ATTRIBUTE(x) +# endif +# endif +# endif +# ifndef ATTRIBUTE +# define ATTRIBUTE(x) __attribute__((x)) +# endif +#endif diff --git a/include/bytesex.h b/include/bytesex.h new file mode 100644 index 0000000..7ba3c5b --- /dev/null +++ b/include/bytesex.h @@ -0,0 +1,373 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 1996-2025 The NASM Authors - All Rights Reserved */ + +/* + * bytesex.h - byte order helper functions + * + * In this function, be careful about getting X86_MEMORY versus + * LITTLE_ENDIAN correct: X86_MEMORY also means we are allowed to + * do unaligned memory references; it is opportunistic. + */ + +#ifndef NASM_BYTEORD_H +#define NASM_BYTEORD_H + +#include "compiler.h" + +/* + * Endian control functions which work on a single integer + */ +/* Last resort implementations */ +#define CPU_TO_LE(w,x) \ + uint ## w ## _t xx = (x); \ + union { \ + uint ## w ## _t v; \ + uint8_t c[sizeof(xx)]; \ + } u; \ + size_t i; \ + for (i = 0; i < sizeof(xx); i++) { \ + u.c[i] = (uint8_t)xx; \ + xx >>= 8; \ + } \ + return u.v + +#define LE_TO_CPU(w,x) \ + uint ## w ## _t xx = 0; \ + union { \ + uint ## w ## _t v; \ + uint8_t c[sizeof(xx)]; \ + } u; \ + u.v = (x); \ + for (i = 0; i < sizeof(xx); i++) \ + xx += (uint ## w ## _t)x.c[i] << (i << 3); \ + \ + return xx + +#ifndef HAVE_HTOLE16 +static inline uint16_t htole16(uint16_t v) +{ +# ifdef WORDS_LITTLEENDIAN + return v; +# elif defined(HAVE_CPU_TO_LE16) + return cpu_to_le16(v); +# elif defined(HAVE___CPU_TO_LE16) + return __cpu_to_le16(v); +# elif defined(WORDS_BIGENDIAN) +# ifdef HAVE___BSWAP_16 + return __bswap_16(v); +# elif defined(HAVE___BUILTIN_BSWAP16) + return __builtin_bswap16(v); +# elif defined(HAVE__BYTESWAP_UINT16) + return _byteswap_uint16(v); +# else + v = (v << 8) | (v >> 8); + return v; +# endif +# else + CPU_TO_LE(16); +# endif +} +#endif + +#ifndef HAVE_HTOLE32 +static inline uint32_t htole32(uint32_t v) +{ +# ifdef WORDS_LITTLEENDIAN + return v; +# elif defined(HAVE_CPU_TO_LE32) + return cpu_to_le32(v); +# elif defined(HAVE___CPU_TO_LE32) + return __cpu_to_le32(v); +# elif defined(WORDS_BIGENDIAN) +# ifdef HAVE___BSWAP_32 + return __bswap_32(v); +# elif defined(HAVE___BUILTIN_BSWAP32) + return __builtin_bswap32(v); +# elif defined(HAVE__BYTESWAP_UINT32) + return _byteswap_uint32(v); +# else + v = ((v << 8) & UINT32_C(0xff00ff00)) | + ((v >> 8) & UINT32_C(0x00ff00ff)); + return (v << 16) | (v >> 16); +# endif +# else + CPU_TO_LE(32); +# endif +} +#endif + +#ifndef HAVE_HTOLE64 +static inline uint64_t htole64(uint64_t v) +{ +#ifdef WORDS_LITTLEENDIAN + return v; +# elif defined(HAVE_CPU_TO_LE64) + return cpu_to_le64(v); +# elif defined(HAVE___CPU_TO_LE64) + return __cpu_to_le64(v); +# elif defined(WORDS_BIGENDIAN) +# ifdef HAVE___BSWAP_64 + return __bswap_64(v); +# elif defined(HAVE___BUILTIN_BSWAP64) + return __builtin_bswap64(v); +# elif defined(HAVE__BYTESWAP_UINT64) + return _byteswap_uint64(v); +# else + v = ((v << 8) & UINT64_C(0xff00ff00ff00ff00)) | + ((v >> 8) & UINT64_C(0x00ff00ff00ff00ff)); + v = ((v << 16) & UINT64_C(0xffff0000ffff0000)) | + ((v >> 16) & UINT64_C(0x0000ffff0000ffff)); + return (v << 32) | (v >> 32); +# endif +# else + CPU_TO_LE(64); +# endif +} +#endif + +#ifndef HAVE_HTOLE16 +static inline uint16_t le16toh(uint16_t v) +{ +#ifdef WORDS_LITTLEENDIAN + return v; +# elif defined(HAVE___LE16_TO_CPU) + return __le16_to_cpu(v); +# elif defined(HAVE_LE16TOH) + return le64toh(v); +# elif defined(WORDS_BIGENDIAN) + return htole16(v); +# else + LE_TO_CPU(16); +# endif +} +#endif + +#ifndef HAVE_HTOLE32 +static inline uint32_t le32toh(uint32_t v) +{ +#ifdef WORDS_LITTLEENDIAN + return v; +# elif defined(HAVE_CPU_TO_LE32) + return le32_to_cpu(v); +# elif defined(HAVE___CPU_TO_LE32) + return __le32_to_cpu(v); +# elif defined(WORDS_BIGENDIAN) + return htole32(v); +# else + LE_TO_CPU(32); +# endif +} +#endif + +#ifndef HAVE_HTOLE64 +static inline uint64_t le64toh(uint64_t v) +{ +#ifdef WORDS_LITTLEENDIAN + return v; +# elif defined(HAVE_CPU_TO_LE64) + return le64_to_cpu(v); +# elif defined(HAVE___CPU_TO_LE64) + return __le64_to_cpu(v); +# elif defined(WORDS_BIGENDIAN) + return htole64(v); +# else + LE_TO_CPU(64); +# endif +} +#endif + +/* + * Accessors for unaligned littleendian objects. These intentionally + * take an arbitrary pointer type, such that e.g. getu32() can be + * correctly executed on a void * or uint8_t *. + */ +#define getu8(p) (*(const uint8_t *)(p)) +#define setu8(p,v) (*(uint8_t *)(p) = (v)) + +/* Unaligned object referencing */ +#if X86_MEMORY + +#define getu16(p) (*(const uint16_t *)(p)) +#define getu32(p) (*(const uint32_t *)(p)) +#define getu64(p) (*(const uint64_t *)(p)) + +#define setu16(p,v) (*(uint16_t *)(p) = (v)) +#define setu32(p,v) (*(uint32_t *)(p) = (v)) +#define setu64(p,v) (*(uint64_t *)(p) = (v)) + +#elif defined(__GNUC__) + +struct unaligned16 { + uint16_t v; +} __attribute__((packed)); +static inline uint16_t getu16(const void *p) +{ + return le16toh(((const struct unaligned16 *)p)->v); +} +static inline uint16_t setu16(void *p, uint16_t v) +{ + ((struct unaligned16 *)p)->v = htole16(v); + return v; +} + +struct unaligned32 { + uint32_t v; +} __attribute__((packed)); +static inline uint32_t getu32(const void *p) +{ + return le32toh(((const struct unaligned32 *)p)->v); +} +static inline uint32_t setu32(void *p, uint32_t v) +{ + ((struct unaligned32 *)p)->v = htole32(v); + return v; +} + +struct unaligned64 { + uint64_t v; +} __attribute__((packed)); +static inline uint64_t getu64(const void *p) +{ + return le64toh(((const struct unaligned64 *)p)->v); +} +static inline uint64_t setu64(void *p, uint64_t v) +{ + ((struct unaligned64 *)p)->v = htole64(v); + return v; +} + +#elif defined(_MSC_VER) + +static inline uint16_t getu16(const void *p) +{ + const uint16_t _unaligned *pp = p; + return le16toh(*pp); +} +static inline uint16_t setu16(void *p, uint16_t v) +{ + uint16_t _unaligned *pp = p; + *pp = htole16(v); + return v; +} + +static inline uint32_t getu32(const void *p) +{ + const uint32_t _unaligned *pp = p; + return le32toh(*pp); +} +static inline uint32_t setu32(void *p, uint32_t v) +{ + uint32_t _unaligned *pp = p; + *pp = htole32(v); + return v; +} + +static inline uint64_t getu64(const void *p) +{ + const uint64_t _unaligned *pp = p; + return le64toh(*pp); +} +static inline uint64_t setu64(void *p, uint64_t v) +{ + uint32_t _unaligned *pp = p; + *pp = htole64(v); + return v; +} + +#else + +/* No idea, do it the slow way... */ + +static inline uint16_t getu16(const void *p) +{ + const uint8_t *pp = p; + return pp[0] + (pp[1] << 8); +} +static inline uint16_t setu16(void *p, uint16_t v) +{ + uint8_t *pp = p; + pp[0] = (uint8_t)v; + pp[1] = (uint8_t)(v >> 8); + return v; +} + +static inline uint32_t getu32(const void *p) +{ + const uint8_t *pp = p; + return getu16(pp) + ((uint32_t)getu16(pp+2) << 16); +} +static inline uint32_t setu32(void *p, uint32_t v) +{ + uint8_t *pp = p; + setu16(pp, (uint16_t)v); + setu16(pp+2, (uint16_t)(v >> 16)); + return v; +} + +static inline uint64_t getu64(const void *p) +{ + const uint8_t *pp = p; + return getu32(pp) + ((uint64_t)getu32(pp+4) << 32); +} +static inline uint64_t setu64(void *p, uint64_t v) +{ + uint8_t *pp = p; + setu32(pp, (uint32_t)v); + setu32(pp+4, (uint32_t)(v >> 32)); + return v; +} + +#endif + +/* Signed versions */ +#define gets8(p) ((int8_t) getu8(p)) +#define gets16(p) ((int16_t)getu16(p)) +#define gets32(p) ((int32_t)getu32(p)) +#define gets64(p) ((int64_t)getu64(p)) + +#define sets8(p,v) ((int8_t) setu8((p), (uint8_t)(v))) +#define sets16(p,v) ((int16_t)setu16((p),(uint16_t)(v))) +#define sets32(p,v) ((int32_t)setu32((p),(uint32_t)(v))) +#define sets64(p,v) ((int64_t)setu64((p),(uint64_t)(v))) + +/* + * Some handy macros that will probably be of use in more than one + * output format: convert integers into little-endian byte packed + * format in memory, advancing the pointer. + */ + +#define WRITECHAR(p,v) \ + do { \ + uint8_t *_wc_p = (uint8_t *)(p); \ + setu8(_wc_p, (v)); \ + (p) = (void *)(_wc_p+1); \ + } while (0) + +#define WRITESHORT(p,v) \ + do { \ + uint8_t *_wc_p = (uint8_t *)(p); \ + setu16(_wc_p, (v)); \ + (p) = (void *)(_wc_p+2); \ + } while (0) + +#define WRITELONG(p,v) \ + do { \ + uint8_t *_wc_p = (uint8_t *)(p); \ + setu32(_wc_p, (v)); \ + (p) = (void *)(_wc_p+4); \ + } while (0) + +#define WRITEDLONG(p,v) \ + do { \ + uint8_t *_wc_p = (uint8_t *)(p); \ + setu64(_wc_p, (v)); \ + (p) = (void *)(_wc_p+8); \ + } while (0) + +#define WRITEADDR(p,v,s) \ + do { \ + const uint64_t _wa_v = htole64(v); \ + (p) = mempcpy((p), &_wa_v, (s)); \ + } while (0) + +#endif /* NASM_BYTESEX_H */ diff --git a/include/compiler.h b/include/compiler.h new file mode 100644 index 0000000..3ba5f7c --- /dev/null +++ b/include/compiler.h @@ -0,0 +1,479 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 2007-2025 The NASM Authors - All Rights Reserved */ + +/* + * compiler.h + * + * Compiler-specific macros for NASM. Feel free to add support for + * other compilers in here. + * + * This header file should be included before any other header. + */ + +#ifndef NASM_COMPILER_H +#define NASM_COMPILER_H 1 + +/* + * At least DJGPP and Cygwin have broken header files if __STRICT_ANSI__ + * is defined. + */ +#ifdef __GNUC__ +# undef __STRICT_ANSI__ +#endif + +/* On Microsoft platforms we support multibyte character sets in filenames */ +#define _MBCS 1 + +#include "autoconf/attribute.h" + +#ifdef HAVE_CONFIG_H +# include "config/config.h" +#else +# if defined(_MSC_VER) && (_MSC_VER >= 1310) +# include "config/msvc.h" +# elif defined(__WATCOMC__) +# include "config/watcom.h" +# else +# include "config/unknown.h" +# endif +/* This unconditionally defines some macros we really want */ +# include "config/unconfig.h" +#endif /* Configuration file */ + +/* This is required to get the standard macros when compiling + with a C++ compiler. This must be defined *before* is + included, directly or indirectly. */ +#define __STDC_CONSTANT_MACROS 1 +#define __STDC_LIMIT_MACROS 1 +#define __STDC_FORMAT_MACROS 1 + +#ifdef HAVE_INTTYPES_H +# include +#else +# include "nasmint.h" +#endif + +#include +#include +#include +#include +#include +#include +#include +#include + +#ifdef HAVE_STRINGS_H +# include +#endif +#ifdef HAVE_SYS_TYPES_H +# include +#endif + +/* + * This is impossible to do 100% accurately, because the actual type + * of size_t may differ from its range. + */ +#ifdef _WIN32 +# define PRIz "I" /* Needed for msvcrt, not ucrt */ +#elif defined(PRINTF_SUPPORTS_Z) || \ + (defined(__STDC_VERSION__) && __STDC_VERSION__ >= 199901L) +# define PRIz "z" +#elif SIZE_MAX == UINT_MAX +# define PRIz "" +#elif SIZE_MAX == ULONG_MAX +# define PRIz "l" +#elif SIZE_MAX == ULONGLONG_MAX +# define PRIz "ll" +#else +# error "Unable to determine printf format for size_t" +#endif +#define PRIzd PRIz "u" /* size_t is always unsigned */ +#define PRIzu PRIz "u" +#define PRIzu PRIz "u" +#define PRIzx PRIz "x" +#define PRIzX PRIz "X" + +#ifdef HAVE_STDBIT_H + +# include + +# undef WORDS_LITTLEENDIAN +# undef WORDS_BIGENDIAN +# if __STDC_ENDIAN_NATIVE__ == __STDC_ENDIAN_LITTLE__ +# define WORDS_LITTLEENDIAN 1 +# elif __STDC_ENDIAN_NATIVE__ == __STDC_ENDIAN_BIG__ +# define WORDS_BIGENDIAN 1 +# endif + +#else /* No */ + +# ifdef HAVE_ENDIAN_H +# include +# elif defined(HAVE_SYS_ENDIAN_H) +# include +# elif defined(HAVE_MACHINE_ENDIAN_H) +# include +# endif + +/* + * If we have BYTE_ORDER defined, or the compiler provides + * __BIG_ENDIAN__ or __LITTLE_ENDIAN__, trust it over what autoconf + * came up with, especially since autoconf obviously can't figure + * things out for a universal compiler. + */ +# if defined(__BIG_ENDIAN__) && !defined(__LITTLE_ENDIAN__) +# undef WORDS_LITTLEENDIAN +# undef WORDS_BIGENDIAN +# define WORDS_BIGENDIAN 1 +# elif defined(__LITTLE_ENDIAN__) && !defined(__BIG_ENDIAN__) +# undef WORDS_LITTLEENDIAN +# undef WORDS_BIGENDIAN +# define WORDS_LITTLEENDIAN 1 +# elif defined(BYTE_ORDER) && defined(LITTLE_ENDIAN) && defined(BIG_ENDIAN) +# undef WORDS_LITTLEENDIAN +# undef WORDS_BIGENDIAN +# if BYTE_ORDER == LITTLE_ENDIAN +# define WORDS_LITTLEENDIAN 1 +# elif BYTE_ORDER == BIG_ENDIAN +# define WORDS_BIGENDIAN 1 +# endif +# endif + +#endif + +/* + * Define this to 1 for faster performance if this is a littleendian + * platform *and* it can do arbitrary unaligned memory references. It + * is safe to leave it defined to 0 even if that is true. + */ +#if defined(__386__) || defined(__i386__) || defined(__x86_64__) \ + || defined(_M_IX86) || defined(_M_X64) +# define X86_MEMORY 1 +# undef WORDS_BIGENDIAN +# undef WORDS_LITTLEENDIAN +# define WORDS_LITTLEENDIAN 1 +#else +# define X86_MEMORY 0 +#endif + +/* Some versions of MSVC have these only with underscores in front */ +#ifndef HAVE_SNPRINTF +# ifdef HAVE__SNPRINTF +# define snprintf _snprintf +# else +int snprintf(char *, size_t, const char *, ...); +# endif +#endif + +#ifndef HAVE_VSNPRINTF +# ifdef HAVE__VSNPRINTF +# define vsnprintf _vsnprintf +# else +int vsnprintf(char *, size_t, const char *, va_list); +# endif +#endif + +#if !defined(HAVE_STRLCPY) || !HAVE_DECL_STRLCPY +size_t strlcpy(char *, const char *, size_t); +#endif + +/* C++ and C23 have bool, false, and true as proper keywords */ +#if !defined(__cplusplus) && (__STDC_VERSION__ < 202311L) +# ifdef HAVE_STDBOOL_H +# include +# elif defined(HAVE___BOOL) + typedef _Bool bool; +# define false 0 +# define true 1 +# else +/* This is a bit dangerous, because casting to this ersatz bool + will not produce the same result as the standard (bool) cast. + Instead, use the explicit construct !!x instead of relying on + implicit conversions or casts. */ +typedef enum bool { false, true } bool; +# endif +#endif + +/* Create a NULL pointer of the same type as the address of + the argument, without actually evaluating said argument. */ +#define nullas(p) (0 ? &(p) : NULL) + +/* Convert an offsetted NULL pointer dereference to a size_t offset. + Technically non-portable as taking the offset from a NULL pointer + is undefined behavior, but... */ +#define null_offset(p) ((size_t)((const char *)&(p) - (const char *)NULL)) + +/* Provide a substitute for offsetof() if we don't have one. This + variant works on most (but not *all*) systems... */ +#ifndef offsetof +# define offsetof(t,m) null_offset(((t *)NULL)->m) +#endif + +/* If typeof is defined as a macro, assume we have typeof even if + HAVE_TYPEOF is not declared (e.g. due to not using autoconf.) */ +#ifdef typeof +# define HAVE_TYPEOF 1 +#endif + +/* This is like offsetof(), but takes an object rather than a type. */ +#ifndef offsetin +# ifdef HAVE_TYPEOF +# define offsetin(p,m) offsetof(typeof(p),m) +# else +# define offsetin(p,m) null_offset(nullas(p)->m) +# endif +#endif + +/* The container_of construct: if p is a pointer to member m of + container class c, then return a pointer to the container of which + *p is a member. */ +#ifndef container_of +# define container_of(p, c, m) ((c *)((char *)(p) - offsetof(c,m))) +#endif + +/* Some misguided platforms hide the defs for these */ +#if defined(HAVE_STRCASECMP) && !HAVE_DECL_STRCASECMP +int strcasecmp(const char *, const char *); +#endif + +#if defined(HAVE_STRICMP) && !HAVE_DECL_STRICMP +int stricmp(const char *, const char *); +#endif + +#if defined(HAVE_STRNCASECMP) && !HAVE_DECL_STRNCASECMP +int strncasecmp(const char *, const char *, size_t); +#endif + +#if defined(HAVE_STRNICMP) && !HAVE_DECL_STRNICMP +int strnicmp(const char *, const char *, size_t); +#endif + +#if defined(HAVE_STRSEP) && !HAVE_DECL_STRSEP +char *strsep(char **, const char *); +#endif + +#if !HAVE_DECL_STRNLEN +size_t strnlen(const char *s, size_t maxlen); +#endif + +#ifndef HAVE_MEMPCPY +static inline void *mempcpy(void *dst, const void *src, size_t n) +{ + return (char *)memcpy(dst, src, n) + n; +} +#endif + +#ifndef HAVE_MEMPSET +static inline void *mempset(void *dst, int c, size_t n) +{ + return (char *)memset(dst, c, n) + n; +} +#endif + +/* + * Hack to support external-linkage inline functions + */ +#ifndef HAVE_STDC_INLINE +# ifdef __GNUC__ +# ifdef __GNUC_STDC_INLINE__ +# define HAVE_STDC_INLINE +# else +# define HAVE_GNU_INLINE +# endif +# elif defined(__GNUC_GNU_INLINE__) +/* Some other compiler implementing only GNU inline semantics? */ +# define HAVE_GNU_INLINE +# elif defined(__STDC_VERSION__) +# if __STDC_VERSION__ >= 199901L +# define HAVE_STDC_INLINE +# endif +# endif +#endif + +#ifdef HAVE_STDC_INLINE +# define extern_inline inline +#elif defined(HAVE_GNU_INLINE) +# define extern_inline extern inline +# define inline_prototypes +#else +# define inline_prototypes +#endif + +/* + * Hints to the compiler that a particular branch of code is more or + * less likely to be taken. + */ +#ifdef HAVE___BUILTIN_EXPECT +# define likely(x) __builtin_expect(!!(x), true) +# define unlikely(x) __builtin_expect(!!(x), false) +#else +# define likely(x) (!!(x)) +# define unlikely(x) (!!(x)) +#endif + +#ifdef HAVE___BUILTIN_PREFETCH +# define prefetch(x) __builtin_prefetch(x) +#else +# define prefetch(x) ((void)(x)) +#endif + +/* + * Attributes + */ + +#define safe_alloc never_null malloc_func +#define safe_alloc_ptr never_null_ptr malloc_func_ptr + +#define safe_malloc(s) safe_alloc alloc_size_func1(s) +#define safe_malloc2(s1,s2) safe_alloc alloc_size_func2(s1,s2) +#define safe_realloc(s) never_null alloc_size_func1(s) +#define safe_malloc_ptr(s) safe_alloc_ptr alloc_size_func1_ptr(s) +#define safe_malloc2_ptr(s1,s2) safe_alloc_ptr alloc_size_func2_ptr(s1,s2) +#define safe_realloc_ptr(s) never_null_ptr alloc_size_func1_ptr(s) + +/* + * How to tell the compiler that a function doesn't return + */ +#ifdef HAVE_STDNORETURN_H +# include +# define no_return noreturn +#elif defined(_MSC_VER) +# define no_return __declspec(noreturn) +#else +# define no_return noreturn_func +#endif + +/* Function priority: pure < reproducible < unsequenced < const */ + +#ifndef HAVE_FUNC_ATTRIBUTE_REPRODUCIBLE +# undef reproducible_func +# define reproducible_func pure_func +# undef reproducible_func_ptr +# define reproducible_func_ptr pure_func_ptr +#endif + +#ifndef HAVE_FUNC_ATTRIBUTE_UNSEQUENCED +# undef unsequenced_func +# define unsequenced_func reproducible_func +# undef unsequenced_func_ptr +# define unsequenced_func_ptr reproducible_func_ptr +#endif + +#ifndef HAVE_FUNC_ATTRIBUTE_CONST +# undef const_func +# define const_func reproducible_func +# undef const_func_ptr +# define const_func_ptr reproducible_func_ptr +#endif + +/* + * A fatal function is both unlikely and no_return + */ +#define fatal_func no_return unlikely_func void +#define static_fatal_func no_return unlikely_func static void + +/* + * How to tell the compiler that a function takes a printf-like string + */ +#define printf_func(fmt, list) format_func3(printf,fmt,list) +#define printf_func_ptr(fmt, list) format_func3_ptr(printf,fmt,list) +#define vprintf_func(fmt) format_func3(printf,fmt,0) +#define vprintf_func_ptr(fmt) format_func3_ptr(printf,fmt,0) + +/* Determine probabilistically if something is a compile-time constant */ +#ifdef HAVE___BUILTIN_CONSTANT_P +# if defined(__GNUC__) && (__GNUC__ >= 5) +# define is_constant(x) __builtin_constant_p((x)) +# else +# define is_constant(x) false +# endif +#else +# define is_constant(x) false +#endif + +/* + * If we can guarantee that a particular expression is constant, use it, + * otherwise use a different version. + */ +#if defined(__GNUC__) && (__GNUC__ >= 3) +# define not_pedantic_start \ + _Pragma("GCC diagnostic push") \ + _Pragma("GCC diagnostic ignored \"-Wpedantic\"") +# define not_pedantic_end \ + _Pragma("GCC diagnostic pop") +#else +# define not_pedantic_start +# define not_pedantic_end +#endif + +#ifdef HAVE___BUILTIN_CHOOSE_EXPR +# define if_constant(x,y) __builtin_choose_expr(is_constant(x),(x),(y)) +#else +# define if_constant(x,y) (y) +#endif + +/* + * The autoconf documentation states: + * + * `va_copy' + * The C99 standard provides `va_copy' for copying `va_list' + * variables. It may be available in older environments too, though + * possibly as `__va_copy' (e.g., `gcc' in strict pre-C99 mode). + * These can be tested with `#ifdef'. A fallback to `memcpy (&dst, + * &src, sizeof (va_list))' gives maximum portability. + */ +#ifndef va_copy +# ifdef __va_copy +# define va_copy(dst,src) __va_copy(dst,src) +# else +# define va_copy(dst,src) memcpy(&(dst),&(src),sizeof(va_list)) +# endif +#endif + +/* + * If SIZE_MAX is not defined, rely on size_t being unsigned + */ +#ifndef SIZE_MAX +# define SIZE_MAX (((size_t)0) - 1) +#endif + +/* + * Current function name, if available, otherwise NULL + */ +#ifdef HAVE_FUNC_NAME +# define NASM_FUNC __func__ +#else +# define NASM_FUNC NULL +#endif + +/* Watcom doesn't handle switch statements with 64-bit types, hack around it */ +#ifdef __WATCOMC__ +# define BOGUS_CASE 0x76543210 + +static inline unsigned int watcom_switch_hack(uint64_t x) +{ + if (x > (uint64_t)UINT_MAX) + return BOGUS_CASE; + else + return (unsigned int)x; +} + +# define switch(x) switch(sizeof(x) > sizeof(unsigned int) \ + ? watcom_switch_hack(x) : (unsigned int)(x)) + +/* This is to make sure BOGUS_CASE doesn't conflict with anything real... */ +# define default case BOGUS_CASE: default +#endif + +#ifndef unreachable /* C23 defines as a macro in */ +# ifdef HAVE___BUILTIN_UNREACHABLE +# define unreachable() __builtin_unreachable() +# else +# define unreachable() do { abort(); } while(1) +# endif +#endif + +/* This should be set from main() */ +extern const char *_progname; + +#endif /* NASM_COMPILER_H */ diff --git a/include/config.h b/include/config.h new file mode 100644 index 0000000..91d4e3b --- /dev/null +++ b/include/config.h @@ -0,0 +1,1036 @@ +/* config/config.h. Generated from config.h.in by configure. */ +/* config/config.h.in. Generated from configure.ac by autoheader. */ + +/* Define to 1 to call abort() on panics (internal errors), for debugging. */ +/* #undef ABORT_ON_PANIC */ + +/* Define if building universal (internal helper macro) */ +/* #undef AC_APPLE_UNIVERSAL_BUILD */ + +/* Define to 1 if compiled with -fdata-sections in CFLAGS */ +#define CFLAGS_FDATA_SECTIONS 1 + +/* Define to 1 if compiled with -ffunction-sections in CFLAGS */ +#define CFLAGS_FFUNCTION_SECTIONS 1 + +/* Define to 1 if compiled with -fgnu89-inline in CFLAGS */ +/* #undef CFLAGS_FGNU89_INLINE */ + +/* Define to 1 if compiled with -fno-common in CFLAGS */ +#define CFLAGS_FNO_COMMON 1 + +/* Define to 1 if compiled with -fno-omit-frame-pointer in CFLAGS */ +/* #undef CFLAGS_FNO_OMIT_FRAME_POINTER */ + +/* Define to 1 if compiled with -fsanitize=address in CFLAGS */ +/* #undef CFLAGS_FSANITIZE_ADDRESS */ + +/* Define to 1 if compiled with -fsanitize=undefined in CFLAGS */ +/* #undef CFLAGS_FSANITIZE_UNDEFINED */ + +/* Define to 1 if compiled with -ftrivial-auto-var-init=zero in CFLAGS */ +/* #undef CFLAGS_FTRIVIAL_AUTO_VAR_INIT_ZERO */ + +/* Define to 1 if compiled with -fvisibility=hidden in CFLAGS */ +#define CFLAGS_FVISIBILITY_HIDDEN 1 + +/* Define to 1 if compiled with -fwrapv in CFLAGS */ +#define CFLAGS_FWRAPV 1 + +/* Define to 1 if compiled with -g3 in CFLAGS */ +#define CFLAGS_G3 1 + +/* Define to 1 if compiled with -ggdb in CFLAGS */ +#define CFLAGS_GGDB 1 + +/* Define to 1 if compiled with -O0 in CFLAGS */ +/* #undef CFLAGS_O0 */ + +/* Define to 1 if compiled with -Og in CFLAGS */ +/* #undef CFLAGS_OG */ + +/* Define to 1 if compiled with -pedantic in CFLAGS */ +#define CFLAGS_PEDANTIC 1 + +/* Define to 1 if compiled with -pg in CFLAGS */ +/* #undef CFLAGS_PG */ + +/* Define to 1 if compiled with -std=c11 in CFLAGS */ +/* #undef CFLAGS_STD_C11 */ + +/* Define to 1 if compiled with -std=c17 in CFLAGS */ +#define CFLAGS_STD_C17 1 + +/* Define to 1 if compiled with -std=c23 in CFLAGS */ +/* #undef CFLAGS_STD_C23 */ + +/* Define to 1 if compiled with -std=c99 in CFLAGS */ +/* #undef CFLAGS_STD_C99 */ + +/* Define to 1 if compiled with -U__STRICT_ANSI__ in CFLAGS */ +#define CFLAGS_U_STRICT_ANSI_ 1 + +/* Define to 1 if compiled with -W in CFLAGS */ +#define CFLAGS_W 1 + +/* Define to 1 if compiled with -Wall in CFLAGS */ +#define CFLAGS_WALL 1 + +/* Define to 1 if compiled with -Werror in CFLAGS */ +/* #undef CFLAGS_WERROR */ + +/* Define to 1 if compiled with -Werror=comment in CFLAGS */ +#define CFLAGS_WERROR_COMMENT 1 + +/* Define to 1 if compiled with -Werror=implicit in CFLAGS */ +#define CFLAGS_WERROR_IMPLICIT 1 + +/* Define to 1 if compiled with -Werror=missing-braces in CFLAGS */ +#define CFLAGS_WERROR_MISSING_BRACES 1 + +/* Define to 1 if compiled with -Werror=missing-declarations in CFLAGS */ +#define CFLAGS_WERROR_MISSING_DECLARATIONS 1 + +/* Define to 1 if compiled with -Werror=missing-prototypes in CFLAGS */ +#define CFLAGS_WERROR_MISSING_PROTOTYPES 1 + +/* Define to 1 if compiled with -Werror=pointer-arith in CFLAGS */ +#define CFLAGS_WERROR_POINTER_ARITH 1 + +/* Define to 1 if compiled with -Werror=return-type in CFLAGS */ +#define CFLAGS_WERROR_RETURN_TYPE 1 + +/* Define to 1 if compiled with -Werror=strict-prototypes in CFLAGS */ +#define CFLAGS_WERROR_STRICT_PROTOTYPES 1 + +/* Define to 1 if compiled with -Werror=trigraphs in CFLAGS */ +#define CFLAGS_WERROR_TRIGRAPHS 1 + +/* Define to 1 if compiled with -Werror=unknown-warning-option in CFLAGS */ +/* #undef CFLAGS_WERROR_UNKNOWN_WARNING_OPTION */ + +/* Define to 1 if compiled with -Werror=vla in CFLAGS */ +#define CFLAGS_WERROR_VLA 1 + +/* Define to 1 if compiled with -Wno-long-long in CFLAGS */ +#define CFLAGS_WNO_LONG_LONG 1 + +/* Define to 1 if compiled with -Wno-pedantic-ms-format in CFLAGS */ +/* #undef CFLAGS_WNO_PEDANTIC_MS_FORMAT */ + +/* Define to 1 if compiled with -Wno-shift-negative-value in CFLAGS */ +#define CFLAGS_WNO_SHIFT_NEGATIVE_VALUE 1 + +/* Define to 1 if compiled with -Wno-stringop-truncation in CFLAGS */ +#define CFLAGS_WNO_STRINGOP_TRUNCATION 1 + +/* Define to 1 if compiled with -Wno-variadic-macros in CFLAGS */ +#define CFLAGS_WNO_VARIADIC_MACROS 1 + +/* Define to 1 if compiled with -Wsuggest-attribute=cold in CFLAGS */ +/* #undef CFLAGS_WSUGGEST_ATTRIBUTE_COLD */ + +/* Define to 1 if compiled with -Wsuggest-attribute=const in CFLAGS */ +/* #undef CFLAGS_WSUGGEST_ATTRIBUTE_CONST */ + +/* Define to 1 if compiled with -Wsuggest-attribute=format in CFLAGS */ +/* #undef CFLAGS_WSUGGEST_ATTRIBUTE_FORMAT */ + +/* Define to 1 if compiled with -Wsuggest-attribute=malloc in CFLAGS */ +/* #undef CFLAGS_WSUGGEST_ATTRIBUTE_MALLOC */ + +/* Define to 1 if compiled with -Wsuggest-attribute=noreturn in CFLAGS */ +/* #undef CFLAGS_WSUGGEST_ATTRIBUTE_NORETURN */ + +/* Define to 1 if compiled with -Wsuggest-attribute=pure in CFLAGS */ +/* #undef CFLAGS_WSUGGEST_ATTRIBUTE_PURE */ + +/* Define to 1 if compiled with -Werror=attributes in CPPFLAGS */ +#define CPPFLAGS_WERROR_ATTRIBUTES 1 + +/* Define to 1 if you have the `access' function. */ +#define HAVE_ACCESS 1 + +/* Define to 1 if you have the header file. */ +#define HAVE_ARPA_INET_H 1 + +/* "Define to 1 if you have the `bswap_16' intrinsic function." */ +/* #undef HAVE_BSWAP_16 */ + +/* "Define to 1 if you have the `bswap_32' intrinsic function." */ +/* #undef HAVE_BSWAP_32 */ + +/* "Define to 1 if you have the `bswap_64' intrinsic function." */ +/* #undef HAVE_BSWAP_64 */ + +/* Define to 1 if you have the header file. */ +#define HAVE_BYTESWAP_H 1 + +/* Define to 1 if you have the `canonicalize_file_name' function. */ +#define HAVE_CANONICALIZE_FILE_NAME 1 + +/* "Define to 1 if you have the `cpu_to_be16' intrinsic function." */ +/* #undef HAVE_CPU_TO_BE16 */ + +/* "Define to 1 if you have the `cpu_to_be32' intrinsic function." */ +/* #undef HAVE_CPU_TO_BE32 */ + +/* "Define to 1 if you have the `cpu_to_be64' intrinsic function." */ +/* #undef HAVE_CPU_TO_BE64 */ + +/* "Define to 1 if you have the `cpu_to_le16' intrinsic function." */ +/* #undef HAVE_CPU_TO_LE16 */ + +/* "Define to 1 if you have the `cpu_to_le32' intrinsic function." */ +/* #undef HAVE_CPU_TO_LE32 */ + +/* "Define to 1 if you have the `cpu_to_le64' intrinsic function." */ +/* #undef HAVE_CPU_TO_LE64 */ + +/* Define to 1 if you have the declaration of `strcasecmp', and to 0 if you + don't. */ +#define HAVE_DECL_STRCASECMP 1 + +/* Define to 1 if you have the declaration of `stricmp', and to 0 if you + don't. */ +#define HAVE_DECL_STRICMP 0 + +/* Define to 1 if you have the declaration of `strlcpy', and to 0 if you + don't. */ +#define HAVE_DECL_STRLCPY 0 + +/* Define to 1 if you have the declaration of `strncasecmp', and to 0 if you + don't. */ +#define HAVE_DECL_STRNCASECMP 1 + +/* Define to 1 if you have the declaration of `strnicmp', and to 0 if you + don't. */ +#define HAVE_DECL_STRNICMP 0 + +/* Define to 1 if you have the declaration of `strnlen', and to 0 if you + don't. */ +#define HAVE_DECL_STRNLEN 1 + +/* Define to 1 if you have the declaration of `strsep', and to 0 if you don't. + */ +#define HAVE_DECL_STRSEP 1 + +/* Define to 1 if you have the header file. */ +#define HAVE_ENDIAN_H 1 + +/* Define to 1 if you have the `faccessat' function. */ +#define HAVE_FACCESSAT 1 + +/* Define to 1 if you have the header file. */ +#define HAVE_FCNTL_H 1 + +/* Define to 1 if you have the `fileno' function. */ +#define HAVE_FILENO 1 + +/* Define to 1 if fseeko (and presumably ftello) exists and is declared. */ +#define HAVE_FSEEKO 1 + +/* Define to 1 if you have the `fstat' function. */ +#define HAVE_FSTAT 1 + +/* Define to 1 if you have the `ftruncate' function. */ +#define HAVE_FTRUNCATE 1 + +/* Define to 1 if your compiler supports the alloc_size function attribute */ +#define HAVE_FUNC_ATTRIBUTE_1_ALLOC_SIZE 1 + +/* Define to 1 if your compiler supports the alloc_size function attribute */ +#define HAVE_FUNC_ATTRIBUTE_2_ALLOC_SIZE 1 + +/* Define to 1 if your compiler supports the format function attribute */ +#define HAVE_FUNC_ATTRIBUTE_3_FORMAT 1 + +/* Define to 1 if your compiler supports the cold function attribute */ +#define HAVE_FUNC_ATTRIBUTE_COLD 1 + +/* Define to 1 if your compiler supports the const function attribute */ +#define HAVE_FUNC_ATTRIBUTE_CONST 1 + +/* Define to 1 if your compiler supports the error attribute on functions */ +#define HAVE_FUNC_ATTRIBUTE_ERROR 1 + +/* Define to 1 if your compiler supports the malloc function attribute */ +#define HAVE_FUNC_ATTRIBUTE_MALLOC 1 + +/* Define to 1 if your compiler supports the maybe_unused function attribute + */ +/* #undef HAVE_FUNC_ATTRIBUTE_MAYBE_UNUSED */ + +/* Define to 1 if your compiler supports the noreturn function attribute */ +#define HAVE_FUNC_ATTRIBUTE_NORETURN 1 + +/* Define to 1 if your compiler supports the pure function attribute */ +#define HAVE_FUNC_ATTRIBUTE_PURE 1 + +/* Define to 1 if your compiler supports the reproducible function attribute + */ +/* #undef HAVE_FUNC_ATTRIBUTE_REPRODUCIBLE */ + +/* Define to 1 if your compiler supports the returns_nonnull function + attribute */ +#define HAVE_FUNC_ATTRIBUTE_RETURNS_NONNULL 1 + +/* Define to 1 if your compiler supports the sentinel function attribute */ +#define HAVE_FUNC_ATTRIBUTE_SENTINEL 1 + +/* Define to 1 if your compiler supports the unsequenced function attribute */ +/* #undef HAVE_FUNC_ATTRIBUTE_UNSEQUENCED */ + +/* Define to 1 if your compiler supports the unused function attribute */ +#define HAVE_FUNC_ATTRIBUTE_UNUSED 1 + +/* Define to 1 if the compiler supports __func__ or equivalent. */ +#define HAVE_FUNC_NAME 1 + +/* Define to 1 if your compiler supports the alloc_size attribute on function + pointers */ +#define HAVE_FUNC_PTR_ATTRIBUTE_1_ALLOC_SIZE 1 + +/* Define to 1 if your compiler supports the alloc_size attribute on function + pointers */ +#define HAVE_FUNC_PTR_ATTRIBUTE_2_ALLOC_SIZE 1 + +/* Define to 1 if your compiler supports the format attribute on function + pointers */ +#define HAVE_FUNC_PTR_ATTRIBUTE_3_FORMAT 1 + +/* Define to 1 if your compiler supports the cold attribute on function + pointers */ +/* #undef HAVE_FUNC_PTR_ATTRIBUTE_COLD */ + +/* Define to 1 if your compiler supports the const attribute on function + pointers */ +#define HAVE_FUNC_PTR_ATTRIBUTE_CONST 1 + +/* Define to 1 if your compiler supports the malloc attribute on function + pointers */ +/* #undef HAVE_FUNC_PTR_ATTRIBUTE_MALLOC */ + +/* Define to 1 if your compiler supports the maybe_unused attribute on + function pointers */ +/* #undef HAVE_FUNC_PTR_ATTRIBUTE_MAYBE_UNUSED */ + +/* Define to 1 if your compiler supports the noreturn attribute on function + pointers */ +#define HAVE_FUNC_PTR_ATTRIBUTE_NORETURN 1 + +/* Define to 1 if your compiler supports the pure attribute on function + pointers */ +/* #undef HAVE_FUNC_PTR_ATTRIBUTE_PURE */ + +/* Define to 1 if your compiler supports the reproducible attribute on + function pointers */ +/* #undef HAVE_FUNC_PTR_ATTRIBUTE_REPRODUCIBLE */ + +/* Define to 1 if your compiler supports the returns_nonnull attribute on + function pointers */ +#define HAVE_FUNC_PTR_ATTRIBUTE_RETURNS_NONNULL 1 + +/* Define to 1 if your compiler supports the sentinel attribute on function + pointers */ +#define HAVE_FUNC_PTR_ATTRIBUTE_SENTINEL 1 + +/* Define to 1 if your compiler supports the unsequenced attribute on function + pointers */ +/* #undef HAVE_FUNC_PTR_ATTRIBUTE_UNSEQUENCED */ + +/* Define to 1 if your compiler supports the unused attribute on function + pointers */ +#define HAVE_FUNC_PTR_ATTRIBUTE_UNUSED 1 + +/* Define to 1 if you have the `getgid' function. */ +#define HAVE_GETGID 1 + +/* Define to 1 if you have the `getpagesize' function. */ +#define HAVE_GETPAGESIZE 1 + +/* Define to 1 if you have the `getrlimit' function. */ +#define HAVE_GETRLIMIT 1 + +/* Define to 1 if you have the `getuid' function. */ +#define HAVE_GETUID 1 + +/* "Define to 1 if you have the `htobe16' intrinsic function." */ +#define HAVE_HTOBE16 1 + +/* "Define to 1 if you have the `htobe32' intrinsic function." */ +#define HAVE_HTOBE32 1 + +/* "Define to 1 if you have the `htobe64' intrinsic function." */ +#define HAVE_HTOBE64 1 + +/* "Define to 1 if you have the `htole16' intrinsic function." */ +#define HAVE_HTOLE16 1 + +/* "Define to 1 if you have the `htole32' intrinsic function." */ +#define HAVE_HTOLE32 1 + +/* "Define to 1 if you have the `htole64' intrinsic function." */ +#define HAVE_HTOLE64 1 + +/* "Define to 1 if you have the `htonl' intrinsic function." */ +/* #undef HAVE_HTONL */ + +/* "Define to 1 if you have the `htonq' intrinsic function." */ +/* #undef HAVE_HTONQ */ + +/* "Define to 1 if you have the `htons' intrinsic function." */ +/* #undef HAVE_HTONS */ + +/* Define to 1 if you have the header file. */ +/* #undef HAVE_INTRIN_H */ + +/* Define to 1 if you have the header file. */ +#define HAVE_INTTYPES_H 1 + +/* Define to 1 if you have the header file. */ +/* #undef HAVE_IO_H */ + +/* Define to 1 if you have the `isascii' function. */ +#define HAVE_ISASCII 1 + +/* Define to 1 if you have the `iscntrl' function. */ +#define HAVE_ISCNTRL 1 + +/* Define to 1 if you have the header file. */ +/* #undef HAVE_MACHINE_ENDIAN_H */ + +/* Define to 1 if you have the `mempcpy' function. */ +#define HAVE_MEMPCPY 1 + +/* Define to 1 if you have the `mempset' function. */ +/* #undef HAVE_MEMPSET */ + +/* Define to 1 if you have the header file. */ +/* #undef HAVE_MINIX_CONFIG_H */ + +/* Define to 1 if you have a working `mmap' system call. */ +#define HAVE_MMAP 1 + +/* Define to 1 if you have the `pathconf' function. */ +#define HAVE_PATHCONF 1 + +/* Define to 1 if you have the `realpath' function. */ +#define HAVE_REALPATH 1 + +/* Define to 1 if you have some version of the snprintf function. */ +#define HAVE_SNPRINTF 1 + +/* Define to 1 if you have the `stat' function. */ +#define HAVE_STAT 1 + +/* Define to 1 if you have the header file. */ +#define HAVE_STDARG_H 1 + +/* Define to 1 if you have the header file. */ +/* #undef HAVE_STDBIT_H */ + +/* Define to 1 if stdbool.h conforms to C99. */ +#define HAVE_STDBOOL_H 1 + +/* Define to 1 if your compiler supports C99 extern inline */ +#define HAVE_STDC_INLINE 1 + +/* "Define to 1 if you have the `stdc_leading_zeros' intrinsic function." */ +/* #undef HAVE_STDC_LEADING_ZEROS */ + +/* Define to 1 if you have the header file. */ +#define HAVE_STDINT_H 1 + +/* Define to 1 if you have the header file. */ +#define HAVE_STDIO_H 1 + +/* Define to 1 if you have the header file. */ +#define HAVE_STDLIB_H 1 + +/* Define to 1 if you have the header file. */ +#define HAVE_STDNORETURN_H 1 + +/* Define to 1 if you have the `strcasecmp' function. */ +#define HAVE_STRCASECMP 1 + +/* Define to 1 if you have the `stricmp' function. */ +/* #undef HAVE_STRICMP */ + +/* Define to 1 if you have the header file. */ +#define HAVE_STRINGS_H 1 + +/* Define to 1 if you have the header file. */ +#define HAVE_STRING_H 1 + +/* Define to 1 if you have the `strlcpy' function. */ +/* #undef HAVE_STRLCPY */ + +/* Define to 1 if you have the `strncasecmp' function. */ +#define HAVE_STRNCASECMP 1 + +/* Define to 1 if you have the `strnicmp' function. */ +/* #undef HAVE_STRNICMP */ + +/* Define to 1 if you have the `strnlen' function. */ +#define HAVE_STRNLEN 1 + +/* Define to 1 if you have the `strsep' function. */ +#define HAVE_STRSEP 1 + +/* Define to 1 if the system has the type `struct stat'. */ +#define HAVE_STRUCT_STAT 1 + +/* Define to 1 if the system has the type `struct _stati64'. */ +/* #undef HAVE_STRUCT__STATI64 */ + +/* Define to 1 if you have the `sysconf' function. */ +#define HAVE_SYSCONF 1 + +/* Define to 1 if you have the header file. */ +/* #undef HAVE_SYS_ENDIAN_H */ + +/* Define to 1 if you have the header file. */ +#define HAVE_SYS_MMAN_H 1 + +/* Define to 1 if you have the header file. */ +#define HAVE_SYS_PARAM_H 1 + +/* Define to 1 if you have the header file. */ +#define HAVE_SYS_RESOURCE_H 1 + +/* Define to 1 if you have the header file. */ +#define HAVE_SYS_STAT_H 1 + +/* Define to 1 if you have the header file. */ +#define HAVE_SYS_TYPES_H 1 + +/* "Define to 1 if you have the `S_ISREG' intrinsic function." */ +#define HAVE_S_ISREG 1 + +/* Define to 1 if you have some version of the typeof operator. */ +#define HAVE_TYPEOF 1 + +/* Define to 1 if the system has the type `uintmax_t'. */ +#define HAVE_UINTMAX_T 1 + +/* Define to 1 if the system has the type `uintptr_t'. */ +#define HAVE_UINTPTR_T 1 + +/* Define to 1 if you have the header file. */ +#define HAVE_UNISTD_H 1 + +/* Define to 1 if the system has the type `unsigned long long int'. */ +#define HAVE_UNSIGNED_LONG_LONG_INT 1 + +/* define to 1 if your compiler supports the , ## __VA_ARGS__ hack. */ +/* #undef HAVE_VARADIC_MACROS_COMMA_HACK */ + +/* define to 1 if your compiler supports C99 __VA_ARGS__ variadic macros. */ +#define HAVE_VARIADIC_MACROS 1 + +/* Define to 1 if you have some version of the vsnprintf function. */ +#define HAVE_VSNPRINTF 1 + +/* Define to 1 if you have the header file. */ +#define HAVE_WCHAR_H 1 + +/* Define to 1 if you have the `_access' function. */ +/* #undef HAVE__ACCESS */ + +/* "Define to 1 if you have the `_BitScanReverse' intrinsic function." */ +/* #undef HAVE__BITSCANREVERSE */ + +/* "Define to 1 if you have the `_BitScanReverse64' intrinsic function." */ +/* #undef HAVE__BITSCANREVERSE64 */ + +/* Define to 1 if the system has the type `_Bool'. */ +#define HAVE__BOOL 1 + +/* "Define to 1 if you have the `_byteswap_uint64' intrinsic function." */ +/* #undef HAVE__BYTESWAP_UINT64 */ + +/* "Define to 1 if you have the `_byteswap_ulong' intrinsic function." */ +/* #undef HAVE__BYTESWAP_ULONG */ + +/* "Define to 1 if you have the `_byteswap_ushort' intrinsic function." */ +/* #undef HAVE__BYTESWAP_USHORT */ + +/* Define to 1 if you have the `_chsize' function. */ +/* #undef HAVE__CHSIZE */ + +/* Define to 1 if you have the `_chsize_s' function. */ +/* #undef HAVE__CHSIZE_S */ + +/* Define to 1 if you have the `_fileno' function. */ +/* #undef HAVE__FILENO */ + +/* Define to 1 if you have the `_fseeki64' function. */ +/* #undef HAVE__FSEEKI64 */ + +/* Define to 1 if you have the `_fstati64' function. */ +/* #undef HAVE__FSTATI64 */ + +/* Define to 1 if you have the `_fullpath' function. */ +/* #undef HAVE__FULLPATH */ + +/* Define to 1 if you have the `_stati64' function. */ +/* #undef HAVE__STATI64 */ + +/* "Define to 1 if you have the `__builtin_bswap16' intrinsic function." */ +/* #undef HAVE___BUILTIN_BSWAP16 */ + +/* "Define to 1 if you have the `__builtin_bswap32' intrinsic function." */ +/* #undef HAVE___BUILTIN_BSWAP32 */ + +/* "Define to 1 if you have the `__builtin_bswap64' intrinsic function." */ +/* #undef HAVE___BUILTIN_BSWAP64 */ + +/* "Define to 1 if you have the `__builtin_choose_expr' intrinsic function." + */ +#define HAVE___BUILTIN_CHOOSE_EXPR 1 + +/* "Define to 1 if you have the `__builtin_clz' intrinsic function." */ +#define HAVE___BUILTIN_CLZ 1 + +/* "Define to 1 if you have the `__builtin_clzll' intrinsic function." */ +#define HAVE___BUILTIN_CLZLL 1 + +/* "Define to 1 if you have the `__builtin_constant_p' intrinsic function." */ +#define HAVE___BUILTIN_CONSTANT_P 1 + +/* "Define to 1 if you have the `__builtin_expect' intrinsic function." */ +#define HAVE___BUILTIN_EXPECT 1 + +/* "Define to 1 if you have the `__builtin_prefetch' intrinsic function." */ +#define HAVE___BUILTIN_PREFETCH 1 + +/* "Define to 1 if you have the `__builtin_unreachable' intrinsic function." + */ +#define HAVE___BUILTIN_UNREACHABLE 1 + +/* "Define to 1 if you have the `__cpu_to_be16' intrinsic function." */ +/* #undef HAVE___CPU_TO_BE16 */ + +/* "Define to 1 if you have the `__cpu_to_be64' intrinsic function." */ +/* #undef HAVE___CPU_TO_BE64 */ + +/* "Define to 1 if you have the `__cpu_to_le16' intrinsic function." */ +/* #undef HAVE___CPU_TO_LE16 */ + +/* "Define to 1 if you have the `__cpu_to_le32' intrinsic function." */ +/* #undef HAVE___CPU_TO_LE32 */ + +/* "Define to 1 if you have the `__cpu_to_le64' intrinsic function." */ +/* #undef HAVE___CPU_TO_LE64 */ + +/* Define to 1 if compiled with -Wl */ +#define LDFLAGS_WL_AS_NEEDED 1 + +/* Define to 1 if compiled with -Wl */ +#define LDFLAGS_WL_GC_SECTIONS 1 + +/* Define to the address where bug reports for this package should be sent. */ +#define PACKAGE_BUGREPORT "https://bugs.nasm.us/" + +/* Define to the full name of this package. */ +#define PACKAGE_NAME "nasm" + +/* Define to the full name and version of this package. */ +#define PACKAGE_STRING "nasm 3.02" + +/* Define to the one symbol short name of this package. */ +#define PACKAGE_TARNAME "nasm" + +/* Define to the home page for this package. */ +#define PACKAGE_URL "https://www.nasm.us/" + +/* Define to the version of this package. */ +#define PACKAGE_VERSION "3.02" + +/* Define to 1 if all of the C90 standard headers exist (not just the ones + required in a freestanding environment). This macro is provided for + backward compatibility; new code need not use it. */ +#define STDC_HEADERS 1 + +/* Enable extensions on AIX 3, Interix. */ +#ifndef _ALL_SOURCE +# define _ALL_SOURCE 1 +#endif +/* Enable general extensions on macOS. */ +#ifndef _DARWIN_C_SOURCE +# define _DARWIN_C_SOURCE 1 +#endif +/* Enable general extensions on Solaris. */ +#ifndef __EXTENSIONS__ +# define __EXTENSIONS__ 1 +#endif +/* Enable GNU extensions on systems that have them. */ +#ifndef _GNU_SOURCE +# define _GNU_SOURCE 1 +#endif +/* Enable X/Open compliant socket functions that do not require linking + with -lxnet on HP-UX 11.11. */ +#ifndef _HPUX_ALT_XOPEN_SOCKET_API +# define _HPUX_ALT_XOPEN_SOCKET_API 1 +#endif +/* Identify the host operating system as Minix. + This macro does not affect the system headers' behavior. + A future release of Autoconf may stop defining this macro. */ +#ifndef _MINIX +/* # undef _MINIX */ +#endif +/* Enable general extensions on NetBSD. + Enable NetBSD compatibility extensions on Minix. */ +#ifndef _NETBSD_SOURCE +# define _NETBSD_SOURCE 1 +#endif +/* Enable OpenBSD compatibility extensions on NetBSD. + Oddly enough, this does nothing on OpenBSD. */ +#ifndef _OPENBSD_SOURCE +# define _OPENBSD_SOURCE 1 +#endif +/* Define to 1 if needed for POSIX-compatible behavior. */ +#ifndef _POSIX_SOURCE +/* # undef _POSIX_SOURCE */ +#endif +/* Define to 2 if needed for POSIX-compatible behavior. */ +#ifndef _POSIX_1_SOURCE +/* # undef _POSIX_1_SOURCE */ +#endif +/* Enable POSIX-compatible threading on Solaris. */ +#ifndef _POSIX_PTHREAD_SEMANTICS +# define _POSIX_PTHREAD_SEMANTICS 1 +#endif +/* Enable extensions specified by ISO/IEC TS 18661-5:2014. */ +#ifndef __STDC_WANT_IEC_60559_ATTRIBS_EXT__ +# define __STDC_WANT_IEC_60559_ATTRIBS_EXT__ 1 +#endif +/* Enable extensions specified by ISO/IEC TS 18661-1:2014. */ +#ifndef __STDC_WANT_IEC_60559_BFP_EXT__ +# define __STDC_WANT_IEC_60559_BFP_EXT__ 1 +#endif +/* Enable extensions specified by ISO/IEC TS 18661-2:2015. */ +#ifndef __STDC_WANT_IEC_60559_DFP_EXT__ +# define __STDC_WANT_IEC_60559_DFP_EXT__ 1 +#endif +/* Enable extensions specified by ISO/IEC TS 18661-4:2015. */ +#ifndef __STDC_WANT_IEC_60559_FUNCS_EXT__ +# define __STDC_WANT_IEC_60559_FUNCS_EXT__ 1 +#endif +/* Enable extensions specified by ISO/IEC TS 18661-3:2015. */ +#ifndef __STDC_WANT_IEC_60559_TYPES_EXT__ +# define __STDC_WANT_IEC_60559_TYPES_EXT__ 1 +#endif +/* Enable extensions specified by ISO/IEC TR 24731-2:2010. */ +#ifndef __STDC_WANT_LIB_EXT2__ +# define __STDC_WANT_LIB_EXT2__ 1 +#endif +/* Enable extensions specified by ISO/IEC 24747:2009. */ +#ifndef __STDC_WANT_MATH_SPEC_FUNCS__ +# define __STDC_WANT_MATH_SPEC_FUNCS__ 1 +#endif +/* Enable extensions on HP NonStop. */ +#ifndef _TANDEM_SOURCE +# define _TANDEM_SOURCE 1 +#endif +/* Enable X/Open extensions. Define to 500 only if necessary + to make mbstate_t available. */ +#ifndef _XOPEN_SOURCE +/* # undef _XOPEN_SOURCE */ +#endif + + +/* Define to 1 if your processor stores words with the most significant byte + first (like Motorola and SPARC, unlike Intel and VAX). */ +/* #undef WORDS_BIGENDIAN */ + +/* Define to 1 if your processor stores words with the least significant byte + first (like Intel and VAX, unlike Motorola and SPARC). */ +#define WORDS_LITTLEENDIAN 1 + +/* Number of bits in a file offset, on hosts where this is settable. */ +/* #undef _FILE_OFFSET_BITS */ + +/* Define to 1 if compiled with -flto in -flto=auto */ +/* #undef _FLTO_AUTO_FLTO */ + +/* Define to 1 to make fseeko visible on some hosts (e.g. glibc 2.2). */ +/* #undef _LARGEFILE_SOURCE */ + +/* Define for large files, on AIX-style hosts. */ +/* #undef _LARGE_FILES */ + +/* Define if __func__ is called something else on your compiler. */ +/* #undef __func__ */ + +/* Define to empty if `const' does not conform to ANSI C. */ +/* #undef const */ + +/* Define to `__inline__' or `__inline' if that's what the C compiler + calls it, or to nothing if 'inline' is not supported under any name. */ +#ifndef __cplusplus +/* #undef inline */ +#endif + +/* Define to the equivalent of the C99 'restrict' keyword, or to + nothing if this is not supported. Do not define if restrict is + supported only directly. */ +#define restrict __restrict__ +/* Work around a bug in older versions of Sun C++, which did not + #define __restrict__ or support _Restrict or __restrict__ + even though the corresponding Sun C compiler ended up with + "#define restrict _Restrict" or "#define restrict __restrict__" + in the previous line. This workaround can be removed once + we assume Oracle Developer Studio 12.5 (2016) or later. */ +#if defined __SUNPRO_CC && !defined __RESTRICT && !defined __restrict__ +# define _Restrict +# define __restrict__ +#endif + +/* Define to `unsigned int' if does not define. */ +/* #undef size_t */ + +/* Define if your snprintf function is not named snprintf. */ +/* #undef snprintf */ + +/* Define if your typeof operator is not named `typeof'. */ +#define typeof __typeof + +/* Define to the widest unsigned integer type if and + do not define. */ +/* #undef uintmax_t */ + +/* Define to the type of an unsigned integer type wide enough to hold a + pointer, if such a type exists, and if the system does not define it. */ +/* #undef uintptr_t */ + +/* Define if your vsnprintf function is not named vsnprintf. */ +/* #undef vsnprintf */ + + +/* Begin unconfig.h */ + +#ifndef alloc_size_func2 +# ifdef HAVE_FUNC_ATTRIBUTE_2_ALLOC_SIZE +# define alloc_size_func2(x1,x2) ATTRIBUTE(alloc_size(x1,x2)) +# else +# define alloc_size_func2(x1,x2) +# endif +#endif + +#ifndef alloc_size_func2_ptr +# ifdef HAVE_FUNC_PTR_ATTRIBUTE_2_ALLOC_SIZE +# define alloc_size_func2_ptr(x1,x2) ATTRIBUTE(alloc_size(x1,x2)) +# else +# define alloc_size_func2_ptr(x1,x2) +# endif +#endif + +#ifndef end_with_null +# ifdef HAVE_FUNC_ATTRIBUTE_SENTINEL +# define end_with_null ATTRIBUTE(sentinel) +# else +# define end_with_null +# endif +#endif + +#ifndef end_with_null_ptr +# ifdef HAVE_FUNC_PTR_ATTRIBUTE_SENTINEL +# define end_with_null_ptr ATTRIBUTE(sentinel) +# else +# define end_with_null_ptr +# endif +#endif + +#ifndef format_func3 +# ifdef HAVE_FUNC_ATTRIBUTE_3_FORMAT +# define format_func3(x1,x2,x3) ATTRIBUTE(format(x1,x2,x3)) +# else +# define format_func3(x1,x2,x3) +# endif +#endif + +#ifndef format_func3_ptr +# ifdef HAVE_FUNC_PTR_ATTRIBUTE_3_FORMAT +# define format_func3_ptr(x1,x2,x3) ATTRIBUTE(format(x1,x2,x3)) +# else +# define format_func3_ptr(x1,x2,x3) +# endif +#endif + +#ifndef const_func +# ifdef HAVE_FUNC_ATTRIBUTE_CONST +# define const_func ATTRIBUTE(const) +# else +# define const_func +# endif +#endif + +#ifndef const_func_ptr +# ifdef HAVE_FUNC_PTR_ATTRIBUTE_CONST +# define const_func_ptr ATTRIBUTE(const) +# else +# define const_func_ptr +# endif +#endif + +#ifndef unsequenced_func +# ifdef HAVE_FUNC_ATTRIBUTE_UNSEQUENCED +# define unsequenced_func ATTRIBUTE(unsequenced) +# else +# define unsequenced_func +# endif +#endif + +#ifndef unsequenced_func_ptr +# ifdef HAVE_FUNC_PTR_ATTRIBUTE_UNSEQUENCED +# define unsequenced_func_ptr ATTRIBUTE(unsequenced) +# else +# define unsequenced_func_ptr +# endif +#endif + +#ifndef noreturn_func +# ifdef HAVE_FUNC_ATTRIBUTE_NORETURN +# define noreturn_func ATTRIBUTE(noreturn) +# else +# define noreturn_func +# endif +#endif + +#ifndef reproducible_func +# ifdef HAVE_FUNC_ATTRIBUTE_REPRODUCIBLE +# define reproducible_func ATTRIBUTE(reproducible) +# else +# define reproducible_func +# endif +#endif + +#ifndef reproducible_func_ptr +# ifdef HAVE_FUNC_PTR_ATTRIBUTE_REPRODUCIBLE +# define reproducible_func_ptr ATTRIBUTE(reproducible) +# else +# define reproducible_func_ptr +# endif +#endif + +#ifndef pure_func +# ifdef HAVE_FUNC_ATTRIBUTE_PURE +# define pure_func ATTRIBUTE(pure) +# else +# define pure_func +# endif +#endif + +#ifndef pure_func_ptr +# ifdef HAVE_FUNC_PTR_ATTRIBUTE_PURE +# define pure_func_ptr ATTRIBUTE(pure) +# else +# define pure_func_ptr +# endif +#endif + +#ifndef unlikely_func +# ifdef HAVE_FUNC_ATTRIBUTE_COLD +# define unlikely_func ATTRIBUTE(cold) +# else +# define unlikely_func +# endif +#endif + +#ifndef unlikely_func_ptr +# ifdef HAVE_FUNC_PTR_ATTRIBUTE_COLD +# define unlikely_func_ptr ATTRIBUTE(cold) +# else +# define unlikely_func_ptr +# endif +#endif + +#ifndef maybe_unused_func +# ifdef HAVE_FUNC_ATTRIBUTE_MAYBE_UNUSED +# define maybe_unused_func ATTRIBUTE(maybe_unused) +# else +# define maybe_unused_func +# endif +#endif + +#ifndef maybe_unused_func_ptr +# ifdef HAVE_FUNC_PTR_ATTRIBUTE_MAYBE_UNUSED +# define maybe_unused_func_ptr ATTRIBUTE(maybe_unused) +# else +# define maybe_unused_func_ptr +# endif +#endif + +#ifndef unused_func +# ifdef HAVE_FUNC_ATTRIBUTE_UNUSED +# define unused_func ATTRIBUTE(unused) +# else +# define unused_func +# endif +#endif + +#ifndef unused_func_ptr +# ifdef HAVE_FUNC_PTR_ATTRIBUTE_UNUSED +# define unused_func_ptr ATTRIBUTE(unused) +# else +# define unused_func_ptr +# endif +#endif + +#ifndef noreturn_func_ptr +# ifdef HAVE_FUNC_PTR_ATTRIBUTE_NORETURN +# define noreturn_func_ptr ATTRIBUTE(noreturn) +# else +# define noreturn_func_ptr +# endif +#endif + +#ifndef never_null +# ifdef HAVE_FUNC_ATTRIBUTE_RETURNS_NONNULL +# define never_null ATTRIBUTE(returns_nonnull) +# else +# define never_null +# endif +#endif + +#ifndef never_null_ptr +# ifdef HAVE_FUNC_PTR_ATTRIBUTE_RETURNS_NONNULL +# define never_null_ptr ATTRIBUTE(returns_nonnull) +# else +# define never_null_ptr +# endif +#endif + +#ifndef malloc_func +# ifdef HAVE_FUNC_ATTRIBUTE_MALLOC +# define malloc_func ATTRIBUTE(malloc) +# else +# define malloc_func +# endif +#endif + +#ifndef malloc_func_ptr +# ifdef HAVE_FUNC_PTR_ATTRIBUTE_MALLOC +# define malloc_func_ptr ATTRIBUTE(malloc) +# else +# define malloc_func_ptr +# endif +#endif + +#ifndef alloc_size_func1 +# ifdef HAVE_FUNC_ATTRIBUTE_1_ALLOC_SIZE +# define alloc_size_func1(x1) ATTRIBUTE(alloc_size(x1)) +# else +# define alloc_size_func1(x1) +# endif +#endif + +#ifndef alloc_size_func1_ptr +# ifdef HAVE_FUNC_PTR_ATTRIBUTE_1_ALLOC_SIZE +# define alloc_size_func1_ptr(x1) ATTRIBUTE(alloc_size(x1)) +# else +# define alloc_size_func1_ptr(x1) +# endif +#endif diff --git a/include/config/config.h b/include/config/config.h new file mode 100644 index 0000000..91d4e3b --- /dev/null +++ b/include/config/config.h @@ -0,0 +1,1036 @@ +/* config/config.h. Generated from config.h.in by configure. */ +/* config/config.h.in. Generated from configure.ac by autoheader. */ + +/* Define to 1 to call abort() on panics (internal errors), for debugging. */ +/* #undef ABORT_ON_PANIC */ + +/* Define if building universal (internal helper macro) */ +/* #undef AC_APPLE_UNIVERSAL_BUILD */ + +/* Define to 1 if compiled with -fdata-sections in CFLAGS */ +#define CFLAGS_FDATA_SECTIONS 1 + +/* Define to 1 if compiled with -ffunction-sections in CFLAGS */ +#define CFLAGS_FFUNCTION_SECTIONS 1 + +/* Define to 1 if compiled with -fgnu89-inline in CFLAGS */ +/* #undef CFLAGS_FGNU89_INLINE */ + +/* Define to 1 if compiled with -fno-common in CFLAGS */ +#define CFLAGS_FNO_COMMON 1 + +/* Define to 1 if compiled with -fno-omit-frame-pointer in CFLAGS */ +/* #undef CFLAGS_FNO_OMIT_FRAME_POINTER */ + +/* Define to 1 if compiled with -fsanitize=address in CFLAGS */ +/* #undef CFLAGS_FSANITIZE_ADDRESS */ + +/* Define to 1 if compiled with -fsanitize=undefined in CFLAGS */ +/* #undef CFLAGS_FSANITIZE_UNDEFINED */ + +/* Define to 1 if compiled with -ftrivial-auto-var-init=zero in CFLAGS */ +/* #undef CFLAGS_FTRIVIAL_AUTO_VAR_INIT_ZERO */ + +/* Define to 1 if compiled with -fvisibility=hidden in CFLAGS */ +#define CFLAGS_FVISIBILITY_HIDDEN 1 + +/* Define to 1 if compiled with -fwrapv in CFLAGS */ +#define CFLAGS_FWRAPV 1 + +/* Define to 1 if compiled with -g3 in CFLAGS */ +#define CFLAGS_G3 1 + +/* Define to 1 if compiled with -ggdb in CFLAGS */ +#define CFLAGS_GGDB 1 + +/* Define to 1 if compiled with -O0 in CFLAGS */ +/* #undef CFLAGS_O0 */ + +/* Define to 1 if compiled with -Og in CFLAGS */ +/* #undef CFLAGS_OG */ + +/* Define to 1 if compiled with -pedantic in CFLAGS */ +#define CFLAGS_PEDANTIC 1 + +/* Define to 1 if compiled with -pg in CFLAGS */ +/* #undef CFLAGS_PG */ + +/* Define to 1 if compiled with -std=c11 in CFLAGS */ +/* #undef CFLAGS_STD_C11 */ + +/* Define to 1 if compiled with -std=c17 in CFLAGS */ +#define CFLAGS_STD_C17 1 + +/* Define to 1 if compiled with -std=c23 in CFLAGS */ +/* #undef CFLAGS_STD_C23 */ + +/* Define to 1 if compiled with -std=c99 in CFLAGS */ +/* #undef CFLAGS_STD_C99 */ + +/* Define to 1 if compiled with -U__STRICT_ANSI__ in CFLAGS */ +#define CFLAGS_U_STRICT_ANSI_ 1 + +/* Define to 1 if compiled with -W in CFLAGS */ +#define CFLAGS_W 1 + +/* Define to 1 if compiled with -Wall in CFLAGS */ +#define CFLAGS_WALL 1 + +/* Define to 1 if compiled with -Werror in CFLAGS */ +/* #undef CFLAGS_WERROR */ + +/* Define to 1 if compiled with -Werror=comment in CFLAGS */ +#define CFLAGS_WERROR_COMMENT 1 + +/* Define to 1 if compiled with -Werror=implicit in CFLAGS */ +#define CFLAGS_WERROR_IMPLICIT 1 + +/* Define to 1 if compiled with -Werror=missing-braces in CFLAGS */ +#define CFLAGS_WERROR_MISSING_BRACES 1 + +/* Define to 1 if compiled with -Werror=missing-declarations in CFLAGS */ +#define CFLAGS_WERROR_MISSING_DECLARATIONS 1 + +/* Define to 1 if compiled with -Werror=missing-prototypes in CFLAGS */ +#define CFLAGS_WERROR_MISSING_PROTOTYPES 1 + +/* Define to 1 if compiled with -Werror=pointer-arith in CFLAGS */ +#define CFLAGS_WERROR_POINTER_ARITH 1 + +/* Define to 1 if compiled with -Werror=return-type in CFLAGS */ +#define CFLAGS_WERROR_RETURN_TYPE 1 + +/* Define to 1 if compiled with -Werror=strict-prototypes in CFLAGS */ +#define CFLAGS_WERROR_STRICT_PROTOTYPES 1 + +/* Define to 1 if compiled with -Werror=trigraphs in CFLAGS */ +#define CFLAGS_WERROR_TRIGRAPHS 1 + +/* Define to 1 if compiled with -Werror=unknown-warning-option in CFLAGS */ +/* #undef CFLAGS_WERROR_UNKNOWN_WARNING_OPTION */ + +/* Define to 1 if compiled with -Werror=vla in CFLAGS */ +#define CFLAGS_WERROR_VLA 1 + +/* Define to 1 if compiled with -Wno-long-long in CFLAGS */ +#define CFLAGS_WNO_LONG_LONG 1 + +/* Define to 1 if compiled with -Wno-pedantic-ms-format in CFLAGS */ +/* #undef CFLAGS_WNO_PEDANTIC_MS_FORMAT */ + +/* Define to 1 if compiled with -Wno-shift-negative-value in CFLAGS */ +#define CFLAGS_WNO_SHIFT_NEGATIVE_VALUE 1 + +/* Define to 1 if compiled with -Wno-stringop-truncation in CFLAGS */ +#define CFLAGS_WNO_STRINGOP_TRUNCATION 1 + +/* Define to 1 if compiled with -Wno-variadic-macros in CFLAGS */ +#define CFLAGS_WNO_VARIADIC_MACROS 1 + +/* Define to 1 if compiled with -Wsuggest-attribute=cold in CFLAGS */ +/* #undef CFLAGS_WSUGGEST_ATTRIBUTE_COLD */ + +/* Define to 1 if compiled with -Wsuggest-attribute=const in CFLAGS */ +/* #undef CFLAGS_WSUGGEST_ATTRIBUTE_CONST */ + +/* Define to 1 if compiled with -Wsuggest-attribute=format in CFLAGS */ +/* #undef CFLAGS_WSUGGEST_ATTRIBUTE_FORMAT */ + +/* Define to 1 if compiled with -Wsuggest-attribute=malloc in CFLAGS */ +/* #undef CFLAGS_WSUGGEST_ATTRIBUTE_MALLOC */ + +/* Define to 1 if compiled with -Wsuggest-attribute=noreturn in CFLAGS */ +/* #undef CFLAGS_WSUGGEST_ATTRIBUTE_NORETURN */ + +/* Define to 1 if compiled with -Wsuggest-attribute=pure in CFLAGS */ +/* #undef CFLAGS_WSUGGEST_ATTRIBUTE_PURE */ + +/* Define to 1 if compiled with -Werror=attributes in CPPFLAGS */ +#define CPPFLAGS_WERROR_ATTRIBUTES 1 + +/* Define to 1 if you have the `access' function. */ +#define HAVE_ACCESS 1 + +/* Define to 1 if you have the header file. */ +#define HAVE_ARPA_INET_H 1 + +/* "Define to 1 if you have the `bswap_16' intrinsic function." */ +/* #undef HAVE_BSWAP_16 */ + +/* "Define to 1 if you have the `bswap_32' intrinsic function." */ +/* #undef HAVE_BSWAP_32 */ + +/* "Define to 1 if you have the `bswap_64' intrinsic function." */ +/* #undef HAVE_BSWAP_64 */ + +/* Define to 1 if you have the header file. */ +#define HAVE_BYTESWAP_H 1 + +/* Define to 1 if you have the `canonicalize_file_name' function. */ +#define HAVE_CANONICALIZE_FILE_NAME 1 + +/* "Define to 1 if you have the `cpu_to_be16' intrinsic function." */ +/* #undef HAVE_CPU_TO_BE16 */ + +/* "Define to 1 if you have the `cpu_to_be32' intrinsic function." */ +/* #undef HAVE_CPU_TO_BE32 */ + +/* "Define to 1 if you have the `cpu_to_be64' intrinsic function." */ +/* #undef HAVE_CPU_TO_BE64 */ + +/* "Define to 1 if you have the `cpu_to_le16' intrinsic function." */ +/* #undef HAVE_CPU_TO_LE16 */ + +/* "Define to 1 if you have the `cpu_to_le32' intrinsic function." */ +/* #undef HAVE_CPU_TO_LE32 */ + +/* "Define to 1 if you have the `cpu_to_le64' intrinsic function." */ +/* #undef HAVE_CPU_TO_LE64 */ + +/* Define to 1 if you have the declaration of `strcasecmp', and to 0 if you + don't. */ +#define HAVE_DECL_STRCASECMP 1 + +/* Define to 1 if you have the declaration of `stricmp', and to 0 if you + don't. */ +#define HAVE_DECL_STRICMP 0 + +/* Define to 1 if you have the declaration of `strlcpy', and to 0 if you + don't. */ +#define HAVE_DECL_STRLCPY 0 + +/* Define to 1 if you have the declaration of `strncasecmp', and to 0 if you + don't. */ +#define HAVE_DECL_STRNCASECMP 1 + +/* Define to 1 if you have the declaration of `strnicmp', and to 0 if you + don't. */ +#define HAVE_DECL_STRNICMP 0 + +/* Define to 1 if you have the declaration of `strnlen', and to 0 if you + don't. */ +#define HAVE_DECL_STRNLEN 1 + +/* Define to 1 if you have the declaration of `strsep', and to 0 if you don't. + */ +#define HAVE_DECL_STRSEP 1 + +/* Define to 1 if you have the header file. */ +#define HAVE_ENDIAN_H 1 + +/* Define to 1 if you have the `faccessat' function. */ +#define HAVE_FACCESSAT 1 + +/* Define to 1 if you have the header file. */ +#define HAVE_FCNTL_H 1 + +/* Define to 1 if you have the `fileno' function. */ +#define HAVE_FILENO 1 + +/* Define to 1 if fseeko (and presumably ftello) exists and is declared. */ +#define HAVE_FSEEKO 1 + +/* Define to 1 if you have the `fstat' function. */ +#define HAVE_FSTAT 1 + +/* Define to 1 if you have the `ftruncate' function. */ +#define HAVE_FTRUNCATE 1 + +/* Define to 1 if your compiler supports the alloc_size function attribute */ +#define HAVE_FUNC_ATTRIBUTE_1_ALLOC_SIZE 1 + +/* Define to 1 if your compiler supports the alloc_size function attribute */ +#define HAVE_FUNC_ATTRIBUTE_2_ALLOC_SIZE 1 + +/* Define to 1 if your compiler supports the format function attribute */ +#define HAVE_FUNC_ATTRIBUTE_3_FORMAT 1 + +/* Define to 1 if your compiler supports the cold function attribute */ +#define HAVE_FUNC_ATTRIBUTE_COLD 1 + +/* Define to 1 if your compiler supports the const function attribute */ +#define HAVE_FUNC_ATTRIBUTE_CONST 1 + +/* Define to 1 if your compiler supports the error attribute on functions */ +#define HAVE_FUNC_ATTRIBUTE_ERROR 1 + +/* Define to 1 if your compiler supports the malloc function attribute */ +#define HAVE_FUNC_ATTRIBUTE_MALLOC 1 + +/* Define to 1 if your compiler supports the maybe_unused function attribute + */ +/* #undef HAVE_FUNC_ATTRIBUTE_MAYBE_UNUSED */ + +/* Define to 1 if your compiler supports the noreturn function attribute */ +#define HAVE_FUNC_ATTRIBUTE_NORETURN 1 + +/* Define to 1 if your compiler supports the pure function attribute */ +#define HAVE_FUNC_ATTRIBUTE_PURE 1 + +/* Define to 1 if your compiler supports the reproducible function attribute + */ +/* #undef HAVE_FUNC_ATTRIBUTE_REPRODUCIBLE */ + +/* Define to 1 if your compiler supports the returns_nonnull function + attribute */ +#define HAVE_FUNC_ATTRIBUTE_RETURNS_NONNULL 1 + +/* Define to 1 if your compiler supports the sentinel function attribute */ +#define HAVE_FUNC_ATTRIBUTE_SENTINEL 1 + +/* Define to 1 if your compiler supports the unsequenced function attribute */ +/* #undef HAVE_FUNC_ATTRIBUTE_UNSEQUENCED */ + +/* Define to 1 if your compiler supports the unused function attribute */ +#define HAVE_FUNC_ATTRIBUTE_UNUSED 1 + +/* Define to 1 if the compiler supports __func__ or equivalent. */ +#define HAVE_FUNC_NAME 1 + +/* Define to 1 if your compiler supports the alloc_size attribute on function + pointers */ +#define HAVE_FUNC_PTR_ATTRIBUTE_1_ALLOC_SIZE 1 + +/* Define to 1 if your compiler supports the alloc_size attribute on function + pointers */ +#define HAVE_FUNC_PTR_ATTRIBUTE_2_ALLOC_SIZE 1 + +/* Define to 1 if your compiler supports the format attribute on function + pointers */ +#define HAVE_FUNC_PTR_ATTRIBUTE_3_FORMAT 1 + +/* Define to 1 if your compiler supports the cold attribute on function + pointers */ +/* #undef HAVE_FUNC_PTR_ATTRIBUTE_COLD */ + +/* Define to 1 if your compiler supports the const attribute on function + pointers */ +#define HAVE_FUNC_PTR_ATTRIBUTE_CONST 1 + +/* Define to 1 if your compiler supports the malloc attribute on function + pointers */ +/* #undef HAVE_FUNC_PTR_ATTRIBUTE_MALLOC */ + +/* Define to 1 if your compiler supports the maybe_unused attribute on + function pointers */ +/* #undef HAVE_FUNC_PTR_ATTRIBUTE_MAYBE_UNUSED */ + +/* Define to 1 if your compiler supports the noreturn attribute on function + pointers */ +#define HAVE_FUNC_PTR_ATTRIBUTE_NORETURN 1 + +/* Define to 1 if your compiler supports the pure attribute on function + pointers */ +/* #undef HAVE_FUNC_PTR_ATTRIBUTE_PURE */ + +/* Define to 1 if your compiler supports the reproducible attribute on + function pointers */ +/* #undef HAVE_FUNC_PTR_ATTRIBUTE_REPRODUCIBLE */ + +/* Define to 1 if your compiler supports the returns_nonnull attribute on + function pointers */ +#define HAVE_FUNC_PTR_ATTRIBUTE_RETURNS_NONNULL 1 + +/* Define to 1 if your compiler supports the sentinel attribute on function + pointers */ +#define HAVE_FUNC_PTR_ATTRIBUTE_SENTINEL 1 + +/* Define to 1 if your compiler supports the unsequenced attribute on function + pointers */ +/* #undef HAVE_FUNC_PTR_ATTRIBUTE_UNSEQUENCED */ + +/* Define to 1 if your compiler supports the unused attribute on function + pointers */ +#define HAVE_FUNC_PTR_ATTRIBUTE_UNUSED 1 + +/* Define to 1 if you have the `getgid' function. */ +#define HAVE_GETGID 1 + +/* Define to 1 if you have the `getpagesize' function. */ +#define HAVE_GETPAGESIZE 1 + +/* Define to 1 if you have the `getrlimit' function. */ +#define HAVE_GETRLIMIT 1 + +/* Define to 1 if you have the `getuid' function. */ +#define HAVE_GETUID 1 + +/* "Define to 1 if you have the `htobe16' intrinsic function." */ +#define HAVE_HTOBE16 1 + +/* "Define to 1 if you have the `htobe32' intrinsic function." */ +#define HAVE_HTOBE32 1 + +/* "Define to 1 if you have the `htobe64' intrinsic function." */ +#define HAVE_HTOBE64 1 + +/* "Define to 1 if you have the `htole16' intrinsic function." */ +#define HAVE_HTOLE16 1 + +/* "Define to 1 if you have the `htole32' intrinsic function." */ +#define HAVE_HTOLE32 1 + +/* "Define to 1 if you have the `htole64' intrinsic function." */ +#define HAVE_HTOLE64 1 + +/* "Define to 1 if you have the `htonl' intrinsic function." */ +/* #undef HAVE_HTONL */ + +/* "Define to 1 if you have the `htonq' intrinsic function." */ +/* #undef HAVE_HTONQ */ + +/* "Define to 1 if you have the `htons' intrinsic function." */ +/* #undef HAVE_HTONS */ + +/* Define to 1 if you have the header file. */ +/* #undef HAVE_INTRIN_H */ + +/* Define to 1 if you have the header file. */ +#define HAVE_INTTYPES_H 1 + +/* Define to 1 if you have the header file. */ +/* #undef HAVE_IO_H */ + +/* Define to 1 if you have the `isascii' function. */ +#define HAVE_ISASCII 1 + +/* Define to 1 if you have the `iscntrl' function. */ +#define HAVE_ISCNTRL 1 + +/* Define to 1 if you have the header file. */ +/* #undef HAVE_MACHINE_ENDIAN_H */ + +/* Define to 1 if you have the `mempcpy' function. */ +#define HAVE_MEMPCPY 1 + +/* Define to 1 if you have the `mempset' function. */ +/* #undef HAVE_MEMPSET */ + +/* Define to 1 if you have the header file. */ +/* #undef HAVE_MINIX_CONFIG_H */ + +/* Define to 1 if you have a working `mmap' system call. */ +#define HAVE_MMAP 1 + +/* Define to 1 if you have the `pathconf' function. */ +#define HAVE_PATHCONF 1 + +/* Define to 1 if you have the `realpath' function. */ +#define HAVE_REALPATH 1 + +/* Define to 1 if you have some version of the snprintf function. */ +#define HAVE_SNPRINTF 1 + +/* Define to 1 if you have the `stat' function. */ +#define HAVE_STAT 1 + +/* Define to 1 if you have the header file. */ +#define HAVE_STDARG_H 1 + +/* Define to 1 if you have the header file. */ +/* #undef HAVE_STDBIT_H */ + +/* Define to 1 if stdbool.h conforms to C99. */ +#define HAVE_STDBOOL_H 1 + +/* Define to 1 if your compiler supports C99 extern inline */ +#define HAVE_STDC_INLINE 1 + +/* "Define to 1 if you have the `stdc_leading_zeros' intrinsic function." */ +/* #undef HAVE_STDC_LEADING_ZEROS */ + +/* Define to 1 if you have the header file. */ +#define HAVE_STDINT_H 1 + +/* Define to 1 if you have the header file. */ +#define HAVE_STDIO_H 1 + +/* Define to 1 if you have the header file. */ +#define HAVE_STDLIB_H 1 + +/* Define to 1 if you have the header file. */ +#define HAVE_STDNORETURN_H 1 + +/* Define to 1 if you have the `strcasecmp' function. */ +#define HAVE_STRCASECMP 1 + +/* Define to 1 if you have the `stricmp' function. */ +/* #undef HAVE_STRICMP */ + +/* Define to 1 if you have the header file. */ +#define HAVE_STRINGS_H 1 + +/* Define to 1 if you have the header file. */ +#define HAVE_STRING_H 1 + +/* Define to 1 if you have the `strlcpy' function. */ +/* #undef HAVE_STRLCPY */ + +/* Define to 1 if you have the `strncasecmp' function. */ +#define HAVE_STRNCASECMP 1 + +/* Define to 1 if you have the `strnicmp' function. */ +/* #undef HAVE_STRNICMP */ + +/* Define to 1 if you have the `strnlen' function. */ +#define HAVE_STRNLEN 1 + +/* Define to 1 if you have the `strsep' function. */ +#define HAVE_STRSEP 1 + +/* Define to 1 if the system has the type `struct stat'. */ +#define HAVE_STRUCT_STAT 1 + +/* Define to 1 if the system has the type `struct _stati64'. */ +/* #undef HAVE_STRUCT__STATI64 */ + +/* Define to 1 if you have the `sysconf' function. */ +#define HAVE_SYSCONF 1 + +/* Define to 1 if you have the header file. */ +/* #undef HAVE_SYS_ENDIAN_H */ + +/* Define to 1 if you have the header file. */ +#define HAVE_SYS_MMAN_H 1 + +/* Define to 1 if you have the header file. */ +#define HAVE_SYS_PARAM_H 1 + +/* Define to 1 if you have the header file. */ +#define HAVE_SYS_RESOURCE_H 1 + +/* Define to 1 if you have the header file. */ +#define HAVE_SYS_STAT_H 1 + +/* Define to 1 if you have the header file. */ +#define HAVE_SYS_TYPES_H 1 + +/* "Define to 1 if you have the `S_ISREG' intrinsic function." */ +#define HAVE_S_ISREG 1 + +/* Define to 1 if you have some version of the typeof operator. */ +#define HAVE_TYPEOF 1 + +/* Define to 1 if the system has the type `uintmax_t'. */ +#define HAVE_UINTMAX_T 1 + +/* Define to 1 if the system has the type `uintptr_t'. */ +#define HAVE_UINTPTR_T 1 + +/* Define to 1 if you have the header file. */ +#define HAVE_UNISTD_H 1 + +/* Define to 1 if the system has the type `unsigned long long int'. */ +#define HAVE_UNSIGNED_LONG_LONG_INT 1 + +/* define to 1 if your compiler supports the , ## __VA_ARGS__ hack. */ +/* #undef HAVE_VARADIC_MACROS_COMMA_HACK */ + +/* define to 1 if your compiler supports C99 __VA_ARGS__ variadic macros. */ +#define HAVE_VARIADIC_MACROS 1 + +/* Define to 1 if you have some version of the vsnprintf function. */ +#define HAVE_VSNPRINTF 1 + +/* Define to 1 if you have the header file. */ +#define HAVE_WCHAR_H 1 + +/* Define to 1 if you have the `_access' function. */ +/* #undef HAVE__ACCESS */ + +/* "Define to 1 if you have the `_BitScanReverse' intrinsic function." */ +/* #undef HAVE__BITSCANREVERSE */ + +/* "Define to 1 if you have the `_BitScanReverse64' intrinsic function." */ +/* #undef HAVE__BITSCANREVERSE64 */ + +/* Define to 1 if the system has the type `_Bool'. */ +#define HAVE__BOOL 1 + +/* "Define to 1 if you have the `_byteswap_uint64' intrinsic function." */ +/* #undef HAVE__BYTESWAP_UINT64 */ + +/* "Define to 1 if you have the `_byteswap_ulong' intrinsic function." */ +/* #undef HAVE__BYTESWAP_ULONG */ + +/* "Define to 1 if you have the `_byteswap_ushort' intrinsic function." */ +/* #undef HAVE__BYTESWAP_USHORT */ + +/* Define to 1 if you have the `_chsize' function. */ +/* #undef HAVE__CHSIZE */ + +/* Define to 1 if you have the `_chsize_s' function. */ +/* #undef HAVE__CHSIZE_S */ + +/* Define to 1 if you have the `_fileno' function. */ +/* #undef HAVE__FILENO */ + +/* Define to 1 if you have the `_fseeki64' function. */ +/* #undef HAVE__FSEEKI64 */ + +/* Define to 1 if you have the `_fstati64' function. */ +/* #undef HAVE__FSTATI64 */ + +/* Define to 1 if you have the `_fullpath' function. */ +/* #undef HAVE__FULLPATH */ + +/* Define to 1 if you have the `_stati64' function. */ +/* #undef HAVE__STATI64 */ + +/* "Define to 1 if you have the `__builtin_bswap16' intrinsic function." */ +/* #undef HAVE___BUILTIN_BSWAP16 */ + +/* "Define to 1 if you have the `__builtin_bswap32' intrinsic function." */ +/* #undef HAVE___BUILTIN_BSWAP32 */ + +/* "Define to 1 if you have the `__builtin_bswap64' intrinsic function." */ +/* #undef HAVE___BUILTIN_BSWAP64 */ + +/* "Define to 1 if you have the `__builtin_choose_expr' intrinsic function." + */ +#define HAVE___BUILTIN_CHOOSE_EXPR 1 + +/* "Define to 1 if you have the `__builtin_clz' intrinsic function." */ +#define HAVE___BUILTIN_CLZ 1 + +/* "Define to 1 if you have the `__builtin_clzll' intrinsic function." */ +#define HAVE___BUILTIN_CLZLL 1 + +/* "Define to 1 if you have the `__builtin_constant_p' intrinsic function." */ +#define HAVE___BUILTIN_CONSTANT_P 1 + +/* "Define to 1 if you have the `__builtin_expect' intrinsic function." */ +#define HAVE___BUILTIN_EXPECT 1 + +/* "Define to 1 if you have the `__builtin_prefetch' intrinsic function." */ +#define HAVE___BUILTIN_PREFETCH 1 + +/* "Define to 1 if you have the `__builtin_unreachable' intrinsic function." + */ +#define HAVE___BUILTIN_UNREACHABLE 1 + +/* "Define to 1 if you have the `__cpu_to_be16' intrinsic function." */ +/* #undef HAVE___CPU_TO_BE16 */ + +/* "Define to 1 if you have the `__cpu_to_be64' intrinsic function." */ +/* #undef HAVE___CPU_TO_BE64 */ + +/* "Define to 1 if you have the `__cpu_to_le16' intrinsic function." */ +/* #undef HAVE___CPU_TO_LE16 */ + +/* "Define to 1 if you have the `__cpu_to_le32' intrinsic function." */ +/* #undef HAVE___CPU_TO_LE32 */ + +/* "Define to 1 if you have the `__cpu_to_le64' intrinsic function." */ +/* #undef HAVE___CPU_TO_LE64 */ + +/* Define to 1 if compiled with -Wl */ +#define LDFLAGS_WL_AS_NEEDED 1 + +/* Define to 1 if compiled with -Wl */ +#define LDFLAGS_WL_GC_SECTIONS 1 + +/* Define to the address where bug reports for this package should be sent. */ +#define PACKAGE_BUGREPORT "https://bugs.nasm.us/" + +/* Define to the full name of this package. */ +#define PACKAGE_NAME "nasm" + +/* Define to the full name and version of this package. */ +#define PACKAGE_STRING "nasm 3.02" + +/* Define to the one symbol short name of this package. */ +#define PACKAGE_TARNAME "nasm" + +/* Define to the home page for this package. */ +#define PACKAGE_URL "https://www.nasm.us/" + +/* Define to the version of this package. */ +#define PACKAGE_VERSION "3.02" + +/* Define to 1 if all of the C90 standard headers exist (not just the ones + required in a freestanding environment). This macro is provided for + backward compatibility; new code need not use it. */ +#define STDC_HEADERS 1 + +/* Enable extensions on AIX 3, Interix. */ +#ifndef _ALL_SOURCE +# define _ALL_SOURCE 1 +#endif +/* Enable general extensions on macOS. */ +#ifndef _DARWIN_C_SOURCE +# define _DARWIN_C_SOURCE 1 +#endif +/* Enable general extensions on Solaris. */ +#ifndef __EXTENSIONS__ +# define __EXTENSIONS__ 1 +#endif +/* Enable GNU extensions on systems that have them. */ +#ifndef _GNU_SOURCE +# define _GNU_SOURCE 1 +#endif +/* Enable X/Open compliant socket functions that do not require linking + with -lxnet on HP-UX 11.11. */ +#ifndef _HPUX_ALT_XOPEN_SOCKET_API +# define _HPUX_ALT_XOPEN_SOCKET_API 1 +#endif +/* Identify the host operating system as Minix. + This macro does not affect the system headers' behavior. + A future release of Autoconf may stop defining this macro. */ +#ifndef _MINIX +/* # undef _MINIX */ +#endif +/* Enable general extensions on NetBSD. + Enable NetBSD compatibility extensions on Minix. */ +#ifndef _NETBSD_SOURCE +# define _NETBSD_SOURCE 1 +#endif +/* Enable OpenBSD compatibility extensions on NetBSD. + Oddly enough, this does nothing on OpenBSD. */ +#ifndef _OPENBSD_SOURCE +# define _OPENBSD_SOURCE 1 +#endif +/* Define to 1 if needed for POSIX-compatible behavior. */ +#ifndef _POSIX_SOURCE +/* # undef _POSIX_SOURCE */ +#endif +/* Define to 2 if needed for POSIX-compatible behavior. */ +#ifndef _POSIX_1_SOURCE +/* # undef _POSIX_1_SOURCE */ +#endif +/* Enable POSIX-compatible threading on Solaris. */ +#ifndef _POSIX_PTHREAD_SEMANTICS +# define _POSIX_PTHREAD_SEMANTICS 1 +#endif +/* Enable extensions specified by ISO/IEC TS 18661-5:2014. */ +#ifndef __STDC_WANT_IEC_60559_ATTRIBS_EXT__ +# define __STDC_WANT_IEC_60559_ATTRIBS_EXT__ 1 +#endif +/* Enable extensions specified by ISO/IEC TS 18661-1:2014. */ +#ifndef __STDC_WANT_IEC_60559_BFP_EXT__ +# define __STDC_WANT_IEC_60559_BFP_EXT__ 1 +#endif +/* Enable extensions specified by ISO/IEC TS 18661-2:2015. */ +#ifndef __STDC_WANT_IEC_60559_DFP_EXT__ +# define __STDC_WANT_IEC_60559_DFP_EXT__ 1 +#endif +/* Enable extensions specified by ISO/IEC TS 18661-4:2015. */ +#ifndef __STDC_WANT_IEC_60559_FUNCS_EXT__ +# define __STDC_WANT_IEC_60559_FUNCS_EXT__ 1 +#endif +/* Enable extensions specified by ISO/IEC TS 18661-3:2015. */ +#ifndef __STDC_WANT_IEC_60559_TYPES_EXT__ +# define __STDC_WANT_IEC_60559_TYPES_EXT__ 1 +#endif +/* Enable extensions specified by ISO/IEC TR 24731-2:2010. */ +#ifndef __STDC_WANT_LIB_EXT2__ +# define __STDC_WANT_LIB_EXT2__ 1 +#endif +/* Enable extensions specified by ISO/IEC 24747:2009. */ +#ifndef __STDC_WANT_MATH_SPEC_FUNCS__ +# define __STDC_WANT_MATH_SPEC_FUNCS__ 1 +#endif +/* Enable extensions on HP NonStop. */ +#ifndef _TANDEM_SOURCE +# define _TANDEM_SOURCE 1 +#endif +/* Enable X/Open extensions. Define to 500 only if necessary + to make mbstate_t available. */ +#ifndef _XOPEN_SOURCE +/* # undef _XOPEN_SOURCE */ +#endif + + +/* Define to 1 if your processor stores words with the most significant byte + first (like Motorola and SPARC, unlike Intel and VAX). */ +/* #undef WORDS_BIGENDIAN */ + +/* Define to 1 if your processor stores words with the least significant byte + first (like Intel and VAX, unlike Motorola and SPARC). */ +#define WORDS_LITTLEENDIAN 1 + +/* Number of bits in a file offset, on hosts where this is settable. */ +/* #undef _FILE_OFFSET_BITS */ + +/* Define to 1 if compiled with -flto in -flto=auto */ +/* #undef _FLTO_AUTO_FLTO */ + +/* Define to 1 to make fseeko visible on some hosts (e.g. glibc 2.2). */ +/* #undef _LARGEFILE_SOURCE */ + +/* Define for large files, on AIX-style hosts. */ +/* #undef _LARGE_FILES */ + +/* Define if __func__ is called something else on your compiler. */ +/* #undef __func__ */ + +/* Define to empty if `const' does not conform to ANSI C. */ +/* #undef const */ + +/* Define to `__inline__' or `__inline' if that's what the C compiler + calls it, or to nothing if 'inline' is not supported under any name. */ +#ifndef __cplusplus +/* #undef inline */ +#endif + +/* Define to the equivalent of the C99 'restrict' keyword, or to + nothing if this is not supported. Do not define if restrict is + supported only directly. */ +#define restrict __restrict__ +/* Work around a bug in older versions of Sun C++, which did not + #define __restrict__ or support _Restrict or __restrict__ + even though the corresponding Sun C compiler ended up with + "#define restrict _Restrict" or "#define restrict __restrict__" + in the previous line. This workaround can be removed once + we assume Oracle Developer Studio 12.5 (2016) or later. */ +#if defined __SUNPRO_CC && !defined __RESTRICT && !defined __restrict__ +# define _Restrict +# define __restrict__ +#endif + +/* Define to `unsigned int' if does not define. */ +/* #undef size_t */ + +/* Define if your snprintf function is not named snprintf. */ +/* #undef snprintf */ + +/* Define if your typeof operator is not named `typeof'. */ +#define typeof __typeof + +/* Define to the widest unsigned integer type if and + do not define. */ +/* #undef uintmax_t */ + +/* Define to the type of an unsigned integer type wide enough to hold a + pointer, if such a type exists, and if the system does not define it. */ +/* #undef uintptr_t */ + +/* Define if your vsnprintf function is not named vsnprintf. */ +/* #undef vsnprintf */ + + +/* Begin unconfig.h */ + +#ifndef alloc_size_func2 +# ifdef HAVE_FUNC_ATTRIBUTE_2_ALLOC_SIZE +# define alloc_size_func2(x1,x2) ATTRIBUTE(alloc_size(x1,x2)) +# else +# define alloc_size_func2(x1,x2) +# endif +#endif + +#ifndef alloc_size_func2_ptr +# ifdef HAVE_FUNC_PTR_ATTRIBUTE_2_ALLOC_SIZE +# define alloc_size_func2_ptr(x1,x2) ATTRIBUTE(alloc_size(x1,x2)) +# else +# define alloc_size_func2_ptr(x1,x2) +# endif +#endif + +#ifndef end_with_null +# ifdef HAVE_FUNC_ATTRIBUTE_SENTINEL +# define end_with_null ATTRIBUTE(sentinel) +# else +# define end_with_null +# endif +#endif + +#ifndef end_with_null_ptr +# ifdef HAVE_FUNC_PTR_ATTRIBUTE_SENTINEL +# define end_with_null_ptr ATTRIBUTE(sentinel) +# else +# define end_with_null_ptr +# endif +#endif + +#ifndef format_func3 +# ifdef HAVE_FUNC_ATTRIBUTE_3_FORMAT +# define format_func3(x1,x2,x3) ATTRIBUTE(format(x1,x2,x3)) +# else +# define format_func3(x1,x2,x3) +# endif +#endif + +#ifndef format_func3_ptr +# ifdef HAVE_FUNC_PTR_ATTRIBUTE_3_FORMAT +# define format_func3_ptr(x1,x2,x3) ATTRIBUTE(format(x1,x2,x3)) +# else +# define format_func3_ptr(x1,x2,x3) +# endif +#endif + +#ifndef const_func +# ifdef HAVE_FUNC_ATTRIBUTE_CONST +# define const_func ATTRIBUTE(const) +# else +# define const_func +# endif +#endif + +#ifndef const_func_ptr +# ifdef HAVE_FUNC_PTR_ATTRIBUTE_CONST +# define const_func_ptr ATTRIBUTE(const) +# else +# define const_func_ptr +# endif +#endif + +#ifndef unsequenced_func +# ifdef HAVE_FUNC_ATTRIBUTE_UNSEQUENCED +# define unsequenced_func ATTRIBUTE(unsequenced) +# else +# define unsequenced_func +# endif +#endif + +#ifndef unsequenced_func_ptr +# ifdef HAVE_FUNC_PTR_ATTRIBUTE_UNSEQUENCED +# define unsequenced_func_ptr ATTRIBUTE(unsequenced) +# else +# define unsequenced_func_ptr +# endif +#endif + +#ifndef noreturn_func +# ifdef HAVE_FUNC_ATTRIBUTE_NORETURN +# define noreturn_func ATTRIBUTE(noreturn) +# else +# define noreturn_func +# endif +#endif + +#ifndef reproducible_func +# ifdef HAVE_FUNC_ATTRIBUTE_REPRODUCIBLE +# define reproducible_func ATTRIBUTE(reproducible) +# else +# define reproducible_func +# endif +#endif + +#ifndef reproducible_func_ptr +# ifdef HAVE_FUNC_PTR_ATTRIBUTE_REPRODUCIBLE +# define reproducible_func_ptr ATTRIBUTE(reproducible) +# else +# define reproducible_func_ptr +# endif +#endif + +#ifndef pure_func +# ifdef HAVE_FUNC_ATTRIBUTE_PURE +# define pure_func ATTRIBUTE(pure) +# else +# define pure_func +# endif +#endif + +#ifndef pure_func_ptr +# ifdef HAVE_FUNC_PTR_ATTRIBUTE_PURE +# define pure_func_ptr ATTRIBUTE(pure) +# else +# define pure_func_ptr +# endif +#endif + +#ifndef unlikely_func +# ifdef HAVE_FUNC_ATTRIBUTE_COLD +# define unlikely_func ATTRIBUTE(cold) +# else +# define unlikely_func +# endif +#endif + +#ifndef unlikely_func_ptr +# ifdef HAVE_FUNC_PTR_ATTRIBUTE_COLD +# define unlikely_func_ptr ATTRIBUTE(cold) +# else +# define unlikely_func_ptr +# endif +#endif + +#ifndef maybe_unused_func +# ifdef HAVE_FUNC_ATTRIBUTE_MAYBE_UNUSED +# define maybe_unused_func ATTRIBUTE(maybe_unused) +# else +# define maybe_unused_func +# endif +#endif + +#ifndef maybe_unused_func_ptr +# ifdef HAVE_FUNC_PTR_ATTRIBUTE_MAYBE_UNUSED +# define maybe_unused_func_ptr ATTRIBUTE(maybe_unused) +# else +# define maybe_unused_func_ptr +# endif +#endif + +#ifndef unused_func +# ifdef HAVE_FUNC_ATTRIBUTE_UNUSED +# define unused_func ATTRIBUTE(unused) +# else +# define unused_func +# endif +#endif + +#ifndef unused_func_ptr +# ifdef HAVE_FUNC_PTR_ATTRIBUTE_UNUSED +# define unused_func_ptr ATTRIBUTE(unused) +# else +# define unused_func_ptr +# endif +#endif + +#ifndef noreturn_func_ptr +# ifdef HAVE_FUNC_PTR_ATTRIBUTE_NORETURN +# define noreturn_func_ptr ATTRIBUTE(noreturn) +# else +# define noreturn_func_ptr +# endif +#endif + +#ifndef never_null +# ifdef HAVE_FUNC_ATTRIBUTE_RETURNS_NONNULL +# define never_null ATTRIBUTE(returns_nonnull) +# else +# define never_null +# endif +#endif + +#ifndef never_null_ptr +# ifdef HAVE_FUNC_PTR_ATTRIBUTE_RETURNS_NONNULL +# define never_null_ptr ATTRIBUTE(returns_nonnull) +# else +# define never_null_ptr +# endif +#endif + +#ifndef malloc_func +# ifdef HAVE_FUNC_ATTRIBUTE_MALLOC +# define malloc_func ATTRIBUTE(malloc) +# else +# define malloc_func +# endif +#endif + +#ifndef malloc_func_ptr +# ifdef HAVE_FUNC_PTR_ATTRIBUTE_MALLOC +# define malloc_func_ptr ATTRIBUTE(malloc) +# else +# define malloc_func_ptr +# endif +#endif + +#ifndef alloc_size_func1 +# ifdef HAVE_FUNC_ATTRIBUTE_1_ALLOC_SIZE +# define alloc_size_func1(x1) ATTRIBUTE(alloc_size(x1)) +# else +# define alloc_size_func1(x1) +# endif +#endif + +#ifndef alloc_size_func1_ptr +# ifdef HAVE_FUNC_PTR_ATTRIBUTE_1_ALLOC_SIZE +# define alloc_size_func1_ptr(x1) ATTRIBUTE(alloc_size(x1)) +# else +# define alloc_size_func1_ptr(x1) +# endif +#endif diff --git a/include/config/config.h.in b/include/config/config.h.in new file mode 100644 index 0000000..721cfda --- /dev/null +++ b/include/config/config.h.in @@ -0,0 +1,1035 @@ +/* config/config.h.in. Generated from configure.ac by autoheader. */ + +/* Define to 1 to call abort() on panics (internal errors), for debugging. */ +#undef ABORT_ON_PANIC + +/* Define if building universal (internal helper macro) */ +#undef AC_APPLE_UNIVERSAL_BUILD + +/* Define to 1 if compiled with -fdata-sections in CFLAGS */ +#undef CFLAGS_FDATA_SECTIONS + +/* Define to 1 if compiled with -ffunction-sections in CFLAGS */ +#undef CFLAGS_FFUNCTION_SECTIONS + +/* Define to 1 if compiled with -fgnu89-inline in CFLAGS */ +#undef CFLAGS_FGNU89_INLINE + +/* Define to 1 if compiled with -fno-common in CFLAGS */ +#undef CFLAGS_FNO_COMMON + +/* Define to 1 if compiled with -fno-omit-frame-pointer in CFLAGS */ +#undef CFLAGS_FNO_OMIT_FRAME_POINTER + +/* Define to 1 if compiled with -fsanitize=address in CFLAGS */ +#undef CFLAGS_FSANITIZE_ADDRESS + +/* Define to 1 if compiled with -fsanitize=undefined in CFLAGS */ +#undef CFLAGS_FSANITIZE_UNDEFINED + +/* Define to 1 if compiled with -ftrivial-auto-var-init=zero in CFLAGS */ +#undef CFLAGS_FTRIVIAL_AUTO_VAR_INIT_ZERO + +/* Define to 1 if compiled with -fvisibility=hidden in CFLAGS */ +#undef CFLAGS_FVISIBILITY_HIDDEN + +/* Define to 1 if compiled with -fwrapv in CFLAGS */ +#undef CFLAGS_FWRAPV + +/* Define to 1 if compiled with -g3 in CFLAGS */ +#undef CFLAGS_G3 + +/* Define to 1 if compiled with -ggdb in CFLAGS */ +#undef CFLAGS_GGDB + +/* Define to 1 if compiled with -O0 in CFLAGS */ +#undef CFLAGS_O0 + +/* Define to 1 if compiled with -Og in CFLAGS */ +#undef CFLAGS_OG + +/* Define to 1 if compiled with -pedantic in CFLAGS */ +#undef CFLAGS_PEDANTIC + +/* Define to 1 if compiled with -pg in CFLAGS */ +#undef CFLAGS_PG + +/* Define to 1 if compiled with -std=c11 in CFLAGS */ +#undef CFLAGS_STD_C11 + +/* Define to 1 if compiled with -std=c17 in CFLAGS */ +#undef CFLAGS_STD_C17 + +/* Define to 1 if compiled with -std=c23 in CFLAGS */ +#undef CFLAGS_STD_C23 + +/* Define to 1 if compiled with -std=c99 in CFLAGS */ +#undef CFLAGS_STD_C99 + +/* Define to 1 if compiled with -U__STRICT_ANSI__ in CFLAGS */ +#undef CFLAGS_U_STRICT_ANSI_ + +/* Define to 1 if compiled with -W in CFLAGS */ +#undef CFLAGS_W + +/* Define to 1 if compiled with -Wall in CFLAGS */ +#undef CFLAGS_WALL + +/* Define to 1 if compiled with -Werror in CFLAGS */ +#undef CFLAGS_WERROR + +/* Define to 1 if compiled with -Werror=comment in CFLAGS */ +#undef CFLAGS_WERROR_COMMENT + +/* Define to 1 if compiled with -Werror=implicit in CFLAGS */ +#undef CFLAGS_WERROR_IMPLICIT + +/* Define to 1 if compiled with -Werror=missing-braces in CFLAGS */ +#undef CFLAGS_WERROR_MISSING_BRACES + +/* Define to 1 if compiled with -Werror=missing-declarations in CFLAGS */ +#undef CFLAGS_WERROR_MISSING_DECLARATIONS + +/* Define to 1 if compiled with -Werror=missing-prototypes in CFLAGS */ +#undef CFLAGS_WERROR_MISSING_PROTOTYPES + +/* Define to 1 if compiled with -Werror=pointer-arith in CFLAGS */ +#undef CFLAGS_WERROR_POINTER_ARITH + +/* Define to 1 if compiled with -Werror=return-type in CFLAGS */ +#undef CFLAGS_WERROR_RETURN_TYPE + +/* Define to 1 if compiled with -Werror=strict-prototypes in CFLAGS */ +#undef CFLAGS_WERROR_STRICT_PROTOTYPES + +/* Define to 1 if compiled with -Werror=trigraphs in CFLAGS */ +#undef CFLAGS_WERROR_TRIGRAPHS + +/* Define to 1 if compiled with -Werror=unknown-warning-option in CFLAGS */ +#undef CFLAGS_WERROR_UNKNOWN_WARNING_OPTION + +/* Define to 1 if compiled with -Werror=vla in CFLAGS */ +#undef CFLAGS_WERROR_VLA + +/* Define to 1 if compiled with -Wno-long-long in CFLAGS */ +#undef CFLAGS_WNO_LONG_LONG + +/* Define to 1 if compiled with -Wno-pedantic-ms-format in CFLAGS */ +#undef CFLAGS_WNO_PEDANTIC_MS_FORMAT + +/* Define to 1 if compiled with -Wno-shift-negative-value in CFLAGS */ +#undef CFLAGS_WNO_SHIFT_NEGATIVE_VALUE + +/* Define to 1 if compiled with -Wno-stringop-truncation in CFLAGS */ +#undef CFLAGS_WNO_STRINGOP_TRUNCATION + +/* Define to 1 if compiled with -Wno-variadic-macros in CFLAGS */ +#undef CFLAGS_WNO_VARIADIC_MACROS + +/* Define to 1 if compiled with -Wsuggest-attribute=cold in CFLAGS */ +#undef CFLAGS_WSUGGEST_ATTRIBUTE_COLD + +/* Define to 1 if compiled with -Wsuggest-attribute=const in CFLAGS */ +#undef CFLAGS_WSUGGEST_ATTRIBUTE_CONST + +/* Define to 1 if compiled with -Wsuggest-attribute=format in CFLAGS */ +#undef CFLAGS_WSUGGEST_ATTRIBUTE_FORMAT + +/* Define to 1 if compiled with -Wsuggest-attribute=malloc in CFLAGS */ +#undef CFLAGS_WSUGGEST_ATTRIBUTE_MALLOC + +/* Define to 1 if compiled with -Wsuggest-attribute=noreturn in CFLAGS */ +#undef CFLAGS_WSUGGEST_ATTRIBUTE_NORETURN + +/* Define to 1 if compiled with -Wsuggest-attribute=pure in CFLAGS */ +#undef CFLAGS_WSUGGEST_ATTRIBUTE_PURE + +/* Define to 1 if compiled with -Werror=attributes in CPPFLAGS */ +#undef CPPFLAGS_WERROR_ATTRIBUTES + +/* Define to 1 if you have the `access' function. */ +#undef HAVE_ACCESS + +/* Define to 1 if you have the header file. */ +#undef HAVE_ARPA_INET_H + +/* "Define to 1 if you have the `bswap_16' intrinsic function." */ +#undef HAVE_BSWAP_16 + +/* "Define to 1 if you have the `bswap_32' intrinsic function." */ +#undef HAVE_BSWAP_32 + +/* "Define to 1 if you have the `bswap_64' intrinsic function." */ +#undef HAVE_BSWAP_64 + +/* Define to 1 if you have the header file. */ +#undef HAVE_BYTESWAP_H + +/* Define to 1 if you have the `canonicalize_file_name' function. */ +#undef HAVE_CANONICALIZE_FILE_NAME + +/* "Define to 1 if you have the `cpu_to_be16' intrinsic function." */ +#undef HAVE_CPU_TO_BE16 + +/* "Define to 1 if you have the `cpu_to_be32' intrinsic function." */ +#undef HAVE_CPU_TO_BE32 + +/* "Define to 1 if you have the `cpu_to_be64' intrinsic function." */ +#undef HAVE_CPU_TO_BE64 + +/* "Define to 1 if you have the `cpu_to_le16' intrinsic function." */ +#undef HAVE_CPU_TO_LE16 + +/* "Define to 1 if you have the `cpu_to_le32' intrinsic function." */ +#undef HAVE_CPU_TO_LE32 + +/* "Define to 1 if you have the `cpu_to_le64' intrinsic function." */ +#undef HAVE_CPU_TO_LE64 + +/* Define to 1 if you have the declaration of `strcasecmp', and to 0 if you + don't. */ +#undef HAVE_DECL_STRCASECMP + +/* Define to 1 if you have the declaration of `stricmp', and to 0 if you + don't. */ +#undef HAVE_DECL_STRICMP + +/* Define to 1 if you have the declaration of `strlcpy', and to 0 if you + don't. */ +#undef HAVE_DECL_STRLCPY + +/* Define to 1 if you have the declaration of `strncasecmp', and to 0 if you + don't. */ +#undef HAVE_DECL_STRNCASECMP + +/* Define to 1 if you have the declaration of `strnicmp', and to 0 if you + don't. */ +#undef HAVE_DECL_STRNICMP + +/* Define to 1 if you have the declaration of `strnlen', and to 0 if you + don't. */ +#undef HAVE_DECL_STRNLEN + +/* Define to 1 if you have the declaration of `strsep', and to 0 if you don't. + */ +#undef HAVE_DECL_STRSEP + +/* Define to 1 if you have the header file. */ +#undef HAVE_ENDIAN_H + +/* Define to 1 if you have the `faccessat' function. */ +#undef HAVE_FACCESSAT + +/* Define to 1 if you have the header file. */ +#undef HAVE_FCNTL_H + +/* Define to 1 if you have the `fileno' function. */ +#undef HAVE_FILENO + +/* Define to 1 if fseeko (and presumably ftello) exists and is declared. */ +#undef HAVE_FSEEKO + +/* Define to 1 if you have the `fstat' function. */ +#undef HAVE_FSTAT + +/* Define to 1 if you have the `ftruncate' function. */ +#undef HAVE_FTRUNCATE + +/* Define to 1 if your compiler supports the alloc_size function attribute */ +#undef HAVE_FUNC_ATTRIBUTE_1_ALLOC_SIZE + +/* Define to 1 if your compiler supports the alloc_size function attribute */ +#undef HAVE_FUNC_ATTRIBUTE_2_ALLOC_SIZE + +/* Define to 1 if your compiler supports the format function attribute */ +#undef HAVE_FUNC_ATTRIBUTE_3_FORMAT + +/* Define to 1 if your compiler supports the cold function attribute */ +#undef HAVE_FUNC_ATTRIBUTE_COLD + +/* Define to 1 if your compiler supports the const function attribute */ +#undef HAVE_FUNC_ATTRIBUTE_CONST + +/* Define to 1 if your compiler supports the error attribute on functions */ +#undef HAVE_FUNC_ATTRIBUTE_ERROR + +/* Define to 1 if your compiler supports the malloc function attribute */ +#undef HAVE_FUNC_ATTRIBUTE_MALLOC + +/* Define to 1 if your compiler supports the maybe_unused function attribute + */ +#undef HAVE_FUNC_ATTRIBUTE_MAYBE_UNUSED + +/* Define to 1 if your compiler supports the noreturn function attribute */ +#undef HAVE_FUNC_ATTRIBUTE_NORETURN + +/* Define to 1 if your compiler supports the pure function attribute */ +#undef HAVE_FUNC_ATTRIBUTE_PURE + +/* Define to 1 if your compiler supports the reproducible function attribute + */ +#undef HAVE_FUNC_ATTRIBUTE_REPRODUCIBLE + +/* Define to 1 if your compiler supports the returns_nonnull function + attribute */ +#undef HAVE_FUNC_ATTRIBUTE_RETURNS_NONNULL + +/* Define to 1 if your compiler supports the sentinel function attribute */ +#undef HAVE_FUNC_ATTRIBUTE_SENTINEL + +/* Define to 1 if your compiler supports the unsequenced function attribute */ +#undef HAVE_FUNC_ATTRIBUTE_UNSEQUENCED + +/* Define to 1 if your compiler supports the unused function attribute */ +#undef HAVE_FUNC_ATTRIBUTE_UNUSED + +/* Define to 1 if the compiler supports __func__ or equivalent. */ +#undef HAVE_FUNC_NAME + +/* Define to 1 if your compiler supports the alloc_size attribute on function + pointers */ +#undef HAVE_FUNC_PTR_ATTRIBUTE_1_ALLOC_SIZE + +/* Define to 1 if your compiler supports the alloc_size attribute on function + pointers */ +#undef HAVE_FUNC_PTR_ATTRIBUTE_2_ALLOC_SIZE + +/* Define to 1 if your compiler supports the format attribute on function + pointers */ +#undef HAVE_FUNC_PTR_ATTRIBUTE_3_FORMAT + +/* Define to 1 if your compiler supports the cold attribute on function + pointers */ +#undef HAVE_FUNC_PTR_ATTRIBUTE_COLD + +/* Define to 1 if your compiler supports the const attribute on function + pointers */ +#undef HAVE_FUNC_PTR_ATTRIBUTE_CONST + +/* Define to 1 if your compiler supports the malloc attribute on function + pointers */ +#undef HAVE_FUNC_PTR_ATTRIBUTE_MALLOC + +/* Define to 1 if your compiler supports the maybe_unused attribute on + function pointers */ +#undef HAVE_FUNC_PTR_ATTRIBUTE_MAYBE_UNUSED + +/* Define to 1 if your compiler supports the noreturn attribute on function + pointers */ +#undef HAVE_FUNC_PTR_ATTRIBUTE_NORETURN + +/* Define to 1 if your compiler supports the pure attribute on function + pointers */ +#undef HAVE_FUNC_PTR_ATTRIBUTE_PURE + +/* Define to 1 if your compiler supports the reproducible attribute on + function pointers */ +#undef HAVE_FUNC_PTR_ATTRIBUTE_REPRODUCIBLE + +/* Define to 1 if your compiler supports the returns_nonnull attribute on + function pointers */ +#undef HAVE_FUNC_PTR_ATTRIBUTE_RETURNS_NONNULL + +/* Define to 1 if your compiler supports the sentinel attribute on function + pointers */ +#undef HAVE_FUNC_PTR_ATTRIBUTE_SENTINEL + +/* Define to 1 if your compiler supports the unsequenced attribute on function + pointers */ +#undef HAVE_FUNC_PTR_ATTRIBUTE_UNSEQUENCED + +/* Define to 1 if your compiler supports the unused attribute on function + pointers */ +#undef HAVE_FUNC_PTR_ATTRIBUTE_UNUSED + +/* Define to 1 if you have the `getgid' function. */ +#undef HAVE_GETGID + +/* Define to 1 if you have the `getpagesize' function. */ +#undef HAVE_GETPAGESIZE + +/* Define to 1 if you have the `getrlimit' function. */ +#undef HAVE_GETRLIMIT + +/* Define to 1 if you have the `getuid' function. */ +#undef HAVE_GETUID + +/* "Define to 1 if you have the `htobe16' intrinsic function." */ +#undef HAVE_HTOBE16 + +/* "Define to 1 if you have the `htobe32' intrinsic function." */ +#undef HAVE_HTOBE32 + +/* "Define to 1 if you have the `htobe64' intrinsic function." */ +#undef HAVE_HTOBE64 + +/* "Define to 1 if you have the `htole16' intrinsic function." */ +#undef HAVE_HTOLE16 + +/* "Define to 1 if you have the `htole32' intrinsic function." */ +#undef HAVE_HTOLE32 + +/* "Define to 1 if you have the `htole64' intrinsic function." */ +#undef HAVE_HTOLE64 + +/* "Define to 1 if you have the `htonl' intrinsic function." */ +#undef HAVE_HTONL + +/* "Define to 1 if you have the `htonq' intrinsic function." */ +#undef HAVE_HTONQ + +/* "Define to 1 if you have the `htons' intrinsic function." */ +#undef HAVE_HTONS + +/* Define to 1 if you have the header file. */ +#undef HAVE_INTRIN_H + +/* Define to 1 if you have the header file. */ +#undef HAVE_INTTYPES_H + +/* Define to 1 if you have the header file. */ +#undef HAVE_IO_H + +/* Define to 1 if you have the `isascii' function. */ +#undef HAVE_ISASCII + +/* Define to 1 if you have the `iscntrl' function. */ +#undef HAVE_ISCNTRL + +/* Define to 1 if you have the header file. */ +#undef HAVE_MACHINE_ENDIAN_H + +/* Define to 1 if you have the `mempcpy' function. */ +#undef HAVE_MEMPCPY + +/* Define to 1 if you have the `mempset' function. */ +#undef HAVE_MEMPSET + +/* Define to 1 if you have the header file. */ +#undef HAVE_MINIX_CONFIG_H + +/* Define to 1 if you have a working `mmap' system call. */ +#undef HAVE_MMAP + +/* Define to 1 if you have the `pathconf' function. */ +#undef HAVE_PATHCONF + +/* Define to 1 if you have the `realpath' function. */ +#undef HAVE_REALPATH + +/* Define to 1 if you have some version of the snprintf function. */ +#undef HAVE_SNPRINTF + +/* Define to 1 if you have the `stat' function. */ +#undef HAVE_STAT + +/* Define to 1 if you have the header file. */ +#undef HAVE_STDARG_H + +/* Define to 1 if you have the header file. */ +#undef HAVE_STDBIT_H + +/* Define to 1 if stdbool.h conforms to C99. */ +#undef HAVE_STDBOOL_H + +/* Define to 1 if your compiler supports C99 extern inline */ +#undef HAVE_STDC_INLINE + +/* "Define to 1 if you have the `stdc_leading_zeros' intrinsic function." */ +#undef HAVE_STDC_LEADING_ZEROS + +/* Define to 1 if you have the header file. */ +#undef HAVE_STDINT_H + +/* Define to 1 if you have the header file. */ +#undef HAVE_STDIO_H + +/* Define to 1 if you have the header file. */ +#undef HAVE_STDLIB_H + +/* Define to 1 if you have the header file. */ +#undef HAVE_STDNORETURN_H + +/* Define to 1 if you have the `strcasecmp' function. */ +#undef HAVE_STRCASECMP + +/* Define to 1 if you have the `stricmp' function. */ +#undef HAVE_STRICMP + +/* Define to 1 if you have the header file. */ +#undef HAVE_STRINGS_H + +/* Define to 1 if you have the header file. */ +#undef HAVE_STRING_H + +/* Define to 1 if you have the `strlcpy' function. */ +#undef HAVE_STRLCPY + +/* Define to 1 if you have the `strncasecmp' function. */ +#undef HAVE_STRNCASECMP + +/* Define to 1 if you have the `strnicmp' function. */ +#undef HAVE_STRNICMP + +/* Define to 1 if you have the `strnlen' function. */ +#undef HAVE_STRNLEN + +/* Define to 1 if you have the `strsep' function. */ +#undef HAVE_STRSEP + +/* Define to 1 if the system has the type `struct stat'. */ +#undef HAVE_STRUCT_STAT + +/* Define to 1 if the system has the type `struct _stati64'. */ +#undef HAVE_STRUCT__STATI64 + +/* Define to 1 if you have the `sysconf' function. */ +#undef HAVE_SYSCONF + +/* Define to 1 if you have the header file. */ +#undef HAVE_SYS_ENDIAN_H + +/* Define to 1 if you have the header file. */ +#undef HAVE_SYS_MMAN_H + +/* Define to 1 if you have the header file. */ +#undef HAVE_SYS_PARAM_H + +/* Define to 1 if you have the header file. */ +#undef HAVE_SYS_RESOURCE_H + +/* Define to 1 if you have the header file. */ +#undef HAVE_SYS_STAT_H + +/* Define to 1 if you have the header file. */ +#undef HAVE_SYS_TYPES_H + +/* "Define to 1 if you have the `S_ISREG' intrinsic function." */ +#undef HAVE_S_ISREG + +/* Define to 1 if you have some version of the typeof operator. */ +#undef HAVE_TYPEOF + +/* Define to 1 if the system has the type `uintmax_t'. */ +#undef HAVE_UINTMAX_T + +/* Define to 1 if the system has the type `uintptr_t'. */ +#undef HAVE_UINTPTR_T + +/* Define to 1 if you have the header file. */ +#undef HAVE_UNISTD_H + +/* Define to 1 if the system has the type `unsigned long long int'. */ +#undef HAVE_UNSIGNED_LONG_LONG_INT + +/* define to 1 if your compiler supports the , ## __VA_ARGS__ hack. */ +#undef HAVE_VARADIC_MACROS_COMMA_HACK + +/* define to 1 if your compiler supports C99 __VA_ARGS__ variadic macros. */ +#undef HAVE_VARIADIC_MACROS + +/* Define to 1 if you have some version of the vsnprintf function. */ +#undef HAVE_VSNPRINTF + +/* Define to 1 if you have the header file. */ +#undef HAVE_WCHAR_H + +/* Define to 1 if you have the `_access' function. */ +#undef HAVE__ACCESS + +/* "Define to 1 if you have the `_BitScanReverse' intrinsic function." */ +#undef HAVE__BITSCANREVERSE + +/* "Define to 1 if you have the `_BitScanReverse64' intrinsic function." */ +#undef HAVE__BITSCANREVERSE64 + +/* Define to 1 if the system has the type `_Bool'. */ +#undef HAVE__BOOL + +/* "Define to 1 if you have the `_byteswap_uint64' intrinsic function." */ +#undef HAVE__BYTESWAP_UINT64 + +/* "Define to 1 if you have the `_byteswap_ulong' intrinsic function." */ +#undef HAVE__BYTESWAP_ULONG + +/* "Define to 1 if you have the `_byteswap_ushort' intrinsic function." */ +#undef HAVE__BYTESWAP_USHORT + +/* Define to 1 if you have the `_chsize' function. */ +#undef HAVE__CHSIZE + +/* Define to 1 if you have the `_chsize_s' function. */ +#undef HAVE__CHSIZE_S + +/* Define to 1 if you have the `_fileno' function. */ +#undef HAVE__FILENO + +/* Define to 1 if you have the `_fseeki64' function. */ +#undef HAVE__FSEEKI64 + +/* Define to 1 if you have the `_fstati64' function. */ +#undef HAVE__FSTATI64 + +/* Define to 1 if you have the `_fullpath' function. */ +#undef HAVE__FULLPATH + +/* Define to 1 if you have the `_stati64' function. */ +#undef HAVE__STATI64 + +/* "Define to 1 if you have the `__builtin_bswap16' intrinsic function." */ +#undef HAVE___BUILTIN_BSWAP16 + +/* "Define to 1 if you have the `__builtin_bswap32' intrinsic function." */ +#undef HAVE___BUILTIN_BSWAP32 + +/* "Define to 1 if you have the `__builtin_bswap64' intrinsic function." */ +#undef HAVE___BUILTIN_BSWAP64 + +/* "Define to 1 if you have the `__builtin_choose_expr' intrinsic function." + */ +#undef HAVE___BUILTIN_CHOOSE_EXPR + +/* "Define to 1 if you have the `__builtin_clz' intrinsic function." */ +#undef HAVE___BUILTIN_CLZ + +/* "Define to 1 if you have the `__builtin_clzll' intrinsic function." */ +#undef HAVE___BUILTIN_CLZLL + +/* "Define to 1 if you have the `__builtin_constant_p' intrinsic function." */ +#undef HAVE___BUILTIN_CONSTANT_P + +/* "Define to 1 if you have the `__builtin_expect' intrinsic function." */ +#undef HAVE___BUILTIN_EXPECT + +/* "Define to 1 if you have the `__builtin_prefetch' intrinsic function." */ +#undef HAVE___BUILTIN_PREFETCH + +/* "Define to 1 if you have the `__builtin_unreachable' intrinsic function." + */ +#undef HAVE___BUILTIN_UNREACHABLE + +/* "Define to 1 if you have the `__cpu_to_be16' intrinsic function." */ +#undef HAVE___CPU_TO_BE16 + +/* "Define to 1 if you have the `__cpu_to_be64' intrinsic function." */ +#undef HAVE___CPU_TO_BE64 + +/* "Define to 1 if you have the `__cpu_to_le16' intrinsic function." */ +#undef HAVE___CPU_TO_LE16 + +/* "Define to 1 if you have the `__cpu_to_le32' intrinsic function." */ +#undef HAVE___CPU_TO_LE32 + +/* "Define to 1 if you have the `__cpu_to_le64' intrinsic function." */ +#undef HAVE___CPU_TO_LE64 + +/* Define to 1 if compiled with -Wl */ +#undef LDFLAGS_WL_AS_NEEDED + +/* Define to 1 if compiled with -Wl */ +#undef LDFLAGS_WL_GC_SECTIONS + +/* Define to the address where bug reports for this package should be sent. */ +#undef PACKAGE_BUGREPORT + +/* Define to the full name of this package. */ +#undef PACKAGE_NAME + +/* Define to the full name and version of this package. */ +#undef PACKAGE_STRING + +/* Define to the one symbol short name of this package. */ +#undef PACKAGE_TARNAME + +/* Define to the home page for this package. */ +#undef PACKAGE_URL + +/* Define to the version of this package. */ +#undef PACKAGE_VERSION + +/* Define to 1 if all of the C90 standard headers exist (not just the ones + required in a freestanding environment). This macro is provided for + backward compatibility; new code need not use it. */ +#undef STDC_HEADERS + +/* Enable extensions on AIX 3, Interix. */ +#ifndef _ALL_SOURCE +# undef _ALL_SOURCE +#endif +/* Enable general extensions on macOS. */ +#ifndef _DARWIN_C_SOURCE +# undef _DARWIN_C_SOURCE +#endif +/* Enable general extensions on Solaris. */ +#ifndef __EXTENSIONS__ +# undef __EXTENSIONS__ +#endif +/* Enable GNU extensions on systems that have them. */ +#ifndef _GNU_SOURCE +# undef _GNU_SOURCE +#endif +/* Enable X/Open compliant socket functions that do not require linking + with -lxnet on HP-UX 11.11. */ +#ifndef _HPUX_ALT_XOPEN_SOCKET_API +# undef _HPUX_ALT_XOPEN_SOCKET_API +#endif +/* Identify the host operating system as Minix. + This macro does not affect the system headers' behavior. + A future release of Autoconf may stop defining this macro. */ +#ifndef _MINIX +# undef _MINIX +#endif +/* Enable general extensions on NetBSD. + Enable NetBSD compatibility extensions on Minix. */ +#ifndef _NETBSD_SOURCE +# undef _NETBSD_SOURCE +#endif +/* Enable OpenBSD compatibility extensions on NetBSD. + Oddly enough, this does nothing on OpenBSD. */ +#ifndef _OPENBSD_SOURCE +# undef _OPENBSD_SOURCE +#endif +/* Define to 1 if needed for POSIX-compatible behavior. */ +#ifndef _POSIX_SOURCE +# undef _POSIX_SOURCE +#endif +/* Define to 2 if needed for POSIX-compatible behavior. */ +#ifndef _POSIX_1_SOURCE +# undef _POSIX_1_SOURCE +#endif +/* Enable POSIX-compatible threading on Solaris. */ +#ifndef _POSIX_PTHREAD_SEMANTICS +# undef _POSIX_PTHREAD_SEMANTICS +#endif +/* Enable extensions specified by ISO/IEC TS 18661-5:2014. */ +#ifndef __STDC_WANT_IEC_60559_ATTRIBS_EXT__ +# undef __STDC_WANT_IEC_60559_ATTRIBS_EXT__ +#endif +/* Enable extensions specified by ISO/IEC TS 18661-1:2014. */ +#ifndef __STDC_WANT_IEC_60559_BFP_EXT__ +# undef __STDC_WANT_IEC_60559_BFP_EXT__ +#endif +/* Enable extensions specified by ISO/IEC TS 18661-2:2015. */ +#ifndef __STDC_WANT_IEC_60559_DFP_EXT__ +# undef __STDC_WANT_IEC_60559_DFP_EXT__ +#endif +/* Enable extensions specified by ISO/IEC TS 18661-4:2015. */ +#ifndef __STDC_WANT_IEC_60559_FUNCS_EXT__ +# undef __STDC_WANT_IEC_60559_FUNCS_EXT__ +#endif +/* Enable extensions specified by ISO/IEC TS 18661-3:2015. */ +#ifndef __STDC_WANT_IEC_60559_TYPES_EXT__ +# undef __STDC_WANT_IEC_60559_TYPES_EXT__ +#endif +/* Enable extensions specified by ISO/IEC TR 24731-2:2010. */ +#ifndef __STDC_WANT_LIB_EXT2__ +# undef __STDC_WANT_LIB_EXT2__ +#endif +/* Enable extensions specified by ISO/IEC 24747:2009. */ +#ifndef __STDC_WANT_MATH_SPEC_FUNCS__ +# undef __STDC_WANT_MATH_SPEC_FUNCS__ +#endif +/* Enable extensions on HP NonStop. */ +#ifndef _TANDEM_SOURCE +# undef _TANDEM_SOURCE +#endif +/* Enable X/Open extensions. Define to 500 only if necessary + to make mbstate_t available. */ +#ifndef _XOPEN_SOURCE +# undef _XOPEN_SOURCE +#endif + + +/* Define to 1 if your processor stores words with the most significant byte + first (like Motorola and SPARC, unlike Intel and VAX). */ +#undef WORDS_BIGENDIAN + +/* Define to 1 if your processor stores words with the least significant byte + first (like Intel and VAX, unlike Motorola and SPARC). */ +#undef WORDS_LITTLEENDIAN + +/* Number of bits in a file offset, on hosts where this is settable. */ +#undef _FILE_OFFSET_BITS + +/* Define to 1 if compiled with -flto in -flto=auto */ +#undef _FLTO_AUTO_FLTO + +/* Define to 1 to make fseeko visible on some hosts (e.g. glibc 2.2). */ +#undef _LARGEFILE_SOURCE + +/* Define for large files, on AIX-style hosts. */ +#undef _LARGE_FILES + +/* Define if __func__ is called something else on your compiler. */ +#undef __func__ + +/* Define to empty if `const' does not conform to ANSI C. */ +#undef const + +/* Define to `__inline__' or `__inline' if that's what the C compiler + calls it, or to nothing if 'inline' is not supported under any name. */ +#ifndef __cplusplus +#undef inline +#endif + +/* Define to the equivalent of the C99 'restrict' keyword, or to + nothing if this is not supported. Do not define if restrict is + supported only directly. */ +#undef restrict +/* Work around a bug in older versions of Sun C++, which did not + #define __restrict__ or support _Restrict or __restrict__ + even though the corresponding Sun C compiler ended up with + "#define restrict _Restrict" or "#define restrict __restrict__" + in the previous line. This workaround can be removed once + we assume Oracle Developer Studio 12.5 (2016) or later. */ +#if defined __SUNPRO_CC && !defined __RESTRICT && !defined __restrict__ +# define _Restrict +# define __restrict__ +#endif + +/* Define to `unsigned int' if does not define. */ +#undef size_t + +/* Define if your snprintf function is not named snprintf. */ +#undef snprintf + +/* Define if your typeof operator is not named `typeof'. */ +#undef typeof + +/* Define to the widest unsigned integer type if and + do not define. */ +#undef uintmax_t + +/* Define to the type of an unsigned integer type wide enough to hold a + pointer, if such a type exists, and if the system does not define it. */ +#undef uintptr_t + +/* Define if your vsnprintf function is not named vsnprintf. */ +#undef vsnprintf + + +/* Begin unconfig.h */ + +#ifndef alloc_size_func2 +# ifdef HAVE_FUNC_ATTRIBUTE_2_ALLOC_SIZE +# define alloc_size_func2(x1,x2) ATTRIBUTE(alloc_size(x1,x2)) +# else +# define alloc_size_func2(x1,x2) +# endif +#endif + +#ifndef alloc_size_func2_ptr +# ifdef HAVE_FUNC_PTR_ATTRIBUTE_2_ALLOC_SIZE +# define alloc_size_func2_ptr(x1,x2) ATTRIBUTE(alloc_size(x1,x2)) +# else +# define alloc_size_func2_ptr(x1,x2) +# endif +#endif + +#ifndef end_with_null +# ifdef HAVE_FUNC_ATTRIBUTE_SENTINEL +# define end_with_null ATTRIBUTE(sentinel) +# else +# define end_with_null +# endif +#endif + +#ifndef end_with_null_ptr +# ifdef HAVE_FUNC_PTR_ATTRIBUTE_SENTINEL +# define end_with_null_ptr ATTRIBUTE(sentinel) +# else +# define end_with_null_ptr +# endif +#endif + +#ifndef format_func3 +# ifdef HAVE_FUNC_ATTRIBUTE_3_FORMAT +# define format_func3(x1,x2,x3) ATTRIBUTE(format(x1,x2,x3)) +# else +# define format_func3(x1,x2,x3) +# endif +#endif + +#ifndef format_func3_ptr +# ifdef HAVE_FUNC_PTR_ATTRIBUTE_3_FORMAT +# define format_func3_ptr(x1,x2,x3) ATTRIBUTE(format(x1,x2,x3)) +# else +# define format_func3_ptr(x1,x2,x3) +# endif +#endif + +#ifndef const_func +# ifdef HAVE_FUNC_ATTRIBUTE_CONST +# define const_func ATTRIBUTE(const) +# else +# define const_func +# endif +#endif + +#ifndef const_func_ptr +# ifdef HAVE_FUNC_PTR_ATTRIBUTE_CONST +# define const_func_ptr ATTRIBUTE(const) +# else +# define const_func_ptr +# endif +#endif + +#ifndef unsequenced_func +# ifdef HAVE_FUNC_ATTRIBUTE_UNSEQUENCED +# define unsequenced_func ATTRIBUTE(unsequenced) +# else +# define unsequenced_func +# endif +#endif + +#ifndef unsequenced_func_ptr +# ifdef HAVE_FUNC_PTR_ATTRIBUTE_UNSEQUENCED +# define unsequenced_func_ptr ATTRIBUTE(unsequenced) +# else +# define unsequenced_func_ptr +# endif +#endif + +#ifndef noreturn_func +# ifdef HAVE_FUNC_ATTRIBUTE_NORETURN +# define noreturn_func ATTRIBUTE(noreturn) +# else +# define noreturn_func +# endif +#endif + +#ifndef reproducible_func +# ifdef HAVE_FUNC_ATTRIBUTE_REPRODUCIBLE +# define reproducible_func ATTRIBUTE(reproducible) +# else +# define reproducible_func +# endif +#endif + +#ifndef reproducible_func_ptr +# ifdef HAVE_FUNC_PTR_ATTRIBUTE_REPRODUCIBLE +# define reproducible_func_ptr ATTRIBUTE(reproducible) +# else +# define reproducible_func_ptr +# endif +#endif + +#ifndef pure_func +# ifdef HAVE_FUNC_ATTRIBUTE_PURE +# define pure_func ATTRIBUTE(pure) +# else +# define pure_func +# endif +#endif + +#ifndef pure_func_ptr +# ifdef HAVE_FUNC_PTR_ATTRIBUTE_PURE +# define pure_func_ptr ATTRIBUTE(pure) +# else +# define pure_func_ptr +# endif +#endif + +#ifndef unlikely_func +# ifdef HAVE_FUNC_ATTRIBUTE_COLD +# define unlikely_func ATTRIBUTE(cold) +# else +# define unlikely_func +# endif +#endif + +#ifndef unlikely_func_ptr +# ifdef HAVE_FUNC_PTR_ATTRIBUTE_COLD +# define unlikely_func_ptr ATTRIBUTE(cold) +# else +# define unlikely_func_ptr +# endif +#endif + +#ifndef maybe_unused_func +# ifdef HAVE_FUNC_ATTRIBUTE_MAYBE_UNUSED +# define maybe_unused_func ATTRIBUTE(maybe_unused) +# else +# define maybe_unused_func +# endif +#endif + +#ifndef maybe_unused_func_ptr +# ifdef HAVE_FUNC_PTR_ATTRIBUTE_MAYBE_UNUSED +# define maybe_unused_func_ptr ATTRIBUTE(maybe_unused) +# else +# define maybe_unused_func_ptr +# endif +#endif + +#ifndef unused_func +# ifdef HAVE_FUNC_ATTRIBUTE_UNUSED +# define unused_func ATTRIBUTE(unused) +# else +# define unused_func +# endif +#endif + +#ifndef unused_func_ptr +# ifdef HAVE_FUNC_PTR_ATTRIBUTE_UNUSED +# define unused_func_ptr ATTRIBUTE(unused) +# else +# define unused_func_ptr +# endif +#endif + +#ifndef noreturn_func_ptr +# ifdef HAVE_FUNC_PTR_ATTRIBUTE_NORETURN +# define noreturn_func_ptr ATTRIBUTE(noreturn) +# else +# define noreturn_func_ptr +# endif +#endif + +#ifndef never_null +# ifdef HAVE_FUNC_ATTRIBUTE_RETURNS_NONNULL +# define never_null ATTRIBUTE(returns_nonnull) +# else +# define never_null +# endif +#endif + +#ifndef never_null_ptr +# ifdef HAVE_FUNC_PTR_ATTRIBUTE_RETURNS_NONNULL +# define never_null_ptr ATTRIBUTE(returns_nonnull) +# else +# define never_null_ptr +# endif +#endif + +#ifndef malloc_func +# ifdef HAVE_FUNC_ATTRIBUTE_MALLOC +# define malloc_func ATTRIBUTE(malloc) +# else +# define malloc_func +# endif +#endif + +#ifndef malloc_func_ptr +# ifdef HAVE_FUNC_PTR_ATTRIBUTE_MALLOC +# define malloc_func_ptr ATTRIBUTE(malloc) +# else +# define malloc_func_ptr +# endif +#endif + +#ifndef alloc_size_func1 +# ifdef HAVE_FUNC_ATTRIBUTE_1_ALLOC_SIZE +# define alloc_size_func1(x1) ATTRIBUTE(alloc_size(x1)) +# else +# define alloc_size_func1(x1) +# endif +#endif + +#ifndef alloc_size_func1_ptr +# ifdef HAVE_FUNC_PTR_ATTRIBUTE_1_ALLOC_SIZE +# define alloc_size_func1_ptr(x1) ATTRIBUTE(alloc_size(x1)) +# else +# define alloc_size_func1_ptr(x1) +# endif +#endif diff --git a/include/config/msvc.h b/include/config/msvc.h new file mode 100644 index 0000000..b4f6a91 --- /dev/null +++ b/include/config/msvc.h @@ -0,0 +1,166 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 2016 The NASM Authors - All Rights Reserved */ + +/* + * config/msvc.h + * + * Compiler definitions for Microsoft Visual C++; + * instead of unconfig.h. See config.h.in for the + * variables which can be defined here. + * + * MSDN seems to have information back to Visual Studio 2003, so aim + * for compatibility that far back. + * + * Relevant _MSC_VER values: + * 1310 - Visual Studio 2003 + * 1400 - Visual Studio 2005 + * 1500 - Visual Studio 2008 + * 1600 - Visual Studio 2010 + * 1700 - Visual Studio 2012 + * 1800 - Visual Studio 2013 + * 1900 - Visual Studio 2015 + * 1910 - Visual Studio 2017 + */ + +#ifndef NASM_CONFIG_MSVC_H +#define NASM_CONFIG_MSVC_H + +/* Define to 1 if you have the header file. */ +#define HAVE_FCNTL_H 1 + +/* Define to 1 if you have the header file. */ +#if _MSC_VER >= 1800 +# define HAVE_INTTYPES_H 1 +#endif + +/* Define to 1 if you have the header file. */ +#define HAVE_IO_H 1 + +/* Define to 1 if you have the header file. */ +#define HAVE_STDLIB_H 1 + +/* Define to 1 if you have the header file. */ +#define HAVE_STRING_H 1 + +/* Define to 1 if you have the header file. */ +#define HAVE_SYS_STAT_H 1 + +/* Define to 1 if you have the header file. */ +#define HAVE_SYS_TYPES_H 1 + +/* Define to 1 if you have the `access' function. */ +#define HAVE_ACCESS 1 +#if _MSC_VER < 1400 +# define access _access +#endif + +/* Define to 1 if you have the `fileno' function. */ +#define HAVE_FILENO 1 +#if _MSC_VER < 1400 +# define fileno _fileno +#endif + +/* Define to 1 if you have the `snprintf' function. */ +#define HAVE_SNPRINTF 1 +#if _MSC_VER < 1900 +# define snprintf _snprintf +#endif + +/* Define to 1 if you have the `_chsize' function. */ +#define HAVE__CHSIZE 1 + +/* Define to 1 if you have the `_chsize_s' function. */ +#if _MSC_VER >= 1400 +# define HAVE__CHSIZE_S 1 +#endif + +/* Define to 1 if you have the `_filelengthi64' function. */ +#define HAVE__FILELENGTHI64 1 + +/* Define to 1 if you have the `_fseeki64' function. */ +#define HAVE__FSEEKI64 1 + +/* Define to 1 if you have the `_fullpath' function. */ +#define HAVE__FULLPATH 1 + +/* Define to 1 if the system has the type `struct _stati64'. */ +#define HAVE_STRUCT__STATI64 + +/* Define to 1 if you have the `_stati64' function. */ +#define HAVE__STATI64 1 + +/* Define to 1 if you have the `_fstati64' function. */ +#define HAVE__FSTATI64 1 + +/* Define to 1 if stdbool.h conforms to C99. */ +#if _MSC_VER >= 1800 +# define HAVE_STDBOOL_H 1 +#endif + +/* Define to 1 if you have the `stricmp' function. */ +#define HAVE_STRICMP 1 +/* Define to 1 if you have the declaration of `stricmp', and to 0 if you + don't. */ +#define HAVE_DECL_STRICMP 1 +#if _MSC_VER < 1400 +# define stricmp _stricmp +#endif + +/* Define to 1 if you have the `strnicmp' function. */ +#define HAVE_STRNICMP 1 +/* Define to 1 if you have the declaration of `strnicmp', and to 0 if you + don't. */ +#define HAVE_DECL_STRNICMP 1 +#if _MSC_VER < 1400 +# define strnicmp _strnicmp +#endif + +#if _MSC_VER >= 1400 +/* Define to 1 if you have the `strnlen' function. */ +# define HAVE_STRNLEN 1 +/* Define to 1 if you have the declaration of `strnlen', and to 0 if you + don't. */ +# define HAVE_DECL_STRNLEN 1 +#endif + +/* Define to 1 if the system has the type `uintptr_t'. */ +#if _MSC_VER >= 1900 +# define HAVE_UINTPTR_T 1 +#else +/* Define to the type of an unsigned integer type wide enough to hold a + pointer, if such a type exists, and if the system does not define it. */ +# define uintptr_t size_t +#endif + +/* Define to 1 if you have the `vsnprintf' function. */ +#define HAVE_VSNPRINTF 1 +#if _MSC_VER < 1400 +# define vsnprint _vsnprintf +#endif + +/* Define to 1 if the system has the type `_Bool'. */ +#if _MSC_VER >= 1900 +# define HAVE__BOOL 1 +#endif + +/* Define to 1 if you have the ANSI C header files. */ +#define STDC_HEADERS 1 + +/* Define to 1 if your processor stores words with the least significant byte + first (like Intel and VAX, unlike Motorola and SPARC). */ +#define WORDS_LITTLEENDIAN 1 + +/* Define to `__inline__' or `__inline' if that's what the C compiler + calls it, or to nothing if 'inline' is not supported under any name. */ +#define inline __inline + +/* Define to the equivalent of the C99 'restrict' keyword, or to + nothing if this is not supported. Do not define if restrict is + supported directly. */ +#if _MSC_VER >= 1700 +#define restrict __restrict +#else +#define restrict +#endif + +#endif /* NASM_CONFIG_MSVC_H */ diff --git a/include/config/unconfig.h b/include/config/unconfig.h new file mode 100644 index 0000000..0247bf3 --- /dev/null +++ b/include/config/unconfig.h @@ -0,0 +1,230 @@ +/* config/unconfig.h: autogenerated by tools/unconfig.pl */ + +#ifndef CONFIG_UNCONFIG_H +#define CONFIG_UNCONFIG_H + +#ifndef alloc_size_func2 +# ifdef HAVE_FUNC_ATTRIBUTE_2_ALLOC_SIZE +# define alloc_size_func2(x1,x2) ATTRIBUTE(alloc_size(x1,x2)) +# else +# define alloc_size_func2(x1,x2) +# endif +#endif + +#ifndef alloc_size_func2_ptr +# ifdef HAVE_FUNC_PTR_ATTRIBUTE_2_ALLOC_SIZE +# define alloc_size_func2_ptr(x1,x2) ATTRIBUTE(alloc_size(x1,x2)) +# else +# define alloc_size_func2_ptr(x1,x2) +# endif +#endif + +#ifndef end_with_null +# ifdef HAVE_FUNC_ATTRIBUTE_SENTINEL +# define end_with_null ATTRIBUTE(sentinel) +# else +# define end_with_null +# endif +#endif + +#ifndef end_with_null_ptr +# ifdef HAVE_FUNC_PTR_ATTRIBUTE_SENTINEL +# define end_with_null_ptr ATTRIBUTE(sentinel) +# else +# define end_with_null_ptr +# endif +#endif + +#ifndef format_func3 +# ifdef HAVE_FUNC_ATTRIBUTE_3_FORMAT +# define format_func3(x1,x2,x3) ATTRIBUTE(format(x1,x2,x3)) +# else +# define format_func3(x1,x2,x3) +# endif +#endif + +#ifndef format_func3_ptr +# ifdef HAVE_FUNC_PTR_ATTRIBUTE_3_FORMAT +# define format_func3_ptr(x1,x2,x3) ATTRIBUTE(format(x1,x2,x3)) +# else +# define format_func3_ptr(x1,x2,x3) +# endif +#endif + +#ifndef const_func +# ifdef HAVE_FUNC_ATTRIBUTE_CONST +# define const_func ATTRIBUTE(const) +# else +# define const_func +# endif +#endif + +#ifndef const_func_ptr +# ifdef HAVE_FUNC_PTR_ATTRIBUTE_CONST +# define const_func_ptr ATTRIBUTE(const) +# else +# define const_func_ptr +# endif +#endif + +#ifndef unsequenced_func +# ifdef HAVE_FUNC_ATTRIBUTE_UNSEQUENCED +# define unsequenced_func ATTRIBUTE(unsequenced) +# else +# define unsequenced_func +# endif +#endif + +#ifndef unsequenced_func_ptr +# ifdef HAVE_FUNC_PTR_ATTRIBUTE_UNSEQUENCED +# define unsequenced_func_ptr ATTRIBUTE(unsequenced) +# else +# define unsequenced_func_ptr +# endif +#endif + +#ifndef noreturn_func +# ifdef HAVE_FUNC_ATTRIBUTE_NORETURN +# define noreturn_func ATTRIBUTE(noreturn) +# else +# define noreturn_func +# endif +#endif + +#ifndef reproducible_func +# ifdef HAVE_FUNC_ATTRIBUTE_REPRODUCIBLE +# define reproducible_func ATTRIBUTE(reproducible) +# else +# define reproducible_func +# endif +#endif + +#ifndef reproducible_func_ptr +# ifdef HAVE_FUNC_PTR_ATTRIBUTE_REPRODUCIBLE +# define reproducible_func_ptr ATTRIBUTE(reproducible) +# else +# define reproducible_func_ptr +# endif +#endif + +#ifndef pure_func +# ifdef HAVE_FUNC_ATTRIBUTE_PURE +# define pure_func ATTRIBUTE(pure) +# else +# define pure_func +# endif +#endif + +#ifndef pure_func_ptr +# ifdef HAVE_FUNC_PTR_ATTRIBUTE_PURE +# define pure_func_ptr ATTRIBUTE(pure) +# else +# define pure_func_ptr +# endif +#endif + +#ifndef unlikely_func +# ifdef HAVE_FUNC_ATTRIBUTE_COLD +# define unlikely_func ATTRIBUTE(cold) +# else +# define unlikely_func +# endif +#endif + +#ifndef unlikely_func_ptr +# ifdef HAVE_FUNC_PTR_ATTRIBUTE_COLD +# define unlikely_func_ptr ATTRIBUTE(cold) +# else +# define unlikely_func_ptr +# endif +#endif + +#ifndef maybe_unused_func +# ifdef HAVE_FUNC_ATTRIBUTE_MAYBE_UNUSED +# define maybe_unused_func ATTRIBUTE(maybe_unused) +# else +# define maybe_unused_func +# endif +#endif + +#ifndef maybe_unused_func_ptr +# ifdef HAVE_FUNC_PTR_ATTRIBUTE_MAYBE_UNUSED +# define maybe_unused_func_ptr ATTRIBUTE(maybe_unused) +# else +# define maybe_unused_func_ptr +# endif +#endif + +#ifndef unused_func +# ifdef HAVE_FUNC_ATTRIBUTE_UNUSED +# define unused_func ATTRIBUTE(unused) +# else +# define unused_func +# endif +#endif + +#ifndef unused_func_ptr +# ifdef HAVE_FUNC_PTR_ATTRIBUTE_UNUSED +# define unused_func_ptr ATTRIBUTE(unused) +# else +# define unused_func_ptr +# endif +#endif + +#ifndef noreturn_func_ptr +# ifdef HAVE_FUNC_PTR_ATTRIBUTE_NORETURN +# define noreturn_func_ptr ATTRIBUTE(noreturn) +# else +# define noreturn_func_ptr +# endif +#endif + +#ifndef never_null +# ifdef HAVE_FUNC_ATTRIBUTE_RETURNS_NONNULL +# define never_null ATTRIBUTE(returns_nonnull) +# else +# define never_null +# endif +#endif + +#ifndef never_null_ptr +# ifdef HAVE_FUNC_PTR_ATTRIBUTE_RETURNS_NONNULL +# define never_null_ptr ATTRIBUTE(returns_nonnull) +# else +# define never_null_ptr +# endif +#endif + +#ifndef malloc_func +# ifdef HAVE_FUNC_ATTRIBUTE_MALLOC +# define malloc_func ATTRIBUTE(malloc) +# else +# define malloc_func +# endif +#endif + +#ifndef malloc_func_ptr +# ifdef HAVE_FUNC_PTR_ATTRIBUTE_MALLOC +# define malloc_func_ptr ATTRIBUTE(malloc) +# else +# define malloc_func_ptr +# endif +#endif + +#ifndef alloc_size_func1 +# ifdef HAVE_FUNC_ATTRIBUTE_1_ALLOC_SIZE +# define alloc_size_func1(x1) ATTRIBUTE(alloc_size(x1)) +# else +# define alloc_size_func1(x1) +# endif +#endif + +#ifndef alloc_size_func1_ptr +# ifdef HAVE_FUNC_PTR_ATTRIBUTE_1_ALLOC_SIZE +# define alloc_size_func1_ptr(x1) ATTRIBUTE(alloc_size(x1)) +# else +# define alloc_size_func1_ptr(x1) +# endif +#endif + +#endif /* CONFIG_UNCONFIG_H */ diff --git a/include/config/unknown.h b/include/config/unknown.h new file mode 100644 index 0000000..6ee2b61 --- /dev/null +++ b/include/config/unknown.h @@ -0,0 +1,21 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 2016 The NASM Authors - All Rights Reserved */ + +/* + * config/unknown.h + * + * Compiler definitions for an unknown compiler. Assume the worst. + */ + +#ifndef NASM_CONFIG_UNKNOWN_H +#define NASM_CONFIG_UNKNOWN_H + +/* Assume these don't exist */ +#ifndef inline +# define inline +#endif +#ifndef restrict +# define restrict +#endif + +#endif /* NASM_CONFIG_UNKNOWN_H */ diff --git a/include/config/watcom.h b/include/config/watcom.h new file mode 100644 index 0000000..bcecb61 --- /dev/null +++ b/include/config/watcom.h @@ -0,0 +1,75 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 2016 The NASM Authors - All Rights Reserved */ + +/* + * config/watcom.h + * + * Compiler definitions for OpenWatcom instead of config.h.in. + * See config.h.in for the variables which can be defined here. + * + * This was taken from openwcom.mak and needs to be actually validated. + */ + +#ifndef NASM_CONFIG_WATCOM_H +#define NASM_CONFIG_WATCOM_H + +#define HAVE_DECL_STRCASECMP 1 +#define HAVE_DECL_STRICMP 1 +#define HAVE_DECL_STRLCPY 1 +#define HAVE_DECL_STRNCASECMP 1 +#define HAVE_DECL_STRNICMP 1 +#ifndef __LINUX__ +#define HAVE_IO_H 1 +#endif +#define HAVE_LIMITS_H 1 +#define HAVE_MEMORY_H 1 +#define HAVE_SNPRINTF 1 +#if (__WATCOMC__ >= 1230) +#undef HAVE__BOOL /* need stdbool.h */ +#define HAVE_STDBOOL_H 1 +#define HAVE_INTTYPES_H 1 +#define HAVE_STDINT_H 1 +#define HAVE_UINTPTR_T 1 +#endif +#define HAVE_STDLIB_H 1 +#define HAVE_STRCSPN 1 +#define HAVE_STRICMP 1 +#define HAVE_STRNICMP 1 +#define HAVE_STRSPN 1 +#define HAVE_STRING_H 1 +#if (__WATCOMC__ >= 1240) +#define HAVE_STRCASECMP 1 +#define HAVE_STRNCASECMP 1 +#define HAVE_STRLCPY 1 +#define HAVE_STRINGS_H 1 +#endif +#define HAVE_SYS_STAT_H 1 +#define HAVE_SYS_TYPES_H 1 +#define HAVE_FCNTL_H 1 +#define HAVE_UNISTD_H 1 +#define HAVE_VSNPRINTF 1 +#define STDC_HEADERS 1 + +#define HAVE__FULLPATH 1 +#define HAVE_ACCESS +#define HAVE_STRUCT_STAT +#define HAVE_STAT +#define HAVE_FSTAT +#define HAVE_FILENO +#ifdef __LINUX__ +#define HAVE_FTRUNCATE +#else +#define HAVE_CHSIZE +#define HAVE__CHSIZE +#endif +#define HAVE_ISASCII +#define HAVE_ISCNTRL + +#if (__WATCOMC__ >= 1250) +#define restrict __restrict +#else +#define restrict +#endif +#define inline __inline + +#endif /* NASM_CONFIG_WATCOM_H */ diff --git a/include/crc32.h b/include/crc32.h new file mode 100644 index 0000000..137df68 --- /dev/null +++ b/include/crc32.h @@ -0,0 +1,9446 @@ +/* crc32.h -- tables for rapid CRC calculation + * Generated automatically by crc32.c + */ + +local const z_crc_t FAR crc_table[] = { + 0x00000000, 0x77073096, 0xee0e612c, 0x990951ba, 0x076dc419, + 0x706af48f, 0xe963a535, 0x9e6495a3, 0x0edb8832, 0x79dcb8a4, + 0xe0d5e91e, 0x97d2d988, 0x09b64c2b, 0x7eb17cbd, 0xe7b82d07, + 0x90bf1d91, 0x1db71064, 0x6ab020f2, 0xf3b97148, 0x84be41de, + 0x1adad47d, 0x6ddde4eb, 0xf4d4b551, 0x83d385c7, 0x136c9856, + 0x646ba8c0, 0xfd62f97a, 0x8a65c9ec, 0x14015c4f, 0x63066cd9, + 0xfa0f3d63, 0x8d080df5, 0x3b6e20c8, 0x4c69105e, 0xd56041e4, + 0xa2677172, 0x3c03e4d1, 0x4b04d447, 0xd20d85fd, 0xa50ab56b, + 0x35b5a8fa, 0x42b2986c, 0xdbbbc9d6, 0xacbcf940, 0x32d86ce3, + 0x45df5c75, 0xdcd60dcf, 0xabd13d59, 0x26d930ac, 0x51de003a, + 0xc8d75180, 0xbfd06116, 0x21b4f4b5, 0x56b3c423, 0xcfba9599, + 0xb8bda50f, 0x2802b89e, 0x5f058808, 0xc60cd9b2, 0xb10be924, + 0x2f6f7c87, 0x58684c11, 0xc1611dab, 0xb6662d3d, 0x76dc4190, + 0x01db7106, 0x98d220bc, 0xefd5102a, 0x71b18589, 0x06b6b51f, + 0x9fbfe4a5, 0xe8b8d433, 0x7807c9a2, 0x0f00f934, 0x9609a88e, + 0xe10e9818, 0x7f6a0dbb, 0x086d3d2d, 0x91646c97, 0xe6635c01, + 0x6b6b51f4, 0x1c6c6162, 0x856530d8, 0xf262004e, 0x6c0695ed, + 0x1b01a57b, 0x8208f4c1, 0xf50fc457, 0x65b0d9c6, 0x12b7e950, + 0x8bbeb8ea, 0xfcb9887c, 0x62dd1ddf, 0x15da2d49, 0x8cd37cf3, + 0xfbd44c65, 0x4db26158, 0x3ab551ce, 0xa3bc0074, 0xd4bb30e2, + 0x4adfa541, 0x3dd895d7, 0xa4d1c46d, 0xd3d6f4fb, 0x4369e96a, + 0x346ed9fc, 0xad678846, 0xda60b8d0, 0x44042d73, 0x33031de5, + 0xaa0a4c5f, 0xdd0d7cc9, 0x5005713c, 0x270241aa, 0xbe0b1010, + 0xc90c2086, 0x5768b525, 0x206f85b3, 0xb966d409, 0xce61e49f, + 0x5edef90e, 0x29d9c998, 0xb0d09822, 0xc7d7a8b4, 0x59b33d17, + 0x2eb40d81, 0xb7bd5c3b, 0xc0ba6cad, 0xedb88320, 0x9abfb3b6, + 0x03b6e20c, 0x74b1d29a, 0xead54739, 0x9dd277af, 0x04db2615, + 0x73dc1683, 0xe3630b12, 0x94643b84, 0x0d6d6a3e, 0x7a6a5aa8, + 0xe40ecf0b, 0x9309ff9d, 0x0a00ae27, 0x7d079eb1, 0xf00f9344, + 0x8708a3d2, 0x1e01f268, 0x6906c2fe, 0xf762575d, 0x806567cb, + 0x196c3671, 0x6e6b06e7, 0xfed41b76, 0x89d32be0, 0x10da7a5a, + 0x67dd4acc, 0xf9b9df6f, 0x8ebeeff9, 0x17b7be43, 0x60b08ed5, + 0xd6d6a3e8, 0xa1d1937e, 0x38d8c2c4, 0x4fdff252, 0xd1bb67f1, + 0xa6bc5767, 0x3fb506dd, 0x48b2364b, 0xd80d2bda, 0xaf0a1b4c, + 0x36034af6, 0x41047a60, 0xdf60efc3, 0xa867df55, 0x316e8eef, + 0x4669be79, 0xcb61b38c, 0xbc66831a, 0x256fd2a0, 0x5268e236, + 0xcc0c7795, 0xbb0b4703, 0x220216b9, 0x5505262f, 0xc5ba3bbe, + 0xb2bd0b28, 0x2bb45a92, 0x5cb36a04, 0xc2d7ffa7, 0xb5d0cf31, + 0x2cd99e8b, 0x5bdeae1d, 0x9b64c2b0, 0xec63f226, 0x756aa39c, + 0x026d930a, 0x9c0906a9, 0xeb0e363f, 0x72076785, 0x05005713, + 0x95bf4a82, 0xe2b87a14, 0x7bb12bae, 0x0cb61b38, 0x92d28e9b, + 0xe5d5be0d, 0x7cdcefb7, 0x0bdbdf21, 0x86d3d2d4, 0xf1d4e242, + 0x68ddb3f8, 0x1fda836e, 0x81be16cd, 0xf6b9265b, 0x6fb077e1, + 0x18b74777, 0x88085ae6, 0xff0f6a70, 0x66063bca, 0x11010b5c, + 0x8f659eff, 0xf862ae69, 0x616bffd3, 0x166ccf45, 0xa00ae278, + 0xd70dd2ee, 0x4e048354, 0x3903b3c2, 0xa7672661, 0xd06016f7, + 0x4969474d, 0x3e6e77db, 0xaed16a4a, 0xd9d65adc, 0x40df0b66, + 0x37d83bf0, 0xa9bcae53, 0xdebb9ec5, 0x47b2cf7f, 0x30b5ffe9, + 0xbdbdf21c, 0xcabac28a, 0x53b39330, 0x24b4a3a6, 0xbad03605, + 0xcdd70693, 0x54de5729, 0x23d967bf, 0xb3667a2e, 0xc4614ab8, + 0x5d681b02, 0x2a6f2b94, 0xb40bbe37, 0xc30c8ea1, 0x5a05df1b, + 0x2d02ef8d}; + +#ifdef W + +#if W == 8 + +local const z_word_t FAR crc_big_table[] = { + 0x0000000000000000, 0x9630077700000000, 0x2c610eee00000000, + 0xba51099900000000, 0x19c46d0700000000, 0x8ff46a7000000000, + 0x35a563e900000000, 0xa395649e00000000, 0x3288db0e00000000, + 0xa4b8dc7900000000, 0x1ee9d5e000000000, 0x88d9d29700000000, + 0x2b4cb60900000000, 0xbd7cb17e00000000, 0x072db8e700000000, + 0x911dbf9000000000, 0x6410b71d00000000, 0xf220b06a00000000, + 0x4871b9f300000000, 0xde41be8400000000, 0x7dd4da1a00000000, + 0xebe4dd6d00000000, 0x51b5d4f400000000, 0xc785d38300000000, + 0x56986c1300000000, 0xc0a86b6400000000, 0x7af962fd00000000, + 0xecc9658a00000000, 0x4f5c011400000000, 0xd96c066300000000, + 0x633d0ffa00000000, 0xf50d088d00000000, 0xc8206e3b00000000, + 0x5e10694c00000000, 0xe44160d500000000, 0x727167a200000000, + 0xd1e4033c00000000, 0x47d4044b00000000, 0xfd850dd200000000, + 0x6bb50aa500000000, 0xfaa8b53500000000, 0x6c98b24200000000, + 0xd6c9bbdb00000000, 0x40f9bcac00000000, 0xe36cd83200000000, + 0x755cdf4500000000, 0xcf0dd6dc00000000, 0x593dd1ab00000000, + 0xac30d92600000000, 0x3a00de5100000000, 0x8051d7c800000000, + 0x1661d0bf00000000, 0xb5f4b42100000000, 0x23c4b35600000000, + 0x9995bacf00000000, 0x0fa5bdb800000000, 0x9eb8022800000000, + 0x0888055f00000000, 0xb2d90cc600000000, 0x24e90bb100000000, + 0x877c6f2f00000000, 0x114c685800000000, 0xab1d61c100000000, + 0x3d2d66b600000000, 0x9041dc7600000000, 0x0671db0100000000, + 0xbc20d29800000000, 0x2a10d5ef00000000, 0x8985b17100000000, + 0x1fb5b60600000000, 0xa5e4bf9f00000000, 0x33d4b8e800000000, + 0xa2c9077800000000, 0x34f9000f00000000, 0x8ea8099600000000, + 0x18980ee100000000, 0xbb0d6a7f00000000, 0x2d3d6d0800000000, + 0x976c649100000000, 0x015c63e600000000, 0xf4516b6b00000000, + 0x62616c1c00000000, 0xd830658500000000, 0x4e0062f200000000, + 0xed95066c00000000, 0x7ba5011b00000000, 0xc1f4088200000000, + 0x57c40ff500000000, 0xc6d9b06500000000, 0x50e9b71200000000, + 0xeab8be8b00000000, 0x7c88b9fc00000000, 0xdf1ddd6200000000, + 0x492dda1500000000, 0xf37cd38c00000000, 0x654cd4fb00000000, + 0x5861b24d00000000, 0xce51b53a00000000, 0x7400bca300000000, + 0xe230bbd400000000, 0x41a5df4a00000000, 0xd795d83d00000000, + 0x6dc4d1a400000000, 0xfbf4d6d300000000, 0x6ae9694300000000, + 0xfcd96e3400000000, 0x468867ad00000000, 0xd0b860da00000000, + 0x732d044400000000, 0xe51d033300000000, 0x5f4c0aaa00000000, + 0xc97c0ddd00000000, 0x3c71055000000000, 0xaa41022700000000, + 0x10100bbe00000000, 0x86200cc900000000, 0x25b5685700000000, + 0xb3856f2000000000, 0x09d466b900000000, 0x9fe461ce00000000, + 0x0ef9de5e00000000, 0x98c9d92900000000, 0x2298d0b000000000, + 0xb4a8d7c700000000, 0x173db35900000000, 0x810db42e00000000, + 0x3b5cbdb700000000, 0xad6cbac000000000, 0x2083b8ed00000000, + 0xb6b3bf9a00000000, 0x0ce2b60300000000, 0x9ad2b17400000000, + 0x3947d5ea00000000, 0xaf77d29d00000000, 0x1526db0400000000, + 0x8316dc7300000000, 0x120b63e300000000, 0x843b649400000000, + 0x3e6a6d0d00000000, 0xa85a6a7a00000000, 0x0bcf0ee400000000, + 0x9dff099300000000, 0x27ae000a00000000, 0xb19e077d00000000, + 0x44930ff000000000, 0xd2a3088700000000, 0x68f2011e00000000, + 0xfec2066900000000, 0x5d5762f700000000, 0xcb67658000000000, + 0x71366c1900000000, 0xe7066b6e00000000, 0x761bd4fe00000000, + 0xe02bd38900000000, 0x5a7ada1000000000, 0xcc4add6700000000, + 0x6fdfb9f900000000, 0xf9efbe8e00000000, 0x43beb71700000000, + 0xd58eb06000000000, 0xe8a3d6d600000000, 0x7e93d1a100000000, + 0xc4c2d83800000000, 0x52f2df4f00000000, 0xf167bbd100000000, + 0x6757bca600000000, 0xdd06b53f00000000, 0x4b36b24800000000, + 0xda2b0dd800000000, 0x4c1b0aaf00000000, 0xf64a033600000000, + 0x607a044100000000, 0xc3ef60df00000000, 0x55df67a800000000, + 0xef8e6e3100000000, 0x79be694600000000, 0x8cb361cb00000000, + 0x1a8366bc00000000, 0xa0d26f2500000000, 0x36e2685200000000, + 0x95770ccc00000000, 0x03470bbb00000000, 0xb916022200000000, + 0x2f26055500000000, 0xbe3bbac500000000, 0x280bbdb200000000, + 0x925ab42b00000000, 0x046ab35c00000000, 0xa7ffd7c200000000, + 0x31cfd0b500000000, 0x8b9ed92c00000000, 0x1daede5b00000000, + 0xb0c2649b00000000, 0x26f263ec00000000, 0x9ca36a7500000000, + 0x0a936d0200000000, 0xa906099c00000000, 0x3f360eeb00000000, + 0x8567077200000000, 0x1357000500000000, 0x824abf9500000000, + 0x147ab8e200000000, 0xae2bb17b00000000, 0x381bb60c00000000, + 0x9b8ed29200000000, 0x0dbed5e500000000, 0xb7efdc7c00000000, + 0x21dfdb0b00000000, 0xd4d2d38600000000, 0x42e2d4f100000000, + 0xf8b3dd6800000000, 0x6e83da1f00000000, 0xcd16be8100000000, + 0x5b26b9f600000000, 0xe177b06f00000000, 0x7747b71800000000, + 0xe65a088800000000, 0x706a0fff00000000, 0xca3b066600000000, + 0x5c0b011100000000, 0xff9e658f00000000, 0x69ae62f800000000, + 0xd3ff6b6100000000, 0x45cf6c1600000000, 0x78e20aa000000000, + 0xeed20dd700000000, 0x5483044e00000000, 0xc2b3033900000000, + 0x612667a700000000, 0xf71660d000000000, 0x4d47694900000000, + 0xdb776e3e00000000, 0x4a6ad1ae00000000, 0xdc5ad6d900000000, + 0x660bdf4000000000, 0xf03bd83700000000, 0x53aebca900000000, + 0xc59ebbde00000000, 0x7fcfb24700000000, 0xe9ffb53000000000, + 0x1cf2bdbd00000000, 0x8ac2baca00000000, 0x3093b35300000000, + 0xa6a3b42400000000, 0x0536d0ba00000000, 0x9306d7cd00000000, + 0x2957de5400000000, 0xbf67d92300000000, 0x2e7a66b300000000, + 0xb84a61c400000000, 0x021b685d00000000, 0x942b6f2a00000000, + 0x37be0bb400000000, 0xa18e0cc300000000, 0x1bdf055a00000000, + 0x8def022d00000000}; + +#else /* W == 4 */ + +local const z_word_t FAR crc_big_table[] = { + 0x00000000, 0x96300777, 0x2c610eee, 0xba510999, 0x19c46d07, + 0x8ff46a70, 0x35a563e9, 0xa395649e, 0x3288db0e, 0xa4b8dc79, + 0x1ee9d5e0, 0x88d9d297, 0x2b4cb609, 0xbd7cb17e, 0x072db8e7, + 0x911dbf90, 0x6410b71d, 0xf220b06a, 0x4871b9f3, 0xde41be84, + 0x7dd4da1a, 0xebe4dd6d, 0x51b5d4f4, 0xc785d383, 0x56986c13, + 0xc0a86b64, 0x7af962fd, 0xecc9658a, 0x4f5c0114, 0xd96c0663, + 0x633d0ffa, 0xf50d088d, 0xc8206e3b, 0x5e10694c, 0xe44160d5, + 0x727167a2, 0xd1e4033c, 0x47d4044b, 0xfd850dd2, 0x6bb50aa5, + 0xfaa8b535, 0x6c98b242, 0xd6c9bbdb, 0x40f9bcac, 0xe36cd832, + 0x755cdf45, 0xcf0dd6dc, 0x593dd1ab, 0xac30d926, 0x3a00de51, + 0x8051d7c8, 0x1661d0bf, 0xb5f4b421, 0x23c4b356, 0x9995bacf, + 0x0fa5bdb8, 0x9eb80228, 0x0888055f, 0xb2d90cc6, 0x24e90bb1, + 0x877c6f2f, 0x114c6858, 0xab1d61c1, 0x3d2d66b6, 0x9041dc76, + 0x0671db01, 0xbc20d298, 0x2a10d5ef, 0x8985b171, 0x1fb5b606, + 0xa5e4bf9f, 0x33d4b8e8, 0xa2c90778, 0x34f9000f, 0x8ea80996, + 0x18980ee1, 0xbb0d6a7f, 0x2d3d6d08, 0x976c6491, 0x015c63e6, + 0xf4516b6b, 0x62616c1c, 0xd8306585, 0x4e0062f2, 0xed95066c, + 0x7ba5011b, 0xc1f40882, 0x57c40ff5, 0xc6d9b065, 0x50e9b712, + 0xeab8be8b, 0x7c88b9fc, 0xdf1ddd62, 0x492dda15, 0xf37cd38c, + 0x654cd4fb, 0x5861b24d, 0xce51b53a, 0x7400bca3, 0xe230bbd4, + 0x41a5df4a, 0xd795d83d, 0x6dc4d1a4, 0xfbf4d6d3, 0x6ae96943, + 0xfcd96e34, 0x468867ad, 0xd0b860da, 0x732d0444, 0xe51d0333, + 0x5f4c0aaa, 0xc97c0ddd, 0x3c710550, 0xaa410227, 0x10100bbe, + 0x86200cc9, 0x25b56857, 0xb3856f20, 0x09d466b9, 0x9fe461ce, + 0x0ef9de5e, 0x98c9d929, 0x2298d0b0, 0xb4a8d7c7, 0x173db359, + 0x810db42e, 0x3b5cbdb7, 0xad6cbac0, 0x2083b8ed, 0xb6b3bf9a, + 0x0ce2b603, 0x9ad2b174, 0x3947d5ea, 0xaf77d29d, 0x1526db04, + 0x8316dc73, 0x120b63e3, 0x843b6494, 0x3e6a6d0d, 0xa85a6a7a, + 0x0bcf0ee4, 0x9dff0993, 0x27ae000a, 0xb19e077d, 0x44930ff0, + 0xd2a30887, 0x68f2011e, 0xfec20669, 0x5d5762f7, 0xcb676580, + 0x71366c19, 0xe7066b6e, 0x761bd4fe, 0xe02bd389, 0x5a7ada10, + 0xcc4add67, 0x6fdfb9f9, 0xf9efbe8e, 0x43beb717, 0xd58eb060, + 0xe8a3d6d6, 0x7e93d1a1, 0xc4c2d838, 0x52f2df4f, 0xf167bbd1, + 0x6757bca6, 0xdd06b53f, 0x4b36b248, 0xda2b0dd8, 0x4c1b0aaf, + 0xf64a0336, 0x607a0441, 0xc3ef60df, 0x55df67a8, 0xef8e6e31, + 0x79be6946, 0x8cb361cb, 0x1a8366bc, 0xa0d26f25, 0x36e26852, + 0x95770ccc, 0x03470bbb, 0xb9160222, 0x2f260555, 0xbe3bbac5, + 0x280bbdb2, 0x925ab42b, 0x046ab35c, 0xa7ffd7c2, 0x31cfd0b5, + 0x8b9ed92c, 0x1daede5b, 0xb0c2649b, 0x26f263ec, 0x9ca36a75, + 0x0a936d02, 0xa906099c, 0x3f360eeb, 0x85670772, 0x13570005, + 0x824abf95, 0x147ab8e2, 0xae2bb17b, 0x381bb60c, 0x9b8ed292, + 0x0dbed5e5, 0xb7efdc7c, 0x21dfdb0b, 0xd4d2d386, 0x42e2d4f1, + 0xf8b3dd68, 0x6e83da1f, 0xcd16be81, 0x5b26b9f6, 0xe177b06f, + 0x7747b718, 0xe65a0888, 0x706a0fff, 0xca3b0666, 0x5c0b0111, + 0xff9e658f, 0x69ae62f8, 0xd3ff6b61, 0x45cf6c16, 0x78e20aa0, + 0xeed20dd7, 0x5483044e, 0xc2b30339, 0x612667a7, 0xf71660d0, + 0x4d476949, 0xdb776e3e, 0x4a6ad1ae, 0xdc5ad6d9, 0x660bdf40, + 0xf03bd837, 0x53aebca9, 0xc59ebbde, 0x7fcfb247, 0xe9ffb530, + 0x1cf2bdbd, 0x8ac2baca, 0x3093b353, 0xa6a3b424, 0x0536d0ba, + 0x9306d7cd, 0x2957de54, 0xbf67d923, 0x2e7a66b3, 0xb84a61c4, + 0x021b685d, 0x942b6f2a, 0x37be0bb4, 0xa18e0cc3, 0x1bdf055a, + 0x8def022d}; + +#endif + +#if N == 1 + +#if W == 8 + +local const z_crc_t FAR crc_braid_table[][256] = { + {0x00000000, 0xccaa009e, 0x4225077d, 0x8e8f07e3, 0x844a0efa, + 0x48e00e64, 0xc66f0987, 0x0ac50919, 0xd3e51bb5, 0x1f4f1b2b, + 0x91c01cc8, 0x5d6a1c56, 0x57af154f, 0x9b0515d1, 0x158a1232, + 0xd92012ac, 0x7cbb312b, 0xb01131b5, 0x3e9e3656, 0xf23436c8, + 0xf8f13fd1, 0x345b3f4f, 0xbad438ac, 0x767e3832, 0xaf5e2a9e, + 0x63f42a00, 0xed7b2de3, 0x21d12d7d, 0x2b142464, 0xe7be24fa, + 0x69312319, 0xa59b2387, 0xf9766256, 0x35dc62c8, 0xbb53652b, + 0x77f965b5, 0x7d3c6cac, 0xb1966c32, 0x3f196bd1, 0xf3b36b4f, + 0x2a9379e3, 0xe639797d, 0x68b67e9e, 0xa41c7e00, 0xaed97719, + 0x62737787, 0xecfc7064, 0x205670fa, 0x85cd537d, 0x496753e3, + 0xc7e85400, 0x0b42549e, 0x01875d87, 0xcd2d5d19, 0x43a25afa, + 0x8f085a64, 0x562848c8, 0x9a824856, 0x140d4fb5, 0xd8a74f2b, + 0xd2624632, 0x1ec846ac, 0x9047414f, 0x5ced41d1, 0x299dc2ed, + 0xe537c273, 0x6bb8c590, 0xa712c50e, 0xadd7cc17, 0x617dcc89, + 0xeff2cb6a, 0x2358cbf4, 0xfa78d958, 0x36d2d9c6, 0xb85dde25, + 0x74f7debb, 0x7e32d7a2, 0xb298d73c, 0x3c17d0df, 0xf0bdd041, + 0x5526f3c6, 0x998cf358, 0x1703f4bb, 0xdba9f425, 0xd16cfd3c, + 0x1dc6fda2, 0x9349fa41, 0x5fe3fadf, 0x86c3e873, 0x4a69e8ed, + 0xc4e6ef0e, 0x084cef90, 0x0289e689, 0xce23e617, 0x40ace1f4, + 0x8c06e16a, 0xd0eba0bb, 0x1c41a025, 0x92cea7c6, 0x5e64a758, + 0x54a1ae41, 0x980baedf, 0x1684a93c, 0xda2ea9a2, 0x030ebb0e, + 0xcfa4bb90, 0x412bbc73, 0x8d81bced, 0x8744b5f4, 0x4beeb56a, + 0xc561b289, 0x09cbb217, 0xac509190, 0x60fa910e, 0xee7596ed, + 0x22df9673, 0x281a9f6a, 0xe4b09ff4, 0x6a3f9817, 0xa6959889, + 0x7fb58a25, 0xb31f8abb, 0x3d908d58, 0xf13a8dc6, 0xfbff84df, + 0x37558441, 0xb9da83a2, 0x7570833c, 0x533b85da, 0x9f918544, + 0x111e82a7, 0xddb48239, 0xd7718b20, 0x1bdb8bbe, 0x95548c5d, + 0x59fe8cc3, 0x80de9e6f, 0x4c749ef1, 0xc2fb9912, 0x0e51998c, + 0x04949095, 0xc83e900b, 0x46b197e8, 0x8a1b9776, 0x2f80b4f1, + 0xe32ab46f, 0x6da5b38c, 0xa10fb312, 0xabcaba0b, 0x6760ba95, + 0xe9efbd76, 0x2545bde8, 0xfc65af44, 0x30cfafda, 0xbe40a839, + 0x72eaa8a7, 0x782fa1be, 0xb485a120, 0x3a0aa6c3, 0xf6a0a65d, + 0xaa4de78c, 0x66e7e712, 0xe868e0f1, 0x24c2e06f, 0x2e07e976, + 0xe2ade9e8, 0x6c22ee0b, 0xa088ee95, 0x79a8fc39, 0xb502fca7, + 0x3b8dfb44, 0xf727fbda, 0xfde2f2c3, 0x3148f25d, 0xbfc7f5be, + 0x736df520, 0xd6f6d6a7, 0x1a5cd639, 0x94d3d1da, 0x5879d144, + 0x52bcd85d, 0x9e16d8c3, 0x1099df20, 0xdc33dfbe, 0x0513cd12, + 0xc9b9cd8c, 0x4736ca6f, 0x8b9ccaf1, 0x8159c3e8, 0x4df3c376, + 0xc37cc495, 0x0fd6c40b, 0x7aa64737, 0xb60c47a9, 0x3883404a, + 0xf42940d4, 0xfeec49cd, 0x32464953, 0xbcc94eb0, 0x70634e2e, + 0xa9435c82, 0x65e95c1c, 0xeb665bff, 0x27cc5b61, 0x2d095278, + 0xe1a352e6, 0x6f2c5505, 0xa386559b, 0x061d761c, 0xcab77682, + 0x44387161, 0x889271ff, 0x825778e6, 0x4efd7878, 0xc0727f9b, + 0x0cd87f05, 0xd5f86da9, 0x19526d37, 0x97dd6ad4, 0x5b776a4a, + 0x51b26353, 0x9d1863cd, 0x1397642e, 0xdf3d64b0, 0x83d02561, + 0x4f7a25ff, 0xc1f5221c, 0x0d5f2282, 0x079a2b9b, 0xcb302b05, + 0x45bf2ce6, 0x89152c78, 0x50353ed4, 0x9c9f3e4a, 0x121039a9, + 0xdeba3937, 0xd47f302e, 0x18d530b0, 0x965a3753, 0x5af037cd, + 0xff6b144a, 0x33c114d4, 0xbd4e1337, 0x71e413a9, 0x7b211ab0, + 0xb78b1a2e, 0x39041dcd, 0xf5ae1d53, 0x2c8e0fff, 0xe0240f61, + 0x6eab0882, 0xa201081c, 0xa8c40105, 0x646e019b, 0xeae10678, + 0x264b06e6}, + {0x00000000, 0xa6770bb4, 0x979f1129, 0x31e81a9d, 0xf44f2413, + 0x52382fa7, 0x63d0353a, 0xc5a73e8e, 0x33ef4e67, 0x959845d3, + 0xa4705f4e, 0x020754fa, 0xc7a06a74, 0x61d761c0, 0x503f7b5d, + 0xf64870e9, 0x67de9cce, 0xc1a9977a, 0xf0418de7, 0x56368653, + 0x9391b8dd, 0x35e6b369, 0x040ea9f4, 0xa279a240, 0x5431d2a9, + 0xf246d91d, 0xc3aec380, 0x65d9c834, 0xa07ef6ba, 0x0609fd0e, + 0x37e1e793, 0x9196ec27, 0xcfbd399c, 0x69ca3228, 0x582228b5, + 0xfe552301, 0x3bf21d8f, 0x9d85163b, 0xac6d0ca6, 0x0a1a0712, + 0xfc5277fb, 0x5a257c4f, 0x6bcd66d2, 0xcdba6d66, 0x081d53e8, + 0xae6a585c, 0x9f8242c1, 0x39f54975, 0xa863a552, 0x0e14aee6, + 0x3ffcb47b, 0x998bbfcf, 0x5c2c8141, 0xfa5b8af5, 0xcbb39068, + 0x6dc49bdc, 0x9b8ceb35, 0x3dfbe081, 0x0c13fa1c, 0xaa64f1a8, + 0x6fc3cf26, 0xc9b4c492, 0xf85cde0f, 0x5e2bd5bb, 0x440b7579, + 0xe27c7ecd, 0xd3946450, 0x75e36fe4, 0xb044516a, 0x16335ade, + 0x27db4043, 0x81ac4bf7, 0x77e43b1e, 0xd19330aa, 0xe07b2a37, + 0x460c2183, 0x83ab1f0d, 0x25dc14b9, 0x14340e24, 0xb2430590, + 0x23d5e9b7, 0x85a2e203, 0xb44af89e, 0x123df32a, 0xd79acda4, + 0x71edc610, 0x4005dc8d, 0xe672d739, 0x103aa7d0, 0xb64dac64, + 0x87a5b6f9, 0x21d2bd4d, 0xe47583c3, 0x42028877, 0x73ea92ea, + 0xd59d995e, 0x8bb64ce5, 0x2dc14751, 0x1c295dcc, 0xba5e5678, + 0x7ff968f6, 0xd98e6342, 0xe86679df, 0x4e11726b, 0xb8590282, + 0x1e2e0936, 0x2fc613ab, 0x89b1181f, 0x4c162691, 0xea612d25, + 0xdb8937b8, 0x7dfe3c0c, 0xec68d02b, 0x4a1fdb9f, 0x7bf7c102, + 0xdd80cab6, 0x1827f438, 0xbe50ff8c, 0x8fb8e511, 0x29cfeea5, + 0xdf879e4c, 0x79f095f8, 0x48188f65, 0xee6f84d1, 0x2bc8ba5f, + 0x8dbfb1eb, 0xbc57ab76, 0x1a20a0c2, 0x8816eaf2, 0x2e61e146, + 0x1f89fbdb, 0xb9fef06f, 0x7c59cee1, 0xda2ec555, 0xebc6dfc8, + 0x4db1d47c, 0xbbf9a495, 0x1d8eaf21, 0x2c66b5bc, 0x8a11be08, + 0x4fb68086, 0xe9c18b32, 0xd82991af, 0x7e5e9a1b, 0xefc8763c, + 0x49bf7d88, 0x78576715, 0xde206ca1, 0x1b87522f, 0xbdf0599b, + 0x8c184306, 0x2a6f48b2, 0xdc27385b, 0x7a5033ef, 0x4bb82972, + 0xedcf22c6, 0x28681c48, 0x8e1f17fc, 0xbff70d61, 0x198006d5, + 0x47abd36e, 0xe1dcd8da, 0xd034c247, 0x7643c9f3, 0xb3e4f77d, + 0x1593fcc9, 0x247be654, 0x820cede0, 0x74449d09, 0xd23396bd, + 0xe3db8c20, 0x45ac8794, 0x800bb91a, 0x267cb2ae, 0x1794a833, + 0xb1e3a387, 0x20754fa0, 0x86024414, 0xb7ea5e89, 0x119d553d, + 0xd43a6bb3, 0x724d6007, 0x43a57a9a, 0xe5d2712e, 0x139a01c7, + 0xb5ed0a73, 0x840510ee, 0x22721b5a, 0xe7d525d4, 0x41a22e60, + 0x704a34fd, 0xd63d3f49, 0xcc1d9f8b, 0x6a6a943f, 0x5b828ea2, + 0xfdf58516, 0x3852bb98, 0x9e25b02c, 0xafcdaab1, 0x09baa105, + 0xfff2d1ec, 0x5985da58, 0x686dc0c5, 0xce1acb71, 0x0bbdf5ff, + 0xadcafe4b, 0x9c22e4d6, 0x3a55ef62, 0xabc30345, 0x0db408f1, + 0x3c5c126c, 0x9a2b19d8, 0x5f8c2756, 0xf9fb2ce2, 0xc813367f, + 0x6e643dcb, 0x982c4d22, 0x3e5b4696, 0x0fb35c0b, 0xa9c457bf, + 0x6c636931, 0xca146285, 0xfbfc7818, 0x5d8b73ac, 0x03a0a617, + 0xa5d7ada3, 0x943fb73e, 0x3248bc8a, 0xf7ef8204, 0x519889b0, + 0x6070932d, 0xc6079899, 0x304fe870, 0x9638e3c4, 0xa7d0f959, + 0x01a7f2ed, 0xc400cc63, 0x6277c7d7, 0x539fdd4a, 0xf5e8d6fe, + 0x647e3ad9, 0xc209316d, 0xf3e12bf0, 0x55962044, 0x90311eca, + 0x3646157e, 0x07ae0fe3, 0xa1d90457, 0x579174be, 0xf1e67f0a, + 0xc00e6597, 0x66796e23, 0xa3de50ad, 0x05a95b19, 0x34414184, + 0x92364a30}, + {0x00000000, 0xcb5cd3a5, 0x4dc8a10b, 0x869472ae, 0x9b914216, + 0x50cd91b3, 0xd659e31d, 0x1d0530b8, 0xec53826d, 0x270f51c8, + 0xa19b2366, 0x6ac7f0c3, 0x77c2c07b, 0xbc9e13de, 0x3a0a6170, + 0xf156b2d5, 0x03d6029b, 0xc88ad13e, 0x4e1ea390, 0x85427035, + 0x9847408d, 0x531b9328, 0xd58fe186, 0x1ed33223, 0xef8580f6, + 0x24d95353, 0xa24d21fd, 0x6911f258, 0x7414c2e0, 0xbf481145, + 0x39dc63eb, 0xf280b04e, 0x07ac0536, 0xccf0d693, 0x4a64a43d, + 0x81387798, 0x9c3d4720, 0x57619485, 0xd1f5e62b, 0x1aa9358e, + 0xebff875b, 0x20a354fe, 0xa6372650, 0x6d6bf5f5, 0x706ec54d, + 0xbb3216e8, 0x3da66446, 0xf6fab7e3, 0x047a07ad, 0xcf26d408, + 0x49b2a6a6, 0x82ee7503, 0x9feb45bb, 0x54b7961e, 0xd223e4b0, + 0x197f3715, 0xe82985c0, 0x23755665, 0xa5e124cb, 0x6ebdf76e, + 0x73b8c7d6, 0xb8e41473, 0x3e7066dd, 0xf52cb578, 0x0f580a6c, + 0xc404d9c9, 0x4290ab67, 0x89cc78c2, 0x94c9487a, 0x5f959bdf, + 0xd901e971, 0x125d3ad4, 0xe30b8801, 0x28575ba4, 0xaec3290a, + 0x659ffaaf, 0x789aca17, 0xb3c619b2, 0x35526b1c, 0xfe0eb8b9, + 0x0c8e08f7, 0xc7d2db52, 0x4146a9fc, 0x8a1a7a59, 0x971f4ae1, + 0x5c439944, 0xdad7ebea, 0x118b384f, 0xe0dd8a9a, 0x2b81593f, + 0xad152b91, 0x6649f834, 0x7b4cc88c, 0xb0101b29, 0x36846987, + 0xfdd8ba22, 0x08f40f5a, 0xc3a8dcff, 0x453cae51, 0x8e607df4, + 0x93654d4c, 0x58399ee9, 0xdeadec47, 0x15f13fe2, 0xe4a78d37, + 0x2ffb5e92, 0xa96f2c3c, 0x6233ff99, 0x7f36cf21, 0xb46a1c84, + 0x32fe6e2a, 0xf9a2bd8f, 0x0b220dc1, 0xc07ede64, 0x46eaacca, + 0x8db67f6f, 0x90b34fd7, 0x5bef9c72, 0xdd7beedc, 0x16273d79, + 0xe7718fac, 0x2c2d5c09, 0xaab92ea7, 0x61e5fd02, 0x7ce0cdba, + 0xb7bc1e1f, 0x31286cb1, 0xfa74bf14, 0x1eb014d8, 0xd5ecc77d, + 0x5378b5d3, 0x98246676, 0x852156ce, 0x4e7d856b, 0xc8e9f7c5, + 0x03b52460, 0xf2e396b5, 0x39bf4510, 0xbf2b37be, 0x7477e41b, + 0x6972d4a3, 0xa22e0706, 0x24ba75a8, 0xefe6a60d, 0x1d661643, + 0xd63ac5e6, 0x50aeb748, 0x9bf264ed, 0x86f75455, 0x4dab87f0, + 0xcb3ff55e, 0x006326fb, 0xf135942e, 0x3a69478b, 0xbcfd3525, + 0x77a1e680, 0x6aa4d638, 0xa1f8059d, 0x276c7733, 0xec30a496, + 0x191c11ee, 0xd240c24b, 0x54d4b0e5, 0x9f886340, 0x828d53f8, + 0x49d1805d, 0xcf45f2f3, 0x04192156, 0xf54f9383, 0x3e134026, + 0xb8873288, 0x73dbe12d, 0x6eded195, 0xa5820230, 0x2316709e, + 0xe84aa33b, 0x1aca1375, 0xd196c0d0, 0x5702b27e, 0x9c5e61db, + 0x815b5163, 0x4a0782c6, 0xcc93f068, 0x07cf23cd, 0xf6999118, + 0x3dc542bd, 0xbb513013, 0x700de3b6, 0x6d08d30e, 0xa65400ab, + 0x20c07205, 0xeb9ca1a0, 0x11e81eb4, 0xdab4cd11, 0x5c20bfbf, + 0x977c6c1a, 0x8a795ca2, 0x41258f07, 0xc7b1fda9, 0x0ced2e0c, + 0xfdbb9cd9, 0x36e74f7c, 0xb0733dd2, 0x7b2fee77, 0x662adecf, + 0xad760d6a, 0x2be27fc4, 0xe0beac61, 0x123e1c2f, 0xd962cf8a, + 0x5ff6bd24, 0x94aa6e81, 0x89af5e39, 0x42f38d9c, 0xc467ff32, + 0x0f3b2c97, 0xfe6d9e42, 0x35314de7, 0xb3a53f49, 0x78f9ecec, + 0x65fcdc54, 0xaea00ff1, 0x28347d5f, 0xe368aefa, 0x16441b82, + 0xdd18c827, 0x5b8cba89, 0x90d0692c, 0x8dd55994, 0x46898a31, + 0xc01df89f, 0x0b412b3a, 0xfa1799ef, 0x314b4a4a, 0xb7df38e4, + 0x7c83eb41, 0x6186dbf9, 0xaada085c, 0x2c4e7af2, 0xe712a957, + 0x15921919, 0xdececabc, 0x585ab812, 0x93066bb7, 0x8e035b0f, + 0x455f88aa, 0xc3cbfa04, 0x089729a1, 0xf9c19b74, 0x329d48d1, + 0xb4093a7f, 0x7f55e9da, 0x6250d962, 0xa90c0ac7, 0x2f987869, + 0xe4c4abcc}, + {0x00000000, 0x3d6029b0, 0x7ac05360, 0x47a07ad0, 0xf580a6c0, + 0xc8e08f70, 0x8f40f5a0, 0xb220dc10, 0x30704bc1, 0x0d106271, + 0x4ab018a1, 0x77d03111, 0xc5f0ed01, 0xf890c4b1, 0xbf30be61, + 0x825097d1, 0x60e09782, 0x5d80be32, 0x1a20c4e2, 0x2740ed52, + 0x95603142, 0xa80018f2, 0xefa06222, 0xd2c04b92, 0x5090dc43, + 0x6df0f5f3, 0x2a508f23, 0x1730a693, 0xa5107a83, 0x98705333, + 0xdfd029e3, 0xe2b00053, 0xc1c12f04, 0xfca106b4, 0xbb017c64, + 0x866155d4, 0x344189c4, 0x0921a074, 0x4e81daa4, 0x73e1f314, + 0xf1b164c5, 0xccd14d75, 0x8b7137a5, 0xb6111e15, 0x0431c205, + 0x3951ebb5, 0x7ef19165, 0x4391b8d5, 0xa121b886, 0x9c419136, + 0xdbe1ebe6, 0xe681c256, 0x54a11e46, 0x69c137f6, 0x2e614d26, + 0x13016496, 0x9151f347, 0xac31daf7, 0xeb91a027, 0xd6f18997, + 0x64d15587, 0x59b17c37, 0x1e1106e7, 0x23712f57, 0x58f35849, + 0x659371f9, 0x22330b29, 0x1f532299, 0xad73fe89, 0x9013d739, + 0xd7b3ade9, 0xead38459, 0x68831388, 0x55e33a38, 0x124340e8, + 0x2f236958, 0x9d03b548, 0xa0639cf8, 0xe7c3e628, 0xdaa3cf98, + 0x3813cfcb, 0x0573e67b, 0x42d39cab, 0x7fb3b51b, 0xcd93690b, + 0xf0f340bb, 0xb7533a6b, 0x8a3313db, 0x0863840a, 0x3503adba, + 0x72a3d76a, 0x4fc3feda, 0xfde322ca, 0xc0830b7a, 0x872371aa, + 0xba43581a, 0x9932774d, 0xa4525efd, 0xe3f2242d, 0xde920d9d, + 0x6cb2d18d, 0x51d2f83d, 0x167282ed, 0x2b12ab5d, 0xa9423c8c, + 0x9422153c, 0xd3826fec, 0xeee2465c, 0x5cc29a4c, 0x61a2b3fc, + 0x2602c92c, 0x1b62e09c, 0xf9d2e0cf, 0xc4b2c97f, 0x8312b3af, + 0xbe729a1f, 0x0c52460f, 0x31326fbf, 0x7692156f, 0x4bf23cdf, + 0xc9a2ab0e, 0xf4c282be, 0xb362f86e, 0x8e02d1de, 0x3c220dce, + 0x0142247e, 0x46e25eae, 0x7b82771e, 0xb1e6b092, 0x8c869922, + 0xcb26e3f2, 0xf646ca42, 0x44661652, 0x79063fe2, 0x3ea64532, + 0x03c66c82, 0x8196fb53, 0xbcf6d2e3, 0xfb56a833, 0xc6368183, + 0x74165d93, 0x49767423, 0x0ed60ef3, 0x33b62743, 0xd1062710, + 0xec660ea0, 0xabc67470, 0x96a65dc0, 0x248681d0, 0x19e6a860, + 0x5e46d2b0, 0x6326fb00, 0xe1766cd1, 0xdc164561, 0x9bb63fb1, + 0xa6d61601, 0x14f6ca11, 0x2996e3a1, 0x6e369971, 0x5356b0c1, + 0x70279f96, 0x4d47b626, 0x0ae7ccf6, 0x3787e546, 0x85a73956, + 0xb8c710e6, 0xff676a36, 0xc2074386, 0x4057d457, 0x7d37fde7, + 0x3a978737, 0x07f7ae87, 0xb5d77297, 0x88b75b27, 0xcf1721f7, + 0xf2770847, 0x10c70814, 0x2da721a4, 0x6a075b74, 0x576772c4, + 0xe547aed4, 0xd8278764, 0x9f87fdb4, 0xa2e7d404, 0x20b743d5, + 0x1dd76a65, 0x5a7710b5, 0x67173905, 0xd537e515, 0xe857cca5, + 0xaff7b675, 0x92979fc5, 0xe915e8db, 0xd475c16b, 0x93d5bbbb, + 0xaeb5920b, 0x1c954e1b, 0x21f567ab, 0x66551d7b, 0x5b3534cb, + 0xd965a31a, 0xe4058aaa, 0xa3a5f07a, 0x9ec5d9ca, 0x2ce505da, + 0x11852c6a, 0x562556ba, 0x6b457f0a, 0x89f57f59, 0xb49556e9, + 0xf3352c39, 0xce550589, 0x7c75d999, 0x4115f029, 0x06b58af9, + 0x3bd5a349, 0xb9853498, 0x84e51d28, 0xc34567f8, 0xfe254e48, + 0x4c059258, 0x7165bbe8, 0x36c5c138, 0x0ba5e888, 0x28d4c7df, + 0x15b4ee6f, 0x521494bf, 0x6f74bd0f, 0xdd54611f, 0xe03448af, + 0xa794327f, 0x9af41bcf, 0x18a48c1e, 0x25c4a5ae, 0x6264df7e, + 0x5f04f6ce, 0xed242ade, 0xd044036e, 0x97e479be, 0xaa84500e, + 0x4834505d, 0x755479ed, 0x32f4033d, 0x0f942a8d, 0xbdb4f69d, + 0x80d4df2d, 0xc774a5fd, 0xfa148c4d, 0x78441b9c, 0x4524322c, + 0x028448fc, 0x3fe4614c, 0x8dc4bd5c, 0xb0a494ec, 0xf704ee3c, + 0xca64c78c}, + {0x00000000, 0xb8bc6765, 0xaa09c88b, 0x12b5afee, 0x8f629757, + 0x37def032, 0x256b5fdc, 0x9dd738b9, 0xc5b428ef, 0x7d084f8a, + 0x6fbde064, 0xd7018701, 0x4ad6bfb8, 0xf26ad8dd, 0xe0df7733, + 0x58631056, 0x5019579f, 0xe8a530fa, 0xfa109f14, 0x42acf871, + 0xdf7bc0c8, 0x67c7a7ad, 0x75720843, 0xcdce6f26, 0x95ad7f70, + 0x2d111815, 0x3fa4b7fb, 0x8718d09e, 0x1acfe827, 0xa2738f42, + 0xb0c620ac, 0x087a47c9, 0xa032af3e, 0x188ec85b, 0x0a3b67b5, + 0xb28700d0, 0x2f503869, 0x97ec5f0c, 0x8559f0e2, 0x3de59787, + 0x658687d1, 0xdd3ae0b4, 0xcf8f4f5a, 0x7733283f, 0xeae41086, + 0x525877e3, 0x40edd80d, 0xf851bf68, 0xf02bf8a1, 0x48979fc4, + 0x5a22302a, 0xe29e574f, 0x7f496ff6, 0xc7f50893, 0xd540a77d, + 0x6dfcc018, 0x359fd04e, 0x8d23b72b, 0x9f9618c5, 0x272a7fa0, + 0xbafd4719, 0x0241207c, 0x10f48f92, 0xa848e8f7, 0x9b14583d, + 0x23a83f58, 0x311d90b6, 0x89a1f7d3, 0x1476cf6a, 0xaccaa80f, + 0xbe7f07e1, 0x06c36084, 0x5ea070d2, 0xe61c17b7, 0xf4a9b859, + 0x4c15df3c, 0xd1c2e785, 0x697e80e0, 0x7bcb2f0e, 0xc377486b, + 0xcb0d0fa2, 0x73b168c7, 0x6104c729, 0xd9b8a04c, 0x446f98f5, + 0xfcd3ff90, 0xee66507e, 0x56da371b, 0x0eb9274d, 0xb6054028, + 0xa4b0efc6, 0x1c0c88a3, 0x81dbb01a, 0x3967d77f, 0x2bd27891, + 0x936e1ff4, 0x3b26f703, 0x839a9066, 0x912f3f88, 0x299358ed, + 0xb4446054, 0x0cf80731, 0x1e4da8df, 0xa6f1cfba, 0xfe92dfec, + 0x462eb889, 0x549b1767, 0xec277002, 0x71f048bb, 0xc94c2fde, + 0xdbf98030, 0x6345e755, 0x6b3fa09c, 0xd383c7f9, 0xc1366817, + 0x798a0f72, 0xe45d37cb, 0x5ce150ae, 0x4e54ff40, 0xf6e89825, + 0xae8b8873, 0x1637ef16, 0x048240f8, 0xbc3e279d, 0x21e91f24, + 0x99557841, 0x8be0d7af, 0x335cb0ca, 0xed59b63b, 0x55e5d15e, + 0x47507eb0, 0xffec19d5, 0x623b216c, 0xda874609, 0xc832e9e7, + 0x708e8e82, 0x28ed9ed4, 0x9051f9b1, 0x82e4565f, 0x3a58313a, + 0xa78f0983, 0x1f336ee6, 0x0d86c108, 0xb53aa66d, 0xbd40e1a4, + 0x05fc86c1, 0x1749292f, 0xaff54e4a, 0x322276f3, 0x8a9e1196, + 0x982bbe78, 0x2097d91d, 0x78f4c94b, 0xc048ae2e, 0xd2fd01c0, + 0x6a4166a5, 0xf7965e1c, 0x4f2a3979, 0x5d9f9697, 0xe523f1f2, + 0x4d6b1905, 0xf5d77e60, 0xe762d18e, 0x5fdeb6eb, 0xc2098e52, + 0x7ab5e937, 0x680046d9, 0xd0bc21bc, 0x88df31ea, 0x3063568f, + 0x22d6f961, 0x9a6a9e04, 0x07bda6bd, 0xbf01c1d8, 0xadb46e36, + 0x15080953, 0x1d724e9a, 0xa5ce29ff, 0xb77b8611, 0x0fc7e174, + 0x9210d9cd, 0x2aacbea8, 0x38191146, 0x80a57623, 0xd8c66675, + 0x607a0110, 0x72cfaefe, 0xca73c99b, 0x57a4f122, 0xef189647, + 0xfdad39a9, 0x45115ecc, 0x764dee06, 0xcef18963, 0xdc44268d, + 0x64f841e8, 0xf92f7951, 0x41931e34, 0x5326b1da, 0xeb9ad6bf, + 0xb3f9c6e9, 0x0b45a18c, 0x19f00e62, 0xa14c6907, 0x3c9b51be, + 0x842736db, 0x96929935, 0x2e2efe50, 0x2654b999, 0x9ee8defc, + 0x8c5d7112, 0x34e11677, 0xa9362ece, 0x118a49ab, 0x033fe645, + 0xbb838120, 0xe3e09176, 0x5b5cf613, 0x49e959fd, 0xf1553e98, + 0x6c820621, 0xd43e6144, 0xc68bceaa, 0x7e37a9cf, 0xd67f4138, + 0x6ec3265d, 0x7c7689b3, 0xc4caeed6, 0x591dd66f, 0xe1a1b10a, + 0xf3141ee4, 0x4ba87981, 0x13cb69d7, 0xab770eb2, 0xb9c2a15c, + 0x017ec639, 0x9ca9fe80, 0x241599e5, 0x36a0360b, 0x8e1c516e, + 0x866616a7, 0x3eda71c2, 0x2c6fde2c, 0x94d3b949, 0x090481f0, + 0xb1b8e695, 0xa30d497b, 0x1bb12e1e, 0x43d23e48, 0xfb6e592d, + 0xe9dbf6c3, 0x516791a6, 0xccb0a91f, 0x740cce7a, 0x66b96194, + 0xde0506f1}, + {0x00000000, 0x01c26a37, 0x0384d46e, 0x0246be59, 0x0709a8dc, + 0x06cbc2eb, 0x048d7cb2, 0x054f1685, 0x0e1351b8, 0x0fd13b8f, + 0x0d9785d6, 0x0c55efe1, 0x091af964, 0x08d89353, 0x0a9e2d0a, + 0x0b5c473d, 0x1c26a370, 0x1de4c947, 0x1fa2771e, 0x1e601d29, + 0x1b2f0bac, 0x1aed619b, 0x18abdfc2, 0x1969b5f5, 0x1235f2c8, + 0x13f798ff, 0x11b126a6, 0x10734c91, 0x153c5a14, 0x14fe3023, + 0x16b88e7a, 0x177ae44d, 0x384d46e0, 0x398f2cd7, 0x3bc9928e, + 0x3a0bf8b9, 0x3f44ee3c, 0x3e86840b, 0x3cc03a52, 0x3d025065, + 0x365e1758, 0x379c7d6f, 0x35dac336, 0x3418a901, 0x3157bf84, + 0x3095d5b3, 0x32d36bea, 0x331101dd, 0x246be590, 0x25a98fa7, + 0x27ef31fe, 0x262d5bc9, 0x23624d4c, 0x22a0277b, 0x20e69922, + 0x2124f315, 0x2a78b428, 0x2bbade1f, 0x29fc6046, 0x283e0a71, + 0x2d711cf4, 0x2cb376c3, 0x2ef5c89a, 0x2f37a2ad, 0x709a8dc0, + 0x7158e7f7, 0x731e59ae, 0x72dc3399, 0x7793251c, 0x76514f2b, + 0x7417f172, 0x75d59b45, 0x7e89dc78, 0x7f4bb64f, 0x7d0d0816, + 0x7ccf6221, 0x798074a4, 0x78421e93, 0x7a04a0ca, 0x7bc6cafd, + 0x6cbc2eb0, 0x6d7e4487, 0x6f38fade, 0x6efa90e9, 0x6bb5866c, + 0x6a77ec5b, 0x68315202, 0x69f33835, 0x62af7f08, 0x636d153f, + 0x612bab66, 0x60e9c151, 0x65a6d7d4, 0x6464bde3, 0x662203ba, + 0x67e0698d, 0x48d7cb20, 0x4915a117, 0x4b531f4e, 0x4a917579, + 0x4fde63fc, 0x4e1c09cb, 0x4c5ab792, 0x4d98dda5, 0x46c49a98, + 0x4706f0af, 0x45404ef6, 0x448224c1, 0x41cd3244, 0x400f5873, + 0x4249e62a, 0x438b8c1d, 0x54f16850, 0x55330267, 0x5775bc3e, + 0x56b7d609, 0x53f8c08c, 0x523aaabb, 0x507c14e2, 0x51be7ed5, + 0x5ae239e8, 0x5b2053df, 0x5966ed86, 0x58a487b1, 0x5deb9134, + 0x5c29fb03, 0x5e6f455a, 0x5fad2f6d, 0xe1351b80, 0xe0f771b7, + 0xe2b1cfee, 0xe373a5d9, 0xe63cb35c, 0xe7fed96b, 0xe5b86732, + 0xe47a0d05, 0xef264a38, 0xeee4200f, 0xeca29e56, 0xed60f461, + 0xe82fe2e4, 0xe9ed88d3, 0xebab368a, 0xea695cbd, 0xfd13b8f0, + 0xfcd1d2c7, 0xfe976c9e, 0xff5506a9, 0xfa1a102c, 0xfbd87a1b, + 0xf99ec442, 0xf85cae75, 0xf300e948, 0xf2c2837f, 0xf0843d26, + 0xf1465711, 0xf4094194, 0xf5cb2ba3, 0xf78d95fa, 0xf64fffcd, + 0xd9785d60, 0xd8ba3757, 0xdafc890e, 0xdb3ee339, 0xde71f5bc, + 0xdfb39f8b, 0xddf521d2, 0xdc374be5, 0xd76b0cd8, 0xd6a966ef, + 0xd4efd8b6, 0xd52db281, 0xd062a404, 0xd1a0ce33, 0xd3e6706a, + 0xd2241a5d, 0xc55efe10, 0xc49c9427, 0xc6da2a7e, 0xc7184049, + 0xc25756cc, 0xc3953cfb, 0xc1d382a2, 0xc011e895, 0xcb4dafa8, + 0xca8fc59f, 0xc8c97bc6, 0xc90b11f1, 0xcc440774, 0xcd866d43, + 0xcfc0d31a, 0xce02b92d, 0x91af9640, 0x906dfc77, 0x922b422e, + 0x93e92819, 0x96a63e9c, 0x976454ab, 0x9522eaf2, 0x94e080c5, + 0x9fbcc7f8, 0x9e7eadcf, 0x9c381396, 0x9dfa79a1, 0x98b56f24, + 0x99770513, 0x9b31bb4a, 0x9af3d17d, 0x8d893530, 0x8c4b5f07, + 0x8e0de15e, 0x8fcf8b69, 0x8a809dec, 0x8b42f7db, 0x89044982, + 0x88c623b5, 0x839a6488, 0x82580ebf, 0x801eb0e6, 0x81dcdad1, + 0x8493cc54, 0x8551a663, 0x8717183a, 0x86d5720d, 0xa9e2d0a0, + 0xa820ba97, 0xaa6604ce, 0xaba46ef9, 0xaeeb787c, 0xaf29124b, + 0xad6fac12, 0xacadc625, 0xa7f18118, 0xa633eb2f, 0xa4755576, + 0xa5b73f41, 0xa0f829c4, 0xa13a43f3, 0xa37cfdaa, 0xa2be979d, + 0xb5c473d0, 0xb40619e7, 0xb640a7be, 0xb782cd89, 0xb2cddb0c, + 0xb30fb13b, 0xb1490f62, 0xb08b6555, 0xbbd72268, 0xba15485f, + 0xb853f606, 0xb9919c31, 0xbcde8ab4, 0xbd1ce083, 0xbf5a5eda, + 0xbe9834ed}, + {0x00000000, 0x191b3141, 0x32366282, 0x2b2d53c3, 0x646cc504, + 0x7d77f445, 0x565aa786, 0x4f4196c7, 0xc8d98a08, 0xd1c2bb49, + 0xfaefe88a, 0xe3f4d9cb, 0xacb54f0c, 0xb5ae7e4d, 0x9e832d8e, + 0x87981ccf, 0x4ac21251, 0x53d92310, 0x78f470d3, 0x61ef4192, + 0x2eaed755, 0x37b5e614, 0x1c98b5d7, 0x05838496, 0x821b9859, + 0x9b00a918, 0xb02dfadb, 0xa936cb9a, 0xe6775d5d, 0xff6c6c1c, + 0xd4413fdf, 0xcd5a0e9e, 0x958424a2, 0x8c9f15e3, 0xa7b24620, + 0xbea97761, 0xf1e8e1a6, 0xe8f3d0e7, 0xc3de8324, 0xdac5b265, + 0x5d5daeaa, 0x44469feb, 0x6f6bcc28, 0x7670fd69, 0x39316bae, + 0x202a5aef, 0x0b07092c, 0x121c386d, 0xdf4636f3, 0xc65d07b2, + 0xed705471, 0xf46b6530, 0xbb2af3f7, 0xa231c2b6, 0x891c9175, + 0x9007a034, 0x179fbcfb, 0x0e848dba, 0x25a9de79, 0x3cb2ef38, + 0x73f379ff, 0x6ae848be, 0x41c51b7d, 0x58de2a3c, 0xf0794f05, + 0xe9627e44, 0xc24f2d87, 0xdb541cc6, 0x94158a01, 0x8d0ebb40, + 0xa623e883, 0xbf38d9c2, 0x38a0c50d, 0x21bbf44c, 0x0a96a78f, + 0x138d96ce, 0x5ccc0009, 0x45d73148, 0x6efa628b, 0x77e153ca, + 0xbabb5d54, 0xa3a06c15, 0x888d3fd6, 0x91960e97, 0xded79850, + 0xc7cca911, 0xece1fad2, 0xf5facb93, 0x7262d75c, 0x6b79e61d, + 0x4054b5de, 0x594f849f, 0x160e1258, 0x0f152319, 0x243870da, + 0x3d23419b, 0x65fd6ba7, 0x7ce65ae6, 0x57cb0925, 0x4ed03864, + 0x0191aea3, 0x188a9fe2, 0x33a7cc21, 0x2abcfd60, 0xad24e1af, + 0xb43fd0ee, 0x9f12832d, 0x8609b26c, 0xc94824ab, 0xd05315ea, + 0xfb7e4629, 0xe2657768, 0x2f3f79f6, 0x362448b7, 0x1d091b74, + 0x04122a35, 0x4b53bcf2, 0x52488db3, 0x7965de70, 0x607eef31, + 0xe7e6f3fe, 0xfefdc2bf, 0xd5d0917c, 0xcccba03d, 0x838a36fa, + 0x9a9107bb, 0xb1bc5478, 0xa8a76539, 0x3b83984b, 0x2298a90a, + 0x09b5fac9, 0x10aecb88, 0x5fef5d4f, 0x46f46c0e, 0x6dd93fcd, + 0x74c20e8c, 0xf35a1243, 0xea412302, 0xc16c70c1, 0xd8774180, + 0x9736d747, 0x8e2de606, 0xa500b5c5, 0xbc1b8484, 0x71418a1a, + 0x685abb5b, 0x4377e898, 0x5a6cd9d9, 0x152d4f1e, 0x0c367e5f, + 0x271b2d9c, 0x3e001cdd, 0xb9980012, 0xa0833153, 0x8bae6290, + 0x92b553d1, 0xddf4c516, 0xc4eff457, 0xefc2a794, 0xf6d996d5, + 0xae07bce9, 0xb71c8da8, 0x9c31de6b, 0x852aef2a, 0xca6b79ed, + 0xd37048ac, 0xf85d1b6f, 0xe1462a2e, 0x66de36e1, 0x7fc507a0, + 0x54e85463, 0x4df36522, 0x02b2f3e5, 0x1ba9c2a4, 0x30849167, + 0x299fa026, 0xe4c5aeb8, 0xfdde9ff9, 0xd6f3cc3a, 0xcfe8fd7b, + 0x80a96bbc, 0x99b25afd, 0xb29f093e, 0xab84387f, 0x2c1c24b0, + 0x350715f1, 0x1e2a4632, 0x07317773, 0x4870e1b4, 0x516bd0f5, + 0x7a468336, 0x635db277, 0xcbfad74e, 0xd2e1e60f, 0xf9ccb5cc, + 0xe0d7848d, 0xaf96124a, 0xb68d230b, 0x9da070c8, 0x84bb4189, + 0x03235d46, 0x1a386c07, 0x31153fc4, 0x280e0e85, 0x674f9842, + 0x7e54a903, 0x5579fac0, 0x4c62cb81, 0x8138c51f, 0x9823f45e, + 0xb30ea79d, 0xaa1596dc, 0xe554001b, 0xfc4f315a, 0xd7626299, + 0xce7953d8, 0x49e14f17, 0x50fa7e56, 0x7bd72d95, 0x62cc1cd4, + 0x2d8d8a13, 0x3496bb52, 0x1fbbe891, 0x06a0d9d0, 0x5e7ef3ec, + 0x4765c2ad, 0x6c48916e, 0x7553a02f, 0x3a1236e8, 0x230907a9, + 0x0824546a, 0x113f652b, 0x96a779e4, 0x8fbc48a5, 0xa4911b66, + 0xbd8a2a27, 0xf2cbbce0, 0xebd08da1, 0xc0fdde62, 0xd9e6ef23, + 0x14bce1bd, 0x0da7d0fc, 0x268a833f, 0x3f91b27e, 0x70d024b9, + 0x69cb15f8, 0x42e6463b, 0x5bfd777a, 0xdc656bb5, 0xc57e5af4, + 0xee530937, 0xf7483876, 0xb809aeb1, 0xa1129ff0, 0x8a3fcc33, + 0x9324fd72}, + {0x00000000, 0x77073096, 0xee0e612c, 0x990951ba, 0x076dc419, + 0x706af48f, 0xe963a535, 0x9e6495a3, 0x0edb8832, 0x79dcb8a4, + 0xe0d5e91e, 0x97d2d988, 0x09b64c2b, 0x7eb17cbd, 0xe7b82d07, + 0x90bf1d91, 0x1db71064, 0x6ab020f2, 0xf3b97148, 0x84be41de, + 0x1adad47d, 0x6ddde4eb, 0xf4d4b551, 0x83d385c7, 0x136c9856, + 0x646ba8c0, 0xfd62f97a, 0x8a65c9ec, 0x14015c4f, 0x63066cd9, + 0xfa0f3d63, 0x8d080df5, 0x3b6e20c8, 0x4c69105e, 0xd56041e4, + 0xa2677172, 0x3c03e4d1, 0x4b04d447, 0xd20d85fd, 0xa50ab56b, + 0x35b5a8fa, 0x42b2986c, 0xdbbbc9d6, 0xacbcf940, 0x32d86ce3, + 0x45df5c75, 0xdcd60dcf, 0xabd13d59, 0x26d930ac, 0x51de003a, + 0xc8d75180, 0xbfd06116, 0x21b4f4b5, 0x56b3c423, 0xcfba9599, + 0xb8bda50f, 0x2802b89e, 0x5f058808, 0xc60cd9b2, 0xb10be924, + 0x2f6f7c87, 0x58684c11, 0xc1611dab, 0xb6662d3d, 0x76dc4190, + 0x01db7106, 0x98d220bc, 0xefd5102a, 0x71b18589, 0x06b6b51f, + 0x9fbfe4a5, 0xe8b8d433, 0x7807c9a2, 0x0f00f934, 0x9609a88e, + 0xe10e9818, 0x7f6a0dbb, 0x086d3d2d, 0x91646c97, 0xe6635c01, + 0x6b6b51f4, 0x1c6c6162, 0x856530d8, 0xf262004e, 0x6c0695ed, + 0x1b01a57b, 0x8208f4c1, 0xf50fc457, 0x65b0d9c6, 0x12b7e950, + 0x8bbeb8ea, 0xfcb9887c, 0x62dd1ddf, 0x15da2d49, 0x8cd37cf3, + 0xfbd44c65, 0x4db26158, 0x3ab551ce, 0xa3bc0074, 0xd4bb30e2, + 0x4adfa541, 0x3dd895d7, 0xa4d1c46d, 0xd3d6f4fb, 0x4369e96a, + 0x346ed9fc, 0xad678846, 0xda60b8d0, 0x44042d73, 0x33031de5, + 0xaa0a4c5f, 0xdd0d7cc9, 0x5005713c, 0x270241aa, 0xbe0b1010, + 0xc90c2086, 0x5768b525, 0x206f85b3, 0xb966d409, 0xce61e49f, + 0x5edef90e, 0x29d9c998, 0xb0d09822, 0xc7d7a8b4, 0x59b33d17, + 0x2eb40d81, 0xb7bd5c3b, 0xc0ba6cad, 0xedb88320, 0x9abfb3b6, + 0x03b6e20c, 0x74b1d29a, 0xead54739, 0x9dd277af, 0x04db2615, + 0x73dc1683, 0xe3630b12, 0x94643b84, 0x0d6d6a3e, 0x7a6a5aa8, + 0xe40ecf0b, 0x9309ff9d, 0x0a00ae27, 0x7d079eb1, 0xf00f9344, + 0x8708a3d2, 0x1e01f268, 0x6906c2fe, 0xf762575d, 0x806567cb, + 0x196c3671, 0x6e6b06e7, 0xfed41b76, 0x89d32be0, 0x10da7a5a, + 0x67dd4acc, 0xf9b9df6f, 0x8ebeeff9, 0x17b7be43, 0x60b08ed5, + 0xd6d6a3e8, 0xa1d1937e, 0x38d8c2c4, 0x4fdff252, 0xd1bb67f1, + 0xa6bc5767, 0x3fb506dd, 0x48b2364b, 0xd80d2bda, 0xaf0a1b4c, + 0x36034af6, 0x41047a60, 0xdf60efc3, 0xa867df55, 0x316e8eef, + 0x4669be79, 0xcb61b38c, 0xbc66831a, 0x256fd2a0, 0x5268e236, + 0xcc0c7795, 0xbb0b4703, 0x220216b9, 0x5505262f, 0xc5ba3bbe, + 0xb2bd0b28, 0x2bb45a92, 0x5cb36a04, 0xc2d7ffa7, 0xb5d0cf31, + 0x2cd99e8b, 0x5bdeae1d, 0x9b64c2b0, 0xec63f226, 0x756aa39c, + 0x026d930a, 0x9c0906a9, 0xeb0e363f, 0x72076785, 0x05005713, + 0x95bf4a82, 0xe2b87a14, 0x7bb12bae, 0x0cb61b38, 0x92d28e9b, + 0xe5d5be0d, 0x7cdcefb7, 0x0bdbdf21, 0x86d3d2d4, 0xf1d4e242, + 0x68ddb3f8, 0x1fda836e, 0x81be16cd, 0xf6b9265b, 0x6fb077e1, + 0x18b74777, 0x88085ae6, 0xff0f6a70, 0x66063bca, 0x11010b5c, + 0x8f659eff, 0xf862ae69, 0x616bffd3, 0x166ccf45, 0xa00ae278, + 0xd70dd2ee, 0x4e048354, 0x3903b3c2, 0xa7672661, 0xd06016f7, + 0x4969474d, 0x3e6e77db, 0xaed16a4a, 0xd9d65adc, 0x40df0b66, + 0x37d83bf0, 0xa9bcae53, 0xdebb9ec5, 0x47b2cf7f, 0x30b5ffe9, + 0xbdbdf21c, 0xcabac28a, 0x53b39330, 0x24b4a3a6, 0xbad03605, + 0xcdd70693, 0x54de5729, 0x23d967bf, 0xb3667a2e, 0xc4614ab8, + 0x5d681b02, 0x2a6f2b94, 0xb40bbe37, 0xc30c8ea1, 0x5a05df1b, + 0x2d02ef8d}}; + +local const z_word_t FAR crc_braid_big_table[][256] = { + {0x0000000000000000, 0x9630077700000000, 0x2c610eee00000000, + 0xba51099900000000, 0x19c46d0700000000, 0x8ff46a7000000000, + 0x35a563e900000000, 0xa395649e00000000, 0x3288db0e00000000, + 0xa4b8dc7900000000, 0x1ee9d5e000000000, 0x88d9d29700000000, + 0x2b4cb60900000000, 0xbd7cb17e00000000, 0x072db8e700000000, + 0x911dbf9000000000, 0x6410b71d00000000, 0xf220b06a00000000, + 0x4871b9f300000000, 0xde41be8400000000, 0x7dd4da1a00000000, + 0xebe4dd6d00000000, 0x51b5d4f400000000, 0xc785d38300000000, + 0x56986c1300000000, 0xc0a86b6400000000, 0x7af962fd00000000, + 0xecc9658a00000000, 0x4f5c011400000000, 0xd96c066300000000, + 0x633d0ffa00000000, 0xf50d088d00000000, 0xc8206e3b00000000, + 0x5e10694c00000000, 0xe44160d500000000, 0x727167a200000000, + 0xd1e4033c00000000, 0x47d4044b00000000, 0xfd850dd200000000, + 0x6bb50aa500000000, 0xfaa8b53500000000, 0x6c98b24200000000, + 0xd6c9bbdb00000000, 0x40f9bcac00000000, 0xe36cd83200000000, + 0x755cdf4500000000, 0xcf0dd6dc00000000, 0x593dd1ab00000000, + 0xac30d92600000000, 0x3a00de5100000000, 0x8051d7c800000000, + 0x1661d0bf00000000, 0xb5f4b42100000000, 0x23c4b35600000000, + 0x9995bacf00000000, 0x0fa5bdb800000000, 0x9eb8022800000000, + 0x0888055f00000000, 0xb2d90cc600000000, 0x24e90bb100000000, + 0x877c6f2f00000000, 0x114c685800000000, 0xab1d61c100000000, + 0x3d2d66b600000000, 0x9041dc7600000000, 0x0671db0100000000, + 0xbc20d29800000000, 0x2a10d5ef00000000, 0x8985b17100000000, + 0x1fb5b60600000000, 0xa5e4bf9f00000000, 0x33d4b8e800000000, + 0xa2c9077800000000, 0x34f9000f00000000, 0x8ea8099600000000, + 0x18980ee100000000, 0xbb0d6a7f00000000, 0x2d3d6d0800000000, + 0x976c649100000000, 0x015c63e600000000, 0xf4516b6b00000000, + 0x62616c1c00000000, 0xd830658500000000, 0x4e0062f200000000, + 0xed95066c00000000, 0x7ba5011b00000000, 0xc1f4088200000000, + 0x57c40ff500000000, 0xc6d9b06500000000, 0x50e9b71200000000, + 0xeab8be8b00000000, 0x7c88b9fc00000000, 0xdf1ddd6200000000, + 0x492dda1500000000, 0xf37cd38c00000000, 0x654cd4fb00000000, + 0x5861b24d00000000, 0xce51b53a00000000, 0x7400bca300000000, + 0xe230bbd400000000, 0x41a5df4a00000000, 0xd795d83d00000000, + 0x6dc4d1a400000000, 0xfbf4d6d300000000, 0x6ae9694300000000, + 0xfcd96e3400000000, 0x468867ad00000000, 0xd0b860da00000000, + 0x732d044400000000, 0xe51d033300000000, 0x5f4c0aaa00000000, + 0xc97c0ddd00000000, 0x3c71055000000000, 0xaa41022700000000, + 0x10100bbe00000000, 0x86200cc900000000, 0x25b5685700000000, + 0xb3856f2000000000, 0x09d466b900000000, 0x9fe461ce00000000, + 0x0ef9de5e00000000, 0x98c9d92900000000, 0x2298d0b000000000, + 0xb4a8d7c700000000, 0x173db35900000000, 0x810db42e00000000, + 0x3b5cbdb700000000, 0xad6cbac000000000, 0x2083b8ed00000000, + 0xb6b3bf9a00000000, 0x0ce2b60300000000, 0x9ad2b17400000000, + 0x3947d5ea00000000, 0xaf77d29d00000000, 0x1526db0400000000, + 0x8316dc7300000000, 0x120b63e300000000, 0x843b649400000000, + 0x3e6a6d0d00000000, 0xa85a6a7a00000000, 0x0bcf0ee400000000, + 0x9dff099300000000, 0x27ae000a00000000, 0xb19e077d00000000, + 0x44930ff000000000, 0xd2a3088700000000, 0x68f2011e00000000, + 0xfec2066900000000, 0x5d5762f700000000, 0xcb67658000000000, + 0x71366c1900000000, 0xe7066b6e00000000, 0x761bd4fe00000000, + 0xe02bd38900000000, 0x5a7ada1000000000, 0xcc4add6700000000, + 0x6fdfb9f900000000, 0xf9efbe8e00000000, 0x43beb71700000000, + 0xd58eb06000000000, 0xe8a3d6d600000000, 0x7e93d1a100000000, + 0xc4c2d83800000000, 0x52f2df4f00000000, 0xf167bbd100000000, + 0x6757bca600000000, 0xdd06b53f00000000, 0x4b36b24800000000, + 0xda2b0dd800000000, 0x4c1b0aaf00000000, 0xf64a033600000000, + 0x607a044100000000, 0xc3ef60df00000000, 0x55df67a800000000, + 0xef8e6e3100000000, 0x79be694600000000, 0x8cb361cb00000000, + 0x1a8366bc00000000, 0xa0d26f2500000000, 0x36e2685200000000, + 0x95770ccc00000000, 0x03470bbb00000000, 0xb916022200000000, + 0x2f26055500000000, 0xbe3bbac500000000, 0x280bbdb200000000, + 0x925ab42b00000000, 0x046ab35c00000000, 0xa7ffd7c200000000, + 0x31cfd0b500000000, 0x8b9ed92c00000000, 0x1daede5b00000000, + 0xb0c2649b00000000, 0x26f263ec00000000, 0x9ca36a7500000000, + 0x0a936d0200000000, 0xa906099c00000000, 0x3f360eeb00000000, + 0x8567077200000000, 0x1357000500000000, 0x824abf9500000000, + 0x147ab8e200000000, 0xae2bb17b00000000, 0x381bb60c00000000, + 0x9b8ed29200000000, 0x0dbed5e500000000, 0xb7efdc7c00000000, + 0x21dfdb0b00000000, 0xd4d2d38600000000, 0x42e2d4f100000000, + 0xf8b3dd6800000000, 0x6e83da1f00000000, 0xcd16be8100000000, + 0x5b26b9f600000000, 0xe177b06f00000000, 0x7747b71800000000, + 0xe65a088800000000, 0x706a0fff00000000, 0xca3b066600000000, + 0x5c0b011100000000, 0xff9e658f00000000, 0x69ae62f800000000, + 0xd3ff6b6100000000, 0x45cf6c1600000000, 0x78e20aa000000000, + 0xeed20dd700000000, 0x5483044e00000000, 0xc2b3033900000000, + 0x612667a700000000, 0xf71660d000000000, 0x4d47694900000000, + 0xdb776e3e00000000, 0x4a6ad1ae00000000, 0xdc5ad6d900000000, + 0x660bdf4000000000, 0xf03bd83700000000, 0x53aebca900000000, + 0xc59ebbde00000000, 0x7fcfb24700000000, 0xe9ffb53000000000, + 0x1cf2bdbd00000000, 0x8ac2baca00000000, 0x3093b35300000000, + 0xa6a3b42400000000, 0x0536d0ba00000000, 0x9306d7cd00000000, + 0x2957de5400000000, 0xbf67d92300000000, 0x2e7a66b300000000, + 0xb84a61c400000000, 0x021b685d00000000, 0x942b6f2a00000000, + 0x37be0bb400000000, 0xa18e0cc300000000, 0x1bdf055a00000000, + 0x8def022d00000000}, + {0x0000000000000000, 0x41311b1900000000, 0x8262363200000000, + 0xc3532d2b00000000, 0x04c56c6400000000, 0x45f4777d00000000, + 0x86a75a5600000000, 0xc796414f00000000, 0x088ad9c800000000, + 0x49bbc2d100000000, 0x8ae8effa00000000, 0xcbd9f4e300000000, + 0x0c4fb5ac00000000, 0x4d7eaeb500000000, 0x8e2d839e00000000, + 0xcf1c988700000000, 0x5112c24a00000000, 0x1023d95300000000, + 0xd370f47800000000, 0x9241ef6100000000, 0x55d7ae2e00000000, + 0x14e6b53700000000, 0xd7b5981c00000000, 0x9684830500000000, + 0x59981b8200000000, 0x18a9009b00000000, 0xdbfa2db000000000, + 0x9acb36a900000000, 0x5d5d77e600000000, 0x1c6c6cff00000000, + 0xdf3f41d400000000, 0x9e0e5acd00000000, 0xa224849500000000, + 0xe3159f8c00000000, 0x2046b2a700000000, 0x6177a9be00000000, + 0xa6e1e8f100000000, 0xe7d0f3e800000000, 0x2483dec300000000, + 0x65b2c5da00000000, 0xaaae5d5d00000000, 0xeb9f464400000000, + 0x28cc6b6f00000000, 0x69fd707600000000, 0xae6b313900000000, + 0xef5a2a2000000000, 0x2c09070b00000000, 0x6d381c1200000000, + 0xf33646df00000000, 0xb2075dc600000000, 0x715470ed00000000, + 0x30656bf400000000, 0xf7f32abb00000000, 0xb6c231a200000000, + 0x75911c8900000000, 0x34a0079000000000, 0xfbbc9f1700000000, + 0xba8d840e00000000, 0x79dea92500000000, 0x38efb23c00000000, + 0xff79f37300000000, 0xbe48e86a00000000, 0x7d1bc54100000000, + 0x3c2ade5800000000, 0x054f79f000000000, 0x447e62e900000000, + 0x872d4fc200000000, 0xc61c54db00000000, 0x018a159400000000, + 0x40bb0e8d00000000, 0x83e823a600000000, 0xc2d938bf00000000, + 0x0dc5a03800000000, 0x4cf4bb2100000000, 0x8fa7960a00000000, + 0xce968d1300000000, 0x0900cc5c00000000, 0x4831d74500000000, + 0x8b62fa6e00000000, 0xca53e17700000000, 0x545dbbba00000000, + 0x156ca0a300000000, 0xd63f8d8800000000, 0x970e969100000000, + 0x5098d7de00000000, 0x11a9ccc700000000, 0xd2fae1ec00000000, + 0x93cbfaf500000000, 0x5cd7627200000000, 0x1de6796b00000000, + 0xdeb5544000000000, 0x9f844f5900000000, 0x58120e1600000000, + 0x1923150f00000000, 0xda70382400000000, 0x9b41233d00000000, + 0xa76bfd6500000000, 0xe65ae67c00000000, 0x2509cb5700000000, + 0x6438d04e00000000, 0xa3ae910100000000, 0xe29f8a1800000000, + 0x21cca73300000000, 0x60fdbc2a00000000, 0xafe124ad00000000, + 0xeed03fb400000000, 0x2d83129f00000000, 0x6cb2098600000000, + 0xab2448c900000000, 0xea1553d000000000, 0x29467efb00000000, + 0x687765e200000000, 0xf6793f2f00000000, 0xb748243600000000, + 0x741b091d00000000, 0x352a120400000000, 0xf2bc534b00000000, + 0xb38d485200000000, 0x70de657900000000, 0x31ef7e6000000000, + 0xfef3e6e700000000, 0xbfc2fdfe00000000, 0x7c91d0d500000000, + 0x3da0cbcc00000000, 0xfa368a8300000000, 0xbb07919a00000000, + 0x7854bcb100000000, 0x3965a7a800000000, 0x4b98833b00000000, + 0x0aa9982200000000, 0xc9fab50900000000, 0x88cbae1000000000, + 0x4f5def5f00000000, 0x0e6cf44600000000, 0xcd3fd96d00000000, + 0x8c0ec27400000000, 0x43125af300000000, 0x022341ea00000000, + 0xc1706cc100000000, 0x804177d800000000, 0x47d7369700000000, + 0x06e62d8e00000000, 0xc5b500a500000000, 0x84841bbc00000000, + 0x1a8a417100000000, 0x5bbb5a6800000000, 0x98e8774300000000, + 0xd9d96c5a00000000, 0x1e4f2d1500000000, 0x5f7e360c00000000, + 0x9c2d1b2700000000, 0xdd1c003e00000000, 0x120098b900000000, + 0x533183a000000000, 0x9062ae8b00000000, 0xd153b59200000000, + 0x16c5f4dd00000000, 0x57f4efc400000000, 0x94a7c2ef00000000, + 0xd596d9f600000000, 0xe9bc07ae00000000, 0xa88d1cb700000000, + 0x6bde319c00000000, 0x2aef2a8500000000, 0xed796bca00000000, + 0xac4870d300000000, 0x6f1b5df800000000, 0x2e2a46e100000000, + 0xe136de6600000000, 0xa007c57f00000000, 0x6354e85400000000, + 0x2265f34d00000000, 0xe5f3b20200000000, 0xa4c2a91b00000000, + 0x6791843000000000, 0x26a09f2900000000, 0xb8aec5e400000000, + 0xf99fdefd00000000, 0x3accf3d600000000, 0x7bfde8cf00000000, + 0xbc6ba98000000000, 0xfd5ab29900000000, 0x3e099fb200000000, + 0x7f3884ab00000000, 0xb0241c2c00000000, 0xf115073500000000, + 0x32462a1e00000000, 0x7377310700000000, 0xb4e1704800000000, + 0xf5d06b5100000000, 0x3683467a00000000, 0x77b25d6300000000, + 0x4ed7facb00000000, 0x0fe6e1d200000000, 0xccb5ccf900000000, + 0x8d84d7e000000000, 0x4a1296af00000000, 0x0b238db600000000, + 0xc870a09d00000000, 0x8941bb8400000000, 0x465d230300000000, + 0x076c381a00000000, 0xc43f153100000000, 0x850e0e2800000000, + 0x42984f6700000000, 0x03a9547e00000000, 0xc0fa795500000000, + 0x81cb624c00000000, 0x1fc5388100000000, 0x5ef4239800000000, + 0x9da70eb300000000, 0xdc9615aa00000000, 0x1b0054e500000000, + 0x5a314ffc00000000, 0x996262d700000000, 0xd85379ce00000000, + 0x174fe14900000000, 0x567efa5000000000, 0x952dd77b00000000, + 0xd41ccc6200000000, 0x138a8d2d00000000, 0x52bb963400000000, + 0x91e8bb1f00000000, 0xd0d9a00600000000, 0xecf37e5e00000000, + 0xadc2654700000000, 0x6e91486c00000000, 0x2fa0537500000000, + 0xe836123a00000000, 0xa907092300000000, 0x6a54240800000000, + 0x2b653f1100000000, 0xe479a79600000000, 0xa548bc8f00000000, + 0x661b91a400000000, 0x272a8abd00000000, 0xe0bccbf200000000, + 0xa18dd0eb00000000, 0x62defdc000000000, 0x23efe6d900000000, + 0xbde1bc1400000000, 0xfcd0a70d00000000, 0x3f838a2600000000, + 0x7eb2913f00000000, 0xb924d07000000000, 0xf815cb6900000000, + 0x3b46e64200000000, 0x7a77fd5b00000000, 0xb56b65dc00000000, + 0xf45a7ec500000000, 0x370953ee00000000, 0x763848f700000000, + 0xb1ae09b800000000, 0xf09f12a100000000, 0x33cc3f8a00000000, + 0x72fd249300000000}, + {0x0000000000000000, 0x376ac20100000000, 0x6ed4840300000000, + 0x59be460200000000, 0xdca8090700000000, 0xebc2cb0600000000, + 0xb27c8d0400000000, 0x85164f0500000000, 0xb851130e00000000, + 0x8f3bd10f00000000, 0xd685970d00000000, 0xe1ef550c00000000, + 0x64f91a0900000000, 0x5393d80800000000, 0x0a2d9e0a00000000, + 0x3d475c0b00000000, 0x70a3261c00000000, 0x47c9e41d00000000, + 0x1e77a21f00000000, 0x291d601e00000000, 0xac0b2f1b00000000, + 0x9b61ed1a00000000, 0xc2dfab1800000000, 0xf5b5691900000000, + 0xc8f2351200000000, 0xff98f71300000000, 0xa626b11100000000, + 0x914c731000000000, 0x145a3c1500000000, 0x2330fe1400000000, + 0x7a8eb81600000000, 0x4de47a1700000000, 0xe0464d3800000000, + 0xd72c8f3900000000, 0x8e92c93b00000000, 0xb9f80b3a00000000, + 0x3cee443f00000000, 0x0b84863e00000000, 0x523ac03c00000000, + 0x6550023d00000000, 0x58175e3600000000, 0x6f7d9c3700000000, + 0x36c3da3500000000, 0x01a9183400000000, 0x84bf573100000000, + 0xb3d5953000000000, 0xea6bd33200000000, 0xdd01113300000000, + 0x90e56b2400000000, 0xa78fa92500000000, 0xfe31ef2700000000, + 0xc95b2d2600000000, 0x4c4d622300000000, 0x7b27a02200000000, + 0x2299e62000000000, 0x15f3242100000000, 0x28b4782a00000000, + 0x1fdeba2b00000000, 0x4660fc2900000000, 0x710a3e2800000000, + 0xf41c712d00000000, 0xc376b32c00000000, 0x9ac8f52e00000000, + 0xada2372f00000000, 0xc08d9a7000000000, 0xf7e7587100000000, + 0xae591e7300000000, 0x9933dc7200000000, 0x1c25937700000000, + 0x2b4f517600000000, 0x72f1177400000000, 0x459bd57500000000, + 0x78dc897e00000000, 0x4fb64b7f00000000, 0x16080d7d00000000, + 0x2162cf7c00000000, 0xa474807900000000, 0x931e427800000000, + 0xcaa0047a00000000, 0xfdcac67b00000000, 0xb02ebc6c00000000, + 0x87447e6d00000000, 0xdefa386f00000000, 0xe990fa6e00000000, + 0x6c86b56b00000000, 0x5bec776a00000000, 0x0252316800000000, + 0x3538f36900000000, 0x087faf6200000000, 0x3f156d6300000000, + 0x66ab2b6100000000, 0x51c1e96000000000, 0xd4d7a66500000000, + 0xe3bd646400000000, 0xba03226600000000, 0x8d69e06700000000, + 0x20cbd74800000000, 0x17a1154900000000, 0x4e1f534b00000000, + 0x7975914a00000000, 0xfc63de4f00000000, 0xcb091c4e00000000, + 0x92b75a4c00000000, 0xa5dd984d00000000, 0x989ac44600000000, + 0xaff0064700000000, 0xf64e404500000000, 0xc124824400000000, + 0x4432cd4100000000, 0x73580f4000000000, 0x2ae6494200000000, + 0x1d8c8b4300000000, 0x5068f15400000000, 0x6702335500000000, + 0x3ebc755700000000, 0x09d6b75600000000, 0x8cc0f85300000000, + 0xbbaa3a5200000000, 0xe2147c5000000000, 0xd57ebe5100000000, + 0xe839e25a00000000, 0xdf53205b00000000, 0x86ed665900000000, + 0xb187a45800000000, 0x3491eb5d00000000, 0x03fb295c00000000, + 0x5a456f5e00000000, 0x6d2fad5f00000000, 0x801b35e100000000, + 0xb771f7e000000000, 0xeecfb1e200000000, 0xd9a573e300000000, + 0x5cb33ce600000000, 0x6bd9fee700000000, 0x3267b8e500000000, + 0x050d7ae400000000, 0x384a26ef00000000, 0x0f20e4ee00000000, + 0x569ea2ec00000000, 0x61f460ed00000000, 0xe4e22fe800000000, + 0xd388ede900000000, 0x8a36abeb00000000, 0xbd5c69ea00000000, + 0xf0b813fd00000000, 0xc7d2d1fc00000000, 0x9e6c97fe00000000, + 0xa90655ff00000000, 0x2c101afa00000000, 0x1b7ad8fb00000000, + 0x42c49ef900000000, 0x75ae5cf800000000, 0x48e900f300000000, + 0x7f83c2f200000000, 0x263d84f000000000, 0x115746f100000000, + 0x944109f400000000, 0xa32bcbf500000000, 0xfa958df700000000, + 0xcdff4ff600000000, 0x605d78d900000000, 0x5737bad800000000, + 0x0e89fcda00000000, 0x39e33edb00000000, 0xbcf571de00000000, + 0x8b9fb3df00000000, 0xd221f5dd00000000, 0xe54b37dc00000000, + 0xd80c6bd700000000, 0xef66a9d600000000, 0xb6d8efd400000000, + 0x81b22dd500000000, 0x04a462d000000000, 0x33cea0d100000000, + 0x6a70e6d300000000, 0x5d1a24d200000000, 0x10fe5ec500000000, + 0x27949cc400000000, 0x7e2adac600000000, 0x494018c700000000, + 0xcc5657c200000000, 0xfb3c95c300000000, 0xa282d3c100000000, + 0x95e811c000000000, 0xa8af4dcb00000000, 0x9fc58fca00000000, + 0xc67bc9c800000000, 0xf1110bc900000000, 0x740744cc00000000, + 0x436d86cd00000000, 0x1ad3c0cf00000000, 0x2db902ce00000000, + 0x4096af9100000000, 0x77fc6d9000000000, 0x2e422b9200000000, + 0x1928e99300000000, 0x9c3ea69600000000, 0xab54649700000000, + 0xf2ea229500000000, 0xc580e09400000000, 0xf8c7bc9f00000000, + 0xcfad7e9e00000000, 0x9613389c00000000, 0xa179fa9d00000000, + 0x246fb59800000000, 0x1305779900000000, 0x4abb319b00000000, + 0x7dd1f39a00000000, 0x3035898d00000000, 0x075f4b8c00000000, + 0x5ee10d8e00000000, 0x698bcf8f00000000, 0xec9d808a00000000, + 0xdbf7428b00000000, 0x8249048900000000, 0xb523c68800000000, + 0x88649a8300000000, 0xbf0e588200000000, 0xe6b01e8000000000, + 0xd1dadc8100000000, 0x54cc938400000000, 0x63a6518500000000, + 0x3a18178700000000, 0x0d72d58600000000, 0xa0d0e2a900000000, + 0x97ba20a800000000, 0xce0466aa00000000, 0xf96ea4ab00000000, + 0x7c78ebae00000000, 0x4b1229af00000000, 0x12ac6fad00000000, + 0x25c6adac00000000, 0x1881f1a700000000, 0x2feb33a600000000, + 0x765575a400000000, 0x413fb7a500000000, 0xc429f8a000000000, + 0xf3433aa100000000, 0xaafd7ca300000000, 0x9d97bea200000000, + 0xd073c4b500000000, 0xe71906b400000000, 0xbea740b600000000, + 0x89cd82b700000000, 0x0cdbcdb200000000, 0x3bb10fb300000000, + 0x620f49b100000000, 0x55658bb000000000, 0x6822d7bb00000000, + 0x5f4815ba00000000, 0x06f653b800000000, 0x319c91b900000000, + 0xb48adebc00000000, 0x83e01cbd00000000, 0xda5e5abf00000000, + 0xed3498be00000000}, + {0x0000000000000000, 0x6567bcb800000000, 0x8bc809aa00000000, + 0xeeafb51200000000, 0x5797628f00000000, 0x32f0de3700000000, + 0xdc5f6b2500000000, 0xb938d79d00000000, 0xef28b4c500000000, + 0x8a4f087d00000000, 0x64e0bd6f00000000, 0x018701d700000000, + 0xb8bfd64a00000000, 0xddd86af200000000, 0x3377dfe000000000, + 0x5610635800000000, 0x9f57195000000000, 0xfa30a5e800000000, + 0x149f10fa00000000, 0x71f8ac4200000000, 0xc8c07bdf00000000, + 0xada7c76700000000, 0x4308727500000000, 0x266fcecd00000000, + 0x707fad9500000000, 0x1518112d00000000, 0xfbb7a43f00000000, + 0x9ed0188700000000, 0x27e8cf1a00000000, 0x428f73a200000000, + 0xac20c6b000000000, 0xc9477a0800000000, 0x3eaf32a000000000, + 0x5bc88e1800000000, 0xb5673b0a00000000, 0xd00087b200000000, + 0x6938502f00000000, 0x0c5fec9700000000, 0xe2f0598500000000, + 0x8797e53d00000000, 0xd187866500000000, 0xb4e03add00000000, + 0x5a4f8fcf00000000, 0x3f28337700000000, 0x8610e4ea00000000, + 0xe377585200000000, 0x0dd8ed4000000000, 0x68bf51f800000000, + 0xa1f82bf000000000, 0xc49f974800000000, 0x2a30225a00000000, + 0x4f579ee200000000, 0xf66f497f00000000, 0x9308f5c700000000, + 0x7da740d500000000, 0x18c0fc6d00000000, 0x4ed09f3500000000, + 0x2bb7238d00000000, 0xc518969f00000000, 0xa07f2a2700000000, + 0x1947fdba00000000, 0x7c20410200000000, 0x928ff41000000000, + 0xf7e848a800000000, 0x3d58149b00000000, 0x583fa82300000000, + 0xb6901d3100000000, 0xd3f7a18900000000, 0x6acf761400000000, + 0x0fa8caac00000000, 0xe1077fbe00000000, 0x8460c30600000000, + 0xd270a05e00000000, 0xb7171ce600000000, 0x59b8a9f400000000, + 0x3cdf154c00000000, 0x85e7c2d100000000, 0xe0807e6900000000, + 0x0e2fcb7b00000000, 0x6b4877c300000000, 0xa20f0dcb00000000, + 0xc768b17300000000, 0x29c7046100000000, 0x4ca0b8d900000000, + 0xf5986f4400000000, 0x90ffd3fc00000000, 0x7e5066ee00000000, + 0x1b37da5600000000, 0x4d27b90e00000000, 0x284005b600000000, + 0xc6efb0a400000000, 0xa3880c1c00000000, 0x1ab0db8100000000, + 0x7fd7673900000000, 0x9178d22b00000000, 0xf41f6e9300000000, + 0x03f7263b00000000, 0x66909a8300000000, 0x883f2f9100000000, + 0xed58932900000000, 0x546044b400000000, 0x3107f80c00000000, + 0xdfa84d1e00000000, 0xbacff1a600000000, 0xecdf92fe00000000, + 0x89b82e4600000000, 0x67179b5400000000, 0x027027ec00000000, + 0xbb48f07100000000, 0xde2f4cc900000000, 0x3080f9db00000000, + 0x55e7456300000000, 0x9ca03f6b00000000, 0xf9c783d300000000, + 0x176836c100000000, 0x720f8a7900000000, 0xcb375de400000000, + 0xae50e15c00000000, 0x40ff544e00000000, 0x2598e8f600000000, + 0x73888bae00000000, 0x16ef371600000000, 0xf840820400000000, + 0x9d273ebc00000000, 0x241fe92100000000, 0x4178559900000000, + 0xafd7e08b00000000, 0xcab05c3300000000, 0x3bb659ed00000000, + 0x5ed1e55500000000, 0xb07e504700000000, 0xd519ecff00000000, + 0x6c213b6200000000, 0x094687da00000000, 0xe7e932c800000000, + 0x828e8e7000000000, 0xd49eed2800000000, 0xb1f9519000000000, + 0x5f56e48200000000, 0x3a31583a00000000, 0x83098fa700000000, + 0xe66e331f00000000, 0x08c1860d00000000, 0x6da63ab500000000, + 0xa4e140bd00000000, 0xc186fc0500000000, 0x2f29491700000000, + 0x4a4ef5af00000000, 0xf376223200000000, 0x96119e8a00000000, + 0x78be2b9800000000, 0x1dd9972000000000, 0x4bc9f47800000000, + 0x2eae48c000000000, 0xc001fdd200000000, 0xa566416a00000000, + 0x1c5e96f700000000, 0x79392a4f00000000, 0x97969f5d00000000, + 0xf2f123e500000000, 0x05196b4d00000000, 0x607ed7f500000000, + 0x8ed162e700000000, 0xebb6de5f00000000, 0x528e09c200000000, + 0x37e9b57a00000000, 0xd946006800000000, 0xbc21bcd000000000, + 0xea31df8800000000, 0x8f56633000000000, 0x61f9d62200000000, + 0x049e6a9a00000000, 0xbda6bd0700000000, 0xd8c101bf00000000, + 0x366eb4ad00000000, 0x5309081500000000, 0x9a4e721d00000000, + 0xff29cea500000000, 0x11867bb700000000, 0x74e1c70f00000000, + 0xcdd9109200000000, 0xa8beac2a00000000, 0x4611193800000000, + 0x2376a58000000000, 0x7566c6d800000000, 0x10017a6000000000, + 0xfeaecf7200000000, 0x9bc973ca00000000, 0x22f1a45700000000, + 0x479618ef00000000, 0xa939adfd00000000, 0xcc5e114500000000, + 0x06ee4d7600000000, 0x6389f1ce00000000, 0x8d2644dc00000000, + 0xe841f86400000000, 0x51792ff900000000, 0x341e934100000000, + 0xdab1265300000000, 0xbfd69aeb00000000, 0xe9c6f9b300000000, + 0x8ca1450b00000000, 0x620ef01900000000, 0x07694ca100000000, + 0xbe519b3c00000000, 0xdb36278400000000, 0x3599929600000000, + 0x50fe2e2e00000000, 0x99b9542600000000, 0xfcdee89e00000000, + 0x12715d8c00000000, 0x7716e13400000000, 0xce2e36a900000000, + 0xab498a1100000000, 0x45e63f0300000000, 0x208183bb00000000, + 0x7691e0e300000000, 0x13f65c5b00000000, 0xfd59e94900000000, + 0x983e55f100000000, 0x2106826c00000000, 0x44613ed400000000, + 0xaace8bc600000000, 0xcfa9377e00000000, 0x38417fd600000000, + 0x5d26c36e00000000, 0xb389767c00000000, 0xd6eecac400000000, + 0x6fd61d5900000000, 0x0ab1a1e100000000, 0xe41e14f300000000, + 0x8179a84b00000000, 0xd769cb1300000000, 0xb20e77ab00000000, + 0x5ca1c2b900000000, 0x39c67e0100000000, 0x80fea99c00000000, + 0xe599152400000000, 0x0b36a03600000000, 0x6e511c8e00000000, + 0xa716668600000000, 0xc271da3e00000000, 0x2cde6f2c00000000, + 0x49b9d39400000000, 0xf081040900000000, 0x95e6b8b100000000, + 0x7b490da300000000, 0x1e2eb11b00000000, 0x483ed24300000000, + 0x2d596efb00000000, 0xc3f6dbe900000000, 0xa691675100000000, + 0x1fa9b0cc00000000, 0x7ace0c7400000000, 0x9461b96600000000, + 0xf10605de00000000}, + {0x0000000000000000, 0xb029603d00000000, 0x6053c07a00000000, + 0xd07aa04700000000, 0xc0a680f500000000, 0x708fe0c800000000, + 0xa0f5408f00000000, 0x10dc20b200000000, 0xc14b703000000000, + 0x7162100d00000000, 0xa118b04a00000000, 0x1131d07700000000, + 0x01edf0c500000000, 0xb1c490f800000000, 0x61be30bf00000000, + 0xd197508200000000, 0x8297e06000000000, 0x32be805d00000000, + 0xe2c4201a00000000, 0x52ed402700000000, 0x4231609500000000, + 0xf21800a800000000, 0x2262a0ef00000000, 0x924bc0d200000000, + 0x43dc905000000000, 0xf3f5f06d00000000, 0x238f502a00000000, + 0x93a6301700000000, 0x837a10a500000000, 0x3353709800000000, + 0xe329d0df00000000, 0x5300b0e200000000, 0x042fc1c100000000, + 0xb406a1fc00000000, 0x647c01bb00000000, 0xd455618600000000, + 0xc489413400000000, 0x74a0210900000000, 0xa4da814e00000000, + 0x14f3e17300000000, 0xc564b1f100000000, 0x754dd1cc00000000, + 0xa537718b00000000, 0x151e11b600000000, 0x05c2310400000000, + 0xb5eb513900000000, 0x6591f17e00000000, 0xd5b8914300000000, + 0x86b821a100000000, 0x3691419c00000000, 0xe6ebe1db00000000, + 0x56c281e600000000, 0x461ea15400000000, 0xf637c16900000000, + 0x264d612e00000000, 0x9664011300000000, 0x47f3519100000000, + 0xf7da31ac00000000, 0x27a091eb00000000, 0x9789f1d600000000, + 0x8755d16400000000, 0x377cb15900000000, 0xe706111e00000000, + 0x572f712300000000, 0x4958f35800000000, 0xf971936500000000, + 0x290b332200000000, 0x9922531f00000000, 0x89fe73ad00000000, + 0x39d7139000000000, 0xe9adb3d700000000, 0x5984d3ea00000000, + 0x8813836800000000, 0x383ae35500000000, 0xe840431200000000, + 0x5869232f00000000, 0x48b5039d00000000, 0xf89c63a000000000, + 0x28e6c3e700000000, 0x98cfa3da00000000, 0xcbcf133800000000, + 0x7be6730500000000, 0xab9cd34200000000, 0x1bb5b37f00000000, + 0x0b6993cd00000000, 0xbb40f3f000000000, 0x6b3a53b700000000, + 0xdb13338a00000000, 0x0a84630800000000, 0xbaad033500000000, + 0x6ad7a37200000000, 0xdafec34f00000000, 0xca22e3fd00000000, + 0x7a0b83c000000000, 0xaa71238700000000, 0x1a5843ba00000000, + 0x4d77329900000000, 0xfd5e52a400000000, 0x2d24f2e300000000, + 0x9d0d92de00000000, 0x8dd1b26c00000000, 0x3df8d25100000000, + 0xed82721600000000, 0x5dab122b00000000, 0x8c3c42a900000000, + 0x3c15229400000000, 0xec6f82d300000000, 0x5c46e2ee00000000, + 0x4c9ac25c00000000, 0xfcb3a26100000000, 0x2cc9022600000000, + 0x9ce0621b00000000, 0xcfe0d2f900000000, 0x7fc9b2c400000000, + 0xafb3128300000000, 0x1f9a72be00000000, 0x0f46520c00000000, + 0xbf6f323100000000, 0x6f15927600000000, 0xdf3cf24b00000000, + 0x0eaba2c900000000, 0xbe82c2f400000000, 0x6ef862b300000000, + 0xded1028e00000000, 0xce0d223c00000000, 0x7e24420100000000, + 0xae5ee24600000000, 0x1e77827b00000000, 0x92b0e6b100000000, + 0x2299868c00000000, 0xf2e326cb00000000, 0x42ca46f600000000, + 0x5216664400000000, 0xe23f067900000000, 0x3245a63e00000000, + 0x826cc60300000000, 0x53fb968100000000, 0xe3d2f6bc00000000, + 0x33a856fb00000000, 0x838136c600000000, 0x935d167400000000, + 0x2374764900000000, 0xf30ed60e00000000, 0x4327b63300000000, + 0x102706d100000000, 0xa00e66ec00000000, 0x7074c6ab00000000, + 0xc05da69600000000, 0xd081862400000000, 0x60a8e61900000000, + 0xb0d2465e00000000, 0x00fb266300000000, 0xd16c76e100000000, + 0x614516dc00000000, 0xb13fb69b00000000, 0x0116d6a600000000, + 0x11caf61400000000, 0xa1e3962900000000, 0x7199366e00000000, + 0xc1b0565300000000, 0x969f277000000000, 0x26b6474d00000000, + 0xf6cce70a00000000, 0x46e5873700000000, 0x5639a78500000000, + 0xe610c7b800000000, 0x366a67ff00000000, 0x864307c200000000, + 0x57d4574000000000, 0xe7fd377d00000000, 0x3787973a00000000, + 0x87aef70700000000, 0x9772d7b500000000, 0x275bb78800000000, + 0xf72117cf00000000, 0x470877f200000000, 0x1408c71000000000, + 0xa421a72d00000000, 0x745b076a00000000, 0xc472675700000000, + 0xd4ae47e500000000, 0x648727d800000000, 0xb4fd879f00000000, + 0x04d4e7a200000000, 0xd543b72000000000, 0x656ad71d00000000, + 0xb510775a00000000, 0x0539176700000000, 0x15e537d500000000, + 0xa5cc57e800000000, 0x75b6f7af00000000, 0xc59f979200000000, + 0xdbe815e900000000, 0x6bc175d400000000, 0xbbbbd59300000000, + 0x0b92b5ae00000000, 0x1b4e951c00000000, 0xab67f52100000000, + 0x7b1d556600000000, 0xcb34355b00000000, 0x1aa365d900000000, + 0xaa8a05e400000000, 0x7af0a5a300000000, 0xcad9c59e00000000, + 0xda05e52c00000000, 0x6a2c851100000000, 0xba56255600000000, + 0x0a7f456b00000000, 0x597ff58900000000, 0xe95695b400000000, + 0x392c35f300000000, 0x890555ce00000000, 0x99d9757c00000000, + 0x29f0154100000000, 0xf98ab50600000000, 0x49a3d53b00000000, + 0x983485b900000000, 0x281de58400000000, 0xf86745c300000000, + 0x484e25fe00000000, 0x5892054c00000000, 0xe8bb657100000000, + 0x38c1c53600000000, 0x88e8a50b00000000, 0xdfc7d42800000000, + 0x6feeb41500000000, 0xbf94145200000000, 0x0fbd746f00000000, + 0x1f6154dd00000000, 0xaf4834e000000000, 0x7f3294a700000000, + 0xcf1bf49a00000000, 0x1e8ca41800000000, 0xaea5c42500000000, + 0x7edf646200000000, 0xcef6045f00000000, 0xde2a24ed00000000, + 0x6e0344d000000000, 0xbe79e49700000000, 0x0e5084aa00000000, + 0x5d50344800000000, 0xed79547500000000, 0x3d03f43200000000, + 0x8d2a940f00000000, 0x9df6b4bd00000000, 0x2ddfd48000000000, + 0xfda574c700000000, 0x4d8c14fa00000000, 0x9c1b447800000000, + 0x2c32244500000000, 0xfc48840200000000, 0x4c61e43f00000000, + 0x5cbdc48d00000000, 0xec94a4b000000000, 0x3cee04f700000000, + 0x8cc764ca00000000}, + {0x0000000000000000, 0xa5d35ccb00000000, 0x0ba1c84d00000000, + 0xae72948600000000, 0x1642919b00000000, 0xb391cd5000000000, + 0x1de359d600000000, 0xb830051d00000000, 0x6d8253ec00000000, + 0xc8510f2700000000, 0x66239ba100000000, 0xc3f0c76a00000000, + 0x7bc0c27700000000, 0xde139ebc00000000, 0x70610a3a00000000, + 0xd5b256f100000000, 0x9b02d60300000000, 0x3ed18ac800000000, + 0x90a31e4e00000000, 0x3570428500000000, 0x8d40479800000000, + 0x28931b5300000000, 0x86e18fd500000000, 0x2332d31e00000000, + 0xf68085ef00000000, 0x5353d92400000000, 0xfd214da200000000, + 0x58f2116900000000, 0xe0c2147400000000, 0x451148bf00000000, + 0xeb63dc3900000000, 0x4eb080f200000000, 0x3605ac0700000000, + 0x93d6f0cc00000000, 0x3da4644a00000000, 0x9877388100000000, + 0x20473d9c00000000, 0x8594615700000000, 0x2be6f5d100000000, + 0x8e35a91a00000000, 0x5b87ffeb00000000, 0xfe54a32000000000, + 0x502637a600000000, 0xf5f56b6d00000000, 0x4dc56e7000000000, + 0xe81632bb00000000, 0x4664a63d00000000, 0xe3b7faf600000000, + 0xad077a0400000000, 0x08d426cf00000000, 0xa6a6b24900000000, + 0x0375ee8200000000, 0xbb45eb9f00000000, 0x1e96b75400000000, + 0xb0e423d200000000, 0x15377f1900000000, 0xc08529e800000000, + 0x6556752300000000, 0xcb24e1a500000000, 0x6ef7bd6e00000000, + 0xd6c7b87300000000, 0x7314e4b800000000, 0xdd66703e00000000, + 0x78b52cf500000000, 0x6c0a580f00000000, 0xc9d904c400000000, + 0x67ab904200000000, 0xc278cc8900000000, 0x7a48c99400000000, + 0xdf9b955f00000000, 0x71e901d900000000, 0xd43a5d1200000000, + 0x01880be300000000, 0xa45b572800000000, 0x0a29c3ae00000000, + 0xaffa9f6500000000, 0x17ca9a7800000000, 0xb219c6b300000000, + 0x1c6b523500000000, 0xb9b80efe00000000, 0xf7088e0c00000000, + 0x52dbd2c700000000, 0xfca9464100000000, 0x597a1a8a00000000, + 0xe14a1f9700000000, 0x4499435c00000000, 0xeaebd7da00000000, + 0x4f388b1100000000, 0x9a8adde000000000, 0x3f59812b00000000, + 0x912b15ad00000000, 0x34f8496600000000, 0x8cc84c7b00000000, + 0x291b10b000000000, 0x8769843600000000, 0x22bad8fd00000000, + 0x5a0ff40800000000, 0xffdca8c300000000, 0x51ae3c4500000000, + 0xf47d608e00000000, 0x4c4d659300000000, 0xe99e395800000000, + 0x47ecadde00000000, 0xe23ff11500000000, 0x378da7e400000000, + 0x925efb2f00000000, 0x3c2c6fa900000000, 0x99ff336200000000, + 0x21cf367f00000000, 0x841c6ab400000000, 0x2a6efe3200000000, + 0x8fbda2f900000000, 0xc10d220b00000000, 0x64de7ec000000000, + 0xcaacea4600000000, 0x6f7fb68d00000000, 0xd74fb39000000000, + 0x729cef5b00000000, 0xdcee7bdd00000000, 0x793d271600000000, + 0xac8f71e700000000, 0x095c2d2c00000000, 0xa72eb9aa00000000, + 0x02fde56100000000, 0xbacde07c00000000, 0x1f1ebcb700000000, + 0xb16c283100000000, 0x14bf74fa00000000, 0xd814b01e00000000, + 0x7dc7ecd500000000, 0xd3b5785300000000, 0x7666249800000000, + 0xce56218500000000, 0x6b857d4e00000000, 0xc5f7e9c800000000, + 0x6024b50300000000, 0xb596e3f200000000, 0x1045bf3900000000, + 0xbe372bbf00000000, 0x1be4777400000000, 0xa3d4726900000000, + 0x06072ea200000000, 0xa875ba2400000000, 0x0da6e6ef00000000, + 0x4316661d00000000, 0xe6c53ad600000000, 0x48b7ae5000000000, + 0xed64f29b00000000, 0x5554f78600000000, 0xf087ab4d00000000, + 0x5ef53fcb00000000, 0xfb26630000000000, 0x2e9435f100000000, + 0x8b47693a00000000, 0x2535fdbc00000000, 0x80e6a17700000000, + 0x38d6a46a00000000, 0x9d05f8a100000000, 0x33776c2700000000, + 0x96a430ec00000000, 0xee111c1900000000, 0x4bc240d200000000, + 0xe5b0d45400000000, 0x4063889f00000000, 0xf8538d8200000000, + 0x5d80d14900000000, 0xf3f245cf00000000, 0x5621190400000000, + 0x83934ff500000000, 0x2640133e00000000, 0x883287b800000000, + 0x2de1db7300000000, 0x95d1de6e00000000, 0x300282a500000000, + 0x9e70162300000000, 0x3ba34ae800000000, 0x7513ca1a00000000, + 0xd0c096d100000000, 0x7eb2025700000000, 0xdb615e9c00000000, + 0x63515b8100000000, 0xc682074a00000000, 0x68f093cc00000000, + 0xcd23cf0700000000, 0x189199f600000000, 0xbd42c53d00000000, + 0x133051bb00000000, 0xb6e30d7000000000, 0x0ed3086d00000000, + 0xab0054a600000000, 0x0572c02000000000, 0xa0a19ceb00000000, + 0xb41ee81100000000, 0x11cdb4da00000000, 0xbfbf205c00000000, + 0x1a6c7c9700000000, 0xa25c798a00000000, 0x078f254100000000, + 0xa9fdb1c700000000, 0x0c2eed0c00000000, 0xd99cbbfd00000000, + 0x7c4fe73600000000, 0xd23d73b000000000, 0x77ee2f7b00000000, + 0xcfde2a6600000000, 0x6a0d76ad00000000, 0xc47fe22b00000000, + 0x61acbee000000000, 0x2f1c3e1200000000, 0x8acf62d900000000, + 0x24bdf65f00000000, 0x816eaa9400000000, 0x395eaf8900000000, + 0x9c8df34200000000, 0x32ff67c400000000, 0x972c3b0f00000000, + 0x429e6dfe00000000, 0xe74d313500000000, 0x493fa5b300000000, + 0xececf97800000000, 0x54dcfc6500000000, 0xf10fa0ae00000000, + 0x5f7d342800000000, 0xfaae68e300000000, 0x821b441600000000, + 0x27c818dd00000000, 0x89ba8c5b00000000, 0x2c69d09000000000, + 0x9459d58d00000000, 0x318a894600000000, 0x9ff81dc000000000, + 0x3a2b410b00000000, 0xef9917fa00000000, 0x4a4a4b3100000000, + 0xe438dfb700000000, 0x41eb837c00000000, 0xf9db866100000000, + 0x5c08daaa00000000, 0xf27a4e2c00000000, 0x57a912e700000000, + 0x1919921500000000, 0xbccacede00000000, 0x12b85a5800000000, + 0xb76b069300000000, 0x0f5b038e00000000, 0xaa885f4500000000, + 0x04facbc300000000, 0xa129970800000000, 0x749bc1f900000000, + 0xd1489d3200000000, 0x7f3a09b400000000, 0xdae9557f00000000, + 0x62d9506200000000, 0xc70a0ca900000000, 0x6978982f00000000, + 0xccabc4e400000000}, + {0x0000000000000000, 0xb40b77a600000000, 0x29119f9700000000, + 0x9d1ae83100000000, 0x13244ff400000000, 0xa72f385200000000, + 0x3a35d06300000000, 0x8e3ea7c500000000, 0x674eef3300000000, + 0xd345989500000000, 0x4e5f70a400000000, 0xfa54070200000000, + 0x746aa0c700000000, 0xc061d76100000000, 0x5d7b3f5000000000, + 0xe97048f600000000, 0xce9cde6700000000, 0x7a97a9c100000000, + 0xe78d41f000000000, 0x5386365600000000, 0xddb8919300000000, + 0x69b3e63500000000, 0xf4a90e0400000000, 0x40a279a200000000, + 0xa9d2315400000000, 0x1dd946f200000000, 0x80c3aec300000000, + 0x34c8d96500000000, 0xbaf67ea000000000, 0x0efd090600000000, + 0x93e7e13700000000, 0x27ec969100000000, 0x9c39bdcf00000000, + 0x2832ca6900000000, 0xb528225800000000, 0x012355fe00000000, + 0x8f1df23b00000000, 0x3b16859d00000000, 0xa60c6dac00000000, + 0x12071a0a00000000, 0xfb7752fc00000000, 0x4f7c255a00000000, + 0xd266cd6b00000000, 0x666dbacd00000000, 0xe8531d0800000000, + 0x5c586aae00000000, 0xc142829f00000000, 0x7549f53900000000, + 0x52a563a800000000, 0xe6ae140e00000000, 0x7bb4fc3f00000000, + 0xcfbf8b9900000000, 0x41812c5c00000000, 0xf58a5bfa00000000, + 0x6890b3cb00000000, 0xdc9bc46d00000000, 0x35eb8c9b00000000, + 0x81e0fb3d00000000, 0x1cfa130c00000000, 0xa8f164aa00000000, + 0x26cfc36f00000000, 0x92c4b4c900000000, 0x0fde5cf800000000, + 0xbbd52b5e00000000, 0x79750b4400000000, 0xcd7e7ce200000000, + 0x506494d300000000, 0xe46fe37500000000, 0x6a5144b000000000, + 0xde5a331600000000, 0x4340db2700000000, 0xf74bac8100000000, + 0x1e3be47700000000, 0xaa3093d100000000, 0x372a7be000000000, + 0x83210c4600000000, 0x0d1fab8300000000, 0xb914dc2500000000, + 0x240e341400000000, 0x900543b200000000, 0xb7e9d52300000000, + 0x03e2a28500000000, 0x9ef84ab400000000, 0x2af33d1200000000, + 0xa4cd9ad700000000, 0x10c6ed7100000000, 0x8ddc054000000000, + 0x39d772e600000000, 0xd0a73a1000000000, 0x64ac4db600000000, + 0xf9b6a58700000000, 0x4dbdd22100000000, 0xc38375e400000000, + 0x7788024200000000, 0xea92ea7300000000, 0x5e999dd500000000, + 0xe54cb68b00000000, 0x5147c12d00000000, 0xcc5d291c00000000, + 0x78565eba00000000, 0xf668f97f00000000, 0x42638ed900000000, + 0xdf7966e800000000, 0x6b72114e00000000, 0x820259b800000000, + 0x36092e1e00000000, 0xab13c62f00000000, 0x1f18b18900000000, + 0x9126164c00000000, 0x252d61ea00000000, 0xb83789db00000000, + 0x0c3cfe7d00000000, 0x2bd068ec00000000, 0x9fdb1f4a00000000, + 0x02c1f77b00000000, 0xb6ca80dd00000000, 0x38f4271800000000, + 0x8cff50be00000000, 0x11e5b88f00000000, 0xa5eecf2900000000, + 0x4c9e87df00000000, 0xf895f07900000000, 0x658f184800000000, + 0xd1846fee00000000, 0x5fbac82b00000000, 0xebb1bf8d00000000, + 0x76ab57bc00000000, 0xc2a0201a00000000, 0xf2ea168800000000, + 0x46e1612e00000000, 0xdbfb891f00000000, 0x6ff0feb900000000, + 0xe1ce597c00000000, 0x55c52eda00000000, 0xc8dfc6eb00000000, + 0x7cd4b14d00000000, 0x95a4f9bb00000000, 0x21af8e1d00000000, + 0xbcb5662c00000000, 0x08be118a00000000, 0x8680b64f00000000, + 0x328bc1e900000000, 0xaf9129d800000000, 0x1b9a5e7e00000000, + 0x3c76c8ef00000000, 0x887dbf4900000000, 0x1567577800000000, + 0xa16c20de00000000, 0x2f52871b00000000, 0x9b59f0bd00000000, + 0x0643188c00000000, 0xb2486f2a00000000, 0x5b3827dc00000000, + 0xef33507a00000000, 0x7229b84b00000000, 0xc622cfed00000000, + 0x481c682800000000, 0xfc171f8e00000000, 0x610df7bf00000000, + 0xd506801900000000, 0x6ed3ab4700000000, 0xdad8dce100000000, + 0x47c234d000000000, 0xf3c9437600000000, 0x7df7e4b300000000, + 0xc9fc931500000000, 0x54e67b2400000000, 0xe0ed0c8200000000, + 0x099d447400000000, 0xbd9633d200000000, 0x208cdbe300000000, + 0x9487ac4500000000, 0x1ab90b8000000000, 0xaeb27c2600000000, + 0x33a8941700000000, 0x87a3e3b100000000, 0xa04f752000000000, + 0x1444028600000000, 0x895eeab700000000, 0x3d559d1100000000, + 0xb36b3ad400000000, 0x07604d7200000000, 0x9a7aa54300000000, + 0x2e71d2e500000000, 0xc7019a1300000000, 0x730aedb500000000, + 0xee10058400000000, 0x5a1b722200000000, 0xd425d5e700000000, + 0x602ea24100000000, 0xfd344a7000000000, 0x493f3dd600000000, + 0x8b9f1dcc00000000, 0x3f946a6a00000000, 0xa28e825b00000000, + 0x1685f5fd00000000, 0x98bb523800000000, 0x2cb0259e00000000, + 0xb1aacdaf00000000, 0x05a1ba0900000000, 0xecd1f2ff00000000, + 0x58da855900000000, 0xc5c06d6800000000, 0x71cb1ace00000000, + 0xfff5bd0b00000000, 0x4bfecaad00000000, 0xd6e4229c00000000, + 0x62ef553a00000000, 0x4503c3ab00000000, 0xf108b40d00000000, + 0x6c125c3c00000000, 0xd8192b9a00000000, 0x56278c5f00000000, + 0xe22cfbf900000000, 0x7f3613c800000000, 0xcb3d646e00000000, + 0x224d2c9800000000, 0x96465b3e00000000, 0x0b5cb30f00000000, + 0xbf57c4a900000000, 0x3169636c00000000, 0x856214ca00000000, + 0x1878fcfb00000000, 0xac738b5d00000000, 0x17a6a00300000000, + 0xa3add7a500000000, 0x3eb73f9400000000, 0x8abc483200000000, + 0x0482eff700000000, 0xb089985100000000, 0x2d93706000000000, + 0x999807c600000000, 0x70e84f3000000000, 0xc4e3389600000000, + 0x59f9d0a700000000, 0xedf2a70100000000, 0x63cc00c400000000, + 0xd7c7776200000000, 0x4add9f5300000000, 0xfed6e8f500000000, + 0xd93a7e6400000000, 0x6d3109c200000000, 0xf02be1f300000000, + 0x4420965500000000, 0xca1e319000000000, 0x7e15463600000000, + 0xe30fae0700000000, 0x5704d9a100000000, 0xbe74915700000000, + 0x0a7fe6f100000000, 0x97650ec000000000, 0x236e796600000000, + 0xad50dea300000000, 0x195ba90500000000, 0x8441413400000000, + 0x304a369200000000}, + {0x0000000000000000, 0x9e00aacc00000000, 0x7d07254200000000, + 0xe3078f8e00000000, 0xfa0e4a8400000000, 0x640ee04800000000, + 0x87096fc600000000, 0x1909c50a00000000, 0xb51be5d300000000, + 0x2b1b4f1f00000000, 0xc81cc09100000000, 0x561c6a5d00000000, + 0x4f15af5700000000, 0xd115059b00000000, 0x32128a1500000000, + 0xac1220d900000000, 0x2b31bb7c00000000, 0xb53111b000000000, + 0x56369e3e00000000, 0xc83634f200000000, 0xd13ff1f800000000, + 0x4f3f5b3400000000, 0xac38d4ba00000000, 0x32387e7600000000, + 0x9e2a5eaf00000000, 0x002af46300000000, 0xe32d7bed00000000, + 0x7d2dd12100000000, 0x6424142b00000000, 0xfa24bee700000000, + 0x1923316900000000, 0x87239ba500000000, 0x566276f900000000, + 0xc862dc3500000000, 0x2b6553bb00000000, 0xb565f97700000000, + 0xac6c3c7d00000000, 0x326c96b100000000, 0xd16b193f00000000, + 0x4f6bb3f300000000, 0xe379932a00000000, 0x7d7939e600000000, + 0x9e7eb66800000000, 0x007e1ca400000000, 0x1977d9ae00000000, + 0x8777736200000000, 0x6470fcec00000000, 0xfa70562000000000, + 0x7d53cd8500000000, 0xe353674900000000, 0x0054e8c700000000, + 0x9e54420b00000000, 0x875d870100000000, 0x195d2dcd00000000, + 0xfa5aa24300000000, 0x645a088f00000000, 0xc848285600000000, + 0x5648829a00000000, 0xb54f0d1400000000, 0x2b4fa7d800000000, + 0x324662d200000000, 0xac46c81e00000000, 0x4f41479000000000, + 0xd141ed5c00000000, 0xedc29d2900000000, 0x73c237e500000000, + 0x90c5b86b00000000, 0x0ec512a700000000, 0x17ccd7ad00000000, + 0x89cc7d6100000000, 0x6acbf2ef00000000, 0xf4cb582300000000, + 0x58d978fa00000000, 0xc6d9d23600000000, 0x25de5db800000000, + 0xbbdef77400000000, 0xa2d7327e00000000, 0x3cd798b200000000, + 0xdfd0173c00000000, 0x41d0bdf000000000, 0xc6f3265500000000, + 0x58f38c9900000000, 0xbbf4031700000000, 0x25f4a9db00000000, + 0x3cfd6cd100000000, 0xa2fdc61d00000000, 0x41fa499300000000, + 0xdffae35f00000000, 0x73e8c38600000000, 0xede8694a00000000, + 0x0eefe6c400000000, 0x90ef4c0800000000, 0x89e6890200000000, + 0x17e623ce00000000, 0xf4e1ac4000000000, 0x6ae1068c00000000, + 0xbba0ebd000000000, 0x25a0411c00000000, 0xc6a7ce9200000000, + 0x58a7645e00000000, 0x41aea15400000000, 0xdfae0b9800000000, + 0x3ca9841600000000, 0xa2a92eda00000000, 0x0ebb0e0300000000, + 0x90bba4cf00000000, 0x73bc2b4100000000, 0xedbc818d00000000, + 0xf4b5448700000000, 0x6ab5ee4b00000000, 0x89b261c500000000, + 0x17b2cb0900000000, 0x909150ac00000000, 0x0e91fa6000000000, + 0xed9675ee00000000, 0x7396df2200000000, 0x6a9f1a2800000000, + 0xf49fb0e400000000, 0x17983f6a00000000, 0x899895a600000000, + 0x258ab57f00000000, 0xbb8a1fb300000000, 0x588d903d00000000, + 0xc68d3af100000000, 0xdf84fffb00000000, 0x4184553700000000, + 0xa283dab900000000, 0x3c83707500000000, 0xda853b5300000000, + 0x4485919f00000000, 0xa7821e1100000000, 0x3982b4dd00000000, + 0x208b71d700000000, 0xbe8bdb1b00000000, 0x5d8c549500000000, + 0xc38cfe5900000000, 0x6f9ede8000000000, 0xf19e744c00000000, + 0x1299fbc200000000, 0x8c99510e00000000, 0x9590940400000000, + 0x0b903ec800000000, 0xe897b14600000000, 0x76971b8a00000000, + 0xf1b4802f00000000, 0x6fb42ae300000000, 0x8cb3a56d00000000, + 0x12b30fa100000000, 0x0bbacaab00000000, 0x95ba606700000000, + 0x76bdefe900000000, 0xe8bd452500000000, 0x44af65fc00000000, + 0xdaafcf3000000000, 0x39a840be00000000, 0xa7a8ea7200000000, + 0xbea12f7800000000, 0x20a185b400000000, 0xc3a60a3a00000000, + 0x5da6a0f600000000, 0x8ce74daa00000000, 0x12e7e76600000000, + 0xf1e068e800000000, 0x6fe0c22400000000, 0x76e9072e00000000, + 0xe8e9ade200000000, 0x0bee226c00000000, 0x95ee88a000000000, + 0x39fca87900000000, 0xa7fc02b500000000, 0x44fb8d3b00000000, + 0xdafb27f700000000, 0xc3f2e2fd00000000, 0x5df2483100000000, + 0xbef5c7bf00000000, 0x20f56d7300000000, 0xa7d6f6d600000000, + 0x39d65c1a00000000, 0xdad1d39400000000, 0x44d1795800000000, + 0x5dd8bc5200000000, 0xc3d8169e00000000, 0x20df991000000000, + 0xbedf33dc00000000, 0x12cd130500000000, 0x8ccdb9c900000000, + 0x6fca364700000000, 0xf1ca9c8b00000000, 0xe8c3598100000000, + 0x76c3f34d00000000, 0x95c47cc300000000, 0x0bc4d60f00000000, + 0x3747a67a00000000, 0xa9470cb600000000, 0x4a40833800000000, + 0xd44029f400000000, 0xcd49ecfe00000000, 0x5349463200000000, + 0xb04ec9bc00000000, 0x2e4e637000000000, 0x825c43a900000000, + 0x1c5ce96500000000, 0xff5b66eb00000000, 0x615bcc2700000000, + 0x7852092d00000000, 0xe652a3e100000000, 0x05552c6f00000000, + 0x9b5586a300000000, 0x1c761d0600000000, 0x8276b7ca00000000, + 0x6171384400000000, 0xff71928800000000, 0xe678578200000000, + 0x7878fd4e00000000, 0x9b7f72c000000000, 0x057fd80c00000000, + 0xa96df8d500000000, 0x376d521900000000, 0xd46add9700000000, + 0x4a6a775b00000000, 0x5363b25100000000, 0xcd63189d00000000, + 0x2e64971300000000, 0xb0643ddf00000000, 0x6125d08300000000, + 0xff257a4f00000000, 0x1c22f5c100000000, 0x82225f0d00000000, + 0x9b2b9a0700000000, 0x052b30cb00000000, 0xe62cbf4500000000, + 0x782c158900000000, 0xd43e355000000000, 0x4a3e9f9c00000000, + 0xa939101200000000, 0x3739bade00000000, 0x2e307fd400000000, + 0xb030d51800000000, 0x53375a9600000000, 0xcd37f05a00000000, + 0x4a146bff00000000, 0xd414c13300000000, 0x37134ebd00000000, + 0xa913e47100000000, 0xb01a217b00000000, 0x2e1a8bb700000000, + 0xcd1d043900000000, 0x531daef500000000, 0xff0f8e2c00000000, + 0x610f24e000000000, 0x8208ab6e00000000, 0x1c0801a200000000, + 0x0501c4a800000000, 0x9b016e6400000000, 0x7806e1ea00000000, + 0xe6064b2600000000}}; + +#else /* W == 4 */ + +local const z_crc_t FAR crc_braid_table[][256] = { + {0x00000000, 0xb8bc6765, 0xaa09c88b, 0x12b5afee, 0x8f629757, + 0x37def032, 0x256b5fdc, 0x9dd738b9, 0xc5b428ef, 0x7d084f8a, + 0x6fbde064, 0xd7018701, 0x4ad6bfb8, 0xf26ad8dd, 0xe0df7733, + 0x58631056, 0x5019579f, 0xe8a530fa, 0xfa109f14, 0x42acf871, + 0xdf7bc0c8, 0x67c7a7ad, 0x75720843, 0xcdce6f26, 0x95ad7f70, + 0x2d111815, 0x3fa4b7fb, 0x8718d09e, 0x1acfe827, 0xa2738f42, + 0xb0c620ac, 0x087a47c9, 0xa032af3e, 0x188ec85b, 0x0a3b67b5, + 0xb28700d0, 0x2f503869, 0x97ec5f0c, 0x8559f0e2, 0x3de59787, + 0x658687d1, 0xdd3ae0b4, 0xcf8f4f5a, 0x7733283f, 0xeae41086, + 0x525877e3, 0x40edd80d, 0xf851bf68, 0xf02bf8a1, 0x48979fc4, + 0x5a22302a, 0xe29e574f, 0x7f496ff6, 0xc7f50893, 0xd540a77d, + 0x6dfcc018, 0x359fd04e, 0x8d23b72b, 0x9f9618c5, 0x272a7fa0, + 0xbafd4719, 0x0241207c, 0x10f48f92, 0xa848e8f7, 0x9b14583d, + 0x23a83f58, 0x311d90b6, 0x89a1f7d3, 0x1476cf6a, 0xaccaa80f, + 0xbe7f07e1, 0x06c36084, 0x5ea070d2, 0xe61c17b7, 0xf4a9b859, + 0x4c15df3c, 0xd1c2e785, 0x697e80e0, 0x7bcb2f0e, 0xc377486b, + 0xcb0d0fa2, 0x73b168c7, 0x6104c729, 0xd9b8a04c, 0x446f98f5, + 0xfcd3ff90, 0xee66507e, 0x56da371b, 0x0eb9274d, 0xb6054028, + 0xa4b0efc6, 0x1c0c88a3, 0x81dbb01a, 0x3967d77f, 0x2bd27891, + 0x936e1ff4, 0x3b26f703, 0x839a9066, 0x912f3f88, 0x299358ed, + 0xb4446054, 0x0cf80731, 0x1e4da8df, 0xa6f1cfba, 0xfe92dfec, + 0x462eb889, 0x549b1767, 0xec277002, 0x71f048bb, 0xc94c2fde, + 0xdbf98030, 0x6345e755, 0x6b3fa09c, 0xd383c7f9, 0xc1366817, + 0x798a0f72, 0xe45d37cb, 0x5ce150ae, 0x4e54ff40, 0xf6e89825, + 0xae8b8873, 0x1637ef16, 0x048240f8, 0xbc3e279d, 0x21e91f24, + 0x99557841, 0x8be0d7af, 0x335cb0ca, 0xed59b63b, 0x55e5d15e, + 0x47507eb0, 0xffec19d5, 0x623b216c, 0xda874609, 0xc832e9e7, + 0x708e8e82, 0x28ed9ed4, 0x9051f9b1, 0x82e4565f, 0x3a58313a, + 0xa78f0983, 0x1f336ee6, 0x0d86c108, 0xb53aa66d, 0xbd40e1a4, + 0x05fc86c1, 0x1749292f, 0xaff54e4a, 0x322276f3, 0x8a9e1196, + 0x982bbe78, 0x2097d91d, 0x78f4c94b, 0xc048ae2e, 0xd2fd01c0, + 0x6a4166a5, 0xf7965e1c, 0x4f2a3979, 0x5d9f9697, 0xe523f1f2, + 0x4d6b1905, 0xf5d77e60, 0xe762d18e, 0x5fdeb6eb, 0xc2098e52, + 0x7ab5e937, 0x680046d9, 0xd0bc21bc, 0x88df31ea, 0x3063568f, + 0x22d6f961, 0x9a6a9e04, 0x07bda6bd, 0xbf01c1d8, 0xadb46e36, + 0x15080953, 0x1d724e9a, 0xa5ce29ff, 0xb77b8611, 0x0fc7e174, + 0x9210d9cd, 0x2aacbea8, 0x38191146, 0x80a57623, 0xd8c66675, + 0x607a0110, 0x72cfaefe, 0xca73c99b, 0x57a4f122, 0xef189647, + 0xfdad39a9, 0x45115ecc, 0x764dee06, 0xcef18963, 0xdc44268d, + 0x64f841e8, 0xf92f7951, 0x41931e34, 0x5326b1da, 0xeb9ad6bf, + 0xb3f9c6e9, 0x0b45a18c, 0x19f00e62, 0xa14c6907, 0x3c9b51be, + 0x842736db, 0x96929935, 0x2e2efe50, 0x2654b999, 0x9ee8defc, + 0x8c5d7112, 0x34e11677, 0xa9362ece, 0x118a49ab, 0x033fe645, + 0xbb838120, 0xe3e09176, 0x5b5cf613, 0x49e959fd, 0xf1553e98, + 0x6c820621, 0xd43e6144, 0xc68bceaa, 0x7e37a9cf, 0xd67f4138, + 0x6ec3265d, 0x7c7689b3, 0xc4caeed6, 0x591dd66f, 0xe1a1b10a, + 0xf3141ee4, 0x4ba87981, 0x13cb69d7, 0xab770eb2, 0xb9c2a15c, + 0x017ec639, 0x9ca9fe80, 0x241599e5, 0x36a0360b, 0x8e1c516e, + 0x866616a7, 0x3eda71c2, 0x2c6fde2c, 0x94d3b949, 0x090481f0, + 0xb1b8e695, 0xa30d497b, 0x1bb12e1e, 0x43d23e48, 0xfb6e592d, + 0xe9dbf6c3, 0x516791a6, 0xccb0a91f, 0x740cce7a, 0x66b96194, + 0xde0506f1}, + {0x00000000, 0x01c26a37, 0x0384d46e, 0x0246be59, 0x0709a8dc, + 0x06cbc2eb, 0x048d7cb2, 0x054f1685, 0x0e1351b8, 0x0fd13b8f, + 0x0d9785d6, 0x0c55efe1, 0x091af964, 0x08d89353, 0x0a9e2d0a, + 0x0b5c473d, 0x1c26a370, 0x1de4c947, 0x1fa2771e, 0x1e601d29, + 0x1b2f0bac, 0x1aed619b, 0x18abdfc2, 0x1969b5f5, 0x1235f2c8, + 0x13f798ff, 0x11b126a6, 0x10734c91, 0x153c5a14, 0x14fe3023, + 0x16b88e7a, 0x177ae44d, 0x384d46e0, 0x398f2cd7, 0x3bc9928e, + 0x3a0bf8b9, 0x3f44ee3c, 0x3e86840b, 0x3cc03a52, 0x3d025065, + 0x365e1758, 0x379c7d6f, 0x35dac336, 0x3418a901, 0x3157bf84, + 0x3095d5b3, 0x32d36bea, 0x331101dd, 0x246be590, 0x25a98fa7, + 0x27ef31fe, 0x262d5bc9, 0x23624d4c, 0x22a0277b, 0x20e69922, + 0x2124f315, 0x2a78b428, 0x2bbade1f, 0x29fc6046, 0x283e0a71, + 0x2d711cf4, 0x2cb376c3, 0x2ef5c89a, 0x2f37a2ad, 0x709a8dc0, + 0x7158e7f7, 0x731e59ae, 0x72dc3399, 0x7793251c, 0x76514f2b, + 0x7417f172, 0x75d59b45, 0x7e89dc78, 0x7f4bb64f, 0x7d0d0816, + 0x7ccf6221, 0x798074a4, 0x78421e93, 0x7a04a0ca, 0x7bc6cafd, + 0x6cbc2eb0, 0x6d7e4487, 0x6f38fade, 0x6efa90e9, 0x6bb5866c, + 0x6a77ec5b, 0x68315202, 0x69f33835, 0x62af7f08, 0x636d153f, + 0x612bab66, 0x60e9c151, 0x65a6d7d4, 0x6464bde3, 0x662203ba, + 0x67e0698d, 0x48d7cb20, 0x4915a117, 0x4b531f4e, 0x4a917579, + 0x4fde63fc, 0x4e1c09cb, 0x4c5ab792, 0x4d98dda5, 0x46c49a98, + 0x4706f0af, 0x45404ef6, 0x448224c1, 0x41cd3244, 0x400f5873, + 0x4249e62a, 0x438b8c1d, 0x54f16850, 0x55330267, 0x5775bc3e, + 0x56b7d609, 0x53f8c08c, 0x523aaabb, 0x507c14e2, 0x51be7ed5, + 0x5ae239e8, 0x5b2053df, 0x5966ed86, 0x58a487b1, 0x5deb9134, + 0x5c29fb03, 0x5e6f455a, 0x5fad2f6d, 0xe1351b80, 0xe0f771b7, + 0xe2b1cfee, 0xe373a5d9, 0xe63cb35c, 0xe7fed96b, 0xe5b86732, + 0xe47a0d05, 0xef264a38, 0xeee4200f, 0xeca29e56, 0xed60f461, + 0xe82fe2e4, 0xe9ed88d3, 0xebab368a, 0xea695cbd, 0xfd13b8f0, + 0xfcd1d2c7, 0xfe976c9e, 0xff5506a9, 0xfa1a102c, 0xfbd87a1b, + 0xf99ec442, 0xf85cae75, 0xf300e948, 0xf2c2837f, 0xf0843d26, + 0xf1465711, 0xf4094194, 0xf5cb2ba3, 0xf78d95fa, 0xf64fffcd, + 0xd9785d60, 0xd8ba3757, 0xdafc890e, 0xdb3ee339, 0xde71f5bc, + 0xdfb39f8b, 0xddf521d2, 0xdc374be5, 0xd76b0cd8, 0xd6a966ef, + 0xd4efd8b6, 0xd52db281, 0xd062a404, 0xd1a0ce33, 0xd3e6706a, + 0xd2241a5d, 0xc55efe10, 0xc49c9427, 0xc6da2a7e, 0xc7184049, + 0xc25756cc, 0xc3953cfb, 0xc1d382a2, 0xc011e895, 0xcb4dafa8, + 0xca8fc59f, 0xc8c97bc6, 0xc90b11f1, 0xcc440774, 0xcd866d43, + 0xcfc0d31a, 0xce02b92d, 0x91af9640, 0x906dfc77, 0x922b422e, + 0x93e92819, 0x96a63e9c, 0x976454ab, 0x9522eaf2, 0x94e080c5, + 0x9fbcc7f8, 0x9e7eadcf, 0x9c381396, 0x9dfa79a1, 0x98b56f24, + 0x99770513, 0x9b31bb4a, 0x9af3d17d, 0x8d893530, 0x8c4b5f07, + 0x8e0de15e, 0x8fcf8b69, 0x8a809dec, 0x8b42f7db, 0x89044982, + 0x88c623b5, 0x839a6488, 0x82580ebf, 0x801eb0e6, 0x81dcdad1, + 0x8493cc54, 0x8551a663, 0x8717183a, 0x86d5720d, 0xa9e2d0a0, + 0xa820ba97, 0xaa6604ce, 0xaba46ef9, 0xaeeb787c, 0xaf29124b, + 0xad6fac12, 0xacadc625, 0xa7f18118, 0xa633eb2f, 0xa4755576, + 0xa5b73f41, 0xa0f829c4, 0xa13a43f3, 0xa37cfdaa, 0xa2be979d, + 0xb5c473d0, 0xb40619e7, 0xb640a7be, 0xb782cd89, 0xb2cddb0c, + 0xb30fb13b, 0xb1490f62, 0xb08b6555, 0xbbd72268, 0xba15485f, + 0xb853f606, 0xb9919c31, 0xbcde8ab4, 0xbd1ce083, 0xbf5a5eda, + 0xbe9834ed}, + {0x00000000, 0x191b3141, 0x32366282, 0x2b2d53c3, 0x646cc504, + 0x7d77f445, 0x565aa786, 0x4f4196c7, 0xc8d98a08, 0xd1c2bb49, + 0xfaefe88a, 0xe3f4d9cb, 0xacb54f0c, 0xb5ae7e4d, 0x9e832d8e, + 0x87981ccf, 0x4ac21251, 0x53d92310, 0x78f470d3, 0x61ef4192, + 0x2eaed755, 0x37b5e614, 0x1c98b5d7, 0x05838496, 0x821b9859, + 0x9b00a918, 0xb02dfadb, 0xa936cb9a, 0xe6775d5d, 0xff6c6c1c, + 0xd4413fdf, 0xcd5a0e9e, 0x958424a2, 0x8c9f15e3, 0xa7b24620, + 0xbea97761, 0xf1e8e1a6, 0xe8f3d0e7, 0xc3de8324, 0xdac5b265, + 0x5d5daeaa, 0x44469feb, 0x6f6bcc28, 0x7670fd69, 0x39316bae, + 0x202a5aef, 0x0b07092c, 0x121c386d, 0xdf4636f3, 0xc65d07b2, + 0xed705471, 0xf46b6530, 0xbb2af3f7, 0xa231c2b6, 0x891c9175, + 0x9007a034, 0x179fbcfb, 0x0e848dba, 0x25a9de79, 0x3cb2ef38, + 0x73f379ff, 0x6ae848be, 0x41c51b7d, 0x58de2a3c, 0xf0794f05, + 0xe9627e44, 0xc24f2d87, 0xdb541cc6, 0x94158a01, 0x8d0ebb40, + 0xa623e883, 0xbf38d9c2, 0x38a0c50d, 0x21bbf44c, 0x0a96a78f, + 0x138d96ce, 0x5ccc0009, 0x45d73148, 0x6efa628b, 0x77e153ca, + 0xbabb5d54, 0xa3a06c15, 0x888d3fd6, 0x91960e97, 0xded79850, + 0xc7cca911, 0xece1fad2, 0xf5facb93, 0x7262d75c, 0x6b79e61d, + 0x4054b5de, 0x594f849f, 0x160e1258, 0x0f152319, 0x243870da, + 0x3d23419b, 0x65fd6ba7, 0x7ce65ae6, 0x57cb0925, 0x4ed03864, + 0x0191aea3, 0x188a9fe2, 0x33a7cc21, 0x2abcfd60, 0xad24e1af, + 0xb43fd0ee, 0x9f12832d, 0x8609b26c, 0xc94824ab, 0xd05315ea, + 0xfb7e4629, 0xe2657768, 0x2f3f79f6, 0x362448b7, 0x1d091b74, + 0x04122a35, 0x4b53bcf2, 0x52488db3, 0x7965de70, 0x607eef31, + 0xe7e6f3fe, 0xfefdc2bf, 0xd5d0917c, 0xcccba03d, 0x838a36fa, + 0x9a9107bb, 0xb1bc5478, 0xa8a76539, 0x3b83984b, 0x2298a90a, + 0x09b5fac9, 0x10aecb88, 0x5fef5d4f, 0x46f46c0e, 0x6dd93fcd, + 0x74c20e8c, 0xf35a1243, 0xea412302, 0xc16c70c1, 0xd8774180, + 0x9736d747, 0x8e2de606, 0xa500b5c5, 0xbc1b8484, 0x71418a1a, + 0x685abb5b, 0x4377e898, 0x5a6cd9d9, 0x152d4f1e, 0x0c367e5f, + 0x271b2d9c, 0x3e001cdd, 0xb9980012, 0xa0833153, 0x8bae6290, + 0x92b553d1, 0xddf4c516, 0xc4eff457, 0xefc2a794, 0xf6d996d5, + 0xae07bce9, 0xb71c8da8, 0x9c31de6b, 0x852aef2a, 0xca6b79ed, + 0xd37048ac, 0xf85d1b6f, 0xe1462a2e, 0x66de36e1, 0x7fc507a0, + 0x54e85463, 0x4df36522, 0x02b2f3e5, 0x1ba9c2a4, 0x30849167, + 0x299fa026, 0xe4c5aeb8, 0xfdde9ff9, 0xd6f3cc3a, 0xcfe8fd7b, + 0x80a96bbc, 0x99b25afd, 0xb29f093e, 0xab84387f, 0x2c1c24b0, + 0x350715f1, 0x1e2a4632, 0x07317773, 0x4870e1b4, 0x516bd0f5, + 0x7a468336, 0x635db277, 0xcbfad74e, 0xd2e1e60f, 0xf9ccb5cc, + 0xe0d7848d, 0xaf96124a, 0xb68d230b, 0x9da070c8, 0x84bb4189, + 0x03235d46, 0x1a386c07, 0x31153fc4, 0x280e0e85, 0x674f9842, + 0x7e54a903, 0x5579fac0, 0x4c62cb81, 0x8138c51f, 0x9823f45e, + 0xb30ea79d, 0xaa1596dc, 0xe554001b, 0xfc4f315a, 0xd7626299, + 0xce7953d8, 0x49e14f17, 0x50fa7e56, 0x7bd72d95, 0x62cc1cd4, + 0x2d8d8a13, 0x3496bb52, 0x1fbbe891, 0x06a0d9d0, 0x5e7ef3ec, + 0x4765c2ad, 0x6c48916e, 0x7553a02f, 0x3a1236e8, 0x230907a9, + 0x0824546a, 0x113f652b, 0x96a779e4, 0x8fbc48a5, 0xa4911b66, + 0xbd8a2a27, 0xf2cbbce0, 0xebd08da1, 0xc0fdde62, 0xd9e6ef23, + 0x14bce1bd, 0x0da7d0fc, 0x268a833f, 0x3f91b27e, 0x70d024b9, + 0x69cb15f8, 0x42e6463b, 0x5bfd777a, 0xdc656bb5, 0xc57e5af4, + 0xee530937, 0xf7483876, 0xb809aeb1, 0xa1129ff0, 0x8a3fcc33, + 0x9324fd72}, + {0x00000000, 0x77073096, 0xee0e612c, 0x990951ba, 0x076dc419, + 0x706af48f, 0xe963a535, 0x9e6495a3, 0x0edb8832, 0x79dcb8a4, + 0xe0d5e91e, 0x97d2d988, 0x09b64c2b, 0x7eb17cbd, 0xe7b82d07, + 0x90bf1d91, 0x1db71064, 0x6ab020f2, 0xf3b97148, 0x84be41de, + 0x1adad47d, 0x6ddde4eb, 0xf4d4b551, 0x83d385c7, 0x136c9856, + 0x646ba8c0, 0xfd62f97a, 0x8a65c9ec, 0x14015c4f, 0x63066cd9, + 0xfa0f3d63, 0x8d080df5, 0x3b6e20c8, 0x4c69105e, 0xd56041e4, + 0xa2677172, 0x3c03e4d1, 0x4b04d447, 0xd20d85fd, 0xa50ab56b, + 0x35b5a8fa, 0x42b2986c, 0xdbbbc9d6, 0xacbcf940, 0x32d86ce3, + 0x45df5c75, 0xdcd60dcf, 0xabd13d59, 0x26d930ac, 0x51de003a, + 0xc8d75180, 0xbfd06116, 0x21b4f4b5, 0x56b3c423, 0xcfba9599, + 0xb8bda50f, 0x2802b89e, 0x5f058808, 0xc60cd9b2, 0xb10be924, + 0x2f6f7c87, 0x58684c11, 0xc1611dab, 0xb6662d3d, 0x76dc4190, + 0x01db7106, 0x98d220bc, 0xefd5102a, 0x71b18589, 0x06b6b51f, + 0x9fbfe4a5, 0xe8b8d433, 0x7807c9a2, 0x0f00f934, 0x9609a88e, + 0xe10e9818, 0x7f6a0dbb, 0x086d3d2d, 0x91646c97, 0xe6635c01, + 0x6b6b51f4, 0x1c6c6162, 0x856530d8, 0xf262004e, 0x6c0695ed, + 0x1b01a57b, 0x8208f4c1, 0xf50fc457, 0x65b0d9c6, 0x12b7e950, + 0x8bbeb8ea, 0xfcb9887c, 0x62dd1ddf, 0x15da2d49, 0x8cd37cf3, + 0xfbd44c65, 0x4db26158, 0x3ab551ce, 0xa3bc0074, 0xd4bb30e2, + 0x4adfa541, 0x3dd895d7, 0xa4d1c46d, 0xd3d6f4fb, 0x4369e96a, + 0x346ed9fc, 0xad678846, 0xda60b8d0, 0x44042d73, 0x33031de5, + 0xaa0a4c5f, 0xdd0d7cc9, 0x5005713c, 0x270241aa, 0xbe0b1010, + 0xc90c2086, 0x5768b525, 0x206f85b3, 0xb966d409, 0xce61e49f, + 0x5edef90e, 0x29d9c998, 0xb0d09822, 0xc7d7a8b4, 0x59b33d17, + 0x2eb40d81, 0xb7bd5c3b, 0xc0ba6cad, 0xedb88320, 0x9abfb3b6, + 0x03b6e20c, 0x74b1d29a, 0xead54739, 0x9dd277af, 0x04db2615, + 0x73dc1683, 0xe3630b12, 0x94643b84, 0x0d6d6a3e, 0x7a6a5aa8, + 0xe40ecf0b, 0x9309ff9d, 0x0a00ae27, 0x7d079eb1, 0xf00f9344, + 0x8708a3d2, 0x1e01f268, 0x6906c2fe, 0xf762575d, 0x806567cb, + 0x196c3671, 0x6e6b06e7, 0xfed41b76, 0x89d32be0, 0x10da7a5a, + 0x67dd4acc, 0xf9b9df6f, 0x8ebeeff9, 0x17b7be43, 0x60b08ed5, + 0xd6d6a3e8, 0xa1d1937e, 0x38d8c2c4, 0x4fdff252, 0xd1bb67f1, + 0xa6bc5767, 0x3fb506dd, 0x48b2364b, 0xd80d2bda, 0xaf0a1b4c, + 0x36034af6, 0x41047a60, 0xdf60efc3, 0xa867df55, 0x316e8eef, + 0x4669be79, 0xcb61b38c, 0xbc66831a, 0x256fd2a0, 0x5268e236, + 0xcc0c7795, 0xbb0b4703, 0x220216b9, 0x5505262f, 0xc5ba3bbe, + 0xb2bd0b28, 0x2bb45a92, 0x5cb36a04, 0xc2d7ffa7, 0xb5d0cf31, + 0x2cd99e8b, 0x5bdeae1d, 0x9b64c2b0, 0xec63f226, 0x756aa39c, + 0x026d930a, 0x9c0906a9, 0xeb0e363f, 0x72076785, 0x05005713, + 0x95bf4a82, 0xe2b87a14, 0x7bb12bae, 0x0cb61b38, 0x92d28e9b, + 0xe5d5be0d, 0x7cdcefb7, 0x0bdbdf21, 0x86d3d2d4, 0xf1d4e242, + 0x68ddb3f8, 0x1fda836e, 0x81be16cd, 0xf6b9265b, 0x6fb077e1, + 0x18b74777, 0x88085ae6, 0xff0f6a70, 0x66063bca, 0x11010b5c, + 0x8f659eff, 0xf862ae69, 0x616bffd3, 0x166ccf45, 0xa00ae278, + 0xd70dd2ee, 0x4e048354, 0x3903b3c2, 0xa7672661, 0xd06016f7, + 0x4969474d, 0x3e6e77db, 0xaed16a4a, 0xd9d65adc, 0x40df0b66, + 0x37d83bf0, 0xa9bcae53, 0xdebb9ec5, 0x47b2cf7f, 0x30b5ffe9, + 0xbdbdf21c, 0xcabac28a, 0x53b39330, 0x24b4a3a6, 0xbad03605, + 0xcdd70693, 0x54de5729, 0x23d967bf, 0xb3667a2e, 0xc4614ab8, + 0x5d681b02, 0x2a6f2b94, 0xb40bbe37, 0xc30c8ea1, 0x5a05df1b, + 0x2d02ef8d}}; + +local const z_word_t FAR crc_braid_big_table[][256] = { + {0x00000000, 0x96300777, 0x2c610eee, 0xba510999, 0x19c46d07, + 0x8ff46a70, 0x35a563e9, 0xa395649e, 0x3288db0e, 0xa4b8dc79, + 0x1ee9d5e0, 0x88d9d297, 0x2b4cb609, 0xbd7cb17e, 0x072db8e7, + 0x911dbf90, 0x6410b71d, 0xf220b06a, 0x4871b9f3, 0xde41be84, + 0x7dd4da1a, 0xebe4dd6d, 0x51b5d4f4, 0xc785d383, 0x56986c13, + 0xc0a86b64, 0x7af962fd, 0xecc9658a, 0x4f5c0114, 0xd96c0663, + 0x633d0ffa, 0xf50d088d, 0xc8206e3b, 0x5e10694c, 0xe44160d5, + 0x727167a2, 0xd1e4033c, 0x47d4044b, 0xfd850dd2, 0x6bb50aa5, + 0xfaa8b535, 0x6c98b242, 0xd6c9bbdb, 0x40f9bcac, 0xe36cd832, + 0x755cdf45, 0xcf0dd6dc, 0x593dd1ab, 0xac30d926, 0x3a00de51, + 0x8051d7c8, 0x1661d0bf, 0xb5f4b421, 0x23c4b356, 0x9995bacf, + 0x0fa5bdb8, 0x9eb80228, 0x0888055f, 0xb2d90cc6, 0x24e90bb1, + 0x877c6f2f, 0x114c6858, 0xab1d61c1, 0x3d2d66b6, 0x9041dc76, + 0x0671db01, 0xbc20d298, 0x2a10d5ef, 0x8985b171, 0x1fb5b606, + 0xa5e4bf9f, 0x33d4b8e8, 0xa2c90778, 0x34f9000f, 0x8ea80996, + 0x18980ee1, 0xbb0d6a7f, 0x2d3d6d08, 0x976c6491, 0x015c63e6, + 0xf4516b6b, 0x62616c1c, 0xd8306585, 0x4e0062f2, 0xed95066c, + 0x7ba5011b, 0xc1f40882, 0x57c40ff5, 0xc6d9b065, 0x50e9b712, + 0xeab8be8b, 0x7c88b9fc, 0xdf1ddd62, 0x492dda15, 0xf37cd38c, + 0x654cd4fb, 0x5861b24d, 0xce51b53a, 0x7400bca3, 0xe230bbd4, + 0x41a5df4a, 0xd795d83d, 0x6dc4d1a4, 0xfbf4d6d3, 0x6ae96943, + 0xfcd96e34, 0x468867ad, 0xd0b860da, 0x732d0444, 0xe51d0333, + 0x5f4c0aaa, 0xc97c0ddd, 0x3c710550, 0xaa410227, 0x10100bbe, + 0x86200cc9, 0x25b56857, 0xb3856f20, 0x09d466b9, 0x9fe461ce, + 0x0ef9de5e, 0x98c9d929, 0x2298d0b0, 0xb4a8d7c7, 0x173db359, + 0x810db42e, 0x3b5cbdb7, 0xad6cbac0, 0x2083b8ed, 0xb6b3bf9a, + 0x0ce2b603, 0x9ad2b174, 0x3947d5ea, 0xaf77d29d, 0x1526db04, + 0x8316dc73, 0x120b63e3, 0x843b6494, 0x3e6a6d0d, 0xa85a6a7a, + 0x0bcf0ee4, 0x9dff0993, 0x27ae000a, 0xb19e077d, 0x44930ff0, + 0xd2a30887, 0x68f2011e, 0xfec20669, 0x5d5762f7, 0xcb676580, + 0x71366c19, 0xe7066b6e, 0x761bd4fe, 0xe02bd389, 0x5a7ada10, + 0xcc4add67, 0x6fdfb9f9, 0xf9efbe8e, 0x43beb717, 0xd58eb060, + 0xe8a3d6d6, 0x7e93d1a1, 0xc4c2d838, 0x52f2df4f, 0xf167bbd1, + 0x6757bca6, 0xdd06b53f, 0x4b36b248, 0xda2b0dd8, 0x4c1b0aaf, + 0xf64a0336, 0x607a0441, 0xc3ef60df, 0x55df67a8, 0xef8e6e31, + 0x79be6946, 0x8cb361cb, 0x1a8366bc, 0xa0d26f25, 0x36e26852, + 0x95770ccc, 0x03470bbb, 0xb9160222, 0x2f260555, 0xbe3bbac5, + 0x280bbdb2, 0x925ab42b, 0x046ab35c, 0xa7ffd7c2, 0x31cfd0b5, + 0x8b9ed92c, 0x1daede5b, 0xb0c2649b, 0x26f263ec, 0x9ca36a75, + 0x0a936d02, 0xa906099c, 0x3f360eeb, 0x85670772, 0x13570005, + 0x824abf95, 0x147ab8e2, 0xae2bb17b, 0x381bb60c, 0x9b8ed292, + 0x0dbed5e5, 0xb7efdc7c, 0x21dfdb0b, 0xd4d2d386, 0x42e2d4f1, + 0xf8b3dd68, 0x6e83da1f, 0xcd16be81, 0x5b26b9f6, 0xe177b06f, + 0x7747b718, 0xe65a0888, 0x706a0fff, 0xca3b0666, 0x5c0b0111, + 0xff9e658f, 0x69ae62f8, 0xd3ff6b61, 0x45cf6c16, 0x78e20aa0, + 0xeed20dd7, 0x5483044e, 0xc2b30339, 0x612667a7, 0xf71660d0, + 0x4d476949, 0xdb776e3e, 0x4a6ad1ae, 0xdc5ad6d9, 0x660bdf40, + 0xf03bd837, 0x53aebca9, 0xc59ebbde, 0x7fcfb247, 0xe9ffb530, + 0x1cf2bdbd, 0x8ac2baca, 0x3093b353, 0xa6a3b424, 0x0536d0ba, + 0x9306d7cd, 0x2957de54, 0xbf67d923, 0x2e7a66b3, 0xb84a61c4, + 0x021b685d, 0x942b6f2a, 0x37be0bb4, 0xa18e0cc3, 0x1bdf055a, + 0x8def022d}, + {0x00000000, 0x41311b19, 0x82623632, 0xc3532d2b, 0x04c56c64, + 0x45f4777d, 0x86a75a56, 0xc796414f, 0x088ad9c8, 0x49bbc2d1, + 0x8ae8effa, 0xcbd9f4e3, 0x0c4fb5ac, 0x4d7eaeb5, 0x8e2d839e, + 0xcf1c9887, 0x5112c24a, 0x1023d953, 0xd370f478, 0x9241ef61, + 0x55d7ae2e, 0x14e6b537, 0xd7b5981c, 0x96848305, 0x59981b82, + 0x18a9009b, 0xdbfa2db0, 0x9acb36a9, 0x5d5d77e6, 0x1c6c6cff, + 0xdf3f41d4, 0x9e0e5acd, 0xa2248495, 0xe3159f8c, 0x2046b2a7, + 0x6177a9be, 0xa6e1e8f1, 0xe7d0f3e8, 0x2483dec3, 0x65b2c5da, + 0xaaae5d5d, 0xeb9f4644, 0x28cc6b6f, 0x69fd7076, 0xae6b3139, + 0xef5a2a20, 0x2c09070b, 0x6d381c12, 0xf33646df, 0xb2075dc6, + 0x715470ed, 0x30656bf4, 0xf7f32abb, 0xb6c231a2, 0x75911c89, + 0x34a00790, 0xfbbc9f17, 0xba8d840e, 0x79dea925, 0x38efb23c, + 0xff79f373, 0xbe48e86a, 0x7d1bc541, 0x3c2ade58, 0x054f79f0, + 0x447e62e9, 0x872d4fc2, 0xc61c54db, 0x018a1594, 0x40bb0e8d, + 0x83e823a6, 0xc2d938bf, 0x0dc5a038, 0x4cf4bb21, 0x8fa7960a, + 0xce968d13, 0x0900cc5c, 0x4831d745, 0x8b62fa6e, 0xca53e177, + 0x545dbbba, 0x156ca0a3, 0xd63f8d88, 0x970e9691, 0x5098d7de, + 0x11a9ccc7, 0xd2fae1ec, 0x93cbfaf5, 0x5cd76272, 0x1de6796b, + 0xdeb55440, 0x9f844f59, 0x58120e16, 0x1923150f, 0xda703824, + 0x9b41233d, 0xa76bfd65, 0xe65ae67c, 0x2509cb57, 0x6438d04e, + 0xa3ae9101, 0xe29f8a18, 0x21cca733, 0x60fdbc2a, 0xafe124ad, + 0xeed03fb4, 0x2d83129f, 0x6cb20986, 0xab2448c9, 0xea1553d0, + 0x29467efb, 0x687765e2, 0xf6793f2f, 0xb7482436, 0x741b091d, + 0x352a1204, 0xf2bc534b, 0xb38d4852, 0x70de6579, 0x31ef7e60, + 0xfef3e6e7, 0xbfc2fdfe, 0x7c91d0d5, 0x3da0cbcc, 0xfa368a83, + 0xbb07919a, 0x7854bcb1, 0x3965a7a8, 0x4b98833b, 0x0aa99822, + 0xc9fab509, 0x88cbae10, 0x4f5def5f, 0x0e6cf446, 0xcd3fd96d, + 0x8c0ec274, 0x43125af3, 0x022341ea, 0xc1706cc1, 0x804177d8, + 0x47d73697, 0x06e62d8e, 0xc5b500a5, 0x84841bbc, 0x1a8a4171, + 0x5bbb5a68, 0x98e87743, 0xd9d96c5a, 0x1e4f2d15, 0x5f7e360c, + 0x9c2d1b27, 0xdd1c003e, 0x120098b9, 0x533183a0, 0x9062ae8b, + 0xd153b592, 0x16c5f4dd, 0x57f4efc4, 0x94a7c2ef, 0xd596d9f6, + 0xe9bc07ae, 0xa88d1cb7, 0x6bde319c, 0x2aef2a85, 0xed796bca, + 0xac4870d3, 0x6f1b5df8, 0x2e2a46e1, 0xe136de66, 0xa007c57f, + 0x6354e854, 0x2265f34d, 0xe5f3b202, 0xa4c2a91b, 0x67918430, + 0x26a09f29, 0xb8aec5e4, 0xf99fdefd, 0x3accf3d6, 0x7bfde8cf, + 0xbc6ba980, 0xfd5ab299, 0x3e099fb2, 0x7f3884ab, 0xb0241c2c, + 0xf1150735, 0x32462a1e, 0x73773107, 0xb4e17048, 0xf5d06b51, + 0x3683467a, 0x77b25d63, 0x4ed7facb, 0x0fe6e1d2, 0xccb5ccf9, + 0x8d84d7e0, 0x4a1296af, 0x0b238db6, 0xc870a09d, 0x8941bb84, + 0x465d2303, 0x076c381a, 0xc43f1531, 0x850e0e28, 0x42984f67, + 0x03a9547e, 0xc0fa7955, 0x81cb624c, 0x1fc53881, 0x5ef42398, + 0x9da70eb3, 0xdc9615aa, 0x1b0054e5, 0x5a314ffc, 0x996262d7, + 0xd85379ce, 0x174fe149, 0x567efa50, 0x952dd77b, 0xd41ccc62, + 0x138a8d2d, 0x52bb9634, 0x91e8bb1f, 0xd0d9a006, 0xecf37e5e, + 0xadc26547, 0x6e91486c, 0x2fa05375, 0xe836123a, 0xa9070923, + 0x6a542408, 0x2b653f11, 0xe479a796, 0xa548bc8f, 0x661b91a4, + 0x272a8abd, 0xe0bccbf2, 0xa18dd0eb, 0x62defdc0, 0x23efe6d9, + 0xbde1bc14, 0xfcd0a70d, 0x3f838a26, 0x7eb2913f, 0xb924d070, + 0xf815cb69, 0x3b46e642, 0x7a77fd5b, 0xb56b65dc, 0xf45a7ec5, + 0x370953ee, 0x763848f7, 0xb1ae09b8, 0xf09f12a1, 0x33cc3f8a, + 0x72fd2493}, + {0x00000000, 0x376ac201, 0x6ed48403, 0x59be4602, 0xdca80907, + 0xebc2cb06, 0xb27c8d04, 0x85164f05, 0xb851130e, 0x8f3bd10f, + 0xd685970d, 0xe1ef550c, 0x64f91a09, 0x5393d808, 0x0a2d9e0a, + 0x3d475c0b, 0x70a3261c, 0x47c9e41d, 0x1e77a21f, 0x291d601e, + 0xac0b2f1b, 0x9b61ed1a, 0xc2dfab18, 0xf5b56919, 0xc8f23512, + 0xff98f713, 0xa626b111, 0x914c7310, 0x145a3c15, 0x2330fe14, + 0x7a8eb816, 0x4de47a17, 0xe0464d38, 0xd72c8f39, 0x8e92c93b, + 0xb9f80b3a, 0x3cee443f, 0x0b84863e, 0x523ac03c, 0x6550023d, + 0x58175e36, 0x6f7d9c37, 0x36c3da35, 0x01a91834, 0x84bf5731, + 0xb3d59530, 0xea6bd332, 0xdd011133, 0x90e56b24, 0xa78fa925, + 0xfe31ef27, 0xc95b2d26, 0x4c4d6223, 0x7b27a022, 0x2299e620, + 0x15f32421, 0x28b4782a, 0x1fdeba2b, 0x4660fc29, 0x710a3e28, + 0xf41c712d, 0xc376b32c, 0x9ac8f52e, 0xada2372f, 0xc08d9a70, + 0xf7e75871, 0xae591e73, 0x9933dc72, 0x1c259377, 0x2b4f5176, + 0x72f11774, 0x459bd575, 0x78dc897e, 0x4fb64b7f, 0x16080d7d, + 0x2162cf7c, 0xa4748079, 0x931e4278, 0xcaa0047a, 0xfdcac67b, + 0xb02ebc6c, 0x87447e6d, 0xdefa386f, 0xe990fa6e, 0x6c86b56b, + 0x5bec776a, 0x02523168, 0x3538f369, 0x087faf62, 0x3f156d63, + 0x66ab2b61, 0x51c1e960, 0xd4d7a665, 0xe3bd6464, 0xba032266, + 0x8d69e067, 0x20cbd748, 0x17a11549, 0x4e1f534b, 0x7975914a, + 0xfc63de4f, 0xcb091c4e, 0x92b75a4c, 0xa5dd984d, 0x989ac446, + 0xaff00647, 0xf64e4045, 0xc1248244, 0x4432cd41, 0x73580f40, + 0x2ae64942, 0x1d8c8b43, 0x5068f154, 0x67023355, 0x3ebc7557, + 0x09d6b756, 0x8cc0f853, 0xbbaa3a52, 0xe2147c50, 0xd57ebe51, + 0xe839e25a, 0xdf53205b, 0x86ed6659, 0xb187a458, 0x3491eb5d, + 0x03fb295c, 0x5a456f5e, 0x6d2fad5f, 0x801b35e1, 0xb771f7e0, + 0xeecfb1e2, 0xd9a573e3, 0x5cb33ce6, 0x6bd9fee7, 0x3267b8e5, + 0x050d7ae4, 0x384a26ef, 0x0f20e4ee, 0x569ea2ec, 0x61f460ed, + 0xe4e22fe8, 0xd388ede9, 0x8a36abeb, 0xbd5c69ea, 0xf0b813fd, + 0xc7d2d1fc, 0x9e6c97fe, 0xa90655ff, 0x2c101afa, 0x1b7ad8fb, + 0x42c49ef9, 0x75ae5cf8, 0x48e900f3, 0x7f83c2f2, 0x263d84f0, + 0x115746f1, 0x944109f4, 0xa32bcbf5, 0xfa958df7, 0xcdff4ff6, + 0x605d78d9, 0x5737bad8, 0x0e89fcda, 0x39e33edb, 0xbcf571de, + 0x8b9fb3df, 0xd221f5dd, 0xe54b37dc, 0xd80c6bd7, 0xef66a9d6, + 0xb6d8efd4, 0x81b22dd5, 0x04a462d0, 0x33cea0d1, 0x6a70e6d3, + 0x5d1a24d2, 0x10fe5ec5, 0x27949cc4, 0x7e2adac6, 0x494018c7, + 0xcc5657c2, 0xfb3c95c3, 0xa282d3c1, 0x95e811c0, 0xa8af4dcb, + 0x9fc58fca, 0xc67bc9c8, 0xf1110bc9, 0x740744cc, 0x436d86cd, + 0x1ad3c0cf, 0x2db902ce, 0x4096af91, 0x77fc6d90, 0x2e422b92, + 0x1928e993, 0x9c3ea696, 0xab546497, 0xf2ea2295, 0xc580e094, + 0xf8c7bc9f, 0xcfad7e9e, 0x9613389c, 0xa179fa9d, 0x246fb598, + 0x13057799, 0x4abb319b, 0x7dd1f39a, 0x3035898d, 0x075f4b8c, + 0x5ee10d8e, 0x698bcf8f, 0xec9d808a, 0xdbf7428b, 0x82490489, + 0xb523c688, 0x88649a83, 0xbf0e5882, 0xe6b01e80, 0xd1dadc81, + 0x54cc9384, 0x63a65185, 0x3a181787, 0x0d72d586, 0xa0d0e2a9, + 0x97ba20a8, 0xce0466aa, 0xf96ea4ab, 0x7c78ebae, 0x4b1229af, + 0x12ac6fad, 0x25c6adac, 0x1881f1a7, 0x2feb33a6, 0x765575a4, + 0x413fb7a5, 0xc429f8a0, 0xf3433aa1, 0xaafd7ca3, 0x9d97bea2, + 0xd073c4b5, 0xe71906b4, 0xbea740b6, 0x89cd82b7, 0x0cdbcdb2, + 0x3bb10fb3, 0x620f49b1, 0x55658bb0, 0x6822d7bb, 0x5f4815ba, + 0x06f653b8, 0x319c91b9, 0xb48adebc, 0x83e01cbd, 0xda5e5abf, + 0xed3498be}, + {0x00000000, 0x6567bcb8, 0x8bc809aa, 0xeeafb512, 0x5797628f, + 0x32f0de37, 0xdc5f6b25, 0xb938d79d, 0xef28b4c5, 0x8a4f087d, + 0x64e0bd6f, 0x018701d7, 0xb8bfd64a, 0xddd86af2, 0x3377dfe0, + 0x56106358, 0x9f571950, 0xfa30a5e8, 0x149f10fa, 0x71f8ac42, + 0xc8c07bdf, 0xada7c767, 0x43087275, 0x266fcecd, 0x707fad95, + 0x1518112d, 0xfbb7a43f, 0x9ed01887, 0x27e8cf1a, 0x428f73a2, + 0xac20c6b0, 0xc9477a08, 0x3eaf32a0, 0x5bc88e18, 0xb5673b0a, + 0xd00087b2, 0x6938502f, 0x0c5fec97, 0xe2f05985, 0x8797e53d, + 0xd1878665, 0xb4e03add, 0x5a4f8fcf, 0x3f283377, 0x8610e4ea, + 0xe3775852, 0x0dd8ed40, 0x68bf51f8, 0xa1f82bf0, 0xc49f9748, + 0x2a30225a, 0x4f579ee2, 0xf66f497f, 0x9308f5c7, 0x7da740d5, + 0x18c0fc6d, 0x4ed09f35, 0x2bb7238d, 0xc518969f, 0xa07f2a27, + 0x1947fdba, 0x7c204102, 0x928ff410, 0xf7e848a8, 0x3d58149b, + 0x583fa823, 0xb6901d31, 0xd3f7a189, 0x6acf7614, 0x0fa8caac, + 0xe1077fbe, 0x8460c306, 0xd270a05e, 0xb7171ce6, 0x59b8a9f4, + 0x3cdf154c, 0x85e7c2d1, 0xe0807e69, 0x0e2fcb7b, 0x6b4877c3, + 0xa20f0dcb, 0xc768b173, 0x29c70461, 0x4ca0b8d9, 0xf5986f44, + 0x90ffd3fc, 0x7e5066ee, 0x1b37da56, 0x4d27b90e, 0x284005b6, + 0xc6efb0a4, 0xa3880c1c, 0x1ab0db81, 0x7fd76739, 0x9178d22b, + 0xf41f6e93, 0x03f7263b, 0x66909a83, 0x883f2f91, 0xed589329, + 0x546044b4, 0x3107f80c, 0xdfa84d1e, 0xbacff1a6, 0xecdf92fe, + 0x89b82e46, 0x67179b54, 0x027027ec, 0xbb48f071, 0xde2f4cc9, + 0x3080f9db, 0x55e74563, 0x9ca03f6b, 0xf9c783d3, 0x176836c1, + 0x720f8a79, 0xcb375de4, 0xae50e15c, 0x40ff544e, 0x2598e8f6, + 0x73888bae, 0x16ef3716, 0xf8408204, 0x9d273ebc, 0x241fe921, + 0x41785599, 0xafd7e08b, 0xcab05c33, 0x3bb659ed, 0x5ed1e555, + 0xb07e5047, 0xd519ecff, 0x6c213b62, 0x094687da, 0xe7e932c8, + 0x828e8e70, 0xd49eed28, 0xb1f95190, 0x5f56e482, 0x3a31583a, + 0x83098fa7, 0xe66e331f, 0x08c1860d, 0x6da63ab5, 0xa4e140bd, + 0xc186fc05, 0x2f294917, 0x4a4ef5af, 0xf3762232, 0x96119e8a, + 0x78be2b98, 0x1dd99720, 0x4bc9f478, 0x2eae48c0, 0xc001fdd2, + 0xa566416a, 0x1c5e96f7, 0x79392a4f, 0x97969f5d, 0xf2f123e5, + 0x05196b4d, 0x607ed7f5, 0x8ed162e7, 0xebb6de5f, 0x528e09c2, + 0x37e9b57a, 0xd9460068, 0xbc21bcd0, 0xea31df88, 0x8f566330, + 0x61f9d622, 0x049e6a9a, 0xbda6bd07, 0xd8c101bf, 0x366eb4ad, + 0x53090815, 0x9a4e721d, 0xff29cea5, 0x11867bb7, 0x74e1c70f, + 0xcdd91092, 0xa8beac2a, 0x46111938, 0x2376a580, 0x7566c6d8, + 0x10017a60, 0xfeaecf72, 0x9bc973ca, 0x22f1a457, 0x479618ef, + 0xa939adfd, 0xcc5e1145, 0x06ee4d76, 0x6389f1ce, 0x8d2644dc, + 0xe841f864, 0x51792ff9, 0x341e9341, 0xdab12653, 0xbfd69aeb, + 0xe9c6f9b3, 0x8ca1450b, 0x620ef019, 0x07694ca1, 0xbe519b3c, + 0xdb362784, 0x35999296, 0x50fe2e2e, 0x99b95426, 0xfcdee89e, + 0x12715d8c, 0x7716e134, 0xce2e36a9, 0xab498a11, 0x45e63f03, + 0x208183bb, 0x7691e0e3, 0x13f65c5b, 0xfd59e949, 0x983e55f1, + 0x2106826c, 0x44613ed4, 0xaace8bc6, 0xcfa9377e, 0x38417fd6, + 0x5d26c36e, 0xb389767c, 0xd6eecac4, 0x6fd61d59, 0x0ab1a1e1, + 0xe41e14f3, 0x8179a84b, 0xd769cb13, 0xb20e77ab, 0x5ca1c2b9, + 0x39c67e01, 0x80fea99c, 0xe5991524, 0x0b36a036, 0x6e511c8e, + 0xa7166686, 0xc271da3e, 0x2cde6f2c, 0x49b9d394, 0xf0810409, + 0x95e6b8b1, 0x7b490da3, 0x1e2eb11b, 0x483ed243, 0x2d596efb, + 0xc3f6dbe9, 0xa6916751, 0x1fa9b0cc, 0x7ace0c74, 0x9461b966, + 0xf10605de}}; + +#endif + +#endif + +#if N == 2 + +#if W == 8 + +local const z_crc_t FAR crc_braid_table[][256] = { + {0x00000000, 0xae689191, 0x87a02563, 0x29c8b4f2, 0xd4314c87, + 0x7a59dd16, 0x539169e4, 0xfdf9f875, 0x73139f4f, 0xdd7b0ede, + 0xf4b3ba2c, 0x5adb2bbd, 0xa722d3c8, 0x094a4259, 0x2082f6ab, + 0x8eea673a, 0xe6273e9e, 0x484faf0f, 0x61871bfd, 0xcfef8a6c, + 0x32167219, 0x9c7ee388, 0xb5b6577a, 0x1bdec6eb, 0x9534a1d1, + 0x3b5c3040, 0x129484b2, 0xbcfc1523, 0x4105ed56, 0xef6d7cc7, + 0xc6a5c835, 0x68cd59a4, 0x173f7b7d, 0xb957eaec, 0x909f5e1e, + 0x3ef7cf8f, 0xc30e37fa, 0x6d66a66b, 0x44ae1299, 0xeac68308, + 0x642ce432, 0xca4475a3, 0xe38cc151, 0x4de450c0, 0xb01da8b5, + 0x1e753924, 0x37bd8dd6, 0x99d51c47, 0xf11845e3, 0x5f70d472, + 0x76b86080, 0xd8d0f111, 0x25290964, 0x8b4198f5, 0xa2892c07, + 0x0ce1bd96, 0x820bdaac, 0x2c634b3d, 0x05abffcf, 0xabc36e5e, + 0x563a962b, 0xf85207ba, 0xd19ab348, 0x7ff222d9, 0x2e7ef6fa, + 0x8016676b, 0xa9ded399, 0x07b64208, 0xfa4fba7d, 0x54272bec, + 0x7def9f1e, 0xd3870e8f, 0x5d6d69b5, 0xf305f824, 0xdacd4cd6, + 0x74a5dd47, 0x895c2532, 0x2734b4a3, 0x0efc0051, 0xa09491c0, + 0xc859c864, 0x663159f5, 0x4ff9ed07, 0xe1917c96, 0x1c6884e3, + 0xb2001572, 0x9bc8a180, 0x35a03011, 0xbb4a572b, 0x1522c6ba, + 0x3cea7248, 0x9282e3d9, 0x6f7b1bac, 0xc1138a3d, 0xe8db3ecf, + 0x46b3af5e, 0x39418d87, 0x97291c16, 0xbee1a8e4, 0x10893975, + 0xed70c100, 0x43185091, 0x6ad0e463, 0xc4b875f2, 0x4a5212c8, + 0xe43a8359, 0xcdf237ab, 0x639aa63a, 0x9e635e4f, 0x300bcfde, + 0x19c37b2c, 0xb7abeabd, 0xdf66b319, 0x710e2288, 0x58c6967a, + 0xf6ae07eb, 0x0b57ff9e, 0xa53f6e0f, 0x8cf7dafd, 0x229f4b6c, + 0xac752c56, 0x021dbdc7, 0x2bd50935, 0x85bd98a4, 0x784460d1, + 0xd62cf140, 0xffe445b2, 0x518cd423, 0x5cfdedf4, 0xf2957c65, + 0xdb5dc897, 0x75355906, 0x88cca173, 0x26a430e2, 0x0f6c8410, + 0xa1041581, 0x2fee72bb, 0x8186e32a, 0xa84e57d8, 0x0626c649, + 0xfbdf3e3c, 0x55b7afad, 0x7c7f1b5f, 0xd2178ace, 0xbadad36a, + 0x14b242fb, 0x3d7af609, 0x93126798, 0x6eeb9fed, 0xc0830e7c, + 0xe94bba8e, 0x47232b1f, 0xc9c94c25, 0x67a1ddb4, 0x4e696946, + 0xe001f8d7, 0x1df800a2, 0xb3909133, 0x9a5825c1, 0x3430b450, + 0x4bc29689, 0xe5aa0718, 0xcc62b3ea, 0x620a227b, 0x9ff3da0e, + 0x319b4b9f, 0x1853ff6d, 0xb63b6efc, 0x38d109c6, 0x96b99857, + 0xbf712ca5, 0x1119bd34, 0xece04541, 0x4288d4d0, 0x6b406022, + 0xc528f1b3, 0xade5a817, 0x038d3986, 0x2a458d74, 0x842d1ce5, + 0x79d4e490, 0xd7bc7501, 0xfe74c1f3, 0x501c5062, 0xdef63758, + 0x709ea6c9, 0x5956123b, 0xf73e83aa, 0x0ac77bdf, 0xa4afea4e, + 0x8d675ebc, 0x230fcf2d, 0x72831b0e, 0xdceb8a9f, 0xf5233e6d, + 0x5b4baffc, 0xa6b25789, 0x08dac618, 0x211272ea, 0x8f7ae37b, + 0x01908441, 0xaff815d0, 0x8630a122, 0x285830b3, 0xd5a1c8c6, + 0x7bc95957, 0x5201eda5, 0xfc697c34, 0x94a42590, 0x3accb401, + 0x130400f3, 0xbd6c9162, 0x40956917, 0xeefdf886, 0xc7354c74, + 0x695ddde5, 0xe7b7badf, 0x49df2b4e, 0x60179fbc, 0xce7f0e2d, + 0x3386f658, 0x9dee67c9, 0xb426d33b, 0x1a4e42aa, 0x65bc6073, + 0xcbd4f1e2, 0xe21c4510, 0x4c74d481, 0xb18d2cf4, 0x1fe5bd65, + 0x362d0997, 0x98459806, 0x16afff3c, 0xb8c76ead, 0x910fda5f, + 0x3f674bce, 0xc29eb3bb, 0x6cf6222a, 0x453e96d8, 0xeb560749, + 0x839b5eed, 0x2df3cf7c, 0x043b7b8e, 0xaa53ea1f, 0x57aa126a, + 0xf9c283fb, 0xd00a3709, 0x7e62a698, 0xf088c1a2, 0x5ee05033, + 0x7728e4c1, 0xd9407550, 0x24b98d25, 0x8ad11cb4, 0xa319a846, + 0x0d7139d7}, + {0x00000000, 0xb9fbdbe8, 0xa886b191, 0x117d6a79, 0x8a7c6563, + 0x3387be8b, 0x22fad4f2, 0x9b010f1a, 0xcf89cc87, 0x7672176f, + 0x670f7d16, 0xdef4a6fe, 0x45f5a9e4, 0xfc0e720c, 0xed731875, + 0x5488c39d, 0x44629f4f, 0xfd9944a7, 0xece42ede, 0x551ff536, + 0xce1efa2c, 0x77e521c4, 0x66984bbd, 0xdf639055, 0x8beb53c8, + 0x32108820, 0x236de259, 0x9a9639b1, 0x019736ab, 0xb86ced43, + 0xa911873a, 0x10ea5cd2, 0x88c53e9e, 0x313ee576, 0x20438f0f, + 0x99b854e7, 0x02b95bfd, 0xbb428015, 0xaa3fea6c, 0x13c43184, + 0x474cf219, 0xfeb729f1, 0xefca4388, 0x56319860, 0xcd30977a, + 0x74cb4c92, 0x65b626eb, 0xdc4dfd03, 0xcca7a1d1, 0x755c7a39, + 0x64211040, 0xdddacba8, 0x46dbc4b2, 0xff201f5a, 0xee5d7523, + 0x57a6aecb, 0x032e6d56, 0xbad5b6be, 0xaba8dcc7, 0x1253072f, + 0x89520835, 0x30a9d3dd, 0x21d4b9a4, 0x982f624c, 0xcafb7b7d, + 0x7300a095, 0x627dcaec, 0xdb861104, 0x40871e1e, 0xf97cc5f6, + 0xe801af8f, 0x51fa7467, 0x0572b7fa, 0xbc896c12, 0xadf4066b, + 0x140fdd83, 0x8f0ed299, 0x36f50971, 0x27886308, 0x9e73b8e0, + 0x8e99e432, 0x37623fda, 0x261f55a3, 0x9fe48e4b, 0x04e58151, + 0xbd1e5ab9, 0xac6330c0, 0x1598eb28, 0x411028b5, 0xf8ebf35d, + 0xe9969924, 0x506d42cc, 0xcb6c4dd6, 0x7297963e, 0x63eafc47, + 0xda1127af, 0x423e45e3, 0xfbc59e0b, 0xeab8f472, 0x53432f9a, + 0xc8422080, 0x71b9fb68, 0x60c49111, 0xd93f4af9, 0x8db78964, + 0x344c528c, 0x253138f5, 0x9ccae31d, 0x07cbec07, 0xbe3037ef, + 0xaf4d5d96, 0x16b6867e, 0x065cdaac, 0xbfa70144, 0xaeda6b3d, + 0x1721b0d5, 0x8c20bfcf, 0x35db6427, 0x24a60e5e, 0x9d5dd5b6, + 0xc9d5162b, 0x702ecdc3, 0x6153a7ba, 0xd8a87c52, 0x43a97348, + 0xfa52a8a0, 0xeb2fc2d9, 0x52d41931, 0x4e87f0bb, 0xf77c2b53, + 0xe601412a, 0x5ffa9ac2, 0xc4fb95d8, 0x7d004e30, 0x6c7d2449, + 0xd586ffa1, 0x810e3c3c, 0x38f5e7d4, 0x29888dad, 0x90735645, + 0x0b72595f, 0xb28982b7, 0xa3f4e8ce, 0x1a0f3326, 0x0ae56ff4, + 0xb31eb41c, 0xa263de65, 0x1b98058d, 0x80990a97, 0x3962d17f, + 0x281fbb06, 0x91e460ee, 0xc56ca373, 0x7c97789b, 0x6dea12e2, + 0xd411c90a, 0x4f10c610, 0xf6eb1df8, 0xe7967781, 0x5e6dac69, + 0xc642ce25, 0x7fb915cd, 0x6ec47fb4, 0xd73fa45c, 0x4c3eab46, + 0xf5c570ae, 0xe4b81ad7, 0x5d43c13f, 0x09cb02a2, 0xb030d94a, + 0xa14db333, 0x18b668db, 0x83b767c1, 0x3a4cbc29, 0x2b31d650, + 0x92ca0db8, 0x8220516a, 0x3bdb8a82, 0x2aa6e0fb, 0x935d3b13, + 0x085c3409, 0xb1a7efe1, 0xa0da8598, 0x19215e70, 0x4da99ded, + 0xf4524605, 0xe52f2c7c, 0x5cd4f794, 0xc7d5f88e, 0x7e2e2366, + 0x6f53491f, 0xd6a892f7, 0x847c8bc6, 0x3d87502e, 0x2cfa3a57, + 0x9501e1bf, 0x0e00eea5, 0xb7fb354d, 0xa6865f34, 0x1f7d84dc, + 0x4bf54741, 0xf20e9ca9, 0xe373f6d0, 0x5a882d38, 0xc1892222, + 0x7872f9ca, 0x690f93b3, 0xd0f4485b, 0xc01e1489, 0x79e5cf61, + 0x6898a518, 0xd1637ef0, 0x4a6271ea, 0xf399aa02, 0xe2e4c07b, + 0x5b1f1b93, 0x0f97d80e, 0xb66c03e6, 0xa711699f, 0x1eeab277, + 0x85ebbd6d, 0x3c106685, 0x2d6d0cfc, 0x9496d714, 0x0cb9b558, + 0xb5426eb0, 0xa43f04c9, 0x1dc4df21, 0x86c5d03b, 0x3f3e0bd3, + 0x2e4361aa, 0x97b8ba42, 0xc33079df, 0x7acba237, 0x6bb6c84e, + 0xd24d13a6, 0x494c1cbc, 0xf0b7c754, 0xe1caad2d, 0x583176c5, + 0x48db2a17, 0xf120f1ff, 0xe05d9b86, 0x59a6406e, 0xc2a74f74, + 0x7b5c949c, 0x6a21fee5, 0xd3da250d, 0x8752e690, 0x3ea93d78, + 0x2fd45701, 0x962f8ce9, 0x0d2e83f3, 0xb4d5581b, 0xa5a83262, + 0x1c53e98a}, + {0x00000000, 0x9d0fe176, 0xe16ec4ad, 0x7c6125db, 0x19ac8f1b, + 0x84a36e6d, 0xf8c24bb6, 0x65cdaac0, 0x33591e36, 0xae56ff40, + 0xd237da9b, 0x4f383bed, 0x2af5912d, 0xb7fa705b, 0xcb9b5580, + 0x5694b4f6, 0x66b23c6c, 0xfbbddd1a, 0x87dcf8c1, 0x1ad319b7, + 0x7f1eb377, 0xe2115201, 0x9e7077da, 0x037f96ac, 0x55eb225a, + 0xc8e4c32c, 0xb485e6f7, 0x298a0781, 0x4c47ad41, 0xd1484c37, + 0xad2969ec, 0x3026889a, 0xcd6478d8, 0x506b99ae, 0x2c0abc75, + 0xb1055d03, 0xd4c8f7c3, 0x49c716b5, 0x35a6336e, 0xa8a9d218, + 0xfe3d66ee, 0x63328798, 0x1f53a243, 0x825c4335, 0xe791e9f5, + 0x7a9e0883, 0x06ff2d58, 0x9bf0cc2e, 0xabd644b4, 0x36d9a5c2, + 0x4ab88019, 0xd7b7616f, 0xb27acbaf, 0x2f752ad9, 0x53140f02, + 0xce1bee74, 0x988f5a82, 0x0580bbf4, 0x79e19e2f, 0xe4ee7f59, + 0x8123d599, 0x1c2c34ef, 0x604d1134, 0xfd42f042, 0x41b9f7f1, + 0xdcb61687, 0xa0d7335c, 0x3dd8d22a, 0x581578ea, 0xc51a999c, + 0xb97bbc47, 0x24745d31, 0x72e0e9c7, 0xefef08b1, 0x938e2d6a, + 0x0e81cc1c, 0x6b4c66dc, 0xf64387aa, 0x8a22a271, 0x172d4307, + 0x270bcb9d, 0xba042aeb, 0xc6650f30, 0x5b6aee46, 0x3ea74486, + 0xa3a8a5f0, 0xdfc9802b, 0x42c6615d, 0x1452d5ab, 0x895d34dd, + 0xf53c1106, 0x6833f070, 0x0dfe5ab0, 0x90f1bbc6, 0xec909e1d, + 0x719f7f6b, 0x8cdd8f29, 0x11d26e5f, 0x6db34b84, 0xf0bcaaf2, + 0x95710032, 0x087ee144, 0x741fc49f, 0xe91025e9, 0xbf84911f, + 0x228b7069, 0x5eea55b2, 0xc3e5b4c4, 0xa6281e04, 0x3b27ff72, + 0x4746daa9, 0xda493bdf, 0xea6fb345, 0x77605233, 0x0b0177e8, + 0x960e969e, 0xf3c33c5e, 0x6eccdd28, 0x12adf8f3, 0x8fa21985, + 0xd936ad73, 0x44394c05, 0x385869de, 0xa55788a8, 0xc09a2268, + 0x5d95c31e, 0x21f4e6c5, 0xbcfb07b3, 0x8373efe2, 0x1e7c0e94, + 0x621d2b4f, 0xff12ca39, 0x9adf60f9, 0x07d0818f, 0x7bb1a454, + 0xe6be4522, 0xb02af1d4, 0x2d2510a2, 0x51443579, 0xcc4bd40f, + 0xa9867ecf, 0x34899fb9, 0x48e8ba62, 0xd5e75b14, 0xe5c1d38e, + 0x78ce32f8, 0x04af1723, 0x99a0f655, 0xfc6d5c95, 0x6162bde3, + 0x1d039838, 0x800c794e, 0xd698cdb8, 0x4b972cce, 0x37f60915, + 0xaaf9e863, 0xcf3442a3, 0x523ba3d5, 0x2e5a860e, 0xb3556778, + 0x4e17973a, 0xd318764c, 0xaf795397, 0x3276b2e1, 0x57bb1821, + 0xcab4f957, 0xb6d5dc8c, 0x2bda3dfa, 0x7d4e890c, 0xe041687a, + 0x9c204da1, 0x012facd7, 0x64e20617, 0xf9ede761, 0x858cc2ba, + 0x188323cc, 0x28a5ab56, 0xb5aa4a20, 0xc9cb6ffb, 0x54c48e8d, + 0x3109244d, 0xac06c53b, 0xd067e0e0, 0x4d680196, 0x1bfcb560, + 0x86f35416, 0xfa9271cd, 0x679d90bb, 0x02503a7b, 0x9f5fdb0d, + 0xe33efed6, 0x7e311fa0, 0xc2ca1813, 0x5fc5f965, 0x23a4dcbe, + 0xbeab3dc8, 0xdb669708, 0x4669767e, 0x3a0853a5, 0xa707b2d3, + 0xf1930625, 0x6c9ce753, 0x10fdc288, 0x8df223fe, 0xe83f893e, + 0x75306848, 0x09514d93, 0x945eace5, 0xa478247f, 0x3977c509, + 0x4516e0d2, 0xd81901a4, 0xbdd4ab64, 0x20db4a12, 0x5cba6fc9, + 0xc1b58ebf, 0x97213a49, 0x0a2edb3f, 0x764ffee4, 0xeb401f92, + 0x8e8db552, 0x13825424, 0x6fe371ff, 0xf2ec9089, 0x0fae60cb, + 0x92a181bd, 0xeec0a466, 0x73cf4510, 0x1602efd0, 0x8b0d0ea6, + 0xf76c2b7d, 0x6a63ca0b, 0x3cf77efd, 0xa1f89f8b, 0xdd99ba50, + 0x40965b26, 0x255bf1e6, 0xb8541090, 0xc435354b, 0x593ad43d, + 0x691c5ca7, 0xf413bdd1, 0x8872980a, 0x157d797c, 0x70b0d3bc, + 0xedbf32ca, 0x91de1711, 0x0cd1f667, 0x5a454291, 0xc74aa3e7, + 0xbb2b863c, 0x2624674a, 0x43e9cd8a, 0xdee62cfc, 0xa2870927, + 0x3f88e851}, + {0x00000000, 0xdd96d985, 0x605cb54b, 0xbdca6cce, 0xc0b96a96, + 0x1d2fb313, 0xa0e5dfdd, 0x7d730658, 0x5a03d36d, 0x87950ae8, + 0x3a5f6626, 0xe7c9bfa3, 0x9abab9fb, 0x472c607e, 0xfae60cb0, + 0x2770d535, 0xb407a6da, 0x69917f5f, 0xd45b1391, 0x09cdca14, + 0x74becc4c, 0xa92815c9, 0x14e27907, 0xc974a082, 0xee0475b7, + 0x3392ac32, 0x8e58c0fc, 0x53ce1979, 0x2ebd1f21, 0xf32bc6a4, + 0x4ee1aa6a, 0x937773ef, 0xb37e4bf5, 0x6ee89270, 0xd322febe, + 0x0eb4273b, 0x73c72163, 0xae51f8e6, 0x139b9428, 0xce0d4dad, + 0xe97d9898, 0x34eb411d, 0x89212dd3, 0x54b7f456, 0x29c4f20e, + 0xf4522b8b, 0x49984745, 0x940e9ec0, 0x0779ed2f, 0xdaef34aa, + 0x67255864, 0xbab381e1, 0xc7c087b9, 0x1a565e3c, 0xa79c32f2, + 0x7a0aeb77, 0x5d7a3e42, 0x80ece7c7, 0x3d268b09, 0xe0b0528c, + 0x9dc354d4, 0x40558d51, 0xfd9fe19f, 0x2009381a, 0xbd8d91ab, + 0x601b482e, 0xddd124e0, 0x0047fd65, 0x7d34fb3d, 0xa0a222b8, + 0x1d684e76, 0xc0fe97f3, 0xe78e42c6, 0x3a189b43, 0x87d2f78d, + 0x5a442e08, 0x27372850, 0xfaa1f1d5, 0x476b9d1b, 0x9afd449e, + 0x098a3771, 0xd41ceef4, 0x69d6823a, 0xb4405bbf, 0xc9335de7, + 0x14a58462, 0xa96fe8ac, 0x74f93129, 0x5389e41c, 0x8e1f3d99, + 0x33d55157, 0xee4388d2, 0x93308e8a, 0x4ea6570f, 0xf36c3bc1, + 0x2efae244, 0x0ef3da5e, 0xd36503db, 0x6eaf6f15, 0xb339b690, + 0xce4ab0c8, 0x13dc694d, 0xae160583, 0x7380dc06, 0x54f00933, + 0x8966d0b6, 0x34acbc78, 0xe93a65fd, 0x944963a5, 0x49dfba20, + 0xf415d6ee, 0x29830f6b, 0xbaf47c84, 0x6762a501, 0xdaa8c9cf, + 0x073e104a, 0x7a4d1612, 0xa7dbcf97, 0x1a11a359, 0xc7877adc, + 0xe0f7afe9, 0x3d61766c, 0x80ab1aa2, 0x5d3dc327, 0x204ec57f, + 0xfdd81cfa, 0x40127034, 0x9d84a9b1, 0xa06a2517, 0x7dfcfc92, + 0xc036905c, 0x1da049d9, 0x60d34f81, 0xbd459604, 0x008ffaca, + 0xdd19234f, 0xfa69f67a, 0x27ff2fff, 0x9a354331, 0x47a39ab4, + 0x3ad09cec, 0xe7464569, 0x5a8c29a7, 0x871af022, 0x146d83cd, + 0xc9fb5a48, 0x74313686, 0xa9a7ef03, 0xd4d4e95b, 0x094230de, + 0xb4885c10, 0x691e8595, 0x4e6e50a0, 0x93f88925, 0x2e32e5eb, + 0xf3a43c6e, 0x8ed73a36, 0x5341e3b3, 0xee8b8f7d, 0x331d56f8, + 0x13146ee2, 0xce82b767, 0x7348dba9, 0xaede022c, 0xd3ad0474, + 0x0e3bddf1, 0xb3f1b13f, 0x6e6768ba, 0x4917bd8f, 0x9481640a, + 0x294b08c4, 0xf4ddd141, 0x89aed719, 0x54380e9c, 0xe9f26252, + 0x3464bbd7, 0xa713c838, 0x7a8511bd, 0xc74f7d73, 0x1ad9a4f6, + 0x67aaa2ae, 0xba3c7b2b, 0x07f617e5, 0xda60ce60, 0xfd101b55, + 0x2086c2d0, 0x9d4cae1e, 0x40da779b, 0x3da971c3, 0xe03fa846, + 0x5df5c488, 0x80631d0d, 0x1de7b4bc, 0xc0716d39, 0x7dbb01f7, + 0xa02dd872, 0xdd5ede2a, 0x00c807af, 0xbd026b61, 0x6094b2e4, + 0x47e467d1, 0x9a72be54, 0x27b8d29a, 0xfa2e0b1f, 0x875d0d47, + 0x5acbd4c2, 0xe701b80c, 0x3a976189, 0xa9e01266, 0x7476cbe3, + 0xc9bca72d, 0x142a7ea8, 0x695978f0, 0xb4cfa175, 0x0905cdbb, + 0xd493143e, 0xf3e3c10b, 0x2e75188e, 0x93bf7440, 0x4e29adc5, + 0x335aab9d, 0xeecc7218, 0x53061ed6, 0x8e90c753, 0xae99ff49, + 0x730f26cc, 0xcec54a02, 0x13539387, 0x6e2095df, 0xb3b64c5a, + 0x0e7c2094, 0xd3eaf911, 0xf49a2c24, 0x290cf5a1, 0x94c6996f, + 0x495040ea, 0x342346b2, 0xe9b59f37, 0x547ff3f9, 0x89e92a7c, + 0x1a9e5993, 0xc7088016, 0x7ac2ecd8, 0xa754355d, 0xda273305, + 0x07b1ea80, 0xba7b864e, 0x67ed5fcb, 0x409d8afe, 0x9d0b537b, + 0x20c13fb5, 0xfd57e630, 0x8024e068, 0x5db239ed, 0xe0785523, + 0x3dee8ca6}, + {0x00000000, 0x9ba54c6f, 0xec3b9e9f, 0x779ed2f0, 0x03063b7f, + 0x98a37710, 0xef3da5e0, 0x7498e98f, 0x060c76fe, 0x9da93a91, + 0xea37e861, 0x7192a40e, 0x050a4d81, 0x9eaf01ee, 0xe931d31e, + 0x72949f71, 0x0c18edfc, 0x97bda193, 0xe0237363, 0x7b863f0c, + 0x0f1ed683, 0x94bb9aec, 0xe325481c, 0x78800473, 0x0a149b02, + 0x91b1d76d, 0xe62f059d, 0x7d8a49f2, 0x0912a07d, 0x92b7ec12, + 0xe5293ee2, 0x7e8c728d, 0x1831dbf8, 0x83949797, 0xf40a4567, + 0x6faf0908, 0x1b37e087, 0x8092ace8, 0xf70c7e18, 0x6ca93277, + 0x1e3dad06, 0x8598e169, 0xf2063399, 0x69a37ff6, 0x1d3b9679, + 0x869eda16, 0xf10008e6, 0x6aa54489, 0x14293604, 0x8f8c7a6b, + 0xf812a89b, 0x63b7e4f4, 0x172f0d7b, 0x8c8a4114, 0xfb1493e4, + 0x60b1df8b, 0x122540fa, 0x89800c95, 0xfe1ede65, 0x65bb920a, + 0x11237b85, 0x8a8637ea, 0xfd18e51a, 0x66bda975, 0x3063b7f0, + 0xabc6fb9f, 0xdc58296f, 0x47fd6500, 0x33658c8f, 0xa8c0c0e0, + 0xdf5e1210, 0x44fb5e7f, 0x366fc10e, 0xadca8d61, 0xda545f91, + 0x41f113fe, 0x3569fa71, 0xaeccb61e, 0xd95264ee, 0x42f72881, + 0x3c7b5a0c, 0xa7de1663, 0xd040c493, 0x4be588fc, 0x3f7d6173, + 0xa4d82d1c, 0xd346ffec, 0x48e3b383, 0x3a772cf2, 0xa1d2609d, + 0xd64cb26d, 0x4de9fe02, 0x3971178d, 0xa2d45be2, 0xd54a8912, + 0x4eefc57d, 0x28526c08, 0xb3f72067, 0xc469f297, 0x5fccbef8, + 0x2b545777, 0xb0f11b18, 0xc76fc9e8, 0x5cca8587, 0x2e5e1af6, + 0xb5fb5699, 0xc2658469, 0x59c0c806, 0x2d582189, 0xb6fd6de6, + 0xc163bf16, 0x5ac6f379, 0x244a81f4, 0xbfefcd9b, 0xc8711f6b, + 0x53d45304, 0x274cba8b, 0xbce9f6e4, 0xcb772414, 0x50d2687b, + 0x2246f70a, 0xb9e3bb65, 0xce7d6995, 0x55d825fa, 0x2140cc75, + 0xbae5801a, 0xcd7b52ea, 0x56de1e85, 0x60c76fe0, 0xfb62238f, + 0x8cfcf17f, 0x1759bd10, 0x63c1549f, 0xf86418f0, 0x8ffaca00, + 0x145f866f, 0x66cb191e, 0xfd6e5571, 0x8af08781, 0x1155cbee, + 0x65cd2261, 0xfe686e0e, 0x89f6bcfe, 0x1253f091, 0x6cdf821c, + 0xf77ace73, 0x80e41c83, 0x1b4150ec, 0x6fd9b963, 0xf47cf50c, + 0x83e227fc, 0x18476b93, 0x6ad3f4e2, 0xf176b88d, 0x86e86a7d, + 0x1d4d2612, 0x69d5cf9d, 0xf27083f2, 0x85ee5102, 0x1e4b1d6d, + 0x78f6b418, 0xe353f877, 0x94cd2a87, 0x0f6866e8, 0x7bf08f67, + 0xe055c308, 0x97cb11f8, 0x0c6e5d97, 0x7efac2e6, 0xe55f8e89, + 0x92c15c79, 0x09641016, 0x7dfcf999, 0xe659b5f6, 0x91c76706, + 0x0a622b69, 0x74ee59e4, 0xef4b158b, 0x98d5c77b, 0x03708b14, + 0x77e8629b, 0xec4d2ef4, 0x9bd3fc04, 0x0076b06b, 0x72e22f1a, + 0xe9476375, 0x9ed9b185, 0x057cfdea, 0x71e41465, 0xea41580a, + 0x9ddf8afa, 0x067ac695, 0x50a4d810, 0xcb01947f, 0xbc9f468f, + 0x273a0ae0, 0x53a2e36f, 0xc807af00, 0xbf997df0, 0x243c319f, + 0x56a8aeee, 0xcd0de281, 0xba933071, 0x21367c1e, 0x55ae9591, + 0xce0bd9fe, 0xb9950b0e, 0x22304761, 0x5cbc35ec, 0xc7197983, + 0xb087ab73, 0x2b22e71c, 0x5fba0e93, 0xc41f42fc, 0xb381900c, + 0x2824dc63, 0x5ab04312, 0xc1150f7d, 0xb68bdd8d, 0x2d2e91e2, + 0x59b6786d, 0xc2133402, 0xb58de6f2, 0x2e28aa9d, 0x489503e8, + 0xd3304f87, 0xa4ae9d77, 0x3f0bd118, 0x4b933897, 0xd03674f8, + 0xa7a8a608, 0x3c0dea67, 0x4e997516, 0xd53c3979, 0xa2a2eb89, + 0x3907a7e6, 0x4d9f4e69, 0xd63a0206, 0xa1a4d0f6, 0x3a019c99, + 0x448dee14, 0xdf28a27b, 0xa8b6708b, 0x33133ce4, 0x478bd56b, + 0xdc2e9904, 0xabb04bf4, 0x3015079b, 0x428198ea, 0xd924d485, + 0xaeba0675, 0x351f4a1a, 0x4187a395, 0xda22effa, 0xadbc3d0a, + 0x36197165}, + {0x00000000, 0xc18edfc0, 0x586cb9c1, 0x99e26601, 0xb0d97382, + 0x7157ac42, 0xe8b5ca43, 0x293b1583, 0xbac3e145, 0x7b4d3e85, + 0xe2af5884, 0x23218744, 0x0a1a92c7, 0xcb944d07, 0x52762b06, + 0x93f8f4c6, 0xaef6c4cb, 0x6f781b0b, 0xf69a7d0a, 0x3714a2ca, + 0x1e2fb749, 0xdfa16889, 0x46430e88, 0x87cdd148, 0x1435258e, + 0xd5bbfa4e, 0x4c599c4f, 0x8dd7438f, 0xa4ec560c, 0x656289cc, + 0xfc80efcd, 0x3d0e300d, 0x869c8fd7, 0x47125017, 0xdef03616, + 0x1f7ee9d6, 0x3645fc55, 0xf7cb2395, 0x6e294594, 0xafa79a54, + 0x3c5f6e92, 0xfdd1b152, 0x6433d753, 0xa5bd0893, 0x8c861d10, + 0x4d08c2d0, 0xd4eaa4d1, 0x15647b11, 0x286a4b1c, 0xe9e494dc, + 0x7006f2dd, 0xb1882d1d, 0x98b3389e, 0x593de75e, 0xc0df815f, + 0x01515e9f, 0x92a9aa59, 0x53277599, 0xcac51398, 0x0b4bcc58, + 0x2270d9db, 0xe3fe061b, 0x7a1c601a, 0xbb92bfda, 0xd64819ef, + 0x17c6c62f, 0x8e24a02e, 0x4faa7fee, 0x66916a6d, 0xa71fb5ad, + 0x3efdd3ac, 0xff730c6c, 0x6c8bf8aa, 0xad05276a, 0x34e7416b, + 0xf5699eab, 0xdc528b28, 0x1ddc54e8, 0x843e32e9, 0x45b0ed29, + 0x78bedd24, 0xb93002e4, 0x20d264e5, 0xe15cbb25, 0xc867aea6, + 0x09e97166, 0x900b1767, 0x5185c8a7, 0xc27d3c61, 0x03f3e3a1, + 0x9a1185a0, 0x5b9f5a60, 0x72a44fe3, 0xb32a9023, 0x2ac8f622, + 0xeb4629e2, 0x50d49638, 0x915a49f8, 0x08b82ff9, 0xc936f039, + 0xe00de5ba, 0x21833a7a, 0xb8615c7b, 0x79ef83bb, 0xea17777d, + 0x2b99a8bd, 0xb27bcebc, 0x73f5117c, 0x5ace04ff, 0x9b40db3f, + 0x02a2bd3e, 0xc32c62fe, 0xfe2252f3, 0x3fac8d33, 0xa64eeb32, + 0x67c034f2, 0x4efb2171, 0x8f75feb1, 0x169798b0, 0xd7194770, + 0x44e1b3b6, 0x856f6c76, 0x1c8d0a77, 0xdd03d5b7, 0xf438c034, + 0x35b61ff4, 0xac5479f5, 0x6ddaa635, 0x77e1359f, 0xb66fea5f, + 0x2f8d8c5e, 0xee03539e, 0xc738461d, 0x06b699dd, 0x9f54ffdc, + 0x5eda201c, 0xcd22d4da, 0x0cac0b1a, 0x954e6d1b, 0x54c0b2db, + 0x7dfba758, 0xbc757898, 0x25971e99, 0xe419c159, 0xd917f154, + 0x18992e94, 0x817b4895, 0x40f59755, 0x69ce82d6, 0xa8405d16, + 0x31a23b17, 0xf02ce4d7, 0x63d41011, 0xa25acfd1, 0x3bb8a9d0, + 0xfa367610, 0xd30d6393, 0x1283bc53, 0x8b61da52, 0x4aef0592, + 0xf17dba48, 0x30f36588, 0xa9110389, 0x689fdc49, 0x41a4c9ca, + 0x802a160a, 0x19c8700b, 0xd846afcb, 0x4bbe5b0d, 0x8a3084cd, + 0x13d2e2cc, 0xd25c3d0c, 0xfb67288f, 0x3ae9f74f, 0xa30b914e, + 0x62854e8e, 0x5f8b7e83, 0x9e05a143, 0x07e7c742, 0xc6691882, + 0xef520d01, 0x2edcd2c1, 0xb73eb4c0, 0x76b06b00, 0xe5489fc6, + 0x24c64006, 0xbd242607, 0x7caaf9c7, 0x5591ec44, 0x941f3384, + 0x0dfd5585, 0xcc738a45, 0xa1a92c70, 0x6027f3b0, 0xf9c595b1, + 0x384b4a71, 0x11705ff2, 0xd0fe8032, 0x491ce633, 0x889239f3, + 0x1b6acd35, 0xdae412f5, 0x430674f4, 0x8288ab34, 0xabb3beb7, + 0x6a3d6177, 0xf3df0776, 0x3251d8b6, 0x0f5fe8bb, 0xced1377b, + 0x5733517a, 0x96bd8eba, 0xbf869b39, 0x7e0844f9, 0xe7ea22f8, + 0x2664fd38, 0xb59c09fe, 0x7412d63e, 0xedf0b03f, 0x2c7e6fff, + 0x05457a7c, 0xc4cba5bc, 0x5d29c3bd, 0x9ca71c7d, 0x2735a3a7, + 0xe6bb7c67, 0x7f591a66, 0xbed7c5a6, 0x97ecd025, 0x56620fe5, + 0xcf8069e4, 0x0e0eb624, 0x9df642e2, 0x5c789d22, 0xc59afb23, + 0x041424e3, 0x2d2f3160, 0xeca1eea0, 0x754388a1, 0xb4cd5761, + 0x89c3676c, 0x484db8ac, 0xd1afdead, 0x1021016d, 0x391a14ee, + 0xf894cb2e, 0x6176ad2f, 0xa0f872ef, 0x33008629, 0xf28e59e9, + 0x6b6c3fe8, 0xaae2e028, 0x83d9f5ab, 0x42572a6b, 0xdbb54c6a, + 0x1a3b93aa}, + {0x00000000, 0xefc26b3e, 0x04f5d03d, 0xeb37bb03, 0x09eba07a, + 0xe629cb44, 0x0d1e7047, 0xe2dc1b79, 0x13d740f4, 0xfc152bca, + 0x172290c9, 0xf8e0fbf7, 0x1a3ce08e, 0xf5fe8bb0, 0x1ec930b3, + 0xf10b5b8d, 0x27ae81e8, 0xc86cead6, 0x235b51d5, 0xcc993aeb, + 0x2e452192, 0xc1874aac, 0x2ab0f1af, 0xc5729a91, 0x3479c11c, + 0xdbbbaa22, 0x308c1121, 0xdf4e7a1f, 0x3d926166, 0xd2500a58, + 0x3967b15b, 0xd6a5da65, 0x4f5d03d0, 0xa09f68ee, 0x4ba8d3ed, + 0xa46ab8d3, 0x46b6a3aa, 0xa974c894, 0x42437397, 0xad8118a9, + 0x5c8a4324, 0xb348281a, 0x587f9319, 0xb7bdf827, 0x5561e35e, + 0xbaa38860, 0x51943363, 0xbe56585d, 0x68f38238, 0x8731e906, + 0x6c065205, 0x83c4393b, 0x61182242, 0x8eda497c, 0x65edf27f, + 0x8a2f9941, 0x7b24c2cc, 0x94e6a9f2, 0x7fd112f1, 0x901379cf, + 0x72cf62b6, 0x9d0d0988, 0x763ab28b, 0x99f8d9b5, 0x9eba07a0, + 0x71786c9e, 0x9a4fd79d, 0x758dbca3, 0x9751a7da, 0x7893cce4, + 0x93a477e7, 0x7c661cd9, 0x8d6d4754, 0x62af2c6a, 0x89989769, + 0x665afc57, 0x8486e72e, 0x6b448c10, 0x80733713, 0x6fb15c2d, + 0xb9148648, 0x56d6ed76, 0xbde15675, 0x52233d4b, 0xb0ff2632, + 0x5f3d4d0c, 0xb40af60f, 0x5bc89d31, 0xaac3c6bc, 0x4501ad82, + 0xae361681, 0x41f47dbf, 0xa32866c6, 0x4cea0df8, 0xa7ddb6fb, + 0x481fddc5, 0xd1e70470, 0x3e256f4e, 0xd512d44d, 0x3ad0bf73, + 0xd80ca40a, 0x37cecf34, 0xdcf97437, 0x333b1f09, 0xc2304484, + 0x2df22fba, 0xc6c594b9, 0x2907ff87, 0xcbdbe4fe, 0x24198fc0, + 0xcf2e34c3, 0x20ec5ffd, 0xf6498598, 0x198beea6, 0xf2bc55a5, + 0x1d7e3e9b, 0xffa225e2, 0x10604edc, 0xfb57f5df, 0x14959ee1, + 0xe59ec56c, 0x0a5cae52, 0xe16b1551, 0x0ea97e6f, 0xec756516, + 0x03b70e28, 0xe880b52b, 0x0742de15, 0xe6050901, 0x09c7623f, + 0xe2f0d93c, 0x0d32b202, 0xefeea97b, 0x002cc245, 0xeb1b7946, + 0x04d91278, 0xf5d249f5, 0x1a1022cb, 0xf12799c8, 0x1ee5f2f6, + 0xfc39e98f, 0x13fb82b1, 0xf8cc39b2, 0x170e528c, 0xc1ab88e9, + 0x2e69e3d7, 0xc55e58d4, 0x2a9c33ea, 0xc8402893, 0x278243ad, + 0xccb5f8ae, 0x23779390, 0xd27cc81d, 0x3dbea323, 0xd6891820, + 0x394b731e, 0xdb976867, 0x34550359, 0xdf62b85a, 0x30a0d364, + 0xa9580ad1, 0x469a61ef, 0xadaddaec, 0x426fb1d2, 0xa0b3aaab, + 0x4f71c195, 0xa4467a96, 0x4b8411a8, 0xba8f4a25, 0x554d211b, + 0xbe7a9a18, 0x51b8f126, 0xb364ea5f, 0x5ca68161, 0xb7913a62, + 0x5853515c, 0x8ef68b39, 0x6134e007, 0x8a035b04, 0x65c1303a, + 0x871d2b43, 0x68df407d, 0x83e8fb7e, 0x6c2a9040, 0x9d21cbcd, + 0x72e3a0f3, 0x99d41bf0, 0x761670ce, 0x94ca6bb7, 0x7b080089, + 0x903fbb8a, 0x7ffdd0b4, 0x78bf0ea1, 0x977d659f, 0x7c4ade9c, + 0x9388b5a2, 0x7154aedb, 0x9e96c5e5, 0x75a17ee6, 0x9a6315d8, + 0x6b684e55, 0x84aa256b, 0x6f9d9e68, 0x805ff556, 0x6283ee2f, + 0x8d418511, 0x66763e12, 0x89b4552c, 0x5f118f49, 0xb0d3e477, + 0x5be45f74, 0xb426344a, 0x56fa2f33, 0xb938440d, 0x520fff0e, + 0xbdcd9430, 0x4cc6cfbd, 0xa304a483, 0x48331f80, 0xa7f174be, + 0x452d6fc7, 0xaaef04f9, 0x41d8bffa, 0xae1ad4c4, 0x37e20d71, + 0xd820664f, 0x3317dd4c, 0xdcd5b672, 0x3e09ad0b, 0xd1cbc635, + 0x3afc7d36, 0xd53e1608, 0x24354d85, 0xcbf726bb, 0x20c09db8, + 0xcf02f686, 0x2ddeedff, 0xc21c86c1, 0x292b3dc2, 0xc6e956fc, + 0x104c8c99, 0xff8ee7a7, 0x14b95ca4, 0xfb7b379a, 0x19a72ce3, + 0xf66547dd, 0x1d52fcde, 0xf29097e0, 0x039bcc6d, 0xec59a753, + 0x076e1c50, 0xe8ac776e, 0x0a706c17, 0xe5b20729, 0x0e85bc2a, + 0xe147d714}, + {0x00000000, 0x177b1443, 0x2ef62886, 0x398d3cc5, 0x5dec510c, + 0x4a97454f, 0x731a798a, 0x64616dc9, 0xbbd8a218, 0xaca3b65b, + 0x952e8a9e, 0x82559edd, 0xe634f314, 0xf14fe757, 0xc8c2db92, + 0xdfb9cfd1, 0xacc04271, 0xbbbb5632, 0x82366af7, 0x954d7eb4, + 0xf12c137d, 0xe657073e, 0xdfda3bfb, 0xc8a12fb8, 0x1718e069, + 0x0063f42a, 0x39eec8ef, 0x2e95dcac, 0x4af4b165, 0x5d8fa526, + 0x640299e3, 0x73798da0, 0x82f182a3, 0x958a96e0, 0xac07aa25, + 0xbb7cbe66, 0xdf1dd3af, 0xc866c7ec, 0xf1ebfb29, 0xe690ef6a, + 0x392920bb, 0x2e5234f8, 0x17df083d, 0x00a41c7e, 0x64c571b7, + 0x73be65f4, 0x4a335931, 0x5d484d72, 0x2e31c0d2, 0x394ad491, + 0x00c7e854, 0x17bcfc17, 0x73dd91de, 0x64a6859d, 0x5d2bb958, + 0x4a50ad1b, 0x95e962ca, 0x82927689, 0xbb1f4a4c, 0xac645e0f, + 0xc80533c6, 0xdf7e2785, 0xe6f31b40, 0xf1880f03, 0xde920307, + 0xc9e91744, 0xf0642b81, 0xe71f3fc2, 0x837e520b, 0x94054648, + 0xad887a8d, 0xbaf36ece, 0x654aa11f, 0x7231b55c, 0x4bbc8999, + 0x5cc79dda, 0x38a6f013, 0x2fdde450, 0x1650d895, 0x012bccd6, + 0x72524176, 0x65295535, 0x5ca469f0, 0x4bdf7db3, 0x2fbe107a, + 0x38c50439, 0x014838fc, 0x16332cbf, 0xc98ae36e, 0xdef1f72d, + 0xe77ccbe8, 0xf007dfab, 0x9466b262, 0x831da621, 0xba909ae4, + 0xadeb8ea7, 0x5c6381a4, 0x4b1895e7, 0x7295a922, 0x65eebd61, + 0x018fd0a8, 0x16f4c4eb, 0x2f79f82e, 0x3802ec6d, 0xe7bb23bc, + 0xf0c037ff, 0xc94d0b3a, 0xde361f79, 0xba5772b0, 0xad2c66f3, + 0x94a15a36, 0x83da4e75, 0xf0a3c3d5, 0xe7d8d796, 0xde55eb53, + 0xc92eff10, 0xad4f92d9, 0xba34869a, 0x83b9ba5f, 0x94c2ae1c, + 0x4b7b61cd, 0x5c00758e, 0x658d494b, 0x72f65d08, 0x169730c1, + 0x01ec2482, 0x38611847, 0x2f1a0c04, 0x6655004f, 0x712e140c, + 0x48a328c9, 0x5fd83c8a, 0x3bb95143, 0x2cc24500, 0x154f79c5, + 0x02346d86, 0xdd8da257, 0xcaf6b614, 0xf37b8ad1, 0xe4009e92, + 0x8061f35b, 0x971ae718, 0xae97dbdd, 0xb9eccf9e, 0xca95423e, + 0xddee567d, 0xe4636ab8, 0xf3187efb, 0x97791332, 0x80020771, + 0xb98f3bb4, 0xaef42ff7, 0x714de026, 0x6636f465, 0x5fbbc8a0, + 0x48c0dce3, 0x2ca1b12a, 0x3bdaa569, 0x025799ac, 0x152c8def, + 0xe4a482ec, 0xf3df96af, 0xca52aa6a, 0xdd29be29, 0xb948d3e0, + 0xae33c7a3, 0x97befb66, 0x80c5ef25, 0x5f7c20f4, 0x480734b7, + 0x718a0872, 0x66f11c31, 0x029071f8, 0x15eb65bb, 0x2c66597e, + 0x3b1d4d3d, 0x4864c09d, 0x5f1fd4de, 0x6692e81b, 0x71e9fc58, + 0x15889191, 0x02f385d2, 0x3b7eb917, 0x2c05ad54, 0xf3bc6285, + 0xe4c776c6, 0xdd4a4a03, 0xca315e40, 0xae503389, 0xb92b27ca, + 0x80a61b0f, 0x97dd0f4c, 0xb8c70348, 0xafbc170b, 0x96312bce, + 0x814a3f8d, 0xe52b5244, 0xf2504607, 0xcbdd7ac2, 0xdca66e81, + 0x031fa150, 0x1464b513, 0x2de989d6, 0x3a929d95, 0x5ef3f05c, + 0x4988e41f, 0x7005d8da, 0x677ecc99, 0x14074139, 0x037c557a, + 0x3af169bf, 0x2d8a7dfc, 0x49eb1035, 0x5e900476, 0x671d38b3, + 0x70662cf0, 0xafdfe321, 0xb8a4f762, 0x8129cba7, 0x9652dfe4, + 0xf233b22d, 0xe548a66e, 0xdcc59aab, 0xcbbe8ee8, 0x3a3681eb, + 0x2d4d95a8, 0x14c0a96d, 0x03bbbd2e, 0x67dad0e7, 0x70a1c4a4, + 0x492cf861, 0x5e57ec22, 0x81ee23f3, 0x969537b0, 0xaf180b75, + 0xb8631f36, 0xdc0272ff, 0xcb7966bc, 0xf2f45a79, 0xe58f4e3a, + 0x96f6c39a, 0x818dd7d9, 0xb800eb1c, 0xaf7bff5f, 0xcb1a9296, + 0xdc6186d5, 0xe5ecba10, 0xf297ae53, 0x2d2e6182, 0x3a5575c1, + 0x03d84904, 0x14a35d47, 0x70c2308e, 0x67b924cd, 0x5e341808, + 0x494f0c4b}}; + +local const z_word_t FAR crc_braid_big_table[][256] = { + {0x0000000000000000, 0x43147b1700000000, 0x8628f62e00000000, + 0xc53c8d3900000000, 0x0c51ec5d00000000, 0x4f45974a00000000, + 0x8a791a7300000000, 0xc96d616400000000, 0x18a2d8bb00000000, + 0x5bb6a3ac00000000, 0x9e8a2e9500000000, 0xdd9e558200000000, + 0x14f334e600000000, 0x57e74ff100000000, 0x92dbc2c800000000, + 0xd1cfb9df00000000, 0x7142c0ac00000000, 0x3256bbbb00000000, + 0xf76a368200000000, 0xb47e4d9500000000, 0x7d132cf100000000, + 0x3e0757e600000000, 0xfb3bdadf00000000, 0xb82fa1c800000000, + 0x69e0181700000000, 0x2af4630000000000, 0xefc8ee3900000000, + 0xacdc952e00000000, 0x65b1f44a00000000, 0x26a58f5d00000000, + 0xe399026400000000, 0xa08d797300000000, 0xa382f18200000000, + 0xe0968a9500000000, 0x25aa07ac00000000, 0x66be7cbb00000000, + 0xafd31ddf00000000, 0xecc766c800000000, 0x29fbebf100000000, + 0x6aef90e600000000, 0xbb20293900000000, 0xf834522e00000000, + 0x3d08df1700000000, 0x7e1ca40000000000, 0xb771c56400000000, + 0xf465be7300000000, 0x3159334a00000000, 0x724d485d00000000, + 0xd2c0312e00000000, 0x91d44a3900000000, 0x54e8c70000000000, + 0x17fcbc1700000000, 0xde91dd7300000000, 0x9d85a66400000000, + 0x58b92b5d00000000, 0x1bad504a00000000, 0xca62e99500000000, + 0x8976928200000000, 0x4c4a1fbb00000000, 0x0f5e64ac00000000, + 0xc63305c800000000, 0x85277edf00000000, 0x401bf3e600000000, + 0x030f88f100000000, 0x070392de00000000, 0x4417e9c900000000, + 0x812b64f000000000, 0xc23f1fe700000000, 0x0b527e8300000000, + 0x4846059400000000, 0x8d7a88ad00000000, 0xce6ef3ba00000000, + 0x1fa14a6500000000, 0x5cb5317200000000, 0x9989bc4b00000000, + 0xda9dc75c00000000, 0x13f0a63800000000, 0x50e4dd2f00000000, + 0x95d8501600000000, 0xd6cc2b0100000000, 0x7641527200000000, + 0x3555296500000000, 0xf069a45c00000000, 0xb37ddf4b00000000, + 0x7a10be2f00000000, 0x3904c53800000000, 0xfc38480100000000, + 0xbf2c331600000000, 0x6ee38ac900000000, 0x2df7f1de00000000, + 0xe8cb7ce700000000, 0xabdf07f000000000, 0x62b2669400000000, + 0x21a61d8300000000, 0xe49a90ba00000000, 0xa78eebad00000000, + 0xa481635c00000000, 0xe795184b00000000, 0x22a9957200000000, + 0x61bdee6500000000, 0xa8d08f0100000000, 0xebc4f41600000000, + 0x2ef8792f00000000, 0x6dec023800000000, 0xbc23bbe700000000, + 0xff37c0f000000000, 0x3a0b4dc900000000, 0x791f36de00000000, + 0xb07257ba00000000, 0xf3662cad00000000, 0x365aa19400000000, + 0x754eda8300000000, 0xd5c3a3f000000000, 0x96d7d8e700000000, + 0x53eb55de00000000, 0x10ff2ec900000000, 0xd9924fad00000000, + 0x9a8634ba00000000, 0x5fbab98300000000, 0x1caec29400000000, + 0xcd617b4b00000000, 0x8e75005c00000000, 0x4b498d6500000000, + 0x085df67200000000, 0xc130971600000000, 0x8224ec0100000000, + 0x4718613800000000, 0x040c1a2f00000000, 0x4f00556600000000, + 0x0c142e7100000000, 0xc928a34800000000, 0x8a3cd85f00000000, + 0x4351b93b00000000, 0x0045c22c00000000, 0xc5794f1500000000, + 0x866d340200000000, 0x57a28ddd00000000, 0x14b6f6ca00000000, + 0xd18a7bf300000000, 0x929e00e400000000, 0x5bf3618000000000, + 0x18e71a9700000000, 0xdddb97ae00000000, 0x9ecfecb900000000, + 0x3e4295ca00000000, 0x7d56eedd00000000, 0xb86a63e400000000, + 0xfb7e18f300000000, 0x3213799700000000, 0x7107028000000000, + 0xb43b8fb900000000, 0xf72ff4ae00000000, 0x26e04d7100000000, + 0x65f4366600000000, 0xa0c8bb5f00000000, 0xe3dcc04800000000, + 0x2ab1a12c00000000, 0x69a5da3b00000000, 0xac99570200000000, + 0xef8d2c1500000000, 0xec82a4e400000000, 0xaf96dff300000000, + 0x6aaa52ca00000000, 0x29be29dd00000000, 0xe0d348b900000000, + 0xa3c733ae00000000, 0x66fbbe9700000000, 0x25efc58000000000, + 0xf4207c5f00000000, 0xb734074800000000, 0x72088a7100000000, + 0x311cf16600000000, 0xf871900200000000, 0xbb65eb1500000000, + 0x7e59662c00000000, 0x3d4d1d3b00000000, 0x9dc0644800000000, + 0xded41f5f00000000, 0x1be8926600000000, 0x58fce97100000000, + 0x9191881500000000, 0xd285f30200000000, 0x17b97e3b00000000, + 0x54ad052c00000000, 0x8562bcf300000000, 0xc676c7e400000000, + 0x034a4add00000000, 0x405e31ca00000000, 0x893350ae00000000, + 0xca272bb900000000, 0x0f1ba68000000000, 0x4c0fdd9700000000, + 0x4803c7b800000000, 0x0b17bcaf00000000, 0xce2b319600000000, + 0x8d3f4a8100000000, 0x44522be500000000, 0x074650f200000000, + 0xc27addcb00000000, 0x816ea6dc00000000, 0x50a11f0300000000, + 0x13b5641400000000, 0xd689e92d00000000, 0x959d923a00000000, + 0x5cf0f35e00000000, 0x1fe4884900000000, 0xdad8057000000000, + 0x99cc7e6700000000, 0x3941071400000000, 0x7a557c0300000000, + 0xbf69f13a00000000, 0xfc7d8a2d00000000, 0x3510eb4900000000, + 0x7604905e00000000, 0xb3381d6700000000, 0xf02c667000000000, + 0x21e3dfaf00000000, 0x62f7a4b800000000, 0xa7cb298100000000, + 0xe4df529600000000, 0x2db233f200000000, 0x6ea648e500000000, + 0xab9ac5dc00000000, 0xe88ebecb00000000, 0xeb81363a00000000, + 0xa8954d2d00000000, 0x6da9c01400000000, 0x2ebdbb0300000000, + 0xe7d0da6700000000, 0xa4c4a17000000000, 0x61f82c4900000000, + 0x22ec575e00000000, 0xf323ee8100000000, 0xb037959600000000, + 0x750b18af00000000, 0x361f63b800000000, 0xff7202dc00000000, + 0xbc6679cb00000000, 0x795af4f200000000, 0x3a4e8fe500000000, + 0x9ac3f69600000000, 0xd9d78d8100000000, 0x1ceb00b800000000, + 0x5fff7baf00000000, 0x96921acb00000000, 0xd58661dc00000000, + 0x10baece500000000, 0x53ae97f200000000, 0x82612e2d00000000, + 0xc175553a00000000, 0x0449d80300000000, 0x475da31400000000, + 0x8e30c27000000000, 0xcd24b96700000000, 0x0818345e00000000, + 0x4b0c4f4900000000}, + {0x0000000000000000, 0x3e6bc2ef00000000, 0x3dd0f50400000000, + 0x03bb37eb00000000, 0x7aa0eb0900000000, 0x44cb29e600000000, + 0x47701e0d00000000, 0x791bdce200000000, 0xf440d71300000000, + 0xca2b15fc00000000, 0xc990221700000000, 0xf7fbe0f800000000, + 0x8ee03c1a00000000, 0xb08bfef500000000, 0xb330c91e00000000, + 0x8d5b0bf100000000, 0xe881ae2700000000, 0xd6ea6cc800000000, + 0xd5515b2300000000, 0xeb3a99cc00000000, 0x9221452e00000000, + 0xac4a87c100000000, 0xaff1b02a00000000, 0x919a72c500000000, + 0x1cc1793400000000, 0x22aabbdb00000000, 0x21118c3000000000, + 0x1f7a4edf00000000, 0x6661923d00000000, 0x580a50d200000000, + 0x5bb1673900000000, 0x65daa5d600000000, 0xd0035d4f00000000, + 0xee689fa000000000, 0xedd3a84b00000000, 0xd3b86aa400000000, + 0xaaa3b64600000000, 0x94c874a900000000, 0x9773434200000000, + 0xa91881ad00000000, 0x24438a5c00000000, 0x1a2848b300000000, + 0x19937f5800000000, 0x27f8bdb700000000, 0x5ee3615500000000, + 0x6088a3ba00000000, 0x6333945100000000, 0x5d5856be00000000, + 0x3882f36800000000, 0x06e9318700000000, 0x0552066c00000000, + 0x3b39c48300000000, 0x4222186100000000, 0x7c49da8e00000000, + 0x7ff2ed6500000000, 0x41992f8a00000000, 0xccc2247b00000000, + 0xf2a9e69400000000, 0xf112d17f00000000, 0xcf79139000000000, + 0xb662cf7200000000, 0x88090d9d00000000, 0x8bb23a7600000000, + 0xb5d9f89900000000, 0xa007ba9e00000000, 0x9e6c787100000000, + 0x9dd74f9a00000000, 0xa3bc8d7500000000, 0xdaa7519700000000, + 0xe4cc937800000000, 0xe777a49300000000, 0xd91c667c00000000, + 0x54476d8d00000000, 0x6a2caf6200000000, 0x6997988900000000, + 0x57fc5a6600000000, 0x2ee7868400000000, 0x108c446b00000000, + 0x1337738000000000, 0x2d5cb16f00000000, 0x488614b900000000, + 0x76edd65600000000, 0x7556e1bd00000000, 0x4b3d235200000000, + 0x3226ffb000000000, 0x0c4d3d5f00000000, 0x0ff60ab400000000, + 0x319dc85b00000000, 0xbcc6c3aa00000000, 0x82ad014500000000, + 0x811636ae00000000, 0xbf7df44100000000, 0xc66628a300000000, + 0xf80dea4c00000000, 0xfbb6dda700000000, 0xc5dd1f4800000000, + 0x7004e7d100000000, 0x4e6f253e00000000, 0x4dd412d500000000, + 0x73bfd03a00000000, 0x0aa40cd800000000, 0x34cfce3700000000, + 0x3774f9dc00000000, 0x091f3b3300000000, 0x844430c200000000, + 0xba2ff22d00000000, 0xb994c5c600000000, 0x87ff072900000000, + 0xfee4dbcb00000000, 0xc08f192400000000, 0xc3342ecf00000000, + 0xfd5fec2000000000, 0x988549f600000000, 0xa6ee8b1900000000, + 0xa555bcf200000000, 0x9b3e7e1d00000000, 0xe225a2ff00000000, + 0xdc4e601000000000, 0xdff557fb00000000, 0xe19e951400000000, + 0x6cc59ee500000000, 0x52ae5c0a00000000, 0x51156be100000000, + 0x6f7ea90e00000000, 0x166575ec00000000, 0x280eb70300000000, + 0x2bb580e800000000, 0x15de420700000000, 0x010905e600000000, + 0x3f62c70900000000, 0x3cd9f0e200000000, 0x02b2320d00000000, + 0x7ba9eeef00000000, 0x45c22c0000000000, 0x46791beb00000000, + 0x7812d90400000000, 0xf549d2f500000000, 0xcb22101a00000000, + 0xc89927f100000000, 0xf6f2e51e00000000, 0x8fe939fc00000000, + 0xb182fb1300000000, 0xb239ccf800000000, 0x8c520e1700000000, + 0xe988abc100000000, 0xd7e3692e00000000, 0xd4585ec500000000, + 0xea339c2a00000000, 0x932840c800000000, 0xad43822700000000, + 0xaef8b5cc00000000, 0x9093772300000000, 0x1dc87cd200000000, + 0x23a3be3d00000000, 0x201889d600000000, 0x1e734b3900000000, + 0x676897db00000000, 0x5903553400000000, 0x5ab862df00000000, + 0x64d3a03000000000, 0xd10a58a900000000, 0xef619a4600000000, + 0xecdaadad00000000, 0xd2b16f4200000000, 0xabaab3a000000000, + 0x95c1714f00000000, 0x967a46a400000000, 0xa811844b00000000, + 0x254a8fba00000000, 0x1b214d5500000000, 0x189a7abe00000000, + 0x26f1b85100000000, 0x5fea64b300000000, 0x6181a65c00000000, + 0x623a91b700000000, 0x5c51535800000000, 0x398bf68e00000000, + 0x07e0346100000000, 0x045b038a00000000, 0x3a30c16500000000, + 0x432b1d8700000000, 0x7d40df6800000000, 0x7efbe88300000000, + 0x40902a6c00000000, 0xcdcb219d00000000, 0xf3a0e37200000000, + 0xf01bd49900000000, 0xce70167600000000, 0xb76bca9400000000, + 0x8900087b00000000, 0x8abb3f9000000000, 0xb4d0fd7f00000000, + 0xa10ebf7800000000, 0x9f657d9700000000, 0x9cde4a7c00000000, + 0xa2b5889300000000, 0xdbae547100000000, 0xe5c5969e00000000, + 0xe67ea17500000000, 0xd815639a00000000, 0x554e686b00000000, + 0x6b25aa8400000000, 0x689e9d6f00000000, 0x56f55f8000000000, + 0x2fee836200000000, 0x1185418d00000000, 0x123e766600000000, + 0x2c55b48900000000, 0x498f115f00000000, 0x77e4d3b000000000, + 0x745fe45b00000000, 0x4a3426b400000000, 0x332ffa5600000000, + 0x0d4438b900000000, 0x0eff0f5200000000, 0x3094cdbd00000000, + 0xbdcfc64c00000000, 0x83a404a300000000, 0x801f334800000000, + 0xbe74f1a700000000, 0xc76f2d4500000000, 0xf904efaa00000000, + 0xfabfd84100000000, 0xc4d41aae00000000, 0x710de23700000000, + 0x4f6620d800000000, 0x4cdd173300000000, 0x72b6d5dc00000000, + 0x0bad093e00000000, 0x35c6cbd100000000, 0x367dfc3a00000000, + 0x08163ed500000000, 0x854d352400000000, 0xbb26f7cb00000000, + 0xb89dc02000000000, 0x86f602cf00000000, 0xffedde2d00000000, + 0xc1861cc200000000, 0xc23d2b2900000000, 0xfc56e9c600000000, + 0x998c4c1000000000, 0xa7e78eff00000000, 0xa45cb91400000000, + 0x9a377bfb00000000, 0xe32ca71900000000, 0xdd4765f600000000, + 0xdefc521d00000000, 0xe09790f200000000, 0x6dcc9b0300000000, + 0x53a759ec00000000, 0x501c6e0700000000, 0x6e77ace800000000, + 0x176c700a00000000, 0x2907b2e500000000, 0x2abc850e00000000, + 0x14d747e100000000}, + {0x0000000000000000, 0xc0df8ec100000000, 0xc1b96c5800000000, + 0x0166e29900000000, 0x8273d9b000000000, 0x42ac577100000000, + 0x43cab5e800000000, 0x83153b2900000000, 0x45e1c3ba00000000, + 0x853e4d7b00000000, 0x8458afe200000000, 0x4487212300000000, + 0xc7921a0a00000000, 0x074d94cb00000000, 0x062b765200000000, + 0xc6f4f89300000000, 0xcbc4f6ae00000000, 0x0b1b786f00000000, + 0x0a7d9af600000000, 0xcaa2143700000000, 0x49b72f1e00000000, + 0x8968a1df00000000, 0x880e434600000000, 0x48d1cd8700000000, + 0x8e25351400000000, 0x4efabbd500000000, 0x4f9c594c00000000, + 0x8f43d78d00000000, 0x0c56eca400000000, 0xcc89626500000000, + 0xcdef80fc00000000, 0x0d300e3d00000000, 0xd78f9c8600000000, + 0x1750124700000000, 0x1636f0de00000000, 0xd6e97e1f00000000, + 0x55fc453600000000, 0x9523cbf700000000, 0x9445296e00000000, + 0x549aa7af00000000, 0x926e5f3c00000000, 0x52b1d1fd00000000, + 0x53d7336400000000, 0x9308bda500000000, 0x101d868c00000000, + 0xd0c2084d00000000, 0xd1a4ead400000000, 0x117b641500000000, + 0x1c4b6a2800000000, 0xdc94e4e900000000, 0xddf2067000000000, + 0x1d2d88b100000000, 0x9e38b39800000000, 0x5ee73d5900000000, + 0x5f81dfc000000000, 0x9f5e510100000000, 0x59aaa99200000000, + 0x9975275300000000, 0x9813c5ca00000000, 0x58cc4b0b00000000, + 0xdbd9702200000000, 0x1b06fee300000000, 0x1a601c7a00000000, + 0xdabf92bb00000000, 0xef1948d600000000, 0x2fc6c61700000000, + 0x2ea0248e00000000, 0xee7faa4f00000000, 0x6d6a916600000000, + 0xadb51fa700000000, 0xacd3fd3e00000000, 0x6c0c73ff00000000, + 0xaaf88b6c00000000, 0x6a2705ad00000000, 0x6b41e73400000000, + 0xab9e69f500000000, 0x288b52dc00000000, 0xe854dc1d00000000, + 0xe9323e8400000000, 0x29edb04500000000, 0x24ddbe7800000000, + 0xe40230b900000000, 0xe564d22000000000, 0x25bb5ce100000000, + 0xa6ae67c800000000, 0x6671e90900000000, 0x67170b9000000000, + 0xa7c8855100000000, 0x613c7dc200000000, 0xa1e3f30300000000, + 0xa085119a00000000, 0x605a9f5b00000000, 0xe34fa47200000000, + 0x23902ab300000000, 0x22f6c82a00000000, 0xe22946eb00000000, + 0x3896d45000000000, 0xf8495a9100000000, 0xf92fb80800000000, + 0x39f036c900000000, 0xbae50de000000000, 0x7a3a832100000000, + 0x7b5c61b800000000, 0xbb83ef7900000000, 0x7d7717ea00000000, + 0xbda8992b00000000, 0xbcce7bb200000000, 0x7c11f57300000000, + 0xff04ce5a00000000, 0x3fdb409b00000000, 0x3ebda20200000000, + 0xfe622cc300000000, 0xf35222fe00000000, 0x338dac3f00000000, + 0x32eb4ea600000000, 0xf234c06700000000, 0x7121fb4e00000000, + 0xb1fe758f00000000, 0xb098971600000000, 0x704719d700000000, + 0xb6b3e14400000000, 0x766c6f8500000000, 0x770a8d1c00000000, + 0xb7d503dd00000000, 0x34c038f400000000, 0xf41fb63500000000, + 0xf57954ac00000000, 0x35a6da6d00000000, 0x9f35e17700000000, + 0x5fea6fb600000000, 0x5e8c8d2f00000000, 0x9e5303ee00000000, + 0x1d4638c700000000, 0xdd99b60600000000, 0xdcff549f00000000, + 0x1c20da5e00000000, 0xdad422cd00000000, 0x1a0bac0c00000000, + 0x1b6d4e9500000000, 0xdbb2c05400000000, 0x58a7fb7d00000000, + 0x987875bc00000000, 0x991e972500000000, 0x59c119e400000000, + 0x54f117d900000000, 0x942e991800000000, 0x95487b8100000000, + 0x5597f54000000000, 0xd682ce6900000000, 0x165d40a800000000, + 0x173ba23100000000, 0xd7e42cf000000000, 0x1110d46300000000, + 0xd1cf5aa200000000, 0xd0a9b83b00000000, 0x107636fa00000000, + 0x93630dd300000000, 0x53bc831200000000, 0x52da618b00000000, + 0x9205ef4a00000000, 0x48ba7df100000000, 0x8865f33000000000, + 0x890311a900000000, 0x49dc9f6800000000, 0xcac9a44100000000, + 0x0a162a8000000000, 0x0b70c81900000000, 0xcbaf46d800000000, + 0x0d5bbe4b00000000, 0xcd84308a00000000, 0xcce2d21300000000, + 0x0c3d5cd200000000, 0x8f2867fb00000000, 0x4ff7e93a00000000, + 0x4e910ba300000000, 0x8e4e856200000000, 0x837e8b5f00000000, + 0x43a1059e00000000, 0x42c7e70700000000, 0x821869c600000000, + 0x010d52ef00000000, 0xc1d2dc2e00000000, 0xc0b43eb700000000, + 0x006bb07600000000, 0xc69f48e500000000, 0x0640c62400000000, + 0x072624bd00000000, 0xc7f9aa7c00000000, 0x44ec915500000000, + 0x84331f9400000000, 0x8555fd0d00000000, 0x458a73cc00000000, + 0x702ca9a100000000, 0xb0f3276000000000, 0xb195c5f900000000, + 0x714a4b3800000000, 0xf25f701100000000, 0x3280fed000000000, + 0x33e61c4900000000, 0xf339928800000000, 0x35cd6a1b00000000, + 0xf512e4da00000000, 0xf474064300000000, 0x34ab888200000000, + 0xb7beb3ab00000000, 0x77613d6a00000000, 0x7607dff300000000, + 0xb6d8513200000000, 0xbbe85f0f00000000, 0x7b37d1ce00000000, + 0x7a51335700000000, 0xba8ebd9600000000, 0x399b86bf00000000, + 0xf944087e00000000, 0xf822eae700000000, 0x38fd642600000000, + 0xfe099cb500000000, 0x3ed6127400000000, 0x3fb0f0ed00000000, + 0xff6f7e2c00000000, 0x7c7a450500000000, 0xbca5cbc400000000, + 0xbdc3295d00000000, 0x7d1ca79c00000000, 0xa7a3352700000000, + 0x677cbbe600000000, 0x661a597f00000000, 0xa6c5d7be00000000, + 0x25d0ec9700000000, 0xe50f625600000000, 0xe46980cf00000000, + 0x24b60e0e00000000, 0xe242f69d00000000, 0x229d785c00000000, + 0x23fb9ac500000000, 0xe324140400000000, 0x60312f2d00000000, + 0xa0eea1ec00000000, 0xa188437500000000, 0x6157cdb400000000, + 0x6c67c38900000000, 0xacb84d4800000000, 0xaddeafd100000000, + 0x6d01211000000000, 0xee141a3900000000, 0x2ecb94f800000000, + 0x2fad766100000000, 0xef72f8a000000000, 0x2986003300000000, + 0xe9598ef200000000, 0xe83f6c6b00000000, 0x28e0e2aa00000000, + 0xabf5d98300000000, 0x6b2a574200000000, 0x6a4cb5db00000000, + 0xaa933b1a00000000}, + {0x0000000000000000, 0x6f4ca59b00000000, 0x9f9e3bec00000000, + 0xf0d29e7700000000, 0x7f3b060300000000, 0x1077a39800000000, + 0xe0a53def00000000, 0x8fe9987400000000, 0xfe760c0600000000, + 0x913aa99d00000000, 0x61e837ea00000000, 0x0ea4927100000000, + 0x814d0a0500000000, 0xee01af9e00000000, 0x1ed331e900000000, + 0x719f947200000000, 0xfced180c00000000, 0x93a1bd9700000000, + 0x637323e000000000, 0x0c3f867b00000000, 0x83d61e0f00000000, + 0xec9abb9400000000, 0x1c4825e300000000, 0x7304807800000000, + 0x029b140a00000000, 0x6dd7b19100000000, 0x9d052fe600000000, + 0xf2498a7d00000000, 0x7da0120900000000, 0x12ecb79200000000, + 0xe23e29e500000000, 0x8d728c7e00000000, 0xf8db311800000000, + 0x9797948300000000, 0x67450af400000000, 0x0809af6f00000000, + 0x87e0371b00000000, 0xe8ac928000000000, 0x187e0cf700000000, + 0x7732a96c00000000, 0x06ad3d1e00000000, 0x69e1988500000000, + 0x993306f200000000, 0xf67fa36900000000, 0x79963b1d00000000, + 0x16da9e8600000000, 0xe60800f100000000, 0x8944a56a00000000, + 0x0436291400000000, 0x6b7a8c8f00000000, 0x9ba812f800000000, + 0xf4e4b76300000000, 0x7b0d2f1700000000, 0x14418a8c00000000, + 0xe49314fb00000000, 0x8bdfb16000000000, 0xfa40251200000000, + 0x950c808900000000, 0x65de1efe00000000, 0x0a92bb6500000000, + 0x857b231100000000, 0xea37868a00000000, 0x1ae518fd00000000, + 0x75a9bd6600000000, 0xf0b7633000000000, 0x9ffbc6ab00000000, + 0x6f2958dc00000000, 0x0065fd4700000000, 0x8f8c653300000000, + 0xe0c0c0a800000000, 0x10125edf00000000, 0x7f5efb4400000000, + 0x0ec16f3600000000, 0x618dcaad00000000, 0x915f54da00000000, + 0xfe13f14100000000, 0x71fa693500000000, 0x1eb6ccae00000000, + 0xee6452d900000000, 0x8128f74200000000, 0x0c5a7b3c00000000, + 0x6316dea700000000, 0x93c440d000000000, 0xfc88e54b00000000, + 0x73617d3f00000000, 0x1c2dd8a400000000, 0xecff46d300000000, + 0x83b3e34800000000, 0xf22c773a00000000, 0x9d60d2a100000000, + 0x6db24cd600000000, 0x02fee94d00000000, 0x8d17713900000000, + 0xe25bd4a200000000, 0x12894ad500000000, 0x7dc5ef4e00000000, + 0x086c522800000000, 0x6720f7b300000000, 0x97f269c400000000, + 0xf8becc5f00000000, 0x7757542b00000000, 0x181bf1b000000000, + 0xe8c96fc700000000, 0x8785ca5c00000000, 0xf61a5e2e00000000, + 0x9956fbb500000000, 0x698465c200000000, 0x06c8c05900000000, + 0x8921582d00000000, 0xe66dfdb600000000, 0x16bf63c100000000, + 0x79f3c65a00000000, 0xf4814a2400000000, 0x9bcdefbf00000000, + 0x6b1f71c800000000, 0x0453d45300000000, 0x8bba4c2700000000, + 0xe4f6e9bc00000000, 0x142477cb00000000, 0x7b68d25000000000, + 0x0af7462200000000, 0x65bbe3b900000000, 0x95697dce00000000, + 0xfa25d85500000000, 0x75cc402100000000, 0x1a80e5ba00000000, + 0xea527bcd00000000, 0x851ede5600000000, 0xe06fc76000000000, + 0x8f2362fb00000000, 0x7ff1fc8c00000000, 0x10bd591700000000, + 0x9f54c16300000000, 0xf01864f800000000, 0x00cafa8f00000000, + 0x6f865f1400000000, 0x1e19cb6600000000, 0x71556efd00000000, + 0x8187f08a00000000, 0xeecb551100000000, 0x6122cd6500000000, + 0x0e6e68fe00000000, 0xfebcf68900000000, 0x91f0531200000000, + 0x1c82df6c00000000, 0x73ce7af700000000, 0x831ce48000000000, + 0xec50411b00000000, 0x63b9d96f00000000, 0x0cf57cf400000000, + 0xfc27e28300000000, 0x936b471800000000, 0xe2f4d36a00000000, + 0x8db876f100000000, 0x7d6ae88600000000, 0x12264d1d00000000, + 0x9dcfd56900000000, 0xf28370f200000000, 0x0251ee8500000000, + 0x6d1d4b1e00000000, 0x18b4f67800000000, 0x77f853e300000000, + 0x872acd9400000000, 0xe866680f00000000, 0x678ff07b00000000, + 0x08c355e000000000, 0xf811cb9700000000, 0x975d6e0c00000000, + 0xe6c2fa7e00000000, 0x898e5fe500000000, 0x795cc19200000000, + 0x1610640900000000, 0x99f9fc7d00000000, 0xf6b559e600000000, + 0x0667c79100000000, 0x692b620a00000000, 0xe459ee7400000000, + 0x8b154bef00000000, 0x7bc7d59800000000, 0x148b700300000000, + 0x9b62e87700000000, 0xf42e4dec00000000, 0x04fcd39b00000000, + 0x6bb0760000000000, 0x1a2fe27200000000, 0x756347e900000000, + 0x85b1d99e00000000, 0xeafd7c0500000000, 0x6514e47100000000, + 0x0a5841ea00000000, 0xfa8adf9d00000000, 0x95c67a0600000000, + 0x10d8a45000000000, 0x7f9401cb00000000, 0x8f469fbc00000000, + 0xe00a3a2700000000, 0x6fe3a25300000000, 0x00af07c800000000, + 0xf07d99bf00000000, 0x9f313c2400000000, 0xeeaea85600000000, + 0x81e20dcd00000000, 0x713093ba00000000, 0x1e7c362100000000, + 0x9195ae5500000000, 0xfed90bce00000000, 0x0e0b95b900000000, + 0x6147302200000000, 0xec35bc5c00000000, 0x837919c700000000, + 0x73ab87b000000000, 0x1ce7222b00000000, 0x930eba5f00000000, + 0xfc421fc400000000, 0x0c9081b300000000, 0x63dc242800000000, + 0x1243b05a00000000, 0x7d0f15c100000000, 0x8ddd8bb600000000, + 0xe2912e2d00000000, 0x6d78b65900000000, 0x023413c200000000, + 0xf2e68db500000000, 0x9daa282e00000000, 0xe803954800000000, + 0x874f30d300000000, 0x779daea400000000, 0x18d10b3f00000000, + 0x9738934b00000000, 0xf87436d000000000, 0x08a6a8a700000000, + 0x67ea0d3c00000000, 0x1675994e00000000, 0x79393cd500000000, + 0x89eba2a200000000, 0xe6a7073900000000, 0x694e9f4d00000000, + 0x06023ad600000000, 0xf6d0a4a100000000, 0x999c013a00000000, + 0x14ee8d4400000000, 0x7ba228df00000000, 0x8b70b6a800000000, + 0xe43c133300000000, 0x6bd58b4700000000, 0x04992edc00000000, + 0xf44bb0ab00000000, 0x9b07153000000000, 0xea98814200000000, + 0x85d424d900000000, 0x7506baae00000000, 0x1a4a1f3500000000, + 0x95a3874100000000, 0xfaef22da00000000, 0x0a3dbcad00000000, + 0x6571193600000000}, + {0x0000000000000000, 0x85d996dd00000000, 0x4bb55c6000000000, + 0xce6ccabd00000000, 0x966ab9c000000000, 0x13b32f1d00000000, + 0xdddfe5a000000000, 0x5806737d00000000, 0x6dd3035a00000000, + 0xe80a958700000000, 0x26665f3a00000000, 0xa3bfc9e700000000, + 0xfbb9ba9a00000000, 0x7e602c4700000000, 0xb00ce6fa00000000, + 0x35d5702700000000, 0xdaa607b400000000, 0x5f7f916900000000, + 0x91135bd400000000, 0x14cacd0900000000, 0x4cccbe7400000000, + 0xc91528a900000000, 0x0779e21400000000, 0x82a074c900000000, + 0xb77504ee00000000, 0x32ac923300000000, 0xfcc0588e00000000, + 0x7919ce5300000000, 0x211fbd2e00000000, 0xa4c62bf300000000, + 0x6aaae14e00000000, 0xef73779300000000, 0xf54b7eb300000000, + 0x7092e86e00000000, 0xbefe22d300000000, 0x3b27b40e00000000, + 0x6321c77300000000, 0xe6f851ae00000000, 0x28949b1300000000, + 0xad4d0dce00000000, 0x98987de900000000, 0x1d41eb3400000000, + 0xd32d218900000000, 0x56f4b75400000000, 0x0ef2c42900000000, + 0x8b2b52f400000000, 0x4547984900000000, 0xc09e0e9400000000, + 0x2fed790700000000, 0xaa34efda00000000, 0x6458256700000000, + 0xe181b3ba00000000, 0xb987c0c700000000, 0x3c5e561a00000000, + 0xf2329ca700000000, 0x77eb0a7a00000000, 0x423e7a5d00000000, + 0xc7e7ec8000000000, 0x098b263d00000000, 0x8c52b0e000000000, + 0xd454c39d00000000, 0x518d554000000000, 0x9fe19ffd00000000, + 0x1a38092000000000, 0xab918dbd00000000, 0x2e481b6000000000, + 0xe024d1dd00000000, 0x65fd470000000000, 0x3dfb347d00000000, + 0xb822a2a000000000, 0x764e681d00000000, 0xf397fec000000000, + 0xc6428ee700000000, 0x439b183a00000000, 0x8df7d28700000000, + 0x082e445a00000000, 0x5028372700000000, 0xd5f1a1fa00000000, + 0x1b9d6b4700000000, 0x9e44fd9a00000000, 0x71378a0900000000, + 0xf4ee1cd400000000, 0x3a82d66900000000, 0xbf5b40b400000000, + 0xe75d33c900000000, 0x6284a51400000000, 0xace86fa900000000, + 0x2931f97400000000, 0x1ce4895300000000, 0x993d1f8e00000000, + 0x5751d53300000000, 0xd28843ee00000000, 0x8a8e309300000000, + 0x0f57a64e00000000, 0xc13b6cf300000000, 0x44e2fa2e00000000, + 0x5edaf30e00000000, 0xdb0365d300000000, 0x156faf6e00000000, + 0x90b639b300000000, 0xc8b04ace00000000, 0x4d69dc1300000000, + 0x830516ae00000000, 0x06dc807300000000, 0x3309f05400000000, + 0xb6d0668900000000, 0x78bcac3400000000, 0xfd653ae900000000, + 0xa563499400000000, 0x20badf4900000000, 0xeed615f400000000, + 0x6b0f832900000000, 0x847cf4ba00000000, 0x01a5626700000000, + 0xcfc9a8da00000000, 0x4a103e0700000000, 0x12164d7a00000000, + 0x97cfdba700000000, 0x59a3111a00000000, 0xdc7a87c700000000, + 0xe9aff7e000000000, 0x6c76613d00000000, 0xa21aab8000000000, + 0x27c33d5d00000000, 0x7fc54e2000000000, 0xfa1cd8fd00000000, + 0x3470124000000000, 0xb1a9849d00000000, 0x17256aa000000000, + 0x92fcfc7d00000000, 0x5c9036c000000000, 0xd949a01d00000000, + 0x814fd36000000000, 0x049645bd00000000, 0xcafa8f0000000000, + 0x4f2319dd00000000, 0x7af669fa00000000, 0xff2fff2700000000, + 0x3143359a00000000, 0xb49aa34700000000, 0xec9cd03a00000000, + 0x694546e700000000, 0xa7298c5a00000000, 0x22f01a8700000000, + 0xcd836d1400000000, 0x485afbc900000000, 0x8636317400000000, + 0x03efa7a900000000, 0x5be9d4d400000000, 0xde30420900000000, + 0x105c88b400000000, 0x95851e6900000000, 0xa0506e4e00000000, + 0x2589f89300000000, 0xebe5322e00000000, 0x6e3ca4f300000000, + 0x363ad78e00000000, 0xb3e3415300000000, 0x7d8f8bee00000000, + 0xf8561d3300000000, 0xe26e141300000000, 0x67b782ce00000000, + 0xa9db487300000000, 0x2c02deae00000000, 0x7404add300000000, + 0xf1dd3b0e00000000, 0x3fb1f1b300000000, 0xba68676e00000000, + 0x8fbd174900000000, 0x0a64819400000000, 0xc4084b2900000000, + 0x41d1ddf400000000, 0x19d7ae8900000000, 0x9c0e385400000000, + 0x5262f2e900000000, 0xd7bb643400000000, 0x38c813a700000000, + 0xbd11857a00000000, 0x737d4fc700000000, 0xf6a4d91a00000000, + 0xaea2aa6700000000, 0x2b7b3cba00000000, 0xe517f60700000000, + 0x60ce60da00000000, 0x551b10fd00000000, 0xd0c2862000000000, + 0x1eae4c9d00000000, 0x9b77da4000000000, 0xc371a93d00000000, + 0x46a83fe000000000, 0x88c4f55d00000000, 0x0d1d638000000000, + 0xbcb4e71d00000000, 0x396d71c000000000, 0xf701bb7d00000000, + 0x72d82da000000000, 0x2ade5edd00000000, 0xaf07c80000000000, + 0x616b02bd00000000, 0xe4b2946000000000, 0xd167e44700000000, + 0x54be729a00000000, 0x9ad2b82700000000, 0x1f0b2efa00000000, + 0x470d5d8700000000, 0xc2d4cb5a00000000, 0x0cb801e700000000, + 0x8961973a00000000, 0x6612e0a900000000, 0xe3cb767400000000, + 0x2da7bcc900000000, 0xa87e2a1400000000, 0xf078596900000000, + 0x75a1cfb400000000, 0xbbcd050900000000, 0x3e1493d400000000, + 0x0bc1e3f300000000, 0x8e18752e00000000, 0x4074bf9300000000, + 0xc5ad294e00000000, 0x9dab5a3300000000, 0x1872ccee00000000, + 0xd61e065300000000, 0x53c7908e00000000, 0x49ff99ae00000000, + 0xcc260f7300000000, 0x024ac5ce00000000, 0x8793531300000000, + 0xdf95206e00000000, 0x5a4cb6b300000000, 0x94207c0e00000000, + 0x11f9ead300000000, 0x242c9af400000000, 0xa1f50c2900000000, + 0x6f99c69400000000, 0xea40504900000000, 0xb246233400000000, + 0x379fb5e900000000, 0xf9f37f5400000000, 0x7c2ae98900000000, + 0x93599e1a00000000, 0x168008c700000000, 0xd8ecc27a00000000, + 0x5d3554a700000000, 0x053327da00000000, 0x80eab10700000000, + 0x4e867bba00000000, 0xcb5fed6700000000, 0xfe8a9d4000000000, + 0x7b530b9d00000000, 0xb53fc12000000000, 0x30e657fd00000000, + 0x68e0248000000000, 0xed39b25d00000000, 0x235578e000000000, + 0xa68cee3d00000000}, + {0x0000000000000000, 0x76e10f9d00000000, 0xadc46ee100000000, + 0xdb25617c00000000, 0x1b8fac1900000000, 0x6d6ea38400000000, + 0xb64bc2f800000000, 0xc0aacd6500000000, 0x361e593300000000, + 0x40ff56ae00000000, 0x9bda37d200000000, 0xed3b384f00000000, + 0x2d91f52a00000000, 0x5b70fab700000000, 0x80559bcb00000000, + 0xf6b4945600000000, 0x6c3cb26600000000, 0x1addbdfb00000000, + 0xc1f8dc8700000000, 0xb719d31a00000000, 0x77b31e7f00000000, + 0x015211e200000000, 0xda77709e00000000, 0xac967f0300000000, + 0x5a22eb5500000000, 0x2cc3e4c800000000, 0xf7e685b400000000, + 0x81078a2900000000, 0x41ad474c00000000, 0x374c48d100000000, + 0xec6929ad00000000, 0x9a88263000000000, 0xd87864cd00000000, + 0xae996b5000000000, 0x75bc0a2c00000000, 0x035d05b100000000, + 0xc3f7c8d400000000, 0xb516c74900000000, 0x6e33a63500000000, + 0x18d2a9a800000000, 0xee663dfe00000000, 0x9887326300000000, + 0x43a2531f00000000, 0x35435c8200000000, 0xf5e991e700000000, + 0x83089e7a00000000, 0x582dff0600000000, 0x2eccf09b00000000, + 0xb444d6ab00000000, 0xc2a5d93600000000, 0x1980b84a00000000, + 0x6f61b7d700000000, 0xafcb7ab200000000, 0xd92a752f00000000, + 0x020f145300000000, 0x74ee1bce00000000, 0x825a8f9800000000, + 0xf4bb800500000000, 0x2f9ee17900000000, 0x597feee400000000, + 0x99d5238100000000, 0xef342c1c00000000, 0x34114d6000000000, + 0x42f042fd00000000, 0xf1f7b94100000000, 0x8716b6dc00000000, + 0x5c33d7a000000000, 0x2ad2d83d00000000, 0xea78155800000000, + 0x9c991ac500000000, 0x47bc7bb900000000, 0x315d742400000000, + 0xc7e9e07200000000, 0xb108efef00000000, 0x6a2d8e9300000000, + 0x1ccc810e00000000, 0xdc664c6b00000000, 0xaa8743f600000000, + 0x71a2228a00000000, 0x07432d1700000000, 0x9dcb0b2700000000, + 0xeb2a04ba00000000, 0x300f65c600000000, 0x46ee6a5b00000000, + 0x8644a73e00000000, 0xf0a5a8a300000000, 0x2b80c9df00000000, + 0x5d61c64200000000, 0xabd5521400000000, 0xdd345d8900000000, + 0x06113cf500000000, 0x70f0336800000000, 0xb05afe0d00000000, + 0xc6bbf19000000000, 0x1d9e90ec00000000, 0x6b7f9f7100000000, + 0x298fdd8c00000000, 0x5f6ed21100000000, 0x844bb36d00000000, + 0xf2aabcf000000000, 0x3200719500000000, 0x44e17e0800000000, + 0x9fc41f7400000000, 0xe92510e900000000, 0x1f9184bf00000000, + 0x69708b2200000000, 0xb255ea5e00000000, 0xc4b4e5c300000000, + 0x041e28a600000000, 0x72ff273b00000000, 0xa9da464700000000, + 0xdf3b49da00000000, 0x45b36fea00000000, 0x3352607700000000, + 0xe877010b00000000, 0x9e960e9600000000, 0x5e3cc3f300000000, + 0x28ddcc6e00000000, 0xf3f8ad1200000000, 0x8519a28f00000000, + 0x73ad36d900000000, 0x054c394400000000, 0xde69583800000000, + 0xa88857a500000000, 0x68229ac000000000, 0x1ec3955d00000000, + 0xc5e6f42100000000, 0xb307fbbc00000000, 0xe2ef738300000000, + 0x940e7c1e00000000, 0x4f2b1d6200000000, 0x39ca12ff00000000, + 0xf960df9a00000000, 0x8f81d00700000000, 0x54a4b17b00000000, + 0x2245bee600000000, 0xd4f12ab000000000, 0xa210252d00000000, + 0x7935445100000000, 0x0fd44bcc00000000, 0xcf7e86a900000000, + 0xb99f893400000000, 0x62bae84800000000, 0x145be7d500000000, + 0x8ed3c1e500000000, 0xf832ce7800000000, 0x2317af0400000000, + 0x55f6a09900000000, 0x955c6dfc00000000, 0xe3bd626100000000, + 0x3898031d00000000, 0x4e790c8000000000, 0xb8cd98d600000000, + 0xce2c974b00000000, 0x1509f63700000000, 0x63e8f9aa00000000, + 0xa34234cf00000000, 0xd5a33b5200000000, 0x0e865a2e00000000, + 0x786755b300000000, 0x3a97174e00000000, 0x4c7618d300000000, + 0x975379af00000000, 0xe1b2763200000000, 0x2118bb5700000000, + 0x57f9b4ca00000000, 0x8cdcd5b600000000, 0xfa3dda2b00000000, + 0x0c894e7d00000000, 0x7a6841e000000000, 0xa14d209c00000000, + 0xd7ac2f0100000000, 0x1706e26400000000, 0x61e7edf900000000, + 0xbac28c8500000000, 0xcc23831800000000, 0x56aba52800000000, + 0x204aaab500000000, 0xfb6fcbc900000000, 0x8d8ec45400000000, + 0x4d24093100000000, 0x3bc506ac00000000, 0xe0e067d000000000, + 0x9601684d00000000, 0x60b5fc1b00000000, 0x1654f38600000000, + 0xcd7192fa00000000, 0xbb909d6700000000, 0x7b3a500200000000, + 0x0ddb5f9f00000000, 0xd6fe3ee300000000, 0xa01f317e00000000, + 0x1318cac200000000, 0x65f9c55f00000000, 0xbedca42300000000, + 0xc83dabbe00000000, 0x089766db00000000, 0x7e76694600000000, + 0xa553083a00000000, 0xd3b207a700000000, 0x250693f100000000, + 0x53e79c6c00000000, 0x88c2fd1000000000, 0xfe23f28d00000000, + 0x3e893fe800000000, 0x4868307500000000, 0x934d510900000000, + 0xe5ac5e9400000000, 0x7f2478a400000000, 0x09c5773900000000, + 0xd2e0164500000000, 0xa40119d800000000, 0x64abd4bd00000000, + 0x124adb2000000000, 0xc96fba5c00000000, 0xbf8eb5c100000000, + 0x493a219700000000, 0x3fdb2e0a00000000, 0xe4fe4f7600000000, + 0x921f40eb00000000, 0x52b58d8e00000000, 0x2454821300000000, + 0xff71e36f00000000, 0x8990ecf200000000, 0xcb60ae0f00000000, + 0xbd81a19200000000, 0x66a4c0ee00000000, 0x1045cf7300000000, + 0xd0ef021600000000, 0xa60e0d8b00000000, 0x7d2b6cf700000000, + 0x0bca636a00000000, 0xfd7ef73c00000000, 0x8b9ff8a100000000, + 0x50ba99dd00000000, 0x265b964000000000, 0xe6f15b2500000000, + 0x901054b800000000, 0x4b3535c400000000, 0x3dd43a5900000000, + 0xa75c1c6900000000, 0xd1bd13f400000000, 0x0a98728800000000, + 0x7c797d1500000000, 0xbcd3b07000000000, 0xca32bfed00000000, + 0x1117de9100000000, 0x67f6d10c00000000, 0x9142455a00000000, + 0xe7a34ac700000000, 0x3c862bbb00000000, 0x4a67242600000000, + 0x8acde94300000000, 0xfc2ce6de00000000, 0x270987a200000000, + 0x51e8883f00000000}, + {0x0000000000000000, 0xe8dbfbb900000000, 0x91b186a800000000, + 0x796a7d1100000000, 0x63657c8a00000000, 0x8bbe873300000000, + 0xf2d4fa2200000000, 0x1a0f019b00000000, 0x87cc89cf00000000, + 0x6f17727600000000, 0x167d0f6700000000, 0xfea6f4de00000000, + 0xe4a9f54500000000, 0x0c720efc00000000, 0x751873ed00000000, + 0x9dc3885400000000, 0x4f9f624400000000, 0xa74499fd00000000, + 0xde2ee4ec00000000, 0x36f51f5500000000, 0x2cfa1ece00000000, + 0xc421e57700000000, 0xbd4b986600000000, 0x559063df00000000, + 0xc853eb8b00000000, 0x2088103200000000, 0x59e26d2300000000, + 0xb139969a00000000, 0xab36970100000000, 0x43ed6cb800000000, + 0x3a8711a900000000, 0xd25cea1000000000, 0x9e3ec58800000000, + 0x76e53e3100000000, 0x0f8f432000000000, 0xe754b89900000000, + 0xfd5bb90200000000, 0x158042bb00000000, 0x6cea3faa00000000, + 0x8431c41300000000, 0x19f24c4700000000, 0xf129b7fe00000000, + 0x8843caef00000000, 0x6098315600000000, 0x7a9730cd00000000, + 0x924ccb7400000000, 0xeb26b66500000000, 0x03fd4ddc00000000, + 0xd1a1a7cc00000000, 0x397a5c7500000000, 0x4010216400000000, + 0xa8cbdadd00000000, 0xb2c4db4600000000, 0x5a1f20ff00000000, + 0x23755dee00000000, 0xcbaea65700000000, 0x566d2e0300000000, + 0xbeb6d5ba00000000, 0xc7dca8ab00000000, 0x2f07531200000000, + 0x3508528900000000, 0xddd3a93000000000, 0xa4b9d42100000000, + 0x4c622f9800000000, 0x7d7bfbca00000000, 0x95a0007300000000, + 0xecca7d6200000000, 0x041186db00000000, 0x1e1e874000000000, + 0xf6c57cf900000000, 0x8faf01e800000000, 0x6774fa5100000000, + 0xfab7720500000000, 0x126c89bc00000000, 0x6b06f4ad00000000, + 0x83dd0f1400000000, 0x99d20e8f00000000, 0x7109f53600000000, + 0x0863882700000000, 0xe0b8739e00000000, 0x32e4998e00000000, + 0xda3f623700000000, 0xa3551f2600000000, 0x4b8ee49f00000000, + 0x5181e50400000000, 0xb95a1ebd00000000, 0xc03063ac00000000, + 0x28eb981500000000, 0xb528104100000000, 0x5df3ebf800000000, + 0x249996e900000000, 0xcc426d5000000000, 0xd64d6ccb00000000, + 0x3e96977200000000, 0x47fcea6300000000, 0xaf2711da00000000, + 0xe3453e4200000000, 0x0b9ec5fb00000000, 0x72f4b8ea00000000, + 0x9a2f435300000000, 0x802042c800000000, 0x68fbb97100000000, + 0x1191c46000000000, 0xf94a3fd900000000, 0x6489b78d00000000, + 0x8c524c3400000000, 0xf538312500000000, 0x1de3ca9c00000000, + 0x07eccb0700000000, 0xef3730be00000000, 0x965d4daf00000000, + 0x7e86b61600000000, 0xacda5c0600000000, 0x4401a7bf00000000, + 0x3d6bdaae00000000, 0xd5b0211700000000, 0xcfbf208c00000000, + 0x2764db3500000000, 0x5e0ea62400000000, 0xb6d55d9d00000000, + 0x2b16d5c900000000, 0xc3cd2e7000000000, 0xbaa7536100000000, + 0x527ca8d800000000, 0x4873a94300000000, 0xa0a852fa00000000, + 0xd9c22feb00000000, 0x3119d45200000000, 0xbbf0874e00000000, + 0x532b7cf700000000, 0x2a4101e600000000, 0xc29afa5f00000000, + 0xd895fbc400000000, 0x304e007d00000000, 0x49247d6c00000000, + 0xa1ff86d500000000, 0x3c3c0e8100000000, 0xd4e7f53800000000, + 0xad8d882900000000, 0x4556739000000000, 0x5f59720b00000000, + 0xb78289b200000000, 0xcee8f4a300000000, 0x26330f1a00000000, + 0xf46fe50a00000000, 0x1cb41eb300000000, 0x65de63a200000000, + 0x8d05981b00000000, 0x970a998000000000, 0x7fd1623900000000, + 0x06bb1f2800000000, 0xee60e49100000000, 0x73a36cc500000000, + 0x9b78977c00000000, 0xe212ea6d00000000, 0x0ac911d400000000, + 0x10c6104f00000000, 0xf81debf600000000, 0x817796e700000000, + 0x69ac6d5e00000000, 0x25ce42c600000000, 0xcd15b97f00000000, + 0xb47fc46e00000000, 0x5ca43fd700000000, 0x46ab3e4c00000000, + 0xae70c5f500000000, 0xd71ab8e400000000, 0x3fc1435d00000000, + 0xa202cb0900000000, 0x4ad930b000000000, 0x33b34da100000000, + 0xdb68b61800000000, 0xc167b78300000000, 0x29bc4c3a00000000, + 0x50d6312b00000000, 0xb80dca9200000000, 0x6a51208200000000, + 0x828adb3b00000000, 0xfbe0a62a00000000, 0x133b5d9300000000, + 0x09345c0800000000, 0xe1efa7b100000000, 0x9885daa000000000, + 0x705e211900000000, 0xed9da94d00000000, 0x054652f400000000, + 0x7c2c2fe500000000, 0x94f7d45c00000000, 0x8ef8d5c700000000, + 0x66232e7e00000000, 0x1f49536f00000000, 0xf792a8d600000000, + 0xc68b7c8400000000, 0x2e50873d00000000, 0x573afa2c00000000, + 0xbfe1019500000000, 0xa5ee000e00000000, 0x4d35fbb700000000, + 0x345f86a600000000, 0xdc847d1f00000000, 0x4147f54b00000000, + 0xa99c0ef200000000, 0xd0f673e300000000, 0x382d885a00000000, + 0x222289c100000000, 0xcaf9727800000000, 0xb3930f6900000000, + 0x5b48f4d000000000, 0x89141ec000000000, 0x61cfe57900000000, + 0x18a5986800000000, 0xf07e63d100000000, 0xea71624a00000000, + 0x02aa99f300000000, 0x7bc0e4e200000000, 0x931b1f5b00000000, + 0x0ed8970f00000000, 0xe6036cb600000000, 0x9f6911a700000000, + 0x77b2ea1e00000000, 0x6dbdeb8500000000, 0x8566103c00000000, + 0xfc0c6d2d00000000, 0x14d7969400000000, 0x58b5b90c00000000, + 0xb06e42b500000000, 0xc9043fa400000000, 0x21dfc41d00000000, + 0x3bd0c58600000000, 0xd30b3e3f00000000, 0xaa61432e00000000, + 0x42bab89700000000, 0xdf7930c300000000, 0x37a2cb7a00000000, + 0x4ec8b66b00000000, 0xa6134dd200000000, 0xbc1c4c4900000000, + 0x54c7b7f000000000, 0x2dadcae100000000, 0xc576315800000000, + 0x172adb4800000000, 0xfff120f100000000, 0x869b5de000000000, + 0x6e40a65900000000, 0x744fa7c200000000, 0x9c945c7b00000000, + 0xe5fe216a00000000, 0x0d25dad300000000, 0x90e6528700000000, + 0x783da93e00000000, 0x0157d42f00000000, 0xe98c2f9600000000, + 0xf3832e0d00000000, 0x1b58d5b400000000, 0x6232a8a500000000, + 0x8ae9531c00000000}, + {0x0000000000000000, 0x919168ae00000000, 0x6325a08700000000, + 0xf2b4c82900000000, 0x874c31d400000000, 0x16dd597a00000000, + 0xe469915300000000, 0x75f8f9fd00000000, 0x4f9f137300000000, + 0xde0e7bdd00000000, 0x2cbab3f400000000, 0xbd2bdb5a00000000, + 0xc8d322a700000000, 0x59424a0900000000, 0xabf6822000000000, + 0x3a67ea8e00000000, 0x9e3e27e600000000, 0x0faf4f4800000000, + 0xfd1b876100000000, 0x6c8aefcf00000000, 0x1972163200000000, + 0x88e37e9c00000000, 0x7a57b6b500000000, 0xebc6de1b00000000, + 0xd1a1349500000000, 0x40305c3b00000000, 0xb284941200000000, + 0x2315fcbc00000000, 0x56ed054100000000, 0xc77c6def00000000, + 0x35c8a5c600000000, 0xa459cd6800000000, 0x7d7b3f1700000000, + 0xecea57b900000000, 0x1e5e9f9000000000, 0x8fcff73e00000000, + 0xfa370ec300000000, 0x6ba6666d00000000, 0x9912ae4400000000, + 0x0883c6ea00000000, 0x32e42c6400000000, 0xa37544ca00000000, + 0x51c18ce300000000, 0xc050e44d00000000, 0xb5a81db000000000, + 0x2439751e00000000, 0xd68dbd3700000000, 0x471cd59900000000, + 0xe34518f100000000, 0x72d4705f00000000, 0x8060b87600000000, + 0x11f1d0d800000000, 0x6409292500000000, 0xf598418b00000000, + 0x072c89a200000000, 0x96bde10c00000000, 0xacda0b8200000000, + 0x3d4b632c00000000, 0xcfffab0500000000, 0x5e6ec3ab00000000, + 0x2b963a5600000000, 0xba0752f800000000, 0x48b39ad100000000, + 0xd922f27f00000000, 0xfaf67e2e00000000, 0x6b67168000000000, + 0x99d3dea900000000, 0x0842b60700000000, 0x7dba4ffa00000000, + 0xec2b275400000000, 0x1e9fef7d00000000, 0x8f0e87d300000000, + 0xb5696d5d00000000, 0x24f805f300000000, 0xd64ccdda00000000, + 0x47dda57400000000, 0x32255c8900000000, 0xa3b4342700000000, + 0x5100fc0e00000000, 0xc09194a000000000, 0x64c859c800000000, + 0xf559316600000000, 0x07edf94f00000000, 0x967c91e100000000, + 0xe384681c00000000, 0x721500b200000000, 0x80a1c89b00000000, + 0x1130a03500000000, 0x2b574abb00000000, 0xbac6221500000000, + 0x4872ea3c00000000, 0xd9e3829200000000, 0xac1b7b6f00000000, + 0x3d8a13c100000000, 0xcf3edbe800000000, 0x5eafb34600000000, + 0x878d413900000000, 0x161c299700000000, 0xe4a8e1be00000000, + 0x7539891000000000, 0x00c170ed00000000, 0x9150184300000000, + 0x63e4d06a00000000, 0xf275b8c400000000, 0xc812524a00000000, + 0x59833ae400000000, 0xab37f2cd00000000, 0x3aa69a6300000000, + 0x4f5e639e00000000, 0xdecf0b3000000000, 0x2c7bc31900000000, + 0xbdeaabb700000000, 0x19b366df00000000, 0x88220e7100000000, + 0x7a96c65800000000, 0xeb07aef600000000, 0x9eff570b00000000, + 0x0f6e3fa500000000, 0xfddaf78c00000000, 0x6c4b9f2200000000, + 0x562c75ac00000000, 0xc7bd1d0200000000, 0x3509d52b00000000, + 0xa498bd8500000000, 0xd160447800000000, 0x40f12cd600000000, + 0xb245e4ff00000000, 0x23d48c5100000000, 0xf4edfd5c00000000, + 0x657c95f200000000, 0x97c85ddb00000000, 0x0659357500000000, + 0x73a1cc8800000000, 0xe230a42600000000, 0x10846c0f00000000, + 0x811504a100000000, 0xbb72ee2f00000000, 0x2ae3868100000000, + 0xd8574ea800000000, 0x49c6260600000000, 0x3c3edffb00000000, + 0xadafb75500000000, 0x5f1b7f7c00000000, 0xce8a17d200000000, + 0x6ad3daba00000000, 0xfb42b21400000000, 0x09f67a3d00000000, + 0x9867129300000000, 0xed9feb6e00000000, 0x7c0e83c000000000, + 0x8eba4be900000000, 0x1f2b234700000000, 0x254cc9c900000000, + 0xb4dda16700000000, 0x4669694e00000000, 0xd7f801e000000000, + 0xa200f81d00000000, 0x339190b300000000, 0xc125589a00000000, + 0x50b4303400000000, 0x8996c24b00000000, 0x1807aae500000000, + 0xeab362cc00000000, 0x7b220a6200000000, 0x0edaf39f00000000, + 0x9f4b9b3100000000, 0x6dff531800000000, 0xfc6e3bb600000000, + 0xc609d13800000000, 0x5798b99600000000, 0xa52c71bf00000000, + 0x34bd191100000000, 0x4145e0ec00000000, 0xd0d4884200000000, + 0x2260406b00000000, 0xb3f128c500000000, 0x17a8e5ad00000000, + 0x86398d0300000000, 0x748d452a00000000, 0xe51c2d8400000000, + 0x90e4d47900000000, 0x0175bcd700000000, 0xf3c174fe00000000, + 0x62501c5000000000, 0x5837f6de00000000, 0xc9a69e7000000000, + 0x3b12565900000000, 0xaa833ef700000000, 0xdf7bc70a00000000, + 0x4eeaafa400000000, 0xbc5e678d00000000, 0x2dcf0f2300000000, + 0x0e1b837200000000, 0x9f8aebdc00000000, 0x6d3e23f500000000, + 0xfcaf4b5b00000000, 0x8957b2a600000000, 0x18c6da0800000000, + 0xea72122100000000, 0x7be37a8f00000000, 0x4184900100000000, + 0xd015f8af00000000, 0x22a1308600000000, 0xb330582800000000, + 0xc6c8a1d500000000, 0x5759c97b00000000, 0xa5ed015200000000, + 0x347c69fc00000000, 0x9025a49400000000, 0x01b4cc3a00000000, + 0xf300041300000000, 0x62916cbd00000000, 0x1769954000000000, + 0x86f8fdee00000000, 0x744c35c700000000, 0xe5dd5d6900000000, + 0xdfbab7e700000000, 0x4e2bdf4900000000, 0xbc9f176000000000, + 0x2d0e7fce00000000, 0x58f6863300000000, 0xc967ee9d00000000, + 0x3bd326b400000000, 0xaa424e1a00000000, 0x7360bc6500000000, + 0xe2f1d4cb00000000, 0x10451ce200000000, 0x81d4744c00000000, + 0xf42c8db100000000, 0x65bde51f00000000, 0x97092d3600000000, + 0x0698459800000000, 0x3cffaf1600000000, 0xad6ec7b800000000, + 0x5fda0f9100000000, 0xce4b673f00000000, 0xbbb39ec200000000, + 0x2a22f66c00000000, 0xd8963e4500000000, 0x490756eb00000000, + 0xed5e9b8300000000, 0x7ccff32d00000000, 0x8e7b3b0400000000, + 0x1fea53aa00000000, 0x6a12aa5700000000, 0xfb83c2f900000000, + 0x09370ad000000000, 0x98a6627e00000000, 0xa2c188f000000000, + 0x3350e05e00000000, 0xc1e4287700000000, 0x507540d900000000, + 0x258db92400000000, 0xb41cd18a00000000, 0x46a819a300000000, + 0xd739710d00000000}}; + +#else /* W == 4 */ + +local const z_crc_t FAR crc_braid_table[][256] = { + {0x00000000, 0xccaa009e, 0x4225077d, 0x8e8f07e3, 0x844a0efa, + 0x48e00e64, 0xc66f0987, 0x0ac50919, 0xd3e51bb5, 0x1f4f1b2b, + 0x91c01cc8, 0x5d6a1c56, 0x57af154f, 0x9b0515d1, 0x158a1232, + 0xd92012ac, 0x7cbb312b, 0xb01131b5, 0x3e9e3656, 0xf23436c8, + 0xf8f13fd1, 0x345b3f4f, 0xbad438ac, 0x767e3832, 0xaf5e2a9e, + 0x63f42a00, 0xed7b2de3, 0x21d12d7d, 0x2b142464, 0xe7be24fa, + 0x69312319, 0xa59b2387, 0xf9766256, 0x35dc62c8, 0xbb53652b, + 0x77f965b5, 0x7d3c6cac, 0xb1966c32, 0x3f196bd1, 0xf3b36b4f, + 0x2a9379e3, 0xe639797d, 0x68b67e9e, 0xa41c7e00, 0xaed97719, + 0x62737787, 0xecfc7064, 0x205670fa, 0x85cd537d, 0x496753e3, + 0xc7e85400, 0x0b42549e, 0x01875d87, 0xcd2d5d19, 0x43a25afa, + 0x8f085a64, 0x562848c8, 0x9a824856, 0x140d4fb5, 0xd8a74f2b, + 0xd2624632, 0x1ec846ac, 0x9047414f, 0x5ced41d1, 0x299dc2ed, + 0xe537c273, 0x6bb8c590, 0xa712c50e, 0xadd7cc17, 0x617dcc89, + 0xeff2cb6a, 0x2358cbf4, 0xfa78d958, 0x36d2d9c6, 0xb85dde25, + 0x74f7debb, 0x7e32d7a2, 0xb298d73c, 0x3c17d0df, 0xf0bdd041, + 0x5526f3c6, 0x998cf358, 0x1703f4bb, 0xdba9f425, 0xd16cfd3c, + 0x1dc6fda2, 0x9349fa41, 0x5fe3fadf, 0x86c3e873, 0x4a69e8ed, + 0xc4e6ef0e, 0x084cef90, 0x0289e689, 0xce23e617, 0x40ace1f4, + 0x8c06e16a, 0xd0eba0bb, 0x1c41a025, 0x92cea7c6, 0x5e64a758, + 0x54a1ae41, 0x980baedf, 0x1684a93c, 0xda2ea9a2, 0x030ebb0e, + 0xcfa4bb90, 0x412bbc73, 0x8d81bced, 0x8744b5f4, 0x4beeb56a, + 0xc561b289, 0x09cbb217, 0xac509190, 0x60fa910e, 0xee7596ed, + 0x22df9673, 0x281a9f6a, 0xe4b09ff4, 0x6a3f9817, 0xa6959889, + 0x7fb58a25, 0xb31f8abb, 0x3d908d58, 0xf13a8dc6, 0xfbff84df, + 0x37558441, 0xb9da83a2, 0x7570833c, 0x533b85da, 0x9f918544, + 0x111e82a7, 0xddb48239, 0xd7718b20, 0x1bdb8bbe, 0x95548c5d, + 0x59fe8cc3, 0x80de9e6f, 0x4c749ef1, 0xc2fb9912, 0x0e51998c, + 0x04949095, 0xc83e900b, 0x46b197e8, 0x8a1b9776, 0x2f80b4f1, + 0xe32ab46f, 0x6da5b38c, 0xa10fb312, 0xabcaba0b, 0x6760ba95, + 0xe9efbd76, 0x2545bde8, 0xfc65af44, 0x30cfafda, 0xbe40a839, + 0x72eaa8a7, 0x782fa1be, 0xb485a120, 0x3a0aa6c3, 0xf6a0a65d, + 0xaa4de78c, 0x66e7e712, 0xe868e0f1, 0x24c2e06f, 0x2e07e976, + 0xe2ade9e8, 0x6c22ee0b, 0xa088ee95, 0x79a8fc39, 0xb502fca7, + 0x3b8dfb44, 0xf727fbda, 0xfde2f2c3, 0x3148f25d, 0xbfc7f5be, + 0x736df520, 0xd6f6d6a7, 0x1a5cd639, 0x94d3d1da, 0x5879d144, + 0x52bcd85d, 0x9e16d8c3, 0x1099df20, 0xdc33dfbe, 0x0513cd12, + 0xc9b9cd8c, 0x4736ca6f, 0x8b9ccaf1, 0x8159c3e8, 0x4df3c376, + 0xc37cc495, 0x0fd6c40b, 0x7aa64737, 0xb60c47a9, 0x3883404a, + 0xf42940d4, 0xfeec49cd, 0x32464953, 0xbcc94eb0, 0x70634e2e, + 0xa9435c82, 0x65e95c1c, 0xeb665bff, 0x27cc5b61, 0x2d095278, + 0xe1a352e6, 0x6f2c5505, 0xa386559b, 0x061d761c, 0xcab77682, + 0x44387161, 0x889271ff, 0x825778e6, 0x4efd7878, 0xc0727f9b, + 0x0cd87f05, 0xd5f86da9, 0x19526d37, 0x97dd6ad4, 0x5b776a4a, + 0x51b26353, 0x9d1863cd, 0x1397642e, 0xdf3d64b0, 0x83d02561, + 0x4f7a25ff, 0xc1f5221c, 0x0d5f2282, 0x079a2b9b, 0xcb302b05, + 0x45bf2ce6, 0x89152c78, 0x50353ed4, 0x9c9f3e4a, 0x121039a9, + 0xdeba3937, 0xd47f302e, 0x18d530b0, 0x965a3753, 0x5af037cd, + 0xff6b144a, 0x33c114d4, 0xbd4e1337, 0x71e413a9, 0x7b211ab0, + 0xb78b1a2e, 0x39041dcd, 0xf5ae1d53, 0x2c8e0fff, 0xe0240f61, + 0x6eab0882, 0xa201081c, 0xa8c40105, 0x646e019b, 0xeae10678, + 0x264b06e6}, + {0x00000000, 0xa6770bb4, 0x979f1129, 0x31e81a9d, 0xf44f2413, + 0x52382fa7, 0x63d0353a, 0xc5a73e8e, 0x33ef4e67, 0x959845d3, + 0xa4705f4e, 0x020754fa, 0xc7a06a74, 0x61d761c0, 0x503f7b5d, + 0xf64870e9, 0x67de9cce, 0xc1a9977a, 0xf0418de7, 0x56368653, + 0x9391b8dd, 0x35e6b369, 0x040ea9f4, 0xa279a240, 0x5431d2a9, + 0xf246d91d, 0xc3aec380, 0x65d9c834, 0xa07ef6ba, 0x0609fd0e, + 0x37e1e793, 0x9196ec27, 0xcfbd399c, 0x69ca3228, 0x582228b5, + 0xfe552301, 0x3bf21d8f, 0x9d85163b, 0xac6d0ca6, 0x0a1a0712, + 0xfc5277fb, 0x5a257c4f, 0x6bcd66d2, 0xcdba6d66, 0x081d53e8, + 0xae6a585c, 0x9f8242c1, 0x39f54975, 0xa863a552, 0x0e14aee6, + 0x3ffcb47b, 0x998bbfcf, 0x5c2c8141, 0xfa5b8af5, 0xcbb39068, + 0x6dc49bdc, 0x9b8ceb35, 0x3dfbe081, 0x0c13fa1c, 0xaa64f1a8, + 0x6fc3cf26, 0xc9b4c492, 0xf85cde0f, 0x5e2bd5bb, 0x440b7579, + 0xe27c7ecd, 0xd3946450, 0x75e36fe4, 0xb044516a, 0x16335ade, + 0x27db4043, 0x81ac4bf7, 0x77e43b1e, 0xd19330aa, 0xe07b2a37, + 0x460c2183, 0x83ab1f0d, 0x25dc14b9, 0x14340e24, 0xb2430590, + 0x23d5e9b7, 0x85a2e203, 0xb44af89e, 0x123df32a, 0xd79acda4, + 0x71edc610, 0x4005dc8d, 0xe672d739, 0x103aa7d0, 0xb64dac64, + 0x87a5b6f9, 0x21d2bd4d, 0xe47583c3, 0x42028877, 0x73ea92ea, + 0xd59d995e, 0x8bb64ce5, 0x2dc14751, 0x1c295dcc, 0xba5e5678, + 0x7ff968f6, 0xd98e6342, 0xe86679df, 0x4e11726b, 0xb8590282, + 0x1e2e0936, 0x2fc613ab, 0x89b1181f, 0x4c162691, 0xea612d25, + 0xdb8937b8, 0x7dfe3c0c, 0xec68d02b, 0x4a1fdb9f, 0x7bf7c102, + 0xdd80cab6, 0x1827f438, 0xbe50ff8c, 0x8fb8e511, 0x29cfeea5, + 0xdf879e4c, 0x79f095f8, 0x48188f65, 0xee6f84d1, 0x2bc8ba5f, + 0x8dbfb1eb, 0xbc57ab76, 0x1a20a0c2, 0x8816eaf2, 0x2e61e146, + 0x1f89fbdb, 0xb9fef06f, 0x7c59cee1, 0xda2ec555, 0xebc6dfc8, + 0x4db1d47c, 0xbbf9a495, 0x1d8eaf21, 0x2c66b5bc, 0x8a11be08, + 0x4fb68086, 0xe9c18b32, 0xd82991af, 0x7e5e9a1b, 0xefc8763c, + 0x49bf7d88, 0x78576715, 0xde206ca1, 0x1b87522f, 0xbdf0599b, + 0x8c184306, 0x2a6f48b2, 0xdc27385b, 0x7a5033ef, 0x4bb82972, + 0xedcf22c6, 0x28681c48, 0x8e1f17fc, 0xbff70d61, 0x198006d5, + 0x47abd36e, 0xe1dcd8da, 0xd034c247, 0x7643c9f3, 0xb3e4f77d, + 0x1593fcc9, 0x247be654, 0x820cede0, 0x74449d09, 0xd23396bd, + 0xe3db8c20, 0x45ac8794, 0x800bb91a, 0x267cb2ae, 0x1794a833, + 0xb1e3a387, 0x20754fa0, 0x86024414, 0xb7ea5e89, 0x119d553d, + 0xd43a6bb3, 0x724d6007, 0x43a57a9a, 0xe5d2712e, 0x139a01c7, + 0xb5ed0a73, 0x840510ee, 0x22721b5a, 0xe7d525d4, 0x41a22e60, + 0x704a34fd, 0xd63d3f49, 0xcc1d9f8b, 0x6a6a943f, 0x5b828ea2, + 0xfdf58516, 0x3852bb98, 0x9e25b02c, 0xafcdaab1, 0x09baa105, + 0xfff2d1ec, 0x5985da58, 0x686dc0c5, 0xce1acb71, 0x0bbdf5ff, + 0xadcafe4b, 0x9c22e4d6, 0x3a55ef62, 0xabc30345, 0x0db408f1, + 0x3c5c126c, 0x9a2b19d8, 0x5f8c2756, 0xf9fb2ce2, 0xc813367f, + 0x6e643dcb, 0x982c4d22, 0x3e5b4696, 0x0fb35c0b, 0xa9c457bf, + 0x6c636931, 0xca146285, 0xfbfc7818, 0x5d8b73ac, 0x03a0a617, + 0xa5d7ada3, 0x943fb73e, 0x3248bc8a, 0xf7ef8204, 0x519889b0, + 0x6070932d, 0xc6079899, 0x304fe870, 0x9638e3c4, 0xa7d0f959, + 0x01a7f2ed, 0xc400cc63, 0x6277c7d7, 0x539fdd4a, 0xf5e8d6fe, + 0x647e3ad9, 0xc209316d, 0xf3e12bf0, 0x55962044, 0x90311eca, + 0x3646157e, 0x07ae0fe3, 0xa1d90457, 0x579174be, 0xf1e67f0a, + 0xc00e6597, 0x66796e23, 0xa3de50ad, 0x05a95b19, 0x34414184, + 0x92364a30}, + {0x00000000, 0xcb5cd3a5, 0x4dc8a10b, 0x869472ae, 0x9b914216, + 0x50cd91b3, 0xd659e31d, 0x1d0530b8, 0xec53826d, 0x270f51c8, + 0xa19b2366, 0x6ac7f0c3, 0x77c2c07b, 0xbc9e13de, 0x3a0a6170, + 0xf156b2d5, 0x03d6029b, 0xc88ad13e, 0x4e1ea390, 0x85427035, + 0x9847408d, 0x531b9328, 0xd58fe186, 0x1ed33223, 0xef8580f6, + 0x24d95353, 0xa24d21fd, 0x6911f258, 0x7414c2e0, 0xbf481145, + 0x39dc63eb, 0xf280b04e, 0x07ac0536, 0xccf0d693, 0x4a64a43d, + 0x81387798, 0x9c3d4720, 0x57619485, 0xd1f5e62b, 0x1aa9358e, + 0xebff875b, 0x20a354fe, 0xa6372650, 0x6d6bf5f5, 0x706ec54d, + 0xbb3216e8, 0x3da66446, 0xf6fab7e3, 0x047a07ad, 0xcf26d408, + 0x49b2a6a6, 0x82ee7503, 0x9feb45bb, 0x54b7961e, 0xd223e4b0, + 0x197f3715, 0xe82985c0, 0x23755665, 0xa5e124cb, 0x6ebdf76e, + 0x73b8c7d6, 0xb8e41473, 0x3e7066dd, 0xf52cb578, 0x0f580a6c, + 0xc404d9c9, 0x4290ab67, 0x89cc78c2, 0x94c9487a, 0x5f959bdf, + 0xd901e971, 0x125d3ad4, 0xe30b8801, 0x28575ba4, 0xaec3290a, + 0x659ffaaf, 0x789aca17, 0xb3c619b2, 0x35526b1c, 0xfe0eb8b9, + 0x0c8e08f7, 0xc7d2db52, 0x4146a9fc, 0x8a1a7a59, 0x971f4ae1, + 0x5c439944, 0xdad7ebea, 0x118b384f, 0xe0dd8a9a, 0x2b81593f, + 0xad152b91, 0x6649f834, 0x7b4cc88c, 0xb0101b29, 0x36846987, + 0xfdd8ba22, 0x08f40f5a, 0xc3a8dcff, 0x453cae51, 0x8e607df4, + 0x93654d4c, 0x58399ee9, 0xdeadec47, 0x15f13fe2, 0xe4a78d37, + 0x2ffb5e92, 0xa96f2c3c, 0x6233ff99, 0x7f36cf21, 0xb46a1c84, + 0x32fe6e2a, 0xf9a2bd8f, 0x0b220dc1, 0xc07ede64, 0x46eaacca, + 0x8db67f6f, 0x90b34fd7, 0x5bef9c72, 0xdd7beedc, 0x16273d79, + 0xe7718fac, 0x2c2d5c09, 0xaab92ea7, 0x61e5fd02, 0x7ce0cdba, + 0xb7bc1e1f, 0x31286cb1, 0xfa74bf14, 0x1eb014d8, 0xd5ecc77d, + 0x5378b5d3, 0x98246676, 0x852156ce, 0x4e7d856b, 0xc8e9f7c5, + 0x03b52460, 0xf2e396b5, 0x39bf4510, 0xbf2b37be, 0x7477e41b, + 0x6972d4a3, 0xa22e0706, 0x24ba75a8, 0xefe6a60d, 0x1d661643, + 0xd63ac5e6, 0x50aeb748, 0x9bf264ed, 0x86f75455, 0x4dab87f0, + 0xcb3ff55e, 0x006326fb, 0xf135942e, 0x3a69478b, 0xbcfd3525, + 0x77a1e680, 0x6aa4d638, 0xa1f8059d, 0x276c7733, 0xec30a496, + 0x191c11ee, 0xd240c24b, 0x54d4b0e5, 0x9f886340, 0x828d53f8, + 0x49d1805d, 0xcf45f2f3, 0x04192156, 0xf54f9383, 0x3e134026, + 0xb8873288, 0x73dbe12d, 0x6eded195, 0xa5820230, 0x2316709e, + 0xe84aa33b, 0x1aca1375, 0xd196c0d0, 0x5702b27e, 0x9c5e61db, + 0x815b5163, 0x4a0782c6, 0xcc93f068, 0x07cf23cd, 0xf6999118, + 0x3dc542bd, 0xbb513013, 0x700de3b6, 0x6d08d30e, 0xa65400ab, + 0x20c07205, 0xeb9ca1a0, 0x11e81eb4, 0xdab4cd11, 0x5c20bfbf, + 0x977c6c1a, 0x8a795ca2, 0x41258f07, 0xc7b1fda9, 0x0ced2e0c, + 0xfdbb9cd9, 0x36e74f7c, 0xb0733dd2, 0x7b2fee77, 0x662adecf, + 0xad760d6a, 0x2be27fc4, 0xe0beac61, 0x123e1c2f, 0xd962cf8a, + 0x5ff6bd24, 0x94aa6e81, 0x89af5e39, 0x42f38d9c, 0xc467ff32, + 0x0f3b2c97, 0xfe6d9e42, 0x35314de7, 0xb3a53f49, 0x78f9ecec, + 0x65fcdc54, 0xaea00ff1, 0x28347d5f, 0xe368aefa, 0x16441b82, + 0xdd18c827, 0x5b8cba89, 0x90d0692c, 0x8dd55994, 0x46898a31, + 0xc01df89f, 0x0b412b3a, 0xfa1799ef, 0x314b4a4a, 0xb7df38e4, + 0x7c83eb41, 0x6186dbf9, 0xaada085c, 0x2c4e7af2, 0xe712a957, + 0x15921919, 0xdececabc, 0x585ab812, 0x93066bb7, 0x8e035b0f, + 0x455f88aa, 0xc3cbfa04, 0x089729a1, 0xf9c19b74, 0x329d48d1, + 0xb4093a7f, 0x7f55e9da, 0x6250d962, 0xa90c0ac7, 0x2f987869, + 0xe4c4abcc}, + {0x00000000, 0x3d6029b0, 0x7ac05360, 0x47a07ad0, 0xf580a6c0, + 0xc8e08f70, 0x8f40f5a0, 0xb220dc10, 0x30704bc1, 0x0d106271, + 0x4ab018a1, 0x77d03111, 0xc5f0ed01, 0xf890c4b1, 0xbf30be61, + 0x825097d1, 0x60e09782, 0x5d80be32, 0x1a20c4e2, 0x2740ed52, + 0x95603142, 0xa80018f2, 0xefa06222, 0xd2c04b92, 0x5090dc43, + 0x6df0f5f3, 0x2a508f23, 0x1730a693, 0xa5107a83, 0x98705333, + 0xdfd029e3, 0xe2b00053, 0xc1c12f04, 0xfca106b4, 0xbb017c64, + 0x866155d4, 0x344189c4, 0x0921a074, 0x4e81daa4, 0x73e1f314, + 0xf1b164c5, 0xccd14d75, 0x8b7137a5, 0xb6111e15, 0x0431c205, + 0x3951ebb5, 0x7ef19165, 0x4391b8d5, 0xa121b886, 0x9c419136, + 0xdbe1ebe6, 0xe681c256, 0x54a11e46, 0x69c137f6, 0x2e614d26, + 0x13016496, 0x9151f347, 0xac31daf7, 0xeb91a027, 0xd6f18997, + 0x64d15587, 0x59b17c37, 0x1e1106e7, 0x23712f57, 0x58f35849, + 0x659371f9, 0x22330b29, 0x1f532299, 0xad73fe89, 0x9013d739, + 0xd7b3ade9, 0xead38459, 0x68831388, 0x55e33a38, 0x124340e8, + 0x2f236958, 0x9d03b548, 0xa0639cf8, 0xe7c3e628, 0xdaa3cf98, + 0x3813cfcb, 0x0573e67b, 0x42d39cab, 0x7fb3b51b, 0xcd93690b, + 0xf0f340bb, 0xb7533a6b, 0x8a3313db, 0x0863840a, 0x3503adba, + 0x72a3d76a, 0x4fc3feda, 0xfde322ca, 0xc0830b7a, 0x872371aa, + 0xba43581a, 0x9932774d, 0xa4525efd, 0xe3f2242d, 0xde920d9d, + 0x6cb2d18d, 0x51d2f83d, 0x167282ed, 0x2b12ab5d, 0xa9423c8c, + 0x9422153c, 0xd3826fec, 0xeee2465c, 0x5cc29a4c, 0x61a2b3fc, + 0x2602c92c, 0x1b62e09c, 0xf9d2e0cf, 0xc4b2c97f, 0x8312b3af, + 0xbe729a1f, 0x0c52460f, 0x31326fbf, 0x7692156f, 0x4bf23cdf, + 0xc9a2ab0e, 0xf4c282be, 0xb362f86e, 0x8e02d1de, 0x3c220dce, + 0x0142247e, 0x46e25eae, 0x7b82771e, 0xb1e6b092, 0x8c869922, + 0xcb26e3f2, 0xf646ca42, 0x44661652, 0x79063fe2, 0x3ea64532, + 0x03c66c82, 0x8196fb53, 0xbcf6d2e3, 0xfb56a833, 0xc6368183, + 0x74165d93, 0x49767423, 0x0ed60ef3, 0x33b62743, 0xd1062710, + 0xec660ea0, 0xabc67470, 0x96a65dc0, 0x248681d0, 0x19e6a860, + 0x5e46d2b0, 0x6326fb00, 0xe1766cd1, 0xdc164561, 0x9bb63fb1, + 0xa6d61601, 0x14f6ca11, 0x2996e3a1, 0x6e369971, 0x5356b0c1, + 0x70279f96, 0x4d47b626, 0x0ae7ccf6, 0x3787e546, 0x85a73956, + 0xb8c710e6, 0xff676a36, 0xc2074386, 0x4057d457, 0x7d37fde7, + 0x3a978737, 0x07f7ae87, 0xb5d77297, 0x88b75b27, 0xcf1721f7, + 0xf2770847, 0x10c70814, 0x2da721a4, 0x6a075b74, 0x576772c4, + 0xe547aed4, 0xd8278764, 0x9f87fdb4, 0xa2e7d404, 0x20b743d5, + 0x1dd76a65, 0x5a7710b5, 0x67173905, 0xd537e515, 0xe857cca5, + 0xaff7b675, 0x92979fc5, 0xe915e8db, 0xd475c16b, 0x93d5bbbb, + 0xaeb5920b, 0x1c954e1b, 0x21f567ab, 0x66551d7b, 0x5b3534cb, + 0xd965a31a, 0xe4058aaa, 0xa3a5f07a, 0x9ec5d9ca, 0x2ce505da, + 0x11852c6a, 0x562556ba, 0x6b457f0a, 0x89f57f59, 0xb49556e9, + 0xf3352c39, 0xce550589, 0x7c75d999, 0x4115f029, 0x06b58af9, + 0x3bd5a349, 0xb9853498, 0x84e51d28, 0xc34567f8, 0xfe254e48, + 0x4c059258, 0x7165bbe8, 0x36c5c138, 0x0ba5e888, 0x28d4c7df, + 0x15b4ee6f, 0x521494bf, 0x6f74bd0f, 0xdd54611f, 0xe03448af, + 0xa794327f, 0x9af41bcf, 0x18a48c1e, 0x25c4a5ae, 0x6264df7e, + 0x5f04f6ce, 0xed242ade, 0xd044036e, 0x97e479be, 0xaa84500e, + 0x4834505d, 0x755479ed, 0x32f4033d, 0x0f942a8d, 0xbdb4f69d, + 0x80d4df2d, 0xc774a5fd, 0xfa148c4d, 0x78441b9c, 0x4524322c, + 0x028448fc, 0x3fe4614c, 0x8dc4bd5c, 0xb0a494ec, 0xf704ee3c, + 0xca64c78c}}; + +local const z_word_t FAR crc_braid_big_table[][256] = { + {0x00000000, 0xb029603d, 0x6053c07a, 0xd07aa047, 0xc0a680f5, + 0x708fe0c8, 0xa0f5408f, 0x10dc20b2, 0xc14b7030, 0x7162100d, + 0xa118b04a, 0x1131d077, 0x01edf0c5, 0xb1c490f8, 0x61be30bf, + 0xd1975082, 0x8297e060, 0x32be805d, 0xe2c4201a, 0x52ed4027, + 0x42316095, 0xf21800a8, 0x2262a0ef, 0x924bc0d2, 0x43dc9050, + 0xf3f5f06d, 0x238f502a, 0x93a63017, 0x837a10a5, 0x33537098, + 0xe329d0df, 0x5300b0e2, 0x042fc1c1, 0xb406a1fc, 0x647c01bb, + 0xd4556186, 0xc4894134, 0x74a02109, 0xa4da814e, 0x14f3e173, + 0xc564b1f1, 0x754dd1cc, 0xa537718b, 0x151e11b6, 0x05c23104, + 0xb5eb5139, 0x6591f17e, 0xd5b89143, 0x86b821a1, 0x3691419c, + 0xe6ebe1db, 0x56c281e6, 0x461ea154, 0xf637c169, 0x264d612e, + 0x96640113, 0x47f35191, 0xf7da31ac, 0x27a091eb, 0x9789f1d6, + 0x8755d164, 0x377cb159, 0xe706111e, 0x572f7123, 0x4958f358, + 0xf9719365, 0x290b3322, 0x9922531f, 0x89fe73ad, 0x39d71390, + 0xe9adb3d7, 0x5984d3ea, 0x88138368, 0x383ae355, 0xe8404312, + 0x5869232f, 0x48b5039d, 0xf89c63a0, 0x28e6c3e7, 0x98cfa3da, + 0xcbcf1338, 0x7be67305, 0xab9cd342, 0x1bb5b37f, 0x0b6993cd, + 0xbb40f3f0, 0x6b3a53b7, 0xdb13338a, 0x0a846308, 0xbaad0335, + 0x6ad7a372, 0xdafec34f, 0xca22e3fd, 0x7a0b83c0, 0xaa712387, + 0x1a5843ba, 0x4d773299, 0xfd5e52a4, 0x2d24f2e3, 0x9d0d92de, + 0x8dd1b26c, 0x3df8d251, 0xed827216, 0x5dab122b, 0x8c3c42a9, + 0x3c152294, 0xec6f82d3, 0x5c46e2ee, 0x4c9ac25c, 0xfcb3a261, + 0x2cc90226, 0x9ce0621b, 0xcfe0d2f9, 0x7fc9b2c4, 0xafb31283, + 0x1f9a72be, 0x0f46520c, 0xbf6f3231, 0x6f159276, 0xdf3cf24b, + 0x0eaba2c9, 0xbe82c2f4, 0x6ef862b3, 0xded1028e, 0xce0d223c, + 0x7e244201, 0xae5ee246, 0x1e77827b, 0x92b0e6b1, 0x2299868c, + 0xf2e326cb, 0x42ca46f6, 0x52166644, 0xe23f0679, 0x3245a63e, + 0x826cc603, 0x53fb9681, 0xe3d2f6bc, 0x33a856fb, 0x838136c6, + 0x935d1674, 0x23747649, 0xf30ed60e, 0x4327b633, 0x102706d1, + 0xa00e66ec, 0x7074c6ab, 0xc05da696, 0xd0818624, 0x60a8e619, + 0xb0d2465e, 0x00fb2663, 0xd16c76e1, 0x614516dc, 0xb13fb69b, + 0x0116d6a6, 0x11caf614, 0xa1e39629, 0x7199366e, 0xc1b05653, + 0x969f2770, 0x26b6474d, 0xf6cce70a, 0x46e58737, 0x5639a785, + 0xe610c7b8, 0x366a67ff, 0x864307c2, 0x57d45740, 0xe7fd377d, + 0x3787973a, 0x87aef707, 0x9772d7b5, 0x275bb788, 0xf72117cf, + 0x470877f2, 0x1408c710, 0xa421a72d, 0x745b076a, 0xc4726757, + 0xd4ae47e5, 0x648727d8, 0xb4fd879f, 0x04d4e7a2, 0xd543b720, + 0x656ad71d, 0xb510775a, 0x05391767, 0x15e537d5, 0xa5cc57e8, + 0x75b6f7af, 0xc59f9792, 0xdbe815e9, 0x6bc175d4, 0xbbbbd593, + 0x0b92b5ae, 0x1b4e951c, 0xab67f521, 0x7b1d5566, 0xcb34355b, + 0x1aa365d9, 0xaa8a05e4, 0x7af0a5a3, 0xcad9c59e, 0xda05e52c, + 0x6a2c8511, 0xba562556, 0x0a7f456b, 0x597ff589, 0xe95695b4, + 0x392c35f3, 0x890555ce, 0x99d9757c, 0x29f01541, 0xf98ab506, + 0x49a3d53b, 0x983485b9, 0x281de584, 0xf86745c3, 0x484e25fe, + 0x5892054c, 0xe8bb6571, 0x38c1c536, 0x88e8a50b, 0xdfc7d428, + 0x6feeb415, 0xbf941452, 0x0fbd746f, 0x1f6154dd, 0xaf4834e0, + 0x7f3294a7, 0xcf1bf49a, 0x1e8ca418, 0xaea5c425, 0x7edf6462, + 0xcef6045f, 0xde2a24ed, 0x6e0344d0, 0xbe79e497, 0x0e5084aa, + 0x5d503448, 0xed795475, 0x3d03f432, 0x8d2a940f, 0x9df6b4bd, + 0x2ddfd480, 0xfda574c7, 0x4d8c14fa, 0x9c1b4478, 0x2c322445, + 0xfc488402, 0x4c61e43f, 0x5cbdc48d, 0xec94a4b0, 0x3cee04f7, + 0x8cc764ca}, + {0x00000000, 0xa5d35ccb, 0x0ba1c84d, 0xae729486, 0x1642919b, + 0xb391cd50, 0x1de359d6, 0xb830051d, 0x6d8253ec, 0xc8510f27, + 0x66239ba1, 0xc3f0c76a, 0x7bc0c277, 0xde139ebc, 0x70610a3a, + 0xd5b256f1, 0x9b02d603, 0x3ed18ac8, 0x90a31e4e, 0x35704285, + 0x8d404798, 0x28931b53, 0x86e18fd5, 0x2332d31e, 0xf68085ef, + 0x5353d924, 0xfd214da2, 0x58f21169, 0xe0c21474, 0x451148bf, + 0xeb63dc39, 0x4eb080f2, 0x3605ac07, 0x93d6f0cc, 0x3da4644a, + 0x98773881, 0x20473d9c, 0x85946157, 0x2be6f5d1, 0x8e35a91a, + 0x5b87ffeb, 0xfe54a320, 0x502637a6, 0xf5f56b6d, 0x4dc56e70, + 0xe81632bb, 0x4664a63d, 0xe3b7faf6, 0xad077a04, 0x08d426cf, + 0xa6a6b249, 0x0375ee82, 0xbb45eb9f, 0x1e96b754, 0xb0e423d2, + 0x15377f19, 0xc08529e8, 0x65567523, 0xcb24e1a5, 0x6ef7bd6e, + 0xd6c7b873, 0x7314e4b8, 0xdd66703e, 0x78b52cf5, 0x6c0a580f, + 0xc9d904c4, 0x67ab9042, 0xc278cc89, 0x7a48c994, 0xdf9b955f, + 0x71e901d9, 0xd43a5d12, 0x01880be3, 0xa45b5728, 0x0a29c3ae, + 0xaffa9f65, 0x17ca9a78, 0xb219c6b3, 0x1c6b5235, 0xb9b80efe, + 0xf7088e0c, 0x52dbd2c7, 0xfca94641, 0x597a1a8a, 0xe14a1f97, + 0x4499435c, 0xeaebd7da, 0x4f388b11, 0x9a8adde0, 0x3f59812b, + 0x912b15ad, 0x34f84966, 0x8cc84c7b, 0x291b10b0, 0x87698436, + 0x22bad8fd, 0x5a0ff408, 0xffdca8c3, 0x51ae3c45, 0xf47d608e, + 0x4c4d6593, 0xe99e3958, 0x47ecadde, 0xe23ff115, 0x378da7e4, + 0x925efb2f, 0x3c2c6fa9, 0x99ff3362, 0x21cf367f, 0x841c6ab4, + 0x2a6efe32, 0x8fbda2f9, 0xc10d220b, 0x64de7ec0, 0xcaacea46, + 0x6f7fb68d, 0xd74fb390, 0x729cef5b, 0xdcee7bdd, 0x793d2716, + 0xac8f71e7, 0x095c2d2c, 0xa72eb9aa, 0x02fde561, 0xbacde07c, + 0x1f1ebcb7, 0xb16c2831, 0x14bf74fa, 0xd814b01e, 0x7dc7ecd5, + 0xd3b57853, 0x76662498, 0xce562185, 0x6b857d4e, 0xc5f7e9c8, + 0x6024b503, 0xb596e3f2, 0x1045bf39, 0xbe372bbf, 0x1be47774, + 0xa3d47269, 0x06072ea2, 0xa875ba24, 0x0da6e6ef, 0x4316661d, + 0xe6c53ad6, 0x48b7ae50, 0xed64f29b, 0x5554f786, 0xf087ab4d, + 0x5ef53fcb, 0xfb266300, 0x2e9435f1, 0x8b47693a, 0x2535fdbc, + 0x80e6a177, 0x38d6a46a, 0x9d05f8a1, 0x33776c27, 0x96a430ec, + 0xee111c19, 0x4bc240d2, 0xe5b0d454, 0x4063889f, 0xf8538d82, + 0x5d80d149, 0xf3f245cf, 0x56211904, 0x83934ff5, 0x2640133e, + 0x883287b8, 0x2de1db73, 0x95d1de6e, 0x300282a5, 0x9e701623, + 0x3ba34ae8, 0x7513ca1a, 0xd0c096d1, 0x7eb20257, 0xdb615e9c, + 0x63515b81, 0xc682074a, 0x68f093cc, 0xcd23cf07, 0x189199f6, + 0xbd42c53d, 0x133051bb, 0xb6e30d70, 0x0ed3086d, 0xab0054a6, + 0x0572c020, 0xa0a19ceb, 0xb41ee811, 0x11cdb4da, 0xbfbf205c, + 0x1a6c7c97, 0xa25c798a, 0x078f2541, 0xa9fdb1c7, 0x0c2eed0c, + 0xd99cbbfd, 0x7c4fe736, 0xd23d73b0, 0x77ee2f7b, 0xcfde2a66, + 0x6a0d76ad, 0xc47fe22b, 0x61acbee0, 0x2f1c3e12, 0x8acf62d9, + 0x24bdf65f, 0x816eaa94, 0x395eaf89, 0x9c8df342, 0x32ff67c4, + 0x972c3b0f, 0x429e6dfe, 0xe74d3135, 0x493fa5b3, 0xececf978, + 0x54dcfc65, 0xf10fa0ae, 0x5f7d3428, 0xfaae68e3, 0x821b4416, + 0x27c818dd, 0x89ba8c5b, 0x2c69d090, 0x9459d58d, 0x318a8946, + 0x9ff81dc0, 0x3a2b410b, 0xef9917fa, 0x4a4a4b31, 0xe438dfb7, + 0x41eb837c, 0xf9db8661, 0x5c08daaa, 0xf27a4e2c, 0x57a912e7, + 0x19199215, 0xbccacede, 0x12b85a58, 0xb76b0693, 0x0f5b038e, + 0xaa885f45, 0x04facbc3, 0xa1299708, 0x749bc1f9, 0xd1489d32, + 0x7f3a09b4, 0xdae9557f, 0x62d95062, 0xc70a0ca9, 0x6978982f, + 0xccabc4e4}, + {0x00000000, 0xb40b77a6, 0x29119f97, 0x9d1ae831, 0x13244ff4, + 0xa72f3852, 0x3a35d063, 0x8e3ea7c5, 0x674eef33, 0xd3459895, + 0x4e5f70a4, 0xfa540702, 0x746aa0c7, 0xc061d761, 0x5d7b3f50, + 0xe97048f6, 0xce9cde67, 0x7a97a9c1, 0xe78d41f0, 0x53863656, + 0xddb89193, 0x69b3e635, 0xf4a90e04, 0x40a279a2, 0xa9d23154, + 0x1dd946f2, 0x80c3aec3, 0x34c8d965, 0xbaf67ea0, 0x0efd0906, + 0x93e7e137, 0x27ec9691, 0x9c39bdcf, 0x2832ca69, 0xb5282258, + 0x012355fe, 0x8f1df23b, 0x3b16859d, 0xa60c6dac, 0x12071a0a, + 0xfb7752fc, 0x4f7c255a, 0xd266cd6b, 0x666dbacd, 0xe8531d08, + 0x5c586aae, 0xc142829f, 0x7549f539, 0x52a563a8, 0xe6ae140e, + 0x7bb4fc3f, 0xcfbf8b99, 0x41812c5c, 0xf58a5bfa, 0x6890b3cb, + 0xdc9bc46d, 0x35eb8c9b, 0x81e0fb3d, 0x1cfa130c, 0xa8f164aa, + 0x26cfc36f, 0x92c4b4c9, 0x0fde5cf8, 0xbbd52b5e, 0x79750b44, + 0xcd7e7ce2, 0x506494d3, 0xe46fe375, 0x6a5144b0, 0xde5a3316, + 0x4340db27, 0xf74bac81, 0x1e3be477, 0xaa3093d1, 0x372a7be0, + 0x83210c46, 0x0d1fab83, 0xb914dc25, 0x240e3414, 0x900543b2, + 0xb7e9d523, 0x03e2a285, 0x9ef84ab4, 0x2af33d12, 0xa4cd9ad7, + 0x10c6ed71, 0x8ddc0540, 0x39d772e6, 0xd0a73a10, 0x64ac4db6, + 0xf9b6a587, 0x4dbdd221, 0xc38375e4, 0x77880242, 0xea92ea73, + 0x5e999dd5, 0xe54cb68b, 0x5147c12d, 0xcc5d291c, 0x78565eba, + 0xf668f97f, 0x42638ed9, 0xdf7966e8, 0x6b72114e, 0x820259b8, + 0x36092e1e, 0xab13c62f, 0x1f18b189, 0x9126164c, 0x252d61ea, + 0xb83789db, 0x0c3cfe7d, 0x2bd068ec, 0x9fdb1f4a, 0x02c1f77b, + 0xb6ca80dd, 0x38f42718, 0x8cff50be, 0x11e5b88f, 0xa5eecf29, + 0x4c9e87df, 0xf895f079, 0x658f1848, 0xd1846fee, 0x5fbac82b, + 0xebb1bf8d, 0x76ab57bc, 0xc2a0201a, 0xf2ea1688, 0x46e1612e, + 0xdbfb891f, 0x6ff0feb9, 0xe1ce597c, 0x55c52eda, 0xc8dfc6eb, + 0x7cd4b14d, 0x95a4f9bb, 0x21af8e1d, 0xbcb5662c, 0x08be118a, + 0x8680b64f, 0x328bc1e9, 0xaf9129d8, 0x1b9a5e7e, 0x3c76c8ef, + 0x887dbf49, 0x15675778, 0xa16c20de, 0x2f52871b, 0x9b59f0bd, + 0x0643188c, 0xb2486f2a, 0x5b3827dc, 0xef33507a, 0x7229b84b, + 0xc622cfed, 0x481c6828, 0xfc171f8e, 0x610df7bf, 0xd5068019, + 0x6ed3ab47, 0xdad8dce1, 0x47c234d0, 0xf3c94376, 0x7df7e4b3, + 0xc9fc9315, 0x54e67b24, 0xe0ed0c82, 0x099d4474, 0xbd9633d2, + 0x208cdbe3, 0x9487ac45, 0x1ab90b80, 0xaeb27c26, 0x33a89417, + 0x87a3e3b1, 0xa04f7520, 0x14440286, 0x895eeab7, 0x3d559d11, + 0xb36b3ad4, 0x07604d72, 0x9a7aa543, 0x2e71d2e5, 0xc7019a13, + 0x730aedb5, 0xee100584, 0x5a1b7222, 0xd425d5e7, 0x602ea241, + 0xfd344a70, 0x493f3dd6, 0x8b9f1dcc, 0x3f946a6a, 0xa28e825b, + 0x1685f5fd, 0x98bb5238, 0x2cb0259e, 0xb1aacdaf, 0x05a1ba09, + 0xecd1f2ff, 0x58da8559, 0xc5c06d68, 0x71cb1ace, 0xfff5bd0b, + 0x4bfecaad, 0xd6e4229c, 0x62ef553a, 0x4503c3ab, 0xf108b40d, + 0x6c125c3c, 0xd8192b9a, 0x56278c5f, 0xe22cfbf9, 0x7f3613c8, + 0xcb3d646e, 0x224d2c98, 0x96465b3e, 0x0b5cb30f, 0xbf57c4a9, + 0x3169636c, 0x856214ca, 0x1878fcfb, 0xac738b5d, 0x17a6a003, + 0xa3add7a5, 0x3eb73f94, 0x8abc4832, 0x0482eff7, 0xb0899851, + 0x2d937060, 0x999807c6, 0x70e84f30, 0xc4e33896, 0x59f9d0a7, + 0xedf2a701, 0x63cc00c4, 0xd7c77762, 0x4add9f53, 0xfed6e8f5, + 0xd93a7e64, 0x6d3109c2, 0xf02be1f3, 0x44209655, 0xca1e3190, + 0x7e154636, 0xe30fae07, 0x5704d9a1, 0xbe749157, 0x0a7fe6f1, + 0x97650ec0, 0x236e7966, 0xad50dea3, 0x195ba905, 0x84414134, + 0x304a3692}, + {0x00000000, 0x9e00aacc, 0x7d072542, 0xe3078f8e, 0xfa0e4a84, + 0x640ee048, 0x87096fc6, 0x1909c50a, 0xb51be5d3, 0x2b1b4f1f, + 0xc81cc091, 0x561c6a5d, 0x4f15af57, 0xd115059b, 0x32128a15, + 0xac1220d9, 0x2b31bb7c, 0xb53111b0, 0x56369e3e, 0xc83634f2, + 0xd13ff1f8, 0x4f3f5b34, 0xac38d4ba, 0x32387e76, 0x9e2a5eaf, + 0x002af463, 0xe32d7bed, 0x7d2dd121, 0x6424142b, 0xfa24bee7, + 0x19233169, 0x87239ba5, 0x566276f9, 0xc862dc35, 0x2b6553bb, + 0xb565f977, 0xac6c3c7d, 0x326c96b1, 0xd16b193f, 0x4f6bb3f3, + 0xe379932a, 0x7d7939e6, 0x9e7eb668, 0x007e1ca4, 0x1977d9ae, + 0x87777362, 0x6470fcec, 0xfa705620, 0x7d53cd85, 0xe3536749, + 0x0054e8c7, 0x9e54420b, 0x875d8701, 0x195d2dcd, 0xfa5aa243, + 0x645a088f, 0xc8482856, 0x5648829a, 0xb54f0d14, 0x2b4fa7d8, + 0x324662d2, 0xac46c81e, 0x4f414790, 0xd141ed5c, 0xedc29d29, + 0x73c237e5, 0x90c5b86b, 0x0ec512a7, 0x17ccd7ad, 0x89cc7d61, + 0x6acbf2ef, 0xf4cb5823, 0x58d978fa, 0xc6d9d236, 0x25de5db8, + 0xbbdef774, 0xa2d7327e, 0x3cd798b2, 0xdfd0173c, 0x41d0bdf0, + 0xc6f32655, 0x58f38c99, 0xbbf40317, 0x25f4a9db, 0x3cfd6cd1, + 0xa2fdc61d, 0x41fa4993, 0xdffae35f, 0x73e8c386, 0xede8694a, + 0x0eefe6c4, 0x90ef4c08, 0x89e68902, 0x17e623ce, 0xf4e1ac40, + 0x6ae1068c, 0xbba0ebd0, 0x25a0411c, 0xc6a7ce92, 0x58a7645e, + 0x41aea154, 0xdfae0b98, 0x3ca98416, 0xa2a92eda, 0x0ebb0e03, + 0x90bba4cf, 0x73bc2b41, 0xedbc818d, 0xf4b54487, 0x6ab5ee4b, + 0x89b261c5, 0x17b2cb09, 0x909150ac, 0x0e91fa60, 0xed9675ee, + 0x7396df22, 0x6a9f1a28, 0xf49fb0e4, 0x17983f6a, 0x899895a6, + 0x258ab57f, 0xbb8a1fb3, 0x588d903d, 0xc68d3af1, 0xdf84fffb, + 0x41845537, 0xa283dab9, 0x3c837075, 0xda853b53, 0x4485919f, + 0xa7821e11, 0x3982b4dd, 0x208b71d7, 0xbe8bdb1b, 0x5d8c5495, + 0xc38cfe59, 0x6f9ede80, 0xf19e744c, 0x1299fbc2, 0x8c99510e, + 0x95909404, 0x0b903ec8, 0xe897b146, 0x76971b8a, 0xf1b4802f, + 0x6fb42ae3, 0x8cb3a56d, 0x12b30fa1, 0x0bbacaab, 0x95ba6067, + 0x76bdefe9, 0xe8bd4525, 0x44af65fc, 0xdaafcf30, 0x39a840be, + 0xa7a8ea72, 0xbea12f78, 0x20a185b4, 0xc3a60a3a, 0x5da6a0f6, + 0x8ce74daa, 0x12e7e766, 0xf1e068e8, 0x6fe0c224, 0x76e9072e, + 0xe8e9ade2, 0x0bee226c, 0x95ee88a0, 0x39fca879, 0xa7fc02b5, + 0x44fb8d3b, 0xdafb27f7, 0xc3f2e2fd, 0x5df24831, 0xbef5c7bf, + 0x20f56d73, 0xa7d6f6d6, 0x39d65c1a, 0xdad1d394, 0x44d17958, + 0x5dd8bc52, 0xc3d8169e, 0x20df9910, 0xbedf33dc, 0x12cd1305, + 0x8ccdb9c9, 0x6fca3647, 0xf1ca9c8b, 0xe8c35981, 0x76c3f34d, + 0x95c47cc3, 0x0bc4d60f, 0x3747a67a, 0xa9470cb6, 0x4a408338, + 0xd44029f4, 0xcd49ecfe, 0x53494632, 0xb04ec9bc, 0x2e4e6370, + 0x825c43a9, 0x1c5ce965, 0xff5b66eb, 0x615bcc27, 0x7852092d, + 0xe652a3e1, 0x05552c6f, 0x9b5586a3, 0x1c761d06, 0x8276b7ca, + 0x61713844, 0xff719288, 0xe6785782, 0x7878fd4e, 0x9b7f72c0, + 0x057fd80c, 0xa96df8d5, 0x376d5219, 0xd46add97, 0x4a6a775b, + 0x5363b251, 0xcd63189d, 0x2e649713, 0xb0643ddf, 0x6125d083, + 0xff257a4f, 0x1c22f5c1, 0x82225f0d, 0x9b2b9a07, 0x052b30cb, + 0xe62cbf45, 0x782c1589, 0xd43e3550, 0x4a3e9f9c, 0xa9391012, + 0x3739bade, 0x2e307fd4, 0xb030d518, 0x53375a96, 0xcd37f05a, + 0x4a146bff, 0xd414c133, 0x37134ebd, 0xa913e471, 0xb01a217b, + 0x2e1a8bb7, 0xcd1d0439, 0x531daef5, 0xff0f8e2c, 0x610f24e0, + 0x8208ab6e, 0x1c0801a2, 0x0501c4a8, 0x9b016e64, 0x7806e1ea, + 0xe6064b26}}; + +#endif + +#endif + +#if N == 3 + +#if W == 8 + +local const z_crc_t FAR crc_braid_table[][256] = { + {0x00000000, 0x81256527, 0xd93bcc0f, 0x581ea928, 0x69069e5f, + 0xe823fb78, 0xb03d5250, 0x31183777, 0xd20d3cbe, 0x53285999, + 0x0b36f0b1, 0x8a139596, 0xbb0ba2e1, 0x3a2ec7c6, 0x62306eee, + 0xe3150bc9, 0x7f6b7f3d, 0xfe4e1a1a, 0xa650b332, 0x2775d615, + 0x166de162, 0x97488445, 0xcf562d6d, 0x4e73484a, 0xad664383, + 0x2c4326a4, 0x745d8f8c, 0xf578eaab, 0xc460dddc, 0x4545b8fb, + 0x1d5b11d3, 0x9c7e74f4, 0xfed6fe7a, 0x7ff39b5d, 0x27ed3275, + 0xa6c85752, 0x97d06025, 0x16f50502, 0x4eebac2a, 0xcfcec90d, + 0x2cdbc2c4, 0xadfea7e3, 0xf5e00ecb, 0x74c56bec, 0x45dd5c9b, + 0xc4f839bc, 0x9ce69094, 0x1dc3f5b3, 0x81bd8147, 0x0098e460, + 0x58864d48, 0xd9a3286f, 0xe8bb1f18, 0x699e7a3f, 0x3180d317, + 0xb0a5b630, 0x53b0bdf9, 0xd295d8de, 0x8a8b71f6, 0x0bae14d1, + 0x3ab623a6, 0xbb934681, 0xe38defa9, 0x62a88a8e, 0x26dcfab5, + 0xa7f99f92, 0xffe736ba, 0x7ec2539d, 0x4fda64ea, 0xceff01cd, + 0x96e1a8e5, 0x17c4cdc2, 0xf4d1c60b, 0x75f4a32c, 0x2dea0a04, + 0xaccf6f23, 0x9dd75854, 0x1cf23d73, 0x44ec945b, 0xc5c9f17c, + 0x59b78588, 0xd892e0af, 0x808c4987, 0x01a92ca0, 0x30b11bd7, + 0xb1947ef0, 0xe98ad7d8, 0x68afb2ff, 0x8bbab936, 0x0a9fdc11, + 0x52817539, 0xd3a4101e, 0xe2bc2769, 0x6399424e, 0x3b87eb66, + 0xbaa28e41, 0xd80a04cf, 0x592f61e8, 0x0131c8c0, 0x8014ade7, + 0xb10c9a90, 0x3029ffb7, 0x6837569f, 0xe91233b8, 0x0a073871, + 0x8b225d56, 0xd33cf47e, 0x52199159, 0x6301a62e, 0xe224c309, + 0xba3a6a21, 0x3b1f0f06, 0xa7617bf2, 0x26441ed5, 0x7e5ab7fd, + 0xff7fd2da, 0xce67e5ad, 0x4f42808a, 0x175c29a2, 0x96794c85, + 0x756c474c, 0xf449226b, 0xac578b43, 0x2d72ee64, 0x1c6ad913, + 0x9d4fbc34, 0xc551151c, 0x4474703b, 0x4db9f56a, 0xcc9c904d, + 0x94823965, 0x15a75c42, 0x24bf6b35, 0xa59a0e12, 0xfd84a73a, + 0x7ca1c21d, 0x9fb4c9d4, 0x1e91acf3, 0x468f05db, 0xc7aa60fc, + 0xf6b2578b, 0x779732ac, 0x2f899b84, 0xaeacfea3, 0x32d28a57, + 0xb3f7ef70, 0xebe94658, 0x6acc237f, 0x5bd41408, 0xdaf1712f, + 0x82efd807, 0x03cabd20, 0xe0dfb6e9, 0x61fad3ce, 0x39e47ae6, + 0xb8c11fc1, 0x89d928b6, 0x08fc4d91, 0x50e2e4b9, 0xd1c7819e, + 0xb36f0b10, 0x324a6e37, 0x6a54c71f, 0xeb71a238, 0xda69954f, + 0x5b4cf068, 0x03525940, 0x82773c67, 0x616237ae, 0xe0475289, + 0xb859fba1, 0x397c9e86, 0x0864a9f1, 0x8941ccd6, 0xd15f65fe, + 0x507a00d9, 0xcc04742d, 0x4d21110a, 0x153fb822, 0x941add05, + 0xa502ea72, 0x24278f55, 0x7c39267d, 0xfd1c435a, 0x1e094893, + 0x9f2c2db4, 0xc732849c, 0x4617e1bb, 0x770fd6cc, 0xf62ab3eb, + 0xae341ac3, 0x2f117fe4, 0x6b650fdf, 0xea406af8, 0xb25ec3d0, + 0x337ba6f7, 0x02639180, 0x8346f4a7, 0xdb585d8f, 0x5a7d38a8, + 0xb9683361, 0x384d5646, 0x6053ff6e, 0xe1769a49, 0xd06ead3e, + 0x514bc819, 0x09556131, 0x88700416, 0x140e70e2, 0x952b15c5, + 0xcd35bced, 0x4c10d9ca, 0x7d08eebd, 0xfc2d8b9a, 0xa43322b2, + 0x25164795, 0xc6034c5c, 0x4726297b, 0x1f388053, 0x9e1de574, + 0xaf05d203, 0x2e20b724, 0x763e1e0c, 0xf71b7b2b, 0x95b3f1a5, + 0x14969482, 0x4c883daa, 0xcdad588d, 0xfcb56ffa, 0x7d900add, + 0x258ea3f5, 0xa4abc6d2, 0x47becd1b, 0xc69ba83c, 0x9e850114, + 0x1fa06433, 0x2eb85344, 0xaf9d3663, 0xf7839f4b, 0x76a6fa6c, + 0xead88e98, 0x6bfdebbf, 0x33e34297, 0xb2c627b0, 0x83de10c7, + 0x02fb75e0, 0x5ae5dcc8, 0xdbc0b9ef, 0x38d5b226, 0xb9f0d701, + 0xe1ee7e29, 0x60cb1b0e, 0x51d32c79, 0xd0f6495e, 0x88e8e076, + 0x09cd8551}, + {0x00000000, 0x9b73ead4, 0xed96d3e9, 0x76e5393d, 0x005ca193, + 0x9b2f4b47, 0xedca727a, 0x76b998ae, 0x00b94326, 0x9bcaa9f2, + 0xed2f90cf, 0x765c7a1b, 0x00e5e2b5, 0x9b960861, 0xed73315c, + 0x7600db88, 0x0172864c, 0x9a016c98, 0xece455a5, 0x7797bf71, + 0x012e27df, 0x9a5dcd0b, 0xecb8f436, 0x77cb1ee2, 0x01cbc56a, + 0x9ab82fbe, 0xec5d1683, 0x772efc57, 0x019764f9, 0x9ae48e2d, + 0xec01b710, 0x77725dc4, 0x02e50c98, 0x9996e64c, 0xef73df71, + 0x740035a5, 0x02b9ad0b, 0x99ca47df, 0xef2f7ee2, 0x745c9436, + 0x025c4fbe, 0x992fa56a, 0xefca9c57, 0x74b97683, 0x0200ee2d, + 0x997304f9, 0xef963dc4, 0x74e5d710, 0x03978ad4, 0x98e46000, + 0xee01593d, 0x7572b3e9, 0x03cb2b47, 0x98b8c193, 0xee5df8ae, + 0x752e127a, 0x032ec9f2, 0x985d2326, 0xeeb81a1b, 0x75cbf0cf, + 0x03726861, 0x980182b5, 0xeee4bb88, 0x7597515c, 0x05ca1930, + 0x9eb9f3e4, 0xe85ccad9, 0x732f200d, 0x0596b8a3, 0x9ee55277, + 0xe8006b4a, 0x7373819e, 0x05735a16, 0x9e00b0c2, 0xe8e589ff, + 0x7396632b, 0x052ffb85, 0x9e5c1151, 0xe8b9286c, 0x73cac2b8, + 0x04b89f7c, 0x9fcb75a8, 0xe92e4c95, 0x725da641, 0x04e43eef, + 0x9f97d43b, 0xe972ed06, 0x720107d2, 0x0401dc5a, 0x9f72368e, + 0xe9970fb3, 0x72e4e567, 0x045d7dc9, 0x9f2e971d, 0xe9cbae20, + 0x72b844f4, 0x072f15a8, 0x9c5cff7c, 0xeab9c641, 0x71ca2c95, + 0x0773b43b, 0x9c005eef, 0xeae567d2, 0x71968d06, 0x0796568e, + 0x9ce5bc5a, 0xea008567, 0x71736fb3, 0x07caf71d, 0x9cb91dc9, + 0xea5c24f4, 0x712fce20, 0x065d93e4, 0x9d2e7930, 0xebcb400d, + 0x70b8aad9, 0x06013277, 0x9d72d8a3, 0xeb97e19e, 0x70e40b4a, + 0x06e4d0c2, 0x9d973a16, 0xeb72032b, 0x7001e9ff, 0x06b87151, + 0x9dcb9b85, 0xeb2ea2b8, 0x705d486c, 0x0b943260, 0x90e7d8b4, + 0xe602e189, 0x7d710b5d, 0x0bc893f3, 0x90bb7927, 0xe65e401a, + 0x7d2daace, 0x0b2d7146, 0x905e9b92, 0xe6bba2af, 0x7dc8487b, + 0x0b71d0d5, 0x90023a01, 0xe6e7033c, 0x7d94e9e8, 0x0ae6b42c, + 0x91955ef8, 0xe77067c5, 0x7c038d11, 0x0aba15bf, 0x91c9ff6b, + 0xe72cc656, 0x7c5f2c82, 0x0a5ff70a, 0x912c1dde, 0xe7c924e3, + 0x7cbace37, 0x0a035699, 0x9170bc4d, 0xe7958570, 0x7ce66fa4, + 0x09713ef8, 0x9202d42c, 0xe4e7ed11, 0x7f9407c5, 0x092d9f6b, + 0x925e75bf, 0xe4bb4c82, 0x7fc8a656, 0x09c87dde, 0x92bb970a, + 0xe45eae37, 0x7f2d44e3, 0x0994dc4d, 0x92e73699, 0xe4020fa4, + 0x7f71e570, 0x0803b8b4, 0x93705260, 0xe5956b5d, 0x7ee68189, + 0x085f1927, 0x932cf3f3, 0xe5c9cace, 0x7eba201a, 0x08bafb92, + 0x93c91146, 0xe52c287b, 0x7e5fc2af, 0x08e65a01, 0x9395b0d5, + 0xe57089e8, 0x7e03633c, 0x0e5e2b50, 0x952dc184, 0xe3c8f8b9, + 0x78bb126d, 0x0e028ac3, 0x95716017, 0xe394592a, 0x78e7b3fe, + 0x0ee76876, 0x959482a2, 0xe371bb9f, 0x7802514b, 0x0ebbc9e5, + 0x95c82331, 0xe32d1a0c, 0x785ef0d8, 0x0f2cad1c, 0x945f47c8, + 0xe2ba7ef5, 0x79c99421, 0x0f700c8f, 0x9403e65b, 0xe2e6df66, + 0x799535b2, 0x0f95ee3a, 0x94e604ee, 0xe2033dd3, 0x7970d707, + 0x0fc94fa9, 0x94baa57d, 0xe25f9c40, 0x792c7694, 0x0cbb27c8, + 0x97c8cd1c, 0xe12df421, 0x7a5e1ef5, 0x0ce7865b, 0x97946c8f, + 0xe17155b2, 0x7a02bf66, 0x0c0264ee, 0x97718e3a, 0xe194b707, + 0x7ae75dd3, 0x0c5ec57d, 0x972d2fa9, 0xe1c81694, 0x7abbfc40, + 0x0dc9a184, 0x96ba4b50, 0xe05f726d, 0x7b2c98b9, 0x0d950017, + 0x96e6eac3, 0xe003d3fe, 0x7b70392a, 0x0d70e2a2, 0x96030876, + 0xe0e6314b, 0x7b95db9f, 0x0d2c4331, 0x965fa9e5, 0xe0ba90d8, + 0x7bc97a0c}, + {0x00000000, 0x172864c0, 0x2e50c980, 0x3978ad40, 0x5ca19300, + 0x4b89f7c0, 0x72f15a80, 0x65d93e40, 0xb9432600, 0xae6b42c0, + 0x9713ef80, 0x803b8b40, 0xe5e2b500, 0xf2cad1c0, 0xcbb27c80, + 0xdc9a1840, 0xa9f74a41, 0xbedf2e81, 0x87a783c1, 0x908fe701, + 0xf556d941, 0xe27ebd81, 0xdb0610c1, 0xcc2e7401, 0x10b46c41, + 0x079c0881, 0x3ee4a5c1, 0x29ccc101, 0x4c15ff41, 0x5b3d9b81, + 0x624536c1, 0x756d5201, 0x889f92c3, 0x9fb7f603, 0xa6cf5b43, + 0xb1e73f83, 0xd43e01c3, 0xc3166503, 0xfa6ec843, 0xed46ac83, + 0x31dcb4c3, 0x26f4d003, 0x1f8c7d43, 0x08a41983, 0x6d7d27c3, + 0x7a554303, 0x432dee43, 0x54058a83, 0x2168d882, 0x3640bc42, + 0x0f381102, 0x181075c2, 0x7dc94b82, 0x6ae12f42, 0x53998202, + 0x44b1e6c2, 0x982bfe82, 0x8f039a42, 0xb67b3702, 0xa15353c2, + 0xc48a6d82, 0xd3a20942, 0xeadaa402, 0xfdf2c0c2, 0xca4e23c7, + 0xdd664707, 0xe41eea47, 0xf3368e87, 0x96efb0c7, 0x81c7d407, + 0xb8bf7947, 0xaf971d87, 0x730d05c7, 0x64256107, 0x5d5dcc47, + 0x4a75a887, 0x2fac96c7, 0x3884f207, 0x01fc5f47, 0x16d43b87, + 0x63b96986, 0x74910d46, 0x4de9a006, 0x5ac1c4c6, 0x3f18fa86, + 0x28309e46, 0x11483306, 0x066057c6, 0xdafa4f86, 0xcdd22b46, + 0xf4aa8606, 0xe382e2c6, 0x865bdc86, 0x9173b846, 0xa80b1506, + 0xbf2371c6, 0x42d1b104, 0x55f9d5c4, 0x6c817884, 0x7ba91c44, + 0x1e702204, 0x095846c4, 0x3020eb84, 0x27088f44, 0xfb929704, + 0xecbaf3c4, 0xd5c25e84, 0xc2ea3a44, 0xa7330404, 0xb01b60c4, + 0x8963cd84, 0x9e4ba944, 0xeb26fb45, 0xfc0e9f85, 0xc57632c5, + 0xd25e5605, 0xb7876845, 0xa0af0c85, 0x99d7a1c5, 0x8effc505, + 0x5265dd45, 0x454db985, 0x7c3514c5, 0x6b1d7005, 0x0ec44e45, + 0x19ec2a85, 0x209487c5, 0x37bce305, 0x4fed41cf, 0x58c5250f, + 0x61bd884f, 0x7695ec8f, 0x134cd2cf, 0x0464b60f, 0x3d1c1b4f, + 0x2a347f8f, 0xf6ae67cf, 0xe186030f, 0xd8feae4f, 0xcfd6ca8f, + 0xaa0ff4cf, 0xbd27900f, 0x845f3d4f, 0x9377598f, 0xe61a0b8e, + 0xf1326f4e, 0xc84ac20e, 0xdf62a6ce, 0xbabb988e, 0xad93fc4e, + 0x94eb510e, 0x83c335ce, 0x5f592d8e, 0x4871494e, 0x7109e40e, + 0x662180ce, 0x03f8be8e, 0x14d0da4e, 0x2da8770e, 0x3a8013ce, + 0xc772d30c, 0xd05ab7cc, 0xe9221a8c, 0xfe0a7e4c, 0x9bd3400c, + 0x8cfb24cc, 0xb583898c, 0xa2abed4c, 0x7e31f50c, 0x691991cc, + 0x50613c8c, 0x4749584c, 0x2290660c, 0x35b802cc, 0x0cc0af8c, + 0x1be8cb4c, 0x6e85994d, 0x79adfd8d, 0x40d550cd, 0x57fd340d, + 0x32240a4d, 0x250c6e8d, 0x1c74c3cd, 0x0b5ca70d, 0xd7c6bf4d, + 0xc0eedb8d, 0xf99676cd, 0xeebe120d, 0x8b672c4d, 0x9c4f488d, + 0xa537e5cd, 0xb21f810d, 0x85a36208, 0x928b06c8, 0xabf3ab88, + 0xbcdbcf48, 0xd902f108, 0xce2a95c8, 0xf7523888, 0xe07a5c48, + 0x3ce04408, 0x2bc820c8, 0x12b08d88, 0x0598e948, 0x6041d708, + 0x7769b3c8, 0x4e111e88, 0x59397a48, 0x2c542849, 0x3b7c4c89, + 0x0204e1c9, 0x152c8509, 0x70f5bb49, 0x67dddf89, 0x5ea572c9, + 0x498d1609, 0x95170e49, 0x823f6a89, 0xbb47c7c9, 0xac6fa309, + 0xc9b69d49, 0xde9ef989, 0xe7e654c9, 0xf0ce3009, 0x0d3cf0cb, + 0x1a14940b, 0x236c394b, 0x34445d8b, 0x519d63cb, 0x46b5070b, + 0x7fcdaa4b, 0x68e5ce8b, 0xb47fd6cb, 0xa357b20b, 0x9a2f1f4b, + 0x8d077b8b, 0xe8de45cb, 0xfff6210b, 0xc68e8c4b, 0xd1a6e88b, + 0xa4cbba8a, 0xb3e3de4a, 0x8a9b730a, 0x9db317ca, 0xf86a298a, + 0xef424d4a, 0xd63ae00a, 0xc11284ca, 0x1d889c8a, 0x0aa0f84a, + 0x33d8550a, 0x24f031ca, 0x41290f8a, 0x56016b4a, 0x6f79c60a, + 0x7851a2ca}, + {0x00000000, 0x9fda839e, 0xe4c4017d, 0x7b1e82e3, 0x12f904bb, + 0x8d238725, 0xf63d05c6, 0x69e78658, 0x25f20976, 0xba288ae8, + 0xc136080b, 0x5eec8b95, 0x370b0dcd, 0xa8d18e53, 0xd3cf0cb0, + 0x4c158f2e, 0x4be412ec, 0xd43e9172, 0xaf201391, 0x30fa900f, + 0x591d1657, 0xc6c795c9, 0xbdd9172a, 0x220394b4, 0x6e161b9a, + 0xf1cc9804, 0x8ad21ae7, 0x15089979, 0x7cef1f21, 0xe3359cbf, + 0x982b1e5c, 0x07f19dc2, 0x97c825d8, 0x0812a646, 0x730c24a5, + 0xecd6a73b, 0x85312163, 0x1aeba2fd, 0x61f5201e, 0xfe2fa380, + 0xb23a2cae, 0x2de0af30, 0x56fe2dd3, 0xc924ae4d, 0xa0c32815, + 0x3f19ab8b, 0x44072968, 0xdbddaaf6, 0xdc2c3734, 0x43f6b4aa, + 0x38e83649, 0xa732b5d7, 0xced5338f, 0x510fb011, 0x2a1132f2, + 0xb5cbb16c, 0xf9de3e42, 0x6604bddc, 0x1d1a3f3f, 0x82c0bca1, + 0xeb273af9, 0x74fdb967, 0x0fe33b84, 0x9039b81a, 0xf4e14df1, + 0x6b3bce6f, 0x10254c8c, 0x8fffcf12, 0xe618494a, 0x79c2cad4, + 0x02dc4837, 0x9d06cba9, 0xd1134487, 0x4ec9c719, 0x35d745fa, + 0xaa0dc664, 0xc3ea403c, 0x5c30c3a2, 0x272e4141, 0xb8f4c2df, + 0xbf055f1d, 0x20dfdc83, 0x5bc15e60, 0xc41bddfe, 0xadfc5ba6, + 0x3226d838, 0x49385adb, 0xd6e2d945, 0x9af7566b, 0x052dd5f5, + 0x7e335716, 0xe1e9d488, 0x880e52d0, 0x17d4d14e, 0x6cca53ad, + 0xf310d033, 0x63296829, 0xfcf3ebb7, 0x87ed6954, 0x1837eaca, + 0x71d06c92, 0xee0aef0c, 0x95146def, 0x0aceee71, 0x46db615f, + 0xd901e2c1, 0xa21f6022, 0x3dc5e3bc, 0x542265e4, 0xcbf8e67a, + 0xb0e66499, 0x2f3ce707, 0x28cd7ac5, 0xb717f95b, 0xcc097bb8, + 0x53d3f826, 0x3a347e7e, 0xa5eefde0, 0xdef07f03, 0x412afc9d, + 0x0d3f73b3, 0x92e5f02d, 0xe9fb72ce, 0x7621f150, 0x1fc67708, + 0x801cf496, 0xfb027675, 0x64d8f5eb, 0x32b39da3, 0xad691e3d, + 0xd6779cde, 0x49ad1f40, 0x204a9918, 0xbf901a86, 0xc48e9865, + 0x5b541bfb, 0x174194d5, 0x889b174b, 0xf38595a8, 0x6c5f1636, + 0x05b8906e, 0x9a6213f0, 0xe17c9113, 0x7ea6128d, 0x79578f4f, + 0xe68d0cd1, 0x9d938e32, 0x02490dac, 0x6bae8bf4, 0xf474086a, + 0x8f6a8a89, 0x10b00917, 0x5ca58639, 0xc37f05a7, 0xb8618744, + 0x27bb04da, 0x4e5c8282, 0xd186011c, 0xaa9883ff, 0x35420061, + 0xa57bb87b, 0x3aa13be5, 0x41bfb906, 0xde653a98, 0xb782bcc0, + 0x28583f5e, 0x5346bdbd, 0xcc9c3e23, 0x8089b10d, 0x1f533293, + 0x644db070, 0xfb9733ee, 0x9270b5b6, 0x0daa3628, 0x76b4b4cb, + 0xe96e3755, 0xee9faa97, 0x71452909, 0x0a5babea, 0x95812874, + 0xfc66ae2c, 0x63bc2db2, 0x18a2af51, 0x87782ccf, 0xcb6da3e1, + 0x54b7207f, 0x2fa9a29c, 0xb0732102, 0xd994a75a, 0x464e24c4, + 0x3d50a627, 0xa28a25b9, 0xc652d052, 0x598853cc, 0x2296d12f, + 0xbd4c52b1, 0xd4abd4e9, 0x4b715777, 0x306fd594, 0xafb5560a, + 0xe3a0d924, 0x7c7a5aba, 0x0764d859, 0x98be5bc7, 0xf159dd9f, + 0x6e835e01, 0x159ddce2, 0x8a475f7c, 0x8db6c2be, 0x126c4120, + 0x6972c3c3, 0xf6a8405d, 0x9f4fc605, 0x0095459b, 0x7b8bc778, + 0xe45144e6, 0xa844cbc8, 0x379e4856, 0x4c80cab5, 0xd35a492b, + 0xbabdcf73, 0x25674ced, 0x5e79ce0e, 0xc1a34d90, 0x519af58a, + 0xce407614, 0xb55ef4f7, 0x2a847769, 0x4363f131, 0xdcb972af, + 0xa7a7f04c, 0x387d73d2, 0x7468fcfc, 0xebb27f62, 0x90acfd81, + 0x0f767e1f, 0x6691f847, 0xf94b7bd9, 0x8255f93a, 0x1d8f7aa4, + 0x1a7ee766, 0x85a464f8, 0xfebae61b, 0x61606585, 0x0887e3dd, + 0x975d6043, 0xec43e2a0, 0x7399613e, 0x3f8cee10, 0xa0566d8e, + 0xdb48ef6d, 0x44926cf3, 0x2d75eaab, 0xb2af6935, 0xc9b1ebd6, + 0x566b6848}, + {0x00000000, 0x65673b46, 0xcace768c, 0xafa94dca, 0x4eedeb59, + 0x2b8ad01f, 0x84239dd5, 0xe144a693, 0x9ddbd6b2, 0xf8bcedf4, + 0x5715a03e, 0x32729b78, 0xd3363deb, 0xb65106ad, 0x19f84b67, + 0x7c9f7021, 0xe0c6ab25, 0x85a19063, 0x2a08dda9, 0x4f6fe6ef, + 0xae2b407c, 0xcb4c7b3a, 0x64e536f0, 0x01820db6, 0x7d1d7d97, + 0x187a46d1, 0xb7d30b1b, 0xd2b4305d, 0x33f096ce, 0x5697ad88, + 0xf93ee042, 0x9c59db04, 0x1afc500b, 0x7f9b6b4d, 0xd0322687, + 0xb5551dc1, 0x5411bb52, 0x31768014, 0x9edfcdde, 0xfbb8f698, + 0x872786b9, 0xe240bdff, 0x4de9f035, 0x288ecb73, 0xc9ca6de0, + 0xacad56a6, 0x03041b6c, 0x6663202a, 0xfa3afb2e, 0x9f5dc068, + 0x30f48da2, 0x5593b6e4, 0xb4d71077, 0xd1b02b31, 0x7e1966fb, + 0x1b7e5dbd, 0x67e12d9c, 0x028616da, 0xad2f5b10, 0xc8486056, + 0x290cc6c5, 0x4c6bfd83, 0xe3c2b049, 0x86a58b0f, 0x35f8a016, + 0x509f9b50, 0xff36d69a, 0x9a51eddc, 0x7b154b4f, 0x1e727009, + 0xb1db3dc3, 0xd4bc0685, 0xa82376a4, 0xcd444de2, 0x62ed0028, + 0x078a3b6e, 0xe6ce9dfd, 0x83a9a6bb, 0x2c00eb71, 0x4967d037, + 0xd53e0b33, 0xb0593075, 0x1ff07dbf, 0x7a9746f9, 0x9bd3e06a, + 0xfeb4db2c, 0x511d96e6, 0x347aada0, 0x48e5dd81, 0x2d82e6c7, + 0x822bab0d, 0xe74c904b, 0x060836d8, 0x636f0d9e, 0xccc64054, + 0xa9a17b12, 0x2f04f01d, 0x4a63cb5b, 0xe5ca8691, 0x80adbdd7, + 0x61e91b44, 0x048e2002, 0xab276dc8, 0xce40568e, 0xb2df26af, + 0xd7b81de9, 0x78115023, 0x1d766b65, 0xfc32cdf6, 0x9955f6b0, + 0x36fcbb7a, 0x539b803c, 0xcfc25b38, 0xaaa5607e, 0x050c2db4, + 0x606b16f2, 0x812fb061, 0xe4488b27, 0x4be1c6ed, 0x2e86fdab, + 0x52198d8a, 0x377eb6cc, 0x98d7fb06, 0xfdb0c040, 0x1cf466d3, + 0x79935d95, 0xd63a105f, 0xb35d2b19, 0x6bf1402c, 0x0e967b6a, + 0xa13f36a0, 0xc4580de6, 0x251cab75, 0x407b9033, 0xefd2ddf9, + 0x8ab5e6bf, 0xf62a969e, 0x934dadd8, 0x3ce4e012, 0x5983db54, + 0xb8c77dc7, 0xdda04681, 0x72090b4b, 0x176e300d, 0x8b37eb09, + 0xee50d04f, 0x41f99d85, 0x249ea6c3, 0xc5da0050, 0xa0bd3b16, + 0x0f1476dc, 0x6a734d9a, 0x16ec3dbb, 0x738b06fd, 0xdc224b37, + 0xb9457071, 0x5801d6e2, 0x3d66eda4, 0x92cfa06e, 0xf7a89b28, + 0x710d1027, 0x146a2b61, 0xbbc366ab, 0xdea45ded, 0x3fe0fb7e, + 0x5a87c038, 0xf52e8df2, 0x9049b6b4, 0xecd6c695, 0x89b1fdd3, + 0x2618b019, 0x437f8b5f, 0xa23b2dcc, 0xc75c168a, 0x68f55b40, + 0x0d926006, 0x91cbbb02, 0xf4ac8044, 0x5b05cd8e, 0x3e62f6c8, + 0xdf26505b, 0xba416b1d, 0x15e826d7, 0x708f1d91, 0x0c106db0, + 0x697756f6, 0xc6de1b3c, 0xa3b9207a, 0x42fd86e9, 0x279abdaf, + 0x8833f065, 0xed54cb23, 0x5e09e03a, 0x3b6edb7c, 0x94c796b6, + 0xf1a0adf0, 0x10e40b63, 0x75833025, 0xda2a7def, 0xbf4d46a9, + 0xc3d23688, 0xa6b50dce, 0x091c4004, 0x6c7b7b42, 0x8d3fddd1, + 0xe858e697, 0x47f1ab5d, 0x2296901b, 0xbecf4b1f, 0xdba87059, + 0x74013d93, 0x116606d5, 0xf022a046, 0x95459b00, 0x3aecd6ca, + 0x5f8bed8c, 0x23149dad, 0x4673a6eb, 0xe9daeb21, 0x8cbdd067, + 0x6df976f4, 0x089e4db2, 0xa7370078, 0xc2503b3e, 0x44f5b031, + 0x21928b77, 0x8e3bc6bd, 0xeb5cfdfb, 0x0a185b68, 0x6f7f602e, + 0xc0d62de4, 0xa5b116a2, 0xd92e6683, 0xbc495dc5, 0x13e0100f, + 0x76872b49, 0x97c38dda, 0xf2a4b69c, 0x5d0dfb56, 0x386ac010, + 0xa4331b14, 0xc1542052, 0x6efd6d98, 0x0b9a56de, 0xeadef04d, + 0x8fb9cb0b, 0x201086c1, 0x4577bd87, 0x39e8cda6, 0x5c8ff6e0, + 0xf326bb2a, 0x9641806c, 0x770526ff, 0x12621db9, 0xbdcb5073, + 0xd8ac6b35}, + {0x00000000, 0xd7e28058, 0x74b406f1, 0xa35686a9, 0xe9680de2, + 0x3e8a8dba, 0x9ddc0b13, 0x4a3e8b4b, 0x09a11d85, 0xde439ddd, + 0x7d151b74, 0xaaf79b2c, 0xe0c91067, 0x372b903f, 0x947d1696, + 0x439f96ce, 0x13423b0a, 0xc4a0bb52, 0x67f63dfb, 0xb014bda3, + 0xfa2a36e8, 0x2dc8b6b0, 0x8e9e3019, 0x597cb041, 0x1ae3268f, + 0xcd01a6d7, 0x6e57207e, 0xb9b5a026, 0xf38b2b6d, 0x2469ab35, + 0x873f2d9c, 0x50ddadc4, 0x26847614, 0xf166f64c, 0x523070e5, + 0x85d2f0bd, 0xcfec7bf6, 0x180efbae, 0xbb587d07, 0x6cbafd5f, + 0x2f256b91, 0xf8c7ebc9, 0x5b916d60, 0x8c73ed38, 0xc64d6673, + 0x11afe62b, 0xb2f96082, 0x651be0da, 0x35c64d1e, 0xe224cd46, + 0x41724bef, 0x9690cbb7, 0xdcae40fc, 0x0b4cc0a4, 0xa81a460d, + 0x7ff8c655, 0x3c67509b, 0xeb85d0c3, 0x48d3566a, 0x9f31d632, + 0xd50f5d79, 0x02eddd21, 0xa1bb5b88, 0x7659dbd0, 0x4d08ec28, + 0x9aea6c70, 0x39bcead9, 0xee5e6a81, 0xa460e1ca, 0x73826192, + 0xd0d4e73b, 0x07366763, 0x44a9f1ad, 0x934b71f5, 0x301df75c, + 0xe7ff7704, 0xadc1fc4f, 0x7a237c17, 0xd975fabe, 0x0e977ae6, + 0x5e4ad722, 0x89a8577a, 0x2afed1d3, 0xfd1c518b, 0xb722dac0, + 0x60c05a98, 0xc396dc31, 0x14745c69, 0x57ebcaa7, 0x80094aff, + 0x235fcc56, 0xf4bd4c0e, 0xbe83c745, 0x6961471d, 0xca37c1b4, + 0x1dd541ec, 0x6b8c9a3c, 0xbc6e1a64, 0x1f389ccd, 0xc8da1c95, + 0x82e497de, 0x55061786, 0xf650912f, 0x21b21177, 0x622d87b9, + 0xb5cf07e1, 0x16998148, 0xc17b0110, 0x8b458a5b, 0x5ca70a03, + 0xfff18caa, 0x28130cf2, 0x78cea136, 0xaf2c216e, 0x0c7aa7c7, + 0xdb98279f, 0x91a6acd4, 0x46442c8c, 0xe512aa25, 0x32f02a7d, + 0x716fbcb3, 0xa68d3ceb, 0x05dbba42, 0xd2393a1a, 0x9807b151, + 0x4fe53109, 0xecb3b7a0, 0x3b5137f8, 0x9a11d850, 0x4df35808, + 0xeea5dea1, 0x39475ef9, 0x7379d5b2, 0xa49b55ea, 0x07cdd343, + 0xd02f531b, 0x93b0c5d5, 0x4452458d, 0xe704c324, 0x30e6437c, + 0x7ad8c837, 0xad3a486f, 0x0e6ccec6, 0xd98e4e9e, 0x8953e35a, + 0x5eb16302, 0xfde7e5ab, 0x2a0565f3, 0x603beeb8, 0xb7d96ee0, + 0x148fe849, 0xc36d6811, 0x80f2fedf, 0x57107e87, 0xf446f82e, + 0x23a47876, 0x699af33d, 0xbe787365, 0x1d2ef5cc, 0xcacc7594, + 0xbc95ae44, 0x6b772e1c, 0xc821a8b5, 0x1fc328ed, 0x55fda3a6, + 0x821f23fe, 0x2149a557, 0xf6ab250f, 0xb534b3c1, 0x62d63399, + 0xc180b530, 0x16623568, 0x5c5cbe23, 0x8bbe3e7b, 0x28e8b8d2, + 0xff0a388a, 0xafd7954e, 0x78351516, 0xdb6393bf, 0x0c8113e7, + 0x46bf98ac, 0x915d18f4, 0x320b9e5d, 0xe5e91e05, 0xa67688cb, + 0x71940893, 0xd2c28e3a, 0x05200e62, 0x4f1e8529, 0x98fc0571, + 0x3baa83d8, 0xec480380, 0xd7193478, 0x00fbb420, 0xa3ad3289, + 0x744fb2d1, 0x3e71399a, 0xe993b9c2, 0x4ac53f6b, 0x9d27bf33, + 0xdeb829fd, 0x095aa9a5, 0xaa0c2f0c, 0x7deeaf54, 0x37d0241f, + 0xe032a447, 0x436422ee, 0x9486a2b6, 0xc45b0f72, 0x13b98f2a, + 0xb0ef0983, 0x670d89db, 0x2d330290, 0xfad182c8, 0x59870461, + 0x8e658439, 0xcdfa12f7, 0x1a1892af, 0xb94e1406, 0x6eac945e, + 0x24921f15, 0xf3709f4d, 0x502619e4, 0x87c499bc, 0xf19d426c, + 0x267fc234, 0x8529449d, 0x52cbc4c5, 0x18f54f8e, 0xcf17cfd6, + 0x6c41497f, 0xbba3c927, 0xf83c5fe9, 0x2fdedfb1, 0x8c885918, + 0x5b6ad940, 0x1154520b, 0xc6b6d253, 0x65e054fa, 0xb202d4a2, + 0xe2df7966, 0x353df93e, 0x966b7f97, 0x4189ffcf, 0x0bb77484, + 0xdc55f4dc, 0x7f037275, 0xa8e1f22d, 0xeb7e64e3, 0x3c9ce4bb, + 0x9fca6212, 0x4828e24a, 0x02166901, 0xd5f4e959, 0x76a26ff0, + 0xa140efa8}, + {0x00000000, 0xef52b6e1, 0x05d46b83, 0xea86dd62, 0x0ba8d706, + 0xe4fa61e7, 0x0e7cbc85, 0xe12e0a64, 0x1751ae0c, 0xf80318ed, + 0x1285c58f, 0xfdd7736e, 0x1cf9790a, 0xf3abcfeb, 0x192d1289, + 0xf67fa468, 0x2ea35c18, 0xc1f1eaf9, 0x2b77379b, 0xc425817a, + 0x250b8b1e, 0xca593dff, 0x20dfe09d, 0xcf8d567c, 0x39f2f214, + 0xd6a044f5, 0x3c269997, 0xd3742f76, 0x325a2512, 0xdd0893f3, + 0x378e4e91, 0xd8dcf870, 0x5d46b830, 0xb2140ed1, 0x5892d3b3, + 0xb7c06552, 0x56ee6f36, 0xb9bcd9d7, 0x533a04b5, 0xbc68b254, + 0x4a17163c, 0xa545a0dd, 0x4fc37dbf, 0xa091cb5e, 0x41bfc13a, + 0xaeed77db, 0x446baab9, 0xab391c58, 0x73e5e428, 0x9cb752c9, + 0x76318fab, 0x9963394a, 0x784d332e, 0x971f85cf, 0x7d9958ad, + 0x92cbee4c, 0x64b44a24, 0x8be6fcc5, 0x616021a7, 0x8e329746, + 0x6f1c9d22, 0x804e2bc3, 0x6ac8f6a1, 0x859a4040, 0xba8d7060, + 0x55dfc681, 0xbf591be3, 0x500bad02, 0xb125a766, 0x5e771187, + 0xb4f1cce5, 0x5ba37a04, 0xaddcde6c, 0x428e688d, 0xa808b5ef, + 0x475a030e, 0xa674096a, 0x4926bf8b, 0xa3a062e9, 0x4cf2d408, + 0x942e2c78, 0x7b7c9a99, 0x91fa47fb, 0x7ea8f11a, 0x9f86fb7e, + 0x70d44d9f, 0x9a5290fd, 0x7500261c, 0x837f8274, 0x6c2d3495, + 0x86abe9f7, 0x69f95f16, 0x88d75572, 0x6785e393, 0x8d033ef1, + 0x62518810, 0xe7cbc850, 0x08997eb1, 0xe21fa3d3, 0x0d4d1532, + 0xec631f56, 0x0331a9b7, 0xe9b774d5, 0x06e5c234, 0xf09a665c, + 0x1fc8d0bd, 0xf54e0ddf, 0x1a1cbb3e, 0xfb32b15a, 0x146007bb, + 0xfee6dad9, 0x11b46c38, 0xc9689448, 0x263a22a9, 0xccbcffcb, + 0x23ee492a, 0xc2c0434e, 0x2d92f5af, 0xc71428cd, 0x28469e2c, + 0xde393a44, 0x316b8ca5, 0xdbed51c7, 0x34bfe726, 0xd591ed42, + 0x3ac35ba3, 0xd04586c1, 0x3f173020, 0xae6be681, 0x41395060, + 0xabbf8d02, 0x44ed3be3, 0xa5c33187, 0x4a918766, 0xa0175a04, + 0x4f45ece5, 0xb93a488d, 0x5668fe6c, 0xbcee230e, 0x53bc95ef, + 0xb2929f8b, 0x5dc0296a, 0xb746f408, 0x581442e9, 0x80c8ba99, + 0x6f9a0c78, 0x851cd11a, 0x6a4e67fb, 0x8b606d9f, 0x6432db7e, + 0x8eb4061c, 0x61e6b0fd, 0x97991495, 0x78cba274, 0x924d7f16, + 0x7d1fc9f7, 0x9c31c393, 0x73637572, 0x99e5a810, 0x76b71ef1, + 0xf32d5eb1, 0x1c7fe850, 0xf6f93532, 0x19ab83d3, 0xf88589b7, + 0x17d73f56, 0xfd51e234, 0x120354d5, 0xe47cf0bd, 0x0b2e465c, + 0xe1a89b3e, 0x0efa2ddf, 0xefd427bb, 0x0086915a, 0xea004c38, + 0x0552fad9, 0xdd8e02a9, 0x32dcb448, 0xd85a692a, 0x3708dfcb, + 0xd626d5af, 0x3974634e, 0xd3f2be2c, 0x3ca008cd, 0xcadfaca5, + 0x258d1a44, 0xcf0bc726, 0x205971c7, 0xc1777ba3, 0x2e25cd42, + 0xc4a31020, 0x2bf1a6c1, 0x14e696e1, 0xfbb42000, 0x1132fd62, + 0xfe604b83, 0x1f4e41e7, 0xf01cf706, 0x1a9a2a64, 0xf5c89c85, + 0x03b738ed, 0xece58e0c, 0x0663536e, 0xe931e58f, 0x081fefeb, + 0xe74d590a, 0x0dcb8468, 0xe2993289, 0x3a45caf9, 0xd5177c18, + 0x3f91a17a, 0xd0c3179b, 0x31ed1dff, 0xdebfab1e, 0x3439767c, + 0xdb6bc09d, 0x2d1464f5, 0xc246d214, 0x28c00f76, 0xc792b997, + 0x26bcb3f3, 0xc9ee0512, 0x2368d870, 0xcc3a6e91, 0x49a02ed1, + 0xa6f29830, 0x4c744552, 0xa326f3b3, 0x4208f9d7, 0xad5a4f36, + 0x47dc9254, 0xa88e24b5, 0x5ef180dd, 0xb1a3363c, 0x5b25eb5e, + 0xb4775dbf, 0x555957db, 0xba0be13a, 0x508d3c58, 0xbfdf8ab9, + 0x670372c9, 0x8851c428, 0x62d7194a, 0x8d85afab, 0x6caba5cf, + 0x83f9132e, 0x697fce4c, 0x862d78ad, 0x7052dcc5, 0x9f006a24, + 0x7586b746, 0x9ad401a7, 0x7bfa0bc3, 0x94a8bd22, 0x7e2e6040, + 0x917cd6a1}, + {0x00000000, 0x87a6cb43, 0xd43c90c7, 0x539a5b84, 0x730827cf, + 0xf4aeec8c, 0xa734b708, 0x20927c4b, 0xe6104f9e, 0x61b684dd, + 0x322cdf59, 0xb58a141a, 0x95186851, 0x12bea312, 0x4124f896, + 0xc68233d5, 0x1751997d, 0x90f7523e, 0xc36d09ba, 0x44cbc2f9, + 0x6459beb2, 0xe3ff75f1, 0xb0652e75, 0x37c3e536, 0xf141d6e3, + 0x76e71da0, 0x257d4624, 0xa2db8d67, 0x8249f12c, 0x05ef3a6f, + 0x567561eb, 0xd1d3aaa8, 0x2ea332fa, 0xa905f9b9, 0xfa9fa23d, + 0x7d39697e, 0x5dab1535, 0xda0dde76, 0x899785f2, 0x0e314eb1, + 0xc8b37d64, 0x4f15b627, 0x1c8feda3, 0x9b2926e0, 0xbbbb5aab, + 0x3c1d91e8, 0x6f87ca6c, 0xe821012f, 0x39f2ab87, 0xbe5460c4, + 0xedce3b40, 0x6a68f003, 0x4afa8c48, 0xcd5c470b, 0x9ec61c8f, + 0x1960d7cc, 0xdfe2e419, 0x58442f5a, 0x0bde74de, 0x8c78bf9d, + 0xaceac3d6, 0x2b4c0895, 0x78d65311, 0xff709852, 0x5d4665f4, + 0xdae0aeb7, 0x897af533, 0x0edc3e70, 0x2e4e423b, 0xa9e88978, + 0xfa72d2fc, 0x7dd419bf, 0xbb562a6a, 0x3cf0e129, 0x6f6abaad, + 0xe8cc71ee, 0xc85e0da5, 0x4ff8c6e6, 0x1c629d62, 0x9bc45621, + 0x4a17fc89, 0xcdb137ca, 0x9e2b6c4e, 0x198da70d, 0x391fdb46, + 0xbeb91005, 0xed234b81, 0x6a8580c2, 0xac07b317, 0x2ba17854, + 0x783b23d0, 0xff9de893, 0xdf0f94d8, 0x58a95f9b, 0x0b33041f, + 0x8c95cf5c, 0x73e5570e, 0xf4439c4d, 0xa7d9c7c9, 0x207f0c8a, + 0x00ed70c1, 0x874bbb82, 0xd4d1e006, 0x53772b45, 0x95f51890, + 0x1253d3d3, 0x41c98857, 0xc66f4314, 0xe6fd3f5f, 0x615bf41c, + 0x32c1af98, 0xb56764db, 0x64b4ce73, 0xe3120530, 0xb0885eb4, + 0x372e95f7, 0x17bce9bc, 0x901a22ff, 0xc380797b, 0x4426b238, + 0x82a481ed, 0x05024aae, 0x5698112a, 0xd13eda69, 0xf1aca622, + 0x760a6d61, 0x259036e5, 0xa236fda6, 0xba8ccbe8, 0x3d2a00ab, + 0x6eb05b2f, 0xe916906c, 0xc984ec27, 0x4e222764, 0x1db87ce0, + 0x9a1eb7a3, 0x5c9c8476, 0xdb3a4f35, 0x88a014b1, 0x0f06dff2, + 0x2f94a3b9, 0xa83268fa, 0xfba8337e, 0x7c0ef83d, 0xaddd5295, + 0x2a7b99d6, 0x79e1c252, 0xfe470911, 0xded5755a, 0x5973be19, + 0x0ae9e59d, 0x8d4f2ede, 0x4bcd1d0b, 0xcc6bd648, 0x9ff18dcc, + 0x1857468f, 0x38c53ac4, 0xbf63f187, 0xecf9aa03, 0x6b5f6140, + 0x942ff912, 0x13893251, 0x401369d5, 0xc7b5a296, 0xe727dedd, + 0x6081159e, 0x331b4e1a, 0xb4bd8559, 0x723fb68c, 0xf5997dcf, + 0xa603264b, 0x21a5ed08, 0x01379143, 0x86915a00, 0xd50b0184, + 0x52adcac7, 0x837e606f, 0x04d8ab2c, 0x5742f0a8, 0xd0e43beb, + 0xf07647a0, 0x77d08ce3, 0x244ad767, 0xa3ec1c24, 0x656e2ff1, + 0xe2c8e4b2, 0xb152bf36, 0x36f47475, 0x1666083e, 0x91c0c37d, + 0xc25a98f9, 0x45fc53ba, 0xe7caae1c, 0x606c655f, 0x33f63edb, + 0xb450f598, 0x94c289d3, 0x13644290, 0x40fe1914, 0xc758d257, + 0x01dae182, 0x867c2ac1, 0xd5e67145, 0x5240ba06, 0x72d2c64d, + 0xf5740d0e, 0xa6ee568a, 0x21489dc9, 0xf09b3761, 0x773dfc22, + 0x24a7a7a6, 0xa3016ce5, 0x839310ae, 0x0435dbed, 0x57af8069, + 0xd0094b2a, 0x168b78ff, 0x912db3bc, 0xc2b7e838, 0x4511237b, + 0x65835f30, 0xe2259473, 0xb1bfcff7, 0x361904b4, 0xc9699ce6, + 0x4ecf57a5, 0x1d550c21, 0x9af3c762, 0xba61bb29, 0x3dc7706a, + 0x6e5d2bee, 0xe9fbe0ad, 0x2f79d378, 0xa8df183b, 0xfb4543bf, + 0x7ce388fc, 0x5c71f4b7, 0xdbd73ff4, 0x884d6470, 0x0febaf33, + 0xde38059b, 0x599eced8, 0x0a04955c, 0x8da25e1f, 0xad302254, + 0x2a96e917, 0x790cb293, 0xfeaa79d0, 0x38284a05, 0xbf8e8146, + 0xec14dac2, 0x6bb21181, 0x4b206dca, 0xcc86a689, 0x9f1cfd0d, + 0x18ba364e}}; + +local const z_word_t FAR crc_braid_big_table[][256] = { + {0x0000000000000000, 0x43cba68700000000, 0xc7903cd400000000, + 0x845b9a5300000000, 0xcf27087300000000, 0x8cecaef400000000, + 0x08b734a700000000, 0x4b7c922000000000, 0x9e4f10e600000000, + 0xdd84b66100000000, 0x59df2c3200000000, 0x1a148ab500000000, + 0x5168189500000000, 0x12a3be1200000000, 0x96f8244100000000, + 0xd53382c600000000, 0x7d99511700000000, 0x3e52f79000000000, + 0xba096dc300000000, 0xf9c2cb4400000000, 0xb2be596400000000, + 0xf175ffe300000000, 0x752e65b000000000, 0x36e5c33700000000, + 0xe3d641f100000000, 0xa01de77600000000, 0x24467d2500000000, + 0x678ddba200000000, 0x2cf1498200000000, 0x6f3aef0500000000, + 0xeb61755600000000, 0xa8aad3d100000000, 0xfa32a32e00000000, + 0xb9f905a900000000, 0x3da29ffa00000000, 0x7e69397d00000000, + 0x3515ab5d00000000, 0x76de0dda00000000, 0xf285978900000000, + 0xb14e310e00000000, 0x647db3c800000000, 0x27b6154f00000000, + 0xa3ed8f1c00000000, 0xe026299b00000000, 0xab5abbbb00000000, + 0xe8911d3c00000000, 0x6cca876f00000000, 0x2f0121e800000000, + 0x87abf23900000000, 0xc46054be00000000, 0x403bceed00000000, + 0x03f0686a00000000, 0x488cfa4a00000000, 0x0b475ccd00000000, + 0x8f1cc69e00000000, 0xccd7601900000000, 0x19e4e2df00000000, + 0x5a2f445800000000, 0xde74de0b00000000, 0x9dbf788c00000000, + 0xd6c3eaac00000000, 0x95084c2b00000000, 0x1153d67800000000, + 0x529870ff00000000, 0xf465465d00000000, 0xb7aee0da00000000, + 0x33f57a8900000000, 0x703edc0e00000000, 0x3b424e2e00000000, + 0x7889e8a900000000, 0xfcd272fa00000000, 0xbf19d47d00000000, + 0x6a2a56bb00000000, 0x29e1f03c00000000, 0xadba6a6f00000000, + 0xee71cce800000000, 0xa50d5ec800000000, 0xe6c6f84f00000000, + 0x629d621c00000000, 0x2156c49b00000000, 0x89fc174a00000000, + 0xca37b1cd00000000, 0x4e6c2b9e00000000, 0x0da78d1900000000, + 0x46db1f3900000000, 0x0510b9be00000000, 0x814b23ed00000000, + 0xc280856a00000000, 0x17b307ac00000000, 0x5478a12b00000000, + 0xd0233b7800000000, 0x93e89dff00000000, 0xd8940fdf00000000, + 0x9b5fa95800000000, 0x1f04330b00000000, 0x5ccf958c00000000, + 0x0e57e57300000000, 0x4d9c43f400000000, 0xc9c7d9a700000000, + 0x8a0c7f2000000000, 0xc170ed0000000000, 0x82bb4b8700000000, + 0x06e0d1d400000000, 0x452b775300000000, 0x9018f59500000000, + 0xd3d3531200000000, 0x5788c94100000000, 0x14436fc600000000, + 0x5f3ffde600000000, 0x1cf45b6100000000, 0x98afc13200000000, + 0xdb6467b500000000, 0x73ceb46400000000, 0x300512e300000000, + 0xb45e88b000000000, 0xf7952e3700000000, 0xbce9bc1700000000, + 0xff221a9000000000, 0x7b7980c300000000, 0x38b2264400000000, + 0xed81a48200000000, 0xae4a020500000000, 0x2a11985600000000, + 0x69da3ed100000000, 0x22a6acf100000000, 0x616d0a7600000000, + 0xe536902500000000, 0xa6fd36a200000000, 0xe8cb8cba00000000, + 0xab002a3d00000000, 0x2f5bb06e00000000, 0x6c9016e900000000, + 0x27ec84c900000000, 0x6427224e00000000, 0xe07cb81d00000000, + 0xa3b71e9a00000000, 0x76849c5c00000000, 0x354f3adb00000000, + 0xb114a08800000000, 0xf2df060f00000000, 0xb9a3942f00000000, + 0xfa6832a800000000, 0x7e33a8fb00000000, 0x3df80e7c00000000, + 0x9552ddad00000000, 0xd6997b2a00000000, 0x52c2e17900000000, + 0x110947fe00000000, 0x5a75d5de00000000, 0x19be735900000000, + 0x9de5e90a00000000, 0xde2e4f8d00000000, 0x0b1dcd4b00000000, + 0x48d66bcc00000000, 0xcc8df19f00000000, 0x8f46571800000000, + 0xc43ac53800000000, 0x87f163bf00000000, 0x03aaf9ec00000000, + 0x40615f6b00000000, 0x12f92f9400000000, 0x5132891300000000, + 0xd569134000000000, 0x96a2b5c700000000, 0xddde27e700000000, + 0x9e15816000000000, 0x1a4e1b3300000000, 0x5985bdb400000000, + 0x8cb63f7200000000, 0xcf7d99f500000000, 0x4b2603a600000000, + 0x08eda52100000000, 0x4391370100000000, 0x005a918600000000, + 0x84010bd500000000, 0xc7caad5200000000, 0x6f607e8300000000, + 0x2cabd80400000000, 0xa8f0425700000000, 0xeb3be4d000000000, + 0xa04776f000000000, 0xe38cd07700000000, 0x67d74a2400000000, + 0x241ceca300000000, 0xf12f6e6500000000, 0xb2e4c8e200000000, + 0x36bf52b100000000, 0x7574f43600000000, 0x3e08661600000000, + 0x7dc3c09100000000, 0xf9985ac200000000, 0xba53fc4500000000, + 0x1caecae700000000, 0x5f656c6000000000, 0xdb3ef63300000000, + 0x98f550b400000000, 0xd389c29400000000, 0x9042641300000000, + 0x1419fe4000000000, 0x57d258c700000000, 0x82e1da0100000000, + 0xc12a7c8600000000, 0x4571e6d500000000, 0x06ba405200000000, + 0x4dc6d27200000000, 0x0e0d74f500000000, 0x8a56eea600000000, + 0xc99d482100000000, 0x61379bf000000000, 0x22fc3d7700000000, + 0xa6a7a72400000000, 0xe56c01a300000000, 0xae10938300000000, + 0xeddb350400000000, 0x6980af5700000000, 0x2a4b09d000000000, + 0xff788b1600000000, 0xbcb32d9100000000, 0x38e8b7c200000000, + 0x7b23114500000000, 0x305f836500000000, 0x739425e200000000, + 0xf7cfbfb100000000, 0xb404193600000000, 0xe69c69c900000000, + 0xa557cf4e00000000, 0x210c551d00000000, 0x62c7f39a00000000, + 0x29bb61ba00000000, 0x6a70c73d00000000, 0xee2b5d6e00000000, + 0xade0fbe900000000, 0x78d3792f00000000, 0x3b18dfa800000000, + 0xbf4345fb00000000, 0xfc88e37c00000000, 0xb7f4715c00000000, + 0xf43fd7db00000000, 0x70644d8800000000, 0x33afeb0f00000000, + 0x9b0538de00000000, 0xd8ce9e5900000000, 0x5c95040a00000000, + 0x1f5ea28d00000000, 0x542230ad00000000, 0x17e9962a00000000, + 0x93b20c7900000000, 0xd079aafe00000000, 0x054a283800000000, + 0x46818ebf00000000, 0xc2da14ec00000000, 0x8111b26b00000000, + 0xca6d204b00000000, 0x89a686cc00000000, 0x0dfd1c9f00000000, + 0x4e36ba1800000000}, + {0x0000000000000000, 0xe1b652ef00000000, 0x836bd40500000000, + 0x62dd86ea00000000, 0x06d7a80b00000000, 0xe761fae400000000, + 0x85bc7c0e00000000, 0x640a2ee100000000, 0x0cae511700000000, + 0xed1803f800000000, 0x8fc5851200000000, 0x6e73d7fd00000000, + 0x0a79f91c00000000, 0xebcfabf300000000, 0x89122d1900000000, + 0x68a47ff600000000, 0x185ca32e00000000, 0xf9eaf1c100000000, + 0x9b37772b00000000, 0x7a8125c400000000, 0x1e8b0b2500000000, + 0xff3d59ca00000000, 0x9de0df2000000000, 0x7c568dcf00000000, + 0x14f2f23900000000, 0xf544a0d600000000, 0x9799263c00000000, + 0x762f74d300000000, 0x12255a3200000000, 0xf39308dd00000000, + 0x914e8e3700000000, 0x70f8dcd800000000, 0x30b8465d00000000, + 0xd10e14b200000000, 0xb3d3925800000000, 0x5265c0b700000000, + 0x366fee5600000000, 0xd7d9bcb900000000, 0xb5043a5300000000, + 0x54b268bc00000000, 0x3c16174a00000000, 0xdda045a500000000, + 0xbf7dc34f00000000, 0x5ecb91a000000000, 0x3ac1bf4100000000, + 0xdb77edae00000000, 0xb9aa6b4400000000, 0x581c39ab00000000, + 0x28e4e57300000000, 0xc952b79c00000000, 0xab8f317600000000, + 0x4a39639900000000, 0x2e334d7800000000, 0xcf851f9700000000, + 0xad58997d00000000, 0x4ceecb9200000000, 0x244ab46400000000, + 0xc5fce68b00000000, 0xa721606100000000, 0x4697328e00000000, + 0x229d1c6f00000000, 0xc32b4e8000000000, 0xa1f6c86a00000000, + 0x40409a8500000000, 0x60708dba00000000, 0x81c6df5500000000, + 0xe31b59bf00000000, 0x02ad0b5000000000, 0x66a725b100000000, + 0x8711775e00000000, 0xe5ccf1b400000000, 0x047aa35b00000000, + 0x6cdedcad00000000, 0x8d688e4200000000, 0xefb508a800000000, + 0x0e035a4700000000, 0x6a0974a600000000, 0x8bbf264900000000, + 0xe962a0a300000000, 0x08d4f24c00000000, 0x782c2e9400000000, + 0x999a7c7b00000000, 0xfb47fa9100000000, 0x1af1a87e00000000, + 0x7efb869f00000000, 0x9f4dd47000000000, 0xfd90529a00000000, + 0x1c26007500000000, 0x74827f8300000000, 0x95342d6c00000000, + 0xf7e9ab8600000000, 0x165ff96900000000, 0x7255d78800000000, + 0x93e3856700000000, 0xf13e038d00000000, 0x1088516200000000, + 0x50c8cbe700000000, 0xb17e990800000000, 0xd3a31fe200000000, + 0x32154d0d00000000, 0x561f63ec00000000, 0xb7a9310300000000, + 0xd574b7e900000000, 0x34c2e50600000000, 0x5c669af000000000, + 0xbdd0c81f00000000, 0xdf0d4ef500000000, 0x3ebb1c1a00000000, + 0x5ab132fb00000000, 0xbb07601400000000, 0xd9dae6fe00000000, + 0x386cb41100000000, 0x489468c900000000, 0xa9223a2600000000, + 0xcbffbccc00000000, 0x2a49ee2300000000, 0x4e43c0c200000000, + 0xaff5922d00000000, 0xcd2814c700000000, 0x2c9e462800000000, + 0x443a39de00000000, 0xa58c6b3100000000, 0xc751eddb00000000, + 0x26e7bf3400000000, 0x42ed91d500000000, 0xa35bc33a00000000, + 0xc18645d000000000, 0x2030173f00000000, 0x81e66bae00000000, + 0x6050394100000000, 0x028dbfab00000000, 0xe33bed4400000000, + 0x8731c3a500000000, 0x6687914a00000000, 0x045a17a000000000, + 0xe5ec454f00000000, 0x8d483ab900000000, 0x6cfe685600000000, + 0x0e23eebc00000000, 0xef95bc5300000000, 0x8b9f92b200000000, + 0x6a29c05d00000000, 0x08f446b700000000, 0xe942145800000000, + 0x99bac88000000000, 0x780c9a6f00000000, 0x1ad11c8500000000, + 0xfb674e6a00000000, 0x9f6d608b00000000, 0x7edb326400000000, + 0x1c06b48e00000000, 0xfdb0e66100000000, 0x9514999700000000, + 0x74a2cb7800000000, 0x167f4d9200000000, 0xf7c91f7d00000000, + 0x93c3319c00000000, 0x7275637300000000, 0x10a8e59900000000, + 0xf11eb77600000000, 0xb15e2df300000000, 0x50e87f1c00000000, + 0x3235f9f600000000, 0xd383ab1900000000, 0xb78985f800000000, + 0x563fd71700000000, 0x34e251fd00000000, 0xd554031200000000, + 0xbdf07ce400000000, 0x5c462e0b00000000, 0x3e9ba8e100000000, + 0xdf2dfa0e00000000, 0xbb27d4ef00000000, 0x5a91860000000000, + 0x384c00ea00000000, 0xd9fa520500000000, 0xa9028edd00000000, + 0x48b4dc3200000000, 0x2a695ad800000000, 0xcbdf083700000000, + 0xafd526d600000000, 0x4e63743900000000, 0x2cbef2d300000000, + 0xcd08a03c00000000, 0xa5acdfca00000000, 0x441a8d2500000000, + 0x26c70bcf00000000, 0xc771592000000000, 0xa37b77c100000000, + 0x42cd252e00000000, 0x2010a3c400000000, 0xc1a6f12b00000000, + 0xe196e61400000000, 0x0020b4fb00000000, 0x62fd321100000000, + 0x834b60fe00000000, 0xe7414e1f00000000, 0x06f71cf000000000, + 0x642a9a1a00000000, 0x859cc8f500000000, 0xed38b70300000000, + 0x0c8ee5ec00000000, 0x6e53630600000000, 0x8fe531e900000000, + 0xebef1f0800000000, 0x0a594de700000000, 0x6884cb0d00000000, + 0x893299e200000000, 0xf9ca453a00000000, 0x187c17d500000000, + 0x7aa1913f00000000, 0x9b17c3d000000000, 0xff1ded3100000000, + 0x1eabbfde00000000, 0x7c76393400000000, 0x9dc06bdb00000000, + 0xf564142d00000000, 0x14d246c200000000, 0x760fc02800000000, + 0x97b992c700000000, 0xf3b3bc2600000000, 0x1205eec900000000, + 0x70d8682300000000, 0x916e3acc00000000, 0xd12ea04900000000, + 0x3098f2a600000000, 0x5245744c00000000, 0xb3f326a300000000, + 0xd7f9084200000000, 0x364f5aad00000000, 0x5492dc4700000000, + 0xb5248ea800000000, 0xdd80f15e00000000, 0x3c36a3b100000000, + 0x5eeb255b00000000, 0xbf5d77b400000000, 0xdb57595500000000, + 0x3ae10bba00000000, 0x583c8d5000000000, 0xb98adfbf00000000, + 0xc972036700000000, 0x28c4518800000000, 0x4a19d76200000000, + 0xabaf858d00000000, 0xcfa5ab6c00000000, 0x2e13f98300000000, + 0x4cce7f6900000000, 0xad782d8600000000, 0xc5dc527000000000, + 0x246a009f00000000, 0x46b7867500000000, 0xa701d49a00000000, + 0xc30bfa7b00000000, 0x22bda89400000000, 0x40602e7e00000000, + 0xa1d67c9100000000}, + {0x0000000000000000, 0x5880e2d700000000, 0xf106b47400000000, + 0xa98656a300000000, 0xe20d68e900000000, 0xba8d8a3e00000000, + 0x130bdc9d00000000, 0x4b8b3e4a00000000, 0x851da10900000000, + 0xdd9d43de00000000, 0x741b157d00000000, 0x2c9bf7aa00000000, + 0x6710c9e000000000, 0x3f902b3700000000, 0x96167d9400000000, + 0xce969f4300000000, 0x0a3b421300000000, 0x52bba0c400000000, + 0xfb3df66700000000, 0xa3bd14b000000000, 0xe8362afa00000000, + 0xb0b6c82d00000000, 0x19309e8e00000000, 0x41b07c5900000000, + 0x8f26e31a00000000, 0xd7a601cd00000000, 0x7e20576e00000000, + 0x26a0b5b900000000, 0x6d2b8bf300000000, 0x35ab692400000000, + 0x9c2d3f8700000000, 0xc4addd5000000000, 0x1476842600000000, + 0x4cf666f100000000, 0xe570305200000000, 0xbdf0d28500000000, + 0xf67beccf00000000, 0xaefb0e1800000000, 0x077d58bb00000000, + 0x5ffdba6c00000000, 0x916b252f00000000, 0xc9ebc7f800000000, + 0x606d915b00000000, 0x38ed738c00000000, 0x73664dc600000000, + 0x2be6af1100000000, 0x8260f9b200000000, 0xdae01b6500000000, + 0x1e4dc63500000000, 0x46cd24e200000000, 0xef4b724100000000, + 0xb7cb909600000000, 0xfc40aedc00000000, 0xa4c04c0b00000000, + 0x0d461aa800000000, 0x55c6f87f00000000, 0x9b50673c00000000, + 0xc3d085eb00000000, 0x6a56d34800000000, 0x32d6319f00000000, + 0x795d0fd500000000, 0x21dded0200000000, 0x885bbba100000000, + 0xd0db597600000000, 0x28ec084d00000000, 0x706cea9a00000000, + 0xd9eabc3900000000, 0x816a5eee00000000, 0xcae160a400000000, + 0x9261827300000000, 0x3be7d4d000000000, 0x6367360700000000, + 0xadf1a94400000000, 0xf5714b9300000000, 0x5cf71d3000000000, + 0x0477ffe700000000, 0x4ffcc1ad00000000, 0x177c237a00000000, + 0xbefa75d900000000, 0xe67a970e00000000, 0x22d74a5e00000000, + 0x7a57a88900000000, 0xd3d1fe2a00000000, 0x8b511cfd00000000, + 0xc0da22b700000000, 0x985ac06000000000, 0x31dc96c300000000, + 0x695c741400000000, 0xa7caeb5700000000, 0xff4a098000000000, + 0x56cc5f2300000000, 0x0e4cbdf400000000, 0x45c783be00000000, + 0x1d47616900000000, 0xb4c137ca00000000, 0xec41d51d00000000, + 0x3c9a8c6b00000000, 0x641a6ebc00000000, 0xcd9c381f00000000, + 0x951cdac800000000, 0xde97e48200000000, 0x8617065500000000, + 0x2f9150f600000000, 0x7711b22100000000, 0xb9872d6200000000, + 0xe107cfb500000000, 0x4881991600000000, 0x10017bc100000000, + 0x5b8a458b00000000, 0x030aa75c00000000, 0xaa8cf1ff00000000, + 0xf20c132800000000, 0x36a1ce7800000000, 0x6e212caf00000000, + 0xc7a77a0c00000000, 0x9f2798db00000000, 0xd4aca69100000000, + 0x8c2c444600000000, 0x25aa12e500000000, 0x7d2af03200000000, + 0xb3bc6f7100000000, 0xeb3c8da600000000, 0x42badb0500000000, + 0x1a3a39d200000000, 0x51b1079800000000, 0x0931e54f00000000, + 0xa0b7b3ec00000000, 0xf837513b00000000, 0x50d8119a00000000, + 0x0858f34d00000000, 0xa1dea5ee00000000, 0xf95e473900000000, + 0xb2d5797300000000, 0xea559ba400000000, 0x43d3cd0700000000, + 0x1b532fd000000000, 0xd5c5b09300000000, 0x8d45524400000000, + 0x24c304e700000000, 0x7c43e63000000000, 0x37c8d87a00000000, + 0x6f483aad00000000, 0xc6ce6c0e00000000, 0x9e4e8ed900000000, + 0x5ae3538900000000, 0x0263b15e00000000, 0xabe5e7fd00000000, + 0xf365052a00000000, 0xb8ee3b6000000000, 0xe06ed9b700000000, + 0x49e88f1400000000, 0x11686dc300000000, 0xdffef28000000000, + 0x877e105700000000, 0x2ef846f400000000, 0x7678a42300000000, + 0x3df39a6900000000, 0x657378be00000000, 0xccf52e1d00000000, + 0x9475ccca00000000, 0x44ae95bc00000000, 0x1c2e776b00000000, + 0xb5a821c800000000, 0xed28c31f00000000, 0xa6a3fd5500000000, + 0xfe231f8200000000, 0x57a5492100000000, 0x0f25abf600000000, + 0xc1b334b500000000, 0x9933d66200000000, 0x30b580c100000000, + 0x6835621600000000, 0x23be5c5c00000000, 0x7b3ebe8b00000000, + 0xd2b8e82800000000, 0x8a380aff00000000, 0x4e95d7af00000000, + 0x1615357800000000, 0xbf9363db00000000, 0xe713810c00000000, + 0xac98bf4600000000, 0xf4185d9100000000, 0x5d9e0b3200000000, + 0x051ee9e500000000, 0xcb8876a600000000, 0x9308947100000000, + 0x3a8ec2d200000000, 0x620e200500000000, 0x29851e4f00000000, + 0x7105fc9800000000, 0xd883aa3b00000000, 0x800348ec00000000, + 0x783419d700000000, 0x20b4fb0000000000, 0x8932ada300000000, + 0xd1b24f7400000000, 0x9a39713e00000000, 0xc2b993e900000000, + 0x6b3fc54a00000000, 0x33bf279d00000000, 0xfd29b8de00000000, + 0xa5a95a0900000000, 0x0c2f0caa00000000, 0x54afee7d00000000, + 0x1f24d03700000000, 0x47a432e000000000, 0xee22644300000000, + 0xb6a2869400000000, 0x720f5bc400000000, 0x2a8fb91300000000, + 0x8309efb000000000, 0xdb890d6700000000, 0x9002332d00000000, + 0xc882d1fa00000000, 0x6104875900000000, 0x3984658e00000000, + 0xf712facd00000000, 0xaf92181a00000000, 0x06144eb900000000, + 0x5e94ac6e00000000, 0x151f922400000000, 0x4d9f70f300000000, + 0xe419265000000000, 0xbc99c48700000000, 0x6c429df100000000, + 0x34c27f2600000000, 0x9d44298500000000, 0xc5c4cb5200000000, + 0x8e4ff51800000000, 0xd6cf17cf00000000, 0x7f49416c00000000, + 0x27c9a3bb00000000, 0xe95f3cf800000000, 0xb1dfde2f00000000, + 0x1859888c00000000, 0x40d96a5b00000000, 0x0b52541100000000, + 0x53d2b6c600000000, 0xfa54e06500000000, 0xa2d402b200000000, + 0x6679dfe200000000, 0x3ef93d3500000000, 0x977f6b9600000000, + 0xcfff894100000000, 0x8474b70b00000000, 0xdcf455dc00000000, + 0x7572037f00000000, 0x2df2e1a800000000, 0xe3647eeb00000000, + 0xbbe49c3c00000000, 0x1262ca9f00000000, 0x4ae2284800000000, + 0x0169160200000000, 0x59e9f4d500000000, 0xf06fa27600000000, + 0xa8ef40a100000000}, + {0x0000000000000000, 0x463b676500000000, 0x8c76ceca00000000, + 0xca4da9af00000000, 0x59ebed4e00000000, 0x1fd08a2b00000000, + 0xd59d238400000000, 0x93a644e100000000, 0xb2d6db9d00000000, + 0xf4edbcf800000000, 0x3ea0155700000000, 0x789b723200000000, + 0xeb3d36d300000000, 0xad0651b600000000, 0x674bf81900000000, + 0x21709f7c00000000, 0x25abc6e000000000, 0x6390a18500000000, + 0xa9dd082a00000000, 0xefe66f4f00000000, 0x7c402bae00000000, + 0x3a7b4ccb00000000, 0xf036e56400000000, 0xb60d820100000000, + 0x977d1d7d00000000, 0xd1467a1800000000, 0x1b0bd3b700000000, + 0x5d30b4d200000000, 0xce96f03300000000, 0x88ad975600000000, + 0x42e03ef900000000, 0x04db599c00000000, 0x0b50fc1a00000000, + 0x4d6b9b7f00000000, 0x872632d000000000, 0xc11d55b500000000, + 0x52bb115400000000, 0x1480763100000000, 0xdecddf9e00000000, + 0x98f6b8fb00000000, 0xb986278700000000, 0xffbd40e200000000, + 0x35f0e94d00000000, 0x73cb8e2800000000, 0xe06dcac900000000, + 0xa656adac00000000, 0x6c1b040300000000, 0x2a20636600000000, + 0x2efb3afa00000000, 0x68c05d9f00000000, 0xa28df43000000000, + 0xe4b6935500000000, 0x7710d7b400000000, 0x312bb0d100000000, + 0xfb66197e00000000, 0xbd5d7e1b00000000, 0x9c2de16700000000, + 0xda16860200000000, 0x105b2fad00000000, 0x566048c800000000, + 0xc5c60c2900000000, 0x83fd6b4c00000000, 0x49b0c2e300000000, + 0x0f8ba58600000000, 0x16a0f83500000000, 0x509b9f5000000000, + 0x9ad636ff00000000, 0xdced519a00000000, 0x4f4b157b00000000, + 0x0970721e00000000, 0xc33ddbb100000000, 0x8506bcd400000000, + 0xa47623a800000000, 0xe24d44cd00000000, 0x2800ed6200000000, + 0x6e3b8a0700000000, 0xfd9dcee600000000, 0xbba6a98300000000, + 0x71eb002c00000000, 0x37d0674900000000, 0x330b3ed500000000, + 0x753059b000000000, 0xbf7df01f00000000, 0xf946977a00000000, + 0x6ae0d39b00000000, 0x2cdbb4fe00000000, 0xe6961d5100000000, + 0xa0ad7a3400000000, 0x81dde54800000000, 0xc7e6822d00000000, + 0x0dab2b8200000000, 0x4b904ce700000000, 0xd836080600000000, + 0x9e0d6f6300000000, 0x5440c6cc00000000, 0x127ba1a900000000, + 0x1df0042f00000000, 0x5bcb634a00000000, 0x9186cae500000000, + 0xd7bdad8000000000, 0x441be96100000000, 0x02208e0400000000, + 0xc86d27ab00000000, 0x8e5640ce00000000, 0xaf26dfb200000000, + 0xe91db8d700000000, 0x2350117800000000, 0x656b761d00000000, + 0xf6cd32fc00000000, 0xb0f6559900000000, 0x7abbfc3600000000, + 0x3c809b5300000000, 0x385bc2cf00000000, 0x7e60a5aa00000000, + 0xb42d0c0500000000, 0xf2166b6000000000, 0x61b02f8100000000, + 0x278b48e400000000, 0xedc6e14b00000000, 0xabfd862e00000000, + 0x8a8d195200000000, 0xccb67e3700000000, 0x06fbd79800000000, + 0x40c0b0fd00000000, 0xd366f41c00000000, 0x955d937900000000, + 0x5f103ad600000000, 0x192b5db300000000, 0x2c40f16b00000000, + 0x6a7b960e00000000, 0xa0363fa100000000, 0xe60d58c400000000, + 0x75ab1c2500000000, 0x33907b4000000000, 0xf9ddd2ef00000000, + 0xbfe6b58a00000000, 0x9e962af600000000, 0xd8ad4d9300000000, + 0x12e0e43c00000000, 0x54db835900000000, 0xc77dc7b800000000, + 0x8146a0dd00000000, 0x4b0b097200000000, 0x0d306e1700000000, + 0x09eb378b00000000, 0x4fd050ee00000000, 0x859df94100000000, + 0xc3a69e2400000000, 0x5000dac500000000, 0x163bbda000000000, + 0xdc76140f00000000, 0x9a4d736a00000000, 0xbb3dec1600000000, + 0xfd068b7300000000, 0x374b22dc00000000, 0x717045b900000000, + 0xe2d6015800000000, 0xa4ed663d00000000, 0x6ea0cf9200000000, + 0x289ba8f700000000, 0x27100d7100000000, 0x612b6a1400000000, + 0xab66c3bb00000000, 0xed5da4de00000000, 0x7efbe03f00000000, + 0x38c0875a00000000, 0xf28d2ef500000000, 0xb4b6499000000000, + 0x95c6d6ec00000000, 0xd3fdb18900000000, 0x19b0182600000000, + 0x5f8b7f4300000000, 0xcc2d3ba200000000, 0x8a165cc700000000, + 0x405bf56800000000, 0x0660920d00000000, 0x02bbcb9100000000, + 0x4480acf400000000, 0x8ecd055b00000000, 0xc8f6623e00000000, + 0x5b5026df00000000, 0x1d6b41ba00000000, 0xd726e81500000000, + 0x911d8f7000000000, 0xb06d100c00000000, 0xf656776900000000, + 0x3c1bdec600000000, 0x7a20b9a300000000, 0xe986fd4200000000, + 0xafbd9a2700000000, 0x65f0338800000000, 0x23cb54ed00000000, + 0x3ae0095e00000000, 0x7cdb6e3b00000000, 0xb696c79400000000, + 0xf0ada0f100000000, 0x630be41000000000, 0x2530837500000000, + 0xef7d2ada00000000, 0xa9464dbf00000000, 0x8836d2c300000000, + 0xce0db5a600000000, 0x04401c0900000000, 0x427b7b6c00000000, + 0xd1dd3f8d00000000, 0x97e658e800000000, 0x5dabf14700000000, + 0x1b90962200000000, 0x1f4bcfbe00000000, 0x5970a8db00000000, + 0x933d017400000000, 0xd506661100000000, 0x46a022f000000000, + 0x009b459500000000, 0xcad6ec3a00000000, 0x8ced8b5f00000000, + 0xad9d142300000000, 0xeba6734600000000, 0x21ebdae900000000, + 0x67d0bd8c00000000, 0xf476f96d00000000, 0xb24d9e0800000000, + 0x780037a700000000, 0x3e3b50c200000000, 0x31b0f54400000000, + 0x778b922100000000, 0xbdc63b8e00000000, 0xfbfd5ceb00000000, + 0x685b180a00000000, 0x2e607f6f00000000, 0xe42dd6c000000000, + 0xa216b1a500000000, 0x83662ed900000000, 0xc55d49bc00000000, + 0x0f10e01300000000, 0x492b877600000000, 0xda8dc39700000000, + 0x9cb6a4f200000000, 0x56fb0d5d00000000, 0x10c06a3800000000, + 0x141b33a400000000, 0x522054c100000000, 0x986dfd6e00000000, + 0xde569a0b00000000, 0x4df0deea00000000, 0x0bcbb98f00000000, + 0xc186102000000000, 0x87bd774500000000, 0xa6cde83900000000, + 0xe0f68f5c00000000, 0x2abb26f300000000, 0x6c80419600000000, + 0xff26057700000000, 0xb91d621200000000, 0x7350cbbd00000000, + 0x356bacd800000000}, + {0x0000000000000000, 0x9e83da9f00000000, 0x7d01c4e400000000, + 0xe3821e7b00000000, 0xbb04f91200000000, 0x2587238d00000000, + 0xc6053df600000000, 0x5886e76900000000, 0x7609f22500000000, + 0xe88a28ba00000000, 0x0b0836c100000000, 0x958bec5e00000000, + 0xcd0d0b3700000000, 0x538ed1a800000000, 0xb00ccfd300000000, + 0x2e8f154c00000000, 0xec12e44b00000000, 0x72913ed400000000, + 0x911320af00000000, 0x0f90fa3000000000, 0x57161d5900000000, + 0xc995c7c600000000, 0x2a17d9bd00000000, 0xb494032200000000, + 0x9a1b166e00000000, 0x0498ccf100000000, 0xe71ad28a00000000, + 0x7999081500000000, 0x211fef7c00000000, 0xbf9c35e300000000, + 0x5c1e2b9800000000, 0xc29df10700000000, 0xd825c89700000000, + 0x46a6120800000000, 0xa5240c7300000000, 0x3ba7d6ec00000000, + 0x6321318500000000, 0xfda2eb1a00000000, 0x1e20f56100000000, + 0x80a32ffe00000000, 0xae2c3ab200000000, 0x30afe02d00000000, + 0xd32dfe5600000000, 0x4dae24c900000000, 0x1528c3a000000000, + 0x8bab193f00000000, 0x6829074400000000, 0xf6aadddb00000000, + 0x34372cdc00000000, 0xaab4f64300000000, 0x4936e83800000000, + 0xd7b532a700000000, 0x8f33d5ce00000000, 0x11b00f5100000000, + 0xf232112a00000000, 0x6cb1cbb500000000, 0x423edef900000000, + 0xdcbd046600000000, 0x3f3f1a1d00000000, 0xa1bcc08200000000, + 0xf93a27eb00000000, 0x67b9fd7400000000, 0x843be30f00000000, + 0x1ab8399000000000, 0xf14de1f400000000, 0x6fce3b6b00000000, + 0x8c4c251000000000, 0x12cfff8f00000000, 0x4a4918e600000000, + 0xd4cac27900000000, 0x3748dc0200000000, 0xa9cb069d00000000, + 0x874413d100000000, 0x19c7c94e00000000, 0xfa45d73500000000, + 0x64c60daa00000000, 0x3c40eac300000000, 0xa2c3305c00000000, + 0x41412e2700000000, 0xdfc2f4b800000000, 0x1d5f05bf00000000, + 0x83dcdf2000000000, 0x605ec15b00000000, 0xfedd1bc400000000, + 0xa65bfcad00000000, 0x38d8263200000000, 0xdb5a384900000000, + 0x45d9e2d600000000, 0x6b56f79a00000000, 0xf5d52d0500000000, + 0x1657337e00000000, 0x88d4e9e100000000, 0xd0520e8800000000, + 0x4ed1d41700000000, 0xad53ca6c00000000, 0x33d010f300000000, + 0x2968296300000000, 0xb7ebf3fc00000000, 0x5469ed8700000000, + 0xcaea371800000000, 0x926cd07100000000, 0x0cef0aee00000000, + 0xef6d149500000000, 0x71eece0a00000000, 0x5f61db4600000000, + 0xc1e201d900000000, 0x22601fa200000000, 0xbce3c53d00000000, + 0xe465225400000000, 0x7ae6f8cb00000000, 0x9964e6b000000000, + 0x07e73c2f00000000, 0xc57acd2800000000, 0x5bf917b700000000, + 0xb87b09cc00000000, 0x26f8d35300000000, 0x7e7e343a00000000, + 0xe0fdeea500000000, 0x037ff0de00000000, 0x9dfc2a4100000000, + 0xb3733f0d00000000, 0x2df0e59200000000, 0xce72fbe900000000, + 0x50f1217600000000, 0x0877c61f00000000, 0x96f41c8000000000, + 0x757602fb00000000, 0xebf5d86400000000, 0xa39db33200000000, + 0x3d1e69ad00000000, 0xde9c77d600000000, 0x401fad4900000000, + 0x18994a2000000000, 0x861a90bf00000000, 0x65988ec400000000, + 0xfb1b545b00000000, 0xd594411700000000, 0x4b179b8800000000, + 0xa89585f300000000, 0x36165f6c00000000, 0x6e90b80500000000, + 0xf013629a00000000, 0x13917ce100000000, 0x8d12a67e00000000, + 0x4f8f577900000000, 0xd10c8de600000000, 0x328e939d00000000, + 0xac0d490200000000, 0xf48bae6b00000000, 0x6a0874f400000000, + 0x898a6a8f00000000, 0x1709b01000000000, 0x3986a55c00000000, + 0xa7057fc300000000, 0x448761b800000000, 0xda04bb2700000000, + 0x82825c4e00000000, 0x1c0186d100000000, 0xff8398aa00000000, + 0x6100423500000000, 0x7bb87ba500000000, 0xe53ba13a00000000, + 0x06b9bf4100000000, 0x983a65de00000000, 0xc0bc82b700000000, + 0x5e3f582800000000, 0xbdbd465300000000, 0x233e9ccc00000000, + 0x0db1898000000000, 0x9332531f00000000, 0x70b04d6400000000, + 0xee3397fb00000000, 0xb6b5709200000000, 0x2836aa0d00000000, + 0xcbb4b47600000000, 0x55376ee900000000, 0x97aa9fee00000000, + 0x0929457100000000, 0xeaab5b0a00000000, 0x7428819500000000, + 0x2cae66fc00000000, 0xb22dbc6300000000, 0x51afa21800000000, + 0xcf2c788700000000, 0xe1a36dcb00000000, 0x7f20b75400000000, + 0x9ca2a92f00000000, 0x022173b000000000, 0x5aa794d900000000, + 0xc4244e4600000000, 0x27a6503d00000000, 0xb9258aa200000000, + 0x52d052c600000000, 0xcc53885900000000, 0x2fd1962200000000, + 0xb1524cbd00000000, 0xe9d4abd400000000, 0x7757714b00000000, + 0x94d56f3000000000, 0x0a56b5af00000000, 0x24d9a0e300000000, + 0xba5a7a7c00000000, 0x59d8640700000000, 0xc75bbe9800000000, + 0x9fdd59f100000000, 0x015e836e00000000, 0xe2dc9d1500000000, + 0x7c5f478a00000000, 0xbec2b68d00000000, 0x20416c1200000000, + 0xc3c3726900000000, 0x5d40a8f600000000, 0x05c64f9f00000000, + 0x9b45950000000000, 0x78c78b7b00000000, 0xe64451e400000000, + 0xc8cb44a800000000, 0x56489e3700000000, 0xb5ca804c00000000, + 0x2b495ad300000000, 0x73cfbdba00000000, 0xed4c672500000000, + 0x0ece795e00000000, 0x904da3c100000000, 0x8af59a5100000000, + 0x147640ce00000000, 0xf7f45eb500000000, 0x6977842a00000000, + 0x31f1634300000000, 0xaf72b9dc00000000, 0x4cf0a7a700000000, + 0xd2737d3800000000, 0xfcfc687400000000, 0x627fb2eb00000000, + 0x81fdac9000000000, 0x1f7e760f00000000, 0x47f8916600000000, + 0xd97b4bf900000000, 0x3af9558200000000, 0xa47a8f1d00000000, + 0x66e77e1a00000000, 0xf864a48500000000, 0x1be6bafe00000000, + 0x8565606100000000, 0xdde3870800000000, 0x43605d9700000000, + 0xa0e243ec00000000, 0x3e61997300000000, 0x10ee8c3f00000000, + 0x8e6d56a000000000, 0x6def48db00000000, 0xf36c924400000000, + 0xabea752d00000000, 0x3569afb200000000, 0xd6ebb1c900000000, + 0x48686b5600000000}, + {0x0000000000000000, 0xc064281700000000, 0x80c9502e00000000, + 0x40ad783900000000, 0x0093a15c00000000, 0xc0f7894b00000000, + 0x805af17200000000, 0x403ed96500000000, 0x002643b900000000, + 0xc0426bae00000000, 0x80ef139700000000, 0x408b3b8000000000, + 0x00b5e2e500000000, 0xc0d1caf200000000, 0x807cb2cb00000000, + 0x40189adc00000000, 0x414af7a900000000, 0x812edfbe00000000, + 0xc183a78700000000, 0x01e78f9000000000, 0x41d956f500000000, + 0x81bd7ee200000000, 0xc11006db00000000, 0x01742ecc00000000, + 0x416cb41000000000, 0x81089c0700000000, 0xc1a5e43e00000000, + 0x01c1cc2900000000, 0x41ff154c00000000, 0x819b3d5b00000000, + 0xc136456200000000, 0x01526d7500000000, 0xc3929f8800000000, + 0x03f6b79f00000000, 0x435bcfa600000000, 0x833fe7b100000000, + 0xc3013ed400000000, 0x036516c300000000, 0x43c86efa00000000, + 0x83ac46ed00000000, 0xc3b4dc3100000000, 0x03d0f42600000000, + 0x437d8c1f00000000, 0x8319a40800000000, 0xc3277d6d00000000, + 0x0343557a00000000, 0x43ee2d4300000000, 0x838a055400000000, + 0x82d8682100000000, 0x42bc403600000000, 0x0211380f00000000, + 0xc275101800000000, 0x824bc97d00000000, 0x422fe16a00000000, + 0x0282995300000000, 0xc2e6b14400000000, 0x82fe2b9800000000, + 0x429a038f00000000, 0x02377bb600000000, 0xc25353a100000000, + 0x826d8ac400000000, 0x4209a2d300000000, 0x02a4daea00000000, + 0xc2c0f2fd00000000, 0xc7234eca00000000, 0x074766dd00000000, + 0x47ea1ee400000000, 0x878e36f300000000, 0xc7b0ef9600000000, + 0x07d4c78100000000, 0x4779bfb800000000, 0x871d97af00000000, + 0xc7050d7300000000, 0x0761256400000000, 0x47cc5d5d00000000, + 0x87a8754a00000000, 0xc796ac2f00000000, 0x07f2843800000000, + 0x475ffc0100000000, 0x873bd41600000000, 0x8669b96300000000, + 0x460d917400000000, 0x06a0e94d00000000, 0xc6c4c15a00000000, + 0x86fa183f00000000, 0x469e302800000000, 0x0633481100000000, + 0xc657600600000000, 0x864ffada00000000, 0x462bd2cd00000000, + 0x0686aaf400000000, 0xc6e282e300000000, 0x86dc5b8600000000, + 0x46b8739100000000, 0x06150ba800000000, 0xc67123bf00000000, + 0x04b1d14200000000, 0xc4d5f95500000000, 0x8478816c00000000, + 0x441ca97b00000000, 0x0422701e00000000, 0xc446580900000000, + 0x84eb203000000000, 0x448f082700000000, 0x049792fb00000000, + 0xc4f3baec00000000, 0x845ec2d500000000, 0x443aeac200000000, + 0x040433a700000000, 0xc4601bb000000000, 0x84cd638900000000, + 0x44a94b9e00000000, 0x45fb26eb00000000, 0x859f0efc00000000, + 0xc53276c500000000, 0x05565ed200000000, 0x456887b700000000, + 0x850cafa000000000, 0xc5a1d79900000000, 0x05c5ff8e00000000, + 0x45dd655200000000, 0x85b94d4500000000, 0xc514357c00000000, + 0x05701d6b00000000, 0x454ec40e00000000, 0x852aec1900000000, + 0xc587942000000000, 0x05e3bc3700000000, 0xcf41ed4f00000000, + 0x0f25c55800000000, 0x4f88bd6100000000, 0x8fec957600000000, + 0xcfd24c1300000000, 0x0fb6640400000000, 0x4f1b1c3d00000000, + 0x8f7f342a00000000, 0xcf67aef600000000, 0x0f0386e100000000, + 0x4faefed800000000, 0x8fcad6cf00000000, 0xcff40faa00000000, + 0x0f9027bd00000000, 0x4f3d5f8400000000, 0x8f59779300000000, + 0x8e0b1ae600000000, 0x4e6f32f100000000, 0x0ec24ac800000000, + 0xcea662df00000000, 0x8e98bbba00000000, 0x4efc93ad00000000, + 0x0e51eb9400000000, 0xce35c38300000000, 0x8e2d595f00000000, + 0x4e49714800000000, 0x0ee4097100000000, 0xce80216600000000, + 0x8ebef80300000000, 0x4edad01400000000, 0x0e77a82d00000000, + 0xce13803a00000000, 0x0cd372c700000000, 0xccb75ad000000000, + 0x8c1a22e900000000, 0x4c7e0afe00000000, 0x0c40d39b00000000, + 0xcc24fb8c00000000, 0x8c8983b500000000, 0x4cedaba200000000, + 0x0cf5317e00000000, 0xcc91196900000000, 0x8c3c615000000000, + 0x4c58494700000000, 0x0c66902200000000, 0xcc02b83500000000, + 0x8cafc00c00000000, 0x4ccbe81b00000000, 0x4d99856e00000000, + 0x8dfdad7900000000, 0xcd50d54000000000, 0x0d34fd5700000000, + 0x4d0a243200000000, 0x8d6e0c2500000000, 0xcdc3741c00000000, + 0x0da75c0b00000000, 0x4dbfc6d700000000, 0x8ddbeec000000000, + 0xcd7696f900000000, 0x0d12beee00000000, 0x4d2c678b00000000, + 0x8d484f9c00000000, 0xcde537a500000000, 0x0d811fb200000000, + 0x0862a38500000000, 0xc8068b9200000000, 0x88abf3ab00000000, + 0x48cfdbbc00000000, 0x08f102d900000000, 0xc8952ace00000000, + 0x883852f700000000, 0x485c7ae000000000, 0x0844e03c00000000, + 0xc820c82b00000000, 0x888db01200000000, 0x48e9980500000000, + 0x08d7416000000000, 0xc8b3697700000000, 0x881e114e00000000, + 0x487a395900000000, 0x4928542c00000000, 0x894c7c3b00000000, + 0xc9e1040200000000, 0x09852c1500000000, 0x49bbf57000000000, + 0x89dfdd6700000000, 0xc972a55e00000000, 0x09168d4900000000, + 0x490e179500000000, 0x896a3f8200000000, 0xc9c747bb00000000, + 0x09a36fac00000000, 0x499db6c900000000, 0x89f99ede00000000, + 0xc954e6e700000000, 0x0930cef000000000, 0xcbf03c0d00000000, + 0x0b94141a00000000, 0x4b396c2300000000, 0x8b5d443400000000, + 0xcb639d5100000000, 0x0b07b54600000000, 0x4baacd7f00000000, + 0x8bcee56800000000, 0xcbd67fb400000000, 0x0bb257a300000000, + 0x4b1f2f9a00000000, 0x8b7b078d00000000, 0xcb45dee800000000, + 0x0b21f6ff00000000, 0x4b8c8ec600000000, 0x8be8a6d100000000, + 0x8abacba400000000, 0x4adee3b300000000, 0x0a739b8a00000000, + 0xca17b39d00000000, 0x8a296af800000000, 0x4a4d42ef00000000, + 0x0ae03ad600000000, 0xca8412c100000000, 0x8a9c881d00000000, + 0x4af8a00a00000000, 0x0a55d83300000000, 0xca31f02400000000, + 0x8a0f294100000000, 0x4a6b015600000000, 0x0ac6796f00000000, + 0xcaa2517800000000}, + {0x0000000000000000, 0xd4ea739b00000000, 0xe9d396ed00000000, + 0x3d39e57600000000, 0x93a15c0000000000, 0x474b2f9b00000000, + 0x7a72caed00000000, 0xae98b97600000000, 0x2643b90000000000, + 0xf2a9ca9b00000000, 0xcf902fed00000000, 0x1b7a5c7600000000, + 0xb5e2e50000000000, 0x6108969b00000000, 0x5c3173ed00000000, + 0x88db007600000000, 0x4c86720100000000, 0x986c019a00000000, + 0xa555e4ec00000000, 0x71bf977700000000, 0xdf272e0100000000, + 0x0bcd5d9a00000000, 0x36f4b8ec00000000, 0xe21ecb7700000000, + 0x6ac5cb0100000000, 0xbe2fb89a00000000, 0x83165dec00000000, + 0x57fc2e7700000000, 0xf964970100000000, 0x2d8ee49a00000000, + 0x10b701ec00000000, 0xc45d727700000000, 0x980ce50200000000, + 0x4ce6969900000000, 0x71df73ef00000000, 0xa535007400000000, + 0x0badb90200000000, 0xdf47ca9900000000, 0xe27e2fef00000000, + 0x36945c7400000000, 0xbe4f5c0200000000, 0x6aa52f9900000000, + 0x579ccaef00000000, 0x8376b97400000000, 0x2dee000200000000, + 0xf904739900000000, 0xc43d96ef00000000, 0x10d7e57400000000, + 0xd48a970300000000, 0x0060e49800000000, 0x3d5901ee00000000, + 0xe9b3727500000000, 0x472bcb0300000000, 0x93c1b89800000000, + 0xaef85dee00000000, 0x7a122e7500000000, 0xf2c92e0300000000, + 0x26235d9800000000, 0x1b1ab8ee00000000, 0xcff0cb7500000000, + 0x6168720300000000, 0xb582019800000000, 0x88bbe4ee00000000, + 0x5c51977500000000, 0x3019ca0500000000, 0xe4f3b99e00000000, + 0xd9ca5ce800000000, 0x0d202f7300000000, 0xa3b8960500000000, + 0x7752e59e00000000, 0x4a6b00e800000000, 0x9e81737300000000, + 0x165a730500000000, 0xc2b0009e00000000, 0xff89e5e800000000, + 0x2b63967300000000, 0x85fb2f0500000000, 0x51115c9e00000000, + 0x6c28b9e800000000, 0xb8c2ca7300000000, 0x7c9fb80400000000, + 0xa875cb9f00000000, 0x954c2ee900000000, 0x41a65d7200000000, + 0xef3ee40400000000, 0x3bd4979f00000000, 0x06ed72e900000000, + 0xd207017200000000, 0x5adc010400000000, 0x8e36729f00000000, + 0xb30f97e900000000, 0x67e5e47200000000, 0xc97d5d0400000000, + 0x1d972e9f00000000, 0x20aecbe900000000, 0xf444b87200000000, + 0xa8152f0700000000, 0x7cff5c9c00000000, 0x41c6b9ea00000000, + 0x952cca7100000000, 0x3bb4730700000000, 0xef5e009c00000000, + 0xd267e5ea00000000, 0x068d967100000000, 0x8e56960700000000, + 0x5abce59c00000000, 0x678500ea00000000, 0xb36f737100000000, + 0x1df7ca0700000000, 0xc91db99c00000000, 0xf4245cea00000000, + 0x20ce2f7100000000, 0xe4935d0600000000, 0x30792e9d00000000, + 0x0d40cbeb00000000, 0xd9aab87000000000, 0x7732010600000000, + 0xa3d8729d00000000, 0x9ee197eb00000000, 0x4a0be47000000000, + 0xc2d0e40600000000, 0x163a979d00000000, 0x2b0372eb00000000, + 0xffe9017000000000, 0x5171b80600000000, 0x859bcb9d00000000, + 0xb8a22eeb00000000, 0x6c485d7000000000, 0x6032940b00000000, + 0xb4d8e79000000000, 0x89e102e600000000, 0x5d0b717d00000000, + 0xf393c80b00000000, 0x2779bb9000000000, 0x1a405ee600000000, + 0xceaa2d7d00000000, 0x46712d0b00000000, 0x929b5e9000000000, + 0xafa2bbe600000000, 0x7b48c87d00000000, 0xd5d0710b00000000, + 0x013a029000000000, 0x3c03e7e600000000, 0xe8e9947d00000000, + 0x2cb4e60a00000000, 0xf85e959100000000, 0xc56770e700000000, + 0x118d037c00000000, 0xbf15ba0a00000000, 0x6bffc99100000000, + 0x56c62ce700000000, 0x822c5f7c00000000, 0x0af75f0a00000000, + 0xde1d2c9100000000, 0xe324c9e700000000, 0x37ceba7c00000000, + 0x9956030a00000000, 0x4dbc709100000000, 0x708595e700000000, + 0xa46fe67c00000000, 0xf83e710900000000, 0x2cd4029200000000, + 0x11ede7e400000000, 0xc507947f00000000, 0x6b9f2d0900000000, + 0xbf755e9200000000, 0x824cbbe400000000, 0x56a6c87f00000000, + 0xde7dc80900000000, 0x0a97bb9200000000, 0x37ae5ee400000000, + 0xe3442d7f00000000, 0x4ddc940900000000, 0x9936e79200000000, + 0xa40f02e400000000, 0x70e5717f00000000, 0xb4b8030800000000, + 0x6052709300000000, 0x5d6b95e500000000, 0x8981e67e00000000, + 0x27195f0800000000, 0xf3f32c9300000000, 0xcecac9e500000000, + 0x1a20ba7e00000000, 0x92fbba0800000000, 0x4611c99300000000, + 0x7b282ce500000000, 0xafc25f7e00000000, 0x015ae60800000000, + 0xd5b0959300000000, 0xe88970e500000000, 0x3c63037e00000000, + 0x502b5e0e00000000, 0x84c12d9500000000, 0xb9f8c8e300000000, + 0x6d12bb7800000000, 0xc38a020e00000000, 0x1760719500000000, + 0x2a5994e300000000, 0xfeb3e77800000000, 0x7668e70e00000000, + 0xa282949500000000, 0x9fbb71e300000000, 0x4b51027800000000, + 0xe5c9bb0e00000000, 0x3123c89500000000, 0x0c1a2de300000000, + 0xd8f05e7800000000, 0x1cad2c0f00000000, 0xc8475f9400000000, + 0xf57ebae200000000, 0x2194c97900000000, 0x8f0c700f00000000, + 0x5be6039400000000, 0x66dfe6e200000000, 0xb235957900000000, + 0x3aee950f00000000, 0xee04e69400000000, 0xd33d03e200000000, + 0x07d7707900000000, 0xa94fc90f00000000, 0x7da5ba9400000000, + 0x409c5fe200000000, 0x94762c7900000000, 0xc827bb0c00000000, + 0x1ccdc89700000000, 0x21f42de100000000, 0xf51e5e7a00000000, + 0x5b86e70c00000000, 0x8f6c949700000000, 0xb25571e100000000, + 0x66bf027a00000000, 0xee64020c00000000, 0x3a8e719700000000, + 0x07b794e100000000, 0xd35de77a00000000, 0x7dc55e0c00000000, + 0xa92f2d9700000000, 0x9416c8e100000000, 0x40fcbb7a00000000, + 0x84a1c90d00000000, 0x504bba9600000000, 0x6d725fe000000000, + 0xb9982c7b00000000, 0x1700950d00000000, 0xc3eae69600000000, + 0xfed303e000000000, 0x2a39707b00000000, 0xa2e2700d00000000, + 0x7608039600000000, 0x4b31e6e000000000, 0x9fdb957b00000000, + 0x31432c0d00000000, 0xe5a95f9600000000, 0xd890bae000000000, + 0x0c7ac97b00000000}, + {0x0000000000000000, 0x2765258100000000, 0x0fcc3bd900000000, + 0x28a91e5800000000, 0x5f9e066900000000, 0x78fb23e800000000, + 0x50523db000000000, 0x7737183100000000, 0xbe3c0dd200000000, + 0x9959285300000000, 0xb1f0360b00000000, 0x9695138a00000000, + 0xe1a20bbb00000000, 0xc6c72e3a00000000, 0xee6e306200000000, + 0xc90b15e300000000, 0x3d7f6b7f00000000, 0x1a1a4efe00000000, + 0x32b350a600000000, 0x15d6752700000000, 0x62e16d1600000000, + 0x4584489700000000, 0x6d2d56cf00000000, 0x4a48734e00000000, + 0x834366ad00000000, 0xa426432c00000000, 0x8c8f5d7400000000, + 0xabea78f500000000, 0xdcdd60c400000000, 0xfbb8454500000000, + 0xd3115b1d00000000, 0xf4747e9c00000000, 0x7afed6fe00000000, + 0x5d9bf37f00000000, 0x7532ed2700000000, 0x5257c8a600000000, + 0x2560d09700000000, 0x0205f51600000000, 0x2aaceb4e00000000, + 0x0dc9cecf00000000, 0xc4c2db2c00000000, 0xe3a7fead00000000, + 0xcb0ee0f500000000, 0xec6bc57400000000, 0x9b5cdd4500000000, + 0xbc39f8c400000000, 0x9490e69c00000000, 0xb3f5c31d00000000, + 0x4781bd8100000000, 0x60e4980000000000, 0x484d865800000000, + 0x6f28a3d900000000, 0x181fbbe800000000, 0x3f7a9e6900000000, + 0x17d3803100000000, 0x30b6a5b000000000, 0xf9bdb05300000000, + 0xded895d200000000, 0xf6718b8a00000000, 0xd114ae0b00000000, + 0xa623b63a00000000, 0x814693bb00000000, 0xa9ef8de300000000, + 0x8e8aa86200000000, 0xb5fadc2600000000, 0x929ff9a700000000, + 0xba36e7ff00000000, 0x9d53c27e00000000, 0xea64da4f00000000, + 0xcd01ffce00000000, 0xe5a8e19600000000, 0xc2cdc41700000000, + 0x0bc6d1f400000000, 0x2ca3f47500000000, 0x040aea2d00000000, + 0x236fcfac00000000, 0x5458d79d00000000, 0x733df21c00000000, + 0x5b94ec4400000000, 0x7cf1c9c500000000, 0x8885b75900000000, + 0xafe092d800000000, 0x87498c8000000000, 0xa02ca90100000000, + 0xd71bb13000000000, 0xf07e94b100000000, 0xd8d78ae900000000, + 0xffb2af6800000000, 0x36b9ba8b00000000, 0x11dc9f0a00000000, + 0x3975815200000000, 0x1e10a4d300000000, 0x6927bce200000000, + 0x4e42996300000000, 0x66eb873b00000000, 0x418ea2ba00000000, + 0xcf040ad800000000, 0xe8612f5900000000, 0xc0c8310100000000, + 0xe7ad148000000000, 0x909a0cb100000000, 0xb7ff293000000000, + 0x9f56376800000000, 0xb83312e900000000, 0x7138070a00000000, + 0x565d228b00000000, 0x7ef43cd300000000, 0x5991195200000000, + 0x2ea6016300000000, 0x09c324e200000000, 0x216a3aba00000000, + 0x060f1f3b00000000, 0xf27b61a700000000, 0xd51e442600000000, + 0xfdb75a7e00000000, 0xdad27fff00000000, 0xade567ce00000000, + 0x8a80424f00000000, 0xa2295c1700000000, 0x854c799600000000, + 0x4c476c7500000000, 0x6b2249f400000000, 0x438b57ac00000000, + 0x64ee722d00000000, 0x13d96a1c00000000, 0x34bc4f9d00000000, + 0x1c1551c500000000, 0x3b70744400000000, 0x6af5b94d00000000, + 0x4d909ccc00000000, 0x6539829400000000, 0x425ca71500000000, + 0x356bbf2400000000, 0x120e9aa500000000, 0x3aa784fd00000000, + 0x1dc2a17c00000000, 0xd4c9b49f00000000, 0xf3ac911e00000000, + 0xdb058f4600000000, 0xfc60aac700000000, 0x8b57b2f600000000, + 0xac32977700000000, 0x849b892f00000000, 0xa3feacae00000000, + 0x578ad23200000000, 0x70eff7b300000000, 0x5846e9eb00000000, + 0x7f23cc6a00000000, 0x0814d45b00000000, 0x2f71f1da00000000, + 0x07d8ef8200000000, 0x20bdca0300000000, 0xe9b6dfe000000000, + 0xced3fa6100000000, 0xe67ae43900000000, 0xc11fc1b800000000, + 0xb628d98900000000, 0x914dfc0800000000, 0xb9e4e25000000000, + 0x9e81c7d100000000, 0x100b6fb300000000, 0x376e4a3200000000, + 0x1fc7546a00000000, 0x38a271eb00000000, 0x4f9569da00000000, + 0x68f04c5b00000000, 0x4059520300000000, 0x673c778200000000, + 0xae37626100000000, 0x895247e000000000, 0xa1fb59b800000000, + 0x869e7c3900000000, 0xf1a9640800000000, 0xd6cc418900000000, + 0xfe655fd100000000, 0xd9007a5000000000, 0x2d7404cc00000000, + 0x0a11214d00000000, 0x22b83f1500000000, 0x05dd1a9400000000, + 0x72ea02a500000000, 0x558f272400000000, 0x7d26397c00000000, + 0x5a431cfd00000000, 0x9348091e00000000, 0xb42d2c9f00000000, + 0x9c8432c700000000, 0xbbe1174600000000, 0xccd60f7700000000, + 0xebb32af600000000, 0xc31a34ae00000000, 0xe47f112f00000000, + 0xdf0f656b00000000, 0xf86a40ea00000000, 0xd0c35eb200000000, + 0xf7a67b3300000000, 0x8091630200000000, 0xa7f4468300000000, + 0x8f5d58db00000000, 0xa8387d5a00000000, 0x613368b900000000, + 0x46564d3800000000, 0x6eff536000000000, 0x499a76e100000000, + 0x3ead6ed000000000, 0x19c84b5100000000, 0x3161550900000000, + 0x1604708800000000, 0xe2700e1400000000, 0xc5152b9500000000, + 0xedbc35cd00000000, 0xcad9104c00000000, 0xbdee087d00000000, + 0x9a8b2dfc00000000, 0xb22233a400000000, 0x9547162500000000, + 0x5c4c03c600000000, 0x7b29264700000000, 0x5380381f00000000, + 0x74e51d9e00000000, 0x03d205af00000000, 0x24b7202e00000000, + 0x0c1e3e7600000000, 0x2b7b1bf700000000, 0xa5f1b39500000000, + 0x8294961400000000, 0xaa3d884c00000000, 0x8d58adcd00000000, + 0xfa6fb5fc00000000, 0xdd0a907d00000000, 0xf5a38e2500000000, + 0xd2c6aba400000000, 0x1bcdbe4700000000, 0x3ca89bc600000000, + 0x1401859e00000000, 0x3364a01f00000000, 0x4453b82e00000000, + 0x63369daf00000000, 0x4b9f83f700000000, 0x6cfaa67600000000, + 0x988ed8ea00000000, 0xbfebfd6b00000000, 0x9742e33300000000, + 0xb027c6b200000000, 0xc710de8300000000, 0xe075fb0200000000, + 0xc8dce55a00000000, 0xefb9c0db00000000, 0x26b2d53800000000, + 0x01d7f0b900000000, 0x297eeee100000000, 0x0e1bcb6000000000, + 0x792cd35100000000, 0x5e49f6d000000000, 0x76e0e88800000000, + 0x5185cd0900000000}}; + +#else /* W == 4 */ + +local const z_crc_t FAR crc_braid_table[][256] = { + {0x00000000, 0x9ba54c6f, 0xec3b9e9f, 0x779ed2f0, 0x03063b7f, + 0x98a37710, 0xef3da5e0, 0x7498e98f, 0x060c76fe, 0x9da93a91, + 0xea37e861, 0x7192a40e, 0x050a4d81, 0x9eaf01ee, 0xe931d31e, + 0x72949f71, 0x0c18edfc, 0x97bda193, 0xe0237363, 0x7b863f0c, + 0x0f1ed683, 0x94bb9aec, 0xe325481c, 0x78800473, 0x0a149b02, + 0x91b1d76d, 0xe62f059d, 0x7d8a49f2, 0x0912a07d, 0x92b7ec12, + 0xe5293ee2, 0x7e8c728d, 0x1831dbf8, 0x83949797, 0xf40a4567, + 0x6faf0908, 0x1b37e087, 0x8092ace8, 0xf70c7e18, 0x6ca93277, + 0x1e3dad06, 0x8598e169, 0xf2063399, 0x69a37ff6, 0x1d3b9679, + 0x869eda16, 0xf10008e6, 0x6aa54489, 0x14293604, 0x8f8c7a6b, + 0xf812a89b, 0x63b7e4f4, 0x172f0d7b, 0x8c8a4114, 0xfb1493e4, + 0x60b1df8b, 0x122540fa, 0x89800c95, 0xfe1ede65, 0x65bb920a, + 0x11237b85, 0x8a8637ea, 0xfd18e51a, 0x66bda975, 0x3063b7f0, + 0xabc6fb9f, 0xdc58296f, 0x47fd6500, 0x33658c8f, 0xa8c0c0e0, + 0xdf5e1210, 0x44fb5e7f, 0x366fc10e, 0xadca8d61, 0xda545f91, + 0x41f113fe, 0x3569fa71, 0xaeccb61e, 0xd95264ee, 0x42f72881, + 0x3c7b5a0c, 0xa7de1663, 0xd040c493, 0x4be588fc, 0x3f7d6173, + 0xa4d82d1c, 0xd346ffec, 0x48e3b383, 0x3a772cf2, 0xa1d2609d, + 0xd64cb26d, 0x4de9fe02, 0x3971178d, 0xa2d45be2, 0xd54a8912, + 0x4eefc57d, 0x28526c08, 0xb3f72067, 0xc469f297, 0x5fccbef8, + 0x2b545777, 0xb0f11b18, 0xc76fc9e8, 0x5cca8587, 0x2e5e1af6, + 0xb5fb5699, 0xc2658469, 0x59c0c806, 0x2d582189, 0xb6fd6de6, + 0xc163bf16, 0x5ac6f379, 0x244a81f4, 0xbfefcd9b, 0xc8711f6b, + 0x53d45304, 0x274cba8b, 0xbce9f6e4, 0xcb772414, 0x50d2687b, + 0x2246f70a, 0xb9e3bb65, 0xce7d6995, 0x55d825fa, 0x2140cc75, + 0xbae5801a, 0xcd7b52ea, 0x56de1e85, 0x60c76fe0, 0xfb62238f, + 0x8cfcf17f, 0x1759bd10, 0x63c1549f, 0xf86418f0, 0x8ffaca00, + 0x145f866f, 0x66cb191e, 0xfd6e5571, 0x8af08781, 0x1155cbee, + 0x65cd2261, 0xfe686e0e, 0x89f6bcfe, 0x1253f091, 0x6cdf821c, + 0xf77ace73, 0x80e41c83, 0x1b4150ec, 0x6fd9b963, 0xf47cf50c, + 0x83e227fc, 0x18476b93, 0x6ad3f4e2, 0xf176b88d, 0x86e86a7d, + 0x1d4d2612, 0x69d5cf9d, 0xf27083f2, 0x85ee5102, 0x1e4b1d6d, + 0x78f6b418, 0xe353f877, 0x94cd2a87, 0x0f6866e8, 0x7bf08f67, + 0xe055c308, 0x97cb11f8, 0x0c6e5d97, 0x7efac2e6, 0xe55f8e89, + 0x92c15c79, 0x09641016, 0x7dfcf999, 0xe659b5f6, 0x91c76706, + 0x0a622b69, 0x74ee59e4, 0xef4b158b, 0x98d5c77b, 0x03708b14, + 0x77e8629b, 0xec4d2ef4, 0x9bd3fc04, 0x0076b06b, 0x72e22f1a, + 0xe9476375, 0x9ed9b185, 0x057cfdea, 0x71e41465, 0xea41580a, + 0x9ddf8afa, 0x067ac695, 0x50a4d810, 0xcb01947f, 0xbc9f468f, + 0x273a0ae0, 0x53a2e36f, 0xc807af00, 0xbf997df0, 0x243c319f, + 0x56a8aeee, 0xcd0de281, 0xba933071, 0x21367c1e, 0x55ae9591, + 0xce0bd9fe, 0xb9950b0e, 0x22304761, 0x5cbc35ec, 0xc7197983, + 0xb087ab73, 0x2b22e71c, 0x5fba0e93, 0xc41f42fc, 0xb381900c, + 0x2824dc63, 0x5ab04312, 0xc1150f7d, 0xb68bdd8d, 0x2d2e91e2, + 0x59b6786d, 0xc2133402, 0xb58de6f2, 0x2e28aa9d, 0x489503e8, + 0xd3304f87, 0xa4ae9d77, 0x3f0bd118, 0x4b933897, 0xd03674f8, + 0xa7a8a608, 0x3c0dea67, 0x4e997516, 0xd53c3979, 0xa2a2eb89, + 0x3907a7e6, 0x4d9f4e69, 0xd63a0206, 0xa1a4d0f6, 0x3a019c99, + 0x448dee14, 0xdf28a27b, 0xa8b6708b, 0x33133ce4, 0x478bd56b, + 0xdc2e9904, 0xabb04bf4, 0x3015079b, 0x428198ea, 0xd924d485, + 0xaeba0675, 0x351f4a1a, 0x4187a395, 0xda22effa, 0xadbc3d0a, + 0x36197165}, + {0x00000000, 0xc18edfc0, 0x586cb9c1, 0x99e26601, 0xb0d97382, + 0x7157ac42, 0xe8b5ca43, 0x293b1583, 0xbac3e145, 0x7b4d3e85, + 0xe2af5884, 0x23218744, 0x0a1a92c7, 0xcb944d07, 0x52762b06, + 0x93f8f4c6, 0xaef6c4cb, 0x6f781b0b, 0xf69a7d0a, 0x3714a2ca, + 0x1e2fb749, 0xdfa16889, 0x46430e88, 0x87cdd148, 0x1435258e, + 0xd5bbfa4e, 0x4c599c4f, 0x8dd7438f, 0xa4ec560c, 0x656289cc, + 0xfc80efcd, 0x3d0e300d, 0x869c8fd7, 0x47125017, 0xdef03616, + 0x1f7ee9d6, 0x3645fc55, 0xf7cb2395, 0x6e294594, 0xafa79a54, + 0x3c5f6e92, 0xfdd1b152, 0x6433d753, 0xa5bd0893, 0x8c861d10, + 0x4d08c2d0, 0xd4eaa4d1, 0x15647b11, 0x286a4b1c, 0xe9e494dc, + 0x7006f2dd, 0xb1882d1d, 0x98b3389e, 0x593de75e, 0xc0df815f, + 0x01515e9f, 0x92a9aa59, 0x53277599, 0xcac51398, 0x0b4bcc58, + 0x2270d9db, 0xe3fe061b, 0x7a1c601a, 0xbb92bfda, 0xd64819ef, + 0x17c6c62f, 0x8e24a02e, 0x4faa7fee, 0x66916a6d, 0xa71fb5ad, + 0x3efdd3ac, 0xff730c6c, 0x6c8bf8aa, 0xad05276a, 0x34e7416b, + 0xf5699eab, 0xdc528b28, 0x1ddc54e8, 0x843e32e9, 0x45b0ed29, + 0x78bedd24, 0xb93002e4, 0x20d264e5, 0xe15cbb25, 0xc867aea6, + 0x09e97166, 0x900b1767, 0x5185c8a7, 0xc27d3c61, 0x03f3e3a1, + 0x9a1185a0, 0x5b9f5a60, 0x72a44fe3, 0xb32a9023, 0x2ac8f622, + 0xeb4629e2, 0x50d49638, 0x915a49f8, 0x08b82ff9, 0xc936f039, + 0xe00de5ba, 0x21833a7a, 0xb8615c7b, 0x79ef83bb, 0xea17777d, + 0x2b99a8bd, 0xb27bcebc, 0x73f5117c, 0x5ace04ff, 0x9b40db3f, + 0x02a2bd3e, 0xc32c62fe, 0xfe2252f3, 0x3fac8d33, 0xa64eeb32, + 0x67c034f2, 0x4efb2171, 0x8f75feb1, 0x169798b0, 0xd7194770, + 0x44e1b3b6, 0x856f6c76, 0x1c8d0a77, 0xdd03d5b7, 0xf438c034, + 0x35b61ff4, 0xac5479f5, 0x6ddaa635, 0x77e1359f, 0xb66fea5f, + 0x2f8d8c5e, 0xee03539e, 0xc738461d, 0x06b699dd, 0x9f54ffdc, + 0x5eda201c, 0xcd22d4da, 0x0cac0b1a, 0x954e6d1b, 0x54c0b2db, + 0x7dfba758, 0xbc757898, 0x25971e99, 0xe419c159, 0xd917f154, + 0x18992e94, 0x817b4895, 0x40f59755, 0x69ce82d6, 0xa8405d16, + 0x31a23b17, 0xf02ce4d7, 0x63d41011, 0xa25acfd1, 0x3bb8a9d0, + 0xfa367610, 0xd30d6393, 0x1283bc53, 0x8b61da52, 0x4aef0592, + 0xf17dba48, 0x30f36588, 0xa9110389, 0x689fdc49, 0x41a4c9ca, + 0x802a160a, 0x19c8700b, 0xd846afcb, 0x4bbe5b0d, 0x8a3084cd, + 0x13d2e2cc, 0xd25c3d0c, 0xfb67288f, 0x3ae9f74f, 0xa30b914e, + 0x62854e8e, 0x5f8b7e83, 0x9e05a143, 0x07e7c742, 0xc6691882, + 0xef520d01, 0x2edcd2c1, 0xb73eb4c0, 0x76b06b00, 0xe5489fc6, + 0x24c64006, 0xbd242607, 0x7caaf9c7, 0x5591ec44, 0x941f3384, + 0x0dfd5585, 0xcc738a45, 0xa1a92c70, 0x6027f3b0, 0xf9c595b1, + 0x384b4a71, 0x11705ff2, 0xd0fe8032, 0x491ce633, 0x889239f3, + 0x1b6acd35, 0xdae412f5, 0x430674f4, 0x8288ab34, 0xabb3beb7, + 0x6a3d6177, 0xf3df0776, 0x3251d8b6, 0x0f5fe8bb, 0xced1377b, + 0x5733517a, 0x96bd8eba, 0xbf869b39, 0x7e0844f9, 0xe7ea22f8, + 0x2664fd38, 0xb59c09fe, 0x7412d63e, 0xedf0b03f, 0x2c7e6fff, + 0x05457a7c, 0xc4cba5bc, 0x5d29c3bd, 0x9ca71c7d, 0x2735a3a7, + 0xe6bb7c67, 0x7f591a66, 0xbed7c5a6, 0x97ecd025, 0x56620fe5, + 0xcf8069e4, 0x0e0eb624, 0x9df642e2, 0x5c789d22, 0xc59afb23, + 0x041424e3, 0x2d2f3160, 0xeca1eea0, 0x754388a1, 0xb4cd5761, + 0x89c3676c, 0x484db8ac, 0xd1afdead, 0x1021016d, 0x391a14ee, + 0xf894cb2e, 0x6176ad2f, 0xa0f872ef, 0x33008629, 0xf28e59e9, + 0x6b6c3fe8, 0xaae2e028, 0x83d9f5ab, 0x42572a6b, 0xdbb54c6a, + 0x1a3b93aa}, + {0x00000000, 0xefc26b3e, 0x04f5d03d, 0xeb37bb03, 0x09eba07a, + 0xe629cb44, 0x0d1e7047, 0xe2dc1b79, 0x13d740f4, 0xfc152bca, + 0x172290c9, 0xf8e0fbf7, 0x1a3ce08e, 0xf5fe8bb0, 0x1ec930b3, + 0xf10b5b8d, 0x27ae81e8, 0xc86cead6, 0x235b51d5, 0xcc993aeb, + 0x2e452192, 0xc1874aac, 0x2ab0f1af, 0xc5729a91, 0x3479c11c, + 0xdbbbaa22, 0x308c1121, 0xdf4e7a1f, 0x3d926166, 0xd2500a58, + 0x3967b15b, 0xd6a5da65, 0x4f5d03d0, 0xa09f68ee, 0x4ba8d3ed, + 0xa46ab8d3, 0x46b6a3aa, 0xa974c894, 0x42437397, 0xad8118a9, + 0x5c8a4324, 0xb348281a, 0x587f9319, 0xb7bdf827, 0x5561e35e, + 0xbaa38860, 0x51943363, 0xbe56585d, 0x68f38238, 0x8731e906, + 0x6c065205, 0x83c4393b, 0x61182242, 0x8eda497c, 0x65edf27f, + 0x8a2f9941, 0x7b24c2cc, 0x94e6a9f2, 0x7fd112f1, 0x901379cf, + 0x72cf62b6, 0x9d0d0988, 0x763ab28b, 0x99f8d9b5, 0x9eba07a0, + 0x71786c9e, 0x9a4fd79d, 0x758dbca3, 0x9751a7da, 0x7893cce4, + 0x93a477e7, 0x7c661cd9, 0x8d6d4754, 0x62af2c6a, 0x89989769, + 0x665afc57, 0x8486e72e, 0x6b448c10, 0x80733713, 0x6fb15c2d, + 0xb9148648, 0x56d6ed76, 0xbde15675, 0x52233d4b, 0xb0ff2632, + 0x5f3d4d0c, 0xb40af60f, 0x5bc89d31, 0xaac3c6bc, 0x4501ad82, + 0xae361681, 0x41f47dbf, 0xa32866c6, 0x4cea0df8, 0xa7ddb6fb, + 0x481fddc5, 0xd1e70470, 0x3e256f4e, 0xd512d44d, 0x3ad0bf73, + 0xd80ca40a, 0x37cecf34, 0xdcf97437, 0x333b1f09, 0xc2304484, + 0x2df22fba, 0xc6c594b9, 0x2907ff87, 0xcbdbe4fe, 0x24198fc0, + 0xcf2e34c3, 0x20ec5ffd, 0xf6498598, 0x198beea6, 0xf2bc55a5, + 0x1d7e3e9b, 0xffa225e2, 0x10604edc, 0xfb57f5df, 0x14959ee1, + 0xe59ec56c, 0x0a5cae52, 0xe16b1551, 0x0ea97e6f, 0xec756516, + 0x03b70e28, 0xe880b52b, 0x0742de15, 0xe6050901, 0x09c7623f, + 0xe2f0d93c, 0x0d32b202, 0xefeea97b, 0x002cc245, 0xeb1b7946, + 0x04d91278, 0xf5d249f5, 0x1a1022cb, 0xf12799c8, 0x1ee5f2f6, + 0xfc39e98f, 0x13fb82b1, 0xf8cc39b2, 0x170e528c, 0xc1ab88e9, + 0x2e69e3d7, 0xc55e58d4, 0x2a9c33ea, 0xc8402893, 0x278243ad, + 0xccb5f8ae, 0x23779390, 0xd27cc81d, 0x3dbea323, 0xd6891820, + 0x394b731e, 0xdb976867, 0x34550359, 0xdf62b85a, 0x30a0d364, + 0xa9580ad1, 0x469a61ef, 0xadaddaec, 0x426fb1d2, 0xa0b3aaab, + 0x4f71c195, 0xa4467a96, 0x4b8411a8, 0xba8f4a25, 0x554d211b, + 0xbe7a9a18, 0x51b8f126, 0xb364ea5f, 0x5ca68161, 0xb7913a62, + 0x5853515c, 0x8ef68b39, 0x6134e007, 0x8a035b04, 0x65c1303a, + 0x871d2b43, 0x68df407d, 0x83e8fb7e, 0x6c2a9040, 0x9d21cbcd, + 0x72e3a0f3, 0x99d41bf0, 0x761670ce, 0x94ca6bb7, 0x7b080089, + 0x903fbb8a, 0x7ffdd0b4, 0x78bf0ea1, 0x977d659f, 0x7c4ade9c, + 0x9388b5a2, 0x7154aedb, 0x9e96c5e5, 0x75a17ee6, 0x9a6315d8, + 0x6b684e55, 0x84aa256b, 0x6f9d9e68, 0x805ff556, 0x6283ee2f, + 0x8d418511, 0x66763e12, 0x89b4552c, 0x5f118f49, 0xb0d3e477, + 0x5be45f74, 0xb426344a, 0x56fa2f33, 0xb938440d, 0x520fff0e, + 0xbdcd9430, 0x4cc6cfbd, 0xa304a483, 0x48331f80, 0xa7f174be, + 0x452d6fc7, 0xaaef04f9, 0x41d8bffa, 0xae1ad4c4, 0x37e20d71, + 0xd820664f, 0x3317dd4c, 0xdcd5b672, 0x3e09ad0b, 0xd1cbc635, + 0x3afc7d36, 0xd53e1608, 0x24354d85, 0xcbf726bb, 0x20c09db8, + 0xcf02f686, 0x2ddeedff, 0xc21c86c1, 0x292b3dc2, 0xc6e956fc, + 0x104c8c99, 0xff8ee7a7, 0x14b95ca4, 0xfb7b379a, 0x19a72ce3, + 0xf66547dd, 0x1d52fcde, 0xf29097e0, 0x039bcc6d, 0xec59a753, + 0x076e1c50, 0xe8ac776e, 0x0a706c17, 0xe5b20729, 0x0e85bc2a, + 0xe147d714}, + {0x00000000, 0x177b1443, 0x2ef62886, 0x398d3cc5, 0x5dec510c, + 0x4a97454f, 0x731a798a, 0x64616dc9, 0xbbd8a218, 0xaca3b65b, + 0x952e8a9e, 0x82559edd, 0xe634f314, 0xf14fe757, 0xc8c2db92, + 0xdfb9cfd1, 0xacc04271, 0xbbbb5632, 0x82366af7, 0x954d7eb4, + 0xf12c137d, 0xe657073e, 0xdfda3bfb, 0xc8a12fb8, 0x1718e069, + 0x0063f42a, 0x39eec8ef, 0x2e95dcac, 0x4af4b165, 0x5d8fa526, + 0x640299e3, 0x73798da0, 0x82f182a3, 0x958a96e0, 0xac07aa25, + 0xbb7cbe66, 0xdf1dd3af, 0xc866c7ec, 0xf1ebfb29, 0xe690ef6a, + 0x392920bb, 0x2e5234f8, 0x17df083d, 0x00a41c7e, 0x64c571b7, + 0x73be65f4, 0x4a335931, 0x5d484d72, 0x2e31c0d2, 0x394ad491, + 0x00c7e854, 0x17bcfc17, 0x73dd91de, 0x64a6859d, 0x5d2bb958, + 0x4a50ad1b, 0x95e962ca, 0x82927689, 0xbb1f4a4c, 0xac645e0f, + 0xc80533c6, 0xdf7e2785, 0xe6f31b40, 0xf1880f03, 0xde920307, + 0xc9e91744, 0xf0642b81, 0xe71f3fc2, 0x837e520b, 0x94054648, + 0xad887a8d, 0xbaf36ece, 0x654aa11f, 0x7231b55c, 0x4bbc8999, + 0x5cc79dda, 0x38a6f013, 0x2fdde450, 0x1650d895, 0x012bccd6, + 0x72524176, 0x65295535, 0x5ca469f0, 0x4bdf7db3, 0x2fbe107a, + 0x38c50439, 0x014838fc, 0x16332cbf, 0xc98ae36e, 0xdef1f72d, + 0xe77ccbe8, 0xf007dfab, 0x9466b262, 0x831da621, 0xba909ae4, + 0xadeb8ea7, 0x5c6381a4, 0x4b1895e7, 0x7295a922, 0x65eebd61, + 0x018fd0a8, 0x16f4c4eb, 0x2f79f82e, 0x3802ec6d, 0xe7bb23bc, + 0xf0c037ff, 0xc94d0b3a, 0xde361f79, 0xba5772b0, 0xad2c66f3, + 0x94a15a36, 0x83da4e75, 0xf0a3c3d5, 0xe7d8d796, 0xde55eb53, + 0xc92eff10, 0xad4f92d9, 0xba34869a, 0x83b9ba5f, 0x94c2ae1c, + 0x4b7b61cd, 0x5c00758e, 0x658d494b, 0x72f65d08, 0x169730c1, + 0x01ec2482, 0x38611847, 0x2f1a0c04, 0x6655004f, 0x712e140c, + 0x48a328c9, 0x5fd83c8a, 0x3bb95143, 0x2cc24500, 0x154f79c5, + 0x02346d86, 0xdd8da257, 0xcaf6b614, 0xf37b8ad1, 0xe4009e92, + 0x8061f35b, 0x971ae718, 0xae97dbdd, 0xb9eccf9e, 0xca95423e, + 0xddee567d, 0xe4636ab8, 0xf3187efb, 0x97791332, 0x80020771, + 0xb98f3bb4, 0xaef42ff7, 0x714de026, 0x6636f465, 0x5fbbc8a0, + 0x48c0dce3, 0x2ca1b12a, 0x3bdaa569, 0x025799ac, 0x152c8def, + 0xe4a482ec, 0xf3df96af, 0xca52aa6a, 0xdd29be29, 0xb948d3e0, + 0xae33c7a3, 0x97befb66, 0x80c5ef25, 0x5f7c20f4, 0x480734b7, + 0x718a0872, 0x66f11c31, 0x029071f8, 0x15eb65bb, 0x2c66597e, + 0x3b1d4d3d, 0x4864c09d, 0x5f1fd4de, 0x6692e81b, 0x71e9fc58, + 0x15889191, 0x02f385d2, 0x3b7eb917, 0x2c05ad54, 0xf3bc6285, + 0xe4c776c6, 0xdd4a4a03, 0xca315e40, 0xae503389, 0xb92b27ca, + 0x80a61b0f, 0x97dd0f4c, 0xb8c70348, 0xafbc170b, 0x96312bce, + 0x814a3f8d, 0xe52b5244, 0xf2504607, 0xcbdd7ac2, 0xdca66e81, + 0x031fa150, 0x1464b513, 0x2de989d6, 0x3a929d95, 0x5ef3f05c, + 0x4988e41f, 0x7005d8da, 0x677ecc99, 0x14074139, 0x037c557a, + 0x3af169bf, 0x2d8a7dfc, 0x49eb1035, 0x5e900476, 0x671d38b3, + 0x70662cf0, 0xafdfe321, 0xb8a4f762, 0x8129cba7, 0x9652dfe4, + 0xf233b22d, 0xe548a66e, 0xdcc59aab, 0xcbbe8ee8, 0x3a3681eb, + 0x2d4d95a8, 0x14c0a96d, 0x03bbbd2e, 0x67dad0e7, 0x70a1c4a4, + 0x492cf861, 0x5e57ec22, 0x81ee23f3, 0x969537b0, 0xaf180b75, + 0xb8631f36, 0xdc0272ff, 0xcb7966bc, 0xf2f45a79, 0xe58f4e3a, + 0x96f6c39a, 0x818dd7d9, 0xb800eb1c, 0xaf7bff5f, 0xcb1a9296, + 0xdc6186d5, 0xe5ecba10, 0xf297ae53, 0x2d2e6182, 0x3a5575c1, + 0x03d84904, 0x14a35d47, 0x70c2308e, 0x67b924cd, 0x5e341808, + 0x494f0c4b}}; + +local const z_word_t FAR crc_braid_big_table[][256] = { + {0x00000000, 0x43147b17, 0x8628f62e, 0xc53c8d39, 0x0c51ec5d, + 0x4f45974a, 0x8a791a73, 0xc96d6164, 0x18a2d8bb, 0x5bb6a3ac, + 0x9e8a2e95, 0xdd9e5582, 0x14f334e6, 0x57e74ff1, 0x92dbc2c8, + 0xd1cfb9df, 0x7142c0ac, 0x3256bbbb, 0xf76a3682, 0xb47e4d95, + 0x7d132cf1, 0x3e0757e6, 0xfb3bdadf, 0xb82fa1c8, 0x69e01817, + 0x2af46300, 0xefc8ee39, 0xacdc952e, 0x65b1f44a, 0x26a58f5d, + 0xe3990264, 0xa08d7973, 0xa382f182, 0xe0968a95, 0x25aa07ac, + 0x66be7cbb, 0xafd31ddf, 0xecc766c8, 0x29fbebf1, 0x6aef90e6, + 0xbb202939, 0xf834522e, 0x3d08df17, 0x7e1ca400, 0xb771c564, + 0xf465be73, 0x3159334a, 0x724d485d, 0xd2c0312e, 0x91d44a39, + 0x54e8c700, 0x17fcbc17, 0xde91dd73, 0x9d85a664, 0x58b92b5d, + 0x1bad504a, 0xca62e995, 0x89769282, 0x4c4a1fbb, 0x0f5e64ac, + 0xc63305c8, 0x85277edf, 0x401bf3e6, 0x030f88f1, 0x070392de, + 0x4417e9c9, 0x812b64f0, 0xc23f1fe7, 0x0b527e83, 0x48460594, + 0x8d7a88ad, 0xce6ef3ba, 0x1fa14a65, 0x5cb53172, 0x9989bc4b, + 0xda9dc75c, 0x13f0a638, 0x50e4dd2f, 0x95d85016, 0xd6cc2b01, + 0x76415272, 0x35552965, 0xf069a45c, 0xb37ddf4b, 0x7a10be2f, + 0x3904c538, 0xfc384801, 0xbf2c3316, 0x6ee38ac9, 0x2df7f1de, + 0xe8cb7ce7, 0xabdf07f0, 0x62b26694, 0x21a61d83, 0xe49a90ba, + 0xa78eebad, 0xa481635c, 0xe795184b, 0x22a99572, 0x61bdee65, + 0xa8d08f01, 0xebc4f416, 0x2ef8792f, 0x6dec0238, 0xbc23bbe7, + 0xff37c0f0, 0x3a0b4dc9, 0x791f36de, 0xb07257ba, 0xf3662cad, + 0x365aa194, 0x754eda83, 0xd5c3a3f0, 0x96d7d8e7, 0x53eb55de, + 0x10ff2ec9, 0xd9924fad, 0x9a8634ba, 0x5fbab983, 0x1caec294, + 0xcd617b4b, 0x8e75005c, 0x4b498d65, 0x085df672, 0xc1309716, + 0x8224ec01, 0x47186138, 0x040c1a2f, 0x4f005566, 0x0c142e71, + 0xc928a348, 0x8a3cd85f, 0x4351b93b, 0x0045c22c, 0xc5794f15, + 0x866d3402, 0x57a28ddd, 0x14b6f6ca, 0xd18a7bf3, 0x929e00e4, + 0x5bf36180, 0x18e71a97, 0xdddb97ae, 0x9ecfecb9, 0x3e4295ca, + 0x7d56eedd, 0xb86a63e4, 0xfb7e18f3, 0x32137997, 0x71070280, + 0xb43b8fb9, 0xf72ff4ae, 0x26e04d71, 0x65f43666, 0xa0c8bb5f, + 0xe3dcc048, 0x2ab1a12c, 0x69a5da3b, 0xac995702, 0xef8d2c15, + 0xec82a4e4, 0xaf96dff3, 0x6aaa52ca, 0x29be29dd, 0xe0d348b9, + 0xa3c733ae, 0x66fbbe97, 0x25efc580, 0xf4207c5f, 0xb7340748, + 0x72088a71, 0x311cf166, 0xf8719002, 0xbb65eb15, 0x7e59662c, + 0x3d4d1d3b, 0x9dc06448, 0xded41f5f, 0x1be89266, 0x58fce971, + 0x91918815, 0xd285f302, 0x17b97e3b, 0x54ad052c, 0x8562bcf3, + 0xc676c7e4, 0x034a4add, 0x405e31ca, 0x893350ae, 0xca272bb9, + 0x0f1ba680, 0x4c0fdd97, 0x4803c7b8, 0x0b17bcaf, 0xce2b3196, + 0x8d3f4a81, 0x44522be5, 0x074650f2, 0xc27addcb, 0x816ea6dc, + 0x50a11f03, 0x13b56414, 0xd689e92d, 0x959d923a, 0x5cf0f35e, + 0x1fe48849, 0xdad80570, 0x99cc7e67, 0x39410714, 0x7a557c03, + 0xbf69f13a, 0xfc7d8a2d, 0x3510eb49, 0x7604905e, 0xb3381d67, + 0xf02c6670, 0x21e3dfaf, 0x62f7a4b8, 0xa7cb2981, 0xe4df5296, + 0x2db233f2, 0x6ea648e5, 0xab9ac5dc, 0xe88ebecb, 0xeb81363a, + 0xa8954d2d, 0x6da9c014, 0x2ebdbb03, 0xe7d0da67, 0xa4c4a170, + 0x61f82c49, 0x22ec575e, 0xf323ee81, 0xb0379596, 0x750b18af, + 0x361f63b8, 0xff7202dc, 0xbc6679cb, 0x795af4f2, 0x3a4e8fe5, + 0x9ac3f696, 0xd9d78d81, 0x1ceb00b8, 0x5fff7baf, 0x96921acb, + 0xd58661dc, 0x10baece5, 0x53ae97f2, 0x82612e2d, 0xc175553a, + 0x0449d803, 0x475da314, 0x8e30c270, 0xcd24b967, 0x0818345e, + 0x4b0c4f49}, + {0x00000000, 0x3e6bc2ef, 0x3dd0f504, 0x03bb37eb, 0x7aa0eb09, + 0x44cb29e6, 0x47701e0d, 0x791bdce2, 0xf440d713, 0xca2b15fc, + 0xc9902217, 0xf7fbe0f8, 0x8ee03c1a, 0xb08bfef5, 0xb330c91e, + 0x8d5b0bf1, 0xe881ae27, 0xd6ea6cc8, 0xd5515b23, 0xeb3a99cc, + 0x9221452e, 0xac4a87c1, 0xaff1b02a, 0x919a72c5, 0x1cc17934, + 0x22aabbdb, 0x21118c30, 0x1f7a4edf, 0x6661923d, 0x580a50d2, + 0x5bb16739, 0x65daa5d6, 0xd0035d4f, 0xee689fa0, 0xedd3a84b, + 0xd3b86aa4, 0xaaa3b646, 0x94c874a9, 0x97734342, 0xa91881ad, + 0x24438a5c, 0x1a2848b3, 0x19937f58, 0x27f8bdb7, 0x5ee36155, + 0x6088a3ba, 0x63339451, 0x5d5856be, 0x3882f368, 0x06e93187, + 0x0552066c, 0x3b39c483, 0x42221861, 0x7c49da8e, 0x7ff2ed65, + 0x41992f8a, 0xccc2247b, 0xf2a9e694, 0xf112d17f, 0xcf791390, + 0xb662cf72, 0x88090d9d, 0x8bb23a76, 0xb5d9f899, 0xa007ba9e, + 0x9e6c7871, 0x9dd74f9a, 0xa3bc8d75, 0xdaa75197, 0xe4cc9378, + 0xe777a493, 0xd91c667c, 0x54476d8d, 0x6a2caf62, 0x69979889, + 0x57fc5a66, 0x2ee78684, 0x108c446b, 0x13377380, 0x2d5cb16f, + 0x488614b9, 0x76edd656, 0x7556e1bd, 0x4b3d2352, 0x3226ffb0, + 0x0c4d3d5f, 0x0ff60ab4, 0x319dc85b, 0xbcc6c3aa, 0x82ad0145, + 0x811636ae, 0xbf7df441, 0xc66628a3, 0xf80dea4c, 0xfbb6dda7, + 0xc5dd1f48, 0x7004e7d1, 0x4e6f253e, 0x4dd412d5, 0x73bfd03a, + 0x0aa40cd8, 0x34cfce37, 0x3774f9dc, 0x091f3b33, 0x844430c2, + 0xba2ff22d, 0xb994c5c6, 0x87ff0729, 0xfee4dbcb, 0xc08f1924, + 0xc3342ecf, 0xfd5fec20, 0x988549f6, 0xa6ee8b19, 0xa555bcf2, + 0x9b3e7e1d, 0xe225a2ff, 0xdc4e6010, 0xdff557fb, 0xe19e9514, + 0x6cc59ee5, 0x52ae5c0a, 0x51156be1, 0x6f7ea90e, 0x166575ec, + 0x280eb703, 0x2bb580e8, 0x15de4207, 0x010905e6, 0x3f62c709, + 0x3cd9f0e2, 0x02b2320d, 0x7ba9eeef, 0x45c22c00, 0x46791beb, + 0x7812d904, 0xf549d2f5, 0xcb22101a, 0xc89927f1, 0xf6f2e51e, + 0x8fe939fc, 0xb182fb13, 0xb239ccf8, 0x8c520e17, 0xe988abc1, + 0xd7e3692e, 0xd4585ec5, 0xea339c2a, 0x932840c8, 0xad438227, + 0xaef8b5cc, 0x90937723, 0x1dc87cd2, 0x23a3be3d, 0x201889d6, + 0x1e734b39, 0x676897db, 0x59035534, 0x5ab862df, 0x64d3a030, + 0xd10a58a9, 0xef619a46, 0xecdaadad, 0xd2b16f42, 0xabaab3a0, + 0x95c1714f, 0x967a46a4, 0xa811844b, 0x254a8fba, 0x1b214d55, + 0x189a7abe, 0x26f1b851, 0x5fea64b3, 0x6181a65c, 0x623a91b7, + 0x5c515358, 0x398bf68e, 0x07e03461, 0x045b038a, 0x3a30c165, + 0x432b1d87, 0x7d40df68, 0x7efbe883, 0x40902a6c, 0xcdcb219d, + 0xf3a0e372, 0xf01bd499, 0xce701676, 0xb76bca94, 0x8900087b, + 0x8abb3f90, 0xb4d0fd7f, 0xa10ebf78, 0x9f657d97, 0x9cde4a7c, + 0xa2b58893, 0xdbae5471, 0xe5c5969e, 0xe67ea175, 0xd815639a, + 0x554e686b, 0x6b25aa84, 0x689e9d6f, 0x56f55f80, 0x2fee8362, + 0x1185418d, 0x123e7666, 0x2c55b489, 0x498f115f, 0x77e4d3b0, + 0x745fe45b, 0x4a3426b4, 0x332ffa56, 0x0d4438b9, 0x0eff0f52, + 0x3094cdbd, 0xbdcfc64c, 0x83a404a3, 0x801f3348, 0xbe74f1a7, + 0xc76f2d45, 0xf904efaa, 0xfabfd841, 0xc4d41aae, 0x710de237, + 0x4f6620d8, 0x4cdd1733, 0x72b6d5dc, 0x0bad093e, 0x35c6cbd1, + 0x367dfc3a, 0x08163ed5, 0x854d3524, 0xbb26f7cb, 0xb89dc020, + 0x86f602cf, 0xffedde2d, 0xc1861cc2, 0xc23d2b29, 0xfc56e9c6, + 0x998c4c10, 0xa7e78eff, 0xa45cb914, 0x9a377bfb, 0xe32ca719, + 0xdd4765f6, 0xdefc521d, 0xe09790f2, 0x6dcc9b03, 0x53a759ec, + 0x501c6e07, 0x6e77ace8, 0x176c700a, 0x2907b2e5, 0x2abc850e, + 0x14d747e1}, + {0x00000000, 0xc0df8ec1, 0xc1b96c58, 0x0166e299, 0x8273d9b0, + 0x42ac5771, 0x43cab5e8, 0x83153b29, 0x45e1c3ba, 0x853e4d7b, + 0x8458afe2, 0x44872123, 0xc7921a0a, 0x074d94cb, 0x062b7652, + 0xc6f4f893, 0xcbc4f6ae, 0x0b1b786f, 0x0a7d9af6, 0xcaa21437, + 0x49b72f1e, 0x8968a1df, 0x880e4346, 0x48d1cd87, 0x8e253514, + 0x4efabbd5, 0x4f9c594c, 0x8f43d78d, 0x0c56eca4, 0xcc896265, + 0xcdef80fc, 0x0d300e3d, 0xd78f9c86, 0x17501247, 0x1636f0de, + 0xd6e97e1f, 0x55fc4536, 0x9523cbf7, 0x9445296e, 0x549aa7af, + 0x926e5f3c, 0x52b1d1fd, 0x53d73364, 0x9308bda5, 0x101d868c, + 0xd0c2084d, 0xd1a4ead4, 0x117b6415, 0x1c4b6a28, 0xdc94e4e9, + 0xddf20670, 0x1d2d88b1, 0x9e38b398, 0x5ee73d59, 0x5f81dfc0, + 0x9f5e5101, 0x59aaa992, 0x99752753, 0x9813c5ca, 0x58cc4b0b, + 0xdbd97022, 0x1b06fee3, 0x1a601c7a, 0xdabf92bb, 0xef1948d6, + 0x2fc6c617, 0x2ea0248e, 0xee7faa4f, 0x6d6a9166, 0xadb51fa7, + 0xacd3fd3e, 0x6c0c73ff, 0xaaf88b6c, 0x6a2705ad, 0x6b41e734, + 0xab9e69f5, 0x288b52dc, 0xe854dc1d, 0xe9323e84, 0x29edb045, + 0x24ddbe78, 0xe40230b9, 0xe564d220, 0x25bb5ce1, 0xa6ae67c8, + 0x6671e909, 0x67170b90, 0xa7c88551, 0x613c7dc2, 0xa1e3f303, + 0xa085119a, 0x605a9f5b, 0xe34fa472, 0x23902ab3, 0x22f6c82a, + 0xe22946eb, 0x3896d450, 0xf8495a91, 0xf92fb808, 0x39f036c9, + 0xbae50de0, 0x7a3a8321, 0x7b5c61b8, 0xbb83ef79, 0x7d7717ea, + 0xbda8992b, 0xbcce7bb2, 0x7c11f573, 0xff04ce5a, 0x3fdb409b, + 0x3ebda202, 0xfe622cc3, 0xf35222fe, 0x338dac3f, 0x32eb4ea6, + 0xf234c067, 0x7121fb4e, 0xb1fe758f, 0xb0989716, 0x704719d7, + 0xb6b3e144, 0x766c6f85, 0x770a8d1c, 0xb7d503dd, 0x34c038f4, + 0xf41fb635, 0xf57954ac, 0x35a6da6d, 0x9f35e177, 0x5fea6fb6, + 0x5e8c8d2f, 0x9e5303ee, 0x1d4638c7, 0xdd99b606, 0xdcff549f, + 0x1c20da5e, 0xdad422cd, 0x1a0bac0c, 0x1b6d4e95, 0xdbb2c054, + 0x58a7fb7d, 0x987875bc, 0x991e9725, 0x59c119e4, 0x54f117d9, + 0x942e9918, 0x95487b81, 0x5597f540, 0xd682ce69, 0x165d40a8, + 0x173ba231, 0xd7e42cf0, 0x1110d463, 0xd1cf5aa2, 0xd0a9b83b, + 0x107636fa, 0x93630dd3, 0x53bc8312, 0x52da618b, 0x9205ef4a, + 0x48ba7df1, 0x8865f330, 0x890311a9, 0x49dc9f68, 0xcac9a441, + 0x0a162a80, 0x0b70c819, 0xcbaf46d8, 0x0d5bbe4b, 0xcd84308a, + 0xcce2d213, 0x0c3d5cd2, 0x8f2867fb, 0x4ff7e93a, 0x4e910ba3, + 0x8e4e8562, 0x837e8b5f, 0x43a1059e, 0x42c7e707, 0x821869c6, + 0x010d52ef, 0xc1d2dc2e, 0xc0b43eb7, 0x006bb076, 0xc69f48e5, + 0x0640c624, 0x072624bd, 0xc7f9aa7c, 0x44ec9155, 0x84331f94, + 0x8555fd0d, 0x458a73cc, 0x702ca9a1, 0xb0f32760, 0xb195c5f9, + 0x714a4b38, 0xf25f7011, 0x3280fed0, 0x33e61c49, 0xf3399288, + 0x35cd6a1b, 0xf512e4da, 0xf4740643, 0x34ab8882, 0xb7beb3ab, + 0x77613d6a, 0x7607dff3, 0xb6d85132, 0xbbe85f0f, 0x7b37d1ce, + 0x7a513357, 0xba8ebd96, 0x399b86bf, 0xf944087e, 0xf822eae7, + 0x38fd6426, 0xfe099cb5, 0x3ed61274, 0x3fb0f0ed, 0xff6f7e2c, + 0x7c7a4505, 0xbca5cbc4, 0xbdc3295d, 0x7d1ca79c, 0xa7a33527, + 0x677cbbe6, 0x661a597f, 0xa6c5d7be, 0x25d0ec97, 0xe50f6256, + 0xe46980cf, 0x24b60e0e, 0xe242f69d, 0x229d785c, 0x23fb9ac5, + 0xe3241404, 0x60312f2d, 0xa0eea1ec, 0xa1884375, 0x6157cdb4, + 0x6c67c389, 0xacb84d48, 0xaddeafd1, 0x6d012110, 0xee141a39, + 0x2ecb94f8, 0x2fad7661, 0xef72f8a0, 0x29860033, 0xe9598ef2, + 0xe83f6c6b, 0x28e0e2aa, 0xabf5d983, 0x6b2a5742, 0x6a4cb5db, + 0xaa933b1a}, + {0x00000000, 0x6f4ca59b, 0x9f9e3bec, 0xf0d29e77, 0x7f3b0603, + 0x1077a398, 0xe0a53def, 0x8fe99874, 0xfe760c06, 0x913aa99d, + 0x61e837ea, 0x0ea49271, 0x814d0a05, 0xee01af9e, 0x1ed331e9, + 0x719f9472, 0xfced180c, 0x93a1bd97, 0x637323e0, 0x0c3f867b, + 0x83d61e0f, 0xec9abb94, 0x1c4825e3, 0x73048078, 0x029b140a, + 0x6dd7b191, 0x9d052fe6, 0xf2498a7d, 0x7da01209, 0x12ecb792, + 0xe23e29e5, 0x8d728c7e, 0xf8db3118, 0x97979483, 0x67450af4, + 0x0809af6f, 0x87e0371b, 0xe8ac9280, 0x187e0cf7, 0x7732a96c, + 0x06ad3d1e, 0x69e19885, 0x993306f2, 0xf67fa369, 0x79963b1d, + 0x16da9e86, 0xe60800f1, 0x8944a56a, 0x04362914, 0x6b7a8c8f, + 0x9ba812f8, 0xf4e4b763, 0x7b0d2f17, 0x14418a8c, 0xe49314fb, + 0x8bdfb160, 0xfa402512, 0x950c8089, 0x65de1efe, 0x0a92bb65, + 0x857b2311, 0xea37868a, 0x1ae518fd, 0x75a9bd66, 0xf0b76330, + 0x9ffbc6ab, 0x6f2958dc, 0x0065fd47, 0x8f8c6533, 0xe0c0c0a8, + 0x10125edf, 0x7f5efb44, 0x0ec16f36, 0x618dcaad, 0x915f54da, + 0xfe13f141, 0x71fa6935, 0x1eb6ccae, 0xee6452d9, 0x8128f742, + 0x0c5a7b3c, 0x6316dea7, 0x93c440d0, 0xfc88e54b, 0x73617d3f, + 0x1c2dd8a4, 0xecff46d3, 0x83b3e348, 0xf22c773a, 0x9d60d2a1, + 0x6db24cd6, 0x02fee94d, 0x8d177139, 0xe25bd4a2, 0x12894ad5, + 0x7dc5ef4e, 0x086c5228, 0x6720f7b3, 0x97f269c4, 0xf8becc5f, + 0x7757542b, 0x181bf1b0, 0xe8c96fc7, 0x8785ca5c, 0xf61a5e2e, + 0x9956fbb5, 0x698465c2, 0x06c8c059, 0x8921582d, 0xe66dfdb6, + 0x16bf63c1, 0x79f3c65a, 0xf4814a24, 0x9bcdefbf, 0x6b1f71c8, + 0x0453d453, 0x8bba4c27, 0xe4f6e9bc, 0x142477cb, 0x7b68d250, + 0x0af74622, 0x65bbe3b9, 0x95697dce, 0xfa25d855, 0x75cc4021, + 0x1a80e5ba, 0xea527bcd, 0x851ede56, 0xe06fc760, 0x8f2362fb, + 0x7ff1fc8c, 0x10bd5917, 0x9f54c163, 0xf01864f8, 0x00cafa8f, + 0x6f865f14, 0x1e19cb66, 0x71556efd, 0x8187f08a, 0xeecb5511, + 0x6122cd65, 0x0e6e68fe, 0xfebcf689, 0x91f05312, 0x1c82df6c, + 0x73ce7af7, 0x831ce480, 0xec50411b, 0x63b9d96f, 0x0cf57cf4, + 0xfc27e283, 0x936b4718, 0xe2f4d36a, 0x8db876f1, 0x7d6ae886, + 0x12264d1d, 0x9dcfd569, 0xf28370f2, 0x0251ee85, 0x6d1d4b1e, + 0x18b4f678, 0x77f853e3, 0x872acd94, 0xe866680f, 0x678ff07b, + 0x08c355e0, 0xf811cb97, 0x975d6e0c, 0xe6c2fa7e, 0x898e5fe5, + 0x795cc192, 0x16106409, 0x99f9fc7d, 0xf6b559e6, 0x0667c791, + 0x692b620a, 0xe459ee74, 0x8b154bef, 0x7bc7d598, 0x148b7003, + 0x9b62e877, 0xf42e4dec, 0x04fcd39b, 0x6bb07600, 0x1a2fe272, + 0x756347e9, 0x85b1d99e, 0xeafd7c05, 0x6514e471, 0x0a5841ea, + 0xfa8adf9d, 0x95c67a06, 0x10d8a450, 0x7f9401cb, 0x8f469fbc, + 0xe00a3a27, 0x6fe3a253, 0x00af07c8, 0xf07d99bf, 0x9f313c24, + 0xeeaea856, 0x81e20dcd, 0x713093ba, 0x1e7c3621, 0x9195ae55, + 0xfed90bce, 0x0e0b95b9, 0x61473022, 0xec35bc5c, 0x837919c7, + 0x73ab87b0, 0x1ce7222b, 0x930eba5f, 0xfc421fc4, 0x0c9081b3, + 0x63dc2428, 0x1243b05a, 0x7d0f15c1, 0x8ddd8bb6, 0xe2912e2d, + 0x6d78b659, 0x023413c2, 0xf2e68db5, 0x9daa282e, 0xe8039548, + 0x874f30d3, 0x779daea4, 0x18d10b3f, 0x9738934b, 0xf87436d0, + 0x08a6a8a7, 0x67ea0d3c, 0x1675994e, 0x79393cd5, 0x89eba2a2, + 0xe6a70739, 0x694e9f4d, 0x06023ad6, 0xf6d0a4a1, 0x999c013a, + 0x14ee8d44, 0x7ba228df, 0x8b70b6a8, 0xe43c1333, 0x6bd58b47, + 0x04992edc, 0xf44bb0ab, 0x9b071530, 0xea988142, 0x85d424d9, + 0x7506baae, 0x1a4a1f35, 0x95a38741, 0xfaef22da, 0x0a3dbcad, + 0x65711936}}; + +#endif + +#endif + +#if N == 4 + +#if W == 8 + +local const z_crc_t FAR crc_braid_table[][256] = { + {0x00000000, 0xf1da05aa, 0x38c50d15, 0xc91f08bf, 0x718a1a2a, + 0x80501f80, 0x494f173f, 0xb8951295, 0xe3143454, 0x12ce31fe, + 0xdbd13941, 0x2a0b3ceb, 0x929e2e7e, 0x63442bd4, 0xaa5b236b, + 0x5b8126c1, 0x1d596ee9, 0xec836b43, 0x259c63fc, 0xd4466656, + 0x6cd374c3, 0x9d097169, 0x541679d6, 0xa5cc7c7c, 0xfe4d5abd, + 0x0f975f17, 0xc68857a8, 0x37525202, 0x8fc74097, 0x7e1d453d, + 0xb7024d82, 0x46d84828, 0x3ab2ddd2, 0xcb68d878, 0x0277d0c7, + 0xf3add56d, 0x4b38c7f8, 0xbae2c252, 0x73fdcaed, 0x8227cf47, + 0xd9a6e986, 0x287cec2c, 0xe163e493, 0x10b9e139, 0xa82cf3ac, + 0x59f6f606, 0x90e9feb9, 0x6133fb13, 0x27ebb33b, 0xd631b691, + 0x1f2ebe2e, 0xeef4bb84, 0x5661a911, 0xa7bbacbb, 0x6ea4a404, + 0x9f7ea1ae, 0xc4ff876f, 0x352582c5, 0xfc3a8a7a, 0x0de08fd0, + 0xb5759d45, 0x44af98ef, 0x8db09050, 0x7c6a95fa, 0x7565bba4, + 0x84bfbe0e, 0x4da0b6b1, 0xbc7ab31b, 0x04efa18e, 0xf535a424, + 0x3c2aac9b, 0xcdf0a931, 0x96718ff0, 0x67ab8a5a, 0xaeb482e5, + 0x5f6e874f, 0xe7fb95da, 0x16219070, 0xdf3e98cf, 0x2ee49d65, + 0x683cd54d, 0x99e6d0e7, 0x50f9d858, 0xa123ddf2, 0x19b6cf67, + 0xe86ccacd, 0x2173c272, 0xd0a9c7d8, 0x8b28e119, 0x7af2e4b3, + 0xb3edec0c, 0x4237e9a6, 0xfaa2fb33, 0x0b78fe99, 0xc267f626, + 0x33bdf38c, 0x4fd76676, 0xbe0d63dc, 0x77126b63, 0x86c86ec9, + 0x3e5d7c5c, 0xcf8779f6, 0x06987149, 0xf74274e3, 0xacc35222, + 0x5d195788, 0x94065f37, 0x65dc5a9d, 0xdd494808, 0x2c934da2, + 0xe58c451d, 0x145640b7, 0x528e089f, 0xa3540d35, 0x6a4b058a, + 0x9b910020, 0x230412b5, 0xd2de171f, 0x1bc11fa0, 0xea1b1a0a, + 0xb19a3ccb, 0x40403961, 0x895f31de, 0x78853474, 0xc01026e1, + 0x31ca234b, 0xf8d52bf4, 0x090f2e5e, 0xeacb7748, 0x1b1172e2, + 0xd20e7a5d, 0x23d47ff7, 0x9b416d62, 0x6a9b68c8, 0xa3846077, + 0x525e65dd, 0x09df431c, 0xf80546b6, 0x311a4e09, 0xc0c04ba3, + 0x78555936, 0x898f5c9c, 0x40905423, 0xb14a5189, 0xf79219a1, + 0x06481c0b, 0xcf5714b4, 0x3e8d111e, 0x8618038b, 0x77c20621, + 0xbedd0e9e, 0x4f070b34, 0x14862df5, 0xe55c285f, 0x2c4320e0, + 0xdd99254a, 0x650c37df, 0x94d63275, 0x5dc93aca, 0xac133f60, + 0xd079aa9a, 0x21a3af30, 0xe8bca78f, 0x1966a225, 0xa1f3b0b0, + 0x5029b51a, 0x9936bda5, 0x68ecb80f, 0x336d9ece, 0xc2b79b64, + 0x0ba893db, 0xfa729671, 0x42e784e4, 0xb33d814e, 0x7a2289f1, + 0x8bf88c5b, 0xcd20c473, 0x3cfac1d9, 0xf5e5c966, 0x043fcccc, + 0xbcaade59, 0x4d70dbf3, 0x846fd34c, 0x75b5d6e6, 0x2e34f027, + 0xdfeef58d, 0x16f1fd32, 0xe72bf898, 0x5fbeea0d, 0xae64efa7, + 0x677be718, 0x96a1e2b2, 0x9faeccec, 0x6e74c946, 0xa76bc1f9, + 0x56b1c453, 0xee24d6c6, 0x1ffed36c, 0xd6e1dbd3, 0x273bde79, + 0x7cbaf8b8, 0x8d60fd12, 0x447ff5ad, 0xb5a5f007, 0x0d30e292, + 0xfceae738, 0x35f5ef87, 0xc42fea2d, 0x82f7a205, 0x732da7af, + 0xba32af10, 0x4be8aaba, 0xf37db82f, 0x02a7bd85, 0xcbb8b53a, + 0x3a62b090, 0x61e39651, 0x903993fb, 0x59269b44, 0xa8fc9eee, + 0x10698c7b, 0xe1b389d1, 0x28ac816e, 0xd97684c4, 0xa51c113e, + 0x54c61494, 0x9dd91c2b, 0x6c031981, 0xd4960b14, 0x254c0ebe, + 0xec530601, 0x1d8903ab, 0x4608256a, 0xb7d220c0, 0x7ecd287f, + 0x8f172dd5, 0x37823f40, 0xc6583aea, 0x0f473255, 0xfe9d37ff, + 0xb8457fd7, 0x499f7a7d, 0x808072c2, 0x715a7768, 0xc9cf65fd, + 0x38156057, 0xf10a68e8, 0x00d06d42, 0x5b514b83, 0xaa8b4e29, + 0x63944696, 0x924e433c, 0x2adb51a9, 0xdb015403, 0x121e5cbc, + 0xe3c45916}, + {0x00000000, 0x0ee7e8d1, 0x1dcfd1a2, 0x13283973, 0x3b9fa344, + 0x35784b95, 0x265072e6, 0x28b79a37, 0x773f4688, 0x79d8ae59, + 0x6af0972a, 0x64177ffb, 0x4ca0e5cc, 0x42470d1d, 0x516f346e, + 0x5f88dcbf, 0xee7e8d10, 0xe09965c1, 0xf3b15cb2, 0xfd56b463, + 0xd5e12e54, 0xdb06c685, 0xc82efff6, 0xc6c91727, 0x9941cb98, + 0x97a62349, 0x848e1a3a, 0x8a69f2eb, 0xa2de68dc, 0xac39800d, + 0xbf11b97e, 0xb1f651af, 0x078c1c61, 0x096bf4b0, 0x1a43cdc3, + 0x14a42512, 0x3c13bf25, 0x32f457f4, 0x21dc6e87, 0x2f3b8656, + 0x70b35ae9, 0x7e54b238, 0x6d7c8b4b, 0x639b639a, 0x4b2cf9ad, + 0x45cb117c, 0x56e3280f, 0x5804c0de, 0xe9f29171, 0xe71579a0, + 0xf43d40d3, 0xfadaa802, 0xd26d3235, 0xdc8adae4, 0xcfa2e397, + 0xc1450b46, 0x9ecdd7f9, 0x902a3f28, 0x8302065b, 0x8de5ee8a, + 0xa55274bd, 0xabb59c6c, 0xb89da51f, 0xb67a4dce, 0x0f1838c2, + 0x01ffd013, 0x12d7e960, 0x1c3001b1, 0x34879b86, 0x3a607357, + 0x29484a24, 0x27afa2f5, 0x78277e4a, 0x76c0969b, 0x65e8afe8, + 0x6b0f4739, 0x43b8dd0e, 0x4d5f35df, 0x5e770cac, 0x5090e47d, + 0xe166b5d2, 0xef815d03, 0xfca96470, 0xf24e8ca1, 0xdaf91696, + 0xd41efe47, 0xc736c734, 0xc9d12fe5, 0x9659f35a, 0x98be1b8b, + 0x8b9622f8, 0x8571ca29, 0xadc6501e, 0xa321b8cf, 0xb00981bc, + 0xbeee696d, 0x089424a3, 0x0673cc72, 0x155bf501, 0x1bbc1dd0, + 0x330b87e7, 0x3dec6f36, 0x2ec45645, 0x2023be94, 0x7fab622b, + 0x714c8afa, 0x6264b389, 0x6c835b58, 0x4434c16f, 0x4ad329be, + 0x59fb10cd, 0x571cf81c, 0xe6eaa9b3, 0xe80d4162, 0xfb257811, + 0xf5c290c0, 0xdd750af7, 0xd392e226, 0xc0badb55, 0xce5d3384, + 0x91d5ef3b, 0x9f3207ea, 0x8c1a3e99, 0x82fdd648, 0xaa4a4c7f, + 0xa4ada4ae, 0xb7859ddd, 0xb962750c, 0x1e307184, 0x10d79955, + 0x03ffa026, 0x0d1848f7, 0x25afd2c0, 0x2b483a11, 0x38600362, + 0x3687ebb3, 0x690f370c, 0x67e8dfdd, 0x74c0e6ae, 0x7a270e7f, + 0x52909448, 0x5c777c99, 0x4f5f45ea, 0x41b8ad3b, 0xf04efc94, + 0xfea91445, 0xed812d36, 0xe366c5e7, 0xcbd15fd0, 0xc536b701, + 0xd61e8e72, 0xd8f966a3, 0x8771ba1c, 0x899652cd, 0x9abe6bbe, + 0x9459836f, 0xbcee1958, 0xb209f189, 0xa121c8fa, 0xafc6202b, + 0x19bc6de5, 0x175b8534, 0x0473bc47, 0x0a945496, 0x2223cea1, + 0x2cc42670, 0x3fec1f03, 0x310bf7d2, 0x6e832b6d, 0x6064c3bc, + 0x734cfacf, 0x7dab121e, 0x551c8829, 0x5bfb60f8, 0x48d3598b, + 0x4634b15a, 0xf7c2e0f5, 0xf9250824, 0xea0d3157, 0xe4ead986, + 0xcc5d43b1, 0xc2baab60, 0xd1929213, 0xdf757ac2, 0x80fda67d, + 0x8e1a4eac, 0x9d3277df, 0x93d59f0e, 0xbb620539, 0xb585ede8, + 0xa6add49b, 0xa84a3c4a, 0x11284946, 0x1fcfa197, 0x0ce798e4, + 0x02007035, 0x2ab7ea02, 0x245002d3, 0x37783ba0, 0x399fd371, + 0x66170fce, 0x68f0e71f, 0x7bd8de6c, 0x753f36bd, 0x5d88ac8a, + 0x536f445b, 0x40477d28, 0x4ea095f9, 0xff56c456, 0xf1b12c87, + 0xe29915f4, 0xec7efd25, 0xc4c96712, 0xca2e8fc3, 0xd906b6b0, + 0xd7e15e61, 0x886982de, 0x868e6a0f, 0x95a6537c, 0x9b41bbad, + 0xb3f6219a, 0xbd11c94b, 0xae39f038, 0xa0de18e9, 0x16a45527, + 0x1843bdf6, 0x0b6b8485, 0x058c6c54, 0x2d3bf663, 0x23dc1eb2, + 0x30f427c1, 0x3e13cf10, 0x619b13af, 0x6f7cfb7e, 0x7c54c20d, + 0x72b32adc, 0x5a04b0eb, 0x54e3583a, 0x47cb6149, 0x492c8998, + 0xf8dad837, 0xf63d30e6, 0xe5150995, 0xebf2e144, 0xc3457b73, + 0xcda293a2, 0xde8aaad1, 0xd06d4200, 0x8fe59ebf, 0x8102766e, + 0x922a4f1d, 0x9ccda7cc, 0xb47a3dfb, 0xba9dd52a, 0xa9b5ec59, + 0xa7520488}, + {0x00000000, 0x3c60e308, 0x78c1c610, 0x44a12518, 0xf1838c20, + 0xcde36f28, 0x89424a30, 0xb522a938, 0x38761e01, 0x0416fd09, + 0x40b7d811, 0x7cd73b19, 0xc9f59221, 0xf5957129, 0xb1345431, + 0x8d54b739, 0x70ec3c02, 0x4c8cdf0a, 0x082dfa12, 0x344d191a, + 0x816fb022, 0xbd0f532a, 0xf9ae7632, 0xc5ce953a, 0x489a2203, + 0x74fac10b, 0x305be413, 0x0c3b071b, 0xb919ae23, 0x85794d2b, + 0xc1d86833, 0xfdb88b3b, 0xe1d87804, 0xddb89b0c, 0x9919be14, + 0xa5795d1c, 0x105bf424, 0x2c3b172c, 0x689a3234, 0x54fad13c, + 0xd9ae6605, 0xe5ce850d, 0xa16fa015, 0x9d0f431d, 0x282dea25, + 0x144d092d, 0x50ec2c35, 0x6c8ccf3d, 0x91344406, 0xad54a70e, + 0xe9f58216, 0xd595611e, 0x60b7c826, 0x5cd72b2e, 0x18760e36, + 0x2416ed3e, 0xa9425a07, 0x9522b90f, 0xd1839c17, 0xede37f1f, + 0x58c1d627, 0x64a1352f, 0x20001037, 0x1c60f33f, 0x18c1f649, + 0x24a11541, 0x60003059, 0x5c60d351, 0xe9427a69, 0xd5229961, + 0x9183bc79, 0xade35f71, 0x20b7e848, 0x1cd70b40, 0x58762e58, + 0x6416cd50, 0xd1346468, 0xed548760, 0xa9f5a278, 0x95954170, + 0x682dca4b, 0x544d2943, 0x10ec0c5b, 0x2c8cef53, 0x99ae466b, + 0xa5cea563, 0xe16f807b, 0xdd0f6373, 0x505bd44a, 0x6c3b3742, + 0x289a125a, 0x14faf152, 0xa1d8586a, 0x9db8bb62, 0xd9199e7a, + 0xe5797d72, 0xf9198e4d, 0xc5796d45, 0x81d8485d, 0xbdb8ab55, + 0x089a026d, 0x34fae165, 0x705bc47d, 0x4c3b2775, 0xc16f904c, + 0xfd0f7344, 0xb9ae565c, 0x85ceb554, 0x30ec1c6c, 0x0c8cff64, + 0x482dda7c, 0x744d3974, 0x89f5b24f, 0xb5955147, 0xf134745f, + 0xcd549757, 0x78763e6f, 0x4416dd67, 0x00b7f87f, 0x3cd71b77, + 0xb183ac4e, 0x8de34f46, 0xc9426a5e, 0xf5228956, 0x4000206e, + 0x7c60c366, 0x38c1e67e, 0x04a10576, 0x3183ec92, 0x0de30f9a, + 0x49422a82, 0x7522c98a, 0xc00060b2, 0xfc6083ba, 0xb8c1a6a2, + 0x84a145aa, 0x09f5f293, 0x3595119b, 0x71343483, 0x4d54d78b, + 0xf8767eb3, 0xc4169dbb, 0x80b7b8a3, 0xbcd75bab, 0x416fd090, + 0x7d0f3398, 0x39ae1680, 0x05cef588, 0xb0ec5cb0, 0x8c8cbfb8, + 0xc82d9aa0, 0xf44d79a8, 0x7919ce91, 0x45792d99, 0x01d80881, + 0x3db8eb89, 0x889a42b1, 0xb4faa1b9, 0xf05b84a1, 0xcc3b67a9, + 0xd05b9496, 0xec3b779e, 0xa89a5286, 0x94fab18e, 0x21d818b6, + 0x1db8fbbe, 0x5919dea6, 0x65793dae, 0xe82d8a97, 0xd44d699f, + 0x90ec4c87, 0xac8caf8f, 0x19ae06b7, 0x25cee5bf, 0x616fc0a7, + 0x5d0f23af, 0xa0b7a894, 0x9cd74b9c, 0xd8766e84, 0xe4168d8c, + 0x513424b4, 0x6d54c7bc, 0x29f5e2a4, 0x159501ac, 0x98c1b695, + 0xa4a1559d, 0xe0007085, 0xdc60938d, 0x69423ab5, 0x5522d9bd, + 0x1183fca5, 0x2de31fad, 0x29421adb, 0x1522f9d3, 0x5183dccb, + 0x6de33fc3, 0xd8c196fb, 0xe4a175f3, 0xa00050eb, 0x9c60b3e3, + 0x113404da, 0x2d54e7d2, 0x69f5c2ca, 0x559521c2, 0xe0b788fa, + 0xdcd76bf2, 0x98764eea, 0xa416ade2, 0x59ae26d9, 0x65cec5d1, + 0x216fe0c9, 0x1d0f03c1, 0xa82daaf9, 0x944d49f1, 0xd0ec6ce9, + 0xec8c8fe1, 0x61d838d8, 0x5db8dbd0, 0x1919fec8, 0x25791dc0, + 0x905bb4f8, 0xac3b57f0, 0xe89a72e8, 0xd4fa91e0, 0xc89a62df, + 0xf4fa81d7, 0xb05ba4cf, 0x8c3b47c7, 0x3919eeff, 0x05790df7, + 0x41d828ef, 0x7db8cbe7, 0xf0ec7cde, 0xcc8c9fd6, 0x882dbace, + 0xb44d59c6, 0x016ff0fe, 0x3d0f13f6, 0x79ae36ee, 0x45ced5e6, + 0xb8765edd, 0x8416bdd5, 0xc0b798cd, 0xfcd77bc5, 0x49f5d2fd, + 0x759531f5, 0x313414ed, 0x0d54f7e5, 0x800040dc, 0xbc60a3d4, + 0xf8c186cc, 0xc4a165c4, 0x7183ccfc, 0x4de32ff4, 0x09420aec, + 0x3522e9e4}, + {0x00000000, 0x6307d924, 0xc60fb248, 0xa5086b6c, 0x576e62d1, + 0x3469bbf5, 0x9161d099, 0xf26609bd, 0xaedcc5a2, 0xcddb1c86, + 0x68d377ea, 0x0bd4aece, 0xf9b2a773, 0x9ab57e57, 0x3fbd153b, + 0x5cbacc1f, 0x86c88d05, 0xe5cf5421, 0x40c73f4d, 0x23c0e669, + 0xd1a6efd4, 0xb2a136f0, 0x17a95d9c, 0x74ae84b8, 0x281448a7, + 0x4b139183, 0xee1bfaef, 0x8d1c23cb, 0x7f7a2a76, 0x1c7df352, + 0xb975983e, 0xda72411a, 0xd6e01c4b, 0xb5e7c56f, 0x10efae03, + 0x73e87727, 0x818e7e9a, 0xe289a7be, 0x4781ccd2, 0x248615f6, + 0x783cd9e9, 0x1b3b00cd, 0xbe336ba1, 0xdd34b285, 0x2f52bb38, + 0x4c55621c, 0xe95d0970, 0x8a5ad054, 0x5028914e, 0x332f486a, + 0x96272306, 0xf520fa22, 0x0746f39f, 0x64412abb, 0xc14941d7, + 0xa24e98f3, 0xfef454ec, 0x9df38dc8, 0x38fbe6a4, 0x5bfc3f80, + 0xa99a363d, 0xca9def19, 0x6f958475, 0x0c925d51, 0x76b13ed7, + 0x15b6e7f3, 0xb0be8c9f, 0xd3b955bb, 0x21df5c06, 0x42d88522, + 0xe7d0ee4e, 0x84d7376a, 0xd86dfb75, 0xbb6a2251, 0x1e62493d, + 0x7d659019, 0x8f0399a4, 0xec044080, 0x490c2bec, 0x2a0bf2c8, + 0xf079b3d2, 0x937e6af6, 0x3676019a, 0x5571d8be, 0xa717d103, + 0xc4100827, 0x6118634b, 0x021fba6f, 0x5ea57670, 0x3da2af54, + 0x98aac438, 0xfbad1d1c, 0x09cb14a1, 0x6acccd85, 0xcfc4a6e9, + 0xacc37fcd, 0xa051229c, 0xc356fbb8, 0x665e90d4, 0x055949f0, + 0xf73f404d, 0x94389969, 0x3130f205, 0x52372b21, 0x0e8de73e, + 0x6d8a3e1a, 0xc8825576, 0xab858c52, 0x59e385ef, 0x3ae45ccb, + 0x9fec37a7, 0xfcebee83, 0x2699af99, 0x459e76bd, 0xe0961dd1, + 0x8391c4f5, 0x71f7cd48, 0x12f0146c, 0xb7f87f00, 0xd4ffa624, + 0x88456a3b, 0xeb42b31f, 0x4e4ad873, 0x2d4d0157, 0xdf2b08ea, + 0xbc2cd1ce, 0x1924baa2, 0x7a236386, 0xed627dae, 0x8e65a48a, + 0x2b6dcfe6, 0x486a16c2, 0xba0c1f7f, 0xd90bc65b, 0x7c03ad37, + 0x1f047413, 0x43beb80c, 0x20b96128, 0x85b10a44, 0xe6b6d360, + 0x14d0dadd, 0x77d703f9, 0xd2df6895, 0xb1d8b1b1, 0x6baaf0ab, + 0x08ad298f, 0xada542e3, 0xcea29bc7, 0x3cc4927a, 0x5fc34b5e, + 0xfacb2032, 0x99ccf916, 0xc5763509, 0xa671ec2d, 0x03798741, + 0x607e5e65, 0x921857d8, 0xf11f8efc, 0x5417e590, 0x37103cb4, + 0x3b8261e5, 0x5885b8c1, 0xfd8dd3ad, 0x9e8a0a89, 0x6cec0334, + 0x0febda10, 0xaae3b17c, 0xc9e46858, 0x955ea447, 0xf6597d63, + 0x5351160f, 0x3056cf2b, 0xc230c696, 0xa1371fb2, 0x043f74de, + 0x6738adfa, 0xbd4aece0, 0xde4d35c4, 0x7b455ea8, 0x1842878c, + 0xea248e31, 0x89235715, 0x2c2b3c79, 0x4f2ce55d, 0x13962942, + 0x7091f066, 0xd5999b0a, 0xb69e422e, 0x44f84b93, 0x27ff92b7, + 0x82f7f9db, 0xe1f020ff, 0x9bd34379, 0xf8d49a5d, 0x5ddcf131, + 0x3edb2815, 0xccbd21a8, 0xafbaf88c, 0x0ab293e0, 0x69b54ac4, + 0x350f86db, 0x56085fff, 0xf3003493, 0x9007edb7, 0x6261e40a, + 0x01663d2e, 0xa46e5642, 0xc7698f66, 0x1d1bce7c, 0x7e1c1758, + 0xdb147c34, 0xb813a510, 0x4a75acad, 0x29727589, 0x8c7a1ee5, + 0xef7dc7c1, 0xb3c70bde, 0xd0c0d2fa, 0x75c8b996, 0x16cf60b2, + 0xe4a9690f, 0x87aeb02b, 0x22a6db47, 0x41a10263, 0x4d335f32, + 0x2e348616, 0x8b3ced7a, 0xe83b345e, 0x1a5d3de3, 0x795ae4c7, + 0xdc528fab, 0xbf55568f, 0xe3ef9a90, 0x80e843b4, 0x25e028d8, + 0x46e7f1fc, 0xb481f841, 0xd7862165, 0x728e4a09, 0x1189932d, + 0xcbfbd237, 0xa8fc0b13, 0x0df4607f, 0x6ef3b95b, 0x9c95b0e6, + 0xff9269c2, 0x5a9a02ae, 0x399ddb8a, 0x65271795, 0x0620ceb1, + 0xa328a5dd, 0xc02f7cf9, 0x32497544, 0x514eac60, 0xf446c70c, + 0x97411e28}, + {0x00000000, 0x01b5fd1d, 0x036bfa3a, 0x02de0727, 0x06d7f474, + 0x07620969, 0x05bc0e4e, 0x0409f353, 0x0dafe8e8, 0x0c1a15f5, + 0x0ec412d2, 0x0f71efcf, 0x0b781c9c, 0x0acde181, 0x0813e6a6, + 0x09a61bbb, 0x1b5fd1d0, 0x1aea2ccd, 0x18342bea, 0x1981d6f7, + 0x1d8825a4, 0x1c3dd8b9, 0x1ee3df9e, 0x1f562283, 0x16f03938, + 0x1745c425, 0x159bc302, 0x142e3e1f, 0x1027cd4c, 0x11923051, + 0x134c3776, 0x12f9ca6b, 0x36bfa3a0, 0x370a5ebd, 0x35d4599a, + 0x3461a487, 0x306857d4, 0x31ddaac9, 0x3303adee, 0x32b650f3, + 0x3b104b48, 0x3aa5b655, 0x387bb172, 0x39ce4c6f, 0x3dc7bf3c, + 0x3c724221, 0x3eac4506, 0x3f19b81b, 0x2de07270, 0x2c558f6d, + 0x2e8b884a, 0x2f3e7557, 0x2b378604, 0x2a827b19, 0x285c7c3e, + 0x29e98123, 0x204f9a98, 0x21fa6785, 0x232460a2, 0x22919dbf, + 0x26986eec, 0x272d93f1, 0x25f394d6, 0x244669cb, 0x6d7f4740, + 0x6ccaba5d, 0x6e14bd7a, 0x6fa14067, 0x6ba8b334, 0x6a1d4e29, + 0x68c3490e, 0x6976b413, 0x60d0afa8, 0x616552b5, 0x63bb5592, + 0x620ea88f, 0x66075bdc, 0x67b2a6c1, 0x656ca1e6, 0x64d95cfb, + 0x76209690, 0x77956b8d, 0x754b6caa, 0x74fe91b7, 0x70f762e4, + 0x71429ff9, 0x739c98de, 0x722965c3, 0x7b8f7e78, 0x7a3a8365, + 0x78e48442, 0x7951795f, 0x7d588a0c, 0x7ced7711, 0x7e337036, + 0x7f868d2b, 0x5bc0e4e0, 0x5a7519fd, 0x58ab1eda, 0x591ee3c7, + 0x5d171094, 0x5ca2ed89, 0x5e7ceaae, 0x5fc917b3, 0x566f0c08, + 0x57daf115, 0x5504f632, 0x54b10b2f, 0x50b8f87c, 0x510d0561, + 0x53d30246, 0x5266ff5b, 0x409f3530, 0x412ac82d, 0x43f4cf0a, + 0x42413217, 0x4648c144, 0x47fd3c59, 0x45233b7e, 0x4496c663, + 0x4d30ddd8, 0x4c8520c5, 0x4e5b27e2, 0x4feedaff, 0x4be729ac, + 0x4a52d4b1, 0x488cd396, 0x49392e8b, 0xdafe8e80, 0xdb4b739d, + 0xd99574ba, 0xd82089a7, 0xdc297af4, 0xdd9c87e9, 0xdf4280ce, + 0xdef77dd3, 0xd7516668, 0xd6e49b75, 0xd43a9c52, 0xd58f614f, + 0xd186921c, 0xd0336f01, 0xd2ed6826, 0xd358953b, 0xc1a15f50, + 0xc014a24d, 0xc2caa56a, 0xc37f5877, 0xc776ab24, 0xc6c35639, + 0xc41d511e, 0xc5a8ac03, 0xcc0eb7b8, 0xcdbb4aa5, 0xcf654d82, + 0xced0b09f, 0xcad943cc, 0xcb6cbed1, 0xc9b2b9f6, 0xc80744eb, + 0xec412d20, 0xedf4d03d, 0xef2ad71a, 0xee9f2a07, 0xea96d954, + 0xeb232449, 0xe9fd236e, 0xe848de73, 0xe1eec5c8, 0xe05b38d5, + 0xe2853ff2, 0xe330c2ef, 0xe73931bc, 0xe68ccca1, 0xe452cb86, + 0xe5e7369b, 0xf71efcf0, 0xf6ab01ed, 0xf47506ca, 0xf5c0fbd7, + 0xf1c90884, 0xf07cf599, 0xf2a2f2be, 0xf3170fa3, 0xfab11418, + 0xfb04e905, 0xf9daee22, 0xf86f133f, 0xfc66e06c, 0xfdd31d71, + 0xff0d1a56, 0xfeb8e74b, 0xb781c9c0, 0xb63434dd, 0xb4ea33fa, + 0xb55fcee7, 0xb1563db4, 0xb0e3c0a9, 0xb23dc78e, 0xb3883a93, + 0xba2e2128, 0xbb9bdc35, 0xb945db12, 0xb8f0260f, 0xbcf9d55c, + 0xbd4c2841, 0xbf922f66, 0xbe27d27b, 0xacde1810, 0xad6be50d, + 0xafb5e22a, 0xae001f37, 0xaa09ec64, 0xabbc1179, 0xa962165e, + 0xa8d7eb43, 0xa171f0f8, 0xa0c40de5, 0xa21a0ac2, 0xa3aff7df, + 0xa7a6048c, 0xa613f991, 0xa4cdfeb6, 0xa57803ab, 0x813e6a60, + 0x808b977d, 0x8255905a, 0x83e06d47, 0x87e99e14, 0x865c6309, + 0x8482642e, 0x85379933, 0x8c918288, 0x8d247f95, 0x8ffa78b2, + 0x8e4f85af, 0x8a4676fc, 0x8bf38be1, 0x892d8cc6, 0x889871db, + 0x9a61bbb0, 0x9bd446ad, 0x990a418a, 0x98bfbc97, 0x9cb64fc4, + 0x9d03b2d9, 0x9fddb5fe, 0x9e6848e3, 0x97ce5358, 0x967bae45, + 0x94a5a962, 0x9510547f, 0x9119a72c, 0x90ac5a31, 0x92725d16, + 0x93c7a00b}, + {0x00000000, 0x6e8c1b41, 0xdd183682, 0xb3942dc3, 0x61416b45, + 0x0fcd7004, 0xbc595dc7, 0xd2d54686, 0xc282d68a, 0xac0ecdcb, + 0x1f9ae008, 0x7116fb49, 0xa3c3bdcf, 0xcd4fa68e, 0x7edb8b4d, + 0x1057900c, 0x5e74ab55, 0x30f8b014, 0x836c9dd7, 0xede08696, + 0x3f35c010, 0x51b9db51, 0xe22df692, 0x8ca1edd3, 0x9cf67ddf, + 0xf27a669e, 0x41ee4b5d, 0x2f62501c, 0xfdb7169a, 0x933b0ddb, + 0x20af2018, 0x4e233b59, 0xbce956aa, 0xd2654deb, 0x61f16028, + 0x0f7d7b69, 0xdda83def, 0xb32426ae, 0x00b00b6d, 0x6e3c102c, + 0x7e6b8020, 0x10e79b61, 0xa373b6a2, 0xcdffade3, 0x1f2aeb65, + 0x71a6f024, 0xc232dde7, 0xacbec6a6, 0xe29dfdff, 0x8c11e6be, + 0x3f85cb7d, 0x5109d03c, 0x83dc96ba, 0xed508dfb, 0x5ec4a038, + 0x3048bb79, 0x201f2b75, 0x4e933034, 0xfd071df7, 0x938b06b6, + 0x415e4030, 0x2fd25b71, 0x9c4676b2, 0xf2ca6df3, 0xa2a3ab15, + 0xcc2fb054, 0x7fbb9d97, 0x113786d6, 0xc3e2c050, 0xad6edb11, + 0x1efaf6d2, 0x7076ed93, 0x60217d9f, 0x0ead66de, 0xbd394b1d, + 0xd3b5505c, 0x016016da, 0x6fec0d9b, 0xdc782058, 0xb2f43b19, + 0xfcd70040, 0x925b1b01, 0x21cf36c2, 0x4f432d83, 0x9d966b05, + 0xf31a7044, 0x408e5d87, 0x2e0246c6, 0x3e55d6ca, 0x50d9cd8b, + 0xe34de048, 0x8dc1fb09, 0x5f14bd8f, 0x3198a6ce, 0x820c8b0d, + 0xec80904c, 0x1e4afdbf, 0x70c6e6fe, 0xc352cb3d, 0xadded07c, + 0x7f0b96fa, 0x11878dbb, 0xa213a078, 0xcc9fbb39, 0xdcc82b35, + 0xb2443074, 0x01d01db7, 0x6f5c06f6, 0xbd894070, 0xd3055b31, + 0x609176f2, 0x0e1d6db3, 0x403e56ea, 0x2eb24dab, 0x9d266068, + 0xf3aa7b29, 0x217f3daf, 0x4ff326ee, 0xfc670b2d, 0x92eb106c, + 0x82bc8060, 0xec309b21, 0x5fa4b6e2, 0x3128ada3, 0xe3fdeb25, + 0x8d71f064, 0x3ee5dda7, 0x5069c6e6, 0x9e36506b, 0xf0ba4b2a, + 0x432e66e9, 0x2da27da8, 0xff773b2e, 0x91fb206f, 0x226f0dac, + 0x4ce316ed, 0x5cb486e1, 0x32389da0, 0x81acb063, 0xef20ab22, + 0x3df5eda4, 0x5379f6e5, 0xe0eddb26, 0x8e61c067, 0xc042fb3e, + 0xaecee07f, 0x1d5acdbc, 0x73d6d6fd, 0xa103907b, 0xcf8f8b3a, + 0x7c1ba6f9, 0x1297bdb8, 0x02c02db4, 0x6c4c36f5, 0xdfd81b36, + 0xb1540077, 0x638146f1, 0x0d0d5db0, 0xbe997073, 0xd0156b32, + 0x22df06c1, 0x4c531d80, 0xffc73043, 0x914b2b02, 0x439e6d84, + 0x2d1276c5, 0x9e865b06, 0xf00a4047, 0xe05dd04b, 0x8ed1cb0a, + 0x3d45e6c9, 0x53c9fd88, 0x811cbb0e, 0xef90a04f, 0x5c048d8c, + 0x328896cd, 0x7cabad94, 0x1227b6d5, 0xa1b39b16, 0xcf3f8057, + 0x1deac6d1, 0x7366dd90, 0xc0f2f053, 0xae7eeb12, 0xbe297b1e, + 0xd0a5605f, 0x63314d9c, 0x0dbd56dd, 0xdf68105b, 0xb1e40b1a, + 0x027026d9, 0x6cfc3d98, 0x3c95fb7e, 0x5219e03f, 0xe18dcdfc, + 0x8f01d6bd, 0x5dd4903b, 0x33588b7a, 0x80cca6b9, 0xee40bdf8, + 0xfe172df4, 0x909b36b5, 0x230f1b76, 0x4d830037, 0x9f5646b1, + 0xf1da5df0, 0x424e7033, 0x2cc26b72, 0x62e1502b, 0x0c6d4b6a, + 0xbff966a9, 0xd1757de8, 0x03a03b6e, 0x6d2c202f, 0xdeb80dec, + 0xb03416ad, 0xa06386a1, 0xceef9de0, 0x7d7bb023, 0x13f7ab62, + 0xc122ede4, 0xafaef6a5, 0x1c3adb66, 0x72b6c027, 0x807cadd4, + 0xeef0b695, 0x5d649b56, 0x33e88017, 0xe13dc691, 0x8fb1ddd0, + 0x3c25f013, 0x52a9eb52, 0x42fe7b5e, 0x2c72601f, 0x9fe64ddc, + 0xf16a569d, 0x23bf101b, 0x4d330b5a, 0xfea72699, 0x902b3dd8, + 0xde080681, 0xb0841dc0, 0x03103003, 0x6d9c2b42, 0xbf496dc4, + 0xd1c57685, 0x62515b46, 0x0cdd4007, 0x1c8ad00b, 0x7206cb4a, + 0xc192e689, 0xaf1efdc8, 0x7dcbbb4e, 0x1347a00f, 0xa0d38dcc, + 0xce5f968d}, + {0x00000000, 0xe71da697, 0x154a4b6f, 0xf257edf8, 0x2a9496de, + 0xcd893049, 0x3fdeddb1, 0xd8c37b26, 0x55292dbc, 0xb2348b2b, + 0x406366d3, 0xa77ec044, 0x7fbdbb62, 0x98a01df5, 0x6af7f00d, + 0x8dea569a, 0xaa525b78, 0x4d4ffdef, 0xbf181017, 0x5805b680, + 0x80c6cda6, 0x67db6b31, 0x958c86c9, 0x7291205e, 0xff7b76c4, + 0x1866d053, 0xea313dab, 0x0d2c9b3c, 0xd5efe01a, 0x32f2468d, + 0xc0a5ab75, 0x27b80de2, 0x8fd5b0b1, 0x68c81626, 0x9a9ffbde, + 0x7d825d49, 0xa541266f, 0x425c80f8, 0xb00b6d00, 0x5716cb97, + 0xdafc9d0d, 0x3de13b9a, 0xcfb6d662, 0x28ab70f5, 0xf0680bd3, + 0x1775ad44, 0xe52240bc, 0x023fe62b, 0x2587ebc9, 0xc29a4d5e, + 0x30cda0a6, 0xd7d00631, 0x0f137d17, 0xe80edb80, 0x1a593678, + 0xfd4490ef, 0x70aec675, 0x97b360e2, 0x65e48d1a, 0x82f92b8d, + 0x5a3a50ab, 0xbd27f63c, 0x4f701bc4, 0xa86dbd53, 0xc4da6723, + 0x23c7c1b4, 0xd1902c4c, 0x368d8adb, 0xee4ef1fd, 0x0953576a, + 0xfb04ba92, 0x1c191c05, 0x91f34a9f, 0x76eeec08, 0x84b901f0, + 0x63a4a767, 0xbb67dc41, 0x5c7a7ad6, 0xae2d972e, 0x493031b9, + 0x6e883c5b, 0x89959acc, 0x7bc27734, 0x9cdfd1a3, 0x441caa85, + 0xa3010c12, 0x5156e1ea, 0xb64b477d, 0x3ba111e7, 0xdcbcb770, + 0x2eeb5a88, 0xc9f6fc1f, 0x11358739, 0xf62821ae, 0x047fcc56, + 0xe3626ac1, 0x4b0fd792, 0xac127105, 0x5e459cfd, 0xb9583a6a, + 0x619b414c, 0x8686e7db, 0x74d10a23, 0x93ccacb4, 0x1e26fa2e, + 0xf93b5cb9, 0x0b6cb141, 0xec7117d6, 0x34b26cf0, 0xd3afca67, + 0x21f8279f, 0xc6e58108, 0xe15d8cea, 0x06402a7d, 0xf417c785, + 0x130a6112, 0xcbc91a34, 0x2cd4bca3, 0xde83515b, 0x399ef7cc, + 0xb474a156, 0x536907c1, 0xa13eea39, 0x46234cae, 0x9ee03788, + 0x79fd911f, 0x8baa7ce7, 0x6cb7da70, 0x52c5c807, 0xb5d86e90, + 0x478f8368, 0xa09225ff, 0x78515ed9, 0x9f4cf84e, 0x6d1b15b6, + 0x8a06b321, 0x07ece5bb, 0xe0f1432c, 0x12a6aed4, 0xf5bb0843, + 0x2d787365, 0xca65d5f2, 0x3832380a, 0xdf2f9e9d, 0xf897937f, + 0x1f8a35e8, 0xedddd810, 0x0ac07e87, 0xd20305a1, 0x351ea336, + 0xc7494ece, 0x2054e859, 0xadbebec3, 0x4aa31854, 0xb8f4f5ac, + 0x5fe9533b, 0x872a281d, 0x60378e8a, 0x92606372, 0x757dc5e5, + 0xdd1078b6, 0x3a0dde21, 0xc85a33d9, 0x2f47954e, 0xf784ee68, + 0x109948ff, 0xe2cea507, 0x05d30390, 0x8839550a, 0x6f24f39d, + 0x9d731e65, 0x7a6eb8f2, 0xa2adc3d4, 0x45b06543, 0xb7e788bb, + 0x50fa2e2c, 0x774223ce, 0x905f8559, 0x620868a1, 0x8515ce36, + 0x5dd6b510, 0xbacb1387, 0x489cfe7f, 0xaf8158e8, 0x226b0e72, + 0xc576a8e5, 0x3721451d, 0xd03ce38a, 0x08ff98ac, 0xefe23e3b, + 0x1db5d3c3, 0xfaa87554, 0x961faf24, 0x710209b3, 0x8355e44b, + 0x644842dc, 0xbc8b39fa, 0x5b969f6d, 0xa9c17295, 0x4edcd402, + 0xc3368298, 0x242b240f, 0xd67cc9f7, 0x31616f60, 0xe9a21446, + 0x0ebfb2d1, 0xfce85f29, 0x1bf5f9be, 0x3c4df45c, 0xdb5052cb, + 0x2907bf33, 0xce1a19a4, 0x16d96282, 0xf1c4c415, 0x039329ed, + 0xe48e8f7a, 0x6964d9e0, 0x8e797f77, 0x7c2e928f, 0x9b333418, + 0x43f04f3e, 0xa4ede9a9, 0x56ba0451, 0xb1a7a2c6, 0x19ca1f95, + 0xfed7b902, 0x0c8054fa, 0xeb9df26d, 0x335e894b, 0xd4432fdc, + 0x2614c224, 0xc10964b3, 0x4ce33229, 0xabfe94be, 0x59a97946, + 0xbeb4dfd1, 0x6677a4f7, 0x816a0260, 0x733def98, 0x9420490f, + 0xb39844ed, 0x5485e27a, 0xa6d20f82, 0x41cfa915, 0x990cd233, + 0x7e1174a4, 0x8c46995c, 0x6b5b3fcb, 0xe6b16951, 0x01accfc6, + 0xf3fb223e, 0x14e684a9, 0xcc25ff8f, 0x2b385918, 0xd96fb4e0, + 0x3e721277}, + {0x00000000, 0xa58b900e, 0x9066265d, 0x35edb653, 0xfbbd4afb, + 0x5e36daf5, 0x6bdb6ca6, 0xce50fca8, 0x2c0b93b7, 0x898003b9, + 0xbc6db5ea, 0x19e625e4, 0xd7b6d94c, 0x723d4942, 0x47d0ff11, + 0xe25b6f1f, 0x5817276e, 0xfd9cb760, 0xc8710133, 0x6dfa913d, + 0xa3aa6d95, 0x0621fd9b, 0x33cc4bc8, 0x9647dbc6, 0x741cb4d9, + 0xd19724d7, 0xe47a9284, 0x41f1028a, 0x8fa1fe22, 0x2a2a6e2c, + 0x1fc7d87f, 0xba4c4871, 0xb02e4edc, 0x15a5ded2, 0x20486881, + 0x85c3f88f, 0x4b930427, 0xee189429, 0xdbf5227a, 0x7e7eb274, + 0x9c25dd6b, 0x39ae4d65, 0x0c43fb36, 0xa9c86b38, 0x67989790, + 0xc213079e, 0xf7feb1cd, 0x527521c3, 0xe83969b2, 0x4db2f9bc, + 0x785f4fef, 0xddd4dfe1, 0x13842349, 0xb60fb347, 0x83e20514, + 0x2669951a, 0xc432fa05, 0x61b96a0b, 0x5454dc58, 0xf1df4c56, + 0x3f8fb0fe, 0x9a0420f0, 0xafe996a3, 0x0a6206ad, 0xbb2d9bf9, + 0x1ea60bf7, 0x2b4bbda4, 0x8ec02daa, 0x4090d102, 0xe51b410c, + 0xd0f6f75f, 0x757d6751, 0x9726084e, 0x32ad9840, 0x07402e13, + 0xa2cbbe1d, 0x6c9b42b5, 0xc910d2bb, 0xfcfd64e8, 0x5976f4e6, + 0xe33abc97, 0x46b12c99, 0x735c9aca, 0xd6d70ac4, 0x1887f66c, + 0xbd0c6662, 0x88e1d031, 0x2d6a403f, 0xcf312f20, 0x6ababf2e, + 0x5f57097d, 0xfadc9973, 0x348c65db, 0x9107f5d5, 0xa4ea4386, + 0x0161d388, 0x0b03d525, 0xae88452b, 0x9b65f378, 0x3eee6376, + 0xf0be9fde, 0x55350fd0, 0x60d8b983, 0xc553298d, 0x27084692, + 0x8283d69c, 0xb76e60cf, 0x12e5f0c1, 0xdcb50c69, 0x793e9c67, + 0x4cd32a34, 0xe958ba3a, 0x5314f24b, 0xf69f6245, 0xc372d416, + 0x66f94418, 0xa8a9b8b0, 0x0d2228be, 0x38cf9eed, 0x9d440ee3, + 0x7f1f61fc, 0xda94f1f2, 0xef7947a1, 0x4af2d7af, 0x84a22b07, + 0x2129bb09, 0x14c40d5a, 0xb14f9d54, 0xad2a31b3, 0x08a1a1bd, + 0x3d4c17ee, 0x98c787e0, 0x56977b48, 0xf31ceb46, 0xc6f15d15, + 0x637acd1b, 0x8121a204, 0x24aa320a, 0x11478459, 0xb4cc1457, + 0x7a9ce8ff, 0xdf1778f1, 0xeafacea2, 0x4f715eac, 0xf53d16dd, + 0x50b686d3, 0x655b3080, 0xc0d0a08e, 0x0e805c26, 0xab0bcc28, + 0x9ee67a7b, 0x3b6dea75, 0xd936856a, 0x7cbd1564, 0x4950a337, + 0xecdb3339, 0x228bcf91, 0x87005f9f, 0xb2ede9cc, 0x176679c2, + 0x1d047f6f, 0xb88fef61, 0x8d625932, 0x28e9c93c, 0xe6b93594, + 0x4332a59a, 0x76df13c9, 0xd35483c7, 0x310fecd8, 0x94847cd6, + 0xa169ca85, 0x04e25a8b, 0xcab2a623, 0x6f39362d, 0x5ad4807e, + 0xff5f1070, 0x45135801, 0xe098c80f, 0xd5757e5c, 0x70feee52, + 0xbeae12fa, 0x1b2582f4, 0x2ec834a7, 0x8b43a4a9, 0x6918cbb6, + 0xcc935bb8, 0xf97eedeb, 0x5cf57de5, 0x92a5814d, 0x372e1143, + 0x02c3a710, 0xa748371e, 0x1607aa4a, 0xb38c3a44, 0x86618c17, + 0x23ea1c19, 0xedbae0b1, 0x483170bf, 0x7ddcc6ec, 0xd85756e2, + 0x3a0c39fd, 0x9f87a9f3, 0xaa6a1fa0, 0x0fe18fae, 0xc1b17306, + 0x643ae308, 0x51d7555b, 0xf45cc555, 0x4e108d24, 0xeb9b1d2a, + 0xde76ab79, 0x7bfd3b77, 0xb5adc7df, 0x102657d1, 0x25cbe182, + 0x8040718c, 0x621b1e93, 0xc7908e9d, 0xf27d38ce, 0x57f6a8c0, + 0x99a65468, 0x3c2dc466, 0x09c07235, 0xac4be23b, 0xa629e496, + 0x03a27498, 0x364fc2cb, 0x93c452c5, 0x5d94ae6d, 0xf81f3e63, + 0xcdf28830, 0x6879183e, 0x8a227721, 0x2fa9e72f, 0x1a44517c, + 0xbfcfc172, 0x719f3dda, 0xd414add4, 0xe1f91b87, 0x44728b89, + 0xfe3ec3f8, 0x5bb553f6, 0x6e58e5a5, 0xcbd375ab, 0x05838903, + 0xa008190d, 0x95e5af5e, 0x306e3f50, 0xd235504f, 0x77bec041, + 0x42537612, 0xe7d8e61c, 0x29881ab4, 0x8c038aba, 0xb9ee3ce9, + 0x1c65ace7}}; + +local const z_word_t FAR crc_braid_big_table[][256] = { + {0x0000000000000000, 0x0e908ba500000000, 0x5d26669000000000, + 0x53b6ed3500000000, 0xfb4abdfb00000000, 0xf5da365e00000000, + 0xa66cdb6b00000000, 0xa8fc50ce00000000, 0xb7930b2c00000000, + 0xb903808900000000, 0xeab56dbc00000000, 0xe425e61900000000, + 0x4cd9b6d700000000, 0x42493d7200000000, 0x11ffd04700000000, + 0x1f6f5be200000000, 0x6e27175800000000, 0x60b79cfd00000000, + 0x330171c800000000, 0x3d91fa6d00000000, 0x956daaa300000000, + 0x9bfd210600000000, 0xc84bcc3300000000, 0xc6db479600000000, + 0xd9b41c7400000000, 0xd72497d100000000, 0x84927ae400000000, + 0x8a02f14100000000, 0x22fea18f00000000, 0x2c6e2a2a00000000, + 0x7fd8c71f00000000, 0x71484cba00000000, 0xdc4e2eb000000000, + 0xd2dea51500000000, 0x8168482000000000, 0x8ff8c38500000000, + 0x2704934b00000000, 0x299418ee00000000, 0x7a22f5db00000000, + 0x74b27e7e00000000, 0x6bdd259c00000000, 0x654dae3900000000, + 0x36fb430c00000000, 0x386bc8a900000000, 0x9097986700000000, + 0x9e0713c200000000, 0xcdb1fef700000000, 0xc321755200000000, + 0xb26939e800000000, 0xbcf9b24d00000000, 0xef4f5f7800000000, + 0xe1dfd4dd00000000, 0x4923841300000000, 0x47b30fb600000000, + 0x1405e28300000000, 0x1a95692600000000, 0x05fa32c400000000, + 0x0b6ab96100000000, 0x58dc545400000000, 0x564cdff100000000, + 0xfeb08f3f00000000, 0xf020049a00000000, 0xa396e9af00000000, + 0xad06620a00000000, 0xf99b2dbb00000000, 0xf70ba61e00000000, + 0xa4bd4b2b00000000, 0xaa2dc08e00000000, 0x02d1904000000000, + 0x0c411be500000000, 0x5ff7f6d000000000, 0x51677d7500000000, + 0x4e08269700000000, 0x4098ad3200000000, 0x132e400700000000, + 0x1dbecba200000000, 0xb5429b6c00000000, 0xbbd210c900000000, + 0xe864fdfc00000000, 0xe6f4765900000000, 0x97bc3ae300000000, + 0x992cb14600000000, 0xca9a5c7300000000, 0xc40ad7d600000000, + 0x6cf6871800000000, 0x62660cbd00000000, 0x31d0e18800000000, + 0x3f406a2d00000000, 0x202f31cf00000000, 0x2ebfba6a00000000, + 0x7d09575f00000000, 0x7399dcfa00000000, 0xdb658c3400000000, + 0xd5f5079100000000, 0x8643eaa400000000, 0x88d3610100000000, + 0x25d5030b00000000, 0x2b4588ae00000000, 0x78f3659b00000000, + 0x7663ee3e00000000, 0xde9fbef000000000, 0xd00f355500000000, + 0x83b9d86000000000, 0x8d2953c500000000, 0x9246082700000000, + 0x9cd6838200000000, 0xcf606eb700000000, 0xc1f0e51200000000, + 0x690cb5dc00000000, 0x679c3e7900000000, 0x342ad34c00000000, + 0x3aba58e900000000, 0x4bf2145300000000, 0x45629ff600000000, + 0x16d472c300000000, 0x1844f96600000000, 0xb0b8a9a800000000, + 0xbe28220d00000000, 0xed9ecf3800000000, 0xe30e449d00000000, + 0xfc611f7f00000000, 0xf2f194da00000000, 0xa14779ef00000000, + 0xafd7f24a00000000, 0x072ba28400000000, 0x09bb292100000000, + 0x5a0dc41400000000, 0x549d4fb100000000, 0xb3312aad00000000, + 0xbda1a10800000000, 0xee174c3d00000000, 0xe087c79800000000, + 0x487b975600000000, 0x46eb1cf300000000, 0x155df1c600000000, + 0x1bcd7a6300000000, 0x04a2218100000000, 0x0a32aa2400000000, + 0x5984471100000000, 0x5714ccb400000000, 0xffe89c7a00000000, + 0xf17817df00000000, 0xa2cefaea00000000, 0xac5e714f00000000, + 0xdd163df500000000, 0xd386b65000000000, 0x80305b6500000000, + 0x8ea0d0c000000000, 0x265c800e00000000, 0x28cc0bab00000000, + 0x7b7ae69e00000000, 0x75ea6d3b00000000, 0x6a8536d900000000, + 0x6415bd7c00000000, 0x37a3504900000000, 0x3933dbec00000000, + 0x91cf8b2200000000, 0x9f5f008700000000, 0xcce9edb200000000, + 0xc279661700000000, 0x6f7f041d00000000, 0x61ef8fb800000000, + 0x3259628d00000000, 0x3cc9e92800000000, 0x9435b9e600000000, + 0x9aa5324300000000, 0xc913df7600000000, 0xc78354d300000000, + 0xd8ec0f3100000000, 0xd67c849400000000, 0x85ca69a100000000, + 0x8b5ae20400000000, 0x23a6b2ca00000000, 0x2d36396f00000000, + 0x7e80d45a00000000, 0x70105fff00000000, 0x0158134500000000, + 0x0fc898e000000000, 0x5c7e75d500000000, 0x52eefe7000000000, + 0xfa12aebe00000000, 0xf482251b00000000, 0xa734c82e00000000, + 0xa9a4438b00000000, 0xb6cb186900000000, 0xb85b93cc00000000, + 0xebed7ef900000000, 0xe57df55c00000000, 0x4d81a59200000000, + 0x43112e3700000000, 0x10a7c30200000000, 0x1e3748a700000000, + 0x4aaa071600000000, 0x443a8cb300000000, 0x178c618600000000, + 0x191cea2300000000, 0xb1e0baed00000000, 0xbf70314800000000, + 0xecc6dc7d00000000, 0xe25657d800000000, 0xfd390c3a00000000, + 0xf3a9879f00000000, 0xa01f6aaa00000000, 0xae8fe10f00000000, + 0x0673b1c100000000, 0x08e33a6400000000, 0x5b55d75100000000, + 0x55c55cf400000000, 0x248d104e00000000, 0x2a1d9beb00000000, + 0x79ab76de00000000, 0x773bfd7b00000000, 0xdfc7adb500000000, + 0xd157261000000000, 0x82e1cb2500000000, 0x8c71408000000000, + 0x931e1b6200000000, 0x9d8e90c700000000, 0xce387df200000000, + 0xc0a8f65700000000, 0x6854a69900000000, 0x66c42d3c00000000, + 0x3572c00900000000, 0x3be24bac00000000, 0x96e429a600000000, + 0x9874a20300000000, 0xcbc24f3600000000, 0xc552c49300000000, + 0x6dae945d00000000, 0x633e1ff800000000, 0x3088f2cd00000000, + 0x3e18796800000000, 0x2177228a00000000, 0x2fe7a92f00000000, + 0x7c51441a00000000, 0x72c1cfbf00000000, 0xda3d9f7100000000, + 0xd4ad14d400000000, 0x871bf9e100000000, 0x898b724400000000, + 0xf8c33efe00000000, 0xf653b55b00000000, 0xa5e5586e00000000, + 0xab75d3cb00000000, 0x0389830500000000, 0x0d1908a000000000, + 0x5eafe59500000000, 0x503f6e3000000000, 0x4f5035d200000000, + 0x41c0be7700000000, 0x1276534200000000, 0x1ce6d8e700000000, + 0xb41a882900000000, 0xba8a038c00000000, 0xe93ceeb900000000, + 0xe7ac651c00000000}, + {0x0000000000000000, 0x97a61de700000000, 0x6f4b4a1500000000, + 0xf8ed57f200000000, 0xde96942a00000000, 0x493089cd00000000, + 0xb1ddde3f00000000, 0x267bc3d800000000, 0xbc2d295500000000, + 0x2b8b34b200000000, 0xd366634000000000, 0x44c07ea700000000, + 0x62bbbd7f00000000, 0xf51da09800000000, 0x0df0f76a00000000, + 0x9a56ea8d00000000, 0x785b52aa00000000, 0xeffd4f4d00000000, + 0x171018bf00000000, 0x80b6055800000000, 0xa6cdc68000000000, + 0x316bdb6700000000, 0xc9868c9500000000, 0x5e20917200000000, + 0xc4767bff00000000, 0x53d0661800000000, 0xab3d31ea00000000, + 0x3c9b2c0d00000000, 0x1ae0efd500000000, 0x8d46f23200000000, + 0x75aba5c000000000, 0xe20db82700000000, 0xb1b0d58f00000000, + 0x2616c86800000000, 0xdefb9f9a00000000, 0x495d827d00000000, + 0x6f2641a500000000, 0xf8805c4200000000, 0x006d0bb000000000, + 0x97cb165700000000, 0x0d9dfcda00000000, 0x9a3be13d00000000, + 0x62d6b6cf00000000, 0xf570ab2800000000, 0xd30b68f000000000, + 0x44ad751700000000, 0xbc4022e500000000, 0x2be63f0200000000, + 0xc9eb872500000000, 0x5e4d9ac200000000, 0xa6a0cd3000000000, + 0x3106d0d700000000, 0x177d130f00000000, 0x80db0ee800000000, + 0x7836591a00000000, 0xef9044fd00000000, 0x75c6ae7000000000, + 0xe260b39700000000, 0x1a8de46500000000, 0x8d2bf98200000000, + 0xab503a5a00000000, 0x3cf627bd00000000, 0xc41b704f00000000, + 0x53bd6da800000000, 0x2367dac400000000, 0xb4c1c72300000000, + 0x4c2c90d100000000, 0xdb8a8d3600000000, 0xfdf14eee00000000, + 0x6a57530900000000, 0x92ba04fb00000000, 0x051c191c00000000, + 0x9f4af39100000000, 0x08ecee7600000000, 0xf001b98400000000, + 0x67a7a46300000000, 0x41dc67bb00000000, 0xd67a7a5c00000000, + 0x2e972dae00000000, 0xb931304900000000, 0x5b3c886e00000000, + 0xcc9a958900000000, 0x3477c27b00000000, 0xa3d1df9c00000000, + 0x85aa1c4400000000, 0x120c01a300000000, 0xeae1565100000000, + 0x7d474bb600000000, 0xe711a13b00000000, 0x70b7bcdc00000000, + 0x885aeb2e00000000, 0x1ffcf6c900000000, 0x3987351100000000, + 0xae2128f600000000, 0x56cc7f0400000000, 0xc16a62e300000000, + 0x92d70f4b00000000, 0x057112ac00000000, 0xfd9c455e00000000, + 0x6a3a58b900000000, 0x4c419b6100000000, 0xdbe7868600000000, + 0x230ad17400000000, 0xb4accc9300000000, 0x2efa261e00000000, + 0xb95c3bf900000000, 0x41b16c0b00000000, 0xd61771ec00000000, + 0xf06cb23400000000, 0x67caafd300000000, 0x9f27f82100000000, + 0x0881e5c600000000, 0xea8c5de100000000, 0x7d2a400600000000, + 0x85c717f400000000, 0x12610a1300000000, 0x341ac9cb00000000, + 0xa3bcd42c00000000, 0x5b5183de00000000, 0xccf79e3900000000, + 0x56a174b400000000, 0xc107695300000000, 0x39ea3ea100000000, + 0xae4c234600000000, 0x8837e09e00000000, 0x1f91fd7900000000, + 0xe77caa8b00000000, 0x70dab76c00000000, 0x07c8c55200000000, + 0x906ed8b500000000, 0x68838f4700000000, 0xff2592a000000000, + 0xd95e517800000000, 0x4ef84c9f00000000, 0xb6151b6d00000000, + 0x21b3068a00000000, 0xbbe5ec0700000000, 0x2c43f1e000000000, + 0xd4aea61200000000, 0x4308bbf500000000, 0x6573782d00000000, + 0xf2d565ca00000000, 0x0a38323800000000, 0x9d9e2fdf00000000, + 0x7f9397f800000000, 0xe8358a1f00000000, 0x10d8dded00000000, + 0x877ec00a00000000, 0xa10503d200000000, 0x36a31e3500000000, + 0xce4e49c700000000, 0x59e8542000000000, 0xc3bebead00000000, + 0x5418a34a00000000, 0xacf5f4b800000000, 0x3b53e95f00000000, + 0x1d282a8700000000, 0x8a8e376000000000, 0x7263609200000000, + 0xe5c57d7500000000, 0xb67810dd00000000, 0x21de0d3a00000000, + 0xd9335ac800000000, 0x4e95472f00000000, 0x68ee84f700000000, + 0xff48991000000000, 0x07a5cee200000000, 0x9003d30500000000, + 0x0a55398800000000, 0x9df3246f00000000, 0x651e739d00000000, + 0xf2b86e7a00000000, 0xd4c3ada200000000, 0x4365b04500000000, + 0xbb88e7b700000000, 0x2c2efa5000000000, 0xce23427700000000, + 0x59855f9000000000, 0xa168086200000000, 0x36ce158500000000, + 0x10b5d65d00000000, 0x8713cbba00000000, 0x7ffe9c4800000000, + 0xe85881af00000000, 0x720e6b2200000000, 0xe5a876c500000000, + 0x1d45213700000000, 0x8ae33cd000000000, 0xac98ff0800000000, + 0x3b3ee2ef00000000, 0xc3d3b51d00000000, 0x5475a8fa00000000, + 0x24af1f9600000000, 0xb309027100000000, 0x4be4558300000000, + 0xdc42486400000000, 0xfa398bbc00000000, 0x6d9f965b00000000, + 0x9572c1a900000000, 0x02d4dc4e00000000, 0x988236c300000000, + 0x0f242b2400000000, 0xf7c97cd600000000, 0x606f613100000000, + 0x4614a2e900000000, 0xd1b2bf0e00000000, 0x295fe8fc00000000, + 0xbef9f51b00000000, 0x5cf44d3c00000000, 0xcb5250db00000000, + 0x33bf072900000000, 0xa4191ace00000000, 0x8262d91600000000, + 0x15c4c4f100000000, 0xed29930300000000, 0x7a8f8ee400000000, + 0xe0d9646900000000, 0x777f798e00000000, 0x8f922e7c00000000, + 0x1834339b00000000, 0x3e4ff04300000000, 0xa9e9eda400000000, + 0x5104ba5600000000, 0xc6a2a7b100000000, 0x951fca1900000000, + 0x02b9d7fe00000000, 0xfa54800c00000000, 0x6df29deb00000000, + 0x4b895e3300000000, 0xdc2f43d400000000, 0x24c2142600000000, + 0xb36409c100000000, 0x2932e34c00000000, 0xbe94feab00000000, + 0x4679a95900000000, 0xd1dfb4be00000000, 0xf7a4776600000000, + 0x60026a8100000000, 0x98ef3d7300000000, 0x0f49209400000000, + 0xed4498b300000000, 0x7ae2855400000000, 0x820fd2a600000000, + 0x15a9cf4100000000, 0x33d20c9900000000, 0xa474117e00000000, + 0x5c99468c00000000, 0xcb3f5b6b00000000, 0x5169b1e600000000, + 0xc6cfac0100000000, 0x3e22fbf300000000, 0xa984e61400000000, + 0x8fff25cc00000000, 0x1859382b00000000, 0xe0b46fd900000000, + 0x7712723e00000000}, + {0x0000000000000000, 0x411b8c6e00000000, 0x823618dd00000000, + 0xc32d94b300000000, 0x456b416100000000, 0x0470cd0f00000000, + 0xc75d59bc00000000, 0x8646d5d200000000, 0x8ad682c200000000, + 0xcbcd0eac00000000, 0x08e09a1f00000000, 0x49fb167100000000, + 0xcfbdc3a300000000, 0x8ea64fcd00000000, 0x4d8bdb7e00000000, + 0x0c90571000000000, 0x55ab745e00000000, 0x14b0f83000000000, + 0xd79d6c8300000000, 0x9686e0ed00000000, 0x10c0353f00000000, + 0x51dbb95100000000, 0x92f62de200000000, 0xd3eda18c00000000, + 0xdf7df69c00000000, 0x9e667af200000000, 0x5d4bee4100000000, + 0x1c50622f00000000, 0x9a16b7fd00000000, 0xdb0d3b9300000000, + 0x1820af2000000000, 0x593b234e00000000, 0xaa56e9bc00000000, + 0xeb4d65d200000000, 0x2860f16100000000, 0x697b7d0f00000000, + 0xef3da8dd00000000, 0xae2624b300000000, 0x6d0bb00000000000, + 0x2c103c6e00000000, 0x20806b7e00000000, 0x619be71000000000, + 0xa2b673a300000000, 0xe3adffcd00000000, 0x65eb2a1f00000000, + 0x24f0a67100000000, 0xe7dd32c200000000, 0xa6c6beac00000000, + 0xfffd9de200000000, 0xbee6118c00000000, 0x7dcb853f00000000, + 0x3cd0095100000000, 0xba96dc8300000000, 0xfb8d50ed00000000, + 0x38a0c45e00000000, 0x79bb483000000000, 0x752b1f2000000000, + 0x3430934e00000000, 0xf71d07fd00000000, 0xb6068b9300000000, + 0x30405e4100000000, 0x715bd22f00000000, 0xb276469c00000000, + 0xf36dcaf200000000, 0x15aba3a200000000, 0x54b02fcc00000000, + 0x979dbb7f00000000, 0xd686371100000000, 0x50c0e2c300000000, + 0x11db6ead00000000, 0xd2f6fa1e00000000, 0x93ed767000000000, + 0x9f7d216000000000, 0xde66ad0e00000000, 0x1d4b39bd00000000, + 0x5c50b5d300000000, 0xda16600100000000, 0x9b0dec6f00000000, + 0x582078dc00000000, 0x193bf4b200000000, 0x4000d7fc00000000, + 0x011b5b9200000000, 0xc236cf2100000000, 0x832d434f00000000, + 0x056b969d00000000, 0x44701af300000000, 0x875d8e4000000000, + 0xc646022e00000000, 0xcad6553e00000000, 0x8bcdd95000000000, + 0x48e04de300000000, 0x09fbc18d00000000, 0x8fbd145f00000000, + 0xcea6983100000000, 0x0d8b0c8200000000, 0x4c9080ec00000000, + 0xbffd4a1e00000000, 0xfee6c67000000000, 0x3dcb52c300000000, + 0x7cd0dead00000000, 0xfa960b7f00000000, 0xbb8d871100000000, + 0x78a013a200000000, 0x39bb9fcc00000000, 0x352bc8dc00000000, + 0x743044b200000000, 0xb71dd00100000000, 0xf6065c6f00000000, + 0x704089bd00000000, 0x315b05d300000000, 0xf276916000000000, + 0xb36d1d0e00000000, 0xea563e4000000000, 0xab4db22e00000000, + 0x6860269d00000000, 0x297baaf300000000, 0xaf3d7f2100000000, + 0xee26f34f00000000, 0x2d0b67fc00000000, 0x6c10eb9200000000, + 0x6080bc8200000000, 0x219b30ec00000000, 0xe2b6a45f00000000, + 0xa3ad283100000000, 0x25ebfde300000000, 0x64f0718d00000000, + 0xa7dde53e00000000, 0xe6c6695000000000, 0x6b50369e00000000, + 0x2a4bbaf000000000, 0xe9662e4300000000, 0xa87da22d00000000, + 0x2e3b77ff00000000, 0x6f20fb9100000000, 0xac0d6f2200000000, + 0xed16e34c00000000, 0xe186b45c00000000, 0xa09d383200000000, + 0x63b0ac8100000000, 0x22ab20ef00000000, 0xa4edf53d00000000, + 0xe5f6795300000000, 0x26dbede000000000, 0x67c0618e00000000, + 0x3efb42c000000000, 0x7fe0ceae00000000, 0xbccd5a1d00000000, + 0xfdd6d67300000000, 0x7b9003a100000000, 0x3a8b8fcf00000000, + 0xf9a61b7c00000000, 0xb8bd971200000000, 0xb42dc00200000000, + 0xf5364c6c00000000, 0x361bd8df00000000, 0x770054b100000000, + 0xf146816300000000, 0xb05d0d0d00000000, 0x737099be00000000, + 0x326b15d000000000, 0xc106df2200000000, 0x801d534c00000000, + 0x4330c7ff00000000, 0x022b4b9100000000, 0x846d9e4300000000, + 0xc576122d00000000, 0x065b869e00000000, 0x47400af000000000, + 0x4bd05de000000000, 0x0acbd18e00000000, 0xc9e6453d00000000, + 0x88fdc95300000000, 0x0ebb1c8100000000, 0x4fa090ef00000000, + 0x8c8d045c00000000, 0xcd96883200000000, 0x94adab7c00000000, + 0xd5b6271200000000, 0x169bb3a100000000, 0x57803fcf00000000, + 0xd1c6ea1d00000000, 0x90dd667300000000, 0x53f0f2c000000000, + 0x12eb7eae00000000, 0x1e7b29be00000000, 0x5f60a5d000000000, + 0x9c4d316300000000, 0xdd56bd0d00000000, 0x5b1068df00000000, + 0x1a0be4b100000000, 0xd926700200000000, 0x983dfc6c00000000, + 0x7efb953c00000000, 0x3fe0195200000000, 0xfccd8de100000000, + 0xbdd6018f00000000, 0x3b90d45d00000000, 0x7a8b583300000000, + 0xb9a6cc8000000000, 0xf8bd40ee00000000, 0xf42d17fe00000000, + 0xb5369b9000000000, 0x761b0f2300000000, 0x3700834d00000000, + 0xb146569f00000000, 0xf05ddaf100000000, 0x33704e4200000000, + 0x726bc22c00000000, 0x2b50e16200000000, 0x6a4b6d0c00000000, + 0xa966f9bf00000000, 0xe87d75d100000000, 0x6e3ba00300000000, + 0x2f202c6d00000000, 0xec0db8de00000000, 0xad1634b000000000, + 0xa18663a000000000, 0xe09defce00000000, 0x23b07b7d00000000, + 0x62abf71300000000, 0xe4ed22c100000000, 0xa5f6aeaf00000000, + 0x66db3a1c00000000, 0x27c0b67200000000, 0xd4ad7c8000000000, + 0x95b6f0ee00000000, 0x569b645d00000000, 0x1780e83300000000, + 0x91c63de100000000, 0xd0ddb18f00000000, 0x13f0253c00000000, + 0x52eba95200000000, 0x5e7bfe4200000000, 0x1f60722c00000000, + 0xdc4de69f00000000, 0x9d566af100000000, 0x1b10bf2300000000, + 0x5a0b334d00000000, 0x9926a7fe00000000, 0xd83d2b9000000000, + 0x810608de00000000, 0xc01d84b000000000, 0x0330100300000000, + 0x422b9c6d00000000, 0xc46d49bf00000000, 0x8576c5d100000000, + 0x465b516200000000, 0x0740dd0c00000000, 0x0bd08a1c00000000, + 0x4acb067200000000, 0x89e692c100000000, 0xc8fd1eaf00000000, + 0x4ebbcb7d00000000, 0x0fa0471300000000, 0xcc8dd3a000000000, + 0x8d965fce00000000}, + {0x0000000000000000, 0x1dfdb50100000000, 0x3afa6b0300000000, + 0x2707de0200000000, 0x74f4d70600000000, 0x6909620700000000, + 0x4e0ebc0500000000, 0x53f3090400000000, 0xe8e8af0d00000000, + 0xf5151a0c00000000, 0xd212c40e00000000, 0xcfef710f00000000, + 0x9c1c780b00000000, 0x81e1cd0a00000000, 0xa6e6130800000000, + 0xbb1ba60900000000, 0xd0d15f1b00000000, 0xcd2cea1a00000000, + 0xea2b341800000000, 0xf7d6811900000000, 0xa425881d00000000, + 0xb9d83d1c00000000, 0x9edfe31e00000000, 0x8322561f00000000, + 0x3839f01600000000, 0x25c4451700000000, 0x02c39b1500000000, + 0x1f3e2e1400000000, 0x4ccd271000000000, 0x5130921100000000, + 0x76374c1300000000, 0x6bcaf91200000000, 0xa0a3bf3600000000, + 0xbd5e0a3700000000, 0x9a59d43500000000, 0x87a4613400000000, + 0xd457683000000000, 0xc9aadd3100000000, 0xeead033300000000, + 0xf350b63200000000, 0x484b103b00000000, 0x55b6a53a00000000, + 0x72b17b3800000000, 0x6f4cce3900000000, 0x3cbfc73d00000000, + 0x2142723c00000000, 0x0645ac3e00000000, 0x1bb8193f00000000, + 0x7072e02d00000000, 0x6d8f552c00000000, 0x4a888b2e00000000, + 0x57753e2f00000000, 0x0486372b00000000, 0x197b822a00000000, + 0x3e7c5c2800000000, 0x2381e92900000000, 0x989a4f2000000000, + 0x8567fa2100000000, 0xa260242300000000, 0xbf9d912200000000, + 0xec6e982600000000, 0xf1932d2700000000, 0xd694f32500000000, + 0xcb69462400000000, 0x40477f6d00000000, 0x5dbaca6c00000000, + 0x7abd146e00000000, 0x6740a16f00000000, 0x34b3a86b00000000, + 0x294e1d6a00000000, 0x0e49c36800000000, 0x13b4766900000000, + 0xa8afd06000000000, 0xb552656100000000, 0x9255bb6300000000, + 0x8fa80e6200000000, 0xdc5b076600000000, 0xc1a6b26700000000, + 0xe6a16c6500000000, 0xfb5cd96400000000, 0x9096207600000000, + 0x8d6b957700000000, 0xaa6c4b7500000000, 0xb791fe7400000000, + 0xe462f77000000000, 0xf99f427100000000, 0xde989c7300000000, + 0xc365297200000000, 0x787e8f7b00000000, 0x65833a7a00000000, + 0x4284e47800000000, 0x5f79517900000000, 0x0c8a587d00000000, + 0x1177ed7c00000000, 0x3670337e00000000, 0x2b8d867f00000000, + 0xe0e4c05b00000000, 0xfd19755a00000000, 0xda1eab5800000000, + 0xc7e31e5900000000, 0x9410175d00000000, 0x89eda25c00000000, + 0xaeea7c5e00000000, 0xb317c95f00000000, 0x080c6f5600000000, + 0x15f1da5700000000, 0x32f6045500000000, 0x2f0bb15400000000, + 0x7cf8b85000000000, 0x61050d5100000000, 0x4602d35300000000, + 0x5bff665200000000, 0x30359f4000000000, 0x2dc82a4100000000, + 0x0acff44300000000, 0x1732414200000000, 0x44c1484600000000, + 0x593cfd4700000000, 0x7e3b234500000000, 0x63c6964400000000, + 0xd8dd304d00000000, 0xc520854c00000000, 0xe2275b4e00000000, + 0xffdaee4f00000000, 0xac29e74b00000000, 0xb1d4524a00000000, + 0x96d38c4800000000, 0x8b2e394900000000, 0x808efeda00000000, + 0x9d734bdb00000000, 0xba7495d900000000, 0xa78920d800000000, + 0xf47a29dc00000000, 0xe9879cdd00000000, 0xce8042df00000000, + 0xd37df7de00000000, 0x686651d700000000, 0x759be4d600000000, + 0x529c3ad400000000, 0x4f618fd500000000, 0x1c9286d100000000, + 0x016f33d000000000, 0x2668edd200000000, 0x3b9558d300000000, + 0x505fa1c100000000, 0x4da214c000000000, 0x6aa5cac200000000, + 0x77587fc300000000, 0x24ab76c700000000, 0x3956c3c600000000, + 0x1e511dc400000000, 0x03aca8c500000000, 0xb8b70ecc00000000, + 0xa54abbcd00000000, 0x824d65cf00000000, 0x9fb0d0ce00000000, + 0xcc43d9ca00000000, 0xd1be6ccb00000000, 0xf6b9b2c900000000, + 0xeb4407c800000000, 0x202d41ec00000000, 0x3dd0f4ed00000000, + 0x1ad72aef00000000, 0x072a9fee00000000, 0x54d996ea00000000, + 0x492423eb00000000, 0x6e23fde900000000, 0x73de48e800000000, + 0xc8c5eee100000000, 0xd5385be000000000, 0xf23f85e200000000, + 0xefc230e300000000, 0xbc3139e700000000, 0xa1cc8ce600000000, + 0x86cb52e400000000, 0x9b36e7e500000000, 0xf0fc1ef700000000, + 0xed01abf600000000, 0xca0675f400000000, 0xd7fbc0f500000000, + 0x8408c9f100000000, 0x99f57cf000000000, 0xbef2a2f200000000, + 0xa30f17f300000000, 0x1814b1fa00000000, 0x05e904fb00000000, + 0x22eedaf900000000, 0x3f136ff800000000, 0x6ce066fc00000000, + 0x711dd3fd00000000, 0x561a0dff00000000, 0x4be7b8fe00000000, + 0xc0c981b700000000, 0xdd3434b600000000, 0xfa33eab400000000, + 0xe7ce5fb500000000, 0xb43d56b100000000, 0xa9c0e3b000000000, + 0x8ec73db200000000, 0x933a88b300000000, 0x28212eba00000000, + 0x35dc9bbb00000000, 0x12db45b900000000, 0x0f26f0b800000000, + 0x5cd5f9bc00000000, 0x41284cbd00000000, 0x662f92bf00000000, + 0x7bd227be00000000, 0x1018deac00000000, 0x0de56bad00000000, + 0x2ae2b5af00000000, 0x371f00ae00000000, 0x64ec09aa00000000, + 0x7911bcab00000000, 0x5e1662a900000000, 0x43ebd7a800000000, + 0xf8f071a100000000, 0xe50dc4a000000000, 0xc20a1aa200000000, + 0xdff7afa300000000, 0x8c04a6a700000000, 0x91f913a600000000, + 0xb6fecda400000000, 0xab0378a500000000, 0x606a3e8100000000, + 0x7d978b8000000000, 0x5a90558200000000, 0x476de08300000000, + 0x149ee98700000000, 0x09635c8600000000, 0x2e64828400000000, + 0x3399378500000000, 0x8882918c00000000, 0x957f248d00000000, + 0xb278fa8f00000000, 0xaf854f8e00000000, 0xfc76468a00000000, + 0xe18bf38b00000000, 0xc68c2d8900000000, 0xdb71988800000000, + 0xb0bb619a00000000, 0xad46d49b00000000, 0x8a410a9900000000, + 0x97bcbf9800000000, 0xc44fb69c00000000, 0xd9b2039d00000000, + 0xfeb5dd9f00000000, 0xe348689e00000000, 0x5853ce9700000000, + 0x45ae7b9600000000, 0x62a9a59400000000, 0x7f54109500000000, + 0x2ca7199100000000, 0x315aac9000000000, 0x165d729200000000, + 0x0ba0c79300000000}, + {0x0000000000000000, 0x24d9076300000000, 0x48b20fc600000000, + 0x6c6b08a500000000, 0xd1626e5700000000, 0xf5bb693400000000, + 0x99d0619100000000, 0xbd0966f200000000, 0xa2c5dcae00000000, + 0x861cdbcd00000000, 0xea77d36800000000, 0xceaed40b00000000, + 0x73a7b2f900000000, 0x577eb59a00000000, 0x3b15bd3f00000000, + 0x1fccba5c00000000, 0x058dc88600000000, 0x2154cfe500000000, + 0x4d3fc74000000000, 0x69e6c02300000000, 0xd4efa6d100000000, + 0xf036a1b200000000, 0x9c5da91700000000, 0xb884ae7400000000, + 0xa748142800000000, 0x8391134b00000000, 0xeffa1bee00000000, + 0xcb231c8d00000000, 0x762a7a7f00000000, 0x52f37d1c00000000, + 0x3e9875b900000000, 0x1a4172da00000000, 0x4b1ce0d600000000, + 0x6fc5e7b500000000, 0x03aeef1000000000, 0x2777e87300000000, + 0x9a7e8e8100000000, 0xbea789e200000000, 0xd2cc814700000000, + 0xf615862400000000, 0xe9d93c7800000000, 0xcd003b1b00000000, + 0xa16b33be00000000, 0x85b234dd00000000, 0x38bb522f00000000, + 0x1c62554c00000000, 0x70095de900000000, 0x54d05a8a00000000, + 0x4e91285000000000, 0x6a482f3300000000, 0x0623279600000000, + 0x22fa20f500000000, 0x9ff3460700000000, 0xbb2a416400000000, + 0xd74149c100000000, 0xf3984ea200000000, 0xec54f4fe00000000, + 0xc88df39d00000000, 0xa4e6fb3800000000, 0x803ffc5b00000000, + 0x3d369aa900000000, 0x19ef9dca00000000, 0x7584956f00000000, + 0x515d920c00000000, 0xd73eb17600000000, 0xf3e7b61500000000, + 0x9f8cbeb000000000, 0xbb55b9d300000000, 0x065cdf2100000000, + 0x2285d84200000000, 0x4eeed0e700000000, 0x6a37d78400000000, + 0x75fb6dd800000000, 0x51226abb00000000, 0x3d49621e00000000, + 0x1990657d00000000, 0xa499038f00000000, 0x804004ec00000000, + 0xec2b0c4900000000, 0xc8f20b2a00000000, 0xd2b379f000000000, + 0xf66a7e9300000000, 0x9a01763600000000, 0xbed8715500000000, + 0x03d117a700000000, 0x270810c400000000, 0x4b63186100000000, + 0x6fba1f0200000000, 0x7076a55e00000000, 0x54afa23d00000000, + 0x38c4aa9800000000, 0x1c1dadfb00000000, 0xa114cb0900000000, + 0x85cdcc6a00000000, 0xe9a6c4cf00000000, 0xcd7fc3ac00000000, + 0x9c2251a000000000, 0xb8fb56c300000000, 0xd4905e6600000000, + 0xf049590500000000, 0x4d403ff700000000, 0x6999389400000000, + 0x05f2303100000000, 0x212b375200000000, 0x3ee78d0e00000000, + 0x1a3e8a6d00000000, 0x765582c800000000, 0x528c85ab00000000, + 0xef85e35900000000, 0xcb5ce43a00000000, 0xa737ec9f00000000, + 0x83eeebfc00000000, 0x99af992600000000, 0xbd769e4500000000, + 0xd11d96e000000000, 0xf5c4918300000000, 0x48cdf77100000000, + 0x6c14f01200000000, 0x007ff8b700000000, 0x24a6ffd400000000, + 0x3b6a458800000000, 0x1fb342eb00000000, 0x73d84a4e00000000, + 0x57014d2d00000000, 0xea082bdf00000000, 0xced12cbc00000000, + 0xa2ba241900000000, 0x8663237a00000000, 0xae7d62ed00000000, + 0x8aa4658e00000000, 0xe6cf6d2b00000000, 0xc2166a4800000000, + 0x7f1f0cba00000000, 0x5bc60bd900000000, 0x37ad037c00000000, + 0x1374041f00000000, 0x0cb8be4300000000, 0x2861b92000000000, + 0x440ab18500000000, 0x60d3b6e600000000, 0xdddad01400000000, + 0xf903d77700000000, 0x9568dfd200000000, 0xb1b1d8b100000000, + 0xabf0aa6b00000000, 0x8f29ad0800000000, 0xe342a5ad00000000, + 0xc79ba2ce00000000, 0x7a92c43c00000000, 0x5e4bc35f00000000, + 0x3220cbfa00000000, 0x16f9cc9900000000, 0x093576c500000000, + 0x2dec71a600000000, 0x4187790300000000, 0x655e7e6000000000, + 0xd857189200000000, 0xfc8e1ff100000000, 0x90e5175400000000, + 0xb43c103700000000, 0xe561823b00000000, 0xc1b8855800000000, + 0xadd38dfd00000000, 0x890a8a9e00000000, 0x3403ec6c00000000, + 0x10daeb0f00000000, 0x7cb1e3aa00000000, 0x5868e4c900000000, + 0x47a45e9500000000, 0x637d59f600000000, 0x0f16515300000000, + 0x2bcf563000000000, 0x96c630c200000000, 0xb21f37a100000000, + 0xde743f0400000000, 0xfaad386700000000, 0xe0ec4abd00000000, + 0xc4354dde00000000, 0xa85e457b00000000, 0x8c87421800000000, + 0x318e24ea00000000, 0x1557238900000000, 0x793c2b2c00000000, + 0x5de52c4f00000000, 0x4229961300000000, 0x66f0917000000000, + 0x0a9b99d500000000, 0x2e429eb600000000, 0x934bf84400000000, + 0xb792ff2700000000, 0xdbf9f78200000000, 0xff20f0e100000000, + 0x7943d39b00000000, 0x5d9ad4f800000000, 0x31f1dc5d00000000, + 0x1528db3e00000000, 0xa821bdcc00000000, 0x8cf8baaf00000000, + 0xe093b20a00000000, 0xc44ab56900000000, 0xdb860f3500000000, + 0xff5f085600000000, 0x933400f300000000, 0xb7ed079000000000, + 0x0ae4616200000000, 0x2e3d660100000000, 0x42566ea400000000, + 0x668f69c700000000, 0x7cce1b1d00000000, 0x58171c7e00000000, + 0x347c14db00000000, 0x10a513b800000000, 0xadac754a00000000, + 0x8975722900000000, 0xe51e7a8c00000000, 0xc1c77def00000000, + 0xde0bc7b300000000, 0xfad2c0d000000000, 0x96b9c87500000000, + 0xb260cf1600000000, 0x0f69a9e400000000, 0x2bb0ae8700000000, + 0x47dba62200000000, 0x6302a14100000000, 0x325f334d00000000, + 0x1686342e00000000, 0x7aed3c8b00000000, 0x5e343be800000000, + 0xe33d5d1a00000000, 0xc7e45a7900000000, 0xab8f52dc00000000, + 0x8f5655bf00000000, 0x909aefe300000000, 0xb443e88000000000, + 0xd828e02500000000, 0xfcf1e74600000000, 0x41f881b400000000, + 0x652186d700000000, 0x094a8e7200000000, 0x2d93891100000000, + 0x37d2fbcb00000000, 0x130bfca800000000, 0x7f60f40d00000000, + 0x5bb9f36e00000000, 0xe6b0959c00000000, 0xc26992ff00000000, + 0xae029a5a00000000, 0x8adb9d3900000000, 0x9517276500000000, + 0xb1ce200600000000, 0xdda528a300000000, 0xf97c2fc000000000, + 0x4475493200000000, 0x60ac4e5100000000, 0x0cc746f400000000, + 0x281e419700000000}, + {0x0000000000000000, 0x08e3603c00000000, 0x10c6c17800000000, + 0x1825a14400000000, 0x208c83f100000000, 0x286fe3cd00000000, + 0x304a428900000000, 0x38a922b500000000, 0x011e763800000000, + 0x09fd160400000000, 0x11d8b74000000000, 0x193bd77c00000000, + 0x2192f5c900000000, 0x297195f500000000, 0x315434b100000000, + 0x39b7548d00000000, 0x023cec7000000000, 0x0adf8c4c00000000, + 0x12fa2d0800000000, 0x1a194d3400000000, 0x22b06f8100000000, + 0x2a530fbd00000000, 0x3276aef900000000, 0x3a95cec500000000, + 0x03229a4800000000, 0x0bc1fa7400000000, 0x13e45b3000000000, + 0x1b073b0c00000000, 0x23ae19b900000000, 0x2b4d798500000000, + 0x3368d8c100000000, 0x3b8bb8fd00000000, 0x0478d8e100000000, + 0x0c9bb8dd00000000, 0x14be199900000000, 0x1c5d79a500000000, + 0x24f45b1000000000, 0x2c173b2c00000000, 0x34329a6800000000, + 0x3cd1fa5400000000, 0x0566aed900000000, 0x0d85cee500000000, + 0x15a06fa100000000, 0x1d430f9d00000000, 0x25ea2d2800000000, + 0x2d094d1400000000, 0x352cec5000000000, 0x3dcf8c6c00000000, + 0x0644349100000000, 0x0ea754ad00000000, 0x1682f5e900000000, + 0x1e6195d500000000, 0x26c8b76000000000, 0x2e2bd75c00000000, + 0x360e761800000000, 0x3eed162400000000, 0x075a42a900000000, + 0x0fb9229500000000, 0x179c83d100000000, 0x1f7fe3ed00000000, + 0x27d6c15800000000, 0x2f35a16400000000, 0x3710002000000000, + 0x3ff3601c00000000, 0x49f6c11800000000, 0x4115a12400000000, + 0x5930006000000000, 0x51d3605c00000000, 0x697a42e900000000, + 0x619922d500000000, 0x79bc839100000000, 0x715fe3ad00000000, + 0x48e8b72000000000, 0x400bd71c00000000, 0x582e765800000000, + 0x50cd166400000000, 0x686434d100000000, 0x608754ed00000000, + 0x78a2f5a900000000, 0x7041959500000000, 0x4bca2d6800000000, + 0x43294d5400000000, 0x5b0cec1000000000, 0x53ef8c2c00000000, + 0x6b46ae9900000000, 0x63a5cea500000000, 0x7b806fe100000000, + 0x73630fdd00000000, 0x4ad45b5000000000, 0x42373b6c00000000, + 0x5a129a2800000000, 0x52f1fa1400000000, 0x6a58d8a100000000, + 0x62bbb89d00000000, 0x7a9e19d900000000, 0x727d79e500000000, + 0x4d8e19f900000000, 0x456d79c500000000, 0x5d48d88100000000, + 0x55abb8bd00000000, 0x6d029a0800000000, 0x65e1fa3400000000, + 0x7dc45b7000000000, 0x75273b4c00000000, 0x4c906fc100000000, + 0x44730ffd00000000, 0x5c56aeb900000000, 0x54b5ce8500000000, + 0x6c1cec3000000000, 0x64ff8c0c00000000, 0x7cda2d4800000000, + 0x74394d7400000000, 0x4fb2f58900000000, 0x475195b500000000, + 0x5f7434f100000000, 0x579754cd00000000, 0x6f3e767800000000, + 0x67dd164400000000, 0x7ff8b70000000000, 0x771bd73c00000000, + 0x4eac83b100000000, 0x464fe38d00000000, 0x5e6a42c900000000, + 0x568922f500000000, 0x6e20004000000000, 0x66c3607c00000000, + 0x7ee6c13800000000, 0x7605a10400000000, 0x92ec833100000000, + 0x9a0fe30d00000000, 0x822a424900000000, 0x8ac9227500000000, + 0xb26000c000000000, 0xba8360fc00000000, 0xa2a6c1b800000000, + 0xaa45a18400000000, 0x93f2f50900000000, 0x9b11953500000000, + 0x8334347100000000, 0x8bd7544d00000000, 0xb37e76f800000000, + 0xbb9d16c400000000, 0xa3b8b78000000000, 0xab5bd7bc00000000, + 0x90d06f4100000000, 0x98330f7d00000000, 0x8016ae3900000000, + 0x88f5ce0500000000, 0xb05cecb000000000, 0xb8bf8c8c00000000, + 0xa09a2dc800000000, 0xa8794df400000000, 0x91ce197900000000, + 0x992d794500000000, 0x8108d80100000000, 0x89ebb83d00000000, + 0xb1429a8800000000, 0xb9a1fab400000000, 0xa1845bf000000000, + 0xa9673bcc00000000, 0x96945bd000000000, 0x9e773bec00000000, + 0x86529aa800000000, 0x8eb1fa9400000000, 0xb618d82100000000, + 0xbefbb81d00000000, 0xa6de195900000000, 0xae3d796500000000, + 0x978a2de800000000, 0x9f694dd400000000, 0x874cec9000000000, + 0x8faf8cac00000000, 0xb706ae1900000000, 0xbfe5ce2500000000, + 0xa7c06f6100000000, 0xaf230f5d00000000, 0x94a8b7a000000000, + 0x9c4bd79c00000000, 0x846e76d800000000, 0x8c8d16e400000000, + 0xb424345100000000, 0xbcc7546d00000000, 0xa4e2f52900000000, + 0xac01951500000000, 0x95b6c19800000000, 0x9d55a1a400000000, + 0x857000e000000000, 0x8d9360dc00000000, 0xb53a426900000000, + 0xbdd9225500000000, 0xa5fc831100000000, 0xad1fe32d00000000, + 0xdb1a422900000000, 0xd3f9221500000000, 0xcbdc835100000000, + 0xc33fe36d00000000, 0xfb96c1d800000000, 0xf375a1e400000000, + 0xeb5000a000000000, 0xe3b3609c00000000, 0xda04341100000000, + 0xd2e7542d00000000, 0xcac2f56900000000, 0xc221955500000000, + 0xfa88b7e000000000, 0xf26bd7dc00000000, 0xea4e769800000000, + 0xe2ad16a400000000, 0xd926ae5900000000, 0xd1c5ce6500000000, + 0xc9e06f2100000000, 0xc1030f1d00000000, 0xf9aa2da800000000, + 0xf1494d9400000000, 0xe96cecd000000000, 0xe18f8cec00000000, + 0xd838d86100000000, 0xd0dbb85d00000000, 0xc8fe191900000000, + 0xc01d792500000000, 0xf8b45b9000000000, 0xf0573bac00000000, + 0xe8729ae800000000, 0xe091fad400000000, 0xdf629ac800000000, + 0xd781faf400000000, 0xcfa45bb000000000, 0xc7473b8c00000000, + 0xffee193900000000, 0xf70d790500000000, 0xef28d84100000000, + 0xe7cbb87d00000000, 0xde7cecf000000000, 0xd69f8ccc00000000, + 0xceba2d8800000000, 0xc6594db400000000, 0xfef06f0100000000, + 0xf6130f3d00000000, 0xee36ae7900000000, 0xe6d5ce4500000000, + 0xdd5e76b800000000, 0xd5bd168400000000, 0xcd98b7c000000000, + 0xc57bd7fc00000000, 0xfdd2f54900000000, 0xf531957500000000, + 0xed14343100000000, 0xe5f7540d00000000, 0xdc40008000000000, + 0xd4a360bc00000000, 0xcc86c1f800000000, 0xc465a1c400000000, + 0xfccc837100000000, 0xf42fe34d00000000, 0xec0a420900000000, + 0xe4e9223500000000}, + {0x0000000000000000, 0xd1e8e70e00000000, 0xa2d1cf1d00000000, + 0x7339281300000000, 0x44a39f3b00000000, 0x954b783500000000, + 0xe672502600000000, 0x379ab72800000000, 0x88463f7700000000, + 0x59aed87900000000, 0x2a97f06a00000000, 0xfb7f176400000000, + 0xcce5a04c00000000, 0x1d0d474200000000, 0x6e346f5100000000, + 0xbfdc885f00000000, 0x108d7eee00000000, 0xc16599e000000000, + 0xb25cb1f300000000, 0x63b456fd00000000, 0x542ee1d500000000, + 0x85c606db00000000, 0xf6ff2ec800000000, 0x2717c9c600000000, + 0x98cb419900000000, 0x4923a69700000000, 0x3a1a8e8400000000, + 0xebf2698a00000000, 0xdc68dea200000000, 0x0d8039ac00000000, + 0x7eb911bf00000000, 0xaf51f6b100000000, 0x611c8c0700000000, + 0xb0f46b0900000000, 0xc3cd431a00000000, 0x1225a41400000000, + 0x25bf133c00000000, 0xf457f43200000000, 0x876edc2100000000, + 0x56863b2f00000000, 0xe95ab37000000000, 0x38b2547e00000000, + 0x4b8b7c6d00000000, 0x9a639b6300000000, 0xadf92c4b00000000, + 0x7c11cb4500000000, 0x0f28e35600000000, 0xdec0045800000000, + 0x7191f2e900000000, 0xa07915e700000000, 0xd3403df400000000, + 0x02a8dafa00000000, 0x35326dd200000000, 0xe4da8adc00000000, + 0x97e3a2cf00000000, 0x460b45c100000000, 0xf9d7cd9e00000000, + 0x283f2a9000000000, 0x5b06028300000000, 0x8aeee58d00000000, + 0xbd7452a500000000, 0x6c9cb5ab00000000, 0x1fa59db800000000, + 0xce4d7ab600000000, 0xc238180f00000000, 0x13d0ff0100000000, + 0x60e9d71200000000, 0xb101301c00000000, 0x869b873400000000, + 0x5773603a00000000, 0x244a482900000000, 0xf5a2af2700000000, + 0x4a7e277800000000, 0x9b96c07600000000, 0xe8afe86500000000, + 0x39470f6b00000000, 0x0eddb84300000000, 0xdf355f4d00000000, + 0xac0c775e00000000, 0x7de4905000000000, 0xd2b566e100000000, + 0x035d81ef00000000, 0x7064a9fc00000000, 0xa18c4ef200000000, + 0x9616f9da00000000, 0x47fe1ed400000000, 0x34c736c700000000, + 0xe52fd1c900000000, 0x5af3599600000000, 0x8b1bbe9800000000, + 0xf822968b00000000, 0x29ca718500000000, 0x1e50c6ad00000000, + 0xcfb821a300000000, 0xbc8109b000000000, 0x6d69eebe00000000, + 0xa324940800000000, 0x72cc730600000000, 0x01f55b1500000000, + 0xd01dbc1b00000000, 0xe7870b3300000000, 0x366fec3d00000000, + 0x4556c42e00000000, 0x94be232000000000, 0x2b62ab7f00000000, + 0xfa8a4c7100000000, 0x89b3646200000000, 0x585b836c00000000, + 0x6fc1344400000000, 0xbe29d34a00000000, 0xcd10fb5900000000, + 0x1cf81c5700000000, 0xb3a9eae600000000, 0x62410de800000000, + 0x117825fb00000000, 0xc090c2f500000000, 0xf70a75dd00000000, + 0x26e292d300000000, 0x55dbbac000000000, 0x84335dce00000000, + 0x3befd59100000000, 0xea07329f00000000, 0x993e1a8c00000000, + 0x48d6fd8200000000, 0x7f4c4aaa00000000, 0xaea4ada400000000, + 0xdd9d85b700000000, 0x0c7562b900000000, 0x8471301e00000000, + 0x5599d71000000000, 0x26a0ff0300000000, 0xf748180d00000000, + 0xc0d2af2500000000, 0x113a482b00000000, 0x6203603800000000, + 0xb3eb873600000000, 0x0c370f6900000000, 0xdddfe86700000000, + 0xaee6c07400000000, 0x7f0e277a00000000, 0x4894905200000000, + 0x997c775c00000000, 0xea455f4f00000000, 0x3badb84100000000, + 0x94fc4ef000000000, 0x4514a9fe00000000, 0x362d81ed00000000, + 0xe7c566e300000000, 0xd05fd1cb00000000, 0x01b736c500000000, + 0x728e1ed600000000, 0xa366f9d800000000, 0x1cba718700000000, + 0xcd52968900000000, 0xbe6bbe9a00000000, 0x6f83599400000000, + 0x5819eebc00000000, 0x89f109b200000000, 0xfac821a100000000, + 0x2b20c6af00000000, 0xe56dbc1900000000, 0x34855b1700000000, + 0x47bc730400000000, 0x9654940a00000000, 0xa1ce232200000000, + 0x7026c42c00000000, 0x031fec3f00000000, 0xd2f70b3100000000, + 0x6d2b836e00000000, 0xbcc3646000000000, 0xcffa4c7300000000, + 0x1e12ab7d00000000, 0x29881c5500000000, 0xf860fb5b00000000, + 0x8b59d34800000000, 0x5ab1344600000000, 0xf5e0c2f700000000, + 0x240825f900000000, 0x57310dea00000000, 0x86d9eae400000000, + 0xb1435dcc00000000, 0x60abbac200000000, 0x139292d100000000, + 0xc27a75df00000000, 0x7da6fd8000000000, 0xac4e1a8e00000000, + 0xdf77329d00000000, 0x0e9fd59300000000, 0x390562bb00000000, + 0xe8ed85b500000000, 0x9bd4ada600000000, 0x4a3c4aa800000000, + 0x4649281100000000, 0x97a1cf1f00000000, 0xe498e70c00000000, + 0x3570000200000000, 0x02eab72a00000000, 0xd302502400000000, + 0xa03b783700000000, 0x71d39f3900000000, 0xce0f176600000000, + 0x1fe7f06800000000, 0x6cded87b00000000, 0xbd363f7500000000, + 0x8aac885d00000000, 0x5b446f5300000000, 0x287d474000000000, + 0xf995a04e00000000, 0x56c456ff00000000, 0x872cb1f100000000, + 0xf41599e200000000, 0x25fd7eec00000000, 0x1267c9c400000000, + 0xc38f2eca00000000, 0xb0b606d900000000, 0x615ee1d700000000, + 0xde82698800000000, 0x0f6a8e8600000000, 0x7c53a69500000000, + 0xadbb419b00000000, 0x9a21f6b300000000, 0x4bc911bd00000000, + 0x38f039ae00000000, 0xe918dea000000000, 0x2755a41600000000, + 0xf6bd431800000000, 0x85846b0b00000000, 0x546c8c0500000000, + 0x63f63b2d00000000, 0xb21edc2300000000, 0xc127f43000000000, + 0x10cf133e00000000, 0xaf139b6100000000, 0x7efb7c6f00000000, + 0x0dc2547c00000000, 0xdc2ab37200000000, 0xebb0045a00000000, + 0x3a58e35400000000, 0x4961cb4700000000, 0x98892c4900000000, + 0x37d8daf800000000, 0xe6303df600000000, 0x950915e500000000, + 0x44e1f2eb00000000, 0x737b45c300000000, 0xa293a2cd00000000, + 0xd1aa8ade00000000, 0x00426dd000000000, 0xbf9ee58f00000000, + 0x6e76028100000000, 0x1d4f2a9200000000, 0xcca7cd9c00000000, + 0xfb3d7ab400000000, 0x2ad59dba00000000, 0x59ecb5a900000000, + 0x880452a700000000}, + {0x0000000000000000, 0xaa05daf100000000, 0x150dc53800000000, + 0xbf081fc900000000, 0x2a1a8a7100000000, 0x801f508000000000, + 0x3f174f4900000000, 0x951295b800000000, 0x543414e300000000, + 0xfe31ce1200000000, 0x4139d1db00000000, 0xeb3c0b2a00000000, + 0x7e2e9e9200000000, 0xd42b446300000000, 0x6b235baa00000000, + 0xc126815b00000000, 0xe96e591d00000000, 0x436b83ec00000000, + 0xfc639c2500000000, 0x566646d400000000, 0xc374d36c00000000, + 0x6971099d00000000, 0xd679165400000000, 0x7c7ccca500000000, + 0xbd5a4dfe00000000, 0x175f970f00000000, 0xa85788c600000000, + 0x0252523700000000, 0x9740c78f00000000, 0x3d451d7e00000000, + 0x824d02b700000000, 0x2848d84600000000, 0xd2ddb23a00000000, + 0x78d868cb00000000, 0xc7d0770200000000, 0x6dd5adf300000000, + 0xf8c7384b00000000, 0x52c2e2ba00000000, 0xedcafd7300000000, + 0x47cf278200000000, 0x86e9a6d900000000, 0x2cec7c2800000000, + 0x93e463e100000000, 0x39e1b91000000000, 0xacf32ca800000000, + 0x06f6f65900000000, 0xb9fee99000000000, 0x13fb336100000000, + 0x3bb3eb2700000000, 0x91b631d600000000, 0x2ebe2e1f00000000, + 0x84bbf4ee00000000, 0x11a9615600000000, 0xbbacbba700000000, + 0x04a4a46e00000000, 0xaea17e9f00000000, 0x6f87ffc400000000, + 0xc582253500000000, 0x7a8a3afc00000000, 0xd08fe00d00000000, + 0x459d75b500000000, 0xef98af4400000000, 0x5090b08d00000000, + 0xfa956a7c00000000, 0xa4bb657500000000, 0x0ebebf8400000000, + 0xb1b6a04d00000000, 0x1bb37abc00000000, 0x8ea1ef0400000000, + 0x24a435f500000000, 0x9bac2a3c00000000, 0x31a9f0cd00000000, + 0xf08f719600000000, 0x5a8aab6700000000, 0xe582b4ae00000000, + 0x4f876e5f00000000, 0xda95fbe700000000, 0x7090211600000000, + 0xcf983edf00000000, 0x659de42e00000000, 0x4dd53c6800000000, + 0xe7d0e69900000000, 0x58d8f95000000000, 0xf2dd23a100000000, + 0x67cfb61900000000, 0xcdca6ce800000000, 0x72c2732100000000, + 0xd8c7a9d000000000, 0x19e1288b00000000, 0xb3e4f27a00000000, + 0x0cecedb300000000, 0xa6e9374200000000, 0x33fba2fa00000000, + 0x99fe780b00000000, 0x26f667c200000000, 0x8cf3bd3300000000, + 0x7666d74f00000000, 0xdc630dbe00000000, 0x636b127700000000, + 0xc96ec88600000000, 0x5c7c5d3e00000000, 0xf67987cf00000000, + 0x4971980600000000, 0xe37442f700000000, 0x2252c3ac00000000, + 0x8857195d00000000, 0x375f069400000000, 0x9d5adc6500000000, + 0x084849dd00000000, 0xa24d932c00000000, 0x1d458ce500000000, + 0xb740561400000000, 0x9f088e5200000000, 0x350d54a300000000, + 0x8a054b6a00000000, 0x2000919b00000000, 0xb512042300000000, + 0x1f17ded200000000, 0xa01fc11b00000000, 0x0a1a1bea00000000, + 0xcb3c9ab100000000, 0x6139404000000000, 0xde315f8900000000, + 0x7434857800000000, 0xe12610c000000000, 0x4b23ca3100000000, + 0xf42bd5f800000000, 0x5e2e0f0900000000, 0x4877cbea00000000, + 0xe272111b00000000, 0x5d7a0ed200000000, 0xf77fd42300000000, + 0x626d419b00000000, 0xc8689b6a00000000, 0x776084a300000000, + 0xdd655e5200000000, 0x1c43df0900000000, 0xb64605f800000000, + 0x094e1a3100000000, 0xa34bc0c000000000, 0x3659557800000000, + 0x9c5c8f8900000000, 0x2354904000000000, 0x89514ab100000000, + 0xa11992f700000000, 0x0b1c480600000000, 0xb41457cf00000000, + 0x1e118d3e00000000, 0x8b03188600000000, 0x2106c27700000000, + 0x9e0eddbe00000000, 0x340b074f00000000, 0xf52d861400000000, + 0x5f285ce500000000, 0xe020432c00000000, 0x4a2599dd00000000, + 0xdf370c6500000000, 0x7532d69400000000, 0xca3ac95d00000000, + 0x603f13ac00000000, 0x9aaa79d000000000, 0x30afa32100000000, + 0x8fa7bce800000000, 0x25a2661900000000, 0xb0b0f3a100000000, + 0x1ab5295000000000, 0xa5bd369900000000, 0x0fb8ec6800000000, + 0xce9e6d3300000000, 0x649bb7c200000000, 0xdb93a80b00000000, + 0x719672fa00000000, 0xe484e74200000000, 0x4e813db300000000, + 0xf189227a00000000, 0x5b8cf88b00000000, 0x73c420cd00000000, + 0xd9c1fa3c00000000, 0x66c9e5f500000000, 0xcccc3f0400000000, + 0x59deaabc00000000, 0xf3db704d00000000, 0x4cd36f8400000000, + 0xe6d6b57500000000, 0x27f0342e00000000, 0x8df5eedf00000000, + 0x32fdf11600000000, 0x98f82be700000000, 0x0deabe5f00000000, + 0xa7ef64ae00000000, 0x18e77b6700000000, 0xb2e2a19600000000, + 0xecccae9f00000000, 0x46c9746e00000000, 0xf9c16ba700000000, + 0x53c4b15600000000, 0xc6d624ee00000000, 0x6cd3fe1f00000000, + 0xd3dbe1d600000000, 0x79de3b2700000000, 0xb8f8ba7c00000000, + 0x12fd608d00000000, 0xadf57f4400000000, 0x07f0a5b500000000, + 0x92e2300d00000000, 0x38e7eafc00000000, 0x87eff53500000000, + 0x2dea2fc400000000, 0x05a2f78200000000, 0xafa72d7300000000, + 0x10af32ba00000000, 0xbaaae84b00000000, 0x2fb87df300000000, + 0x85bda70200000000, 0x3ab5b8cb00000000, 0x90b0623a00000000, + 0x5196e36100000000, 0xfb93399000000000, 0x449b265900000000, + 0xee9efca800000000, 0x7b8c691000000000, 0xd189b3e100000000, + 0x6e81ac2800000000, 0xc48476d900000000, 0x3e111ca500000000, + 0x9414c65400000000, 0x2b1cd99d00000000, 0x8119036c00000000, + 0x140b96d400000000, 0xbe0e4c2500000000, 0x010653ec00000000, + 0xab03891d00000000, 0x6a25084600000000, 0xc020d2b700000000, + 0x7f28cd7e00000000, 0xd52d178f00000000, 0x403f823700000000, + 0xea3a58c600000000, 0x5532470f00000000, 0xff379dfe00000000, + 0xd77f45b800000000, 0x7d7a9f4900000000, 0xc272808000000000, + 0x68775a7100000000, 0xfd65cfc900000000, 0x5760153800000000, + 0xe8680af100000000, 0x426dd00000000000, 0x834b515b00000000, + 0x294e8baa00000000, 0x9646946300000000, 0x3c434e9200000000, + 0xa951db2a00000000, 0x035401db00000000, 0xbc5c1e1200000000, + 0x1659c4e300000000}}; + +#else /* W == 4 */ + +local const z_crc_t FAR crc_braid_table[][256] = { + {0x00000000, 0xae689191, 0x87a02563, 0x29c8b4f2, 0xd4314c87, + 0x7a59dd16, 0x539169e4, 0xfdf9f875, 0x73139f4f, 0xdd7b0ede, + 0xf4b3ba2c, 0x5adb2bbd, 0xa722d3c8, 0x094a4259, 0x2082f6ab, + 0x8eea673a, 0xe6273e9e, 0x484faf0f, 0x61871bfd, 0xcfef8a6c, + 0x32167219, 0x9c7ee388, 0xb5b6577a, 0x1bdec6eb, 0x9534a1d1, + 0x3b5c3040, 0x129484b2, 0xbcfc1523, 0x4105ed56, 0xef6d7cc7, + 0xc6a5c835, 0x68cd59a4, 0x173f7b7d, 0xb957eaec, 0x909f5e1e, + 0x3ef7cf8f, 0xc30e37fa, 0x6d66a66b, 0x44ae1299, 0xeac68308, + 0x642ce432, 0xca4475a3, 0xe38cc151, 0x4de450c0, 0xb01da8b5, + 0x1e753924, 0x37bd8dd6, 0x99d51c47, 0xf11845e3, 0x5f70d472, + 0x76b86080, 0xd8d0f111, 0x25290964, 0x8b4198f5, 0xa2892c07, + 0x0ce1bd96, 0x820bdaac, 0x2c634b3d, 0x05abffcf, 0xabc36e5e, + 0x563a962b, 0xf85207ba, 0xd19ab348, 0x7ff222d9, 0x2e7ef6fa, + 0x8016676b, 0xa9ded399, 0x07b64208, 0xfa4fba7d, 0x54272bec, + 0x7def9f1e, 0xd3870e8f, 0x5d6d69b5, 0xf305f824, 0xdacd4cd6, + 0x74a5dd47, 0x895c2532, 0x2734b4a3, 0x0efc0051, 0xa09491c0, + 0xc859c864, 0x663159f5, 0x4ff9ed07, 0xe1917c96, 0x1c6884e3, + 0xb2001572, 0x9bc8a180, 0x35a03011, 0xbb4a572b, 0x1522c6ba, + 0x3cea7248, 0x9282e3d9, 0x6f7b1bac, 0xc1138a3d, 0xe8db3ecf, + 0x46b3af5e, 0x39418d87, 0x97291c16, 0xbee1a8e4, 0x10893975, + 0xed70c100, 0x43185091, 0x6ad0e463, 0xc4b875f2, 0x4a5212c8, + 0xe43a8359, 0xcdf237ab, 0x639aa63a, 0x9e635e4f, 0x300bcfde, + 0x19c37b2c, 0xb7abeabd, 0xdf66b319, 0x710e2288, 0x58c6967a, + 0xf6ae07eb, 0x0b57ff9e, 0xa53f6e0f, 0x8cf7dafd, 0x229f4b6c, + 0xac752c56, 0x021dbdc7, 0x2bd50935, 0x85bd98a4, 0x784460d1, + 0xd62cf140, 0xffe445b2, 0x518cd423, 0x5cfdedf4, 0xf2957c65, + 0xdb5dc897, 0x75355906, 0x88cca173, 0x26a430e2, 0x0f6c8410, + 0xa1041581, 0x2fee72bb, 0x8186e32a, 0xa84e57d8, 0x0626c649, + 0xfbdf3e3c, 0x55b7afad, 0x7c7f1b5f, 0xd2178ace, 0xbadad36a, + 0x14b242fb, 0x3d7af609, 0x93126798, 0x6eeb9fed, 0xc0830e7c, + 0xe94bba8e, 0x47232b1f, 0xc9c94c25, 0x67a1ddb4, 0x4e696946, + 0xe001f8d7, 0x1df800a2, 0xb3909133, 0x9a5825c1, 0x3430b450, + 0x4bc29689, 0xe5aa0718, 0xcc62b3ea, 0x620a227b, 0x9ff3da0e, + 0x319b4b9f, 0x1853ff6d, 0xb63b6efc, 0x38d109c6, 0x96b99857, + 0xbf712ca5, 0x1119bd34, 0xece04541, 0x4288d4d0, 0x6b406022, + 0xc528f1b3, 0xade5a817, 0x038d3986, 0x2a458d74, 0x842d1ce5, + 0x79d4e490, 0xd7bc7501, 0xfe74c1f3, 0x501c5062, 0xdef63758, + 0x709ea6c9, 0x5956123b, 0xf73e83aa, 0x0ac77bdf, 0xa4afea4e, + 0x8d675ebc, 0x230fcf2d, 0x72831b0e, 0xdceb8a9f, 0xf5233e6d, + 0x5b4baffc, 0xa6b25789, 0x08dac618, 0x211272ea, 0x8f7ae37b, + 0x01908441, 0xaff815d0, 0x8630a122, 0x285830b3, 0xd5a1c8c6, + 0x7bc95957, 0x5201eda5, 0xfc697c34, 0x94a42590, 0x3accb401, + 0x130400f3, 0xbd6c9162, 0x40956917, 0xeefdf886, 0xc7354c74, + 0x695ddde5, 0xe7b7badf, 0x49df2b4e, 0x60179fbc, 0xce7f0e2d, + 0x3386f658, 0x9dee67c9, 0xb426d33b, 0x1a4e42aa, 0x65bc6073, + 0xcbd4f1e2, 0xe21c4510, 0x4c74d481, 0xb18d2cf4, 0x1fe5bd65, + 0x362d0997, 0x98459806, 0x16afff3c, 0xb8c76ead, 0x910fda5f, + 0x3f674bce, 0xc29eb3bb, 0x6cf6222a, 0x453e96d8, 0xeb560749, + 0x839b5eed, 0x2df3cf7c, 0x043b7b8e, 0xaa53ea1f, 0x57aa126a, + 0xf9c283fb, 0xd00a3709, 0x7e62a698, 0xf088c1a2, 0x5ee05033, + 0x7728e4c1, 0xd9407550, 0x24b98d25, 0x8ad11cb4, 0xa319a846, + 0x0d7139d7}, + {0x00000000, 0xb9fbdbe8, 0xa886b191, 0x117d6a79, 0x8a7c6563, + 0x3387be8b, 0x22fad4f2, 0x9b010f1a, 0xcf89cc87, 0x7672176f, + 0x670f7d16, 0xdef4a6fe, 0x45f5a9e4, 0xfc0e720c, 0xed731875, + 0x5488c39d, 0x44629f4f, 0xfd9944a7, 0xece42ede, 0x551ff536, + 0xce1efa2c, 0x77e521c4, 0x66984bbd, 0xdf639055, 0x8beb53c8, + 0x32108820, 0x236de259, 0x9a9639b1, 0x019736ab, 0xb86ced43, + 0xa911873a, 0x10ea5cd2, 0x88c53e9e, 0x313ee576, 0x20438f0f, + 0x99b854e7, 0x02b95bfd, 0xbb428015, 0xaa3fea6c, 0x13c43184, + 0x474cf219, 0xfeb729f1, 0xefca4388, 0x56319860, 0xcd30977a, + 0x74cb4c92, 0x65b626eb, 0xdc4dfd03, 0xcca7a1d1, 0x755c7a39, + 0x64211040, 0xdddacba8, 0x46dbc4b2, 0xff201f5a, 0xee5d7523, + 0x57a6aecb, 0x032e6d56, 0xbad5b6be, 0xaba8dcc7, 0x1253072f, + 0x89520835, 0x30a9d3dd, 0x21d4b9a4, 0x982f624c, 0xcafb7b7d, + 0x7300a095, 0x627dcaec, 0xdb861104, 0x40871e1e, 0xf97cc5f6, + 0xe801af8f, 0x51fa7467, 0x0572b7fa, 0xbc896c12, 0xadf4066b, + 0x140fdd83, 0x8f0ed299, 0x36f50971, 0x27886308, 0x9e73b8e0, + 0x8e99e432, 0x37623fda, 0x261f55a3, 0x9fe48e4b, 0x04e58151, + 0xbd1e5ab9, 0xac6330c0, 0x1598eb28, 0x411028b5, 0xf8ebf35d, + 0xe9969924, 0x506d42cc, 0xcb6c4dd6, 0x7297963e, 0x63eafc47, + 0xda1127af, 0x423e45e3, 0xfbc59e0b, 0xeab8f472, 0x53432f9a, + 0xc8422080, 0x71b9fb68, 0x60c49111, 0xd93f4af9, 0x8db78964, + 0x344c528c, 0x253138f5, 0x9ccae31d, 0x07cbec07, 0xbe3037ef, + 0xaf4d5d96, 0x16b6867e, 0x065cdaac, 0xbfa70144, 0xaeda6b3d, + 0x1721b0d5, 0x8c20bfcf, 0x35db6427, 0x24a60e5e, 0x9d5dd5b6, + 0xc9d5162b, 0x702ecdc3, 0x6153a7ba, 0xd8a87c52, 0x43a97348, + 0xfa52a8a0, 0xeb2fc2d9, 0x52d41931, 0x4e87f0bb, 0xf77c2b53, + 0xe601412a, 0x5ffa9ac2, 0xc4fb95d8, 0x7d004e30, 0x6c7d2449, + 0xd586ffa1, 0x810e3c3c, 0x38f5e7d4, 0x29888dad, 0x90735645, + 0x0b72595f, 0xb28982b7, 0xa3f4e8ce, 0x1a0f3326, 0x0ae56ff4, + 0xb31eb41c, 0xa263de65, 0x1b98058d, 0x80990a97, 0x3962d17f, + 0x281fbb06, 0x91e460ee, 0xc56ca373, 0x7c97789b, 0x6dea12e2, + 0xd411c90a, 0x4f10c610, 0xf6eb1df8, 0xe7967781, 0x5e6dac69, + 0xc642ce25, 0x7fb915cd, 0x6ec47fb4, 0xd73fa45c, 0x4c3eab46, + 0xf5c570ae, 0xe4b81ad7, 0x5d43c13f, 0x09cb02a2, 0xb030d94a, + 0xa14db333, 0x18b668db, 0x83b767c1, 0x3a4cbc29, 0x2b31d650, + 0x92ca0db8, 0x8220516a, 0x3bdb8a82, 0x2aa6e0fb, 0x935d3b13, + 0x085c3409, 0xb1a7efe1, 0xa0da8598, 0x19215e70, 0x4da99ded, + 0xf4524605, 0xe52f2c7c, 0x5cd4f794, 0xc7d5f88e, 0x7e2e2366, + 0x6f53491f, 0xd6a892f7, 0x847c8bc6, 0x3d87502e, 0x2cfa3a57, + 0x9501e1bf, 0x0e00eea5, 0xb7fb354d, 0xa6865f34, 0x1f7d84dc, + 0x4bf54741, 0xf20e9ca9, 0xe373f6d0, 0x5a882d38, 0xc1892222, + 0x7872f9ca, 0x690f93b3, 0xd0f4485b, 0xc01e1489, 0x79e5cf61, + 0x6898a518, 0xd1637ef0, 0x4a6271ea, 0xf399aa02, 0xe2e4c07b, + 0x5b1f1b93, 0x0f97d80e, 0xb66c03e6, 0xa711699f, 0x1eeab277, + 0x85ebbd6d, 0x3c106685, 0x2d6d0cfc, 0x9496d714, 0x0cb9b558, + 0xb5426eb0, 0xa43f04c9, 0x1dc4df21, 0x86c5d03b, 0x3f3e0bd3, + 0x2e4361aa, 0x97b8ba42, 0xc33079df, 0x7acba237, 0x6bb6c84e, + 0xd24d13a6, 0x494c1cbc, 0xf0b7c754, 0xe1caad2d, 0x583176c5, + 0x48db2a17, 0xf120f1ff, 0xe05d9b86, 0x59a6406e, 0xc2a74f74, + 0x7b5c949c, 0x6a21fee5, 0xd3da250d, 0x8752e690, 0x3ea93d78, + 0x2fd45701, 0x962f8ce9, 0x0d2e83f3, 0xb4d5581b, 0xa5a83262, + 0x1c53e98a}, + {0x00000000, 0x9d0fe176, 0xe16ec4ad, 0x7c6125db, 0x19ac8f1b, + 0x84a36e6d, 0xf8c24bb6, 0x65cdaac0, 0x33591e36, 0xae56ff40, + 0xd237da9b, 0x4f383bed, 0x2af5912d, 0xb7fa705b, 0xcb9b5580, + 0x5694b4f6, 0x66b23c6c, 0xfbbddd1a, 0x87dcf8c1, 0x1ad319b7, + 0x7f1eb377, 0xe2115201, 0x9e7077da, 0x037f96ac, 0x55eb225a, + 0xc8e4c32c, 0xb485e6f7, 0x298a0781, 0x4c47ad41, 0xd1484c37, + 0xad2969ec, 0x3026889a, 0xcd6478d8, 0x506b99ae, 0x2c0abc75, + 0xb1055d03, 0xd4c8f7c3, 0x49c716b5, 0x35a6336e, 0xa8a9d218, + 0xfe3d66ee, 0x63328798, 0x1f53a243, 0x825c4335, 0xe791e9f5, + 0x7a9e0883, 0x06ff2d58, 0x9bf0cc2e, 0xabd644b4, 0x36d9a5c2, + 0x4ab88019, 0xd7b7616f, 0xb27acbaf, 0x2f752ad9, 0x53140f02, + 0xce1bee74, 0x988f5a82, 0x0580bbf4, 0x79e19e2f, 0xe4ee7f59, + 0x8123d599, 0x1c2c34ef, 0x604d1134, 0xfd42f042, 0x41b9f7f1, + 0xdcb61687, 0xa0d7335c, 0x3dd8d22a, 0x581578ea, 0xc51a999c, + 0xb97bbc47, 0x24745d31, 0x72e0e9c7, 0xefef08b1, 0x938e2d6a, + 0x0e81cc1c, 0x6b4c66dc, 0xf64387aa, 0x8a22a271, 0x172d4307, + 0x270bcb9d, 0xba042aeb, 0xc6650f30, 0x5b6aee46, 0x3ea74486, + 0xa3a8a5f0, 0xdfc9802b, 0x42c6615d, 0x1452d5ab, 0x895d34dd, + 0xf53c1106, 0x6833f070, 0x0dfe5ab0, 0x90f1bbc6, 0xec909e1d, + 0x719f7f6b, 0x8cdd8f29, 0x11d26e5f, 0x6db34b84, 0xf0bcaaf2, + 0x95710032, 0x087ee144, 0x741fc49f, 0xe91025e9, 0xbf84911f, + 0x228b7069, 0x5eea55b2, 0xc3e5b4c4, 0xa6281e04, 0x3b27ff72, + 0x4746daa9, 0xda493bdf, 0xea6fb345, 0x77605233, 0x0b0177e8, + 0x960e969e, 0xf3c33c5e, 0x6eccdd28, 0x12adf8f3, 0x8fa21985, + 0xd936ad73, 0x44394c05, 0x385869de, 0xa55788a8, 0xc09a2268, + 0x5d95c31e, 0x21f4e6c5, 0xbcfb07b3, 0x8373efe2, 0x1e7c0e94, + 0x621d2b4f, 0xff12ca39, 0x9adf60f9, 0x07d0818f, 0x7bb1a454, + 0xe6be4522, 0xb02af1d4, 0x2d2510a2, 0x51443579, 0xcc4bd40f, + 0xa9867ecf, 0x34899fb9, 0x48e8ba62, 0xd5e75b14, 0xe5c1d38e, + 0x78ce32f8, 0x04af1723, 0x99a0f655, 0xfc6d5c95, 0x6162bde3, + 0x1d039838, 0x800c794e, 0xd698cdb8, 0x4b972cce, 0x37f60915, + 0xaaf9e863, 0xcf3442a3, 0x523ba3d5, 0x2e5a860e, 0xb3556778, + 0x4e17973a, 0xd318764c, 0xaf795397, 0x3276b2e1, 0x57bb1821, + 0xcab4f957, 0xb6d5dc8c, 0x2bda3dfa, 0x7d4e890c, 0xe041687a, + 0x9c204da1, 0x012facd7, 0x64e20617, 0xf9ede761, 0x858cc2ba, + 0x188323cc, 0x28a5ab56, 0xb5aa4a20, 0xc9cb6ffb, 0x54c48e8d, + 0x3109244d, 0xac06c53b, 0xd067e0e0, 0x4d680196, 0x1bfcb560, + 0x86f35416, 0xfa9271cd, 0x679d90bb, 0x02503a7b, 0x9f5fdb0d, + 0xe33efed6, 0x7e311fa0, 0xc2ca1813, 0x5fc5f965, 0x23a4dcbe, + 0xbeab3dc8, 0xdb669708, 0x4669767e, 0x3a0853a5, 0xa707b2d3, + 0xf1930625, 0x6c9ce753, 0x10fdc288, 0x8df223fe, 0xe83f893e, + 0x75306848, 0x09514d93, 0x945eace5, 0xa478247f, 0x3977c509, + 0x4516e0d2, 0xd81901a4, 0xbdd4ab64, 0x20db4a12, 0x5cba6fc9, + 0xc1b58ebf, 0x97213a49, 0x0a2edb3f, 0x764ffee4, 0xeb401f92, + 0x8e8db552, 0x13825424, 0x6fe371ff, 0xf2ec9089, 0x0fae60cb, + 0x92a181bd, 0xeec0a466, 0x73cf4510, 0x1602efd0, 0x8b0d0ea6, + 0xf76c2b7d, 0x6a63ca0b, 0x3cf77efd, 0xa1f89f8b, 0xdd99ba50, + 0x40965b26, 0x255bf1e6, 0xb8541090, 0xc435354b, 0x593ad43d, + 0x691c5ca7, 0xf413bdd1, 0x8872980a, 0x157d797c, 0x70b0d3bc, + 0xedbf32ca, 0x91de1711, 0x0cd1f667, 0x5a454291, 0xc74aa3e7, + 0xbb2b863c, 0x2624674a, 0x43e9cd8a, 0xdee62cfc, 0xa2870927, + 0x3f88e851}, + {0x00000000, 0xdd96d985, 0x605cb54b, 0xbdca6cce, 0xc0b96a96, + 0x1d2fb313, 0xa0e5dfdd, 0x7d730658, 0x5a03d36d, 0x87950ae8, + 0x3a5f6626, 0xe7c9bfa3, 0x9abab9fb, 0x472c607e, 0xfae60cb0, + 0x2770d535, 0xb407a6da, 0x69917f5f, 0xd45b1391, 0x09cdca14, + 0x74becc4c, 0xa92815c9, 0x14e27907, 0xc974a082, 0xee0475b7, + 0x3392ac32, 0x8e58c0fc, 0x53ce1979, 0x2ebd1f21, 0xf32bc6a4, + 0x4ee1aa6a, 0x937773ef, 0xb37e4bf5, 0x6ee89270, 0xd322febe, + 0x0eb4273b, 0x73c72163, 0xae51f8e6, 0x139b9428, 0xce0d4dad, + 0xe97d9898, 0x34eb411d, 0x89212dd3, 0x54b7f456, 0x29c4f20e, + 0xf4522b8b, 0x49984745, 0x940e9ec0, 0x0779ed2f, 0xdaef34aa, + 0x67255864, 0xbab381e1, 0xc7c087b9, 0x1a565e3c, 0xa79c32f2, + 0x7a0aeb77, 0x5d7a3e42, 0x80ece7c7, 0x3d268b09, 0xe0b0528c, + 0x9dc354d4, 0x40558d51, 0xfd9fe19f, 0x2009381a, 0xbd8d91ab, + 0x601b482e, 0xddd124e0, 0x0047fd65, 0x7d34fb3d, 0xa0a222b8, + 0x1d684e76, 0xc0fe97f3, 0xe78e42c6, 0x3a189b43, 0x87d2f78d, + 0x5a442e08, 0x27372850, 0xfaa1f1d5, 0x476b9d1b, 0x9afd449e, + 0x098a3771, 0xd41ceef4, 0x69d6823a, 0xb4405bbf, 0xc9335de7, + 0x14a58462, 0xa96fe8ac, 0x74f93129, 0x5389e41c, 0x8e1f3d99, + 0x33d55157, 0xee4388d2, 0x93308e8a, 0x4ea6570f, 0xf36c3bc1, + 0x2efae244, 0x0ef3da5e, 0xd36503db, 0x6eaf6f15, 0xb339b690, + 0xce4ab0c8, 0x13dc694d, 0xae160583, 0x7380dc06, 0x54f00933, + 0x8966d0b6, 0x34acbc78, 0xe93a65fd, 0x944963a5, 0x49dfba20, + 0xf415d6ee, 0x29830f6b, 0xbaf47c84, 0x6762a501, 0xdaa8c9cf, + 0x073e104a, 0x7a4d1612, 0xa7dbcf97, 0x1a11a359, 0xc7877adc, + 0xe0f7afe9, 0x3d61766c, 0x80ab1aa2, 0x5d3dc327, 0x204ec57f, + 0xfdd81cfa, 0x40127034, 0x9d84a9b1, 0xa06a2517, 0x7dfcfc92, + 0xc036905c, 0x1da049d9, 0x60d34f81, 0xbd459604, 0x008ffaca, + 0xdd19234f, 0xfa69f67a, 0x27ff2fff, 0x9a354331, 0x47a39ab4, + 0x3ad09cec, 0xe7464569, 0x5a8c29a7, 0x871af022, 0x146d83cd, + 0xc9fb5a48, 0x74313686, 0xa9a7ef03, 0xd4d4e95b, 0x094230de, + 0xb4885c10, 0x691e8595, 0x4e6e50a0, 0x93f88925, 0x2e32e5eb, + 0xf3a43c6e, 0x8ed73a36, 0x5341e3b3, 0xee8b8f7d, 0x331d56f8, + 0x13146ee2, 0xce82b767, 0x7348dba9, 0xaede022c, 0xd3ad0474, + 0x0e3bddf1, 0xb3f1b13f, 0x6e6768ba, 0x4917bd8f, 0x9481640a, + 0x294b08c4, 0xf4ddd141, 0x89aed719, 0x54380e9c, 0xe9f26252, + 0x3464bbd7, 0xa713c838, 0x7a8511bd, 0xc74f7d73, 0x1ad9a4f6, + 0x67aaa2ae, 0xba3c7b2b, 0x07f617e5, 0xda60ce60, 0xfd101b55, + 0x2086c2d0, 0x9d4cae1e, 0x40da779b, 0x3da971c3, 0xe03fa846, + 0x5df5c488, 0x80631d0d, 0x1de7b4bc, 0xc0716d39, 0x7dbb01f7, + 0xa02dd872, 0xdd5ede2a, 0x00c807af, 0xbd026b61, 0x6094b2e4, + 0x47e467d1, 0x9a72be54, 0x27b8d29a, 0xfa2e0b1f, 0x875d0d47, + 0x5acbd4c2, 0xe701b80c, 0x3a976189, 0xa9e01266, 0x7476cbe3, + 0xc9bca72d, 0x142a7ea8, 0x695978f0, 0xb4cfa175, 0x0905cdbb, + 0xd493143e, 0xf3e3c10b, 0x2e75188e, 0x93bf7440, 0x4e29adc5, + 0x335aab9d, 0xeecc7218, 0x53061ed6, 0x8e90c753, 0xae99ff49, + 0x730f26cc, 0xcec54a02, 0x13539387, 0x6e2095df, 0xb3b64c5a, + 0x0e7c2094, 0xd3eaf911, 0xf49a2c24, 0x290cf5a1, 0x94c6996f, + 0x495040ea, 0x342346b2, 0xe9b59f37, 0x547ff3f9, 0x89e92a7c, + 0x1a9e5993, 0xc7088016, 0x7ac2ecd8, 0xa754355d, 0xda273305, + 0x07b1ea80, 0xba7b864e, 0x67ed5fcb, 0x409d8afe, 0x9d0b537b, + 0x20c13fb5, 0xfd57e630, 0x8024e068, 0x5db239ed, 0xe0785523, + 0x3dee8ca6}}; + +local const z_word_t FAR crc_braid_big_table[][256] = { + {0x00000000, 0x85d996dd, 0x4bb55c60, 0xce6ccabd, 0x966ab9c0, + 0x13b32f1d, 0xdddfe5a0, 0x5806737d, 0x6dd3035a, 0xe80a9587, + 0x26665f3a, 0xa3bfc9e7, 0xfbb9ba9a, 0x7e602c47, 0xb00ce6fa, + 0x35d57027, 0xdaa607b4, 0x5f7f9169, 0x91135bd4, 0x14cacd09, + 0x4cccbe74, 0xc91528a9, 0x0779e214, 0x82a074c9, 0xb77504ee, + 0x32ac9233, 0xfcc0588e, 0x7919ce53, 0x211fbd2e, 0xa4c62bf3, + 0x6aaae14e, 0xef737793, 0xf54b7eb3, 0x7092e86e, 0xbefe22d3, + 0x3b27b40e, 0x6321c773, 0xe6f851ae, 0x28949b13, 0xad4d0dce, + 0x98987de9, 0x1d41eb34, 0xd32d2189, 0x56f4b754, 0x0ef2c429, + 0x8b2b52f4, 0x45479849, 0xc09e0e94, 0x2fed7907, 0xaa34efda, + 0x64582567, 0xe181b3ba, 0xb987c0c7, 0x3c5e561a, 0xf2329ca7, + 0x77eb0a7a, 0x423e7a5d, 0xc7e7ec80, 0x098b263d, 0x8c52b0e0, + 0xd454c39d, 0x518d5540, 0x9fe19ffd, 0x1a380920, 0xab918dbd, + 0x2e481b60, 0xe024d1dd, 0x65fd4700, 0x3dfb347d, 0xb822a2a0, + 0x764e681d, 0xf397fec0, 0xc6428ee7, 0x439b183a, 0x8df7d287, + 0x082e445a, 0x50283727, 0xd5f1a1fa, 0x1b9d6b47, 0x9e44fd9a, + 0x71378a09, 0xf4ee1cd4, 0x3a82d669, 0xbf5b40b4, 0xe75d33c9, + 0x6284a514, 0xace86fa9, 0x2931f974, 0x1ce48953, 0x993d1f8e, + 0x5751d533, 0xd28843ee, 0x8a8e3093, 0x0f57a64e, 0xc13b6cf3, + 0x44e2fa2e, 0x5edaf30e, 0xdb0365d3, 0x156faf6e, 0x90b639b3, + 0xc8b04ace, 0x4d69dc13, 0x830516ae, 0x06dc8073, 0x3309f054, + 0xb6d06689, 0x78bcac34, 0xfd653ae9, 0xa5634994, 0x20badf49, + 0xeed615f4, 0x6b0f8329, 0x847cf4ba, 0x01a56267, 0xcfc9a8da, + 0x4a103e07, 0x12164d7a, 0x97cfdba7, 0x59a3111a, 0xdc7a87c7, + 0xe9aff7e0, 0x6c76613d, 0xa21aab80, 0x27c33d5d, 0x7fc54e20, + 0xfa1cd8fd, 0x34701240, 0xb1a9849d, 0x17256aa0, 0x92fcfc7d, + 0x5c9036c0, 0xd949a01d, 0x814fd360, 0x049645bd, 0xcafa8f00, + 0x4f2319dd, 0x7af669fa, 0xff2fff27, 0x3143359a, 0xb49aa347, + 0xec9cd03a, 0x694546e7, 0xa7298c5a, 0x22f01a87, 0xcd836d14, + 0x485afbc9, 0x86363174, 0x03efa7a9, 0x5be9d4d4, 0xde304209, + 0x105c88b4, 0x95851e69, 0xa0506e4e, 0x2589f893, 0xebe5322e, + 0x6e3ca4f3, 0x363ad78e, 0xb3e34153, 0x7d8f8bee, 0xf8561d33, + 0xe26e1413, 0x67b782ce, 0xa9db4873, 0x2c02deae, 0x7404add3, + 0xf1dd3b0e, 0x3fb1f1b3, 0xba68676e, 0x8fbd1749, 0x0a648194, + 0xc4084b29, 0x41d1ddf4, 0x19d7ae89, 0x9c0e3854, 0x5262f2e9, + 0xd7bb6434, 0x38c813a7, 0xbd11857a, 0x737d4fc7, 0xf6a4d91a, + 0xaea2aa67, 0x2b7b3cba, 0xe517f607, 0x60ce60da, 0x551b10fd, + 0xd0c28620, 0x1eae4c9d, 0x9b77da40, 0xc371a93d, 0x46a83fe0, + 0x88c4f55d, 0x0d1d6380, 0xbcb4e71d, 0x396d71c0, 0xf701bb7d, + 0x72d82da0, 0x2ade5edd, 0xaf07c800, 0x616b02bd, 0xe4b29460, + 0xd167e447, 0x54be729a, 0x9ad2b827, 0x1f0b2efa, 0x470d5d87, + 0xc2d4cb5a, 0x0cb801e7, 0x8961973a, 0x6612e0a9, 0xe3cb7674, + 0x2da7bcc9, 0xa87e2a14, 0xf0785969, 0x75a1cfb4, 0xbbcd0509, + 0x3e1493d4, 0x0bc1e3f3, 0x8e18752e, 0x4074bf93, 0xc5ad294e, + 0x9dab5a33, 0x1872ccee, 0xd61e0653, 0x53c7908e, 0x49ff99ae, + 0xcc260f73, 0x024ac5ce, 0x87935313, 0xdf95206e, 0x5a4cb6b3, + 0x94207c0e, 0x11f9ead3, 0x242c9af4, 0xa1f50c29, 0x6f99c694, + 0xea405049, 0xb2462334, 0x379fb5e9, 0xf9f37f54, 0x7c2ae989, + 0x93599e1a, 0x168008c7, 0xd8ecc27a, 0x5d3554a7, 0x053327da, + 0x80eab107, 0x4e867bba, 0xcb5fed67, 0xfe8a9d40, 0x7b530b9d, + 0xb53fc120, 0x30e657fd, 0x68e02480, 0xed39b25d, 0x235578e0, + 0xa68cee3d}, + {0x00000000, 0x76e10f9d, 0xadc46ee1, 0xdb25617c, 0x1b8fac19, + 0x6d6ea384, 0xb64bc2f8, 0xc0aacd65, 0x361e5933, 0x40ff56ae, + 0x9bda37d2, 0xed3b384f, 0x2d91f52a, 0x5b70fab7, 0x80559bcb, + 0xf6b49456, 0x6c3cb266, 0x1addbdfb, 0xc1f8dc87, 0xb719d31a, + 0x77b31e7f, 0x015211e2, 0xda77709e, 0xac967f03, 0x5a22eb55, + 0x2cc3e4c8, 0xf7e685b4, 0x81078a29, 0x41ad474c, 0x374c48d1, + 0xec6929ad, 0x9a882630, 0xd87864cd, 0xae996b50, 0x75bc0a2c, + 0x035d05b1, 0xc3f7c8d4, 0xb516c749, 0x6e33a635, 0x18d2a9a8, + 0xee663dfe, 0x98873263, 0x43a2531f, 0x35435c82, 0xf5e991e7, + 0x83089e7a, 0x582dff06, 0x2eccf09b, 0xb444d6ab, 0xc2a5d936, + 0x1980b84a, 0x6f61b7d7, 0xafcb7ab2, 0xd92a752f, 0x020f1453, + 0x74ee1bce, 0x825a8f98, 0xf4bb8005, 0x2f9ee179, 0x597feee4, + 0x99d52381, 0xef342c1c, 0x34114d60, 0x42f042fd, 0xf1f7b941, + 0x8716b6dc, 0x5c33d7a0, 0x2ad2d83d, 0xea781558, 0x9c991ac5, + 0x47bc7bb9, 0x315d7424, 0xc7e9e072, 0xb108efef, 0x6a2d8e93, + 0x1ccc810e, 0xdc664c6b, 0xaa8743f6, 0x71a2228a, 0x07432d17, + 0x9dcb0b27, 0xeb2a04ba, 0x300f65c6, 0x46ee6a5b, 0x8644a73e, + 0xf0a5a8a3, 0x2b80c9df, 0x5d61c642, 0xabd55214, 0xdd345d89, + 0x06113cf5, 0x70f03368, 0xb05afe0d, 0xc6bbf190, 0x1d9e90ec, + 0x6b7f9f71, 0x298fdd8c, 0x5f6ed211, 0x844bb36d, 0xf2aabcf0, + 0x32007195, 0x44e17e08, 0x9fc41f74, 0xe92510e9, 0x1f9184bf, + 0x69708b22, 0xb255ea5e, 0xc4b4e5c3, 0x041e28a6, 0x72ff273b, + 0xa9da4647, 0xdf3b49da, 0x45b36fea, 0x33526077, 0xe877010b, + 0x9e960e96, 0x5e3cc3f3, 0x28ddcc6e, 0xf3f8ad12, 0x8519a28f, + 0x73ad36d9, 0x054c3944, 0xde695838, 0xa88857a5, 0x68229ac0, + 0x1ec3955d, 0xc5e6f421, 0xb307fbbc, 0xe2ef7383, 0x940e7c1e, + 0x4f2b1d62, 0x39ca12ff, 0xf960df9a, 0x8f81d007, 0x54a4b17b, + 0x2245bee6, 0xd4f12ab0, 0xa210252d, 0x79354451, 0x0fd44bcc, + 0xcf7e86a9, 0xb99f8934, 0x62bae848, 0x145be7d5, 0x8ed3c1e5, + 0xf832ce78, 0x2317af04, 0x55f6a099, 0x955c6dfc, 0xe3bd6261, + 0x3898031d, 0x4e790c80, 0xb8cd98d6, 0xce2c974b, 0x1509f637, + 0x63e8f9aa, 0xa34234cf, 0xd5a33b52, 0x0e865a2e, 0x786755b3, + 0x3a97174e, 0x4c7618d3, 0x975379af, 0xe1b27632, 0x2118bb57, + 0x57f9b4ca, 0x8cdcd5b6, 0xfa3dda2b, 0x0c894e7d, 0x7a6841e0, + 0xa14d209c, 0xd7ac2f01, 0x1706e264, 0x61e7edf9, 0xbac28c85, + 0xcc238318, 0x56aba528, 0x204aaab5, 0xfb6fcbc9, 0x8d8ec454, + 0x4d240931, 0x3bc506ac, 0xe0e067d0, 0x9601684d, 0x60b5fc1b, + 0x1654f386, 0xcd7192fa, 0xbb909d67, 0x7b3a5002, 0x0ddb5f9f, + 0xd6fe3ee3, 0xa01f317e, 0x1318cac2, 0x65f9c55f, 0xbedca423, + 0xc83dabbe, 0x089766db, 0x7e766946, 0xa553083a, 0xd3b207a7, + 0x250693f1, 0x53e79c6c, 0x88c2fd10, 0xfe23f28d, 0x3e893fe8, + 0x48683075, 0x934d5109, 0xe5ac5e94, 0x7f2478a4, 0x09c57739, + 0xd2e01645, 0xa40119d8, 0x64abd4bd, 0x124adb20, 0xc96fba5c, + 0xbf8eb5c1, 0x493a2197, 0x3fdb2e0a, 0xe4fe4f76, 0x921f40eb, + 0x52b58d8e, 0x24548213, 0xff71e36f, 0x8990ecf2, 0xcb60ae0f, + 0xbd81a192, 0x66a4c0ee, 0x1045cf73, 0xd0ef0216, 0xa60e0d8b, + 0x7d2b6cf7, 0x0bca636a, 0xfd7ef73c, 0x8b9ff8a1, 0x50ba99dd, + 0x265b9640, 0xe6f15b25, 0x901054b8, 0x4b3535c4, 0x3dd43a59, + 0xa75c1c69, 0xd1bd13f4, 0x0a987288, 0x7c797d15, 0xbcd3b070, + 0xca32bfed, 0x1117de91, 0x67f6d10c, 0x9142455a, 0xe7a34ac7, + 0x3c862bbb, 0x4a672426, 0x8acde943, 0xfc2ce6de, 0x270987a2, + 0x51e8883f}, + {0x00000000, 0xe8dbfbb9, 0x91b186a8, 0x796a7d11, 0x63657c8a, + 0x8bbe8733, 0xf2d4fa22, 0x1a0f019b, 0x87cc89cf, 0x6f177276, + 0x167d0f67, 0xfea6f4de, 0xe4a9f545, 0x0c720efc, 0x751873ed, + 0x9dc38854, 0x4f9f6244, 0xa74499fd, 0xde2ee4ec, 0x36f51f55, + 0x2cfa1ece, 0xc421e577, 0xbd4b9866, 0x559063df, 0xc853eb8b, + 0x20881032, 0x59e26d23, 0xb139969a, 0xab369701, 0x43ed6cb8, + 0x3a8711a9, 0xd25cea10, 0x9e3ec588, 0x76e53e31, 0x0f8f4320, + 0xe754b899, 0xfd5bb902, 0x158042bb, 0x6cea3faa, 0x8431c413, + 0x19f24c47, 0xf129b7fe, 0x8843caef, 0x60983156, 0x7a9730cd, + 0x924ccb74, 0xeb26b665, 0x03fd4ddc, 0xd1a1a7cc, 0x397a5c75, + 0x40102164, 0xa8cbdadd, 0xb2c4db46, 0x5a1f20ff, 0x23755dee, + 0xcbaea657, 0x566d2e03, 0xbeb6d5ba, 0xc7dca8ab, 0x2f075312, + 0x35085289, 0xddd3a930, 0xa4b9d421, 0x4c622f98, 0x7d7bfbca, + 0x95a00073, 0xecca7d62, 0x041186db, 0x1e1e8740, 0xf6c57cf9, + 0x8faf01e8, 0x6774fa51, 0xfab77205, 0x126c89bc, 0x6b06f4ad, + 0x83dd0f14, 0x99d20e8f, 0x7109f536, 0x08638827, 0xe0b8739e, + 0x32e4998e, 0xda3f6237, 0xa3551f26, 0x4b8ee49f, 0x5181e504, + 0xb95a1ebd, 0xc03063ac, 0x28eb9815, 0xb5281041, 0x5df3ebf8, + 0x249996e9, 0xcc426d50, 0xd64d6ccb, 0x3e969772, 0x47fcea63, + 0xaf2711da, 0xe3453e42, 0x0b9ec5fb, 0x72f4b8ea, 0x9a2f4353, + 0x802042c8, 0x68fbb971, 0x1191c460, 0xf94a3fd9, 0x6489b78d, + 0x8c524c34, 0xf5383125, 0x1de3ca9c, 0x07eccb07, 0xef3730be, + 0x965d4daf, 0x7e86b616, 0xacda5c06, 0x4401a7bf, 0x3d6bdaae, + 0xd5b02117, 0xcfbf208c, 0x2764db35, 0x5e0ea624, 0xb6d55d9d, + 0x2b16d5c9, 0xc3cd2e70, 0xbaa75361, 0x527ca8d8, 0x4873a943, + 0xa0a852fa, 0xd9c22feb, 0x3119d452, 0xbbf0874e, 0x532b7cf7, + 0x2a4101e6, 0xc29afa5f, 0xd895fbc4, 0x304e007d, 0x49247d6c, + 0xa1ff86d5, 0x3c3c0e81, 0xd4e7f538, 0xad8d8829, 0x45567390, + 0x5f59720b, 0xb78289b2, 0xcee8f4a3, 0x26330f1a, 0xf46fe50a, + 0x1cb41eb3, 0x65de63a2, 0x8d05981b, 0x970a9980, 0x7fd16239, + 0x06bb1f28, 0xee60e491, 0x73a36cc5, 0x9b78977c, 0xe212ea6d, + 0x0ac911d4, 0x10c6104f, 0xf81debf6, 0x817796e7, 0x69ac6d5e, + 0x25ce42c6, 0xcd15b97f, 0xb47fc46e, 0x5ca43fd7, 0x46ab3e4c, + 0xae70c5f5, 0xd71ab8e4, 0x3fc1435d, 0xa202cb09, 0x4ad930b0, + 0x33b34da1, 0xdb68b618, 0xc167b783, 0x29bc4c3a, 0x50d6312b, + 0xb80dca92, 0x6a512082, 0x828adb3b, 0xfbe0a62a, 0x133b5d93, + 0x09345c08, 0xe1efa7b1, 0x9885daa0, 0x705e2119, 0xed9da94d, + 0x054652f4, 0x7c2c2fe5, 0x94f7d45c, 0x8ef8d5c7, 0x66232e7e, + 0x1f49536f, 0xf792a8d6, 0xc68b7c84, 0x2e50873d, 0x573afa2c, + 0xbfe10195, 0xa5ee000e, 0x4d35fbb7, 0x345f86a6, 0xdc847d1f, + 0x4147f54b, 0xa99c0ef2, 0xd0f673e3, 0x382d885a, 0x222289c1, + 0xcaf97278, 0xb3930f69, 0x5b48f4d0, 0x89141ec0, 0x61cfe579, + 0x18a59868, 0xf07e63d1, 0xea71624a, 0x02aa99f3, 0x7bc0e4e2, + 0x931b1f5b, 0x0ed8970f, 0xe6036cb6, 0x9f6911a7, 0x77b2ea1e, + 0x6dbdeb85, 0x8566103c, 0xfc0c6d2d, 0x14d79694, 0x58b5b90c, + 0xb06e42b5, 0xc9043fa4, 0x21dfc41d, 0x3bd0c586, 0xd30b3e3f, + 0xaa61432e, 0x42bab897, 0xdf7930c3, 0x37a2cb7a, 0x4ec8b66b, + 0xa6134dd2, 0xbc1c4c49, 0x54c7b7f0, 0x2dadcae1, 0xc5763158, + 0x172adb48, 0xfff120f1, 0x869b5de0, 0x6e40a659, 0x744fa7c2, + 0x9c945c7b, 0xe5fe216a, 0x0d25dad3, 0x90e65287, 0x783da93e, + 0x0157d42f, 0xe98c2f96, 0xf3832e0d, 0x1b58d5b4, 0x6232a8a5, + 0x8ae9531c}, + {0x00000000, 0x919168ae, 0x6325a087, 0xf2b4c829, 0x874c31d4, + 0x16dd597a, 0xe4699153, 0x75f8f9fd, 0x4f9f1373, 0xde0e7bdd, + 0x2cbab3f4, 0xbd2bdb5a, 0xc8d322a7, 0x59424a09, 0xabf68220, + 0x3a67ea8e, 0x9e3e27e6, 0x0faf4f48, 0xfd1b8761, 0x6c8aefcf, + 0x19721632, 0x88e37e9c, 0x7a57b6b5, 0xebc6de1b, 0xd1a13495, + 0x40305c3b, 0xb2849412, 0x2315fcbc, 0x56ed0541, 0xc77c6def, + 0x35c8a5c6, 0xa459cd68, 0x7d7b3f17, 0xecea57b9, 0x1e5e9f90, + 0x8fcff73e, 0xfa370ec3, 0x6ba6666d, 0x9912ae44, 0x0883c6ea, + 0x32e42c64, 0xa37544ca, 0x51c18ce3, 0xc050e44d, 0xb5a81db0, + 0x2439751e, 0xd68dbd37, 0x471cd599, 0xe34518f1, 0x72d4705f, + 0x8060b876, 0x11f1d0d8, 0x64092925, 0xf598418b, 0x072c89a2, + 0x96bde10c, 0xacda0b82, 0x3d4b632c, 0xcfffab05, 0x5e6ec3ab, + 0x2b963a56, 0xba0752f8, 0x48b39ad1, 0xd922f27f, 0xfaf67e2e, + 0x6b671680, 0x99d3dea9, 0x0842b607, 0x7dba4ffa, 0xec2b2754, + 0x1e9fef7d, 0x8f0e87d3, 0xb5696d5d, 0x24f805f3, 0xd64ccdda, + 0x47dda574, 0x32255c89, 0xa3b43427, 0x5100fc0e, 0xc09194a0, + 0x64c859c8, 0xf5593166, 0x07edf94f, 0x967c91e1, 0xe384681c, + 0x721500b2, 0x80a1c89b, 0x1130a035, 0x2b574abb, 0xbac62215, + 0x4872ea3c, 0xd9e38292, 0xac1b7b6f, 0x3d8a13c1, 0xcf3edbe8, + 0x5eafb346, 0x878d4139, 0x161c2997, 0xe4a8e1be, 0x75398910, + 0x00c170ed, 0x91501843, 0x63e4d06a, 0xf275b8c4, 0xc812524a, + 0x59833ae4, 0xab37f2cd, 0x3aa69a63, 0x4f5e639e, 0xdecf0b30, + 0x2c7bc319, 0xbdeaabb7, 0x19b366df, 0x88220e71, 0x7a96c658, + 0xeb07aef6, 0x9eff570b, 0x0f6e3fa5, 0xfddaf78c, 0x6c4b9f22, + 0x562c75ac, 0xc7bd1d02, 0x3509d52b, 0xa498bd85, 0xd1604478, + 0x40f12cd6, 0xb245e4ff, 0x23d48c51, 0xf4edfd5c, 0x657c95f2, + 0x97c85ddb, 0x06593575, 0x73a1cc88, 0xe230a426, 0x10846c0f, + 0x811504a1, 0xbb72ee2f, 0x2ae38681, 0xd8574ea8, 0x49c62606, + 0x3c3edffb, 0xadafb755, 0x5f1b7f7c, 0xce8a17d2, 0x6ad3daba, + 0xfb42b214, 0x09f67a3d, 0x98671293, 0xed9feb6e, 0x7c0e83c0, + 0x8eba4be9, 0x1f2b2347, 0x254cc9c9, 0xb4dda167, 0x4669694e, + 0xd7f801e0, 0xa200f81d, 0x339190b3, 0xc125589a, 0x50b43034, + 0x8996c24b, 0x1807aae5, 0xeab362cc, 0x7b220a62, 0x0edaf39f, + 0x9f4b9b31, 0x6dff5318, 0xfc6e3bb6, 0xc609d138, 0x5798b996, + 0xa52c71bf, 0x34bd1911, 0x4145e0ec, 0xd0d48842, 0x2260406b, + 0xb3f128c5, 0x17a8e5ad, 0x86398d03, 0x748d452a, 0xe51c2d84, + 0x90e4d479, 0x0175bcd7, 0xf3c174fe, 0x62501c50, 0x5837f6de, + 0xc9a69e70, 0x3b125659, 0xaa833ef7, 0xdf7bc70a, 0x4eeaafa4, + 0xbc5e678d, 0x2dcf0f23, 0x0e1b8372, 0x9f8aebdc, 0x6d3e23f5, + 0xfcaf4b5b, 0x8957b2a6, 0x18c6da08, 0xea721221, 0x7be37a8f, + 0x41849001, 0xd015f8af, 0x22a13086, 0xb3305828, 0xc6c8a1d5, + 0x5759c97b, 0xa5ed0152, 0x347c69fc, 0x9025a494, 0x01b4cc3a, + 0xf3000413, 0x62916cbd, 0x17699540, 0x86f8fdee, 0x744c35c7, + 0xe5dd5d69, 0xdfbab7e7, 0x4e2bdf49, 0xbc9f1760, 0x2d0e7fce, + 0x58f68633, 0xc967ee9d, 0x3bd326b4, 0xaa424e1a, 0x7360bc65, + 0xe2f1d4cb, 0x10451ce2, 0x81d4744c, 0xf42c8db1, 0x65bde51f, + 0x97092d36, 0x06984598, 0x3cffaf16, 0xad6ec7b8, 0x5fda0f91, + 0xce4b673f, 0xbbb39ec2, 0x2a22f66c, 0xd8963e45, 0x490756eb, + 0xed5e9b83, 0x7ccff32d, 0x8e7b3b04, 0x1fea53aa, 0x6a12aa57, + 0xfb83c2f9, 0x09370ad0, 0x98a6627e, 0xa2c188f0, 0x3350e05e, + 0xc1e42877, 0x507540d9, 0x258db924, 0xb41cd18a, 0x46a819a3, + 0xd739710d}}; + +#endif + +#endif + +#if N == 5 + +#if W == 8 + +local const z_crc_t FAR crc_braid_table[][256] = { + {0x00000000, 0xaf449247, 0x85f822cf, 0x2abcb088, 0xd08143df, + 0x7fc5d198, 0x55796110, 0xfa3df357, 0x7a7381ff, 0xd53713b8, + 0xff8ba330, 0x50cf3177, 0xaaf2c220, 0x05b65067, 0x2f0ae0ef, + 0x804e72a8, 0xf4e703fe, 0x5ba391b9, 0x711f2131, 0xde5bb376, + 0x24664021, 0x8b22d266, 0xa19e62ee, 0x0edaf0a9, 0x8e948201, + 0x21d01046, 0x0b6ca0ce, 0xa4283289, 0x5e15c1de, 0xf1515399, + 0xdbede311, 0x74a97156, 0x32bf01bd, 0x9dfb93fa, 0xb7472372, + 0x1803b135, 0xe23e4262, 0x4d7ad025, 0x67c660ad, 0xc882f2ea, + 0x48cc8042, 0xe7881205, 0xcd34a28d, 0x627030ca, 0x984dc39d, + 0x370951da, 0x1db5e152, 0xb2f17315, 0xc6580243, 0x691c9004, + 0x43a0208c, 0xece4b2cb, 0x16d9419c, 0xb99dd3db, 0x93216353, + 0x3c65f114, 0xbc2b83bc, 0x136f11fb, 0x39d3a173, 0x96973334, + 0x6caac063, 0xc3ee5224, 0xe952e2ac, 0x461670eb, 0x657e037a, + 0xca3a913d, 0xe08621b5, 0x4fc2b3f2, 0xb5ff40a5, 0x1abbd2e2, + 0x3007626a, 0x9f43f02d, 0x1f0d8285, 0xb04910c2, 0x9af5a04a, + 0x35b1320d, 0xcf8cc15a, 0x60c8531d, 0x4a74e395, 0xe53071d2, + 0x91990084, 0x3edd92c3, 0x1461224b, 0xbb25b00c, 0x4118435b, + 0xee5cd11c, 0xc4e06194, 0x6ba4f3d3, 0xebea817b, 0x44ae133c, + 0x6e12a3b4, 0xc15631f3, 0x3b6bc2a4, 0x942f50e3, 0xbe93e06b, + 0x11d7722c, 0x57c102c7, 0xf8859080, 0xd2392008, 0x7d7db24f, + 0x87404118, 0x2804d35f, 0x02b863d7, 0xadfcf190, 0x2db28338, + 0x82f6117f, 0xa84aa1f7, 0x070e33b0, 0xfd33c0e7, 0x527752a0, + 0x78cbe228, 0xd78f706f, 0xa3260139, 0x0c62937e, 0x26de23f6, + 0x899ab1b1, 0x73a742e6, 0xdce3d0a1, 0xf65f6029, 0x591bf26e, + 0xd95580c6, 0x76111281, 0x5cada209, 0xf3e9304e, 0x09d4c319, + 0xa690515e, 0x8c2ce1d6, 0x23687391, 0xcafc06f4, 0x65b894b3, + 0x4f04243b, 0xe040b67c, 0x1a7d452b, 0xb539d76c, 0x9f8567e4, + 0x30c1f5a3, 0xb08f870b, 0x1fcb154c, 0x3577a5c4, 0x9a333783, + 0x600ec4d4, 0xcf4a5693, 0xe5f6e61b, 0x4ab2745c, 0x3e1b050a, + 0x915f974d, 0xbbe327c5, 0x14a7b582, 0xee9a46d5, 0x41ded492, + 0x6b62641a, 0xc426f65d, 0x446884f5, 0xeb2c16b2, 0xc190a63a, + 0x6ed4347d, 0x94e9c72a, 0x3bad556d, 0x1111e5e5, 0xbe5577a2, + 0xf8430749, 0x5707950e, 0x7dbb2586, 0xd2ffb7c1, 0x28c24496, + 0x8786d6d1, 0xad3a6659, 0x027ef41e, 0x823086b6, 0x2d7414f1, + 0x07c8a479, 0xa88c363e, 0x52b1c569, 0xfdf5572e, 0xd749e7a6, + 0x780d75e1, 0x0ca404b7, 0xa3e096f0, 0x895c2678, 0x2618b43f, + 0xdc254768, 0x7361d52f, 0x59dd65a7, 0xf699f7e0, 0x76d78548, + 0xd993170f, 0xf32fa787, 0x5c6b35c0, 0xa656c697, 0x091254d0, + 0x23aee458, 0x8cea761f, 0xaf82058e, 0x00c697c9, 0x2a7a2741, + 0x853eb506, 0x7f034651, 0xd047d416, 0xfafb649e, 0x55bff6d9, + 0xd5f18471, 0x7ab51636, 0x5009a6be, 0xff4d34f9, 0x0570c7ae, + 0xaa3455e9, 0x8088e561, 0x2fcc7726, 0x5b650670, 0xf4219437, + 0xde9d24bf, 0x71d9b6f8, 0x8be445af, 0x24a0d7e8, 0x0e1c6760, + 0xa158f527, 0x2116878f, 0x8e5215c8, 0xa4eea540, 0x0baa3707, + 0xf197c450, 0x5ed35617, 0x746fe69f, 0xdb2b74d8, 0x9d3d0433, + 0x32799674, 0x18c526fc, 0xb781b4bb, 0x4dbc47ec, 0xe2f8d5ab, + 0xc8446523, 0x6700f764, 0xe74e85cc, 0x480a178b, 0x62b6a703, + 0xcdf23544, 0x37cfc613, 0x988b5454, 0xb237e4dc, 0x1d73769b, + 0x69da07cd, 0xc69e958a, 0xec222502, 0x4366b745, 0xb95b4412, + 0x161fd655, 0x3ca366dd, 0x93e7f49a, 0x13a98632, 0xbced1475, + 0x9651a4fd, 0x391536ba, 0xc328c5ed, 0x6c6c57aa, 0x46d0e722, + 0xe9947565}, + {0x00000000, 0x4e890ba9, 0x9d121752, 0xd39b1cfb, 0xe15528e5, + 0xafdc234c, 0x7c473fb7, 0x32ce341e, 0x19db578b, 0x57525c22, + 0x84c940d9, 0xca404b70, 0xf88e7f6e, 0xb60774c7, 0x659c683c, + 0x2b156395, 0x33b6af16, 0x7d3fa4bf, 0xaea4b844, 0xe02db3ed, + 0xd2e387f3, 0x9c6a8c5a, 0x4ff190a1, 0x01789b08, 0x2a6df89d, + 0x64e4f334, 0xb77fefcf, 0xf9f6e466, 0xcb38d078, 0x85b1dbd1, + 0x562ac72a, 0x18a3cc83, 0x676d5e2c, 0x29e45585, 0xfa7f497e, + 0xb4f642d7, 0x863876c9, 0xc8b17d60, 0x1b2a619b, 0x55a36a32, + 0x7eb609a7, 0x303f020e, 0xe3a41ef5, 0xad2d155c, 0x9fe32142, + 0xd16a2aeb, 0x02f13610, 0x4c783db9, 0x54dbf13a, 0x1a52fa93, + 0xc9c9e668, 0x8740edc1, 0xb58ed9df, 0xfb07d276, 0x289cce8d, + 0x6615c524, 0x4d00a6b1, 0x0389ad18, 0xd012b1e3, 0x9e9bba4a, + 0xac558e54, 0xe2dc85fd, 0x31479906, 0x7fce92af, 0xcedabc58, + 0x8053b7f1, 0x53c8ab0a, 0x1d41a0a3, 0x2f8f94bd, 0x61069f14, + 0xb29d83ef, 0xfc148846, 0xd701ebd3, 0x9988e07a, 0x4a13fc81, + 0x049af728, 0x3654c336, 0x78ddc89f, 0xab46d464, 0xe5cfdfcd, + 0xfd6c134e, 0xb3e518e7, 0x607e041c, 0x2ef70fb5, 0x1c393bab, + 0x52b03002, 0x812b2cf9, 0xcfa22750, 0xe4b744c5, 0xaa3e4f6c, + 0x79a55397, 0x372c583e, 0x05e26c20, 0x4b6b6789, 0x98f07b72, + 0xd67970db, 0xa9b7e274, 0xe73ee9dd, 0x34a5f526, 0x7a2cfe8f, + 0x48e2ca91, 0x066bc138, 0xd5f0ddc3, 0x9b79d66a, 0xb06cb5ff, + 0xfee5be56, 0x2d7ea2ad, 0x63f7a904, 0x51399d1a, 0x1fb096b3, + 0xcc2b8a48, 0x82a281e1, 0x9a014d62, 0xd48846cb, 0x07135a30, + 0x499a5199, 0x7b546587, 0x35dd6e2e, 0xe64672d5, 0xa8cf797c, + 0x83da1ae9, 0xcd531140, 0x1ec80dbb, 0x50410612, 0x628f320c, + 0x2c0639a5, 0xff9d255e, 0xb1142ef7, 0x46c47ef1, 0x084d7558, + 0xdbd669a3, 0x955f620a, 0xa7915614, 0xe9185dbd, 0x3a834146, + 0x740a4aef, 0x5f1f297a, 0x119622d3, 0xc20d3e28, 0x8c843581, + 0xbe4a019f, 0xf0c30a36, 0x235816cd, 0x6dd11d64, 0x7572d1e7, + 0x3bfbda4e, 0xe860c6b5, 0xa6e9cd1c, 0x9427f902, 0xdaaef2ab, + 0x0935ee50, 0x47bce5f9, 0x6ca9866c, 0x22208dc5, 0xf1bb913e, + 0xbf329a97, 0x8dfcae89, 0xc375a520, 0x10eeb9db, 0x5e67b272, + 0x21a920dd, 0x6f202b74, 0xbcbb378f, 0xf2323c26, 0xc0fc0838, + 0x8e750391, 0x5dee1f6a, 0x136714c3, 0x38727756, 0x76fb7cff, + 0xa5606004, 0xebe96bad, 0xd9275fb3, 0x97ae541a, 0x443548e1, + 0x0abc4348, 0x121f8fcb, 0x5c968462, 0x8f0d9899, 0xc1849330, + 0xf34aa72e, 0xbdc3ac87, 0x6e58b07c, 0x20d1bbd5, 0x0bc4d840, + 0x454dd3e9, 0x96d6cf12, 0xd85fc4bb, 0xea91f0a5, 0xa418fb0c, + 0x7783e7f7, 0x390aec5e, 0x881ec2a9, 0xc697c900, 0x150cd5fb, + 0x5b85de52, 0x694bea4c, 0x27c2e1e5, 0xf459fd1e, 0xbad0f6b7, + 0x91c59522, 0xdf4c9e8b, 0x0cd78270, 0x425e89d9, 0x7090bdc7, + 0x3e19b66e, 0xed82aa95, 0xa30ba13c, 0xbba86dbf, 0xf5216616, + 0x26ba7aed, 0x68337144, 0x5afd455a, 0x14744ef3, 0xc7ef5208, + 0x896659a1, 0xa2733a34, 0xecfa319d, 0x3f612d66, 0x71e826cf, + 0x432612d1, 0x0daf1978, 0xde340583, 0x90bd0e2a, 0xef739c85, + 0xa1fa972c, 0x72618bd7, 0x3ce8807e, 0x0e26b460, 0x40afbfc9, + 0x9334a332, 0xddbda89b, 0xf6a8cb0e, 0xb821c0a7, 0x6bbadc5c, + 0x2533d7f5, 0x17fde3eb, 0x5974e842, 0x8aeff4b9, 0xc466ff10, + 0xdcc53393, 0x924c383a, 0x41d724c1, 0x0f5e2f68, 0x3d901b76, + 0x731910df, 0xa0820c24, 0xee0b078d, 0xc51e6418, 0x8b976fb1, + 0x580c734a, 0x168578e3, 0x244b4cfd, 0x6ac24754, 0xb9595baf, + 0xf7d05006}, + {0x00000000, 0x8d88fde2, 0xc060fd85, 0x4de80067, 0x5bb0fd4b, + 0xd63800a9, 0x9bd000ce, 0x1658fd2c, 0xb761fa96, 0x3ae90774, + 0x77010713, 0xfa89faf1, 0xecd107dd, 0x6159fa3f, 0x2cb1fa58, + 0xa13907ba, 0xb5b2f36d, 0x383a0e8f, 0x75d20ee8, 0xf85af30a, + 0xee020e26, 0x638af3c4, 0x2e62f3a3, 0xa3ea0e41, 0x02d309fb, + 0x8f5bf419, 0xc2b3f47e, 0x4f3b099c, 0x5963f4b0, 0xd4eb0952, + 0x99030935, 0x148bf4d7, 0xb014e09b, 0x3d9c1d79, 0x70741d1e, + 0xfdfce0fc, 0xeba41dd0, 0x662ce032, 0x2bc4e055, 0xa64c1db7, + 0x07751a0d, 0x8afde7ef, 0xc715e788, 0x4a9d1a6a, 0x5cc5e746, + 0xd14d1aa4, 0x9ca51ac3, 0x112de721, 0x05a613f6, 0x882eee14, + 0xc5c6ee73, 0x484e1391, 0x5e16eebd, 0xd39e135f, 0x9e761338, + 0x13feeeda, 0xb2c7e960, 0x3f4f1482, 0x72a714e5, 0xff2fe907, + 0xe977142b, 0x64ffe9c9, 0x2917e9ae, 0xa49f144c, 0xbb58c777, + 0x36d03a95, 0x7b383af2, 0xf6b0c710, 0xe0e83a3c, 0x6d60c7de, + 0x2088c7b9, 0xad003a5b, 0x0c393de1, 0x81b1c003, 0xcc59c064, + 0x41d13d86, 0x5789c0aa, 0xda013d48, 0x97e93d2f, 0x1a61c0cd, + 0x0eea341a, 0x8362c9f8, 0xce8ac99f, 0x4302347d, 0x555ac951, + 0xd8d234b3, 0x953a34d4, 0x18b2c936, 0xb98bce8c, 0x3403336e, + 0x79eb3309, 0xf463ceeb, 0xe23b33c7, 0x6fb3ce25, 0x225bce42, + 0xafd333a0, 0x0b4c27ec, 0x86c4da0e, 0xcb2cda69, 0x46a4278b, + 0x50fcdaa7, 0xdd742745, 0x909c2722, 0x1d14dac0, 0xbc2ddd7a, + 0x31a52098, 0x7c4d20ff, 0xf1c5dd1d, 0xe79d2031, 0x6a15ddd3, + 0x27fdddb4, 0xaa752056, 0xbefed481, 0x33762963, 0x7e9e2904, + 0xf316d4e6, 0xe54e29ca, 0x68c6d428, 0x252ed44f, 0xa8a629ad, + 0x099f2e17, 0x8417d3f5, 0xc9ffd392, 0x44772e70, 0x522fd35c, + 0xdfa72ebe, 0x924f2ed9, 0x1fc7d33b, 0xadc088af, 0x2048754d, + 0x6da0752a, 0xe02888c8, 0xf67075e4, 0x7bf88806, 0x36108861, + 0xbb987583, 0x1aa17239, 0x97298fdb, 0xdac18fbc, 0x5749725e, + 0x41118f72, 0xcc997290, 0x817172f7, 0x0cf98f15, 0x18727bc2, + 0x95fa8620, 0xd8128647, 0x559a7ba5, 0x43c28689, 0xce4a7b6b, + 0x83a27b0c, 0x0e2a86ee, 0xaf138154, 0x229b7cb6, 0x6f737cd1, + 0xe2fb8133, 0xf4a37c1f, 0x792b81fd, 0x34c3819a, 0xb94b7c78, + 0x1dd46834, 0x905c95d6, 0xddb495b1, 0x503c6853, 0x4664957f, + 0xcbec689d, 0x860468fa, 0x0b8c9518, 0xaab592a2, 0x273d6f40, + 0x6ad56f27, 0xe75d92c5, 0xf1056fe9, 0x7c8d920b, 0x3165926c, + 0xbced6f8e, 0xa8669b59, 0x25ee66bb, 0x680666dc, 0xe58e9b3e, + 0xf3d66612, 0x7e5e9bf0, 0x33b69b97, 0xbe3e6675, 0x1f0761cf, + 0x928f9c2d, 0xdf679c4a, 0x52ef61a8, 0x44b79c84, 0xc93f6166, + 0x84d76101, 0x095f9ce3, 0x16984fd8, 0x9b10b23a, 0xd6f8b25d, + 0x5b704fbf, 0x4d28b293, 0xc0a04f71, 0x8d484f16, 0x00c0b2f4, + 0xa1f9b54e, 0x2c7148ac, 0x619948cb, 0xec11b529, 0xfa494805, + 0x77c1b5e7, 0x3a29b580, 0xb7a14862, 0xa32abcb5, 0x2ea24157, + 0x634a4130, 0xeec2bcd2, 0xf89a41fe, 0x7512bc1c, 0x38fabc7b, + 0xb5724199, 0x144b4623, 0x99c3bbc1, 0xd42bbba6, 0x59a34644, + 0x4ffbbb68, 0xc273468a, 0x8f9b46ed, 0x0213bb0f, 0xa68caf43, + 0x2b0452a1, 0x66ec52c6, 0xeb64af24, 0xfd3c5208, 0x70b4afea, + 0x3d5caf8d, 0xb0d4526f, 0x11ed55d5, 0x9c65a837, 0xd18da850, + 0x5c0555b2, 0x4a5da89e, 0xc7d5557c, 0x8a3d551b, 0x07b5a8f9, + 0x133e5c2e, 0x9eb6a1cc, 0xd35ea1ab, 0x5ed65c49, 0x488ea165, + 0xc5065c87, 0x88ee5ce0, 0x0566a102, 0xa45fa6b8, 0x29d75b5a, + 0x643f5b3d, 0xe9b7a6df, 0xffef5bf3, 0x7267a611, 0x3f8fa676, + 0xb2075b94}, + {0x00000000, 0x80f0171f, 0xda91287f, 0x5a613f60, 0x6e5356bf, + 0xeea341a0, 0xb4c27ec0, 0x343269df, 0xdca6ad7e, 0x5c56ba61, + 0x06378501, 0x86c7921e, 0xb2f5fbc1, 0x3205ecde, 0x6864d3be, + 0xe894c4a1, 0x623c5cbd, 0xe2cc4ba2, 0xb8ad74c2, 0x385d63dd, + 0x0c6f0a02, 0x8c9f1d1d, 0xd6fe227d, 0x560e3562, 0xbe9af1c3, + 0x3e6ae6dc, 0x640bd9bc, 0xe4fbcea3, 0xd0c9a77c, 0x5039b063, + 0x0a588f03, 0x8aa8981c, 0xc478b97a, 0x4488ae65, 0x1ee99105, + 0x9e19861a, 0xaa2befc5, 0x2adbf8da, 0x70bac7ba, 0xf04ad0a5, + 0x18de1404, 0x982e031b, 0xc24f3c7b, 0x42bf2b64, 0x768d42bb, + 0xf67d55a4, 0xac1c6ac4, 0x2cec7ddb, 0xa644e5c7, 0x26b4f2d8, + 0x7cd5cdb8, 0xfc25daa7, 0xc817b378, 0x48e7a467, 0x12869b07, + 0x92768c18, 0x7ae248b9, 0xfa125fa6, 0xa07360c6, 0x208377d9, + 0x14b11e06, 0x94410919, 0xce203679, 0x4ed02166, 0x538074b5, + 0xd37063aa, 0x89115cca, 0x09e14bd5, 0x3dd3220a, 0xbd233515, + 0xe7420a75, 0x67b21d6a, 0x8f26d9cb, 0x0fd6ced4, 0x55b7f1b4, + 0xd547e6ab, 0xe1758f74, 0x6185986b, 0x3be4a70b, 0xbb14b014, + 0x31bc2808, 0xb14c3f17, 0xeb2d0077, 0x6bdd1768, 0x5fef7eb7, + 0xdf1f69a8, 0x857e56c8, 0x058e41d7, 0xed1a8576, 0x6dea9269, + 0x378bad09, 0xb77bba16, 0x8349d3c9, 0x03b9c4d6, 0x59d8fbb6, + 0xd928eca9, 0x97f8cdcf, 0x1708dad0, 0x4d69e5b0, 0xcd99f2af, + 0xf9ab9b70, 0x795b8c6f, 0x233ab30f, 0xa3caa410, 0x4b5e60b1, + 0xcbae77ae, 0x91cf48ce, 0x113f5fd1, 0x250d360e, 0xa5fd2111, + 0xff9c1e71, 0x7f6c096e, 0xf5c49172, 0x7534866d, 0x2f55b90d, + 0xafa5ae12, 0x9b97c7cd, 0x1b67d0d2, 0x4106efb2, 0xc1f6f8ad, + 0x29623c0c, 0xa9922b13, 0xf3f31473, 0x7303036c, 0x47316ab3, + 0xc7c17dac, 0x9da042cc, 0x1d5055d3, 0xa700e96a, 0x27f0fe75, + 0x7d91c115, 0xfd61d60a, 0xc953bfd5, 0x49a3a8ca, 0x13c297aa, + 0x933280b5, 0x7ba64414, 0xfb56530b, 0xa1376c6b, 0x21c77b74, + 0x15f512ab, 0x950505b4, 0xcf643ad4, 0x4f942dcb, 0xc53cb5d7, + 0x45cca2c8, 0x1fad9da8, 0x9f5d8ab7, 0xab6fe368, 0x2b9ff477, + 0x71fecb17, 0xf10edc08, 0x199a18a9, 0x996a0fb6, 0xc30b30d6, + 0x43fb27c9, 0x77c94e16, 0xf7395909, 0xad586669, 0x2da87176, + 0x63785010, 0xe388470f, 0xb9e9786f, 0x39196f70, 0x0d2b06af, + 0x8ddb11b0, 0xd7ba2ed0, 0x574a39cf, 0xbfdefd6e, 0x3f2eea71, + 0x654fd511, 0xe5bfc20e, 0xd18dabd1, 0x517dbcce, 0x0b1c83ae, + 0x8bec94b1, 0x01440cad, 0x81b41bb2, 0xdbd524d2, 0x5b2533cd, + 0x6f175a12, 0xefe74d0d, 0xb586726d, 0x35766572, 0xdde2a1d3, + 0x5d12b6cc, 0x077389ac, 0x87839eb3, 0xb3b1f76c, 0x3341e073, + 0x6920df13, 0xe9d0c80c, 0xf4809ddf, 0x74708ac0, 0x2e11b5a0, + 0xaee1a2bf, 0x9ad3cb60, 0x1a23dc7f, 0x4042e31f, 0xc0b2f400, + 0x282630a1, 0xa8d627be, 0xf2b718de, 0x72470fc1, 0x4675661e, + 0xc6857101, 0x9ce44e61, 0x1c14597e, 0x96bcc162, 0x164cd67d, + 0x4c2de91d, 0xccddfe02, 0xf8ef97dd, 0x781f80c2, 0x227ebfa2, + 0xa28ea8bd, 0x4a1a6c1c, 0xcaea7b03, 0x908b4463, 0x107b537c, + 0x24493aa3, 0xa4b92dbc, 0xfed812dc, 0x7e2805c3, 0x30f824a5, + 0xb00833ba, 0xea690cda, 0x6a991bc5, 0x5eab721a, 0xde5b6505, + 0x843a5a65, 0x04ca4d7a, 0xec5e89db, 0x6cae9ec4, 0x36cfa1a4, + 0xb63fb6bb, 0x820ddf64, 0x02fdc87b, 0x589cf71b, 0xd86ce004, + 0x52c47818, 0xd2346f07, 0x88555067, 0x08a54778, 0x3c972ea7, + 0xbc6739b8, 0xe60606d8, 0x66f611c7, 0x8e62d566, 0x0e92c279, + 0x54f3fd19, 0xd403ea06, 0xe03183d9, 0x60c194c6, 0x3aa0aba6, + 0xba50bcb9}, + {0x00000000, 0x9570d495, 0xf190af6b, 0x64e07bfe, 0x38505897, + 0xad208c02, 0xc9c0f7fc, 0x5cb02369, 0x70a0b12e, 0xe5d065bb, + 0x81301e45, 0x1440cad0, 0x48f0e9b9, 0xdd803d2c, 0xb96046d2, + 0x2c109247, 0xe141625c, 0x7431b6c9, 0x10d1cd37, 0x85a119a2, + 0xd9113acb, 0x4c61ee5e, 0x288195a0, 0xbdf14135, 0x91e1d372, + 0x049107e7, 0x60717c19, 0xf501a88c, 0xa9b18be5, 0x3cc15f70, + 0x5821248e, 0xcd51f01b, 0x19f3c2f9, 0x8c83166c, 0xe8636d92, + 0x7d13b907, 0x21a39a6e, 0xb4d34efb, 0xd0333505, 0x4543e190, + 0x695373d7, 0xfc23a742, 0x98c3dcbc, 0x0db30829, 0x51032b40, + 0xc473ffd5, 0xa093842b, 0x35e350be, 0xf8b2a0a5, 0x6dc27430, + 0x09220fce, 0x9c52db5b, 0xc0e2f832, 0x55922ca7, 0x31725759, + 0xa40283cc, 0x8812118b, 0x1d62c51e, 0x7982bee0, 0xecf26a75, + 0xb042491c, 0x25329d89, 0x41d2e677, 0xd4a232e2, 0x33e785f2, + 0xa6975167, 0xc2772a99, 0x5707fe0c, 0x0bb7dd65, 0x9ec709f0, + 0xfa27720e, 0x6f57a69b, 0x434734dc, 0xd637e049, 0xb2d79bb7, + 0x27a74f22, 0x7b176c4b, 0xee67b8de, 0x8a87c320, 0x1ff717b5, + 0xd2a6e7ae, 0x47d6333b, 0x233648c5, 0xb6469c50, 0xeaf6bf39, + 0x7f866bac, 0x1b661052, 0x8e16c4c7, 0xa2065680, 0x37768215, + 0x5396f9eb, 0xc6e62d7e, 0x9a560e17, 0x0f26da82, 0x6bc6a17c, + 0xfeb675e9, 0x2a14470b, 0xbf64939e, 0xdb84e860, 0x4ef43cf5, + 0x12441f9c, 0x8734cb09, 0xe3d4b0f7, 0x76a46462, 0x5ab4f625, + 0xcfc422b0, 0xab24594e, 0x3e548ddb, 0x62e4aeb2, 0xf7947a27, + 0x937401d9, 0x0604d54c, 0xcb552557, 0x5e25f1c2, 0x3ac58a3c, + 0xafb55ea9, 0xf3057dc0, 0x6675a955, 0x0295d2ab, 0x97e5063e, + 0xbbf59479, 0x2e8540ec, 0x4a653b12, 0xdf15ef87, 0x83a5ccee, + 0x16d5187b, 0x72356385, 0xe745b710, 0x67cf0be4, 0xf2bfdf71, + 0x965fa48f, 0x032f701a, 0x5f9f5373, 0xcaef87e6, 0xae0ffc18, + 0x3b7f288d, 0x176fbaca, 0x821f6e5f, 0xe6ff15a1, 0x738fc134, + 0x2f3fe25d, 0xba4f36c8, 0xdeaf4d36, 0x4bdf99a3, 0x868e69b8, + 0x13febd2d, 0x771ec6d3, 0xe26e1246, 0xbede312f, 0x2baee5ba, + 0x4f4e9e44, 0xda3e4ad1, 0xf62ed896, 0x635e0c03, 0x07be77fd, + 0x92cea368, 0xce7e8001, 0x5b0e5494, 0x3fee2f6a, 0xaa9efbff, + 0x7e3cc91d, 0xeb4c1d88, 0x8fac6676, 0x1adcb2e3, 0x466c918a, + 0xd31c451f, 0xb7fc3ee1, 0x228cea74, 0x0e9c7833, 0x9becaca6, + 0xff0cd758, 0x6a7c03cd, 0x36cc20a4, 0xa3bcf431, 0xc75c8fcf, + 0x522c5b5a, 0x9f7dab41, 0x0a0d7fd4, 0x6eed042a, 0xfb9dd0bf, + 0xa72df3d6, 0x325d2743, 0x56bd5cbd, 0xc3cd8828, 0xefdd1a6f, + 0x7aadcefa, 0x1e4db504, 0x8b3d6191, 0xd78d42f8, 0x42fd966d, + 0x261ded93, 0xb36d3906, 0x54288e16, 0xc1585a83, 0xa5b8217d, + 0x30c8f5e8, 0x6c78d681, 0xf9080214, 0x9de879ea, 0x0898ad7f, + 0x24883f38, 0xb1f8ebad, 0xd5189053, 0x406844c6, 0x1cd867af, + 0x89a8b33a, 0xed48c8c4, 0x78381c51, 0xb569ec4a, 0x201938df, + 0x44f94321, 0xd18997b4, 0x8d39b4dd, 0x18496048, 0x7ca91bb6, + 0xe9d9cf23, 0xc5c95d64, 0x50b989f1, 0x3459f20f, 0xa129269a, + 0xfd9905f3, 0x68e9d166, 0x0c09aa98, 0x99797e0d, 0x4ddb4cef, + 0xd8ab987a, 0xbc4be384, 0x293b3711, 0x758b1478, 0xe0fbc0ed, + 0x841bbb13, 0x116b6f86, 0x3d7bfdc1, 0xa80b2954, 0xcceb52aa, + 0x599b863f, 0x052ba556, 0x905b71c3, 0xf4bb0a3d, 0x61cbdea8, + 0xac9a2eb3, 0x39eafa26, 0x5d0a81d8, 0xc87a554d, 0x94ca7624, + 0x01baa2b1, 0x655ad94f, 0xf02a0dda, 0xdc3a9f9d, 0x494a4b08, + 0x2daa30f6, 0xb8dae463, 0xe46ac70a, 0x711a139f, 0x15fa6861, + 0x808abcf4}, + {0x00000000, 0xcf9e17c8, 0x444d29d1, 0x8bd33e19, 0x889a53a2, + 0x4704446a, 0xccd77a73, 0x03496dbb, 0xca45a105, 0x05dbb6cd, + 0x8e0888d4, 0x41969f1c, 0x42dff2a7, 0x8d41e56f, 0x0692db76, + 0xc90cccbe, 0x4ffa444b, 0x80645383, 0x0bb76d9a, 0xc4297a52, + 0xc76017e9, 0x08fe0021, 0x832d3e38, 0x4cb329f0, 0x85bfe54e, + 0x4a21f286, 0xc1f2cc9f, 0x0e6cdb57, 0x0d25b6ec, 0xc2bba124, + 0x49689f3d, 0x86f688f5, 0x9ff48896, 0x506a9f5e, 0xdbb9a147, + 0x1427b68f, 0x176edb34, 0xd8f0ccfc, 0x5323f2e5, 0x9cbde52d, + 0x55b12993, 0x9a2f3e5b, 0x11fc0042, 0xde62178a, 0xdd2b7a31, + 0x12b56df9, 0x996653e0, 0x56f84428, 0xd00eccdd, 0x1f90db15, + 0x9443e50c, 0x5bddf2c4, 0x58949f7f, 0x970a88b7, 0x1cd9b6ae, + 0xd347a166, 0x1a4b6dd8, 0xd5d57a10, 0x5e064409, 0x919853c1, + 0x92d13e7a, 0x5d4f29b2, 0xd69c17ab, 0x19020063, 0xe498176d, + 0x2b0600a5, 0xa0d53ebc, 0x6f4b2974, 0x6c0244cf, 0xa39c5307, + 0x284f6d1e, 0xe7d17ad6, 0x2eddb668, 0xe143a1a0, 0x6a909fb9, + 0xa50e8871, 0xa647e5ca, 0x69d9f202, 0xe20acc1b, 0x2d94dbd3, + 0xab625326, 0x64fc44ee, 0xef2f7af7, 0x20b16d3f, 0x23f80084, + 0xec66174c, 0x67b52955, 0xa82b3e9d, 0x6127f223, 0xaeb9e5eb, + 0x256adbf2, 0xeaf4cc3a, 0xe9bda181, 0x2623b649, 0xadf08850, + 0x626e9f98, 0x7b6c9ffb, 0xb4f28833, 0x3f21b62a, 0xf0bfa1e2, + 0xf3f6cc59, 0x3c68db91, 0xb7bbe588, 0x7825f240, 0xb1293efe, + 0x7eb72936, 0xf564172f, 0x3afa00e7, 0x39b36d5c, 0xf62d7a94, + 0x7dfe448d, 0xb2605345, 0x3496dbb0, 0xfb08cc78, 0x70dbf261, + 0xbf45e5a9, 0xbc0c8812, 0x73929fda, 0xf841a1c3, 0x37dfb60b, + 0xfed37ab5, 0x314d6d7d, 0xba9e5364, 0x750044ac, 0x76492917, + 0xb9d73edf, 0x320400c6, 0xfd9a170e, 0x1241289b, 0xdddf3f53, + 0x560c014a, 0x99921682, 0x9adb7b39, 0x55456cf1, 0xde9652e8, + 0x11084520, 0xd804899e, 0x179a9e56, 0x9c49a04f, 0x53d7b787, + 0x509eda3c, 0x9f00cdf4, 0x14d3f3ed, 0xdb4de425, 0x5dbb6cd0, + 0x92257b18, 0x19f64501, 0xd66852c9, 0xd5213f72, 0x1abf28ba, + 0x916c16a3, 0x5ef2016b, 0x97fecdd5, 0x5860da1d, 0xd3b3e404, + 0x1c2df3cc, 0x1f649e77, 0xd0fa89bf, 0x5b29b7a6, 0x94b7a06e, + 0x8db5a00d, 0x422bb7c5, 0xc9f889dc, 0x06669e14, 0x052ff3af, + 0xcab1e467, 0x4162da7e, 0x8efccdb6, 0x47f00108, 0x886e16c0, + 0x03bd28d9, 0xcc233f11, 0xcf6a52aa, 0x00f44562, 0x8b277b7b, + 0x44b96cb3, 0xc24fe446, 0x0dd1f38e, 0x8602cd97, 0x499cda5f, + 0x4ad5b7e4, 0x854ba02c, 0x0e989e35, 0xc10689fd, 0x080a4543, + 0xc794528b, 0x4c476c92, 0x83d97b5a, 0x809016e1, 0x4f0e0129, + 0xc4dd3f30, 0x0b4328f8, 0xf6d93ff6, 0x3947283e, 0xb2941627, + 0x7d0a01ef, 0x7e436c54, 0xb1dd7b9c, 0x3a0e4585, 0xf590524d, + 0x3c9c9ef3, 0xf302893b, 0x78d1b722, 0xb74fa0ea, 0xb406cd51, + 0x7b98da99, 0xf04be480, 0x3fd5f348, 0xb9237bbd, 0x76bd6c75, + 0xfd6e526c, 0x32f045a4, 0x31b9281f, 0xfe273fd7, 0x75f401ce, + 0xba6a1606, 0x7366dab8, 0xbcf8cd70, 0x372bf369, 0xf8b5e4a1, + 0xfbfc891a, 0x34629ed2, 0xbfb1a0cb, 0x702fb703, 0x692db760, + 0xa6b3a0a8, 0x2d609eb1, 0xe2fe8979, 0xe1b7e4c2, 0x2e29f30a, + 0xa5facd13, 0x6a64dadb, 0xa3681665, 0x6cf601ad, 0xe7253fb4, + 0x28bb287c, 0x2bf245c7, 0xe46c520f, 0x6fbf6c16, 0xa0217bde, + 0x26d7f32b, 0xe949e4e3, 0x629adafa, 0xad04cd32, 0xae4da089, + 0x61d3b741, 0xea008958, 0x259e9e90, 0xec92522e, 0x230c45e6, + 0xa8df7bff, 0x67416c37, 0x6408018c, 0xab961644, 0x2045285d, + 0xefdb3f95}, + {0x00000000, 0x24825136, 0x4904a26c, 0x6d86f35a, 0x920944d8, + 0xb68b15ee, 0xdb0de6b4, 0xff8fb782, 0xff638ff1, 0xdbe1dec7, + 0xb6672d9d, 0x92e57cab, 0x6d6acb29, 0x49e89a1f, 0x246e6945, + 0x00ec3873, 0x25b619a3, 0x01344895, 0x6cb2bbcf, 0x4830eaf9, + 0xb7bf5d7b, 0x933d0c4d, 0xfebbff17, 0xda39ae21, 0xdad59652, + 0xfe57c764, 0x93d1343e, 0xb7536508, 0x48dcd28a, 0x6c5e83bc, + 0x01d870e6, 0x255a21d0, 0x4b6c3346, 0x6fee6270, 0x0268912a, + 0x26eac01c, 0xd965779e, 0xfde726a8, 0x9061d5f2, 0xb4e384c4, + 0xb40fbcb7, 0x908ded81, 0xfd0b1edb, 0xd9894fed, 0x2606f86f, + 0x0284a959, 0x6f025a03, 0x4b800b35, 0x6eda2ae5, 0x4a587bd3, + 0x27de8889, 0x035cd9bf, 0xfcd36e3d, 0xd8513f0b, 0xb5d7cc51, + 0x91559d67, 0x91b9a514, 0xb53bf422, 0xd8bd0778, 0xfc3f564e, + 0x03b0e1cc, 0x2732b0fa, 0x4ab443a0, 0x6e361296, 0x96d8668c, + 0xb25a37ba, 0xdfdcc4e0, 0xfb5e95d6, 0x04d12254, 0x20537362, + 0x4dd58038, 0x6957d10e, 0x69bbe97d, 0x4d39b84b, 0x20bf4b11, + 0x043d1a27, 0xfbb2ada5, 0xdf30fc93, 0xb2b60fc9, 0x96345eff, + 0xb36e7f2f, 0x97ec2e19, 0xfa6add43, 0xdee88c75, 0x21673bf7, + 0x05e56ac1, 0x6863999b, 0x4ce1c8ad, 0x4c0df0de, 0x688fa1e8, + 0x050952b2, 0x218b0384, 0xde04b406, 0xfa86e530, 0x9700166a, + 0xb382475c, 0xddb455ca, 0xf93604fc, 0x94b0f7a6, 0xb032a690, + 0x4fbd1112, 0x6b3f4024, 0x06b9b37e, 0x223be248, 0x22d7da3b, + 0x06558b0d, 0x6bd37857, 0x4f512961, 0xb0de9ee3, 0x945ccfd5, + 0xf9da3c8f, 0xdd586db9, 0xf8024c69, 0xdc801d5f, 0xb106ee05, + 0x9584bf33, 0x6a0b08b1, 0x4e895987, 0x230faadd, 0x078dfbeb, + 0x0761c398, 0x23e392ae, 0x4e6561f4, 0x6ae730c2, 0x95688740, + 0xb1ead676, 0xdc6c252c, 0xf8ee741a, 0xf6c1cb59, 0xd2439a6f, + 0xbfc56935, 0x9b473803, 0x64c88f81, 0x404adeb7, 0x2dcc2ded, + 0x094e7cdb, 0x09a244a8, 0x2d20159e, 0x40a6e6c4, 0x6424b7f2, + 0x9bab0070, 0xbf295146, 0xd2afa21c, 0xf62df32a, 0xd377d2fa, + 0xf7f583cc, 0x9a737096, 0xbef121a0, 0x417e9622, 0x65fcc714, + 0x087a344e, 0x2cf86578, 0x2c145d0b, 0x08960c3d, 0x6510ff67, + 0x4192ae51, 0xbe1d19d3, 0x9a9f48e5, 0xf719bbbf, 0xd39bea89, + 0xbdadf81f, 0x992fa929, 0xf4a95a73, 0xd02b0b45, 0x2fa4bcc7, + 0x0b26edf1, 0x66a01eab, 0x42224f9d, 0x42ce77ee, 0x664c26d8, + 0x0bcad582, 0x2f4884b4, 0xd0c73336, 0xf4456200, 0x99c3915a, + 0xbd41c06c, 0x981be1bc, 0xbc99b08a, 0xd11f43d0, 0xf59d12e6, + 0x0a12a564, 0x2e90f452, 0x43160708, 0x6794563e, 0x67786e4d, + 0x43fa3f7b, 0x2e7ccc21, 0x0afe9d17, 0xf5712a95, 0xd1f37ba3, + 0xbc7588f9, 0x98f7d9cf, 0x6019add5, 0x449bfce3, 0x291d0fb9, + 0x0d9f5e8f, 0xf210e90d, 0xd692b83b, 0xbb144b61, 0x9f961a57, + 0x9f7a2224, 0xbbf87312, 0xd67e8048, 0xf2fcd17e, 0x0d7366fc, + 0x29f137ca, 0x4477c490, 0x60f595a6, 0x45afb476, 0x612de540, + 0x0cab161a, 0x2829472c, 0xd7a6f0ae, 0xf324a198, 0x9ea252c2, + 0xba2003f4, 0xbacc3b87, 0x9e4e6ab1, 0xf3c899eb, 0xd74ac8dd, + 0x28c57f5f, 0x0c472e69, 0x61c1dd33, 0x45438c05, 0x2b759e93, + 0x0ff7cfa5, 0x62713cff, 0x46f36dc9, 0xb97cda4b, 0x9dfe8b7d, + 0xf0787827, 0xd4fa2911, 0xd4161162, 0xf0944054, 0x9d12b30e, + 0xb990e238, 0x461f55ba, 0x629d048c, 0x0f1bf7d6, 0x2b99a6e0, + 0x0ec38730, 0x2a41d606, 0x47c7255c, 0x6345746a, 0x9ccac3e8, + 0xb84892de, 0xd5ce6184, 0xf14c30b2, 0xf1a008c1, 0xd52259f7, + 0xb8a4aaad, 0x9c26fb9b, 0x63a94c19, 0x472b1d2f, 0x2aadee75, + 0x0e2fbf43}, + {0x00000000, 0x36f290f3, 0x6de521e6, 0x5b17b115, 0xdbca43cc, + 0xed38d33f, 0xb62f622a, 0x80ddf2d9, 0x6ce581d9, 0x5a17112a, + 0x0100a03f, 0x37f230cc, 0xb72fc215, 0x81dd52e6, 0xdacae3f3, + 0xec387300, 0xd9cb03b2, 0xef399341, 0xb42e2254, 0x82dcb2a7, + 0x0201407e, 0x34f3d08d, 0x6fe46198, 0x5916f16b, 0xb52e826b, + 0x83dc1298, 0xd8cba38d, 0xee39337e, 0x6ee4c1a7, 0x58165154, + 0x0301e041, 0x35f370b2, 0x68e70125, 0x5e1591d6, 0x050220c3, + 0x33f0b030, 0xb32d42e9, 0x85dfd21a, 0xdec8630f, 0xe83af3fc, + 0x040280fc, 0x32f0100f, 0x69e7a11a, 0x5f1531e9, 0xdfc8c330, + 0xe93a53c3, 0xb22de2d6, 0x84df7225, 0xb12c0297, 0x87de9264, + 0xdcc92371, 0xea3bb382, 0x6ae6415b, 0x5c14d1a8, 0x070360bd, + 0x31f1f04e, 0xddc9834e, 0xeb3b13bd, 0xb02ca2a8, 0x86de325b, + 0x0603c082, 0x30f15071, 0x6be6e164, 0x5d147197, 0xd1ce024a, + 0xe73c92b9, 0xbc2b23ac, 0x8ad9b35f, 0x0a044186, 0x3cf6d175, + 0x67e16060, 0x5113f093, 0xbd2b8393, 0x8bd91360, 0xd0cea275, + 0xe63c3286, 0x66e1c05f, 0x501350ac, 0x0b04e1b9, 0x3df6714a, + 0x080501f8, 0x3ef7910b, 0x65e0201e, 0x5312b0ed, 0xd3cf4234, + 0xe53dd2c7, 0xbe2a63d2, 0x88d8f321, 0x64e08021, 0x521210d2, + 0x0905a1c7, 0x3ff73134, 0xbf2ac3ed, 0x89d8531e, 0xd2cfe20b, + 0xe43d72f8, 0xb929036f, 0x8fdb939c, 0xd4cc2289, 0xe23eb27a, + 0x62e340a3, 0x5411d050, 0x0f066145, 0x39f4f1b6, 0xd5cc82b6, + 0xe33e1245, 0xb829a350, 0x8edb33a3, 0x0e06c17a, 0x38f45189, + 0x63e3e09c, 0x5511706f, 0x60e200dd, 0x5610902e, 0x0d07213b, + 0x3bf5b1c8, 0xbb284311, 0x8ddad3e2, 0xd6cd62f7, 0xe03ff204, + 0x0c078104, 0x3af511f7, 0x61e2a0e2, 0x57103011, 0xd7cdc2c8, + 0xe13f523b, 0xba28e32e, 0x8cda73dd, 0x78ed02d5, 0x4e1f9226, + 0x15082333, 0x23fab3c0, 0xa3274119, 0x95d5d1ea, 0xcec260ff, + 0xf830f00c, 0x1408830c, 0x22fa13ff, 0x79eda2ea, 0x4f1f3219, + 0xcfc2c0c0, 0xf9305033, 0xa227e126, 0x94d571d5, 0xa1260167, + 0x97d49194, 0xccc32081, 0xfa31b072, 0x7aec42ab, 0x4c1ed258, + 0x1709634d, 0x21fbf3be, 0xcdc380be, 0xfb31104d, 0xa026a158, + 0x96d431ab, 0x1609c372, 0x20fb5381, 0x7bece294, 0x4d1e7267, + 0x100a03f0, 0x26f89303, 0x7def2216, 0x4b1db2e5, 0xcbc0403c, + 0xfd32d0cf, 0xa62561da, 0x90d7f129, 0x7cef8229, 0x4a1d12da, + 0x110aa3cf, 0x27f8333c, 0xa725c1e5, 0x91d75116, 0xcac0e003, + 0xfc3270f0, 0xc9c10042, 0xff3390b1, 0xa42421a4, 0x92d6b157, + 0x120b438e, 0x24f9d37d, 0x7fee6268, 0x491cf29b, 0xa524819b, + 0x93d61168, 0xc8c1a07d, 0xfe33308e, 0x7eeec257, 0x481c52a4, + 0x130be3b1, 0x25f97342, 0xa923009f, 0x9fd1906c, 0xc4c62179, + 0xf234b18a, 0x72e94353, 0x441bd3a0, 0x1f0c62b5, 0x29fef246, + 0xc5c68146, 0xf33411b5, 0xa823a0a0, 0x9ed13053, 0x1e0cc28a, + 0x28fe5279, 0x73e9e36c, 0x451b739f, 0x70e8032d, 0x461a93de, + 0x1d0d22cb, 0x2bffb238, 0xab2240e1, 0x9dd0d012, 0xc6c76107, + 0xf035f1f4, 0x1c0d82f4, 0x2aff1207, 0x71e8a312, 0x471a33e1, + 0xc7c7c138, 0xf13551cb, 0xaa22e0de, 0x9cd0702d, 0xc1c401ba, + 0xf7369149, 0xac21205c, 0x9ad3b0af, 0x1a0e4276, 0x2cfcd285, + 0x77eb6390, 0x4119f363, 0xad218063, 0x9bd31090, 0xc0c4a185, + 0xf6363176, 0x76ebc3af, 0x4019535c, 0x1b0ee249, 0x2dfc72ba, + 0x180f0208, 0x2efd92fb, 0x75ea23ee, 0x4318b31d, 0xc3c541c4, + 0xf537d137, 0xae206022, 0x98d2f0d1, 0x74ea83d1, 0x42181322, + 0x190fa237, 0x2ffd32c4, 0xaf20c01d, 0x99d250ee, 0xc2c5e1fb, + 0xf4377108}}; + +local const z_word_t FAR crc_braid_big_table[][256] = { + {0x0000000000000000, 0xf390f23600000000, 0xe621e56d00000000, + 0x15b1175b00000000, 0xcc43cadb00000000, 0x3fd338ed00000000, + 0x2a622fb600000000, 0xd9f2dd8000000000, 0xd981e56c00000000, + 0x2a11175a00000000, 0x3fa0000100000000, 0xcc30f23700000000, + 0x15c22fb700000000, 0xe652dd8100000000, 0xf3e3cada00000000, + 0x007338ec00000000, 0xb203cbd900000000, 0x419339ef00000000, + 0x54222eb400000000, 0xa7b2dc8200000000, 0x7e40010200000000, + 0x8dd0f33400000000, 0x9861e46f00000000, 0x6bf1165900000000, + 0x6b822eb500000000, 0x9812dc8300000000, 0x8da3cbd800000000, + 0x7e3339ee00000000, 0xa7c1e46e00000000, 0x5451165800000000, + 0x41e0010300000000, 0xb270f33500000000, 0x2501e76800000000, + 0xd691155e00000000, 0xc320020500000000, 0x30b0f03300000000, + 0xe9422db300000000, 0x1ad2df8500000000, 0x0f63c8de00000000, + 0xfcf33ae800000000, 0xfc80020400000000, 0x0f10f03200000000, + 0x1aa1e76900000000, 0xe931155f00000000, 0x30c3c8df00000000, + 0xc3533ae900000000, 0xd6e22db200000000, 0x2572df8400000000, + 0x97022cb100000000, 0x6492de8700000000, 0x7123c9dc00000000, + 0x82b33bea00000000, 0x5b41e66a00000000, 0xa8d1145c00000000, + 0xbd60030700000000, 0x4ef0f13100000000, 0x4e83c9dd00000000, + 0xbd133beb00000000, 0xa8a22cb000000000, 0x5b32de8600000000, + 0x82c0030600000000, 0x7150f13000000000, 0x64e1e66b00000000, + 0x9771145d00000000, 0x4a02ced100000000, 0xb9923ce700000000, + 0xac232bbc00000000, 0x5fb3d98a00000000, 0x8641040a00000000, + 0x75d1f63c00000000, 0x6060e16700000000, 0x93f0135100000000, + 0x93832bbd00000000, 0x6013d98b00000000, 0x75a2ced000000000, + 0x86323ce600000000, 0x5fc0e16600000000, 0xac50135000000000, + 0xb9e1040b00000000, 0x4a71f63d00000000, 0xf801050800000000, + 0x0b91f73e00000000, 0x1e20e06500000000, 0xedb0125300000000, + 0x3442cfd300000000, 0xc7d23de500000000, 0xd2632abe00000000, + 0x21f3d88800000000, 0x2180e06400000000, 0xd210125200000000, + 0xc7a1050900000000, 0x3431f73f00000000, 0xedc32abf00000000, + 0x1e53d88900000000, 0x0be2cfd200000000, 0xf8723de400000000, + 0x6f0329b900000000, 0x9c93db8f00000000, 0x8922ccd400000000, + 0x7ab23ee200000000, 0xa340e36200000000, 0x50d0115400000000, + 0x4561060f00000000, 0xb6f1f43900000000, 0xb682ccd500000000, + 0x45123ee300000000, 0x50a329b800000000, 0xa333db8e00000000, + 0x7ac1060e00000000, 0x8951f43800000000, 0x9ce0e36300000000, + 0x6f70115500000000, 0xdd00e26000000000, 0x2e90105600000000, + 0x3b21070d00000000, 0xc8b1f53b00000000, 0x114328bb00000000, + 0xe2d3da8d00000000, 0xf762cdd600000000, 0x04f23fe000000000, + 0x0481070c00000000, 0xf711f53a00000000, 0xe2a0e26100000000, + 0x1130105700000000, 0xc8c2cdd700000000, 0x3b523fe100000000, + 0x2ee328ba00000000, 0xdd73da8c00000000, 0xd502ed7800000000, + 0x26921f4e00000000, 0x3323081500000000, 0xc0b3fa2300000000, + 0x194127a300000000, 0xead1d59500000000, 0xff60c2ce00000000, + 0x0cf030f800000000, 0x0c83081400000000, 0xff13fa2200000000, + 0xeaa2ed7900000000, 0x19321f4f00000000, 0xc0c0c2cf00000000, + 0x335030f900000000, 0x26e127a200000000, 0xd571d59400000000, + 0x670126a100000000, 0x9491d49700000000, 0x8120c3cc00000000, + 0x72b031fa00000000, 0xab42ec7a00000000, 0x58d21e4c00000000, + 0x4d63091700000000, 0xbef3fb2100000000, 0xbe80c3cd00000000, + 0x4d1031fb00000000, 0x58a126a000000000, 0xab31d49600000000, + 0x72c3091600000000, 0x8153fb2000000000, 0x94e2ec7b00000000, + 0x67721e4d00000000, 0xf0030a1000000000, 0x0393f82600000000, + 0x1622ef7d00000000, 0xe5b21d4b00000000, 0x3c40c0cb00000000, + 0xcfd032fd00000000, 0xda6125a600000000, 0x29f1d79000000000, + 0x2982ef7c00000000, 0xda121d4a00000000, 0xcfa30a1100000000, + 0x3c33f82700000000, 0xe5c125a700000000, 0x1651d79100000000, + 0x03e0c0ca00000000, 0xf07032fc00000000, 0x4200c1c900000000, + 0xb19033ff00000000, 0xa42124a400000000, 0x57b1d69200000000, + 0x8e430b1200000000, 0x7dd3f92400000000, 0x6862ee7f00000000, + 0x9bf21c4900000000, 0x9b8124a500000000, 0x6811d69300000000, + 0x7da0c1c800000000, 0x8e3033fe00000000, 0x57c2ee7e00000000, + 0xa4521c4800000000, 0xb1e30b1300000000, 0x4273f92500000000, + 0x9f0023a900000000, 0x6c90d19f00000000, 0x7921c6c400000000, + 0x8ab134f200000000, 0x5343e97200000000, 0xa0d31b4400000000, + 0xb5620c1f00000000, 0x46f2fe2900000000, 0x4681c6c500000000, + 0xb51134f300000000, 0xa0a023a800000000, 0x5330d19e00000000, + 0x8ac20c1e00000000, 0x7952fe2800000000, 0x6ce3e97300000000, + 0x9f731b4500000000, 0x2d03e87000000000, 0xde931a4600000000, + 0xcb220d1d00000000, 0x38b2ff2b00000000, 0xe14022ab00000000, + 0x12d0d09d00000000, 0x0761c7c600000000, 0xf4f135f000000000, + 0xf4820d1c00000000, 0x0712ff2a00000000, 0x12a3e87100000000, + 0xe1331a4700000000, 0x38c1c7c700000000, 0xcb5135f100000000, + 0xdee022aa00000000, 0x2d70d09c00000000, 0xba01c4c100000000, + 0x499136f700000000, 0x5c2021ac00000000, 0xafb0d39a00000000, + 0x76420e1a00000000, 0x85d2fc2c00000000, 0x9063eb7700000000, + 0x63f3194100000000, 0x638021ad00000000, 0x9010d39b00000000, + 0x85a1c4c000000000, 0x763136f600000000, 0xafc3eb7600000000, + 0x5c53194000000000, 0x49e20e1b00000000, 0xba72fc2d00000000, + 0x08020f1800000000, 0xfb92fd2e00000000, 0xee23ea7500000000, + 0x1db3184300000000, 0xc441c5c300000000, 0x37d137f500000000, + 0x226020ae00000000, 0xd1f0d29800000000, 0xd183ea7400000000, + 0x2213184200000000, 0x37a20f1900000000, 0xc432fd2f00000000, + 0x1dc020af00000000, 0xee50d29900000000, 0xfbe1c5c200000000, + 0x087137f400000000}, + {0x0000000000000000, 0x3651822400000000, 0x6ca2044900000000, + 0x5af3866d00000000, 0xd844099200000000, 0xee158bb600000000, + 0xb4e60ddb00000000, 0x82b78fff00000000, 0xf18f63ff00000000, + 0xc7dee1db00000000, 0x9d2d67b600000000, 0xab7ce59200000000, + 0x29cb6a6d00000000, 0x1f9ae84900000000, 0x45696e2400000000, + 0x7338ec0000000000, 0xa319b62500000000, 0x9548340100000000, + 0xcfbbb26c00000000, 0xf9ea304800000000, 0x7b5dbfb700000000, + 0x4d0c3d9300000000, 0x17ffbbfe00000000, 0x21ae39da00000000, + 0x5296d5da00000000, 0x64c757fe00000000, 0x3e34d19300000000, + 0x086553b700000000, 0x8ad2dc4800000000, 0xbc835e6c00000000, + 0xe670d80100000000, 0xd0215a2500000000, 0x46336c4b00000000, + 0x7062ee6f00000000, 0x2a91680200000000, 0x1cc0ea2600000000, + 0x9e7765d900000000, 0xa826e7fd00000000, 0xf2d5619000000000, + 0xc484e3b400000000, 0xb7bc0fb400000000, 0x81ed8d9000000000, + 0xdb1e0bfd00000000, 0xed4f89d900000000, 0x6ff8062600000000, + 0x59a9840200000000, 0x035a026f00000000, 0x350b804b00000000, + 0xe52ada6e00000000, 0xd37b584a00000000, 0x8988de2700000000, + 0xbfd95c0300000000, 0x3d6ed3fc00000000, 0x0b3f51d800000000, + 0x51ccd7b500000000, 0x679d559100000000, 0x14a5b99100000000, + 0x22f43bb500000000, 0x7807bdd800000000, 0x4e563ffc00000000, + 0xcce1b00300000000, 0xfab0322700000000, 0xa043b44a00000000, + 0x9612366e00000000, 0x8c66d89600000000, 0xba375ab200000000, + 0xe0c4dcdf00000000, 0xd6955efb00000000, 0x5422d10400000000, + 0x6273532000000000, 0x3880d54d00000000, 0x0ed1576900000000, + 0x7de9bb6900000000, 0x4bb8394d00000000, 0x114bbf2000000000, + 0x271a3d0400000000, 0xa5adb2fb00000000, 0x93fc30df00000000, + 0xc90fb6b200000000, 0xff5e349600000000, 0x2f7f6eb300000000, + 0x192eec9700000000, 0x43dd6afa00000000, 0x758ce8de00000000, + 0xf73b672100000000, 0xc16ae50500000000, 0x9b99636800000000, + 0xadc8e14c00000000, 0xdef00d4c00000000, 0xe8a18f6800000000, + 0xb252090500000000, 0x84038b2100000000, 0x06b404de00000000, + 0x30e586fa00000000, 0x6a16009700000000, 0x5c4782b300000000, + 0xca55b4dd00000000, 0xfc0436f900000000, 0xa6f7b09400000000, + 0x90a632b000000000, 0x1211bd4f00000000, 0x24403f6b00000000, + 0x7eb3b90600000000, 0x48e23b2200000000, 0x3bdad72200000000, + 0x0d8b550600000000, 0x5778d36b00000000, 0x6129514f00000000, + 0xe39edeb000000000, 0xd5cf5c9400000000, 0x8f3cdaf900000000, + 0xb96d58dd00000000, 0x694c02f800000000, 0x5f1d80dc00000000, + 0x05ee06b100000000, 0x33bf849500000000, 0xb1080b6a00000000, + 0x8759894e00000000, 0xddaa0f2300000000, 0xebfb8d0700000000, + 0x98c3610700000000, 0xae92e32300000000, 0xf461654e00000000, + 0xc230e76a00000000, 0x4087689500000000, 0x76d6eab100000000, + 0x2c256cdc00000000, 0x1a74eef800000000, 0x59cbc1f600000000, + 0x6f9a43d200000000, 0x3569c5bf00000000, 0x0338479b00000000, + 0x818fc86400000000, 0xb7de4a4000000000, 0xed2dcc2d00000000, + 0xdb7c4e0900000000, 0xa844a20900000000, 0x9e15202d00000000, + 0xc4e6a64000000000, 0xf2b7246400000000, 0x7000ab9b00000000, + 0x465129bf00000000, 0x1ca2afd200000000, 0x2af32df600000000, + 0xfad277d300000000, 0xcc83f5f700000000, 0x9670739a00000000, + 0xa021f1be00000000, 0x22967e4100000000, 0x14c7fc6500000000, + 0x4e347a0800000000, 0x7865f82c00000000, 0x0b5d142c00000000, + 0x3d0c960800000000, 0x67ff106500000000, 0x51ae924100000000, + 0xd3191dbe00000000, 0xe5489f9a00000000, 0xbfbb19f700000000, + 0x89ea9bd300000000, 0x1ff8adbd00000000, 0x29a92f9900000000, + 0x735aa9f400000000, 0x450b2bd000000000, 0xc7bca42f00000000, + 0xf1ed260b00000000, 0xab1ea06600000000, 0x9d4f224200000000, + 0xee77ce4200000000, 0xd8264c6600000000, 0x82d5ca0b00000000, + 0xb484482f00000000, 0x3633c7d000000000, 0x006245f400000000, + 0x5a91c39900000000, 0x6cc041bd00000000, 0xbce11b9800000000, + 0x8ab099bc00000000, 0xd0431fd100000000, 0xe6129df500000000, + 0x64a5120a00000000, 0x52f4902e00000000, 0x0807164300000000, + 0x3e56946700000000, 0x4d6e786700000000, 0x7b3ffa4300000000, + 0x21cc7c2e00000000, 0x179dfe0a00000000, 0x952a71f500000000, + 0xa37bf3d100000000, 0xf98875bc00000000, 0xcfd9f79800000000, + 0xd5ad196000000000, 0xe3fc9b4400000000, 0xb90f1d2900000000, + 0x8f5e9f0d00000000, 0x0de910f200000000, 0x3bb892d600000000, + 0x614b14bb00000000, 0x571a969f00000000, 0x24227a9f00000000, + 0x1273f8bb00000000, 0x48807ed600000000, 0x7ed1fcf200000000, + 0xfc66730d00000000, 0xca37f12900000000, 0x90c4774400000000, + 0xa695f56000000000, 0x76b4af4500000000, 0x40e52d6100000000, + 0x1a16ab0c00000000, 0x2c47292800000000, 0xaef0a6d700000000, + 0x98a124f300000000, 0xc252a29e00000000, 0xf40320ba00000000, + 0x873bccba00000000, 0xb16a4e9e00000000, 0xeb99c8f300000000, + 0xddc84ad700000000, 0x5f7fc52800000000, 0x692e470c00000000, + 0x33ddc16100000000, 0x058c434500000000, 0x939e752b00000000, + 0xa5cff70f00000000, 0xff3c716200000000, 0xc96df34600000000, + 0x4bda7cb900000000, 0x7d8bfe9d00000000, 0x277878f000000000, + 0x1129fad400000000, 0x621116d400000000, 0x544094f000000000, + 0x0eb3129d00000000, 0x38e290b900000000, 0xba551f4600000000, + 0x8c049d6200000000, 0xd6f71b0f00000000, 0xe0a6992b00000000, + 0x3087c30e00000000, 0x06d6412a00000000, 0x5c25c74700000000, + 0x6a74456300000000, 0xe8c3ca9c00000000, 0xde9248b800000000, + 0x8461ced500000000, 0xb2304cf100000000, 0xc108a0f100000000, + 0xf75922d500000000, 0xadaaa4b800000000, 0x9bfb269c00000000, + 0x194ca96300000000, 0x2f1d2b4700000000, 0x75eead2a00000000, + 0x43bf2f0e00000000}, + {0x0000000000000000, 0xc8179ecf00000000, 0xd1294d4400000000, + 0x193ed38b00000000, 0xa2539a8800000000, 0x6a44044700000000, + 0x737ad7cc00000000, 0xbb6d490300000000, 0x05a145ca00000000, + 0xcdb6db0500000000, 0xd488088e00000000, 0x1c9f964100000000, + 0xa7f2df4200000000, 0x6fe5418d00000000, 0x76db920600000000, + 0xbecc0cc900000000, 0x4b44fa4f00000000, 0x8353648000000000, + 0x9a6db70b00000000, 0x527a29c400000000, 0xe91760c700000000, + 0x2100fe0800000000, 0x383e2d8300000000, 0xf029b34c00000000, + 0x4ee5bf8500000000, 0x86f2214a00000000, 0x9fccf2c100000000, + 0x57db6c0e00000000, 0xecb6250d00000000, 0x24a1bbc200000000, + 0x3d9f684900000000, 0xf588f68600000000, 0x9688f49f00000000, + 0x5e9f6a5000000000, 0x47a1b9db00000000, 0x8fb6271400000000, + 0x34db6e1700000000, 0xfcccf0d800000000, 0xe5f2235300000000, + 0x2de5bd9c00000000, 0x9329b15500000000, 0x5b3e2f9a00000000, + 0x4200fc1100000000, 0x8a1762de00000000, 0x317a2bdd00000000, + 0xf96db51200000000, 0xe053669900000000, 0x2844f85600000000, + 0xddcc0ed000000000, 0x15db901f00000000, 0x0ce5439400000000, + 0xc4f2dd5b00000000, 0x7f9f945800000000, 0xb7880a9700000000, + 0xaeb6d91c00000000, 0x66a147d300000000, 0xd86d4b1a00000000, + 0x107ad5d500000000, 0x0944065e00000000, 0xc153989100000000, + 0x7a3ed19200000000, 0xb2294f5d00000000, 0xab179cd600000000, + 0x6300021900000000, 0x6d1798e400000000, 0xa500062b00000000, + 0xbc3ed5a000000000, 0x74294b6f00000000, 0xcf44026c00000000, + 0x07539ca300000000, 0x1e6d4f2800000000, 0xd67ad1e700000000, + 0x68b6dd2e00000000, 0xa0a143e100000000, 0xb99f906a00000000, + 0x71880ea500000000, 0xcae547a600000000, 0x02f2d96900000000, + 0x1bcc0ae200000000, 0xd3db942d00000000, 0x265362ab00000000, + 0xee44fc6400000000, 0xf77a2fef00000000, 0x3f6db12000000000, + 0x8400f82300000000, 0x4c1766ec00000000, 0x5529b56700000000, + 0x9d3e2ba800000000, 0x23f2276100000000, 0xebe5b9ae00000000, + 0xf2db6a2500000000, 0x3accf4ea00000000, 0x81a1bde900000000, + 0x49b6232600000000, 0x5088f0ad00000000, 0x989f6e6200000000, + 0xfb9f6c7b00000000, 0x3388f2b400000000, 0x2ab6213f00000000, + 0xe2a1bff000000000, 0x59ccf6f300000000, 0x91db683c00000000, + 0x88e5bbb700000000, 0x40f2257800000000, 0xfe3e29b100000000, + 0x3629b77e00000000, 0x2f1764f500000000, 0xe700fa3a00000000, + 0x5c6db33900000000, 0x947a2df600000000, 0x8d44fe7d00000000, + 0x455360b200000000, 0xb0db963400000000, 0x78cc08fb00000000, + 0x61f2db7000000000, 0xa9e545bf00000000, 0x12880cbc00000000, + 0xda9f927300000000, 0xc3a141f800000000, 0x0bb6df3700000000, + 0xb57ad3fe00000000, 0x7d6d4d3100000000, 0x64539eba00000000, + 0xac44007500000000, 0x1729497600000000, 0xdf3ed7b900000000, + 0xc600043200000000, 0x0e179afd00000000, 0x9b28411200000000, + 0x533fdfdd00000000, 0x4a010c5600000000, 0x8216929900000000, + 0x397bdb9a00000000, 0xf16c455500000000, 0xe85296de00000000, + 0x2045081100000000, 0x9e8904d800000000, 0x569e9a1700000000, + 0x4fa0499c00000000, 0x87b7d75300000000, 0x3cda9e5000000000, + 0xf4cd009f00000000, 0xedf3d31400000000, 0x25e44ddb00000000, + 0xd06cbb5d00000000, 0x187b259200000000, 0x0145f61900000000, + 0xc95268d600000000, 0x723f21d500000000, 0xba28bf1a00000000, + 0xa3166c9100000000, 0x6b01f25e00000000, 0xd5cdfe9700000000, + 0x1dda605800000000, 0x04e4b3d300000000, 0xccf32d1c00000000, + 0x779e641f00000000, 0xbf89fad000000000, 0xa6b7295b00000000, + 0x6ea0b79400000000, 0x0da0b58d00000000, 0xc5b72b4200000000, + 0xdc89f8c900000000, 0x149e660600000000, 0xaff32f0500000000, + 0x67e4b1ca00000000, 0x7eda624100000000, 0xb6cdfc8e00000000, + 0x0801f04700000000, 0xc0166e8800000000, 0xd928bd0300000000, + 0x113f23cc00000000, 0xaa526acf00000000, 0x6245f40000000000, + 0x7b7b278b00000000, 0xb36cb94400000000, 0x46e44fc200000000, + 0x8ef3d10d00000000, 0x97cd028600000000, 0x5fda9c4900000000, + 0xe4b7d54a00000000, 0x2ca04b8500000000, 0x359e980e00000000, + 0xfd8906c100000000, 0x43450a0800000000, 0x8b5294c700000000, + 0x926c474c00000000, 0x5a7bd98300000000, 0xe116908000000000, + 0x29010e4f00000000, 0x303fddc400000000, 0xf828430b00000000, + 0xf63fd9f600000000, 0x3e28473900000000, 0x271694b200000000, + 0xef010a7d00000000, 0x546c437e00000000, 0x9c7bddb100000000, + 0x85450e3a00000000, 0x4d5290f500000000, 0xf39e9c3c00000000, + 0x3b8902f300000000, 0x22b7d17800000000, 0xeaa04fb700000000, + 0x51cd06b400000000, 0x99da987b00000000, 0x80e44bf000000000, + 0x48f3d53f00000000, 0xbd7b23b900000000, 0x756cbd7600000000, + 0x6c526efd00000000, 0xa445f03200000000, 0x1f28b93100000000, + 0xd73f27fe00000000, 0xce01f47500000000, 0x06166aba00000000, + 0xb8da667300000000, 0x70cdf8bc00000000, 0x69f32b3700000000, + 0xa1e4b5f800000000, 0x1a89fcfb00000000, 0xd29e623400000000, + 0xcba0b1bf00000000, 0x03b72f7000000000, 0x60b72d6900000000, + 0xa8a0b3a600000000, 0xb19e602d00000000, 0x7989fee200000000, + 0xc2e4b7e100000000, 0x0af3292e00000000, 0x13cdfaa500000000, + 0xdbda646a00000000, 0x651668a300000000, 0xad01f66c00000000, + 0xb43f25e700000000, 0x7c28bb2800000000, 0xc745f22b00000000, + 0x0f526ce400000000, 0x166cbf6f00000000, 0xde7b21a000000000, + 0x2bf3d72600000000, 0xe3e449e900000000, 0xfada9a6200000000, + 0x32cd04ad00000000, 0x89a04dae00000000, 0x41b7d36100000000, + 0x588900ea00000000, 0x909e9e2500000000, 0x2e5292ec00000000, + 0xe6450c2300000000, 0xff7bdfa800000000, 0x376c416700000000, + 0x8c01086400000000, 0x441696ab00000000, 0x5d28452000000000, + 0x953fdbef00000000}, + {0x0000000000000000, 0x95d4709500000000, 0x6baf90f100000000, + 0xfe7be06400000000, 0x9758503800000000, 0x028c20ad00000000, + 0xfcf7c0c900000000, 0x6923b05c00000000, 0x2eb1a07000000000, + 0xbb65d0e500000000, 0x451e308100000000, 0xd0ca401400000000, + 0xb9e9f04800000000, 0x2c3d80dd00000000, 0xd24660b900000000, + 0x4792102c00000000, 0x5c6241e100000000, 0xc9b6317400000000, + 0x37cdd11000000000, 0xa219a18500000000, 0xcb3a11d900000000, + 0x5eee614c00000000, 0xa095812800000000, 0x3541f1bd00000000, + 0x72d3e19100000000, 0xe707910400000000, 0x197c716000000000, + 0x8ca801f500000000, 0xe58bb1a900000000, 0x705fc13c00000000, + 0x8e24215800000000, 0x1bf051cd00000000, 0xf9c2f31900000000, + 0x6c16838c00000000, 0x926d63e800000000, 0x07b9137d00000000, + 0x6e9aa32100000000, 0xfb4ed3b400000000, 0x053533d000000000, + 0x90e1434500000000, 0xd773536900000000, 0x42a723fc00000000, + 0xbcdcc39800000000, 0x2908b30d00000000, 0x402b035100000000, + 0xd5ff73c400000000, 0x2b8493a000000000, 0xbe50e33500000000, + 0xa5a0b2f800000000, 0x3074c26d00000000, 0xce0f220900000000, + 0x5bdb529c00000000, 0x32f8e2c000000000, 0xa72c925500000000, + 0x5957723100000000, 0xcc8302a400000000, 0x8b11128800000000, + 0x1ec5621d00000000, 0xe0be827900000000, 0x756af2ec00000000, + 0x1c4942b000000000, 0x899d322500000000, 0x77e6d24100000000, + 0xe232a2d400000000, 0xf285e73300000000, 0x675197a600000000, + 0x992a77c200000000, 0x0cfe075700000000, 0x65ddb70b00000000, + 0xf009c79e00000000, 0x0e7227fa00000000, 0x9ba6576f00000000, + 0xdc34474300000000, 0x49e037d600000000, 0xb79bd7b200000000, + 0x224fa72700000000, 0x4b6c177b00000000, 0xdeb867ee00000000, + 0x20c3878a00000000, 0xb517f71f00000000, 0xaee7a6d200000000, + 0x3b33d64700000000, 0xc548362300000000, 0x509c46b600000000, + 0x39bff6ea00000000, 0xac6b867f00000000, 0x5210661b00000000, + 0xc7c4168e00000000, 0x805606a200000000, 0x1582763700000000, + 0xebf9965300000000, 0x7e2de6c600000000, 0x170e569a00000000, + 0x82da260f00000000, 0x7ca1c66b00000000, 0xe975b6fe00000000, + 0x0b47142a00000000, 0x9e9364bf00000000, 0x60e884db00000000, + 0xf53cf44e00000000, 0x9c1f441200000000, 0x09cb348700000000, + 0xf7b0d4e300000000, 0x6264a47600000000, 0x25f6b45a00000000, + 0xb022c4cf00000000, 0x4e5924ab00000000, 0xdb8d543e00000000, + 0xb2aee46200000000, 0x277a94f700000000, 0xd901749300000000, + 0x4cd5040600000000, 0x572555cb00000000, 0xc2f1255e00000000, + 0x3c8ac53a00000000, 0xa95eb5af00000000, 0xc07d05f300000000, + 0x55a9756600000000, 0xabd2950200000000, 0x3e06e59700000000, + 0x7994f5bb00000000, 0xec40852e00000000, 0x123b654a00000000, + 0x87ef15df00000000, 0xeecca58300000000, 0x7b18d51600000000, + 0x8563357200000000, 0x10b745e700000000, 0xe40bcf6700000000, + 0x71dfbff200000000, 0x8fa45f9600000000, 0x1a702f0300000000, + 0x73539f5f00000000, 0xe687efca00000000, 0x18fc0fae00000000, + 0x8d287f3b00000000, 0xcaba6f1700000000, 0x5f6e1f8200000000, + 0xa115ffe600000000, 0x34c18f7300000000, 0x5de23f2f00000000, + 0xc8364fba00000000, 0x364dafde00000000, 0xa399df4b00000000, + 0xb8698e8600000000, 0x2dbdfe1300000000, 0xd3c61e7700000000, + 0x46126ee200000000, 0x2f31debe00000000, 0xbae5ae2b00000000, + 0x449e4e4f00000000, 0xd14a3eda00000000, 0x96d82ef600000000, + 0x030c5e6300000000, 0xfd77be0700000000, 0x68a3ce9200000000, + 0x01807ece00000000, 0x94540e5b00000000, 0x6a2fee3f00000000, + 0xfffb9eaa00000000, 0x1dc93c7e00000000, 0x881d4ceb00000000, + 0x7666ac8f00000000, 0xe3b2dc1a00000000, 0x8a916c4600000000, + 0x1f451cd300000000, 0xe13efcb700000000, 0x74ea8c2200000000, + 0x33789c0e00000000, 0xa6acec9b00000000, 0x58d70cff00000000, + 0xcd037c6a00000000, 0xa420cc3600000000, 0x31f4bca300000000, + 0xcf8f5cc700000000, 0x5a5b2c5200000000, 0x41ab7d9f00000000, + 0xd47f0d0a00000000, 0x2a04ed6e00000000, 0xbfd09dfb00000000, + 0xd6f32da700000000, 0x43275d3200000000, 0xbd5cbd5600000000, + 0x2888cdc300000000, 0x6f1addef00000000, 0xfacead7a00000000, + 0x04b54d1e00000000, 0x91613d8b00000000, 0xf8428dd700000000, + 0x6d96fd4200000000, 0x93ed1d2600000000, 0x06396db300000000, + 0x168e285400000000, 0x835a58c100000000, 0x7d21b8a500000000, + 0xe8f5c83000000000, 0x81d6786c00000000, 0x140208f900000000, + 0xea79e89d00000000, 0x7fad980800000000, 0x383f882400000000, + 0xadebf8b100000000, 0x539018d500000000, 0xc644684000000000, + 0xaf67d81c00000000, 0x3ab3a88900000000, 0xc4c848ed00000000, + 0x511c387800000000, 0x4aec69b500000000, 0xdf38192000000000, + 0x2143f94400000000, 0xb49789d100000000, 0xddb4398d00000000, + 0x4860491800000000, 0xb61ba97c00000000, 0x23cfd9e900000000, + 0x645dc9c500000000, 0xf189b95000000000, 0x0ff2593400000000, + 0x9a2629a100000000, 0xf30599fd00000000, 0x66d1e96800000000, + 0x98aa090c00000000, 0x0d7e799900000000, 0xef4cdb4d00000000, + 0x7a98abd800000000, 0x84e34bbc00000000, 0x11373b2900000000, + 0x78148b7500000000, 0xedc0fbe000000000, 0x13bb1b8400000000, + 0x866f6b1100000000, 0xc1fd7b3d00000000, 0x54290ba800000000, + 0xaa52ebcc00000000, 0x3f869b5900000000, 0x56a52b0500000000, + 0xc3715b9000000000, 0x3d0abbf400000000, 0xa8decb6100000000, + 0xb32e9aac00000000, 0x26faea3900000000, 0xd8810a5d00000000, + 0x4d557ac800000000, 0x2476ca9400000000, 0xb1a2ba0100000000, + 0x4fd95a6500000000, 0xda0d2af000000000, 0x9d9f3adc00000000, + 0x084b4a4900000000, 0xf630aa2d00000000, 0x63e4dab800000000, + 0x0ac76ae400000000, 0x9f131a7100000000, 0x6168fa1500000000, + 0xf4bc8a8000000000}, + {0x0000000000000000, 0x1f17f08000000000, 0x7f2891da00000000, + 0x603f615a00000000, 0xbf56536e00000000, 0xa041a3ee00000000, + 0xc07ec2b400000000, 0xdf69323400000000, 0x7eada6dc00000000, + 0x61ba565c00000000, 0x0185370600000000, 0x1e92c78600000000, + 0xc1fbf5b200000000, 0xdeec053200000000, 0xbed3646800000000, + 0xa1c494e800000000, 0xbd5c3c6200000000, 0xa24bcce200000000, + 0xc274adb800000000, 0xdd635d3800000000, 0x020a6f0c00000000, + 0x1d1d9f8c00000000, 0x7d22fed600000000, 0x62350e5600000000, + 0xc3f19abe00000000, 0xdce66a3e00000000, 0xbcd90b6400000000, + 0xa3cefbe400000000, 0x7ca7c9d000000000, 0x63b0395000000000, + 0x038f580a00000000, 0x1c98a88a00000000, 0x7ab978c400000000, + 0x65ae884400000000, 0x0591e91e00000000, 0x1a86199e00000000, + 0xc5ef2baa00000000, 0xdaf8db2a00000000, 0xbac7ba7000000000, + 0xa5d04af000000000, 0x0414de1800000000, 0x1b032e9800000000, + 0x7b3c4fc200000000, 0x642bbf4200000000, 0xbb428d7600000000, + 0xa4557df600000000, 0xc46a1cac00000000, 0xdb7dec2c00000000, + 0xc7e544a600000000, 0xd8f2b42600000000, 0xb8cdd57c00000000, + 0xa7da25fc00000000, 0x78b317c800000000, 0x67a4e74800000000, + 0x079b861200000000, 0x188c769200000000, 0xb948e27a00000000, + 0xa65f12fa00000000, 0xc66073a000000000, 0xd977832000000000, + 0x061eb11400000000, 0x1909419400000000, 0x793620ce00000000, + 0x6621d04e00000000, 0xb574805300000000, 0xaa6370d300000000, + 0xca5c118900000000, 0xd54be10900000000, 0x0a22d33d00000000, + 0x153523bd00000000, 0x750a42e700000000, 0x6a1db26700000000, + 0xcbd9268f00000000, 0xd4ced60f00000000, 0xb4f1b75500000000, + 0xabe647d500000000, 0x748f75e100000000, 0x6b98856100000000, + 0x0ba7e43b00000000, 0x14b014bb00000000, 0x0828bc3100000000, + 0x173f4cb100000000, 0x77002deb00000000, 0x6817dd6b00000000, + 0xb77eef5f00000000, 0xa8691fdf00000000, 0xc8567e8500000000, + 0xd7418e0500000000, 0x76851aed00000000, 0x6992ea6d00000000, + 0x09ad8b3700000000, 0x16ba7bb700000000, 0xc9d3498300000000, + 0xd6c4b90300000000, 0xb6fbd85900000000, 0xa9ec28d900000000, + 0xcfcdf89700000000, 0xd0da081700000000, 0xb0e5694d00000000, + 0xaff299cd00000000, 0x709babf900000000, 0x6f8c5b7900000000, + 0x0fb33a2300000000, 0x10a4caa300000000, 0xb1605e4b00000000, + 0xae77aecb00000000, 0xce48cf9100000000, 0xd15f3f1100000000, + 0x0e360d2500000000, 0x1121fda500000000, 0x711e9cff00000000, + 0x6e096c7f00000000, 0x7291c4f500000000, 0x6d86347500000000, + 0x0db9552f00000000, 0x12aea5af00000000, 0xcdc7979b00000000, + 0xd2d0671b00000000, 0xb2ef064100000000, 0xadf8f6c100000000, + 0x0c3c622900000000, 0x132b92a900000000, 0x7314f3f300000000, + 0x6c03037300000000, 0xb36a314700000000, 0xac7dc1c700000000, + 0xcc42a09d00000000, 0xd355501d00000000, 0x6ae900a700000000, + 0x75fef02700000000, 0x15c1917d00000000, 0x0ad661fd00000000, + 0xd5bf53c900000000, 0xcaa8a34900000000, 0xaa97c21300000000, + 0xb580329300000000, 0x1444a67b00000000, 0x0b5356fb00000000, + 0x6b6c37a100000000, 0x747bc72100000000, 0xab12f51500000000, + 0xb405059500000000, 0xd43a64cf00000000, 0xcb2d944f00000000, + 0xd7b53cc500000000, 0xc8a2cc4500000000, 0xa89dad1f00000000, + 0xb78a5d9f00000000, 0x68e36fab00000000, 0x77f49f2b00000000, + 0x17cbfe7100000000, 0x08dc0ef100000000, 0xa9189a1900000000, + 0xb60f6a9900000000, 0xd6300bc300000000, 0xc927fb4300000000, + 0x164ec97700000000, 0x095939f700000000, 0x696658ad00000000, + 0x7671a82d00000000, 0x1050786300000000, 0x0f4788e300000000, + 0x6f78e9b900000000, 0x706f193900000000, 0xaf062b0d00000000, + 0xb011db8d00000000, 0xd02ebad700000000, 0xcf394a5700000000, + 0x6efddebf00000000, 0x71ea2e3f00000000, 0x11d54f6500000000, + 0x0ec2bfe500000000, 0xd1ab8dd100000000, 0xcebc7d5100000000, + 0xae831c0b00000000, 0xb194ec8b00000000, 0xad0c440100000000, + 0xb21bb48100000000, 0xd224d5db00000000, 0xcd33255b00000000, + 0x125a176f00000000, 0x0d4de7ef00000000, 0x6d7286b500000000, + 0x7265763500000000, 0xd3a1e2dd00000000, 0xccb6125d00000000, + 0xac89730700000000, 0xb39e838700000000, 0x6cf7b1b300000000, + 0x73e0413300000000, 0x13df206900000000, 0x0cc8d0e900000000, + 0xdf9d80f400000000, 0xc08a707400000000, 0xa0b5112e00000000, + 0xbfa2e1ae00000000, 0x60cbd39a00000000, 0x7fdc231a00000000, + 0x1fe3424000000000, 0x00f4b2c000000000, 0xa130262800000000, + 0xbe27d6a800000000, 0xde18b7f200000000, 0xc10f477200000000, + 0x1e66754600000000, 0x017185c600000000, 0x614ee49c00000000, + 0x7e59141c00000000, 0x62c1bc9600000000, 0x7dd64c1600000000, + 0x1de92d4c00000000, 0x02feddcc00000000, 0xdd97eff800000000, + 0xc2801f7800000000, 0xa2bf7e2200000000, 0xbda88ea200000000, + 0x1c6c1a4a00000000, 0x037beaca00000000, 0x63448b9000000000, + 0x7c537b1000000000, 0xa33a492400000000, 0xbc2db9a400000000, + 0xdc12d8fe00000000, 0xc305287e00000000, 0xa524f83000000000, + 0xba3308b000000000, 0xda0c69ea00000000, 0xc51b996a00000000, + 0x1a72ab5e00000000, 0x05655bde00000000, 0x655a3a8400000000, + 0x7a4dca0400000000, 0xdb895eec00000000, 0xc49eae6c00000000, + 0xa4a1cf3600000000, 0xbbb63fb600000000, 0x64df0d8200000000, + 0x7bc8fd0200000000, 0x1bf79c5800000000, 0x04e06cd800000000, + 0x1878c45200000000, 0x076f34d200000000, 0x6750558800000000, + 0x7847a50800000000, 0xa72e973c00000000, 0xb83967bc00000000, + 0xd80606e600000000, 0xc711f66600000000, 0x66d5628e00000000, + 0x79c2920e00000000, 0x19fdf35400000000, 0x06ea03d400000000, + 0xd98331e000000000, 0xc694c16000000000, 0xa6aba03a00000000, + 0xb9bc50ba00000000}, + {0x0000000000000000, 0xe2fd888d00000000, 0x85fd60c000000000, + 0x6700e84d00000000, 0x4bfdb05b00000000, 0xa90038d600000000, + 0xce00d09b00000000, 0x2cfd581600000000, 0x96fa61b700000000, + 0x7407e93a00000000, 0x1307017700000000, 0xf1fa89fa00000000, + 0xdd07d1ec00000000, 0x3ffa596100000000, 0x58fab12c00000000, + 0xba0739a100000000, 0x6df3b2b500000000, 0x8f0e3a3800000000, + 0xe80ed27500000000, 0x0af35af800000000, 0x260e02ee00000000, + 0xc4f38a6300000000, 0xa3f3622e00000000, 0x410eeaa300000000, + 0xfb09d30200000000, 0x19f45b8f00000000, 0x7ef4b3c200000000, + 0x9c093b4f00000000, 0xb0f4635900000000, 0x5209ebd400000000, + 0x3509039900000000, 0xd7f48b1400000000, 0x9be014b000000000, + 0x791d9c3d00000000, 0x1e1d747000000000, 0xfce0fcfd00000000, + 0xd01da4eb00000000, 0x32e02c6600000000, 0x55e0c42b00000000, + 0xb71d4ca600000000, 0x0d1a750700000000, 0xefe7fd8a00000000, + 0x88e715c700000000, 0x6a1a9d4a00000000, 0x46e7c55c00000000, + 0xa41a4dd100000000, 0xc31aa59c00000000, 0x21e72d1100000000, + 0xf613a60500000000, 0x14ee2e8800000000, 0x73eec6c500000000, + 0x91134e4800000000, 0xbdee165e00000000, 0x5f139ed300000000, + 0x3813769e00000000, 0xdaeefe1300000000, 0x60e9c7b200000000, + 0x82144f3f00000000, 0xe514a77200000000, 0x07e92fff00000000, + 0x2b1477e900000000, 0xc9e9ff6400000000, 0xaee9172900000000, + 0x4c149fa400000000, 0x77c758bb00000000, 0x953ad03600000000, + 0xf23a387b00000000, 0x10c7b0f600000000, 0x3c3ae8e000000000, + 0xdec7606d00000000, 0xb9c7882000000000, 0x5b3a00ad00000000, + 0xe13d390c00000000, 0x03c0b18100000000, 0x64c059cc00000000, + 0x863dd14100000000, 0xaac0895700000000, 0x483d01da00000000, + 0x2f3de99700000000, 0xcdc0611a00000000, 0x1a34ea0e00000000, + 0xf8c9628300000000, 0x9fc98ace00000000, 0x7d34024300000000, + 0x51c95a5500000000, 0xb334d2d800000000, 0xd4343a9500000000, + 0x36c9b21800000000, 0x8cce8bb900000000, 0x6e33033400000000, + 0x0933eb7900000000, 0xebce63f400000000, 0xc7333be200000000, + 0x25ceb36f00000000, 0x42ce5b2200000000, 0xa033d3af00000000, + 0xec274c0b00000000, 0x0edac48600000000, 0x69da2ccb00000000, + 0x8b27a44600000000, 0xa7dafc5000000000, 0x452774dd00000000, + 0x22279c9000000000, 0xc0da141d00000000, 0x7add2dbc00000000, + 0x9820a53100000000, 0xff204d7c00000000, 0x1dddc5f100000000, + 0x31209de700000000, 0xd3dd156a00000000, 0xb4ddfd2700000000, + 0x562075aa00000000, 0x81d4febe00000000, 0x6329763300000000, + 0x04299e7e00000000, 0xe6d416f300000000, 0xca294ee500000000, + 0x28d4c66800000000, 0x4fd42e2500000000, 0xad29a6a800000000, + 0x172e9f0900000000, 0xf5d3178400000000, 0x92d3ffc900000000, + 0x702e774400000000, 0x5cd32f5200000000, 0xbe2ea7df00000000, + 0xd92e4f9200000000, 0x3bd3c71f00000000, 0xaf88c0ad00000000, + 0x4d75482000000000, 0x2a75a06d00000000, 0xc88828e000000000, + 0xe47570f600000000, 0x0688f87b00000000, 0x6188103600000000, + 0x837598bb00000000, 0x3972a11a00000000, 0xdb8f299700000000, + 0xbc8fc1da00000000, 0x5e72495700000000, 0x728f114100000000, + 0x907299cc00000000, 0xf772718100000000, 0x158ff90c00000000, + 0xc27b721800000000, 0x2086fa9500000000, 0x478612d800000000, + 0xa57b9a5500000000, 0x8986c24300000000, 0x6b7b4ace00000000, + 0x0c7ba28300000000, 0xee862a0e00000000, 0x548113af00000000, + 0xb67c9b2200000000, 0xd17c736f00000000, 0x3381fbe200000000, + 0x1f7ca3f400000000, 0xfd812b7900000000, 0x9a81c33400000000, + 0x787c4bb900000000, 0x3468d41d00000000, 0xd6955c9000000000, + 0xb195b4dd00000000, 0x53683c5000000000, 0x7f95644600000000, + 0x9d68eccb00000000, 0xfa68048600000000, 0x18958c0b00000000, + 0xa292b5aa00000000, 0x406f3d2700000000, 0x276fd56a00000000, + 0xc5925de700000000, 0xe96f05f100000000, 0x0b928d7c00000000, + 0x6c92653100000000, 0x8e6fedbc00000000, 0x599b66a800000000, + 0xbb66ee2500000000, 0xdc66066800000000, 0x3e9b8ee500000000, + 0x1266d6f300000000, 0xf09b5e7e00000000, 0x979bb63300000000, + 0x75663ebe00000000, 0xcf61071f00000000, 0x2d9c8f9200000000, + 0x4a9c67df00000000, 0xa861ef5200000000, 0x849cb74400000000, + 0x66613fc900000000, 0x0161d78400000000, 0xe39c5f0900000000, + 0xd84f981600000000, 0x3ab2109b00000000, 0x5db2f8d600000000, + 0xbf4f705b00000000, 0x93b2284d00000000, 0x714fa0c000000000, + 0x164f488d00000000, 0xf4b2c00000000000, 0x4eb5f9a100000000, + 0xac48712c00000000, 0xcb48996100000000, 0x29b511ec00000000, + 0x054849fa00000000, 0xe7b5c17700000000, 0x80b5293a00000000, + 0x6248a1b700000000, 0xb5bc2aa300000000, 0x5741a22e00000000, + 0x30414a6300000000, 0xd2bcc2ee00000000, 0xfe419af800000000, + 0x1cbc127500000000, 0x7bbcfa3800000000, 0x994172b500000000, + 0x23464b1400000000, 0xc1bbc39900000000, 0xa6bb2bd400000000, + 0x4446a35900000000, 0x68bbfb4f00000000, 0x8a4673c200000000, + 0xed469b8f00000000, 0x0fbb130200000000, 0x43af8ca600000000, + 0xa152042b00000000, 0xc652ec6600000000, 0x24af64eb00000000, + 0x08523cfd00000000, 0xeaafb47000000000, 0x8daf5c3d00000000, + 0x6f52d4b000000000, 0xd555ed1100000000, 0x37a8659c00000000, + 0x50a88dd100000000, 0xb255055c00000000, 0x9ea85d4a00000000, + 0x7c55d5c700000000, 0x1b553d8a00000000, 0xf9a8b50700000000, + 0x2e5c3e1300000000, 0xcca1b69e00000000, 0xaba15ed300000000, + 0x495cd65e00000000, 0x65a18e4800000000, 0x875c06c500000000, + 0xe05cee8800000000, 0x02a1660500000000, 0xb8a65fa400000000, + 0x5a5bd72900000000, 0x3d5b3f6400000000, 0xdfa6b7e900000000, + 0xf35befff00000000, 0x11a6677200000000, 0x76a68f3f00000000, + 0x945b07b200000000}, + {0x0000000000000000, 0xa90b894e00000000, 0x5217129d00000000, + 0xfb1c9bd300000000, 0xe52855e100000000, 0x4c23dcaf00000000, + 0xb73f477c00000000, 0x1e34ce3200000000, 0x8b57db1900000000, + 0x225c525700000000, 0xd940c98400000000, 0x704b40ca00000000, + 0x6e7f8ef800000000, 0xc77407b600000000, 0x3c689c6500000000, + 0x9563152b00000000, 0x16afb63300000000, 0xbfa43f7d00000000, + 0x44b8a4ae00000000, 0xedb32de000000000, 0xf387e3d200000000, + 0x5a8c6a9c00000000, 0xa190f14f00000000, 0x089b780100000000, + 0x9df86d2a00000000, 0x34f3e46400000000, 0xcfef7fb700000000, + 0x66e4f6f900000000, 0x78d038cb00000000, 0xd1dbb18500000000, + 0x2ac72a5600000000, 0x83cca31800000000, 0x2c5e6d6700000000, + 0x8555e42900000000, 0x7e497ffa00000000, 0xd742f6b400000000, + 0xc976388600000000, 0x607db1c800000000, 0x9b612a1b00000000, + 0x326aa35500000000, 0xa709b67e00000000, 0x0e023f3000000000, + 0xf51ea4e300000000, 0x5c152dad00000000, 0x4221e39f00000000, + 0xeb2a6ad100000000, 0x1036f10200000000, 0xb93d784c00000000, + 0x3af1db5400000000, 0x93fa521a00000000, 0x68e6c9c900000000, + 0xc1ed408700000000, 0xdfd98eb500000000, 0x76d207fb00000000, + 0x8dce9c2800000000, 0x24c5156600000000, 0xb1a6004d00000000, + 0x18ad890300000000, 0xe3b112d000000000, 0x4aba9b9e00000000, + 0x548e55ac00000000, 0xfd85dce200000000, 0x0699473100000000, + 0xaf92ce7f00000000, 0x58bcdace00000000, 0xf1b7538000000000, + 0x0aabc85300000000, 0xa3a0411d00000000, 0xbd948f2f00000000, + 0x149f066100000000, 0xef839db200000000, 0x468814fc00000000, + 0xd3eb01d700000000, 0x7ae0889900000000, 0x81fc134a00000000, + 0x28f79a0400000000, 0x36c3543600000000, 0x9fc8dd7800000000, + 0x64d446ab00000000, 0xcddfcfe500000000, 0x4e136cfd00000000, + 0xe718e5b300000000, 0x1c047e6000000000, 0xb50ff72e00000000, + 0xab3b391c00000000, 0x0230b05200000000, 0xf92c2b8100000000, + 0x5027a2cf00000000, 0xc544b7e400000000, 0x6c4f3eaa00000000, + 0x9753a57900000000, 0x3e582c3700000000, 0x206ce20500000000, + 0x89676b4b00000000, 0x727bf09800000000, 0xdb7079d600000000, + 0x74e2b7a900000000, 0xdde93ee700000000, 0x26f5a53400000000, + 0x8ffe2c7a00000000, 0x91cae24800000000, 0x38c16b0600000000, + 0xc3ddf0d500000000, 0x6ad6799b00000000, 0xffb56cb000000000, + 0x56bee5fe00000000, 0xada27e2d00000000, 0x04a9f76300000000, + 0x1a9d395100000000, 0xb396b01f00000000, 0x488a2bcc00000000, + 0xe181a28200000000, 0x624d019a00000000, 0xcb4688d400000000, + 0x305a130700000000, 0x99519a4900000000, 0x8765547b00000000, + 0x2e6edd3500000000, 0xd57246e600000000, 0x7c79cfa800000000, + 0xe91ada8300000000, 0x401153cd00000000, 0xbb0dc81e00000000, + 0x1206415000000000, 0x0c328f6200000000, 0xa539062c00000000, + 0x5e259dff00000000, 0xf72e14b100000000, 0xf17ec44600000000, + 0x58754d0800000000, 0xa369d6db00000000, 0x0a625f9500000000, + 0x145691a700000000, 0xbd5d18e900000000, 0x4641833a00000000, + 0xef4a0a7400000000, 0x7a291f5f00000000, 0xd322961100000000, + 0x283e0dc200000000, 0x8135848c00000000, 0x9f014abe00000000, + 0x360ac3f000000000, 0xcd16582300000000, 0x641dd16d00000000, + 0xe7d1727500000000, 0x4edafb3b00000000, 0xb5c660e800000000, + 0x1ccde9a600000000, 0x02f9279400000000, 0xabf2aeda00000000, + 0x50ee350900000000, 0xf9e5bc4700000000, 0x6c86a96c00000000, + 0xc58d202200000000, 0x3e91bbf100000000, 0x979a32bf00000000, + 0x89aefc8d00000000, 0x20a575c300000000, 0xdbb9ee1000000000, + 0x72b2675e00000000, 0xdd20a92100000000, 0x742b206f00000000, + 0x8f37bbbc00000000, 0x263c32f200000000, 0x3808fcc000000000, + 0x9103758e00000000, 0x6a1fee5d00000000, 0xc314671300000000, + 0x5677723800000000, 0xff7cfb7600000000, 0x046060a500000000, + 0xad6be9eb00000000, 0xb35f27d900000000, 0x1a54ae9700000000, + 0xe148354400000000, 0x4843bc0a00000000, 0xcb8f1f1200000000, + 0x6284965c00000000, 0x99980d8f00000000, 0x309384c100000000, + 0x2ea74af300000000, 0x87acc3bd00000000, 0x7cb0586e00000000, + 0xd5bbd12000000000, 0x40d8c40b00000000, 0xe9d34d4500000000, + 0x12cfd69600000000, 0xbbc45fd800000000, 0xa5f091ea00000000, + 0x0cfb18a400000000, 0xf7e7837700000000, 0x5eec0a3900000000, + 0xa9c21e8800000000, 0x00c997c600000000, 0xfbd50c1500000000, + 0x52de855b00000000, 0x4cea4b6900000000, 0xe5e1c22700000000, + 0x1efd59f400000000, 0xb7f6d0ba00000000, 0x2295c59100000000, + 0x8b9e4cdf00000000, 0x7082d70c00000000, 0xd9895e4200000000, + 0xc7bd907000000000, 0x6eb6193e00000000, 0x95aa82ed00000000, + 0x3ca10ba300000000, 0xbf6da8bb00000000, 0x166621f500000000, + 0xed7aba2600000000, 0x4471336800000000, 0x5a45fd5a00000000, + 0xf34e741400000000, 0x0852efc700000000, 0xa159668900000000, + 0x343a73a200000000, 0x9d31faec00000000, 0x662d613f00000000, + 0xcf26e87100000000, 0xd112264300000000, 0x7819af0d00000000, + 0x830534de00000000, 0x2a0ebd9000000000, 0x859c73ef00000000, + 0x2c97faa100000000, 0xd78b617200000000, 0x7e80e83c00000000, + 0x60b4260e00000000, 0xc9bfaf4000000000, 0x32a3349300000000, + 0x9ba8bddd00000000, 0x0ecba8f600000000, 0xa7c021b800000000, + 0x5cdcba6b00000000, 0xf5d7332500000000, 0xebe3fd1700000000, + 0x42e8745900000000, 0xb9f4ef8a00000000, 0x10ff66c400000000, + 0x9333c5dc00000000, 0x3a384c9200000000, 0xc124d74100000000, + 0x682f5e0f00000000, 0x761b903d00000000, 0xdf10197300000000, + 0x240c82a000000000, 0x8d070bee00000000, 0x18641ec500000000, + 0xb16f978b00000000, 0x4a730c5800000000, 0xe378851600000000, + 0xfd4c4b2400000000, 0x5447c26a00000000, 0xaf5b59b900000000, + 0x0650d0f700000000}, + {0x0000000000000000, 0x479244af00000000, 0xcf22f88500000000, + 0x88b0bc2a00000000, 0xdf4381d000000000, 0x98d1c57f00000000, + 0x1061795500000000, 0x57f33dfa00000000, 0xff81737a00000000, + 0xb81337d500000000, 0x30a38bff00000000, 0x7731cf5000000000, + 0x20c2f2aa00000000, 0x6750b60500000000, 0xefe00a2f00000000, + 0xa8724e8000000000, 0xfe03e7f400000000, 0xb991a35b00000000, + 0x31211f7100000000, 0x76b35bde00000000, 0x2140662400000000, + 0x66d2228b00000000, 0xee629ea100000000, 0xa9f0da0e00000000, + 0x0182948e00000000, 0x4610d02100000000, 0xcea06c0b00000000, + 0x893228a400000000, 0xdec1155e00000000, 0x995351f100000000, + 0x11e3eddb00000000, 0x5671a97400000000, 0xbd01bf3200000000, + 0xfa93fb9d00000000, 0x722347b700000000, 0x35b1031800000000, + 0x62423ee200000000, 0x25d07a4d00000000, 0xad60c66700000000, + 0xeaf282c800000000, 0x4280cc4800000000, 0x051288e700000000, + 0x8da234cd00000000, 0xca30706200000000, 0x9dc34d9800000000, + 0xda51093700000000, 0x52e1b51d00000000, 0x1573f1b200000000, + 0x430258c600000000, 0x04901c6900000000, 0x8c20a04300000000, + 0xcbb2e4ec00000000, 0x9c41d91600000000, 0xdbd39db900000000, + 0x5363219300000000, 0x14f1653c00000000, 0xbc832bbc00000000, + 0xfb116f1300000000, 0x73a1d33900000000, 0x3433979600000000, + 0x63c0aa6c00000000, 0x2452eec300000000, 0xace252e900000000, + 0xeb70164600000000, 0x7a037e6500000000, 0x3d913aca00000000, + 0xb52186e000000000, 0xf2b3c24f00000000, 0xa540ffb500000000, + 0xe2d2bb1a00000000, 0x6a62073000000000, 0x2df0439f00000000, + 0x85820d1f00000000, 0xc21049b000000000, 0x4aa0f59a00000000, + 0x0d32b13500000000, 0x5ac18ccf00000000, 0x1d53c86000000000, + 0x95e3744a00000000, 0xd27130e500000000, 0x8400999100000000, + 0xc392dd3e00000000, 0x4b22611400000000, 0x0cb025bb00000000, + 0x5b43184100000000, 0x1cd15cee00000000, 0x9461e0c400000000, + 0xd3f3a46b00000000, 0x7b81eaeb00000000, 0x3c13ae4400000000, + 0xb4a3126e00000000, 0xf33156c100000000, 0xa4c26b3b00000000, + 0xe3502f9400000000, 0x6be093be00000000, 0x2c72d71100000000, + 0xc702c15700000000, 0x809085f800000000, 0x082039d200000000, + 0x4fb27d7d00000000, 0x1841408700000000, 0x5fd3042800000000, + 0xd763b80200000000, 0x90f1fcad00000000, 0x3883b22d00000000, + 0x7f11f68200000000, 0xf7a14aa800000000, 0xb0330e0700000000, + 0xe7c033fd00000000, 0xa052775200000000, 0x28e2cb7800000000, + 0x6f708fd700000000, 0x390126a300000000, 0x7e93620c00000000, + 0xf623de2600000000, 0xb1b19a8900000000, 0xe642a77300000000, + 0xa1d0e3dc00000000, 0x29605ff600000000, 0x6ef21b5900000000, + 0xc68055d900000000, 0x8112117600000000, 0x09a2ad5c00000000, + 0x4e30e9f300000000, 0x19c3d40900000000, 0x5e5190a600000000, + 0xd6e12c8c00000000, 0x9173682300000000, 0xf406fcca00000000, + 0xb394b86500000000, 0x3b24044f00000000, 0x7cb640e000000000, + 0x2b457d1a00000000, 0x6cd739b500000000, 0xe467859f00000000, + 0xa3f5c13000000000, 0x0b878fb000000000, 0x4c15cb1f00000000, + 0xc4a5773500000000, 0x8337339a00000000, 0xd4c40e6000000000, + 0x93564acf00000000, 0x1be6f6e500000000, 0x5c74b24a00000000, + 0x0a051b3e00000000, 0x4d975f9100000000, 0xc527e3bb00000000, + 0x82b5a71400000000, 0xd5469aee00000000, 0x92d4de4100000000, + 0x1a64626b00000000, 0x5df626c400000000, 0xf584684400000000, + 0xb2162ceb00000000, 0x3aa690c100000000, 0x7d34d46e00000000, + 0x2ac7e99400000000, 0x6d55ad3b00000000, 0xe5e5111100000000, + 0xa27755be00000000, 0x490743f800000000, 0x0e95075700000000, + 0x8625bb7d00000000, 0xc1b7ffd200000000, 0x9644c22800000000, + 0xd1d6868700000000, 0x59663aad00000000, 0x1ef47e0200000000, + 0xb686308200000000, 0xf114742d00000000, 0x79a4c80700000000, + 0x3e368ca800000000, 0x69c5b15200000000, 0x2e57f5fd00000000, + 0xa6e749d700000000, 0xe1750d7800000000, 0xb704a40c00000000, + 0xf096e0a300000000, 0x78265c8900000000, 0x3fb4182600000000, + 0x684725dc00000000, 0x2fd5617300000000, 0xa765dd5900000000, + 0xe0f799f600000000, 0x4885d77600000000, 0x0f1793d900000000, + 0x87a72ff300000000, 0xc0356b5c00000000, 0x97c656a600000000, + 0xd054120900000000, 0x58e4ae2300000000, 0x1f76ea8c00000000, + 0x8e0582af00000000, 0xc997c60000000000, 0x41277a2a00000000, + 0x06b53e8500000000, 0x5146037f00000000, 0x16d447d000000000, + 0x9e64fbfa00000000, 0xd9f6bf5500000000, 0x7184f1d500000000, + 0x3616b57a00000000, 0xbea6095000000000, 0xf9344dff00000000, + 0xaec7700500000000, 0xe95534aa00000000, 0x61e5888000000000, + 0x2677cc2f00000000, 0x7006655b00000000, 0x379421f400000000, + 0xbf249dde00000000, 0xf8b6d97100000000, 0xaf45e48b00000000, + 0xe8d7a02400000000, 0x60671c0e00000000, 0x27f558a100000000, + 0x8f87162100000000, 0xc815528e00000000, 0x40a5eea400000000, + 0x0737aa0b00000000, 0x50c497f100000000, 0x1756d35e00000000, + 0x9fe66f7400000000, 0xd8742bdb00000000, 0x33043d9d00000000, + 0x7496793200000000, 0xfc26c51800000000, 0xbbb481b700000000, + 0xec47bc4d00000000, 0xabd5f8e200000000, 0x236544c800000000, + 0x64f7006700000000, 0xcc854ee700000000, 0x8b170a4800000000, + 0x03a7b66200000000, 0x4435f2cd00000000, 0x13c6cf3700000000, + 0x54548b9800000000, 0xdce437b200000000, 0x9b76731d00000000, + 0xcd07da6900000000, 0x8a959ec600000000, 0x022522ec00000000, + 0x45b7664300000000, 0x12445bb900000000, 0x55d61f1600000000, + 0xdd66a33c00000000, 0x9af4e79300000000, 0x3286a91300000000, + 0x7514edbc00000000, 0xfda4519600000000, 0xba36153900000000, + 0xedc528c300000000, 0xaa576c6c00000000, 0x22e7d04600000000, + 0x657594e900000000}}; + +#else /* W == 4 */ + +local const z_crc_t FAR crc_braid_table[][256] = { + {0x00000000, 0x65673b46, 0xcace768c, 0xafa94dca, 0x4eedeb59, + 0x2b8ad01f, 0x84239dd5, 0xe144a693, 0x9ddbd6b2, 0xf8bcedf4, + 0x5715a03e, 0x32729b78, 0xd3363deb, 0xb65106ad, 0x19f84b67, + 0x7c9f7021, 0xe0c6ab25, 0x85a19063, 0x2a08dda9, 0x4f6fe6ef, + 0xae2b407c, 0xcb4c7b3a, 0x64e536f0, 0x01820db6, 0x7d1d7d97, + 0x187a46d1, 0xb7d30b1b, 0xd2b4305d, 0x33f096ce, 0x5697ad88, + 0xf93ee042, 0x9c59db04, 0x1afc500b, 0x7f9b6b4d, 0xd0322687, + 0xb5551dc1, 0x5411bb52, 0x31768014, 0x9edfcdde, 0xfbb8f698, + 0x872786b9, 0xe240bdff, 0x4de9f035, 0x288ecb73, 0xc9ca6de0, + 0xacad56a6, 0x03041b6c, 0x6663202a, 0xfa3afb2e, 0x9f5dc068, + 0x30f48da2, 0x5593b6e4, 0xb4d71077, 0xd1b02b31, 0x7e1966fb, + 0x1b7e5dbd, 0x67e12d9c, 0x028616da, 0xad2f5b10, 0xc8486056, + 0x290cc6c5, 0x4c6bfd83, 0xe3c2b049, 0x86a58b0f, 0x35f8a016, + 0x509f9b50, 0xff36d69a, 0x9a51eddc, 0x7b154b4f, 0x1e727009, + 0xb1db3dc3, 0xd4bc0685, 0xa82376a4, 0xcd444de2, 0x62ed0028, + 0x078a3b6e, 0xe6ce9dfd, 0x83a9a6bb, 0x2c00eb71, 0x4967d037, + 0xd53e0b33, 0xb0593075, 0x1ff07dbf, 0x7a9746f9, 0x9bd3e06a, + 0xfeb4db2c, 0x511d96e6, 0x347aada0, 0x48e5dd81, 0x2d82e6c7, + 0x822bab0d, 0xe74c904b, 0x060836d8, 0x636f0d9e, 0xccc64054, + 0xa9a17b12, 0x2f04f01d, 0x4a63cb5b, 0xe5ca8691, 0x80adbdd7, + 0x61e91b44, 0x048e2002, 0xab276dc8, 0xce40568e, 0xb2df26af, + 0xd7b81de9, 0x78115023, 0x1d766b65, 0xfc32cdf6, 0x9955f6b0, + 0x36fcbb7a, 0x539b803c, 0xcfc25b38, 0xaaa5607e, 0x050c2db4, + 0x606b16f2, 0x812fb061, 0xe4488b27, 0x4be1c6ed, 0x2e86fdab, + 0x52198d8a, 0x377eb6cc, 0x98d7fb06, 0xfdb0c040, 0x1cf466d3, + 0x79935d95, 0xd63a105f, 0xb35d2b19, 0x6bf1402c, 0x0e967b6a, + 0xa13f36a0, 0xc4580de6, 0x251cab75, 0x407b9033, 0xefd2ddf9, + 0x8ab5e6bf, 0xf62a969e, 0x934dadd8, 0x3ce4e012, 0x5983db54, + 0xb8c77dc7, 0xdda04681, 0x72090b4b, 0x176e300d, 0x8b37eb09, + 0xee50d04f, 0x41f99d85, 0x249ea6c3, 0xc5da0050, 0xa0bd3b16, + 0x0f1476dc, 0x6a734d9a, 0x16ec3dbb, 0x738b06fd, 0xdc224b37, + 0xb9457071, 0x5801d6e2, 0x3d66eda4, 0x92cfa06e, 0xf7a89b28, + 0x710d1027, 0x146a2b61, 0xbbc366ab, 0xdea45ded, 0x3fe0fb7e, + 0x5a87c038, 0xf52e8df2, 0x9049b6b4, 0xecd6c695, 0x89b1fdd3, + 0x2618b019, 0x437f8b5f, 0xa23b2dcc, 0xc75c168a, 0x68f55b40, + 0x0d926006, 0x91cbbb02, 0xf4ac8044, 0x5b05cd8e, 0x3e62f6c8, + 0xdf26505b, 0xba416b1d, 0x15e826d7, 0x708f1d91, 0x0c106db0, + 0x697756f6, 0xc6de1b3c, 0xa3b9207a, 0x42fd86e9, 0x279abdaf, + 0x8833f065, 0xed54cb23, 0x5e09e03a, 0x3b6edb7c, 0x94c796b6, + 0xf1a0adf0, 0x10e40b63, 0x75833025, 0xda2a7def, 0xbf4d46a9, + 0xc3d23688, 0xa6b50dce, 0x091c4004, 0x6c7b7b42, 0x8d3fddd1, + 0xe858e697, 0x47f1ab5d, 0x2296901b, 0xbecf4b1f, 0xdba87059, + 0x74013d93, 0x116606d5, 0xf022a046, 0x95459b00, 0x3aecd6ca, + 0x5f8bed8c, 0x23149dad, 0x4673a6eb, 0xe9daeb21, 0x8cbdd067, + 0x6df976f4, 0x089e4db2, 0xa7370078, 0xc2503b3e, 0x44f5b031, + 0x21928b77, 0x8e3bc6bd, 0xeb5cfdfb, 0x0a185b68, 0x6f7f602e, + 0xc0d62de4, 0xa5b116a2, 0xd92e6683, 0xbc495dc5, 0x13e0100f, + 0x76872b49, 0x97c38dda, 0xf2a4b69c, 0x5d0dfb56, 0x386ac010, + 0xa4331b14, 0xc1542052, 0x6efd6d98, 0x0b9a56de, 0xeadef04d, + 0x8fb9cb0b, 0x201086c1, 0x4577bd87, 0x39e8cda6, 0x5c8ff6e0, + 0xf326bb2a, 0x9641806c, 0x770526ff, 0x12621db9, 0xbdcb5073, + 0xd8ac6b35}, + {0x00000000, 0xd7e28058, 0x74b406f1, 0xa35686a9, 0xe9680de2, + 0x3e8a8dba, 0x9ddc0b13, 0x4a3e8b4b, 0x09a11d85, 0xde439ddd, + 0x7d151b74, 0xaaf79b2c, 0xe0c91067, 0x372b903f, 0x947d1696, + 0x439f96ce, 0x13423b0a, 0xc4a0bb52, 0x67f63dfb, 0xb014bda3, + 0xfa2a36e8, 0x2dc8b6b0, 0x8e9e3019, 0x597cb041, 0x1ae3268f, + 0xcd01a6d7, 0x6e57207e, 0xb9b5a026, 0xf38b2b6d, 0x2469ab35, + 0x873f2d9c, 0x50ddadc4, 0x26847614, 0xf166f64c, 0x523070e5, + 0x85d2f0bd, 0xcfec7bf6, 0x180efbae, 0xbb587d07, 0x6cbafd5f, + 0x2f256b91, 0xf8c7ebc9, 0x5b916d60, 0x8c73ed38, 0xc64d6673, + 0x11afe62b, 0xb2f96082, 0x651be0da, 0x35c64d1e, 0xe224cd46, + 0x41724bef, 0x9690cbb7, 0xdcae40fc, 0x0b4cc0a4, 0xa81a460d, + 0x7ff8c655, 0x3c67509b, 0xeb85d0c3, 0x48d3566a, 0x9f31d632, + 0xd50f5d79, 0x02eddd21, 0xa1bb5b88, 0x7659dbd0, 0x4d08ec28, + 0x9aea6c70, 0x39bcead9, 0xee5e6a81, 0xa460e1ca, 0x73826192, + 0xd0d4e73b, 0x07366763, 0x44a9f1ad, 0x934b71f5, 0x301df75c, + 0xe7ff7704, 0xadc1fc4f, 0x7a237c17, 0xd975fabe, 0x0e977ae6, + 0x5e4ad722, 0x89a8577a, 0x2afed1d3, 0xfd1c518b, 0xb722dac0, + 0x60c05a98, 0xc396dc31, 0x14745c69, 0x57ebcaa7, 0x80094aff, + 0x235fcc56, 0xf4bd4c0e, 0xbe83c745, 0x6961471d, 0xca37c1b4, + 0x1dd541ec, 0x6b8c9a3c, 0xbc6e1a64, 0x1f389ccd, 0xc8da1c95, + 0x82e497de, 0x55061786, 0xf650912f, 0x21b21177, 0x622d87b9, + 0xb5cf07e1, 0x16998148, 0xc17b0110, 0x8b458a5b, 0x5ca70a03, + 0xfff18caa, 0x28130cf2, 0x78cea136, 0xaf2c216e, 0x0c7aa7c7, + 0xdb98279f, 0x91a6acd4, 0x46442c8c, 0xe512aa25, 0x32f02a7d, + 0x716fbcb3, 0xa68d3ceb, 0x05dbba42, 0xd2393a1a, 0x9807b151, + 0x4fe53109, 0xecb3b7a0, 0x3b5137f8, 0x9a11d850, 0x4df35808, + 0xeea5dea1, 0x39475ef9, 0x7379d5b2, 0xa49b55ea, 0x07cdd343, + 0xd02f531b, 0x93b0c5d5, 0x4452458d, 0xe704c324, 0x30e6437c, + 0x7ad8c837, 0xad3a486f, 0x0e6ccec6, 0xd98e4e9e, 0x8953e35a, + 0x5eb16302, 0xfde7e5ab, 0x2a0565f3, 0x603beeb8, 0xb7d96ee0, + 0x148fe849, 0xc36d6811, 0x80f2fedf, 0x57107e87, 0xf446f82e, + 0x23a47876, 0x699af33d, 0xbe787365, 0x1d2ef5cc, 0xcacc7594, + 0xbc95ae44, 0x6b772e1c, 0xc821a8b5, 0x1fc328ed, 0x55fda3a6, + 0x821f23fe, 0x2149a557, 0xf6ab250f, 0xb534b3c1, 0x62d63399, + 0xc180b530, 0x16623568, 0x5c5cbe23, 0x8bbe3e7b, 0x28e8b8d2, + 0xff0a388a, 0xafd7954e, 0x78351516, 0xdb6393bf, 0x0c8113e7, + 0x46bf98ac, 0x915d18f4, 0x320b9e5d, 0xe5e91e05, 0xa67688cb, + 0x71940893, 0xd2c28e3a, 0x05200e62, 0x4f1e8529, 0x98fc0571, + 0x3baa83d8, 0xec480380, 0xd7193478, 0x00fbb420, 0xa3ad3289, + 0x744fb2d1, 0x3e71399a, 0xe993b9c2, 0x4ac53f6b, 0x9d27bf33, + 0xdeb829fd, 0x095aa9a5, 0xaa0c2f0c, 0x7deeaf54, 0x37d0241f, + 0xe032a447, 0x436422ee, 0x9486a2b6, 0xc45b0f72, 0x13b98f2a, + 0xb0ef0983, 0x670d89db, 0x2d330290, 0xfad182c8, 0x59870461, + 0x8e658439, 0xcdfa12f7, 0x1a1892af, 0xb94e1406, 0x6eac945e, + 0x24921f15, 0xf3709f4d, 0x502619e4, 0x87c499bc, 0xf19d426c, + 0x267fc234, 0x8529449d, 0x52cbc4c5, 0x18f54f8e, 0xcf17cfd6, + 0x6c41497f, 0xbba3c927, 0xf83c5fe9, 0x2fdedfb1, 0x8c885918, + 0x5b6ad940, 0x1154520b, 0xc6b6d253, 0x65e054fa, 0xb202d4a2, + 0xe2df7966, 0x353df93e, 0x966b7f97, 0x4189ffcf, 0x0bb77484, + 0xdc55f4dc, 0x7f037275, 0xa8e1f22d, 0xeb7e64e3, 0x3c9ce4bb, + 0x9fca6212, 0x4828e24a, 0x02166901, 0xd5f4e959, 0x76a26ff0, + 0xa140efa8}, + {0x00000000, 0xef52b6e1, 0x05d46b83, 0xea86dd62, 0x0ba8d706, + 0xe4fa61e7, 0x0e7cbc85, 0xe12e0a64, 0x1751ae0c, 0xf80318ed, + 0x1285c58f, 0xfdd7736e, 0x1cf9790a, 0xf3abcfeb, 0x192d1289, + 0xf67fa468, 0x2ea35c18, 0xc1f1eaf9, 0x2b77379b, 0xc425817a, + 0x250b8b1e, 0xca593dff, 0x20dfe09d, 0xcf8d567c, 0x39f2f214, + 0xd6a044f5, 0x3c269997, 0xd3742f76, 0x325a2512, 0xdd0893f3, + 0x378e4e91, 0xd8dcf870, 0x5d46b830, 0xb2140ed1, 0x5892d3b3, + 0xb7c06552, 0x56ee6f36, 0xb9bcd9d7, 0x533a04b5, 0xbc68b254, + 0x4a17163c, 0xa545a0dd, 0x4fc37dbf, 0xa091cb5e, 0x41bfc13a, + 0xaeed77db, 0x446baab9, 0xab391c58, 0x73e5e428, 0x9cb752c9, + 0x76318fab, 0x9963394a, 0x784d332e, 0x971f85cf, 0x7d9958ad, + 0x92cbee4c, 0x64b44a24, 0x8be6fcc5, 0x616021a7, 0x8e329746, + 0x6f1c9d22, 0x804e2bc3, 0x6ac8f6a1, 0x859a4040, 0xba8d7060, + 0x55dfc681, 0xbf591be3, 0x500bad02, 0xb125a766, 0x5e771187, + 0xb4f1cce5, 0x5ba37a04, 0xaddcde6c, 0x428e688d, 0xa808b5ef, + 0x475a030e, 0xa674096a, 0x4926bf8b, 0xa3a062e9, 0x4cf2d408, + 0x942e2c78, 0x7b7c9a99, 0x91fa47fb, 0x7ea8f11a, 0x9f86fb7e, + 0x70d44d9f, 0x9a5290fd, 0x7500261c, 0x837f8274, 0x6c2d3495, + 0x86abe9f7, 0x69f95f16, 0x88d75572, 0x6785e393, 0x8d033ef1, + 0x62518810, 0xe7cbc850, 0x08997eb1, 0xe21fa3d3, 0x0d4d1532, + 0xec631f56, 0x0331a9b7, 0xe9b774d5, 0x06e5c234, 0xf09a665c, + 0x1fc8d0bd, 0xf54e0ddf, 0x1a1cbb3e, 0xfb32b15a, 0x146007bb, + 0xfee6dad9, 0x11b46c38, 0xc9689448, 0x263a22a9, 0xccbcffcb, + 0x23ee492a, 0xc2c0434e, 0x2d92f5af, 0xc71428cd, 0x28469e2c, + 0xde393a44, 0x316b8ca5, 0xdbed51c7, 0x34bfe726, 0xd591ed42, + 0x3ac35ba3, 0xd04586c1, 0x3f173020, 0xae6be681, 0x41395060, + 0xabbf8d02, 0x44ed3be3, 0xa5c33187, 0x4a918766, 0xa0175a04, + 0x4f45ece5, 0xb93a488d, 0x5668fe6c, 0xbcee230e, 0x53bc95ef, + 0xb2929f8b, 0x5dc0296a, 0xb746f408, 0x581442e9, 0x80c8ba99, + 0x6f9a0c78, 0x851cd11a, 0x6a4e67fb, 0x8b606d9f, 0x6432db7e, + 0x8eb4061c, 0x61e6b0fd, 0x97991495, 0x78cba274, 0x924d7f16, + 0x7d1fc9f7, 0x9c31c393, 0x73637572, 0x99e5a810, 0x76b71ef1, + 0xf32d5eb1, 0x1c7fe850, 0xf6f93532, 0x19ab83d3, 0xf88589b7, + 0x17d73f56, 0xfd51e234, 0x120354d5, 0xe47cf0bd, 0x0b2e465c, + 0xe1a89b3e, 0x0efa2ddf, 0xefd427bb, 0x0086915a, 0xea004c38, + 0x0552fad9, 0xdd8e02a9, 0x32dcb448, 0xd85a692a, 0x3708dfcb, + 0xd626d5af, 0x3974634e, 0xd3f2be2c, 0x3ca008cd, 0xcadfaca5, + 0x258d1a44, 0xcf0bc726, 0x205971c7, 0xc1777ba3, 0x2e25cd42, + 0xc4a31020, 0x2bf1a6c1, 0x14e696e1, 0xfbb42000, 0x1132fd62, + 0xfe604b83, 0x1f4e41e7, 0xf01cf706, 0x1a9a2a64, 0xf5c89c85, + 0x03b738ed, 0xece58e0c, 0x0663536e, 0xe931e58f, 0x081fefeb, + 0xe74d590a, 0x0dcb8468, 0xe2993289, 0x3a45caf9, 0xd5177c18, + 0x3f91a17a, 0xd0c3179b, 0x31ed1dff, 0xdebfab1e, 0x3439767c, + 0xdb6bc09d, 0x2d1464f5, 0xc246d214, 0x28c00f76, 0xc792b997, + 0x26bcb3f3, 0xc9ee0512, 0x2368d870, 0xcc3a6e91, 0x49a02ed1, + 0xa6f29830, 0x4c744552, 0xa326f3b3, 0x4208f9d7, 0xad5a4f36, + 0x47dc9254, 0xa88e24b5, 0x5ef180dd, 0xb1a3363c, 0x5b25eb5e, + 0xb4775dbf, 0x555957db, 0xba0be13a, 0x508d3c58, 0xbfdf8ab9, + 0x670372c9, 0x8851c428, 0x62d7194a, 0x8d85afab, 0x6caba5cf, + 0x83f9132e, 0x697fce4c, 0x862d78ad, 0x7052dcc5, 0x9f006a24, + 0x7586b746, 0x9ad401a7, 0x7bfa0bc3, 0x94a8bd22, 0x7e2e6040, + 0x917cd6a1}, + {0x00000000, 0x87a6cb43, 0xd43c90c7, 0x539a5b84, 0x730827cf, + 0xf4aeec8c, 0xa734b708, 0x20927c4b, 0xe6104f9e, 0x61b684dd, + 0x322cdf59, 0xb58a141a, 0x95186851, 0x12bea312, 0x4124f896, + 0xc68233d5, 0x1751997d, 0x90f7523e, 0xc36d09ba, 0x44cbc2f9, + 0x6459beb2, 0xe3ff75f1, 0xb0652e75, 0x37c3e536, 0xf141d6e3, + 0x76e71da0, 0x257d4624, 0xa2db8d67, 0x8249f12c, 0x05ef3a6f, + 0x567561eb, 0xd1d3aaa8, 0x2ea332fa, 0xa905f9b9, 0xfa9fa23d, + 0x7d39697e, 0x5dab1535, 0xda0dde76, 0x899785f2, 0x0e314eb1, + 0xc8b37d64, 0x4f15b627, 0x1c8feda3, 0x9b2926e0, 0xbbbb5aab, + 0x3c1d91e8, 0x6f87ca6c, 0xe821012f, 0x39f2ab87, 0xbe5460c4, + 0xedce3b40, 0x6a68f003, 0x4afa8c48, 0xcd5c470b, 0x9ec61c8f, + 0x1960d7cc, 0xdfe2e419, 0x58442f5a, 0x0bde74de, 0x8c78bf9d, + 0xaceac3d6, 0x2b4c0895, 0x78d65311, 0xff709852, 0x5d4665f4, + 0xdae0aeb7, 0x897af533, 0x0edc3e70, 0x2e4e423b, 0xa9e88978, + 0xfa72d2fc, 0x7dd419bf, 0xbb562a6a, 0x3cf0e129, 0x6f6abaad, + 0xe8cc71ee, 0xc85e0da5, 0x4ff8c6e6, 0x1c629d62, 0x9bc45621, + 0x4a17fc89, 0xcdb137ca, 0x9e2b6c4e, 0x198da70d, 0x391fdb46, + 0xbeb91005, 0xed234b81, 0x6a8580c2, 0xac07b317, 0x2ba17854, + 0x783b23d0, 0xff9de893, 0xdf0f94d8, 0x58a95f9b, 0x0b33041f, + 0x8c95cf5c, 0x73e5570e, 0xf4439c4d, 0xa7d9c7c9, 0x207f0c8a, + 0x00ed70c1, 0x874bbb82, 0xd4d1e006, 0x53772b45, 0x95f51890, + 0x1253d3d3, 0x41c98857, 0xc66f4314, 0xe6fd3f5f, 0x615bf41c, + 0x32c1af98, 0xb56764db, 0x64b4ce73, 0xe3120530, 0xb0885eb4, + 0x372e95f7, 0x17bce9bc, 0x901a22ff, 0xc380797b, 0x4426b238, + 0x82a481ed, 0x05024aae, 0x5698112a, 0xd13eda69, 0xf1aca622, + 0x760a6d61, 0x259036e5, 0xa236fda6, 0xba8ccbe8, 0x3d2a00ab, + 0x6eb05b2f, 0xe916906c, 0xc984ec27, 0x4e222764, 0x1db87ce0, + 0x9a1eb7a3, 0x5c9c8476, 0xdb3a4f35, 0x88a014b1, 0x0f06dff2, + 0x2f94a3b9, 0xa83268fa, 0xfba8337e, 0x7c0ef83d, 0xaddd5295, + 0x2a7b99d6, 0x79e1c252, 0xfe470911, 0xded5755a, 0x5973be19, + 0x0ae9e59d, 0x8d4f2ede, 0x4bcd1d0b, 0xcc6bd648, 0x9ff18dcc, + 0x1857468f, 0x38c53ac4, 0xbf63f187, 0xecf9aa03, 0x6b5f6140, + 0x942ff912, 0x13893251, 0x401369d5, 0xc7b5a296, 0xe727dedd, + 0x6081159e, 0x331b4e1a, 0xb4bd8559, 0x723fb68c, 0xf5997dcf, + 0xa603264b, 0x21a5ed08, 0x01379143, 0x86915a00, 0xd50b0184, + 0x52adcac7, 0x837e606f, 0x04d8ab2c, 0x5742f0a8, 0xd0e43beb, + 0xf07647a0, 0x77d08ce3, 0x244ad767, 0xa3ec1c24, 0x656e2ff1, + 0xe2c8e4b2, 0xb152bf36, 0x36f47475, 0x1666083e, 0x91c0c37d, + 0xc25a98f9, 0x45fc53ba, 0xe7caae1c, 0x606c655f, 0x33f63edb, + 0xb450f598, 0x94c289d3, 0x13644290, 0x40fe1914, 0xc758d257, + 0x01dae182, 0x867c2ac1, 0xd5e67145, 0x5240ba06, 0x72d2c64d, + 0xf5740d0e, 0xa6ee568a, 0x21489dc9, 0xf09b3761, 0x773dfc22, + 0x24a7a7a6, 0xa3016ce5, 0x839310ae, 0x0435dbed, 0x57af8069, + 0xd0094b2a, 0x168b78ff, 0x912db3bc, 0xc2b7e838, 0x4511237b, + 0x65835f30, 0xe2259473, 0xb1bfcff7, 0x361904b4, 0xc9699ce6, + 0x4ecf57a5, 0x1d550c21, 0x9af3c762, 0xba61bb29, 0x3dc7706a, + 0x6e5d2bee, 0xe9fbe0ad, 0x2f79d378, 0xa8df183b, 0xfb4543bf, + 0x7ce388fc, 0x5c71f4b7, 0xdbd73ff4, 0x884d6470, 0x0febaf33, + 0xde38059b, 0x599eced8, 0x0a04955c, 0x8da25e1f, 0xad302254, + 0x2a96e917, 0x790cb293, 0xfeaa79d0, 0x38284a05, 0xbf8e8146, + 0xec14dac2, 0x6bb21181, 0x4b206dca, 0xcc86a689, 0x9f1cfd0d, + 0x18ba364e}}; + +local const z_word_t FAR crc_braid_big_table[][256] = { + {0x00000000, 0x43cba687, 0xc7903cd4, 0x845b9a53, 0xcf270873, + 0x8cecaef4, 0x08b734a7, 0x4b7c9220, 0x9e4f10e6, 0xdd84b661, + 0x59df2c32, 0x1a148ab5, 0x51681895, 0x12a3be12, 0x96f82441, + 0xd53382c6, 0x7d995117, 0x3e52f790, 0xba096dc3, 0xf9c2cb44, + 0xb2be5964, 0xf175ffe3, 0x752e65b0, 0x36e5c337, 0xe3d641f1, + 0xa01de776, 0x24467d25, 0x678ddba2, 0x2cf14982, 0x6f3aef05, + 0xeb617556, 0xa8aad3d1, 0xfa32a32e, 0xb9f905a9, 0x3da29ffa, + 0x7e69397d, 0x3515ab5d, 0x76de0dda, 0xf2859789, 0xb14e310e, + 0x647db3c8, 0x27b6154f, 0xa3ed8f1c, 0xe026299b, 0xab5abbbb, + 0xe8911d3c, 0x6cca876f, 0x2f0121e8, 0x87abf239, 0xc46054be, + 0x403bceed, 0x03f0686a, 0x488cfa4a, 0x0b475ccd, 0x8f1cc69e, + 0xccd76019, 0x19e4e2df, 0x5a2f4458, 0xde74de0b, 0x9dbf788c, + 0xd6c3eaac, 0x95084c2b, 0x1153d678, 0x529870ff, 0xf465465d, + 0xb7aee0da, 0x33f57a89, 0x703edc0e, 0x3b424e2e, 0x7889e8a9, + 0xfcd272fa, 0xbf19d47d, 0x6a2a56bb, 0x29e1f03c, 0xadba6a6f, + 0xee71cce8, 0xa50d5ec8, 0xe6c6f84f, 0x629d621c, 0x2156c49b, + 0x89fc174a, 0xca37b1cd, 0x4e6c2b9e, 0x0da78d19, 0x46db1f39, + 0x0510b9be, 0x814b23ed, 0xc280856a, 0x17b307ac, 0x5478a12b, + 0xd0233b78, 0x93e89dff, 0xd8940fdf, 0x9b5fa958, 0x1f04330b, + 0x5ccf958c, 0x0e57e573, 0x4d9c43f4, 0xc9c7d9a7, 0x8a0c7f20, + 0xc170ed00, 0x82bb4b87, 0x06e0d1d4, 0x452b7753, 0x9018f595, + 0xd3d35312, 0x5788c941, 0x14436fc6, 0x5f3ffde6, 0x1cf45b61, + 0x98afc132, 0xdb6467b5, 0x73ceb464, 0x300512e3, 0xb45e88b0, + 0xf7952e37, 0xbce9bc17, 0xff221a90, 0x7b7980c3, 0x38b22644, + 0xed81a482, 0xae4a0205, 0x2a119856, 0x69da3ed1, 0x22a6acf1, + 0x616d0a76, 0xe5369025, 0xa6fd36a2, 0xe8cb8cba, 0xab002a3d, + 0x2f5bb06e, 0x6c9016e9, 0x27ec84c9, 0x6427224e, 0xe07cb81d, + 0xa3b71e9a, 0x76849c5c, 0x354f3adb, 0xb114a088, 0xf2df060f, + 0xb9a3942f, 0xfa6832a8, 0x7e33a8fb, 0x3df80e7c, 0x9552ddad, + 0xd6997b2a, 0x52c2e179, 0x110947fe, 0x5a75d5de, 0x19be7359, + 0x9de5e90a, 0xde2e4f8d, 0x0b1dcd4b, 0x48d66bcc, 0xcc8df19f, + 0x8f465718, 0xc43ac538, 0x87f163bf, 0x03aaf9ec, 0x40615f6b, + 0x12f92f94, 0x51328913, 0xd5691340, 0x96a2b5c7, 0xddde27e7, + 0x9e158160, 0x1a4e1b33, 0x5985bdb4, 0x8cb63f72, 0xcf7d99f5, + 0x4b2603a6, 0x08eda521, 0x43913701, 0x005a9186, 0x84010bd5, + 0xc7caad52, 0x6f607e83, 0x2cabd804, 0xa8f04257, 0xeb3be4d0, + 0xa04776f0, 0xe38cd077, 0x67d74a24, 0x241ceca3, 0xf12f6e65, + 0xb2e4c8e2, 0x36bf52b1, 0x7574f436, 0x3e086616, 0x7dc3c091, + 0xf9985ac2, 0xba53fc45, 0x1caecae7, 0x5f656c60, 0xdb3ef633, + 0x98f550b4, 0xd389c294, 0x90426413, 0x1419fe40, 0x57d258c7, + 0x82e1da01, 0xc12a7c86, 0x4571e6d5, 0x06ba4052, 0x4dc6d272, + 0x0e0d74f5, 0x8a56eea6, 0xc99d4821, 0x61379bf0, 0x22fc3d77, + 0xa6a7a724, 0xe56c01a3, 0xae109383, 0xeddb3504, 0x6980af57, + 0x2a4b09d0, 0xff788b16, 0xbcb32d91, 0x38e8b7c2, 0x7b231145, + 0x305f8365, 0x739425e2, 0xf7cfbfb1, 0xb4041936, 0xe69c69c9, + 0xa557cf4e, 0x210c551d, 0x62c7f39a, 0x29bb61ba, 0x6a70c73d, + 0xee2b5d6e, 0xade0fbe9, 0x78d3792f, 0x3b18dfa8, 0xbf4345fb, + 0xfc88e37c, 0xb7f4715c, 0xf43fd7db, 0x70644d88, 0x33afeb0f, + 0x9b0538de, 0xd8ce9e59, 0x5c95040a, 0x1f5ea28d, 0x542230ad, + 0x17e9962a, 0x93b20c79, 0xd079aafe, 0x054a2838, 0x46818ebf, + 0xc2da14ec, 0x8111b26b, 0xca6d204b, 0x89a686cc, 0x0dfd1c9f, + 0x4e36ba18}, + {0x00000000, 0xe1b652ef, 0x836bd405, 0x62dd86ea, 0x06d7a80b, + 0xe761fae4, 0x85bc7c0e, 0x640a2ee1, 0x0cae5117, 0xed1803f8, + 0x8fc58512, 0x6e73d7fd, 0x0a79f91c, 0xebcfabf3, 0x89122d19, + 0x68a47ff6, 0x185ca32e, 0xf9eaf1c1, 0x9b37772b, 0x7a8125c4, + 0x1e8b0b25, 0xff3d59ca, 0x9de0df20, 0x7c568dcf, 0x14f2f239, + 0xf544a0d6, 0x9799263c, 0x762f74d3, 0x12255a32, 0xf39308dd, + 0x914e8e37, 0x70f8dcd8, 0x30b8465d, 0xd10e14b2, 0xb3d39258, + 0x5265c0b7, 0x366fee56, 0xd7d9bcb9, 0xb5043a53, 0x54b268bc, + 0x3c16174a, 0xdda045a5, 0xbf7dc34f, 0x5ecb91a0, 0x3ac1bf41, + 0xdb77edae, 0xb9aa6b44, 0x581c39ab, 0x28e4e573, 0xc952b79c, + 0xab8f3176, 0x4a396399, 0x2e334d78, 0xcf851f97, 0xad58997d, + 0x4ceecb92, 0x244ab464, 0xc5fce68b, 0xa7216061, 0x4697328e, + 0x229d1c6f, 0xc32b4e80, 0xa1f6c86a, 0x40409a85, 0x60708dba, + 0x81c6df55, 0xe31b59bf, 0x02ad0b50, 0x66a725b1, 0x8711775e, + 0xe5ccf1b4, 0x047aa35b, 0x6cdedcad, 0x8d688e42, 0xefb508a8, + 0x0e035a47, 0x6a0974a6, 0x8bbf2649, 0xe962a0a3, 0x08d4f24c, + 0x782c2e94, 0x999a7c7b, 0xfb47fa91, 0x1af1a87e, 0x7efb869f, + 0x9f4dd470, 0xfd90529a, 0x1c260075, 0x74827f83, 0x95342d6c, + 0xf7e9ab86, 0x165ff969, 0x7255d788, 0x93e38567, 0xf13e038d, + 0x10885162, 0x50c8cbe7, 0xb17e9908, 0xd3a31fe2, 0x32154d0d, + 0x561f63ec, 0xb7a93103, 0xd574b7e9, 0x34c2e506, 0x5c669af0, + 0xbdd0c81f, 0xdf0d4ef5, 0x3ebb1c1a, 0x5ab132fb, 0xbb076014, + 0xd9dae6fe, 0x386cb411, 0x489468c9, 0xa9223a26, 0xcbffbccc, + 0x2a49ee23, 0x4e43c0c2, 0xaff5922d, 0xcd2814c7, 0x2c9e4628, + 0x443a39de, 0xa58c6b31, 0xc751eddb, 0x26e7bf34, 0x42ed91d5, + 0xa35bc33a, 0xc18645d0, 0x2030173f, 0x81e66bae, 0x60503941, + 0x028dbfab, 0xe33bed44, 0x8731c3a5, 0x6687914a, 0x045a17a0, + 0xe5ec454f, 0x8d483ab9, 0x6cfe6856, 0x0e23eebc, 0xef95bc53, + 0x8b9f92b2, 0x6a29c05d, 0x08f446b7, 0xe9421458, 0x99bac880, + 0x780c9a6f, 0x1ad11c85, 0xfb674e6a, 0x9f6d608b, 0x7edb3264, + 0x1c06b48e, 0xfdb0e661, 0x95149997, 0x74a2cb78, 0x167f4d92, + 0xf7c91f7d, 0x93c3319c, 0x72756373, 0x10a8e599, 0xf11eb776, + 0xb15e2df3, 0x50e87f1c, 0x3235f9f6, 0xd383ab19, 0xb78985f8, + 0x563fd717, 0x34e251fd, 0xd5540312, 0xbdf07ce4, 0x5c462e0b, + 0x3e9ba8e1, 0xdf2dfa0e, 0xbb27d4ef, 0x5a918600, 0x384c00ea, + 0xd9fa5205, 0xa9028edd, 0x48b4dc32, 0x2a695ad8, 0xcbdf0837, + 0xafd526d6, 0x4e637439, 0x2cbef2d3, 0xcd08a03c, 0xa5acdfca, + 0x441a8d25, 0x26c70bcf, 0xc7715920, 0xa37b77c1, 0x42cd252e, + 0x2010a3c4, 0xc1a6f12b, 0xe196e614, 0x0020b4fb, 0x62fd3211, + 0x834b60fe, 0xe7414e1f, 0x06f71cf0, 0x642a9a1a, 0x859cc8f5, + 0xed38b703, 0x0c8ee5ec, 0x6e536306, 0x8fe531e9, 0xebef1f08, + 0x0a594de7, 0x6884cb0d, 0x893299e2, 0xf9ca453a, 0x187c17d5, + 0x7aa1913f, 0x9b17c3d0, 0xff1ded31, 0x1eabbfde, 0x7c763934, + 0x9dc06bdb, 0xf564142d, 0x14d246c2, 0x760fc028, 0x97b992c7, + 0xf3b3bc26, 0x1205eec9, 0x70d86823, 0x916e3acc, 0xd12ea049, + 0x3098f2a6, 0x5245744c, 0xb3f326a3, 0xd7f90842, 0x364f5aad, + 0x5492dc47, 0xb5248ea8, 0xdd80f15e, 0x3c36a3b1, 0x5eeb255b, + 0xbf5d77b4, 0xdb575955, 0x3ae10bba, 0x583c8d50, 0xb98adfbf, + 0xc9720367, 0x28c45188, 0x4a19d762, 0xabaf858d, 0xcfa5ab6c, + 0x2e13f983, 0x4cce7f69, 0xad782d86, 0xc5dc5270, 0x246a009f, + 0x46b78675, 0xa701d49a, 0xc30bfa7b, 0x22bda894, 0x40602e7e, + 0xa1d67c91}, + {0x00000000, 0x5880e2d7, 0xf106b474, 0xa98656a3, 0xe20d68e9, + 0xba8d8a3e, 0x130bdc9d, 0x4b8b3e4a, 0x851da109, 0xdd9d43de, + 0x741b157d, 0x2c9bf7aa, 0x6710c9e0, 0x3f902b37, 0x96167d94, + 0xce969f43, 0x0a3b4213, 0x52bba0c4, 0xfb3df667, 0xa3bd14b0, + 0xe8362afa, 0xb0b6c82d, 0x19309e8e, 0x41b07c59, 0x8f26e31a, + 0xd7a601cd, 0x7e20576e, 0x26a0b5b9, 0x6d2b8bf3, 0x35ab6924, + 0x9c2d3f87, 0xc4addd50, 0x14768426, 0x4cf666f1, 0xe5703052, + 0xbdf0d285, 0xf67beccf, 0xaefb0e18, 0x077d58bb, 0x5ffdba6c, + 0x916b252f, 0xc9ebc7f8, 0x606d915b, 0x38ed738c, 0x73664dc6, + 0x2be6af11, 0x8260f9b2, 0xdae01b65, 0x1e4dc635, 0x46cd24e2, + 0xef4b7241, 0xb7cb9096, 0xfc40aedc, 0xa4c04c0b, 0x0d461aa8, + 0x55c6f87f, 0x9b50673c, 0xc3d085eb, 0x6a56d348, 0x32d6319f, + 0x795d0fd5, 0x21dded02, 0x885bbba1, 0xd0db5976, 0x28ec084d, + 0x706cea9a, 0xd9eabc39, 0x816a5eee, 0xcae160a4, 0x92618273, + 0x3be7d4d0, 0x63673607, 0xadf1a944, 0xf5714b93, 0x5cf71d30, + 0x0477ffe7, 0x4ffcc1ad, 0x177c237a, 0xbefa75d9, 0xe67a970e, + 0x22d74a5e, 0x7a57a889, 0xd3d1fe2a, 0x8b511cfd, 0xc0da22b7, + 0x985ac060, 0x31dc96c3, 0x695c7414, 0xa7caeb57, 0xff4a0980, + 0x56cc5f23, 0x0e4cbdf4, 0x45c783be, 0x1d476169, 0xb4c137ca, + 0xec41d51d, 0x3c9a8c6b, 0x641a6ebc, 0xcd9c381f, 0x951cdac8, + 0xde97e482, 0x86170655, 0x2f9150f6, 0x7711b221, 0xb9872d62, + 0xe107cfb5, 0x48819916, 0x10017bc1, 0x5b8a458b, 0x030aa75c, + 0xaa8cf1ff, 0xf20c1328, 0x36a1ce78, 0x6e212caf, 0xc7a77a0c, + 0x9f2798db, 0xd4aca691, 0x8c2c4446, 0x25aa12e5, 0x7d2af032, + 0xb3bc6f71, 0xeb3c8da6, 0x42badb05, 0x1a3a39d2, 0x51b10798, + 0x0931e54f, 0xa0b7b3ec, 0xf837513b, 0x50d8119a, 0x0858f34d, + 0xa1dea5ee, 0xf95e4739, 0xb2d57973, 0xea559ba4, 0x43d3cd07, + 0x1b532fd0, 0xd5c5b093, 0x8d455244, 0x24c304e7, 0x7c43e630, + 0x37c8d87a, 0x6f483aad, 0xc6ce6c0e, 0x9e4e8ed9, 0x5ae35389, + 0x0263b15e, 0xabe5e7fd, 0xf365052a, 0xb8ee3b60, 0xe06ed9b7, + 0x49e88f14, 0x11686dc3, 0xdffef280, 0x877e1057, 0x2ef846f4, + 0x7678a423, 0x3df39a69, 0x657378be, 0xccf52e1d, 0x9475ccca, + 0x44ae95bc, 0x1c2e776b, 0xb5a821c8, 0xed28c31f, 0xa6a3fd55, + 0xfe231f82, 0x57a54921, 0x0f25abf6, 0xc1b334b5, 0x9933d662, + 0x30b580c1, 0x68356216, 0x23be5c5c, 0x7b3ebe8b, 0xd2b8e828, + 0x8a380aff, 0x4e95d7af, 0x16153578, 0xbf9363db, 0xe713810c, + 0xac98bf46, 0xf4185d91, 0x5d9e0b32, 0x051ee9e5, 0xcb8876a6, + 0x93089471, 0x3a8ec2d2, 0x620e2005, 0x29851e4f, 0x7105fc98, + 0xd883aa3b, 0x800348ec, 0x783419d7, 0x20b4fb00, 0x8932ada3, + 0xd1b24f74, 0x9a39713e, 0xc2b993e9, 0x6b3fc54a, 0x33bf279d, + 0xfd29b8de, 0xa5a95a09, 0x0c2f0caa, 0x54afee7d, 0x1f24d037, + 0x47a432e0, 0xee226443, 0xb6a28694, 0x720f5bc4, 0x2a8fb913, + 0x8309efb0, 0xdb890d67, 0x9002332d, 0xc882d1fa, 0x61048759, + 0x3984658e, 0xf712facd, 0xaf92181a, 0x06144eb9, 0x5e94ac6e, + 0x151f9224, 0x4d9f70f3, 0xe4192650, 0xbc99c487, 0x6c429df1, + 0x34c27f26, 0x9d442985, 0xc5c4cb52, 0x8e4ff518, 0xd6cf17cf, + 0x7f49416c, 0x27c9a3bb, 0xe95f3cf8, 0xb1dfde2f, 0x1859888c, + 0x40d96a5b, 0x0b525411, 0x53d2b6c6, 0xfa54e065, 0xa2d402b2, + 0x6679dfe2, 0x3ef93d35, 0x977f6b96, 0xcfff8941, 0x8474b70b, + 0xdcf455dc, 0x7572037f, 0x2df2e1a8, 0xe3647eeb, 0xbbe49c3c, + 0x1262ca9f, 0x4ae22848, 0x01691602, 0x59e9f4d5, 0xf06fa276, + 0xa8ef40a1}, + {0x00000000, 0x463b6765, 0x8c76ceca, 0xca4da9af, 0x59ebed4e, + 0x1fd08a2b, 0xd59d2384, 0x93a644e1, 0xb2d6db9d, 0xf4edbcf8, + 0x3ea01557, 0x789b7232, 0xeb3d36d3, 0xad0651b6, 0x674bf819, + 0x21709f7c, 0x25abc6e0, 0x6390a185, 0xa9dd082a, 0xefe66f4f, + 0x7c402bae, 0x3a7b4ccb, 0xf036e564, 0xb60d8201, 0x977d1d7d, + 0xd1467a18, 0x1b0bd3b7, 0x5d30b4d2, 0xce96f033, 0x88ad9756, + 0x42e03ef9, 0x04db599c, 0x0b50fc1a, 0x4d6b9b7f, 0x872632d0, + 0xc11d55b5, 0x52bb1154, 0x14807631, 0xdecddf9e, 0x98f6b8fb, + 0xb9862787, 0xffbd40e2, 0x35f0e94d, 0x73cb8e28, 0xe06dcac9, + 0xa656adac, 0x6c1b0403, 0x2a206366, 0x2efb3afa, 0x68c05d9f, + 0xa28df430, 0xe4b69355, 0x7710d7b4, 0x312bb0d1, 0xfb66197e, + 0xbd5d7e1b, 0x9c2de167, 0xda168602, 0x105b2fad, 0x566048c8, + 0xc5c60c29, 0x83fd6b4c, 0x49b0c2e3, 0x0f8ba586, 0x16a0f835, + 0x509b9f50, 0x9ad636ff, 0xdced519a, 0x4f4b157b, 0x0970721e, + 0xc33ddbb1, 0x8506bcd4, 0xa47623a8, 0xe24d44cd, 0x2800ed62, + 0x6e3b8a07, 0xfd9dcee6, 0xbba6a983, 0x71eb002c, 0x37d06749, + 0x330b3ed5, 0x753059b0, 0xbf7df01f, 0xf946977a, 0x6ae0d39b, + 0x2cdbb4fe, 0xe6961d51, 0xa0ad7a34, 0x81dde548, 0xc7e6822d, + 0x0dab2b82, 0x4b904ce7, 0xd8360806, 0x9e0d6f63, 0x5440c6cc, + 0x127ba1a9, 0x1df0042f, 0x5bcb634a, 0x9186cae5, 0xd7bdad80, + 0x441be961, 0x02208e04, 0xc86d27ab, 0x8e5640ce, 0xaf26dfb2, + 0xe91db8d7, 0x23501178, 0x656b761d, 0xf6cd32fc, 0xb0f65599, + 0x7abbfc36, 0x3c809b53, 0x385bc2cf, 0x7e60a5aa, 0xb42d0c05, + 0xf2166b60, 0x61b02f81, 0x278b48e4, 0xedc6e14b, 0xabfd862e, + 0x8a8d1952, 0xccb67e37, 0x06fbd798, 0x40c0b0fd, 0xd366f41c, + 0x955d9379, 0x5f103ad6, 0x192b5db3, 0x2c40f16b, 0x6a7b960e, + 0xa0363fa1, 0xe60d58c4, 0x75ab1c25, 0x33907b40, 0xf9ddd2ef, + 0xbfe6b58a, 0x9e962af6, 0xd8ad4d93, 0x12e0e43c, 0x54db8359, + 0xc77dc7b8, 0x8146a0dd, 0x4b0b0972, 0x0d306e17, 0x09eb378b, + 0x4fd050ee, 0x859df941, 0xc3a69e24, 0x5000dac5, 0x163bbda0, + 0xdc76140f, 0x9a4d736a, 0xbb3dec16, 0xfd068b73, 0x374b22dc, + 0x717045b9, 0xe2d60158, 0xa4ed663d, 0x6ea0cf92, 0x289ba8f7, + 0x27100d71, 0x612b6a14, 0xab66c3bb, 0xed5da4de, 0x7efbe03f, + 0x38c0875a, 0xf28d2ef5, 0xb4b64990, 0x95c6d6ec, 0xd3fdb189, + 0x19b01826, 0x5f8b7f43, 0xcc2d3ba2, 0x8a165cc7, 0x405bf568, + 0x0660920d, 0x02bbcb91, 0x4480acf4, 0x8ecd055b, 0xc8f6623e, + 0x5b5026df, 0x1d6b41ba, 0xd726e815, 0x911d8f70, 0xb06d100c, + 0xf6567769, 0x3c1bdec6, 0x7a20b9a3, 0xe986fd42, 0xafbd9a27, + 0x65f03388, 0x23cb54ed, 0x3ae0095e, 0x7cdb6e3b, 0xb696c794, + 0xf0ada0f1, 0x630be410, 0x25308375, 0xef7d2ada, 0xa9464dbf, + 0x8836d2c3, 0xce0db5a6, 0x04401c09, 0x427b7b6c, 0xd1dd3f8d, + 0x97e658e8, 0x5dabf147, 0x1b909622, 0x1f4bcfbe, 0x5970a8db, + 0x933d0174, 0xd5066611, 0x46a022f0, 0x009b4595, 0xcad6ec3a, + 0x8ced8b5f, 0xad9d1423, 0xeba67346, 0x21ebdae9, 0x67d0bd8c, + 0xf476f96d, 0xb24d9e08, 0x780037a7, 0x3e3b50c2, 0x31b0f544, + 0x778b9221, 0xbdc63b8e, 0xfbfd5ceb, 0x685b180a, 0x2e607f6f, + 0xe42dd6c0, 0xa216b1a5, 0x83662ed9, 0xc55d49bc, 0x0f10e013, + 0x492b8776, 0xda8dc397, 0x9cb6a4f2, 0x56fb0d5d, 0x10c06a38, + 0x141b33a4, 0x522054c1, 0x986dfd6e, 0xde569a0b, 0x4df0deea, + 0x0bcbb98f, 0xc1861020, 0x87bd7745, 0xa6cde839, 0xe0f68f5c, + 0x2abb26f3, 0x6c804196, 0xff260577, 0xb91d6212, 0x7350cbbd, + 0x356bacd8}}; + +#endif + +#endif + +#if N == 6 + +#if W == 8 + +local const z_crc_t FAR crc_braid_table[][256] = { + {0x00000000, 0x3db1ecdc, 0x7b63d9b8, 0x46d23564, 0xf6c7b370, + 0xcb765fac, 0x8da46ac8, 0xb0158614, 0x36fe60a1, 0x0b4f8c7d, + 0x4d9db919, 0x702c55c5, 0xc039d3d1, 0xfd883f0d, 0xbb5a0a69, + 0x86ebe6b5, 0x6dfcc142, 0x504d2d9e, 0x169f18fa, 0x2b2ef426, + 0x9b3b7232, 0xa68a9eee, 0xe058ab8a, 0xdde94756, 0x5b02a1e3, + 0x66b34d3f, 0x2061785b, 0x1dd09487, 0xadc51293, 0x9074fe4f, + 0xd6a6cb2b, 0xeb1727f7, 0xdbf98284, 0xe6486e58, 0xa09a5b3c, + 0x9d2bb7e0, 0x2d3e31f4, 0x108fdd28, 0x565de84c, 0x6bec0490, + 0xed07e225, 0xd0b60ef9, 0x96643b9d, 0xabd5d741, 0x1bc05155, + 0x2671bd89, 0x60a388ed, 0x5d126431, 0xb60543c6, 0x8bb4af1a, + 0xcd669a7e, 0xf0d776a2, 0x40c2f0b6, 0x7d731c6a, 0x3ba1290e, + 0x0610c5d2, 0x80fb2367, 0xbd4acfbb, 0xfb98fadf, 0xc6291603, + 0x763c9017, 0x4b8d7ccb, 0x0d5f49af, 0x30eea573, 0x6c820349, + 0x5133ef95, 0x17e1daf1, 0x2a50362d, 0x9a45b039, 0xa7f45ce5, + 0xe1266981, 0xdc97855d, 0x5a7c63e8, 0x67cd8f34, 0x211fba50, + 0x1cae568c, 0xacbbd098, 0x910a3c44, 0xd7d80920, 0xea69e5fc, + 0x017ec20b, 0x3ccf2ed7, 0x7a1d1bb3, 0x47acf76f, 0xf7b9717b, + 0xca089da7, 0x8cdaa8c3, 0xb16b441f, 0x3780a2aa, 0x0a314e76, + 0x4ce37b12, 0x715297ce, 0xc14711da, 0xfcf6fd06, 0xba24c862, + 0x879524be, 0xb77b81cd, 0x8aca6d11, 0xcc185875, 0xf1a9b4a9, + 0x41bc32bd, 0x7c0dde61, 0x3adfeb05, 0x076e07d9, 0x8185e16c, + 0xbc340db0, 0xfae638d4, 0xc757d408, 0x7742521c, 0x4af3bec0, + 0x0c218ba4, 0x31906778, 0xda87408f, 0xe736ac53, 0xa1e49937, + 0x9c5575eb, 0x2c40f3ff, 0x11f11f23, 0x57232a47, 0x6a92c69b, + 0xec79202e, 0xd1c8ccf2, 0x971af996, 0xaaab154a, 0x1abe935e, + 0x270f7f82, 0x61dd4ae6, 0x5c6ca63a, 0xd9040692, 0xe4b5ea4e, + 0xa267df2a, 0x9fd633f6, 0x2fc3b5e2, 0x1272593e, 0x54a06c5a, + 0x69118086, 0xeffa6633, 0xd24b8aef, 0x9499bf8b, 0xa9285357, + 0x193dd543, 0x248c399f, 0x625e0cfb, 0x5fefe027, 0xb4f8c7d0, + 0x89492b0c, 0xcf9b1e68, 0xf22af2b4, 0x423f74a0, 0x7f8e987c, + 0x395cad18, 0x04ed41c4, 0x8206a771, 0xbfb74bad, 0xf9657ec9, + 0xc4d49215, 0x74c11401, 0x4970f8dd, 0x0fa2cdb9, 0x32132165, + 0x02fd8416, 0x3f4c68ca, 0x799e5dae, 0x442fb172, 0xf43a3766, + 0xc98bdbba, 0x8f59eede, 0xb2e80202, 0x3403e4b7, 0x09b2086b, + 0x4f603d0f, 0x72d1d1d3, 0xc2c457c7, 0xff75bb1b, 0xb9a78e7f, + 0x841662a3, 0x6f014554, 0x52b0a988, 0x14629cec, 0x29d37030, + 0x99c6f624, 0xa4771af8, 0xe2a52f9c, 0xdf14c340, 0x59ff25f5, + 0x644ec929, 0x229cfc4d, 0x1f2d1091, 0xaf389685, 0x92897a59, + 0xd45b4f3d, 0xe9eaa3e1, 0xb58605db, 0x8837e907, 0xcee5dc63, + 0xf35430bf, 0x4341b6ab, 0x7ef05a77, 0x38226f13, 0x059383cf, + 0x8378657a, 0xbec989a6, 0xf81bbcc2, 0xc5aa501e, 0x75bfd60a, + 0x480e3ad6, 0x0edc0fb2, 0x336de36e, 0xd87ac499, 0xe5cb2845, + 0xa3191d21, 0x9ea8f1fd, 0x2ebd77e9, 0x130c9b35, 0x55deae51, + 0x686f428d, 0xee84a438, 0xd33548e4, 0x95e77d80, 0xa856915c, + 0x18431748, 0x25f2fb94, 0x6320cef0, 0x5e91222c, 0x6e7f875f, + 0x53ce6b83, 0x151c5ee7, 0x28adb23b, 0x98b8342f, 0xa509d8f3, + 0xe3dbed97, 0xde6a014b, 0x5881e7fe, 0x65300b22, 0x23e23e46, + 0x1e53d29a, 0xae46548e, 0x93f7b852, 0xd5258d36, 0xe89461ea, + 0x0383461d, 0x3e32aac1, 0x78e09fa5, 0x45517379, 0xf544f56d, + 0xc8f519b1, 0x8e272cd5, 0xb396c009, 0x357d26bc, 0x08ccca60, + 0x4e1eff04, 0x73af13d8, 0xc3ba95cc, 0xfe0b7910, 0xb8d94c74, + 0x8568a0a8}, + {0x00000000, 0x69790b65, 0xd2f216ca, 0xbb8b1daf, 0x7e952bd5, + 0x17ec20b0, 0xac673d1f, 0xc51e367a, 0xfd2a57aa, 0x94535ccf, + 0x2fd84160, 0x46a14a05, 0x83bf7c7f, 0xeac6771a, 0x514d6ab5, + 0x383461d0, 0x2125a915, 0x485ca270, 0xf3d7bfdf, 0x9aaeb4ba, + 0x5fb082c0, 0x36c989a5, 0x8d42940a, 0xe43b9f6f, 0xdc0ffebf, + 0xb576f5da, 0x0efde875, 0x6784e310, 0xa29ad56a, 0xcbe3de0f, + 0x7068c3a0, 0x1911c8c5, 0x424b522a, 0x2b32594f, 0x90b944e0, + 0xf9c04f85, 0x3cde79ff, 0x55a7729a, 0xee2c6f35, 0x87556450, + 0xbf610580, 0xd6180ee5, 0x6d93134a, 0x04ea182f, 0xc1f42e55, + 0xa88d2530, 0x1306389f, 0x7a7f33fa, 0x636efb3f, 0x0a17f05a, + 0xb19cedf5, 0xd8e5e690, 0x1dfbd0ea, 0x7482db8f, 0xcf09c620, + 0xa670cd45, 0x9e44ac95, 0xf73da7f0, 0x4cb6ba5f, 0x25cfb13a, + 0xe0d18740, 0x89a88c25, 0x3223918a, 0x5b5a9aef, 0x8496a454, + 0xedefaf31, 0x5664b29e, 0x3f1db9fb, 0xfa038f81, 0x937a84e4, + 0x28f1994b, 0x4188922e, 0x79bcf3fe, 0x10c5f89b, 0xab4ee534, + 0xc237ee51, 0x0729d82b, 0x6e50d34e, 0xd5dbcee1, 0xbca2c584, + 0xa5b30d41, 0xccca0624, 0x77411b8b, 0x1e3810ee, 0xdb262694, + 0xb25f2df1, 0x09d4305e, 0x60ad3b3b, 0x58995aeb, 0x31e0518e, + 0x8a6b4c21, 0xe3124744, 0x260c713e, 0x4f757a5b, 0xf4fe67f4, + 0x9d876c91, 0xc6ddf67e, 0xafa4fd1b, 0x142fe0b4, 0x7d56ebd1, + 0xb848ddab, 0xd131d6ce, 0x6abacb61, 0x03c3c004, 0x3bf7a1d4, + 0x528eaab1, 0xe905b71e, 0x807cbc7b, 0x45628a01, 0x2c1b8164, + 0x97909ccb, 0xfee997ae, 0xe7f85f6b, 0x8e81540e, 0x350a49a1, + 0x5c7342c4, 0x996d74be, 0xf0147fdb, 0x4b9f6274, 0x22e66911, + 0x1ad208c1, 0x73ab03a4, 0xc8201e0b, 0xa159156e, 0x64472314, + 0x0d3e2871, 0xb6b535de, 0xdfcc3ebb, 0xd25c4ee9, 0xbb25458c, + 0x00ae5823, 0x69d75346, 0xacc9653c, 0xc5b06e59, 0x7e3b73f6, + 0x17427893, 0x2f761943, 0x460f1226, 0xfd840f89, 0x94fd04ec, + 0x51e33296, 0x389a39f3, 0x8311245c, 0xea682f39, 0xf379e7fc, + 0x9a00ec99, 0x218bf136, 0x48f2fa53, 0x8deccc29, 0xe495c74c, + 0x5f1edae3, 0x3667d186, 0x0e53b056, 0x672abb33, 0xdca1a69c, + 0xb5d8adf9, 0x70c69b83, 0x19bf90e6, 0xa2348d49, 0xcb4d862c, + 0x90171cc3, 0xf96e17a6, 0x42e50a09, 0x2b9c016c, 0xee823716, + 0x87fb3c73, 0x3c7021dc, 0x55092ab9, 0x6d3d4b69, 0x0444400c, + 0xbfcf5da3, 0xd6b656c6, 0x13a860bc, 0x7ad16bd9, 0xc15a7676, + 0xa8237d13, 0xb132b5d6, 0xd84bbeb3, 0x63c0a31c, 0x0ab9a879, + 0xcfa79e03, 0xa6de9566, 0x1d5588c9, 0x742c83ac, 0x4c18e27c, + 0x2561e919, 0x9eeaf4b6, 0xf793ffd3, 0x328dc9a9, 0x5bf4c2cc, + 0xe07fdf63, 0x8906d406, 0x56caeabd, 0x3fb3e1d8, 0x8438fc77, + 0xed41f712, 0x285fc168, 0x4126ca0d, 0xfaadd7a2, 0x93d4dcc7, + 0xabe0bd17, 0xc299b672, 0x7912abdd, 0x106ba0b8, 0xd57596c2, + 0xbc0c9da7, 0x07878008, 0x6efe8b6d, 0x77ef43a8, 0x1e9648cd, + 0xa51d5562, 0xcc645e07, 0x097a687d, 0x60036318, 0xdb887eb7, + 0xb2f175d2, 0x8ac51402, 0xe3bc1f67, 0x583702c8, 0x314e09ad, + 0xf4503fd7, 0x9d2934b2, 0x26a2291d, 0x4fdb2278, 0x1481b897, + 0x7df8b3f2, 0xc673ae5d, 0xaf0aa538, 0x6a149342, 0x036d9827, + 0xb8e68588, 0xd19f8eed, 0xe9abef3d, 0x80d2e458, 0x3b59f9f7, + 0x5220f292, 0x973ec4e8, 0xfe47cf8d, 0x45ccd222, 0x2cb5d947, + 0x35a41182, 0x5cdd1ae7, 0xe7560748, 0x8e2f0c2d, 0x4b313a57, + 0x22483132, 0x99c32c9d, 0xf0ba27f8, 0xc88e4628, 0xa1f74d4d, + 0x1a7c50e2, 0x73055b87, 0xb61b6dfd, 0xdf626698, 0x64e97b37, + 0x0d907052}, + {0x00000000, 0x7fc99b93, 0xff933726, 0x805aacb5, 0x2457680d, + 0x5b9ef39e, 0xdbc45f2b, 0xa40dc4b8, 0x48aed01a, 0x37674b89, + 0xb73de73c, 0xc8f47caf, 0x6cf9b817, 0x13302384, 0x936a8f31, + 0xeca314a2, 0x915da034, 0xee943ba7, 0x6ece9712, 0x11070c81, + 0xb50ac839, 0xcac353aa, 0x4a99ff1f, 0x3550648c, 0xd9f3702e, + 0xa63aebbd, 0x26604708, 0x59a9dc9b, 0xfda41823, 0x826d83b0, + 0x02372f05, 0x7dfeb496, 0xf9ca4629, 0x8603ddba, 0x0659710f, + 0x7990ea9c, 0xdd9d2e24, 0xa254b5b7, 0x220e1902, 0x5dc78291, + 0xb1649633, 0xcead0da0, 0x4ef7a115, 0x313e3a86, 0x9533fe3e, + 0xeafa65ad, 0x6aa0c918, 0x1569528b, 0x6897e61d, 0x175e7d8e, + 0x9704d13b, 0xe8cd4aa8, 0x4cc08e10, 0x33091583, 0xb353b936, + 0xcc9a22a5, 0x20393607, 0x5ff0ad94, 0xdfaa0121, 0xa0639ab2, + 0x046e5e0a, 0x7ba7c599, 0xfbfd692c, 0x8434f2bf, 0x28e58a13, + 0x572c1180, 0xd776bd35, 0xa8bf26a6, 0x0cb2e21e, 0x737b798d, + 0xf321d538, 0x8ce84eab, 0x604b5a09, 0x1f82c19a, 0x9fd86d2f, + 0xe011f6bc, 0x441c3204, 0x3bd5a997, 0xbb8f0522, 0xc4469eb1, + 0xb9b82a27, 0xc671b1b4, 0x462b1d01, 0x39e28692, 0x9def422a, + 0xe226d9b9, 0x627c750c, 0x1db5ee9f, 0xf116fa3d, 0x8edf61ae, + 0x0e85cd1b, 0x714c5688, 0xd5419230, 0xaa8809a3, 0x2ad2a516, + 0x551b3e85, 0xd12fcc3a, 0xaee657a9, 0x2ebcfb1c, 0x5175608f, + 0xf578a437, 0x8ab13fa4, 0x0aeb9311, 0x75220882, 0x99811c20, + 0xe64887b3, 0x66122b06, 0x19dbb095, 0xbdd6742d, 0xc21fefbe, + 0x4245430b, 0x3d8cd898, 0x40726c0e, 0x3fbbf79d, 0xbfe15b28, + 0xc028c0bb, 0x64250403, 0x1bec9f90, 0x9bb63325, 0xe47fa8b6, + 0x08dcbc14, 0x77152787, 0xf74f8b32, 0x888610a1, 0x2c8bd419, + 0x53424f8a, 0xd318e33f, 0xacd178ac, 0x51cb1426, 0x2e028fb5, + 0xae582300, 0xd191b893, 0x759c7c2b, 0x0a55e7b8, 0x8a0f4b0d, + 0xf5c6d09e, 0x1965c43c, 0x66ac5faf, 0xe6f6f31a, 0x993f6889, + 0x3d32ac31, 0x42fb37a2, 0xc2a19b17, 0xbd680084, 0xc096b412, + 0xbf5f2f81, 0x3f058334, 0x40cc18a7, 0xe4c1dc1f, 0x9b08478c, + 0x1b52eb39, 0x649b70aa, 0x88386408, 0xf7f1ff9b, 0x77ab532e, + 0x0862c8bd, 0xac6f0c05, 0xd3a69796, 0x53fc3b23, 0x2c35a0b0, + 0xa801520f, 0xd7c8c99c, 0x57926529, 0x285bfeba, 0x8c563a02, + 0xf39fa191, 0x73c50d24, 0x0c0c96b7, 0xe0af8215, 0x9f661986, + 0x1f3cb533, 0x60f52ea0, 0xc4f8ea18, 0xbb31718b, 0x3b6bdd3e, + 0x44a246ad, 0x395cf23b, 0x469569a8, 0xc6cfc51d, 0xb9065e8e, + 0x1d0b9a36, 0x62c201a5, 0xe298ad10, 0x9d513683, 0x71f22221, + 0x0e3bb9b2, 0x8e611507, 0xf1a88e94, 0x55a54a2c, 0x2a6cd1bf, + 0xaa367d0a, 0xd5ffe699, 0x792e9e35, 0x06e705a6, 0x86bda913, + 0xf9743280, 0x5d79f638, 0x22b06dab, 0xa2eac11e, 0xdd235a8d, + 0x31804e2f, 0x4e49d5bc, 0xce137909, 0xb1dae29a, 0x15d72622, + 0x6a1ebdb1, 0xea441104, 0x958d8a97, 0xe8733e01, 0x97baa592, + 0x17e00927, 0x682992b4, 0xcc24560c, 0xb3edcd9f, 0x33b7612a, + 0x4c7efab9, 0xa0ddee1b, 0xdf147588, 0x5f4ed93d, 0x208742ae, + 0x848a8616, 0xfb431d85, 0x7b19b130, 0x04d02aa3, 0x80e4d81c, + 0xff2d438f, 0x7f77ef3a, 0x00be74a9, 0xa4b3b011, 0xdb7a2b82, + 0x5b208737, 0x24e91ca4, 0xc84a0806, 0xb7839395, 0x37d93f20, + 0x4810a4b3, 0xec1d600b, 0x93d4fb98, 0x138e572d, 0x6c47ccbe, + 0x11b97828, 0x6e70e3bb, 0xee2a4f0e, 0x91e3d49d, 0x35ee1025, + 0x4a278bb6, 0xca7d2703, 0xb5b4bc90, 0x5917a832, 0x26de33a1, + 0xa6849f14, 0xd94d0487, 0x7d40c03f, 0x02895bac, 0x82d3f719, + 0xfd1a6c8a}, + {0x00000000, 0xa396284c, 0x9c5d56d9, 0x3fcb7e95, 0xe3cbabf3, + 0x405d83bf, 0x7f96fd2a, 0xdc00d566, 0x1ce651a7, 0xbf7079eb, + 0x80bb077e, 0x232d2f32, 0xff2dfa54, 0x5cbbd218, 0x6370ac8d, + 0xc0e684c1, 0x39cca34e, 0x9a5a8b02, 0xa591f597, 0x0607dddb, + 0xda0708bd, 0x799120f1, 0x465a5e64, 0xe5cc7628, 0x252af2e9, + 0x86bcdaa5, 0xb977a430, 0x1ae18c7c, 0xc6e1591a, 0x65777156, + 0x5abc0fc3, 0xf92a278f, 0x7399469c, 0xd00f6ed0, 0xefc41045, + 0x4c523809, 0x9052ed6f, 0x33c4c523, 0x0c0fbbb6, 0xaf9993fa, + 0x6f7f173b, 0xcce93f77, 0xf32241e2, 0x50b469ae, 0x8cb4bcc8, + 0x2f229484, 0x10e9ea11, 0xb37fc25d, 0x4a55e5d2, 0xe9c3cd9e, + 0xd608b30b, 0x759e9b47, 0xa99e4e21, 0x0a08666d, 0x35c318f8, + 0x965530b4, 0x56b3b475, 0xf5259c39, 0xcaeee2ac, 0x6978cae0, + 0xb5781f86, 0x16ee37ca, 0x2925495f, 0x8ab36113, 0xe7328d38, + 0x44a4a574, 0x7b6fdbe1, 0xd8f9f3ad, 0x04f926cb, 0xa76f0e87, + 0x98a47012, 0x3b32585e, 0xfbd4dc9f, 0x5842f4d3, 0x67898a46, + 0xc41fa20a, 0x181f776c, 0xbb895f20, 0x844221b5, 0x27d409f9, + 0xdefe2e76, 0x7d68063a, 0x42a378af, 0xe13550e3, 0x3d358585, + 0x9ea3adc9, 0xa168d35c, 0x02fefb10, 0xc2187fd1, 0x618e579d, + 0x5e452908, 0xfdd30144, 0x21d3d422, 0x8245fc6e, 0xbd8e82fb, + 0x1e18aab7, 0x94abcba4, 0x373de3e8, 0x08f69d7d, 0xab60b531, + 0x77606057, 0xd4f6481b, 0xeb3d368e, 0x48ab1ec2, 0x884d9a03, + 0x2bdbb24f, 0x1410ccda, 0xb786e496, 0x6b8631f0, 0xc81019bc, + 0xf7db6729, 0x544d4f65, 0xad6768ea, 0x0ef140a6, 0x313a3e33, + 0x92ac167f, 0x4eacc319, 0xed3aeb55, 0xd2f195c0, 0x7167bd8c, + 0xb181394d, 0x12171101, 0x2ddc6f94, 0x8e4a47d8, 0x524a92be, + 0xf1dcbaf2, 0xce17c467, 0x6d81ec2b, 0x15141c31, 0xb682347d, + 0x89494ae8, 0x2adf62a4, 0xf6dfb7c2, 0x55499f8e, 0x6a82e11b, + 0xc914c957, 0x09f24d96, 0xaa6465da, 0x95af1b4f, 0x36393303, + 0xea39e665, 0x49afce29, 0x7664b0bc, 0xd5f298f0, 0x2cd8bf7f, + 0x8f4e9733, 0xb085e9a6, 0x1313c1ea, 0xcf13148c, 0x6c853cc0, + 0x534e4255, 0xf0d86a19, 0x303eeed8, 0x93a8c694, 0xac63b801, + 0x0ff5904d, 0xd3f5452b, 0x70636d67, 0x4fa813f2, 0xec3e3bbe, + 0x668d5aad, 0xc51b72e1, 0xfad00c74, 0x59462438, 0x8546f15e, + 0x26d0d912, 0x191ba787, 0xba8d8fcb, 0x7a6b0b0a, 0xd9fd2346, + 0xe6365dd3, 0x45a0759f, 0x99a0a0f9, 0x3a3688b5, 0x05fdf620, + 0xa66bde6c, 0x5f41f9e3, 0xfcd7d1af, 0xc31caf3a, 0x608a8776, + 0xbc8a5210, 0x1f1c7a5c, 0x20d704c9, 0x83412c85, 0x43a7a844, + 0xe0318008, 0xdffafe9d, 0x7c6cd6d1, 0xa06c03b7, 0x03fa2bfb, + 0x3c31556e, 0x9fa77d22, 0xf2269109, 0x51b0b945, 0x6e7bc7d0, + 0xcdedef9c, 0x11ed3afa, 0xb27b12b6, 0x8db06c23, 0x2e26446f, + 0xeec0c0ae, 0x4d56e8e2, 0x729d9677, 0xd10bbe3b, 0x0d0b6b5d, + 0xae9d4311, 0x91563d84, 0x32c015c8, 0xcbea3247, 0x687c1a0b, + 0x57b7649e, 0xf4214cd2, 0x282199b4, 0x8bb7b1f8, 0xb47ccf6d, + 0x17eae721, 0xd70c63e0, 0x749a4bac, 0x4b513539, 0xe8c71d75, + 0x34c7c813, 0x9751e05f, 0xa89a9eca, 0x0b0cb686, 0x81bfd795, + 0x2229ffd9, 0x1de2814c, 0xbe74a900, 0x62747c66, 0xc1e2542a, + 0xfe292abf, 0x5dbf02f3, 0x9d598632, 0x3ecfae7e, 0x0104d0eb, + 0xa292f8a7, 0x7e922dc1, 0xdd04058d, 0xe2cf7b18, 0x41595354, + 0xb87374db, 0x1be55c97, 0x242e2202, 0x87b80a4e, 0x5bb8df28, + 0xf82ef764, 0xc7e589f1, 0x6473a1bd, 0xa495257c, 0x07030d30, + 0x38c873a5, 0x9b5e5be9, 0x475e8e8f, 0xe4c8a6c3, 0xdb03d856, + 0x7895f01a}, + {0x00000000, 0x2a283862, 0x545070c4, 0x7e7848a6, 0xa8a0e188, + 0x8288d9ea, 0xfcf0914c, 0xd6d8a92e, 0x8a30c551, 0xa018fd33, + 0xde60b595, 0xf4488df7, 0x229024d9, 0x08b81cbb, 0x76c0541d, + 0x5ce86c7f, 0xcf108ce3, 0xe538b481, 0x9b40fc27, 0xb168c445, + 0x67b06d6b, 0x4d985509, 0x33e01daf, 0x19c825cd, 0x452049b2, + 0x6f0871d0, 0x11703976, 0x3b580114, 0xed80a83a, 0xc7a89058, + 0xb9d0d8fe, 0x93f8e09c, 0x45501f87, 0x6f7827e5, 0x11006f43, + 0x3b285721, 0xedf0fe0f, 0xc7d8c66d, 0xb9a08ecb, 0x9388b6a9, + 0xcf60dad6, 0xe548e2b4, 0x9b30aa12, 0xb1189270, 0x67c03b5e, + 0x4de8033c, 0x33904b9a, 0x19b873f8, 0x8a409364, 0xa068ab06, + 0xde10e3a0, 0xf438dbc2, 0x22e072ec, 0x08c84a8e, 0x76b00228, + 0x5c983a4a, 0x00705635, 0x2a586e57, 0x542026f1, 0x7e081e93, + 0xa8d0b7bd, 0x82f88fdf, 0xfc80c779, 0xd6a8ff1b, 0x8aa03f0e, + 0xa088076c, 0xdef04fca, 0xf4d877a8, 0x2200de86, 0x0828e6e4, + 0x7650ae42, 0x5c789620, 0x0090fa5f, 0x2ab8c23d, 0x54c08a9b, + 0x7ee8b2f9, 0xa8301bd7, 0x821823b5, 0xfc606b13, 0xd6485371, + 0x45b0b3ed, 0x6f988b8f, 0x11e0c329, 0x3bc8fb4b, 0xed105265, + 0xc7386a07, 0xb94022a1, 0x93681ac3, 0xcf8076bc, 0xe5a84ede, + 0x9bd00678, 0xb1f83e1a, 0x67209734, 0x4d08af56, 0x3370e7f0, + 0x1958df92, 0xcff02089, 0xe5d818eb, 0x9ba0504d, 0xb188682f, + 0x6750c101, 0x4d78f963, 0x3300b1c5, 0x192889a7, 0x45c0e5d8, + 0x6fe8ddba, 0x1190951c, 0x3bb8ad7e, 0xed600450, 0xc7483c32, + 0xb9307494, 0x93184cf6, 0x00e0ac6a, 0x2ac89408, 0x54b0dcae, + 0x7e98e4cc, 0xa8404de2, 0x82687580, 0xfc103d26, 0xd6380544, + 0x8ad0693b, 0xa0f85159, 0xde8019ff, 0xf4a8219d, 0x227088b3, + 0x0858b0d1, 0x7620f877, 0x5c08c015, 0xce31785d, 0xe419403f, + 0x9a610899, 0xb04930fb, 0x669199d5, 0x4cb9a1b7, 0x32c1e911, + 0x18e9d173, 0x4401bd0c, 0x6e29856e, 0x1051cdc8, 0x3a79f5aa, + 0xeca15c84, 0xc68964e6, 0xb8f12c40, 0x92d91422, 0x0121f4be, + 0x2b09ccdc, 0x5571847a, 0x7f59bc18, 0xa9811536, 0x83a92d54, + 0xfdd165f2, 0xd7f95d90, 0x8b1131ef, 0xa139098d, 0xdf41412b, + 0xf5697949, 0x23b1d067, 0x0999e805, 0x77e1a0a3, 0x5dc998c1, + 0x8b6167da, 0xa1495fb8, 0xdf31171e, 0xf5192f7c, 0x23c18652, + 0x09e9be30, 0x7791f696, 0x5db9cef4, 0x0151a28b, 0x2b799ae9, + 0x5501d24f, 0x7f29ea2d, 0xa9f14303, 0x83d97b61, 0xfda133c7, + 0xd7890ba5, 0x4471eb39, 0x6e59d35b, 0x10219bfd, 0x3a09a39f, + 0xecd10ab1, 0xc6f932d3, 0xb8817a75, 0x92a94217, 0xce412e68, + 0xe469160a, 0x9a115eac, 0xb03966ce, 0x66e1cfe0, 0x4cc9f782, + 0x32b1bf24, 0x18998746, 0x44914753, 0x6eb97f31, 0x10c13797, + 0x3ae90ff5, 0xec31a6db, 0xc6199eb9, 0xb861d61f, 0x9249ee7d, + 0xcea18202, 0xe489ba60, 0x9af1f2c6, 0xb0d9caa4, 0x6601638a, + 0x4c295be8, 0x3251134e, 0x18792b2c, 0x8b81cbb0, 0xa1a9f3d2, + 0xdfd1bb74, 0xf5f98316, 0x23212a38, 0x0909125a, 0x77715afc, + 0x5d59629e, 0x01b10ee1, 0x2b993683, 0x55e17e25, 0x7fc94647, + 0xa911ef69, 0x8339d70b, 0xfd419fad, 0xd769a7cf, 0x01c158d4, + 0x2be960b6, 0x55912810, 0x7fb91072, 0xa961b95c, 0x8349813e, + 0xfd31c998, 0xd719f1fa, 0x8bf19d85, 0xa1d9a5e7, 0xdfa1ed41, + 0xf589d523, 0x23517c0d, 0x0979446f, 0x77010cc9, 0x5d2934ab, + 0xced1d437, 0xe4f9ec55, 0x9a81a4f3, 0xb0a99c91, 0x667135bf, + 0x4c590ddd, 0x3221457b, 0x18097d19, 0x44e11166, 0x6ec92904, + 0x10b161a2, 0x3a9959c0, 0xec41f0ee, 0xc669c88c, 0xb811802a, + 0x9239b848}, + {0x00000000, 0x4713f6fb, 0x8e27edf6, 0xc9341b0d, 0xc73eddad, + 0x802d2b56, 0x4919305b, 0x0e0ac6a0, 0x550cbd1b, 0x121f4be0, + 0xdb2b50ed, 0x9c38a616, 0x923260b6, 0xd521964d, 0x1c158d40, + 0x5b067bbb, 0xaa197a36, 0xed0a8ccd, 0x243e97c0, 0x632d613b, + 0x6d27a79b, 0x2a345160, 0xe3004a6d, 0xa413bc96, 0xff15c72d, + 0xb80631d6, 0x71322adb, 0x3621dc20, 0x382b1a80, 0x7f38ec7b, + 0xb60cf776, 0xf11f018d, 0x8f43f22d, 0xc85004d6, 0x01641fdb, + 0x4677e920, 0x487d2f80, 0x0f6ed97b, 0xc65ac276, 0x8149348d, + 0xda4f4f36, 0x9d5cb9cd, 0x5468a2c0, 0x137b543b, 0x1d71929b, + 0x5a626460, 0x93567f6d, 0xd4458996, 0x255a881b, 0x62497ee0, + 0xab7d65ed, 0xec6e9316, 0xe26455b6, 0xa577a34d, 0x6c43b840, + 0x2b504ebb, 0x70563500, 0x3745c3fb, 0xfe71d8f6, 0xb9622e0d, + 0xb768e8ad, 0xf07b1e56, 0x394f055b, 0x7e5cf3a0, 0xc5f6e21b, + 0x82e514e0, 0x4bd10fed, 0x0cc2f916, 0x02c83fb6, 0x45dbc94d, + 0x8cefd240, 0xcbfc24bb, 0x90fa5f00, 0xd7e9a9fb, 0x1eddb2f6, + 0x59ce440d, 0x57c482ad, 0x10d77456, 0xd9e36f5b, 0x9ef099a0, + 0x6fef982d, 0x28fc6ed6, 0xe1c875db, 0xa6db8320, 0xa8d14580, + 0xefc2b37b, 0x26f6a876, 0x61e55e8d, 0x3ae32536, 0x7df0d3cd, + 0xb4c4c8c0, 0xf3d73e3b, 0xfdddf89b, 0xbace0e60, 0x73fa156d, + 0x34e9e396, 0x4ab51036, 0x0da6e6cd, 0xc492fdc0, 0x83810b3b, + 0x8d8bcd9b, 0xca983b60, 0x03ac206d, 0x44bfd696, 0x1fb9ad2d, + 0x58aa5bd6, 0x919e40db, 0xd68db620, 0xd8877080, 0x9f94867b, + 0x56a09d76, 0x11b36b8d, 0xe0ac6a00, 0xa7bf9cfb, 0x6e8b87f6, + 0x2998710d, 0x2792b7ad, 0x60814156, 0xa9b55a5b, 0xeea6aca0, + 0xb5a0d71b, 0xf2b321e0, 0x3b873aed, 0x7c94cc16, 0x729e0ab6, + 0x358dfc4d, 0xfcb9e740, 0xbbaa11bb, 0x509cc277, 0x178f348c, + 0xdebb2f81, 0x99a8d97a, 0x97a21fda, 0xd0b1e921, 0x1985f22c, + 0x5e9604d7, 0x05907f6c, 0x42838997, 0x8bb7929a, 0xcca46461, + 0xc2aea2c1, 0x85bd543a, 0x4c894f37, 0x0b9ab9cc, 0xfa85b841, + 0xbd964eba, 0x74a255b7, 0x33b1a34c, 0x3dbb65ec, 0x7aa89317, + 0xb39c881a, 0xf48f7ee1, 0xaf89055a, 0xe89af3a1, 0x21aee8ac, + 0x66bd1e57, 0x68b7d8f7, 0x2fa42e0c, 0xe6903501, 0xa183c3fa, + 0xdfdf305a, 0x98ccc6a1, 0x51f8ddac, 0x16eb2b57, 0x18e1edf7, + 0x5ff21b0c, 0x96c60001, 0xd1d5f6fa, 0x8ad38d41, 0xcdc07bba, + 0x04f460b7, 0x43e7964c, 0x4ded50ec, 0x0afea617, 0xc3cabd1a, + 0x84d94be1, 0x75c64a6c, 0x32d5bc97, 0xfbe1a79a, 0xbcf25161, + 0xb2f897c1, 0xf5eb613a, 0x3cdf7a37, 0x7bcc8ccc, 0x20caf777, + 0x67d9018c, 0xaeed1a81, 0xe9feec7a, 0xe7f42ada, 0xa0e7dc21, + 0x69d3c72c, 0x2ec031d7, 0x956a206c, 0xd279d697, 0x1b4dcd9a, + 0x5c5e3b61, 0x5254fdc1, 0x15470b3a, 0xdc731037, 0x9b60e6cc, + 0xc0669d77, 0x87756b8c, 0x4e417081, 0x0952867a, 0x075840da, + 0x404bb621, 0x897fad2c, 0xce6c5bd7, 0x3f735a5a, 0x7860aca1, + 0xb154b7ac, 0xf6474157, 0xf84d87f7, 0xbf5e710c, 0x766a6a01, + 0x31799cfa, 0x6a7fe741, 0x2d6c11ba, 0xe4580ab7, 0xa34bfc4c, + 0xad413aec, 0xea52cc17, 0x2366d71a, 0x647521e1, 0x1a29d241, + 0x5d3a24ba, 0x940e3fb7, 0xd31dc94c, 0xdd170fec, 0x9a04f917, + 0x5330e21a, 0x142314e1, 0x4f256f5a, 0x083699a1, 0xc10282ac, + 0x86117457, 0x881bb2f7, 0xcf08440c, 0x063c5f01, 0x412fa9fa, + 0xb030a877, 0xf7235e8c, 0x3e174581, 0x7904b37a, 0x770e75da, + 0x301d8321, 0xf929982c, 0xbe3a6ed7, 0xe53c156c, 0xa22fe397, + 0x6b1bf89a, 0x2c080e61, 0x2202c8c1, 0x65113e3a, 0xac252537, + 0xeb36d3cc}, + {0x00000000, 0xa13984ee, 0x99020f9d, 0x383b8b73, 0xe975197b, + 0x484c9d95, 0x707716e6, 0xd14e9208, 0x099b34b7, 0xa8a2b059, + 0x90993b2a, 0x31a0bfc4, 0xe0ee2dcc, 0x41d7a922, 0x79ec2251, + 0xd8d5a6bf, 0x1336696e, 0xb20fed80, 0x8a3466f3, 0x2b0de21d, + 0xfa437015, 0x5b7af4fb, 0x63417f88, 0xc278fb66, 0x1aad5dd9, + 0xbb94d937, 0x83af5244, 0x2296d6aa, 0xf3d844a2, 0x52e1c04c, + 0x6ada4b3f, 0xcbe3cfd1, 0x266cd2dc, 0x87555632, 0xbf6edd41, + 0x1e5759af, 0xcf19cba7, 0x6e204f49, 0x561bc43a, 0xf72240d4, + 0x2ff7e66b, 0x8ece6285, 0xb6f5e9f6, 0x17cc6d18, 0xc682ff10, + 0x67bb7bfe, 0x5f80f08d, 0xfeb97463, 0x355abbb2, 0x94633f5c, + 0xac58b42f, 0x0d6130c1, 0xdc2fa2c9, 0x7d162627, 0x452dad54, + 0xe41429ba, 0x3cc18f05, 0x9df80beb, 0xa5c38098, 0x04fa0476, + 0xd5b4967e, 0x748d1290, 0x4cb699e3, 0xed8f1d0d, 0x4cd9a5b8, + 0xede02156, 0xd5dbaa25, 0x74e22ecb, 0xa5acbcc3, 0x0495382d, + 0x3caeb35e, 0x9d9737b0, 0x4542910f, 0xe47b15e1, 0xdc409e92, + 0x7d791a7c, 0xac378874, 0x0d0e0c9a, 0x353587e9, 0x940c0307, + 0x5fefccd6, 0xfed64838, 0xc6edc34b, 0x67d447a5, 0xb69ad5ad, + 0x17a35143, 0x2f98da30, 0x8ea15ede, 0x5674f861, 0xf74d7c8f, + 0xcf76f7fc, 0x6e4f7312, 0xbf01e11a, 0x1e3865f4, 0x2603ee87, + 0x873a6a69, 0x6ab57764, 0xcb8cf38a, 0xf3b778f9, 0x528efc17, + 0x83c06e1f, 0x22f9eaf1, 0x1ac26182, 0xbbfbe56c, 0x632e43d3, + 0xc217c73d, 0xfa2c4c4e, 0x5b15c8a0, 0x8a5b5aa8, 0x2b62de46, + 0x13595535, 0xb260d1db, 0x79831e0a, 0xd8ba9ae4, 0xe0811197, + 0x41b89579, 0x90f60771, 0x31cf839f, 0x09f408ec, 0xa8cd8c02, + 0x70182abd, 0xd121ae53, 0xe91a2520, 0x4823a1ce, 0x996d33c6, + 0x3854b728, 0x006f3c5b, 0xa156b8b5, 0x99b34b70, 0x388acf9e, + 0x00b144ed, 0xa188c003, 0x70c6520b, 0xd1ffd6e5, 0xe9c45d96, + 0x48fdd978, 0x90287fc7, 0x3111fb29, 0x092a705a, 0xa813f4b4, + 0x795d66bc, 0xd864e252, 0xe05f6921, 0x4166edcf, 0x8a85221e, + 0x2bbca6f0, 0x13872d83, 0xb2bea96d, 0x63f03b65, 0xc2c9bf8b, + 0xfaf234f8, 0x5bcbb016, 0x831e16a9, 0x22279247, 0x1a1c1934, + 0xbb259dda, 0x6a6b0fd2, 0xcb528b3c, 0xf369004f, 0x525084a1, + 0xbfdf99ac, 0x1ee61d42, 0x26dd9631, 0x87e412df, 0x56aa80d7, + 0xf7930439, 0xcfa88f4a, 0x6e910ba4, 0xb644ad1b, 0x177d29f5, + 0x2f46a286, 0x8e7f2668, 0x5f31b460, 0xfe08308e, 0xc633bbfd, + 0x670a3f13, 0xace9f0c2, 0x0dd0742c, 0x35ebff5f, 0x94d27bb1, + 0x459ce9b9, 0xe4a56d57, 0xdc9ee624, 0x7da762ca, 0xa572c475, + 0x044b409b, 0x3c70cbe8, 0x9d494f06, 0x4c07dd0e, 0xed3e59e0, + 0xd505d293, 0x743c567d, 0xd56aeec8, 0x74536a26, 0x4c68e155, + 0xed5165bb, 0x3c1ff7b3, 0x9d26735d, 0xa51df82e, 0x04247cc0, + 0xdcf1da7f, 0x7dc85e91, 0x45f3d5e2, 0xe4ca510c, 0x3584c304, + 0x94bd47ea, 0xac86cc99, 0x0dbf4877, 0xc65c87a6, 0x67650348, + 0x5f5e883b, 0xfe670cd5, 0x2f299edd, 0x8e101a33, 0xb62b9140, + 0x171215ae, 0xcfc7b311, 0x6efe37ff, 0x56c5bc8c, 0xf7fc3862, + 0x26b2aa6a, 0x878b2e84, 0xbfb0a5f7, 0x1e892119, 0xf3063c14, + 0x523fb8fa, 0x6a043389, 0xcb3db767, 0x1a73256f, 0xbb4aa181, + 0x83712af2, 0x2248ae1c, 0xfa9d08a3, 0x5ba48c4d, 0x639f073e, + 0xc2a683d0, 0x13e811d8, 0xb2d19536, 0x8aea1e45, 0x2bd39aab, + 0xe030557a, 0x4109d194, 0x79325ae7, 0xd80bde09, 0x09454c01, + 0xa87cc8ef, 0x9047439c, 0x317ec772, 0xe9ab61cd, 0x4892e523, + 0x70a96e50, 0xd190eabe, 0x00de78b6, 0xa1e7fc58, 0x99dc772b, + 0x38e5f3c5}, + {0x00000000, 0xe81790a1, 0x0b5e2703, 0xe349b7a2, 0x16bc4e06, + 0xfeabdea7, 0x1de26905, 0xf5f5f9a4, 0x2d789c0c, 0xc56f0cad, + 0x2626bb0f, 0xce312bae, 0x3bc4d20a, 0xd3d342ab, 0x309af509, + 0xd88d65a8, 0x5af13818, 0xb2e6a8b9, 0x51af1f1b, 0xb9b88fba, + 0x4c4d761e, 0xa45ae6bf, 0x4713511d, 0xaf04c1bc, 0x7789a414, + 0x9f9e34b5, 0x7cd78317, 0x94c013b6, 0x6135ea12, 0x89227ab3, + 0x6a6bcd11, 0x827c5db0, 0xb5e27030, 0x5df5e091, 0xbebc5733, + 0x56abc792, 0xa35e3e36, 0x4b49ae97, 0xa8001935, 0x40178994, + 0x989aec3c, 0x708d7c9d, 0x93c4cb3f, 0x7bd35b9e, 0x8e26a23a, + 0x6631329b, 0x85788539, 0x6d6f1598, 0xef134828, 0x0704d889, + 0xe44d6f2b, 0x0c5aff8a, 0xf9af062e, 0x11b8968f, 0xf2f1212d, + 0x1ae6b18c, 0xc26bd424, 0x2a7c4485, 0xc935f327, 0x21226386, + 0xd4d79a22, 0x3cc00a83, 0xdf89bd21, 0x379e2d80, 0xb0b5e621, + 0x58a27680, 0xbbebc122, 0x53fc5183, 0xa609a827, 0x4e1e3886, + 0xad578f24, 0x45401f85, 0x9dcd7a2d, 0x75daea8c, 0x96935d2e, + 0x7e84cd8f, 0x8b71342b, 0x6366a48a, 0x802f1328, 0x68388389, + 0xea44de39, 0x02534e98, 0xe11af93a, 0x090d699b, 0xfcf8903f, + 0x14ef009e, 0xf7a6b73c, 0x1fb1279d, 0xc73c4235, 0x2f2bd294, + 0xcc626536, 0x2475f597, 0xd1800c33, 0x39979c92, 0xdade2b30, + 0x32c9bb91, 0x05579611, 0xed4006b0, 0x0e09b112, 0xe61e21b3, + 0x13ebd817, 0xfbfc48b6, 0x18b5ff14, 0xf0a26fb5, 0x282f0a1d, + 0xc0389abc, 0x23712d1e, 0xcb66bdbf, 0x3e93441b, 0xd684d4ba, + 0x35cd6318, 0xdddaf3b9, 0x5fa6ae09, 0xb7b13ea8, 0x54f8890a, + 0xbcef19ab, 0x491ae00f, 0xa10d70ae, 0x4244c70c, 0xaa5357ad, + 0x72de3205, 0x9ac9a2a4, 0x79801506, 0x919785a7, 0x64627c03, + 0x8c75eca2, 0x6f3c5b00, 0x872bcba1, 0xba1aca03, 0x520d5aa2, + 0xb144ed00, 0x59537da1, 0xaca68405, 0x44b114a4, 0xa7f8a306, + 0x4fef33a7, 0x9762560f, 0x7f75c6ae, 0x9c3c710c, 0x742be1ad, + 0x81de1809, 0x69c988a8, 0x8a803f0a, 0x6297afab, 0xe0ebf21b, + 0x08fc62ba, 0xebb5d518, 0x03a245b9, 0xf657bc1d, 0x1e402cbc, + 0xfd099b1e, 0x151e0bbf, 0xcd936e17, 0x2584feb6, 0xc6cd4914, + 0x2edad9b5, 0xdb2f2011, 0x3338b0b0, 0xd0710712, 0x386697b3, + 0x0ff8ba33, 0xe7ef2a92, 0x04a69d30, 0xecb10d91, 0x1944f435, + 0xf1536494, 0x121ad336, 0xfa0d4397, 0x2280263f, 0xca97b69e, + 0x29de013c, 0xc1c9919d, 0x343c6839, 0xdc2bf898, 0x3f624f3a, + 0xd775df9b, 0x5509822b, 0xbd1e128a, 0x5e57a528, 0xb6403589, + 0x43b5cc2d, 0xaba25c8c, 0x48ebeb2e, 0xa0fc7b8f, 0x78711e27, + 0x90668e86, 0x732f3924, 0x9b38a985, 0x6ecd5021, 0x86dac080, + 0x65937722, 0x8d84e783, 0x0aaf2c22, 0xe2b8bc83, 0x01f10b21, + 0xe9e69b80, 0x1c136224, 0xf404f285, 0x174d4527, 0xff5ad586, + 0x27d7b02e, 0xcfc0208f, 0x2c89972d, 0xc49e078c, 0x316bfe28, + 0xd97c6e89, 0x3a35d92b, 0xd222498a, 0x505e143a, 0xb849849b, + 0x5b003339, 0xb317a398, 0x46e25a3c, 0xaef5ca9d, 0x4dbc7d3f, + 0xa5abed9e, 0x7d268836, 0x95311897, 0x7678af35, 0x9e6f3f94, + 0x6b9ac630, 0x838d5691, 0x60c4e133, 0x88d37192, 0xbf4d5c12, + 0x575accb3, 0xb4137b11, 0x5c04ebb0, 0xa9f11214, 0x41e682b5, + 0xa2af3517, 0x4ab8a5b6, 0x9235c01e, 0x7a2250bf, 0x996be71d, + 0x717c77bc, 0x84898e18, 0x6c9e1eb9, 0x8fd7a91b, 0x67c039ba, + 0xe5bc640a, 0x0dabf4ab, 0xeee24309, 0x06f5d3a8, 0xf3002a0c, + 0x1b17baad, 0xf85e0d0f, 0x10499dae, 0xc8c4f806, 0x20d368a7, + 0xc39adf05, 0x2b8d4fa4, 0xde78b600, 0x366f26a1, 0xd5269103, + 0x3d3101a2}}; + +local const z_word_t FAR crc_braid_big_table[][256] = { + {0x0000000000000000, 0xa19017e800000000, 0x03275e0b00000000, + 0xa2b749e300000000, 0x064ebc1600000000, 0xa7deabfe00000000, + 0x0569e21d00000000, 0xa4f9f5f500000000, 0x0c9c782d00000000, + 0xad0c6fc500000000, 0x0fbb262600000000, 0xae2b31ce00000000, + 0x0ad2c43b00000000, 0xab42d3d300000000, 0x09f59a3000000000, + 0xa8658dd800000000, 0x1838f15a00000000, 0xb9a8e6b200000000, + 0x1b1faf5100000000, 0xba8fb8b900000000, 0x1e764d4c00000000, + 0xbfe65aa400000000, 0x1d51134700000000, 0xbcc104af00000000, + 0x14a4897700000000, 0xb5349e9f00000000, 0x1783d77c00000000, + 0xb613c09400000000, 0x12ea356100000000, 0xb37a228900000000, + 0x11cd6b6a00000000, 0xb05d7c8200000000, 0x3070e2b500000000, + 0x91e0f55d00000000, 0x3357bcbe00000000, 0x92c7ab5600000000, + 0x363e5ea300000000, 0x97ae494b00000000, 0x351900a800000000, + 0x9489174000000000, 0x3cec9a9800000000, 0x9d7c8d7000000000, + 0x3fcbc49300000000, 0x9e5bd37b00000000, 0x3aa2268e00000000, + 0x9b32316600000000, 0x3985788500000000, 0x98156f6d00000000, + 0x284813ef00000000, 0x89d8040700000000, 0x2b6f4de400000000, + 0x8aff5a0c00000000, 0x2e06aff900000000, 0x8f96b81100000000, + 0x2d21f1f200000000, 0x8cb1e61a00000000, 0x24d46bc200000000, + 0x85447c2a00000000, 0x27f335c900000000, 0x8663222100000000, + 0x229ad7d400000000, 0x830ac03c00000000, 0x21bd89df00000000, + 0x802d9e3700000000, 0x21e6b5b000000000, 0x8076a25800000000, + 0x22c1ebbb00000000, 0x8351fc5300000000, 0x27a809a600000000, + 0x86381e4e00000000, 0x248f57ad00000000, 0x851f404500000000, + 0x2d7acd9d00000000, 0x8ceada7500000000, 0x2e5d939600000000, + 0x8fcd847e00000000, 0x2b34718b00000000, 0x8aa4666300000000, + 0x28132f8000000000, 0x8983386800000000, 0x39de44ea00000000, + 0x984e530200000000, 0x3af91ae100000000, 0x9b690d0900000000, + 0x3f90f8fc00000000, 0x9e00ef1400000000, 0x3cb7a6f700000000, + 0x9d27b11f00000000, 0x35423cc700000000, 0x94d22b2f00000000, + 0x366562cc00000000, 0x97f5752400000000, 0x330c80d100000000, + 0x929c973900000000, 0x302bdeda00000000, 0x91bbc93200000000, + 0x1196570500000000, 0xb00640ed00000000, 0x12b1090e00000000, + 0xb3211ee600000000, 0x17d8eb1300000000, 0xb648fcfb00000000, + 0x14ffb51800000000, 0xb56fa2f000000000, 0x1d0a2f2800000000, + 0xbc9a38c000000000, 0x1e2d712300000000, 0xbfbd66cb00000000, + 0x1b44933e00000000, 0xbad484d600000000, 0x1863cd3500000000, + 0xb9f3dadd00000000, 0x09aea65f00000000, 0xa83eb1b700000000, + 0x0a89f85400000000, 0xab19efbc00000000, 0x0fe01a4900000000, + 0xae700da100000000, 0x0cc7444200000000, 0xad5753aa00000000, + 0x0532de7200000000, 0xa4a2c99a00000000, 0x0615807900000000, + 0xa785979100000000, 0x037c626400000000, 0xa2ec758c00000000, + 0x005b3c6f00000000, 0xa1cb2b8700000000, 0x03ca1aba00000000, + 0xa25a0d5200000000, 0x00ed44b100000000, 0xa17d535900000000, + 0x0584a6ac00000000, 0xa414b14400000000, 0x06a3f8a700000000, + 0xa733ef4f00000000, 0x0f56629700000000, 0xaec6757f00000000, + 0x0c713c9c00000000, 0xade12b7400000000, 0x0918de8100000000, + 0xa888c96900000000, 0x0a3f808a00000000, 0xabaf976200000000, + 0x1bf2ebe000000000, 0xba62fc0800000000, 0x18d5b5eb00000000, + 0xb945a20300000000, 0x1dbc57f600000000, 0xbc2c401e00000000, + 0x1e9b09fd00000000, 0xbf0b1e1500000000, 0x176e93cd00000000, + 0xb6fe842500000000, 0x1449cdc600000000, 0xb5d9da2e00000000, + 0x11202fdb00000000, 0xb0b0383300000000, 0x120771d000000000, + 0xb397663800000000, 0x33baf80f00000000, 0x922aefe700000000, + 0x309da60400000000, 0x910db1ec00000000, 0x35f4441900000000, + 0x946453f100000000, 0x36d31a1200000000, 0x97430dfa00000000, + 0x3f26802200000000, 0x9eb697ca00000000, 0x3c01de2900000000, + 0x9d91c9c100000000, 0x39683c3400000000, 0x98f82bdc00000000, + 0x3a4f623f00000000, 0x9bdf75d700000000, 0x2b82095500000000, + 0x8a121ebd00000000, 0x28a5575e00000000, 0x893540b600000000, + 0x2dccb54300000000, 0x8c5ca2ab00000000, 0x2eebeb4800000000, + 0x8f7bfca000000000, 0x271e717800000000, 0x868e669000000000, + 0x24392f7300000000, 0x85a9389b00000000, 0x2150cd6e00000000, + 0x80c0da8600000000, 0x2277936500000000, 0x83e7848d00000000, + 0x222caf0a00000000, 0x83bcb8e200000000, 0x210bf10100000000, + 0x809be6e900000000, 0x2462131c00000000, 0x85f204f400000000, + 0x27454d1700000000, 0x86d55aff00000000, 0x2eb0d72700000000, + 0x8f20c0cf00000000, 0x2d97892c00000000, 0x8c079ec400000000, + 0x28fe6b3100000000, 0x896e7cd900000000, 0x2bd9353a00000000, + 0x8a4922d200000000, 0x3a145e5000000000, 0x9b8449b800000000, + 0x3933005b00000000, 0x98a317b300000000, 0x3c5ae24600000000, + 0x9dcaf5ae00000000, 0x3f7dbc4d00000000, 0x9eedaba500000000, + 0x3688267d00000000, 0x9718319500000000, 0x35af787600000000, + 0x943f6f9e00000000, 0x30c69a6b00000000, 0x91568d8300000000, + 0x33e1c46000000000, 0x9271d38800000000, 0x125c4dbf00000000, + 0xb3cc5a5700000000, 0x117b13b400000000, 0xb0eb045c00000000, + 0x1412f1a900000000, 0xb582e64100000000, 0x1735afa200000000, + 0xb6a5b84a00000000, 0x1ec0359200000000, 0xbf50227a00000000, + 0x1de76b9900000000, 0xbc777c7100000000, 0x188e898400000000, + 0xb91e9e6c00000000, 0x1ba9d78f00000000, 0xba39c06700000000, + 0x0a64bce500000000, 0xabf4ab0d00000000, 0x0943e2ee00000000, + 0xa8d3f50600000000, 0x0c2a00f300000000, 0xadba171b00000000, + 0x0f0d5ef800000000, 0xae9d491000000000, 0x06f8c4c800000000, + 0xa768d32000000000, 0x05df9ac300000000, 0xa44f8d2b00000000, + 0x00b678de00000000, 0xa1266f3600000000, 0x039126d500000000, + 0xa201313d00000000}, + {0x0000000000000000, 0xee8439a100000000, 0x9d0f029900000000, + 0x738b3b3800000000, 0x7b1975e900000000, 0x959d4c4800000000, + 0xe616777000000000, 0x08924ed100000000, 0xb7349b0900000000, + 0x59b0a2a800000000, 0x2a3b999000000000, 0xc4bfa03100000000, + 0xcc2deee000000000, 0x22a9d74100000000, 0x5122ec7900000000, + 0xbfa6d5d800000000, 0x6e69361300000000, 0x80ed0fb200000000, + 0xf366348a00000000, 0x1de20d2b00000000, 0x157043fa00000000, + 0xfbf47a5b00000000, 0x887f416300000000, 0x66fb78c200000000, + 0xd95dad1a00000000, 0x37d994bb00000000, 0x4452af8300000000, + 0xaad6962200000000, 0xa244d8f300000000, 0x4cc0e15200000000, + 0x3f4bda6a00000000, 0xd1cfe3cb00000000, 0xdcd26c2600000000, + 0x3256558700000000, 0x41dd6ebf00000000, 0xaf59571e00000000, + 0xa7cb19cf00000000, 0x494f206e00000000, 0x3ac41b5600000000, + 0xd44022f700000000, 0x6be6f72f00000000, 0x8562ce8e00000000, + 0xf6e9f5b600000000, 0x186dcc1700000000, 0x10ff82c600000000, + 0xfe7bbb6700000000, 0x8df0805f00000000, 0x6374b9fe00000000, + 0xb2bb5a3500000000, 0x5c3f639400000000, 0x2fb458ac00000000, + 0xc130610d00000000, 0xc9a22fdc00000000, 0x2726167d00000000, + 0x54ad2d4500000000, 0xba2914e400000000, 0x058fc13c00000000, + 0xeb0bf89d00000000, 0x9880c3a500000000, 0x7604fa0400000000, + 0x7e96b4d500000000, 0x90128d7400000000, 0xe399b64c00000000, + 0x0d1d8fed00000000, 0xb8a5d94c00000000, 0x5621e0ed00000000, + 0x25aadbd500000000, 0xcb2ee27400000000, 0xc3bcaca500000000, + 0x2d38950400000000, 0x5eb3ae3c00000000, 0xb037979d00000000, + 0x0f91424500000000, 0xe1157be400000000, 0x929e40dc00000000, + 0x7c1a797d00000000, 0x748837ac00000000, 0x9a0c0e0d00000000, + 0xe987353500000000, 0x07030c9400000000, 0xd6ccef5f00000000, + 0x3848d6fe00000000, 0x4bc3edc600000000, 0xa547d46700000000, + 0xadd59ab600000000, 0x4351a31700000000, 0x30da982f00000000, + 0xde5ea18e00000000, 0x61f8745600000000, 0x8f7c4df700000000, + 0xfcf776cf00000000, 0x12734f6e00000000, 0x1ae101bf00000000, + 0xf465381e00000000, 0x87ee032600000000, 0x696a3a8700000000, + 0x6477b56a00000000, 0x8af38ccb00000000, 0xf978b7f300000000, + 0x17fc8e5200000000, 0x1f6ec08300000000, 0xf1eaf92200000000, + 0x8261c21a00000000, 0x6ce5fbbb00000000, 0xd3432e6300000000, + 0x3dc717c200000000, 0x4e4c2cfa00000000, 0xa0c8155b00000000, + 0xa85a5b8a00000000, 0x46de622b00000000, 0x3555591300000000, + 0xdbd160b200000000, 0x0a1e837900000000, 0xe49abad800000000, + 0x971181e000000000, 0x7995b84100000000, 0x7107f69000000000, + 0x9f83cf3100000000, 0xec08f40900000000, 0x028ccda800000000, + 0xbd2a187000000000, 0x53ae21d100000000, 0x20251ae900000000, + 0xcea1234800000000, 0xc6336d9900000000, 0x28b7543800000000, + 0x5b3c6f0000000000, 0xb5b856a100000000, 0x704bb39900000000, + 0x9ecf8a3800000000, 0xed44b10000000000, 0x03c088a100000000, + 0x0b52c67000000000, 0xe5d6ffd100000000, 0x965dc4e900000000, + 0x78d9fd4800000000, 0xc77f289000000000, 0x29fb113100000000, + 0x5a702a0900000000, 0xb4f413a800000000, 0xbc665d7900000000, + 0x52e264d800000000, 0x21695fe000000000, 0xcfed664100000000, + 0x1e22858a00000000, 0xf0a6bc2b00000000, 0x832d871300000000, + 0x6da9beb200000000, 0x653bf06300000000, 0x8bbfc9c200000000, + 0xf834f2fa00000000, 0x16b0cb5b00000000, 0xa9161e8300000000, + 0x4792272200000000, 0x34191c1a00000000, 0xda9d25bb00000000, + 0xd20f6b6a00000000, 0x3c8b52cb00000000, 0x4f0069f300000000, + 0xa184505200000000, 0xac99dfbf00000000, 0x421de61e00000000, + 0x3196dd2600000000, 0xdf12e48700000000, 0xd780aa5600000000, + 0x390493f700000000, 0x4a8fa8cf00000000, 0xa40b916e00000000, + 0x1bad44b600000000, 0xf5297d1700000000, 0x86a2462f00000000, + 0x68267f8e00000000, 0x60b4315f00000000, 0x8e3008fe00000000, + 0xfdbb33c600000000, 0x133f0a6700000000, 0xc2f0e9ac00000000, + 0x2c74d00d00000000, 0x5fffeb3500000000, 0xb17bd29400000000, + 0xb9e99c4500000000, 0x576da5e400000000, 0x24e69edc00000000, + 0xca62a77d00000000, 0x75c472a500000000, 0x9b404b0400000000, + 0xe8cb703c00000000, 0x064f499d00000000, 0x0edd074c00000000, + 0xe0593eed00000000, 0x93d205d500000000, 0x7d563c7400000000, + 0xc8ee6ad500000000, 0x266a537400000000, 0x55e1684c00000000, + 0xbb6551ed00000000, 0xb3f71f3c00000000, 0x5d73269d00000000, + 0x2ef81da500000000, 0xc07c240400000000, 0x7fdaf1dc00000000, + 0x915ec87d00000000, 0xe2d5f34500000000, 0x0c51cae400000000, + 0x04c3843500000000, 0xea47bd9400000000, 0x99cc86ac00000000, + 0x7748bf0d00000000, 0xa6875cc600000000, 0x4803656700000000, + 0x3b885e5f00000000, 0xd50c67fe00000000, 0xdd9e292f00000000, + 0x331a108e00000000, 0x40912bb600000000, 0xae15121700000000, + 0x11b3c7cf00000000, 0xff37fe6e00000000, 0x8cbcc55600000000, + 0x6238fcf700000000, 0x6aaab22600000000, 0x842e8b8700000000, + 0xf7a5b0bf00000000, 0x1921891e00000000, 0x143c06f300000000, + 0xfab83f5200000000, 0x8933046a00000000, 0x67b73dcb00000000, + 0x6f25731a00000000, 0x81a14abb00000000, 0xf22a718300000000, + 0x1cae482200000000, 0xa3089dfa00000000, 0x4d8ca45b00000000, + 0x3e079f6300000000, 0xd083a6c200000000, 0xd811e81300000000, + 0x3695d1b200000000, 0x451eea8a00000000, 0xab9ad32b00000000, + 0x7a5530e000000000, 0x94d1094100000000, 0xe75a327900000000, + 0x09de0bd800000000, 0x014c450900000000, 0xefc87ca800000000, + 0x9c43479000000000, 0x72c77e3100000000, 0xcd61abe900000000, + 0x23e5924800000000, 0x506ea97000000000, 0xbeea90d100000000, + 0xb678de0000000000, 0x58fce7a100000000, 0x2b77dc9900000000, + 0xc5f3e53800000000}, + {0x0000000000000000, 0xfbf6134700000000, 0xf6ed278e00000000, + 0x0d1b34c900000000, 0xaddd3ec700000000, 0x562b2d8000000000, + 0x5b30194900000000, 0xa0c60a0e00000000, 0x1bbd0c5500000000, + 0xe04b1f1200000000, 0xed502bdb00000000, 0x16a6389c00000000, + 0xb660329200000000, 0x4d9621d500000000, 0x408d151c00000000, + 0xbb7b065b00000000, 0x367a19aa00000000, 0xcd8c0aed00000000, + 0xc0973e2400000000, 0x3b612d6300000000, 0x9ba7276d00000000, + 0x6051342a00000000, 0x6d4a00e300000000, 0x96bc13a400000000, + 0x2dc715ff00000000, 0xd63106b800000000, 0xdb2a327100000000, + 0x20dc213600000000, 0x801a2b3800000000, 0x7bec387f00000000, + 0x76f70cb600000000, 0x8d011ff100000000, 0x2df2438f00000000, + 0xd60450c800000000, 0xdb1f640100000000, 0x20e9774600000000, + 0x802f7d4800000000, 0x7bd96e0f00000000, 0x76c25ac600000000, + 0x8d34498100000000, 0x364f4fda00000000, 0xcdb95c9d00000000, + 0xc0a2685400000000, 0x3b547b1300000000, 0x9b92711d00000000, + 0x6064625a00000000, 0x6d7f569300000000, 0x968945d400000000, + 0x1b885a2500000000, 0xe07e496200000000, 0xed657dab00000000, + 0x16936eec00000000, 0xb65564e200000000, 0x4da377a500000000, + 0x40b8436c00000000, 0xbb4e502b00000000, 0x0035567000000000, + 0xfbc3453700000000, 0xf6d871fe00000000, 0x0d2e62b900000000, + 0xade868b700000000, 0x561e7bf000000000, 0x5b054f3900000000, + 0xa0f35c7e00000000, 0x1be2f6c500000000, 0xe014e58200000000, + 0xed0fd14b00000000, 0x16f9c20c00000000, 0xb63fc80200000000, + 0x4dc9db4500000000, 0x40d2ef8c00000000, 0xbb24fccb00000000, + 0x005ffa9000000000, 0xfba9e9d700000000, 0xf6b2dd1e00000000, + 0x0d44ce5900000000, 0xad82c45700000000, 0x5674d71000000000, + 0x5b6fe3d900000000, 0xa099f09e00000000, 0x2d98ef6f00000000, + 0xd66efc2800000000, 0xdb75c8e100000000, 0x2083dba600000000, + 0x8045d1a800000000, 0x7bb3c2ef00000000, 0x76a8f62600000000, + 0x8d5ee56100000000, 0x3625e33a00000000, 0xcdd3f07d00000000, + 0xc0c8c4b400000000, 0x3b3ed7f300000000, 0x9bf8ddfd00000000, + 0x600eceba00000000, 0x6d15fa7300000000, 0x96e3e93400000000, + 0x3610b54a00000000, 0xcde6a60d00000000, 0xc0fd92c400000000, + 0x3b0b818300000000, 0x9bcd8b8d00000000, 0x603b98ca00000000, + 0x6d20ac0300000000, 0x96d6bf4400000000, 0x2dadb91f00000000, + 0xd65baa5800000000, 0xdb409e9100000000, 0x20b68dd600000000, + 0x807087d800000000, 0x7b86949f00000000, 0x769da05600000000, + 0x8d6bb31100000000, 0x006aace000000000, 0xfb9cbfa700000000, + 0xf6878b6e00000000, 0x0d71982900000000, 0xadb7922700000000, + 0x5641816000000000, 0x5b5ab5a900000000, 0xa0aca6ee00000000, + 0x1bd7a0b500000000, 0xe021b3f200000000, 0xed3a873b00000000, + 0x16cc947c00000000, 0xb60a9e7200000000, 0x4dfc8d3500000000, + 0x40e7b9fc00000000, 0xbb11aabb00000000, 0x77c29c5000000000, + 0x8c348f1700000000, 0x812fbbde00000000, 0x7ad9a89900000000, + 0xda1fa29700000000, 0x21e9b1d000000000, 0x2cf2851900000000, + 0xd704965e00000000, 0x6c7f900500000000, 0x9789834200000000, + 0x9a92b78b00000000, 0x6164a4cc00000000, 0xc1a2aec200000000, + 0x3a54bd8500000000, 0x374f894c00000000, 0xccb99a0b00000000, + 0x41b885fa00000000, 0xba4e96bd00000000, 0xb755a27400000000, + 0x4ca3b13300000000, 0xec65bb3d00000000, 0x1793a87a00000000, + 0x1a889cb300000000, 0xe17e8ff400000000, 0x5a0589af00000000, + 0xa1f39ae800000000, 0xace8ae2100000000, 0x571ebd6600000000, + 0xf7d8b76800000000, 0x0c2ea42f00000000, 0x013590e600000000, + 0xfac383a100000000, 0x5a30dfdf00000000, 0xa1c6cc9800000000, + 0xacddf85100000000, 0x572beb1600000000, 0xf7ede11800000000, + 0x0c1bf25f00000000, 0x0100c69600000000, 0xfaf6d5d100000000, + 0x418dd38a00000000, 0xba7bc0cd00000000, 0xb760f40400000000, + 0x4c96e74300000000, 0xec50ed4d00000000, 0x17a6fe0a00000000, + 0x1abdcac300000000, 0xe14bd98400000000, 0x6c4ac67500000000, + 0x97bcd53200000000, 0x9aa7e1fb00000000, 0x6151f2bc00000000, + 0xc197f8b200000000, 0x3a61ebf500000000, 0x377adf3c00000000, + 0xcc8ccc7b00000000, 0x77f7ca2000000000, 0x8c01d96700000000, + 0x811aedae00000000, 0x7aecfee900000000, 0xda2af4e700000000, + 0x21dce7a000000000, 0x2cc7d36900000000, 0xd731c02e00000000, + 0x6c206a9500000000, 0x97d679d200000000, 0x9acd4d1b00000000, + 0x613b5e5c00000000, 0xc1fd545200000000, 0x3a0b471500000000, + 0x371073dc00000000, 0xcce6609b00000000, 0x779d66c000000000, + 0x8c6b758700000000, 0x8170414e00000000, 0x7a86520900000000, + 0xda40580700000000, 0x21b64b4000000000, 0x2cad7f8900000000, + 0xd75b6cce00000000, 0x5a5a733f00000000, 0xa1ac607800000000, + 0xacb754b100000000, 0x574147f600000000, 0xf7874df800000000, + 0x0c715ebf00000000, 0x016a6a7600000000, 0xfa9c793100000000, + 0x41e77f6a00000000, 0xba116c2d00000000, 0xb70a58e400000000, + 0x4cfc4ba300000000, 0xec3a41ad00000000, 0x17cc52ea00000000, + 0x1ad7662300000000, 0xe121756400000000, 0x41d2291a00000000, + 0xba243a5d00000000, 0xb73f0e9400000000, 0x4cc91dd300000000, + 0xec0f17dd00000000, 0x17f9049a00000000, 0x1ae2305300000000, + 0xe114231400000000, 0x5a6f254f00000000, 0xa199360800000000, + 0xac8202c100000000, 0x5774118600000000, 0xf7b21b8800000000, + 0x0c4408cf00000000, 0x015f3c0600000000, 0xfaa92f4100000000, + 0x77a830b000000000, 0x8c5e23f700000000, 0x8145173e00000000, + 0x7ab3047900000000, 0xda750e7700000000, 0x21831d3000000000, + 0x2c9829f900000000, 0xd76e3abe00000000, 0x6c153ce500000000, + 0x97e32fa200000000, 0x9af81b6b00000000, 0x610e082c00000000, + 0xc1c8022200000000, 0x3a3e116500000000, 0x372525ac00000000, + 0xccd336eb00000000}, + {0x0000000000000000, 0x6238282a00000000, 0xc470505400000000, + 0xa648787e00000000, 0x88e1a0a800000000, 0xead9888200000000, + 0x4c91f0fc00000000, 0x2ea9d8d600000000, 0x51c5308a00000000, + 0x33fd18a000000000, 0x95b560de00000000, 0xf78d48f400000000, + 0xd924902200000000, 0xbb1cb80800000000, 0x1d54c07600000000, + 0x7f6ce85c00000000, 0xe38c10cf00000000, 0x81b438e500000000, + 0x27fc409b00000000, 0x45c468b100000000, 0x6b6db06700000000, + 0x0955984d00000000, 0xaf1de03300000000, 0xcd25c81900000000, + 0xb249204500000000, 0xd071086f00000000, 0x7639701100000000, + 0x1401583b00000000, 0x3aa880ed00000000, 0x5890a8c700000000, + 0xfed8d0b900000000, 0x9ce0f89300000000, 0x871f504500000000, + 0xe527786f00000000, 0x436f001100000000, 0x2157283b00000000, + 0x0ffef0ed00000000, 0x6dc6d8c700000000, 0xcb8ea0b900000000, + 0xa9b6889300000000, 0xd6da60cf00000000, 0xb4e248e500000000, + 0x12aa309b00000000, 0x709218b100000000, 0x5e3bc06700000000, + 0x3c03e84d00000000, 0x9a4b903300000000, 0xf873b81900000000, + 0x6493408a00000000, 0x06ab68a000000000, 0xa0e310de00000000, + 0xc2db38f400000000, 0xec72e02200000000, 0x8e4ac80800000000, + 0x2802b07600000000, 0x4a3a985c00000000, 0x3556700000000000, + 0x576e582a00000000, 0xf126205400000000, 0x931e087e00000000, + 0xbdb7d0a800000000, 0xdf8ff88200000000, 0x79c780fc00000000, + 0x1bffa8d600000000, 0x0e3fa08a00000000, 0x6c0788a000000000, + 0xca4ff0de00000000, 0xa877d8f400000000, 0x86de002200000000, + 0xe4e6280800000000, 0x42ae507600000000, 0x2096785c00000000, + 0x5ffa900000000000, 0x3dc2b82a00000000, 0x9b8ac05400000000, + 0xf9b2e87e00000000, 0xd71b30a800000000, 0xb523188200000000, + 0x136b60fc00000000, 0x715348d600000000, 0xedb3b04500000000, + 0x8f8b986f00000000, 0x29c3e01100000000, 0x4bfbc83b00000000, + 0x655210ed00000000, 0x076a38c700000000, 0xa12240b900000000, + 0xc31a689300000000, 0xbc7680cf00000000, 0xde4ea8e500000000, + 0x7806d09b00000000, 0x1a3ef8b100000000, 0x3497206700000000, + 0x56af084d00000000, 0xf0e7703300000000, 0x92df581900000000, + 0x8920f0cf00000000, 0xeb18d8e500000000, 0x4d50a09b00000000, + 0x2f6888b100000000, 0x01c1506700000000, 0x63f9784d00000000, + 0xc5b1003300000000, 0xa789281900000000, 0xd8e5c04500000000, + 0xbadde86f00000000, 0x1c95901100000000, 0x7eadb83b00000000, + 0x500460ed00000000, 0x323c48c700000000, 0x947430b900000000, + 0xf64c189300000000, 0x6aace00000000000, 0x0894c82a00000000, + 0xaedcb05400000000, 0xcce4987e00000000, 0xe24d40a800000000, + 0x8075688200000000, 0x263d10fc00000000, 0x440538d600000000, + 0x3b69d08a00000000, 0x5951f8a000000000, 0xff1980de00000000, + 0x9d21a8f400000000, 0xb388702200000000, 0xd1b0580800000000, + 0x77f8207600000000, 0x15c0085c00000000, 0x5d7831ce00000000, + 0x3f4019e400000000, 0x9908619a00000000, 0xfb3049b000000000, + 0xd599916600000000, 0xb7a1b94c00000000, 0x11e9c13200000000, + 0x73d1e91800000000, 0x0cbd014400000000, 0x6e85296e00000000, + 0xc8cd511000000000, 0xaaf5793a00000000, 0x845ca1ec00000000, + 0xe66489c600000000, 0x402cf1b800000000, 0x2214d99200000000, + 0xbef4210100000000, 0xdccc092b00000000, 0x7a84715500000000, + 0x18bc597f00000000, 0x361581a900000000, 0x542da98300000000, + 0xf265d1fd00000000, 0x905df9d700000000, 0xef31118b00000000, + 0x8d0939a100000000, 0x2b4141df00000000, 0x497969f500000000, + 0x67d0b12300000000, 0x05e8990900000000, 0xa3a0e17700000000, + 0xc198c95d00000000, 0xda67618b00000000, 0xb85f49a100000000, + 0x1e1731df00000000, 0x7c2f19f500000000, 0x5286c12300000000, + 0x30bee90900000000, 0x96f6917700000000, 0xf4ceb95d00000000, + 0x8ba2510100000000, 0xe99a792b00000000, 0x4fd2015500000000, + 0x2dea297f00000000, 0x0343f1a900000000, 0x617bd98300000000, + 0xc733a1fd00000000, 0xa50b89d700000000, 0x39eb714400000000, + 0x5bd3596e00000000, 0xfd9b211000000000, 0x9fa3093a00000000, + 0xb10ad1ec00000000, 0xd332f9c600000000, 0x757a81b800000000, + 0x1742a99200000000, 0x682e41ce00000000, 0x0a1669e400000000, + 0xac5e119a00000000, 0xce6639b000000000, 0xe0cfe16600000000, + 0x82f7c94c00000000, 0x24bfb13200000000, 0x4687991800000000, + 0x5347914400000000, 0x317fb96e00000000, 0x9737c11000000000, + 0xf50fe93a00000000, 0xdba631ec00000000, 0xb99e19c600000000, + 0x1fd661b800000000, 0x7dee499200000000, 0x0282a1ce00000000, + 0x60ba89e400000000, 0xc6f2f19a00000000, 0xa4cad9b000000000, + 0x8a63016600000000, 0xe85b294c00000000, 0x4e13513200000000, + 0x2c2b791800000000, 0xb0cb818b00000000, 0xd2f3a9a100000000, + 0x74bbd1df00000000, 0x1683f9f500000000, 0x382a212300000000, + 0x5a12090900000000, 0xfc5a717700000000, 0x9e62595d00000000, + 0xe10eb10100000000, 0x8336992b00000000, 0x257ee15500000000, + 0x4746c97f00000000, 0x69ef11a900000000, 0x0bd7398300000000, + 0xad9f41fd00000000, 0xcfa769d700000000, 0xd458c10100000000, + 0xb660e92b00000000, 0x1028915500000000, 0x7210b97f00000000, + 0x5cb961a900000000, 0x3e81498300000000, 0x98c931fd00000000, + 0xfaf119d700000000, 0x859df18b00000000, 0xe7a5d9a100000000, + 0x41eda1df00000000, 0x23d589f500000000, 0x0d7c512300000000, + 0x6f44790900000000, 0xc90c017700000000, 0xab34295d00000000, + 0x37d4d1ce00000000, 0x55ecf9e400000000, 0xf3a4819a00000000, + 0x919ca9b000000000, 0xbf35716600000000, 0xdd0d594c00000000, + 0x7b45213200000000, 0x197d091800000000, 0x6611e14400000000, + 0x0429c96e00000000, 0xa261b11000000000, 0xc059993a00000000, + 0xeef041ec00000000, 0x8cc869c600000000, 0x2a8011b800000000, + 0x48b8399200000000}, + {0x0000000000000000, 0x4c2896a300000000, 0xd9565d9c00000000, + 0x957ecb3f00000000, 0xf3abcbe300000000, 0xbf835d4000000000, + 0x2afd967f00000000, 0x66d500dc00000000, 0xa751e61c00000000, + 0xeb7970bf00000000, 0x7e07bb8000000000, 0x322f2d2300000000, + 0x54fa2dff00000000, 0x18d2bb5c00000000, 0x8dac706300000000, + 0xc184e6c000000000, 0x4ea3cc3900000000, 0x028b5a9a00000000, + 0x97f591a500000000, 0xdbdd070600000000, 0xbd0807da00000000, + 0xf120917900000000, 0x645e5a4600000000, 0x2876cce500000000, + 0xe9f22a2500000000, 0xa5dabc8600000000, 0x30a477b900000000, + 0x7c8ce11a00000000, 0x1a59e1c600000000, 0x5671776500000000, + 0xc30fbc5a00000000, 0x8f272af900000000, 0x9c46997300000000, + 0xd06e0fd000000000, 0x4510c4ef00000000, 0x0938524c00000000, + 0x6fed529000000000, 0x23c5c43300000000, 0xb6bb0f0c00000000, + 0xfa9399af00000000, 0x3b177f6f00000000, 0x773fe9cc00000000, + 0xe24122f300000000, 0xae69b45000000000, 0xc8bcb48c00000000, + 0x8494222f00000000, 0x11eae91000000000, 0x5dc27fb300000000, + 0xd2e5554a00000000, 0x9ecdc3e900000000, 0x0bb308d600000000, + 0x479b9e7500000000, 0x214e9ea900000000, 0x6d66080a00000000, + 0xf818c33500000000, 0xb430559600000000, 0x75b4b35600000000, + 0x399c25f500000000, 0xace2eeca00000000, 0xe0ca786900000000, + 0x861f78b500000000, 0xca37ee1600000000, 0x5f49252900000000, + 0x1361b38a00000000, 0x388d32e700000000, 0x74a5a44400000000, + 0xe1db6f7b00000000, 0xadf3f9d800000000, 0xcb26f90400000000, + 0x870e6fa700000000, 0x1270a49800000000, 0x5e58323b00000000, + 0x9fdcd4fb00000000, 0xd3f4425800000000, 0x468a896700000000, + 0x0aa21fc400000000, 0x6c771f1800000000, 0x205f89bb00000000, + 0xb521428400000000, 0xf909d42700000000, 0x762efede00000000, + 0x3a06687d00000000, 0xaf78a34200000000, 0xe35035e100000000, + 0x8585353d00000000, 0xc9ada39e00000000, 0x5cd368a100000000, + 0x10fbfe0200000000, 0xd17f18c200000000, 0x9d578e6100000000, + 0x0829455e00000000, 0x4401d3fd00000000, 0x22d4d32100000000, + 0x6efc458200000000, 0xfb828ebd00000000, 0xb7aa181e00000000, + 0xa4cbab9400000000, 0xe8e33d3700000000, 0x7d9df60800000000, + 0x31b560ab00000000, 0x5760607700000000, 0x1b48f6d400000000, + 0x8e363deb00000000, 0xc21eab4800000000, 0x039a4d8800000000, + 0x4fb2db2b00000000, 0xdacc101400000000, 0x96e486b700000000, + 0xf031866b00000000, 0xbc1910c800000000, 0x2967dbf700000000, + 0x654f4d5400000000, 0xea6867ad00000000, 0xa640f10e00000000, + 0x333e3a3100000000, 0x7f16ac9200000000, 0x19c3ac4e00000000, + 0x55eb3aed00000000, 0xc095f1d200000000, 0x8cbd677100000000, + 0x4d3981b100000000, 0x0111171200000000, 0x946fdc2d00000000, + 0xd8474a8e00000000, 0xbe924a5200000000, 0xf2badcf100000000, + 0x67c417ce00000000, 0x2bec816d00000000, 0x311c141500000000, + 0x7d3482b600000000, 0xe84a498900000000, 0xa462df2a00000000, + 0xc2b7dff600000000, 0x8e9f495500000000, 0x1be1826a00000000, + 0x57c914c900000000, 0x964df20900000000, 0xda6564aa00000000, + 0x4f1baf9500000000, 0x0333393600000000, 0x65e639ea00000000, + 0x29ceaf4900000000, 0xbcb0647600000000, 0xf098f2d500000000, + 0x7fbfd82c00000000, 0x33974e8f00000000, 0xa6e985b000000000, + 0xeac1131300000000, 0x8c1413cf00000000, 0xc03c856c00000000, + 0x55424e5300000000, 0x196ad8f000000000, 0xd8ee3e3000000000, + 0x94c6a89300000000, 0x01b863ac00000000, 0x4d90f50f00000000, + 0x2b45f5d300000000, 0x676d637000000000, 0xf213a84f00000000, + 0xbe3b3eec00000000, 0xad5a8d6600000000, 0xe1721bc500000000, + 0x740cd0fa00000000, 0x3824465900000000, 0x5ef1468500000000, + 0x12d9d02600000000, 0x87a71b1900000000, 0xcb8f8dba00000000, + 0x0a0b6b7a00000000, 0x4623fdd900000000, 0xd35d36e600000000, + 0x9f75a04500000000, 0xf9a0a09900000000, 0xb588363a00000000, + 0x20f6fd0500000000, 0x6cde6ba600000000, 0xe3f9415f00000000, + 0xafd1d7fc00000000, 0x3aaf1cc300000000, 0x76878a6000000000, + 0x10528abc00000000, 0x5c7a1c1f00000000, 0xc904d72000000000, + 0x852c418300000000, 0x44a8a74300000000, 0x088031e000000000, + 0x9dfefadf00000000, 0xd1d66c7c00000000, 0xb7036ca000000000, + 0xfb2bfa0300000000, 0x6e55313c00000000, 0x227da79f00000000, + 0x099126f200000000, 0x45b9b05100000000, 0xd0c77b6e00000000, + 0x9cefedcd00000000, 0xfa3aed1100000000, 0xb6127bb200000000, + 0x236cb08d00000000, 0x6f44262e00000000, 0xaec0c0ee00000000, + 0xe2e8564d00000000, 0x77969d7200000000, 0x3bbe0bd100000000, + 0x5d6b0b0d00000000, 0x11439dae00000000, 0x843d569100000000, + 0xc815c03200000000, 0x4732eacb00000000, 0x0b1a7c6800000000, + 0x9e64b75700000000, 0xd24c21f400000000, 0xb499212800000000, + 0xf8b1b78b00000000, 0x6dcf7cb400000000, 0x21e7ea1700000000, + 0xe0630cd700000000, 0xac4b9a7400000000, 0x3935514b00000000, + 0x751dc7e800000000, 0x13c8c73400000000, 0x5fe0519700000000, + 0xca9e9aa800000000, 0x86b60c0b00000000, 0x95d7bf8100000000, + 0xd9ff292200000000, 0x4c81e21d00000000, 0x00a974be00000000, + 0x667c746200000000, 0x2a54e2c100000000, 0xbf2a29fe00000000, + 0xf302bf5d00000000, 0x3286599d00000000, 0x7eaecf3e00000000, + 0xebd0040100000000, 0xa7f892a200000000, 0xc12d927e00000000, + 0x8d0504dd00000000, 0x187bcfe200000000, 0x5453594100000000, + 0xdb7473b800000000, 0x975ce51b00000000, 0x02222e2400000000, + 0x4e0ab88700000000, 0x28dfb85b00000000, 0x64f72ef800000000, + 0xf189e5c700000000, 0xbda1736400000000, 0x7c2595a400000000, + 0x300d030700000000, 0xa573c83800000000, 0xe95b5e9b00000000, + 0x8f8e5e4700000000, 0xc3a6c8e400000000, 0x56d803db00000000, + 0x1af0957800000000}, + {0x0000000000000000, 0x939bc97f00000000, 0x263793ff00000000, + 0xb5ac5a8000000000, 0x0d68572400000000, 0x9ef39e5b00000000, + 0x2b5fc4db00000000, 0xb8c40da400000000, 0x1ad0ae4800000000, + 0x894b673700000000, 0x3ce73db700000000, 0xaf7cf4c800000000, + 0x17b8f96c00000000, 0x8423301300000000, 0x318f6a9300000000, + 0xa214a3ec00000000, 0x34a05d9100000000, 0xa73b94ee00000000, + 0x1297ce6e00000000, 0x810c071100000000, 0x39c80ab500000000, + 0xaa53c3ca00000000, 0x1fff994a00000000, 0x8c64503500000000, + 0x2e70f3d900000000, 0xbdeb3aa600000000, 0x0847602600000000, + 0x9bdca95900000000, 0x2318a4fd00000000, 0xb0836d8200000000, + 0x052f370200000000, 0x96b4fe7d00000000, 0x2946caf900000000, + 0xbadd038600000000, 0x0f71590600000000, 0x9cea907900000000, + 0x242e9ddd00000000, 0xb7b554a200000000, 0x02190e2200000000, + 0x9182c75d00000000, 0x339664b100000000, 0xa00dadce00000000, + 0x15a1f74e00000000, 0x863a3e3100000000, 0x3efe339500000000, + 0xad65faea00000000, 0x18c9a06a00000000, 0x8b52691500000000, + 0x1de6976800000000, 0x8e7d5e1700000000, 0x3bd1049700000000, + 0xa84acde800000000, 0x108ec04c00000000, 0x8315093300000000, + 0x36b953b300000000, 0xa5229acc00000000, 0x0736392000000000, + 0x94adf05f00000000, 0x2101aadf00000000, 0xb29a63a000000000, + 0x0a5e6e0400000000, 0x99c5a77b00000000, 0x2c69fdfb00000000, + 0xbff2348400000000, 0x138ae52800000000, 0x80112c5700000000, + 0x35bd76d700000000, 0xa626bfa800000000, 0x1ee2b20c00000000, + 0x8d797b7300000000, 0x38d521f300000000, 0xab4ee88c00000000, + 0x095a4b6000000000, 0x9ac1821f00000000, 0x2f6dd89f00000000, + 0xbcf611e000000000, 0x04321c4400000000, 0x97a9d53b00000000, + 0x22058fbb00000000, 0xb19e46c400000000, 0x272ab8b900000000, + 0xb4b171c600000000, 0x011d2b4600000000, 0x9286e23900000000, + 0x2a42ef9d00000000, 0xb9d926e200000000, 0x0c757c6200000000, + 0x9feeb51d00000000, 0x3dfa16f100000000, 0xae61df8e00000000, + 0x1bcd850e00000000, 0x88564c7100000000, 0x309241d500000000, + 0xa30988aa00000000, 0x16a5d22a00000000, 0x853e1b5500000000, + 0x3acc2fd100000000, 0xa957e6ae00000000, 0x1cfbbc2e00000000, + 0x8f60755100000000, 0x37a478f500000000, 0xa43fb18a00000000, + 0x1193eb0a00000000, 0x8208227500000000, 0x201c819900000000, + 0xb38748e600000000, 0x062b126600000000, 0x95b0db1900000000, + 0x2d74d6bd00000000, 0xbeef1fc200000000, 0x0b43454200000000, + 0x98d88c3d00000000, 0x0e6c724000000000, 0x9df7bb3f00000000, + 0x285be1bf00000000, 0xbbc028c000000000, 0x0304256400000000, + 0x909fec1b00000000, 0x2533b69b00000000, 0xb6a87fe400000000, + 0x14bcdc0800000000, 0x8727157700000000, 0x328b4ff700000000, + 0xa110868800000000, 0x19d48b2c00000000, 0x8a4f425300000000, + 0x3fe318d300000000, 0xac78d1ac00000000, 0x2614cb5100000000, + 0xb58f022e00000000, 0x002358ae00000000, 0x93b891d100000000, + 0x2b7c9c7500000000, 0xb8e7550a00000000, 0x0d4b0f8a00000000, + 0x9ed0c6f500000000, 0x3cc4651900000000, 0xaf5fac6600000000, + 0x1af3f6e600000000, 0x89683f9900000000, 0x31ac323d00000000, + 0xa237fb4200000000, 0x179ba1c200000000, 0x840068bd00000000, + 0x12b496c000000000, 0x812f5fbf00000000, 0x3483053f00000000, + 0xa718cc4000000000, 0x1fdcc1e400000000, 0x8c47089b00000000, + 0x39eb521b00000000, 0xaa709b6400000000, 0x0864388800000000, + 0x9bfff1f700000000, 0x2e53ab7700000000, 0xbdc8620800000000, + 0x050c6fac00000000, 0x9697a6d300000000, 0x233bfc5300000000, + 0xb0a0352c00000000, 0x0f5201a800000000, 0x9cc9c8d700000000, + 0x2965925700000000, 0xbafe5b2800000000, 0x023a568c00000000, + 0x91a19ff300000000, 0x240dc57300000000, 0xb7960c0c00000000, + 0x1582afe000000000, 0x8619669f00000000, 0x33b53c1f00000000, + 0xa02ef56000000000, 0x18eaf8c400000000, 0x8b7131bb00000000, + 0x3edd6b3b00000000, 0xad46a24400000000, 0x3bf25c3900000000, + 0xa869954600000000, 0x1dc5cfc600000000, 0x8e5e06b900000000, + 0x369a0b1d00000000, 0xa501c26200000000, 0x10ad98e200000000, + 0x8336519d00000000, 0x2122f27100000000, 0xb2b93b0e00000000, + 0x0715618e00000000, 0x948ea8f100000000, 0x2c4aa55500000000, + 0xbfd16c2a00000000, 0x0a7d36aa00000000, 0x99e6ffd500000000, + 0x359e2e7900000000, 0xa605e70600000000, 0x13a9bd8600000000, + 0x803274f900000000, 0x38f6795d00000000, 0xab6db02200000000, + 0x1ec1eaa200000000, 0x8d5a23dd00000000, 0x2f4e803100000000, + 0xbcd5494e00000000, 0x097913ce00000000, 0x9ae2dab100000000, + 0x2226d71500000000, 0xb1bd1e6a00000000, 0x041144ea00000000, + 0x978a8d9500000000, 0x013e73e800000000, 0x92a5ba9700000000, + 0x2709e01700000000, 0xb492296800000000, 0x0c5624cc00000000, + 0x9fcdedb300000000, 0x2a61b73300000000, 0xb9fa7e4c00000000, + 0x1beedda000000000, 0x887514df00000000, 0x3dd94e5f00000000, + 0xae42872000000000, 0x16868a8400000000, 0x851d43fb00000000, + 0x30b1197b00000000, 0xa32ad00400000000, 0x1cd8e48000000000, + 0x8f432dff00000000, 0x3aef777f00000000, 0xa974be0000000000, + 0x11b0b3a400000000, 0x822b7adb00000000, 0x3787205b00000000, + 0xa41ce92400000000, 0x06084ac800000000, 0x959383b700000000, + 0x203fd93700000000, 0xb3a4104800000000, 0x0b601dec00000000, + 0x98fbd49300000000, 0x2d578e1300000000, 0xbecc476c00000000, + 0x2878b91100000000, 0xbbe3706e00000000, 0x0e4f2aee00000000, + 0x9dd4e39100000000, 0x2510ee3500000000, 0xb68b274a00000000, + 0x03277dca00000000, 0x90bcb4b500000000, 0x32a8175900000000, + 0xa133de2600000000, 0x149f84a600000000, 0x87044dd900000000, + 0x3fc0407d00000000, 0xac5b890200000000, 0x19f7d38200000000, + 0x8a6c1afd00000000}, + {0x0000000000000000, 0x650b796900000000, 0xca16f2d200000000, + 0xaf1d8bbb00000000, 0xd52b957e00000000, 0xb020ec1700000000, + 0x1f3d67ac00000000, 0x7a361ec500000000, 0xaa572afd00000000, + 0xcf5c539400000000, 0x6041d82f00000000, 0x054aa14600000000, + 0x7f7cbf8300000000, 0x1a77c6ea00000000, 0xb56a4d5100000000, + 0xd061343800000000, 0x15a9252100000000, 0x70a25c4800000000, + 0xdfbfd7f300000000, 0xbab4ae9a00000000, 0xc082b05f00000000, + 0xa589c93600000000, 0x0a94428d00000000, 0x6f9f3be400000000, + 0xbffe0fdc00000000, 0xdaf576b500000000, 0x75e8fd0e00000000, + 0x10e3846700000000, 0x6ad59aa200000000, 0x0fdee3cb00000000, + 0xa0c3687000000000, 0xc5c8111900000000, 0x2a524b4200000000, + 0x4f59322b00000000, 0xe044b99000000000, 0x854fc0f900000000, + 0xff79de3c00000000, 0x9a72a75500000000, 0x356f2cee00000000, + 0x5064558700000000, 0x800561bf00000000, 0xe50e18d600000000, + 0x4a13936d00000000, 0x2f18ea0400000000, 0x552ef4c100000000, + 0x30258da800000000, 0x9f38061300000000, 0xfa337f7a00000000, + 0x3ffb6e6300000000, 0x5af0170a00000000, 0xf5ed9cb100000000, + 0x90e6e5d800000000, 0xead0fb1d00000000, 0x8fdb827400000000, + 0x20c609cf00000000, 0x45cd70a600000000, 0x95ac449e00000000, + 0xf0a73df700000000, 0x5fbab64c00000000, 0x3ab1cf2500000000, + 0x4087d1e000000000, 0x258ca88900000000, 0x8a91233200000000, + 0xef9a5a5b00000000, 0x54a4968400000000, 0x31afefed00000000, + 0x9eb2645600000000, 0xfbb91d3f00000000, 0x818f03fa00000000, + 0xe4847a9300000000, 0x4b99f12800000000, 0x2e92884100000000, + 0xfef3bc7900000000, 0x9bf8c51000000000, 0x34e54eab00000000, + 0x51ee37c200000000, 0x2bd8290700000000, 0x4ed3506e00000000, + 0xe1cedbd500000000, 0x84c5a2bc00000000, 0x410db3a500000000, + 0x2406cacc00000000, 0x8b1b417700000000, 0xee10381e00000000, + 0x942626db00000000, 0xf12d5fb200000000, 0x5e30d40900000000, + 0x3b3bad6000000000, 0xeb5a995800000000, 0x8e51e03100000000, + 0x214c6b8a00000000, 0x444712e300000000, 0x3e710c2600000000, + 0x5b7a754f00000000, 0xf467fef400000000, 0x916c879d00000000, + 0x7ef6ddc600000000, 0x1bfda4af00000000, 0xb4e02f1400000000, + 0xd1eb567d00000000, 0xabdd48b800000000, 0xced631d100000000, + 0x61cbba6a00000000, 0x04c0c30300000000, 0xd4a1f73b00000000, + 0xb1aa8e5200000000, 0x1eb705e900000000, 0x7bbc7c8000000000, + 0x018a624500000000, 0x64811b2c00000000, 0xcb9c909700000000, + 0xae97e9fe00000000, 0x6b5ff8e700000000, 0x0e54818e00000000, + 0xa1490a3500000000, 0xc442735c00000000, 0xbe746d9900000000, + 0xdb7f14f000000000, 0x74629f4b00000000, 0x1169e62200000000, + 0xc108d21a00000000, 0xa403ab7300000000, 0x0b1e20c800000000, + 0x6e1559a100000000, 0x1423476400000000, 0x71283e0d00000000, + 0xde35b5b600000000, 0xbb3eccdf00000000, 0xe94e5cd200000000, + 0x8c4525bb00000000, 0x2358ae0000000000, 0x4653d76900000000, + 0x3c65c9ac00000000, 0x596eb0c500000000, 0xf6733b7e00000000, + 0x9378421700000000, 0x4319762f00000000, 0x26120f4600000000, + 0x890f84fd00000000, 0xec04fd9400000000, 0x9632e35100000000, + 0xf3399a3800000000, 0x5c24118300000000, 0x392f68ea00000000, + 0xfce779f300000000, 0x99ec009a00000000, 0x36f18b2100000000, + 0x53faf24800000000, 0x29ccec8d00000000, 0x4cc795e400000000, + 0xe3da1e5f00000000, 0x86d1673600000000, 0x56b0530e00000000, + 0x33bb2a6700000000, 0x9ca6a1dc00000000, 0xf9add8b500000000, + 0x839bc67000000000, 0xe690bf1900000000, 0x498d34a200000000, + 0x2c864dcb00000000, 0xc31c179000000000, 0xa6176ef900000000, + 0x090ae54200000000, 0x6c019c2b00000000, 0x163782ee00000000, + 0x733cfb8700000000, 0xdc21703c00000000, 0xb92a095500000000, + 0x694b3d6d00000000, 0x0c40440400000000, 0xa35dcfbf00000000, + 0xc656b6d600000000, 0xbc60a81300000000, 0xd96bd17a00000000, + 0x76765ac100000000, 0x137d23a800000000, 0xd6b532b100000000, + 0xb3be4bd800000000, 0x1ca3c06300000000, 0x79a8b90a00000000, + 0x039ea7cf00000000, 0x6695dea600000000, 0xc988551d00000000, + 0xac832c7400000000, 0x7ce2184c00000000, 0x19e9612500000000, + 0xb6f4ea9e00000000, 0xd3ff93f700000000, 0xa9c98d3200000000, + 0xccc2f45b00000000, 0x63df7fe000000000, 0x06d4068900000000, + 0xbdeaca5600000000, 0xd8e1b33f00000000, 0x77fc388400000000, + 0x12f741ed00000000, 0x68c15f2800000000, 0x0dca264100000000, + 0xa2d7adfa00000000, 0xc7dcd49300000000, 0x17bde0ab00000000, + 0x72b699c200000000, 0xddab127900000000, 0xb8a06b1000000000, + 0xc29675d500000000, 0xa79d0cbc00000000, 0x0880870700000000, + 0x6d8bfe6e00000000, 0xa843ef7700000000, 0xcd48961e00000000, + 0x62551da500000000, 0x075e64cc00000000, 0x7d687a0900000000, + 0x1863036000000000, 0xb77e88db00000000, 0xd275f1b200000000, + 0x0214c58a00000000, 0x671fbce300000000, 0xc802375800000000, + 0xad094e3100000000, 0xd73f50f400000000, 0xb234299d00000000, + 0x1d29a22600000000, 0x7822db4f00000000, 0x97b8811400000000, + 0xf2b3f87d00000000, 0x5dae73c600000000, 0x38a50aaf00000000, + 0x4293146a00000000, 0x27986d0300000000, 0x8885e6b800000000, + 0xed8e9fd100000000, 0x3defabe900000000, 0x58e4d28000000000, + 0xf7f9593b00000000, 0x92f2205200000000, 0xe8c43e9700000000, + 0x8dcf47fe00000000, 0x22d2cc4500000000, 0x47d9b52c00000000, + 0x8211a43500000000, 0xe71add5c00000000, 0x480756e700000000, + 0x2d0c2f8e00000000, 0x573a314b00000000, 0x3231482200000000, + 0x9d2cc39900000000, 0xf827baf000000000, 0x28468ec800000000, + 0x4d4df7a100000000, 0xe2507c1a00000000, 0x875b057300000000, + 0xfd6d1bb600000000, 0x986662df00000000, 0x377be96400000000, + 0x5270900d00000000}, + {0x0000000000000000, 0xdcecb13d00000000, 0xb8d9637b00000000, + 0x6435d24600000000, 0x70b3c7f600000000, 0xac5f76cb00000000, + 0xc86aa48d00000000, 0x148615b000000000, 0xa160fe3600000000, + 0x7d8c4f0b00000000, 0x19b99d4d00000000, 0xc5552c7000000000, + 0xd1d339c000000000, 0x0d3f88fd00000000, 0x690a5abb00000000, + 0xb5e6eb8600000000, 0x42c1fc6d00000000, 0x9e2d4d5000000000, + 0xfa189f1600000000, 0x26f42e2b00000000, 0x32723b9b00000000, + 0xee9e8aa600000000, 0x8aab58e000000000, 0x5647e9dd00000000, + 0xe3a1025b00000000, 0x3f4db36600000000, 0x5b78612000000000, + 0x8794d01d00000000, 0x9312c5ad00000000, 0x4ffe749000000000, + 0x2bcba6d600000000, 0xf72717eb00000000, 0x8482f9db00000000, + 0x586e48e600000000, 0x3c5b9aa000000000, 0xe0b72b9d00000000, + 0xf4313e2d00000000, 0x28dd8f1000000000, 0x4ce85d5600000000, + 0x9004ec6b00000000, 0x25e207ed00000000, 0xf90eb6d000000000, + 0x9d3b649600000000, 0x41d7d5ab00000000, 0x5551c01b00000000, + 0x89bd712600000000, 0xed88a36000000000, 0x3164125d00000000, + 0xc64305b600000000, 0x1aafb48b00000000, 0x7e9a66cd00000000, + 0xa276d7f000000000, 0xb6f0c24000000000, 0x6a1c737d00000000, + 0x0e29a13b00000000, 0xd2c5100600000000, 0x6723fb8000000000, + 0xbbcf4abd00000000, 0xdffa98fb00000000, 0x031629c600000000, + 0x17903c7600000000, 0xcb7c8d4b00000000, 0xaf495f0d00000000, + 0x73a5ee3000000000, 0x4903826c00000000, 0x95ef335100000000, + 0xf1dae11700000000, 0x2d36502a00000000, 0x39b0459a00000000, + 0xe55cf4a700000000, 0x816926e100000000, 0x5d8597dc00000000, + 0xe8637c5a00000000, 0x348fcd6700000000, 0x50ba1f2100000000, + 0x8c56ae1c00000000, 0x98d0bbac00000000, 0x443c0a9100000000, + 0x2009d8d700000000, 0xfce569ea00000000, 0x0bc27e0100000000, + 0xd72ecf3c00000000, 0xb31b1d7a00000000, 0x6ff7ac4700000000, + 0x7b71b9f700000000, 0xa79d08ca00000000, 0xc3a8da8c00000000, + 0x1f446bb100000000, 0xaaa2803700000000, 0x764e310a00000000, + 0x127be34c00000000, 0xce97527100000000, 0xda1147c100000000, + 0x06fdf6fc00000000, 0x62c824ba00000000, 0xbe24958700000000, + 0xcd817bb700000000, 0x116dca8a00000000, 0x755818cc00000000, + 0xa9b4a9f100000000, 0xbd32bc4100000000, 0x61de0d7c00000000, + 0x05ebdf3a00000000, 0xd9076e0700000000, 0x6ce1858100000000, + 0xb00d34bc00000000, 0xd438e6fa00000000, 0x08d457c700000000, + 0x1c52427700000000, 0xc0bef34a00000000, 0xa48b210c00000000, + 0x7867903100000000, 0x8f4087da00000000, 0x53ac36e700000000, + 0x3799e4a100000000, 0xeb75559c00000000, 0xfff3402c00000000, + 0x231ff11100000000, 0x472a235700000000, 0x9bc6926a00000000, + 0x2e2079ec00000000, 0xf2ccc8d100000000, 0x96f91a9700000000, + 0x4a15abaa00000000, 0x5e93be1a00000000, 0x827f0f2700000000, + 0xe64add6100000000, 0x3aa66c5c00000000, 0x920604d900000000, + 0x4eeab5e400000000, 0x2adf67a200000000, 0xf633d69f00000000, + 0xe2b5c32f00000000, 0x3e59721200000000, 0x5a6ca05400000000, + 0x8680116900000000, 0x3366faef00000000, 0xef8a4bd200000000, + 0x8bbf999400000000, 0x575328a900000000, 0x43d53d1900000000, + 0x9f398c2400000000, 0xfb0c5e6200000000, 0x27e0ef5f00000000, + 0xd0c7f8b400000000, 0x0c2b498900000000, 0x681e9bcf00000000, + 0xb4f22af200000000, 0xa0743f4200000000, 0x7c988e7f00000000, + 0x18ad5c3900000000, 0xc441ed0400000000, 0x71a7068200000000, + 0xad4bb7bf00000000, 0xc97e65f900000000, 0x1592d4c400000000, + 0x0114c17400000000, 0xddf8704900000000, 0xb9cda20f00000000, + 0x6521133200000000, 0x1684fd0200000000, 0xca684c3f00000000, + 0xae5d9e7900000000, 0x72b12f4400000000, 0x66373af400000000, + 0xbadb8bc900000000, 0xdeee598f00000000, 0x0202e8b200000000, + 0xb7e4033400000000, 0x6b08b20900000000, 0x0f3d604f00000000, + 0xd3d1d17200000000, 0xc757c4c200000000, 0x1bbb75ff00000000, + 0x7f8ea7b900000000, 0xa362168400000000, 0x5445016f00000000, + 0x88a9b05200000000, 0xec9c621400000000, 0x3070d32900000000, + 0x24f6c69900000000, 0xf81a77a400000000, 0x9c2fa5e200000000, + 0x40c314df00000000, 0xf525ff5900000000, 0x29c94e6400000000, + 0x4dfc9c2200000000, 0x91102d1f00000000, 0x859638af00000000, + 0x597a899200000000, 0x3d4f5bd400000000, 0xe1a3eae900000000, + 0xdb0586b500000000, 0x07e9378800000000, 0x63dce5ce00000000, + 0xbf3054f300000000, 0xabb6414300000000, 0x775af07e00000000, + 0x136f223800000000, 0xcf83930500000000, 0x7a65788300000000, + 0xa689c9be00000000, 0xc2bc1bf800000000, 0x1e50aac500000000, + 0x0ad6bf7500000000, 0xd63a0e4800000000, 0xb20fdc0e00000000, + 0x6ee36d3300000000, 0x99c47ad800000000, 0x4528cbe500000000, + 0x211d19a300000000, 0xfdf1a89e00000000, 0xe977bd2e00000000, + 0x359b0c1300000000, 0x51aede5500000000, 0x8d426f6800000000, + 0x38a484ee00000000, 0xe44835d300000000, 0x807de79500000000, + 0x5c9156a800000000, 0x4817431800000000, 0x94fbf22500000000, + 0xf0ce206300000000, 0x2c22915e00000000, 0x5f877f6e00000000, + 0x836bce5300000000, 0xe75e1c1500000000, 0x3bb2ad2800000000, + 0x2f34b89800000000, 0xf3d809a500000000, 0x97eddbe300000000, + 0x4b016ade00000000, 0xfee7815800000000, 0x220b306500000000, + 0x463ee22300000000, 0x9ad2531e00000000, 0x8e5446ae00000000, + 0x52b8f79300000000, 0x368d25d500000000, 0xea6194e800000000, + 0x1d46830300000000, 0xc1aa323e00000000, 0xa59fe07800000000, + 0x7973514500000000, 0x6df544f500000000, 0xb119f5c800000000, + 0xd52c278e00000000, 0x09c096b300000000, 0xbc267d3500000000, + 0x60cacc0800000000, 0x04ff1e4e00000000, 0xd813af7300000000, + 0xcc95bac300000000, 0x10790bfe00000000, 0x744cd9b800000000, + 0xa8a0688500000000}}; + +#else /* W == 4 */ + +local const z_crc_t FAR crc_braid_table[][256] = { + {0x00000000, 0x81256527, 0xd93bcc0f, 0x581ea928, 0x69069e5f, + 0xe823fb78, 0xb03d5250, 0x31183777, 0xd20d3cbe, 0x53285999, + 0x0b36f0b1, 0x8a139596, 0xbb0ba2e1, 0x3a2ec7c6, 0x62306eee, + 0xe3150bc9, 0x7f6b7f3d, 0xfe4e1a1a, 0xa650b332, 0x2775d615, + 0x166de162, 0x97488445, 0xcf562d6d, 0x4e73484a, 0xad664383, + 0x2c4326a4, 0x745d8f8c, 0xf578eaab, 0xc460dddc, 0x4545b8fb, + 0x1d5b11d3, 0x9c7e74f4, 0xfed6fe7a, 0x7ff39b5d, 0x27ed3275, + 0xa6c85752, 0x97d06025, 0x16f50502, 0x4eebac2a, 0xcfcec90d, + 0x2cdbc2c4, 0xadfea7e3, 0xf5e00ecb, 0x74c56bec, 0x45dd5c9b, + 0xc4f839bc, 0x9ce69094, 0x1dc3f5b3, 0x81bd8147, 0x0098e460, + 0x58864d48, 0xd9a3286f, 0xe8bb1f18, 0x699e7a3f, 0x3180d317, + 0xb0a5b630, 0x53b0bdf9, 0xd295d8de, 0x8a8b71f6, 0x0bae14d1, + 0x3ab623a6, 0xbb934681, 0xe38defa9, 0x62a88a8e, 0x26dcfab5, + 0xa7f99f92, 0xffe736ba, 0x7ec2539d, 0x4fda64ea, 0xceff01cd, + 0x96e1a8e5, 0x17c4cdc2, 0xf4d1c60b, 0x75f4a32c, 0x2dea0a04, + 0xaccf6f23, 0x9dd75854, 0x1cf23d73, 0x44ec945b, 0xc5c9f17c, + 0x59b78588, 0xd892e0af, 0x808c4987, 0x01a92ca0, 0x30b11bd7, + 0xb1947ef0, 0xe98ad7d8, 0x68afb2ff, 0x8bbab936, 0x0a9fdc11, + 0x52817539, 0xd3a4101e, 0xe2bc2769, 0x6399424e, 0x3b87eb66, + 0xbaa28e41, 0xd80a04cf, 0x592f61e8, 0x0131c8c0, 0x8014ade7, + 0xb10c9a90, 0x3029ffb7, 0x6837569f, 0xe91233b8, 0x0a073871, + 0x8b225d56, 0xd33cf47e, 0x52199159, 0x6301a62e, 0xe224c309, + 0xba3a6a21, 0x3b1f0f06, 0xa7617bf2, 0x26441ed5, 0x7e5ab7fd, + 0xff7fd2da, 0xce67e5ad, 0x4f42808a, 0x175c29a2, 0x96794c85, + 0x756c474c, 0xf449226b, 0xac578b43, 0x2d72ee64, 0x1c6ad913, + 0x9d4fbc34, 0xc551151c, 0x4474703b, 0x4db9f56a, 0xcc9c904d, + 0x94823965, 0x15a75c42, 0x24bf6b35, 0xa59a0e12, 0xfd84a73a, + 0x7ca1c21d, 0x9fb4c9d4, 0x1e91acf3, 0x468f05db, 0xc7aa60fc, + 0xf6b2578b, 0x779732ac, 0x2f899b84, 0xaeacfea3, 0x32d28a57, + 0xb3f7ef70, 0xebe94658, 0x6acc237f, 0x5bd41408, 0xdaf1712f, + 0x82efd807, 0x03cabd20, 0xe0dfb6e9, 0x61fad3ce, 0x39e47ae6, + 0xb8c11fc1, 0x89d928b6, 0x08fc4d91, 0x50e2e4b9, 0xd1c7819e, + 0xb36f0b10, 0x324a6e37, 0x6a54c71f, 0xeb71a238, 0xda69954f, + 0x5b4cf068, 0x03525940, 0x82773c67, 0x616237ae, 0xe0475289, + 0xb859fba1, 0x397c9e86, 0x0864a9f1, 0x8941ccd6, 0xd15f65fe, + 0x507a00d9, 0xcc04742d, 0x4d21110a, 0x153fb822, 0x941add05, + 0xa502ea72, 0x24278f55, 0x7c39267d, 0xfd1c435a, 0x1e094893, + 0x9f2c2db4, 0xc732849c, 0x4617e1bb, 0x770fd6cc, 0xf62ab3eb, + 0xae341ac3, 0x2f117fe4, 0x6b650fdf, 0xea406af8, 0xb25ec3d0, + 0x337ba6f7, 0x02639180, 0x8346f4a7, 0xdb585d8f, 0x5a7d38a8, + 0xb9683361, 0x384d5646, 0x6053ff6e, 0xe1769a49, 0xd06ead3e, + 0x514bc819, 0x09556131, 0x88700416, 0x140e70e2, 0x952b15c5, + 0xcd35bced, 0x4c10d9ca, 0x7d08eebd, 0xfc2d8b9a, 0xa43322b2, + 0x25164795, 0xc6034c5c, 0x4726297b, 0x1f388053, 0x9e1de574, + 0xaf05d203, 0x2e20b724, 0x763e1e0c, 0xf71b7b2b, 0x95b3f1a5, + 0x14969482, 0x4c883daa, 0xcdad588d, 0xfcb56ffa, 0x7d900add, + 0x258ea3f5, 0xa4abc6d2, 0x47becd1b, 0xc69ba83c, 0x9e850114, + 0x1fa06433, 0x2eb85344, 0xaf9d3663, 0xf7839f4b, 0x76a6fa6c, + 0xead88e98, 0x6bfdebbf, 0x33e34297, 0xb2c627b0, 0x83de10c7, + 0x02fb75e0, 0x5ae5dcc8, 0xdbc0b9ef, 0x38d5b226, 0xb9f0d701, + 0xe1ee7e29, 0x60cb1b0e, 0x51d32c79, 0xd0f6495e, 0x88e8e076, + 0x09cd8551}, + {0x00000000, 0x9b73ead4, 0xed96d3e9, 0x76e5393d, 0x005ca193, + 0x9b2f4b47, 0xedca727a, 0x76b998ae, 0x00b94326, 0x9bcaa9f2, + 0xed2f90cf, 0x765c7a1b, 0x00e5e2b5, 0x9b960861, 0xed73315c, + 0x7600db88, 0x0172864c, 0x9a016c98, 0xece455a5, 0x7797bf71, + 0x012e27df, 0x9a5dcd0b, 0xecb8f436, 0x77cb1ee2, 0x01cbc56a, + 0x9ab82fbe, 0xec5d1683, 0x772efc57, 0x019764f9, 0x9ae48e2d, + 0xec01b710, 0x77725dc4, 0x02e50c98, 0x9996e64c, 0xef73df71, + 0x740035a5, 0x02b9ad0b, 0x99ca47df, 0xef2f7ee2, 0x745c9436, + 0x025c4fbe, 0x992fa56a, 0xefca9c57, 0x74b97683, 0x0200ee2d, + 0x997304f9, 0xef963dc4, 0x74e5d710, 0x03978ad4, 0x98e46000, + 0xee01593d, 0x7572b3e9, 0x03cb2b47, 0x98b8c193, 0xee5df8ae, + 0x752e127a, 0x032ec9f2, 0x985d2326, 0xeeb81a1b, 0x75cbf0cf, + 0x03726861, 0x980182b5, 0xeee4bb88, 0x7597515c, 0x05ca1930, + 0x9eb9f3e4, 0xe85ccad9, 0x732f200d, 0x0596b8a3, 0x9ee55277, + 0xe8006b4a, 0x7373819e, 0x05735a16, 0x9e00b0c2, 0xe8e589ff, + 0x7396632b, 0x052ffb85, 0x9e5c1151, 0xe8b9286c, 0x73cac2b8, + 0x04b89f7c, 0x9fcb75a8, 0xe92e4c95, 0x725da641, 0x04e43eef, + 0x9f97d43b, 0xe972ed06, 0x720107d2, 0x0401dc5a, 0x9f72368e, + 0xe9970fb3, 0x72e4e567, 0x045d7dc9, 0x9f2e971d, 0xe9cbae20, + 0x72b844f4, 0x072f15a8, 0x9c5cff7c, 0xeab9c641, 0x71ca2c95, + 0x0773b43b, 0x9c005eef, 0xeae567d2, 0x71968d06, 0x0796568e, + 0x9ce5bc5a, 0xea008567, 0x71736fb3, 0x07caf71d, 0x9cb91dc9, + 0xea5c24f4, 0x712fce20, 0x065d93e4, 0x9d2e7930, 0xebcb400d, + 0x70b8aad9, 0x06013277, 0x9d72d8a3, 0xeb97e19e, 0x70e40b4a, + 0x06e4d0c2, 0x9d973a16, 0xeb72032b, 0x7001e9ff, 0x06b87151, + 0x9dcb9b85, 0xeb2ea2b8, 0x705d486c, 0x0b943260, 0x90e7d8b4, + 0xe602e189, 0x7d710b5d, 0x0bc893f3, 0x90bb7927, 0xe65e401a, + 0x7d2daace, 0x0b2d7146, 0x905e9b92, 0xe6bba2af, 0x7dc8487b, + 0x0b71d0d5, 0x90023a01, 0xe6e7033c, 0x7d94e9e8, 0x0ae6b42c, + 0x91955ef8, 0xe77067c5, 0x7c038d11, 0x0aba15bf, 0x91c9ff6b, + 0xe72cc656, 0x7c5f2c82, 0x0a5ff70a, 0x912c1dde, 0xe7c924e3, + 0x7cbace37, 0x0a035699, 0x9170bc4d, 0xe7958570, 0x7ce66fa4, + 0x09713ef8, 0x9202d42c, 0xe4e7ed11, 0x7f9407c5, 0x092d9f6b, + 0x925e75bf, 0xe4bb4c82, 0x7fc8a656, 0x09c87dde, 0x92bb970a, + 0xe45eae37, 0x7f2d44e3, 0x0994dc4d, 0x92e73699, 0xe4020fa4, + 0x7f71e570, 0x0803b8b4, 0x93705260, 0xe5956b5d, 0x7ee68189, + 0x085f1927, 0x932cf3f3, 0xe5c9cace, 0x7eba201a, 0x08bafb92, + 0x93c91146, 0xe52c287b, 0x7e5fc2af, 0x08e65a01, 0x9395b0d5, + 0xe57089e8, 0x7e03633c, 0x0e5e2b50, 0x952dc184, 0xe3c8f8b9, + 0x78bb126d, 0x0e028ac3, 0x95716017, 0xe394592a, 0x78e7b3fe, + 0x0ee76876, 0x959482a2, 0xe371bb9f, 0x7802514b, 0x0ebbc9e5, + 0x95c82331, 0xe32d1a0c, 0x785ef0d8, 0x0f2cad1c, 0x945f47c8, + 0xe2ba7ef5, 0x79c99421, 0x0f700c8f, 0x9403e65b, 0xe2e6df66, + 0x799535b2, 0x0f95ee3a, 0x94e604ee, 0xe2033dd3, 0x7970d707, + 0x0fc94fa9, 0x94baa57d, 0xe25f9c40, 0x792c7694, 0x0cbb27c8, + 0x97c8cd1c, 0xe12df421, 0x7a5e1ef5, 0x0ce7865b, 0x97946c8f, + 0xe17155b2, 0x7a02bf66, 0x0c0264ee, 0x97718e3a, 0xe194b707, + 0x7ae75dd3, 0x0c5ec57d, 0x972d2fa9, 0xe1c81694, 0x7abbfc40, + 0x0dc9a184, 0x96ba4b50, 0xe05f726d, 0x7b2c98b9, 0x0d950017, + 0x96e6eac3, 0xe003d3fe, 0x7b70392a, 0x0d70e2a2, 0x96030876, + 0xe0e6314b, 0x7b95db9f, 0x0d2c4331, 0x965fa9e5, 0xe0ba90d8, + 0x7bc97a0c}, + {0x00000000, 0x172864c0, 0x2e50c980, 0x3978ad40, 0x5ca19300, + 0x4b89f7c0, 0x72f15a80, 0x65d93e40, 0xb9432600, 0xae6b42c0, + 0x9713ef80, 0x803b8b40, 0xe5e2b500, 0xf2cad1c0, 0xcbb27c80, + 0xdc9a1840, 0xa9f74a41, 0xbedf2e81, 0x87a783c1, 0x908fe701, + 0xf556d941, 0xe27ebd81, 0xdb0610c1, 0xcc2e7401, 0x10b46c41, + 0x079c0881, 0x3ee4a5c1, 0x29ccc101, 0x4c15ff41, 0x5b3d9b81, + 0x624536c1, 0x756d5201, 0x889f92c3, 0x9fb7f603, 0xa6cf5b43, + 0xb1e73f83, 0xd43e01c3, 0xc3166503, 0xfa6ec843, 0xed46ac83, + 0x31dcb4c3, 0x26f4d003, 0x1f8c7d43, 0x08a41983, 0x6d7d27c3, + 0x7a554303, 0x432dee43, 0x54058a83, 0x2168d882, 0x3640bc42, + 0x0f381102, 0x181075c2, 0x7dc94b82, 0x6ae12f42, 0x53998202, + 0x44b1e6c2, 0x982bfe82, 0x8f039a42, 0xb67b3702, 0xa15353c2, + 0xc48a6d82, 0xd3a20942, 0xeadaa402, 0xfdf2c0c2, 0xca4e23c7, + 0xdd664707, 0xe41eea47, 0xf3368e87, 0x96efb0c7, 0x81c7d407, + 0xb8bf7947, 0xaf971d87, 0x730d05c7, 0x64256107, 0x5d5dcc47, + 0x4a75a887, 0x2fac96c7, 0x3884f207, 0x01fc5f47, 0x16d43b87, + 0x63b96986, 0x74910d46, 0x4de9a006, 0x5ac1c4c6, 0x3f18fa86, + 0x28309e46, 0x11483306, 0x066057c6, 0xdafa4f86, 0xcdd22b46, + 0xf4aa8606, 0xe382e2c6, 0x865bdc86, 0x9173b846, 0xa80b1506, + 0xbf2371c6, 0x42d1b104, 0x55f9d5c4, 0x6c817884, 0x7ba91c44, + 0x1e702204, 0x095846c4, 0x3020eb84, 0x27088f44, 0xfb929704, + 0xecbaf3c4, 0xd5c25e84, 0xc2ea3a44, 0xa7330404, 0xb01b60c4, + 0x8963cd84, 0x9e4ba944, 0xeb26fb45, 0xfc0e9f85, 0xc57632c5, + 0xd25e5605, 0xb7876845, 0xa0af0c85, 0x99d7a1c5, 0x8effc505, + 0x5265dd45, 0x454db985, 0x7c3514c5, 0x6b1d7005, 0x0ec44e45, + 0x19ec2a85, 0x209487c5, 0x37bce305, 0x4fed41cf, 0x58c5250f, + 0x61bd884f, 0x7695ec8f, 0x134cd2cf, 0x0464b60f, 0x3d1c1b4f, + 0x2a347f8f, 0xf6ae67cf, 0xe186030f, 0xd8feae4f, 0xcfd6ca8f, + 0xaa0ff4cf, 0xbd27900f, 0x845f3d4f, 0x9377598f, 0xe61a0b8e, + 0xf1326f4e, 0xc84ac20e, 0xdf62a6ce, 0xbabb988e, 0xad93fc4e, + 0x94eb510e, 0x83c335ce, 0x5f592d8e, 0x4871494e, 0x7109e40e, + 0x662180ce, 0x03f8be8e, 0x14d0da4e, 0x2da8770e, 0x3a8013ce, + 0xc772d30c, 0xd05ab7cc, 0xe9221a8c, 0xfe0a7e4c, 0x9bd3400c, + 0x8cfb24cc, 0xb583898c, 0xa2abed4c, 0x7e31f50c, 0x691991cc, + 0x50613c8c, 0x4749584c, 0x2290660c, 0x35b802cc, 0x0cc0af8c, + 0x1be8cb4c, 0x6e85994d, 0x79adfd8d, 0x40d550cd, 0x57fd340d, + 0x32240a4d, 0x250c6e8d, 0x1c74c3cd, 0x0b5ca70d, 0xd7c6bf4d, + 0xc0eedb8d, 0xf99676cd, 0xeebe120d, 0x8b672c4d, 0x9c4f488d, + 0xa537e5cd, 0xb21f810d, 0x85a36208, 0x928b06c8, 0xabf3ab88, + 0xbcdbcf48, 0xd902f108, 0xce2a95c8, 0xf7523888, 0xe07a5c48, + 0x3ce04408, 0x2bc820c8, 0x12b08d88, 0x0598e948, 0x6041d708, + 0x7769b3c8, 0x4e111e88, 0x59397a48, 0x2c542849, 0x3b7c4c89, + 0x0204e1c9, 0x152c8509, 0x70f5bb49, 0x67dddf89, 0x5ea572c9, + 0x498d1609, 0x95170e49, 0x823f6a89, 0xbb47c7c9, 0xac6fa309, + 0xc9b69d49, 0xde9ef989, 0xe7e654c9, 0xf0ce3009, 0x0d3cf0cb, + 0x1a14940b, 0x236c394b, 0x34445d8b, 0x519d63cb, 0x46b5070b, + 0x7fcdaa4b, 0x68e5ce8b, 0xb47fd6cb, 0xa357b20b, 0x9a2f1f4b, + 0x8d077b8b, 0xe8de45cb, 0xfff6210b, 0xc68e8c4b, 0xd1a6e88b, + 0xa4cbba8a, 0xb3e3de4a, 0x8a9b730a, 0x9db317ca, 0xf86a298a, + 0xef424d4a, 0xd63ae00a, 0xc11284ca, 0x1d889c8a, 0x0aa0f84a, + 0x33d8550a, 0x24f031ca, 0x41290f8a, 0x56016b4a, 0x6f79c60a, + 0x7851a2ca}, + {0x00000000, 0x9fda839e, 0xe4c4017d, 0x7b1e82e3, 0x12f904bb, + 0x8d238725, 0xf63d05c6, 0x69e78658, 0x25f20976, 0xba288ae8, + 0xc136080b, 0x5eec8b95, 0x370b0dcd, 0xa8d18e53, 0xd3cf0cb0, + 0x4c158f2e, 0x4be412ec, 0xd43e9172, 0xaf201391, 0x30fa900f, + 0x591d1657, 0xc6c795c9, 0xbdd9172a, 0x220394b4, 0x6e161b9a, + 0xf1cc9804, 0x8ad21ae7, 0x15089979, 0x7cef1f21, 0xe3359cbf, + 0x982b1e5c, 0x07f19dc2, 0x97c825d8, 0x0812a646, 0x730c24a5, + 0xecd6a73b, 0x85312163, 0x1aeba2fd, 0x61f5201e, 0xfe2fa380, + 0xb23a2cae, 0x2de0af30, 0x56fe2dd3, 0xc924ae4d, 0xa0c32815, + 0x3f19ab8b, 0x44072968, 0xdbddaaf6, 0xdc2c3734, 0x43f6b4aa, + 0x38e83649, 0xa732b5d7, 0xced5338f, 0x510fb011, 0x2a1132f2, + 0xb5cbb16c, 0xf9de3e42, 0x6604bddc, 0x1d1a3f3f, 0x82c0bca1, + 0xeb273af9, 0x74fdb967, 0x0fe33b84, 0x9039b81a, 0xf4e14df1, + 0x6b3bce6f, 0x10254c8c, 0x8fffcf12, 0xe618494a, 0x79c2cad4, + 0x02dc4837, 0x9d06cba9, 0xd1134487, 0x4ec9c719, 0x35d745fa, + 0xaa0dc664, 0xc3ea403c, 0x5c30c3a2, 0x272e4141, 0xb8f4c2df, + 0xbf055f1d, 0x20dfdc83, 0x5bc15e60, 0xc41bddfe, 0xadfc5ba6, + 0x3226d838, 0x49385adb, 0xd6e2d945, 0x9af7566b, 0x052dd5f5, + 0x7e335716, 0xe1e9d488, 0x880e52d0, 0x17d4d14e, 0x6cca53ad, + 0xf310d033, 0x63296829, 0xfcf3ebb7, 0x87ed6954, 0x1837eaca, + 0x71d06c92, 0xee0aef0c, 0x95146def, 0x0aceee71, 0x46db615f, + 0xd901e2c1, 0xa21f6022, 0x3dc5e3bc, 0x542265e4, 0xcbf8e67a, + 0xb0e66499, 0x2f3ce707, 0x28cd7ac5, 0xb717f95b, 0xcc097bb8, + 0x53d3f826, 0x3a347e7e, 0xa5eefde0, 0xdef07f03, 0x412afc9d, + 0x0d3f73b3, 0x92e5f02d, 0xe9fb72ce, 0x7621f150, 0x1fc67708, + 0x801cf496, 0xfb027675, 0x64d8f5eb, 0x32b39da3, 0xad691e3d, + 0xd6779cde, 0x49ad1f40, 0x204a9918, 0xbf901a86, 0xc48e9865, + 0x5b541bfb, 0x174194d5, 0x889b174b, 0xf38595a8, 0x6c5f1636, + 0x05b8906e, 0x9a6213f0, 0xe17c9113, 0x7ea6128d, 0x79578f4f, + 0xe68d0cd1, 0x9d938e32, 0x02490dac, 0x6bae8bf4, 0xf474086a, + 0x8f6a8a89, 0x10b00917, 0x5ca58639, 0xc37f05a7, 0xb8618744, + 0x27bb04da, 0x4e5c8282, 0xd186011c, 0xaa9883ff, 0x35420061, + 0xa57bb87b, 0x3aa13be5, 0x41bfb906, 0xde653a98, 0xb782bcc0, + 0x28583f5e, 0x5346bdbd, 0xcc9c3e23, 0x8089b10d, 0x1f533293, + 0x644db070, 0xfb9733ee, 0x9270b5b6, 0x0daa3628, 0x76b4b4cb, + 0xe96e3755, 0xee9faa97, 0x71452909, 0x0a5babea, 0x95812874, + 0xfc66ae2c, 0x63bc2db2, 0x18a2af51, 0x87782ccf, 0xcb6da3e1, + 0x54b7207f, 0x2fa9a29c, 0xb0732102, 0xd994a75a, 0x464e24c4, + 0x3d50a627, 0xa28a25b9, 0xc652d052, 0x598853cc, 0x2296d12f, + 0xbd4c52b1, 0xd4abd4e9, 0x4b715777, 0x306fd594, 0xafb5560a, + 0xe3a0d924, 0x7c7a5aba, 0x0764d859, 0x98be5bc7, 0xf159dd9f, + 0x6e835e01, 0x159ddce2, 0x8a475f7c, 0x8db6c2be, 0x126c4120, + 0x6972c3c3, 0xf6a8405d, 0x9f4fc605, 0x0095459b, 0x7b8bc778, + 0xe45144e6, 0xa844cbc8, 0x379e4856, 0x4c80cab5, 0xd35a492b, + 0xbabdcf73, 0x25674ced, 0x5e79ce0e, 0xc1a34d90, 0x519af58a, + 0xce407614, 0xb55ef4f7, 0x2a847769, 0x4363f131, 0xdcb972af, + 0xa7a7f04c, 0x387d73d2, 0x7468fcfc, 0xebb27f62, 0x90acfd81, + 0x0f767e1f, 0x6691f847, 0xf94b7bd9, 0x8255f93a, 0x1d8f7aa4, + 0x1a7ee766, 0x85a464f8, 0xfebae61b, 0x61606585, 0x0887e3dd, + 0x975d6043, 0xec43e2a0, 0x7399613e, 0x3f8cee10, 0xa0566d8e, + 0xdb48ef6d, 0x44926cf3, 0x2d75eaab, 0xb2af6935, 0xc9b1ebd6, + 0x566b6848}}; + +local const z_word_t FAR crc_braid_big_table[][256] = { + {0x00000000, 0x9e83da9f, 0x7d01c4e4, 0xe3821e7b, 0xbb04f912, + 0x2587238d, 0xc6053df6, 0x5886e769, 0x7609f225, 0xe88a28ba, + 0x0b0836c1, 0x958bec5e, 0xcd0d0b37, 0x538ed1a8, 0xb00ccfd3, + 0x2e8f154c, 0xec12e44b, 0x72913ed4, 0x911320af, 0x0f90fa30, + 0x57161d59, 0xc995c7c6, 0x2a17d9bd, 0xb4940322, 0x9a1b166e, + 0x0498ccf1, 0xe71ad28a, 0x79990815, 0x211fef7c, 0xbf9c35e3, + 0x5c1e2b98, 0xc29df107, 0xd825c897, 0x46a61208, 0xa5240c73, + 0x3ba7d6ec, 0x63213185, 0xfda2eb1a, 0x1e20f561, 0x80a32ffe, + 0xae2c3ab2, 0x30afe02d, 0xd32dfe56, 0x4dae24c9, 0x1528c3a0, + 0x8bab193f, 0x68290744, 0xf6aadddb, 0x34372cdc, 0xaab4f643, + 0x4936e838, 0xd7b532a7, 0x8f33d5ce, 0x11b00f51, 0xf232112a, + 0x6cb1cbb5, 0x423edef9, 0xdcbd0466, 0x3f3f1a1d, 0xa1bcc082, + 0xf93a27eb, 0x67b9fd74, 0x843be30f, 0x1ab83990, 0xf14de1f4, + 0x6fce3b6b, 0x8c4c2510, 0x12cfff8f, 0x4a4918e6, 0xd4cac279, + 0x3748dc02, 0xa9cb069d, 0x874413d1, 0x19c7c94e, 0xfa45d735, + 0x64c60daa, 0x3c40eac3, 0xa2c3305c, 0x41412e27, 0xdfc2f4b8, + 0x1d5f05bf, 0x83dcdf20, 0x605ec15b, 0xfedd1bc4, 0xa65bfcad, + 0x38d82632, 0xdb5a3849, 0x45d9e2d6, 0x6b56f79a, 0xf5d52d05, + 0x1657337e, 0x88d4e9e1, 0xd0520e88, 0x4ed1d417, 0xad53ca6c, + 0x33d010f3, 0x29682963, 0xb7ebf3fc, 0x5469ed87, 0xcaea3718, + 0x926cd071, 0x0cef0aee, 0xef6d1495, 0x71eece0a, 0x5f61db46, + 0xc1e201d9, 0x22601fa2, 0xbce3c53d, 0xe4652254, 0x7ae6f8cb, + 0x9964e6b0, 0x07e73c2f, 0xc57acd28, 0x5bf917b7, 0xb87b09cc, + 0x26f8d353, 0x7e7e343a, 0xe0fdeea5, 0x037ff0de, 0x9dfc2a41, + 0xb3733f0d, 0x2df0e592, 0xce72fbe9, 0x50f12176, 0x0877c61f, + 0x96f41c80, 0x757602fb, 0xebf5d864, 0xa39db332, 0x3d1e69ad, + 0xde9c77d6, 0x401fad49, 0x18994a20, 0x861a90bf, 0x65988ec4, + 0xfb1b545b, 0xd5944117, 0x4b179b88, 0xa89585f3, 0x36165f6c, + 0x6e90b805, 0xf013629a, 0x13917ce1, 0x8d12a67e, 0x4f8f5779, + 0xd10c8de6, 0x328e939d, 0xac0d4902, 0xf48bae6b, 0x6a0874f4, + 0x898a6a8f, 0x1709b010, 0x3986a55c, 0xa7057fc3, 0x448761b8, + 0xda04bb27, 0x82825c4e, 0x1c0186d1, 0xff8398aa, 0x61004235, + 0x7bb87ba5, 0xe53ba13a, 0x06b9bf41, 0x983a65de, 0xc0bc82b7, + 0x5e3f5828, 0xbdbd4653, 0x233e9ccc, 0x0db18980, 0x9332531f, + 0x70b04d64, 0xee3397fb, 0xb6b57092, 0x2836aa0d, 0xcbb4b476, + 0x55376ee9, 0x97aa9fee, 0x09294571, 0xeaab5b0a, 0x74288195, + 0x2cae66fc, 0xb22dbc63, 0x51afa218, 0xcf2c7887, 0xe1a36dcb, + 0x7f20b754, 0x9ca2a92f, 0x022173b0, 0x5aa794d9, 0xc4244e46, + 0x27a6503d, 0xb9258aa2, 0x52d052c6, 0xcc538859, 0x2fd19622, + 0xb1524cbd, 0xe9d4abd4, 0x7757714b, 0x94d56f30, 0x0a56b5af, + 0x24d9a0e3, 0xba5a7a7c, 0x59d86407, 0xc75bbe98, 0x9fdd59f1, + 0x015e836e, 0xe2dc9d15, 0x7c5f478a, 0xbec2b68d, 0x20416c12, + 0xc3c37269, 0x5d40a8f6, 0x05c64f9f, 0x9b459500, 0x78c78b7b, + 0xe64451e4, 0xc8cb44a8, 0x56489e37, 0xb5ca804c, 0x2b495ad3, + 0x73cfbdba, 0xed4c6725, 0x0ece795e, 0x904da3c1, 0x8af59a51, + 0x147640ce, 0xf7f45eb5, 0x6977842a, 0x31f16343, 0xaf72b9dc, + 0x4cf0a7a7, 0xd2737d38, 0xfcfc6874, 0x627fb2eb, 0x81fdac90, + 0x1f7e760f, 0x47f89166, 0xd97b4bf9, 0x3af95582, 0xa47a8f1d, + 0x66e77e1a, 0xf864a485, 0x1be6bafe, 0x85656061, 0xdde38708, + 0x43605d97, 0xa0e243ec, 0x3e619973, 0x10ee8c3f, 0x8e6d56a0, + 0x6def48db, 0xf36c9244, 0xabea752d, 0x3569afb2, 0xd6ebb1c9, + 0x48686b56}, + {0x00000000, 0xc0642817, 0x80c9502e, 0x40ad7839, 0x0093a15c, + 0xc0f7894b, 0x805af172, 0x403ed965, 0x002643b9, 0xc0426bae, + 0x80ef1397, 0x408b3b80, 0x00b5e2e5, 0xc0d1caf2, 0x807cb2cb, + 0x40189adc, 0x414af7a9, 0x812edfbe, 0xc183a787, 0x01e78f90, + 0x41d956f5, 0x81bd7ee2, 0xc11006db, 0x01742ecc, 0x416cb410, + 0x81089c07, 0xc1a5e43e, 0x01c1cc29, 0x41ff154c, 0x819b3d5b, + 0xc1364562, 0x01526d75, 0xc3929f88, 0x03f6b79f, 0x435bcfa6, + 0x833fe7b1, 0xc3013ed4, 0x036516c3, 0x43c86efa, 0x83ac46ed, + 0xc3b4dc31, 0x03d0f426, 0x437d8c1f, 0x8319a408, 0xc3277d6d, + 0x0343557a, 0x43ee2d43, 0x838a0554, 0x82d86821, 0x42bc4036, + 0x0211380f, 0xc2751018, 0x824bc97d, 0x422fe16a, 0x02829953, + 0xc2e6b144, 0x82fe2b98, 0x429a038f, 0x02377bb6, 0xc25353a1, + 0x826d8ac4, 0x4209a2d3, 0x02a4daea, 0xc2c0f2fd, 0xc7234eca, + 0x074766dd, 0x47ea1ee4, 0x878e36f3, 0xc7b0ef96, 0x07d4c781, + 0x4779bfb8, 0x871d97af, 0xc7050d73, 0x07612564, 0x47cc5d5d, + 0x87a8754a, 0xc796ac2f, 0x07f28438, 0x475ffc01, 0x873bd416, + 0x8669b963, 0x460d9174, 0x06a0e94d, 0xc6c4c15a, 0x86fa183f, + 0x469e3028, 0x06334811, 0xc6576006, 0x864ffada, 0x462bd2cd, + 0x0686aaf4, 0xc6e282e3, 0x86dc5b86, 0x46b87391, 0x06150ba8, + 0xc67123bf, 0x04b1d142, 0xc4d5f955, 0x8478816c, 0x441ca97b, + 0x0422701e, 0xc4465809, 0x84eb2030, 0x448f0827, 0x049792fb, + 0xc4f3baec, 0x845ec2d5, 0x443aeac2, 0x040433a7, 0xc4601bb0, + 0x84cd6389, 0x44a94b9e, 0x45fb26eb, 0x859f0efc, 0xc53276c5, + 0x05565ed2, 0x456887b7, 0x850cafa0, 0xc5a1d799, 0x05c5ff8e, + 0x45dd6552, 0x85b94d45, 0xc514357c, 0x05701d6b, 0x454ec40e, + 0x852aec19, 0xc5879420, 0x05e3bc37, 0xcf41ed4f, 0x0f25c558, + 0x4f88bd61, 0x8fec9576, 0xcfd24c13, 0x0fb66404, 0x4f1b1c3d, + 0x8f7f342a, 0xcf67aef6, 0x0f0386e1, 0x4faefed8, 0x8fcad6cf, + 0xcff40faa, 0x0f9027bd, 0x4f3d5f84, 0x8f597793, 0x8e0b1ae6, + 0x4e6f32f1, 0x0ec24ac8, 0xcea662df, 0x8e98bbba, 0x4efc93ad, + 0x0e51eb94, 0xce35c383, 0x8e2d595f, 0x4e497148, 0x0ee40971, + 0xce802166, 0x8ebef803, 0x4edad014, 0x0e77a82d, 0xce13803a, + 0x0cd372c7, 0xccb75ad0, 0x8c1a22e9, 0x4c7e0afe, 0x0c40d39b, + 0xcc24fb8c, 0x8c8983b5, 0x4cedaba2, 0x0cf5317e, 0xcc911969, + 0x8c3c6150, 0x4c584947, 0x0c669022, 0xcc02b835, 0x8cafc00c, + 0x4ccbe81b, 0x4d99856e, 0x8dfdad79, 0xcd50d540, 0x0d34fd57, + 0x4d0a2432, 0x8d6e0c25, 0xcdc3741c, 0x0da75c0b, 0x4dbfc6d7, + 0x8ddbeec0, 0xcd7696f9, 0x0d12beee, 0x4d2c678b, 0x8d484f9c, + 0xcde537a5, 0x0d811fb2, 0x0862a385, 0xc8068b92, 0x88abf3ab, + 0x48cfdbbc, 0x08f102d9, 0xc8952ace, 0x883852f7, 0x485c7ae0, + 0x0844e03c, 0xc820c82b, 0x888db012, 0x48e99805, 0x08d74160, + 0xc8b36977, 0x881e114e, 0x487a3959, 0x4928542c, 0x894c7c3b, + 0xc9e10402, 0x09852c15, 0x49bbf570, 0x89dfdd67, 0xc972a55e, + 0x09168d49, 0x490e1795, 0x896a3f82, 0xc9c747bb, 0x09a36fac, + 0x499db6c9, 0x89f99ede, 0xc954e6e7, 0x0930cef0, 0xcbf03c0d, + 0x0b94141a, 0x4b396c23, 0x8b5d4434, 0xcb639d51, 0x0b07b546, + 0x4baacd7f, 0x8bcee568, 0xcbd67fb4, 0x0bb257a3, 0x4b1f2f9a, + 0x8b7b078d, 0xcb45dee8, 0x0b21f6ff, 0x4b8c8ec6, 0x8be8a6d1, + 0x8abacba4, 0x4adee3b3, 0x0a739b8a, 0xca17b39d, 0x8a296af8, + 0x4a4d42ef, 0x0ae03ad6, 0xca8412c1, 0x8a9c881d, 0x4af8a00a, + 0x0a55d833, 0xca31f024, 0x8a0f2941, 0x4a6b0156, 0x0ac6796f, + 0xcaa25178}, + {0x00000000, 0xd4ea739b, 0xe9d396ed, 0x3d39e576, 0x93a15c00, + 0x474b2f9b, 0x7a72caed, 0xae98b976, 0x2643b900, 0xf2a9ca9b, + 0xcf902fed, 0x1b7a5c76, 0xb5e2e500, 0x6108969b, 0x5c3173ed, + 0x88db0076, 0x4c867201, 0x986c019a, 0xa555e4ec, 0x71bf9777, + 0xdf272e01, 0x0bcd5d9a, 0x36f4b8ec, 0xe21ecb77, 0x6ac5cb01, + 0xbe2fb89a, 0x83165dec, 0x57fc2e77, 0xf9649701, 0x2d8ee49a, + 0x10b701ec, 0xc45d7277, 0x980ce502, 0x4ce69699, 0x71df73ef, + 0xa5350074, 0x0badb902, 0xdf47ca99, 0xe27e2fef, 0x36945c74, + 0xbe4f5c02, 0x6aa52f99, 0x579ccaef, 0x8376b974, 0x2dee0002, + 0xf9047399, 0xc43d96ef, 0x10d7e574, 0xd48a9703, 0x0060e498, + 0x3d5901ee, 0xe9b37275, 0x472bcb03, 0x93c1b898, 0xaef85dee, + 0x7a122e75, 0xf2c92e03, 0x26235d98, 0x1b1ab8ee, 0xcff0cb75, + 0x61687203, 0xb5820198, 0x88bbe4ee, 0x5c519775, 0x3019ca05, + 0xe4f3b99e, 0xd9ca5ce8, 0x0d202f73, 0xa3b89605, 0x7752e59e, + 0x4a6b00e8, 0x9e817373, 0x165a7305, 0xc2b0009e, 0xff89e5e8, + 0x2b639673, 0x85fb2f05, 0x51115c9e, 0x6c28b9e8, 0xb8c2ca73, + 0x7c9fb804, 0xa875cb9f, 0x954c2ee9, 0x41a65d72, 0xef3ee404, + 0x3bd4979f, 0x06ed72e9, 0xd2070172, 0x5adc0104, 0x8e36729f, + 0xb30f97e9, 0x67e5e472, 0xc97d5d04, 0x1d972e9f, 0x20aecbe9, + 0xf444b872, 0xa8152f07, 0x7cff5c9c, 0x41c6b9ea, 0x952cca71, + 0x3bb47307, 0xef5e009c, 0xd267e5ea, 0x068d9671, 0x8e569607, + 0x5abce59c, 0x678500ea, 0xb36f7371, 0x1df7ca07, 0xc91db99c, + 0xf4245cea, 0x20ce2f71, 0xe4935d06, 0x30792e9d, 0x0d40cbeb, + 0xd9aab870, 0x77320106, 0xa3d8729d, 0x9ee197eb, 0x4a0be470, + 0xc2d0e406, 0x163a979d, 0x2b0372eb, 0xffe90170, 0x5171b806, + 0x859bcb9d, 0xb8a22eeb, 0x6c485d70, 0x6032940b, 0xb4d8e790, + 0x89e102e6, 0x5d0b717d, 0xf393c80b, 0x2779bb90, 0x1a405ee6, + 0xceaa2d7d, 0x46712d0b, 0x929b5e90, 0xafa2bbe6, 0x7b48c87d, + 0xd5d0710b, 0x013a0290, 0x3c03e7e6, 0xe8e9947d, 0x2cb4e60a, + 0xf85e9591, 0xc56770e7, 0x118d037c, 0xbf15ba0a, 0x6bffc991, + 0x56c62ce7, 0x822c5f7c, 0x0af75f0a, 0xde1d2c91, 0xe324c9e7, + 0x37ceba7c, 0x9956030a, 0x4dbc7091, 0x708595e7, 0xa46fe67c, + 0xf83e7109, 0x2cd40292, 0x11ede7e4, 0xc507947f, 0x6b9f2d09, + 0xbf755e92, 0x824cbbe4, 0x56a6c87f, 0xde7dc809, 0x0a97bb92, + 0x37ae5ee4, 0xe3442d7f, 0x4ddc9409, 0x9936e792, 0xa40f02e4, + 0x70e5717f, 0xb4b80308, 0x60527093, 0x5d6b95e5, 0x8981e67e, + 0x27195f08, 0xf3f32c93, 0xcecac9e5, 0x1a20ba7e, 0x92fbba08, + 0x4611c993, 0x7b282ce5, 0xafc25f7e, 0x015ae608, 0xd5b09593, + 0xe88970e5, 0x3c63037e, 0x502b5e0e, 0x84c12d95, 0xb9f8c8e3, + 0x6d12bb78, 0xc38a020e, 0x17607195, 0x2a5994e3, 0xfeb3e778, + 0x7668e70e, 0xa2829495, 0x9fbb71e3, 0x4b510278, 0xe5c9bb0e, + 0x3123c895, 0x0c1a2de3, 0xd8f05e78, 0x1cad2c0f, 0xc8475f94, + 0xf57ebae2, 0x2194c979, 0x8f0c700f, 0x5be60394, 0x66dfe6e2, + 0xb2359579, 0x3aee950f, 0xee04e694, 0xd33d03e2, 0x07d77079, + 0xa94fc90f, 0x7da5ba94, 0x409c5fe2, 0x94762c79, 0xc827bb0c, + 0x1ccdc897, 0x21f42de1, 0xf51e5e7a, 0x5b86e70c, 0x8f6c9497, + 0xb25571e1, 0x66bf027a, 0xee64020c, 0x3a8e7197, 0x07b794e1, + 0xd35de77a, 0x7dc55e0c, 0xa92f2d97, 0x9416c8e1, 0x40fcbb7a, + 0x84a1c90d, 0x504bba96, 0x6d725fe0, 0xb9982c7b, 0x1700950d, + 0xc3eae696, 0xfed303e0, 0x2a39707b, 0xa2e2700d, 0x76080396, + 0x4b31e6e0, 0x9fdb957b, 0x31432c0d, 0xe5a95f96, 0xd890bae0, + 0x0c7ac97b}, + {0x00000000, 0x27652581, 0x0fcc3bd9, 0x28a91e58, 0x5f9e0669, + 0x78fb23e8, 0x50523db0, 0x77371831, 0xbe3c0dd2, 0x99592853, + 0xb1f0360b, 0x9695138a, 0xe1a20bbb, 0xc6c72e3a, 0xee6e3062, + 0xc90b15e3, 0x3d7f6b7f, 0x1a1a4efe, 0x32b350a6, 0x15d67527, + 0x62e16d16, 0x45844897, 0x6d2d56cf, 0x4a48734e, 0x834366ad, + 0xa426432c, 0x8c8f5d74, 0xabea78f5, 0xdcdd60c4, 0xfbb84545, + 0xd3115b1d, 0xf4747e9c, 0x7afed6fe, 0x5d9bf37f, 0x7532ed27, + 0x5257c8a6, 0x2560d097, 0x0205f516, 0x2aaceb4e, 0x0dc9cecf, + 0xc4c2db2c, 0xe3a7fead, 0xcb0ee0f5, 0xec6bc574, 0x9b5cdd45, + 0xbc39f8c4, 0x9490e69c, 0xb3f5c31d, 0x4781bd81, 0x60e49800, + 0x484d8658, 0x6f28a3d9, 0x181fbbe8, 0x3f7a9e69, 0x17d38031, + 0x30b6a5b0, 0xf9bdb053, 0xded895d2, 0xf6718b8a, 0xd114ae0b, + 0xa623b63a, 0x814693bb, 0xa9ef8de3, 0x8e8aa862, 0xb5fadc26, + 0x929ff9a7, 0xba36e7ff, 0x9d53c27e, 0xea64da4f, 0xcd01ffce, + 0xe5a8e196, 0xc2cdc417, 0x0bc6d1f4, 0x2ca3f475, 0x040aea2d, + 0x236fcfac, 0x5458d79d, 0x733df21c, 0x5b94ec44, 0x7cf1c9c5, + 0x8885b759, 0xafe092d8, 0x87498c80, 0xa02ca901, 0xd71bb130, + 0xf07e94b1, 0xd8d78ae9, 0xffb2af68, 0x36b9ba8b, 0x11dc9f0a, + 0x39758152, 0x1e10a4d3, 0x6927bce2, 0x4e429963, 0x66eb873b, + 0x418ea2ba, 0xcf040ad8, 0xe8612f59, 0xc0c83101, 0xe7ad1480, + 0x909a0cb1, 0xb7ff2930, 0x9f563768, 0xb83312e9, 0x7138070a, + 0x565d228b, 0x7ef43cd3, 0x59911952, 0x2ea60163, 0x09c324e2, + 0x216a3aba, 0x060f1f3b, 0xf27b61a7, 0xd51e4426, 0xfdb75a7e, + 0xdad27fff, 0xade567ce, 0x8a80424f, 0xa2295c17, 0x854c7996, + 0x4c476c75, 0x6b2249f4, 0x438b57ac, 0x64ee722d, 0x13d96a1c, + 0x34bc4f9d, 0x1c1551c5, 0x3b707444, 0x6af5b94d, 0x4d909ccc, + 0x65398294, 0x425ca715, 0x356bbf24, 0x120e9aa5, 0x3aa784fd, + 0x1dc2a17c, 0xd4c9b49f, 0xf3ac911e, 0xdb058f46, 0xfc60aac7, + 0x8b57b2f6, 0xac329777, 0x849b892f, 0xa3feacae, 0x578ad232, + 0x70eff7b3, 0x5846e9eb, 0x7f23cc6a, 0x0814d45b, 0x2f71f1da, + 0x07d8ef82, 0x20bdca03, 0xe9b6dfe0, 0xced3fa61, 0xe67ae439, + 0xc11fc1b8, 0xb628d989, 0x914dfc08, 0xb9e4e250, 0x9e81c7d1, + 0x100b6fb3, 0x376e4a32, 0x1fc7546a, 0x38a271eb, 0x4f9569da, + 0x68f04c5b, 0x40595203, 0x673c7782, 0xae376261, 0x895247e0, + 0xa1fb59b8, 0x869e7c39, 0xf1a96408, 0xd6cc4189, 0xfe655fd1, + 0xd9007a50, 0x2d7404cc, 0x0a11214d, 0x22b83f15, 0x05dd1a94, + 0x72ea02a5, 0x558f2724, 0x7d26397c, 0x5a431cfd, 0x9348091e, + 0xb42d2c9f, 0x9c8432c7, 0xbbe11746, 0xccd60f77, 0xebb32af6, + 0xc31a34ae, 0xe47f112f, 0xdf0f656b, 0xf86a40ea, 0xd0c35eb2, + 0xf7a67b33, 0x80916302, 0xa7f44683, 0x8f5d58db, 0xa8387d5a, + 0x613368b9, 0x46564d38, 0x6eff5360, 0x499a76e1, 0x3ead6ed0, + 0x19c84b51, 0x31615509, 0x16047088, 0xe2700e14, 0xc5152b95, + 0xedbc35cd, 0xcad9104c, 0xbdee087d, 0x9a8b2dfc, 0xb22233a4, + 0x95471625, 0x5c4c03c6, 0x7b292647, 0x5380381f, 0x74e51d9e, + 0x03d205af, 0x24b7202e, 0x0c1e3e76, 0x2b7b1bf7, 0xa5f1b395, + 0x82949614, 0xaa3d884c, 0x8d58adcd, 0xfa6fb5fc, 0xdd0a907d, + 0xf5a38e25, 0xd2c6aba4, 0x1bcdbe47, 0x3ca89bc6, 0x1401859e, + 0x3364a01f, 0x4453b82e, 0x63369daf, 0x4b9f83f7, 0x6cfaa676, + 0x988ed8ea, 0xbfebfd6b, 0x9742e333, 0xb027c6b2, 0xc710de83, + 0xe075fb02, 0xc8dce55a, 0xefb9c0db, 0x26b2d538, 0x01d7f0b9, + 0x297eeee1, 0x0e1bcb60, 0x792cd351, 0x5e49f6d0, 0x76e0e888, + 0x5185cd09}}; + +#endif + +#endif + +#endif + +local const z_crc_t FAR x2n_table[] = { + 0x40000000, 0x20000000, 0x08000000, 0x00800000, 0x00008000, + 0xedb88320, 0xb1e6b092, 0xa06a2517, 0xed627dae, 0x88d14467, + 0xd7bbfe6a, 0xec447f11, 0x8e7ea170, 0x6427800e, 0x4d47bae0, + 0x09fe548f, 0x83852d0f, 0x30362f1a, 0x7b5a9cc3, 0x31fec169, + 0x9fec022a, 0x6c8dedc4, 0x15d6874d, 0x5fde7a4e, 0xbad90e37, + 0x2e4e5eef, 0x4eaba214, 0xa8a472c0, 0x429a969e, 0x148d302a, + 0xc40ba6d0, 0xc4e22c3c}; diff --git a/include/dbginfo.h b/include/dbginfo.h new file mode 100644 index 0000000..6bab32d --- /dev/null +++ b/include/dbginfo.h @@ -0,0 +1,85 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 2020 The NASM Authors - All Rights Reserved */ + +/* + * dbginfo.h - debugging info structures + */ + +#ifndef NASM_DBGINFO_H +#define NASM_DBGINFO_H + +#include "compiler.h" +#include "srcfile.h" +#include "rbtree.h" + +struct debug_macro_def; /* Definition */ +struct debug_macro_inv; /* Invocation */ +struct debug_macro_addr; /* Address range */ + +/* + * Definitions structure, one for each non-.nolist macro invoked + * anywhere in the program; unique for each macro, even if a macro is + * redefined and/or overloaded. + */ +struct debug_macro_def { + struct debug_macro_def *next; /* List of definitions */ + const char *name; /* Macro name */ + struct src_location where; /* Start of definition */ + size_t ninv; /* Call count */ +}; + +/* + * Invocation structure. One for each invocation of a non-.nolist macro. + */ +struct debug_macro_inv_list { + struct debug_macro_inv *l; + size_t n; +}; + +struct debug_macro_inv { + struct debug_macro_inv *next; /* List of same-level invocations */ + struct debug_macro_inv_list down; + struct debug_macro_inv *up; /* Parent invocation */ + struct debug_macro_def *def; /* Macro definition */ + struct src_location where; /* Start of invocation */ + struct { /* Address range pointers */ + struct rbtree *tree; /* rbtree of address ranges */ + struct debug_macro_addr *last; /* Quick lookup for latest section */ + } addr; + uint32_t naddr; /* Number of address ranges */ + int32_t lastseg; /* lastaddr segment number */ +}; + +/* + * Address range structure. An rbtree containing one address range for each + * section which this particular macro has generated code/data/space into. + */ +struct debug_macro_addr { + struct rbtree tree; /* rbtree; key = index, must be first */ + struct debug_macro_addr *up; /* same section in parent invocation */ + uint64_t start; /* starting offset */ + uint64_t len; /* length of range */ +}; + +/* + * Complete information structure */ +struct debug_macro_info { + struct debug_macro_inv_list inv; + struct debug_macro_def_list { + struct debug_macro_def *l; + size_t n; + } def; +}; + +static inline int32_t debug_macro_seg(const struct debug_macro_addr *dma) +{ + return dma->tree.key; +} + +/* Get/create a addr structure for the macro we are emitting for */ +struct debug_macro_addr *debug_macro_get_addr(int32_t seg); + +/* The macro we are currently emitting for, if any */ +extern struct debug_macro_inv *debug_current_macro; + +#endif /* NASM_DBGINFO_H */ diff --git a/include/directiv.h b/include/directiv.h new file mode 100644 index 0000000..b154514 --- /dev/null +++ b/include/directiv.h @@ -0,0 +1,104 @@ +/* + * This file is generated from ./asm/directiv.dat + * by perfhash.pl; do not edit. + */ + +#ifndef DIRECTIV_H +#define DIRECTIV_H 1 + +#include "perfhash.h" + +enum directive { + D_none, + D_unknown, + D_corrupt, + D_ABSOLUTE, + D_BITS, + D_COMMON, + D_CPU, + D_DEBUG, + D_DEFAULT, + D_DOLLARHEX, + D_EXTERN, + D_FLOAT, + D_GLOBAL, + D_LIST, + D_PRAGMA, + D_REQUIRED, + D_SECTALIGN, + D_SECTION, + D_SEGMENT, + D_STATIC, + D_WARNING, + D_PREFIX, + D_SUFFIX, + D_POSTFIX, + D_GPREFIX, + D_GSUFFIX, + D_GPOSTFIX, + D_LPREFIX, + D_LSUFFIX, + D_LPOSTFIX, + D_pseudo_ops, + D_DB, + D_DW, + D_DD, + D_DQ, + D_DT, + D_DO, + D_DY, + D_DZ, + D_RESB, + D_RESW, + D_RESD, + D_RESQ, + D_REST, + D_RESO, + D_RESY, + D_RESZ, + D_INCBIN, + D_EQU, + D_ofmt, + D_EXPORT, + D_GROUP, + D_IMPORT, + D_LIBRARY, + D_MAP, + D_MODULE, + D_ORG, + D_OSABI, + D_SAFESEH, + D_UPPERCASE, + D_pragma_tokens, + D_LIMIT, + D_OPTIONS, + D_SUBSECTIONS_VIA_SYMBOLS, + D_NO_DEAD_STRIP, + D_MAXDUMP, + D_NODEPEND, + D_NOSECLABELS +}; + +extern const struct perfect_hash directive_hash; +extern const char * const directive_tbl[65]; + +static inline enum directive directive_find(const char *str) +{ + return perfhash_find(&directive_hash, str); +} + +static inline const char * directive_name(enum directive x) +{ + size_t ix = (size_t)x - (3); + if (ix >= 65) + return NULL; + return directive_tbl[ix]; +} + +static inline const char * directive_dname(enum directive x) +{ + const char *y = directive_name(x); + return y ? y : invalid_enum_str(x); +} + +#endif /* DIRECTIV_H */ diff --git a/include/disasm.h b/include/disasm.h new file mode 100644 index 0000000..d252011 --- /dev/null +++ b/include/disasm.h @@ -0,0 +1,94 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 1996-2025 The NASM Authors - All Rights Reserved */ + +/* + * disasm.h header file for disasm.c + */ + +#ifndef NASM_DISASM_H +#define NASM_DISASM_H + +#include "nasm.h" +#include "insnsi.h" +#include "iflag.h" + +/* + * This buffer must be at least twice as long as the max instruction, + * which must include the WAIT pseudo-prefix, for a total of 15+1 = 16 + * bytes. + */ +#define INSN_MAX 32 + +int32_t disasm(const uint8_t *dp, int32_t data_size, + char *output, int outbufsize, + int segsize, int64_t offset, int autosync, + iflag_t *prefer); +int32_t eatbyte(uint8_t byte, char *output, int outbufsize, int segsize); + +/* The rex types that matter for the purpose of decoding */ +enum rextype { + REX_NONE, + REX_REX, + REX_REX2, + REX_VEX, /* Includes XOP */ + REX_EVEX +}; + +/* + * Prefix information + */ +struct rexfields { + uint32_t raw; /* Raw value */ + uint32_t flags; /* REX_ flags from nasm.h */ + enum rextype type; + uint8_t len; /* Length of REX prefix */ + uint8_t breg; /* B register */ + uint8_t bregbv; /* B register if B is a vector */ + uint8_t xreg; /* X register */ + uint8_t xregxv; /* X register if X is a vector */ + uint8_t vreg; /* V register */ + uint8_t vregxv; /* V register if X is a vector */ + uint8_t rreg; + uint8_t opc; /* Masked opcode */ + uint8_t map; + uint8_t xmap; /* Extended map (base from insnsi.h added) */ + uint8_t pp; + uint8_t w; + uint8_t l; + uint8_t z; + uint8_t b; + uint8_t nd; + uint8_t zu; + uint8_t aaa; + uint8_t nf; + uint8_t dfl; + uint8_t scc; +}; + +struct prefix_info { + uint8_t osize; /* Operand size */ + uint8_t asize; /* Address size */ + uint8_t osp; /* Operand size prefix present */ + uint8_t asp; /* Address size prefix present */ + uint8_t rep; /* Rep prefix present */ + uint8_t seg; /* Segment override prefix present */ + uint8_t wait; /* WAIT "prefix" present */ + uint8_t lock; /* Lock prefix present */ + enum reg_enum segover; /* Segment override register enum */ + struct rexfields rex; /* REX/REX2/VEX/EVEX */ +}; + +const uint8_t *parse_prefixes(struct prefix_info *pf, const uint8_t *data, + int bits); + +#define fetch_safe(_start, _ptr, _size, _need, _op) \ + do { \ + if (((_ptr) - (_start)) >= ((_size) - (_need))) \ + _op; \ + } while (0) + + +/* Error module */ +void usage(void); + +#endif diff --git a/include/disp8.h b/include/disp8.h new file mode 100644 index 0000000..46797ad --- /dev/null +++ b/include/disp8.h @@ -0,0 +1,89 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 1996-2024 The NASM Authors - All Rights Reserved */ + +/* + * disp8.h header file for disp8.c + */ + +#ifndef NASM_DISP8_H +#define NASM_DISP8_H + +#include "nasm.h" + +/* + * Find shift value for compressed displacement (disp8 << shift) + */ +static inline unsigned int get_disp8_shift(const insn *ins) +{ + bool evex_b; + unsigned int evex_w; + unsigned int vectlen; + enum ttypes tuple = ins->evex_tuple; + + if (likely(!tuple)) + return 0; + + evex_b = !!(ins->evex & EVEX_B); + evex_w = !!(ins->evex & EVEX_W); + /* XXX: consider RC/SAE here?! */ + vectlen = getfield(EVEX_LL, ins->evex); + + switch (tuple) { + /* Full, half vector unless broadcast */ + case FV: + return evex_b ? 2 + evex_w : vectlen + 4; + case HV: + return evex_b ? 2 + evex_w : vectlen + 3; + + /* Full vector length */ + case FVM: + return vectlen + 4; + + /* Fixed tuple lengths */ + case T1S8: + return 0; + case T1S16: + return 1; + case T1F32: + return 2; + case T1F64: + return 3; + case M128: + return 4; + + /* One scalar */ + case T1S: + return 2 + evex_w; + + /* 2, 4, 8 32/64-bit elements */ + case T2: + return 3 + evex_w; + case T4: + return 4 + evex_w; + case T8: + return 5 + evex_w; + + /* Half, quarter, eigth mem */ + case HVM: + return vectlen + 3; + case QVM: + return vectlen + 2; + case OVM: + return vectlen + 1; + + /* MOVDDUP */ + case DUP: + /* + * 128-bit vector case doesn't follow the same formula as 256- and + * 512-bit vectors. + */ + if (!vectlen) + return 3; + return vectlen + 4; + + default: + return 0; + } +} + +#endif /* NASM_DISP8_H */ diff --git a/include/dwarf.h b/include/dwarf.h new file mode 100644 index 0000000..43b4b75 --- /dev/null +++ b/include/dwarf.h @@ -0,0 +1,591 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 1996-2018 The NASM Authors - All Rights Reserved */ + +#ifndef OUTPUT_DWARF_H +#define OUTPUT_DWARF_H + +/* + * based on DWARF 3 standard + */ + +enum dwarf_tag { + DW_TAG_padding = 0x00, + DW_TAG_array_type = 0x01, + DW_TAG_class_type = 0x02, + DW_TAG_entry_point = 0x03, + DW_TAG_enumeration_type = 0x04, + DW_TAG_formal_parameter = 0x05, + DW_TAG_global_subroutine = 0x06, + DW_TAG_global_variable = 0x07, + DW_TAG_label = 0x0a, + DW_TAG_lexical_block = 0x0b, + DW_TAG_local_variable = 0x0c, + DW_TAG_member = 0x0d, + DW_TAG_pointer_type = 0x0f, + DW_TAG_reference_type = 0x10, + DW_TAG_compile_unit = 0x11, + DW_TAG_string_type = 0x12, + DW_TAG_structure_type = 0x13, + DW_TAG_subroutine = 0x14, + DW_TAG_subroutine_type = 0x15, + DW_TAG_typedef = 0x16, + DW_TAG_union_type = 0x17, + DW_TAG_unspecified_parameters = 0x18, + DW_TAG_variant = 0x19, + DW_TAG_common_block = 0x1a, + DW_TAG_common_inclusion = 0x1b, + DW_TAG_inheritance = 0x1c, + DW_TAG_inlined_subroutine = 0x1d, + DW_TAG_module = 0x1e, + DW_TAG_ptr_to_member_type = 0x1f, + DW_TAG_set_type = 0x20, + DW_TAG_subrange_type = 0x21, + DW_TAG_with_stmt = 0x22, + DW_TAG_access_declaration = 0x23, + DW_TAG_base_type = 0x24, + DW_TAG_catch_block = 0x25, + DW_TAG_const_type = 0x26, + DW_TAG_constant = 0x27, + DW_TAG_enumerator = 0x28, + DW_TAG_file_type = 0x29, + DW_TAG_friend = 0x2a, + DW_TAG_namelist = 0x2b, + DW_TAG_namelist_item = 0x2c, + DW_TAG_packed_type = 0x2d, + DW_TAG_subprogram = 0x2e, + DW_TAG_template_type_parameter = 0x2f, + DW_TAG_template_value_parameter = 0x30, + DW_TAG_thrown_type = 0x31, + DW_TAG_try_block = 0x32, + DW_TAG_variant_part = 0x33, + DW_TAG_variable = 0x34, + DW_TAG_volatile_type = 0x35, + /* DWARF 3 */ + DW_TAG_dwarf_procedure = 0x36, + DW_TAG_restrict_type = 0x37, + DW_TAG_interface_type = 0x38, + DW_TAG_namespace = 0x39, + DW_TAG_imported_module = 0x3a, + DW_TAG_unspecified_type = 0x3b, + DW_TAG_partial_unit = 0x3c, + DW_TAG_imported_unit = 0x3d, + DW_TAG_condition = 0x3f, + DW_TAG_shared_type = 0x40, + /* DWARF 4 */ + DW_TAG_type_unit = 0x41, + DW_TAG_rvalue_reference_type = 0x42, + DW_TAG_template_alias = 0x43, + /* DWARF 5 */ + DW_TAG_atomic_type = 0x47, + + DW_TAG_lo_user = 0x4080, + DW_TAG_hi_user = 0xffff +}; + +enum dwarf_child { + DW_CHILDREN_no = 0x00, + DW_CHILDREN_yes = 0x01 +}; + +enum dwarf_form { + DW_FORM_addr = 0x01, + DW_FORM_block2 = 0x03, + DW_FORM_block4 = 0x04, + DW_FORM_data2 = 0x05, + DW_FORM_data4 = 0x06, + DW_FORM_data8 = 0x07, + DW_FORM_string = 0x08, + DW_FORM_block = 0x09, + DW_FORM_block1 = 0x0a, + DW_FORM_data1 = 0x0b, + DW_FORM_flag = 0x0c, + DW_FORM_sdata = 0x0d, + DW_FORM_strp = 0x0e, + DW_FORM_udata = 0x0f, + DW_FORM_ref_addr = 0x10, + DW_FORM_ref1 = 0x11, + DW_FORM_ref2 = 0x12, + DW_FORM_ref4 = 0x13, + DW_FORM_ref8 = 0x14, + DW_FORM_ref_udata = 0x15, + DW_FORM_indirect = 0x16, + /* DWARF 4 */ + DW_FORM_sec_offset = 0x17, + DW_FORM_exprloc = 0x18, + DW_FORM_flag_present = 0x19, + DW_FORM_ref_sig8 = 0x20 +}; + +enum dwarf_attribute { + DW_AT_sibling = 0x01, + DW_AT_location = 0x02, + DW_AT_name = 0x03, + DW_AT_ordering = 0x09, + DW_AT_byte_size = 0x0b, + DW_AT_bit_offset = 0x0c, + DW_AT_bit_size = 0x0d, + DW_AT_stmt_list = 0x10, + DW_AT_low_pc = 0x11, + DW_AT_high_pc = 0x12, + DW_AT_language = 0x13, + DW_AT_discr = 0x15, + DW_AT_discr_value = 0x16, + DW_AT_visibility = 0x17, + DW_AT_import = 0x18, + DW_AT_string_length = 0x19, + DW_AT_common_reference = 0x1a, + DW_AT_comp_dir = 0x1b, + DW_AT_const_value = 0x1c, + DW_AT_containing_type = 0x1d, + DW_AT_default_value = 0x1e, + DW_AT_inline = 0x20, + DW_AT_is_optional = 0x21, + DW_AT_lower_bound = 0x22, + DW_AT_producer = 0x25, + DW_AT_prototyped = 0x27, + DW_AT_return_addr = 0x2a, + DW_AT_start_scope = 0x2c, + DW_AT_bit_stride = 0x2e, + DW_AT_upper_bound = 0x2f, + DW_AT_abstract_origin = 0x31, + DW_AT_accessibility = 0x32, + DW_AT_address_class = 0x33, + DW_AT_artificial = 0x34, + DW_AT_base_types = 0x35, + DW_AT_calling_convention= 0x36, + DW_AT_count = 0x37, + DW_AT_data_member_location = 0x38, + DW_AT_decl_column = 0x39, + DW_AT_decl_file = 0x3a, + DW_AT_decl_line = 0x3b, + DW_AT_declaration = 0x3c, + DW_AT_discr_list = 0x3d, + DW_AT_encoding = 0x3e, + DW_AT_external = 0x3f, + DW_AT_frame_base = 0x40, + DW_AT_friend = 0x41, + DW_AT_identifier_case = 0x42, + DW_AT_macro_info = 0x43, + DW_AT_namelist_item = 0x44, + DW_AT_priority = 0x45, + DW_AT_segment = 0x46, + DW_AT_specification = 0x47, + DW_AT_static_link = 0x48, + DW_AT_type = 0x49, + DW_AT_use_location = 0x4a, + DW_AT_variable_parameter = 0x4b, + DW_AT_virtuality = 0x4c, + DW_AT_vtable_elem_location = 0x4d, + /* DWARF 3 */ + DW_AT_allocated = 0x4e, + DW_AT_associated = 0x4f, + DW_AT_data_location = 0x50, + DW_AT_byte_stride = 0x51, + DW_AT_entry_pc = 0x52, + DW_AT_use_UTF8 = 0x53, + DW_AT_extension = 0x54, + DW_AT_ranges = 0x55, + DW_AT_trampoline = 0x56, + DW_AT_call_column = 0x57, + DW_AT_call_file = 0x58, + DW_AT_call_line = 0x59, + DW_AT_description = 0x5a, + DW_AT_binary_scale = 0x5b, + DW_AT_decimal_scale = 0x5c, + DW_AT_small = 0x5d, + DW_AT_decimal_sign = 0x5e, + DW_AT_digit_count = 0x5f, + DW_AT_picture_string = 0x60, + DW_AT_mutable = 0x61, + DW_AT_threads_scaled = 0x62, + DW_AT_explicit = 0x63, + DW_AT_object_pointer = 0x64, + DW_AT_endianity = 0x65, + DW_AT_elemental = 0x66, + DW_AT_pure = 0x67, + DW_AT_recursive = 0x68, + /* DWARF 4 */ + DW_AT_signature = 0x69, + DW_AT_main_subprogram = 0x6a, + DW_AT_data_bit_offset = 0x6b, + DW_AT_const_expr = 0x6c, + DW_AT_enum_class = 0x6d, + DW_AT_linkage_name = 0x6e, + /* DWARF 5 */ + DW_AT_noreturn = 0x87, + + DW_AT_lo_user = 0x2000, + DW_AT_hi_user = 0x3fff +}; + +enum dwarf_op { + DW_OP_addr = 0x03, + DW_OP_deref = 0x06, + DW_OP_const1u = 0x08, + DW_OP_const1s = 0x09, + DW_OP_const2u = 0x0a, + DW_OP_const2s = 0x0b, + DW_OP_const4u = 0x0c, + DW_OP_const4s = 0x0d, + DW_OP_const8u = 0x0e, + DW_OP_const8s = 0x0f, + DW_OP_constu = 0x10, + DW_OP_consts = 0x11, + DW_OP_dup = 0x12, + DW_OP_drop = 0x13, + DW_OP_over = 0x14, + DW_OP_pick = 0x15, + DW_OP_swap = 0x16, + DW_OP_rot = 0x17, + DW_OP_xderef = 0x18, + DW_OP_abs = 0x19, + DW_OP_and = 0x1a, + DW_OP_div = 0x1b, + DW_OP_minus = 0x1c, + DW_OP_mod = 0x1d, + DW_OP_mul = 0x1e, + DW_OP_neg = 0x1f, + DW_OP_not = 0x20, + DW_OP_or = 0x21, + DW_OP_plus = 0x22, + DW_OP_plus_uconst = 0x23, + DW_OP_shl = 0x24, + DW_OP_shr = 0x25, + DW_OP_shra = 0x26, + DW_OP_xor = 0x27, + DW_OP_skip = 0x2f, + DW_OP_bra = 0x28, + DW_OP_eq = 0x29, + DW_OP_ge = 0x2a, + DW_OP_gt = 0x2b, + DW_OP_le = 0x2c, + DW_OP_lt = 0x2d, + DW_OP_ne = 0x2e, + DW_OP_lit0 = 0x30, + DW_OP_lit1 = 0x31, + DW_OP_lit2 = 0x32, + DW_OP_lit3 = 0x33, + DW_OP_lit4 = 0x34, + DW_OP_lit5 = 0x35, + DW_OP_lit6 = 0x36, + DW_OP_lit7 = 0x37, + DW_OP_lit8 = 0x38, + DW_OP_lit9 = 0x39, + DW_OP_lit10 = 0x3a, + DW_OP_lit11 = 0x3b, + DW_OP_lit12 = 0x3c, + DW_OP_lit13 = 0x3d, + DW_OP_lit14 = 0x3e, + DW_OP_lit15 = 0x3f, + DW_OP_lit16 = 0x40, + DW_OP_lit17 = 0x41, + DW_OP_lit18 = 0x42, + DW_OP_lit19 = 0x43, + DW_OP_lit20 = 0x44, + DW_OP_lit21 = 0x45, + DW_OP_lit22 = 0x46, + DW_OP_lit23 = 0x47, + DW_OP_lit24 = 0x48, + DW_OP_lit25 = 0x49, + DW_OP_lit26 = 0x4a, + DW_OP_lit27 = 0x4b, + DW_OP_lit28 = 0x4c, + DW_OP_lit29 = 0x4d, + DW_OP_lit30 = 0x4e, + DW_OP_lit31 = 0x4f, + DW_OP_reg0 = 0x50, + DW_OP_reg1 = 0x51, + DW_OP_reg2 = 0x52, + DW_OP_reg3 = 0x53, + DW_OP_reg4 = 0x54, + DW_OP_reg5 = 0x55, + DW_OP_reg6 = 0x56, + DW_OP_reg7 = 0x57, + DW_OP_reg8 = 0x58, + DW_OP_reg9 = 0x59, + DW_OP_reg10 = 0x5a, + DW_OP_reg11 = 0x5b, + DW_OP_reg12 = 0x5c, + DW_OP_reg13 = 0x5d, + DW_OP_reg14 = 0x5e, + DW_OP_reg15 = 0x5f, + DW_OP_reg16 = 0x60, + DW_OP_reg17 = 0x61, + DW_OP_reg18 = 0x62, + DW_OP_reg19 = 0x63, + DW_OP_reg20 = 0x64, + DW_OP_reg21 = 0x65, + DW_OP_reg22 = 0x66, + DW_OP_reg23 = 0x67, + DW_OP_reg24 = 0x68, + DW_OP_reg25 = 0x69, + DW_OP_reg26 = 0x6a, + DW_OP_reg27 = 0x6b, + DW_OP_reg28 = 0x6c, + DW_OP_reg29 = 0x6d, + DW_OP_reg30 = 0x6e, + DW_OP_reg31 = 0x6f, + DW_OP_breg0 = 0x70, + DW_OP_breg1 = 0x71, + DW_OP_breg2 = 0x72, + DW_OP_breg3 = 0x73, + DW_OP_breg4 = 0x74, + DW_OP_breg5 = 0x75, + DW_OP_breg6 = 0x76, + DW_OP_breg7 = 0x77, + DW_OP_breg8 = 0x78, + DW_OP_breg9 = 0x79, + DW_OP_breg10 = 0x7a, + DW_OP_breg11 = 0x7b, + DW_OP_breg12 = 0x7c, + DW_OP_breg13 = 0x7d, + DW_OP_breg14 = 0x7e, + DW_OP_breg15 = 0x7f, + DW_OP_breg16 = 0x80, + DW_OP_breg17 = 0x81, + DW_OP_breg18 = 0x82, + DW_OP_breg19 = 0x83, + DW_OP_breg20 = 0x84, + DW_OP_breg21 = 0x85, + DW_OP_breg22 = 0x86, + DW_OP_breg23 = 0x87, + DW_OP_breg24 = 0x88, + DW_OP_breg25 = 0x89, + DW_OP_breg26 = 0x8a, + DW_OP_breg27 = 0x8b, + DW_OP_breg28 = 0x8c, + DW_OP_breg29 = 0x8d, + DW_OP_breg30 = 0x8e, + DW_OP_breg31 = 0x8f, + DW_OP_regx = 0x90, + DW_OP_fbreg = 0x91, + DW_OP_bregx = 0x92, + DW_OP_piece = 0x93, + DW_OP_deref_size = 0x94, + DW_OP_xderef_size = 0x95, + DW_OP_nop = 0x96, + /* DWARF 3 */ + DW_OP_push_object_address = 0x97, + DW_OP_call2 = 0x98, + DW_OP_call4 = 0x99, + DW_OP_call_ref = 0x9a , + DW_OP_form_tls_address = 0x9b, + DW_OP_call_frame_cfa = 0x9c, + DW_OP_bit_piece = 0x9d, + /* DWARF 4 */ + DW_OP_implicit_value = 0x9e, + DW_OP_stack_value = 0x9f, + + DW_OP_lo_user = 0xe0, + DW_OP_hi_user = 0xff +}; + +enum dwarf_base_type { + DW_ATE_address = 0x01, + DW_ATE_boolean = 0x02, + DW_ATE_complex_float = 0x03, + DW_ATE_float = 0x04, + DW_ATE_signed = 0x05, + DW_ATE_signed_char = 0x06, + DW_ATE_unsigned = 0x07, + DW_ATE_unsigned_char = 0x08, + /* DWARF 3 */ + DW_ATE_imaginary_float = 0x09, + DW_ATE_packed_decimal = 0x0a, + DW_ATE_numeric_string = 0x0b, + DW_ATE_edited = 0x0c, + DW_ATE_signed_fixed = 0x0d, + DW_ATE_unsigned_fixed = 0x0e, + DW_ATE_decimal_float = 0x0f, + /* DWARF 4 */ + DW_ATE_UTF = 0x10, + + DW_ATE_lo_user = 0x80, + DW_ATE_hi_user = 0xff +}; + +enum dwarf_decimal_sign { + DW_DS_unsigned = 0x01, + DW_DS_leading_overpunch = 0x02, + DW_DS_trailing_overpunch = 0x03, + DW_DS_leading_separate = 0x04, + DW_DS_trailing_separate = 0x05 +}; + +enum dwarf_endianity { + DW_END_default = 0x00, + DW_END_big = 0x01, + DW_END_little = 0x02, + + DW_END_lo_user = 0x40, + DW_END_hi_user = 0xff +}; + +enum dwarf_accessibility { + DW_ACCESS_public = 0x01, + DW_ACCESS_protected = 0x02, + DW_ACCESS_private = 0x03 +}; + +enum dwarf_visibility { + DW_VIS_local = 0x01, + DW_VIS_exported = 0x02, + DW_VIS_qualified = 0x03 +}; + +enum dwarf_virtuality { + DW_VIRTUALITY_none = 0x00, + DW_VIRTUALITY_virtual = 0x01, + DW_VIRTUALITY_pure_virtual = 0x02 +}; + +enum dwarf_language { + DW_LANG_C89 = 0x0001, + DW_LANG_C = 0x0002, + DW_LANG_Ada83 = 0x0003, + DW_LANG_C_plus_plus = 0x0004, + DW_LANG_Cobol74 = 0x0005, + DW_LANG_Cobol85 = 0x0006, + DW_LANG_Fortran77 = 0x0007, + DW_LANG_Fortran90 = 0x0008, + DW_LANG_Pascal83 = 0x0009, + DW_LANG_Modula2 = 0x000a, + DW_LANG_Java = 0x000b, + DW_LANG_C99 = 0x000c, + DW_LANG_Ada95 = 0x000d, + DW_LANG_Fortran95 = 0x000e, + DW_LANG_PLI = 0x000f, + DW_LANG_ObjC = 0x0010, + DW_LANG_ObjC_plus_plus = 0x0011, + DW_LANG_UPC = 0x0012, + DW_LANG_D = 0x0013, + DW_LANG_Python = 0x0014, + DW_LANG_OpenCL = 0x0015, + DW_LANG_Go = 0x0016, + DW_LANG_Modula3 = 0x0017, + DW_LANG_Haskell = 0x0018, + DW_LANG_C_plus_plus_03 = 0x0019, + DW_LANG_C_plus_plus_11 = 0x001a, + DW_LANG_OCaml = 0x001b, + DW_LANG_Rust = 0x001c, + DW_LANG_C11 = 0x001d, + DW_LANG_Swift = 0x001e, + DW_LANG_Julia = 0x001f, + DW_LANG_Dylan = 0x0020, + DW_LANG_C_plus_plus_14 = 0x0021, + DW_LANG_Fortran03 = 0x0022, + DW_LANG_Fortran08 = 0x0023, + DW_LANG_RenderScript = 0x0024, + + DW_LANG_Mips_Assembler = 0x8001, + + DW_LANG_lo_user = 0x8000, + DW_LANG_hi_user = 0xffff, + + DW_LANG_Rust_old = 0x9000 +}; + +enum dwarf_identifier_case { + DW_ID_case_sensitive = 0x00, + DW_ID_up_case = 0x01, + DW_ID_down_case = 0x02, + DW_ID_case_insensitive = 0x03 +}; + +enum dwarf_calling_conversion { + DW_CC_normal = 0x01, + DW_CC_program = 0x02, + DW_CC_nocall = 0x03, + DW_CC_pass_by_reference = 0x4, + DW_CC_pass_by_value = 0x5, + + DW_CC_lo_user = 0x40, + DW_CC_hi_user = 0xff, + + DW_CC_GNU_renesas_sh = 0x40, + DW_CC_GNU_borland_fastcall_i386 = 0x41 +}; + +enum dwarf_inline { + DW_INL_not_inlined = 0x00, + DW_INL_inlined = 0x01, + DW_INL_declared_not_inlined = 0x02, + DW_INL_declared_inlined = 0x03 +}; + +enum dwarf_ordering { + DW_ORD_row_major = 0x00, + DW_ORD_col_major = 0x01 +}; + +enum dwarf_discriminant { + DW_DSC_label = 0x00, + DW_DSC_range = 0x01 +}; + +enum dwarf_line_number { + DW_LNS_extended_op = 0x00, + DW_LNS_copy = 0x01, + DW_LNS_advance_pc = 0x02, + DW_LNS_advance_line = 0x03, + DW_LNS_set_file = 0x04, + DW_LNS_set_column = 0x05, + DW_LNS_negate_stmt = 0x06, + DW_LNS_set_basic_block = 0x07, + DW_LNS_const_add_pc = 0x08, + DW_LNS_fixed_advance_pc = 0x09, + DW_LNS_set_prologue_end = 0x0a, + DW_LNS_set_epilogue_begin = 0x0b, + DW_LNS_set_isa = 0x0c +}; + +enum dwarf_line_number_extended { + DW_LNE_end_sequence = 0x01, + DW_LNE_set_address = 0x02, + DW_LNE_define_file = 0x03, + DW_LNE_set_discriminator= 0x04, + DW_LNE_lo_user = 0x80, + DW_LNE_hi_user = 0xff +}; + +enum dwarf_macinfo_type { + DW_MACINFO_define = 0x01, + DW_MACINFO_undef = 0x02, + DW_MACINFO_start_file = 0x03, + DW_MACINFO_end_file = 0x04, + DW_MACINFO_vendor_ext = 0xff +}; + +enum dwarf_call_frame { + DW_CFA_advance_loc = 0x01, + DW_CFA_offset = 0x02, + DW_CFA_restore = 0x03, + DW_CFA_nop = 0x00, + DW_CFA_set_loc = 0x01, + DW_CFA_advance_loc1 = 0x02, + DW_CFA_advance_loc2 = 0x03, + DW_CFA_advance_loc4 = 0x04, + DW_CFA_offset_extended = 0x05, + DW_CFA_restore_extended = 0x06, + DW_CFA_undefined = 0x07, + DW_CFA_same_value = 0x08, + DW_CFA_register = 0x09, + DW_CFA_remember_state = 0x0a, + DW_CFA_restore_state = 0x0b, + DW_CFA_def_cfa = 0x0c, + DW_CFA_def_cfa_register = 0x0d, + DW_CFA_def_cfa_offset = 0x0e, + /* DWARF 3 */ + DW_CFA_def_cfa_expression = 0x0f, + DW_CFA_expression = 0x10, + DW_CFA_offset_extended_sf = 0x11, + DW_CFA_def_cfa_sf = 0x12, + DW_CFA_def_cfa_offset_sf = 0x13, + DW_CFA_val_offset = 0x14, + DW_CFA_val_offset_sf = 0x15, + DW_CFA_val_expression = 0x16, + DW_CFA_lo_user = 0x1c, + DW_CFA_hi_user = 0x3f +}; + +#endif /* OUTPUT_DWARF_H */ diff --git a/include/elf.h b/include/elf.h new file mode 100644 index 0000000..6a779a8 --- /dev/null +++ b/include/elf.h @@ -0,0 +1,528 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 1996-2018 The NASM Authors - All Rights Reserved */ + +#ifndef OUTPUT_ELF_H +#define OUTPUT_ELF_H + +/* + * Since NASM support both Elf32/64 file formats + * we need to cover all types, structures, typedefs and etc + */ + +#include "compiler.h" + +/* Segment types */ +#define PT_NULL 0 +#define PT_LOAD 1 +#define PT_DYNAMIC 2 +#define PT_INTERP 3 +#define PT_NOTE 4 +#define PT_SHLIB 5 +#define PT_PHDR 6 +#define PT_LOOS 0x60000000 +#define PT_HIOS 0x6fffffff +#define PT_LOPROC 0x70000000 +#define PT_HIPROC 0x7fffffff +#define PT_GNU_EH_FRAME 0x6474e550 /* Extension, eh? */ + +/* ELF file types */ +#define ET_NONE 0 +#define ET_REL 1 +#define ET_EXEC 2 +#define ET_DYN 3 +#define ET_CORE 4 +#define ET_LOPROC 0xff00 +#define ET_HIPROC 0xffff + +/* ELF machine types */ +#define EM_NONE 0 +#define EM_M32 1 +#define EM_SPARC 2 +#define EM_386 3 +#define EM_68K 4 +#define EM_88K 5 +#define EM_486 6 /* Not used in Linux at least */ +#define EM_860 7 +#define EM_MIPS 8 /* R3k, bigendian(?) */ +#define EM_MIPS_RS4_BE 10 /* R4k BE */ +#define EM_PARISC 15 +#define EM_SPARC32PLUS 18 +#define EM_PPC 20 +#define EM_PPC64 21 +#define EM_S390 22 +#define EM_SH 42 +#define EM_SPARCV9 43 /* v9 = SPARC64 */ +#define EM_H8_300H 47 +#define EM_H8S 48 +#define EM_IA_64 50 +#define EM_X86_64 62 +#define EM_CRIS 76 +#define EM_V850 87 +#define EM_ALPHA 0x9026 /* Interim Alpha that stuck around */ +#define EM_CYGNUS_V850 0x9080 /* Old v850 ID used by Cygnus */ +#define EM_S390_OLD 0xA390 /* Obsolete interim value for S/390 */ + +/* Dynamic type values */ +#define DT_NULL 0 +#define DT_NEEDED 1 +#define DT_PLTRELSZ 2 +#define DT_PLTGOT 3 +#define DT_HASH 4 +#define DT_STRTAB 5 +#define DT_SYMTAB 6 +#define DT_RELA 7 +#define DT_RELASZ 8 +#define DT_RELAENT 9 +#define DT_STRSZ 10 +#define DT_SYMENT 11 +#define DT_INIT 12 +#define DT_FINI 13 +#define DT_SONAME 14 +#define DT_RPATH 15 +#define DT_SYMBOLIC 16 +#define DT_REL 17 +#define DT_RELSZ 18 +#define DT_RELENT 19 +#define DT_PLTREL 20 +#define DT_DEBUG 21 +#define DT_TEXTREL 22 +#define DT_JMPREL 23 +#define DT_LOPROC 0x70000000 +#define DT_HIPROC 0x7fffffff + +/* Auxiliary table entries */ +#define AT_NULL 0 /* end of vector */ +#define AT_IGNORE 1 /* entry should be ignored */ +#define AT_EXECFD 2 /* file descriptor of program */ +#define AT_PHDR 3 /* program headers for program */ +#define AT_PHENT 4 /* size of program header entry */ +#define AT_PHNUM 5 /* number of program headers */ +#define AT_PAGESZ 6 /* system page size */ +#define AT_BASE 7 /* base address of interpreter */ +#define AT_FLAGS 8 /* flags */ +#define AT_ENTRY 9 /* entry point of program */ +#define AT_NOTELF 10 /* program is not ELF */ +#define AT_UID 11 /* real uid */ +#define AT_EUID 12 /* effective uid */ +#define AT_GID 13 /* real gid */ +#define AT_EGID 14 /* effective gid */ +#define AT_PLATFORM 15 /* string identifying CPU for optimizations */ +#define AT_HWCAP 16 /* arch dependent hints at CPU capabilities */ +#define AT_CLKTCK 17 /* frequency at which times() increments */ +/* 18..22 = ? */ +#define AT_SECURE 23 /* secure mode boolean */ + +/* Program header permission flags */ +#define PF_X 0x1 +#define PF_W 0x2 +#define PF_R 0x4 + +/* Section header types */ +#define SHT_NULL 0 +#define SHT_PROGBITS 1 +#define SHT_SYMTAB 2 +#define SHT_STRTAB 3 +#define SHT_RELA 4 +#define SHT_HASH 5 +#define SHT_DYNAMIC 6 +#define SHT_NOTE 7 +#define SHT_NOBITS 8 +#define SHT_REL 9 +#define SHT_SHLIB 10 +#define SHT_DYNSYM 11 +#define SHT_INIT_ARRAY 14 +#define SHT_FINI_ARRAY 15 +#define SHT_PREINIT_ARRAY 16 +#define SHT_GROUP 17 +#define SHT_SYMTAB_SHNDX 18 +#define SHT_LOPROC 0x70000000 +#define SHT_HIPROC 0x7fffffff +#define SHT_LOUSER 0x80000000 +#define SHT_HIUSER 0xffffffff + +/* Section header flags */ +#define SHF_WRITE (1 << 0) /* Writable */ +#define SHF_ALLOC (1 << 1) /* Occupies memory during execution */ +#define SHF_EXECINSTR (1 << 2) /* Executable */ +#define SHF_MERGE (1 << 4) /* Might be merged */ +#define SHF_STRINGS (1 << 5) /* Contains nul-terminated strings */ +#define SHF_INFO_LINK (1 << 6) /* `sh_info' contains SHT index */ +#define SHF_LINK_ORDER (1 << 7) /* Preserve order after combining */ +#define SHF_OS_NONCONFORMING (1 << 8) /* Non-standard OS specific handling required */ +#define SHF_GROUP (1 << 9) /* Section is member of a group */ +#define SHF_TLS (1 << 10) /* Section hold thread-local data */ + +/* Special section numbers */ +#define SHN_UNDEF 0x0000 +#define SHN_LORESERVE 0xff00 +#define SHN_LOPROC 0xff00 +#define SHN_HIPROC 0xff1f +#define SHN_ABS 0xfff1 +#define SHN_COMMON 0xfff2 +#define SHN_XINDEX 0xffff +#define SHN_HIRESERVE 0xffff + +/* Same, but signed/sign-extended */ +#define XSHN_UNDEF ((int16_t)SHN_UNDEF) +#define XSHN_LORESERVE ((int16_t)SHN_LORESERVE) +#define XSHN_LOPROC ((int16_t)SHN_LOPROC) +#define XSHN_HIPROC ((int16_t)SHN_HIPROC) +#define XSHN_ABS ((int16_t)SHN_ABS) +#define XSHN_COMMON ((int16_t)SHN_COMMON) +#define XSHN_XINDEX ((int16_t)SHN_XINDEX) +#define XSHN_HIRESERVE ((int16_t)SHN_HIRESERVE) + +/* Section align flag */ +#define SHA_ANY 1 /* No alignment constraint */ + +/* Length of magic at the start of a file */ +#define EI_NIDENT 16 + +/* Magic number constants... */ +#define EI_MAG0 0 /* e_ident[] indexes */ +#define EI_MAG1 1 +#define EI_MAG2 2 +#define EI_MAG3 3 +#define EI_CLASS 4 +#define EI_DATA 5 +#define EI_VERSION 6 +#define EI_OSABI 7 +#define EI_ABIVERSION 8 +#define EI_NINDENT 16 + +#define ELFMAG0 0x7f /* EI_MAG */ +#define ELFMAG1 'E' +#define ELFMAG2 'L' +#define ELFMAG3 'F' +#define ELFMAG "\177ELF" +#define SELFMAG 4 + +#define ELFCLASSNONE 0 /* EI_CLASS */ +#define ELFCLASS32 1 +#define ELFCLASS64 2 +#define ELFCLASSNUM 3 + +#define ELFDATANONE 0 /* e_ident[EI_DATA] */ +#define ELFDATA2LSB 1 +#define ELFDATA2MSB 2 + +#define EV_NONE 0 /* e_version, EI_VERSION */ +#define EV_CURRENT 1 +#define EV_NUM 2 + +#define ELFOSABI_NONE 0 +#define ELFOSABI_LINUX 3 + +/* Legal values for ST_BIND subfield of st_info (symbol binding) */ +#define STB_LOCAL 0 /* Local symbol */ +#define STB_GLOBAL 1 /* Global symbol */ +#define STB_WEAK 2 /* Weak symbol */ +#define STB_NUM 3 /* Number of defined types */ +#define STB_LOOS 10 /* Start of OS-specific */ +#define STB_HIOS 12 /* End of OS-specific */ +#define STB_LOPROC 13 /* Start of processor-specific */ +#define STB_HIPROC 15 /* End of processor-specific */ + +/* Symbol types */ +#define STT_NOTYPE 0 /* Symbol type is unspecified */ +#define STT_OBJECT 1 /* Symbol is a data object */ +#define STT_FUNC 2 /* Symbol is a code object */ +#define STT_SECTION 3 /* Symbol associated with a section */ +#define STT_FILE 4 /* Symbol's name is file name */ +#define STT_COMMON 5 /* Symbol is a common data object */ +#define STT_TLS 6 /* Symbol is thread-local data object */ +#define STT_NUM 7 /* Number of defined types */ +#define STT_GNU_IFUNC 10 /* Symbol is indirect code object */ + +/* Symbol visibilities */ +#define STV_DEFAULT 0 /* Default symbol visibility rules */ +#define STV_INTERNAL 1 /* Processor specific hidden class */ +#define STV_HIDDEN 2 /* Sym unavailable in other modules */ +#define STV_PROTECTED 3 /* Not preemptible, not exported */ + +/* Both Elf32_Sym and Elf64_Sym use the same one-byte st_info field */ +#define ELF32_ST_BIND(i) ((i) >> 4) +#define ELF32_ST_MKBIND(i) ((i) << 4) /* just a helper */ +#define ELF32_ST_TYPE(i) ((i) & 0xf) +#define ELF32_ST_INFO(b, i) (ELF32_ST_MKBIND(b) + ELF32_ST_TYPE(i)) + +#define ELF64_ST_BIND(i) ELF32_ST_BIND(i) +#define ELF64_ST_MKBIND(i) ELF32_ST_MKBIND(i) +#define ELF64_ST_TYPE(i) ELF32_ST_TYPE(i) +#define ELF64_ST_INFO(b, i) ELF32_ST_INFO(b, i) + +/* + * ELF standard typedefs (yet more proof that was way overdue) + */ + +typedef uint16_t Elf32_Half; +typedef int16_t Elf32_SHalf; +typedef uint32_t Elf32_Word; +typedef int32_t Elf32_Sword; +typedef uint64_t Elf32_Xword; +typedef int64_t Elf32_Sxword; + +typedef uint32_t Elf32_Off; +typedef uint32_t Elf32_Addr; +typedef uint16_t Elf32_Section; + +typedef uint16_t Elf64_Half; +typedef int16_t Elf64_SHalf; +typedef uint32_t Elf64_Word; +typedef int32_t Elf64_Sword; +typedef uint64_t Elf64_Xword; +typedef int64_t Elf64_Sxword; + +typedef uint64_t Elf64_Off; +typedef uint64_t Elf64_Addr; +typedef uint16_t Elf64_Section; + +/* + * Dynamic header + */ + +typedef struct elf32_dyn { + Elf32_Sword d_tag; + union { + Elf32_Sword d_val; + Elf32_Addr d_ptr; + } d_un; +} Elf32_Dyn; + +typedef struct elf64_dyn { + Elf64_Sxword d_tag; + union { + Elf64_Xword d_val; + Elf64_Addr d_ptr; + } d_un; +} Elf64_Dyn; + +/* + * Relocations + */ + +#define ELF32_R_SYM(x) ((x) >> 8) +#define ELF32_R_TYPE(x) ((x) & 0xff) +#define ELF32_R_INFO(s,t) (((Elf32_Word)(s) << 8) + ELF32_R_TYPE(t)) + +typedef struct elf32_rel { + Elf32_Addr r_offset; + Elf32_Word r_info; +} Elf32_Rel; + +typedef struct elf32_rela { + Elf32_Addr r_offset; + Elf32_Word r_info; + Elf32_Sword r_addend; +} Elf32_Rela; + +enum reloc32_type { + R_386_32 = 1, /* ordinary absolute relocation */ + R_386_PC32 = 2, /* PC-relative relocation */ + R_386_GOT32 = 3, /* an offset into GOT */ + R_386_PLT32 = 4, /* a PC-relative offset into PLT */ + R_386_COPY = 5, /* ??? */ + R_386_GLOB_DAT = 6, /* ??? */ + R_386_JUMP_SLOT = 7, /* ??? */ + R_386_RELATIVE = 8, /* ??? */ + R_386_GOTOFF = 9, /* an offset from GOT base */ + R_386_GOTPC = 10, /* a PC-relative offset _to_ GOT */ + R_386_TLS_TPOFF = 14, /* Offset in static TLS block */ + R_386_TLS_IE = 15, /* Address of GOT entry for static TLS block offset */ + /* These are GNU extensions, but useful */ + R_386_16 = 20, /* A 16-bit absolute relocation */ + R_386_PC16 = 21, /* A 16-bit PC-relative relocation */ + R_386_8 = 22, /* An 8-bit absolute relocation */ + R_386_PC8 = 23, /* An 8-bit PC-relative relocation */ + R_386_SEG16 = 45, /* A 16-bit real-mode segment */ + R_386_SUB16 = 46, /* Subtract 16-bit value */ + R_386_SUB32 = 47 /* Subtract 32-bit value */ +}; + +#define ELF64_R_SYM(x) ((x) >> 32) +#define ELF64_R_TYPE(x) ((x) & 0xffffffff) +#define ELF64_R_INFO(s,t) (((Elf64_Xword)(s) << 32) + ELF64_R_TYPE(t)) + +typedef struct elf64_rel { + Elf64_Addr r_offset; + Elf64_Xword r_info; +} Elf64_Rel; + +typedef struct elf64_rela { + Elf64_Addr r_offset; + Elf64_Xword r_info; + Elf64_Sxword r_addend; +} Elf64_Rela; + +enum reloc64_type { + R_X86_64_NONE = 0, /* No reloc */ + R_X86_64_64 = 1, /* Direct 64 bit */ + R_X86_64_PC32 = 2, /* PC relative 32 bit signed */ + R_X86_64_GOT32 = 3, /* 32 bit GOT entry */ + R_X86_64_PLT32 = 4, /* 32 bit PLT address */ + R_X86_64_COPY = 5, /* Copy symbol at runtime */ + R_X86_64_GLOB_DAT = 6, /* Create GOT entry */ + R_X86_64_JUMP_SLOT = 7, /* Create PLT entry */ + R_X86_64_RELATIVE = 8, /* Adjust by program base */ + R_X86_64_GOTPCREL = 9, /* 32 bit signed PC relative offset to GOT */ + R_X86_64_32 = 10, /* Direct 32 bit zero extended */ + R_X86_64_32S = 11, /* Direct 32 bit sign extended */ + R_X86_64_16 = 12, /* Direct 16 bit zero extended */ + R_X86_64_PC16 = 13, /* 16 bit sign extended pc relative */ + R_X86_64_8 = 14, /* Direct 8 bit sign extended */ + R_X86_64_PC8 = 15, /* 8 bit sign extended pc relative */ + R_X86_64_DTPMOD64 = 16, /* ID of module containing symbol */ + R_X86_64_DTPOFF64 = 17, /* Offset in module's TLS block */ + R_X86_64_TPOFF64 = 18, /* Offset in initial TLS block */ + R_X86_64_TLSGD = 19, /* 32 bit signed PC relative offset to two GOT entries for GD symbol */ + R_X86_64_TLSLD = 20, /* 32 bit signed PC relative offset to two GOT entries for LD symbol */ + R_X86_64_DTPOFF32 = 21, /* Offset in TLS block */ + R_X86_64_GOTTPOFF = 22, /* 32 bit signed PC relative offset to GOT entry for IE symbol */ + R_X86_64_TPOFF32 = 23, /* Offset in initial TLS block */ + R_X86_64_PC64 = 24, /* word64 S + A - P */ + R_X86_64_GOTOFF64 = 25, /* word64 S + A - GOT */ + R_X86_64_GOTPC32 = 26, /* word32 GOT + A - P */ + R_X86_64_GOT64 = 27, /* word64 G + A */ + R_X86_64_GOTPCREL64 = 28, /* word64 G + GOT - P + A */ + R_X86_64_GOTPC64 = 29, /* word64 GOT - P + A */ + R_X86_64_GOTPLT64 = 30, /* word64 G + A */ + R_X86_64_PLTOFF64 = 31, /* word64 L - GOT + A */ + R_X86_64_SIZE32 = 32, /* word32 Z + A */ + R_X86_64_SIZE64 = 33, /* word64 Z + A */ + R_X86_64_GOTPC32_TLSDESC= 34, /* word32 */ + R_X86_64_TLSDESC_CALL = 35, /* none */ + R_X86_64_TLSDESC = 36 /* word64?2 */ +}; + +/* + * Symbol + */ + +typedef struct elf32_sym { + Elf32_Word st_name; + Elf32_Addr st_value; + Elf32_Word st_size; + unsigned char st_info; + unsigned char st_other; + Elf32_Half st_shndx; +} Elf32_Sym; + +typedef struct elf64_sym { + Elf64_Word st_name; + unsigned char st_info; + unsigned char st_other; + Elf64_Half st_shndx; + Elf64_Addr st_value; + Elf64_Xword st_size; +} Elf64_Sym; + +/* + * Main file header + */ + +typedef struct elf32_hdr { + unsigned char e_ident[EI_NIDENT]; + Elf32_Half e_type; + Elf32_Half e_machine; + Elf32_Word e_version; + Elf32_Addr e_entry; + Elf32_Off e_phoff; + Elf32_Off e_shoff; + Elf32_Word e_flags; + Elf32_Half e_ehsize; + Elf32_Half e_phentsize; + Elf32_Half e_phnum; + Elf32_Half e_shentsize; + Elf32_Half e_shnum; + Elf32_Half e_shstrndx; +} Elf32_Ehdr; + +typedef struct elf64_hdr { + unsigned char e_ident[EI_NIDENT]; + Elf64_Half e_type; + Elf64_Half e_machine; + Elf64_Word e_version; + Elf64_Addr e_entry; + Elf64_Off e_phoff; + Elf64_Off e_shoff; + Elf64_Word e_flags; + Elf64_Half e_ehsize; + Elf64_Half e_phentsize; + Elf64_Half e_phnum; + Elf64_Half e_shentsize; + Elf64_Half e_shnum; + Elf64_Half e_shstrndx; +} Elf64_Ehdr; + +/* + * Program header + */ + +typedef struct elf32_phdr { + Elf32_Word p_type; + Elf32_Off p_offset; + Elf32_Addr p_vaddr; + Elf32_Addr p_paddr; + Elf32_Word p_filesz; + Elf32_Word p_memsz; + Elf32_Word p_flags; + Elf32_Word p_align; +} Elf32_Phdr; + +typedef struct elf64_phdr { + Elf64_Word p_type; + Elf64_Word p_flags; + Elf64_Off p_offset; + Elf64_Addr p_vaddr; + Elf64_Addr p_paddr; + Elf64_Xword p_filesz; + Elf64_Xword p_memsz; + Elf64_Xword p_align; +} Elf64_Phdr; + +/* + * Section header + */ + +typedef struct elf32_shdr { + Elf32_Word sh_name; + Elf32_Word sh_type; + Elf32_Word sh_flags; + Elf32_Addr sh_addr; + Elf32_Off sh_offset; + Elf32_Word sh_size; + Elf32_Word sh_link; + Elf32_Word sh_info; + Elf32_Word sh_addralign; + Elf32_Word sh_entsize; +} Elf32_Shdr; + +typedef struct elf64_shdr { + Elf64_Word sh_name; + Elf64_Word sh_type; + Elf64_Xword sh_flags; + Elf64_Addr sh_addr; + Elf64_Off sh_offset; + Elf64_Xword sh_size; + Elf64_Word sh_link; + Elf64_Word sh_info; + Elf64_Xword sh_addralign; + Elf64_Xword sh_entsize; +} Elf64_Shdr; + +/* + * Note header + */ +typedef struct elf32_note { + Elf32_Word n_namesz; /* Name size */ + Elf32_Word n_descsz; /* Content size */ + Elf32_Word n_type; /* Content type */ +} Elf32_Nhdr; + +typedef struct elf64_note { + Elf64_Word n_namesz; /* Name size */ + Elf64_Word n_descsz; /* Content size */ + Elf64_Word n_type; /* Content type */ +} Elf64_Nhdr; + +#endif /* OUTPUT_ELF_H */ diff --git a/include/error.h b/include/error.h new file mode 100644 index 0000000..a6b03a7 --- /dev/null +++ b/include/error.h @@ -0,0 +1,252 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 1996-2024 The NASM Authors - All Rights Reserved */ + +/* + * Error reporting functions for the assembler + */ + +#ifndef NASM_ERROR_H +#define NASM_ERROR_H 1 + +#include "compiler.h" + +/* + * Typedef for the severity field + */ +typedef uint32_t errflags; + +/* + * An error reporting function should look like this. + */ +void printf_func(2, 3) nasm_error(errflags severity, const char *fmt, ...); +void printf_func(1, 2) nasm_listmsg(const char *fmt, ...); +void printf_func(2, 3) nasm_listmsgf(errflags flags, const char *fmt, ...); +void printf_func(2, 3) nasm_debug_(unsigned int level, const char *fmt, ...); +void printf_func(2, 3) nasm_info_(unsigned int level, const char *fmt, ...); +void printf_func(1, 2) nasm_note(const char *fmt, ...); +void printf_func(2, 3) nasm_notef(errflags flags, const char *fmt, ...); +void printf_func(2, 3) nasm_warn_(errflags flags, const char *fmt, ...); +void printf_func(1, 2) nasm_nonfatal(const char *fmt, ...); +void printf_func(2, 3) nasm_nonfatalf(errflags flags, const char *fmt, ...); +void printf_func(1, 2) nasm_holderr(const char *fmt, ...); +fatal_func printf_func(1, 2) nasm_fatal(const char *fmt, ...); +fatal_func printf_func(2, 3) nasm_fatalf(errflags flags, const char *fmt, ...); +fatal_func printf_func(1, 2) nasm_critical(const char *fmt, ...); +fatal_func printf_func(2, 3) nasm_criticalf(errflags flags, const char *fmt, ...); +fatal_func printf_func(1, 2) nasm_panic(const char *fmt, ...); +fatal_func printf_func(2, 3) nasm_panicf(errflags flags, const char *fmt, ...); +fatal_func nasm_panic_from_macro(const char *func, const char *file, int line); +#define panic() nasm_panic_from_macro(NASM_FUNC,__FILE__,__LINE__) + +void vprintf_func(2) nasm_verror(errflags severity, const char *fmt, va_list ap); +fatal_func vprintf_func(2) nasm_verror_critical(errflags severity, const char *fmt, va_list ap); + +const char *error_pfx(errflags severity); + +/* + * These are the error severity codes which get passed as the first + * argument to an efunc. The order here matters! + */ + +/* For the list file only */ +#define ERR_LISTMSG 0x00000000 /* for the listing file only (comment prefix) */ +#define ERR_NOTE 0x00000001 /* for the listing file only (with prefix) */ + +/* Non-terminating diagnostics; can be suppressed */ +#define ERR_DEBUG 0x00000004 /* internal debugging message */ +#define ERR_INFO 0x00000005 /* informational message */ +#define ERR_WARNING 0x00000006 /* warning */ + +/* Errors which terminate assembly without output */ +#define ERR_NONFATAL 0x00000008 /* terminate assembly after the current pass */ + +/* + * From this point, errors cannot be suppressed, and the C compiler is + * told that the call to nasm_verror() is terminating, to remove the + * need to generate further code. + */ +#define ERR_FATAL 0x0000000c /* terminate immediately, but perform cleanup */ + +/* + * Abort conditions - terminate with minimal or no cleanup. + * + * ERR_CRITICAL is used for system errors like out of memory, where the normal + * error and cleanup paths may impede informing the user of the nature of the failure. + * + * ERR_PANIC is used exclusively to trigger on bugs in the NASM code itself. + */ +#define ERR_CRITICAL 0x0000000e /* fatal, but minimize code before exit */ +#define ERR_PANIC 0x0000000f /* internal error: panic instantly + * and call abort() to dump core for reference */ + +#define ERR_MASK 0x0000000f /* mask off the above codes */ +#define ERR_UNDEAD 0x00000010 /* skip if we already have errors */ +#define ERR_NOFILE 0x00000020 /* don't give source file name/line */ +#define ERR_HERE 0x00000040 /* point to a specific source location */ +#define ERR_USAGE 0x00000080 /* print a usage message */ +#define ERR_PASS2 0x00000100 /* ignore unless on pass_final */ + +#define ERR_NO_SEVERITY 0x00000200 /* suppress printing severity */ +#define ERR_PP_PRECOND 0x00000400 /* for preprocessor use */ +#define ERR_PP_LISTMACRO 0x00000800 /* from pp_error_list_macros() */ +#define ERR_HOLD 0x00001000 /* this error/warning can be held */ +#define ERR_PERROR 0x00002000 /* append strerror(errno) */ + +/* + * These codes define specific types of suppressible warning. + * They are assumed to occupy the most significant bits of the + * severity code. + */ +#define WARN_SHR 16 /* how far to shift right */ +#define WARN_IDX(x) (((errflags)(x)) >> WARN_SHR) +#define WARN_MASK ((~(errflags)0) << WARN_SHR) +#define WARNING(x) ((errflags)(x) << WARN_SHR) + +/* The same field is used for debug and info levels */ +#define LEVEL_SHR WARN_SHR +#define LEVEL(x) WARNING(x) + +/* This is a bitmask */ +#define WARN_ST_ENABLED 1 /* Warning is currently enabled */ +#define WARN_ST_ERROR 2 /* Treat this warning as an error */ + +/* Possible initial state for warnings */ +#define WARN_INIT_OFF 0 +#define WARN_INIT_ON WARN_ST_ENABLED +#define WARN_INIT_ERR (WARN_ST_ENABLED|WARN_ST_ERROR) + +/* Options and status to/from the error module */ +struct errinfo { + FILE *file; /* Error output file pointer */ + errflags worst; /* Worst severity class encountered */ + errflags never; /* Error flags to unconditionally suppress */ + unsigned int debug_nasm; /* Debug message level */ + unsigned int verbose_info; /* Info message level */ + bool abort_on_panic; /* Call abort() on ERR_PANIC */ +}; +extern struct errinfo erropt; + +int set_error_format(const char *fmt); +void error_init(void); +void error_pass_start(bool final); +void error_pass_end(void); + +/* Process a warning option or directive */ +bool set_warning_status(const char *value); + +/* Warning stack management */ +void push_warnings(void); +void pop_warnings(void); + +/* + * Tentative error hold for warnings/errors indicated with ERR_HOLD. + * + * This is a stack; the "hold" argument *must* + * match the value returned from nasm_error_hold_push(). + * If "issue" is true the errors are committed (or promoted to the next + * higher stack level), if false then they are discarded. + * + * Return the highest severity level issued or discarded; note that if + * promoted, the severity level will be reported at the time the + * messages are issued, when the top level stack is popped. Fix this if + * this ever becomes a problem, but it would come at a cost. + * + * Errors stronger than ERR_NONFATAL cannot be held. + */ +struct nasm_errhold; +typedef struct nasm_errhold *errhold; +errhold nasm_error_hold_push(void); +errflags nasm_error_hold_pop(errhold hold, bool issue); + +/* Should be included from within error.h only */ +#include "warnings.h" + +/* True if a warning is enabled, either as a warning or an error */ +static inline bool warn_active(errflags warn) +{ + if (warn & erropt.never) + return false; + + return !!(warning_state[WARN_IDX(warn)] & WARN_ST_ENABLED); +} + +/* + * By defining MAX_DEBUG or MAX_INFO, it is possible to + * compile out messages entirely. + */ +#ifndef MAX_DEBUG +# define MAX_DEBUG UINT_MAX +#endif +#ifndef MAX_INFO +# define MAX_INFO UINT_MAX +#endif + +/* Debug level checks */ +static inline bool debug_level(unsigned int level) +{ + if (is_constant(level) && level > MAX_DEBUG) + return false; + return unlikely(level <= erropt.debug_nasm); +} + +/* Info level checks */ +static inline bool info_level(unsigned int level) +{ + if (is_constant(level) && level > MAX_INFO) + return false; + return unlikely(level <= erropt.verbose_info); +} + +#ifdef HAVE_VARIADIC_MACROS + +/* + * Marked unlikely() to avoid excessive speed penalties on disabled warnings; + * if the warning is issued then the performance penalty is substantial + * anyway. + */ +#define nasm_warn(w, ...) \ + do { \ + const errflags _w = (w); \ + if (unlikely(warn_active(_w))) { \ + nasm_warn_(_w, __VA_ARGS__); \ + } \ + } while (0) + +#define nasm_info(l, ...) \ + do { \ + const unsigned int _l = (l); \ + if (unlikely(info_level(_l))) \ + nasm_info_(_l, __VA_ARGS__); \ + } while (0) + +#define nasm_debug(l, ...) \ + do { \ + const unsigned int _l = (l); \ + if (unlikely(debug_level(_l))) \ + nasm_debug_(_l, __VA_ARGS__); \ + } while (0) + +#else + +#define nasm_warn nasm_warn_ +#if MAX_DEBUG +# define nasm_debug nasm_debug_ +#else +# define nasm_debug (void) +#endif +#if MAX_INFO +# define nasm_info nasm_info_ +#else +# define nasm_info (void) +#endif + +#endif + +/* Callbacks from the error module */ +void print_final_report(bool failure); +void close_output(bool failure); +bool pp_suppress_error(errflags flags); +void pp_error_list_macros(errflags flags); + + +#endif /* NASM_ERROR_H */ diff --git a/include/eval.h b/include/eval.h new file mode 100644 index 0000000..58bdfed --- /dev/null +++ b/include/eval.h @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 1996-2009 The NASM Authors - All Rights Reserved */ + +/* + * eval.h header file for eval.c + */ + +#ifndef NASM_EVAL_H +#define NASM_EVAL_H + +/* + * The evaluator itself. + */ +expr *evaluate(scanner sc, void *scprivate, struct tokenval *tv, + int *fwref, bool critical, struct eval_hints *hints); + +void eval_cleanup(void); + +#endif diff --git a/include/files.h b/include/files.h new file mode 100644 index 0000000..4d4d130 --- /dev/null +++ b/include/files.h @@ -0,0 +1,44 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 2026 The NASM Authors - All Rights Reserved */ + +#ifndef NASM_FILES_H +#define NASM_FILES_H 1 + +#include "compiler.h" +#include "nasmlib.h" /* For nasm_assert() */ + +/* + * Primary file names set on the command line etc. + * Wrapped in accessors to make them as constant as possible. + */ +enum filenames { + /* These two entries must be first, in this order */ + FN_INFILE, /* Primary input file */ + FN_OUTFILE, /* Primary output file */ + + FN_ERRFILE, /* Error message file */ + FN_LISTFILE, /* Listing file */ + FN_DEPENDFILE, /* Dependency file */ + FN_MAPFILE, /* Map file (outbin) */ + FN_NFILES +}; + +extern const char *_filenames[FN_NFILES]; + +static inline const char *get_filename(enum filenames fn) +{ + nasm_assert((size_t)fn < ARRAY_SIZE(_filenames)); + return _filenames[fn]; +} + +/* + * copy_filename() makes a private copy for the files subsystem, + * set_nocopy() expects an allocated string for the files subsystem to + * take over. + */ +const char *copy_filename(enum filenames fn, const char *src); +const char *set_filename(enum filenames fn, char *src); +void check_overwrite_files(void); +void cleanup_filenames(void); + +#endif /* NASM_FILES_H */ diff --git a/include/floats.h b/include/floats.h new file mode 100644 index 0000000..71d9541 --- /dev/null +++ b/include/floats.h @@ -0,0 +1,37 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 1996-2020 The NASM Authors - All Rights Reserved */ + +/* + * floats.h header file for the floating-point constant module of + * the Netwide Assembler + */ + +#ifndef NASM_FLOATS_H +#define NASM_FLOATS_H + +#include "nasm.h" + +enum float_round { + FLOAT_RC_NEAR, + FLOAT_RC_ZERO, + FLOAT_RC_DOWN, + FLOAT_RC_UP +}; + +/* Note: enum floatize and FLOAT_ERR are defined in nasm.h */ + +/* Floating-point format description */ +struct ieee_format { + int bytes; /* Total bytes */ + int mantissa; /* Fractional bits in the mantissa */ + int explicit; /* Explicit integer */ + int exponent; /* Bits in the exponent */ + int offset; /* Offset into byte array for floatize op */ +}; +extern const struct ieee_format fp_formats[FLOAT_ERR]; + +int float_const(const char *str, int s, uint8_t *result, enum floatize ffmt); +enum floatize const_func float_deffmt(int bytes); +int float_option(const char *option); + +#endif /* NASM_FLOATS_H */ diff --git a/include/gzguts.h b/include/gzguts.h new file mode 100644 index 0000000..eba7208 --- /dev/null +++ b/include/gzguts.h @@ -0,0 +1,214 @@ +/* gzguts.h -- zlib internal header definitions for gz* operations + * Copyright (C) 2004-2024 Mark Adler + * For conditions of distribution and use, see copyright notice in zlib.h + */ + +#ifdef _LARGEFILE64_SOURCE +# ifndef _LARGEFILE_SOURCE +# define _LARGEFILE_SOURCE 1 +# endif +# undef _FILE_OFFSET_BITS +# undef _TIME_BITS +#endif + +#ifdef HAVE_HIDDEN +# define ZLIB_INTERNAL __attribute__((visibility ("hidden"))) +#else +# define ZLIB_INTERNAL +#endif + +#include +#include "zlib.h" +#ifdef STDC +# include +# include +# include +#endif + +#ifndef _POSIX_SOURCE +# define _POSIX_SOURCE +#endif +#include + +#ifdef _WIN32 +# include +#endif + +#if defined(__TURBOC__) || defined(_MSC_VER) || defined(_WIN32) +# include +#endif + +#if defined(_WIN32) +# define WIDECHAR +#endif + +#ifdef WINAPI_FAMILY +# define open _open +# define read _read +# define write _write +# define close _close +#endif + +#ifdef NO_DEFLATE /* for compatibility with old definition */ +# define NO_GZCOMPRESS +#endif + +#if defined(STDC99) || (defined(__TURBOC__) && __TURBOC__ >= 0x550) +# ifndef HAVE_VSNPRINTF +# define HAVE_VSNPRINTF +# endif +#endif + +#if defined(__CYGWIN__) +# ifndef HAVE_VSNPRINTF +# define HAVE_VSNPRINTF +# endif +#endif + +#if defined(MSDOS) && defined(__BORLANDC__) && (BORLANDC > 0x410) +# ifndef HAVE_VSNPRINTF +# define HAVE_VSNPRINTF +# endif +#endif + +#ifndef HAVE_VSNPRINTF +# ifdef MSDOS +/* vsnprintf may exist on some MS-DOS compilers (DJGPP?), + but for now we just assume it doesn't. */ +# define NO_vsnprintf +# endif +# ifdef __TURBOC__ +# define NO_vsnprintf +# endif +# ifdef WIN32 +/* In Win32, vsnprintf is available as the "non-ANSI" _vsnprintf. */ +# if !defined(vsnprintf) && !defined(NO_vsnprintf) +# if !defined(_MSC_VER) || ( defined(_MSC_VER) && _MSC_VER < 1500 ) +# define vsnprintf _vsnprintf +# endif +# endif +# endif +# ifdef __SASC +# define NO_vsnprintf +# endif +# ifdef VMS +# define NO_vsnprintf +# endif +# ifdef __OS400__ +# define NO_vsnprintf +# endif +# ifdef __MVS__ +# define NO_vsnprintf +# endif +#endif + +/* unlike snprintf (which is required in C99), _snprintf does not guarantee + null termination of the result -- however this is only used in gzlib.c where + the result is assured to fit in the space provided */ +#if defined(_MSC_VER) && _MSC_VER < 1900 +# define snprintf _snprintf +#endif + +#ifndef local +# define local static +#endif +/* since "static" is used to mean two completely different things in C, we + define "local" for the non-static meaning of "static", for readability + (compile with -Dlocal if your debugger can't find static symbols) */ + +/* gz* functions always use library allocation functions */ +#ifndef STDC + extern voidp malloc(uInt size); + extern void free(voidpf ptr); +#endif + +/* get errno and strerror definition */ +#if defined UNDER_CE +# include +# define zstrerror() gz_strwinerror((DWORD)GetLastError()) +#else +# ifndef NO_STRERROR +# include +# define zstrerror() strerror(errno) +# else +# define zstrerror() "stdio error (consult errno)" +# endif +#endif + +/* provide prototypes for these when building zlib without LFS */ +#if !defined(_LARGEFILE64_SOURCE) || _LFS64_LARGEFILE-0 == 0 + ZEXTERN gzFile ZEXPORT gzopen64(const char *, const char *); + ZEXTERN z_off64_t ZEXPORT gzseek64(gzFile, z_off64_t, int); + ZEXTERN z_off64_t ZEXPORT gztell64(gzFile); + ZEXTERN z_off64_t ZEXPORT gzoffset64(gzFile); +#endif + +/* default memLevel */ +#if MAX_MEM_LEVEL >= 8 +# define DEF_MEM_LEVEL 8 +#else +# define DEF_MEM_LEVEL MAX_MEM_LEVEL +#endif + +/* default i/o buffer size -- double this for output when reading (this and + twice this must be able to fit in an unsigned type) */ +#define GZBUFSIZE 8192 + +/* gzip modes, also provide a little integrity check on the passed structure */ +#define GZ_NONE 0 +#define GZ_READ 7247 +#define GZ_WRITE 31153 +#define GZ_APPEND 1 /* mode set to GZ_WRITE after the file is opened */ + +/* values for gz_state how */ +#define LOOK 0 /* look for a gzip header */ +#define COPY 1 /* copy input directly */ +#define GZIP 2 /* decompress a gzip stream */ + +/* internal gzip file state data structure */ +typedef struct { + /* exposed contents for gzgetc() macro */ + struct gzFile_s x; /* "x" for exposed */ + /* x.have: number of bytes available at x.next */ + /* x.next: next output data to deliver or write */ + /* x.pos: current position in uncompressed data */ + /* used for both reading and writing */ + int mode; /* see gzip modes above */ + int fd; /* file descriptor */ + char *path; /* path or fd for error messages */ + unsigned size; /* buffer size, zero if not allocated yet */ + unsigned want; /* requested buffer size, default is GZBUFSIZE */ + unsigned char *in; /* input buffer (double-sized when writing) */ + unsigned char *out; /* output buffer (double-sized when reading) */ + int direct; /* 0 if processing gzip, 1 if transparent */ + /* just for reading */ + int how; /* 0: get header, 1: copy, 2: decompress */ + z_off64_t start; /* where the gzip data started, for rewinding */ + int eof; /* true if end of input file reached */ + int past; /* true if read requested past end */ + /* just for writing */ + int level; /* compression level */ + int strategy; /* compression strategy */ + int reset; /* true if a reset is pending after a Z_FINISH */ + /* seek request */ + z_off64_t skip; /* amount to skip (already rewound if backwards) */ + int seek; /* true if seek request pending */ + /* error information */ + int err; /* error code */ + char *msg; /* error message */ + /* zlib inflate or deflate stream */ + z_stream strm; /* stream structure in-place (not a pointer) */ +} gz_state; +typedef gz_state FAR *gz_statep; + +/* shared functions */ +void ZLIB_INTERNAL gz_error(gz_statep, int, const char *); +#if defined UNDER_CE +char ZLIB_INTERNAL *gz_strwinerror(DWORD error); +#endif + +/* GT_OFF(x), where x is an unsigned value, is true if x > maximum z_off64_t + value -- needed when comparing unsigned to z_off64_t, which is signed + (possible z_off64_t types off_t, off64_t, and long are all signed) */ +unsigned ZLIB_INTERNAL gz_intmax(void); +#define GT_OFF(x) (sizeof(int) == sizeof(z_off64_t) && (x) > gz_intmax()) diff --git a/include/hashtbl.h b/include/hashtbl.h new file mode 100644 index 0000000..53c3ea9 --- /dev/null +++ b/include/hashtbl.h @@ -0,0 +1,78 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 1996-2018 The NASM Authors - All Rights Reserved */ + +/* + * hashtbl.h + * + * Efficient dictionary hash table class. + */ + +#ifndef NASM_HASHTBL_H +#define NASM_HASHTBL_H + +#include "nasmlib.h" + +struct hash_node { + uint64_t hash; + const void *key; + size_t keylen; + void *data; +}; + +struct hash_table { + struct hash_node *table; + size_t load; + size_t size; + size_t max_load; +}; + +struct hash_insert { + struct hash_table *head; + struct hash_node *where; + struct hash_node node; +}; + +struct hash_iterator { + const struct hash_table *head; + const struct hash_node *next; +}; + +uint64_t pure_func crc64(uint64_t crc, const char *string); +uint64_t pure_func crc64i(uint64_t crc, const char *string); +uint64_t pure_func crc64b(uint64_t crc, const void *data, size_t len); +uint64_t pure_func crc64ib(uint64_t crc, const void *data, size_t len); +#define CRC64_INIT UINT64_C(0xffffffffffffffff) + +static inline uint64_t crc64_byte(uint64_t crc, uint8_t v) +{ + extern const uint64_t crc64_tab[256]; + return crc64_tab[(uint8_t)(v ^ crc)] ^ (crc >> 8); +} + +uint32_t pure_func crc32b(uint32_t crc, const void *data, size_t len); + +void **hash_find(struct hash_table *head, const char *string, + struct hash_insert *insert); +void **hash_findb(struct hash_table *head, const void *key, size_t keylen, + struct hash_insert *insert); +void **hash_findi(struct hash_table *head, const char *string, + struct hash_insert *insert); +void **hash_findib(struct hash_table *head, const void *key, size_t keylen, + struct hash_insert *insert); +void **hash_add(struct hash_insert *insert, const void *key, void *data); +static inline void hash_iterator_init(const struct hash_table *head, + struct hash_iterator *iterator) +{ + iterator->head = head; + iterator->next = head->table; +} +const struct hash_node *hash_iterate(struct hash_iterator *iterator); + +#define hash_for_each(_head,_it,_np) \ + for (hash_iterator_init((_head), &(_it)), (_np) = hash_iterate(&(_it)) ; \ + (_np) ; (_np) = hash_iterate(&(_it))) + +void hash_free(struct hash_table *head); +void hash_free_all(struct hash_table *head, bool free_keys); + +#endif /* NASM_HASHTBL_H */ diff --git a/include/iflag.h b/include/iflag.h new file mode 100644 index 0000000..ef37642 --- /dev/null +++ b/include/iflag.h @@ -0,0 +1,143 @@ +#ifndef NASM_IFLAG_H +#define NASM_IFLAG_H + +#include "compiler.h" +#include "ilog2.h" + + +#include "iflaggen.h" + +#define IF_GENBIT(bit) (UINT32_C(1) << ((bit) & 31)) + +static inline int ifcomp(uint32_t a, uint32_t b) +{ + return (a > b) - (a < b); +} + +static inline bool iflag_test(const iflag_t *f, unsigned int bit) +{ + return !!(f->field[bit >> 5] & IF_GENBIT(bit)); +} + +static inline void iflag_set(iflag_t *f, unsigned int bit) +{ + f->field[bit >> 5] |= IF_GENBIT(bit); +} + +static inline void iflag_clear(iflag_t *f, unsigned int bit) +{ + f->field[bit >> 5] &= ~IF_GENBIT(bit); +} + +static inline void iflag_clear_all(iflag_t *f) +{ + memset(f, 0, sizeof(*f)); +} + +static inline void iflag_set_all(iflag_t *f) +{ + memset(f, ~0, sizeof(*f)); +} + +#define iflag_for_each_field(v) for ((v) = 0; (v) < IF_FIELD_COUNT; (v)++) + +static inline int iflag_cmp(const iflag_t *a, const iflag_t *b) +{ + int i; + + /* This is intentionally a reverse loop! */ + for (i = IF_FIELD_COUNT-1; i >= 0; i--) { + if (a->field[i] == b->field[i]) + continue; + + return ifcomp(a->field[i], b->field[i]); + } + + return 0; +} + +#define IF_GEN_HELPER(name, op) \ + static inline iflag_t iflag_##name(const iflag_t *a, const iflag_t *b) \ + { \ + unsigned int i; \ + iflag_t res; \ + \ + iflag_for_each_field(i) \ + res.field[i] = a->field[i] op b->field[i]; \ + \ + return res; \ + } + +IF_GEN_HELPER(xor, ^) + +/* Some helpers which are to work with predefined masks */ +/* TSMASK = "True size" mask */ +#define IF_TSMASK (IFM_SB|IFM_SW|IFM_SD|IFM_SQ|IFM_ST|IFM_SO|\ + IFM_SY|IFM_SZ) +#define IF_SMASK (IF_TSMASK|IFM_NWSIZE|IFM_OSIZE|IFM_ASIZE|\ + IFM_ANYSIZE|IFM_SX) +#define IF_ARMASK (IFM_AR0|IFM_AR1|IFM_AR2|IFM_AR3|IFM_AR4) +#define IF_SMMASK (IFM_SM0|IFM_SM1|IFM_SM2|IFM_SM3|IFM_SM4) + +#define _itemp_smask(idx) (insns_flags[(idx)].field[0] & IF_SMASK) +#define _itemp_armask(idx) (insns_flags[(idx)].field[0] & IF_ARMASK) +#define _itemp_smmask(idx) (insns_flags[(idx)].field[0] & IF_SMMASK) +#define _itemp_arx(idx) (_itemp_armask(idx) >> IF_AR0) +#define _itemp_smx(idx) (_itemp_smmask(idx) >> IF_SM0) + +#define itemp_smask(itemp) _itemp_smask((itemp)->iflag_idx) +#define itemp_armask(itemp) _itemp_armask((itemp)->iflag_idx) +#define itemp_smmask(itemp) _itemp_smmask((itemp)->iflag_idx) +#define itemp_arx(itemp) _itemp_arx((itemp)->iflag_idx) +#define itemp_smx(itemp) _itemp_smx((itemp)->iflag_idx) + +/* + * IF_ANY is the highest CPU level by definition + */ +#define IF_CPU_LEVEL_MASK ((IFM_ANY << 1) - 1) + +static inline int iflag_cmp_cpu(const iflag_t *a, const iflag_t *b) +{ + return ifcomp(a->field[IF_CPU_FIELD], b->field[IF_CPU_FIELD]); +} + +static inline uint32_t _iflag_cpu_level(const iflag_t *a) +{ + return a->field[IF_CPU_FIELD] & IF_CPU_LEVEL_MASK; +} + +static inline int iflag_cmp_cpu_level(const iflag_t *a, const iflag_t *b) +{ + return ifcomp(_iflag_cpu_level(a), _iflag_cpu_level(b)); +} + +/* Returns true if the CPU level is at least a certain value */ +static inline bool iflag_cpu_level_ok(const iflag_t *a, unsigned int bit) +{ + return _iflag_cpu_level(a) >= IF_GENBIT(bit); +} + +static inline void iflag_set_all_features(iflag_t *a) +{ + uint32_t *p = &a->field[IF_FEATURE_FIELD]; + + memset(p, -1, IF_FEATURE_NFIELDS * sizeof(uint32_t)); +} + +static inline iflag_t _iflag_pfmask(const iflag_t *a) +{ + iflag_t r; + + iflag_clear_all(&r); + + if (iflag_test(a, IF_CYRIX)) + iflag_set(&r, IF_CYRIX); + if (iflag_test(a, IF_AMD)) + iflag_set(&r, IF_AMD); + + return r; +} + +#define iflag_pfmask(itemp) _iflag_pfmask(&insns_flags[(itemp)->iflag_idx]) + +#endif /* NASM_IFLAG_H */ diff --git a/include/iflaggen.h b/include/iflaggen.h new file mode 100644 index 0000000..1fbbbd8 --- /dev/null +++ b/include/iflaggen.h @@ -0,0 +1,431 @@ +/* This file is auto-generated. Don't edit. */ +#ifndef NASM_IFLAGGEN_H +#define NASM_IFLAGGEN_H 1 + +#define IF_SM0 0 /* Size match operand 0 */ +#define IF_SM1 1 /* Size match operand 1 */ +#define IF_SM2 2 /* Size match operand 2 */ +#define IF_SM3 3 /* Size match operand 3 */ +#define IF_SM4 4 /* Size match operand 4 */ +#define IF_AR0 5 /* SB, SW, SD applies to operand 0 */ +#define IF_AR1 6 /* SB, SW, SD applies to operand 1 */ +#define IF_AR2 7 /* SB, SW, SD applies to operand 2 */ +#define IF_AR3 8 /* SB, SW, SD applies to operand 3 */ +#define IF_AR4 9 /* SB, SW, SD applies to operand 4 */ +#define IF_SB 10 /* Unsized operands can't be non-byte */ +#define IF_SW 11 /* Unsized operands can't be non-word */ +#define IF_SD 12 /* Unsized operands can't be non-dword */ +#define IF_SQ 13 /* Unsized operands can't be non-qword */ +#define IF_ST 14 /* Unsized operands can't be non-tword */ +#define IF_SO 15 /* Unsized operands can't be non-oword */ +#define IF_SY 16 /* Unsized operands can't be non-yword */ +#define IF_SZ 17 /* Unsized operands can't be non-zword */ +#define IF_NWSIZE 18 /* Operand size defaults to 64 in 64-bit mode */ +#define IF_OSIZE 19 /* Unsized operands must match the operand size */ +#define IF_ASIZE 20 /* Unsized operands must match the address size */ +#define IF_ANYSIZE 21 /* Ignore operand size even if explicit */ +#define IF_SX 22 /* Unsized operands not allowed */ +#define IF_SDWORD 23 /* Strict sdword64 matching */ +#define IF_PSEUDO 24 /* Pseudo-instruction (directive) */ +#define IF_JMP_RELAX 25 /* Relaxable jump instruction */ +#define IF_JCC_HINT 26 /* Hintable jump instruction */ +#define IF_OPT 27 /* Optimizing assembly only */ +#define IF_LATEVEX 28 /* Only if EVEX instructions are disabled */ +#define IF_NOREX 29 /* Instruction does not support REX encoding */ +#define IF_NOAPX 30 /* Instruction does not support APX registers or REX2 */ +#define IF_NF 31 /* Instruction supports the {nf} prefix */ +#define IF_NF_R 32 /* Instruction requires the {nf} prefix */ +#define IF_NF_N 33 /* Instruction doesn't allow the {nf} prefix */ +#define IF_NF_E 34 /* EVEX.NF set with {nf} prefix */ +#define IF_ZU 35 /* Instruction supports the {zu} prefix */ +#define IF_ZU_R 36 /* Instruction requires the {zu} prefix */ +#define IF_ZU_E 37 /* EVEX.ND set with {zu} prefix */ +#define IF_LIG 38 /* Ignore VEX/EVEX L field */ +#define IF_WIG 39 /* Ignore VEX/EVEX W field */ +#define IF_WW 40 /* VEX/EVEX W is REX.W */ +#define IF_SIB 41 /* SIB encoding required */ +#define IF_LOCK 42 /* Lockable if operand 0 is memory */ +#define IF_LOCK1 43 /* Lockable if operand 1 is memory */ +#define IF_NOLONG 44 /* Not available in long mode */ +#define IF_LONG 45 /* Long mode */ +#define IF_NOHLE 46 /* HLE prefixes forbidden */ +#define IF_MIB 47 /* split base/index EA */ +#define IF_BND 48 /* BND (0xF2) prefix available */ +#define IF_REX2 49 /* REX2 encoding required */ +#define IF_HLE 50 /* HLE prefixed */ +#define IF_FL 51 /* Instruction modifies the flags */ +#define IF_MOPVEC 52 /* M operand is a vector */ +#define IF_SCC 53 /* EVEX[27:24] is special condition code */ +#define IF_BESTDIS 54 /* Preferred disassembly pattern */ +#define IF_DFV 55 /* Destination flag values */ + /* 55...63 reserved */ +#define IF_VEX 64 /* VEX or XOP encoded instruction */ +#define IF_EVEX 65 /* EVEX encoded instruction */ +#define IF_PRIV 66 /* Privileged instruction */ +#define IF_SMM 67 /* Only valid in SMM */ +#define IF_PROT 68 /* Protected mode only */ +#define IF_UNDOC 69 /* Undocumented */ +#define IF_FPU 70 /* FPU */ +#define IF_MMX 71 /* MMX */ +#define IF_3DNOW 72 /* 3DNow! */ +#define IF_SSE 73 /* SSE (KNI, MMX2) */ +#define IF_SSE2 74 /* SSE2 */ +#define IF_SSE3 75 /* SSE3 (PNI) */ +#define IF_VMX 76 /* VMX */ +#define IF_SSSE3 77 /* SSSE3 */ +#define IF_SSE4A 78 /* AMD SSE4a */ +#define IF_SSE41 79 /* SSE4.1 */ +#define IF_SSE42 80 /* SSE4.2 */ +#define IF_SSE5 81 /* SSE5 */ +#define IF_AVX 82 /* AVX (256-bit floating point) */ +#define IF_AVX2 83 /* AVX2 (256-bit integer) */ +#define IF_FMA 84 /* Fused multiply-add */ +#define IF_BMI1 85 /* Bit manipulation instructions 1 */ +#define IF_BMI2 86 /* Bit manipulation instructions 2 */ +#define IF_TBM 87 /* */ +#define IF_RTM 88 /* */ +#define IF_AVX512 89 /* AVX-512 */ +#define IF_AVX512F 90 /* AVX-512F (base architecture) */ +#define IF_AVX512CD 91 /* AVX-512 Conflict Detection */ +#define IF_AVX512ER 92 /* AVX-512 Exponential and Reciprocal */ +#define IF_AVX512PF 93 /* AVX-512 Prefetch */ +#define IF_MPX 94 /* MPX */ +#define IF_SHA 95 /* SHA */ +#define IF_AVX512VL 96 /* AVX-512 Vector Length Orthogonality */ +#define IF_AVX512DQ 97 /* AVX-512 Dword and Qword */ +#define IF_AVX512BW 98 /* AVX-512 Byte and Word */ +#define IF_AVX512IFMA 99 /* AVX-512 IFMA instructions */ +#define IF_AVX512VBMI 100 /* AVX-512 VBMI instructions */ +#define IF_AES 101 /* AES instructions */ +#define IF_VAES 102 /* AES AVX instructions */ +#define IF_VPCLMULQDQ 103 /* AVX Carryless Multiplication */ +#define IF_GFNI 104 /* Galois Field instructions */ +#define IF_AVX512VBMI2 105 /* AVX-512 VBMI2 instructions */ +#define IF_AVX512VNNI 106 /* AVX-512 VNNI instructions */ +#define IF_AVX512BITALG 107 /* AVX-512 Bit Algorithm instructions */ +#define IF_AVX512VPOPCNTDQ 108 /* AVX-512 VPOPCNTD/VPOPCNTQ */ +#define IF_AVX5124FMAPS 109 /* AVX-512 4-iteration multiply-add */ +#define IF_AVX5124VNNIW 110 /* AVX-512 4-iteration dot product */ +#define IF_AVX512FP16 111 /* AVX-512 FP16 instructions */ +#define IF_AVX512BMM 112 /* AVX-512 BMM instructions */ +#define IF_F16C 113 /* F16C instructions */ +#define IF_SGX 114 /* Intel Software Guard Extensions (SGX) */ +#define IF_CET 115 /* Intel Control-Flow Enforcement Technology (CET) */ +#define IF_ENQCMD 116 /* Enqueue command instructions */ +#define IF_TSXLDTRK 117 /* TSX suspend load address tracking */ +#define IF_AVX512BF16 118 /* AVX-512 bfloat16 */ +#define IF_AVX512VP2INTERSECT 119 /* AVX-512 VP2INTERSECT instructions */ +#define IF_AMXTILE 120 /* AMX tile configuration instructions */ +#define IF_AMXBF16 121 /* AMX bfloat16 multiplication */ +#define IF_AMXFP16 122 /* AMX FP16 multiplication */ +#define IF_AMXFP8 123 /* AMX FP8 instructions */ +#define IF_AMXTF32 124 /* AMX TF32 multiplication */ +#define IF_AMXINT8 125 /* AMX 8-bit integer multiplication */ +#define IF_AMXCOMPLEX 126 /* AMX float16 complex multiplication */ +#define IF_AMXAVX512 127 /* EVEX zmm<-tmm conversion instructions */ +#define IF_AMXMOVRS 128 /* AMX loads with MOVRS hint */ +#define IF_AMXTRANSPOSE 129 /* AMX transpose instructions */ +#define IF_FRED 130 /* Flexible Return and Exception Delivery (FRED) */ +#define IF_RAOINT 131 /* Remote atomic operations (RAO-INT) */ +#define IF_UINTR 132 /* User interrupts */ +#define IF_CMPCCXADD 133 /* CMPccXADD instructions */ +#define IF_PREFETCHI 134 /* PREFETCHI0 and PREFETCHI1 */ +#define IF_MSRLIST 135 /* RDMSRLIST and WRMSRLIST */ +#define IF_AVXNECONVERT 136 /* AVX exceptionless floating-point conversions */ +#define IF_AVXVNNI 137 /* AVX Vector Neural Network instructions */ +#define IF_AVXVNNIINT8 138 /* AVX Vector Neural Network 8-bit integer instructions */ +#define IF_AVXVNNIINT16 139 /* AVX Vector Neural Network 16-bit integer instructions */ +#define IF_AVXIFMA 140 /* AVX integer multiply and add */ +#define IF_HRESET 141 /* History reset */ +#define IF_SMAP 142 /* Supervisor Mode Access Prevention (SMAP) */ +#define IF_SHA512 143 /* SHA512 instructions */ +#define IF_HSM3 144 /* SM3 hash instructions */ +#define IF_HSM4 145 /* SM4 hash instructions */ +#define IF_APX 146 /* Advanced Performance Extensions (APX) */ +#define IF_AVX10_1 147 /* AVX 10.1 instructions */ +#define IF_AVX10_2 148 /* AVX 10.2 instructions */ +#define IF_AVX10_VNNIINT 149 /* AVX Vector Neural Network integer instructions */ +#define IF_ADX 150 /* ADCX and ADOX instructions */ +#define IF_PKU 151 /* Protection key for user mode */ +#define IF_MONITOR 152 /* MONITOR and MWAIT */ +#define IF_MONITORX 153 /* MONITORX and MWAITX */ +#define IF_WAITPKG 154 /* User wait instruction package */ +#define IF_MSR_IMM 155 /* Immediate RDMSR/WRMSRNS instructions */ +#define IF_AESKLE 156 /* AES key locker */ +#define IF_AESKLEWIDE_KL 157 /* AES wide key locker */ +#define IF_INVPCID 158 /* INVPCID instruction */ +#define IF_PREFETCHWT1 159 /* PREFETCHWT1 instruction */ +#define IF_PBNDKB 160 /* PBNDKB instruction */ +#define IF_PCONFIG 161 /* PCONFIG instruction */ +#define IF_WBNOINVD 162 /* WBNOINVD instruction */ +#define IF_SERIALIZE 163 /* SERIALIZE instruction */ +#define IF_LKGS 164 /* LKGS instruction */ +#define IF_WRMSRNS 165 /* WRMSRNS instruction */ +#define IF_CLFLUSHOPT 166 /* CLFLUSHOPT instruction */ +#define IF_CLWB 167 /* CLWB instruction */ +#define IF_RDRAND 168 /* RDRAND instruction */ +#define IF_RDSEED 169 /* RDSEED instruction */ +#define IF_RDPID 170 /* RDPID instruction */ +#define IF_LZCNT 171 /* LZCNT instruction */ +#define IF_PTWRITE 172 /* PTWRITE instruction */ +#define IF_CLDEMOTE 173 /* CLDEMOTE instruction */ +#define IF_MOVDIRI 174 /* MOVDIRI instruction */ +#define IF_MOVDIR64B 175 /* MOVDIR64B instruction */ +#define IF_CLZERO 176 /* CLZERO instruction */ +#define IF_MOVBE 177 /* MOVBE instruction */ +#define IF_MOVRS 178 /* MOVRS instruction */ +#define IF_OBSOLETE 179 /* Instruction removed from architecture */ +#define IF_NEVER 180 /* Instruction never implemented */ +#define IF_NOP 181 /* Instruction is always a (nonintentional) NOP */ + /* 181...191 reserved */ +#define IF_8086 192 /* 8086 */ +#define IF_186 193 /* 186+ */ +#define IF_286 194 /* 286+ */ +#define IF_386 195 /* 386+ */ +#define IF_486 196 /* 486+ */ +#define IF_PENT 197 /* Pentium */ +#define IF_P6 198 /* P6 */ +#define IF_KATMAI 199 /* Katmai */ +#define IF_WILLAMETTE 200 /* Willamette */ +#define IF_PRESCOTT 201 /* Prescott */ +#define IF_IA64 202 /* IA64 (in x86 mode) */ +#define IF_X86_64 203 /* x86-64 (long or legacy mode) */ +#define IF_NEHALEM 204 /* Nehalem */ +#define IF_WESTMERE 205 /* Westmere */ +#define IF_SANDYBRIDGE 206 /* Sandy Bridge */ +#define IF_FUTURE 207 /* Ivy Bridge or newer */ +#define IF_DEFAULT 208 /* Default CPU level */ +#define IF_ANY 209 /* Allow any known instruction */ +#define IF_CYRIX 210 /* Cyrix-specific */ +#define IF_AMD 211 /* AMD-specific */ + /* 211...223 reserved */ + +/* Mask bits for field 0 : 0...31 */ +#define IFM_SM0 UINT32_C(0x00000001) /* 0 */ +#define IFM_SM1 UINT32_C(0x00000002) /* 1 */ +#define IFM_SM2 UINT32_C(0x00000004) /* 2 */ +#define IFM_SM3 UINT32_C(0x00000008) /* 3 */ +#define IFM_SM4 UINT32_C(0x00000010) /* 4 */ +#define IFM_AR0 UINT32_C(0x00000020) /* 5 */ +#define IFM_AR1 UINT32_C(0x00000040) /* 6 */ +#define IFM_AR2 UINT32_C(0x00000080) /* 7 */ +#define IFM_AR3 UINT32_C(0x00000100) /* 8 */ +#define IFM_AR4 UINT32_C(0x00000200) /* 9 */ +#define IFM_SB UINT32_C(0x00000400) /* 10 */ +#define IFM_SW UINT32_C(0x00000800) /* 11 */ +#define IFM_SD UINT32_C(0x00001000) /* 12 */ +#define IFM_SQ UINT32_C(0x00002000) /* 13 */ +#define IFM_ST UINT32_C(0x00004000) /* 14 */ +#define IFM_SO UINT32_C(0x00008000) /* 15 */ +#define IFM_SY UINT32_C(0x00010000) /* 16 */ +#define IFM_SZ UINT32_C(0x00020000) /* 17 */ +#define IFM_NWSIZE UINT32_C(0x00040000) /* 18 */ +#define IFM_OSIZE UINT32_C(0x00080000) /* 19 */ +#define IFM_ASIZE UINT32_C(0x00100000) /* 20 */ +#define IFM_ANYSIZE UINT32_C(0x00200000) /* 21 */ +#define IFM_SX UINT32_C(0x00400000) /* 22 */ +#define IFM_SDWORD UINT32_C(0x00800000) /* 23 */ +#define IFM_PSEUDO UINT32_C(0x01000000) /* 24 */ +#define IFM_JMP_RELAX UINT32_C(0x02000000) /* 25 */ +#define IFM_JCC_HINT UINT32_C(0x04000000) /* 26 */ +#define IFM_OPT UINT32_C(0x08000000) /* 27 */ +#define IFM_LATEVEX UINT32_C(0x10000000) /* 28 */ +#define IFM_NOREX UINT32_C(0x20000000) /* 29 */ +#define IFM_NOAPX UINT32_C(0x40000000) /* 30 */ +#define IFM_NF UINT32_C(0x80000000) /* 31 */ +/* Mask bits for field 1 : 32...63 */ +#define IFM_NF_R UINT32_C(0x00000001) /* 32 */ +#define IFM_NF_N UINT32_C(0x00000002) /* 33 */ +#define IFM_NF_E UINT32_C(0x00000004) /* 34 */ +#define IFM_ZU UINT32_C(0x00000008) /* 35 */ +#define IFM_ZU_R UINT32_C(0x00000010) /* 36 */ +#define IFM_ZU_E UINT32_C(0x00000020) /* 37 */ +#define IFM_LIG UINT32_C(0x00000040) /* 38 */ +#define IFM_WIG UINT32_C(0x00000080) /* 39 */ +#define IFM_WW UINT32_C(0x00000100) /* 40 */ +#define IFM_SIB UINT32_C(0x00000200) /* 41 */ +#define IFM_LOCK UINT32_C(0x00000400) /* 42 */ +#define IFM_LOCK1 UINT32_C(0x00000800) /* 43 */ +#define IFM_NOLONG UINT32_C(0x00001000) /* 44 */ +#define IFM_LONG UINT32_C(0x00002000) /* 45 */ +#define IFM_NOHLE UINT32_C(0x00004000) /* 46 */ +#define IFM_MIB UINT32_C(0x00008000) /* 47 */ +#define IFM_BND UINT32_C(0x00010000) /* 48 */ +#define IFM_REX2 UINT32_C(0x00020000) /* 49 */ +#define IFM_HLE UINT32_C(0x00040000) /* 50 */ +#define IFM_FL UINT32_C(0x00080000) /* 51 */ +#define IFM_MOPVEC UINT32_C(0x00100000) /* 52 */ +#define IFM_SCC UINT32_C(0x00200000) /* 53 */ +#define IFM_BESTDIS UINT32_C(0x00400000) /* 54 */ +#define IFM_DFV UINT32_C(0x00800000) /* 55 */ +/* Mask bits for field 2 : 64...95 */ +#define IFM_VEX UINT32_C(0x00000001) /* 64 */ +#define IFM_EVEX UINT32_C(0x00000002) /* 65 */ +#define IFM_PRIV UINT32_C(0x00000004) /* 66 */ +#define IFM_SMM UINT32_C(0x00000008) /* 67 */ +#define IFM_PROT UINT32_C(0x00000010) /* 68 */ +#define IFM_UNDOC UINT32_C(0x00000020) /* 69 */ +#define IFM_FPU UINT32_C(0x00000040) /* 70 */ +#define IFM_MMX UINT32_C(0x00000080) /* 71 */ +#define IFM_3DNOW UINT32_C(0x00000100) /* 72 */ +#define IFM_SSE UINT32_C(0x00000200) /* 73 */ +#define IFM_SSE2 UINT32_C(0x00000400) /* 74 */ +#define IFM_SSE3 UINT32_C(0x00000800) /* 75 */ +#define IFM_VMX UINT32_C(0x00001000) /* 76 */ +#define IFM_SSSE3 UINT32_C(0x00002000) /* 77 */ +#define IFM_SSE4A UINT32_C(0x00004000) /* 78 */ +#define IFM_SSE41 UINT32_C(0x00008000) /* 79 */ +#define IFM_SSE42 UINT32_C(0x00010000) /* 80 */ +#define IFM_SSE5 UINT32_C(0x00020000) /* 81 */ +#define IFM_AVX UINT32_C(0x00040000) /* 82 */ +#define IFM_AVX2 UINT32_C(0x00080000) /* 83 */ +#define IFM_FMA UINT32_C(0x00100000) /* 84 */ +#define IFM_BMI1 UINT32_C(0x00200000) /* 85 */ +#define IFM_BMI2 UINT32_C(0x00400000) /* 86 */ +#define IFM_TBM UINT32_C(0x00800000) /* 87 */ +#define IFM_RTM UINT32_C(0x01000000) /* 88 */ +#define IFM_AVX512 UINT32_C(0x02000000) /* 89 */ +#define IFM_AVX512F UINT32_C(0x04000000) /* 90 */ +#define IFM_AVX512CD UINT32_C(0x08000000) /* 91 */ +#define IFM_AVX512ER UINT32_C(0x10000000) /* 92 */ +#define IFM_AVX512PF UINT32_C(0x20000000) /* 93 */ +#define IFM_MPX UINT32_C(0x40000000) /* 94 */ +#define IFM_SHA UINT32_C(0x80000000) /* 95 */ +/* Mask bits for field 3 : 96...127 */ +#define IFM_AVX512VL UINT32_C(0x00000001) /* 96 */ +#define IFM_AVX512DQ UINT32_C(0x00000002) /* 97 */ +#define IFM_AVX512BW UINT32_C(0x00000004) /* 98 */ +#define IFM_AVX512IFMA UINT32_C(0x00000008) /* 99 */ +#define IFM_AVX512VBMI UINT32_C(0x00000010) /* 100 */ +#define IFM_AES UINT32_C(0x00000020) /* 101 */ +#define IFM_VAES UINT32_C(0x00000040) /* 102 */ +#define IFM_VPCLMULQDQ UINT32_C(0x00000080) /* 103 */ +#define IFM_GFNI UINT32_C(0x00000100) /* 104 */ +#define IFM_AVX512VBMI2 UINT32_C(0x00000200) /* 105 */ +#define IFM_AVX512VNNI UINT32_C(0x00000400) /* 106 */ +#define IFM_AVX512BITALG UINT32_C(0x00000800) /* 107 */ +#define IFM_AVX512VPOPCNTDQ UINT32_C(0x00001000) /* 108 */ +#define IFM_AVX5124FMAPS UINT32_C(0x00002000) /* 109 */ +#define IFM_AVX5124VNNIW UINT32_C(0x00004000) /* 110 */ +#define IFM_AVX512FP16 UINT32_C(0x00008000) /* 111 */ +#define IFM_AVX512BMM UINT32_C(0x00010000) /* 112 */ +#define IFM_F16C UINT32_C(0x00020000) /* 113 */ +#define IFM_SGX UINT32_C(0x00040000) /* 114 */ +#define IFM_CET UINT32_C(0x00080000) /* 115 */ +#define IFM_ENQCMD UINT32_C(0x00100000) /* 116 */ +#define IFM_TSXLDTRK UINT32_C(0x00200000) /* 117 */ +#define IFM_AVX512BF16 UINT32_C(0x00400000) /* 118 */ +#define IFM_AVX512VP2INTERSECT UINT32_C(0x00800000) /* 119 */ +#define IFM_AMXTILE UINT32_C(0x01000000) /* 120 */ +#define IFM_AMXBF16 UINT32_C(0x02000000) /* 121 */ +#define IFM_AMXFP16 UINT32_C(0x04000000) /* 122 */ +#define IFM_AMXFP8 UINT32_C(0x08000000) /* 123 */ +#define IFM_AMXTF32 UINT32_C(0x10000000) /* 124 */ +#define IFM_AMXINT8 UINT32_C(0x20000000) /* 125 */ +#define IFM_AMXCOMPLEX UINT32_C(0x40000000) /* 126 */ +#define IFM_AMXAVX512 UINT32_C(0x80000000) /* 127 */ +/* Mask bits for field 4 : 128...159 */ +#define IFM_AMXMOVRS UINT32_C(0x00000001) /* 128 */ +#define IFM_AMXTRANSPOSE UINT32_C(0x00000002) /* 129 */ +#define IFM_FRED UINT32_C(0x00000004) /* 130 */ +#define IFM_RAOINT UINT32_C(0x00000008) /* 131 */ +#define IFM_UINTR UINT32_C(0x00000010) /* 132 */ +#define IFM_CMPCCXADD UINT32_C(0x00000020) /* 133 */ +#define IFM_PREFETCHI UINT32_C(0x00000040) /* 134 */ +#define IFM_MSRLIST UINT32_C(0x00000080) /* 135 */ +#define IFM_AVXNECONVERT UINT32_C(0x00000100) /* 136 */ +#define IFM_AVXVNNI UINT32_C(0x00000200) /* 137 */ +#define IFM_AVXVNNIINT8 UINT32_C(0x00000400) /* 138 */ +#define IFM_AVXVNNIINT16 UINT32_C(0x00000800) /* 139 */ +#define IFM_AVXIFMA UINT32_C(0x00001000) /* 140 */ +#define IFM_HRESET UINT32_C(0x00002000) /* 141 */ +#define IFM_SMAP UINT32_C(0x00004000) /* 142 */ +#define IFM_SHA512 UINT32_C(0x00008000) /* 143 */ +#define IFM_HSM3 UINT32_C(0x00010000) /* 144 */ +#define IFM_HSM4 UINT32_C(0x00020000) /* 145 */ +#define IFM_APX UINT32_C(0x00040000) /* 146 */ +#define IFM_AVX10_1 UINT32_C(0x00080000) /* 147 */ +#define IFM_AVX10_2 UINT32_C(0x00100000) /* 148 */ +#define IFM_AVX10_VNNIINT UINT32_C(0x00200000) /* 149 */ +#define IFM_ADX UINT32_C(0x00400000) /* 150 */ +#define IFM_PKU UINT32_C(0x00800000) /* 151 */ +#define IFM_MONITOR UINT32_C(0x01000000) /* 152 */ +#define IFM_MONITORX UINT32_C(0x02000000) /* 153 */ +#define IFM_WAITPKG UINT32_C(0x04000000) /* 154 */ +#define IFM_MSR_IMM UINT32_C(0x08000000) /* 155 */ +#define IFM_AESKLE UINT32_C(0x10000000) /* 156 */ +#define IFM_AESKLEWIDE_KL UINT32_C(0x20000000) /* 157 */ +#define IFM_INVPCID UINT32_C(0x40000000) /* 158 */ +#define IFM_PREFETCHWT1 UINT32_C(0x80000000) /* 159 */ +/* Mask bits for field 5 : 160...191 */ +#define IFM_PBNDKB UINT32_C(0x00000001) /* 160 */ +#define IFM_PCONFIG UINT32_C(0x00000002) /* 161 */ +#define IFM_WBNOINVD UINT32_C(0x00000004) /* 162 */ +#define IFM_SERIALIZE UINT32_C(0x00000008) /* 163 */ +#define IFM_LKGS UINT32_C(0x00000010) /* 164 */ +#define IFM_WRMSRNS UINT32_C(0x00000020) /* 165 */ +#define IFM_CLFLUSHOPT UINT32_C(0x00000040) /* 166 */ +#define IFM_CLWB UINT32_C(0x00000080) /* 167 */ +#define IFM_RDRAND UINT32_C(0x00000100) /* 168 */ +#define IFM_RDSEED UINT32_C(0x00000200) /* 169 */ +#define IFM_RDPID UINT32_C(0x00000400) /* 170 */ +#define IFM_LZCNT UINT32_C(0x00000800) /* 171 */ +#define IFM_PTWRITE UINT32_C(0x00001000) /* 172 */ +#define IFM_CLDEMOTE UINT32_C(0x00002000) /* 173 */ +#define IFM_MOVDIRI UINT32_C(0x00004000) /* 174 */ +#define IFM_MOVDIR64B UINT32_C(0x00008000) /* 175 */ +#define IFM_CLZERO UINT32_C(0x00010000) /* 176 */ +#define IFM_MOVBE UINT32_C(0x00020000) /* 177 */ +#define IFM_MOVRS UINT32_C(0x00040000) /* 178 */ +#define IFM_OBSOLETE UINT32_C(0x00080000) /* 179 */ +#define IFM_NEVER UINT32_C(0x00100000) /* 180 */ +#define IFM_NOP UINT32_C(0x00200000) /* 181 */ +/* Mask bits for field 6 : 192...223 */ +#define IFM_8086 UINT32_C(0x00000001) /* 192 */ +#define IFM_186 UINT32_C(0x00000002) /* 193 */ +#define IFM_286 UINT32_C(0x00000004) /* 194 */ +#define IFM_386 UINT32_C(0x00000008) /* 195 */ +#define IFM_486 UINT32_C(0x00000010) /* 196 */ +#define IFM_PENT UINT32_C(0x00000020) /* 197 */ +#define IFM_P6 UINT32_C(0x00000040) /* 198 */ +#define IFM_KATMAI UINT32_C(0x00000080) /* 199 */ +#define IFM_WILLAMETTE UINT32_C(0x00000100) /* 200 */ +#define IFM_PRESCOTT UINT32_C(0x00000200) /* 201 */ +#define IFM_IA64 UINT32_C(0x00000400) /* 202 */ +#define IFM_X86_64 UINT32_C(0x00000800) /* 203 */ +#define IFM_NEHALEM UINT32_C(0x00001000) /* 204 */ +#define IFM_WESTMERE UINT32_C(0x00002000) /* 205 */ +#define IFM_SANDYBRIDGE UINT32_C(0x00004000) /* 206 */ +#define IFM_FUTURE UINT32_C(0x00008000) /* 207 */ +#define IFM_DEFAULT UINT32_C(0x00010000) /* 208 */ +#define IFM_ANY UINT32_C(0x00020000) /* 209 */ +#define IFM_CYRIX UINT32_C(0x00040000) /* 210 */ +#define IFM_AMD UINT32_C(0x00080000) /* 211 */ + +/* IF_SM0 (0) ... IF_DFV (55) */ +#define IF_IGEN_FIRST 0 +#define IF_IGEN_COUNT 56 +#define IF_IGEN_FIELD 0 +#define IF_IGEN_NFIELDS 2 + +/* IF_VEX (64) ... IF_NOP (181) */ +#define IF_FEATURE_FIRST 64 +#define IF_FEATURE_COUNT 118 +#define IF_FEATURE_FIELD 2 +#define IF_FEATURE_NFIELDS 4 + +/* IF_8086 (192) ... IF_AMD (211) */ +#define IF_CPU_FIRST 192 +#define IF_CPU_COUNT 20 +#define IF_CPU_FIELD 6 +#define IF_CPU_NFIELDS 1 + +#define IF_FIELD_COUNT 7 +typedef struct { + uint32_t field[IF_FIELD_COUNT]; +} iflag_t; + +/* All combinations of instruction flags used in instruction patterns */ +extern const iflag_t insns_flags[655]; + +#endif /* NASM_IFLAGGEN_H */ diff --git a/include/ilog2.h b/include/ilog2.h new file mode 100644 index 0000000..6929434 --- /dev/null +++ b/include/ilog2.h @@ -0,0 +1,171 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 1996-2025 The NASM Authors - All Rights Reserved */ + +/* + * ilog2_xx(x) = x ? floor(log_2(x)) : 0 + */ +#ifndef NASM_ILOG2_H +#define NASM_ILOG2_H + +#include "compiler.h" + +#ifdef ILOG2_C /* For generating the out-of-line functions */ +# undef extern_inline +# define extern_inline +# define inline_prototypes +#endif + +#ifdef inline_prototypes +extern unsigned int const_func ilog2_32(uint32_t v); +extern unsigned int const_func ilog2_64(uint64_t v); +extern int const_func alignlog2_32(uint32_t v); +extern int const_func alignlog2_64(uint64_t v); +#endif + +#ifdef extern_inline + +# define ROUND(v, a, w) \ + do { \ + if (v & (((UINT32_C(1) << w) - 1) << w)) { \ + a += w; \ + v >>= w; \ + } \ + } while (0) + +# define static_nz(x) (is_constant(x != 0) && (x != 0)) +# define defang_zero(x) ((x) | !static_nz(x)) + +# if defined(HAVE_STDC_LEADING_ZEROS) + +extern_inline unsigned int const_func ilog2_32(uint32_t v) +{ + return stdc_leading_zeros(defang_zero(v)) ^ 31; +} + +extern_inline unsigned int const_func ilog2_64(uint64_t v) +{ + return stdc_leading_zeros(defang_zero(v)) ^ 63; +} + +# else + +# if defined(HAVE___BUILTIN_CLZ) && INT_MAX == 2147483647 + +extern_inline unsigned int const_func ilog2_32(uint32_t v) +{ + return __builtin_clz(v|1) ^ 31; +} + +# elif defined(__GNUC__) && (defined(__x86_64__) || defined(__i386__)) + +extern_inline unsigned int const_func ilog2_32(uint32_t v) +{ + unsigned int n; + +# ifdef __x86_64__ + __asm__("bsrl %1,%0" + : "=r" (n) + : "rm" (v), "0" (0)); +# else + __asm__("bsrl %1,%0" + : "=r" (n) + : "rm" (defang_zero(v))); +# endif + return n; +} + +# elif defined(HAVE__BITSCANREVERSE) + +extern_inline unsigned int const_func ilog2_32(uint32_t v) +{ + unsigned long ix; + return _BitScanReverse(&ix, v) ? v : 0; +} + +# else + +extern_inline unsigned int const_func ilog2_32(uint32_t v) +{ + unsigned int p = 0; + + ROUND(v, p, 16); + ROUND(v, p, 8); + ROUND(v, p, 4); + ROUND(v, p, 2); + ROUND(v, p, 1); + + return p; +} + +# endif + +# if defined(HAVE__BUILTIN_CLZLL) && LLONG_MAX == 9223372036854775807LL + +extern_inline unsigned int const_func ilog2_64(uint64_t v) +{ + return __builtin_clzll(defang_zero(v)) ^ 63; +} + +# elif defined(__GNUC__) && defined(__x86_64__) + +extern_inline unsigned int const_func ilog2_64(uint64_t v) +{ + uint64_t n; + + __asm__("bsrq %1,%0" + : "=r" (n) + : "rm" (v), "0" (UINT64_C(0))); + return n; +} + +# elif defined(HAVE__BITSCANREVERSE64) + +extern_inline unsigned int const_func ilog2_64(uint64_t v) +{ + unsigned long ix; + return _BitScanReverse64(&ix, v) ? ix : 0; +} + +# else + +extern_inline unsigned int const_func ilog2_64(uint64_t vv) +{ + unsigned int p = 0; + uint32_t v; + + v = vv >> 32; + if (v) + p += 32; + else + v = vv; + + return p + ilog2_32(v); +} + +# endif +# endif + +/* + * v == 0 ? 0 : is_power2(x) ? ilog2_X(v) : -1 + */ +extern_inline int const_func alignlog2_32(uint32_t v) +{ + if (unlikely(v & (v-1))) + return -1; /* invalid alignment */ + + return ilog2_32(v); +} + +extern_inline int const_func alignlog2_64(uint64_t v) +{ + if (unlikely(v & (v-1))) + return -1; /* invalid alignment */ + + return ilog2_64(v); +} + +#undef ROUND + +#endif /* extern_inline */ + +#endif /* ILOG2_H */ diff --git a/include/inffast.h b/include/inffast.h new file mode 100644 index 0000000..49c6d15 --- /dev/null +++ b/include/inffast.h @@ -0,0 +1,11 @@ +/* inffast.h -- header to use inffast.c + * Copyright (C) 1995-2003, 2010 Mark Adler + * For conditions of distribution and use, see copyright notice in zlib.h + */ + +/* WARNING: this file should *not* be used by applications. It is + part of the implementation of the compression library and is + subject to change. Applications should only use zlib.h. + */ + +void ZLIB_INTERNAL inflate_fast(z_streamp strm, unsigned start); diff --git a/include/inffixed.h b/include/inffixed.h new file mode 100644 index 0000000..d628327 --- /dev/null +++ b/include/inffixed.h @@ -0,0 +1,94 @@ + /* inffixed.h -- table for decoding fixed codes + * Generated automatically by makefixed(). + */ + + /* WARNING: this file should *not* be used by applications. + It is part of the implementation of this library and is + subject to change. Applications should only use zlib.h. + */ + + static const code lenfix[512] = { + {96,7,0},{0,8,80},{0,8,16},{20,8,115},{18,7,31},{0,8,112},{0,8,48}, + {0,9,192},{16,7,10},{0,8,96},{0,8,32},{0,9,160},{0,8,0},{0,8,128}, + {0,8,64},{0,9,224},{16,7,6},{0,8,88},{0,8,24},{0,9,144},{19,7,59}, + {0,8,120},{0,8,56},{0,9,208},{17,7,17},{0,8,104},{0,8,40},{0,9,176}, + {0,8,8},{0,8,136},{0,8,72},{0,9,240},{16,7,4},{0,8,84},{0,8,20}, + {21,8,227},{19,7,43},{0,8,116},{0,8,52},{0,9,200},{17,7,13},{0,8,100}, + {0,8,36},{0,9,168},{0,8,4},{0,8,132},{0,8,68},{0,9,232},{16,7,8}, + {0,8,92},{0,8,28},{0,9,152},{20,7,83},{0,8,124},{0,8,60},{0,9,216}, + {18,7,23},{0,8,108},{0,8,44},{0,9,184},{0,8,12},{0,8,140},{0,8,76}, + {0,9,248},{16,7,3},{0,8,82},{0,8,18},{21,8,163},{19,7,35},{0,8,114}, + {0,8,50},{0,9,196},{17,7,11},{0,8,98},{0,8,34},{0,9,164},{0,8,2}, + {0,8,130},{0,8,66},{0,9,228},{16,7,7},{0,8,90},{0,8,26},{0,9,148}, + {20,7,67},{0,8,122},{0,8,58},{0,9,212},{18,7,19},{0,8,106},{0,8,42}, + {0,9,180},{0,8,10},{0,8,138},{0,8,74},{0,9,244},{16,7,5},{0,8,86}, + {0,8,22},{64,8,0},{19,7,51},{0,8,118},{0,8,54},{0,9,204},{17,7,15}, + {0,8,102},{0,8,38},{0,9,172},{0,8,6},{0,8,134},{0,8,70},{0,9,236}, + {16,7,9},{0,8,94},{0,8,30},{0,9,156},{20,7,99},{0,8,126},{0,8,62}, + {0,9,220},{18,7,27},{0,8,110},{0,8,46},{0,9,188},{0,8,14},{0,8,142}, + {0,8,78},{0,9,252},{96,7,0},{0,8,81},{0,8,17},{21,8,131},{18,7,31}, + {0,8,113},{0,8,49},{0,9,194},{16,7,10},{0,8,97},{0,8,33},{0,9,162}, + {0,8,1},{0,8,129},{0,8,65},{0,9,226},{16,7,6},{0,8,89},{0,8,25}, + {0,9,146},{19,7,59},{0,8,121},{0,8,57},{0,9,210},{17,7,17},{0,8,105}, + {0,8,41},{0,9,178},{0,8,9},{0,8,137},{0,8,73},{0,9,242},{16,7,4}, + {0,8,85},{0,8,21},{16,8,258},{19,7,43},{0,8,117},{0,8,53},{0,9,202}, + {17,7,13},{0,8,101},{0,8,37},{0,9,170},{0,8,5},{0,8,133},{0,8,69}, + {0,9,234},{16,7,8},{0,8,93},{0,8,29},{0,9,154},{20,7,83},{0,8,125}, + {0,8,61},{0,9,218},{18,7,23},{0,8,109},{0,8,45},{0,9,186},{0,8,13}, + {0,8,141},{0,8,77},{0,9,250},{16,7,3},{0,8,83},{0,8,19},{21,8,195}, + {19,7,35},{0,8,115},{0,8,51},{0,9,198},{17,7,11},{0,8,99},{0,8,35}, + {0,9,166},{0,8,3},{0,8,131},{0,8,67},{0,9,230},{16,7,7},{0,8,91}, + {0,8,27},{0,9,150},{20,7,67},{0,8,123},{0,8,59},{0,9,214},{18,7,19}, + {0,8,107},{0,8,43},{0,9,182},{0,8,11},{0,8,139},{0,8,75},{0,9,246}, + {16,7,5},{0,8,87},{0,8,23},{64,8,0},{19,7,51},{0,8,119},{0,8,55}, + {0,9,206},{17,7,15},{0,8,103},{0,8,39},{0,9,174},{0,8,7},{0,8,135}, + {0,8,71},{0,9,238},{16,7,9},{0,8,95},{0,8,31},{0,9,158},{20,7,99}, + {0,8,127},{0,8,63},{0,9,222},{18,7,27},{0,8,111},{0,8,47},{0,9,190}, + {0,8,15},{0,8,143},{0,8,79},{0,9,254},{96,7,0},{0,8,80},{0,8,16}, + {20,8,115},{18,7,31},{0,8,112},{0,8,48},{0,9,193},{16,7,10},{0,8,96}, + {0,8,32},{0,9,161},{0,8,0},{0,8,128},{0,8,64},{0,9,225},{16,7,6}, + {0,8,88},{0,8,24},{0,9,145},{19,7,59},{0,8,120},{0,8,56},{0,9,209}, + {17,7,17},{0,8,104},{0,8,40},{0,9,177},{0,8,8},{0,8,136},{0,8,72}, + {0,9,241},{16,7,4},{0,8,84},{0,8,20},{21,8,227},{19,7,43},{0,8,116}, + {0,8,52},{0,9,201},{17,7,13},{0,8,100},{0,8,36},{0,9,169},{0,8,4}, + {0,8,132},{0,8,68},{0,9,233},{16,7,8},{0,8,92},{0,8,28},{0,9,153}, + {20,7,83},{0,8,124},{0,8,60},{0,9,217},{18,7,23},{0,8,108},{0,8,44}, + {0,9,185},{0,8,12},{0,8,140},{0,8,76},{0,9,249},{16,7,3},{0,8,82}, + {0,8,18},{21,8,163},{19,7,35},{0,8,114},{0,8,50},{0,9,197},{17,7,11}, + {0,8,98},{0,8,34},{0,9,165},{0,8,2},{0,8,130},{0,8,66},{0,9,229}, + {16,7,7},{0,8,90},{0,8,26},{0,9,149},{20,7,67},{0,8,122},{0,8,58}, + {0,9,213},{18,7,19},{0,8,106},{0,8,42},{0,9,181},{0,8,10},{0,8,138}, + {0,8,74},{0,9,245},{16,7,5},{0,8,86},{0,8,22},{64,8,0},{19,7,51}, + {0,8,118},{0,8,54},{0,9,205},{17,7,15},{0,8,102},{0,8,38},{0,9,173}, + {0,8,6},{0,8,134},{0,8,70},{0,9,237},{16,7,9},{0,8,94},{0,8,30}, + {0,9,157},{20,7,99},{0,8,126},{0,8,62},{0,9,221},{18,7,27},{0,8,110}, + {0,8,46},{0,9,189},{0,8,14},{0,8,142},{0,8,78},{0,9,253},{96,7,0}, + {0,8,81},{0,8,17},{21,8,131},{18,7,31},{0,8,113},{0,8,49},{0,9,195}, + {16,7,10},{0,8,97},{0,8,33},{0,9,163},{0,8,1},{0,8,129},{0,8,65}, + {0,9,227},{16,7,6},{0,8,89},{0,8,25},{0,9,147},{19,7,59},{0,8,121}, + {0,8,57},{0,9,211},{17,7,17},{0,8,105},{0,8,41},{0,9,179},{0,8,9}, + {0,8,137},{0,8,73},{0,9,243},{16,7,4},{0,8,85},{0,8,21},{16,8,258}, + {19,7,43},{0,8,117},{0,8,53},{0,9,203},{17,7,13},{0,8,101},{0,8,37}, + {0,9,171},{0,8,5},{0,8,133},{0,8,69},{0,9,235},{16,7,8},{0,8,93}, + {0,8,29},{0,9,155},{20,7,83},{0,8,125},{0,8,61},{0,9,219},{18,7,23}, + {0,8,109},{0,8,45},{0,9,187},{0,8,13},{0,8,141},{0,8,77},{0,9,251}, + {16,7,3},{0,8,83},{0,8,19},{21,8,195},{19,7,35},{0,8,115},{0,8,51}, + {0,9,199},{17,7,11},{0,8,99},{0,8,35},{0,9,167},{0,8,3},{0,8,131}, + {0,8,67},{0,9,231},{16,7,7},{0,8,91},{0,8,27},{0,9,151},{20,7,67}, + {0,8,123},{0,8,59},{0,9,215},{18,7,19},{0,8,107},{0,8,43},{0,9,183}, + {0,8,11},{0,8,139},{0,8,75},{0,9,247},{16,7,5},{0,8,87},{0,8,23}, + {64,8,0},{19,7,51},{0,8,119},{0,8,55},{0,9,207},{17,7,15},{0,8,103}, + {0,8,39},{0,9,175},{0,8,7},{0,8,135},{0,8,71},{0,9,239},{16,7,9}, + {0,8,95},{0,8,31},{0,9,159},{20,7,99},{0,8,127},{0,8,63},{0,9,223}, + {18,7,27},{0,8,111},{0,8,47},{0,9,191},{0,8,15},{0,8,143},{0,8,79}, + {0,9,255} + }; + + static const code distfix[32] = { + {16,5,1},{23,5,257},{19,5,17},{27,5,4097},{17,5,5},{25,5,1025}, + {21,5,65},{29,5,16385},{16,5,3},{24,5,513},{20,5,33},{28,5,8193}, + {18,5,9},{26,5,2049},{22,5,129},{64,5,0},{16,5,2},{23,5,385}, + {19,5,25},{27,5,6145},{17,5,7},{25,5,1537},{21,5,97},{29,5,24577}, + {16,5,4},{24,5,769},{20,5,49},{28,5,12289},{18,5,13},{26,5,3073}, + {22,5,193},{64,5,0} + }; diff --git a/include/inflate.h b/include/inflate.h new file mode 100644 index 0000000..f127b6b --- /dev/null +++ b/include/inflate.h @@ -0,0 +1,126 @@ +/* inflate.h -- internal inflate state definition + * Copyright (C) 1995-2019 Mark Adler + * For conditions of distribution and use, see copyright notice in zlib.h + */ + +/* WARNING: this file should *not* be used by applications. It is + part of the implementation of the compression library and is + subject to change. Applications should only use zlib.h. + */ + +/* define NO_GZIP when compiling if you want to disable gzip header and + trailer decoding by inflate(). NO_GZIP would be used to avoid linking in + the crc code when it is not needed. For shared libraries, gzip decoding + should be left enabled. */ +#ifndef NO_GZIP +# define GUNZIP +#endif + +/* Possible inflate modes between inflate() calls */ +typedef enum { + HEAD = 16180, /* i: waiting for magic header */ + FLAGS, /* i: waiting for method and flags (gzip) */ + TIME, /* i: waiting for modification time (gzip) */ + OS, /* i: waiting for extra flags and operating system (gzip) */ + EXLEN, /* i: waiting for extra length (gzip) */ + EXTRA, /* i: waiting for extra bytes (gzip) */ + NAME, /* i: waiting for end of file name (gzip) */ + COMMENT, /* i: waiting for end of comment (gzip) */ + HCRC, /* i: waiting for header crc (gzip) */ + DICTID, /* i: waiting for dictionary check value */ + DICT, /* waiting for inflateSetDictionary() call */ + TYPE, /* i: waiting for type bits, including last-flag bit */ + TYPEDO, /* i: same, but skip check to exit inflate on new block */ + STORED, /* i: waiting for stored size (length and complement) */ + COPY_, /* i/o: same as COPY below, but only first time in */ + COPY, /* i/o: waiting for input or output to copy stored block */ + TABLE, /* i: waiting for dynamic block table lengths */ + LENLENS, /* i: waiting for code length code lengths */ + CODELENS, /* i: waiting for length/lit and distance code lengths */ + LEN_, /* i: same as LEN below, but only first time in */ + LEN, /* i: waiting for length/lit/eob code */ + LENEXT, /* i: waiting for length extra bits */ + DIST, /* i: waiting for distance code */ + DISTEXT, /* i: waiting for distance extra bits */ + MATCH, /* o: waiting for output space to copy string */ + LIT, /* o: waiting for output space to write literal */ + CHECK, /* i: waiting for 32-bit check value */ + LENGTH, /* i: waiting for 32-bit length (gzip) */ + DONE, /* finished check, done -- remain here until reset */ + BAD, /* got a data error -- remain here until reset */ + MEM, /* got an inflate() memory error -- remain here until reset */ + SYNC /* looking for synchronization bytes to restart inflate() */ +} inflate_mode; + +/* + State transitions between above modes - + + (most modes can go to BAD or MEM on error -- not shown for clarity) + + Process header: + HEAD -> (gzip) or (zlib) or (raw) + (gzip) -> FLAGS -> TIME -> OS -> EXLEN -> EXTRA -> NAME -> COMMENT -> + HCRC -> TYPE + (zlib) -> DICTID or TYPE + DICTID -> DICT -> TYPE + (raw) -> TYPEDO + Read deflate blocks: + TYPE -> TYPEDO -> STORED or TABLE or LEN_ or CHECK + STORED -> COPY_ -> COPY -> TYPE + TABLE -> LENLENS -> CODELENS -> LEN_ + LEN_ -> LEN + Read deflate codes in fixed or dynamic block: + LEN -> LENEXT or LIT or TYPE + LENEXT -> DIST -> DISTEXT -> MATCH -> LEN + LIT -> LEN + Process trailer: + CHECK -> LENGTH -> DONE + */ + +/* State maintained between inflate() calls -- approximately 7K bytes, not + including the allocated sliding window, which is up to 32K bytes. */ +struct inflate_state { + z_streamp strm; /* pointer back to this zlib stream */ + inflate_mode mode; /* current inflate mode */ + int last; /* true if processing last block */ + int wrap; /* bit 0 true for zlib, bit 1 true for gzip, + bit 2 true to validate check value */ + int havedict; /* true if dictionary provided */ + int flags; /* gzip header method and flags, 0 if zlib, or + -1 if raw or no header yet */ + unsigned dmax; /* zlib header max distance (INFLATE_STRICT) */ + unsigned long check; /* protected copy of check value */ + unsigned long total; /* protected copy of output count */ + gz_headerp head; /* where to save gzip header information */ + /* sliding window */ + unsigned wbits; /* log base 2 of requested window size */ + unsigned wsize; /* window size or zero if not using window */ + unsigned whave; /* valid bytes in the window */ + unsigned wnext; /* window write index */ + unsigned char FAR *window; /* allocated sliding window, if needed */ + /* bit accumulator */ + unsigned long hold; /* input bit accumulator */ + unsigned bits; /* number of bits in "in" */ + /* for string and stored block copying */ + unsigned length; /* literal or length of data to copy */ + unsigned offset; /* distance back to copy string from */ + /* for table and code decoding */ + unsigned extra; /* extra bits needed */ + /* fixed and dynamic code tables */ + code const FAR *lencode; /* starting table for length/literal codes */ + code const FAR *distcode; /* starting table for distance codes */ + unsigned lenbits; /* index bits for lencode */ + unsigned distbits; /* index bits for distcode */ + /* dynamic table building */ + unsigned ncode; /* number of code length code lengths */ + unsigned nlen; /* number of length code lengths */ + unsigned ndist; /* number of distance code lengths */ + unsigned have; /* number of code lengths in lens[] */ + code FAR *next; /* next available space in codes[] */ + unsigned short lens[320]; /* temporary storage for code lengths */ + unsigned short work[288]; /* work area for code table building */ + code codes[ENOUGH]; /* space for code tables */ + int sane; /* if false, allow invalid distance too far */ + int back; /* bits back of last unprocessed length/lit */ + unsigned was; /* initial length of match */ +}; diff --git a/include/inftrees.h b/include/inftrees.h new file mode 100644 index 0000000..396f74b --- /dev/null +++ b/include/inftrees.h @@ -0,0 +1,62 @@ +/* inftrees.h -- header to use inftrees.c + * Copyright (C) 1995-2005, 2010 Mark Adler + * For conditions of distribution and use, see copyright notice in zlib.h + */ + +/* WARNING: this file should *not* be used by applications. It is + part of the implementation of the compression library and is + subject to change. Applications should only use zlib.h. + */ + +/* Structure for decoding tables. Each entry provides either the + information needed to do the operation requested by the code that + indexed that table entry, or it provides a pointer to another + table that indexes more bits of the code. op indicates whether + the entry is a pointer to another table, a literal, a length or + distance, an end-of-block, or an invalid code. For a table + pointer, the low four bits of op is the number of index bits of + that table. For a length or distance, the low four bits of op + is the number of extra bits to get after the code. bits is + the number of bits in this code or part of the code to drop off + of the bit buffer. val is the actual byte to output in the case + of a literal, the base length or distance, or the offset from + the current table to the next table. Each entry is four bytes. */ +typedef struct { + unsigned char op; /* operation, extra bits, table bits */ + unsigned char bits; /* bits in this part of the code */ + unsigned short val; /* offset in table or code value */ +} code; + +/* op values as set by inflate_table(): + 00000000 - literal + 0000tttt - table link, tttt != 0 is the number of table index bits + 0001eeee - length or distance, eeee is the number of extra bits + 01100000 - end of block + 01000000 - invalid code + */ + +/* Maximum size of the dynamic table. The maximum number of code structures is + 1444, which is the sum of 852 for literal/length codes and 592 for distance + codes. These values were found by exhaustive searches using the program + examples/enough.c found in the zlib distribution. The arguments to that + program are the number of symbols, the initial root table size, and the + maximum bit length of a code. "enough 286 9 15" for literal/length codes + returns 852, and "enough 30 6 15" for distance codes returns 592. The + initial root table size (9 or 6) is found in the fifth argument of the + inflate_table() calls in inflate.c and infback.c. If the root table size is + changed, then these maximum sizes would be need to be recalculated and + updated. */ +#define ENOUGH_LENS 852 +#define ENOUGH_DISTS 592 +#define ENOUGH (ENOUGH_LENS+ENOUGH_DISTS) + +/* Type of code to build for inflate_table() */ +typedef enum { + CODES, + LENS, + DISTS +} codetype; + +int ZLIB_INTERNAL inflate_table(codetype type, unsigned short FAR *lens, + unsigned codes, code FAR * FAR *table, + unsigned FAR *bits, unsigned short FAR *work); diff --git a/include/insns.h b/include/insns.h new file mode 100644 index 0000000..1a9e736 --- /dev/null +++ b/include/insns.h @@ -0,0 +1,122 @@ +/* insns.h header file for insns.c + * + * The Netwide Assembler is copyright (C) 1996 Simon Tatham and + * Julian Hall. All rights reserved. The software is + * redistributable under the license given in the file "LICENSE" + * distributed in the NASM archive. + */ + +#ifndef NASM_INSNS_H +#define NASM_INSNS_H + +#include "nasm.h" +#include "tokens.h" +#include "iflag.h" + +struct itemplate { + enum opcode opcode; /* the token, passed from "parser.c" */ + int operands; /* number of operands */ + opflags_t opd[MAX_OPERANDS]; /* bit flags for operand types */ + decoflags_t deco[MAX_OPERANDS]; /* bit flags for operand decorators */ + const uint8_t *code; /* the code it assembles to */ + uint32_t iflag_idx; /* some flags referenced by index */ + unsigned int xdaline; /* line # in insns.xda (for debug) */ +}; + +/* Use this helper to test instruction template flags */ +static inline bool itemp_has(const struct itemplate *itemp, unsigned int bit) +{ + return iflag_test(&insns_flags[itemp->iflag_idx], bit); +} + +/* Disassembler table structure */ + +/* Instruction tables for the assembler */ +struct itemplate_list { + unsigned int ntemp; + const struct itemplate *temp; +}; +extern const struct itemplate_list nasm_instructions[]; + +/* Instruction tables for the disassembler */ +extern const struct itemplate * const * const * const ndisasm_itable[]; + +/* Common table for the byte codes */ +extern const uint8_t nasm_bytecodes[]; + +/* + * Pseudo-op tests + */ +/* DB-type instruction (DB, DW, ...) */ +static inline bool const_func opcode_is_db(enum opcode opcode) +{ + return opcode >= I_DB && opcode < I_RESB; +} + +/* RESB-type instruction (RESB, RESW, ...) */ +static inline bool const_func opcode_is_resb(enum opcode opcode) +{ + return opcode >= I_RESB && opcode < I_INCBIN; +} + +/* Width of Dx and RESx instructions */ + +/* + * initialized data bytes length from opcode + */ +static inline int const_func db_bytes(enum opcode opcode) +{ + switch (opcode) { + case I_DB: + return 1; + case I_DW: + return 2; + case I_DD: + return 4; + case I_DQ: + return 8; + case I_DT: + return 10; + case I_DO: + return 16; + case I_DY: + return 32; + case I_DZ: + return 64; + case I_none: + return -1; + default: + return 0; + } +} + +/* + * Uninitialized data bytes length from opcode + */ +static inline int const_func resb_bytes(enum opcode opcode) +{ + switch (opcode) { + case I_RESB: + return 1; + case I_RESW: + return 2; + case I_RESD: + return 4; + case I_RESQ: + return 8; + case I_REST: + return 10; + case I_RESO: + return 16; + case I_RESY: + return 32; + case I_RESZ: + return 64; + case I_none: + return -1; + default: + return 0; + } +} + +#endif /* NASM_INSNS_H */ diff --git a/include/insnsi.h b/include/insnsi.h new file mode 100644 index 0000000..2383ef2 --- /dev/null +++ b/include/insnsi.h @@ -0,0 +1,2664 @@ +/* This file is auto-generated from insns.dat by insns.pl - don't edit it */ + +/* This file in included by nasm.h */ + +/* Instruction names */ + +#ifndef NASM_INSNSI_H +#define NASM_INSNSI_H 1 + +enum opcode { + I_DB, + I_DW, + I_DD, + I_DQ, + I_DT, + I_DO, + I_DY, + I_DZ, + I_RESB, + I_RESW, + I_RESD, + I_RESQ, + I_REST, + I_RESO, + I_RESY, + I_RESZ, + I_INCBIN, + I_EQU, + I_NOP, + I_NOP2, + I_MOV, + I_MOVABS, + I_MOVRS, + I_LEA, + I_ADD, + I_OR, + I_ADC, + I_SBB, + I_AND, + I_SUB, + I_XOR, + I_CMP, + I_TEST, + I_ROL, + I_ROR, + I_RCL, + I_RCR, + I_SHL, + I_SAL, + I_SHR, + I_SAR, + I_RORX, + I_ROLX, + I_SHLX, + I_SALX, + I_SARX, + I_SHRX, + I_INC, + I_DEC, + I_IMUL, + I_MUL, + I_MULX, + I_IDIV, + I_DIV, + I_NEG, + I_NOT, + I_ADCX, + I_ADOX, + I_SHLD, + I_SHRD, + I_BT, + I_BTC, + I_BTR, + I_BTS, + I_BSF, + I_BSR, + I_IBTS, + I_XBTS, + I_LZCNT, + I_TZCNT, + I_ANDN, + I_BEXTR, + I_BLSMSK, + I_BLSR, + I_BLSI, + I_BZHI, + I_PDEP, + I_PEXT, + I_BLCI, + I_BLCIC, + I_BLSIC, + I_BLCFILL, + I_BLSFILL, + I_BLCMSK, + I_BLCS, + I_TZMSK, + I_T1MSKC, + I_AAA, + I_AAD, + I_AAM, + I_AAS, + I_DAA, + I_DAS, + I_BSWAP, + I_MOVBE, + I_CBW, + I_CDQ, + I_CDQE, + I_CQO, + I_CWD, + I_CWDE, + I_MOVSX, + I_MOVSXB, + I_MOVSXW, + I_MOVSXD, + I_MOVZX, + I_MOVZXB, + I_MOVZXW, + I_MOVZXD, + I_CMPXCHG, + I_CMPXCHG8B, + I_CMPXCHG16B, + I_XADD, + I_XCHG, + I_CMPXCHG486, + I_JMPABS, + I_JMP, + I_JA, + I_JAE, + I_JB, + I_JBE, + I_JC, + I_JE, + I_JG, + I_JGE, + I_JL, + I_JLE, + I_JNA, + I_JNAE, + I_JNB, + I_JNBE, + I_JNC, + I_JNE, + I_JNG, + I_JNGE, + I_JNL, + I_JNLE, + I_JNO, + I_JNP, + I_JNS, + I_JNZ, + I_JO, + I_JP, + I_JPE, + I_JPO, + I_JS, + I_JZ, + I_JCXZ, + I_JECXZ, + I_JRCXZ, + I_LOOP, + I_LOOPW, + I_LOOPD, + I_LOOPQ, + I_LOOPE, + I_LOOPEW, + I_LOOPED, + I_LOOPEQ, + I_LOOPNE, + I_LOOPNEW, + I_LOOPNED, + I_LOOPNEQ, + I_LOOPZ, + I_LOOPZW, + I_LOOPZD, + I_LOOPZQ, + I_LOOPNZ, + I_LOOPNZW, + I_LOOPNZD, + I_LOOPNZQ, + I_JMPE, + I_CALL, + I_RET, + I_RETW, + I_RETD, + I_RETQ, + I_RETF, + I_RETFW, + I_RETFD, + I_RETFQ, + I_RETN, + I_RETNW, + I_RETND, + I_RETNQ, + I_INT, + I_INT1, + I_INT01, + I_ICEBP, + I_INT3, + I_INT03, + I_BRKPT, + I_INTO, + I_SYSCALL, + I_SYSENTER, + I_SYSEXIT, + I_SYSRET, + I_IRET, + I_IRETW, + I_IRETD, + I_IRETQ, + I_ERETS, + I_ERETU, + I_CLC, + I_CLD, + I_CLI, + I_CLAC, + I_STC, + I_STD, + I_STI, + I_STAC, + I_CMC, + I_LAHF, + I_SAHF, + I_SALC, + I_PUSHF, + I_PUSHFW, + I_PUSHFD, + I_PUSHFQ, + I_POPF, + I_POPFW, + I_POPFD, + I_POPFQ, + I_CMPSB, + I_CMPSW, + I_CMPSD, + I_CMPSQ, + I_LODSB, + I_LODSW, + I_LODSD, + I_LODSQ, + I_MOVSB, + I_MOVSW, + I_MOVSD, + I_MOVSQ, + I_STOSB, + I_STOSW, + I_STOSD, + I_STOSQ, + I_SCASB, + I_SCASW, + I_SCASD, + I_SCASQ, + I_INSB, + I_INSW, + I_INSD, + I_OUTSB, + I_OUTSW, + I_OUTSD, + I_LFENCE, + I_MFENCE, + I_SFENCE, + I_SERIALIZE, + I_CLFLUSH, + I_CLFLUSHOPT, + I_CLWB, + I_PCOMMIT, + I_CLZERO, + I_INVD, + I_WBINVD, + I_WBNOINVD, + I_INVPCID, + I_INVLPG, + I_INVLPGA, + I_RDPMC, + I_RDTSC, + I_RDTSCP, + I_RDRAND, + I_RDSEED, + I_RDPID, + I_CLTS, + I_CPUID, + I_LMSW, + I_SMSW, + I_WRMSR, + I_RDMSR, + I_WRMSRNS, + I_RDMSRLIST, + I_WRMSRLIST, + I_URDMSR, + I_UWRMSR, + I_UMOV, + I_BB0_RESET, + I_BB1_RESET, + I_CPU_READ, + I_CPU_WRITE, + I_DMINT, + I_RDM, + I_SMINT, + I_SMINTOLD, + I_RSM, + I_WRSHR, + I_RDSHR, + I_RSDC, + I_RSLDT, + I_RSTS, + I_SVDC, + I_SVLDT, + I_SVTS, + I_HLT, + I_PAUSE, + I_MONITOR, + I_MONITORW, + I_MONITORD, + I_MONITORQ, + I_MWAIT, + I_MONITORX, + I_MWAITX, + I_TPAUSE, + I_UMONITOR, + I_UMWAIT, + I_IN, + I_OUT, + I_LDS, + I_LES, + I_LFS, + I_LGS, + I_LSS, + I_PUSH, + I_POP, + I_RDFSBASE, + I_RDGSBASE, + I_WRFSBASE, + I_WRGSBASE, + I_ARPL, + I_LAR, + I_LSL, + I_VERR, + I_VERW, + I_SWAPGS, + I_LKGS, + I_LGDT, + I_LIDT, + I_LLDT, + I_LTR, + I_SGDT, + I_SIDT, + I_SLDT, + I_STR, + I_LOADALL, + I_LOADALL286, + I_F2XM1, + I_FABS, + I_FADD, + I_FADDP, + I_FBLD, + I_FBSTP, + I_FCHS, + I_FCLEX, + I_FCMOVB, + I_FCMOVBE, + I_FCMOVE, + I_FCMOVNB, + I_FCMOVNBE, + I_FCMOVNE, + I_FCMOVNU, + I_FCMOVU, + I_FCOM, + I_FCOMI, + I_FCOMIP, + I_FCOMP, + I_FCOMPP, + I_FCOS, + I_FDECSTP, + I_FDISI, + I_FDIV, + I_FDIVP, + I_FDIVR, + I_FDIVRP, + I_FEMMS, + I_FENI, + I_FFREE, + I_FFREEP, + I_FIADD, + I_FICOM, + I_FICOMP, + I_FIDIV, + I_FIDIVR, + I_FILD, + I_FIMUL, + I_FINCSTP, + I_FINIT, + I_FIST, + I_FISTP, + I_FISTTP, + I_FISUB, + I_FISUBR, + I_FLD, + I_FLD1, + I_FLDCW, + I_FLDENV, + I_FLDL2E, + I_FLDL2T, + I_FLDLG2, + I_FLDLN2, + I_FLDPI, + I_FLDZ, + I_FMUL, + I_FMULP, + I_FNCLEX, + I_FNDISI, + I_FNENI, + I_FNINIT, + I_FNOP, + I_FNSAVE, + I_FNSTCW, + I_FNSTENV, + I_FNSTSW, + I_FPATAN, + I_FPREM, + I_FPREM1, + I_FPTAN, + I_FRNDINT, + I_FRSTOR, + I_FSAVE, + I_FSCALE, + I_FSETPM, + I_FSIN, + I_FSINCOS, + I_FSQRT, + I_FST, + I_FSTCW, + I_FSTENV, + I_FSTP, + I_FSTSW, + I_FSUB, + I_FSUBP, + I_FSUBR, + I_FSUBRP, + I_FTST, + I_FUCOM, + I_FUCOMI, + I_FUCOMIP, + I_FUCOMP, + I_FUCOMPP, + I_FXAM, + I_FXCH, + I_FXTRACT, + I_FYL2X, + I_FYL2XP1, + I_EMMS, + I_MOVD, + I_MOVQ, + I_PACKSSDW, + I_PACKSSWB, + I_PACKUSWB, + I_PADDB, + I_PADDD, + I_PADDSB, + I_PADDSIW, + I_PADDSW, + I_PADDUSB, + I_PADDUSW, + I_PADDW, + I_PAND, + I_PANDN, + I_PAVEB, + I_PAVGUSB, + I_PCMPEQB, + I_PCMPEQD, + I_PCMPEQW, + I_PCMPGTB, + I_PCMPGTD, + I_PCMPGTW, + I_PDISTIB, + I_PF2ID, + I_PFACC, + I_PFADD, + I_PFCMPEQ, + I_PFCMPGE, + I_PFCMPGT, + I_PFMAX, + I_PFMIN, + I_PFMUL, + I_PFRCP, + I_PFRCPIT1, + I_PFRCPIT2, + I_PFRSQIT1, + I_PFRSQRT, + I_PFSUB, + I_PFSUBR, + I_PI2FD, + I_PMACHRIW, + I_PMADDWD, + I_PMAGW, + I_PMULHRIW, + I_PMULHRWA, + I_PMULHRWC, + I_PMULHW, + I_PMULLW, + I_PMVGEZB, + I_PMVLZB, + I_PMVNZB, + I_PMVZB, + I_POR, + I_PREFETCH, + I_PREFETCHW, + I_PSLLD, + I_PSLLQ, + I_PSLLW, + I_PSRAD, + I_PSRAW, + I_PSRLD, + I_PSRLQ, + I_PSRLW, + I_PSUBB, + I_PSUBD, + I_PSUBSB, + I_PSUBSIW, + I_PSUBSW, + I_PSUBUSB, + I_PSUBUSW, + I_PSUBW, + I_PUNPCKHBW, + I_PUNPCKHDQ, + I_PUNPCKHWD, + I_PUNPCKLBW, + I_PUNPCKLDQ, + I_PUNPCKLWD, + I_PUSHA, + I_PUSHAW, + I_PUSHAD, + I_POPA, + I_POPAW, + I_POPAD, + I_ENTER, + I_ENTERW, + I_ENTERD, + I_ENTERQ, + I_LEAVE, + I_LEAVEW, + I_LEAVED, + I_LEAVEQ, + I_BOUND, + I_PUSHP, + I_POPP, + I_PUSH2, + I_PUSH2P, + I_POP2, + I_POP2P, + I_PXOR, + I_SKINIT, + I_UD0, + I_UD1, + I_UD2B, + I_UD2, + I_UD2A, + I_UDB, + I_UDW, + I_FWAIT, + I_XLATB, + I_XLAT, + I_CCMP, + I_CCMPA, + I_CCMPAE, + I_CCMPB, + I_CCMPBE, + I_CCMPC, + I_CCMPE, + I_CCMPF, + I_CCMPG, + I_CCMPGE, + I_CCMPL, + I_CCMPLE, + I_CCMPNA, + I_CCMPNAE, + I_CCMPNB, + I_CCMPNBE, + I_CCMPNC, + I_CCMPNE, + I_CCMPNG, + I_CCMPNGE, + I_CCMPNL, + I_CCMPNLE, + I_CCMPNO, + I_CCMPNS, + I_CCMPNZ, + I_CCMPO, + I_CCMPS, + I_CCMPT, + I_CCMPZ, + I_CTEST, + I_CTESTA, + I_CTESTAE, + I_CTESTB, + I_CTESTBE, + I_CTESTC, + I_CTESTE, + I_CTESTF, + I_CTESTG, + I_CTESTGE, + I_CTESTL, + I_CTESTLE, + I_CTESTNA, + I_CTESTNAE, + I_CTESTNB, + I_CTESTNBE, + I_CTESTNC, + I_CTESTNE, + I_CTESTNG, + I_CTESTNGE, + I_CTESTNL, + I_CTESTNLE, + I_CTESTNO, + I_CTESTNS, + I_CTESTNZ, + I_CTESTO, + I_CTESTS, + I_CTESTT, + I_CTESTZ, + I_CMOVA, + I_CMOVAE, + I_CMOVB, + I_CMOVBE, + I_CMOVC, + I_CMOVE, + I_CMOVG, + I_CMOVGE, + I_CMOVL, + I_CMOVLE, + I_CMOVNA, + I_CMOVNAE, + I_CMOVNB, + I_CMOVNBE, + I_CMOVNC, + I_CMOVNE, + I_CMOVNG, + I_CMOVNGE, + I_CMOVNL, + I_CMOVNLE, + I_CMOVNO, + I_CMOVNP, + I_CMOVNS, + I_CMOVNZ, + I_CMOVO, + I_CMOVP, + I_CMOVPE, + I_CMOVPO, + I_CMOVS, + I_CMOVZ, + I_CFCMOVA, + I_CFCMOVAE, + I_CFCMOVB, + I_CFCMOVBE, + I_CFCMOVC, + I_CFCMOVE, + I_CFCMOVG, + I_CFCMOVGE, + I_CFCMOVL, + I_CFCMOVLE, + I_CFCMOVNA, + I_CFCMOVNAE, + I_CFCMOVNB, + I_CFCMOVNBE, + I_CFCMOVNC, + I_CFCMOVNE, + I_CFCMOVNG, + I_CFCMOVNGE, + I_CFCMOVNL, + I_CFCMOVNLE, + I_CFCMOVNO, + I_CFCMOVNP, + I_CFCMOVNS, + I_CFCMOVNZ, + I_CFCMOVO, + I_CFCMOVP, + I_CFCMOVPE, + I_CFCMOVPO, + I_CFCMOVS, + I_CFCMOVZ, + I_SETA, + I_SETAE, + I_SETB, + I_SETBE, + I_SETC, + I_SETE, + I_SETG, + I_SETGE, + I_SETL, + I_SETLE, + I_SETNA, + I_SETNAE, + I_SETNB, + I_SETNBE, + I_SETNC, + I_SETNE, + I_SETNG, + I_SETNGE, + I_SETNL, + I_SETNLE, + I_SETNO, + I_SETNP, + I_SETNS, + I_SETNZ, + I_SETO, + I_SETP, + I_SETPE, + I_SETPO, + I_SETS, + I_SETZ, + I_SETAZU, + I_SETAEZU, + I_SETBZU, + I_SETBEZU, + I_SETCZU, + I_SETEZU, + I_SETGZU, + I_SETGEZU, + I_SETLZU, + I_SETLEZU, + I_SETNAZU, + I_SETNAEZU, + I_SETNBZU, + I_SETNBEZU, + I_SETNCZU, + I_SETNEZU, + I_SETNGZU, + I_SETNGEZU, + I_SETNLZU, + I_SETNLEZU, + I_SETNOZU, + I_SETNPZU, + I_SETNSZU, + I_SETNZZU, + I_SETOZU, + I_SETPZU, + I_SETPEZU, + I_SETPOZU, + I_SETSZU, + I_SETZZU, + I_CMPAXADD, + I_CMPAEXADD, + I_CMPBXADD, + I_CMPBEXADD, + I_CMPCXADD, + I_CMPEXADD, + I_CMPGXADD, + I_CMPGEXADD, + I_CMPLXADD, + I_CMPLEXADD, + I_CMPNAXADD, + I_CMPNAEXADD, + I_CMPNBXADD, + I_CMPNBEXADD, + I_CMPNCXADD, + I_CMPNEXADD, + I_CMPNGXADD, + I_CMPNGEXADD, + I_CMPNLXADD, + I_CMPNLEXADD, + I_CMPNOXADD, + I_CMPNPXADD, + I_CMPNSXADD, + I_CMPNZXADD, + I_CMPOXADD, + I_CMPPXADD, + I_CMPPEXADD, + I_CMPPOXADD, + I_CMPSXADD, + I_CMPZXADD, + I_ADDPS, + I_ADDSS, + I_ANDNPS, + I_ANDPS, + I_CMPEQPS, + I_CMPEQSS, + I_CMPLEPS, + I_CMPLESS, + I_CMPLTPS, + I_CMPLTSS, + I_CMPNEQPS, + I_CMPNEQSS, + I_CMPNLEPS, + I_CMPNLESS, + I_CMPNLTPS, + I_CMPNLTSS, + I_CMPORDPS, + I_CMPORDSS, + I_CMPUNORDPS, + I_CMPUNORDSS, + I_CMPPS, + I_CMPSS, + I_COMISS, + I_CVTPI2PS, + I_CVTPS2PI, + I_CVTSI2SS, + I_CVTSS2SI, + I_CVTTPS2PI, + I_CVTTSS2SI, + I_DIVPS, + I_DIVSS, + I_LDMXCSR, + I_MAXPS, + I_MAXSS, + I_MINPS, + I_MINSS, + I_MOVAPS, + I_MOVHPS, + I_MOVLHPS, + I_MOVLPS, + I_MOVHLPS, + I_MOVMSKPS, + I_MOVNTPS, + I_MOVSS, + I_MOVUPS, + I_MULPS, + I_MULSS, + I_ORPS, + I_RCPPS, + I_RCPSS, + I_RSQRTPS, + I_RSQRTSS, + I_SHUFPS, + I_SQRTPS, + I_SQRTSS, + I_STMXCSR, + I_SUBPS, + I_SUBSS, + I_UCOMISS, + I_UNPCKHPS, + I_UNPCKLPS, + I_XORPS, + I_FXRSTOR, + I_FXRSTOR64, + I_FXSAVE, + I_FXSAVE64, + I_XGETBV, + I_XSETBV, + I_XSAVE, + I_XSAVE64, + I_XSAVEC, + I_XSAVEC64, + I_XSAVEOPT, + I_XSAVEOPT64, + I_XSAVES, + I_XSAVES64, + I_XRSTOR, + I_XRSTOR64, + I_XRSTORS, + I_XRSTORS64, + I_PREFETCHNTA, + I_PREFETCHT0, + I_PREFETCHT1, + I_PREFETCHT2, + I_PREFETCHIT0, + I_PREFETCHIT1, + I_MASKMOVQ, + I_MOVNTQ, + I_PAVGB, + I_PAVGW, + I_PEXTRW, + I_PINSRW, + I_PMAXSW, + I_PMAXUB, + I_PMINSW, + I_PMINUB, + I_PMOVMSKB, + I_PMULHUW, + I_PSADBW, + I_PSHUFW, + I_PF2IW, + I_PFNACC, + I_PFPNACC, + I_PI2FW, + I_PSWAPD, + I_MASKMOVDQU, + I_MOVNTDQ, + I_MOVNTI, + I_MOVNTPD, + I_MOVDQA, + I_MOVDQU, + I_MOVDQ2Q, + I_MOVQ2DQ, + I_PADDQ, + I_PMULUDQ, + I_PSHUFD, + I_PSHUFHW, + I_PSHUFLW, + I_PSLLDQ, + I_PSRLDQ, + I_PSUBQ, + I_PUNPCKHQDQ, + I_PUNPCKLQDQ, + I_ADDPD, + I_ADDSD, + I_ANDNPD, + I_ANDPD, + I_CMPEQPD, + I_CMPEQSD, + I_CMPLEPD, + I_CMPLESD, + I_CMPLTPD, + I_CMPLTSD, + I_CMPNEQPD, + I_CMPNEQSD, + I_CMPNLEPD, + I_CMPNLESD, + I_CMPNLTPD, + I_CMPNLTSD, + I_CMPORDPD, + I_CMPORDSD, + I_CMPUNORDPD, + I_CMPUNORDSD, + I_CMPPD, + I_COMISD, + I_CVTDQ2PD, + I_CVTDQ2PS, + I_CVTPD2DQ, + I_CVTPD2PI, + I_CVTPD2PS, + I_CVTPI2PD, + I_CVTPS2DQ, + I_CVTPS2PD, + I_CVTSD2SI, + I_CVTSD2SS, + I_CVTSI2SD, + I_CVTSS2SD, + I_CVTTPD2PI, + I_CVTTPD2DQ, + I_CVTTPS2DQ, + I_CVTTSD2SI, + I_DIVPD, + I_DIVSD, + I_MAXPD, + I_MAXSD, + I_MINPD, + I_MINSD, + I_MOVAPD, + I_MOVHPD, + I_MOVLPD, + I_MOVMSKPD, + I_MOVUPD, + I_MULPD, + I_MULSD, + I_ORPD, + I_SHUFPD, + I_SQRTPD, + I_SQRTSD, + I_SUBPD, + I_SUBSD, + I_UCOMISD, + I_UNPCKHPD, + I_UNPCKLPD, + I_XORPD, + I_ADDSUBPD, + I_ADDSUBPS, + I_HADDPD, + I_HADDPS, + I_HSUBPD, + I_HSUBPS, + I_LDDQU, + I_MOVDDUP, + I_MOVSHDUP, + I_MOVSLDUP, + I_CLGI, + I_STGI, + I_VMCALL, + I_VMCLEAR, + I_VMFUNC, + I_VMLAUNCH, + I_VMLOAD, + I_VMMCALL, + I_VMPTRLD, + I_VMPTRST, + I_VMREAD, + I_VMRESUME, + I_VMRUN, + I_VMSAVE, + I_VMWRITE, + I_VMXOFF, + I_VMXON, + I_INVEPT, + I_INVVPID, + I_PVALIDATE, + I_RMPADJUST, + I_VMGEXIT, + I_PABSB, + I_PABSW, + I_PABSD, + I_PALIGNR, + I_PHADDW, + I_PHADDD, + I_PHADDSW, + I_PHSUBW, + I_PHSUBD, + I_PHSUBSW, + I_PMADDUBSW, + I_PMULHRSW, + I_PSHUFB, + I_PSIGNB, + I_PSIGNW, + I_PSIGND, + I_EXTRQ, + I_INSERTQ, + I_MOVNTSD, + I_MOVNTSS, + I_BLENDPD, + I_BLENDPS, + I_BLENDVPD, + I_BLENDVPS, + I_DPPD, + I_DPPS, + I_EXTRACTPS, + I_INSERTPS, + I_MOVNTDQA, + I_MPSADBW, + I_PACKUSDW, + I_PBLENDVB, + I_PBLENDW, + I_PCMPEQQ, + I_PEXTRB, + I_PEXTRD, + I_PEXTRQ, + I_PHMINPOSUW, + I_PINSRB, + I_PINSRD, + I_PINSRQ, + I_PMAXSB, + I_PMAXSD, + I_PMAXUD, + I_PMAXUW, + I_PMINSB, + I_PMINSD, + I_PMINUD, + I_PMINUW, + I_PMOVSXBW, + I_PMOVSXBD, + I_PMOVSXBQ, + I_PMOVSXWD, + I_PMOVSXWQ, + I_PMOVSXDQ, + I_PMOVZXBW, + I_PMOVZXBD, + I_PMOVZXBQ, + I_PMOVZXWD, + I_PMOVZXWQ, + I_PMOVZXDQ, + I_PMULDQ, + I_PMULLD, + I_PTEST, + I_ROUNDPD, + I_ROUNDPS, + I_ROUNDSD, + I_ROUNDSS, + I_CRC32, + I_PCMPESTRI, + I_PCMPESTRM, + I_PCMPISTRI, + I_PCMPISTRM, + I_PCMPGTQ, + I_POPCNT, + I_GETSEC, + I_PFRCPV, + I_PFRSQRTV, + I_AESENC, + I_AESENCLAST, + I_AESDEC, + I_AESDECLAST, + I_AESIMC, + I_AESKEYGENASSIST, + I_VAESENC, + I_VAESENCLAST, + I_VAESDEC, + I_VAESDECLAST, + I_VAESIMC, + I_VAESKEYGENASSIST, + I_AESDEC128KL, + I_AESDEC256KL, + I_AESENC128KL, + I_AESENC256KL, + I_ENCODEKEY128, + I_ENCODEKEY256, + I_LOADIWKEY, + I_AESDECWIDE128KL, + I_AESDECWIDE256KL, + I_AESENCWIDE128KL, + I_AESENCWIDE256KL, + I_VADDPD, + I_VADDPS, + I_VADDSD, + I_VADDSS, + I_VADDSUBPD, + I_VADDSUBPS, + I_VANDPD, + I_VANDPS, + I_VANDNPD, + I_VANDNPS, + I_VBLENDPD, + I_VBLENDPS, + I_VBLENDVPD, + I_VBLENDVPS, + I_VBROADCASTSS, + I_VBROADCASTSD, + I_VBROADCASTF128, + I_VCMPEQ_OSPD, + I_VCMPEQPD, + I_VCMPLT_OSPD, + I_VCMPLTPD, + I_VCMPLE_OSPD, + I_VCMPLEPD, + I_VCMPUNORD_QPD, + I_VCMPUNORDPD, + I_VCMPNEQ_UQPD, + I_VCMPNEQPD, + I_VCMPNLT_USPD, + I_VCMPNLTPD, + I_VCMPNLE_USPD, + I_VCMPNLEPD, + I_VCMPORD_QPD, + I_VCMPORDPD, + I_VCMPEQ_UQPD, + I_VCMPNGE_USPD, + I_VCMPNGEPD, + I_VCMPNGT_USPD, + I_VCMPNGTPD, + I_VCMPFALSE_OQPD, + I_VCMPFALSEPD, + I_VCMPNEQ_OQPD, + I_VCMPGE_OSPD, + I_VCMPGEPD, + I_VCMPGT_OSPD, + I_VCMPGTPD, + I_VCMPTRUE_UQPD, + I_VCMPTRUEPD, + I_VCMPLT_OQPD, + I_VCMPLE_OQPD, + I_VCMPUNORD_SPD, + I_VCMPNEQ_USPD, + I_VCMPNLT_UQPD, + I_VCMPNLE_UQPD, + I_VCMPORD_SPD, + I_VCMPEQ_USPD, + I_VCMPNGE_UQPD, + I_VCMPNGT_UQPD, + I_VCMPFALSE_OSPD, + I_VCMPNEQ_OSPD, + I_VCMPGE_OQPD, + I_VCMPGT_OQPD, + I_VCMPTRUE_USPD, + I_VCMPPD, + I_VCMPEQ_OSPS, + I_VCMPEQPS, + I_VCMPLT_OSPS, + I_VCMPLTPS, + I_VCMPLE_OSPS, + I_VCMPLEPS, + I_VCMPUNORD_QPS, + I_VCMPUNORDPS, + I_VCMPNEQ_UQPS, + I_VCMPNEQPS, + I_VCMPNLT_USPS, + I_VCMPNLTPS, + I_VCMPNLE_USPS, + I_VCMPNLEPS, + I_VCMPORD_QPS, + I_VCMPORDPS, + I_VCMPEQ_UQPS, + I_VCMPNGE_USPS, + I_VCMPNGEPS, + I_VCMPNGT_USPS, + I_VCMPNGTPS, + I_VCMPFALSE_OQPS, + I_VCMPFALSEPS, + I_VCMPNEQ_OQPS, + I_VCMPGE_OSPS, + I_VCMPGEPS, + I_VCMPGT_OSPS, + I_VCMPGTPS, + I_VCMPTRUE_UQPS, + I_VCMPTRUEPS, + I_VCMPLT_OQPS, + I_VCMPLE_OQPS, + I_VCMPUNORD_SPS, + I_VCMPNEQ_USPS, + I_VCMPNLT_UQPS, + I_VCMPNLE_UQPS, + I_VCMPORD_SPS, + I_VCMPEQ_USPS, + I_VCMPNGE_UQPS, + I_VCMPNGT_UQPS, + I_VCMPFALSE_OSPS, + I_VCMPNEQ_OSPS, + I_VCMPGE_OQPS, + I_VCMPGT_OQPS, + I_VCMPTRUE_USPS, + I_VCMPPS, + I_VCMPEQ_OSSD, + I_VCMPEQSD, + I_VCMPLT_OSSD, + I_VCMPLTSD, + I_VCMPLE_OSSD, + I_VCMPLESD, + I_VCMPUNORD_QSD, + I_VCMPUNORDSD, + I_VCMPNEQ_UQSD, + I_VCMPNEQSD, + I_VCMPNLT_USSD, + I_VCMPNLTSD, + I_VCMPNLE_USSD, + I_VCMPNLESD, + I_VCMPORD_QSD, + I_VCMPORDSD, + I_VCMPEQ_UQSD, + I_VCMPNGE_USSD, + I_VCMPNGESD, + I_VCMPNGT_USSD, + I_VCMPNGTSD, + I_VCMPFALSE_OQSD, + I_VCMPFALSESD, + I_VCMPNEQ_OQSD, + I_VCMPGE_OSSD, + I_VCMPGESD, + I_VCMPGT_OSSD, + I_VCMPGTSD, + I_VCMPTRUE_UQSD, + I_VCMPTRUESD, + I_VCMPLT_OQSD, + I_VCMPLE_OQSD, + I_VCMPUNORD_SSD, + I_VCMPNEQ_USSD, + I_VCMPNLT_UQSD, + I_VCMPNLE_UQSD, + I_VCMPORD_SSD, + I_VCMPEQ_USSD, + I_VCMPNGE_UQSD, + I_VCMPNGT_UQSD, + I_VCMPFALSE_OSSD, + I_VCMPNEQ_OSSD, + I_VCMPGE_OQSD, + I_VCMPGT_OQSD, + I_VCMPTRUE_USSD, + I_VCMPSD, + I_VCMPEQ_OSSS, + I_VCMPEQSS, + I_VCMPLT_OSSS, + I_VCMPLTSS, + I_VCMPLE_OSSS, + I_VCMPLESS, + I_VCMPUNORD_QSS, + I_VCMPUNORDSS, + I_VCMPNEQ_UQSS, + I_VCMPNEQSS, + I_VCMPNLT_USSS, + I_VCMPNLTSS, + I_VCMPNLE_USSS, + I_VCMPNLESS, + I_VCMPORD_QSS, + I_VCMPORDSS, + I_VCMPEQ_UQSS, + I_VCMPNGE_USSS, + I_VCMPNGESS, + I_VCMPNGT_USSS, + I_VCMPNGTSS, + I_VCMPFALSE_OQSS, + I_VCMPFALSESS, + I_VCMPNEQ_OQSS, + I_VCMPGE_OSSS, + I_VCMPGESS, + I_VCMPGT_OSSS, + I_VCMPGTSS, + I_VCMPTRUE_UQSS, + I_VCMPTRUESS, + I_VCMPLT_OQSS, + I_VCMPLE_OQSS, + I_VCMPUNORD_SSS, + I_VCMPNEQ_USSS, + I_VCMPNLT_UQSS, + I_VCMPNLE_UQSS, + I_VCMPORD_SSS, + I_VCMPEQ_USSS, + I_VCMPNGE_UQSS, + I_VCMPNGT_UQSS, + I_VCMPFALSE_OSSS, + I_VCMPNEQ_OSSS, + I_VCMPGE_OQSS, + I_VCMPGT_OQSS, + I_VCMPTRUE_USSS, + I_VCMPSS, + I_VCOMISD, + I_VCOMISS, + I_VCVTDQ2PD, + I_VCVTDQ2PS, + I_VCVTPD2DQ, + I_VCVTPD2PS, + I_VCVTPS2DQ, + I_VCVTPS2PD, + I_VCVTSD2SI, + I_VCVTSD2SS, + I_VCVTSI2SD, + I_VCVTSI2SS, + I_VCVTSS2SD, + I_VCVTSS2SI, + I_VCVTTPD2DQ, + I_VCVTTPS2DQ, + I_VCVTTSD2SI, + I_VCVTTSS2SI, + I_VDIVPD, + I_VDIVPS, + I_VDIVSD, + I_VDIVSS, + I_VDPPD, + I_VDPPS, + I_VEXTRACTF128, + I_VEXTRACTPS, + I_VHADDPD, + I_VHADDPS, + I_VHSUBPD, + I_VHSUBPS, + I_VINSERTF128, + I_VINSERTPS, + I_VLDDQU, + I_VLDQQU, + I_VLDMXCSR, + I_VMASKMOVDQU, + I_VMASKMOVPS, + I_VMASKMOVPD, + I_VMAXPD, + I_VMAXPS, + I_VMAXSD, + I_VMAXSS, + I_VMINPD, + I_VMINPS, + I_VMINSD, + I_VMINSS, + I_VMOVAPD, + I_VMOVAPS, + I_VMOVD, + I_VMOVQ, + I_VMOVDDUP, + I_VMOVDQA, + I_VMOVQQA, + I_VMOVDQU, + I_VMOVQQU, + I_VMOVHLPS, + I_VMOVHPD, + I_VMOVHPS, + I_VMOVLHPS, + I_VMOVLPD, + I_VMOVLPS, + I_VMOVMSKPD, + I_VMOVMSKPS, + I_VMOVNTDQ, + I_VMOVNTQQ, + I_VMOVNTDQA, + I_VMOVNTPD, + I_VMOVNTPS, + I_VMOVSD, + I_VMOVSHDUP, + I_VMOVSLDUP, + I_VMOVSS, + I_VMOVUPD, + I_VMOVUPS, + I_VMPSADBW, + I_VMULPD, + I_VMULPS, + I_VMULSD, + I_VMULSS, + I_VORPD, + I_VORPS, + I_VPABSB, + I_VPABSW, + I_VPABSD, + I_VPACKSSWB, + I_VPACKSSDW, + I_VPACKUSWB, + I_VPACKUSDW, + I_VPADDB, + I_VPADDW, + I_VPADDD, + I_VPADDQ, + I_VPADDSB, + I_VPADDSW, + I_VPADDUSB, + I_VPADDUSW, + I_VPALIGNR, + I_VPAND, + I_VPANDN, + I_VPAVGB, + I_VPAVGW, + I_VPBLENDVB, + I_VPBLENDW, + I_VPCMPESTRI, + I_VPCMPESTRM, + I_VPCMPISTRI, + I_VPCMPISTRM, + I_VPCMPEQB, + I_VPCMPEQW, + I_VPCMPEQD, + I_VPCMPEQQ, + I_VPCMPGTB, + I_VPCMPGTW, + I_VPCMPGTD, + I_VPCMPGTQ, + I_VPERMILPD, + I_VPERMILPS, + I_VPERM2F128, + I_VPEXTRB, + I_VPEXTRW, + I_VPEXTRD, + I_VPEXTRQ, + I_VPHADDW, + I_VPHADDD, + I_VPHADDSW, + I_VPHMINPOSUW, + I_VPHSUBW, + I_VPHSUBD, + I_VPHSUBSW, + I_VPINSRB, + I_VPINSRW, + I_VPINSRD, + I_VPINSRQ, + I_VPMADDWD, + I_VPMADDUBSW, + I_VPMAXSB, + I_VPMAXSW, + I_VPMAXSD, + I_VPMAXUB, + I_VPMAXUW, + I_VPMAXUD, + I_VPMINSB, + I_VPMINSW, + I_VPMINSD, + I_VPMINUB, + I_VPMINUW, + I_VPMINUD, + I_VPMOVMSKB, + I_VPMOVSXBW, + I_VPMOVSXBD, + I_VPMOVSXBQ, + I_VPMOVSXWD, + I_VPMOVSXWQ, + I_VPMOVSXDQ, + I_VPMOVZXBW, + I_VPMOVZXBD, + I_VPMOVZXBQ, + I_VPMOVZXWD, + I_VPMOVZXWQ, + I_VPMOVZXDQ, + I_VPMULHUW, + I_VPMULHRSW, + I_VPMULHW, + I_VPMULLW, + I_VPMULLD, + I_VPMULUDQ, + I_VPMULDQ, + I_VPOR, + I_VPSADBW, + I_VPSHUFB, + I_VPSHUFD, + I_VPSHUFHW, + I_VPSHUFLW, + I_VPSIGNB, + I_VPSIGNW, + I_VPSIGND, + I_VPSLLDQ, + I_VPSRLDQ, + I_VPSLLW, + I_VPSLLD, + I_VPSLLQ, + I_VPSRAW, + I_VPSRAD, + I_VPSRLW, + I_VPSRLD, + I_VPSRLQ, + I_VPTEST, + I_VPSUBB, + I_VPSUBW, + I_VPSUBD, + I_VPSUBQ, + I_VPSUBSB, + I_VPSUBSW, + I_VPSUBUSB, + I_VPSUBUSW, + I_VPUNPCKHBW, + I_VPUNPCKHWD, + I_VPUNPCKHDQ, + I_VPUNPCKHQDQ, + I_VPUNPCKLBW, + I_VPUNPCKLWD, + I_VPUNPCKLDQ, + I_VPUNPCKLQDQ, + I_VPXOR, + I_VRCPPS, + I_VRCPSS, + I_VRSQRTPS, + I_VRSQRTSS, + I_VROUNDPD, + I_VROUNDPS, + I_VROUNDSD, + I_VROUNDSS, + I_VSHUFPD, + I_VSHUFPS, + I_VSQRTPD, + I_VSQRTPS, + I_VSQRTSD, + I_VSQRTSS, + I_VSTMXCSR, + I_VSUBPD, + I_VSUBPS, + I_VSUBSD, + I_VSUBSS, + I_VTESTPS, + I_VTESTPD, + I_VUCOMISD, + I_VUCOMISS, + I_VUNPCKHPD, + I_VUNPCKHPS, + I_VUNPCKLPD, + I_VUNPCKLPS, + I_VXORPD, + I_VXORPS, + I_VZEROALL, + I_VZEROUPPER, + I_PCLMULLQLQDQ, + I_PCLMULHQLQDQ, + I_PCLMULLQHQDQ, + I_PCLMULHQHQDQ, + I_PCLMULQDQ, + I_VPCLMULLQLQDQ, + I_VPCLMULHQLQDQ, + I_VPCLMULLQHQDQ, + I_VPCLMULHQHQDQ, + I_VPCLMULQDQ, + I_VFMADD132PS, + I_VFMADD132PD, + I_VFMADD312PS, + I_VFMADD312PD, + I_VFMADD213PS, + I_VFMADD213PD, + I_VFMADD123PS, + I_VFMADD123PD, + I_VFMADD231PS, + I_VFMADD231PD, + I_VFMADD321PS, + I_VFMADD321PD, + I_VFMADDSUB132PS, + I_VFMADDSUB132PD, + I_VFMADDSUB312PS, + I_VFMADDSUB312PD, + I_VFMADDSUB213PS, + I_VFMADDSUB213PD, + I_VFMADDSUB123PS, + I_VFMADDSUB123PD, + I_VFMADDSUB231PS, + I_VFMADDSUB231PD, + I_VFMADDSUB321PS, + I_VFMADDSUB321PD, + I_VFMSUB132PS, + I_VFMSUB132PD, + I_VFMSUB312PS, + I_VFMSUB312PD, + I_VFMSUB213PS, + I_VFMSUB213PD, + I_VFMSUB123PS, + I_VFMSUB123PD, + I_VFMSUB231PS, + I_VFMSUB231PD, + I_VFMSUB321PS, + I_VFMSUB321PD, + I_VFMSUBADD132PS, + I_VFMSUBADD132PD, + I_VFMSUBADD312PS, + I_VFMSUBADD312PD, + I_VFMSUBADD213PS, + I_VFMSUBADD213PD, + I_VFMSUBADD123PS, + I_VFMSUBADD123PD, + I_VFMSUBADD231PS, + I_VFMSUBADD231PD, + I_VFMSUBADD321PS, + I_VFMSUBADD321PD, + I_VFNMADD132PS, + I_VFNMADD132PD, + I_VFNMADD312PS, + I_VFNMADD312PD, + I_VFNMADD213PS, + I_VFNMADD213PD, + I_VFNMADD123PS, + I_VFNMADD123PD, + I_VFNMADD231PS, + I_VFNMADD231PD, + I_VFNMADD321PS, + I_VFNMADD321PD, + I_VFNMSUB132PS, + I_VFNMSUB132PD, + I_VFNMSUB312PS, + I_VFNMSUB312PD, + I_VFNMSUB213PS, + I_VFNMSUB213PD, + I_VFNMSUB123PS, + I_VFNMSUB123PD, + I_VFNMSUB231PS, + I_VFNMSUB231PD, + I_VFNMSUB321PS, + I_VFNMSUB321PD, + I_VFMADD132SS, + I_VFMADD132SD, + I_VFMADD312SS, + I_VFMADD312SD, + I_VFMADD213SS, + I_VFMADD213SD, + I_VFMADD123SS, + I_VFMADD123SD, + I_VFMADD231SS, + I_VFMADD231SD, + I_VFMADD321SS, + I_VFMADD321SD, + I_VFMSUB132SS, + I_VFMSUB132SD, + I_VFMSUB312SS, + I_VFMSUB312SD, + I_VFMSUB213SS, + I_VFMSUB213SD, + I_VFMSUB123SS, + I_VFMSUB123SD, + I_VFMSUB231SS, + I_VFMSUB231SD, + I_VFMSUB321SS, + I_VFMSUB321SD, + I_VFNMADD132SS, + I_VFNMADD132SD, + I_VFNMADD312SS, + I_VFNMADD312SD, + I_VFNMADD213SS, + I_VFNMADD213SD, + I_VFNMADD123SS, + I_VFNMADD123SD, + I_VFNMADD231SS, + I_VFNMADD231SD, + I_VFNMADD321SS, + I_VFNMADD321SD, + I_VFNMSUB132SS, + I_VFNMSUB132SD, + I_VFNMSUB312SS, + I_VFNMSUB312SD, + I_VFNMSUB213SS, + I_VFNMSUB213SD, + I_VFNMSUB123SS, + I_VFNMSUB123SD, + I_VFNMSUB231SS, + I_VFNMSUB231SD, + I_VFNMSUB321SS, + I_VFNMSUB321SD, + I_VCVTPH2PS, + I_VCVTPS2PH, + I_XSTORE, + I_XCRYPTECB, + I_XCRYPTCBC, + I_XCRYPTCTR, + I_XCRYPTCFB, + I_XCRYPTOFB, + I_MONTMUL, + I_XSHA1, + I_XSHA256, + I_LLWPCB, + I_SLWPCB, + I_LWPVAL, + I_LWPINS, + I_VFMADDPD, + I_VFMADDPS, + I_VFMADDSD, + I_VFMADDSS, + I_VFMADDSUBPD, + I_VFMADDSUBPS, + I_VFMSUBADDPD, + I_VFMSUBADDPS, + I_VFMSUBPD, + I_VFMSUBPS, + I_VFMSUBSD, + I_VFMSUBSS, + I_VFNMADDPD, + I_VFNMADDPS, + I_VFNMADDSD, + I_VFNMADDSS, + I_VFNMSUBPD, + I_VFNMSUBPS, + I_VFNMSUBSD, + I_VFNMSUBSS, + I_VFRCZPD, + I_VFRCZPS, + I_VFRCZSD, + I_VFRCZSS, + I_VPCMOV, + I_VPCOMB, + I_VPCOMD, + I_VPCOMQ, + I_VPCOMUB, + I_VPCOMUD, + I_VPCOMUQ, + I_VPCOMUW, + I_VPCOMW, + I_VPHADDBD, + I_VPHADDBQ, + I_VPHADDBW, + I_VPHADDDQ, + I_VPHADDUBD, + I_VPHADDUBQ, + I_VPHADDUBW, + I_VPHADDUDQ, + I_VPHADDUWD, + I_VPHADDUWQ, + I_VPHADDWD, + I_VPHADDWQ, + I_VPHSUBBW, + I_VPHSUBDQ, + I_VPHSUBWD, + I_VPMACSDD, + I_VPMACSDQH, + I_VPMACSDQL, + I_VPMACSSDD, + I_VPMACSSDQH, + I_VPMACSSDQL, + I_VPMACSSWD, + I_VPMACSSWW, + I_VPMACSWD, + I_VPMACSWW, + I_VPMADCSSWD, + I_VPMADCSWD, + I_VPPERM, + I_VPROTB, + I_VPROTD, + I_VPROTQ, + I_VPROTW, + I_VPSHAB, + I_VPSHAD, + I_VPSHAQ, + I_VPSHAW, + I_VPSHLB, + I_VPSHLD, + I_VPSHLQ, + I_VPSHLW, + I_VBROADCASTI128, + I_VPBLENDD, + I_VPBROADCASTB, + I_VPBROADCASTW, + I_VPBROADCASTD, + I_VPBROADCASTQ, + I_VPERMD, + I_VPERMPD, + I_VPERMPS, + I_VPERMQ, + I_VPERM2I128, + I_VEXTRACTI128, + I_VINSERTI128, + I_VPMASKMOVD, + I_VPMASKMOVQ, + I_VPSLLVD, + I_VPSLLVQ, + I_VPSRAVD, + I_VPSRLVD, + I_VPSRLVQ, + I_VGATHERDPD, + I_VGATHERQPD, + I_VGATHERDPS, + I_VGATHERQPS, + I_VPGATHERDD, + I_VPGATHERQD, + I_VPGATHERDQ, + I_VPGATHERQQ, + I_XABORT, + I_XBEGIN, + I_XEND, + I_XTEST, + I_PREFETCHWT1, + I_BNDMK, + I_BNDCL, + I_BNDCU, + I_BNDCN, + I_BNDMOV, + I_BNDLDX, + I_BNDSTX, + I_SHA1MSG1, + I_SHA1MSG2, + I_SHA1NEXTE, + I_SHA1RNDS4, + I_SHA256MSG1, + I_SHA256MSG2, + I_SHA256RNDS2, + I_VSHA512MSG1, + I_VSHA512MSG2, + I_VSHA512RNDS2, + I_VSM3MSG1, + I_VSM3MSG2, + I_VSM3RNDS2, + I_VSM4KEY4, + I_VSM4RNDS4, + I_VBCSTNEBF16PS, + I_VBCSTNEBF162PS, + I_VBCSTNESH2PS, + I_VCVTNEEBF162PS, + I_VCVTNEEPH2PS, + I_VCVTNEOBF162PS, + I_VCVTNEOPH2PS, + I_VCVTNEPS2BF16, + I_VPDPBUSD, + I_VPDPBUSDS, + I_VPDPWSSD, + I_VPDPWSSDS, + I_VPDPBSSD, + I_VPDPBSSDS, + I_VPDPBSUD, + I_VPDPBSUDS, + I_VPDPBUUD, + I_VPDPBUUDS, + I_VPDPWSUD, + I_VPDPWSUDS, + I_VPDPWUSD, + I_VPDPWUSDS, + I_VPDPWUUD, + I_VPDPWUUDS, + I_VPMADD52HUQ, + I_VPMADD52LUQ, + I_KMOVB, + I_KMOVW, + I_KMOVD, + I_KMOVQ, + I_KMOV, + I_MOVB, + I_MOVW, + I_KADDB, + I_KADDW, + I_KADDD, + I_KADDQ, + I_KADD, + I_ADDB, + I_ADDW, + I_ADDD, + I_ADDQ, + I_KANDB, + I_KANDW, + I_KANDD, + I_KANDQ, + I_KAND, + I_ANDB, + I_ANDW, + I_ANDD, + I_ANDQ, + I_KANDNB, + I_KANDNW, + I_KANDND, + I_KANDNQ, + I_KANDN, + I_ANDNB, + I_ANDNW, + I_ANDND, + I_ANDNQ, + I_KNOTB, + I_KNOTW, + I_KNOTD, + I_KNOTQ, + I_KNOT, + I_NOTB, + I_NOTW, + I_NOTD, + I_NOTQ, + I_KORB, + I_KORW, + I_KORD, + I_KORQ, + I_KOR, + I_ORB, + I_ORW, + I_ORD, + I_ORQ, + I_KORTESTB, + I_KORTESTW, + I_KORTESTD, + I_KORTESTQ, + I_KORTEST, + I_ORTESTB, + I_ORTESTW, + I_ORTESTD, + I_ORTESTQ, + I_ORTEST, + I_KSHIFTLB, + I_KSHIFTLW, + I_KSHIFTLD, + I_KSHIFTLQ, + I_KSHIFTL, + I_SHIFTLB, + I_SHIFTLW, + I_SHIFTLD, + I_SHIFTLQ, + I_SHIFTL, + I_KSHLB, + I_KSHLW, + I_KSHLD, + I_KSHLQ, + I_KSHL, + I_SHLB, + I_SHLW, + I_SHLQ, + I_KSHIFTRB, + I_KSHIFTRW, + I_KSHIFTRD, + I_KSHIFTRQ, + I_KSHIFTR, + I_SHIFTRB, + I_SHIFTRW, + I_SHIFTRD, + I_SHIFTRQ, + I_SHIFTR, + I_KSHRB, + I_KSHRW, + I_KSHRD, + I_KSHRQ, + I_KSHR, + I_SHRB, + I_SHRW, + I_SHRQ, + I_KTESTB, + I_KTESTW, + I_KTESTD, + I_KTESTQ, + I_KTEST, + I_TESTB, + I_TESTW, + I_TESTD, + I_TESTQ, + I_KUNPCKBW, + I_KUNPCKW, + I_KUNPCK, + I_UNPCKBW, + I_UNPCKW, + I_UNPCK, + I_KUNPCKWD, + I_KUNPCKD, + I_UNPCKWD, + I_UNPCKD, + I_KUNPCKDQ, + I_KUNPCKQ, + I_UNPCKDQ, + I_UNPCKQ, + I_KXNORB, + I_KXNORW, + I_KXNORD, + I_KXNORQ, + I_KXNOR, + I_XNORB, + I_XNORW, + I_XNORD, + I_XNORQ, + I_XNOR, + I_KXORB, + I_KXORW, + I_KXORD, + I_KXORQ, + I_KXOR, + I_XORB, + I_XORW, + I_XORD, + I_XORQ, + I_VALIGND, + I_VALIGNQ, + I_VBLENDMPD, + I_VBLENDMPS, + I_VBROADCASTF32X2, + I_VBROADCASTF32X4, + I_VBROADCASTF32X8, + I_VBROADCASTF64X2, + I_VBROADCASTF64X4, + I_VBROADCASTI32X2, + I_VBROADCASTI32X4, + I_VBROADCASTI32X8, + I_VBROADCASTI64X2, + I_VBROADCASTI64X4, + I_VCMPEQ_OQPD, + I_VCMPEQ_OQPS, + I_VCMPEQ_OQSD, + I_VCMPEQ_OQSS, + I_VCOMPRESSPD, + I_VCOMPRESSPS, + I_VCVTPD2QQ, + I_VCVTPD2UDQ, + I_VCVTPD2UQQ, + I_VCVTPS2QQ, + I_VCVTPS2UDQ, + I_VCVTPS2UQQ, + I_VCVTQQ2PD, + I_VCVTQQ2PS, + I_VCVTSD2USI, + I_VCVTSS2USI, + I_VCVTTPD2QQ, + I_VCVTTPD2UDQ, + I_VCVTTPD2UQQ, + I_VCVTTPS2QQ, + I_VCVTTPS2UDQ, + I_VCVTTPS2UQQ, + I_VCVTTSD2USI, + I_VCVTTSS2USI, + I_VCVTUDQ2PD, + I_VCVTUDQ2PS, + I_VCVTUQQ2PD, + I_VCVTUQQ2PS, + I_VCVTUSI2SD, + I_VCVTUSI2SS, + I_VDBPSADBW, + I_VEXP2PD, + I_VEXP2PS, + I_VEXPANDPD, + I_VEXPANDPS, + I_VEXTRACTF32X4, + I_VEXTRACTF32X8, + I_VEXTRACTF64X2, + I_VEXTRACTF64X4, + I_VEXTRACTI32X4, + I_VEXTRACTI32X8, + I_VEXTRACTI64X2, + I_VEXTRACTI64X4, + I_VFIXUPIMMPD, + I_VFIXUPIMMPS, + I_VFIXUPIMMSD, + I_VFIXUPIMMSS, + I_VFPCLASSPD, + I_VFPCLASSPS, + I_VFPCLASSSD, + I_VFPCLASSSS, + I_VGATHERPF0DPD, + I_VGATHERPF0DPS, + I_VGATHERPF0QPD, + I_VGATHERPF0QPS, + I_VGATHERPF1DPD, + I_VGATHERPF1DPS, + I_VGATHERPF1QPD, + I_VGATHERPF1QPS, + I_VGETEXPPD, + I_VGETEXPPS, + I_VGETEXPSD, + I_VGETEXPSS, + I_VGETMANTPD, + I_VGETMANTPS, + I_VGETMANTSD, + I_VGETMANTSS, + I_VINSERTF32X4, + I_VINSERTF32X8, + I_VINSERTF64X2, + I_VINSERTF64X4, + I_VINSERTI32X4, + I_VINSERTI32X8, + I_VINSERTI64X2, + I_VINSERTI64X4, + I_VMOVDQA32, + I_VMOVDQA64, + I_VMOVDQU16, + I_VMOVDQU32, + I_VMOVDQU64, + I_VMOVDQU8, + I_VPABSQ, + I_VPANDD, + I_VPANDND, + I_VPANDNQ, + I_VPANDQ, + I_VPBLENDMB, + I_VPBLENDMD, + I_VPBLENDMQ, + I_VPBLENDMW, + I_VPBROADCASTMB2Q, + I_VPBROADCASTMW2D, + I_VPCMPEQUB, + I_VPCMPEQUD, + I_VPCMPEQUQ, + I_VPCMPEQUW, + I_VPCMPGEB, + I_VPCMPGED, + I_VPCMPGEQ, + I_VPCMPGEUB, + I_VPCMPGEUD, + I_VPCMPGEUQ, + I_VPCMPGEUW, + I_VPCMPGEW, + I_VPCMPGTUB, + I_VPCMPGTUD, + I_VPCMPGTUQ, + I_VPCMPGTUW, + I_VPCMPLEB, + I_VPCMPLED, + I_VPCMPLEQ, + I_VPCMPLEUB, + I_VPCMPLEUD, + I_VPCMPLEUQ, + I_VPCMPLEUW, + I_VPCMPLEW, + I_VPCMPLTB, + I_VPCMPLTD, + I_VPCMPLTQ, + I_VPCMPLTUB, + I_VPCMPLTUD, + I_VPCMPLTUQ, + I_VPCMPLTUW, + I_VPCMPLTW, + I_VPCMPNEQB, + I_VPCMPNEQD, + I_VPCMPNEQQ, + I_VPCMPNEQUB, + I_VPCMPNEQUD, + I_VPCMPNEQUQ, + I_VPCMPNEQUW, + I_VPCMPNEQW, + I_VPCMPNGTB, + I_VPCMPNGTD, + I_VPCMPNGTQ, + I_VPCMPNGTUB, + I_VPCMPNGTUD, + I_VPCMPNGTUQ, + I_VPCMPNGTUW, + I_VPCMPNGTW, + I_VPCMPNLEB, + I_VPCMPNLED, + I_VPCMPNLEQ, + I_VPCMPNLEUB, + I_VPCMPNLEUD, + I_VPCMPNLEUQ, + I_VPCMPNLEUW, + I_VPCMPNLEW, + I_VPCMPNLTB, + I_VPCMPNLTD, + I_VPCMPNLTQ, + I_VPCMPNLTUB, + I_VPCMPNLTUD, + I_VPCMPNLTUQ, + I_VPCMPNLTUW, + I_VPCMPNLTW, + I_VPCMPB, + I_VPCMPD, + I_VPCMPQ, + I_VPCMPUB, + I_VPCMPUD, + I_VPCMPUQ, + I_VPCMPUW, + I_VPCMPW, + I_VPCOMPRESSD, + I_VPCOMPRESSQ, + I_VPCONFLICTD, + I_VPCONFLICTQ, + I_VPERMB, + I_VPERMI2B, + I_VPERMI2D, + I_VPERMI2PD, + I_VPERMI2PS, + I_VPERMI2Q, + I_VPERMI2W, + I_VPERMT2B, + I_VPERMT2D, + I_VPERMT2PD, + I_VPERMT2PS, + I_VPERMT2Q, + I_VPERMT2W, + I_VPERMW, + I_VPEXPANDD, + I_VPEXPANDQ, + I_VPLZCNTD, + I_VPLZCNTQ, + I_VPMAXSQ, + I_VPMAXUQ, + I_VPMINSQ, + I_VPMINUQ, + I_VPMOVB2M, + I_VPMOVD2M, + I_VPMOVDB, + I_VPMOVDW, + I_VPMOVM2B, + I_VPMOVM2D, + I_VPMOVM2Q, + I_VPMOVM2W, + I_VPMOVQ2M, + I_VPMOVQB, + I_VPMOVQD, + I_VPMOVQW, + I_VPMOVSDB, + I_VPMOVSDW, + I_VPMOVSQB, + I_VPMOVSQD, + I_VPMOVSQW, + I_VPMOVSWB, + I_VPMOVUSDB, + I_VPMOVUSDW, + I_VPMOVUSQB, + I_VPMOVUSQD, + I_VPMOVUSQW, + I_VPMOVUSWB, + I_VPMOVW2M, + I_VPMOVWB, + I_VPMULLQ, + I_VPMULTISHIFTQB, + I_VPORD, + I_VPORQ, + I_VPROLD, + I_VPROLQ, + I_VPROLVD, + I_VPROLVQ, + I_VPRORD, + I_VPRORQ, + I_VPRORVD, + I_VPRORVQ, + I_VPSCATTERDD, + I_VPSCATTERDQ, + I_VPSCATTERQD, + I_VPSCATTERQQ, + I_VPSLLVW, + I_VPSRAQ, + I_VPSRAVQ, + I_VPSRAVW, + I_VPSRLVW, + I_VPTERNLOGD, + I_VPTERNLOGQ, + I_VPTESTMB, + I_VPTESTMD, + I_VPTESTMQ, + I_VPTESTMW, + I_VPTESTNMB, + I_VPTESTNMD, + I_VPTESTNMQ, + I_VPTESTNMW, + I_VPXORD, + I_VPXORQ, + I_VRANGEPD, + I_VRANGEPS, + I_VRANGESD, + I_VRANGESS, + I_VRCP14PD, + I_VRCP14PS, + I_VRCP14SD, + I_VRCP14SS, + I_VRCP28PD, + I_VRCP28PS, + I_VRCP28SD, + I_VRCP28SS, + I_VREDUCEPD, + I_VREDUCEPS, + I_VREDUCESD, + I_VREDUCESS, + I_VRNDSCALEPD, + I_VRNDSCALEPH, + I_VRNDSCALEPS, + I_VRNDSCALESD, + I_VRNDSCALESH, + I_VRNDSCALESS, + I_VRSQRT14PD, + I_VRSQRT14PS, + I_VRSQRT14SD, + I_VRSQRT14SS, + I_VRSQRT28PD, + I_VRSQRT28PS, + I_VRSQRT28SD, + I_VRSQRT28SS, + I_VSCALEFPD, + I_VSCALEFPS, + I_VSCALEFSD, + I_VSCALEFSS, + I_VSCATTERDPD, + I_VSCATTERDPS, + I_VSCATTERPF0DPD, + I_VSCATTERPF0DPS, + I_VSCATTERPF0QPD, + I_VSCATTERPF0QPS, + I_VSCATTERPF1DPD, + I_VSCATTERPF1DPS, + I_VSCATTERPF1QPD, + I_VSCATTERPF1QPS, + I_VSCATTERQPD, + I_VSCATTERQPS, + I_VSHUFF32X4, + I_VSHUFF64X2, + I_VSHUFI32X4, + I_VSHUFI64X2, + I_RDPKRU, + I_WRPKRU, + I_PTWRITE, + I_CLDEMOTE, + I_MOVDIRI, + I_MOVDIR64B, + I_PCONFIG, + I_PBNDKB, + I_PREFETCHRST2, + I_GF2P8AFFINEINVQB, + I_VGF2P8AFFINEINVQB, + I_GF2P8AFFINEQB, + I_VGF2P8AFFINEQB, + I_GF2P8MULB, + I_VGF2P8MULB, + I_VPCOMPRESSB, + I_VPCOMPRESSW, + I_VPEXPANDB, + I_VPEXPANDW, + I_VPSHLDW, + I_VPSHLDD, + I_VPSHLDQ, + I_VPSHLDVW, + I_VPSHLDVD, + I_VPSHLDVQ, + I_VPSHRDW, + I_VPSHRDD, + I_VPSHRDQ, + I_VPSHRDVW, + I_VPSHRDVD, + I_VPSHRDVQ, + I_VPOPCNTB, + I_VPOPCNTW, + I_VPOPCNTD, + I_VPOPCNTQ, + I_VPSHUFBITQMB, + I_V4FMADDPS, + I_V4FNMADDPS, + I_V4FMADDSS, + I_V4FNMADDSS, + I_VP4DPWSSDS, + I_VP4DPWSSD, + I_ENCLS, + I_ENCLU, + I_ENCLV, + I_CLRSSBSY, + I_ENDBR32, + I_ENDBR64, + I_INCSSPD, + I_INCSSPQ, + I_RDSSPD, + I_RDSSPQ, + I_RSTORSSP, + I_SAVEPREVSSP, + I_SETSSBSY, + I_WRUSSD, + I_WRUSSQ, + I_WRSSD, + I_WRSSQ, + I_ENQCMD, + I_ENQCMDS, + I_XRESLDTRK, + I_XSUSLDTRK, + I_VCVTNE2PS2BF16, + I_VDPBF16PS, + I_VP2INTERSECTD, + I_VP2INTERSECTQ, + I_LDTILECFG, + I_STTILECFG, + I_TDPBF16PS, + I_TDPFP16PS, + I_TCMMIMFP16PS, + I_TCMMRLFP16PS, + I_TDPBSSD, + I_TDPBSUD, + I_TDPBUSD, + I_TDPBUUD, + I_TILELOADD, + I_TILELOADDT1, + I_TILERELEASE, + I_TILESTORED, + I_TILEZERO, + I_TILELOADDRS, + I_TILELOADDRST1, + I_T2RPNTLVWZ0, + I_T2RPNTLVWZ0T1, + I_T2RPNTLVWZ1, + I_T2RPNTLVWZ1T1, + I_T2RPNTLVWZ0RS, + I_T2RPNTLVWZ0RST1, + I_T2RPNTLVWZ1RS, + I_T2RPNTLVWZ1RST1, + I_TCONJTCMMIMFP16PS, + I_TCONJTFP16, + I_TCVTROWD2PS, + I_TCVTROWPS2BF16H, + I_TCVTROWPS2BF16L, + I_TCVTROWPS2PHH, + I_TCVTROWPS2PHL, + I_TDPBF8PS, + I_TDPBHF8PS, + I_TDPHBF8PS, + I_TDPHF8PS, + I_TILEMOVROW, + I_TMMULTF32PS, + I_TTCMMIMFP16PS, + I_TTCMMRLFP16PS, + I_TTDPBF16PS, + I_TTDPFP16PS, + I_TTMMULTF32PS, + I_TTRANSPOSED, + I_VADDPH, + I_VADDSH, + I_VCMPPH, + I_VCMPSH, + I_VCOMISH, + I_VCVTDQ2PH, + I_VCVTPD2PH, + I_VCVTPH2DQ, + I_VCVTPH2PD, + I_VCVTPH2PSX, + I_VCVTPH2QQ, + I_VCVTPH2UDQ, + I_VCVTPH2UQQ, + I_VCVTPH2UW, + I_VCVTPH2W, + I_VCVTPS2PHX, + I_VCVTQQ2PH, + I_VCVTSD2SH, + I_VCVTSH2SD, + I_VCVTSH2SI, + I_VCVTSH2SS, + I_VCVTSH2USI, + I_VCVTSI2SH, + I_VCVTSS2SH, + I_VCVTTPH2DQ, + I_VCVTTPH2QQ, + I_VCVTTPH2UDQ, + I_VCVTTPH2UQQ, + I_VCVTTPH2UW, + I_VCVTTPH2W, + I_VCVTTSH2SI, + I_VCVTTSH2USI, + I_VCVTUDQ2PH, + I_VCVTUQQ2PH, + I_VCVTUSI2SH, + I_VCVTUW2PH, + I_VCVTW2PH, + I_VDIVPH, + I_VDIVSH, + I_VFCMADDCPH, + I_VFMADDCPH, + I_VFCMADDCSH, + I_VFMADDCSH, + I_VFCMULCPH, + I_VFMULCPH, + I_VFCMULCSH, + I_VFMULCSH, + I_VFMADDSUB132PH, + I_VFMADDSUB213PH, + I_VFMADDSUB231PH, + I_VFMSUBADD132PH, + I_VFMSUBADD213PH, + I_VFMSUBADD231PH, + I_VFMADD132PH, + I_VFMADD213PH, + I_VFMADD231PH, + I_VFNMADD132PH, + I_VFNMADD213PH, + I_VFNMADD231PH, + I_VFMADD132SH, + I_VFMADD213SH, + I_VFMADD231SH, + I_VFNMADD132SH, + I_VFNMADD213SH, + I_VFNMADD231SH, + I_VFMSUB132PH, + I_VFMSUB213PH, + I_VFMSUB231PH, + I_VFNMSUB132PH, + I_VFNMSUB213PH, + I_VFNMSUB231PH, + I_VFMSUB132SH, + I_VFMSUB213SH, + I_VFMSUB231SH, + I_VFNMSUB132SH, + I_VFNMSUB213SH, + I_VFNMSUB231SH, + I_VFPCLASSPH, + I_VFPCLASSSH, + I_VGETEXPPH, + I_VGETEXPSH, + I_VGETMANTPH, + I_VGETMANTSH, + I_VMAXPH, + I_VMAXSH, + I_VMINPH, + I_VMINSH, + I_VMOVSH, + I_VMOVW, + I_VMULPH, + I_VMULSH, + I_VRCPPH, + I_VRCPSH, + I_VREDUCEPH, + I_VREDUCESH, + I_VENDSCALEPH, + I_VENDSCALESH, + I_VRSQRTPH, + I_VRSQRTSH, + I_VSCALEFPH, + I_VSCALEFSH, + I_VSQRTPH, + I_VSQRTSH, + I_VSUBPH, + I_VSUBSH, + I_VUCOMISH, + I_AADD, + I_AAND, + I_AOR, + I_AXOR, + I_CLUI, + I_SENDUIPI, + I_STUI, + I_TESTUI, + I_UIRET, + I_HRESET, + I_VADDBF16, + I_VCMPBF16, + I_VCOMISBF16, + I_VDIVBF16, + I_VFMADD132BF16, + I_VFMADD213BF16, + I_VFMADD231BF16, + I_VFMSUB132BF16, + I_VFMSUB213BF16, + I_VFMSUB231BF16, + I_VFNMADD132BF16, + I_VFNMADD213BF16, + I_VFNMADD231BF16, + I_VFNMSUB132BF16, + I_VFNMSUB213BF16, + I_VFNMSUB231BF16, + I_VFPCLASSBF16, + I_VGETEXPBF16, + I_VGETMANTBF16, + I_VMAXBF16, + I_VMINBF16, + I_VMULBF16, + I_VRCPBF16, + I_VREDUCEBF16, + I_VRNDSCALEBF16, + I_VRSQRTBF16, + I_VSCALEFBF16, + I_VSQRTBF16, + I_VSUBBF16, + I_VCOMXSD, + I_VCOMXSH, + I_VCOMXSS, + I_VUCOMXSD, + I_VUCOMXSH, + I_VUCOMXSS, + I_VCVT2PH2BF8, + I_VCVT2PH2BF8S, + I_VCVT2PH2HF8, + I_VCVT2PH2HF8S, + I_VCVTPH2BF8, + I_VCVTPH2BF8S, + I_VCVTPH2HF8, + I_VCVTPH2HF8S, + I_VCVT2PS2PHX, + I_VCVTBIASPH2BF8, + I_VCVTBIASPH2BF8S, + I_VCVTBIASPH2HF8, + I_VCVTBIASPH2HF8S, + I_VCVTHF82PH, + I_VDPPHPS, + I_VMINMAXBF16, + I_VMINMAXPD, + I_VMINMAXPH, + I_VMINMAXPS, + I_VMINMAXSD, + I_VMINMAXSH, + I_VMINMAXSS, + I_VCVTBF162IBS, + I_VCVTBF162IUBS, + I_VCVTTBF162IBS, + I_VCVTTBF162IUBS, + I_VCVTTPD2DQS, + I_VCVTTPD2QQS, + I_VCVTTPD2UDQS, + I_VCVTTPD2UQQS, + I_VCVTPH2IBS, + I_VCVTPH2IUBS, + I_VCVTTPH2IBS, + I_VCVTTPH2IUBS, + I_VCVTTPS2DQS, + I_VCVTPS2IBS, + I_VCVTPS2IUBS, + I_VCVTTPS2IBS, + I_VCVTTPS2IUBS, + I_VCVTTPS2QQS, + I_VCVTTPS2UDQS, + I_VCVTTPS2UQQS, + I_VCVTTSD2SIS, + I_VCVTTSD2USIS, + I_VCVTTSS2SIS, + I_VCVTTSS2USIS, + I_VBMACOR16X16X16, + I_VBMACXOR16X16X16, + I_VBITREV, + I_HINT_NOP, + I_HINT_NOP0, + I_HINT_NOP1, + I_HINT_NOP2, + I_HINT_NOP3, + I_HINT_NOP4, + I_HINT_NOP5, + I_HINT_NOP6, + I_HINT_NOP7, + I_HINT_NOP8, + I_HINT_NOP9, + I_HINT_NOP10, + I_HINT_NOP11, + I_HINT_NOP12, + I_HINT_NOP13, + I_HINT_NOP14, + I_HINT_NOP15, + I_HINT_NOP16, + I_HINT_NOP17, + I_HINT_NOP18, + I_HINT_NOP19, + I_HINT_NOP20, + I_HINT_NOP21, + I_HINT_NOP22, + I_HINT_NOP23, + I_HINT_NOP24, + I_HINT_NOP25, + I_HINT_NOP26, + I_HINT_NOP27, + I_HINT_NOP28, + I_HINT_NOP29, + I_HINT_NOP30, + I_HINT_NOP31, + I_HINT_NOP32, + I_HINT_NOP33, + I_HINT_NOP34, + I_HINT_NOP35, + I_HINT_NOP36, + I_HINT_NOP37, + I_HINT_NOP38, + I_HINT_NOP39, + I_HINT_NOP40, + I_HINT_NOP41, + I_HINT_NOP42, + I_HINT_NOP43, + I_HINT_NOP44, + I_HINT_NOP45, + I_HINT_NOP46, + I_HINT_NOP47, + I_HINT_NOP48, + I_HINT_NOP49, + I_HINT_NOP50, + I_HINT_NOP51, + I_HINT_NOP52, + I_HINT_NOP53, + I_HINT_NOP54, + I_HINT_NOP55, + I_HINT_NOP56, + I_HINT_NOP57, + I_HINT_NOP58, + I_HINT_NOP59, + I_HINT_NOP60, + I_HINT_NOP61, + I_HINT_NOP62, + I_HINT_NOP63, + I_none = -1 +}; + +#define MAX_INSLEN 17 +#define MAX_OPERANDS 5 +#define NASM_VEX_CLASSES 5 +#define MAP_BASE_NOVEX (0-0) +#define MAP_BASE_VEX (4-0) +#define MAP_BASE_XOP (36-8) +#define MAP_BASE_EVEX (60-0) +#define MAP_BASE_REX2 (68-0) +#define NO_DECORATOR {0,0,0,0,0} + +#endif /* NASM_INSNSI_H */ diff --git a/include/labels.h b/include/labels.h new file mode 100644 index 0000000..ce160a2 --- /dev/null +++ b/include/labels.h @@ -0,0 +1,42 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 1996-2018 The NASM Authors - All Rights Reserved */ + +/* + * labels.h header file for labels.c + */ + +#ifndef LABELS_H +#define LABELS_H + +#include "compiler.h" + +enum label_type { + LBL_none = -1, /* No label */ + LBL_LOCAL = 0, /* Must be zero */ + LBL_STATIC, + LBL_GLOBAL, + LBL_EXTERN, + LBL_REQUIRED, /* Like extern but emit even if unused */ + LBL_COMMON, + LBL_SPECIAL, /* Magic symbols like ..start */ + LBL_BACKEND /* Backend-defined symbols like ..got */ +}; + +enum label_type lookup_label(const char *label, int32_t *segment, int64_t *offset); +static inline bool is_extern(enum label_type type) +{ + return type == LBL_EXTERN || type == LBL_REQUIRED; +} +void define_label(const char *label, int32_t segment, int64_t offset, + bool normal); +void backend_label(const char *label, int32_t segment, int64_t offset); +bool declare_label(const char *label, enum label_type type, + const char *special); +void set_label_mangle(enum directive which, const char *what); +int init_labels(void); +void cleanup_labels(void); +const char *local_scope(const char *label); + +extern uint64_t global_offset_changed; + +#endif /* LABELS_H */ diff --git a/include/listing.h b/include/listing.h new file mode 100644 index 0000000..b33e701 --- /dev/null +++ b/include/listing.h @@ -0,0 +1,175 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 1996-2020 The NASM Authors - All Rights Reserved */ + +/* + * listing.h header file for listing.c + */ + +#ifndef NASM_LISTING_H +#define NASM_LISTING_H + +#include "nasm.h" + +/* List options implied by -L+ */ +#define LIST_PLUS_OPTIONS "bdefFmps" + +/* Listing type values flags */ +enum list_type { + /* Flags for lfmt->line() */ + LIST_READ, + LIST_MACRO, + LIST_INFO, + /* Flags for lfmt->uplevel() */ + LIST_INCLUDE, + LIST_INCBIN, + LIST_TIMES +}; + +/* + * List-file generators should look like this: + */ +struct lfmt { + /* + * Called to initialize the listing file generator. Before this + * is called, the other routines will silently do nothing when + * called. The `char *' parameter is the file name to write the + * listing to. + */ + void (*init)(const char *fname); + + /* + * Called to clear stuff up and close the listing file. + */ + void (*cleanup)(void); + + /* + * Called to output binary data. Parameters are: the offset; + * the data; the data type. Data types are similar to the + * output-format interface, only OUT_ADDRESS will _always_ be + * displayed as if it's relocatable, so ensure that any non- + * relocatable address has been converted to OUT_RAWDATA by + * then. + */ + void (*output)(const struct out_data *data); + + /* + * Called to send a text line to the listing generator. The + * `int' parameter is LIST_READ or LIST_MACRO depending on + * whether the line came directly from an input file or is the + * result of a multi-line macro expansion. + * + * If a line number is provided, print it; if the line number is + * -1 then use the same line number as the previous call. + */ + void (*line)(enum list_type type, int32_t lineno, const char *line); + + /* + * Called to change one of the various levelled mechanisms in the + * listing generator. LIST_INCLUDE and LIST_MACRO can be used to + * increase the nesting level of include files and macro + * expansions; LIST_TIMES and LIST_INCBIN switch on the two + * binary-output-suppression mechanisms for large-scale + * pseudo-instructions; the size argument prints the size or + * repetiiton count. + * + * LIST_MACRO_NOLIST is synonymous with LIST_MACRO except that + * it indicates the beginning of the expansion of a `nolist' + * macro, so anything under that level won't be expanded unless + * it includes another file. + */ + void (*uplevel)(enum list_type type, int64_t size); + + /* + * Reverse the effects of uplevel. + */ + void (*downlevel)(enum list_type type); + + /* + * Called on a warning or error, with the error message. + */ + void printf_func_ptr(2, 3) (*error)(errflags severity, const char *fmt, ...); + + /* + * Update the current offset. Used to give the listing generator + * an offset to work with when doing things like + * uplevel(LIST_TIMES) or uplevel(LIST_INCBIN); see + * list_set_offset(); + */ + void (*set_offset)(uint64_t offset); +}; + +extern const struct lfmt *lfmt; +extern bool user_nolist; + +/* + * list_options are the requested options; active_list_options gets + * set when a pass starts. + * + * These are simple bitmasks of ASCII-64 mapping directly to option + * letters. + */ +extern uint64_t list_options, active_list_options, cmdline_list_options; + +/* + * This maps the characters a-z, A-Z and 0-9 onto a 64-bit bitmask. + * Bit 0 is used to indicate that the listing engine is active, and + * bit 1 is reserved, so this will only return mask bits 2 and higher; + * as there are 62 possible characters this fits nicely. + * + * The mask returned is 0 for invalid characters, accessing no bits at + * all. + * + * This isn't particularly efficient code, but just about every + * instance of it should be fed a constant, so the entire function can + * be precomputed at compile time. The only cases where the full + * computation is needed is in list_update_options(), which is not + * performance critical. + */ +static inline const_func uint64_t list_option_mask(unsigned char x) +{ + if (x >= 'a') { + if (x > 'z') + return 0; + x = x - 'a' + 2; + } else if (x >= 'A') { + if (x > 'Z') + return 0; + x = x - 'A' + 2 + 26; + } else if (x >= '0') { + if (x > '9') + return 0; + x = x - '0' + 2 + 26*2; + } else { + return 0; + } + + return UINT64_C(1) << x; +} + +#define LIST_ALL_OPTIONS_MASK (~UINT64_C(3)) + +/* Return true if the listing engine is active and a certain option is set. */ +static inline pure_func bool list_option(unsigned char x) +{ + return unlikely(active_list_options & list_option_mask(x)); +} + +/* This test is used to see if we should initialize the listing engine */ +static inline pure_func bool list_on_this_pass(void) +{ + return pass_final() || unlikely(list_options & list_option_mask('p')); +} + +/* Is the listing engine active? */ +static inline pure_func bool list_active(void) +{ + return (active_list_options & 1); +} + +/* Change listing options */ +void list_update_options(const char *str, bool from_cmdline); + +/* Pragma handler */ +enum directive_result list_pragma(const struct pragma *); + +#endif diff --git a/include/macho.h b/include/macho.h new file mode 100644 index 0000000..759e8bb --- /dev/null +++ b/include/macho.h @@ -0,0 +1,287 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 1996-2018 The NASM Authors - All Rights Reserved */ + +#ifndef OUTPUT_MACHO_H +#define OUTPUT_MACHO_H + +#include "compiler.h" + +/* Magics */ +#define MH_MAGIC 0xfeedface +#define MH_MAGIC_64 0xfeedfacf + +/* File types */ +#define MH_OBJECT 0x1 + +/* CPUs */ +#define CPU_ARCH_MASK 0xff000000 +#define CPU_ARCH_ABI64 0x01000000 +#define CPU_TYPE_X86 7 +#define CPU_TYPE_I386 CPU_TYPE_X86 +#define CPU_TYPE_X86_64 (CPU_TYPE_X86 | CPU_ARCH_ABI64) + +#define CPU_SUBTYPE_MASK 0xff000000 +#define CPU_SUBTYPE_I386_ALL 3 + +/* Header flags */ +#define MH_SUBSECTIONS_VIA_SYMBOLS 0x00002000 + +/* Load commands */ +#define LC_SEGMENT 0x1 +#define LC_SEGMENT_64 0x19 +#define LC_SYMTAB 0x2 +#define LC_BUILD_VERSION 0x32 + +/* Symbol type bits */ +#define N_STAB 0xe0 +#define N_PEXT 0x10 +#define N_TYPE 0x0e +#define N_EXT 0x01 + +/* To mask with N_TYPE */ +#define N_UNDF 0x00 +#define N_ABS 0x02 +#define N_INDR 0x0a +#define N_PBUD 0x0c +#define N_SECT 0x0e + +/* Section ordinals */ +#define NO_SECT 0x00 +#define MAX_SECT 0xff + +/* Section bits */ +#define SECTION_TYPE 0x000000ff +#define SECTION_ATTRIBUTES 0xffffff00 +#define SECTION_ATTRIBUTES_USR 0xff000000 +#define SECTION_ATTRIBUTES_SYS 0x00ffff00 + +#define S_REGULAR 0x00 +#define S_ZEROFILL 0x01 +#define S_CSTRING_LITERALS 0x02 +#define S_4BYTE_LITERALS 0x03 +#define S_8BYTE_LITERALS 0x04 +#define S_LITERAL_POINTERS 0x05 +#define S_NON_LAZY_SYMBOL_POINTERS 0x06 +#define S_LAZY_SYMBOL_POINTERS 0x07 +#define S_SYMBOL_STUBS 0x08 +#define S_MOD_INIT_FUNC_POINTERS 0x09 +#define S_MOD_TERM_FUNC_POINTERS 0x0a +#define S_COALESCED 0x0b +#define S_GB_ZEROFILL 0x0c +#define S_INTERPOSING 0x0d +#define S_16BYTE_LITERALS 0x0e +#define S_DTRACE_DOF 0x0f +#define S_LAZY_DYLIB_SYMBOL_POINTERS 0x10 +#define S_THREAD_LOCAL_REGULAR 0x11 +#define S_THREAD_LOCAL_ZEROFILL 0x12 +#define S_THREAD_LOCAL_VARIABLES 0x13 +#define S_THREAD_LOCAL_VARIABLE_POINTERS 0x14 +#define S_THREAD_LOCAL_INIT_FUNCTION_POINTERS 0x15 + +#define S_ATTR_PURE_INSTRUCTIONS 0x80000000 +#define S_ATTR_NO_TOC 0x40000000 +#define S_ATTR_STRIP_STATIC_SYMS 0x20000000 +#define S_ATTR_NO_DEAD_STRIP 0x10000000 +#define S_ATTR_LIVE_SUPPORT 0x08000000 +#define S_ATTR_SELF_MODIFYING_CODE 0x04000000 +#define S_ATTR_DEBUG 0x02000000 + +#define S_ATTR_SOME_INSTRUCTIONS 0x00000400 +#define S_ATTR_EXT_RELOC 0x00000200 +#define S_ATTR_LOC_RELOC 0x00000100 +#define INDIRECT_SYMBOL_LOCAL 0x80000000 +#define INDIRECT_SYMBOL_ABS 0x40000000 + +/* Relocation info type */ +#define GENERIC_RELOC_VANILLA 0 +#define GENERIC_RELOC_PAIR 1 +#define GENERIC_RELOC_SECTDIFF 2 +#define GENERIC_RELOC_PB_LA_PTR 3 +#define GENERIC_RELOC_LOCAL_SECTDIFF 4 +#define GENERIC_RELOC_TLV 5 + +#define X86_64_RELOC_UNSIGNED 0 +#define X86_64_RELOC_SIGNED 1 +#define X86_64_RELOC_BRANCH 2 +#define X86_64_RELOC_GOT_LOAD 3 +#define X86_64_RELOC_GOT 4 +#define X86_64_RELOC_SUBTRACTOR 5 +#define X86_64_RELOC_SIGNED_1 6 +#define X86_64_RELOC_SIGNED_2 7 +#define X86_64_RELOC_SIGNED_4 8 +#define X86_64_RELOC_TLV 9 + +/* Relocation info */ +#define R_ABS 0 +#define R_SCATTERED 0x80000000 + +/* VM permission constants */ +#define VM_PROT_NONE 0x00 +#define VM_PROT_READ 0x01 +#define VM_PROT_WRITE 0x02 +#define VM_PROT_EXECUTE 0x04 + +/* Platforms */ +/* X-macro X(_platform, _id, _name) */ +#define MACHO_ALL_PLATFORMS \ + X(PLATFORM_UNKNOWN, 0, "unknown") \ + X(PLATFORM_MACOS, 1, "macos") \ + X(PLATFORM_IOS, 2, "ios") \ + X(PLATFORM_TVOS, 3, "tvos") \ + X(PLATFORM_WATCHOS, 4, "watchos") \ + X(PLATFORM_BRIDGEOS, 5, "bridgeos") \ + X(PLATFORM_MACCATALYST, 6, "macCatalyst") \ + X(PLATFORM_IOSSIMULATOR, 7, "iossimulator") \ + X(PLATFORM_TVOSSIMULATOR, 8, "tvossimulator") \ + X(PLATFORM_WATCHOSSIMULATOR, 9, "watchossimulator") \ + X(PLATFORM_DRIVERKIT, 10, "driverkit") \ + X(PLATFORM_XROS, 11, "xros") \ + X(PLATFORM_XROS_SIMULATOR, 12, "xrsimulator") \ + /* end */ + +typedef struct { + uint32_t magic; + uint32_t cputype; + uint32_t cpusubtype; + uint32_t filetype; + uint32_t ncmds; + uint32_t sizeofcmds; + uint32_t flags; +} macho_header_t; + +typedef struct { + uint32_t magic; + uint32_t cputype; + uint32_t cpusubtype; + uint32_t filetype; + uint32_t ncmds; + uint32_t sizeofcmds; + uint32_t flags; + uint32_t reserved; +} macho_header_64_t; + +typedef struct { + uint32_t cmd; + uint32_t cmdsize; +} macho_load_command_t; + +typedef struct { + uint32_t cmd; + uint32_t cmdsize; + char segname[16]; + uint32_t vmaddr; + uint32_t vmsize; + uint32_t fileoff; + uint32_t filesize; + uint32_t maxprot; + uint32_t initprot; + uint32_t nsects; + uint32_t flags; +} macho_segment_command_t; + +typedef struct { + uint32_t cmd; + uint32_t cmdsize; + char segname[16]; + uint64_t vmaddr; + uint64_t vmsize; + uint64_t fileoff; + uint64_t filesize; + uint32_t maxprot; + uint32_t initprot; + uint32_t nsects; + uint32_t flags; +} macho_segment_command_64_t; + +typedef struct { + char sectname[16]; + char segname[16]; + uint32_t addr; + uint32_t size; + uint32_t offset; + uint32_t align; + uint32_t reloff; + uint32_t nreloc; + uint32_t flags; + uint32_t reserved1; + uint32_t reserved2; +} macho_section_t; + +typedef struct { + char sectname[16]; + char segname[16]; + uint64_t addr; + uint64_t size; + uint32_t offset; + uint32_t align; + uint32_t reloff; + uint32_t nreloc; + uint32_t flags; + uint32_t reserved1; + uint32_t reserved2; + uint32_t reserved3; +} macho_section_64_t; + +typedef struct { + uint32_t cmd; + uint32_t cmdsize; + uint32_t symoff; + uint32_t nsyms; + uint32_t stroff; + uint32_t strsize; +} macho_symtab_command_t; + +typedef struct { + int32_t r_address; + union { + struct { + uint32_t r_symbolnum: 24, + r_pcrel: 1, + r_length: 2, + r_extern: 1, + r_type: 4; + } s; + uint32_t r_raw; + } u; +} macho_relocation_info_t; + +typedef struct nlist_base { + uint32_t n_strx; + uint8_t n_type; + uint8_t n_sect; + uint16_t n_desc; +} macho_nlist_base_t; + +typedef struct nlist { + uint32_t n_strx; + uint8_t n_type; + uint8_t n_sect; + int16_t n_desc; + uint32_t n_value; +} macho_nlist_t; + +typedef struct { + uint32_t n_strx; + uint8_t n_type; + uint8_t n_sect; + uint16_t n_desc; + uint64_t n_value; +} macho_nlist_64_t; + +/* Adapted from LLVM include/llvm/BinaryFormat/MachO.h */ +typedef struct { + uint32_t tool; + uint32_t version; +} macho_build_tool_version_t; + +typedef struct { + uint32_t cmd; + uint32_t cmdsize; + uint32_t platform; + uint32_t minos; /* x.y.z is 0xXXXXYYZZ */ + uint32_t sdk; /* x.y.z is 0xXXXXYYZZ */ + uint32_t ntools; + /* ntools macho_build_tool_version_t follow this */ +} macho_build_version_command_t; + +#endif /* OUTPUT_MACHO_H */ diff --git a/include/macros.h b/include/macros.h new file mode 100644 index 0000000..42022a6 --- /dev/null +++ b/include/macros.h @@ -0,0 +1,36 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 1996-2025 The NASM Authors - All Rights Reserved */ + +/* + * macros.h - format of builtin macro data + */ + +#ifndef NASM_MACROS_H +#define NASM_MACROS_H + +#include "compiler.h" + +/* Builtin macro set */ +struct builtin_macros { + unsigned int dsize, zsize; + const void *zdata; +}; +typedef const struct builtin_macros macros_t; + +char *uncompress_stdmac(macros_t *sm); + +/* --- From standard.mac via macros.pl -> macros.c --- */ + +extern macros_t nasm_stdmac_tasm; +extern macros_t nasm_stdmac_nasm; +extern macros_t nasm_stdmac_version; + +struct use_package { + const char *package; + macros_t *macros; + unsigned int index; +}; +extern const struct use_package *nasm_find_use_package(const char *); +extern const unsigned int use_package_count; + +#endif diff --git a/include/md5.h b/include/md5.h new file mode 100644 index 0000000..cb77910 --- /dev/null +++ b/include/md5.h @@ -0,0 +1,21 @@ +#ifndef MD5_H +#define MD5_H + +#include "compiler.h" + +#define MD5_HASHBYTES 16 + +typedef struct MD5Context { + uint32_t buf[4]; + uint32_t bits[2]; + unsigned char in[64]; +} MD5_CTX; + +extern void MD5Init(MD5_CTX *context); +extern void MD5Update(MD5_CTX *context, unsigned char const *buf, + unsigned len); +extern void MD5Final(unsigned char digest[MD5_HASHBYTES], MD5_CTX *context); +extern void MD5Transform(uint32_t buf[4], uint32_t const in[16]); +extern char * MD5End(MD5_CTX *, char *); + +#endif /* !MD5_H */ diff --git a/include/msvc.h b/include/msvc.h new file mode 100644 index 0000000..b4f6a91 --- /dev/null +++ b/include/msvc.h @@ -0,0 +1,166 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 2016 The NASM Authors - All Rights Reserved */ + +/* + * config/msvc.h + * + * Compiler definitions for Microsoft Visual C++; + * instead of unconfig.h. See config.h.in for the + * variables which can be defined here. + * + * MSDN seems to have information back to Visual Studio 2003, so aim + * for compatibility that far back. + * + * Relevant _MSC_VER values: + * 1310 - Visual Studio 2003 + * 1400 - Visual Studio 2005 + * 1500 - Visual Studio 2008 + * 1600 - Visual Studio 2010 + * 1700 - Visual Studio 2012 + * 1800 - Visual Studio 2013 + * 1900 - Visual Studio 2015 + * 1910 - Visual Studio 2017 + */ + +#ifndef NASM_CONFIG_MSVC_H +#define NASM_CONFIG_MSVC_H + +/* Define to 1 if you have the header file. */ +#define HAVE_FCNTL_H 1 + +/* Define to 1 if you have the header file. */ +#if _MSC_VER >= 1800 +# define HAVE_INTTYPES_H 1 +#endif + +/* Define to 1 if you have the header file. */ +#define HAVE_IO_H 1 + +/* Define to 1 if you have the header file. */ +#define HAVE_STDLIB_H 1 + +/* Define to 1 if you have the header file. */ +#define HAVE_STRING_H 1 + +/* Define to 1 if you have the header file. */ +#define HAVE_SYS_STAT_H 1 + +/* Define to 1 if you have the header file. */ +#define HAVE_SYS_TYPES_H 1 + +/* Define to 1 if you have the `access' function. */ +#define HAVE_ACCESS 1 +#if _MSC_VER < 1400 +# define access _access +#endif + +/* Define to 1 if you have the `fileno' function. */ +#define HAVE_FILENO 1 +#if _MSC_VER < 1400 +# define fileno _fileno +#endif + +/* Define to 1 if you have the `snprintf' function. */ +#define HAVE_SNPRINTF 1 +#if _MSC_VER < 1900 +# define snprintf _snprintf +#endif + +/* Define to 1 if you have the `_chsize' function. */ +#define HAVE__CHSIZE 1 + +/* Define to 1 if you have the `_chsize_s' function. */ +#if _MSC_VER >= 1400 +# define HAVE__CHSIZE_S 1 +#endif + +/* Define to 1 if you have the `_filelengthi64' function. */ +#define HAVE__FILELENGTHI64 1 + +/* Define to 1 if you have the `_fseeki64' function. */ +#define HAVE__FSEEKI64 1 + +/* Define to 1 if you have the `_fullpath' function. */ +#define HAVE__FULLPATH 1 + +/* Define to 1 if the system has the type `struct _stati64'. */ +#define HAVE_STRUCT__STATI64 + +/* Define to 1 if you have the `_stati64' function. */ +#define HAVE__STATI64 1 + +/* Define to 1 if you have the `_fstati64' function. */ +#define HAVE__FSTATI64 1 + +/* Define to 1 if stdbool.h conforms to C99. */ +#if _MSC_VER >= 1800 +# define HAVE_STDBOOL_H 1 +#endif + +/* Define to 1 if you have the `stricmp' function. */ +#define HAVE_STRICMP 1 +/* Define to 1 if you have the declaration of `stricmp', and to 0 if you + don't. */ +#define HAVE_DECL_STRICMP 1 +#if _MSC_VER < 1400 +# define stricmp _stricmp +#endif + +/* Define to 1 if you have the `strnicmp' function. */ +#define HAVE_STRNICMP 1 +/* Define to 1 if you have the declaration of `strnicmp', and to 0 if you + don't. */ +#define HAVE_DECL_STRNICMP 1 +#if _MSC_VER < 1400 +# define strnicmp _strnicmp +#endif + +#if _MSC_VER >= 1400 +/* Define to 1 if you have the `strnlen' function. */ +# define HAVE_STRNLEN 1 +/* Define to 1 if you have the declaration of `strnlen', and to 0 if you + don't. */ +# define HAVE_DECL_STRNLEN 1 +#endif + +/* Define to 1 if the system has the type `uintptr_t'. */ +#if _MSC_VER >= 1900 +# define HAVE_UINTPTR_T 1 +#else +/* Define to the type of an unsigned integer type wide enough to hold a + pointer, if such a type exists, and if the system does not define it. */ +# define uintptr_t size_t +#endif + +/* Define to 1 if you have the `vsnprintf' function. */ +#define HAVE_VSNPRINTF 1 +#if _MSC_VER < 1400 +# define vsnprint _vsnprintf +#endif + +/* Define to 1 if the system has the type `_Bool'. */ +#if _MSC_VER >= 1900 +# define HAVE__BOOL 1 +#endif + +/* Define to 1 if you have the ANSI C header files. */ +#define STDC_HEADERS 1 + +/* Define to 1 if your processor stores words with the least significant byte + first (like Intel and VAX, unlike Motorola and SPARC). */ +#define WORDS_LITTLEENDIAN 1 + +/* Define to `__inline__' or `__inline' if that's what the C compiler + calls it, or to nothing if 'inline' is not supported under any name. */ +#define inline __inline + +/* Define to the equivalent of the C99 'restrict' keyword, or to + nothing if this is not supported. Do not define if restrict is + supported directly. */ +#if _MSC_VER >= 1700 +#define restrict __restrict +#else +#define restrict +#endif + +#endif /* NASM_CONFIG_MSVC_H */ diff --git a/include/nasm.h b/include/nasm.h new file mode 100644 index 0000000..136f274 --- /dev/null +++ b/include/nasm.h @@ -0,0 +1,1583 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 1996-2025 The NASM Authors - All Rights Reserved */ + +/* + * nasm.h main header file for the Netwide Assembler: inter-module interface + */ + +#ifndef NASM_NASM_H +#define NASM_NASM_H + +#include "compiler.h" + +#include + +#include "nasmlib.h" +#include "nctype.h" +#include "strlist.h" +#include "preproc.h" +#include "macros.h" +#include "insnsi.h" /* For enum opcode */ +#include "directiv.h" /* For enum directive */ +#include "labels.h" /* For enum mangle_index, enum label_type */ +#include "opflags.h" +#include "regs.h" +#include "x86const.h" +#include "srcfile.h" +#include "error.h" + +/* Program name for error messages etc. */ +extern const char *_progname; + +/* Time stamp for the official start of compilation */ +struct compile_time { + time_t t; + bool have_local, have_gm, have_posix; + int64_t posix; + struct tm local; + struct tm gm; +}; +extern struct compile_time official_compile_time; + +/* POSIX timestamp if and only if we are not a reproducible build */ +extern bool reproducible; +static inline int64_t posix_timestamp(void) +{ + return reproducible ? 0 : official_compile_time.posix; +} + +#define NO_SEG INT32_C(-1) /* null segment value */ +#define SEG_ABS 0x40000000L /* mask for far-absolute segments */ + +#define IDLEN_MAX 4096 +#define DECOLEN_MAX 32 + +/* + * Name pollution problems: on Digital UNIX pulls in some + * strange hardware header file which sees fit to define R_SP. We + * undefine it here so as not to break the enum below. + */ +#ifdef R_SP +#undef R_SP +#endif + +/* + * We must declare the existence of this structure type up here, + * since we have to reference it before we define it... + */ +struct ofmt; + +/* + * Values for the `type' parameter to an output function. + */ +enum out_type { + OUT_RAWDATA, /* Plain bytes */ + OUT_RESERVE, /* Reserved bytes (RESB et al) */ + OUT_ZERODATA, /* Initialized data, but all zero */ + OUT_ADDRESS, /* An address (symbol value) */ + OUT_RELADDR, /* A relative address */ + OUT_SEGMENT, /* A segment number */ + + /* + * These values are used by the legacy backend interface only; see + * nasm_ofmt_output() in asm/assemble.c for more information. + * These should never be used otherwise. Once all backends have + * been fully migrated to the new interface they should be + * removed. + */ + OUT_REL1ADR, + OUT_REL2ADR, + OUT_REL4ADR, + OUT_REL8ADR +}; + +enum out_flags { + OUT_WRAP = 0, /* Undefined signedness (wraps) */ + OUT_SIGNED = 1, /* Value is signed */ + OUT_UNSIGNED = 2, /* Value is unsigned */ + OUT_SIGNMASK = 3, /* Mask for signedness bits */ + OUT_NOWARN = 4 /* Don't warn on overflow (already done?) */ +}; + +/* + * Description of an assembly output location + */ +struct location { + int64_t offset; + int32_t segment; + bool known; +}; +extern struct location location; /* Current assembly location */ + +/* + * The data we send down to the backend. + * XXX: We still want to push down the base address symbol if + * available, and replace the segment numbers with a structure. + */ +struct out_data { + struct location loc; /* seg:offset being written to */ + enum out_type type; /* See above */ + enum out_flags flags; /* See above */ + int inslen; /* Length of instruction */ + int insoffs; /* Offset inside instruction */ + int bits; /* Bits mode of compilation */ + uint64_t size; /* Size of output */ + const struct itemplate *itemp; /* Instruction template */ + const void *data; /* Data for OUT_RAWDATA */ + uint64_t toffset; /* Target address offset for relocation */ + int32_t tsegment; /* Target segment for relocation */ + int32_t twrt; /* Relocation with respect to */ + int64_t relbase; /* Relative base for OUT_RELADDR */ + struct src_location where; /* Source file and line */ + const char *what; /* Additional description, e.g. "immediate" */ + + /* + * Legacy output data fields; some of these differ in their + * definition from the corresponding modern fields. + * See nasm_ofmt_output() in asm/assemble.c. + */ + struct out_data_legacy { + const void *data; + enum out_type type; + uint64_t size; + int32_t tsegment; /* Legacy name "segment" */ + int32_t twrt; /* Legacy name "wrt" */ + } legacy; +}; + +/* + * And a label-definition function. The boolean parameter + * `is_norm' states whether the label is a `normal' label (which + * should affect the local-label system), or something odder like + * an EQU or a segment-base symbol, which shouldn't. + */ +typedef void (*ldfunc)(char *label, int32_t segment, int64_t offset, + char *special, bool is_norm); + +/* + * Token types returned by the scanner, in addition to ordinary + * ASCII character values, and zero for end-of-string. + */ +enum token_type { /* token types, other than chars */ + + /* Token values shared between assembler and preprocessor */ + + /* Special codes */ + TOKEN_INVALID = -1, /* a placeholder value */ + TOKEN_BLOCK = -2, /* used for storage management */ + TOKEN_FREE = -3, /* free token marker, use to catch leaks */ + TOKEN_EOS = 0, /* end of string */ + + /* + * Single-character operators. Enumerated here to keep strict + * compilers happy, and for documentation. + */ + TOKEN_WHITESPACE = ' ', /* Preprocessor use */ + TOKEN_BOOL_NOT = '!', + TOKEN_AND = '&', + TOKEN_OR = '|', + TOKEN_XOR = '^', + TOKEN_NOT = '~', + TOKEN_MULT = '*', + TOKEN_DIV = '/', + TOKEN_MOD = '%', + TOKEN_LPAR = '(', + TOKEN_RPAR = ')', + TOKEN_PLUS = '+', + TOKEN_MINUS = '-', + TOKEN_COMMA = ',', + TOKEN_LBRACE = '{', + TOKEN_RBRACE = '}', + TOKEN_LBRACKET = '[', + TOKEN_RBRACKET = ']', + TOKEN_QMARK = '?', + TOKEN_EQ = '=', /* = or == */ + TOKEN_GT = '>', + TOKEN_LT = '<', + TOKEN_COLON = ':', + + /* Multi-character operators */ + TOKEN_SHL = 256, /* << or <<< */ + TOKEN_SHR, /* >> */ + TOKEN_SAR, /* >>> */ + TOKEN_SDIV, /* // */ + TOKEN_SMOD, /* %% */ + TOKEN_GE, /* >= */ + TOKEN_LE, /* <= */ + TOKEN_NE, /* <> (!= is same as <>) */ + TOKEN_LEG, /* <=> */ + TOKEN_DBL_AND, /* && */ + TOKEN_DBL_OR, /* || */ + TOKEN_DBL_XOR, /* ^^ */ + + TOKEN_MAX_OPERATOR, + + TOKEN_NUM, /* numeric constant */ + TOKEN_ERRNUM, /* malformed numeric constant */ + TOKEN_STR, /* string constant */ + TOKEN_ERRSTR, /* unterminated string constant */ + TOKEN_ID, /* identifier */ + TOKEN_FLOAT, /* floating-point constant */ + TOKEN_HERE, /* $, not '$' because it is not an operator */ + TOKEN_BASE, /* $$ */ + + /* Token values only used by the assembler */ + TOKEN_START_ASM, + + TOKEN_SEG, /* SEG */ + TOKEN_WRT, /* WRT */ + TOKEN_TIMES, /* TIMES */ + TOKEN_FLOATIZE, /* __?floatX?__ */ + TOKEN_STRFUNC, /* __utf16*__, __utf32*__ */ + TOKEN_IFUNC, /* __ilog2*__ */ + TOKEN_DECORATOR, /* decorators such as {...} */ + TOKEN_MASM_PTR, /* __?masm_ptr?__ for the masm package */ + TOKEN_MASM_FLAT, /* __?masm_flat?__ for the masm package */ + TOKEN_OPMASK, /* translated token for opmask registers */ + TOKEN_SIZE, /* BYTE, WORD, DWORD, QWORD, etc */ + TOKEN_SPECIAL, /* REL, FAR, NEAR, STRICT, NOSPLIT, etc */ + TOKEN_PREFIX, /* A32, O16, LOCK, REPNZ, TIMES, etc */ + TOKEN_BRCCONST, /* braced constant expression */ + TOKEN_REG, /* register name */ + TOKEN_INSN, /* instruction name */ + + TOKEN_END_ASM, + + /* Token values only used by the preprocessor */ + + TOKEN_START_PP = TOKEN_END_ASM, + + TOKEN_OTHER, /* % sequence without (current) meaning */ + TOKEN_PREPROC_ID, /* Preprocessor ID, e.g. %symbol */ + TOKEN_MMACRO_PARAM, /* MMacro parameter, e.g. %1 */ + TOKEN_LOCAL_SYMBOL, /* Local symbol, e.g. %%symbol */ + TOKEN_LOCAL_MACRO, /* Context-local macro, e.g. %$symbol */ + TOKEN_ENVIRON, /* %! */ + TOKEN_INTERNAL_STR, /* Unquoted string that should remain so */ + TOKEN_NAKED_STR, /* Unquoted string that can be re-quoted */ + TOKEN_PREPROC_Q, /* %? */ + TOKEN_PREPROC_QQ, /* %?? */ + TOKEN_PREPROC_SQ, /* %*? */ + TOKEN_PREPROC_SQQ, /* %*?? */ + TOKEN_PASTE, /* %+ */ + TOKEN_COND_COMMA, /* %, */ + TOKEN_INDIRECT, /* %[...] */ + TOKEN_XDEF_PARAM, /* Used during %xdefine processing */ + /* smacro parameters starting here; an arbitrary number. */ + TOKEN_SMAC_START_PARAMS, /* MUST BE LAST IN THE LIST!!! */ + TOKEN_MAX = INT_MAX /* Keep compiler from reducing the range */ +}; + +/* + * Token flags + */ +enum token_flags { + TFLAG_BRC = 1 << 0, /* valid only with braces. {1to8}, {rd-sae}, ...*/ + TFLAG_BRC_OPT = 1 << 1, /* may or may not have braces. opmasks {k1} */ + TFLAG_BRC_ANY = TFLAG_BRC | TFLAG_BRC_OPT, + TFLAG_BRDCAST = 1 << 2, /* broadcasting decorator */ + TFLAG_WARN = 1 << 3, /* warning only, treat as ID */ + TFLAG_DUP = 1 << 4, /* valid ID but also has context-specific use */ + TFLAG_ORBIT = 1 << 5 /* OR in the bit given in t_inttwo */ +}; + +/* Must match the fp_formats[] array in asm/floats.c */ +enum floatize { + FLOAT_8, + FLOAT_16, + FLOAT_B16, + FLOAT_32, + FLOAT_64, + FLOAT_80M, + FLOAT_80E, + FLOAT_128L, + FLOAT_128H, + FLOAT_ERR /* Invalid format, MUST BE LAST */ +}; + +/* Must match the list in string_transform(), in strfunc.c */ +enum strfunc { + STRFUNC_UTF16, + STRFUNC_UTF16LE, + STRFUNC_UTF16BE, + STRFUNC_UTF32, + STRFUNC_UTF32LE, + STRFUNC_UTF32BE +}; + +enum ifunc { + IFUNC_ILOG2E, + IFUNC_ILOG2W, + IFUNC_ILOG2F, + IFUNC_ILOG2C +}; + +size_t string_transform(char *, size_t, char **, enum strfunc); + +/* + * The expression evaluator must be passed a scanner function; a + * standard scanner is provided as part of nasmlib.c. The + * preprocessor will use a different one. Scanners, and the + * token-value structures they return, look like this. + * + * The return value from the scanner is always a copy of the + * `t_type' field in the structure. + */ +struct tokenval { + int64_t t_integer; + int64_t t_inttwo; + char *t_charptr; + const char *t_start; /* Pointer to token in input buffer */ + int t_len; /* Length of token in input buffer */ + enum token_type t_type; + enum token_flags t_flag; +}; +typedef int (*scanner)(void *private_data, struct tokenval *tv); + +/* + * Expression-evaluator datatype. Expressions, within the + * evaluator, are stored as an array of these beasts, terminated by + * a record with type==0. Mostly, it's a vector type: each type + * denotes some kind of a component, and the value denotes the + * multiple of that component present in the expression. The + * exception is the WRT type, whose `value' field denotes the + * segment to which the expression is relative. These segments will + * be segment-base types, i.e. either odd segment values or SEG_ABS + * types. So it is still valid to assume that anything with a + * `value' field of zero is insignificant. + */ +typedef struct { + int32_t type; /* a register, or EXPR_xxx */ + int64_t value; /* must be >= 32 bits */ +} expr; + +/* + * Library routines to manipulate expression data types. + */ +enum expr_classes { + EC_ZERO = 0, /* All-zero expression */ + EC_CONST = 1, /* Additive constant */ + EC_SEGABS = 2, /* Absolute segment reference */ + EC_SIMPLE = EC_CONST | EC_SEGABS, + EC_SELFREL = 4, /* Self-relative expression */ + EC_SEG = 8, /* Has a segment base */ + EC_WRT = 16, /* Has WRT */ + EC_RELOC = EC_SIMPLE | EC_SELFREL | EC_SEG | EC_WRT, + EC_UNKNOWN = 32, /* Has an "unknown" part */ + EC_REGISTER = 64, /* Has a register */ + EC_REGEXPR = 128, /* Has more than one register and/or reg*n */ + EC_COMPLEX = 256 /* Even more complex, problematic */ +}; + +enum expr_classes expr_class(const expr *vect); +bool is_reloc(const expr *vect); +bool is_simple(const expr *vect); +bool is_really_simple(const expr *vect); +bool is_unknown(const expr *vect); +bool is_just_unknown(const expr *vect); +int64_t reloc_value(const expr *vect); +int32_t reloc_seg(const expr *vect); +int32_t reloc_wrt(const expr *vect); +bool is_self_relative(const expr *vect); +void dump_expr(const expr *vect); + +/* + * The evaluator can also return hints about which of two registers + * used in an expression should be the base register. See also the + * `operand' structure. + */ +struct eval_hints { + int64_t base; + int type; +}; + +/* + * The actual expression evaluator function looks like this. When + * called, it expects the first token of its expression to already + * be in `*tv'; if it is not, set tv->t_type to TOKEN_INVALID and + * it will start by calling the scanner. + * + * If a forward reference happens during evaluation, the evaluator + * must set `*fwref' to true if `fwref' is non-NULL. + * + * `critical' is non-zero if the expression may not contain forward + * references. The evaluator will report its own error if this + * occurs; if `critical' is 1, the error will be "symbol not + * defined before use", whereas if `critical' is 2, the error will + * be "symbol undefined". + * + * If `critical' has bit 8 set (in addition to its main value: 0x101 + * and 0x102 correspond to 1 and 2) then an extended expression + * syntax is recognised, in which relational operators such as =, < + * and >= are accepted, as well as low-precedence logical operators + * &&, ^^ and ||. + * + * If `hints' is non-NULL, it gets filled in with some hints as to + * the base register in complex effective addresses. + */ +#define CRITICAL 0x100 +typedef expr *(*evalfunc)(scanner sc, void *scprivate, + struct tokenval *tv, int *fwref, int critical, + struct eval_hints *hints); + +/* + * Special values for expr->type. + * These come after EXPR_REG_END as defined in regs.h. + * Expr types : 0 ~ EXPR_REG_END, EXPR_UNKNOWN, EXPR_...., EXPR_RDSAE, + * EXPR_SEGBASE ~ EXPR_SEGBASE + SEG_ABS, ... + */ +#define EXPR_UNKNOWN (EXPR_REG_END+1) /* forward references */ +#define EXPR_SIMPLE (EXPR_REG_END+2) +#define EXPR_WRT (EXPR_REG_END+3) +#define EXPR_RDSAE (EXPR_REG_END+4) +#define EXPR_SEGBASE (EXPR_REG_END+5) + +/* + * preprocessors ought to look like this: + */ + +enum preproc_mode { + PP_NORMAL, /* Assembly */ + PP_DEPS, /* Dependencies only */ + PP_PREPROC /* Preprocessing only */ +}; + +enum preproc_opt { + PP_TRIVIAL = 1, /* Only %line or # directives */ + PP_NOLINE = 2, /* Ignore %line and # directives */ + PP_TASM = 4 /* TASM compatibility hacks */ +}; + +/* + * Called once at the very start of assembly. + */ +void pp_init(enum preproc_opt opt); + +/* + * Called at the start of a pass; given a file name, the number + * of the pass, an error reporting function, an evaluator + * function, and a listing generator to talk to. + */ +void pp_reset(const char *file, enum preproc_mode mode, + struct strlist *deplist); + +/* + * Called to fetch a line of preprocessed source. The line + * returned has been malloc'ed, and so should be freed after + * use. + */ +char *pp_getline(void); + +/* Called at the end of each pass. */ +void pp_cleanup_pass(void); + +/* + * Called at the end of the assembly session, + * after cleanup_pass() has been called for the + * last pass. + */ +void pp_cleanup_session(void); + +/* Early definitions and undefinitions for macros */ +void pp_pre_define(char *definition); +void pp_pre_undefine(char *definition); + +/* Include file from command line */ +void pp_pre_include(char *fname); + +/* Add a command from the command line */ +void pp_pre_command(const char *what, char *str); + +/* Include path from command line */ +void pp_include_path(struct strlist *ipath); + +/* Unwind the macro stack when printing an error message */ +void pp_error_list_macros(errflags severity); + +/* Return true if an error message should be suppressed */ +bool pp_suppress_error(errflags severity); + +/* List of dependency files */ +extern struct strlist *depend_list; + +/* TASM mode changes some properties */ +extern bool tasm_compatible_mode; + +/* + * inline function to skip past an identifier; returns the first character past + * the identifier if valid, otherwise NULL. + */ +static inline char *nasm_skip_identifier(const char *str) +{ + const char *p = str; + + if (!nasm_isidstart(*p++)) { + p = NULL; + } else { + while (nasm_isidchar(*p++)) + ; + } + return (char *)p; +} + +/* + * ----------------------------------------------------------- + * Format of the `insn' structure returned from `parser.c' and + * passed into `assemble.c' + * ----------------------------------------------------------- + */ + +/* + * REX flags + * + * Note: REX_[BXRW] and REX_P must match the locations of these + * bits within an actual REX prefix (with REX_P being the invariant + * 0x40 bit. REX_[BXR]1 must match the locations of these bits + * within the REX2 prefix, shifted into the second byte (<< 12). + * Finally, REX_[BXR]V are should match BXR << 16. + * + * REX_W64 is a separate bit to indicate that REX.W should be set + * if the operand size is 64. It can be overridden by the "nw" (0327) + * byte code. + */ +#define REX_MASK 0x4f /* Actual REX prefix bits */ +#define REX_B 0x01 /* ModRM r/m extension */ +#define REX_X 0x02 /* SIB index extension */ +#define REX_R 0x04 /* ModRM reg extension */ +#define REX_W 0x08 /* 64-bit operand size */ +#define REX_L 0x20 /* Use LOCK prefix instead of REX.R */ +#define REX_P 0x40 /* REX prefix present/required */ +#define REX_H 0x80 /* High register present, REX forbidden */ +#define REX_V 0x0100 /* Instruction uses VEX/XOP instead of REX */ +#define REX_NH 0x0200 /* Instruction which doesn't use high regs */ +#define REX_EV 0x0400 /* Instruction uses EVEX instead of REX */ +#define REX_2 0x0800 /* Instruction requires REX2 */ +#define REX_B1 0x1000 /* REX2/EVEX B second bit */ +#define REX_X1 0x2000 /* REX2/EVEX X second bit */ +#define REX_R1 0x4000 /* REX2/EVEX R second bit */ +#define REX_NW 0x8000 /* REX.W not required for 64-bit operand mode */ + +#define REX_BV 0x10000 /* B is not a GPR or CREG */ +#define REX_XV 0x20000 /* X is not a GPR or CREG */ +#define REX_RV 0x40000 /* R is not a GPR or CREG */ + +#define REX_BXR0 0x0007 +#define REX_BXR1 0x7000 +#define REX_BXR 0x7007 +#define REX_BXRV 0x70000 + +/* All flags pertaining to B, X, and R */ +#define REX_rB (REX_B | REX_B1 | REX_BV | REX_H | REX_P) +#define REX_rX (REX_X | REX_X1 | REX_XV | REX_H | REX_P) +#define REX_rR (REX_R | REX_R1 | REX_RV | REX_H | REX_P) + +/* + * EVEX bit fields. Note that the P[] numbers in the SDM does not include + * the leading 0x62 byte, so add 8 to the position. + * + * NOTES: B4 is in bit X3 = P[5] if B is a vector + * X4 is in bit V4 = P[19] if X is a vector + */ +#define evexf(name,pos,width) \ + mk_field(EVEX_ ## name, 8+(pos), width) + +enum evex_fields { + evexf(MM, 0, 3), /* EVEX P[2:0] : Opcode map */ + evexf(B4, 3, 1), /* EVEX P[3] : Bit 4 B register (B4*) */ + evexf(R4, 4, 1), /* EVEX P[4] : Bit 4 R register (R4) */ + evexf(B3, 5, 1), /* EVEX P[5] : Bit 3 B register (B3) */ + evexf(X3, 6, 1), /* EVEX P[5] : Bit 3 X register (X3*) */ + evexf(R3, 7, 1), /* EVEX P[7] : Bit 3 R register (R3) */ + evexf(PP, 8, 2), /* EVEX P[9:8] : Legacy prefix */ + evexf(X4, 10, 1), /* EVEX P[10] : Bit 4 X register (X4) */ + evexf(VVVV, 11, 4), /* EVEX P[14:11] : V register (V3-V0) */ + evexf(W, 15, 1), /* EVEX P[15] : Osize extension (REX.W) */ + evexf(AAA, 16, 3), /* EVEX P[18:16] : Embedded opmask */ + evexf(NF, 18, 1), /* EVEX P[18]: No flags bit */ + evexf(V4, 19, 1), /* EVEX P[19] : Bit 4 V register (V4*) */ + evexf(SCC, 16, 4), /* EVEX P[19:16]: Modified condition */ + evexf(B, 20, 1), /* EVEX P[20] : Broadcast / RC / SAE */ + evexf(ND, 20, 1), /* EVEX P[20] : New destination */ + evexf(ZU, 20, 1), /* EVEX P[20] : Zero upper */ + evexf(LL, 21, 2), /* EVEX P[22:21] : Vector length */ + evexf(RC, 21, 2), /* EVEX P[22:21] : Rounding control */ + evexf(Z, 23, 1) /* EVEX P[23] : Zeroing/Merging */ +}; + +/* + * REX_V "classes" (prefixes which behave like VEX) + */ +enum vex_class { + RV_VEX = 0, /* C4/C5 */ + RV_XOP = 1, /* 8F */ + RV_EVEX = 2 /* 62 */ +}; + +/* + * Note that because segment registers may be used as instruction + * prefixes, we must ensure the enumerations for prefixes and + * register names do not overlap. + * + * These MUST match the table in common/common.c + */ +enum prefixes { /* instruction prefixes */ + P_none = 0, + P_any = 1, + PREFIX_ENUM_START = REG_ENUM_LIMIT, + P_A16 = PREFIX_ENUM_START, + P_A32, + P_A64, + P_ASP, + P_LOCK, + P_O16, + P_O32, + P_O64, + P_OSP, + P_REP, + P_REPE, + P_REPNE, + P_REPNZ, + P_REPZ, + P_WAIT, + P_XACQUIRE, + P_XRELEASE, + P_BND, + P_NOBND, + P_REX, + P_REX2, + P_EVEX, + P_VEX, + P_VEX3, + P_VEX2, + P_NF, + P_ZU, + P_PT, + P_PN, + PREFIX_ENUM_LIMIT +}; + +enum ea_flags { /* special EA flags */ + EAF_BYTEOFFS = 1, /* force offset part to byte size */ + EAF_WORDOFFS = 2, /* force offset part to [d]word size */ + EAF_TIMESTWO = 4, /* really do EAX*2 not EAX+EAX */ + EAF_REL = 8, /* IP-relative addressing */ + EAF_ABS = 16, /* non-IP-relative addressing */ + EAF_MIB = 32, /* mib operand */ + EAF_SIB = 64, /* SIB encoding obligatory */ + EAF_NOTFSGS = 128, /* no fs: or gs: */ + EAF_FS = 256, /* fs segment override present */ + EAF_GS = 512 /* gs segment override present */ +}; + +enum eval_hint { /* values for `hinttype' */ + EAH_NOHINT = 0, /* no hint at all - our discretion */ + EAH_MAKEBASE = 1, /* try to make given reg the base */ + EAH_NOTBASE = 2, /* try _not_ to make reg the base */ + EAH_SUMMED = 3 /* base and index are summed into index */ +}; + +typedef struct operand { /* operand to an instruction */ + opflags_t type; /* type of operand */ + opflags_t xsize; /* size flags used in find_match() */ + enum reg_enum basereg; + enum reg_enum indexreg; /* address registers */ + int scale; /* index scale */ + int hintbase; + enum eval_hint hinttype; /* hint as to real base register */ + int32_t segment; /* immediate segment, if needed */ + int64_t offset; /* any immediate number */ + int32_t wrt; /* segment base it's relative to */ + int eaflags; /* special EA flags */ + int opflags; /* see OPFLAG_* defines below */ + int iflag; /* Requires a specific IF_* flag */ + decoflags_t decoflags; /* decorator flags such as {...} */ + bool bcast; /* broadcast operand */ + uint8_t disp_size; /* 0 means default; 16; 32; 64 */ + uint8_t opidx; /* Operand index */ +} operand; + +#define OPFLAG_FORWARD 1 /* operand is a forward reference */ +#define OPFLAG_EXTERN 2 /* operand is an external reference */ +#define OPFLAG_UNKNOWN 4 /* operand is an unknown reference + (always a forward reference also) */ +#define OPFLAG_RELATIVE 8 /* operand is self-relative, e.g. [foo - $] + where foo is not in the current segment */ +#define OPFLAG_SIMPLE 16 /* operand is a simple expression */ + +enum extop_type { /* extended operand types */ + EOT_NOTHING = 0, + EOT_EXTOP, /* Subexpression */ + EOT_DB_STRING, /* Byte string */ + EOT_DB_FLOAT, /* Floating-pointer number (special byte string) */ + EOT_DB_STRING_FREE, /* Byte string which should be nasm_free'd*/ + EOT_DB_NUMBER, /* Integer */ + EOT_DB_RESERVE /* ? */ +}; + +typedef struct extop { /* extended operand */ + struct extop *next; /* linked list */ + union { + struct { /* text or byte string */ + char *data; + size_t len; + } string; + struct { /* numeric expression */ + int64_t offset; /* numeric value or address offset */ + int32_t segment; /* address segment */ + int32_t wrt; /* address wrt */ + bool relative; /* self-relative expression */ + } num; + struct extop *subexpr; /* actual expressions */ + } val; + size_t dup; /* duplicated? */ + enum extop_type type; /* defined above */ + int elem; /* element size override, if any (bytes) */ +} extop; + +enum ea_type { + EA_INVALID, /* Not a valid EA at all */ + EA_SCALAR, /* Scalar EA */ + EA_XMMVSIB, /* XMM vector EA */ + EA_YMMVSIB, /* YMM vector EA */ + EA_ZMMVSIB /* ZMM vector EA */ +}; + +/* + * Prefix positions: each type of prefix goes in a specific slot. + * This affects the final ordering of the assembled output, which + * shouldn't matter to the processor, but if you have stylistic + * preferences, you can change this. REX prefixes are handled + * differently for the time being. + * + * LOCK and REP used to be one slot; this is no longer the case since + * the introduction of HLE. + * + * The prefixes are emitted in order by slot number. + * + * Note: these are stored in an PPS_BITS-bit field in the token hash! + * + */ +enum prefix_pos { + PPS_WAIT = 0, /* WAIT (technically not a prefix!) */ + PPS_SEG, /* Segment override prefix */ + PPS_ASIZE, /* Address size prefix */ + PPS_LOCK, /* LOCK prefix */ + PPS_OSIZE, /* Operand size prefix */ + PPS_REP, /* REP/HLE prefix */ + PPS_REX, /* REX/VEX type */ + PPS_NF, /* Do not set flags */ + PPS_ZU, /* Zero upper register */ + MAXPREFIX /* Total number of prefix slots */ +}; + +/* + * Tuple types that are used when determining Disp8*N eligibility + * The order must match with a hash %tuple_codes in insns.pl + */ +enum ttypes { + FV = 001, + HV = 002, + FVM = 003, + T1S8 = 004, + T1S16 = 005, + T1S = 006, + T1F32 = 007, + T1F64 = 010, + T2 = 011, + T4 = 012, + T8 = 013, + HVM = 014, + QVM = 015, + OVM = 016, + M128 = 017, + DUP = 020 +}; + +/* EVEX.L'L : Vector length on vector insns */ +enum vectlens { + VL128 = 0, + VL256 = 1, + VL512 = 2, + VLMAX = 3 +}; + +/* A postprocessed effective address (EA) */ +struct ea_data { + enum ea_type type; /* what kind of EA is this? */ + uint32_t rex; /* EA-derived REX flags */ + bool sib_present; /* is a SIB byte necessary? */ + uint8_t bytes; /* # of bytes of offset needed */ + uint8_t size; /* lazy - this is sib+bytes+1 */ + uint8_t modrm, sib; /* the bytes themselves */ + bool rip; /* RIP-relative? */ + int8_t disp8; /* 8-bit displacement, possibly compressed */ + uint8_t disp8_shift; /* Shift for 8-bit displacement */ + bool disp8_ok; /* 8-bit displacement is valid */ +}; + +/* + * flag to disable optimizations selectively + * this is useful to turn-off certain optimizations + */ +enum optimization { + /* Individual flags */ + OPTIM_NO_Jcc_RELAX = 1, /* Disable Jcc relaxation */ + OPTIM_NO_JMP_RELAX = 2, /* Disable JMP relaxation */ + OPTIM_STRICT_INSTR = 4, /* Disable alternate instructions */ + OPTIM_STRICT_OPER = 8, /* Disable operand relaxation */ + OPTIM_DISABLE_FWREF = 16, /* Disable forward reference relaxation */ + OPTIM_STRICT_OSIZE = 32, /* Disable osize adjustments */ + + /* Everything */ + OPTIM_ALL_ENABLED = 0, + + /* Disable all jump relaxations */ + OPTIM_DISABLE_JMP_MATCH = OPTIM_NO_Jcc_RELAX | OPTIM_NO_JMP_RELAX, + + /* Level 0 : 0.98 behavior */ + OPTIM_LEVEL_0 = + OPTIM_STRICT_INSTR | OPTIM_STRICT_OSIZE | OPTIM_STRICT_OPER | + OPTIM_NO_JMP_RELAX, + + /* Level 1 : 0.98.09 behavior */ + OPTIM_LEVEL_1 = + OPTIM_STRICT_INSTR | OPTIM_STRICT_OSIZE | OPTIM_NO_Jcc_RELAX | + OPTIM_NO_JMP_RELAX | OPTIM_DISABLE_FWREF, + + /* Default */ + OPTIM_DEFAULT = OPTIM_ALL_ENABLED +}; + +/* + * Used with byte values for prefixes when no single byte value applies + */ +enum prefix_err { + PFE_NULL = -1, /* No output */ + PFE_MULTI = -2, /* Multibyte output (VEX, EVEX, REX2) */ + PFE_ERR = -3, /* Invalid prefix use */ + PFE_WHAT = -4 /* Not a valid prefix (internal error) */ +}; + +typedef struct insn { /* an instruction itself */ + enum opcode opcode; /* the opcode - not just the string */ + struct location loc; /* assembly location */ + int prefixes[MAXPREFIX]; /* instruction prefixes, if any */ + int need_pfx[MAXPREFIX]; /* byte prefixes used as opcodes */ + char *label; /* the label defined, or NULL */ + extop *eops; /* extended operands */ + int eops_float; /* true if DD and floating */ + int32_t times; /* repeat count (TIMES prefix) */ + bool rex_done; /* REX prefix emitted? */ + bool dummy; /* not a real instruction, no errors */ + uint8_t bits; /* Execution mode (16, 32, 64) */ + uint8_t op_size; /* operand size */ + uint8_t addr_size; /* address size */ + uint8_t operands; /* how many operands? 0-7 unless eops */ + uint8_t vexreg; /* Register encoded in VEX.V */ + uint8_t veximm; /* Bit-inverted immediate encoded + in VEX.V */ + uint8_t vex_cm; /* Class and M field for VEX prefix */ + uint8_t vex_wlp; /* W, P and L information for VEX prefix */ + uint32_t rex; /* REX prefix flags */ + uint32_t evex; /* EVEX prefix under construction */ + enum ttypes evex_tuple; /* Tuple type for compressed Disp8*N */ + int evex_rm; /* static rounding mode for AVX512 (EVEX) */ + enum optimization opt; /* Optimization flags to use */ + struct ea_data ea; /* Effective address data */ + const struct itemplate *itemp; /* Instruction template */ + const struct operand *evex_brerop; /* BR/ER/SAE operand position */ + struct operand oprs[MAX_OPERANDS]; /* the operands, defined as above */ + + int itempindex; /* For debug: instruction template index in insnsa.c */ +} insn; + +/* Instruction flags type: IF_* flags are defined in insns.h */ +typedef uint64_t iflags_t; + +/* + * What to return from a directive- or pragma-handling function. + * Currently DIRR_OK and DIRR_ERROR are treated the same way; + * in both cases the backend is expected to produce the appropriate + * error message on its own. + * + * DIRR_BADPARAM causes a generic error message to be printed. Note + * that it is an error, not a warning, even in the case of pragmas; + * don't use it where forward compatibility would be compromised + * (instead consider adding a DIRR_WARNPARAM.) + */ +enum directive_result { + DIRR_UNKNOWN, /* Directive not handled by backend */ + DIRR_OK, /* Directive processed */ + DIRR_ERROR, /* Directive processed unsuccessfully */ + DIRR_BADPARAM /* Print bad argument error message */ +}; + +/* + * A pragma facility: this structure is used to request passing a + * parsed pragma directive for a specific facility. If the handler is + * NULL then this pragma facility is recognized but ignored; pragma + * processing stops at that point. + * + * Note that the handler is passed a pointer to the facility structure + * as part of the struct pragma. + */ +struct pragma; +typedef enum directive_result (*pragma_handler)(const struct pragma *); + +struct pragma_facility { + const char *name; + pragma_handler handler; +}; + +/* + * This structure defines how a pragma directive is passed to a + * facility. This structure may be augmented in the future. + * + * Any facility MAY, but is not required to, add its operations + * keywords or a subset thereof into asm/directiv.dat, in which case + * the "opcode" field will be set to the corresponding D_ constant + * from directiv.h; otherwise it will be D_unknown. + */ +struct pragma { + const struct pragma_facility *facility; + const char *facility_name; /* Facility name exactly as entered by user */ + const char *opname; /* First word after the facility name */ + const char *tail; /* Anything after the operation */ + enum directive opcode; /* Operation as a D_ directives constant */ +}; + +/* + * These are semi-arbitrary limits to keep the assembler from going + * into a black hole on certain kinds of bugs. They can be overridden + * by command-line options or %pragma. + */ +enum nasm_limit { + LIMIT_PASSES, + LIMIT_STALLED, + LIMIT_MACRO_LEVELS, + LIMIT_MACRO_TOKENS, + LIMIT_MMACROS, + LIMIT_REP, + LIMIT_EVAL, + LIMIT_LINES, + LIMIT_PARAMS, + LIMIT_MAX /* Must be at end */ +}; + +#define LIMIT_MAX_VAL (INT64_MAX >> 1) /* Absolute maximum for any limit */ + +extern int64_t nasm_limit[LIMIT_MAX]; +extern enum directive_result nasm_set_limit(const char *, const char *); + +enum get_limit_which { + GET_LIMIT_CURRENT, + GET_LIMIT_INIT, + GET_LIMIT_DEFAULT, + GET_LIMIT_MAX +}; +extern int64_t nasm_get_limit(const char *, enum get_limit_which); +extern const char *nasm_limit_name(enum nasm_limit); + +/* + * The data structure defining an output format driver, and the + * interfaces to the functions therein. + */ +struct ofmt { + /* + * This is a short (one-liner) description of the type of + * output generated by the driver. + */ + const char *fullname; + + /* + * This is a single keyword used to select the driver. + */ + const char *shortname; + + /* + * Default output filename extension, or a null string + */ + const char *extension; + + /* + * Output format flags. + */ +#define OFMT_TEXT 1 /* Text file format */ +#define OFMT_KEEP_ADDR 2 /* Keep addr; no conversion to data */ +#define OFMT_ZERODATA 4 /* "Native" OUT_ZERODATA support */ + + unsigned int flags; + + int maxbits; /* Maximum segment bits supported */ + + /* + * this is a pointer to the first element of the debug information + */ + const struct dfmt * const *debug_formats; + + /* + * the default debugging format if -F is not specified + */ + const struct dfmt *default_dfmt; + + /* + * This, if non-NULL, is a NULL-terminated list of `char *'s + * pointing to extra standard macros supplied by the object + * format (e.g. a sensible initial default value of __?SECT?__, + * and user-level equivalents for any format-specific + * directives). + */ + macros_t *stdmac; + + /* + * This procedure is called at the start of an output session to set + * up internal parameters. + */ + void (*init)(void); + + /* + * This procedure is called at the start of each pass. + */ + void (*reset)(void); + + /* + * This is the modern output function, which gets passed + * a struct out_data with much more information. See the + * definition of struct out_data. + */ + void (*output)(const struct out_data *data); + + /* + * This procedure is called once for every symbol defined in + * the module being assembled. It gives the name and value of + * the symbol, in NASM's terms, and indicates whether it has + * been declared to be global. Note that the parameter "name", + * when passed, will point to a piece of static storage + * allocated inside the label manager - it's safe to keep using + * that pointer, because the label manager doesn't clean up + * until after the output driver has. + * + * Values of `is_global' are: 0 means the symbol is local; 1 + * means the symbol is global; 2 means the symbol is common (in + * which case `offset' holds the _size_ of the variable). + * Anything else is available for the output driver to use + * internally. + * + * This routine explicitly _is_ allowed to call the label + * manager to define further symbols, if it wants to, even + * though it's been called _from_ the label manager. That much + * re-entrancy is guaranteed in the label manager. However, the + * label manager will in turn call this routine, so it should + * be prepared to be re-entrant itself. + * + * The `special' parameter contains special information passed + * through from the command that defined the label: it may have + * been an EXTERN, a COMMON or a GLOBAL. The distinction should + * be obvious to the output format from the other parameters. + */ + void (*symdef)(char *name, int32_t segment, int64_t offset, + int is_global, char *special); + + /* + * This procedure is called when the source code requests a + * segment change. It should return the corresponding segment + * _number_ for the name, or NO_SEG if the name is not a valid + * segment name. + * + * It may also be called with NULL, in which case it is to + * return the _default_ section number for starting assembly in. + * + * It is allowed to modify the string it is given a pointer to. + * + * It is also allowed to specify a default instruction size for + * the segment, by setting `*bits' to 16, 32 or 64. Or, if it + * doesn't wish to define a default, it can leave `bits' alone. + */ + int32_t (*section)(char *name, int *bits); + + /* + * This function is called when a label is defined + * in the source code. It is allowed to change the section + * number as a result, but not the bits value. + * This is *only* called if the symbol defined is at the + * current offset, i.e. "foo:" or "foo equ $". + * The offset isn't passed; and may not be stable at this point. + * The subsection number is a field available for use by the + * backend. It is initialized to NO_SEG. + * + * If "copyoffset" is set by the backend then the offset is + * copied from the previous segment, otherwise the new segment + * is treated as a new segment the normal way. + */ + int32_t (*herelabel)(const char *name, enum label_type type, + int32_t seg, int32_t *subsection, + bool *copyoffset); + + /* + * This procedure is called to modify section alignment, + * note there is a trick, the alignment can only increase + */ + void (*sectalign)(int32_t seg, unsigned int value); + + /* + * This procedure is called to modify the segment base values + * returned from the SEG operator. It is given a segment base + * value (i.e. a segment value with the low bit set), and is + * required to produce in return a segment value which may be + * different. It can map segment bases to absolute numbers by + * means of returning SEG_ABS types. + * + * It should return NO_SEG if the segment base cannot be + * determined; the evaluator (which calls this routine) is + * responsible for throwing an error condition if that occurs + * in pass two or in a critical expression. + */ + int32_t (*segbase)(int32_t segment); + + /* + * This procedure is called to allow the output driver to + * process its own specific directives. When called, it has the + * directive word in `directive' and the parameter string in + * `value'. + * + * The following values are (currently) possible for + * directive_result: + * + * 0 - DIRR_UNKNOWN - directive not recognized by backend + * 1 - DIRR_OK - directive processed ok + * 2 - DIRR_ERROR - backend printed its own error message + * 3 - DIRR_BADPARAM - print the generic message + * "invalid parameter to [*] directive" + * + * When called with "value" as NULL (as opposed to the empty + * string!), it should perform no action and not print any + * messages, but return DIRR_UNKNOWN if this directive is + * unsupported by the backend, DIRR_OK if it is, and either + * DIRR_ERROR or DIRR_BADPARAM if it *would* be supported by the + * backend if configured otherwise, but it would be invalid in the + * current context, regardless of the parameter(s). + * + * This is used by %ifdirective. + */ + enum directive_result + (*directive)(enum directive directive, char *value); + + /* + * This procedure is called after assembly finishes, to allow + * the output driver to clean itself up and free its memory. + * Typically, it will also be the point at which the object + * file actually gets _written_. + * + * One thing the cleanup routine should always do is to close + * the output file pointer. + */ + void (*cleanup)(void); + + /* + * List of pragma facility names that apply to this backend. + */ + const struct pragma_facility *pragmas; +}; + +/* + * Output format driver alias + */ +struct ofmt_alias { + const char *shortname; + const struct ofmt *ofmt; +}; + +extern const struct ofmt *ofmt; +extern FILE *ofile; + +/* + * ------------------------------------------------------------ + * The data structure defining a debug format driver, and the + * interfaces to the functions therein. + * ------------------------------------------------------------ + */ +struct debug_macro_info; + +struct dfmt { + /* + * This is a short (one-liner) description of the type of + * output generated by the driver. + */ + const char *fullname; + + /* + * This is a single keyword used to select the driver. + */ + const char *shortname; + + /* + * init - called initially to set up local pointer to object format. + */ + void (*init)(void); + + /* + * linenum - called any time there is output with a change of + * line number or file. + */ + void (*linenum)(const char *filename, int32_t linenumber, int32_t segto); + + /* + * debug_deflabel - called whenever a label is defined. Parameters + * are the same as to 'symdef()' in the output format. This function + * is called after the output format version. + */ + + void (*debug_deflabel)(char *name, int32_t segment, int64_t offset, + int is_global, char *special); + + /* + * debug_smacros - called when an smacro is defined or undefined + * during the code-generation pass. The definition string contains + * the macro name, any arguments, a single space, and the macro + * definition; this is what is expected by e.g. DWARF. + * + * The definition is provided even for an undef. + */ + void (*debug_smacros)(bool define, const char *def); + + /* + * debug_include - called when a file is included or the include + * is finished during the code-generation pass. The filename is + * kept by the srcfile system and so can be compared for pointer + * equality. + * + * A filename of NULL means builtin (initial or %use) or command + * line statements. + */ + void (*debug_include)(bool start, struct src_location outer, + struct src_location inner); + + /* + * debug_mmacros - called once at the end with a definition for each + * non-.nolist macro that has been invoked at least once in the program, + * and the corresponding address ranges. See dbginfo.h. + */ + void (*debug_mmacros)(const struct debug_macro_info *); + + /* + * debug_directive - called whenever a DEBUG directive other than 'LINE' + * is encountered. 'directive' contains the first parameter to the + * DEBUG directive, and params contains the rest. For example, + * 'DEBUG VAR _somevar:int' would translate to a call to this + * function with 'directive' equal to "VAR" and 'params' equal to + * "_somevar:int". + */ + void (*debug_directive)(const char *directive, const char *params); + + /* + * typevalue - called whenever the assembler wishes to register a type + * for the last defined label. This routine MUST detect if a type was + * already registered and not re-register it. + */ + void (*debug_typevalue)(int32_t type); + + /* + * debug_output - called whenever output is required + * 'type' is the type of info required, and this is format-specific + */ + void (*debug_output)(int type, void *param); + + /* + * cleanup - called after processing of file is complete + */ + void (*cleanup)(void); + + /* + * List of pragma facility names that apply to this backend. + */ + const struct pragma_facility *pragmas; +}; + +extern const struct dfmt *dfmt; + +/* + * The type definition macros + * for debugging + * + * low 3 bits: reserved + * next 5 bits: type + * next 24 bits: number of elements for arrays (0 for labels) + */ + +#define TY_UNKNOWN 0x00 +#define TY_LABEL 0x08 +#define TY_BYTE 0x10 +#define TY_WORD 0x18 +#define TY_DWORD 0x20 +#define TY_FLOAT 0x28 +#define TY_QWORD 0x30 +#define TY_TBYTE 0x38 +#define TY_OWORD 0x40 +#define TY_YWORD 0x48 +#define TY_ZWORD 0x50 +#define TY_COMMON 0xE0 +#define TY_SEG 0xE8 +#define TY_EXTERN 0xF0 +#define TY_EQU 0xF8 + +#define TYM_TYPE(x) ((x) & 0xF8) +#define TYM_ELEMENTS(x) (((x) & 0xFFFFFF00) >> 8) + +#define TYS_ELEMENTS(x) ((x) << 8) + +/* Sizes corresponding to various tokens */ +enum byte_sizes { + SIZE_BYTE = 1, + SIZE_WORD = 2, + SIZE_DWORD = 4, + SIZE_LONG = 4, + SIZE_QWORD = 8, + SIZE_TWORD = 10, + SIZE_OWORD = 16, + SIZE_YWORD = 32, + SIZE_ZWORD = 64 +}; + +enum special_tokens { + SIZE_ENUM_START = PREFIX_ENUM_LIMIT, + S_BYTE = SIZE_ENUM_START, + S_WORD, + S_DWORD, + S_LONG, + S_QWORD, + S_TWORD, + S_OWORD, + S_YWORD, + S_ZWORD, + SIZE_ENUM_LIMIT, + + SPECIAL_ENUM_START = SIZE_ENUM_LIMIT, + S_ABS = SPECIAL_ENUM_START, + S_FAR, + S_NEAR, + S_NOSPLIT, + S_REL, + S_SHORT, + S_STRICT, + S_TO, + SPECIAL_ENUM_LIMIT +}; + +enum decorator_tokens { + DECORATOR_ENUM_START = SPECIAL_ENUM_LIMIT, + BRC_1TO2 = DECORATOR_ENUM_START, + BRC_1TO4, + BRC_1TO8, + BRC_1TO16, + BRC_1TO32, + BRC_RN, + BRC_RD, + BRC_RU, + BRC_RZ, + BRC_SAE, + BRC_Z, + DECORATOR_ENUM_LIMIT +}; + +/* + * AVX512 Decorator (decoflags_t) bits distribution (counted from 0) + * 3 2 1 + * 10987654321098765432109876543210 + * | + * | word boundary + * ............................1111 opmask + * ...........................1.... zeroing / merging + * ..........................1..... broadcast + * .........................1...... static rounding + * ........................1....... SAE + * ....................1111........ broadcast element size + * .................111............ number of broadcast elements + */ +#define OP_GENVAL(val, bits, shift) (((val) & ((UINT64_C(1) << (bits)) - 1)) << (shift)) + +/* + * Opmask register number + * identical to EVEX.aaa + * + * Bits: 0 - 3 + */ +#define OPMASK_SHIFT (0) +#define OPMASK_BITS (4) +#define OPMASK_MASK OP_GENMASK(OPMASK_BITS, OPMASK_SHIFT) +#define GEN_OPMASK(bit) OP_GENBIT(bit, OPMASK_SHIFT) +#define VAL_OPMASK(val) OP_GENVAL(val, OPMASK_BITS, OPMASK_SHIFT) + +/* + * zeroing / merging control available + * matching to EVEX.z + * + * Bits: 4 + */ +#define Z_SHIFT (4) +#define Z_BITS (1) +#define Z_MASK OP_GENMASK(Z_BITS, Z_SHIFT) +#define GEN_Z(bit) OP_GENBIT(bit, Z_SHIFT) + +/* + * broadcast - Whether this operand can be broadcasted + * + * Bits: 5 + */ +#define BRDCAST_SHIFT (5) +#define BRDCAST_BITS (1) +#define BRDCAST_MASK OP_GENMASK(BRDCAST_BITS, BRDCAST_SHIFT) +#define GEN_BRDCAST(bit) OP_GENBIT(bit, BRDCAST_SHIFT) + +/* + * Whether this instruction can have a static rounding mode. + * It goes with the last simd operand because the static rounding mode + * decorator is located between the last simd operand and imm8 (if any). + * + * Bits: 6 + */ +#define STATICRND_SHIFT (6) +#define STATICRND_BITS (1) +#define STATICRND_MASK OP_GENMASK(STATICRND_BITS, STATICRND_SHIFT) +#define GEN_STATICRND(bit) OP_GENBIT(bit, STATICRND_SHIFT) + +/* + * SAE(Suppress all exception) available + * + * Bits: 7 + */ +#define SAE_SHIFT (7) +#define SAE_BITS (1) +#define SAE_MASK OP_GENMASK(SAE_BITS, SAE_SHIFT) +#define GEN_SAE(bit) OP_GENBIT(bit, SAE_SHIFT) + +/* + * Broadcasting element size. + * + * Bits: 8 - 11 + */ +#define BRSIZE_SHIFT (8) +#define BRSIZE_BITS (4) +#define BRSIZE_MASK OP_GENMASK(BRSIZE_BITS, BRSIZE_SHIFT) +#define GEN_BRSIZE(bit) OP_GENBIT(bit, BRSIZE_SHIFT) + +#define BR_BITS8 GEN_BRSIZE(0) /* For potential future use */ +#define BR_BITS16 GEN_BRSIZE(1) +#define BR_BITS32 GEN_BRSIZE(2) +#define BR_BITS64 GEN_BRSIZE(3) + +/* + * Number of broadcasting elements + * + * Bits: 12 - 14 + */ +#define BRNUM_SHIFT (12) +#define BRNUM_BITS (3) +#define BRNUM_MASK OP_GENMASK(BRNUM_BITS, BRNUM_SHIFT) +#define VAL_BRNUM(val) OP_GENVAL(val, BRNUM_BITS, BRNUM_SHIFT) + +#define BR_1TO2 VAL_BRNUM(0) +#define BR_1TO4 VAL_BRNUM(1) +#define BR_1TO8 VAL_BRNUM(2) +#define BR_1TO16 VAL_BRNUM(3) +#define BR_1TO32 VAL_BRNUM(4) +#define BR_1TO64 VAL_BRNUM(5) /* For potential future use */ + +#define MASK OPMASK_MASK /* Opmask (k1 ~ 7) can be used */ +#define Z Z_MASK +#define B16 (BRDCAST_MASK|BR_BITS16) /* {1to32} : broadcast 16b * 32 to zmm(512b) */ +#define B32 (BRDCAST_MASK|BR_BITS32) /* {1to16} : broadcast 32b * 16 to zmm(512b) */ +#define B64 (BRDCAST_MASK|BR_BITS64) /* {1to8} : broadcast 64b * 8 to zmm(512b) */ +#define ER STATICRND_MASK /* ER(Embedded Rounding) == Static rounding mode */ +#define SAE SAE_MASK /* SAE(Suppress All Exception) */ + +/* + * Broadcast flags (BR_BITS*) to sizes (BITS*) + */ +static inline opflags_t brsize_to_size(opflags_t brbits) +{ + return (brbits & BRSIZE_MASK) << (SIZE_SHIFT - BRSIZE_SHIFT); +} + +/* + * Global modes + */ + +/* + * Various types of compiler passes we may execute. + * If these are changed, you need to also change _pass_types[] + * in asm/nasm.c. + */ +enum pass_type { + PASS_INIT, /* Initialization, not doing anything yet */ + PASS_PREPROC, /* Preprocess-only mode (similar to PASS_FIRST) */ + PASS_FIRST, /* The very first pass over the code */ + PASS_OPT, /* Optimization pass */ + PASS_STAB, /* Stabilization pass (original pass 1) */ + PASS_FINAL /* Code generation pass (original pass 2) */ +}; +extern const char * const _pass_types[]; +extern enum pass_type _pass_type; +static inline enum pass_type pass_type(void) +{ + return _pass_type; +} +static inline const char *pass_type_name(void) +{ + return _pass_types[_pass_type]; +} +/* True during initialization, no code read yet */ +static inline bool not_started(void) +{ + return pass_type() == PASS_INIT; +} +/* True for the initial pass and setup (old "pass2 < 2") */ +static inline bool pass_first(void) +{ + return pass_type() <= PASS_FIRST; +} +/* At this point we better have stable definitions */ +static inline bool pass_stable(void) +{ + return pass_type() >= PASS_STAB; +} +/* True for the code generation pass only, (old "pass1 >= 2") */ +static inline bool pass_final(void) +{ + return pass_type() >= PASS_FINAL; +} +/* True for code generation *or* preprocess-only mode */ +static inline bool pass_final_or_preproc(void) +{ + return pass_type() >= PASS_FINAL || pass_type() == PASS_PREPROC; +} + +/* + * The actual pass number. 0 is used during initialization, the very + * first pass is 1, and then it is simply increasing numbers until we are + * done. + */ +extern int64_t _passn; /* Actual pass number */ +static inline int64_t pass_count(void) +{ + return _passn; +} + +extern enum optimization optimizing; + +/* Pass-wide state; reset on top of each pass */ +struct globalopt { + int bits; /* 16, 32 or 64-bit mode */ + enum ea_flags rel; /* default to relative addressing? */ + enum ea_flags reldef; /* default rel/abs explicitly defined? */ + bool bnd; /* default to using bnd prefix? */ + bool dollarhex; /* $-prefixed hexadecimal numbers? */ +}; +extern struct globalopt globl; +void reset_global_defaults(int bits); + +/* + * Switch to a different segment and return the current offset + */ +int64_t switch_segment(int32_t segment); + +#endif /* NASM_NASM_H */ diff --git a/include/nasmint.h b/include/nasmint.h new file mode 100644 index 0000000..6be623b --- /dev/null +++ b/include/nasmint.h @@ -0,0 +1,219 @@ +/* + * nasmint.h + * + * Small ersatz subset of , deriving the types from + * . + * + * Important: the preprocessor may truncate numbers too large for it. + * Therefore, test the signed types only ... truncation won't generate + * a 01111111... bit pattern. + */ + +#ifndef NASM_NASMINT_H +#define NASM_NASMINT_H + +#include + +/*** 64-bit type: __int64, long or long long ***/ + +/* Some old versions of gcc omit LLONG_MAX */ +#ifndef LLONG_MAX +# ifdef __LONG_LONG_MAX__ +# define LLONG_MAX __LONG_LONG_MAX__ +# else +# define LLONG_MAX 0 /* Assume long long is unusable */ +# endif +#endif + +#ifndef _I64_MAX +# ifdef _MSC_VER +# define _I64_MAX 9223372036854775807 +# else +# define _I64_MAX 0 +# endif +#endif + +#if _I64_MAX == 9223372036854775807 + +/* Windows-based compiler: use __int64 */ +typedef signed __int64 int64_t; +typedef unsigned __int64 uint64_t; +#define _scn64 "I64" +#define _pri64 "I64" +#define INT64_C(x) x ## i64 +#define UINT64_C(x) x ## ui64 + +#elif LONG_MAX == 9223372036854775807L + +/* long is 64 bits */ +typedef signed long int64_t; +typedef unsigned long uint64_t; +#define _scn64 "l" +#define _pri64 "l" +#define INT64_C(x) x ## L +#define UINT64_C(x) x ## UL + +#elif LLONG_MAX == 9223372036854775807LL + +/* long long is 64 bits */ +typedef signed long long int64_t; +typedef unsigned long long uint64_t; +#define _scn64 "ll" +#define _pri64 "ll" +#define INT64_C(x) x ## LL +#define UINT64_C(x) x ## ULL + +#else + +#error "Neither long nor long long is 64 bits in size" + +#endif + +/*** 32-bit type: int or long ***/ + +#if INT_MAX == 2147483647 + +/* int is 32 bits */ +typedef signed int int32_t; +typedef unsigned int uint32_t; +#define _scn32 "" +#define _pri32 "" +#define INT32_C(x) x +#define UINT32_C(x) x ## U + +#elif LONG_MAX == 2147483647L + +/* long is 32 bits */ +typedef signed long int32_t; +typedef unsigned long uint32_t; +#define _scn32 "l" +#define _pri32 "l" +#define INT32_C(x) x ## L +#define UINT32_C(x) x ## UL + +#else + +#error "Neither int nor long is 32 bits in size" + +#endif + +/*** 16-bit size: int or short ***/ + +#if INT_MAX == 32767 + +/* int is 16 bits */ +typedef signed int int16_t; +typedef unsigned int uint16_t; +#define _scn16 "" +#define _pri16 "" +#define INT16_C(x) x +#define UINT16_C(x) x ## U + +#elif SHRT_MAX == 32767 + +/* short is 16 bits */ +typedef signed short int16_t; +typedef unsigned short uint16_t; +#define _scn16 "h" +#define _pri16 "" +#define INT16_C(x) x +#define UINT16_C(x) x ## U + +#else + +#error "Neither short nor int is 16 bits in size" + +#endif + +/*** 8-bit size: char ***/ + +#if SCHAR_MAX == 127 + +/* char is 8 bits */ +typedef signed char int8_t; +typedef unsigned char uint8_t; +#define _scn8 "hh" +#define _pri8 "" +#define INT8_C(x) x +#define UINT8_C(x) x ## U + +#else + +#error "char is not 8 bits in size" + +#endif + +/* The rest of this is common to all models */ + +#define PRId8 _pri8 "d" +#define PRId16 _pri16 "d" +#define PRId32 _pri32 "d" +#define PRId64 _pri64 "d" + +#define PRIi8 _pri8 "i" +#define PRIi16 _pri16 "i" +#define PRIi32 _pri32 "i" +#define PRIi64 _pri64 "i" + +#define PRIo8 _pri8 "o" +#define PRIo16 _pri16 "o" +#define PRIo32 _pri32 "o" +#define PRIo64 _pri64 "o" + +#define PRIu8 _pri8 "u" +#define PRIu16 _pri16 "u" +#define PRIu32 _pri32 "u" +#define PRIu64 _pri64 "u" + +#define PRIx8 _pri8 "x" +#define PRIx16 _pri16 "x" +#define PRIx32 _pri32 "x" +#define PRIx64 _pri64 "x" + +#define PRIX8 _pri8 "X" +#define PRIX16 _pri16 "X" +#define PRIX32 _pri32 "X" +#define PRIX64 _pri64 "X" + +#define SCNd8 _scn8 "d" +#define SCNd16 _scn16 "d" +#define SCNd32 _scn32 "d" +#define SCNd64 _scn64 "d" + +#define SCNi8 _scn8 "i" +#define SCNi16 _scn16 "i" +#define SCNi32 _scn32 "i" +#define SCNi64 _scn64 "i" + +#define SCNo8 _scn8 "o" +#define SCNo16 _scn16 "o" +#define SCNo32 _scn32 "o" +#define SCNo64 _scn64 "o" + +#define SCNu8 _scn8 "u" +#define SCNu16 _scn16 "u" +#define SCNu32 _scn32 "u" +#define SCNu64 _scn64 "u" + +#define SCNx8 _scn8 "x" +#define SCNx16 _scn16 "x" +#define SCNx32 _scn32 "x" +#define SCNx64 _scn64 "x" + +#define INT8_MIN INT8_C(-128) +#define INT8_MAX INT8_C(127) +#define UINT8_MAX UINT8_C(255) + +#define INT16_MIN INT16_C(-32768) +#define INT16_MAX INT16_C(32767) +#define UINT16_MAX UINT16_C(65535) + +#define INT32_MIN INT32_C(-2147483648) +#define INT32_MAX INT32_C(2147483647) +#define UINT32_MAX UINT32_C(4294967295) + +#define INT64_MIN INT64_C(-9223372036854775808) +#define INT64_MAX INT64_C(9223372036854775807) +#define UINT64_MAX UINT64_C(18446744073709551615) + +#endif /* NASM_NASMINT_H */ diff --git a/include/nasmlib.h b/include/nasmlib.h new file mode 100644 index 0000000..8e768cf --- /dev/null +++ b/include/nasmlib.h @@ -0,0 +1,627 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 1996-2025 The NASM Authors - All Rights Reserved */ + +/* + * nasmlib.h header file for nasmlib.c + */ + +#ifndef NASM_NASMLIB_H +#define NASM_NASMLIB_H + +#include "compiler.h" +#include "bytesex.h" + +/* + * Useful construct for private values + */ +union intorptr { + int64_t i; + uint64_t u; + size_t s; + void *p; + const void *cp; + uintptr_t up; +}; +typedef union intorptr intorptr; + +/* + * Handy macro to use as the base of shifts + */ +#define ONE ((uintmax_t)1) + +/* + * Handy macros for defining and accessing enums of bitfields; + * provides a set of standard-named parameters for each field. + * + * mk_field_mask() is indended to be used for non-contiguous fields. + */ + +#define mk_field_mask(name,pos,width,basemask) \ + name ## _POS = (pos), \ + name ## _WIDTH = (width), \ + name ## _BASEMASK = (basemask), \ + name ## _MASK = name ## _BASEMASK << name ## _POS, \ + name = name ## _MASK + +#define mk_field(name,pos,width) \ + mk_field_mask(name,pos,width, \ + (1 << name ## _WIDTH)-1) + +/* + * Cast a value to a suitable type to represent the encoded + * (post-shift) and extracted (pre-shift) values, respectively. + */ +#ifdef HAVE_TYPEOF +# define fieldenc_cast(x,y) ((typeof(x ## _MASK))(y)) +# define fieldval_cast(x,y) ((typeof(x ## _BASEMASK))(y)) +#else +/* + * Using int here matches the strict ISO C before C23 which only allows + * an enum to be in the range of "int". This also means that these macros + * are only usable for bitfields up to 32 bits wide, which is extremely + * unfortunate, but covers most of all the NASM use cases. + * + * The (int) should at least give a warning on overflow. + */ +# define fieldenc_cast(x,y) ((int)(y)) +# define fieldval_cast(x,y) (y) +#endif + +/* + * Macros to get/set bitfield values (the set macro returns the + * updated value, it does not change the input.) + * + * The fieldenc() macro produces the masked and shifted value + * corresponding to a base value; it is equivalent to + * setfield(field,0,val). + */ +#define getfield(field,from) \ + fieldval_cast(field, \ + (((from) >> field ## _POS) & \ + field ## _BASEMASK)) +#define fieldval(field,val) \ + (((val) & fieldenc_cast(field,field ## _BASEMASK)) \ + << field ## _POS) +#define setfield(field,from,val) \ + (((from) & ~(field ## _MASK)) + fieldval(field,val)) + +/* + * Wrappers around malloc, realloc, free and a few more. nasm_malloc + * will fatal-error and die rather than return NULL; nasm_realloc will + * do likewise, and will also guarantee to work right on being passed + * a NULL pointer; nasm_free will do nothing if it is passed a NULL + * pointer. + */ +void * safe_malloc(1) nasm_malloc(size_t); +void * safe_malloc(1) nasm_zalloc(size_t); +void * safe_malloc2(1,2) nasm_calloc(size_t, size_t); +void * safe_realloc(2) nasm_realloc(void *, size_t); +void nasm_free(void *); +char * safe_alloc nasm_strdup(const char *); +char * safe_alloc nasm_strndup(const char *, size_t); +char * safe_alloc nasm_strcat(const char *one, const char *two); +char * safe_alloc end_with_null nasm_strcatn(const char *one, ...); + +/* + * Replace a string in a string pointer variable with a nasm_strdup() + * copy of the argument on the right, freeing the contents of the + * previous contents of the variable if non-NULL. + * + * If *str is NULL, simply return the old value of *ptrp. + */ +char *nasm_strdupto(char **ptrp, const char *str); + +/* + * Similar, but the new pointer must already have been heap allocated + * by the creating function. + */ +static inline char *nasm_strto(char **ptrp, char *str) +{ + char *ptr = *ptrp; + if (!str) + return ptr; + if (ptr) + nasm_free(ptr); + return *ptrp = str; +} + +/* + * nasm_[v]asprintf() are variants of the semi-standard [v]asprintf() + * functions, except that we return the pointer instead of a count. + * The size of the string (including the final NUL!) is available + * by calling nasm_last_string_size() afterwards. + * + * nasm_[v]axprintf() are similar, but allocates a user-defined amount + * of storage before the string, and returns a pointer to the + * allocated buffer. The value of nasm_last_string_size() does *not* include + * this additional storage. + */ +char * safe_alloc printf_func(1, 2) nasm_asprintf(const char *fmt, ...); +char * safe_alloc vprintf_func(1) nasm_vasprintf(const char *fmt, va_list ap); +void * safe_alloc printf_func(2, 3) nasm_axprintf(size_t extra, const char *fmt, ...); +void * safe_alloc vprintf_func(2) nasm_vaxprintf(size_t extra, const char *fmt, va_list ap); + +/* + * nasm_last_string_len() returns the length of the last string allocated + * by [v]asprintf, nasm_strdup, nasm_strcat, or nasm_strcatn. + * + * nasm_last_string_size() returns the equivalent size including the + * final NUL. + */ +static inline size_t nasm_last_string_len(void) +{ + extern size_t _nasm_last_string_size; + return _nasm_last_string_size - 1; +} +static inline size_t nasm_last_string_size(void) +{ + extern size_t _nasm_last_string_size; + return _nasm_last_string_size; +} + +/* + * All zero data buffer + */ +#define ZERO_BUF_SIZE 65536 /* Default value */ +#if defined(BUFSIZ) && (BUFSIZ > ZERO_BUF_SIZE) +# undef ZERO_BUF_SIZE +# define ZERO_BUF_SIZE BUFSIZ +#endif +extern const uint8_t zero_buffer[ZERO_BUF_SIZE]; + +/* + * Statically assert the argument is a pointer without evaluating it. + * ? : requires that the types on both sides are compatible, and + * const volatile void * is compatible with any pointer type. + * Avoid a simple cast from NULL because it might make some compilers + * confused; a pointer to any object works there. + */ +#define nasm_assert_pointer(p) \ + ((void)sizeof(1 ? (p) : (const volatile void *)&zero_buffer)) + +#define nasm_new(p) ((p) = nasm_zalloc(sizeof(*(p)))) +#define nasm_newn(p,n) ((p) = nasm_calloc((n), sizeof(*(p)))) +/* + * This is broken on platforms where there are pointers which don't + * match void * in their internal layout. It unfortunately also + * loses any "const" part of the argument, although hopefully the + * compiler will warn in that case. + */ +#define nasm_delete(p) \ + do { \ + void **_pp = (void **)&(p); \ + nasm_assert_pointer(p); \ + nasm_free(*_pp); \ + *_pp = NULL; \ + } while (0) +#define nasm_zero(x) (memset(&(x), 0, sizeof(x))) +#define nasm_zeron(p,n) (memset((p), 0, (n)*sizeof(*(p)))) + +/* + * Wrappers around fread()/fwrite() which fatal-errors on failure. + * For fread(), only use this if EOF is supposed to be a fatal error! + */ +void nasm_read(void *, size_t, FILE *); +void nasm_write(const void *, size_t, FILE *); + +/* + * NASM failure at build time if the argument is false + */ +#ifdef static_assert +# define nasm_static_assert(x) static_assert((x), #x) +#elif defined(HAVE_FUNC_ATTRIBUTE_ERROR) && defined(__OPTIMIZE__) +# define nasm_static_assert(x) \ + do { \ + if (!(x)) { \ + extern void __attribute__((error("assertion " #x " failed"))) \ + _nasm_static_fail(void); \ + _nasm_static_fail(); \ + } \ + } while (0) +#else +/* See http://www.drdobbs.com/compile-time-assertions/184401873 */ +# define nasm_static_assert(x) \ + do { enum { _static_assert_failed = 1/(!!(x)) }; } while (0) +#endif + +/* + * conditional static assert, if we know it is possible to determine + * the assert value at compile time. Since if_constant triggers + * pedantic warnings on gcc, turn them off explicitly around this code. + */ +#ifdef static_assert +# define nasm_try_static_assert(x) \ + do { \ + not_pedantic_start \ + static_assert(if_constant(x, true), #x); \ + not_pedantic_end \ + } while (0) +#elif defined(HAVE_FUNC_ATTRIBUTE_ERROR) && defined(__OPTIMIZE__) +# define nasm_try_static_assert(x) \ + do { \ + if (!if_constant(x, true)) { \ + extern void __attribute__((error("assertion " #x " failed"))) \ + _nasm_static_fail(void); \ + _nasm_static_fail(); \ + } \ + } while (0) +#else +# define nasm_try_static_assert(x) ((void)0) +#endif + +/* + * NASM assert failure + */ +fatal_func nasm_assert_failed(const char *msg, const char *func, + const char *file, int line); + +/* Plain assert, gives the source location as an error message */ +#define nasm_assert(x) \ + do { \ + nasm_try_static_assert(x); \ + if (unlikely(!(x))) \ + nasm_assert_failed(#x,NASM_FUNC,__FILE__,__LINE__); \ + } while (0) + +/* Assert with custom message */ +#define nasm_assert_msg(x,m) \ + do { \ + nasm_try_static_assert(x); \ + if (unlikely(!(x))) \ + nasm_panic("%s", m); \ + } while (0) + +/* Utility function to generate a string for an invalid enum */ +const char *invalid_enum_str(int); + +/* + * ANSI doesn't guarantee the presence of `stricmp' or + * `strcasecmp'. + */ +#if defined(HAVE_STRCASECMP) +#define nasm_stricmp strcasecmp +#elif defined(HAVE_STRICMP) +#define nasm_stricmp stricmp +#else +int pure_func nasm_stricmp(const char *, const char *); +#endif + +#if defined(HAVE_STRNCASECMP) +#define nasm_strnicmp strncasecmp +#elif defined(HAVE_STRNICMP) +#define nasm_strnicmp strnicmp +#else +int pure_func nasm_strnicmp(const char *, const char *, size_t); +#endif + +int pure_func nasm_memicmp(const char *, const char *, size_t); + +#if defined(HAVE_STRSEP) +#define nasm_strsep strsep +#else +char *nasm_strsep(char **stringp, const char *delim); +#endif + +#ifndef HAVE_DECL_STRNLEN +size_t pure_func strnlen(const char *, size_t); +#endif + +/* This returns the numeric value of a given 'digit'; no check for validity */ +static inline unsigned int numvalue(unsigned char c) +{ + c |= 0x20; + return c >= 'a' ? c - 'a' + 10 : c - '0'; +} + +/* The same except returns -1U for non-digits, so it can be directly + * compared against the base used to test for validity. */ +static inline unsigned int numvalue_chk(unsigned char c) +{ + unsigned int v; + v = c - '0'; + if (v < 10) + return v; + + v = (c | 0x20) - 'a'; + if (v < 26) + return v + 10; + + return -1U; +} + +/* + * Convert a string into a number, using NASM number rules. Sets + * `*error' to true if an error occurs, and false otherwise. + */ +int64_t readnum(const char *str, bool *error); + +/* + * Warn for the use of $ as a hexadecimal prefix + */ +void warn_dollar_hex(void); + +/* + * Get the numeric base corresponding to a character + */ +static inline unsigned int radix_letter(char c) +{ + switch (c) { + case 'b': case 'B': + case 'y': case 'Y': + return 2; /* Binary */ + case 'o': case 'O': + case 'q': case 'Q': + return 8; /* Octal */ + case 'h': case 'H': + case 'x': case 'X': + return 16; /* Hexadecimal */ + case 'd': case 'D': + case 't': case 'T': + return 10; /* Decimal */ + default: + return 0; /* Not a known radix letter */ + } +} + +/* + * Convert a character constant into a number. Sets + * `*warn' to true if an overflow occurs, and false otherwise. + * str points to and length covers the middle of the string, + * without the quotes. + */ +int64_t readstrnum(char *str, int length, bool *warn); + +/* + * Produce an unsigned integer string from a number with a specified + * base, digits and signedness + */ +#define NUMSTR_MAXBASE 64 +int numstr(char *buf, size_t buflen, uint64_t n, + int digits, unsigned int base, bool ucase); + +extern const char * const nasmlib_digit_chars[2]; +static inline const char *nasm_digit_chars(bool ucase) +{ + return nasmlib_digit_chars[ucase]; +} + +/* + * seg_alloc: allocate a hitherto unused segment number. + */ +int32_t seg_alloc(void); + +/* + * Add/replace or remove an extension to the end of a filename; + * returns a newly allocated buffer with the modified filename. + */ +char *filename_set_extension(const char *inname, const char *extension); + +/* + * Utility macros... + * + * This is a useful #define which I keep meaning to use more often: + * the number of elements of a statically defined array. + */ +#define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0])) +#define ARRAY_END(arr) (&(arr)[ARRAY_SIZE(arr)]) +#define array_for_each(var,arr) \ + for ((var) = (arr); (var) < ARRAY_END(arr); (var)++) + + +/* + * List handling + * + * list_for_each - regular iterator over list + * list_for_each_safe - the same but safe against list items removal + * list_last - find the last element in a list + * list_reverse - reverse the order of a list + * + * Arguments named with _ + single letter should be temp variables + * of the appropriate pointer type. + */ +#define list_for_each(pos, head) \ + for (pos = head; pos; pos = pos->next) +#define list_for_each_safe(pos, _n, head) \ + for (pos = head, _n = (pos ? pos->next : NULL); pos; \ + pos = _n, _n = (_n ? _n->next : NULL)) +#define list_last(pos, head) \ + do { \ + for (pos = head; pos && pos->next; pos = pos->next) \ + ; \ + } while (0) +#define list_reverse(head) \ + do { \ + void *_p, *_n; \ + if (!head || !head->next) \ + break; \ + _p = NULL; \ + while (head) { \ + _n = head->next; \ + head->next = _p; \ + _p = head; \ + head = _n; \ + } \ + head = _p; \ + } while (0) + +/* + * Power of 2 align helpers + */ +#undef ALIGN_MASK /* Some BSD flavors define these in system headers */ +#undef ALIGN +#define ALIGN_MASK(v, mask) (((v) + (mask)) & ~(mask)) +#define ALIGN(v, a) ALIGN_MASK(v, (a) - 1) +#define IS_ALIGNED(v, a) (((v) & ((a) - 1)) == 0) + +/* + * Routines to write littleendian data to a file + */ +#define fwriteint8_t(d,f) putc(d,f) +void fwriteint16_t(uint16_t data, FILE * fp); +void fwriteint32_t(uint32_t data, FILE * fp); +void fwriteint64_t(uint64_t data, FILE * fp); +void fwriteaddr(uint64_t data, int size, FILE * fp); + +/* + * Binary search routine. Returns index into `array' of an entry + * matching `string', or <0 if no match. `array' is taken to + * contain `size' elements. + * + * bsi() is case sensitive, bsii() is case insensitive. + */ +int pure_func bsi(const char *string, const char **array, int size); +int pure_func bsii(const char *string, const char **array, int size); + +/* + * Convenient string processing helper routines + */ +char * pure_func nasm_skip_spaces(const char *p); +char * pure_func nasm_skip_word(const char *p); +char *nasm_zap_spaces_fwd(char *p); +char *nasm_zap_spaces_rev(char *p); +char *nasm_trim_spaces(char *p); +char *nasm_get_word(char *p, char **tail); +char *nasm_opt_val(char *p, char **opt, char **val); + +/* + * Converts a relative pathname rel_path into an absolute path name. + * + * The buffer returned must be freed by the caller + */ +char * safe_alloc nasm_realpath(const char *rel_path); + +/* + * Path-splitting and merging functions + */ +char * safe_alloc nasm_dirname(const char *path); +char * safe_alloc nasm_basename(const char *path); +char * safe_alloc nasm_catfile(const char *dir, const char *path); + +/* + * Various tokens to readable strings, with limit checking + */ +const char * const_func register_name(int); +const char * const_func prefix_name(int); +bool const_func is_hint_nop(uint64_t); + +/* + * Wrappers around fopen()... for future change to a dedicated structure + */ +enum file_flags { + NF_BINARY = 0x00000000, /* Binary file (default) */ + NF_TEXT = 0x00000001, /* Text file */ + NF_NONFATAL = 0x00000000, /* Don't die on open failure (default) */ + NF_FATAL = 0x00000002, /* Die on open failure */ + NF_FORMAP = 0x00000004, /* Intended to use nasm_map_file() */ + NF_IONBF = 0x00000010, /* Force unbuffered stdio */ + NF_IOLBF = 0x00000020, /* Force line buffered stdio */ + NF_IOFBF = 0000000030 /* Force fully buffered stdio */ +}; +#define NF_BUF_MASK 0x30 + +FILE *nasm_open_read(const char *filename, enum file_flags flags); +FILE *nasm_open_write(const char *filename, enum file_flags flags); + +void nasm_set_binary_mode(FILE *f); + +/* Probe for existence of a file */ +bool nasm_file_exists(const char *filename); + +/* Missing fseeko/ftello */ +#ifndef HAVE_FSEEKO +# undef off_t /* Just in case it is a macro */ +# ifdef HAVE__FSEEKI64 +# define fseeko _fseeki64 +# define ftello _ftelli64 +# define off_t int64_t +# else +# define fseeko fseek +# define ftello ftell +# define off_t long +# endif +#endif + +const void *nasm_map_file(FILE *fp, off_t start, off_t len); +void nasm_unmap_file(const void *p, size_t len); +off_t nasm_file_size(FILE *f); +off_t nasm_file_size_by_path(const char *pathname); +bool nasm_file_time(time_t *t, const char *pathname); +void fwritezero(off_t bytes, FILE *fp); + +/* Remove a file; explicitly defined to ignore a NULL or empty pathname */ +int nasm_remove(const char *pathname); + +/* Sign-extend a value to an arbitrary number of bits */ +static inline int64_t const_func sext(int64_t value, unsigned int bits) +{ + if (is_constant(bits)) { + switch (bits) { + case 8: + return (int8_t)value; + case 16: + return (int16_t)value; + case 32: + return (int32_t)value; + default: + break; + } + } + + if (bits >= 64) + return value; + + /* sext(foo,0) == sext(foo,1) */ + bits = bits ? 64-bits : 63; + + return value << bits >> bits; +} + +/* Zero-extend a value to an arbitrary number of bits */ +static inline uint64_t const_func zext(uint64_t value, unsigned int bits) +{ + if (is_constant(bits)) { + switch (bits) { + case 8: + return (uint8_t)value; + case 16: + return (uint16_t)value; + case 32: + return (uint32_t)value; + default: + break; + } + } + + if (bits >= 64) + return value; + + if (!bits) + return 0; + + bits = 64-bits; + return value << bits >> bits; +} + +static inline bool const_func overflow_signed(int64_t value, unsigned int bytes) +{ + return sext(value, bytes << 3) != value; +} + +static inline bool const_func overflow_unsigned(uint64_t value, unsigned int bytes) +{ + return zext(value, bytes << 3) != value; +} + +/* This is very conservative, but otherwise things like ~0x80 break */ +static inline bool const_func overflow_general(int64_t value, unsigned int bytes) +{ + return overflow_unsigned(value, bytes) && overflow_unsigned(-value, bytes); +} + +/* check if value is power of 2 */ +#define is_power2(v) ((v) && ((v) & ((v) - 1)) == 0) + +/* try to get the system stack size */ +extern size_t nasm_get_stack_size_limit(void); + +#endif diff --git a/include/nctype.h b/include/nctype.h new file mode 100644 index 0000000..076a840 --- /dev/null +++ b/include/nctype.h @@ -0,0 +1,108 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 1996-2025 The NASM Authors - All Rights Reserved */ + +/* + * ctype-like functions specific to NASM + */ +#ifndef NASM_NCTYPE_H +#define NASM_NCTYPE_H + +#include "compiler.h" + +void nasm_ctype_init(void); + +extern unsigned char nasm_tolower_tab[256]; +static inline char nasm_tolower(char x) +{ + return nasm_tolower_tab[(unsigned char)x]; +} + +/* + * NASM ctype table + */ +enum nasm_ctype { + NCT_CTRL = 0x0001, + NCT_SPACE = 0x0002, + NCT_ASCII = 0x0004, + NCT_LOWER = 0x0008, /* isalpha(x) && tolower(x) == x */ + NCT_UPPER = 0x0010, /* isalpha(x) && tolower(x) != x */ + NCT_DIGIT = 0x0020, + NCT_HEX = 0x0040, + NCT_ID = 0x0080, + NCT_IDSTART = 0x0100, + NCT_MINUS = 0x0200, /* - */ + NCT_DOLLAR = 0x0400, /* $ */ + NCT_UNDER = 0x0800, /* _ */ + NCT_QUOTE = 0x1000 /* " ' ` */ +}; + +extern uint16_t nasm_ctype_tab[256]; +static inline bool nasm_ctype(unsigned char x, enum nasm_ctype mask) +{ + return (nasm_ctype_tab[x] & mask) != 0; +} + +static inline bool nasm_isspace(char x) +{ + return nasm_ctype(x, NCT_SPACE); +} + +static inline bool nasm_isalpha(char x) +{ + return nasm_ctype(x, NCT_LOWER|NCT_UPPER); +} + +static inline bool nasm_isdigit(char x) +{ + return nasm_ctype(x, NCT_DIGIT); +} +static inline bool nasm_isalnum(char x) +{ + return nasm_ctype(x, NCT_LOWER|NCT_UPPER|NCT_DIGIT); +} +static inline bool nasm_isxdigit(char x) +{ + return nasm_ctype(x, NCT_HEX); +} +static inline bool nasm_isidstart(char x) +{ + return nasm_ctype(x, NCT_IDSTART); +} +static inline bool nasm_isidchar(char x) +{ + return nasm_ctype(x, NCT_ID); +} +static inline bool nasm_isbrcchar(char x) +{ + return nasm_ctype(x, NCT_ID|NCT_MINUS); +} +static inline bool nasm_isnumstart(char x) +{ + return nasm_ctype(x, NCT_DIGIT|NCT_DOLLAR); +} +static inline bool nasm_isnumchar(char x) +{ + return nasm_ctype(x, NCT_DIGIT|NCT_LOWER|NCT_UPPER|NCT_UNDER); +} +static inline bool nasm_isquote(char x) +{ + return nasm_ctype(x, NCT_QUOTE); +} + +static inline void nasm_ctype_tasm_mode(void) +{ + /* No differences at the present moment */ +} + +/* Returns a value >= 16 if not a valid hex digit */ +static inline unsigned int nasm_hexval(char c) +{ + unsigned int v = (unsigned char) c; + + if (v >= '0' && v <= '9') + return v - '0'; + else + return (v|0x20) - 'a' + 10; +} + +#endif /* NASM_NCTYPE_H */ diff --git a/include/opflags.h b/include/opflags.h new file mode 100644 index 0000000..0d64394 --- /dev/null +++ b/include/opflags.h @@ -0,0 +1,320 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 1996-2024 The NASM Authors - All Rights Reserved */ + +/* + * opflags.h - operand flags + */ + +#ifndef NASM_OPFLAGS_H +#define NASM_OPFLAGS_H + +#include "compiler.h" +#include "tables.h" +#include "regs.h" + +/* + * Here we define the operand types. These are implemented as bit + * masks, since some are subsets of others; e.g. AX in a MOV + * instruction is a special operand type, whereas AX in other + * contexts is just another 16-bit register. (Also, consider CL in + * shift instructions, DX in OUT, etc.) + * + * The basic concept here is that + * (class & ~operand) == 0 + * + * if and only if "operand" belongs to class type "class". + */ + +#define OP_GENMASK(bits, shift) (((UINT64_C(1) << (bits)) - 1) << (shift)) +#define OP_GENBIT(bit, shift) (UINT64_C(1) << ((shift) + (bit))) + +/* + * Type of operand: memory reference, register, etc. + * + * Bits: 0 - 3 + */ +#define OPTYPE_SHIFT (0) +#define OPTYPE_BITS (4) +#define OPTYPE_MASK OP_GENMASK(OPTYPE_BITS, OPTYPE_SHIFT) +#define GEN_OPTYPE(bit) OP_GENBIT(bit, OPTYPE_SHIFT) + +/* + * Modifiers. + * + * Bits: 4 - 6 + */ +#define MODIFIER_SHIFT (OPTYPE_SHIFT + OPTYPE_BITS) +#define MODIFIER_BITS (3) +#define MODIFIER_MASK OP_GENMASK(MODIFIER_BITS, MODIFIER_SHIFT) +#define GEN_MODIFIER(bit) OP_GENBIT(bit, MODIFIER_SHIFT) + +/* + * Register classes. + * + * Bits: 7 - 17 + */ +#define REG_CLASS_SHIFT (MODIFIER_SHIFT + MODIFIER_BITS) +#define REG_CLASS_BITS (11) +#define REG_CLASS_MASK OP_GENMASK(REG_CLASS_BITS, REG_CLASS_SHIFT) +#define GEN_REG_CLASS(bit) OP_GENBIT(bit, REG_CLASS_SHIFT) + +/* + * Subclasses. Depends on type of operand. + * + * Bits: 18 - 31 + */ +#define SUBCLASS_SHIFT (REG_CLASS_SHIFT + REG_CLASS_BITS) +#define SUBCLASS_BITS (14) +#define SUBCLASS_MASK OP_GENMASK(SUBCLASS_BITS, SUBCLASS_SHIFT) +#define GEN_SUBCLASS(bit) OP_GENBIT(bit, SUBCLASS_SHIFT) + +/* + * Sizes of the operands and attributes. + * + * Bits: 32 - 47 + */ +#define SIZE_SHIFT (SUBCLASS_SHIFT + SUBCLASS_BITS) +#define SIZE_BITS (16) +#define SIZE_MASK OP_GENMASK(SIZE_BITS, SIZE_SHIFT) +#define GEN_SIZE(bit) OP_GENBIT(bit, SIZE_SHIFT) + +/* + * Register set count + * + * Bits: 48 - 52 + */ +#define REGSET_SHIFT (SIZE_SHIFT + SIZE_BITS) +#define REGSET_BITS (5) +#define REGSET_MASK OP_GENMASK(REGSET_BITS, REGSET_SHIFT) +#define GEN_REGSET(bit) OP_GENBIT(bit, REGSET_SHIFT) + +/* + * Remaining bits + */ +#define OPFLAGS_USED_BITS (REGSET_SHIFT + REGSET_BITS) +#define OPFLAGS_UNUSED_BITS (64-OPFLAGS_USED_BITS) + +#define REGISTER GEN_OPTYPE(0) /* register number in 'basereg' */ +#define IMMEDIATE GEN_OPTYPE(1) +#define REGMEM GEN_OPTYPE(2) /* for r/m, ie EA, operands */ +#define MEMORY (GEN_OPTYPE(3) | REGMEM) + +/* First, the actual sizes */ +#define BITS8 GEN_SIZE(0) /* 8 bits (BYTE) */ +#define BITS16 GEN_SIZE(1) /* 16 bits (WORD) */ +#define BITS32 GEN_SIZE(2) /* 32 bits (DWORD) */ +#define BITS64 GEN_SIZE(3) /* 64 bits (QWORD), x64 and FPU only */ +#define BITS80 GEN_SIZE(4) /* 80 bits (TWORD), FPU only */ +#define BITS128 GEN_SIZE(5) /* 128 bits (OWORD) */ +#define BITS256 GEN_SIZE(6) /* 256 bits (YWORD) */ +#define BITS512 GEN_SIZE(7) /* 512 bits (ZWORD) */ + +/* Then, size modifiers */ +#define FAR GEN_SIZE(8) /* grotty: this means 16:16 or 16:32, like in CALL/JMP */ +#define NEAR GEN_SIZE(9) +#define SHORT GEN_SIZE(10) /* and this means what it says :) */ +#define ABS GEN_SIZE(11) /* JMP ABS, MOV ABS */ + +/* Special modifiers */ +#define TO GEN_MODIFIER(0) /* reverse effect in FADD, FSUB &c */ +#define COLON GEN_MODIFIER(1) /* operand is followed by a colon */ +#define STRICT GEN_MODIFIER(2) /* do not optimize this operand */ + +#define REG_CLASS_CDT GEN_REG_CLASS(0) +#define REG_CLASS_GPR GEN_REG_CLASS(1) +#define REG_CLASS_SREG GEN_REG_CLASS(2) +#define REG_CLASS_FPUREG GEN_REG_CLASS(3) +#define REG_CLASS_RM_MMX GEN_REG_CLASS(4) +#define REG_CLASS_RM_XMM GEN_REG_CLASS(5) +#define REG_CLASS_RM_YMM GEN_REG_CLASS(6) +#define REG_CLASS_RM_ZMM GEN_REG_CLASS(7) +#define REG_CLASS_OPMASK GEN_REG_CLASS(8) +#define REG_CLASS_BND GEN_REG_CLASS(9) +#define REG_CLASS_RM_TMM GEN_REG_CLASS(10) + +/* Register classes treated as vectors for EVEX/REX2 encoding purposes */ +#define REG_CLASS_VECTOR (REG_CLASS_RM_XMM|REG_CLASS_RM_YMM|\ + REG_CLASS_RM_ZMM|REG_CLASS_RM_TMM) + +/* Helper function to test for a value matching a class */ +static inline bool is_class(opflags_t class, opflags_t op) +{ + return !(class & ~op); +} + +/* Verify a token value is a valid register */ +static inline bool is_register(int reg) +{ + return reg >= EXPR_REG_START && reg < REG_ENUM_LIMIT; +} + +/* Helper function to test if a token is a register matching a class */ +static inline bool is_reg_class(opflags_t class, int reg) +{ + if (!is_register(reg)) + return false; + + return is_class(class, nasm_reg_flags[reg]); +} + +#define IS_SREG(reg) is_reg_class(REG_SREG, (reg)) +#define IS_FSGS(reg) is_reg_class(REG_FSGS, (reg)) + +/* + * These are used across the RM classes so cannot conflict with neither EA + * nor REG subtypes! x86/insns.pl automatically adds RN_FLAGS(x) to the + * defintion of each register type. + */ +#define RN_L16 GEN_SUBCLASS(10) /* Register number 0-15 */ +#define RN_ZERO (GEN_SUBCLASS(11) | RN_L16) /* Register number 0 */ +#define RN_NZERO GEN_SUBCLASS(12) /* Register number 1+ */ +#define RN_1_15 (RN_NZERO | RN_L16) /* Register number 1-15 */ + +#define RN_FLAGS(n) \ + (((n) == 0 ? RN_ZERO : RN_NZERO) | \ + ((n) < 16 ? RN_L16 : 0)) + +#define RM_L16 (RN_L16 | REGMEM) +#define RM_ZERO (RN_ZERO | REGMEM) +#define RM_NZERO (RN_NZERO | REGMEM) +#define RM_1_15 (RM_1_15 | REGMEM) +#define RM_SEL (GEN_SUBCLASS(13) | REGMEM) /* valid segment selector */ + +/* Register classes */ + +#define REG_L16 (RN_L16 | REGISTER) +#define REG_ZERO (RN_ZERO | REGISTER) +#define REG_NZERO (RN_NZERO | REGISTER) +#define REG_1_15 (RN_1_15 | REGISTER) + +#define REG_SMASK SUBCLASS_MASK + +#define REG_EA ( REGMEM | REGISTER ) /* 'normal' reg, qualifies as EA */ +#define RM_GPR (REG_CLASS_GPR | REGMEM ) /* integer operand */ +#define REG_GPR (REG_CLASS_GPR | REG_EA ) /* integer register */ +#define FPUREG (REG_CLASS_FPUREG | REGISTER ) /* fp stack registers */ +#define FPU0 (REG_CLASS_FPUREG | REG_ZERO ) /* fp stack register zero */ +#define RM_MMX (REG_CLASS_RM_MMX | REGMEM ) /* MMX operand */ +#define MMXREG (REG_CLASS_RM_MMX | REG_EA ) /* MMX register */ +#define RM_XMM (REG_CLASS_RM_XMM | REGMEM ) /* XMM operand */ +#define XMMREG (REG_CLASS_RM_XMM | REG_EA ) /* XMM register */ +#define RM_XMM_L16 (REG_CLASS_RM_XMM | REGMEM | RN_L16 ) /* XMM operand reg 0-15 */ +#define XMM_L16 (REG_CLASS_RM_XMM | REG_EA | RN_L16 ) /* XMM register 0-15 */ +#define XMM0 (REG_CLASS_RM_XMM | REGMEM | REG_ZERO ) /* XMM register 0 */ +#define RM_YMM (REG_CLASS_RM_YMM | REGMEM ) /* YMM operand */ +#define YMMREG (REG_CLASS_RM_YMM | REG_EA ) /* YMM register */ +#define RM_YMM_L16 (REG_CLASS_RM_YMM | REGMEM | RN_L16 ) /* YMM operand reg 0-15 */ +#define YMM_L16 (REG_CLASS_RM_YMM | REG_EA | RN_L16 ) /* YMM register 0-15 */ +#define YMM0 (REG_CLASS_RM_YMM | REGMEM | REG_ZERO ) /* YMM register 0 */ +#define RM_ZMM (REG_CLASS_RM_ZMM | REGMEM ) /* ZMM operand */ +#define ZMMREG (REG_CLASS_RM_ZMM | REG_EA ) /* ZMM register */ +#define RM_ZMM_L16 (REG_CLASS_RM_ZMM | REGMEM | RN_L16 ) /* ZMM operand reg 0-15 */ +#define ZMM_L16 (REG_CLASS_RM_ZMM | REG_EA | RN_L16 ) /* ZMM register 0-15 */ +#define ZMM0 (REG_CLASS_RM_ZMM | REGMEM | REG_ZERO ) /* ZMM register 0 */ +#define RM_OPMASK (REG_CLASS_OPMASK | REGMEM ) /* Opmask operand */ +#define OPMASKREG (REG_CLASS_OPMASK | REG_EA ) /* Opmask register */ +#define OPMASK0 (REG_CLASS_OPMASK | REG_EA ) /* Opmask register zero (k0) */ +#define RM_K RM_OPMASK +#define KREG OPMASKREG +#define RM_BND (REG_CLASS_BND | REGMEM ) /* Bounds operand */ +#define BNDREG (REG_CLASS_BND | REG_EA ) /* Bounds register */ +#define TMMREG (REG_CLASS_RM_TMM | REG_EA ) /* TMM (AMX) register */ + +#define REG_CDT (REG_CLASS_CDT | REGISTER) /* CRn, DRn and TRn */ +#define REG_CREG (GEN_SUBCLASS(0) | REG_CDT ) /* CRn */ +#define REG_DREG (GEN_SUBCLASS(1) | REG_CDT ) /* DRn */ +#define REG_TREG (GEN_SUBCLASS(2) | REG_CDT ) /* TRn */ + +#define REG_SREG (REG_CLASS_SREG | REG_L16 | BITS16) /* segment register */ + +/* Segment registers */ +#define REG_ES (GEN_SUBCLASS(0) | GEN_SUBCLASS(2) | REG_SREG) /* ES */ +#define REG_CS (GEN_SUBCLASS(1) | GEN_SUBCLASS(2) | REG_SREG) /* CS */ +#define REG_SS (GEN_SUBCLASS(0) | GEN_SUBCLASS(3) | REG_SREG) /* SS */ +#define REG_DS (GEN_SUBCLASS(1) | GEN_SUBCLASS(3) | REG_SREG) /* DS */ +#define REG_FS (GEN_SUBCLASS(0) | GEN_SUBCLASS(4) | REG_SREG) /* FS */ +#define REG_GS (GEN_SUBCLASS(1) | GEN_SUBCLASS(4) | REG_SREG) /* GS */ +#define REG_FSGS ( GEN_SUBCLASS(4) | REG_SREG) /* FS or GS */ +#define REG_SEG6 (GEN_SUBCLASS(0) | GEN_SUBCLASS(5) | REG_SREG) +#define REG_SEG7 (GEN_SUBCLASS(1) | GEN_SUBCLASS(5) | REG_SREG) +#define REG_SEG67 ( GEN_SUBCLASS(5) | REG_SREG) + +/* GPRs */ + +#define REG8 (REG_GPR | BITS8 ) +#define REG16 (REG_GPR | BITS16 | RM_SEL) +#define REG32 (REG_GPR | BITS32 | RM_SEL) +#define REG64 (REG_GPR | BITS64 | RM_SEL) + +/* accumulator: AL, AX, EAX, RAX */ +#define REG_ACCUM (REG_GPR | REG_ZERO) +#define REG_AL (REG_ACCUM | REG8 ) +#define REG_AX (REG_ACCUM | REG16) +#define REG_EAX (REG_ACCUM | REG32) +#define REG_RAX (REG_ACCUM | REG64) + +/* counter: CL, CX, ECX, RDX */ +#define REG_COUNT (REG_GPR | REG_1_15 | GEN_SUBCLASS(0)) +#define REG_CL (REG_COUNT | REG8 ) +#define REG_CX (REG_COUNT | REG16) +#define REG_ECX (REG_COUNT | REG32) +#define REG_RCX (REG_COUNT | REG64) + +/* data: DL, DX, EDX, RDX */ +#define REG_DATA (REG_GPR | REG_1_15 | GEN_SUBCLASS(1)) +#define REG_DL (REG_DATA | REG8 ) +#define REG_DX (REG_DATA | REG16) +#define REG_EDX (REG_DATA | REG32) +#define REG_RDX (REG_DATA | REG64) + +/* base: BL, BX, EBX, RBX */ +#define REG_BASE (REG_GPR | REG_1_15 | GEN_SUBCLASS(2)) +#define REG_BL (REG_BASE | REG8 ) +#define REG_BX (REG_BASE | REG16) +#define REG_EBX (REG_BASE | REG32) +#define REG_RBX (REG_BASE | REG64) + +/* high 8-bit regs: AH, CH, DH, BH */ +#define REG_HIGH (REG8 | REG_1_15 | GEN_SUBCLASS(3)) + +/* Non-accumulator registers */ +#define REG_NA (REG_GPR | REG_NZERO) +#define REG8NA (REG_NA | REG8 ) +#define REG16NA (REG_NA | REG16) +#define REG32NA (REG_NA | REG32) +#define REG64NA (REG_NA | REG64) + +/* special types of EAs */ +#define MEM_OFFS (GEN_SUBCLASS(0) | MEMORY) /* simple [address] offset - absolute! */ +#define IP_REL (GEN_SUBCLASS(1) | MEMORY) /* IP-relative offset */ +#define XMEM (GEN_SUBCLASS(2) | MEMORY) /* 128-bit vector SIB */ +#define YMEM (GEN_SUBCLASS(3) | MEMORY) /* 256-bit vector SIB */ +#define ZMEM (GEN_SUBCLASS(4) | MEMORY) /* 512-bit vector SIB */ + +/* + * operand bits to match an instruction carrying any type of memory r/m operand + */ +#define MEMORY_ANY (MEMORY | RM_GPR | RM_MMX | RM_XMM | RM_YMM | RM_ZMM | \ + RM_L16 | RM_ZERO | RM_NZERO | RM_OPMASK | RM_BND) + +/* special immediate values */ +#define IMM_NORMAL (GEN_SUBCLASS(0) | IMMEDIATE) /* operand is NOT a brcconst */ +#define UNITY (GEN_SUBCLASS(1) | IMMEDIATE) /* operand equals 1 */ +#define SBYTEWORD (GEN_SUBCLASS(2) | IMMEDIATE) /* operand is in the range -128..127 mod 2^16 */ +#define SBYTEDWORD (GEN_SUBCLASS(3) | IMMEDIATE) /* operand is in the range -128..127 mod 2^32 */ +#define SDWORD (GEN_SUBCLASS(4) | IMMEDIATE) /* operand is in the range -0x80000000..0x7FFFFFFF */ +#define UDWORD (GEN_SUBCLASS(5) | IMMEDIATE) /* operand is in the range 0..0xFFFFFFFF */ +#define FOURBITS (GEN_SUBCLASS(6) | IMMEDIATE) /* operand is in the range 0-15 */ +#define IMM_KNOWN (GEN_SUBCLASS(7) | IMMEDIATE) /* operand value is known at compile time */ + +#define BYTEEXTMASK (GEN_SUBCLASS(2) | GEN_SUBCLASS(3)) +#define DWORDEXTMASK (GEN_SUBCLASS(4) | GEN_SUBCLASS(5)) + +/* Register set sizes */ +#define RS2 GEN_REGSET(0) +#define RS4 GEN_REGSET(1) +#define RS8 GEN_REGSET(2) +#define RS16 GEN_REGSET(3) +#define RS32 GEN_REGSET(4) + +#endif /* NASM_OPFLAGS_H */ diff --git a/include/outelf.h b/include/outelf.h new file mode 100644 index 0000000..448ba09 --- /dev/null +++ b/include/outelf.h @@ -0,0 +1,103 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 1996-2019 The NASM Authors - All Rights Reserved */ + +/* + * Internal definitions common to outelf32 and outelf64 + */ +#ifndef OUTPUT_OUTELF_H +#define OUTPUT_OUTELF_H + +#include "elf.h" +#include "rbtree.h" +#include "saa.h" + +#define GLOBAL_TEMP_BASE 0x40000000 /* bigger than any sane symbol index */ + +/* alignment of sections in file */ +#define SEC_FILEALIGN 16 + +/* this stuff is needed for the dwarf/stabs debugging format */ +#define TY_DEBUGSYMLIN 0x40 /* internal call to debug_out */ + +/* + * Debugging ELF sections (section indices starting with sec_debug) + */ + +/* stabs */ +#define sec_stab (sec_debug + 0) +#define sec_stabstr (sec_debug + 1) +#define sec_rel_stab (sec_debug + 2) + +/* stabs symbol table format */ +struct stabentry { + uint32_t n_strx; + uint8_t n_type; + uint8_t n_other; + uint16_t n_desc; + uint32_t n_value; +}; + +/* dwarf */ +#define sec_debug_aranges (sec_debug + 0) +#define sec_rela_debug_aranges (sec_debug + 1) +#define sec_debug_pubnames (sec_debug + 2) +#define sec_debug_info (sec_debug + 3) +#define sec_rela_debug_info (sec_debug + 4) +#define sec_debug_abbrev (sec_debug + 5) +#define sec_debug_line (sec_debug + 6) +#define sec_rela_debug_line (sec_debug + 7) +#define sec_debug_frame (sec_debug + 8) +#define sec_debug_loc (sec_debug + 9) + +extern uint8_t elf_osabi; +extern uint8_t elf_abiver; + +#define WRITE_STAB(p,n_strx,n_type,n_other,n_desc,n_value) \ + do { \ + WRITELONG(p, n_strx); \ + WRITECHAR(p, n_type); \ + WRITECHAR(p, n_other); \ + WRITESHORT(p, n_desc); \ + WRITELONG(p, n_value); \ + } while (0) + +struct elf_reloc { + struct elf_reloc *next; + int64_t address; /* relative to _start_ of section */ + int64_t symbol; /* symbol index */ + int64_t offset; /* symbol addend */ + int type; /* type of relocation */ +}; + +struct elf_symbol { + struct rbtree symv; /* symbol value and symbol rbtree */ + int32_t strpos; /* string table position of name */ + int32_t section; /* section ID of the symbol */ + int type; /* symbol type */ + int other; /* symbol visibility */ + int32_t size; /* size of symbol */ + int32_t globnum; /* symbol table offset if global */ + struct elf_symbol *nextfwd; /* list of unresolved-size symbols */ + char *name; /* used temporarily if in above list */ +}; + +struct elf_section { + struct SAA *data; + uint64_t len; + uint64_t size; + uint64_t nrelocs; + int32_t index; /* NASM index or NO_SEG if internal */ + int shndx; /* ELF index */ + int type; /* SHT_* */ + uint64_t align; /* alignment: power of two */ + uint64_t flags; /* section flags */ + int64_t pass_last_seen; + uint64_t entsize; /* entry size */ + char *name; + struct SAA *rel; + struct elf_reloc *head; + struct elf_reloc **tail; + struct rbtree *gsyms; /* global symbols in section */ +}; + +#endif /* OUTPUT_OUTELF_H */ diff --git a/include/outform.h b/include/outform.h new file mode 100644 index 0000000..10d5518 --- /dev/null +++ b/include/outform.h @@ -0,0 +1,344 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 1996-2022 The NASM Authors - All Rights Reserved */ + +/* + * outform.h header file for binding output format drivers to the + * remainder of the code in the Netwide Assembler + */ + +/* + * This header file allows configuration of which output formats + * get compiled into the NASM binary. You can configure by defining + * various preprocessor symbols beginning with "OF_", either on the + * compiler command line or at the top of this file. + * + * OF_ONLY -- only include specified object formats + * OF_name -- ensure that output format 'name' is included + * OF_NO_name -- remove output format 'name' + * OF_DOS -- ensure that 'obj', 'obj2', 'bin', 'win32' & 'win64' are included. + * OF_UNIX -- ensure that 'aout', 'aoutb', 'coff', 'elf32' & 'elf64' are in. + * OF_OTHERS -- ensure that 'bin', 'as86', 'rdf' 'macho32' & 'macho64' are in. + * OF_ALL -- ensure that all formats are included. + * note that this doesn't include 'dbg', which is + * only really useful if you're doing development + * work on NASM. Define OF_DBG if you want this. + * + * OF_DEFAULT=of_name -- ensure that 'name' is the default format. + * + * eg: -DOF_UNIX -DOF_ELF32 -DOF_DEFAULT=of_elf32 would be a suitable config + * for an average linux system. + * + * Default config = -DOF_ALL -DOF_DEFAULT=of_bin + * + * You probably only want to set these options while compiling 'nasm.c'. */ + +#ifndef NASM_OUTFORM_H +#define NASM_OUTFORM_H + +#include "nasm.h" + +/* -------------- USER MODIFIABLE PART ---------------- */ + +/* + * Insert #defines here in accordance with the configuration + * instructions above. + * + * E.g. + * + * #define OF_ONLY + * #define OF_OBJ + * #define OF_BIN + * + * for a 16-bit DOS assembler with no extraneous formats. + */ + +/* ------------ END USER MODIFIABLE PART -------------- */ + +/* ====configurable info begins here==== */ +/* formats configurable: + * bin,obj,obj2,elf32,elf64,aout,aoutb,coff,win32,as86,rdf2,macho32,macho64 */ + +/* process options... */ + +#ifndef OF_ONLY +#ifndef OF_ALL +#define OF_ALL /* default is to have all formats */ +#endif +#endif + +#ifdef OF_ALL /* set all formats on... */ +#ifndef OF_BIN +#define OF_BIN +#endif +#ifndef OF_OBJ +#define OF_OBJ +#endif +#ifndef OF_OBJ2 +#define OF_OBJ2 +#endif +#ifndef OF_ELF32 +#define OF_ELF32 +#endif +#ifndef OF_ELFX32 +#define OF_ELFX32 +#endif +#ifndef OF_ELF64 +#define OF_ELF64 +#endif +#ifndef OF_COFF +#define OF_COFF +#endif +#ifndef OF_AOUT +#define OF_AOUT +#endif +#ifndef OF_AOUTB +#define OF_AOUTB +#endif +#ifndef OF_WIN32 +#define OF_WIN32 +#endif +#ifndef OF_WIN64 +#define OF_WIN64 +#endif +#ifndef OF_AS86 +#define OF_AS86 +#endif +#ifndef OF_IEEE +#define OF_IEEE +#endif +#ifndef OF_MACHO32 +#define OF_MACHO32 +#endif +#ifndef OF_MACHO64 +#define OF_MACHO64 +#endif +#ifndef OF_DBG +#define OF_DBG +#endif +#endif /* OF_ALL */ + +/* turn on groups of formats specified.... */ +#ifdef OF_DOS +#ifndef OF_OBJ +#define OF_OBJ +#endif +#ifndef OF_OBJ2 +#define OF_OBJ2 +#endif +#ifndef OF_BIN +#define OF_BIN +#endif +#ifndef OF_COFF +#define OF_COFF /* COFF is used by DJGPP */ +#endif +#ifndef OF_WIN32 +#define OF_WIN32 +#endif +#ifndef OF_WIN64 +#define OF_WIN64 +#endif +#endif + +#ifdef OF_UNIX +#ifndef OF_AOUT +#define OF_AOUT +#endif +#ifndef OF_AOUTB +#define OF_AOUTB +#endif +#ifndef OF_COFF +#define OF_COFF +#endif +#ifndef OF_ELF32 +#define OF_ELF32 +#endif +#ifndef OF_ELF64 +#define OF_ELF64 +#endif +#ifndef OF_ELFX32 +#define OF_ELFX32 +#endif +#endif + +#ifdef OF_OTHERS +#ifndef OF_BIN +#define OF_BIN +#endif +#ifndef OF_AS86 +#define OF_AS86 +#endif +#ifndef OF_IEEE +#define OF_IEEE +#endif +#ifndef OF_MACHO32 +#define OF_MACHO32 +#endif +#ifndef OF_MACHO64 +#define OF_MACHO64 +#endif +#endif + +/* finally... override any format specifically specified to be off */ +#ifdef OF_NO_BIN +#undef OF_BIN +#endif +#ifdef OF_NO_OBJ +#undef OF_OBJ +#endif +#ifdef OF_NO_OBJ2 +#undef OF_OBJ2 +#endif +#ifdef OF_NO_ELF32 +#undef OF_ELF32 +#endif +#ifdef OF_NO_ELF64 +#undef OF_ELF64 +#endif +#ifdef OF_NO_ELFX32 +#undef OF_ELFX32 +#endif +#ifdef OF_NO_AOUT +#undef OF_AOUT +#endif +#ifdef OF_NO_AOUTB +#undef OF_AOUTB +#endif +#ifdef OF_NO_COFF +#undef OF_COFF +#endif +#ifdef OF_NO_WIN32 +#undef OF_WIN32 +#endif +#ifdef OF_NO_WIN64 +#undef OF_WIN64 +#endif +#ifdef OF_NO_AS86 +#undef OF_AS86 +#endif +#ifdef OF_NO_IEEE +#undef OF_IEEE +#endif +#ifdef OF_NO_MACHO32 +#undef OF_MACHO32 +#endif +#ifdef OF_NO_MACHO64 +#undef OF_MACHO64 +#endif +#ifdef OF_NO_DBG +#undef OF_DBG +#endif + +#ifndef OF_DEFAULT +#define OF_DEFAULT of_bin +#endif + +extern const struct ofmt of_bin; +extern const struct ofmt of_ith; +extern const struct ofmt of_srec; +extern const struct ofmt of_aout; +extern const struct ofmt of_aoutb; +extern const struct ofmt of_coff; +extern const struct ofmt of_elf32; +extern const struct ofmt of_elfx32; +extern const struct ofmt of_elf64; +extern const struct ofmt of_as86; +extern const struct ofmt of_obj; +extern const struct ofmt of_obj2; +extern const struct ofmt of_win32; +extern const struct ofmt of_win64; +extern const struct ofmt of_ieee; +extern const struct ofmt of_macho32; +extern const struct ofmt of_macho64; +extern const struct ofmt of_dbg; + +#ifdef BUILD_DRIVERS_ARRAY /* only if included from outform.c */ + +/* + * pull in the externs for the different formats, then make the + * drivers array based on the above defines + */ + +static const struct ofmt * const drivers[] = { +#ifdef OF_BIN + &of_bin, + &of_ith, + &of_srec, +#endif +#ifdef OF_AOUT + &of_aout, +#endif +#ifdef OF_AOUTB + &of_aoutb, +#endif +#ifdef OF_COFF + &of_coff, +#endif +#ifdef OF_ELF32 + &of_elf32, +#endif +#ifdef OF_ELF64 + &of_elf64, +#endif +#ifdef OF_ELFX32 + &of_elfx32, +#endif +#ifdef OF_AS86 + &of_as86, +#endif +#ifdef OF_OBJ + &of_obj, +#endif +#ifdef OF_OBJ2 + &of_obj2, +#endif +#ifdef OF_WIN32 + &of_win32, +#endif +#ifdef OF_WIN64 + &of_win64, +#endif +#ifdef OF_IEEE + &of_ieee, +#endif +#ifdef OF_MACHO32 + &of_macho32, +#endif +#ifdef OF_MACHO64 + &of_macho64, +#endif +#ifdef OF_DBG + &of_dbg, +#endif + + NULL +}; + +static const struct ofmt_alias ofmt_aliases[] = { +#ifdef OF_ELF32 + { "elf", &of_elf32 }, +#endif +#ifdef OF_MACHO32 + { "macho", &of_macho32 }, +#endif +#ifdef OF_OBJ + { "omf", &of_obj }, +#endif +#ifdef OF_OBJ2 + { "omf2", &of_obj2 }, + { "os2", &of_obj2 }, +#endif +#ifdef OF_WIN32 + { "win", &of_win32 }, +#endif + { NULL, NULL } +}; + +#endif /* BUILD_DRIVERS_ARRAY */ + +const struct ofmt *ofmt_find(const char *name, const struct ofmt_alias **ofmt_alias); +const struct dfmt * pure_func dfmt_find(const struct ofmt *, const char *); +void ofmt_list(const struct ofmt *, FILE *); +void dfmt_list(FILE *); +extern const struct dfmt null_debug_form; + +#endif /* NASM_OUTFORM_H */ diff --git a/include/outlib.h b/include/outlib.h new file mode 100644 index 0000000..8651633 --- /dev/null +++ b/include/outlib.h @@ -0,0 +1,292 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 1996-2025 The NASM Authors - All Rights Reserved */ + +#ifndef NASM_OUTLIB_H +#define NASM_OUTLIB_H + +#include "compiler.h" +#include "nasm.h" +#include "error.h" +#include "hashtbl.h" +#include "saa.h" +#include "rbtree.h" + +uint64_t realsize(enum out_type type, uint64_t size); + +/* Do-nothing versions of some output routines */ +enum directive_result +null_directive(enum directive directive, char *value); +void null_sectalign(int32_t seg, unsigned int value); +void null_reset(void); +int32_t null_segbase(int32_t seg); + +/* Do-nothing versions of all the debug routines */ +void null_debug_init(void); +void null_debug_linenum(const char *filename, int32_t linenumber, + int32_t segto); +void null_debug_deflabel(char *name, int32_t segment, int64_t offset, + int is_global, char *special); +void null_debug_directive(const char *directive, const char *params); +void null_debug_typevalue(int32_t type); +void null_debug_output(int type, void *param); +void null_debug_cleanup(void); +extern const struct dfmt * const null_debug_arr[2]; + +/* + * This macro expands the legacy output information into separate + * variables, to make gradual porting of backends easier. + */ +#define OUT_LEGACY(_out,_segto,_data,_type,_size,_segment,_wrt) \ + int32_t _segto = (_out)->loc.segment; \ + const void *_data = (_out)->legacy.data; \ + enum out_type _type = (_out)->legacy.type; \ + uint64_t _size = (_out)->legacy.size; \ + int32_t _segment = (_out)->legacy.tsegment; \ + int32_t _wrt = (_out)->legacy.twrt + +/* + * Common routines for tasks that really should migrate into the core. + * This provides a common interface for maintaining sections and symbols, + * and provide quick lookups as well as declared-order sequential walks. + * + * These structures are intended to be embedded at the *top* of a + * backend-specific structure containing additional information. + * + * The tokens O_Section, O_Symbol and O_Reloc are intended to be + * defined as macros by the backend before including this file! + */ + +struct ol_sect; +struct ol_sym; + +#ifndef O_Section +typedef struct ol_sect O_Section; +#endif +#ifndef O_Symbol +typedef struct ol_sym O_Symbol; +#endif +#ifndef O_Reloc +typedef void * O_Reloc; +#endif + +/* Common section structure */ + +/* + * Common flags for sections and symbols; low values reserved for + * backend. Note that both ol_sect and ol_sym begin with a flags + * field, so if a section pointer points to an external symbol instead + * they can be trivially resolved. + */ +#define OF_SYMBOL 0x80000000 +#define OF_GLOBAL 0x40000000 +#define OF_IMPSEC 0x20000000 +#define OF_COMMON 0x10000000 + +struct ol_sym; + +struct ol_symlist { + struct ol_symlist *next; + struct rbtree tree; +}; +struct ol_symhead { + struct ol_symlist *head, **tail; + struct rbtree *tree; + uint64_t n; +}; + +struct ol_sect { + uint32_t flags; /* Section/symbol flags */ + struct ol_sect *next; /* Next section in declared order */ + const char *name; /* Name of section */ + struct ol_symhead syml; /* All symbols in this section */ + struct ol_symhead symg; /* Global symbols in this section */ + struct SAA *data; /* Contents of section */ + struct SAA *reloc; /* Section relocations */ + uint32_t index; /* Primary section index */ + uint32_t subindex; /* Current subsection index */ +}; + +/* Segment reference */ +enum ol_seg_type { + OS_NOSEG = 0, /* Plain number (no segment) */ + OS_SEGREF = 1, /* It is a segment reference */ + OS_ABS = 1, /* Absolute segment reference */ + OS_SECT = 2, /* It is a real section */ + OS_OFFS = OS_SECT, /* Offset reference in section */ + OS_SEG = OS_SECT|OS_SEGREF /* Section reference */ +}; + +union ol_segval { + struct ol_sect *sect; /* Section structure */ + struct ol_sym *sym; /* External symbol structure */ +}; + +struct ol_seg { + union ol_segval s; + enum ol_seg_type t; + + /* + * For a section: subsection index + * For a metasymbol: virtual segment index + * For an absolute symbol: absolute value + */ + uint32_t index; +}; + +/* seg:offs representing the full location value and type */ +struct ol_loc { + int64_t offs; + struct ol_seg seg; +}; + +/* Common symbol structure */ +struct ol_sym { + uint32_t flags; /* Section/symbol flags */ + uint32_t size; /* Size value (for backend) */ + struct ol_sym *next; /* Next symbol in declared order */ + const char *name; /* Symbol name */ + struct ol_symlist syml; /* Section-local symbol list */ + struct ol_symlist symg; /* Section-local global symbol list */ + struct ol_loc p; /* Symbol position ("where") */ + struct ol_loc v; /* Symbol value ("what") */ +}; + +/* + * Operations + */ +void ol_init(void); +void ol_cleanup(void); + +/* Convert offs:seg to a location structure */ +extern void +ol_mkloc(struct ol_loc *loc, int64_t offs, int32_t seg); + +/* Get the section or external symbol from a struct ol_seg */ +static inline O_Section *seg_sect(struct ol_seg *seg) +{ + return (O_Section *)seg->s.sect; +} +static inline O_Symbol *seg_xsym(struct ol_seg *seg) +{ + return (O_Symbol *)seg->s.sym; +} + +/* + * Return a pointer to the symbol structure if and only if a section is + * really a symbol of some kind (extern, common...) + */ +static inline struct ol_sym *_seg_extsym(struct ol_sect *sect) +{ + return (sect->flags & OF_SYMBOL) ? (struct ol_sym *)sect : NULL; +} +static inline O_Symbol *seg_extsym(O_Section *sect) +{ + return (O_Symbol *)_seg_extsym((struct ol_sect *)sect); +} + +/* + * Find a section or create a new section structure if it does not exist + * and allocate it an index value via seg_alloc(). + */ +extern struct ol_sect * +_ol_get_sect(const char *name, size_t ssize, size_t rsize); +static inline O_Section *ol_get_sect(const char *name) +{ + return (O_Section *)_ol_get_sect(name, sizeof(O_Section), sizeof(O_Reloc)); +} + +/* Find a section by name without creating one */ +extern struct ol_sect *_ol_sect_by_name(const char *); +static inline O_Section *ol_sect_by_name(const char *name) +{ + return (O_Section *)_ol_sect_by_name(name); +} + +/* Find a section or external symbol by index; NULL if not valid */ +extern struct ol_sect *_ol_sect_by_index(int32_t index); +static inline O_Section *ol_sect_by_index(int32_t index) +{ + return (O_Section *)_ol_sect_by_index(index); +} + +/* Global list of sections (not including external symbols) */ +extern struct ol_sect *_ol_sect_list; +static inline O_Section *ol_sect_list(void) +{ + return (O_Section *)_ol_sect_list; +} + +/* Count of sections (not including external symbols) */ +extern uint64_t _ol_nsects; +static inline uint64_t ol_nsects(void) +{ + return _ol_nsects; +} + +/* + * Start a new subsection for the given section. At the moment, once a + * subsection has been created, it is not possible to revert to an + * earlier subsection. ol_sect_by_index() will return the main section + * structure. Returns the new section index. This is used to prevent + * the front end from optimizing across subsection boundaries. + */ +extern int32_t _ol_new_subsection(struct ol_sect *sect); +static inline int32_t ol_new_subsection(O_Section *sect) +{ + return _ol_new_subsection((struct ol_sect *)sect); +} + +/* + * Create a new symbol. If this symbol is OS_OFFS, add it to the relevant + * section, too. If the symbol already exists, return NULL; this is + * different from ol_get_section() as a single section may be invoked + * many times. On the contrary, the front end will prevent a single symbol + * from being defined more than once. + * + * If flags has OF_GLOBAL set, add it to the global symbol hash for the + * containing section. If flags has OF_IMPSEC set, allocate a segment + * index for it via seg_alloc() and add it to the section by index list. + */ +extern struct ol_sym *_ol_new_sym(const char *name, const struct ol_loc *v, + uint32_t flags, size_t size); +static inline O_Symbol *ol_new_sym(const char *name, const struct ol_loc *v, + uint32_t flags) +{ + return (O_Symbol *)_ol_new_sym(name, v, flags, sizeof(O_Symbol)); +} + +/* Find a symbol by name in the global namespace */ +extern struct ol_sym *_ol_sym_by_name(const char *name); +static inline O_Symbol *ol_sym_by_name(const char *name) +{ + return (O_Symbol *)_ol_sym_by_name(name); +} + +/* + * Find a symbol by address in a specific section. If no symbol is defined + * at that exact address, return the immediately previously defined one. + * If global is set, then only return global symbols. + */ +extern struct ol_sym *_ol_sym_by_address(struct ol_sect *sect, int64_t addr, + bool global); +static inline O_Symbol *ol_sym_by_address(O_Section *sect, int64_t addr, + bool global) +{ + return (O_Symbol *)_ol_sym_by_address((struct ol_sect *)sect, addr, global); +} + +/* Global list of symbols */ +extern struct ol_sym *_ol_sym_list; +static inline O_Symbol *ol_sym_list(void) +{ + return (O_Symbol *)_ol_sym_list; +} + +/* Global count of symbols */ +extern uint64_t _ol_nsyms; +static inline uint64_t ol_nsyms(void) +{ + return _ol_nsyms; +} + +#endif /* NASM_OUTLIB_H */ diff --git a/include/parser.h b/include/parser.h new file mode 100644 index 0000000..1f8099b --- /dev/null +++ b/include/parser.h @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 1996-2009 The NASM Authors - All Rights Reserved */ + +/* + * parser.h header file for the parser module of the Netwide + * Assembler + */ + +#ifndef NASM_PARSER_H +#define NASM_PARSER_H + +insn *parse_line(char *buffer, insn *result, const int bits); +void cleanup_insn(insn *instruction); + +#endif diff --git a/include/pecoff.h b/include/pecoff.h new file mode 100644 index 0000000..63a805a --- /dev/null +++ b/include/pecoff.h @@ -0,0 +1,520 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 1996-2020 The NASM Authors - All Rights Reserved */ + +#ifndef PECOFF_H +#define PECOFF_H + +/* + * Microsoft Portable Executable and Common Object + * File Format Specification + * + * Revision 8.1 – February 15, 2008 + */ + +/* + * Machine types + */ +#define IMAGE_FILE_MACHINE_UNKNOWN 0x0000 +#define IMAGE_FILE_MACHINE_AM33 0x01d3 +#define IMAGE_FILE_MACHINE_AMD64 0x8664 +#define IMAGE_FILE_MACHINE_EBC 0x0ebc +#define IMAGE_FILE_MACHINE_M32R 0x9041 +#define IMAGE_FILE_MACHINE_ALPHA 0x0184 +#define IMAGE_FILE_MACHINE_ARM 0x01c0 +#define IMAGE_FILE_MACHINE_ALPHA64 0x0284 +#define IMAGE_FILE_MACHINE_I386 0x014c +#define IMAGE_FILE_MACHINE_IA64 0x0200 +#define IMAGE_FILE_MACHINE_M68K 0x0268 +#define IMAGE_FILE_MACHINE_MIPS16 0x0266 +#define IMAGE_FILE_MACHINE_MIPSFPU 0x0366 +#define IMAGE_FILE_MACHINE_MIPSFPU16 0x0466 +#define IMAGE_FILE_MACHINE_POWERPC 0x01f0 +#define IMAGE_FILE_MACHINE_POWERPCFP 0x01f1 +#define IMAGE_FILE_MACHINE_R3000 0x0162 +#define IMAGE_FILE_MACHINE_R4000 0x0166 +#define IMAGE_FILE_MACHINE_R10000 0x0168 +#define IMAGE_FILE_MACHINE_SH3 0x01a2 +#define IMAGE_FILE_MACHINE_SH3DSP 0x01a3 +#define IMAGE_FILE_MACHINE_SH4 0x01a6 +#define IMAGE_FILE_MACHINE_SH5 0x01a8 +#define IMAGE_FILE_MACHINE_THUMB 0x01c2 +#define IMAGE_FILE_MACHINE_WCEMIPSV2 0x0169 +#define IMAGE_FILE_MACHINE_MASK 0xffff + +/* + * Characteristics + */ +#define IMAGE_FILE_RELOCS_STRIPPED 0x0001 +#define IMAGE_FILE_EXECUTABLE_IMAGE 0x0002 +#define IMAGE_FILE_LINE_NUMS_STRIPPED 0x0004 +#define IMAGE_FILE_LOCAL_SYMS_STRIPPED 0x0008 +#define IMAGE_FILE_AGGRESSIVE_WS_TRIM 0x0010 +#define IMAGE_FILE_LARGE_ADDRESS_AWARE 0x0020 +#define IMAGE_FILE_BYTES_REVERSED_LO 0x0080 +#define IMAGE_FILE_32BIT_MACHINE 0x0100 +#define IMAGE_FILE_DEBUG_STRIPPED 0x0200 +#define IMAGE_FILE_REMOVABLE_RUN_FROM_SWAP 0x0400 +#define IMAGE_FILE_NET_RUN_FROM_SWAP 0x0800 +#define IMAGE_FILE_SYSTEM 0x1000 +#define IMAGE_FILE_DLL 0x2000 +#define IMAGE_FILE_UP_SYSTEM_ONLY 0x4000 +#define IMAGE_FILE_BYTES_REVERSED_HI 0x8000 + +/* + * Windows subsystem + */ +#define IMAGE_SUBSYSTEM_UNKNOWN 0 +#define IMAGE_SUBSYSTEM_NATIVE 1 +#define IMAGE_SUBSYSTEM_WINDOWS_GUI 2 +#define IMAGE_SUBSYSTEM_WINDOWS_CUI 3 +#define IMAGE_SUBSYSTEM_POSIX_CUI 7 +#define IMAGE_SUBSYSTEM_WINDOWS_CE_GUI 9 +#define IMAGE_SUBSYSTEM_EFI_APPLICATION 10 +#define IMAGE_SUBSYSTEM_EFI_BOOT_SERVICE_DRIVER 11 +#define IMAGE_SUBSYSTEM_EFI_RUNTIME_DRIVER 12 +#define IMAGE_SUBSYSTEM_EFI_ROM 13 +#define IMAGE_SUBSYSTEM_XBOX 14 + +/* + * DLL characteristics + */ +#define IMAGE_DLL_CHARACTERISTICS_DYNAMIC_BASE 0x0040 +#define IMAGE_DLL_CHARACTERISTICS_FORCE_INTEGRITY 0x0080 +#define IMAGE_DLL_CHARACTERISTICS_NX_COMPAT 0x0100 +#define IMAGE_DLLCHARACTERISTICS_NO_ISOLATION 0x0200 +#define IMAGE_DLLCHARACTERISTICS_NO_SEH 0x0400 +#define IMAGE_DLLCHARACTERISTICS_NO_BIND 0x0800 +#define IMAGE_DLLCHARACTERISTICS_WDM_DRIVER 0x2000 +#define IMAGE_DLLCHARACTERISTICS_TERMINAL_SERVER_AWARE 0x8000 + +/* + * Section flags + */ +#define IMAGE_SCN_TYPE_REG 0x00000000 +#define IMAGE_SCN_TYPE_DSECT 0x00000001 +#define IMAGE_SCN_TYPE_NOLOAD 0x00000002 +#define IMAGE_SCN_TYPE_GROUP 0x00000004 +#define IMAGE_SCN_TYPE_NO_PAD 0x00000008 +#define IMAGE_SCN_TYPE_COPY 0x00000010 + +#define IMAGE_SCN_CNT_CODE 0x00000020 +#define IMAGE_SCN_CNT_INITIALIZED_DATA 0x00000040 +#define IMAGE_SCN_CNT_UNINITIALIZED_DATA 0x00000080 + +#define IMAGE_SCN_LNK_OTHER 0x00000100 +#define IMAGE_SCN_LNK_INFO 0x00000200 +#define IMAGE_SCN_TYPE_OVER 0x00000400 +#define IMAGE_SCN_LNK_REMOVE 0x00000800 +#define IMAGE_SCN_LNK_COMDAT 0x00001000 + +#define IMAGE_SCN_MAX_RELOC 0xffff + +#define IMAGE_SCN_MEM_FARDATA 0x00008000 +#define IMAGE_SCN_MEM_PURGEABLE 0x00020000 +#define IMAGE_SCN_MEM_16BIT 0x00020000 +#define IMAGE_SCN_MEM_LOCKED 0x00040000 +#define IMAGE_SCN_MEM_PRELOAD 0x00080000 + +#define IMAGE_SCN_ALIGN_1BYTES 0x00100000 +#define IMAGE_SCN_ALIGN_2BYTES 0x00200000 +#define IMAGE_SCN_ALIGN_4BYTES 0x00300000 +#define IMAGE_SCN_ALIGN_8BYTES 0x00400000 +#define IMAGE_SCN_ALIGN_16BYTES 0x00500000 +#define IMAGE_SCN_ALIGN_32BYTES 0x00600000 +#define IMAGE_SCN_ALIGN_64BYTES 0x00700000 +#define IMAGE_SCN_ALIGN_128BYTES 0x00800000 +#define IMAGE_SCN_ALIGN_256BYTES 0x00900000 +#define IMAGE_SCN_ALIGN_512BYTES 0x00a00000 +#define IMAGE_SCN_ALIGN_1024BYTES 0x00b00000 +#define IMAGE_SCN_ALIGN_2048BYTES 0x00c00000 +#define IMAGE_SCN_ALIGN_4096BYTES 0x00d00000 +#define IMAGE_SCN_ALIGN_8192BYTES 0x00e00000 +#define IMAGE_SCN_ALIGN_MASK 0x00f00000 + +#define IMAGE_SCN_LNK_NRELOC_OVFL 0x01000000 +#define IMAGE_SCN_MEM_DISCARDABLE 0x02000000 +#define IMAGE_SCN_MEM_NOT_CACHED 0x04000000 +#define IMAGE_SCN_MEM_NOT_PAGED 0x08000000 +#define IMAGE_SCN_MEM_SHARED 0x10000000 +#define IMAGE_SCN_MEM_EXECUTE 0x20000000 +#define IMAGE_SCN_MEM_READ 0x40000000 +#define IMAGE_SCN_MEM_WRITE 0x80000000 + +/* + * Relocation type x86-64 + */ +#define IMAGE_REL_AMD64_ABSOLUTE 0x0000 +#define IMAGE_REL_AMD64_ADDR64 0x0001 +#define IMAGE_REL_AMD64_ADDR32 0x0002 +#define IMAGE_REL_AMD64_ADDR32NB 0x0003 +#define IMAGE_REL_AMD64_REL32 0x0004 +#define IMAGE_REL_AMD64_REL32_1 0x0005 +#define IMAGE_REL_AMD64_REL32_2 0x0006 +#define IMAGE_REL_AMD64_REL32_3 0x0007 +#define IMAGE_REL_AMD64_REL32_4 0x0008 +#define IMAGE_REL_AMD64_REL32_5 0x0009 +#define IMAGE_REL_AMD64_SECTION 0x000a +#define IMAGE_REL_AMD64_SECREL 0x000b +#define IMAGE_REL_AMD64_SECREL7 0x000c +#define IMAGE_REL_AMD64_TOKEN 0x000d +#define IMAGE_REL_AMD64_SREL32 0x000e +#define IMAGE_REL_AMD64_PAIR 0x000f +#define IMAGE_REL_AMD64_SSPAN32 0x0010 + +/* + * Relocation types i386 + */ +#define IMAGE_REL_I386_ABSOLUTE 0x0000 +#define IMAGE_REL_I386_DIR16 0x0001 +#define IMAGE_REL_I386_REL16 0x0002 +#define IMAGE_REL_I386_DIR32 0x0006 +#define IMAGE_REL_I386_DIR32NB 0x0007 +#define IMAGE_REL_I386_SEG12 0x0009 +#define IMAGE_REL_I386_SECTION 0x000a +#define IMAGE_REL_I386_SECREL 0x000b +#define IMAGE_REL_I386_TOKEN 0x000c +#define IMAGE_REL_I386_SECREL7 0x000d +#define IMAGE_REL_I386_REL32 0x0014 + +/* + * Relocation types ARM + */ +#define IMAGE_REL_ARM_ABSOLUTE 0x0000 +#define IMAGE_REL_ARM_ADDR32 0x0001 +#define IMAGE_REL_ARM_ADDR32NB 0x0002 +#define IMAGE_REL_ARM_BRANCH24 0x0003 +#define IMAGE_REL_ARM_BRANCH11 0x0004 +#define IMAGE_REL_ARM_SECTION 0x000e +#define IMAGE_REL_ARM_SECREL 0x000f + +/* + * Relocation types Hitachi SuperH + */ +#define IMAGE_REL_SH3_ABSOLUTE 0x0000 +#define IMAGE_REL_SH3_DIRECT16 0x0001 +#define IMAGE_REL_SH3_DIRECT32 0x0002 +#define IMAGE_REL_SH3_DIRECT8 0x0003 +#define IMAGE_REL_SH3_DIRECT8_WORD 0x0004 +#define IMAGE_REL_SH3_DIRECT8_LONG 0x0005 +#define IMAGE_REL_SH3_DIRECT4 0x0006 +#define IMAGE_REL_SH3_DIRECT4_WORD 0x0007 +#define IMAGE_REL_SH3_DIRECT4_LONG 0x0008 +#define IMAGE_REL_SH3_PCREL8_WORD 0x0009 +#define IMAGE_REL_SH3_PCREL8_LONG 0x000a +#define IMAGE_REL_SH3_PCREL12_WORD 0x000b +#define IMAGE_REL_SH3_STARTOF_SECTION 0x000c +#define IMAGE_REL_SH3_SIZEOF_SECTION 0x000d +#define IMAGE_REL_SH3_SECTION 0x000e +#define IMAGE_REL_SH3_SECREL 0x000f +#define IMAGE_REL_SH3_DIRECT32_NB 0x0010 +#define IMAGE_REL_SH3_GPREL4_LONG 0x0011 +#define IMAGE_REL_SH3_TOKEN 0x0012 +#define IMAGE_REL_SHM_PCRELPT 0x0013 +#define IMAGE_REL_SHM_REFLO 0x0014 +#define IMAGE_REL_SHM_REFHALF 0x0015 +#define IMAGE_REL_SHM_RELLO 0x0016 +#define IMAGE_REL_SHM_RELHALF 0x0017 +#define IMAGE_REL_SHM_PAIR 0x0018 +#define IMAGE_REL_SHM_NOMODE 0x8000 + +/* + * Relocation types IBM PowerPC processors + */ +#define IMAGE_REL_PPC_ABSOLUTE 0x0000 +#define IMAGE_REL_PPC_ADDR64 0x0001 +#define IMAGE_REL_PPC_ADDR32 0x0002 +#define IMAGE_REL_PPC_ADDR24 0x0003 +#define IMAGE_REL_PPC_ADDR16 0x0004 +#define IMAGE_REL_PPC_ADDR14 0x0005 +#define IMAGE_REL_PPC_REL24 0x0006 +#define IMAGE_REL_PPC_REL14 0x0007 +#define IMAGE_REL_PPC_ADDR32NB 0x000a +#define IMAGE_REL_PPC_SECREL 0x000b +#define IMAGE_REL_PPC_SECTION 0x000c +#define IMAGE_REL_PPC_SECREL16 0x000f +#define IMAGE_REL_PPC_REFHI 0x0010 +#define IMAGE_REL_PPC_REFLO 0x0011 +#define IMAGE_REL_PPC_PAIR 0x0012 +#define IMAGE_REL_PPC_SECRELLO 0x0013 +#define IMAGE_REL_PPC_GPREL 0x0015 +#define IMAGE_REL_PPC_TOKEN 0x0016 + +/* + * Relocation types Intel Itanium processor family (IPF) + */ +#define IMAGE_REL_IA64_ABSOLUTE 0x0000 +#define IMAGE_REL_IA64_IMM14 0x0001 +#define IMAGE_REL_IA64_IMM22 0x0002 +#define IMAGE_REL_IA64_IMM64 0x0003 +#define IMAGE_REL_IA64_DIR32 0x0004 +#define IMAGE_REL_IA64_DIR64 0x0005 +#define IMAGE_REL_IA64_PCREL21B 0x0006 +#define IMAGE_REL_IA64_PCREL21M 0x0007 +#define IMAGE_REL_IA64_PCREL21F 0x0008 +#define IMAGE_REL_IA64_GPREL22 0x0009 +#define IMAGE_REL_IA64_LTOFF22 0x000a +#define IMAGE_REL_IA64_SECTION 0x000b +#define IMAGE_REL_IA64_SECREL22 0x000c +#define IMAGE_REL_IA64_SECREL64I 0x000d +#define IMAGE_REL_IA64_SECREL32 0x000e +#define IMAGE_REL_IA64_DIR32NB 0x0010 +#define IMAGE_REL_IA64_SREL14 0x0011 +#define IMAGE_REL_IA64_SREL22 0x0012 +#define IMAGE_REL_IA64_SREL32 0x0013 +#define IMAGE_REL_IA64_UREL32 0x0014 +#define IMAGE_REL_IA64_PCREL60X 0x0015 +#define IMAGE_REL_IA64_PCREL 60B 0x0016 +#define IMAGE_REL_IA64_PCREL60F 0x0017 +#define IMAGE_REL_IA64_PCREL60I 0x0018 +#define IMAGE_REL_IA64_PCREL60M 0x0019 +#define IMAGE_REL_IA64_IMMGPREL64 0x001a +#define IMAGE_REL_IA64_TOKEN 0x001b +#define IMAGE_REL_IA64_GPREL32 0x001c +#define IMAGE_REL_IA64_ADDEND 0x001f + +/* + * Relocation types MIPS Processors + */ +#define IMAGE_REL_MIPS_ABSOLUTE 0x0000 +#define IMAGE_REL_MIPS_REFHALF 0x0001 +#define IMAGE_REL_MIPS_REFWORD 0x0002 +#define IMAGE_REL_MIPS_JMPADDR 0x0003 +#define IMAGE_REL_MIPS_REFHI 0x0004 +#define IMAGE_REL_MIPS_REFLO 0x0005 +#define IMAGE_REL_MIPS_GPREL 0x0006 +#define IMAGE_REL_MIPS_LITERAL 0x0007 +#define IMAGE_REL_MIPS_SECTION 0x000a +#define IMAGE_REL_MIPS_SECREL 0x000b +#define IMAGE_REL_MIPS_SECRELLO 0x000c +#define IMAGE_REL_MIPS_SECRELHI 0x000d +#define IMAGE_REL_MIPS_JMPADDR16 0x0010 +#define IMAGE_REL_MIPS_REFWORDNB 0x0022 +#define IMAGE_REL_MIPS_PAIR 0x0025 + +/* + * Relocation types Mitsubishi M32R + */ +#define IMAGE_REL_M32R_ABSOLUTE 0x0000 +#define IMAGE_REL_M32R_ADDR32 0x0001 +#define IMAGE_REL_M32R_ADDR32NB 0x0002 +#define IMAGE_REL_M32R_ADDR24 0x0003 +#define IMAGE_REL_M32R_GPREL16 0x0004 +#define IMAGE_REL_M32R_PCREL24 0x0005 +#define IMAGE_REL_M32R_PCREL16 0x0006 +#define IMAGE_REL_M32R_PCREL8 0x0007 +#define IMAGE_REL_M32R_REFHALF 0x0008 +#define IMAGE_REL_M32R_REFHI 0x0009 +#define IMAGE_REL_M32R_REFLO 0x000a +#define IMAGE_REL_M32R_PAIR 0x000b +#define IMAGE_REL_M32R_SECTION 0x000c +#define IMAGE_REL_M32R_SECREL 0x000d +#define IMAGE_REL_M32R_TOKEN 0x000e + +/* + * Section number values + */ +#define IMAGE_SYM_UNDEFINED 0 +#define IMAGE_SYM_ABSOLUTE -1 +#define IMAGE_SYM_DEBUG -2 + +/* + * Type representation + */ +#define IMAGE_SYM_TYPE_NULL 0 +#define IMAGE_SYM_TYPE_VOID 1 +#define IMAGE_SYM_TYPE_CHAR 2 +#define IMAGE_SYM_TYPE_SHORT 3 +#define IMAGE_SYM_TYPE_INT 4 +#define IMAGE_SYM_TYPE_LONG 5 +#define IMAGE_SYM_TYPE_FLOAT 6 +#define IMAGE_SYM_TYPE_DOUBLE 7 +#define IMAGE_SYM_TYPE_STRUCT 8 +#define IMAGE_SYM_TYPE_UNION 9 +#define IMAGE_SYM_TYPE_ENUM 10 +#define IMAGE_SYM_TYPE_MOE 11 +#define IMAGE_SYM_TYPE_BYTE 12 +#define IMAGE_SYM_TYPE_WORD 13 +#define IMAGE_SYM_TYPE_UINT 14 +#define IMAGE_SYM_TYPE_DWORD 15 + +#define IMAGE_SYM_DTYPE_NULL 0 +#define IMAGE_SYM_DTYPE_POINTER 1 +#define IMAGE_SYM_DTYPE_FUNCTION 2 +#define IMAGE_SYM_DTYPE_ARRAY 3 + +/* + * Storage class + */ +#define IMAGE_SYM_CLASS_END_OF_FUNCTION -1 +#define IMAGE_SYM_CLASS_NULL 0 +#define IMAGE_SYM_CLASS_AUTOMATIC 1 +#define IMAGE_SYM_CLASS_EXTERNAL 2 +#define IMAGE_SYM_CLASS_STATIC 3 +#define IMAGE_SYM_CLAS S_REGISTER 4 +#define IMAGE_SYM_CLASS_EXTERNAL_DEF 5 +#define IMAGE_SYM_CLASS_LABEL 6 +#define IMAGE_SYM_CLASS_UNDEFINED_LABEL 7 +#define IMAGE_SYM_CLASS_MEMBER_OF_STRUCT 8 +#define IMAGE_SYM_CLASS_ARGUMENT 9 +#define IMAGE_SYM_CLASS_STRUCT_TAG 10 +#define IMAGE_SYM_CLASS_MEMBER_OF_UNION 11 +#define IMAGE_SYM_CLASS_UNION_TAG 12 +#define IMAGE_SYM_CLASS_TYPE_DEFINITION 13 +#define IMAGE_SYM_CLASS_UNDEFINED_STATIC 14 +#define IMAGE_SYM_CLASS_ENUM_TAG 15 +#define IMAGE_SYM_CLASS_MEMBER_OF_ENUM 16 +#define IMAGE_SYM_CLASS_REGISTER_PARAM 17 +#define IMAGE_SYM_CLASS_BIT_FIELD 18 +#define IMAGE_SYM_CLASS_BLOCK 100 +#define IMAGE_SYM_CLASS_FUNCTION 101 +#define IMAGE_SYM_CLASS_END_OF_STRUCT 102 +#define IMAGE_SYM_CLASS_FILE 103 +#define IMAGE_SYM_CLASS_SECTION 104 +#define IMAGE_SYM_CLASS_WEAK_EXTERNAL 105 +#define IMAGE_SYM_CLASS_CLR_TOKEN 107 + +/* + * COMDAT sections + */ +#define IMAGE_COMDAT_SELECT_NODUPLICATES 1 +#define IMAGE_COMDAT_SELECT_ANY 2 +#define IMAGE_COMDAT_SELECT_SAME_SIZE 3 +#define IMAGE_COMDAT_SELECT_EXACT_MATCH 4 +#define IMAGE_COMDAT_SELECT_ASSOCIATIVE 5 +#define IMAGE_COMDAT_SELECT_LARGEST 6 + +/* + * Attribute certificate table + */ +#define WIN_CERT_REVISION_1_0 0x0100 +#define WIN_CERT_REVISION_2_0 0x0200 +#define WIN_CERT_TYPE_X509 0x0001 +#define WIN_CERT_TYPE_PKCS_SIGNED_DATA 0x0002 +#define WIN_CERT_TYPE_RESERVED_1 0x0003 +#define WIN_CERT_TYPE_TS_STACK_SIGNED 0x0004 + +/* + * Debug type + */ +#define IMAGE_DEBUG_TYPE_UNKNOWN 0 +#define IMAGE_DEBUG_TYPE_COFF 1 +#define IMAGE_DEBUG_TYPE_CODEVIEW 2 +#define IMAGE_DEBUG_TYPE_FPO 3 +#define IMAGE_DEBUG_TYPE_MISC 4 +#define IMAGE_DEBUG_TYPE_EXCEPTION 5 +#define IMAGE_DEBUG_TYPE_FIXUP 6 +#define IMAGE_DEBUG_TYPE_OMAP_TO_SRC 7 +#define IMAGE_DEBUG_TYPE_OMAP_FROM_SRC 8 +#define IMAGE_DEBUG_TYP E_BORLAND 9 +#define IMAGE_DEBUG_TYPE_RESERVED10 10 +#define IMAGE_DEBUG_TYPE_CLSID 11 + +/* + * Base relocation types + */ +#define IMAGE_REL_BASED_ABSOLUTE 0 +#define IMAGE_REL_BASED_HIGH 1 +#define IMAGE_REL_BASED_LOW 2 +#define IMAGE_REL_BASED_HIGHLOW 3 +#define IMAGE_REL_BASED_HIGHADJ 4 +#define IMAGE_REL_BASED_MIPS_JMPADDR 5 +#define IMAGE_REL_BASED_MIPS_JMPADDR16 9 +#define IMAGE_REL_BASED_DIR64 10 + +/* + * TLS callback functions + */ +#define DLL_PROCESS_ATTACH 1 +#define DLL_THREAD_ATTACH 2 +#define DLL_THREAD_DETACH 3 +#define DLL_PROCESS_DETACH 0 + +/* + * Import Type + */ +#define IMPORT_CODE 0 +#define IMPORT_DATA 1 +#define IMPORT_CONST 2 + +/* + * Import name type + */ +#define IMPORT_ORDINAL 0 +#define IMPORT_NAME 1 +#define IMPORT_NAME_NOPREFIX 2 +#define IMPORT_NAME_UNDECORATE 3 + +struct coff_Section { + struct SAA *data; + uint32_t len; + int nrelocs; + int32_t index; + struct coff_Reloc *head, **tail; + uint32_t flags; /* section flags */ + uint32_t align_flags; /* user-specified alignment flags */ + uint32_t sectalign_flags; /* minimum alignment from sectalign */ + char *name; + int32_t namepos; /* Offset of name into the strings table */ + int32_t pos, relpos; + int64_t pass_last_seen; + struct coff_SymIdxReloc *symidx_reloc_head; + + /* comdat-related members */ + char *comdat_name; + uint32_t checksum; /* set only for comdat sections */ + int8_t comdat_selection; + int8_t comdat_symbol; /* is the "comdat name" in symbol table? */ + int32_t comdat_associated; /* associated section for selection==5 */ +}; + +struct coff_Reloc { + struct coff_Reloc *next; + int32_t address; /* relative to _start_ of section */ + int32_t symbol; /* symbol number */ + enum { + SECT_SYMBOLS, + ABS_SYMBOL, + REAL_SYMBOLS + } symbase; /* relocation for symbol number :) */ + int16_t type; +}; + +struct coff_SymIdxReloc { + struct coff_SymIdxReloc *next; + uint32_t symbol; /* symbol number */ + uint32_t offset; /* byte offset into the secetion. */ + uint32_t size; /* the size of the area to fix up */ +}; + +struct coff_Symbol { + char name[9]; + int32_t strpos; /* string table position of name */ + int32_t value; /* address, or COMMON variable size */ + int section; /* section number where it's defined + * - in COFF codes, not NASM codes */ + bool is_global; /* is it a global symbol or not? */ + int16_t type; /* 0 - notype, 0x20 - function */ + int32_t namlen; /* full name length */ +}; + +struct coff_DebugInfo { + int32_t segto; + int32_t seg; + uint64_t size; + struct coff_Section *section; +}; + +extern struct coff_Section **coff_sects; +extern int coff_nsects; +extern struct SAA *coff_syms; +extern uint32_t coff_nsyms; +extern struct SAA *coff_strs; +extern bool win32, win64; + +extern char coff_infile[FILENAME_MAX]; +extern char coff_outfile[FILENAME_MAX]; + +extern int coff_make_section(char *name, uint32_t flags); + + +#endif /* PECOFF_H */ diff --git a/include/perfhash.h b/include/perfhash.h new file mode 100644 index 0000000..0674ddb --- /dev/null +++ b/include/perfhash.h @@ -0,0 +1,22 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 2017 The NASM Authors - All Rights Reserved */ + +#ifndef PERFHASH_H +#define PERFHASH_H 1 + +#include "compiler.h" +#include "nasmlib.h" /* For invalid_enum_str() */ + +struct perfect_hash { + uint64_t crcinit; + uint32_t hashmask; + uint32_t tbllen; + int tbloffs; + int errval; + const int16_t *hashvals; + const char * const *strings; +}; + +int pure_func perfhash_find(const struct perfect_hash *, const char *); + +#endif /* PERFHASH_H */ diff --git a/include/pptok.h b/include/pptok.h new file mode 100644 index 0000000..6138caf --- /dev/null +++ b/include/pptok.h @@ -0,0 +1,330 @@ +/* Automatically generated from ./asm/pptok.dat by ./asm/pptok.pl */ +/* Do not edit */ + +enum preproc_token { + PP_IF = 0, + PP_IF_BOGUS = 1, + PP_IFCTX = 2, + PP_IFDEF = 3, + PP_IFDEFALIAS = 4, + PP_IFDIFI = 5, + PP_IFDIRECTIVE = 6, + PP_IFEMPTY = 7, + PP_IFENV = 8, + PP_IFFILE = 9, + PP_IFID = 10, + PP_IFIDN = 11, + PP_IFIDNI = 12, + PP_IFMACRO = 13, + PP_IFNUM = 14, + PP_IFSTR = 15, + PP_IFTOKEN = 16, + PP_IFUSABLE = 17, + PP_IFUSING = 18, + PP_IF_COND_19 = 19, + PP_IF_COND_20 = 20, + PP_IF_COND_21 = 21, + PP_IF_COND_22 = 22, + PP_IF_COND_23 = 23, + PP_IF_COND_24 = 24, + PP_IF_COND_25 = 25, + PP_IF_COND_26 = 26, + PP_IF_COND_27 = 27, + PP_IF_COND_28 = 28, + PP_IF_COND_29 = 29, + PP_IF_COND_30 = 30, + PP_IF_COND_31 = 31, + PP_IFN = 32, + PP_IFN_BOGUS = 33, + PP_IFNCTX = 34, + PP_IFNDEF = 35, + PP_IFNDEFALIAS = 36, + PP_IFNDIFI = 37, + PP_IFNDIRECTIVE = 38, + PP_IFNEMPTY = 39, + PP_IFNENV = 40, + PP_IFNFILE = 41, + PP_IFNID = 42, + PP_IFNIDN = 43, + PP_IFNIDNI = 44, + PP_IFNMACRO = 45, + PP_IFNNUM = 46, + PP_IFNSTR = 47, + PP_IFNTOKEN = 48, + PP_IFNUSABLE = 49, + PP_IFNUSING = 50, + PP_IFN_COND_19 = 51, + PP_IFN_COND_20 = 52, + PP_IFN_COND_21 = 53, + PP_IFN_COND_22 = 54, + PP_IFN_COND_23 = 55, + PP_IFN_COND_24 = 56, + PP_IFN_COND_25 = 57, + PP_IFN_COND_26 = 58, + PP_IFN_COND_27 = 59, + PP_IFN_COND_28 = 60, + PP_IFN_COND_29 = 61, + PP_IFN_COND_30 = 62, + PP_IFN_COND_31 = 63, + PP_ELIF = 64, + PP_ELIF_BOGUS = 65, + PP_ELIFCTX = 66, + PP_ELIFDEF = 67, + PP_ELIFDEFALIAS = 68, + PP_ELIFDIFI = 69, + PP_ELIFDIRECTIVE = 70, + PP_ELIFEMPTY = 71, + PP_ELIFENV = 72, + PP_ELIFFILE = 73, + PP_ELIFID = 74, + PP_ELIFIDN = 75, + PP_ELIFIDNI = 76, + PP_ELIFMACRO = 77, + PP_ELIFNUM = 78, + PP_ELIFSTR = 79, + PP_ELIFTOKEN = 80, + PP_ELIFUSABLE = 81, + PP_ELIFUSING = 82, + PP_ELIF_COND_19 = 83, + PP_ELIF_COND_20 = 84, + PP_ELIF_COND_21 = 85, + PP_ELIF_COND_22 = 86, + PP_ELIF_COND_23 = 87, + PP_ELIF_COND_24 = 88, + PP_ELIF_COND_25 = 89, + PP_ELIF_COND_26 = 90, + PP_ELIF_COND_27 = 91, + PP_ELIF_COND_28 = 92, + PP_ELIF_COND_29 = 93, + PP_ELIF_COND_30 = 94, + PP_ELIF_COND_31 = 95, + PP_ELIFN = 96, + PP_ELIFN_BOGUS = 97, + PP_ELIFNCTX = 98, + PP_ELIFNDEF = 99, + PP_ELIFNDEFALIAS = 100, + PP_ELIFNDIFI = 101, + PP_ELIFNDIRECTIVE = 102, + PP_ELIFNEMPTY = 103, + PP_ELIFNENV = 104, + PP_ELIFNFILE = 105, + PP_ELIFNID = 106, + PP_ELIFNIDN = 107, + PP_ELIFNIDNI = 108, + PP_ELIFNMACRO = 109, + PP_ELIFNNUM = 110, + PP_ELIFNSTR = 111, + PP_ELIFNTOKEN = 112, + PP_ELIFNUSABLE = 113, + PP_ELIFNUSING = 114, + PP_ELIFN_COND_19 = 115, + PP_ELIFN_COND_20 = 116, + PP_ELIFN_COND_21 = 117, + PP_ELIFN_COND_22 = 118, + PP_ELIFN_COND_23 = 119, + PP_ELIFN_COND_24 = 120, + PP_ELIFN_COND_25 = 121, + PP_ELIFN_COND_26 = 122, + PP_ELIFN_COND_27 = 123, + PP_ELIFN_COND_28 = 124, + PP_ELIFN_COND_29 = 125, + PP_ELIFN_COND_30 = 126, + PP_ELIFN_COND_31 = 127, + PP_ALIASES = 128, + PP_ARG = 129, + PP_CLEAR = 130, + PP_DEPEND = 131, + PP_ELSE = 132, + PP_ENDIF = 133, + PP_ENDM = 134, + PP_ENDMACRO = 135, + PP_ENDREP = 136, + PP_ERROR = 137, + PP_EXITMACRO = 138, + PP_EXITREP = 139, + PP_FATAL = 140, + PP_INCLUDE = 141, + PP_LINE = 142, + PP_LOCAL = 143, + PP_NOTE = 144, + PP_NULL = 145, + PP_POP = 146, + PP_PRAGMA = 147, + PP_PUSH = 148, + PP_REP = 149, + PP_REPL = 150, + PP_REQUIRE = 151, + PP_ROTATE = 152, + PP_STACKSIZE = 153, + PP_UNDEF = 154, + PP_UNDEFALIAS = 155, + PP_USE = 156, + PP_WARNING = 157, + PP_ASSIGN = 158, + PP_IASSIGN = 159, + PP_DEFALIAS = 160, + PP_IDEFALIAS = 161, + PP_DEFINE = 162, + PP_IDEFINE = 163, + PP_DEFSTR = 164, + PP_IDEFSTR = 165, + PP_DEFTOK = 166, + PP_IDEFTOK = 167, + PP_MACRO = 168, + PP_IMACRO = 169, + PP_PATHSEARCH = 170, + PP_IPATHSEARCH = 171, + PP_RMACRO = 172, + PP_IRMACRO = 173, + PP_STRCAT = 174, + PP_ISTRCAT = 175, + PP_STRLEN = 176, + PP_ISTRLEN = 177, + PP_SUBSTR = 178, + PP_ISUBSTR = 179, + PP_XDEFINE = 180, + PP_IXDEFINE = 181, + PP_UNMACRO = 182, + PP_UNIMACRO = 183, + PP_count = 184, + PP_invalid = -1 +}; + +#define PP_COND(x) ((x) & 0x1f) +#define PP_IS_COND(x) ((unsigned int)(x) < PP_ALIASES) +#define PP_COND_NEGATIVE(x) (!!((x) & 0x20)) + +#define PP_HAS_CASE(x) ((x) >= PP_ASSIGN) +#define PP_INSENSITIVE(x) ((x) & 1) +#define PP_TOKLEN_MAX 15 + +#define CASE_PP_IF \ + case PP_IF:\ + case PP_IF_BOGUS:\ + case PP_IFCTX:\ + case PP_IFDEF:\ + case PP_IFDEFALIAS:\ + case PP_IFDIFI:\ + case PP_IFDIRECTIVE:\ + case PP_IFEMPTY:\ + case PP_IFENV:\ + case PP_IFFILE:\ + case PP_IFID:\ + case PP_IFIDN:\ + case PP_IFIDNI:\ + case PP_IFMACRO:\ + case PP_IFNUM:\ + case PP_IFSTR:\ + case PP_IFTOKEN:\ + case PP_IFUSABLE:\ + case PP_IFUSING:\ + case PP_IF_COND_19:\ + case PP_IF_COND_20:\ + case PP_IF_COND_21:\ + case PP_IF_COND_22:\ + case PP_IF_COND_23:\ + case PP_IF_COND_24:\ + case PP_IF_COND_25:\ + case PP_IF_COND_26:\ + case PP_IF_COND_27:\ + case PP_IF_COND_28:\ + case PP_IF_COND_29:\ + case PP_IF_COND_30:\ + case PP_IF_COND_31:\ + case PP_IFN:\ + case PP_IFN_BOGUS:\ + case PP_IFNCTX:\ + case PP_IFNDEF:\ + case PP_IFNDEFALIAS:\ + case PP_IFNDIFI:\ + case PP_IFNDIRECTIVE:\ + case PP_IFNEMPTY:\ + case PP_IFNENV:\ + case PP_IFNFILE:\ + case PP_IFNID:\ + case PP_IFNIDN:\ + case PP_IFNIDNI:\ + case PP_IFNMACRO:\ + case PP_IFNNUM:\ + case PP_IFNSTR:\ + case PP_IFNTOKEN:\ + case PP_IFNUSABLE:\ + case PP_IFNUSING:\ + case PP_IFN_COND_19:\ + case PP_IFN_COND_20:\ + case PP_IFN_COND_21:\ + case PP_IFN_COND_22:\ + case PP_IFN_COND_23:\ + case PP_IFN_COND_24:\ + case PP_IFN_COND_25:\ + case PP_IFN_COND_26:\ + case PP_IFN_COND_27:\ + case PP_IFN_COND_28:\ + case PP_IFN_COND_29:\ + case PP_IFN_COND_30:\ + case PP_IFN_COND_31 +#define CASE_PP_ELIF \ + case PP_ELIF:\ + case PP_ELIF_BOGUS:\ + case PP_ELIFCTX:\ + case PP_ELIFDEF:\ + case PP_ELIFDEFALIAS:\ + case PP_ELIFDIFI:\ + case PP_ELIFDIRECTIVE:\ + case PP_ELIFEMPTY:\ + case PP_ELIFENV:\ + case PP_ELIFFILE:\ + case PP_ELIFID:\ + case PP_ELIFIDN:\ + case PP_ELIFIDNI:\ + case PP_ELIFMACRO:\ + case PP_ELIFNUM:\ + case PP_ELIFSTR:\ + case PP_ELIFTOKEN:\ + case PP_ELIFUSABLE:\ + case PP_ELIFUSING:\ + case PP_ELIF_COND_19:\ + case PP_ELIF_COND_20:\ + case PP_ELIF_COND_21:\ + case PP_ELIF_COND_22:\ + case PP_ELIF_COND_23:\ + case PP_ELIF_COND_24:\ + case PP_ELIF_COND_25:\ + case PP_ELIF_COND_26:\ + case PP_ELIF_COND_27:\ + case PP_ELIF_COND_28:\ + case PP_ELIF_COND_29:\ + case PP_ELIF_COND_30:\ + case PP_ELIF_COND_31:\ + case PP_ELIFN:\ + case PP_ELIFN_BOGUS:\ + case PP_ELIFNCTX:\ + case PP_ELIFNDEF:\ + case PP_ELIFNDEFALIAS:\ + case PP_ELIFNDIFI:\ + case PP_ELIFNDIRECTIVE:\ + case PP_ELIFNEMPTY:\ + case PP_ELIFNENV:\ + case PP_ELIFNFILE:\ + case PP_ELIFNID:\ + case PP_ELIFNIDN:\ + case PP_ELIFNIDNI:\ + case PP_ELIFNMACRO:\ + case PP_ELIFNNUM:\ + case PP_ELIFNSTR:\ + case PP_ELIFNTOKEN:\ + case PP_ELIFNUSABLE:\ + case PP_ELIFNUSING:\ + case PP_ELIFN_COND_19:\ + case PP_ELIFN_COND_20:\ + case PP_ELIFN_COND_21:\ + case PP_ELIFN_COND_22:\ + case PP_ELIFN_COND_23:\ + case PP_ELIFN_COND_24:\ + case PP_ELIFN_COND_25:\ + case PP_ELIFN_COND_26:\ + case PP_ELIFN_COND_27:\ + case PP_ELIFN_COND_28:\ + case PP_ELIFN_COND_29:\ + case PP_ELIFN_COND_30:\ + case PP_ELIFN_COND_31 diff --git a/include/preproc.h b/include/preproc.h new file mode 100644 index 0000000..cf43bb5 --- /dev/null +++ b/include/preproc.h @@ -0,0 +1,23 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 1996-2025 The NASM Authors - All Rights Reserved */ + +/* + * preproc.h header file for preproc.c + */ + +#ifndef NASM_PREPROC_H +#define NASM_PREPROC_H + +#include "nasmlib.h" +#include "pptok.h" + +extern const char * const pp_directives[]; +extern const uint8_t pp_directives_len[]; + +enum preproc_token pp_token_hash(const char *token); +enum preproc_token pp_tasm_token_hash(const char *token); + +/* Opens an include file or input file. This uses the include path. */ +FILE *pp_input_fopen(const char *filename, enum file_flags mode); + +#endif diff --git a/include/quote.h b/include/quote.h new file mode 100644 index 0000000..cd48b6b --- /dev/null +++ b/include/quote.h @@ -0,0 +1,30 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 1996-2009 The NASM Authors - All Rights Reserved */ + +#ifndef NASM_QUOTE_H +#define NASM_QUOTE_H + +#include "compiler.h" + +char *nasm_quote(const char *str, size_t *len); +char *nasm_quote_cstr(const char *str, size_t *len); +size_t nasm_unquote_anystr(char *str, char **endptr, + uint32_t badctl, char qstart); +size_t nasm_unquote(char *str, char **endptr); +size_t nasm_unquote_cstr(char *str, char **endptr); +char *nasm_skip_string(const char *str); + +/* Arguments used with nasm_quote_anystr() */ + +/* + * These are the only control characters when we produce a C string: + * BEL BS TAB ESC + */ +#define OKCTL ((1U << '\a') | (1U << '\b') | (1U << '\t') | (1U << 27)) +#define BADCTL (~(uint32_t)OKCTL) + +/* Initial quotation mark */ +#define STR_C '\"' +#define STR_NASM '`' + +#endif /* NASM_QUOTE_H */ diff --git a/include/raa.h b/include/raa.h new file mode 100644 index 0000000..96c98ed --- /dev/null +++ b/include/raa.h @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 1996-2009 The NASM Authors - All Rights Reserved */ + +#ifndef NASM_RAA_H +#define NASM_RAA_H 1 + +#include "compiler.h" + +struct RAA; +typedef uint64_t raaindex; + +#define raa_init() NULL +void raa_free(struct RAA *); +int64_t pure_func raa_read(struct RAA *, raaindex); +void * pure_func raa_read_ptr(struct RAA *, raaindex); +struct RAA * never_null raa_write(struct RAA *r, raaindex posn, int64_t value); +struct RAA * never_null raa_write_ptr(struct RAA *r, raaindex posn, void *value); + +#endif /* NASM_RAA_H */ diff --git a/include/rbtree.h b/include/rbtree.h new file mode 100644 index 0000000..4d3d4f3 --- /dev/null +++ b/include/rbtree.h @@ -0,0 +1,78 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 1996-2020 The NASM Authors - All Rights Reserved */ + +#ifndef NASM_RBTREE_H +#define NASM_RBTREE_H + +#include "compiler.h" + +/* + * This structure should be embedded in a larger data structure; + * the final output from rb_search() can then be converted back + * to the larger data structure via container_of(). + * + * An empty tree is simply represented by a NULL pointer. + */ + +/* Note: the values of these flags is significant */ +enum rbtree_node_flags { + RBTREE_NODE_BLACK = 1, /* Node color is black */ + RBTREE_NODE_PRED = 2, /* Left pointer is an uplink */ + RBTREE_NODE_SUCC = 4 /* Right pointer is an uplink */ +}; + +struct rbtree { + uint64_t key; + struct rbtree_metadata { + struct rbtree *left, *right; + enum rbtree_node_flags flags; + } m; +}; + +/* + * Add a node to a tree. Returns the new root pointer. + * The key value in the structure needs to be preinitialized; + * the rest of the structure should be zero. + */ +struct rbtree *rb_insert(struct rbtree *, struct rbtree *); + +/* + * Find a node in the tree corresponding to the key immediately + * <= the passed-in key value. + */ +struct rbtree * pure_func rb_search(const struct rbtree *, uint64_t); + +/* + * Find a node in the tree exactly matching the key value. + */ +struct rbtree * pure_func rb_search_exact(const struct rbtree *, uint64_t); + +/* + * Return the immediately previous or next node in key order. + * Returns NULL if this node is the end of the tree. + * These operations are safe for complete (but not partial!) + * tree walk-with-destruction in key order. + */ +struct rbtree * pure_func rb_prev(const struct rbtree *); +struct rbtree * pure_func rb_next(const struct rbtree *); + +/* + * Return the very first or very last node in key order. + */ +struct rbtree * pure_func rb_first(const struct rbtree *); +struct rbtree * pure_func rb_last(const struct rbtree *); + +/* + * Left and right nodes, if real. These operations are + * safe for tree destruction, but not for splitting a tree. + */ +static inline struct rbtree *rb_left(const struct rbtree *rb) +{ + return (rb->m.flags & RBTREE_NODE_PRED) ? NULL : rb->m.left; +} +static inline struct rbtree *rb_right(const struct rbtree *rb) +{ + return (rb->m.flags & RBTREE_NODE_SUCC) ? NULL : rb->m.right; +} + +#endif /* NASM_RBTREE_H */ diff --git a/include/rdoff.h b/include/rdoff.h new file mode 100644 index 0000000..721524a --- /dev/null +++ b/include/rdoff.h @@ -0,0 +1,139 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 1996-2017 The NASM Authors - All Rights Reserved */ + +/* + * rdoff.h RDOFF Object File manipulation routines header file + */ + +#ifndef RDOFF_H +#define RDOFF_H 1 + +/* + * RDOFF definitions. They are used by RDOFF utilities and by NASM's + * 'outrdf2.c' output module. + */ + +/* RDOFF format revision (currently used only when printing the version) */ +#define RDOFF2_REVISION "0.6.1" + +/* RDOFF2 file signature */ +#define RDOFF2_SIGNATURE "RDOFF2" + +/* Maximum size of an import/export label (including trailing zero) */ +#define EXIM_LABEL_MAX 256 + +/* Maximum size of library or module name (including trailing zero) */ +#define MODLIB_NAME_MAX 128 + +/* Maximum number of segments that we can handle in one file */ +#define RDF_MAXSEGS 64 + +/* Record types that may present the RDOFF header */ +#define RDFREC_GENERIC 0 +#define RDFREC_RELOC 1 +#define RDFREC_IMPORT 2 +#define RDFREC_GLOBAL 3 +#define RDFREC_DLL 4 +#define RDFREC_BSS 5 +#define RDFREC_SEGRELOC 6 +#define RDFREC_FARIMPORT 7 +#define RDFREC_MODNAME 8 +#define RDFREC_COMMON 10 + +/* + * Generic record - contains the type and length field, plus a 128 byte + * array 'data' + */ +struct GenericRec { + uint8_t type; + uint8_t reclen; + char data[128]; +}; + +/* + * Relocation record + */ +struct RelocRec { + uint8_t type; /* must be 1 */ + uint8_t reclen; /* content length */ + uint8_t segment; /* only 0 for code, or 1 for data supported, + but add 64 for relative refs (ie do not require + reloc @ loadtime, only linkage) */ + int32_t offset; /* from start of segment in which reference is loc'd */ + uint8_t length; /* 1 2 or 4 bytes */ + uint16_t refseg; /* segment to which reference refers to */ +}; + +/* + * Extern/import record + */ +struct ImportRec { + uint8_t type; /* must be 2 */ + uint8_t reclen; /* content length */ + uint8_t flags; /* SYM_* flags (see below) */ + uint16_t segment; /* segment number allocated to the label for reloc + records - label is assumed to be at offset zero + in this segment, so linker must fix up with offset + of segment and of offset within segment */ + char label[EXIM_LABEL_MAX]; /* zero terminated, should be written to file + until the zero, but not after it */ +}; + +/* + * Public/export record + */ +struct ExportRec { + uint8_t type; /* must be 3 */ + uint8_t reclen; /* content length */ + uint8_t flags; /* SYM_* flags (see below) */ + uint8_t segment; /* segment referred to (0/1/2) */ + int32_t offset; /* offset within segment */ + char label[EXIM_LABEL_MAX]; /* zero terminated as in import */ +}; + +/* + * DLL record + */ +struct DLLRec { + uint8_t type; /* must be 4 */ + uint8_t reclen; /* content length */ + char libname[MODLIB_NAME_MAX]; /* name of library to link with at load time */ +}; + +/* + * BSS record + */ +struct BSSRec { + uint8_t type; /* must be 5 */ + uint8_t reclen; /* content length */ + int32_t amount; /* number of bytes BSS to reserve */ +}; + +/* + * Module name record + */ +struct ModRec { + uint8_t type; /* must be 8 */ + uint8_t reclen; /* content length */ + char modname[MODLIB_NAME_MAX]; /* module name */ +}; + +/* + * Common variable record + */ +struct CommonRec { + uint8_t type; /* must be 10 */ + uint8_t reclen; /* equals 7+label length */ + uint16_t segment; /* segment number */ + int32_t size; /* size of common variable */ + uint16_t align; /* alignment (power of two) */ + char label[EXIM_LABEL_MAX]; /* zero terminated as in import */ +}; + +/* Flags for ExportRec */ +#define SYM_DATA 1 +#define SYM_FUNCTION 2 +#define SYM_GLOBAL 4 +#define SYM_IMPORT 8 + +#endif /* RDOFF_H */ diff --git a/include/regdis.h b/include/regdis.h new file mode 100644 index 0000000..d03aec1 --- /dev/null +++ b/include/regdis.h @@ -0,0 +1,28 @@ +/* automatically generated from ./x86/regs.dat - do not edit */ + +#ifndef NASM_REGDIS_H +#define NASM_REGDIS_H + +#include "regs.h" + +#define DISREGTBLSZ 32 + +extern const enum reg_enum nasm_rd_bndreg[DISREGTBLSZ]; +extern const enum reg_enum nasm_rd_creg[DISREGTBLSZ]; +extern const enum reg_enum nasm_rd_dreg[DISREGTBLSZ]; +extern const enum reg_enum nasm_rd_fpureg[DISREGTBLSZ]; +extern const enum reg_enum nasm_rd_mmxreg[DISREGTBLSZ]; +extern const enum reg_enum nasm_rd_opmaskreg[DISREGTBLSZ]; +extern const enum reg_enum nasm_rd_reg16[DISREGTBLSZ]; +extern const enum reg_enum nasm_rd_reg32[DISREGTBLSZ]; +extern const enum reg_enum nasm_rd_reg64[DISREGTBLSZ]; +extern const enum reg_enum nasm_rd_reg8[DISREGTBLSZ]; +extern const enum reg_enum nasm_rd_reg8_rex[DISREGTBLSZ]; +extern const enum reg_enum nasm_rd_sreg[DISREGTBLSZ]; +extern const enum reg_enum nasm_rd_tmmreg[DISREGTBLSZ]; +extern const enum reg_enum nasm_rd_treg[DISREGTBLSZ]; +extern const enum reg_enum nasm_rd_xmmreg[DISREGTBLSZ]; +extern const enum reg_enum nasm_rd_ymmreg[DISREGTBLSZ]; +extern const enum reg_enum nasm_rd_zmmreg[DISREGTBLSZ]; + +#endif /* NASM_REGDIS_H */ diff --git a/include/regs.h b/include/regs.h new file mode 100644 index 0000000..71a8529 --- /dev/null +++ b/include/regs.h @@ -0,0 +1,706 @@ +/* automatically generated from ./x86/regs.dat - do not edit */ + +#ifndef NASM_REGS_H +#define NASM_REGS_H + +#define EXPR_REG_START 1 + +enum reg_enum { + R_zero = 0, + R_none = -1, + R_AH = EXPR_REG_START, + R_AL, + R_AX, + R_BH, + R_BL, + R_BND0, + R_BND1, + R_BND2, + R_BND3, + R_BP, + R_BPL, + R_BX, + R_CH, + R_CL, + R_CR0, + R_CR1, + R_CR10, + R_CR11, + R_CR12, + R_CR13, + R_CR14, + R_CR15, + R_CR16, + R_CR17, + R_CR18, + R_CR19, + R_CR2, + R_CR20, + R_CR21, + R_CR22, + R_CR23, + R_CR24, + R_CR25, + R_CR26, + R_CR27, + R_CR28, + R_CR29, + R_CR3, + R_CR30, + R_CR31, + R_CR4, + R_CR5, + R_CR6, + R_CR7, + R_CR8, + R_CR9, + R_CS, + R_CX, + R_DH, + R_DI, + R_DIL, + R_DL, + R_DR0, + R_DR1, + R_DR10, + R_DR11, + R_DR12, + R_DR13, + R_DR14, + R_DR15, + R_DR16, + R_DR17, + R_DR18, + R_DR19, + R_DR2, + R_DR20, + R_DR21, + R_DR22, + R_DR23, + R_DR24, + R_DR25, + R_DR26, + R_DR27, + R_DR28, + R_DR29, + R_DR3, + R_DR30, + R_DR31, + R_DR4, + R_DR5, + R_DR6, + R_DR7, + R_DR8, + R_DR9, + R_DS, + R_DX, + R_EAX, + R_EBP, + R_EBX, + R_ECX, + R_EDI, + R_EDX, + R_ES, + R_ESI, + R_ESP, + R_FS, + R_GS, + R_K0, + R_K1, + R_K2, + R_K3, + R_K4, + R_K5, + R_K6, + R_K7, + R_MM0, + R_MM1, + R_MM2, + R_MM3, + R_MM4, + R_MM5, + R_MM6, + R_MM7, + R_R10, + R_R10B, + R_R10D, + R_R10W, + R_R11, + R_R11B, + R_R11D, + R_R11W, + R_R12, + R_R12B, + R_R12D, + R_R12W, + R_R13, + R_R13B, + R_R13D, + R_R13W, + R_R14, + R_R14B, + R_R14D, + R_R14W, + R_R15, + R_R15B, + R_R15D, + R_R15W, + R_R16, + R_R16B, + R_R16D, + R_R16W, + R_R17, + R_R17B, + R_R17D, + R_R17W, + R_R18, + R_R18B, + R_R18D, + R_R18W, + R_R19, + R_R19B, + R_R19D, + R_R19W, + R_R20, + R_R20B, + R_R20D, + R_R20W, + R_R21, + R_R21B, + R_R21D, + R_R21W, + R_R22, + R_R22B, + R_R22D, + R_R22W, + R_R23, + R_R23B, + R_R23D, + R_R23W, + R_R24, + R_R24B, + R_R24D, + R_R24W, + R_R25, + R_R25B, + R_R25D, + R_R25W, + R_R26, + R_R26B, + R_R26D, + R_R26W, + R_R27, + R_R27B, + R_R27D, + R_R27W, + R_R28, + R_R28B, + R_R28D, + R_R28W, + R_R29, + R_R29B, + R_R29D, + R_R29W, + R_R30, + R_R30B, + R_R30D, + R_R30W, + R_R31, + R_R31B, + R_R31D, + R_R31W, + R_R8, + R_R8B, + R_R8D, + R_R8W, + R_R9, + R_R9B, + R_R9D, + R_R9W, + R_RAX, + R_RBP, + R_RBX, + R_RCX, + R_RDI, + R_RDX, + R_RSI, + R_RSP, + R_SEGR6, + R_SEGR7, + R_SI, + R_SIL, + R_SP, + R_SPL, + R_SS, + R_ST0, + R_ST1, + R_ST2, + R_ST3, + R_ST4, + R_ST5, + R_ST6, + R_ST7, + R_TMM0, + R_TMM1, + R_TMM2, + R_TMM3, + R_TMM4, + R_TMM5, + R_TMM6, + R_TMM7, + R_TR0, + R_TR1, + R_TR2, + R_TR3, + R_TR4, + R_TR5, + R_TR6, + R_TR7, + R_XMM0, + R_XMM1, + R_XMM10, + R_XMM11, + R_XMM12, + R_XMM13, + R_XMM14, + R_XMM15, + R_XMM16, + R_XMM17, + R_XMM18, + R_XMM19, + R_XMM2, + R_XMM20, + R_XMM21, + R_XMM22, + R_XMM23, + R_XMM24, + R_XMM25, + R_XMM26, + R_XMM27, + R_XMM28, + R_XMM29, + R_XMM3, + R_XMM30, + R_XMM31, + R_XMM4, + R_XMM5, + R_XMM6, + R_XMM7, + R_XMM8, + R_XMM9, + R_YMM0, + R_YMM1, + R_YMM10, + R_YMM11, + R_YMM12, + R_YMM13, + R_YMM14, + R_YMM15, + R_YMM16, + R_YMM17, + R_YMM18, + R_YMM19, + R_YMM2, + R_YMM20, + R_YMM21, + R_YMM22, + R_YMM23, + R_YMM24, + R_YMM25, + R_YMM26, + R_YMM27, + R_YMM28, + R_YMM29, + R_YMM3, + R_YMM30, + R_YMM31, + R_YMM4, + R_YMM5, + R_YMM6, + R_YMM7, + R_YMM8, + R_YMM9, + R_ZMM0, + R_ZMM1, + R_ZMM10, + R_ZMM11, + R_ZMM12, + R_ZMM13, + R_ZMM14, + R_ZMM15, + R_ZMM16, + R_ZMM17, + R_ZMM18, + R_ZMM19, + R_ZMM2, + R_ZMM20, + R_ZMM21, + R_ZMM22, + R_ZMM23, + R_ZMM24, + R_ZMM25, + R_ZMM26, + R_ZMM27, + R_ZMM28, + R_ZMM29, + R_ZMM3, + R_ZMM30, + R_ZMM31, + R_ZMM4, + R_ZMM5, + R_ZMM6, + R_ZMM7, + R_ZMM8, + R_ZMM9, + REG_ENUM_LIMIT +}; + +#define EXPR_REG_END 344 + +#define REG_NUM_AH 4 +#define REG_NUM_AL 0 +#define REG_NUM_AX 0 +#define REG_NUM_BH 7 +#define REG_NUM_BL 3 +#define REG_NUM_BND0 0 +#define REG_NUM_BND1 1 +#define REG_NUM_BND2 2 +#define REG_NUM_BND3 3 +#define REG_NUM_BP 5 +#define REG_NUM_BPL 5 +#define REG_NUM_BX 3 +#define REG_NUM_CH 5 +#define REG_NUM_CL 1 +#define REG_NUM_CR0 0 +#define REG_NUM_CR1 1 +#define REG_NUM_CR10 10 +#define REG_NUM_CR11 11 +#define REG_NUM_CR12 12 +#define REG_NUM_CR13 13 +#define REG_NUM_CR14 14 +#define REG_NUM_CR15 15 +#define REG_NUM_CR16 16 +#define REG_NUM_CR17 17 +#define REG_NUM_CR18 18 +#define REG_NUM_CR19 19 +#define REG_NUM_CR2 2 +#define REG_NUM_CR20 20 +#define REG_NUM_CR21 21 +#define REG_NUM_CR22 22 +#define REG_NUM_CR23 23 +#define REG_NUM_CR24 24 +#define REG_NUM_CR25 25 +#define REG_NUM_CR26 26 +#define REG_NUM_CR27 27 +#define REG_NUM_CR28 28 +#define REG_NUM_CR29 29 +#define REG_NUM_CR3 3 +#define REG_NUM_CR30 30 +#define REG_NUM_CR31 31 +#define REG_NUM_CR4 4 +#define REG_NUM_CR5 5 +#define REG_NUM_CR6 6 +#define REG_NUM_CR7 7 +#define REG_NUM_CR8 8 +#define REG_NUM_CR9 9 +#define REG_NUM_CS 1 +#define REG_NUM_CX 1 +#define REG_NUM_DH 6 +#define REG_NUM_DI 7 +#define REG_NUM_DIL 7 +#define REG_NUM_DL 2 +#define REG_NUM_DR0 0 +#define REG_NUM_DR1 1 +#define REG_NUM_DR10 10 +#define REG_NUM_DR11 11 +#define REG_NUM_DR12 12 +#define REG_NUM_DR13 13 +#define REG_NUM_DR14 14 +#define REG_NUM_DR15 15 +#define REG_NUM_DR16 16 +#define REG_NUM_DR17 17 +#define REG_NUM_DR18 18 +#define REG_NUM_DR19 19 +#define REG_NUM_DR2 2 +#define REG_NUM_DR20 20 +#define REG_NUM_DR21 21 +#define REG_NUM_DR22 22 +#define REG_NUM_DR23 23 +#define REG_NUM_DR24 24 +#define REG_NUM_DR25 25 +#define REG_NUM_DR26 26 +#define REG_NUM_DR27 27 +#define REG_NUM_DR28 28 +#define REG_NUM_DR29 29 +#define REG_NUM_DR3 3 +#define REG_NUM_DR30 30 +#define REG_NUM_DR31 31 +#define REG_NUM_DR4 4 +#define REG_NUM_DR5 5 +#define REG_NUM_DR6 6 +#define REG_NUM_DR7 7 +#define REG_NUM_DR8 8 +#define REG_NUM_DR9 9 +#define REG_NUM_DS 3 +#define REG_NUM_DX 2 +#define REG_NUM_EAX 0 +#define REG_NUM_EBP 5 +#define REG_NUM_EBX 3 +#define REG_NUM_ECX 1 +#define REG_NUM_EDI 7 +#define REG_NUM_EDX 2 +#define REG_NUM_ES 0 +#define REG_NUM_ESI 6 +#define REG_NUM_ESP 4 +#define REG_NUM_FS 4 +#define REG_NUM_GS 5 +#define REG_NUM_K0 0 +#define REG_NUM_K1 1 +#define REG_NUM_K2 2 +#define REG_NUM_K3 3 +#define REG_NUM_K4 4 +#define REG_NUM_K5 5 +#define REG_NUM_K6 6 +#define REG_NUM_K7 7 +#define REG_NUM_MM0 0 +#define REG_NUM_MM1 1 +#define REG_NUM_MM2 2 +#define REG_NUM_MM3 3 +#define REG_NUM_MM4 4 +#define REG_NUM_MM5 5 +#define REG_NUM_MM6 6 +#define REG_NUM_MM7 7 +#define REG_NUM_R10 10 +#define REG_NUM_R10B 10 +#define REG_NUM_R10D 10 +#define REG_NUM_R10W 10 +#define REG_NUM_R11 11 +#define REG_NUM_R11B 11 +#define REG_NUM_R11D 11 +#define REG_NUM_R11W 11 +#define REG_NUM_R12 12 +#define REG_NUM_R12B 12 +#define REG_NUM_R12D 12 +#define REG_NUM_R12W 12 +#define REG_NUM_R13 13 +#define REG_NUM_R13B 13 +#define REG_NUM_R13D 13 +#define REG_NUM_R13W 13 +#define REG_NUM_R14 14 +#define REG_NUM_R14B 14 +#define REG_NUM_R14D 14 +#define REG_NUM_R14W 14 +#define REG_NUM_R15 15 +#define REG_NUM_R15B 15 +#define REG_NUM_R15D 15 +#define REG_NUM_R15W 15 +#define REG_NUM_R16 16 +#define REG_NUM_R16B 16 +#define REG_NUM_R16D 16 +#define REG_NUM_R16W 16 +#define REG_NUM_R17 17 +#define REG_NUM_R17B 17 +#define REG_NUM_R17D 17 +#define REG_NUM_R17W 17 +#define REG_NUM_R18 18 +#define REG_NUM_R18B 18 +#define REG_NUM_R18D 18 +#define REG_NUM_R18W 18 +#define REG_NUM_R19 19 +#define REG_NUM_R19B 19 +#define REG_NUM_R19D 19 +#define REG_NUM_R19W 19 +#define REG_NUM_R20 20 +#define REG_NUM_R20B 20 +#define REG_NUM_R20D 20 +#define REG_NUM_R20W 20 +#define REG_NUM_R21 21 +#define REG_NUM_R21B 21 +#define REG_NUM_R21D 21 +#define REG_NUM_R21W 21 +#define REG_NUM_R22 22 +#define REG_NUM_R22B 22 +#define REG_NUM_R22D 22 +#define REG_NUM_R22W 22 +#define REG_NUM_R23 23 +#define REG_NUM_R23B 23 +#define REG_NUM_R23D 23 +#define REG_NUM_R23W 23 +#define REG_NUM_R24 24 +#define REG_NUM_R24B 24 +#define REG_NUM_R24D 24 +#define REG_NUM_R24W 24 +#define REG_NUM_R25 25 +#define REG_NUM_R25B 25 +#define REG_NUM_R25D 25 +#define REG_NUM_R25W 25 +#define REG_NUM_R26 26 +#define REG_NUM_R26B 26 +#define REG_NUM_R26D 26 +#define REG_NUM_R26W 26 +#define REG_NUM_R27 27 +#define REG_NUM_R27B 27 +#define REG_NUM_R27D 27 +#define REG_NUM_R27W 27 +#define REG_NUM_R28 28 +#define REG_NUM_R28B 28 +#define REG_NUM_R28D 28 +#define REG_NUM_R28W 28 +#define REG_NUM_R29 29 +#define REG_NUM_R29B 29 +#define REG_NUM_R29D 29 +#define REG_NUM_R29W 29 +#define REG_NUM_R30 30 +#define REG_NUM_R30B 30 +#define REG_NUM_R30D 30 +#define REG_NUM_R30W 30 +#define REG_NUM_R31 31 +#define REG_NUM_R31B 31 +#define REG_NUM_R31D 31 +#define REG_NUM_R31W 31 +#define REG_NUM_R8 8 +#define REG_NUM_R8B 8 +#define REG_NUM_R8D 8 +#define REG_NUM_R8W 8 +#define REG_NUM_R9 9 +#define REG_NUM_R9B 9 +#define REG_NUM_R9D 9 +#define REG_NUM_R9W 9 +#define REG_NUM_RAX 0 +#define REG_NUM_RBP 5 +#define REG_NUM_RBX 3 +#define REG_NUM_RCX 1 +#define REG_NUM_RDI 7 +#define REG_NUM_RDX 2 +#define REG_NUM_RSI 6 +#define REG_NUM_RSP 4 +#define REG_NUM_SEGR6 6 +#define REG_NUM_SEGR7 7 +#define REG_NUM_SI 6 +#define REG_NUM_SIL 6 +#define REG_NUM_SP 4 +#define REG_NUM_SPL 4 +#define REG_NUM_SS 2 +#define REG_NUM_ST0 0 +#define REG_NUM_ST1 1 +#define REG_NUM_ST2 2 +#define REG_NUM_ST3 3 +#define REG_NUM_ST4 4 +#define REG_NUM_ST5 5 +#define REG_NUM_ST6 6 +#define REG_NUM_ST7 7 +#define REG_NUM_TMM0 0 +#define REG_NUM_TMM1 1 +#define REG_NUM_TMM2 2 +#define REG_NUM_TMM3 3 +#define REG_NUM_TMM4 4 +#define REG_NUM_TMM5 5 +#define REG_NUM_TMM6 6 +#define REG_NUM_TMM7 7 +#define REG_NUM_TR0 0 +#define REG_NUM_TR1 1 +#define REG_NUM_TR2 2 +#define REG_NUM_TR3 3 +#define REG_NUM_TR4 4 +#define REG_NUM_TR5 5 +#define REG_NUM_TR6 6 +#define REG_NUM_TR7 7 +#define REG_NUM_XMM0 0 +#define REG_NUM_XMM1 1 +#define REG_NUM_XMM10 10 +#define REG_NUM_XMM11 11 +#define REG_NUM_XMM12 12 +#define REG_NUM_XMM13 13 +#define REG_NUM_XMM14 14 +#define REG_NUM_XMM15 15 +#define REG_NUM_XMM16 16 +#define REG_NUM_XMM17 17 +#define REG_NUM_XMM18 18 +#define REG_NUM_XMM19 19 +#define REG_NUM_XMM2 2 +#define REG_NUM_XMM20 20 +#define REG_NUM_XMM21 21 +#define REG_NUM_XMM22 22 +#define REG_NUM_XMM23 23 +#define REG_NUM_XMM24 24 +#define REG_NUM_XMM25 25 +#define REG_NUM_XMM26 26 +#define REG_NUM_XMM27 27 +#define REG_NUM_XMM28 28 +#define REG_NUM_XMM29 29 +#define REG_NUM_XMM3 3 +#define REG_NUM_XMM30 30 +#define REG_NUM_XMM31 31 +#define REG_NUM_XMM4 4 +#define REG_NUM_XMM5 5 +#define REG_NUM_XMM6 6 +#define REG_NUM_XMM7 7 +#define REG_NUM_XMM8 8 +#define REG_NUM_XMM9 9 +#define REG_NUM_YMM0 0 +#define REG_NUM_YMM1 1 +#define REG_NUM_YMM10 10 +#define REG_NUM_YMM11 11 +#define REG_NUM_YMM12 12 +#define REG_NUM_YMM13 13 +#define REG_NUM_YMM14 14 +#define REG_NUM_YMM15 15 +#define REG_NUM_YMM16 16 +#define REG_NUM_YMM17 17 +#define REG_NUM_YMM18 18 +#define REG_NUM_YMM19 19 +#define REG_NUM_YMM2 2 +#define REG_NUM_YMM20 20 +#define REG_NUM_YMM21 21 +#define REG_NUM_YMM22 22 +#define REG_NUM_YMM23 23 +#define REG_NUM_YMM24 24 +#define REG_NUM_YMM25 25 +#define REG_NUM_YMM26 26 +#define REG_NUM_YMM27 27 +#define REG_NUM_YMM28 28 +#define REG_NUM_YMM29 29 +#define REG_NUM_YMM3 3 +#define REG_NUM_YMM30 30 +#define REG_NUM_YMM31 31 +#define REG_NUM_YMM4 4 +#define REG_NUM_YMM5 5 +#define REG_NUM_YMM6 6 +#define REG_NUM_YMM7 7 +#define REG_NUM_YMM8 8 +#define REG_NUM_YMM9 9 +#define REG_NUM_ZMM0 0 +#define REG_NUM_ZMM1 1 +#define REG_NUM_ZMM10 10 +#define REG_NUM_ZMM11 11 +#define REG_NUM_ZMM12 12 +#define REG_NUM_ZMM13 13 +#define REG_NUM_ZMM14 14 +#define REG_NUM_ZMM15 15 +#define REG_NUM_ZMM16 16 +#define REG_NUM_ZMM17 17 +#define REG_NUM_ZMM18 18 +#define REG_NUM_ZMM19 19 +#define REG_NUM_ZMM2 2 +#define REG_NUM_ZMM20 20 +#define REG_NUM_ZMM21 21 +#define REG_NUM_ZMM22 22 +#define REG_NUM_ZMM23 23 +#define REG_NUM_ZMM24 24 +#define REG_NUM_ZMM25 25 +#define REG_NUM_ZMM26 26 +#define REG_NUM_ZMM27 27 +#define REG_NUM_ZMM28 28 +#define REG_NUM_ZMM29 29 +#define REG_NUM_ZMM3 3 +#define REG_NUM_ZMM30 30 +#define REG_NUM_ZMM31 31 +#define REG_NUM_ZMM4 4 +#define REG_NUM_ZMM5 5 +#define REG_NUM_ZMM6 6 +#define REG_NUM_ZMM7 7 +#define REG_NUM_ZMM8 8 +#define REG_NUM_ZMM9 9 + + +#endif /* NASM_REGS_H */ diff --git a/include/saa.h b/include/saa.h new file mode 100644 index 0000000..695ca6c --- /dev/null +++ b/include/saa.h @@ -0,0 +1,64 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 1996-2017 The NASM Authors - All Rights Reserved */ + +#ifndef NASM_SAA_H +#define NASM_SAA_H + +#include "compiler.h" + +/* + * Routines to manage a dynamic sequential-access array, under the + * same restriction on maximum mallocable block. This array may be + * written to in two ways: a contiguous chunk can be reserved of a + * given size with a pointer returned OR single-byte data may be + * written. The array can also be read back in the same two ways: + * as a series of big byte-data blocks or as a list of structures + * of a given size. + */ + +struct SAA { + /* + * members `end' and `elem_len' are only valid in first link in + * list; `rptr' and `rpos' are used for reading + */ + size_t elem_len; /* Size of each element */ + size_t blk_len; /* Size of each allocation block */ + size_t nblks; /* Total number of allocated blocks */ + size_t nblkptrs; /* Total number of allocation block pointers */ + size_t length; /* Total allocated length of the array */ + size_t datalen; /* Total data length of the array */ + char **wblk; /* Write block pointer */ + size_t wpos; /* Write position inside block */ + size_t wptr; /* Absolute write position */ + char **rblk; /* Read block pointer */ + size_t rpos; /* Read position inside block */ + size_t rptr; /* Absolute read position */ + char **blk_ptrs; /* Pointer to pointer blocks */ +}; + +struct SAA * never_null saa_init(size_t elem_len); /* 1 == byte */ +void saa_free(struct SAA *); +void *saa_wstruct(struct SAA *); /* return a structure of elem_len */ +void saa_wbytes(struct SAA *, const void *, size_t); /* write arbitrary bytes */ +size_t saa_wcstring(struct SAA *s, const char *str); /* write a C string */ +void saa_rewind(struct SAA *); /* for reading from beginning */ +void *saa_rstruct(struct SAA *); /* return NULL on EOA */ +const void *saa_rbytes(struct SAA *, size_t *); /* return 0 on EOA */ +void saa_rnbytes(struct SAA *, void *, size_t); /* read a given no. of bytes */ +/* random access */ +void saa_fread(struct SAA *, size_t, void *, size_t); +void saa_fwrite(struct SAA *, size_t, const void *, size_t); + +/* dump to file */ +void saa_fpwrite(struct SAA *, FILE *); + +/* Write specific-sized values */ +void saa_write8(struct SAA *s, uint8_t v); +void saa_write16(struct SAA *s, uint16_t v); +void saa_write32(struct SAA *s, uint32_t v); +void saa_write64(struct SAA *s, uint64_t v); +void saa_wleb128u(struct SAA *, uint64_t v); /* unsigned LEB128 value */ +void saa_wleb128s(struct SAA *, int64_t v); /* signed LEB128 value */ +void saa_writeaddr(struct SAA *, uint64_t, size_t); /* specific size integer */ + +#endif /* NASM_SAA_H */ diff --git a/include/srcfile.h b/include/srcfile.h new file mode 100644 index 0000000..fcb14ea --- /dev/null +++ b/include/srcfile.h @@ -0,0 +1,153 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 1996-2020 The NASM Authors - All Rights Reserved */ + +/* + * These functions are used to keep track of the source code file and name. + */ +#ifndef ASM_SRCFILE_H +#define ASM_SRCFILE_H + +#include "compiler.h" + +struct src_location { + const char *filename; + int32_t lineno; +}; + +static inline const_func struct src_location src_nowhere(void) +{ + struct src_location no_where = { NULL, 0 }; + return no_where; +} + +/* + * Comparing the *pointer value* of filenames is valid, because the + * filename hash system guarantees that each unique filename string is + * permanently allocated in exactly one location. + */ +static inline bool +src_location_same(struct src_location here, struct src_location there) +{ + return here.filename == there.filename && here.lineno == there.lineno; +} + +struct src_location_stack { + struct src_location l; + struct src_location_stack *up, *down; + const void *macro; +}; +extern struct src_location_stack _src_top; +extern struct src_location_stack *_src_bottom; +extern struct src_location_stack *_src_error; + +void src_init(void); +void src_free(void); +const char *src_set_fname(const char *newname); +static inline const char *src_get_fname(void) +{ + return _src_bottom->l.filename; +} +static inline int32_t src_set_linnum(int32_t newline) +{ + int32_t oldline = _src_bottom->l.lineno; + _src_bottom->l.lineno = newline; + return oldline; +} +static inline int32_t src_get_linnum(void) +{ + return _src_bottom->l.lineno; +} + +/* Can be used when there is no need for the old information */ +void src_set(int32_t line, const char *filename); + +/* + * src_get gets both the source file name and line. + * It is also used if you maintain private status about the source location + * It return 0 if the information was the same as the last time you + * checked, -2 if the name changed and (new-old) if just the line changed. + * + * xname must point to a filename string previously returned from any + * function of this subsystem or be NULL; another string value will + * not work. + */ +static inline int32_t src_get(int32_t *xline, const char **xname) +{ + const char *xn = *xname; + int32_t xl = *xline; + int32_t line = _src_bottom->l.lineno; + + *xline = line; + *xname = _src_bottom->l.filename; + + /* The return value is expected to be optimized out almost everywhere */ + if (!xn || xn != _src_bottom->l.filename) + return -2; + else + return line - xl; +} + +/* + * Returns the current information as a structure. + */ +static inline struct src_location src_where(void) +{ + return _src_bottom->l; +} + +/* + * Returns the top-level information as a structure. Use this for panic + * errors, since descent is not possible there. + */ +static inline struct src_location src_where_top(void) +{ + return _src_top.l; +} + +/* + * Returns the appropriate level of the location stack to use for error + * messages. This is the same as the top level except during the descent + * through the macro hierarchy for elucidation; + */ +static inline struct src_location src_where_error(void) +{ + return _src_error->l; +} +static inline const void *src_error_down(void) +{ + if (_src_error->down) { + _src_error = _src_error->down; + return _src_error->macro; + } else { + return NULL; + } +} +static inline void src_error_reset(void) +{ + _src_error = &_src_top; +} + +/* + * Sets the current information. The filename member of the structure + * *must* have been previously returned by src_get(), src_where(), or + * src_get_fname() and therefore be present in the hash. + */ +static inline struct src_location src_update(struct src_location whence) +{ + struct src_location old = _src_bottom->l; + _src_bottom->l = whence; + return old; +} + +/* + * Push/pop macro expansion level. "macroname" must remain constant at + * least until the same macro expansion level is popped. + */ +void src_macro_push(const void *macroname, struct src_location where); +static inline const void *src_macro_current(void) +{ + return _src_bottom->macro; +} +void src_macro_pop(void); + +#endif /* ASM_SRCFILE_H */ diff --git a/include/stabs.h b/include/stabs.h new file mode 100644 index 0000000..84854e8 --- /dev/null +++ b/include/stabs.h @@ -0,0 +1,120 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 1996-2018 The NASM Authors - All Rights Reserved */ + +#ifndef STABS_H_ +#define STABS_H_ + +#include "nctype.h" + +#include "compiler.h" +#include "nasmlib.h" +#include "nasm.h" + +/* offsets */ +enum stab_offsets { + STAB_strdxoff = 0, + STAB_typeoff = 4, + STAB_otheroff = 5, + STAB_descoff = 6, + STAB_valoff = 8, + STAB_stabsize = 12 +}; + +/* stab/non-stab types */ +enum stab_types { + N_UNDF = 0x00, /* Undefined symbol */ + N_EXT = 0x01, /* External symbol */ + N_ABS = 0x02, /* Absolute symbol */ + N_ABS_EXT = 0x03, /* Absolute external symbol */ + N_TEXT = 0x04, /* Symbol in text segment */ + N_TEXT_EXT = 0x05, /* Symbol in external text segment */ + N_DATA = 0x06, + N_DATA_EXT = 0x07, + N_BSS = 0x08, + N_BSS_EXT = 0x09, + N_INDR = 0x0a, + N_FN_SEQ = 0x0c, /* N_FN from Sequent compilers */ + N_WEAKU = 0x0d, /* Weak undefined symbol */ + N_WEAKA = 0x0e, /* Weak absolute symbl */ + N_WEAKT = 0x0f, /* Weak text symbol */ + N_WEAKD = 0x10, /* Weak data symbol */ + N_WEAKB = 0x11, /* Weak bss symbol */ + N_COMM = 0x12, /* Common symbol */ + N_SETA = 0x14, /* Absolute set element symbol */ + N_SETA_EXT = 0x15, + N_SETT = 0x16, /* Text set element symbol */ + N_SETT_EXT = 0x17, + N_SETD = 0x18, /* Data set element symbol */ + N_SETD_EXT = 0x19, + N_SETB = 0x1a, /* BSS set element symbol */ + N_SETB_EXT = 0x1b, + N_SETV = 0x1c, /* Pointer to set vector in data area */ + N_SETV_EXT = 0x1d, + N_WARNING = 0x1e, /* Warning symbol */ + N_FN = 0x1f, /* Filename of .o file */ + N_GSYM = 0x20, /* Global variable */ + N_FNAME = 0x22, /* Function name for BSD Fortran */ + N_FUN = 0x24, /* Function name or text segment variable for C */ + N_STSYM = 0x26, /* Data-segment variable with internal linkage */ + N_LCSYM = 0x28, /* BSS-segment variable with internal linkage */ + N_MAIN = 0x2a, /* Name of main routine */ + N_ROSYM = 0x2c, /* Read-only data symbols */ + N_BNSYM = 0x2e, /* The beginning of a relocatable function block */ + N_PC = 0x30, /* Global symbol in Pascal */ + N_NSYMS = 0x32, /* Number of symbols */ + N_NOMAP = 0x34, /* No DST map for sym */ + N_OBJ = 0x38, /* Like N_SO, but for the object file */ + N_OPT = 0x3c, /* Options for the debugger */ + N_RSYM = 0x40, /* Register variable */ + N_M2C = 0x42, /* Modula-2 compilation unit */ + N_SLINE = 0x44, /* Line number in text segment */ + N_DSLINE = 0x46, /* Line number in data segment */ + N_BSLINE = 0x48, /* Line number in bss segment */ + N_BROWS = 0x48, /* Sun's source-code browser stabs */ + N_DEFD = 0x4a, /* GNU Modula-2 definition module dependency */ + N_FLINE = 0x4c, /* Function start/body/end line numbers */ + N_ENSYM = 0x4e, /* This tells the end of a relocatable function */ + N_EHDECL = 0x50, /* GNU C++ exception variable */ + N_MOD2 = 0x50, /* Modula2 info "for imc" */ + N_CATCH = 0x54, /* GNU C++ `catch' clause */ + N_SSYM = 0x60, /* Structure or union element */ + N_ENDM = 0x62, /* Last stab emitted for module */ + N_SO = 0x64, /* ID for main source file */ + N_OSO = 0x66, /* Apple: This is the stab that associated the .o file */ + N_ALIAS = 0x6c, /* SunPro F77: Name of alias */ + N_LSYM = 0x80, /* Automatic variable in the stack */ + N_BINCL = 0x82, /* Beginning of an include file */ + N_SOL = 0x84, /* ID for sub-source file */ + N_PSYM = 0xa0, /* Parameter variable */ + N_EINCL = 0xa2, /* End of an include file */ + N_ENTRY = 0xa4, /* Alternate entry point */ + N_LBRAC = 0xc0, /* Beginning of lexical block */ + N_EXCL = 0xc2, /* Place holder for deleted include file */ + N_SCOPE = 0xc4, /* Modula-2 scope information */ + N_PATCH = 0xd0, /* Solaris2: Patch Run Time Checker */ + N_RBRAC = 0xe0, /* End of a lexical block */ + N_BCOMM = 0xe2, /* Begin named common block */ + N_ECOMM = 0xe4, /* End named common block */ + N_ECOML = 0xe8, /* Member of a common block */ + N_WITH = 0xea, /* Solaris2: Pascal "with" statement */ + N_NBTEXT = 0xf0, + N_NBDATA = 0xf2, + N_NBBSS = 0xf4, + N_NBSTS = 0xf6, + N_NBLCS = 0xf8, + N_LENG = 0xfe /* Second symbol entry whih a length-value for the preceding entry */ +}; + +enum stab_source_file { + N_SO_AS = 0x01, + N_SO_C = 0x02, + N_SO_ANSI_C = 0x03, + N_SO_CC = 0x04, + N_SO_FORTRAN = 0x05, + N_SO_PASCAL = 0x06, + N_SO_FORTRAN90 = 0x07, + N_SO_OBJC = 0x32, + N_SO_OBJCPLUS = 0x33 +}; + +#endif /* STABS_H_ */ diff --git a/include/stdscan.h b/include/stdscan.h new file mode 100644 index 0000000..6972200 --- /dev/null +++ b/include/stdscan.h @@ -0,0 +1,23 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 1996-2009 The NASM Authors - All Rights Reserved */ + +/* + * stdscan.h header file for stdscan.c + */ + +#ifndef NASM_STDSCAN_H +#define NASM_STDSCAN_H + +/* Standard scanner */ +struct stdscan_state; + +void stdscan_set(const struct stdscan_state *); +const struct stdscan_state *stdscan_get(void); +char * pure_func stdscan_tell(void); +void stdscan_reset(char *buffer); +int stdscan(void *pvt, struct tokenval *tv); +void stdscan_pushback(const struct tokenval *tv); +int nasm_token_hash(const char *token, struct tokenval *tv); +void stdscan_cleanup(void); + +#endif diff --git a/include/strlist.h b/include/strlist.h new file mode 100644 index 0000000..dfce7fa --- /dev/null +++ b/include/strlist.h @@ -0,0 +1,63 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 1996-2020 The NASM Authors - All Rights Reserved */ + +/* + * strlist.h - list of unique, ordered strings + */ + +#ifndef NASM_STRLIST_H +#define NASM_STRLIST_H + +#include "compiler.h" +#include "nasmlib.h" +#include "hashtbl.h" + +struct strlist_entry { + struct strlist_entry *next; + size_t offset; + size_t size; + intorptr pvt; + char str[1]; +}; + +struct strlist { + struct hash_table hash; + struct strlist_entry *head, **tailp; + size_t nstr, size; + bool uniq; +}; + +static inline const struct strlist_entry * +strlist_head(const struct strlist *list) +{ + return list ? list->head : NULL; +} +static inline struct strlist_entry *strlist_tail(struct strlist *list) +{ + if (!list || !list->head) + return NULL; + return container_of(list->tailp, struct strlist_entry, next); +} +static inline size_t strlist_count(const struct strlist *list) +{ + return list ? list->nstr : 0; +} +static inline size_t strlist_size(const struct strlist *list) +{ + return list ? list->size : 0; +} + +struct strlist * safe_alloc strlist_alloc(bool uniq); +const struct strlist_entry *strlist_add(struct strlist *list, const char *str); +const struct strlist_entry * printf_func(2, 3) + strlist_printf(struct strlist *list, const char *fmt, ...); +const struct strlist_entry * vprintf_func(2) + strlist_vprintf(struct strlist *list, const char *fmt, va_list ap); +const struct strlist_entry * +strlist_find(const struct strlist *list, const char *str); +void * safe_alloc strlist_linearize(const struct strlist *list, char sep); +void strlist_write(const struct strlist *list, const char *sep, FILE *f); +void strlist_free(struct strlist **listp); +#define strlist_for_each(p,h) list_for_each((p), strlist_head(h)) + +#endif /* NASM_STRLIST_H */ diff --git a/include/sync.h b/include/sync.h new file mode 100644 index 0000000..0c4709b --- /dev/null +++ b/include/sync.h @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 1996-2009 The NASM Authors - All Rights Reserved */ + +/* + * sync.h header file for sync.c + */ + +#ifndef NASM_SYNC_H +#define NASM_SYNC_H + +void init_sync(void); +void add_sync(uint64_t position, uint64_t length); +uint64_t next_sync(uint64_t position, uint64_t *length); + +#endif diff --git a/include/tables.h b/include/tables.h new file mode 100644 index 0000000..0442112 --- /dev/null +++ b/include/tables.h @@ -0,0 +1,32 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 1996-2016 The NASM Authors - All Rights Reserved */ + +/* + * tables.h + * + * Declarations for auto-generated tables + */ + +#ifndef NASM_TABLES_H +#define NASM_TABLES_H + +#include "compiler.h" +#include "insnsi.h" /* For enum opcode */ + +/* --- From insns.dat via insns.pl: --- */ + +/* insnsn.c */ +extern const char * const nasm_insn_names[]; + +/* --- From regs.dat via regs.pl: --- */ + +/* regs.c */ +extern const char * const nasm_reg_names[]; +/* regflags.c */ +typedef uint64_t opflags_t; +typedef uint16_t decoflags_t; +extern const opflags_t nasm_reg_flags[]; +/* regvals.c */ +extern const int nasm_regvals[]; + +#endif /* NASM_TABLES_H */ diff --git a/include/template.h b/include/template.h new file mode 100644 index 0000000..7e0bc8a --- /dev/null +++ b/include/template.h @@ -0,0 +1,11 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 1996-20xx The NASM Authors - All Rights Reserved */ + +#ifndef FILENAME_H +#define FILENAME_H + +#include "compiler.h" + +/* Code goes here */ + +#endif /* FILENAME_H */ diff --git a/include/tokens.h b/include/tokens.h new file mode 100644 index 0000000..b0e9887 --- /dev/null +++ b/include/tokens.h @@ -0,0 +1,11 @@ +/* + * This file is generated from insns.dat, regs.dat and token.dat + * by tokhash.pl; do not edit. + */ + +#ifndef NASM_TOKENS_H +#define NASM_TOKENS_H + +#define MAX_KEYWORD 17 /* length of longest keyword */ + +#endif /* NASM_TOKENS_H */ diff --git a/include/unconfig.h b/include/unconfig.h new file mode 100644 index 0000000..0247bf3 --- /dev/null +++ b/include/unconfig.h @@ -0,0 +1,230 @@ +/* config/unconfig.h: autogenerated by tools/unconfig.pl */ + +#ifndef CONFIG_UNCONFIG_H +#define CONFIG_UNCONFIG_H + +#ifndef alloc_size_func2 +# ifdef HAVE_FUNC_ATTRIBUTE_2_ALLOC_SIZE +# define alloc_size_func2(x1,x2) ATTRIBUTE(alloc_size(x1,x2)) +# else +# define alloc_size_func2(x1,x2) +# endif +#endif + +#ifndef alloc_size_func2_ptr +# ifdef HAVE_FUNC_PTR_ATTRIBUTE_2_ALLOC_SIZE +# define alloc_size_func2_ptr(x1,x2) ATTRIBUTE(alloc_size(x1,x2)) +# else +# define alloc_size_func2_ptr(x1,x2) +# endif +#endif + +#ifndef end_with_null +# ifdef HAVE_FUNC_ATTRIBUTE_SENTINEL +# define end_with_null ATTRIBUTE(sentinel) +# else +# define end_with_null +# endif +#endif + +#ifndef end_with_null_ptr +# ifdef HAVE_FUNC_PTR_ATTRIBUTE_SENTINEL +# define end_with_null_ptr ATTRIBUTE(sentinel) +# else +# define end_with_null_ptr +# endif +#endif + +#ifndef format_func3 +# ifdef HAVE_FUNC_ATTRIBUTE_3_FORMAT +# define format_func3(x1,x2,x3) ATTRIBUTE(format(x1,x2,x3)) +# else +# define format_func3(x1,x2,x3) +# endif +#endif + +#ifndef format_func3_ptr +# ifdef HAVE_FUNC_PTR_ATTRIBUTE_3_FORMAT +# define format_func3_ptr(x1,x2,x3) ATTRIBUTE(format(x1,x2,x3)) +# else +# define format_func3_ptr(x1,x2,x3) +# endif +#endif + +#ifndef const_func +# ifdef HAVE_FUNC_ATTRIBUTE_CONST +# define const_func ATTRIBUTE(const) +# else +# define const_func +# endif +#endif + +#ifndef const_func_ptr +# ifdef HAVE_FUNC_PTR_ATTRIBUTE_CONST +# define const_func_ptr ATTRIBUTE(const) +# else +# define const_func_ptr +# endif +#endif + +#ifndef unsequenced_func +# ifdef HAVE_FUNC_ATTRIBUTE_UNSEQUENCED +# define unsequenced_func ATTRIBUTE(unsequenced) +# else +# define unsequenced_func +# endif +#endif + +#ifndef unsequenced_func_ptr +# ifdef HAVE_FUNC_PTR_ATTRIBUTE_UNSEQUENCED +# define unsequenced_func_ptr ATTRIBUTE(unsequenced) +# else +# define unsequenced_func_ptr +# endif +#endif + +#ifndef noreturn_func +# ifdef HAVE_FUNC_ATTRIBUTE_NORETURN +# define noreturn_func ATTRIBUTE(noreturn) +# else +# define noreturn_func +# endif +#endif + +#ifndef reproducible_func +# ifdef HAVE_FUNC_ATTRIBUTE_REPRODUCIBLE +# define reproducible_func ATTRIBUTE(reproducible) +# else +# define reproducible_func +# endif +#endif + +#ifndef reproducible_func_ptr +# ifdef HAVE_FUNC_PTR_ATTRIBUTE_REPRODUCIBLE +# define reproducible_func_ptr ATTRIBUTE(reproducible) +# else +# define reproducible_func_ptr +# endif +#endif + +#ifndef pure_func +# ifdef HAVE_FUNC_ATTRIBUTE_PURE +# define pure_func ATTRIBUTE(pure) +# else +# define pure_func +# endif +#endif + +#ifndef pure_func_ptr +# ifdef HAVE_FUNC_PTR_ATTRIBUTE_PURE +# define pure_func_ptr ATTRIBUTE(pure) +# else +# define pure_func_ptr +# endif +#endif + +#ifndef unlikely_func +# ifdef HAVE_FUNC_ATTRIBUTE_COLD +# define unlikely_func ATTRIBUTE(cold) +# else +# define unlikely_func +# endif +#endif + +#ifndef unlikely_func_ptr +# ifdef HAVE_FUNC_PTR_ATTRIBUTE_COLD +# define unlikely_func_ptr ATTRIBUTE(cold) +# else +# define unlikely_func_ptr +# endif +#endif + +#ifndef maybe_unused_func +# ifdef HAVE_FUNC_ATTRIBUTE_MAYBE_UNUSED +# define maybe_unused_func ATTRIBUTE(maybe_unused) +# else +# define maybe_unused_func +# endif +#endif + +#ifndef maybe_unused_func_ptr +# ifdef HAVE_FUNC_PTR_ATTRIBUTE_MAYBE_UNUSED +# define maybe_unused_func_ptr ATTRIBUTE(maybe_unused) +# else +# define maybe_unused_func_ptr +# endif +#endif + +#ifndef unused_func +# ifdef HAVE_FUNC_ATTRIBUTE_UNUSED +# define unused_func ATTRIBUTE(unused) +# else +# define unused_func +# endif +#endif + +#ifndef unused_func_ptr +# ifdef HAVE_FUNC_PTR_ATTRIBUTE_UNUSED +# define unused_func_ptr ATTRIBUTE(unused) +# else +# define unused_func_ptr +# endif +#endif + +#ifndef noreturn_func_ptr +# ifdef HAVE_FUNC_PTR_ATTRIBUTE_NORETURN +# define noreturn_func_ptr ATTRIBUTE(noreturn) +# else +# define noreturn_func_ptr +# endif +#endif + +#ifndef never_null +# ifdef HAVE_FUNC_ATTRIBUTE_RETURNS_NONNULL +# define never_null ATTRIBUTE(returns_nonnull) +# else +# define never_null +# endif +#endif + +#ifndef never_null_ptr +# ifdef HAVE_FUNC_PTR_ATTRIBUTE_RETURNS_NONNULL +# define never_null_ptr ATTRIBUTE(returns_nonnull) +# else +# define never_null_ptr +# endif +#endif + +#ifndef malloc_func +# ifdef HAVE_FUNC_ATTRIBUTE_MALLOC +# define malloc_func ATTRIBUTE(malloc) +# else +# define malloc_func +# endif +#endif + +#ifndef malloc_func_ptr +# ifdef HAVE_FUNC_PTR_ATTRIBUTE_MALLOC +# define malloc_func_ptr ATTRIBUTE(malloc) +# else +# define malloc_func_ptr +# endif +#endif + +#ifndef alloc_size_func1 +# ifdef HAVE_FUNC_ATTRIBUTE_1_ALLOC_SIZE +# define alloc_size_func1(x1) ATTRIBUTE(alloc_size(x1)) +# else +# define alloc_size_func1(x1) +# endif +#endif + +#ifndef alloc_size_func1_ptr +# ifdef HAVE_FUNC_PTR_ATTRIBUTE_1_ALLOC_SIZE +# define alloc_size_func1_ptr(x1) ATTRIBUTE(alloc_size(x1)) +# else +# define alloc_size_func1_ptr(x1) +# endif +#endif + +#endif /* CONFIG_UNCONFIG_H */ diff --git a/include/unknown.h b/include/unknown.h new file mode 100644 index 0000000..6ee2b61 --- /dev/null +++ b/include/unknown.h @@ -0,0 +1,21 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 2016 The NASM Authors - All Rights Reserved */ + +/* + * config/unknown.h + * + * Compiler definitions for an unknown compiler. Assume the worst. + */ + +#ifndef NASM_CONFIG_UNKNOWN_H +#define NASM_CONFIG_UNKNOWN_H + +/* Assume these don't exist */ +#ifndef inline +# define inline +#endif +#ifndef restrict +# define restrict +#endif + +#endif /* NASM_CONFIG_UNKNOWN_H */ diff --git a/include/ver.h b/include/ver.h new file mode 100644 index 0000000..05888bd --- /dev/null +++ b/include/ver.h @@ -0,0 +1,25 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 1996-2020 The NASM Authors - All Rights Reserved */ + +/* + * NASM version strings, defined in ver.c + */ + +#ifndef NASM_VER_H +#define NASM_VER_H + +#include "compiler.h" + +extern const char nasm_version[]; +extern const char nasm_date[]; +extern const char nasm_compile_options[]; + +extern bool reproducible; + +extern const char * pure_func nasm_comment(void); +extern size_t pure_func nasm_comment_len(void); + +extern const char * pure_func nasm_signature(void); +extern size_t pure_func nasm_signature_len(void); + +#endif /* NASM_VER_H */ diff --git a/include/version.h b/include/version.h new file mode 100644 index 0000000..689c330 --- /dev/null +++ b/include/version.h @@ -0,0 +1,9 @@ +#ifndef NASM_VERSION_H +#define NASM_VERSION_H +#define NASM_MAJOR_VER 3 +#define NASM_MINOR_VER 2 +#define NASM_SUBMINOR_VER 0 +#define NASM_PATCHLEVEL_VER 0 +#define NASM_VERSION_ID 0x03020000 +#define NASM_VER "3.02" +#endif /* NASM_VERSION_H */ diff --git a/include/warnings.h b/include/warnings.h new file mode 100644 index 0000000..23df47f --- /dev/null +++ b/include/warnings.h @@ -0,0 +1,166 @@ +#ifndef NASM_WARNINGS_H +#define NASM_WARNINGS_H + +#ifndef WARN_SHR +# error "warnings.h should only be included from within error.h" +#endif + +enum warn_index { + WARN_IDX_NONE = 0, /* not suppressible */ + WARN_IDX_DB_EMPTY = 1, /* no operand for data declaration */ + WARN_IDX_DIRECTIVE_GARBAGE_EOL = 2, /* garbage after directive */ + WARN_IDX_EA_ABSOLUTE = 3, /* absolute address cannot be RIP-relative */ + WARN_IDX_EA_DISPSIZE = 4, /* displacement size ignored on absolute address */ + WARN_IDX_FLOAT_DENORM = 5, /* floating point denormal */ + WARN_IDX_FLOAT_OVERFLOW = 6, /* floating point overflow */ + WARN_IDX_FLOAT_TOOLONG = 7, /* too many digits in floating-point number */ + WARN_IDX_FLOAT_UNDERFLOW = 8, /* floating point underflow */ + WARN_IDX_FORWARD = 9, /* forward reference may have unpredictable results */ + WARN_IDX_IMPLICIT_ABS_DEPRECATED = 10, /* implicit DEFAULT ABS is deprecated */ + WARN_IDX_LABEL_ORPHAN = 11, /* labels alone on lines without trailing : */ + WARN_IDX_LABEL_REDEF = 12, /* label redefined to an identical value */ + WARN_IDX_LABEL_REDEF_LATE = 13, /* label (re)defined during code generation */ + WARN_IDX_NUMBER_DEPRECATED_HEX = 14, /* $ prefix for hexadecimal is deprecated */ + WARN_IDX_NUMBER_OVERFLOW = 15, /* numeric constant does not fit */ + WARN_IDX_OBSOLETE_NOP = 16, /* instruction obsolete and is a noop on the target CPU */ + WARN_IDX_OBSOLETE_REMOVED = 17, /* instruction obsolete and removed on the target CPU */ + WARN_IDX_OBSOLETE_VALID = 18, /* instruction obsolete but valid on the target CPU */ + WARN_IDX_PHASE = 19, /* phase error during stabilization */ + WARN_IDX_PP_ELSE_ELIF = 20, /* %elif after %else */ + WARN_IDX_PP_ELSE_ELSE = 21, /* %else after %else */ + WARN_IDX_PP_EMPTY_BRACES = 22, /* empty %{} construct */ + WARN_IDX_PP_ENVIRONMENT = 23, /* nonexistent environment variable */ + WARN_IDX_PP_MACRO_DEF_CASE_SINGLE = 24, /* single-line macro defined both case sensitive and insensitive */ + WARN_IDX_PP_MACRO_DEF_GREEDY_SINGLE = 25, /* single-line macro */ + WARN_IDX_PP_MACRO_DEF_PARAM_SINGLE = 26, /* single-line macro defined with and without parameters */ + WARN_IDX_PP_MACRO_DEFAULTS = 27, /* macros with more default than optional parameters */ + WARN_IDX_PP_MACRO_PARAMS_LEGACY = 28, /* improperly calling multi-line macro for legacy support */ + WARN_IDX_PP_MACRO_PARAMS_MULTI = 29, /* multi-line macro calls with wrong parameter count */ + WARN_IDX_PP_MACRO_PARAMS_SINGLE = 30, /* single-line macro calls with wrong parameter count */ + WARN_IDX_PP_MACRO_REDEF_MULTI = 31, /* redefining multi-line macro */ + WARN_IDX_PP_OPEN_BRACES = 32, /* unterminated %{...} */ + WARN_IDX_PP_OPEN_BRACKETS = 33, /* unterminated %[...] */ + WARN_IDX_PP_OPEN_STRING = 34, /* unterminated string */ + WARN_IDX_PP_REP_NEGATIVE = 35, /* negative %rep count */ + WARN_IDX_PP_RESERVED = 36, /* reserved unimplemented preprocessor directive */ + WARN_IDX_PP_SEL_RANGE = 37, /* %sel() argument out of range */ + WARN_IDX_PP_TRAILING = 38, /* trailing garbage ignored */ + WARN_IDX_PRAGMA_BAD = 39, /* malformed %pragma */ + WARN_IDX_PRAGMA_EMPTY = 40, /* empty %pragma directive */ + WARN_IDX_PRAGMA_NA = 41, /* %pragma not applicable to this compilation */ + WARN_IDX_PRAGMA_UNKNOWN = 42, /* unknown %pragma facility or directive */ + WARN_IDX_PREFIX_BADMODE_O64 = 43, /* o64 prefix invalid in 16/32-bit mode */ + WARN_IDX_PREFIX_BND = 44, /* invalid BND prefix */ + WARN_IDX_PREFIX_HINT_DROPPED = 45, /* invalid branch hint prefix dropped */ + WARN_IDX_PREFIX_HLE = 46, /* invalid HLE prefix */ + WARN_IDX_PREFIX_INVALID = 47, /* invalid prefix for instruction */ + WARN_IDX_PREFIX_LOCK_ERROR = 48, /* LOCK prefix on unlockable instruction */ + WARN_IDX_PREFIX_LOCK_XCHG = 49, /* superfluous LOCK prefix on XCHG instruction */ + WARN_IDX_PREFIX_OPSIZE = 50, /* invalid operand size prefix */ + WARN_IDX_PREFIX_SEG = 51, /* segment prefix ignored in 64-bit mode */ + WARN_IDX_PTR = 52, /* non-NASM keyword used in other assemblers */ + WARN_IDX_REGSIZE = 53, /* register size specification ignored */ + WARN_IDX_RELOC_ABS_BYTE = 54, /* 8-bit absolute section-crossing relocation */ + WARN_IDX_RELOC_ABS_DWORD = 55, /* 32-bit absolute section-crossing relocation */ + WARN_IDX_RELOC_ABS_QWORD = 56, /* 64-bit absolute section-crossing relocation */ + WARN_IDX_RELOC_ABS_WORD = 57, /* 16-bit absolute section-crossing relocation */ + WARN_IDX_RELOC_REL_BYTE = 58, /* 8-bit relative section-crossing relocation */ + WARN_IDX_RELOC_REL_DWORD = 59, /* 32-bit relative section-crossing relocation */ + WARN_IDX_RELOC_REL_QWORD = 60, /* 64-bit relative section-crossing relocation */ + WARN_IDX_RELOC_REL_WORD = 61, /* 16-bit relative section-crossing relocation */ + WARN_IDX_SECTION_ALIGNMENT_ROUNDED = 62, /* section alignment rounded up */ + WARN_IDX_UNKNOWN_WARNING = 63, /* unknown warning in -W/-w or warning directive */ + WARN_IDX_USER = 64, /* %warning directives */ + WARN_IDX_WARN_STACK_EMPTY = 65, /* warning stack empty */ + WARN_IDX_ZEROING = 66, /* RESx in initialized section becomes zero */ + WARN_IDX_ZEXT_RELOC = 67, /* relocation zero-extended to match output format */ + WARN_IDX_OTHER = 68, /* any warning not assigned to a specific warning class */ + WARN_IDX_ALL = 69 /* all possible warnings */ +}; + +enum warn_const { + WARN_NONE = 0 << WARN_SHR, + WARN_DB_EMPTY = 1 << WARN_SHR, + WARN_DIRECTIVE_GARBAGE_EOL = 2 << WARN_SHR, + WARN_EA_ABSOLUTE = 3 << WARN_SHR, + WARN_EA_DISPSIZE = 4 << WARN_SHR, + WARN_FLOAT_DENORM = 5 << WARN_SHR, + WARN_FLOAT_OVERFLOW = 6 << WARN_SHR, + WARN_FLOAT_TOOLONG = 7 << WARN_SHR, + WARN_FLOAT_UNDERFLOW = 8 << WARN_SHR, + WARN_FORWARD = 9 << WARN_SHR, + WARN_IMPLICIT_ABS_DEPRECATED = 10 << WARN_SHR, + WARN_LABEL_ORPHAN = 11 << WARN_SHR, + WARN_LABEL_REDEF = 12 << WARN_SHR, + WARN_LABEL_REDEF_LATE = 13 << WARN_SHR, + WARN_NUMBER_DEPRECATED_HEX = 14 << WARN_SHR, + WARN_NUMBER_OVERFLOW = 15 << WARN_SHR, + WARN_OBSOLETE_NOP = 16 << WARN_SHR, + WARN_OBSOLETE_REMOVED = 17 << WARN_SHR, + WARN_OBSOLETE_VALID = 18 << WARN_SHR, + WARN_PHASE = 19 << WARN_SHR, + WARN_PP_ELSE_ELIF = 20 << WARN_SHR, + WARN_PP_ELSE_ELSE = 21 << WARN_SHR, + WARN_PP_EMPTY_BRACES = 22 << WARN_SHR, + WARN_PP_ENVIRONMENT = 23 << WARN_SHR, + WARN_PP_MACRO_DEF_CASE_SINGLE = 24 << WARN_SHR, + WARN_PP_MACRO_DEF_GREEDY_SINGLE = 25 << WARN_SHR, + WARN_PP_MACRO_DEF_PARAM_SINGLE = 26 << WARN_SHR, + WARN_PP_MACRO_DEFAULTS = 27 << WARN_SHR, + WARN_PP_MACRO_PARAMS_LEGACY = 28 << WARN_SHR, + WARN_PP_MACRO_PARAMS_MULTI = 29 << WARN_SHR, + WARN_PP_MACRO_PARAMS_SINGLE = 30 << WARN_SHR, + WARN_PP_MACRO_REDEF_MULTI = 31 << WARN_SHR, + WARN_PP_OPEN_BRACES = 32 << WARN_SHR, + WARN_PP_OPEN_BRACKETS = 33 << WARN_SHR, + WARN_PP_OPEN_STRING = 34 << WARN_SHR, + WARN_PP_REP_NEGATIVE = 35 << WARN_SHR, + WARN_PP_RESERVED = 36 << WARN_SHR, + WARN_PP_SEL_RANGE = 37 << WARN_SHR, + WARN_PP_TRAILING = 38 << WARN_SHR, + WARN_PRAGMA_BAD = 39 << WARN_SHR, + WARN_PRAGMA_EMPTY = 40 << WARN_SHR, + WARN_PRAGMA_NA = 41 << WARN_SHR, + WARN_PRAGMA_UNKNOWN = 42 << WARN_SHR, + WARN_PREFIX_BADMODE_O64 = 43 << WARN_SHR, + WARN_PREFIX_BND = 44 << WARN_SHR, + WARN_PREFIX_HINT_DROPPED = 45 << WARN_SHR, + WARN_PREFIX_HLE = 46 << WARN_SHR, + WARN_PREFIX_INVALID = 47 << WARN_SHR, + WARN_PREFIX_LOCK_ERROR = 48 << WARN_SHR, + WARN_PREFIX_LOCK_XCHG = 49 << WARN_SHR, + WARN_PREFIX_OPSIZE = 50 << WARN_SHR, + WARN_PREFIX_SEG = 51 << WARN_SHR, + WARN_PTR = 52 << WARN_SHR, + WARN_REGSIZE = 53 << WARN_SHR, + WARN_RELOC_ABS_BYTE = 54 << WARN_SHR, + WARN_RELOC_ABS_DWORD = 55 << WARN_SHR, + WARN_RELOC_ABS_QWORD = 56 << WARN_SHR, + WARN_RELOC_ABS_WORD = 57 << WARN_SHR, + WARN_RELOC_REL_BYTE = 58 << WARN_SHR, + WARN_RELOC_REL_DWORD = 59 << WARN_SHR, + WARN_RELOC_REL_QWORD = 60 << WARN_SHR, + WARN_RELOC_REL_WORD = 61 << WARN_SHR, + WARN_SECTION_ALIGNMENT_ROUNDED = 62 << WARN_SHR, + WARN_UNKNOWN_WARNING = 63 << WARN_SHR, + WARN_USER = 64 << WARN_SHR, + WARN_WARN_STACK_EMPTY = 65 << WARN_SHR, + WARN_ZEROING = 66 << WARN_SHR, + WARN_ZEXT_RELOC = 67 << WARN_SHR, + WARN_OTHER = 68 << WARN_SHR +}; + +struct warning_alias { + const char *name; + enum warn_index warning; +}; + +#define NUM_WARNINGS 69 +#define NUM_WARNING_ALIAS 85 +extern const char * const warning_name[70]; +extern const char * const warning_help[70]; +extern const struct warning_alias warning_alias[NUM_WARNING_ALIAS]; + +#endif /* NASM_WARNINGS_H */ +extern uint8_t warning_state[NUM_WARNINGS]; +extern const uint8_t warning_default[NUM_WARNINGS]; diff --git a/include/warnings_c.h b/include/warnings_c.h new file mode 100644 index 0000000..21a4962 --- /dev/null +++ b/include/warnings_c.h @@ -0,0 +1,309 @@ +#include "error.h" + +const char * const warning_name[70] = { + NULL, + "db-empty", + "directive-garbage-eol", + "ea-absolute", + "ea-dispsize", + "float-denorm", + "float-overflow", + "float-toolong", + "float-underflow", + "forward", + "implicit-abs-deprecated", + "label-orphan", + "label-redef", + "label-redef-late", + "number-deprecated-hex", + "number-overflow", + "obsolete-nop", + "obsolete-removed", + "obsolete-valid", + "phase", + "pp-else-elif", + "pp-else-else", + "pp-empty-braces", + "pp-environment", + "pp-macro-def-case-single", + "pp-macro-def-greedy-single", + "pp-macro-def-param-single", + "pp-macro-defaults", + "pp-macro-params-legacy", + "pp-macro-params-multi", + "pp-macro-params-single", + "pp-macro-redef-multi", + "pp-open-braces", + "pp-open-brackets", + "pp-open-string", + "pp-rep-negative", + "pp-reserved", + "pp-sel-range", + "pp-trailing", + "pragma-bad", + "pragma-empty", + "pragma-na", + "pragma-unknown", + "prefix-badmode-o64", + "prefix-bnd", + "prefix-hint-dropped", + "prefix-hle", + "prefix-invalid", + "prefix-lock-error", + "prefix-lock-xchg", + "prefix-opsize", + "prefix-seg", + "ptr", + "regsize", + "reloc-abs-byte", + "reloc-abs-dword", + "reloc-abs-qword", + "reloc-abs-word", + "reloc-rel-byte", + "reloc-rel-dword", + "reloc-rel-qword", + "reloc-rel-word", + "section-alignment-rounded", + "unknown-warning", + "user", + "warn-stack-empty", + "zeroing", + "zext-reloc", + "other", + "all" +}; + +const struct warning_alias warning_alias[85] = { + { "all", WARN_IDX_ALL }, + { "bad-pragma", WARN_IDX_PRAGMA_BAD }, + { "bnd", WARN_IDX_PREFIX_BND }, + { "db-empty", WARN_IDX_DB_EMPTY }, + { "directive-garbage-eol", WARN_IDX_DIRECTIVE_GARBAGE_EOL }, + { "ea-absolute", WARN_IDX_EA_ABSOLUTE }, + { "ea-dispsize", WARN_IDX_EA_DISPSIZE }, + { "environment", WARN_IDX_PP_ENVIRONMENT }, + { "float-denorm", WARN_IDX_FLOAT_DENORM }, + { "float-overflow", WARN_IDX_FLOAT_OVERFLOW }, + { "float-toolong", WARN_IDX_FLOAT_TOOLONG }, + { "float-underflow", WARN_IDX_FLOAT_UNDERFLOW }, + { "forward", WARN_IDX_FORWARD }, + { "hle", WARN_IDX_PREFIX_HLE }, + { "implicit-abs-deprecated", WARN_IDX_IMPLICIT_ABS_DEPRECATED }, + { "label-orphan", WARN_IDX_LABEL_ORPHAN }, + { "label-redef", WARN_IDX_LABEL_REDEF }, + { "label-redef-late", WARN_IDX_LABEL_REDEF_LATE }, + { "lock", WARN_IDX_PREFIX_LOCK_ERROR }, + { "macro-def-case-single", WARN_IDX_PP_MACRO_DEF_CASE_SINGLE }, + { "macro-def-greedy-single", WARN_IDX_PP_MACRO_DEF_GREEDY_SINGLE }, + { "macro-def-param-single", WARN_IDX_PP_MACRO_DEF_PARAM_SINGLE }, + { "macro-defaults", WARN_IDX_PP_MACRO_DEFAULTS }, + { "macro-params-legacy", WARN_IDX_PP_MACRO_PARAMS_LEGACY }, + { "macro-params-multi", WARN_IDX_PP_MACRO_PARAMS_MULTI }, + { "macro-params-single", WARN_IDX_PP_MACRO_PARAMS_SINGLE }, + { "negative-rep", WARN_IDX_PP_REP_NEGATIVE }, + { "not-my-pragma", WARN_IDX_PRAGMA_NA }, + { "number-deprecated-hex", WARN_IDX_NUMBER_DEPRECATED_HEX }, + { "number-overflow", WARN_IDX_NUMBER_OVERFLOW }, + { "obsolete-nop", WARN_IDX_OBSOLETE_NOP }, + { "obsolete-removed", WARN_IDX_OBSOLETE_REMOVED }, + { "obsolete-valid", WARN_IDX_OBSOLETE_VALID }, + { "orphan-labels", WARN_IDX_LABEL_ORPHAN }, + { "other", WARN_IDX_OTHER }, + { "phase", WARN_IDX_PHASE }, + { "pp-else-elif", WARN_IDX_PP_ELSE_ELIF }, + { "pp-else-else", WARN_IDX_PP_ELSE_ELSE }, + { "pp-empty-braces", WARN_IDX_PP_EMPTY_BRACES }, + { "pp-environment", WARN_IDX_PP_ENVIRONMENT }, + { "pp-macro-def-case-single", WARN_IDX_PP_MACRO_DEF_CASE_SINGLE }, + { "pp-macro-def-greedy-single", WARN_IDX_PP_MACRO_DEF_GREEDY_SINGLE }, + { "pp-macro-def-param-single", WARN_IDX_PP_MACRO_DEF_PARAM_SINGLE }, + { "pp-macro-defaults", WARN_IDX_PP_MACRO_DEFAULTS }, + { "pp-macro-params-legacy", WARN_IDX_PP_MACRO_PARAMS_LEGACY }, + { "pp-macro-params-multi", WARN_IDX_PP_MACRO_PARAMS_MULTI }, + { "pp-macro-params-single", WARN_IDX_PP_MACRO_PARAMS_SINGLE }, + { "pp-macro-redef-multi", WARN_IDX_PP_MACRO_REDEF_MULTI }, + { "pp-open-braces", WARN_IDX_PP_OPEN_BRACES }, + { "pp-open-brackets", WARN_IDX_PP_OPEN_BRACKETS }, + { "pp-open-string", WARN_IDX_PP_OPEN_STRING }, + { "pp-rep-negative", WARN_IDX_PP_REP_NEGATIVE }, + { "pp-reserved", WARN_IDX_PP_RESERVED }, + { "pp-sel-range", WARN_IDX_PP_SEL_RANGE }, + { "pp-trailing", WARN_IDX_PP_TRAILING }, + { "pragma-bad", WARN_IDX_PRAGMA_BAD }, + { "pragma-empty", WARN_IDX_PRAGMA_EMPTY }, + { "pragma-na", WARN_IDX_PRAGMA_NA }, + { "pragma-unknown", WARN_IDX_PRAGMA_UNKNOWN }, + { "prefix-badmode-o64", WARN_IDX_PREFIX_BADMODE_O64 }, + { "prefix-bnd", WARN_IDX_PREFIX_BND }, + { "prefix-hint-dropped", WARN_IDX_PREFIX_HINT_DROPPED }, + { "prefix-hle", WARN_IDX_PREFIX_HLE }, + { "prefix-invalid", WARN_IDX_PREFIX_INVALID }, + { "prefix-lock-error", WARN_IDX_PREFIX_LOCK_ERROR }, + { "prefix-lock-xchg", WARN_IDX_PREFIX_LOCK_XCHG }, + { "prefix-opsize", WARN_IDX_PREFIX_OPSIZE }, + { "prefix-seg", WARN_IDX_PREFIX_SEG }, + { "ptr", WARN_IDX_PTR }, + { "regsize", WARN_IDX_REGSIZE }, + { "reloc-abs-byte", WARN_IDX_RELOC_ABS_BYTE }, + { "reloc-abs-dword", WARN_IDX_RELOC_ABS_DWORD }, + { "reloc-abs-qword", WARN_IDX_RELOC_ABS_QWORD }, + { "reloc-abs-word", WARN_IDX_RELOC_ABS_WORD }, + { "reloc-rel-byte", WARN_IDX_RELOC_REL_BYTE }, + { "reloc-rel-dword", WARN_IDX_RELOC_REL_DWORD }, + { "reloc-rel-qword", WARN_IDX_RELOC_REL_QWORD }, + { "reloc-rel-word", WARN_IDX_RELOC_REL_WORD }, + { "section-alignment-rounded", WARN_IDX_SECTION_ALIGNMENT_ROUNDED }, + { "unknown-pragma", WARN_IDX_PRAGMA_UNKNOWN }, + { "unknown-warning", WARN_IDX_UNKNOWN_WARNING }, + { "user", WARN_IDX_USER }, + { "warn-stack-empty", WARN_IDX_WARN_STACK_EMPTY }, + { "zeroing", WARN_IDX_ZEROING }, + { "zext-reloc", WARN_IDX_ZEXT_RELOC } +}; + +const char * const warning_help[70] = { + NULL, + "no operand for data declaration", + "garbage after directive", + "absolute address cannot be RIP-relative", + "displacement size ignored on absolute address", + "floating point denormal", + "floating point overflow", + "too many digits in floating-point number", + "floating point underflow", + "forward reference may have unpredictable results", + "implicit DEFAULT ABS is deprecated", + "labels alone on lines without trailing :", + "label redefined to an identical value", + "label (re)defined during code generation", + "$ prefix for hexadecimal is deprecated", + "numeric constant does not fit", + "instruction obsolete and is a noop on the target CPU", + "instruction obsolete and removed on the target CPU", + "instruction obsolete but valid on the target CPU", + "phase error during stabilization", + "%elif after %else", + "%else after %else", + "empty %{} construct", + "nonexistent environment variable", + "single-line macro defined both case sensitive and insensitive", + "single-line macro", + "single-line macro defined with and without parameters", + "macros with more default than optional parameters", + "improperly calling multi-line macro for legacy support", + "multi-line macro calls with wrong parameter count", + "single-line macro calls with wrong parameter count", + "redefining multi-line macro", + "unterminated %{...}", + "unterminated %[...]", + "unterminated string", + "negative %rep count", + "reserved unimplemented preprocessor directive", + "%sel() argument out of range", + "trailing garbage ignored", + "malformed %pragma", + "empty %pragma directive", + "%pragma not applicable to this compilation", + "unknown %pragma facility or directive", + "o64 prefix invalid in 16/32-bit mode", + "invalid BND prefix", + "invalid branch hint prefix dropped", + "invalid HLE prefix", + "invalid prefix for instruction", + "LOCK prefix on unlockable instruction", + "superfluous LOCK prefix on XCHG instruction", + "invalid operand size prefix", + "segment prefix ignored in 64-bit mode", + "non-NASM keyword used in other assemblers", + "register size specification ignored", + "8-bit absolute section-crossing relocation", + "32-bit absolute section-crossing relocation", + "64-bit absolute section-crossing relocation", + "16-bit absolute section-crossing relocation", + "8-bit relative section-crossing relocation", + "32-bit relative section-crossing relocation", + "64-bit relative section-crossing relocation", + "16-bit relative section-crossing relocation", + "section alignment rounded up", + "unknown warning in -W/-w or warning directive", + "%warning directives", + "warning stack empty", + "RESx in initialized section becomes zero", + "relocation zero-extended to match output format", + "any warning not assigned to a specific warning class", + "all possible warnings" +}; + +const uint8_t warning_default[69] = { + WARN_INIT_ON, + WARN_INIT_ON, + WARN_INIT_ERR, + WARN_INIT_ON, + WARN_INIT_ON, + WARN_INIT_OFF, + WARN_INIT_ON, + WARN_INIT_ON, + WARN_INIT_OFF, + WARN_INIT_ON, + WARN_INIT_ON, + WARN_INIT_ON, + WARN_INIT_OFF, + WARN_INIT_ERR, + WARN_INIT_ON, + WARN_INIT_ON, + WARN_INIT_ON, + WARN_INIT_ON, + WARN_INIT_ON, + WARN_INIT_OFF, + WARN_INIT_ON, + WARN_INIT_ON, + WARN_INIT_ON, + WARN_INIT_ON, + WARN_INIT_ON, + WARN_INIT_ON, + WARN_INIT_ERR, + WARN_INIT_ON, + WARN_INIT_ON, + WARN_INIT_ON, + WARN_INIT_ON, + WARN_INIT_ON, + WARN_INIT_ON, + WARN_INIT_ON, + WARN_INIT_ON, + WARN_INIT_ON, + WARN_INIT_ON, + WARN_INIT_ON, + WARN_INIT_ON, + WARN_INIT_OFF, + WARN_INIT_OFF, + WARN_INIT_OFF, + WARN_INIT_OFF, + WARN_INIT_ERR, + WARN_INIT_ON, + WARN_INIT_ON, + WARN_INIT_ON, + WARN_INIT_ON, + WARN_INIT_ON, + WARN_INIT_ON, + WARN_INIT_ON, + WARN_INIT_ON, + WARN_INIT_ON, + WARN_INIT_ON, + WARN_INIT_OFF, + WARN_INIT_OFF, + WARN_INIT_OFF, + WARN_INIT_OFF, + WARN_INIT_OFF, + WARN_INIT_OFF, + WARN_INIT_OFF, + WARN_INIT_OFF, + WARN_INIT_ON, + WARN_INIT_OFF, + WARN_INIT_ON, + WARN_INIT_ON, + WARN_INIT_ON, + WARN_INIT_ON, + WARN_INIT_ON +}; + +uint8_t warning_state[69]; /* Current state */ diff --git a/include/watcom.h b/include/watcom.h new file mode 100644 index 0000000..bcecb61 --- /dev/null +++ b/include/watcom.h @@ -0,0 +1,75 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 2016 The NASM Authors - All Rights Reserved */ + +/* + * config/watcom.h + * + * Compiler definitions for OpenWatcom instead of config.h.in. + * See config.h.in for the variables which can be defined here. + * + * This was taken from openwcom.mak and needs to be actually validated. + */ + +#ifndef NASM_CONFIG_WATCOM_H +#define NASM_CONFIG_WATCOM_H + +#define HAVE_DECL_STRCASECMP 1 +#define HAVE_DECL_STRICMP 1 +#define HAVE_DECL_STRLCPY 1 +#define HAVE_DECL_STRNCASECMP 1 +#define HAVE_DECL_STRNICMP 1 +#ifndef __LINUX__ +#define HAVE_IO_H 1 +#endif +#define HAVE_LIMITS_H 1 +#define HAVE_MEMORY_H 1 +#define HAVE_SNPRINTF 1 +#if (__WATCOMC__ >= 1230) +#undef HAVE__BOOL /* need stdbool.h */ +#define HAVE_STDBOOL_H 1 +#define HAVE_INTTYPES_H 1 +#define HAVE_STDINT_H 1 +#define HAVE_UINTPTR_T 1 +#endif +#define HAVE_STDLIB_H 1 +#define HAVE_STRCSPN 1 +#define HAVE_STRICMP 1 +#define HAVE_STRNICMP 1 +#define HAVE_STRSPN 1 +#define HAVE_STRING_H 1 +#if (__WATCOMC__ >= 1240) +#define HAVE_STRCASECMP 1 +#define HAVE_STRNCASECMP 1 +#define HAVE_STRLCPY 1 +#define HAVE_STRINGS_H 1 +#endif +#define HAVE_SYS_STAT_H 1 +#define HAVE_SYS_TYPES_H 1 +#define HAVE_FCNTL_H 1 +#define HAVE_UNISTD_H 1 +#define HAVE_VSNPRINTF 1 +#define STDC_HEADERS 1 + +#define HAVE__FULLPATH 1 +#define HAVE_ACCESS +#define HAVE_STRUCT_STAT +#define HAVE_STAT +#define HAVE_FSTAT +#define HAVE_FILENO +#ifdef __LINUX__ +#define HAVE_FTRUNCATE +#else +#define HAVE_CHSIZE +#define HAVE__CHSIZE +#endif +#define HAVE_ISASCII +#define HAVE_ISCNTRL + +#if (__WATCOMC__ >= 1250) +#define restrict __restrict +#else +#define restrict +#endif +#define inline __inline + +#endif /* NASM_CONFIG_WATCOM_H */ diff --git a/include/x86const.h b/include/x86const.h new file mode 100644 index 0000000..0501cc2 --- /dev/null +++ b/include/x86const.h @@ -0,0 +1,14 @@ +#ifndef NASM_X86CONST_H +#define NASM_X86CONST_H + +/* + * Values used for the DFV bits in the CCMPcc and CTESTcc instructions. + */ +enum dfv_mask { + DFV_CF = 1, + DFV_ZF = 2, + DFV_SF = 4, + DFV_OF = 8 +}; + +#endif /* NASM_X86CONST_H */ diff --git a/include/zamenyator.h b/include/zamenyator.h new file mode 100644 index 0000000..1e159ee --- /dev/null +++ b/include/zamenyator.h @@ -0,0 +1,6 @@ +#ifndef ZAMENYATOR_H +#define ZAMENYATOR_H + +const char *translate_insn(const char *insn); + +#endif \ No newline at end of file diff --git a/include/zconf.h b/include/zconf.h new file mode 100644 index 0000000..7490ced --- /dev/null +++ b/include/zconf.h @@ -0,0 +1,554 @@ +/* zconf.h -- configuration of the zlib compression library + * Copyright (C) 1995-2024 Jean-loup Gailly, Mark Adler + * For conditions of distribution and use, see copyright notice in zlib.h + */ + +/* @(#) $Id$ */ + +#ifndef ZCONF_H +#define ZCONF_H + +#include "compiler.h" + +#define HAVE_VSNPRINTF 1 /* If it doesn't exist we add it */ +#define Z_SOLO 1 +#define z_off_t off_t +#define z_off64_t off_t + +/* + * If you *really* need a unique prefix for all types and library functions, + * compile with -DZ_PREFIX. The "standard" zlib should be compiled without it. + * Even better than compiling with -DZ_PREFIX would be to use configure to set + * this permanently in zconf.h using "./configure --zprefix". + */ +#ifdef Z_PREFIX /* may be set to #if 1 by ./configure */ +# define Z_PREFIX_SET + +/* all linked symbols and init macros */ +# define _dist_code z__dist_code +# define _length_code z__length_code +# define _tr_align z__tr_align +# define _tr_flush_bits z__tr_flush_bits +# define _tr_flush_block z__tr_flush_block +# define _tr_init z__tr_init +# define _tr_stored_block z__tr_stored_block +# define _tr_tally z__tr_tally +# define adler32 z_adler32 +# define adler32_combine z_adler32_combine +# define adler32_combine64 z_adler32_combine64 +# define adler32_z z_adler32_z +# ifndef Z_SOLO +# define compress z_compress +# define compress2 z_compress2 +# define compressBound z_compressBound +# endif +# define crc32 z_crc32 +# define crc32_combine z_crc32_combine +# define crc32_combine64 z_crc32_combine64 +# define crc32_combine_gen z_crc32_combine_gen +# define crc32_combine_gen64 z_crc32_combine_gen64 +# define crc32_combine_op z_crc32_combine_op +# define crc32_z z_crc32_z +# define deflate z_deflate +# define deflateBound z_deflateBound +# define deflateCopy z_deflateCopy +# define deflateEnd z_deflateEnd +# define deflateGetDictionary z_deflateGetDictionary +# define deflateInit z_deflateInit +# define deflateInit2 z_deflateInit2 +# define deflateInit2_ z_deflateInit2_ +# define deflateInit_ z_deflateInit_ +# define deflateParams z_deflateParams +# define deflatePending z_deflatePending +# define deflatePrime z_deflatePrime +# define deflateReset z_deflateReset +# define deflateResetKeep z_deflateResetKeep +# define deflateSetDictionary z_deflateSetDictionary +# define deflateSetHeader z_deflateSetHeader +# define deflateTune z_deflateTune +# define deflate_copyright z_deflate_copyright +# define get_crc_table z_get_crc_table +# ifndef Z_SOLO +# define gz_error z_gz_error +# define gz_intmax z_gz_intmax +# define gz_strwinerror z_gz_strwinerror +# define gzbuffer z_gzbuffer +# define gzclearerr z_gzclearerr +# define gzclose z_gzclose +# define gzclose_r z_gzclose_r +# define gzclose_w z_gzclose_w +# define gzdirect z_gzdirect +# define gzdopen z_gzdopen +# define gzeof z_gzeof +# define gzerror z_gzerror +# define gzflush z_gzflush +# define gzfread z_gzfread +# define gzfwrite z_gzfwrite +# define gzgetc z_gzgetc +# define gzgetc_ z_gzgetc_ +# define gzgets z_gzgets +# define gzoffset z_gzoffset +# define gzoffset64 z_gzoffset64 +# define gzopen z_gzopen +# define gzopen64 z_gzopen64 +# ifdef _WIN32 +# define gzopen_w z_gzopen_w +# endif +# define gzprintf z_gzprintf +# define gzputc z_gzputc +# define gzputs z_gzputs +# define gzread z_gzread +# define gzrewind z_gzrewind +# define gzseek z_gzseek +# define gzseek64 z_gzseek64 +# define gzsetparams z_gzsetparams +# define gztell z_gztell +# define gztell64 z_gztell64 +# define gzungetc z_gzungetc +# define gzvprintf z_gzvprintf +# define gzwrite z_gzwrite +# endif +# define inflate z_inflate +# define inflateBack z_inflateBack +# define inflateBackEnd z_inflateBackEnd +# define inflateBackInit z_inflateBackInit +# define inflateBackInit_ z_inflateBackInit_ +# define inflateCodesUsed z_inflateCodesUsed +# define inflateCopy z_inflateCopy +# define inflateEnd z_inflateEnd +# define inflateGetDictionary z_inflateGetDictionary +# define inflateGetHeader z_inflateGetHeader +# define inflateInit z_inflateInit +# define inflateInit2 z_inflateInit2 +# define inflateInit2_ z_inflateInit2_ +# define inflateInit_ z_inflateInit_ +# define inflateMark z_inflateMark +# define inflatePrime z_inflatePrime +# define inflateReset z_inflateReset +# define inflateReset2 z_inflateReset2 +# define inflateResetKeep z_inflateResetKeep +# define inflateSetDictionary z_inflateSetDictionary +# define inflateSync z_inflateSync +# define inflateSyncPoint z_inflateSyncPoint +# define inflateUndermine z_inflateUndermine +# define inflateValidate z_inflateValidate +# define inflate_copyright z_inflate_copyright +# define inflate_fast z_inflate_fast +# define inflate_table z_inflate_table +# ifndef Z_SOLO +# define uncompress z_uncompress +# define uncompress2 z_uncompress2 +# endif +# define zError z_zError +# ifndef Z_SOLO +# define zcalloc z_zcalloc +# define zcfree z_zcfree +# endif +# define zlibCompileFlags z_zlibCompileFlags +# define zlibVersion z_zlibVersion + +/* all zlib typedefs in zlib.h and zconf.h */ +# define Byte z_Byte +# define Bytef z_Bytef +# define alloc_func z_alloc_func +# define charf z_charf +# define free_func z_free_func +# ifndef Z_SOLO +# define gzFile z_gzFile +# endif +# define gz_header z_gz_header +# define gz_headerp z_gz_headerp +# define in_func z_in_func +# define intf z_intf +# define out_func z_out_func +# define uInt z_uInt +# define uIntf z_uIntf +# define uLong z_uLong +# define uLongf z_uLongf +# define voidp z_voidp +# define voidpc z_voidpc +# define voidpf z_voidpf + +/* all zlib structs in zlib.h and zconf.h */ +# define gz_header_s z_gz_header_s +# define internal_state z_internal_state + +#endif + +#if defined(__MSDOS__) && !defined(MSDOS) +# define MSDOS +#endif +#if (defined(OS_2) || defined(__OS2__)) && !defined(OS2) +# define OS2 +#endif +#if defined(_WINDOWS) && !defined(WINDOWS) +# define WINDOWS +#endif +#if defined(_WIN32) || defined(_WIN32_WCE) || defined(__WIN32__) +# ifndef WIN32 +# define WIN32 +# endif +#endif +#if (defined(MSDOS) || defined(OS2) || defined(WINDOWS)) && !defined(WIN32) +# if !defined(__GNUC__) && !defined(__FLAT__) && !defined(__386__) +# ifndef SYS16BIT +# define SYS16BIT +# endif +# endif +#endif + +/* + * Compile with -DMAXSEG_64K if the alloc function cannot allocate more + * than 64k bytes at a time (needed on systems with 16-bit int). + */ +#ifdef SYS16BIT +# define MAXSEG_64K +#endif +#ifdef MSDOS +# define UNALIGNED_OK +#endif + +#ifdef __STDC_VERSION__ +# ifndef STDC +# define STDC +# endif +# if __STDC_VERSION__ >= 199901L +# ifndef STDC99 +# define STDC99 +# endif +# endif +#endif +#if !defined(STDC) && (defined(__STDC__) || defined(__cplusplus)) +# define STDC +#endif +#if !defined(STDC) && (defined(__GNUC__) || defined(__BORLANDC__)) +# define STDC +#endif +#if !defined(STDC) && (defined(MSDOS) || defined(WINDOWS) || defined(WIN32)) +# define STDC +#endif +#if !defined(STDC) && (defined(OS2) || defined(__HOS_AIX__)) +# define STDC +#endif + +#if defined(__OS400__) && !defined(STDC) /* iSeries (formerly AS/400). */ +# define STDC +#endif + +#ifndef STDC +# ifndef const /* cannot use !defined(STDC) && !defined(const) on Mac */ +# define const /* note: need a more gentle solution here */ +# endif +#endif + +#if defined(ZLIB_CONST) && !defined(z_const) +# define z_const const +#else +# define z_const +#endif + +#ifdef Z_SOLO +# ifdef _WIN64 + typedef unsigned long long z_size_t; +# else + typedef unsigned long z_size_t; +# endif +#else +# define z_longlong long long +# if defined(NO_SIZE_T) + typedef unsigned NO_SIZE_T z_size_t; +# elif defined(STDC) +# include + typedef size_t z_size_t; +# else + typedef unsigned long z_size_t; +# endif +# undef z_longlong +#endif + +/* Maximum value for memLevel in deflateInit2 */ +#ifndef MAX_MEM_LEVEL +# ifdef MAXSEG_64K +# define MAX_MEM_LEVEL 8 +# else +# define MAX_MEM_LEVEL 9 +# endif +#endif + +/* Maximum value for windowBits in deflateInit2 and inflateInit2. + * WARNING: reducing MAX_WBITS makes minigzip unable to extract .gz files + * created by gzip. (Files created by minigzip can still be extracted by + * gzip.) + */ +#ifndef MAX_WBITS +# define MAX_WBITS 15 /* 32K LZ77 window */ +#endif + +/* The memory requirements for deflate are (in bytes): + (1 << (windowBits+2)) + (1 << (memLevel+9)) + that is: 128K for windowBits=15 + 128K for memLevel = 8 (default values) + plus a few kilobytes for small objects. For example, if you want to reduce + the default memory requirements from 256K to 128K, compile with + make CFLAGS="-O -DMAX_WBITS=14 -DMAX_MEM_LEVEL=7" + Of course this will generally degrade compression (there's no free lunch). + + The memory requirements for inflate are (in bytes) 1 << windowBits + that is, 32K for windowBits=15 (default value) plus about 7 kilobytes + for small objects. +*/ + + /* Type declarations */ + +#ifndef OF /* function prototypes */ +# ifdef STDC +# define OF(args) args +# else +# define OF(args) () +# endif +#endif + +/* The following definitions for FAR are needed only for MSDOS mixed + * model programming (small or medium model with some far allocations). + * This was tested only with MSC; for other MSDOS compilers you may have + * to define NO_MEMCPY in zutil.h. If you don't need the mixed model, + * just define FAR to be empty. + */ +#ifdef SYS16BIT +# if defined(M_I86SM) || defined(M_I86MM) + /* MSC small or medium model */ +# define SMALL_MEDIUM +# ifdef _MSC_VER +# define FAR _far +# else +# define FAR far +# endif +# endif +# if (defined(__SMALL__) || defined(__MEDIUM__)) + /* Turbo C small or medium model */ +# define SMALL_MEDIUM +# ifdef __BORLANDC__ +# define FAR _far +# else +# define FAR far +# endif +# endif +#endif + +#if defined(WINDOWS) || defined(WIN32) + /* If building or using zlib as a DLL, define ZLIB_DLL. + * This is not mandatory, but it offers a little performance increase. + */ +# ifdef ZLIB_DLL +# if defined(WIN32) && (!defined(__BORLANDC__) || (__BORLANDC__ >= 0x500)) +# ifdef ZLIB_INTERNAL +# define ZEXTERN extern __declspec(dllexport) +# else +# define ZEXTERN extern __declspec(dllimport) +# endif +# endif +# endif /* ZLIB_DLL */ + /* If building or using zlib with the WINAPI/WINAPIV calling convention, + * define ZLIB_WINAPI. + * Caution: the standard ZLIB1.DLL is NOT compiled using ZLIB_WINAPI. + */ +# ifdef ZLIB_WINAPI +# ifdef FAR +# undef FAR +# endif +# ifndef WIN32_LEAN_AND_MEAN +# define WIN32_LEAN_AND_MEAN +# endif +# include + /* No need for _export, use ZLIB.DEF instead. */ + /* For complete Windows compatibility, use WINAPI, not __stdcall. */ +# define ZEXPORT WINAPI +# ifdef WIN32 +# define ZEXPORTVA WINAPIV +# else +# define ZEXPORTVA FAR CDECL +# endif +# endif +#endif + +#if defined (__BEOS__) +# ifdef ZLIB_DLL +# ifdef ZLIB_INTERNAL +# define ZEXPORT __declspec(dllexport) +# define ZEXPORTVA __declspec(dllexport) +# else +# define ZEXPORT __declspec(dllimport) +# define ZEXPORTVA __declspec(dllimport) +# endif +# endif +#endif + +#ifndef ZEXTERN +# define ZEXTERN extern +#endif +#ifndef ZEXPORT +# define ZEXPORT +#endif +#ifndef ZEXPORTVA +# define ZEXPORTVA +#endif + +#ifndef FAR +# define FAR +#endif + +#if !defined(__MACTYPES__) +typedef unsigned char Byte; /* 8 bits */ +#endif +typedef unsigned int uInt; /* 16 bits or more */ +typedef unsigned long uLong; /* 32 bits or more */ + +#ifdef SMALL_MEDIUM + /* Borland C/C++ and some old MSC versions ignore FAR inside typedef */ +# define Bytef Byte FAR +#else + typedef Byte FAR Bytef; +#endif +typedef char FAR charf; +typedef int FAR intf; +typedef uInt FAR uIntf; +typedef uLong FAR uLongf; + +#ifdef STDC + typedef void const *voidpc; + typedef void FAR *voidpf; + typedef void *voidp; +#else + typedef Byte const *voidpc; + typedef Byte FAR *voidpf; + typedef Byte *voidp; +#endif + +#if !defined(Z_U4) && !defined(Z_SOLO) && defined(STDC) +# include +# if (UINT_MAX == 0xffffffffUL) +# define Z_U4 unsigned +# elif (ULONG_MAX == 0xffffffffUL) +# define Z_U4 unsigned long +# elif (USHRT_MAX == 0xffffffffUL) +# define Z_U4 unsigned short +# endif +#endif + +#ifdef Z_U4 + typedef Z_U4 z_crc_t; +#else + typedef unsigned long z_crc_t; +#endif + +#if 0 /* NASM hack: this breaks stuff */ + +#ifdef HAVE_UNISTD_H /* may be set to #if 1 by ./configure */ +# define Z_HAVE_UNISTD_H +#endif + +#ifdef HAVE_STDARG_H /* may be set to #if 1 by ./configure */ +# define Z_HAVE_STDARG_H +#endif + +#ifdef STDC +# ifndef Z_SOLO +# include /* for off_t */ +# endif +#endif + +#if defined(STDC) || defined(Z_HAVE_STDARG_H) +# ifndef Z_SOLO +# include /* for va_list */ +# endif +#endif + +#ifdef _WIN32 +# ifndef Z_SOLO +# include /* for wchar_t */ +# endif +#endif + +/* a little trick to accommodate both "#define _LARGEFILE64_SOURCE" and + * "#define _LARGEFILE64_SOURCE 1" as requesting 64-bit operations, (even + * though the former does not conform to the LFS document), but considering + * both "#undef _LARGEFILE64_SOURCE" and "#define _LARGEFILE64_SOURCE 0" as + * equivalently requesting no 64-bit operations + */ +#if defined(_LARGEFILE64_SOURCE) && -_LARGEFILE64_SOURCE - -1 == 1 +# undef _LARGEFILE64_SOURCE +#endif + +#ifndef Z_HAVE_UNISTD_H +# ifdef __WATCOMC__ +# define Z_HAVE_UNISTD_H +# endif +#endif +#ifndef Z_HAVE_UNISTD_H +# if defined(_LARGEFILE64_SOURCE) && !defined(_WIN32) +# define Z_HAVE_UNISTD_H +# endif +#endif +#ifndef Z_SOLO +# if defined(Z_HAVE_UNISTD_H) +# include /* for SEEK_*, off_t, and _LFS64_LARGEFILE */ +# ifdef VMS +# include /* for off_t */ +# endif +# ifndef z_off_t +# define z_off_t off_t +# endif +# endif +#endif + +#if defined(_LFS64_LARGEFILE) && _LFS64_LARGEFILE-0 +# define Z_LFS64 +#endif + +#if defined(_LARGEFILE64_SOURCE) && defined(Z_LFS64) + # define Z_LARGE64 +#endif + +#if defined(_FILE_OFFSET_BITS) && _FILE_OFFSET_BITS-0 == 64 && defined(Z_LFS64) + # define Z_WANT64 +#endif + +#if !defined(SEEK_SET) && !defined(Z_SOLO) +# define SEEK_SET 0 /* Seek from beginning of file. */ +# define SEEK_CUR 1 /* Seek from current position. */ +# define SEEK_END 2 /* Set file pointer to EOF plus "offset" */ +#endif + +#ifndef z_off_t +# define z_off_t long +#endif + +#if !defined(_WIN32) && defined(Z_LARGE64) +# define z_off64_t off64_t +#else +# if defined(_WIN32) && !defined(__GNUC__) +# define z_off64_t __int64 +# else +# define z_off64_t z_off_t +# endif +#endif + +#endif /* NASM hack */ + +/* MVS linker does not support external names larger than 8 bytes */ +#if defined(__MVS__) + #pragma map(deflateInit_,"DEIN") + #pragma map(deflateInit2_,"DEIN2") + #pragma map(deflateEnd,"DEEND") + #pragma map(deflateBound,"DEBND") + #pragma map(inflateInit_,"ININ") + #pragma map(inflateInit2_,"ININ2") + #pragma map(inflateEnd,"INEND") + #pragma map(inflateSync,"INSY") + #pragma map(inflateSetDictionary,"INSEDI") + #pragma map(compressBound,"CMBND") + #pragma map(inflate_table,"INTABL") + #pragma map(inflate_fast,"INFA") + #pragma map(inflate_copyright,"INCOPY") +#endif + +#endif /* ZCONF_H */ diff --git a/include/zlib.h b/include/zlib.h new file mode 100644 index 0000000..e6126e6 --- /dev/null +++ b/include/zlib.h @@ -0,0 +1,1939 @@ +/* zlib.h -- interface of the 'zlib' general purpose compression library + version 1.3.1, January 22nd, 2024 + + Copyright (C) 1995-2024 Jean-loup Gailly and Mark Adler + + This software is provided 'as-is', without any express or implied + warranty. In no event will the authors be held liable for any damages + arising from the use of this software. + + Permission is granted to anyone to use this software for any purpose, + including commercial applications, and to alter it and redistribute it + freely, subject to the following restrictions: + + 1. The origin of this software must not be misrepresented; you must not + claim that you wrote the original software. If you use this software + in a product, an acknowledgment in the product documentation would be + appreciated but is not required. + 2. Altered source versions must be plainly marked as such, and must not be + misrepresented as being the original software. + 3. This notice may not be removed or altered from any source distribution. + + Jean-loup Gailly Mark Adler + jloup@gzip.org madler@alumni.caltech.edu + + + The data format used by the zlib library is described by RFCs (Request for + Comments) 1950 to 1952 in the files http://tools.ietf.org/html/rfc1950 + (zlib format), rfc1951 (deflate format) and rfc1952 (gzip format). +*/ + +#ifndef ZLIB_H +#define ZLIB_H + + +#include "zconf.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#define ZLIB_VERSION "1.3.1" +#define ZLIB_VERNUM 0x1310 +#define ZLIB_VER_MAJOR 1 +#define ZLIB_VER_MINOR 3 +#define ZLIB_VER_REVISION 1 +#define ZLIB_VER_SUBREVISION 0 + +/* + The 'zlib' compression library provides in-memory compression and + decompression functions, including integrity checks of the uncompressed data. + This version of the library supports only one compression method (deflation) + but other algorithms will be added later and will have the same stream + interface. + + Compression can be done in a single step if the buffers are large enough, + or can be done by repeated calls of the compression function. In the latter + case, the application must provide more input and/or consume the output + (providing more output space) before each call. + + The compressed data format used by default by the in-memory functions is + the zlib format, which is a zlib wrapper documented in RFC 1950, wrapped + around a deflate stream, which is itself documented in RFC 1951. + + The library also supports reading and writing files in gzip (.gz) format + with an interface similar to that of stdio using the functions that start + with "gz". The gzip format is different from the zlib format. gzip is a + gzip wrapper, documented in RFC 1952, wrapped around a deflate stream. + + This library can optionally read and write gzip and raw deflate streams in + memory as well. + + The zlib format was designed to be compact and fast for use in memory + and on communications channels. The gzip format was designed for single- + file compression on file systems, has a larger header than zlib to maintain + directory information, and uses a different, slower check method than zlib. + + The library does not install any signal handler. The decoder checks + the consistency of the compressed data, so the library should never crash + even in the case of corrupted input. +*/ + +typedef voidpf (*alloc_func)(voidpf opaque, uInt items, uInt size); +typedef void (*free_func)(voidpf opaque, voidpf address); + +struct internal_state; + +typedef struct z_stream_s { + z_const Bytef *next_in; /* next input byte */ + uInt avail_in; /* number of bytes available at next_in */ + uLong total_in; /* total number of input bytes read so far */ + + Bytef *next_out; /* next output byte will go here */ + uInt avail_out; /* remaining free space at next_out */ + uLong total_out; /* total number of bytes output so far */ + + z_const char *msg; /* last error message, NULL if no error */ + struct internal_state FAR *state; /* not visible by applications */ + + alloc_func zalloc; /* used to allocate the internal state */ + free_func zfree; /* used to free the internal state */ + voidpf opaque; /* private data object passed to zalloc and zfree */ + + int data_type; /* best guess about the data type: binary or text + for deflate, or the decoding state for inflate */ + uLong adler; /* Adler-32 or CRC-32 value of the uncompressed data */ + uLong reserved; /* reserved for future use */ +} z_stream; + +typedef z_stream FAR *z_streamp; + +/* + gzip header information passed to and from zlib routines. See RFC 1952 + for more details on the meanings of these fields. +*/ +typedef struct gz_header_s { + int text; /* true if compressed data believed to be text */ + uLong time; /* modification time */ + int xflags; /* extra flags (not used when writing a gzip file) */ + int os; /* operating system */ + Bytef *extra; /* pointer to extra field or Z_NULL if none */ + uInt extra_len; /* extra field length (valid if extra != Z_NULL) */ + uInt extra_max; /* space at extra (only when reading header) */ + Bytef *name; /* pointer to zero-terminated file name or Z_NULL */ + uInt name_max; /* space at name (only when reading header) */ + Bytef *comment; /* pointer to zero-terminated comment or Z_NULL */ + uInt comm_max; /* space at comment (only when reading header) */ + int hcrc; /* true if there was or will be a header crc */ + int done; /* true when done reading gzip header (not used + when writing a gzip file) */ +} gz_header; + +typedef gz_header FAR *gz_headerp; + +/* + The application must update next_in and avail_in when avail_in has dropped + to zero. It must update next_out and avail_out when avail_out has dropped + to zero. The application must initialize zalloc, zfree and opaque before + calling the init function. All other fields are set by the compression + library and must not be updated by the application. + + The opaque value provided by the application will be passed as the first + parameter for calls of zalloc and zfree. This can be useful for custom + memory management. The compression library attaches no meaning to the + opaque value. + + zalloc must return Z_NULL if there is not enough memory for the object. + If zlib is used in a multi-threaded application, zalloc and zfree must be + thread safe. In that case, zlib is thread-safe. When zalloc and zfree are + Z_NULL on entry to the initialization function, they are set to internal + routines that use the standard library functions malloc() and free(). + + On 16-bit systems, the functions zalloc and zfree must be able to allocate + exactly 65536 bytes, but will not be required to allocate more than this if + the symbol MAXSEG_64K is defined (see zconf.h). WARNING: On MSDOS, pointers + returned by zalloc for objects of exactly 65536 bytes *must* have their + offset normalized to zero. The default allocation function provided by this + library ensures this (see zutil.c). To reduce memory requirements and avoid + any allocation of 64K objects, at the expense of compression ratio, compile + the library with -DMAX_WBITS=14 (see zconf.h). + + The fields total_in and total_out can be used for statistics or progress + reports. After compression, total_in holds the total size of the + uncompressed data and may be saved for use by the decompressor (particularly + if the decompressor wants to decompress everything in a single step). +*/ + + /* constants */ + +#define Z_NO_FLUSH 0 +#define Z_PARTIAL_FLUSH 1 +#define Z_SYNC_FLUSH 2 +#define Z_FULL_FLUSH 3 +#define Z_FINISH 4 +#define Z_BLOCK 5 +#define Z_TREES 6 +/* Allowed flush values; see deflate() and inflate() below for details */ + +#define Z_OK 0 +#define Z_STREAM_END 1 +#define Z_NEED_DICT 2 +#define Z_ERRNO (-1) +#define Z_STREAM_ERROR (-2) +#define Z_DATA_ERROR (-3) +#define Z_MEM_ERROR (-4) +#define Z_BUF_ERROR (-5) +#define Z_VERSION_ERROR (-6) +/* Return codes for the compression/decompression functions. Negative values + * are errors, positive values are used for special but normal events. + */ + +#define Z_NO_COMPRESSION 0 +#define Z_BEST_SPEED 1 +#define Z_BEST_COMPRESSION 9 +#define Z_DEFAULT_COMPRESSION (-1) +/* compression levels */ + +#define Z_FILTERED 1 +#define Z_HUFFMAN_ONLY 2 +#define Z_RLE 3 +#define Z_FIXED 4 +#define Z_DEFAULT_STRATEGY 0 +/* compression strategy; see deflateInit2() below for details */ + +#define Z_BINARY 0 +#define Z_TEXT 1 +#define Z_ASCII Z_TEXT /* for compatibility with 1.2.2 and earlier */ +#define Z_UNKNOWN 2 +/* Possible values of the data_type field for deflate() */ + +#define Z_DEFLATED 8 +/* The deflate compression method (the only one supported in this version) */ + +#define Z_NULL 0 /* for initializing zalloc, zfree, opaque */ + +#define zlib_version zlibVersion() +/* for compatibility with versions < 1.0.2 */ + + + /* basic functions */ + +ZEXTERN const char * ZEXPORT zlibVersion(void); +/* The application can compare zlibVersion and ZLIB_VERSION for consistency. + If the first character differs, the library code actually used is not + compatible with the zlib.h header file used by the application. This check + is automatically made by deflateInit and inflateInit. + */ + +/* +ZEXTERN int ZEXPORT deflateInit(z_streamp strm, int level); + + Initializes the internal stream state for compression. The fields + zalloc, zfree and opaque must be initialized before by the caller. If + zalloc and zfree are set to Z_NULL, deflateInit updates them to use default + allocation functions. total_in, total_out, adler, and msg are initialized. + + The compression level must be Z_DEFAULT_COMPRESSION, or between 0 and 9: + 1 gives best speed, 9 gives best compression, 0 gives no compression at all + (the input data is simply copied a block at a time). Z_DEFAULT_COMPRESSION + requests a default compromise between speed and compression (currently + equivalent to level 6). + + deflateInit returns Z_OK if success, Z_MEM_ERROR if there was not enough + memory, Z_STREAM_ERROR if level is not a valid compression level, or + Z_VERSION_ERROR if the zlib library version (zlib_version) is incompatible + with the version assumed by the caller (ZLIB_VERSION). msg is set to null + if there is no error message. deflateInit does not perform any compression: + this will be done by deflate(). +*/ + + +ZEXTERN int ZEXPORT deflate(z_streamp strm, int flush); +/* + deflate compresses as much data as possible, and stops when the input + buffer becomes empty or the output buffer becomes full. It may introduce + some output latency (reading input without producing any output) except when + forced to flush. + + The detailed semantics are as follows. deflate performs one or both of the + following actions: + + - Compress more input starting at next_in and update next_in and avail_in + accordingly. If not all input can be processed (because there is not + enough room in the output buffer), next_in and avail_in are updated and + processing will resume at this point for the next call of deflate(). + + - Generate more output starting at next_out and update next_out and avail_out + accordingly. This action is forced if the parameter flush is non zero. + Forcing flush frequently degrades the compression ratio, so this parameter + should be set only when necessary. Some output may be provided even if + flush is zero. + + Before the call of deflate(), the application should ensure that at least + one of the actions is possible, by providing more input and/or consuming more + output, and updating avail_in or avail_out accordingly; avail_out should + never be zero before the call. The application can consume the compressed + output when it wants, for example when the output buffer is full (avail_out + == 0), or after each call of deflate(). If deflate returns Z_OK and with + zero avail_out, it must be called again after making room in the output + buffer because there might be more output pending. See deflatePending(), + which can be used if desired to determine whether or not there is more output + in that case. + + Normally the parameter flush is set to Z_NO_FLUSH, which allows deflate to + decide how much data to accumulate before producing output, in order to + maximize compression. + + If the parameter flush is set to Z_SYNC_FLUSH, all pending output is + flushed to the output buffer and the output is aligned on a byte boundary, so + that the decompressor can get all input data available so far. (In + particular avail_in is zero after the call if enough output space has been + provided before the call.) Flushing may degrade compression for some + compression algorithms and so it should be used only when necessary. This + completes the current deflate block and follows it with an empty stored block + that is three bits plus filler bits to the next byte, followed by four bytes + (00 00 ff ff). + + If flush is set to Z_PARTIAL_FLUSH, all pending output is flushed to the + output buffer, but the output is not aligned to a byte boundary. All of the + input data so far will be available to the decompressor, as for Z_SYNC_FLUSH. + This completes the current deflate block and follows it with an empty fixed + codes block that is 10 bits long. This assures that enough bytes are output + in order for the decompressor to finish the block before the empty fixed + codes block. + + If flush is set to Z_BLOCK, a deflate block is completed and emitted, as + for Z_SYNC_FLUSH, but the output is not aligned on a byte boundary, and up to + seven bits of the current block are held to be written as the next byte after + the next deflate block is completed. In this case, the decompressor may not + be provided enough bits at this point in order to complete decompression of + the data provided so far to the compressor. It may need to wait for the next + block to be emitted. This is for advanced applications that need to control + the emission of deflate blocks. + + If flush is set to Z_FULL_FLUSH, all output is flushed as with + Z_SYNC_FLUSH, and the compression state is reset so that decompression can + restart from this point if previous compressed data has been damaged or if + random access is desired. Using Z_FULL_FLUSH too often can seriously degrade + compression. + + If deflate returns with avail_out == 0, this function must be called again + with the same value of the flush parameter and more output space (updated + avail_out), until the flush is complete (deflate returns with non-zero + avail_out). In the case of a Z_FULL_FLUSH or Z_SYNC_FLUSH, make sure that + avail_out is greater than six when the flush marker begins, in order to avoid + repeated flush markers upon calling deflate() again when avail_out == 0. + + If the parameter flush is set to Z_FINISH, pending input is processed, + pending output is flushed and deflate returns with Z_STREAM_END if there was + enough output space. If deflate returns with Z_OK or Z_BUF_ERROR, this + function must be called again with Z_FINISH and more output space (updated + avail_out) but no more input data, until it returns with Z_STREAM_END or an + error. After deflate has returned Z_STREAM_END, the only possible operations + on the stream are deflateReset or deflateEnd. + + Z_FINISH can be used in the first deflate call after deflateInit if all the + compression is to be done in a single step. In order to complete in one + call, avail_out must be at least the value returned by deflateBound (see + below). Then deflate is guaranteed to return Z_STREAM_END. If not enough + output space is provided, deflate will not return Z_STREAM_END, and it must + be called again as described above. + + deflate() sets strm->adler to the Adler-32 checksum of all input read + so far (that is, total_in bytes). If a gzip stream is being generated, then + strm->adler will be the CRC-32 checksum of the input read so far. (See + deflateInit2 below.) + + deflate() may update strm->data_type if it can make a good guess about + the input data type (Z_BINARY or Z_TEXT). If in doubt, the data is + considered binary. This field is only for information purposes and does not + affect the compression algorithm in any manner. + + deflate() returns Z_OK if some progress has been made (more input + processed or more output produced), Z_STREAM_END if all input has been + consumed and all output has been produced (only when flush is set to + Z_FINISH), Z_STREAM_ERROR if the stream state was inconsistent (for example + if next_in or next_out was Z_NULL or the state was inadvertently written over + by the application), or Z_BUF_ERROR if no progress is possible (for example + avail_in or avail_out was zero). Note that Z_BUF_ERROR is not fatal, and + deflate() can be called again with more input and more output space to + continue compressing. +*/ + + +ZEXTERN int ZEXPORT deflateEnd(z_streamp strm); +/* + All dynamically allocated data structures for this stream are freed. + This function discards any unprocessed input and does not flush any pending + output. + + deflateEnd returns Z_OK if success, Z_STREAM_ERROR if the + stream state was inconsistent, Z_DATA_ERROR if the stream was freed + prematurely (some input or output was discarded). In the error case, msg + may be set but then points to a static string (which must not be + deallocated). +*/ + + +/* +ZEXTERN int ZEXPORT inflateInit(z_streamp strm); + + Initializes the internal stream state for decompression. The fields + next_in, avail_in, zalloc, zfree and opaque must be initialized before by + the caller. In the current version of inflate, the provided input is not + read or consumed. The allocation of a sliding window will be deferred to + the first call of inflate (if the decompression does not complete on the + first call). If zalloc and zfree are set to Z_NULL, inflateInit updates + them to use default allocation functions. total_in, total_out, adler, and + msg are initialized. + + inflateInit returns Z_OK if success, Z_MEM_ERROR if there was not enough + memory, Z_VERSION_ERROR if the zlib library version is incompatible with the + version assumed by the caller, or Z_STREAM_ERROR if the parameters are + invalid, such as a null pointer to the structure. msg is set to null if + there is no error message. inflateInit does not perform any decompression. + Actual decompression will be done by inflate(). So next_in, and avail_in, + next_out, and avail_out are unused and unchanged. The current + implementation of inflateInit() does not process any header information -- + that is deferred until inflate() is called. +*/ + + +ZEXTERN int ZEXPORT inflate(z_streamp strm, int flush); +/* + inflate decompresses as much data as possible, and stops when the input + buffer becomes empty or the output buffer becomes full. It may introduce + some output latency (reading input without producing any output) except when + forced to flush. + + The detailed semantics are as follows. inflate performs one or both of the + following actions: + + - Decompress more input starting at next_in and update next_in and avail_in + accordingly. If not all input can be processed (because there is not + enough room in the output buffer), then next_in and avail_in are updated + accordingly, and processing will resume at this point for the next call of + inflate(). + + - Generate more output starting at next_out and update next_out and avail_out + accordingly. inflate() provides as much output as possible, until there is + no more input data or no more space in the output buffer (see below about + the flush parameter). + + Before the call of inflate(), the application should ensure that at least + one of the actions is possible, by providing more input and/or consuming more + output, and updating the next_* and avail_* values accordingly. If the + caller of inflate() does not provide both available input and available + output space, it is possible that there will be no progress made. The + application can consume the uncompressed output when it wants, for example + when the output buffer is full (avail_out == 0), or after each call of + inflate(). If inflate returns Z_OK and with zero avail_out, it must be + called again after making room in the output buffer because there might be + more output pending. + + The flush parameter of inflate() can be Z_NO_FLUSH, Z_SYNC_FLUSH, Z_FINISH, + Z_BLOCK, or Z_TREES. Z_SYNC_FLUSH requests that inflate() flush as much + output as possible to the output buffer. Z_BLOCK requests that inflate() + stop if and when it gets to the next deflate block boundary. When decoding + the zlib or gzip format, this will cause inflate() to return immediately + after the header and before the first block. When doing a raw inflate, + inflate() will go ahead and process the first block, and will return when it + gets to the end of that block, or when it runs out of data. + + The Z_BLOCK option assists in appending to or combining deflate streams. + To assist in this, on return inflate() always sets strm->data_type to the + number of unused bits in the last byte taken from strm->next_in, plus 64 if + inflate() is currently decoding the last block in the deflate stream, plus + 128 if inflate() returned immediately after decoding an end-of-block code or + decoding the complete header up to just before the first byte of the deflate + stream. The end-of-block will not be indicated until all of the uncompressed + data from that block has been written to strm->next_out. The number of + unused bits may in general be greater than seven, except when bit 7 of + data_type is set, in which case the number of unused bits will be less than + eight. data_type is set as noted here every time inflate() returns for all + flush options, and so can be used to determine the amount of currently + consumed input in bits. + + The Z_TREES option behaves as Z_BLOCK does, but it also returns when the + end of each deflate block header is reached, before any actual data in that + block is decoded. This allows the caller to determine the length of the + deflate block header for later use in random access within a deflate block. + 256 is added to the value of strm->data_type when inflate() returns + immediately after reaching the end of the deflate block header. + + inflate() should normally be called until it returns Z_STREAM_END or an + error. However if all decompression is to be performed in a single step (a + single call of inflate), the parameter flush should be set to Z_FINISH. In + this case all pending input is processed and all pending output is flushed; + avail_out must be large enough to hold all of the uncompressed data for the + operation to complete. (The size of the uncompressed data may have been + saved by the compressor for this purpose.) The use of Z_FINISH is not + required to perform an inflation in one step. However it may be used to + inform inflate that a faster approach can be used for the single inflate() + call. Z_FINISH also informs inflate to not maintain a sliding window if the + stream completes, which reduces inflate's memory footprint. If the stream + does not complete, either because not all of the stream is provided or not + enough output space is provided, then a sliding window will be allocated and + inflate() can be called again to continue the operation as if Z_NO_FLUSH had + been used. + + In this implementation, inflate() always flushes as much output as + possible to the output buffer, and always uses the faster approach on the + first call. So the effects of the flush parameter in this implementation are + on the return value of inflate() as noted below, when inflate() returns early + when Z_BLOCK or Z_TREES is used, and when inflate() avoids the allocation of + memory for a sliding window when Z_FINISH is used. + + If a preset dictionary is needed after this call (see inflateSetDictionary + below), inflate sets strm->adler to the Adler-32 checksum of the dictionary + chosen by the compressor and returns Z_NEED_DICT; otherwise it sets + strm->adler to the Adler-32 checksum of all output produced so far (that is, + total_out bytes) and returns Z_OK, Z_STREAM_END or an error code as described + below. At the end of the stream, inflate() checks that its computed Adler-32 + checksum is equal to that saved by the compressor and returns Z_STREAM_END + only if the checksum is correct. + + inflate() can decompress and check either zlib-wrapped or gzip-wrapped + deflate data. The header type is detected automatically, if requested when + initializing with inflateInit2(). Any information contained in the gzip + header is not retained unless inflateGetHeader() is used. When processing + gzip-wrapped deflate data, strm->adler32 is set to the CRC-32 of the output + produced so far. The CRC-32 is checked against the gzip trailer, as is the + uncompressed length, modulo 2^32. + + inflate() returns Z_OK if some progress has been made (more input processed + or more output produced), Z_STREAM_END if the end of the compressed data has + been reached and all uncompressed output has been produced, Z_NEED_DICT if a + preset dictionary is needed at this point, Z_DATA_ERROR if the input data was + corrupted (input stream not conforming to the zlib format or incorrect check + value, in which case strm->msg points to a string with a more specific + error), Z_STREAM_ERROR if the stream structure was inconsistent (for example + next_in or next_out was Z_NULL, or the state was inadvertently written over + by the application), Z_MEM_ERROR if there was not enough memory, Z_BUF_ERROR + if no progress was possible or if there was not enough room in the output + buffer when Z_FINISH is used. Note that Z_BUF_ERROR is not fatal, and + inflate() can be called again with more input and more output space to + continue decompressing. If Z_DATA_ERROR is returned, the application may + then call inflateSync() to look for a good compression block if a partial + recovery of the data is to be attempted. +*/ + + +ZEXTERN int ZEXPORT inflateEnd(z_streamp strm); +/* + All dynamically allocated data structures for this stream are freed. + This function discards any unprocessed input and does not flush any pending + output. + + inflateEnd returns Z_OK if success, or Z_STREAM_ERROR if the stream state + was inconsistent. +*/ + + + /* Advanced functions */ + +/* + The following functions are needed only in some special applications. +*/ + +/* +ZEXTERN int ZEXPORT deflateInit2(z_streamp strm, + int level, + int method, + int windowBits, + int memLevel, + int strategy); + + This is another version of deflateInit with more compression options. The + fields zalloc, zfree and opaque must be initialized before by the caller. + + The method parameter is the compression method. It must be Z_DEFLATED in + this version of the library. + + The windowBits parameter is the base two logarithm of the window size + (the size of the history buffer). It should be in the range 8..15 for this + version of the library. Larger values of this parameter result in better + compression at the expense of memory usage. The default value is 15 if + deflateInit is used instead. + + For the current implementation of deflate(), a windowBits value of 8 (a + window size of 256 bytes) is not supported. As a result, a request for 8 + will result in 9 (a 512-byte window). In that case, providing 8 to + inflateInit2() will result in an error when the zlib header with 9 is + checked against the initialization of inflate(). The remedy is to not use 8 + with deflateInit2() with this initialization, or at least in that case use 9 + with inflateInit2(). + + windowBits can also be -8..-15 for raw deflate. In this case, -windowBits + determines the window size. deflate() will then generate raw deflate data + with no zlib header or trailer, and will not compute a check value. + + windowBits can also be greater than 15 for optional gzip encoding. Add + 16 to windowBits to write a simple gzip header and trailer around the + compressed data instead of a zlib wrapper. The gzip header will have no + file name, no extra data, no comment, no modification time (set to zero), no + header crc, and the operating system will be set to the appropriate value, + if the operating system was determined at compile time. If a gzip stream is + being written, strm->adler is a CRC-32 instead of an Adler-32. + + For raw deflate or gzip encoding, a request for a 256-byte window is + rejected as invalid, since only the zlib header provides a means of + transmitting the window size to the decompressor. + + The memLevel parameter specifies how much memory should be allocated + for the internal compression state. memLevel=1 uses minimum memory but is + slow and reduces compression ratio; memLevel=9 uses maximum memory for + optimal speed. The default value is 8. See zconf.h for total memory usage + as a function of windowBits and memLevel. + + The strategy parameter is used to tune the compression algorithm. Use the + value Z_DEFAULT_STRATEGY for normal data, Z_FILTERED for data produced by a + filter (or predictor), Z_HUFFMAN_ONLY to force Huffman encoding only (no + string match), or Z_RLE to limit match distances to one (run-length + encoding). Filtered data consists mostly of small values with a somewhat + random distribution. In this case, the compression algorithm is tuned to + compress them better. The effect of Z_FILTERED is to force more Huffman + coding and less string matching; it is somewhat intermediate between + Z_DEFAULT_STRATEGY and Z_HUFFMAN_ONLY. Z_RLE is designed to be almost as + fast as Z_HUFFMAN_ONLY, but give better compression for PNG image data. The + strategy parameter only affects the compression ratio but not the + correctness of the compressed output even if it is not set appropriately. + Z_FIXED prevents the use of dynamic Huffman codes, allowing for a simpler + decoder for special applications. + + deflateInit2 returns Z_OK if success, Z_MEM_ERROR if there was not enough + memory, Z_STREAM_ERROR if any parameter is invalid (such as an invalid + method), or Z_VERSION_ERROR if the zlib library version (zlib_version) is + incompatible with the version assumed by the caller (ZLIB_VERSION). msg is + set to null if there is no error message. deflateInit2 does not perform any + compression: this will be done by deflate(). +*/ + +ZEXTERN int ZEXPORT deflateSetDictionary(z_streamp strm, + const Bytef *dictionary, + uInt dictLength); +/* + Initializes the compression dictionary from the given byte sequence + without producing any compressed output. When using the zlib format, this + function must be called immediately after deflateInit, deflateInit2 or + deflateReset, and before any call of deflate. When doing raw deflate, this + function must be called either before any call of deflate, or immediately + after the completion of a deflate block, i.e. after all input has been + consumed and all output has been delivered when using any of the flush + options Z_BLOCK, Z_PARTIAL_FLUSH, Z_SYNC_FLUSH, or Z_FULL_FLUSH. The + compressor and decompressor must use exactly the same dictionary (see + inflateSetDictionary). + + The dictionary should consist of strings (byte sequences) that are likely + to be encountered later in the data to be compressed, with the most commonly + used strings preferably put towards the end of the dictionary. Using a + dictionary is most useful when the data to be compressed is short and can be + predicted with good accuracy; the data can then be compressed better than + with the default empty dictionary. + + Depending on the size of the compression data structures selected by + deflateInit or deflateInit2, a part of the dictionary may in effect be + discarded, for example if the dictionary is larger than the window size + provided in deflateInit or deflateInit2. Thus the strings most likely to be + useful should be put at the end of the dictionary, not at the front. In + addition, the current implementation of deflate will use at most the window + size minus 262 bytes of the provided dictionary. + + Upon return of this function, strm->adler is set to the Adler-32 value + of the dictionary; the decompressor may later use this value to determine + which dictionary has been used by the compressor. (The Adler-32 value + applies to the whole dictionary even if only a subset of the dictionary is + actually used by the compressor.) If a raw deflate was requested, then the + Adler-32 value is not computed and strm->adler is not set. + + deflateSetDictionary returns Z_OK if success, or Z_STREAM_ERROR if a + parameter is invalid (e.g. dictionary being Z_NULL) or the stream state is + inconsistent (for example if deflate has already been called for this stream + or if not at a block boundary for raw deflate). deflateSetDictionary does + not perform any compression: this will be done by deflate(). +*/ + +ZEXTERN int ZEXPORT deflateGetDictionary(z_streamp strm, + Bytef *dictionary, + uInt *dictLength); +/* + Returns the sliding dictionary being maintained by deflate. dictLength is + set to the number of bytes in the dictionary, and that many bytes are copied + to dictionary. dictionary must have enough space, where 32768 bytes is + always enough. If deflateGetDictionary() is called with dictionary equal to + Z_NULL, then only the dictionary length is returned, and nothing is copied. + Similarly, if dictLength is Z_NULL, then it is not set. + + deflateGetDictionary() may return a length less than the window size, even + when more than the window size in input has been provided. It may return up + to 258 bytes less in that case, due to how zlib's implementation of deflate + manages the sliding window and lookahead for matches, where matches can be + up to 258 bytes long. If the application needs the last window-size bytes of + input, then that would need to be saved by the application outside of zlib. + + deflateGetDictionary returns Z_OK on success, or Z_STREAM_ERROR if the + stream state is inconsistent. +*/ + +ZEXTERN int ZEXPORT deflateCopy(z_streamp dest, + z_streamp source); +/* + Sets the destination stream as a complete copy of the source stream. + + This function can be useful when several compression strategies will be + tried, for example when there are several ways of pre-processing the input + data with a filter. The streams that will be discarded should then be freed + by calling deflateEnd. Note that deflateCopy duplicates the internal + compression state which can be quite large, so this strategy is slow and can + consume lots of memory. + + deflateCopy returns Z_OK if success, Z_MEM_ERROR if there was not + enough memory, Z_STREAM_ERROR if the source stream state was inconsistent + (such as zalloc being Z_NULL). msg is left unchanged in both source and + destination. +*/ + +ZEXTERN int ZEXPORT deflateReset(z_streamp strm); +/* + This function is equivalent to deflateEnd followed by deflateInit, but + does not free and reallocate the internal compression state. The stream + will leave the compression level and any other attributes that may have been + set unchanged. total_in, total_out, adler, and msg are initialized. + + deflateReset returns Z_OK if success, or Z_STREAM_ERROR if the source + stream state was inconsistent (such as zalloc or state being Z_NULL). +*/ + +ZEXTERN int ZEXPORT deflateParams(z_streamp strm, + int level, + int strategy); +/* + Dynamically update the compression level and compression strategy. The + interpretation of level and strategy is as in deflateInit2(). This can be + used to switch between compression and straight copy of the input data, or + to switch to a different kind of input data requiring a different strategy. + If the compression approach (which is a function of the level) or the + strategy is changed, and if there have been any deflate() calls since the + state was initialized or reset, then the input available so far is + compressed with the old level and strategy using deflate(strm, Z_BLOCK). + There are three approaches for the compression levels 0, 1..3, and 4..9 + respectively. The new level and strategy will take effect at the next call + of deflate(). + + If a deflate(strm, Z_BLOCK) is performed by deflateParams(), and it does + not have enough output space to complete, then the parameter change will not + take effect. In this case, deflateParams() can be called again with the + same parameters and more output space to try again. + + In order to assure a change in the parameters on the first try, the + deflate stream should be flushed using deflate() with Z_BLOCK or other flush + request until strm.avail_out is not zero, before calling deflateParams(). + Then no more input data should be provided before the deflateParams() call. + If this is done, the old level and strategy will be applied to the data + compressed before deflateParams(), and the new level and strategy will be + applied to the data compressed after deflateParams(). + + deflateParams returns Z_OK on success, Z_STREAM_ERROR if the source stream + state was inconsistent or if a parameter was invalid, or Z_BUF_ERROR if + there was not enough output space to complete the compression of the + available input data before a change in the strategy or approach. Note that + in the case of a Z_BUF_ERROR, the parameters are not changed. A return + value of Z_BUF_ERROR is not fatal, in which case deflateParams() can be + retried with more output space. +*/ + +ZEXTERN int ZEXPORT deflateTune(z_streamp strm, + int good_length, + int max_lazy, + int nice_length, + int max_chain); +/* + Fine tune deflate's internal compression parameters. This should only be + used by someone who understands the algorithm used by zlib's deflate for + searching for the best matching string, and even then only by the most + fanatic optimizer trying to squeeze out the last compressed bit for their + specific input data. Read the deflate.c source code for the meaning of the + max_lazy, good_length, nice_length, and max_chain parameters. + + deflateTune() can be called after deflateInit() or deflateInit2(), and + returns Z_OK on success, or Z_STREAM_ERROR for an invalid deflate stream. + */ + +ZEXTERN uLong ZEXPORT deflateBound(z_streamp strm, + uLong sourceLen); +/* + deflateBound() returns an upper bound on the compressed size after + deflation of sourceLen bytes. It must be called after deflateInit() or + deflateInit2(), and after deflateSetHeader(), if used. This would be used + to allocate an output buffer for deflation in a single pass, and so would be + called before deflate(). If that first deflate() call is provided the + sourceLen input bytes, an output buffer allocated to the size returned by + deflateBound(), and the flush value Z_FINISH, then deflate() is guaranteed + to return Z_STREAM_END. Note that it is possible for the compressed size to + be larger than the value returned by deflateBound() if flush options other + than Z_FINISH or Z_NO_FLUSH are used. +*/ + +ZEXTERN int ZEXPORT deflatePending(z_streamp strm, + unsigned *pending, + int *bits); +/* + deflatePending() returns the number of bytes and bits of output that have + been generated, but not yet provided in the available output. The bytes not + provided would be due to the available output space having being consumed. + The number of bits of output not provided are between 0 and 7, where they + await more bits to join them in order to fill out a full byte. If pending + or bits are Z_NULL, then those values are not set. + + deflatePending returns Z_OK if success, or Z_STREAM_ERROR if the source + stream state was inconsistent. + */ + +ZEXTERN int ZEXPORT deflatePrime(z_streamp strm, + int bits, + int value); +/* + deflatePrime() inserts bits in the deflate output stream. The intent + is that this function is used to start off the deflate output with the bits + leftover from a previous deflate stream when appending to it. As such, this + function can only be used for raw deflate, and must be used before the first + deflate() call after a deflateInit2() or deflateReset(). bits must be less + than or equal to 16, and that many of the least significant bits of value + will be inserted in the output. + + deflatePrime returns Z_OK if success, Z_BUF_ERROR if there was not enough + room in the internal buffer to insert the bits, or Z_STREAM_ERROR if the + source stream state was inconsistent. +*/ + +ZEXTERN int ZEXPORT deflateSetHeader(z_streamp strm, + gz_headerp head); +/* + deflateSetHeader() provides gzip header information for when a gzip + stream is requested by deflateInit2(). deflateSetHeader() may be called + after deflateInit2() or deflateReset() and before the first call of + deflate(). The text, time, os, extra field, name, and comment information + in the provided gz_header structure are written to the gzip header (xflag is + ignored -- the extra flags are set according to the compression level). The + caller must assure that, if not Z_NULL, name and comment are terminated with + a zero byte, and that if extra is not Z_NULL, that extra_len bytes are + available there. If hcrc is true, a gzip header crc is included. Note that + the current versions of the command-line version of gzip (up through version + 1.3.x) do not support header crc's, and will report that it is a "multi-part + gzip file" and give up. + + If deflateSetHeader is not used, the default gzip header has text false, + the time set to zero, and os set to the current operating system, with no + extra, name, or comment fields. The gzip header is returned to the default + state by deflateReset(). + + deflateSetHeader returns Z_OK if success, or Z_STREAM_ERROR if the source + stream state was inconsistent. +*/ + +/* +ZEXTERN int ZEXPORT inflateInit2(z_streamp strm, + int windowBits); + + This is another version of inflateInit with an extra parameter. The + fields next_in, avail_in, zalloc, zfree and opaque must be initialized + before by the caller. + + The windowBits parameter is the base two logarithm of the maximum window + size (the size of the history buffer). It should be in the range 8..15 for + this version of the library. The default value is 15 if inflateInit is used + instead. windowBits must be greater than or equal to the windowBits value + provided to deflateInit2() while compressing, or it must be equal to 15 if + deflateInit2() was not used. If a compressed stream with a larger window + size is given as input, inflate() will return with the error code + Z_DATA_ERROR instead of trying to allocate a larger window. + + windowBits can also be zero to request that inflate use the window size in + the zlib header of the compressed stream. + + windowBits can also be -8..-15 for raw inflate. In this case, -windowBits + determines the window size. inflate() will then process raw deflate data, + not looking for a zlib or gzip header, not generating a check value, and not + looking for any check values for comparison at the end of the stream. This + is for use with other formats that use the deflate compressed data format + such as zip. Those formats provide their own check values. If a custom + format is developed using the raw deflate format for compressed data, it is + recommended that a check value such as an Adler-32 or a CRC-32 be applied to + the uncompressed data as is done in the zlib, gzip, and zip formats. For + most applications, the zlib format should be used as is. Note that comments + above on the use in deflateInit2() applies to the magnitude of windowBits. + + windowBits can also be greater than 15 for optional gzip decoding. Add + 32 to windowBits to enable zlib and gzip decoding with automatic header + detection, or add 16 to decode only the gzip format (the zlib format will + return a Z_DATA_ERROR). If a gzip stream is being decoded, strm->adler is a + CRC-32 instead of an Adler-32. Unlike the gunzip utility and gzread() (see + below), inflate() will *not* automatically decode concatenated gzip members. + inflate() will return Z_STREAM_END at the end of the gzip member. The state + would need to be reset to continue decoding a subsequent gzip member. This + *must* be done if there is more data after a gzip member, in order for the + decompression to be compliant with the gzip standard (RFC 1952). + + inflateInit2 returns Z_OK if success, Z_MEM_ERROR if there was not enough + memory, Z_VERSION_ERROR if the zlib library version is incompatible with the + version assumed by the caller, or Z_STREAM_ERROR if the parameters are + invalid, such as a null pointer to the structure. msg is set to null if + there is no error message. inflateInit2 does not perform any decompression + apart from possibly reading the zlib header if present: actual decompression + will be done by inflate(). (So next_in and avail_in may be modified, but + next_out and avail_out are unused and unchanged.) The current implementation + of inflateInit2() does not process any header information -- that is + deferred until inflate() is called. +*/ + +ZEXTERN int ZEXPORT inflateSetDictionary(z_streamp strm, + const Bytef *dictionary, + uInt dictLength); +/* + Initializes the decompression dictionary from the given uncompressed byte + sequence. This function must be called immediately after a call of inflate, + if that call returned Z_NEED_DICT. The dictionary chosen by the compressor + can be determined from the Adler-32 value returned by that call of inflate. + The compressor and decompressor must use exactly the same dictionary (see + deflateSetDictionary). For raw inflate, this function can be called at any + time to set the dictionary. If the provided dictionary is smaller than the + window and there is already data in the window, then the provided dictionary + will amend what's there. The application must insure that the dictionary + that was used for compression is provided. + + inflateSetDictionary returns Z_OK if success, Z_STREAM_ERROR if a + parameter is invalid (e.g. dictionary being Z_NULL) or the stream state is + inconsistent, Z_DATA_ERROR if the given dictionary doesn't match the + expected one (incorrect Adler-32 value). inflateSetDictionary does not + perform any decompression: this will be done by subsequent calls of + inflate(). +*/ + +ZEXTERN int ZEXPORT inflateGetDictionary(z_streamp strm, + Bytef *dictionary, + uInt *dictLength); +/* + Returns the sliding dictionary being maintained by inflate. dictLength is + set to the number of bytes in the dictionary, and that many bytes are copied + to dictionary. dictionary must have enough space, where 32768 bytes is + always enough. If inflateGetDictionary() is called with dictionary equal to + Z_NULL, then only the dictionary length is returned, and nothing is copied. + Similarly, if dictLength is Z_NULL, then it is not set. + + inflateGetDictionary returns Z_OK on success, or Z_STREAM_ERROR if the + stream state is inconsistent. +*/ + +ZEXTERN int ZEXPORT inflateSync(z_streamp strm); +/* + Skips invalid compressed data until a possible full flush point (see above + for the description of deflate with Z_FULL_FLUSH) can be found, or until all + available input is skipped. No output is provided. + + inflateSync searches for a 00 00 FF FF pattern in the compressed data. + All full flush points have this pattern, but not all occurrences of this + pattern are full flush points. + + inflateSync returns Z_OK if a possible full flush point has been found, + Z_BUF_ERROR if no more input was provided, Z_DATA_ERROR if no flush point + has been found, or Z_STREAM_ERROR if the stream structure was inconsistent. + In the success case, the application may save the current value of total_in + which indicates where valid compressed data was found. In the error case, + the application may repeatedly call inflateSync, providing more input each + time, until success or end of the input data. +*/ + +ZEXTERN int ZEXPORT inflateCopy(z_streamp dest, + z_streamp source); +/* + Sets the destination stream as a complete copy of the source stream. + + This function can be useful when randomly accessing a large stream. The + first pass through the stream can periodically record the inflate state, + allowing restarting inflate at those points when randomly accessing the + stream. + + inflateCopy returns Z_OK if success, Z_MEM_ERROR if there was not + enough memory, Z_STREAM_ERROR if the source stream state was inconsistent + (such as zalloc being Z_NULL). msg is left unchanged in both source and + destination. +*/ + +ZEXTERN int ZEXPORT inflateReset(z_streamp strm); +/* + This function is equivalent to inflateEnd followed by inflateInit, + but does not free and reallocate the internal decompression state. The + stream will keep attributes that may have been set by inflateInit2. + total_in, total_out, adler, and msg are initialized. + + inflateReset returns Z_OK if success, or Z_STREAM_ERROR if the source + stream state was inconsistent (such as zalloc or state being Z_NULL). +*/ + +ZEXTERN int ZEXPORT inflateReset2(z_streamp strm, + int windowBits); +/* + This function is the same as inflateReset, but it also permits changing + the wrap and window size requests. The windowBits parameter is interpreted + the same as it is for inflateInit2. If the window size is changed, then the + memory allocated for the window is freed, and the window will be reallocated + by inflate() if needed. + + inflateReset2 returns Z_OK if success, or Z_STREAM_ERROR if the source + stream state was inconsistent (such as zalloc or state being Z_NULL), or if + the windowBits parameter is invalid. +*/ + +ZEXTERN int ZEXPORT inflatePrime(z_streamp strm, + int bits, + int value); +/* + This function inserts bits in the inflate input stream. The intent is + that this function is used to start inflating at a bit position in the + middle of a byte. The provided bits will be used before any bytes are used + from next_in. This function should only be used with raw inflate, and + should be used before the first inflate() call after inflateInit2() or + inflateReset(). bits must be less than or equal to 16, and that many of the + least significant bits of value will be inserted in the input. + + If bits is negative, then the input stream bit buffer is emptied. Then + inflatePrime() can be called again to put bits in the buffer. This is used + to clear out bits leftover after feeding inflate a block description prior + to feeding inflate codes. + + inflatePrime returns Z_OK if success, or Z_STREAM_ERROR if the source + stream state was inconsistent. +*/ + +ZEXTERN long ZEXPORT inflateMark(z_streamp strm); +/* + This function returns two values, one in the lower 16 bits of the return + value, and the other in the remaining upper bits, obtained by shifting the + return value down 16 bits. If the upper value is -1 and the lower value is + zero, then inflate() is currently decoding information outside of a block. + If the upper value is -1 and the lower value is non-zero, then inflate is in + the middle of a stored block, with the lower value equaling the number of + bytes from the input remaining to copy. If the upper value is not -1, then + it is the number of bits back from the current bit position in the input of + the code (literal or length/distance pair) currently being processed. In + that case the lower value is the number of bytes already emitted for that + code. + + A code is being processed if inflate is waiting for more input to complete + decoding of the code, or if it has completed decoding but is waiting for + more output space to write the literal or match data. + + inflateMark() is used to mark locations in the input data for random + access, which may be at bit positions, and to note those cases where the + output of a code may span boundaries of random access blocks. The current + location in the input stream can be determined from avail_in and data_type + as noted in the description for the Z_BLOCK flush parameter for inflate. + + inflateMark returns the value noted above, or -65536 if the provided + source stream state was inconsistent. +*/ + +ZEXTERN int ZEXPORT inflateGetHeader(z_streamp strm, + gz_headerp head); +/* + inflateGetHeader() requests that gzip header information be stored in the + provided gz_header structure. inflateGetHeader() may be called after + inflateInit2() or inflateReset(), and before the first call of inflate(). + As inflate() processes the gzip stream, head->done is zero until the header + is completed, at which time head->done is set to one. If a zlib stream is + being decoded, then head->done is set to -1 to indicate that there will be + no gzip header information forthcoming. Note that Z_BLOCK or Z_TREES can be + used to force inflate() to return immediately after header processing is + complete and before any actual data is decompressed. + + The text, time, xflags, and os fields are filled in with the gzip header + contents. hcrc is set to true if there is a header CRC. (The header CRC + was valid if done is set to one.) If extra is not Z_NULL, then extra_max + contains the maximum number of bytes to write to extra. Once done is true, + extra_len contains the actual extra field length, and extra contains the + extra field, or that field truncated if extra_max is less than extra_len. + If name is not Z_NULL, then up to name_max characters are written there, + terminated with a zero unless the length is greater than name_max. If + comment is not Z_NULL, then up to comm_max characters are written there, + terminated with a zero unless the length is greater than comm_max. When any + of extra, name, or comment are not Z_NULL and the respective field is not + present in the header, then that field is set to Z_NULL to signal its + absence. This allows the use of deflateSetHeader() with the returned + structure to duplicate the header. However if those fields are set to + allocated memory, then the application will need to save those pointers + elsewhere so that they can be eventually freed. + + If inflateGetHeader is not used, then the header information is simply + discarded. The header is always checked for validity, including the header + CRC if present. inflateReset() will reset the process to discard the header + information. The application would need to call inflateGetHeader() again to + retrieve the header from the next gzip stream. + + inflateGetHeader returns Z_OK if success, or Z_STREAM_ERROR if the source + stream state was inconsistent. +*/ + +/* +ZEXTERN int ZEXPORT inflateBackInit(z_streamp strm, int windowBits, + unsigned char FAR *window); + + Initialize the internal stream state for decompression using inflateBack() + calls. The fields zalloc, zfree and opaque in strm must be initialized + before the call. If zalloc and zfree are Z_NULL, then the default library- + derived memory allocation routines are used. windowBits is the base two + logarithm of the window size, in the range 8..15. window is a caller + supplied buffer of that size. Except for special applications where it is + assured that deflate was used with small window sizes, windowBits must be 15 + and a 32K byte window must be supplied to be able to decompress general + deflate streams. + + See inflateBack() for the usage of these routines. + + inflateBackInit will return Z_OK on success, Z_STREAM_ERROR if any of + the parameters are invalid, Z_MEM_ERROR if the internal state could not be + allocated, or Z_VERSION_ERROR if the version of the library does not match + the version of the header file. +*/ + +typedef unsigned (*in_func)(void FAR *, + z_const unsigned char FAR * FAR *); +typedef int (*out_func)(void FAR *, unsigned char FAR *, unsigned); + +ZEXTERN int ZEXPORT inflateBack(z_streamp strm, + in_func in, void FAR *in_desc, + out_func out, void FAR *out_desc); +/* + inflateBack() does a raw inflate with a single call using a call-back + interface for input and output. This is potentially more efficient than + inflate() for file i/o applications, in that it avoids copying between the + output and the sliding window by simply making the window itself the output + buffer. inflate() can be faster on modern CPUs when used with large + buffers. inflateBack() trusts the application to not change the output + buffer passed by the output function, at least until inflateBack() returns. + + inflateBackInit() must be called first to allocate the internal state + and to initialize the state with the user-provided window buffer. + inflateBack() may then be used multiple times to inflate a complete, raw + deflate stream with each call. inflateBackEnd() is then called to free the + allocated state. + + A raw deflate stream is one with no zlib or gzip header or trailer. + This routine would normally be used in a utility that reads zip or gzip + files and writes out uncompressed files. The utility would decode the + header and process the trailer on its own, hence this routine expects only + the raw deflate stream to decompress. This is different from the default + behavior of inflate(), which expects a zlib header and trailer around the + deflate stream. + + inflateBack() uses two subroutines supplied by the caller that are then + called by inflateBack() for input and output. inflateBack() calls those + routines until it reads a complete deflate stream and writes out all of the + uncompressed data, or until it encounters an error. The function's + parameters and return types are defined above in the in_func and out_func + typedefs. inflateBack() will call in(in_desc, &buf) which should return the + number of bytes of provided input, and a pointer to that input in buf. If + there is no input available, in() must return zero -- buf is ignored in that + case -- and inflateBack() will return a buffer error. inflateBack() will + call out(out_desc, buf, len) to write the uncompressed data buf[0..len-1]. + out() should return zero on success, or non-zero on failure. If out() + returns non-zero, inflateBack() will return with an error. Neither in() nor + out() are permitted to change the contents of the window provided to + inflateBackInit(), which is also the buffer that out() uses to write from. + The length written by out() will be at most the window size. Any non-zero + amount of input may be provided by in(). + + For convenience, inflateBack() can be provided input on the first call by + setting strm->next_in and strm->avail_in. If that input is exhausted, then + in() will be called. Therefore strm->next_in must be initialized before + calling inflateBack(). If strm->next_in is Z_NULL, then in() will be called + immediately for input. If strm->next_in is not Z_NULL, then strm->avail_in + must also be initialized, and then if strm->avail_in is not zero, input will + initially be taken from strm->next_in[0 .. strm->avail_in - 1]. + + The in_desc and out_desc parameters of inflateBack() is passed as the + first parameter of in() and out() respectively when they are called. These + descriptors can be optionally used to pass any information that the caller- + supplied in() and out() functions need to do their job. + + On return, inflateBack() will set strm->next_in and strm->avail_in to + pass back any unused input that was provided by the last in() call. The + return values of inflateBack() can be Z_STREAM_END on success, Z_BUF_ERROR + if in() or out() returned an error, Z_DATA_ERROR if there was a format error + in the deflate stream (in which case strm->msg is set to indicate the nature + of the error), or Z_STREAM_ERROR if the stream was not properly initialized. + In the case of Z_BUF_ERROR, an input or output error can be distinguished + using strm->next_in which will be Z_NULL only if in() returned an error. If + strm->next_in is not Z_NULL, then the Z_BUF_ERROR was due to out() returning + non-zero. (in() will always be called before out(), so strm->next_in is + assured to be defined if out() returns non-zero.) Note that inflateBack() + cannot return Z_OK. +*/ + +ZEXTERN int ZEXPORT inflateBackEnd(z_streamp strm); +/* + All memory allocated by inflateBackInit() is freed. + + inflateBackEnd() returns Z_OK on success, or Z_STREAM_ERROR if the stream + state was inconsistent. +*/ + +ZEXTERN uLong ZEXPORT zlibCompileFlags(void); +/* Return flags indicating compile-time options. + + Type sizes, two bits each, 00 = 16 bits, 01 = 32, 10 = 64, 11 = other: + 1.0: size of uInt + 3.2: size of uLong + 5.4: size of voidpf (pointer) + 7.6: size of z_off_t + + Compiler, assembler, and debug options: + 8: ZLIB_DEBUG + 9: ASMV or ASMINF -- use ASM code + 10: ZLIB_WINAPI -- exported functions use the WINAPI calling convention + 11: 0 (reserved) + + One-time table building (smaller code, but not thread-safe if true): + 12: BUILDFIXED -- build static block decoding tables when needed + 13: DYNAMIC_CRC_TABLE -- build CRC calculation tables when needed + 14,15: 0 (reserved) + + Library content (indicates missing functionality): + 16: NO_GZCOMPRESS -- gz* functions cannot compress (to avoid linking + deflate code when not needed) + 17: NO_GZIP -- deflate can't write gzip streams, and inflate can't detect + and decode gzip streams (to avoid linking crc code) + 18-19: 0 (reserved) + + Operation variations (changes in library functionality): + 20: PKZIP_BUG_WORKAROUND -- slightly more permissive inflate + 21: FASTEST -- deflate algorithm with only one, lowest compression level + 22,23: 0 (reserved) + + The sprintf variant used by gzprintf (zero is best): + 24: 0 = vs*, 1 = s* -- 1 means limited to 20 arguments after the format + 25: 0 = *nprintf, 1 = *printf -- 1 means gzprintf() not secure! + 26: 0 = returns value, 1 = void -- 1 means inferred string length returned + + Remainder: + 27-31: 0 (reserved) + */ + +#ifndef Z_SOLO + + /* utility functions */ + +/* + The following utility functions are implemented on top of the basic + stream-oriented functions. To simplify the interface, some default options + are assumed (compression level and memory usage, standard memory allocation + functions). The source code of these utility functions can be modified if + you need special options. +*/ + +ZEXTERN int ZEXPORT compress(Bytef *dest, uLongf *destLen, + const Bytef *source, uLong sourceLen); +/* + Compresses the source buffer into the destination buffer. sourceLen is + the byte length of the source buffer. Upon entry, destLen is the total size + of the destination buffer, which must be at least the value returned by + compressBound(sourceLen). Upon exit, destLen is the actual size of the + compressed data. compress() is equivalent to compress2() with a level + parameter of Z_DEFAULT_COMPRESSION. + + compress returns Z_OK if success, Z_MEM_ERROR if there was not + enough memory, Z_BUF_ERROR if there was not enough room in the output + buffer. +*/ + +ZEXTERN int ZEXPORT compress2(Bytef *dest, uLongf *destLen, + const Bytef *source, uLong sourceLen, + int level); +/* + Compresses the source buffer into the destination buffer. The level + parameter has the same meaning as in deflateInit. sourceLen is the byte + length of the source buffer. Upon entry, destLen is the total size of the + destination buffer, which must be at least the value returned by + compressBound(sourceLen). Upon exit, destLen is the actual size of the + compressed data. + + compress2 returns Z_OK if success, Z_MEM_ERROR if there was not enough + memory, Z_BUF_ERROR if there was not enough room in the output buffer, + Z_STREAM_ERROR if the level parameter is invalid. +*/ + +ZEXTERN uLong ZEXPORT compressBound(uLong sourceLen); +/* + compressBound() returns an upper bound on the compressed size after + compress() or compress2() on sourceLen bytes. It would be used before a + compress() or compress2() call to allocate the destination buffer. +*/ + +ZEXTERN int ZEXPORT uncompress(Bytef *dest, uLongf *destLen, + const Bytef *source, uLong sourceLen); +/* + Decompresses the source buffer into the destination buffer. sourceLen is + the byte length of the source buffer. Upon entry, destLen is the total size + of the destination buffer, which must be large enough to hold the entire + uncompressed data. (The size of the uncompressed data must have been saved + previously by the compressor and transmitted to the decompressor by some + mechanism outside the scope of this compression library.) Upon exit, destLen + is the actual size of the uncompressed data. + + uncompress returns Z_OK if success, Z_MEM_ERROR if there was not + enough memory, Z_BUF_ERROR if there was not enough room in the output + buffer, or Z_DATA_ERROR if the input data was corrupted or incomplete. In + the case where there is not enough room, uncompress() will fill the output + buffer with the uncompressed data up to that point. +*/ + +ZEXTERN int ZEXPORT uncompress2(Bytef *dest, uLongf *destLen, + const Bytef *source, uLong *sourceLen); +/* + Same as uncompress, except that sourceLen is a pointer, where the + length of the source is *sourceLen. On return, *sourceLen is the number of + source bytes consumed. +*/ + + /* gzip file access functions */ + +/* + This library supports reading and writing files in gzip (.gz) format with + an interface similar to that of stdio, using the functions that start with + "gz". The gzip format is different from the zlib format. gzip is a gzip + wrapper, documented in RFC 1952, wrapped around a deflate stream. +*/ + +typedef struct gzFile_s *gzFile; /* semi-opaque gzip file descriptor */ + +/* +ZEXTERN gzFile ZEXPORT gzopen(const char *path, const char *mode); + + Open the gzip (.gz) file at path for reading and decompressing, or + compressing and writing. The mode parameter is as in fopen ("rb" or "wb") + but can also include a compression level ("wb9") or a strategy: 'f' for + filtered data as in "wb6f", 'h' for Huffman-only compression as in "wb1h", + 'R' for run-length encoding as in "wb1R", or 'F' for fixed code compression + as in "wb9F". (See the description of deflateInit2 for more information + about the strategy parameter.) 'T' will request transparent writing or + appending with no compression and not using the gzip format. + + "a" can be used instead of "w" to request that the gzip stream that will + be written be appended to the file. "+" will result in an error, since + reading and writing to the same gzip file is not supported. The addition of + "x" when writing will create the file exclusively, which fails if the file + already exists. On systems that support it, the addition of "e" when + reading or writing will set the flag to close the file on an execve() call. + + These functions, as well as gzip, will read and decode a sequence of gzip + streams in a file. The append function of gzopen() can be used to create + such a file. (Also see gzflush() for another way to do this.) When + appending, gzopen does not test whether the file begins with a gzip stream, + nor does it look for the end of the gzip streams to begin appending. gzopen + will simply append a gzip stream to the existing file. + + gzopen can be used to read a file which is not in gzip format; in this + case gzread will directly read from the file without decompression. When + reading, this will be detected automatically by looking for the magic two- + byte gzip header. + + gzopen returns NULL if the file could not be opened, if there was + insufficient memory to allocate the gzFile state, or if an invalid mode was + specified (an 'r', 'w', or 'a' was not provided, or '+' was provided). + errno can be checked to determine if the reason gzopen failed was that the + file could not be opened. +*/ + +ZEXTERN gzFile ZEXPORT gzdopen(int fd, const char *mode); +/* + Associate a gzFile with the file descriptor fd. File descriptors are + obtained from calls like open, dup, creat, pipe or fileno (if the file has + been previously opened with fopen). The mode parameter is as in gzopen. + + The next call of gzclose on the returned gzFile will also close the file + descriptor fd, just like fclose(fdopen(fd, mode)) closes the file descriptor + fd. If you want to keep fd open, use fd = dup(fd_keep); gz = gzdopen(fd, + mode);. The duplicated descriptor should be saved to avoid a leak, since + gzdopen does not close fd if it fails. If you are using fileno() to get the + file descriptor from a FILE *, then you will have to use dup() to avoid + double-close()ing the file descriptor. Both gzclose() and fclose() will + close the associated file descriptor, so they need to have different file + descriptors. + + gzdopen returns NULL if there was insufficient memory to allocate the + gzFile state, if an invalid mode was specified (an 'r', 'w', or 'a' was not + provided, or '+' was provided), or if fd is -1. The file descriptor is not + used until the next gz* read, write, seek, or close operation, so gzdopen + will not detect if fd is invalid (unless fd is -1). +*/ + +ZEXTERN int ZEXPORT gzbuffer(gzFile file, unsigned size); +/* + Set the internal buffer size used by this library's functions for file to + size. The default buffer size is 8192 bytes. This function must be called + after gzopen() or gzdopen(), and before any other calls that read or write + the file. The buffer memory allocation is always deferred to the first read + or write. Three times that size in buffer space is allocated. A larger + buffer size of, for example, 64K or 128K bytes will noticeably increase the + speed of decompression (reading). + + The new buffer size also affects the maximum length for gzprintf(). + + gzbuffer() returns 0 on success, or -1 on failure, such as being called + too late. +*/ + +ZEXTERN int ZEXPORT gzsetparams(gzFile file, int level, int strategy); +/* + Dynamically update the compression level and strategy for file. See the + description of deflateInit2 for the meaning of these parameters. Previously + provided data is flushed before applying the parameter changes. + + gzsetparams returns Z_OK if success, Z_STREAM_ERROR if the file was not + opened for writing, Z_ERRNO if there is an error writing the flushed data, + or Z_MEM_ERROR if there is a memory allocation error. +*/ + +ZEXTERN int ZEXPORT gzread(gzFile file, voidp buf, unsigned len); +/* + Read and decompress up to len uncompressed bytes from file into buf. If + the input file is not in gzip format, gzread copies the given number of + bytes into the buffer directly from the file. + + After reaching the end of a gzip stream in the input, gzread will continue + to read, looking for another gzip stream. Any number of gzip streams may be + concatenated in the input file, and will all be decompressed by gzread(). + If something other than a gzip stream is encountered after a gzip stream, + that remaining trailing garbage is ignored (and no error is returned). + + gzread can be used to read a gzip file that is being concurrently written. + Upon reaching the end of the input, gzread will return with the available + data. If the error code returned by gzerror is Z_OK or Z_BUF_ERROR, then + gzclearerr can be used to clear the end of file indicator in order to permit + gzread to be tried again. Z_OK indicates that a gzip stream was completed + on the last gzread. Z_BUF_ERROR indicates that the input file ended in the + middle of a gzip stream. Note that gzread does not return -1 in the event + of an incomplete gzip stream. This error is deferred until gzclose(), which + will return Z_BUF_ERROR if the last gzread ended in the middle of a gzip + stream. Alternatively, gzerror can be used before gzclose to detect this + case. + + gzread returns the number of uncompressed bytes actually read, less than + len for end of file, or -1 for error. If len is too large to fit in an int, + then nothing is read, -1 is returned, and the error state is set to + Z_STREAM_ERROR. +*/ + +ZEXTERN z_size_t ZEXPORT gzfread(voidp buf, z_size_t size, z_size_t nitems, + gzFile file); +/* + Read and decompress up to nitems items of size size from file into buf, + otherwise operating as gzread() does. This duplicates the interface of + stdio's fread(), with size_t request and return types. If the library + defines size_t, then z_size_t is identical to size_t. If not, then z_size_t + is an unsigned integer type that can contain a pointer. + + gzfread() returns the number of full items read of size size, or zero if + the end of the file was reached and a full item could not be read, or if + there was an error. gzerror() must be consulted if zero is returned in + order to determine if there was an error. If the multiplication of size and + nitems overflows, i.e. the product does not fit in a z_size_t, then nothing + is read, zero is returned, and the error state is set to Z_STREAM_ERROR. + + In the event that the end of file is reached and only a partial item is + available at the end, i.e. the remaining uncompressed data length is not a + multiple of size, then the final partial item is nevertheless read into buf + and the end-of-file flag is set. The length of the partial item read is not + provided, but could be inferred from the result of gztell(). This behavior + is the same as the behavior of fread() implementations in common libraries, + but it prevents the direct use of gzfread() to read a concurrently written + file, resetting and retrying on end-of-file, when size is not 1. +*/ + +ZEXTERN int ZEXPORT gzwrite(gzFile file, voidpc buf, unsigned len); +/* + Compress and write the len uncompressed bytes at buf to file. gzwrite + returns the number of uncompressed bytes written or 0 in case of error. +*/ + +ZEXTERN z_size_t ZEXPORT gzfwrite(voidpc buf, z_size_t size, + z_size_t nitems, gzFile file); +/* + Compress and write nitems items of size size from buf to file, duplicating + the interface of stdio's fwrite(), with size_t request and return types. If + the library defines size_t, then z_size_t is identical to size_t. If not, + then z_size_t is an unsigned integer type that can contain a pointer. + + gzfwrite() returns the number of full items written of size size, or zero + if there was an error. If the multiplication of size and nitems overflows, + i.e. the product does not fit in a z_size_t, then nothing is written, zero + is returned, and the error state is set to Z_STREAM_ERROR. +*/ + +ZEXTERN int ZEXPORTVA gzprintf(gzFile file, const char *format, ...); +/* + Convert, format, compress, and write the arguments (...) to file under + control of the string format, as in fprintf. gzprintf returns the number of + uncompressed bytes actually written, or a negative zlib error code in case + of error. The number of uncompressed bytes written is limited to 8191, or + one less than the buffer size given to gzbuffer(). The caller should assure + that this limit is not exceeded. If it is exceeded, then gzprintf() will + return an error (0) with nothing written. In this case, there may also be a + buffer overflow with unpredictable consequences, which is possible only if + zlib was compiled with the insecure functions sprintf() or vsprintf(), + because the secure snprintf() or vsnprintf() functions were not available. + This can be determined using zlibCompileFlags(). +*/ + +ZEXTERN int ZEXPORT gzputs(gzFile file, const char *s); +/* + Compress and write the given null-terminated string s to file, excluding + the terminating null character. + + gzputs returns the number of characters written, or -1 in case of error. +*/ + +ZEXTERN char * ZEXPORT gzgets(gzFile file, char *buf, int len); +/* + Read and decompress bytes from file into buf, until len-1 characters are + read, or until a newline character is read and transferred to buf, or an + end-of-file condition is encountered. If any characters are read or if len + is one, the string is terminated with a null character. If no characters + are read due to an end-of-file or len is less than one, then the buffer is + left untouched. + + gzgets returns buf which is a null-terminated string, or it returns NULL + for end-of-file or in case of error. If there was an error, the contents at + buf are indeterminate. +*/ + +ZEXTERN int ZEXPORT gzputc(gzFile file, int c); +/* + Compress and write c, converted to an unsigned char, into file. gzputc + returns the value that was written, or -1 in case of error. +*/ + +ZEXTERN int ZEXPORT gzgetc(gzFile file); +/* + Read and decompress one byte from file. gzgetc returns this byte or -1 + in case of end of file or error. This is implemented as a macro for speed. + As such, it does not do all of the checking the other functions do. I.e. + it does not check to see if file is NULL, nor whether the structure file + points to has been clobbered or not. +*/ + +ZEXTERN int ZEXPORT gzungetc(int c, gzFile file); +/* + Push c back onto the stream for file to be read as the first character on + the next read. At least one character of push-back is always allowed. + gzungetc() returns the character pushed, or -1 on failure. gzungetc() will + fail if c is -1, and may fail if a character has been pushed but not read + yet. If gzungetc is used immediately after gzopen or gzdopen, at least the + output buffer size of pushed characters is allowed. (See gzbuffer above.) + The pushed character will be discarded if the stream is repositioned with + gzseek() or gzrewind(). +*/ + +ZEXTERN int ZEXPORT gzflush(gzFile file, int flush); +/* + Flush all pending output to file. The parameter flush is as in the + deflate() function. The return value is the zlib error number (see function + gzerror below). gzflush is only permitted when writing. + + If the flush parameter is Z_FINISH, the remaining data is written and the + gzip stream is completed in the output. If gzwrite() is called again, a new + gzip stream will be started in the output. gzread() is able to read such + concatenated gzip streams. + + gzflush should be called only when strictly necessary because it will + degrade compression if called too often. +*/ + +/* +ZEXTERN z_off_t ZEXPORT gzseek(gzFile file, + z_off_t offset, int whence); + + Set the starting position to offset relative to whence for the next gzread + or gzwrite on file. The offset represents a number of bytes in the + uncompressed data stream. The whence parameter is defined as in lseek(2); + the value SEEK_END is not supported. + + If the file is opened for reading, this function is emulated but can be + extremely slow. If the file is opened for writing, only forward seeks are + supported; gzseek then compresses a sequence of zeroes up to the new + starting position. + + gzseek returns the resulting offset location as measured in bytes from + the beginning of the uncompressed stream, or -1 in case of error, in + particular if the file is opened for writing and the new starting position + would be before the current position. +*/ + +ZEXTERN int ZEXPORT gzrewind(gzFile file); +/* + Rewind file. This function is supported only for reading. + + gzrewind(file) is equivalent to (int)gzseek(file, 0L, SEEK_SET). +*/ + +/* +ZEXTERN z_off_t ZEXPORT gztell(gzFile file); + + Return the starting position for the next gzread or gzwrite on file. + This position represents a number of bytes in the uncompressed data stream, + and is zero when starting, even if appending or reading a gzip stream from + the middle of a file using gzdopen(). + + gztell(file) is equivalent to gzseek(file, 0L, SEEK_CUR) +*/ + +/* +ZEXTERN z_off_t ZEXPORT gzoffset(gzFile file); + + Return the current compressed (actual) read or write offset of file. This + offset includes the count of bytes that precede the gzip stream, for example + when appending or when using gzdopen() for reading. When reading, the + offset does not include as yet unused buffered input. This information can + be used for a progress indicator. On error, gzoffset() returns -1. +*/ + +ZEXTERN int ZEXPORT gzeof(gzFile file); +/* + Return true (1) if the end-of-file indicator for file has been set while + reading, false (0) otherwise. Note that the end-of-file indicator is set + only if the read tried to go past the end of the input, but came up short. + Therefore, just like feof(), gzeof() may return false even if there is no + more data to read, in the event that the last read request was for the exact + number of bytes remaining in the input file. This will happen if the input + file size is an exact multiple of the buffer size. + + If gzeof() returns true, then the read functions will return no more data, + unless the end-of-file indicator is reset by gzclearerr() and the input file + has grown since the previous end of file was detected. +*/ + +ZEXTERN int ZEXPORT gzdirect(gzFile file); +/* + Return true (1) if file is being copied directly while reading, or false + (0) if file is a gzip stream being decompressed. + + If the input file is empty, gzdirect() will return true, since the input + does not contain a gzip stream. + + If gzdirect() is used immediately after gzopen() or gzdopen() it will + cause buffers to be allocated to allow reading the file to determine if it + is a gzip file. Therefore if gzbuffer() is used, it should be called before + gzdirect(). + + When writing, gzdirect() returns true (1) if transparent writing was + requested ("wT" for the gzopen() mode), or false (0) otherwise. (Note: + gzdirect() is not needed when writing. Transparent writing must be + explicitly requested, so the application already knows the answer. When + linking statically, using gzdirect() will include all of the zlib code for + gzip file reading and decompression, which may not be desired.) +*/ + +ZEXTERN int ZEXPORT gzclose(gzFile file); +/* + Flush all pending output for file, if necessary, close file and + deallocate the (de)compression state. Note that once file is closed, you + cannot call gzerror with file, since its structures have been deallocated. + gzclose must not be called more than once on the same file, just as free + must not be called more than once on the same allocation. + + gzclose will return Z_STREAM_ERROR if file is not valid, Z_ERRNO on a + file operation error, Z_MEM_ERROR if out of memory, Z_BUF_ERROR if the + last read ended in the middle of a gzip stream, or Z_OK on success. +*/ + +ZEXTERN int ZEXPORT gzclose_r(gzFile file); +ZEXTERN int ZEXPORT gzclose_w(gzFile file); +/* + Same as gzclose(), but gzclose_r() is only for use when reading, and + gzclose_w() is only for use when writing or appending. The advantage to + using these instead of gzclose() is that they avoid linking in zlib + compression or decompression code that is not used when only reading or only + writing respectively. If gzclose() is used, then both compression and + decompression code will be included the application when linking to a static + zlib library. +*/ + +ZEXTERN const char * ZEXPORT gzerror(gzFile file, int *errnum); +/* + Return the error message for the last error which occurred on file. + errnum is set to zlib error number. If an error occurred in the file system + and not in the compression library, errnum is set to Z_ERRNO and the + application may consult errno to get the exact error code. + + The application must not modify the returned string. Future calls to + this function may invalidate the previously returned string. If file is + closed, then the string previously returned by gzerror will no longer be + available. + + gzerror() should be used to distinguish errors from end-of-file for those + functions above that do not distinguish those cases in their return values. +*/ + +ZEXTERN void ZEXPORT gzclearerr(gzFile file); +/* + Clear the error and end-of-file flags for file. This is analogous to the + clearerr() function in stdio. This is useful for continuing to read a gzip + file that is being written concurrently. +*/ + +#endif /* !Z_SOLO */ + + /* checksum functions */ + +/* + These functions are not related to compression but are exported + anyway because they might be useful in applications using the compression + library. +*/ + +ZEXTERN uLong ZEXPORT adler32(uLong adler, const Bytef *buf, uInt len); +/* + Update a running Adler-32 checksum with the bytes buf[0..len-1] and + return the updated checksum. An Adler-32 value is in the range of a 32-bit + unsigned integer. If buf is Z_NULL, this function returns the required + initial value for the checksum. + + An Adler-32 checksum is almost as reliable as a CRC-32 but can be computed + much faster. + + Usage example: + + uLong adler = adler32(0L, Z_NULL, 0); + + while (read_buffer(buffer, length) != EOF) { + adler = adler32(adler, buffer, length); + } + if (adler != original_adler) error(); +*/ + +ZEXTERN uLong ZEXPORT adler32_z(uLong adler, const Bytef *buf, + z_size_t len); +/* + Same as adler32(), but with a size_t length. +*/ + +/* +ZEXTERN uLong ZEXPORT adler32_combine(uLong adler1, uLong adler2, + z_off_t len2); + + Combine two Adler-32 checksums into one. For two sequences of bytes, seq1 + and seq2 with lengths len1 and len2, Adler-32 checksums were calculated for + each, adler1 and adler2. adler32_combine() returns the Adler-32 checksum of + seq1 and seq2 concatenated, requiring only adler1, adler2, and len2. Note + that the z_off_t type (like off_t) is a signed integer. If len2 is + negative, the result has no meaning or utility. +*/ + +ZEXTERN uLong ZEXPORT crc32(uLong crc, const Bytef *buf, uInt len); +/* + Update a running CRC-32 with the bytes buf[0..len-1] and return the + updated CRC-32. A CRC-32 value is in the range of a 32-bit unsigned integer. + If buf is Z_NULL, this function returns the required initial value for the + crc. Pre- and post-conditioning (one's complement) is performed within this + function so it shouldn't be done by the application. + + Usage example: + + uLong crc = crc32(0L, Z_NULL, 0); + + while (read_buffer(buffer, length) != EOF) { + crc = crc32(crc, buffer, length); + } + if (crc != original_crc) error(); +*/ + +ZEXTERN uLong ZEXPORT crc32_z(uLong crc, const Bytef *buf, + z_size_t len); +/* + Same as crc32(), but with a size_t length. +*/ + +/* +ZEXTERN uLong ZEXPORT crc32_combine(uLong crc1, uLong crc2, z_off_t len2); + + Combine two CRC-32 check values into one. For two sequences of bytes, + seq1 and seq2 with lengths len1 and len2, CRC-32 check values were + calculated for each, crc1 and crc2. crc32_combine() returns the CRC-32 + check value of seq1 and seq2 concatenated, requiring only crc1, crc2, and + len2. len2 must be non-negative. +*/ + +/* +ZEXTERN uLong ZEXPORT crc32_combine_gen(z_off_t len2); + + Return the operator corresponding to length len2, to be used with + crc32_combine_op(). len2 must be non-negative. +*/ + +ZEXTERN uLong ZEXPORT crc32_combine_op(uLong crc1, uLong crc2, uLong op); +/* + Give the same result as crc32_combine(), using op in place of len2. op is + is generated from len2 by crc32_combine_gen(). This will be faster than + crc32_combine() if the generated op is used more than once. +*/ + + + /* various hacks, don't look :) */ + +/* deflateInit and inflateInit are macros to allow checking the zlib version + * and the compiler's view of z_stream: + */ +ZEXTERN int ZEXPORT deflateInit_(z_streamp strm, int level, + const char *version, int stream_size); +ZEXTERN int ZEXPORT inflateInit_(z_streamp strm, + const char *version, int stream_size); +ZEXTERN int ZEXPORT deflateInit2_(z_streamp strm, int level, int method, + int windowBits, int memLevel, + int strategy, const char *version, + int stream_size); +ZEXTERN int ZEXPORT inflateInit2_(z_streamp strm, int windowBits, + const char *version, int stream_size); +ZEXTERN int ZEXPORT inflateBackInit_(z_streamp strm, int windowBits, + unsigned char FAR *window, + const char *version, + int stream_size); +#ifdef Z_PREFIX_SET +# define z_deflateInit(strm, level) \ + deflateInit_((strm), (level), ZLIB_VERSION, (int)sizeof(z_stream)) +# define z_inflateInit(strm) \ + inflateInit_((strm), ZLIB_VERSION, (int)sizeof(z_stream)) +# define z_deflateInit2(strm, level, method, windowBits, memLevel, strategy) \ + deflateInit2_((strm),(level),(method),(windowBits),(memLevel),\ + (strategy), ZLIB_VERSION, (int)sizeof(z_stream)) +# define z_inflateInit2(strm, windowBits) \ + inflateInit2_((strm), (windowBits), ZLIB_VERSION, \ + (int)sizeof(z_stream)) +# define z_inflateBackInit(strm, windowBits, window) \ + inflateBackInit_((strm), (windowBits), (window), \ + ZLIB_VERSION, (int)sizeof(z_stream)) +#else +# define deflateInit(strm, level) \ + deflateInit_((strm), (level), ZLIB_VERSION, (int)sizeof(z_stream)) +# define inflateInit(strm) \ + inflateInit_((strm), ZLIB_VERSION, (int)sizeof(z_stream)) +# define deflateInit2(strm, level, method, windowBits, memLevel, strategy) \ + deflateInit2_((strm),(level),(method),(windowBits),(memLevel),\ + (strategy), ZLIB_VERSION, (int)sizeof(z_stream)) +# define inflateInit2(strm, windowBits) \ + inflateInit2_((strm), (windowBits), ZLIB_VERSION, \ + (int)sizeof(z_stream)) +# define inflateBackInit(strm, windowBits, window) \ + inflateBackInit_((strm), (windowBits), (window), \ + ZLIB_VERSION, (int)sizeof(z_stream)) +#endif + +#ifndef Z_SOLO + +/* gzgetc() macro and its supporting function and exposed data structure. Note + * that the real internal state is much larger than the exposed structure. + * This abbreviated structure exposes just enough for the gzgetc() macro. The + * user should not mess with these exposed elements, since their names or + * behavior could change in the future, perhaps even capriciously. They can + * only be used by the gzgetc() macro. You have been warned. + */ +struct gzFile_s { + unsigned have; + unsigned char *next; + z_off64_t pos; +}; +ZEXTERN int ZEXPORT gzgetc_(gzFile file); /* backward compatibility */ +#ifdef Z_PREFIX_SET +# undef z_gzgetc +# define z_gzgetc(g) \ + ((g)->have ? ((g)->have--, (g)->pos++, *((g)->next)++) : (gzgetc)(g)) +#else +# define gzgetc(g) \ + ((g)->have ? ((g)->have--, (g)->pos++, *((g)->next)++) : (gzgetc)(g)) +#endif + +/* provide 64-bit offset functions if _LARGEFILE64_SOURCE defined, and/or + * change the regular functions to 64 bits if _FILE_OFFSET_BITS is 64 (if + * both are true, the application gets the *64 functions, and the regular + * functions are changed to 64 bits) -- in case these are set on systems + * without large file support, _LFS64_LARGEFILE must also be true + */ +#ifdef Z_LARGE64 + ZEXTERN gzFile ZEXPORT gzopen64(const char *, const char *); + ZEXTERN z_off64_t ZEXPORT gzseek64(gzFile, z_off64_t, int); + ZEXTERN z_off64_t ZEXPORT gztell64(gzFile); + ZEXTERN z_off64_t ZEXPORT gzoffset64(gzFile); + ZEXTERN uLong ZEXPORT adler32_combine64(uLong, uLong, z_off64_t); + ZEXTERN uLong ZEXPORT crc32_combine64(uLong, uLong, z_off64_t); + ZEXTERN uLong ZEXPORT crc32_combine_gen64(z_off64_t); +#endif + +#if !defined(ZLIB_INTERNAL) && defined(Z_WANT64) +# ifdef Z_PREFIX_SET +# define z_gzopen z_gzopen64 +# define z_gzseek z_gzseek64 +# define z_gztell z_gztell64 +# define z_gzoffset z_gzoffset64 +# define z_adler32_combine z_adler32_combine64 +# define z_crc32_combine z_crc32_combine64 +# define z_crc32_combine_gen z_crc32_combine_gen64 +# else +# define gzopen gzopen64 +# define gzseek gzseek64 +# define gztell gztell64 +# define gzoffset gzoffset64 +# define adler32_combine adler32_combine64 +# define crc32_combine crc32_combine64 +# define crc32_combine_gen crc32_combine_gen64 +# endif +# ifndef Z_LARGE64 + ZEXTERN gzFile ZEXPORT gzopen64(const char *, const char *); + ZEXTERN z_off_t ZEXPORT gzseek64(gzFile, z_off_t, int); + ZEXTERN z_off_t ZEXPORT gztell64(gzFile); + ZEXTERN z_off_t ZEXPORT gzoffset64(gzFile); + ZEXTERN uLong ZEXPORT adler32_combine64(uLong, uLong, z_off_t); + ZEXTERN uLong ZEXPORT crc32_combine64(uLong, uLong, z_off_t); + ZEXTERN uLong ZEXPORT crc32_combine_gen64(z_off_t); +# endif +#else + ZEXTERN gzFile ZEXPORT gzopen(const char *, const char *); + ZEXTERN z_off_t ZEXPORT gzseek(gzFile, z_off_t, int); + ZEXTERN z_off_t ZEXPORT gztell(gzFile); + ZEXTERN z_off_t ZEXPORT gzoffset(gzFile); + ZEXTERN uLong ZEXPORT adler32_combine(uLong, uLong, z_off_t); + ZEXTERN uLong ZEXPORT crc32_combine(uLong, uLong, z_off_t); + ZEXTERN uLong ZEXPORT crc32_combine_gen(z_off_t); +#endif + +#else /* Z_SOLO */ + + ZEXTERN uLong ZEXPORT adler32_combine(uLong, uLong, z_off_t); + ZEXTERN uLong ZEXPORT crc32_combine(uLong, uLong, z_off_t); + ZEXTERN uLong ZEXPORT crc32_combine_gen(z_off_t); + +#endif /* !Z_SOLO */ + +/* undocumented functions */ +ZEXTERN const char * ZEXPORT zError(int); +ZEXTERN int ZEXPORT inflateSyncPoint(z_streamp); +ZEXTERN const z_crc_t FAR * ZEXPORT get_crc_table(void); +ZEXTERN int ZEXPORT inflateUndermine(z_streamp, int); +ZEXTERN int ZEXPORT inflateValidate(z_streamp, int); +ZEXTERN unsigned long ZEXPORT inflateCodesUsed(z_streamp); +ZEXTERN int ZEXPORT inflateResetKeep(z_streamp); +ZEXTERN int ZEXPORT deflateResetKeep(z_streamp); +#if defined(_WIN32) && !defined(Z_SOLO) +ZEXTERN gzFile ZEXPORT gzopen_w(const wchar_t *path, + const char *mode); +#endif +#if defined(STDC) || defined(Z_HAVE_STDARG_H) +# ifndef Z_SOLO +ZEXTERN int ZEXPORTVA gzvprintf(gzFile file, + const char *format, + va_list va); +# endif +#endif + +#ifdef __cplusplus +} +#endif + +#endif /* ZLIB_H */ diff --git a/include/zutil.h b/include/zutil.h new file mode 100644 index 0000000..8d628c7 --- /dev/null +++ b/include/zutil.h @@ -0,0 +1,255 @@ +/* zutil.h -- internal interface and configuration of the compression library + * Copyright (C) 1995-2024 Jean-loup Gailly, Mark Adler + * For conditions of distribution and use, see copyright notice in zlib.h + */ + +/* WARNING: this file should *not* be used by applications. It is + part of the implementation of the compression library and is + subject to change. Applications should only use zlib.h. + */ + +/* @(#) $Id$ */ + +#ifndef ZUTIL_H +#define ZUTIL_H + +#ifdef HAVE_HIDDEN +# define ZLIB_INTERNAL __attribute__((visibility ("hidden"))) +#else +# define ZLIB_INTERNAL +#endif + +#include "zlib.h" + +#if defined(STDC) && !defined(Z_SOLO) +# if !(defined(_WIN32_WCE) && defined(_MSC_VER)) +# include +# endif +# include +# include +#endif + +#ifndef local +# define local static +#endif +/* since "static" is used to mean two completely different things in C, we + define "local" for the non-static meaning of "static", for readability + (compile with -Dlocal if your debugger can't find static symbols) */ + +typedef unsigned char uch; +typedef uch FAR uchf; +typedef unsigned short ush; +typedef ush FAR ushf; +typedef unsigned long ulg; + +#if !defined(Z_U8) && !defined(Z_SOLO) && defined(STDC) +# include +# if (ULONG_MAX == 0xffffffffffffffff) +# define Z_U8 unsigned long +# elif (ULLONG_MAX == 0xffffffffffffffff) +# define Z_U8 unsigned long long +# elif (UINT_MAX == 0xffffffffffffffff) +# define Z_U8 unsigned +# endif +#endif + +extern z_const char * const z_errmsg[10]; /* indexed by 2-zlib_error */ +/* (size given to avoid silly warnings with Visual C++) */ + +#define ERR_MSG(err) z_errmsg[(err) < -6 || (err) > 2 ? 9 : 2 - (err)] + +#define ERR_RETURN(strm,err) \ + return (strm->msg = ERR_MSG(err), (err)) +/* To be used only when the state is known to be valid */ + + /* common constants */ + +#ifndef DEF_WBITS +# define DEF_WBITS MAX_WBITS +#endif +/* default windowBits for decompression. MAX_WBITS is for compression only */ + +#if MAX_MEM_LEVEL >= 8 +# define DEF_MEM_LEVEL 8 +#else +# define DEF_MEM_LEVEL MAX_MEM_LEVEL +#endif +/* default memLevel */ + +#define STORED_BLOCK 0 +#define STATIC_TREES 1 +#define DYN_TREES 2 +/* The three kinds of block type */ + +#define MIN_MATCH 3 +#define MAX_MATCH 258 +/* The minimum and maximum match lengths */ + +#define PRESET_DICT 0x20 /* preset dictionary flag in zlib header */ + + /* target dependencies */ + +#if defined(MSDOS) || (defined(WINDOWS) && !defined(WIN32)) +# define OS_CODE 0x00 +# ifndef Z_SOLO +# if defined(__TURBOC__) || defined(__BORLANDC__) +# if (__STDC__ == 1) && (defined(__LARGE__) || defined(__COMPACT__)) + /* Allow compilation with ANSI keywords only enabled */ + void _Cdecl farfree( void *block ); + void *_Cdecl farmalloc( unsigned long nbytes ); +# else +# include +# endif +# else /* MSC or DJGPP */ +# include +# endif +# endif +#endif + +#ifdef AMIGA +# define OS_CODE 1 +#endif + +#if defined(VAXC) || defined(VMS) +# define OS_CODE 2 +# define F_OPEN(name, mode) \ + fopen((name), (mode), "mbc=60", "ctx=stm", "rfm=fix", "mrs=512") +#endif + +#ifdef __370__ +# if __TARGET_LIB__ < 0x20000000 +# define OS_CODE 4 +# elif __TARGET_LIB__ < 0x40000000 +# define OS_CODE 11 +# else +# define OS_CODE 8 +# endif +#endif + +#if defined(ATARI) || defined(atarist) +# define OS_CODE 5 +#endif + +#ifdef OS2 +# define OS_CODE 6 +# if defined(M_I86) && !defined(Z_SOLO) +# include +# endif +#endif + +#if defined(MACOS) +# define OS_CODE 7 +#endif + +#ifdef __acorn +# define OS_CODE 13 +#endif + +#if defined(WIN32) && !defined(__CYGWIN__) +# define OS_CODE 10 +#endif + +#ifdef _BEOS_ +# define OS_CODE 16 +#endif + +#ifdef __TOS_OS400__ +# define OS_CODE 18 +#endif + +#ifdef __APPLE__ +# define OS_CODE 19 +#endif + +#if defined(__BORLANDC__) && !defined(MSDOS) + #pragma warn -8004 + #pragma warn -8008 + #pragma warn -8066 +#endif + +/* provide prototypes for these when building zlib without LFS */ +#if 0 && /* NASM hack */ \ + !defined(_WIN32) && \ + (!defined(_LARGEFILE64_SOURCE) || _LFS64_LARGEFILE-0 == 0) + ZEXTERN uLong ZEXPORT adler32_combine64(uLong, uLong, z_off_t); + ZEXTERN uLong ZEXPORT crc32_combine64(uLong, uLong, z_off_t); + ZEXTERN uLong ZEXPORT crc32_combine_gen64(z_off_t); +#endif + + /* common defaults */ + +#ifndef OS_CODE +# define OS_CODE 3 /* assume Unix */ +#endif + +#ifndef F_OPEN +# define F_OPEN(name, mode) fopen((name), (mode)) +#endif + + /* functions */ + +#if defined(pyr) || defined(Z_SOLO) +# define NO_MEMCPY +#endif +#if defined(SMALL_MEDIUM) && !defined(_MSC_VER) && !defined(__SC__) + /* Use our own functions for small and medium model with MSC <= 5.0. + * You may have to use the same strategy for Borland C (untested). + * The __SC__ check is for Symantec. + */ +# define NO_MEMCPY +#endif +#if defined(STDC) && !defined(HAVE_MEMCPY) && !defined(NO_MEMCPY) +# define HAVE_MEMCPY +#endif +#ifdef HAVE_MEMCPY +# ifdef SMALL_MEDIUM /* MSDOS small or medium model */ +# define zmemcpy _fmemcpy +# define zmemcmp _fmemcmp +# define zmemzero(dest, len) _fmemset(dest, 0, len) +# else +# define zmemcpy memcpy +# define zmemcmp memcmp +# define zmemzero(dest, len) memset(dest, 0, len) +# endif +#else + void ZLIB_INTERNAL zmemcpy(Bytef* dest, const Bytef* source, uInt len); + int ZLIB_INTERNAL zmemcmp(const Bytef* s1, const Bytef* s2, uInt len); + void ZLIB_INTERNAL zmemzero(Bytef* dest, uInt len); +#endif + +/* Diagnostic functions */ +#ifdef ZLIB_DEBUG +# include + extern int ZLIB_INTERNAL z_verbose; + extern void ZLIB_INTERNAL z_error(char *m); +# define Assert(cond,msg) {if(!(cond)) z_error(msg);} +# define Trace(x) {if (z_verbose>=0) fprintf x ;} +# define Tracev(x) {if (z_verbose>0) fprintf x ;} +# define Tracevv(x) {if (z_verbose>1) fprintf x ;} +# define Tracec(c,x) {if (z_verbose>0 && (c)) fprintf x ;} +# define Tracecv(c,x) {if (z_verbose>1 && (c)) fprintf x ;} +#else +# define Assert(cond,msg) +# define Trace(x) +# define Tracev(x) +# define Tracevv(x) +# define Tracec(c,x) +# define Tracecv(c,x) +#endif + +#ifndef Z_SOLO + voidpf ZLIB_INTERNAL zcalloc(voidpf opaque, unsigned items, + unsigned size); + void ZLIB_INTERNAL zcfree(voidpf opaque, voidpf ptr); +#endif + +#define ZALLOC(strm, items, size) \ + (*((strm)->zalloc))((strm)->opaque, (items), (size)) +#define ZFREE(strm, addr) (*((strm)->zfree))((strm)->opaque, (voidpf)(addr)) +#define TRY_FREE(s, p) {if (p) ZFREE(s, p);} + +/* Reverse the bytes in a 32-bit value */ +#define ZSWAP32(q) ((((q) >> 24) & 0xff) + (((q) >> 8) & 0xff00) + \ + (((q) & 0xff00) << 8) + (((q) & 0xff) << 24)) + +#endif /* ZUTIL_H */ diff --git a/src/common/common.c b/src/common/common.c new file mode 100644 index 0000000..7329496 --- /dev/null +++ b/src/common/common.c @@ -0,0 +1,80 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 1996-2025 The NASM Authors - All Rights Reserved */ + +/* + * common.c - code common to nasm and ndisasm + */ + +#include "compiler.h" +#include "nasm.h" +#include "nasmlib.h" +#include "insns.h" + +/* + * Per-pass global (across segments) state + */ +struct globalopt globl; + +void reset_global_defaults(int bits) +{ + globl.bits = bits; + globl.bnd = false; + globl.rel = 0; + globl.reldef = EAF_FS|EAF_GS; + globl.dollarhex = true; +} + +/* + * Name of a register token, if applicable; otherwise NULL + */ +const char *register_name(int token) +{ + if (is_register(token)) + return nasm_reg_names[token - EXPR_REG_START]; + else + return NULL; +} + +/* + * Common list of prefix names; ideally should be auto-generated + * from tokens.dat. This MUST match the enum in include/nasm.h. + */ +const char *prefix_name(int token) +{ + static const char * const + prefix_names[PREFIX_ENUM_LIMIT - PREFIX_ENUM_START] = { + "a16", "a32", "a64", "asp", "lock", "o16", "o32", "o64", "osp", + "rep", "repe", "repne", "repnz", "repz", "wait", + "xacquire", "xrelease", "bnd", "nobnd", "{rex}", "{rex2}", + "{evex}", "{vex}", "{vex3}", "{vex2}", "{nf}", "{zu}", + "{pt}", "{pn}" + }; + const char *name; + + /* A register can also be a prefix */ + name = register_name(token); + + if (!name) { + const unsigned int prefix = token - PREFIX_ENUM_START; + if (prefix < ARRAY_SIZE(prefix_names)) + name = prefix_names[prefix]; + } + + return name; +} + +/* + * True for a valid hinting-NOP opcode, after 0F. + */ +bool is_hint_nop(uint64_t op) +{ + if (op >> 16) + return false; + + if ((op >> 8) == 0x0f) + op = (uint8_t)op; + else if (op >> 8) + return false; + + return ((op & ~7) == 0x18) || (op == 0x0d); +} diff --git a/src/common/errstubs.c b/src/common/errstubs.c new file mode 100644 index 0000000..0b2e811 --- /dev/null +++ b/src/common/errstubs.c @@ -0,0 +1,109 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 1996-2025 The NASM Authors - All Rights Reserved */ + +#include "compiler.h" +#include "nasmlib.h" +#include "error.h" + +struct errinfo erropt; + +/* Common function body */ +#define nasm_do_error(_sev,_flags) \ + do { \ + const errflags nde_severity = (_sev); \ + const errflags nde_flags = nde_severity | (_flags); \ + va_list ap; \ + va_start(ap, fmt); \ + if (nde_severity >= ERR_CRITICAL) { \ + nasm_verror_critical(nde_flags, fmt, ap); \ + unreachable(); \ + } else { \ + nasm_verror(nde_flags, fmt, ap); \ + if (nde_severity >= ERR_FATAL) \ + unreachable(); \ + } \ + va_end(ap); \ + } while (0) + +/* + * This is the generic function to use when the error type is not + * known a priori. For ERR_DEBUG and ERR_INFO the level can be + * included by + */ +void nasm_error(errflags flags, const char *fmt, ...) +{ + nasm_do_error(flags & ERR_MASK, flags); +} + +#define nasm_err_helpers(_type, _name, _sev) \ +_type nasm_ ## _name ## f (errflags flags, const char *fmt, ...) \ +{ \ + nasm_do_error(_sev, flags); \ +} \ +_type nasm_ ## _name (const char *fmt, ...) \ +{ \ + nasm_do_error(_sev, 0); \ +} + +nasm_err_helpers(void, listmsg, ERR_LISTMSG) +nasm_err_helpers(void, note, ERR_NOTE) +nasm_err_helpers(void, nonfatal, ERR_NONFATAL) +nasm_err_helpers(fatal_func, fatal, ERR_FATAL) +nasm_err_helpers(fatal_func, critical, ERR_CRITICAL) +nasm_err_helpers(fatal_func, panic, ERR_PANIC) + +/* + * Strongly discourage warnings without level by require flags on warnings. + * This means nasm_warn() is the equivalent of the -f variants of the + * other ones. + * + * This is wrapped in a macro to be able to elide it if the warning is + * disabled, hence the extra underscore. + */ +void nasm_warn_(errflags flags, const char *fmt, ...) +{ + nasm_do_error(ERR_WARNING, flags); +} + +/* + * nasm_info() and nasm_debug() takes mandatory enabling levels. + */ +void nasm_info_(unsigned int level, const char *fmt, ...) +{ + if (info_level(level)) + nasm_do_error(ERR_INFO, LEVEL(level)); +} + +void nasm_debug_(unsigned int level, const char *fmt, ...) +{ + if (debug_level(level)) + nasm_do_error(ERR_DEBUG, LEVEL(level)); +} + +/* + * Convenience function for nasm_nonfatal(ERR_HOLD, ...) + */ +void nasm_holderr(const char *fmt, ...) +{ + nasm_do_error(ERR_NONFATAL, ERR_NONFATAL|ERR_HOLD); +} + +/* + * panic() and nasm_assert() + */ +fatal_func nasm_panic_from_macro(const char *func, const char *file, int line) +{ + if (!func) + func = ""; + + nasm_panic("internal error in %s at %s:%d\n", func, file, line); +} + +fatal_func nasm_assert_failed(const char *msg, const char *func, + const char *file, int line) +{ + if (!func) + func = ""; + + nasm_panic("assertion %s failed in %s at %s:%d", msg, func, file, line); +} diff --git a/src/common/files.c b/src/common/files.c new file mode 100644 index 0000000..8b01657 --- /dev/null +++ b/src/common/files.c @@ -0,0 +1,64 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 2026 The NASM Authors - All Rights Reserved */ + +#include "compiler.h" +#include "files.h" +#include "error.h" + +static const char * const filename_names[FN_NFILES] = { + "input", + "output", + "error", + "list", + "dependency" +}; + +const char *_filenames[FN_NFILES]; + +const char *copy_filename(enum filenames fn, const char *src) +{ + return set_filename(fn, nasm_strdup(src)); +} + +const char *set_filename(enum filenames fn, char *src) +{ + const char **dstp, *dst; + nasm_assert((size_t)fn < ARRAY_SIZE(_filenames)); + + dstp = &_filenames[fn]; + dst = *dstp; + + if (dst) { + nasm_fatal("more than one %s file specified: %s and %s", + filename_names[fn], dst, src); + } + + return *dstp = src; +} + +void check_overwrite_files(void) +{ + enum filenames fn; + const char *inname = get_filename(FN_INFILE); + + if (!inname) + return; + + for (fn = FN_INFILE+1; fn < FN_NFILES; fn++) { + const char *outname = get_filename(fn); + if (outname && !strcmp(inname, outname)) { + nasm_fatal("%s file would overwrite input file", + filename_names[fn]); + } + } +} + +void cleanup_filenames(void) +{ + enum filenames fn; + + for (fn = 0; fn < FN_NFILES; fn++) { + nasm_free((char *)_filenames[fn]); + _filenames[fn] = NULL; + } +} diff --git a/src/disasm.c b/src/disasm.c new file mode 100644 index 0000000..3471685 --- /dev/null +++ b/src/disasm.c @@ -0,0 +1,1800 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 1996-2025 The NASM Authors - All Rights Reserved */ + +/* + * disasm.c where all the _work_ gets done in the Netwide Disassembler + * + * See x86/bytecode.txt for the definition of the instruction encoding + * byte codes. + */ + +#include "compiler.h" + +#include "disasm.h" +#include "sync.h" +#include "insns.h" +#include "tables.h" +#include "regdis.h" +#include "bytesex.h" +#include "disp8.h" + +#define fetch_or_return(_start, _ptr, _size, _need) \ + fetch_safe(_start, _ptr, _size, _need, return 0) + +/* + * Flags that go into the `segment' field of `operand' structures + */ +#define SEG_RELATIVE 1 +#define SEG_RMREG 2 +#define SEG_NODISP 4 +#define SEG_DISP8 8 +#define SEG_DISP16 16 +#define SEG_DISP32 32 +#define SEG_DISP64 64 +#define SEG_DISPMASK (SEG_NODISP|SEG_DISP8|SEG_DISP16|SEG_DISP32|SEG_DISP64) +#define SEG_SIGNED 128 +#define SEG_RMMEM 256 +#define SEG_DFV 512 +#define SEG_16BIT (16 << 8) +#define SEG_32BIT (32 << 8) +#define SEG_64BIT (64 << 8) +#define SEG_BITMASK (SEG_16BIT|SEG_32BIT|SEG_64BIT) + +/* These get the address size associated with *one particular operand* */ +static inline uint32_t seg_set_asize(uint32_t seg, unsigned int asize) +{ + return (seg & ~SEG_BITMASK) | (asize << 8); +} +static inline unsigned int seg_get_asize(uint32_t seg) +{ + return (seg & SEG_BITMASK) >> 8; +} + +/* + * Important: regval must already have been adjusted for rex extensions; + * the rex flags are only used to determine which 8-bit register decoding + * to use. + */ +static enum reg_enum whichreg(opflags_t regflags, int regval, uint32_t rex) +{ + /* Unsigned value suitable for array lookup */ + const size_t r = regval; + size_t i; + + static const struct { + opflags_t flags; + const enum reg_enum *regs; + } regclasses[] = { + {REG16, nasm_rd_reg16}, + {REG32, nasm_rd_reg32}, + {REG64, nasm_rd_reg64}, + {REG_SREG, nasm_rd_sreg}, + {REG_CREG, nasm_rd_creg}, + {REG_DREG, nasm_rd_dreg}, + {REG_TREG, nasm_rd_treg}, + {FPUREG, nasm_rd_fpureg}, + {MMXREG, nasm_rd_mmxreg}, + {XMMREG, nasm_rd_xmmreg}, + {YMMREG, nasm_rd_ymmreg}, + {ZMMREG, nasm_rd_zmmreg}, + {OPMASKREG, nasm_rd_opmaskreg}, + {BNDREG, nasm_rd_bndreg}, + {TMMREG, nasm_rd_tmmreg}, + }; + + /* All the entries below look up regval in 32-entry arrays */ + if (r >= DISREGTBLSZ) + return 0; + + if (!(regflags & (REGISTER|REGMEM))) + return 0; /* Registers not permissible?! */ + + if (!(regflags & REG_CLASS_GPR)) + regflags &= ~SIZE_MASK; + + if (is_class(REG_CLASS_GPR|BITS8, regflags)) { + if (rex & (REX_P|REX_NH)) + return nasm_rd_reg8_rex[r]; + else + return nasm_rd_reg8[r]; + } + + for (i = 0; i < ARRAY_SIZE(regclasses); i++) { + enum reg_enum reg = regclasses[i].regs[r]; + if (is_class(regflags, nasm_reg_flags[reg])) + return reg; + } + + return 0; /* Unknown register type */ +} + +/* + * An implicit register operand. + */ + +/* Deal with OpenWatcom 64-bit switch() braindamage */ +#ifdef __WATCOMC__ +# define imp(op,rn) if (regflags == op) return rn +# define impdef(rn) return rn +#else +# define imp(op,rn) case op: return rn +# define impdef(rn) default: return rn +#endif + +static enum reg_enum implicit_reg(opflags_t regflags) +{ +#ifndef __WATCOMC__ + switch (regflags) +#endif + { + imp(REG_AL,R_AL); + imp(REG_AX,R_AX); + imp(REG_EAX,R_EAX); + imp(REG_RAX,R_RAX); + imp(REG_DL,R_DL); + imp(REG_DX,R_DX); + imp(REG_EDX,R_EDX); + imp(REG_RDX,R_RDX); + imp(REG_CL,R_CL); + imp(REG_CX,R_CX); + imp(REG_ECX,R_ECX); + imp(REG_RCX,R_RCX); + imp(FPU0,R_ST0); + imp(XMM0,R_XMM0); + imp(YMM0,R_YMM0); + imp(ZMM0,R_ZMM0); + imp(REG_ES,R_ES); + imp(REG_CS,R_CS); + imp(REG_SS,R_SS); + imp(REG_DS,R_DS); + imp(REG_FS,R_FS); + imp(REG_GS,R_GS); + imp(OPMASK0,R_K0); + impdef(0); + } +} + +/* + * Pick the correct REX.B prefix to add to this base register and + * get the corresponding register number. + */ +static enum reg_enum whichbreg(opflags_t regflags, int regval, uint32_t rex, + const struct prefix_info *pf) +{ + if (regflags & (REG_CLASS_RM_XMM|REG_CLASS_RM_YMM| + REG_CLASS_RM_ZMM|REG_CLASS_RM_TMM)) + regval += pf->rex.bregbv; + else + regval += pf->rex.breg; + + return whichreg(regflags, regval, rex); +} +static enum reg_enum whichrreg(opflags_t regflags, int regval, uint32_t rex, + const struct prefix_info *pf) +{ + return whichreg(regflags, regval + pf->rex.rreg, rex); +} + +static uint32_t append_evex_reg_deco(char *buf, uint32_t num, + decoflags_t deco, + const struct prefix_info *pf) +{ + const char * const er_names[] = {"rn-sae", "rd-sae", "ru-sae", "rz-sae"}; + uint32_t num_chars = 0; + + if ((deco & MASK) && pf->rex.aaa) { + enum reg_enum opmasknum = nasm_rd_opmaskreg[pf->rex.aaa]; + const char * regname = nasm_reg_names[opmasknum - EXPR_REG_START]; + + num_chars += snprintf(buf + num_chars, num - num_chars, + "{%s}", regname); + + if ((deco & Z) && pf->rex.z) { + num_chars += snprintf(buf + num_chars, num - num_chars, + "{z}"); + } + } + + if (pf->rex.b) { + if (deco & ER) { + num_chars += snprintf(buf + num_chars, num - num_chars, + ",{%s}", er_names[pf->rex.l]); + } else if (deco & SAE) { + num_chars += snprintf(buf + num_chars, num - num_chars, + ",{sae}"); + } + } + + return num_chars; +} + +static uint32_t append_evex_mem_deco(char *buf, uint32_t num, opflags_t type, + decoflags_t deco, + const struct prefix_info *pf) +{ + uint32_t num_chars = 0; + + if (pf->rex.b && (deco & BRDCAST_MASK)) { + decoflags_t deco_brsize = deco & BRSIZE_MASK; + opflags_t template_opsize = brsize_to_size(deco_brsize); + unsigned int br_num = (type & SIZE_MASK) / BITS128 * + BITS64 / template_opsize * 2; + + num_chars += snprintf(buf + num_chars, num - num_chars, + "{1to%d}", br_num); + } + + if ((deco & MASK) && pf->rex.aaa) { + enum reg_enum opmasknum = nasm_rd_opmaskreg[pf->rex.aaa]; + const char * regname = nasm_reg_names[opmasknum - EXPR_REG_START]; + + num_chars += snprintf(buf + num_chars, num - num_chars, + "{%s}", regname); + + if ((deco & Z) && pf->rex.z) { + num_chars += snprintf(buf + num_chars, num - num_chars, + "{z}"); + } + } + + return num_chars; +} + +/* + * Process an effective address (ModRM) specification. + */ +static const uint8_t *do_ea(const uint8_t *data, int modrm, + int bits, enum ea_type type, + operand *op, insn *ins, + const struct prefix_info *prefix) +{ + int mod, rm, scale, index, base; + int asize = ins->addr_size; + + mod = (modrm >> 6) & 03; + rm = modrm & 07; + + if (mod == 3) { /* pure register version */ + op->basereg = whichbreg(op->type, rm, ins->rex, prefix); + if (!op->basereg) + return NULL; + op->segment |= SEG_RMREG; + return data; + } + + op->disp_size = 0; + op->eaflags = 0; + op->segment = seg_set_asize(op->segment, asize) | SEG_RMMEM; + + if (asize == 16) { + /* + * specifies the displacement size (none, byte or + * word), and specifies the register combination. + * Exception: mod=0,rm=6 does not specify [BP] as one might + * expect, but instead specifies [disp16]. + */ + + if (type != EA_SCALAR) + return NULL; + + op->indexreg = op->basereg = 0; + op->scale = 1; /* always, in 16 bits */ + switch (rm) { + case 0: + op->basereg = R_BX; + op->indexreg = R_SI; + break; + case 1: + op->basereg = R_BX; + op->indexreg = R_DI; + break; + case 2: + op->basereg = R_BP; + op->indexreg = R_SI; + break; + case 3: + op->basereg = R_BP; + op->indexreg = R_DI; + break; + case 4: + op->basereg = R_SI; + break; + case 5: + op->basereg = R_DI; + break; + case 6: + op->basereg = R_BP; + break; + case 7: + op->basereg = R_BX; + break; + } + switch (mod) { + case 0: + if (rm != 6) { + op->segment |= SEG_NODISP; + op->disp_size = 0; + break; + } else { + /* disp16 only, no base register */ + op->basereg = 0; + } + /* fall through */ + case 2: + op->segment |= SEG_DISP16; + op->disp_size = 16; + op->offset = gets16(data); + data += 2; + break; + case 1: + op->segment |= SEG_DISP8; + op->offset = gets8(data) << get_disp8_shift(ins); + op->disp_size = 8; + data++; + break; + } + return data; + } else { + /* + * Once again, specifies displacement size (this time + * none, byte or *dword*), while specifies the base + * register. Again, [EBP] is missing, replaced by a pure + * disp32 (this time that's mod=0,rm=*5*) in 32-bit mode, + * and RIP-relative addressing in 64-bit mode. + * + * However, rm=4 + * indicates not a single base register, but instead the + * presence of a SIB byte... + */ + const enum reg_enum *regs; + regs = (asize == 64) ? nasm_rd_reg64 : nasm_rd_reg32; + + op->basereg = op->indexreg = 0; + base = rm; + + if (rm == 4) { + /* There is a SIB byte */ + uint8_t sib = *data++; + + scale = (sib >> 6) & 03; + index = (sib >> 3) & 07; + base = sib & 07; + + op->scale = 1 << scale; + + if (type != EA_SCALAR) { + index += prefix->rex.xregxv; + + /* A VSIB always has an index register */ + if (type == EA_XMMVSIB) + op->indexreg = nasm_rd_xmmreg[index]; + else if (type == EA_YMMVSIB) + op->indexreg = nasm_rd_ymmreg[index]; + else if (type == EA_ZMMVSIB) + op->indexreg = nasm_rd_zmmreg[index]; + } else { + /* Not a VSIB */ + index += prefix->rex.xreg; + + /* ESP/RSP cannot be an index */ + if (index != 4) + op->indexreg = regs[index]; + } + } else { + /* Can't have VSIB without SIB */ + if (type != EA_SCALAR) + return NULL; + + base = rm; + } + + if (base == 5 && mod == 0) { + /* disp32 without anything else */ + if (rm != 4 && bits == 64) { + /* If no SIB byte, this is IP-relative in 64-bit mode */ + op->eaflags |= EAF_REL; + op->segment |= SEG_RELATIVE; + } + op->basereg = 0; + mod = 2; /* force disp32 */ + } else { + /* "Normal" base encoding */ + op->basereg = regs[base + prefix->rex.breg]; + } + + switch (mod) { + case 0: + op->segment |= SEG_NODISP; + op->disp_size = 0; + break; + case 1: + op->segment |= SEG_DISP8; + op->disp_size = 8; + op->offset = gets8(data) << get_disp8_shift(ins); + data++; + break; + case 2: + op->segment |= SEG_DISP32; + op->disp_size = 32; + op->offset = gets32(data); + data += 4; + break; + } + return data; + } +} + +/* + * Return true if the following byte is a modr/m byte which is a memory + * encoding (mod != 3). + */ +static bool is_mem_modrm(const uint8_t *bytecode, const uint8_t *data) +{ + uint8_t b = *bytecode & 0344; + + if (b == 0100 || b == 0200) + return (*data & 0300) != 0300; + else + return false; /* Not a modr/m per instruction template */ +} + +/* + * Determine whether the instruction template in ins->itemp + * corresponds to the data stream in data and parse it into "ins" if + * so. "ins" has already been partially initialized in disasm() to + * point contain the address of the instruction (loc.offset), the mode + * (bits), and the desired template (itemp); all other fields must be + * initialized to zero. + * + * The "data" pointer should point to the first byte after parsed + * prefixes (after call to parse_prefixes()), and must have enough + * slack buffer space that the longest template cannot overrun the + * data buffer, although the content beyond the end of any valid + * instruction is allowed to be garbage. + */ +#define case4(x) case (x): case (x)+1: case (x)+2: case (x)+3 + +static int matches(const uint8_t *data, const struct prefix_info *prefix, + insn *ins) +{ + const struct itemplate * const t = ins->itemp; + const uint8_t *r = t->code; + const uint8_t * const origdata = data; /* First byte after prefixes */ + bool a_used = false, o_used = false; + enum prefixes drep = 0; + enum prefixes dwait = 0; + enum prefixes dlock = prefix->lock ? P_LOCK : 0; + int osize = prefix->osize; + int asize = prefix->asize; + const int bits = ins->bits; + const int defosize = (bits == 16) ? 16 : 32; + int i, c; + int op1, op2; + struct operand *opx, *opy; + uint8_t opex = 0; + uint8_t regmask = (bits == 64) ? 31 : 7; + enum ea_type eat = EA_SCALAR; + decoflags_t decoflags = 0; + + if (bits == 64 && prefix->rex.w && + (prefix->rex.type < REX_VEX || itemp_has(t, IF_WW))) + ins->op_size = osize = 64; + + ins->addr_size = asize; + ins->op_size = osize; + ins->itemp = t; + ins->opcode = t->opcode; + ins->operands = t->operands; + + for (i = 0; i < ins->operands; i++) { + struct operand *o = &ins->oprs[i]; + o->type = t->opd[i]; + o->opidx = i; + if (is_class(IMMEDIATE, t->opd[i])) { + o->segment = seg_set_asize(bits, bits); + } else if (is_class(MEM_OFFS, t->opd[i])) { + a_used = true; + o->segment = seg_set_asize(bits, asize) | SEG_RMMEM; + } else { + o->segment = seg_set_asize(bits, asize); + } + decoflags |= t->deco[i]; + } + + /* Decorators are only possible with EVEX */ + if (decoflags && prefix->rex.type != REX_EVEX) + return 0; + + ins->rex = prefix->rex.flags; + + if (itemp_has(t, (bits == 64 ? IF_NOLONG : IF_LONG))) + return 0; + + if (prefix->rep == 0xF2) + drep = (itemp_has(t, IF_BND) ? P_BND : P_REPNE); + else if (prefix->rep == 0xF3) + drep = P_REP; + + dwait = prefix->wait ? P_WAIT : 0; + + while ((c = *r++) != 0) { + op1 = (c & 3) + ((opex & 1) << 2); + op2 = ((c >> 3) & 3) + ((opex & 2) << 1); + opx = &ins->oprs[op1]; + opy = &ins->oprs[op2]; + opex = 0; + + switch (c) { + case 01: + case 02: + case 03: + case 04: + while (c--) + if (*r++ != *data++) + return 0; + break; + + case 05: + case 06: + case 07: + opex = c; + break; + + case4(010): + { + int t = *r++, d = *data++; + if (d < t || d > t + 7) + return 0; + else { + opx->basereg = whichbreg(opx->type, d-t, ins->rex, prefix); + opx->segment |= SEG_RMREG; + } + break; + } + + case4(014): + /* this is an separate index reg position of MIB operand (ICC) */ + /* Disassembler uses NASM's split EA form only */ + break; + + case4(0274): + opx->offset = (int8_t)*data++; + opx->disp_size = 8; + opx->segment |= SEG_SIGNED; + break; + + case4(0300): + if (!is_hint_nop(*data)) + return 0; + opx->offset = *data++; + opx->disp_size = 8; + break; + + case4(020): + case4(024): + opx->offset = *data++; + opx->disp_size = 8; + break; + + case4(030): + opx->offset = getu16(data); + opx->disp_size = 16; + data += 2; + break; + + case4(034): + if (osize == 32) { + opx->offset = getu32(data); + opx->disp_size = 32; + data += 4; + } else { + opx->offset = getu16(data); + opx->disp_size = 16; + data += 2; + } + break; + + case4(040): + opx->offset = getu32(data); + opx->disp_size = 32; + data += 4; + break; + + case4(0254): + opx->offset = gets32(data); + opx->disp_size = 32; + data += 4; + break; + + case4(044): + opx->disp_size = asize; + switch (asize) { + case 16: + opx->offset = getu16(data); + data += 2; + break; + case 32: + opx->offset = getu32(data); + data += 4; + break; + case 64: + opx->offset = getu64(data); + data += 8; + break; + } + break; + + case4(050): + opx->offset = gets8(data++); + opx->disp_size = 8; + opx->segment |= SEG_RELATIVE; + break; + + case4(054): + opx->offset = getu64(data); + opx->disp_size = 64; + data += 8; + break; + + case4(060): + opx->offset = gets16(data); + opx->disp_size = 16; + data += 2; + opx->segment = seg_set_asize(opx->segment, 16) | SEG_RELATIVE; + break; + + case4(064): /* rel */ + if (bits == 64) { + /* + * In long mode rel is always 32 bits, sign extended. + * REX.W or 66 prefixes have no effect. + */ + opx->offset = gets32(data); + opx->disp_size = 32; + data += 4; + opx->segment = seg_set_asize(opx->segment, 64) | SEG_RELATIVE; + } else if (osize == 32) { + opx->offset = gets32(data); + opx->disp_size = 32; + data += 4; + opx->segment = seg_set_asize(opx->segment, 32) | SEG_RELATIVE; + } else { + opx->offset = gets16(data); + opx->disp_size = 16; + data += 2; + opx->segment = seg_set_asize(opx->segment, 16) | SEG_RELATIVE; + } + break; + + case4(070): + opx->offset = gets32(data); + opx->disp_size = 32; + data += 4; + opx->disp_size = 32; + opx->segment = seg_set_asize(opx->segment, bits == 64 ? 64 : 32) + | SEG_RELATIVE; + break; + + case4(0100): + case4(0110): + case4(0120): + case4(0130): + { + int modrm = *data++; + data = do_ea(data, modrm, bits, eat, opy, ins, prefix); + if (!data) + return 0; + a_used |= !!(opy->segment & SEG_RMMEM); + opx->basereg = whichrreg(opx->type, (modrm >> 3) & 7, + ins->rex, prefix); + if (!opx->basereg) + return 0; + opx->segment |= SEG_RMREG; + break; + } + + case 0171: + { + uint8_t t = *r++; + uint8_t d = *data++; + if ((d ^ t) & ~070) { + return 0; + } else { + op2 = (op2 & ~3) | ((t >> 3) & 3); + opy = &ins->oprs[op2]; + opy->basereg = whichrreg(opy->type, (d >> 3) & 7, + ins->rex, prefix); + if (!opy->basereg) + return 0; + opy->segment |= SEG_RMREG; + } + break; + } + + case 0172: + c = *r++; + + opx = &ins->oprs[(c >> 3) & 7]; + ins->oprs[c & 7].offset = *data & 7; + goto do_is4; + + case 0173: + c = *r++; + if ((c ^ *data) & 7) + return 0; + + opx = &ins->oprs[(c >> 4) & 7]; + goto do_is4; + + case4(0174): + do_is4: + { + uint8_t ximm = *data++; + unsigned int nreg = ((ximm >> 4) + ((ximm & 8) << 1)) & regmask; + opx->basereg = whichbreg(opx->type, nreg, ins->rex, prefix); + if (!opx->basereg) + return 0; + opx->segment |= SEG_RMREG; + break; + } + + case4(0200): + case4(0204): + case4(0210): + case4(0214): + case4(0220): + case4(0224): + case4(0230): + case4(0234): + { + int modrm = *data++; + if (((modrm >> 3) & 07) != (c & 07)) + return 0; /* spare field doesn't match up */ + data = do_ea(data, modrm, bits, eat, opy, ins, prefix); + if (!data) + return 0; + a_used |= !!(opy->segment & SEG_RMMEM); + break; + } + + case4(0240): + case 0250: + { + uint32_t evextemp, mismatch, matchmask; + bool memop; + unsigned int vmask; + + if (prefix->rex.type != REX_EVEX) + return 0; + + ins->rex |= REX_EV; + + /* Get the evex prefix expected by the template */ + evextemp = (getu32(r-1) & ~0xff) + 0x62; r += 3; + mismatch = prefix->rex.raw ^ evextemp; + memop = is_mem_modrm(r, data+1); + + /* Now mask out "mismatched" bits that are proper parameters */ + matchmask = ~(EVEX_B4|EVEX_R4|EVEX_B3|EVEX_X3|EVEX_R3|EVEX_X4); + + if (c != 0250 || (memop && !itemp_has(t, IF_SCC))) { + /* + * V4 unless X is a is a vector (which is only + * possible if this is a memory operation), in which + * case this is X4. However, X4 is explicitly + * forbidden if this is not a memory operation, + * otherwise this bit is supposedly ignored if not + * used. + */ + matchmask &= ~EVEX_V4; /* Either V4 or X4 */ + } + + if (c == 0250) { + vmask = 0; /* No V register */ + } else if (is_class(IMMEDIATE, opx->type)) { + vmask = 15; /* V operand is used as immediate */ + opx->offset = (mismatch >> 19) & vmask; + if (itemp_has(t, IF_DFV)) + opx->segment |= SEG_DFV; + } else { + unsigned int regnum; + vmask = regmask; + + opx->segment |= SEG_RMREG; + if (eat >= EA_XMMVSIB) + regnum = prefix->rex.vregxv; + else + regnum = prefix->rex.vreg; + + opx->basereg = whichreg(opx->type, regnum & vmask, ins->rex); + if (!opx->basereg) + return 0; + } + + matchmask &= ~((vmask & 15) << 19); /* VVVV field */ + + if (prefix->rex.w) + ins->rex |= REX_W; + + if (itemp_has(t, IF_WIG)) { + ins->rex &= ~REX_W; + ins->rex |= REX_NW; + matchmask &= ~EVEX_W; + } + + if (itemp_has(t, IF_LIG) || + (prefix->rex.b && !memop)) /* LL used for rounding control */ + matchmask &= ~EVEX_LL; + + if (decoflags & MASK) + mismatch &= ~EVEX_AAA; + + if (decoflags & Z) + matchmask &= ~EVEX_Z; + + if (itemp_has(t, IF_NF_E)) { + matchmask &= ~EVEX_NF; + if (prefix->rex.nf) + ins->prefixes[PPS_NF] = P_NF; + } + + if (itemp_has(t, IF_ZU_E)) { + matchmask &= ~EVEX_ZU; + if (prefix->rex.zu) + ins->prefixes[PPS_ZU] = P_ZU; + } +#if 0 + if (mismatch & matchmask) { + extern const struct itemplate instrux[]; + + printf("EVEX mismatch: %4zd: raw %08x template %08x mask %08x -> %08x\n", + t - instrux, prefix->rex.raw, evextemp, matchmask, + mismatch & matchmask); + } +#endif + + if (mismatch & matchmask) + return 0; + + ins->evex_tuple = *r++ - 0300; + + if (itemp_has(t, IF_NF_E) && prefix->rex.nf) + ins->prefixes[PPS_NF] = P_NF; + + if (itemp_has(t, IF_ZU_E) && prefix->rex.zu) + ins->prefixes[PPS_ZU] = P_ZU; + break; + } + + case4(0260): + case 0270: + { + uint8_t vexm = *r++; + uint8_t vexwlp = *r++; + + if (prefix->rex.type != REX_VEX) + return 0; + + ins->rex |= REX_V; + + if ((vexm & 0x1f) != prefix->rex.map) + return 0; + + if (!itemp_has(t, IF_WIG)) { + if (prefix->rex.w != !!(vexwlp & 0x80)) + return 0; + } + + if ((vexwlp & 3) != prefix->rex.pp) + return 0; + + if (!itemp_has(t, IF_LIG)) { + if (((vexwlp >> 2) & 3) != prefix->rex.l) + return 0; + } + + if (c == 0270) { + if (prefix->rex.vreg != 0) + return 0; + } else { + opx->segment |= SEG_RMREG; + opx->basereg = + whichreg(opx->type, prefix->rex.vreg, ins->rex); + if (!opx->basereg) + return 0; + } + break; + } + + case 0271: + if (prefix->rep == 0xF3) + drep = P_XRELEASE; + break; + + case 0272: + if (prefix->rep == 0xF2) + drep = P_XACQUIRE; + else if (prefix->rep == 0xF3) + drep = P_XRELEASE; + break; + + case 0273: + if (prefix->lock == 0xF0) { + if (prefix->rep == 0xF2) + drep = P_XACQUIRE; + else if (prefix->rep == 0xF3) + drep = P_XRELEASE; + } + break; + + case 0310: + if (asize != 16) + return 0; + else + a_used = true; + break; + + case 0311: + if (asize != 32) + return 0; + else + a_used = true; + break; + + case 0312: + if (asize != bits) + return 0; + else + a_used = true; + break; + + case 0313: + if (asize != 64) + return 0; + else + a_used = true; + break; + + case 0314: + if (prefix->rex.flags & REX_B) + return 0; + break; + + case 0315: + if (prefix->rex.flags & REX_X) + return 0; + break; + + case 0316: + if (prefix->rex.flags & REX_R) + return 0; + break; + + case 0317: + if (prefix->rex.flags & REX_W) + return 0; + break; + + case 0320: + if (ins->rex & (REX_V | REX_EV)) + osize = 16; + else if (osize != 16) + return 0; + o_used = true; + break; + + case 0321: + if (ins->rex & (REX_V | REX_EV)) + osize = 32; + else if (osize != 32) + return 0; + o_used = true; + break; + + case 0322: + if (ins->rex & (REX_V | REX_EV)) + osize = defosize; + else if (osize != defosize) + return 0; + o_used = true; + break; + + case 0327: + if (bits != 64) + break; + /* else fall through */ + + case 0323: + /* No REX.W required for 64-bit osize */ + if (osize != 16) + ins->op_size = osize = 64; + ins->rex |= REX_NW; + break; + + case 0324: + if (osize != 64) + return 0; + o_used = true; + break; + + case 0325: + ins->rex |= REX_NH; + break; + + case 0326: + if (prefix->rep == 0xF3) + return 0; + break; + + case 0330: + break; + + case 0331: + if (prefix->rep) + return 0; + break; + + case 0332: + if (prefix->rep != 0xF2) + return 0; + drep = 0; + break; + + case 0333: + if (prefix->rep != 0xF3) + return 0; + drep = 0; + break; + + case 0334: + if (bits != 64 && prefix->lock) { + ins->rex |= REX_R; + dlock = 0; + } + break; + + case 0335: + if (drep == P_REP) + drep = P_REPE; + break; + + case 0336: + case 0337: + break; + + case 0340: + return 0; + + case 0341: + if (prefix->wait != 0x9B) + return 0; + dwait = 0; + break; + + case 0342: + if (osize != bits) + return 0; + o_used = true; + break; + + case 0344: + ins->rex |= REX_B; + break; + + case 0345: + ins->rex |= REX_X; + break; + + case 0346: + ins->rex |= REX_R; + break; + + case 0347: + ins->rex |= REX_W; + break; + + case 0350: + if (prefix->rex.type != REX_REX2) + return 0; + ins->rex |= REX_2; + break; + + case 0351: + if (prefix->rex.type != REX_REX2) + return 0; + ins->rex |= REX_2 | REX_W; + break; + + case 0355: + case 0356: + case 0357: + nasm_assert(prefix->rex.map == c - 0354); + break; + + + case 0360: + if (prefix->osp || prefix->rep) + return 0; + break; + + case 0361: + if (!prefix->osp || prefix->rep) + return 0; + o_used = true; + break; + + case 0364: + if (prefix->osp) + return 0; + break; + + case 0365: + if (prefix->asp) + return 0; + break; + + case 0366: + if (!prefix->osp) + return 0; + o_used = true; + break; + + case 0367: + if (!prefix->asp) + return 0; + a_used = true; + break; + + case 0370: + case 0371: + break; + + case 0374: + eat = EA_XMMVSIB; + break; + + case 0375: + eat = EA_YMMVSIB; + break; + + case 0376: + eat = EA_ZMMVSIB; + break; + + default: + fprintf(stderr, "ndisasm: unknown byte code: 0%03o\n", c); + return 0; /* Unknown code */ + } + } + + /* + * VEX or EVEX encoding in byte code, but no such prefix present, + * or vice versa? + */ + if ((prefix->rex.flags ^ ins->rex) & (REX_V | REX_EV)) + return 0; + + /* Required REX bits not present? */ + if ((ins->rex & ~prefix->rex.flags) & + (REX_2 | REX_P | REX_B | REX_X | REX_R | REX_W)) + return 0; + + /* + * Check for unused rep or a/o prefixes. + */ + if (dlock) { + if ((ins->rex & (REX_V | REX_EV)) || !itemp_has(t, IF_LOCK)) + return 0; /* Instruction not lockable */ + ins->prefixes[PPS_LOCK] = dlock; + } + if (drep) { + if (ins->prefixes[PPS_REP]) + return 0; + ins->prefixes[PPS_REP] = drep; + } + ins->prefixes[PPS_WAIT] = dwait; + + if (prefix->rex.w && osize == 64 && (ins->rex & REX_NW)) + o_used = false; + + if (!o_used) { + enum prefixes pfx = 0; + + if (prefix->osp) { + if (osize == 16 && bits != 16) + pfx = P_O16; + else if (osize == 32 && bits == 16) + pfx = P_O32; + else + pfx = P_OSP; + } else if (prefix->rex.w && osize == 64) { + pfx = P_O64; + } + + if (ins->prefixes[PPS_OSIZE]) + return 0; + ins->prefixes[PPS_OSIZE] = pfx; + } + + if (itemp_has(t, IF_JCC_HINT)) { + if ((prefix->seg & ~0x10) == 0x2e) + ins->prefixes[PPS_SEG] = prefix->seg & 0x10 ? P_PT : P_PN; + } + + if (!a_used) { + /* Emit any possible segment override prefix explicitly */ + if (!ins->prefixes[PPS_SEG]) + ins->prefixes[PPS_SEG] = prefix->segover; + + if (prefix->asp) { + if (ins->prefixes[PPS_ASIZE]) + return 0; + ins->prefixes[PPS_ASIZE] = asize == 16 ? P_A16 : P_A32; + } + } + + if (itemp_has(t, IF_NF_R)) + ins->prefixes[PPS_NF] = P_NF; + if (itemp_has(t, IF_ZU_R)) + ins->prefixes[PPS_ZU] = P_ZU; + + if (itemp_has(t, IF_LATEVEX) && prefix->rex.type == REX_VEX) { + ins->prefixes[PPS_REX] = P_VEX; + } + + if ((prefix->rex.raw & 0x807fff) == 0x0061c4) { + /* A VEX3-prefixed instruction which could have been VEX2-encoded */ + ins->prefixes[PPS_REX] = P_VEX3; + } + + /* Final fixup of operands */ + for (i = 0; i < ins->operands; i++) { + struct operand *o = &ins->oprs[i]; + if (o->segment & SEG_RMREG) { + o->type = nasm_reg_flags[o->basereg]; + } else if (o->segment & SEG_RMMEM) { + o->type &= ~(REGISTER | IMMEDIATE); + o->type |= MEMORY; + } else if (is_class(REGISTER, o->type) && !o->basereg) { + /* An implicit register operand? */ + o->basereg = implicit_reg(o->type); + if (!o->basereg) + return 0; + o->segment |= SEG_RMREG; + } + } + return data - origdata; +} + +static const char *regname(enum reg_enum reg) +{ + if (!is_register(reg)) + return ""; + + return nasm_reg_names[reg - EXPR_REG_START]; +} + +/* + * If there is a SM indicator in the instruction template, then: + * - If any of the operands is a sized register, remove sizes from + * any other size-matched non-register operands; + * - Otherwise remove the sizes from all but the first such operand. + */ +static void remove_redundant_sizes(insn *ins) +{ + unsigned int smmask = itemp_smx(ins->itemp); + int i; + opflags_t sized = 0; + + for (i = 0; i < ins->operands; i++) { + const struct operand *o = &ins->oprs[i]; + + if (!(smmask & (1 << i))) + continue; + + if (o->type & REGISTER) + sized |= o->type & SIZE_MASK; + } + + for (i = 0; i < ins->operands; i++) { + struct operand *o = &ins->oprs[i]; + + /* This is true if more than one bit is set in "sized" */ + if (sized & (sized-1)) + break; /* How the heck did this even match? */ + + if (!(smmask & (1 << i))) + continue; + + /* True if exactly 0 or 1 bits set in "sized" */ + if ((o->type & SIZE_MASK) == sized) + o->type -= sized; /* Remove size */ + else + sized |= o->type & SIZE_MASK; + } +} + +int32_t disasm(const uint8_t *dp, int32_t data_size, + char *output, int outbufsize, + int bits, int64_t offset, int autosync, + iflag_t *prefer) +{ + const struct itemplate * const * const *ix; + const struct itemplate * const *p; + const struct itemplate *itemp, *best_itemp; + int length, best_length = 0; + int maxlen = 15; + int i, slen; + char separator; + const uint8_t *origdata = dp; + int works; + insn ins; + iflag_t goodness, best; + int best_pref; + struct prefix_info prefix; + + /* + * Scan for prefixes. + */ + dp = parse_prefixes(&prefix, dp, bits); + if (!dp) /* Invalid or no space for even one opcode */ + return 0; + + /* + * WAIT is not really a prefix, it is an instruction, + * so it doesn't count toward the maximum instruction + * length. See comment in rexdis.c. + */ + if (prefix.wait) + maxlen++; + + maxlen -= dp - origdata; /* Prefixes count toward instruction length */ + + iflag_set_all(&best); /* Worst possible */ + best_itemp = NULL; + best_pref = INT_MAX; + + ix = ndisasm_itable[prefix.rex.xmap]; + if (!ix) + return 0; /* Instruction map does not exist */ + + fetch_or_return(origdata, dp, data_size, 1); + p = ix[*dp]; + /* dp now points to the primary opcode byte */ + if (!p) + return 0; /* No instructions for this opcode */ + + nasm_zero(ins); + while ((itemp = *p++)) { + insn tmp_ins; + + nasm_zero(tmp_ins); + tmp_ins.loc.offset = offset; + tmp_ins.bits = bits; + tmp_ins.itemp = itemp; + + if ((length = matches(dp, &prefix, &tmp_ins))) { + if (length > maxlen) + continue; /* Instruction too long */ + + works = true; + + /* + * Final check to make sure the operand types are valid + */ + for (i = 0; i < tmp_ins.operands; i++) { + opflags_t tt = itemp->opd[i]; + opflags_t it = tmp_ins.oprs[i].type; + + /* Strip flags that are not applicable to disassembler matching */ + if (!is_class(REG_GPR, it)) + tt &= ~SIZE_MASK; + if (is_class(IMMEDIATE, tt)) + tt &= ~SUBCLASS_MASK; + + if (!is_class(tt, it)) { +#if 0 + bool is_reg = !!(tmp_ins.oprs[i].segment & SEG_RMREG); + printf("flags 0x%lx%s%s do not match template 0x%lx\n", + it, + is_reg ? " for register " : "", + is_reg ? regname(tmp_ins.oprs[i].basereg) : "", + tt); +#endif + works = false; + break; + } + } + + /* + * Note: we always prefer instructions which incorporate + * prefixes in the instructions themselves. This is to allow + * e.g. PAUSE to be preferred to REP NOP, and deal with + * MMX/SSE instructions where prefixes are used to select + * between MMX and SSE register sets or outright opcode + * selection. + */ + if (works) { + int i, nprefix; + goodness = iflag_pfmask(itemp); + goodness = iflag_xor(&goodness, prefer); + nprefix = 0; + for (i = 0; i < MAXPREFIX; i++) + if (tmp_ins.prefixes[i]) + nprefix++; + if (nprefix < best_pref || + (nprefix == best_pref && + iflag_cmp(&goodness, &best) < 0)) { + /* This is the best one found so far */ + best = goodness; + best_itemp = itemp; + best_pref = nprefix; + best_length = length; + ins = tmp_ins; + } + + if (itemp_has(itemp, IF_BESTDIS)) + break; /* Don't search any further */ + } + } + } + + if (!best_itemp) + return 0; /* no instruction was matched */ + + /* Pick the best match */ + itemp = best_itemp; + length = best_length; + + slen = 0; + + for (i = 0; i < MAXPREFIX; i++) { + const char *pfx = prefix_name(ins.prefixes[i]); + if (pfx) + slen += snprintf(output+slen, outbufsize-slen, "%s ", pfx); + } + + slen += snprintf(output + slen, outbufsize - slen, "%s", + nasm_insn_names[ins.opcode]); + + remove_redundant_sizes(&ins); + + separator = ' '; + length += dp - origdata; /* fix up for prefixes */ + for (i = 0; i < ins.operands; i++) { + decoflags_t deco = itemp->deco[i]; + const operand *o = &ins.oprs[i]; + opflags_t t = o->type; + int64_t offs = o->offset; + int asize = seg_get_asize(o->segment); + int nasize = 64 - asize; /* Address bits to mask off */ + + output[slen++] = separator; + + if (o->segment & SEG_RELATIVE) { + /* + * sort out wraparound + */ + offs += ins.loc.offset + length; + offs = (uint64_t)offs << nasize >> nasize; + if ((t & (IMMEDIATE|SIZE_MASK)) == IMMEDIATE) { + if (asize != bits) { + switch (asize) { + case 16: + t |= BITS16; + break; + case 32: + t |= BITS32; + break; + case 64: + t |= BITS64; + break; + } + } + } + + /* + * add sync marker, if autosync is on + */ + if (autosync) + add_sync(offs, 0L); + } + + separator = (t & COLON) ? ':' : ','; + + if ((t & (REGISTER | FPUREG)) || + (o->segment & SEG_RMREG)) { + enum reg_enum reg = o->basereg; + if (t & TO) + slen += snprintf(output + slen, outbufsize - slen, "to "); + slen += snprintf(output + slen, outbufsize - slen, "%s", + regname(reg)); + if (t & REGSET_MASK) + slen += snprintf(output + slen, outbufsize - slen, "+%d", + (int)((t & REGSET_MASK) >> (REGSET_SHIFT-1))-1); + if (deco) + slen += append_evex_reg_deco(output + slen, outbufsize - slen, + deco, &prefix); + } else if (t & IMMEDIATE) { + if (is_class(UNITY, t)) { + output[slen++] = '1'; + } else if (o->segment & SEG_DFV) { + int fl; + static const char dfv_flags[] = "czso"; + const char *flsep = ""; + memcpy(&output[slen], "{dfv=", 5); + slen += 5; + for (fl = 0; fl < 4; fl++) { + if (offs & (1 << fl)) { + slen += snprintf(output + slen, outbufsize - slen, + "%s%cf", flsep, dfv_flags[fl]); + flsep = ","; + } + } + output[slen++] = '}'; + separator = ' '; /* No comma after dfv */ + } else { + /* Immediates that will actually be printed as numbers */ + + if (o->segment & SEG_RELATIVE) { + /* Don't print any sizes for near jump targets */ + } else if (t & BITS8) { + slen += + snprintf(output + slen, outbufsize - slen, "byte "); + if (o->segment & SEG_SIGNED) { + if (offs < 0) { + offs = -offs; + output[slen++] = '-'; + } else { + output[slen++] = '+'; + } + } + } else if (t & BITS16) { + slen += + snprintf(output + slen, outbufsize - slen, "word "); + } else if (t & BITS32) { + slen += + snprintf(output + slen, outbufsize - slen, "dword "); + } else if (t & BITS64) { + slen += + snprintf(output + slen, outbufsize - slen, "qword "); + } else if (t & NEAR) { + slen += + snprintf(output + slen, outbufsize - slen, "near "); + } else if (t & SHORT) { + slen += + snprintf(output + slen, outbufsize - slen, "short "); + } + slen += + snprintf(output + slen, outbufsize - slen, "0x%"PRIx64"", + offs); + } + } else if (is_class(REGMEM, t)) { + int started = false; + + if (t & BITS8) + slen += + snprintf(output + slen, outbufsize - slen, "byte "); + if (t & BITS16) + slen += + snprintf(output + slen, outbufsize - slen, "word "); + if (t & BITS32) + slen += + snprintf(output + slen, outbufsize - slen, "dword "); + if (t & BITS64) + slen += + snprintf(output + slen, outbufsize - slen, "qword "); + if (t & BITS80) + slen += + snprintf(output + slen, outbufsize - slen, "tword "); + if (prefix.rex.b && (deco & BRDCAST_MASK)) { + /* when broadcasting, each element size should be used */ + if (deco & BR_BITS16) + slen += + snprintf(output + slen, outbufsize - slen, "word "); + else if (deco & BR_BITS32) + slen += + snprintf(output + slen, outbufsize - slen, "dword "); + else if (deco & BR_BITS64) + slen += + snprintf(output + slen, outbufsize - slen, "qword "); + } else { + if (t & BITS128) + slen += + snprintf(output + slen, outbufsize - slen, "oword "); + if (t & BITS256) + slen += + snprintf(output + slen, outbufsize - slen, "yword "); + if (t & BITS512) + slen += + snprintf(output + slen, outbufsize - slen, "zword "); + } + if (t & FAR) + slen += snprintf(output + slen, outbufsize - slen, "far "); + if (t & NEAR) + slen += + snprintf(output + slen, outbufsize - slen, "near "); + output[slen++] = '['; + + if (prefix.segover) { + slen += + snprintf(output + slen, outbufsize - slen, "%s:", + prefix_name(prefix.segover)); + } + if (o->basereg) { + slen += snprintf(output + slen, outbufsize - slen, "%s", + regname(o->basereg)); + started = true; + } + if (o->indexreg && !itemp_has(best_itemp, IF_MIB)) { + if (started) + output[slen++] = '+'; + slen += snprintf(output + slen, outbufsize - slen, "%s", + regname(o->indexreg)); + if (o->scale > 1) + slen += + snprintf(output + slen, outbufsize - slen, "*%d", + o->scale); + started = true; + } + + + /* Show a displacement */ + if (o->disp_size) { + unsigned int defdisp = asize == 16 ? 16 : 32; + bool do_sign = started || (o->segment & SEG_SIGNED); + bool do_sext = do_sign || o->disp_size < asize; + uint64_t offset; + const char *rel = ""; + const char *sizename = ""; + const char *sign = ""; + + if (o->eaflags & EAF_REL) + rel = "rel "; + else if (!started && bits == 64) + rel = "abs "; + + if (o->disp_size != defdisp || + (!started && asize != bits)) { + switch (o->disp_size) { + case 16: + sizename = "word "; + break; + case 32: + sizename = "dword "; + break; + case 64: + sizename = "qword "; + break; + default: + break; /* This includes 8 bits */ + } + } + + if (do_sext) + offset = (int64_t)offs << nasize >> nasize; + else + offset = (uint64_t)offs << nasize >> nasize; + + if (do_sign) { + if (started) + sign = "+"; + if ((int64_t)offset < 0) { + sign = "-"; + offset = -offset; + } + } + + slen += snprintf(output + slen, outbufsize - slen, + "%s%s%s0x%"PRIx64"", + rel, sizename, sign, offset); + } + + if (o->indexreg && itemp_has(best_itemp, IF_MIB)) { + output[slen++] = ','; + slen += snprintf(output + slen, outbufsize - slen, "%s", + regname(o->indexreg)); + if (o->scale > 1) + slen += + snprintf(output + slen, outbufsize - slen, "*%d", + o->scale); + started = true; + } + + output[slen++] = ']'; + + if (deco) + slen += append_evex_mem_deco(output + slen, outbufsize - slen, + t, deco, &prefix); + } else { + slen += + snprintf(output + slen, outbufsize - slen, "", + i); + } + } + output[slen] = '\0'; + return length; +} + +/* + * This is called when we don't have a complete instruction. If it + * is a standalone *single-byte* prefix show it as such, otherwise + * print it as a literal. + */ +int32_t eatbyte(uint8_t byte, char *output, int outbufsize, int bits) +{ + const char *str = NULL; + + switch (byte) { + case 0xF2: + str = "repne"; + break; + case 0xF3: + str = "rep"; + break; + case 0x9B: + str = "wait"; + break; + case 0xF0: + str = "lock"; + break; + case 0x2E: + str = "cs"; + break; + case 0x36: + str = "ss"; + break; + case 0x3E: + str = "ds"; + break; + case 0x26: + str = "es"; + break; + case 0x64: + str = "fs"; + break; + case 0x65: + str = "gs"; + break; + case 0x66: + str = (bits == 16) ? "o32" : "o16"; + break; + case 0x67: + str = (bits == 32) ? "a16" : "a32"; + break; + case REX_P + 0x0: + case REX_P + 0x1: + case REX_P + 0x2: + case REX_P + 0x3: + case REX_P + 0x4: + case REX_P + 0x5: + case REX_P + 0x6: + case REX_P + 0x7: + case REX_P + 0x8: + case REX_P + 0x9: + case REX_P + 0xA: + case REX_P + 0xB: + case REX_P + 0xC: + case REX_P + 0xD: + case REX_P + 0xE: + case REX_P + 0xF: + if (bits == 64) { + snprintf(output, outbufsize, "rex%s%s%s%s%s", + (byte == REX_P) ? "" : ".", + (byte & REX_W) ? "w" : "", + (byte & REX_R) ? "r" : "", + (byte & REX_X) ? "x" : "", + (byte & REX_B) ? "b" : ""); + break; + } + /* else fall through */ + default: + snprintf(output, outbufsize, "db 0x%02x", byte); + break; + } + + if (str) + snprintf(output, outbufsize, "%s", str); + + return 1; +} diff --git a/src/diserror.c b/src/diserror.c new file mode 100644 index 0000000..c9f8113 --- /dev/null +++ b/src/diserror.c @@ -0,0 +1,46 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 1996-2025 The NASM Authors - All Rights Reserved */ + +/* + * diserror.c - stubs for the error functions for the disassembler + */ + +#include "compiler.h" +#include "error.h" +#include "disasm.h" + +void usage(void) +{ + const char help[] = + "usage: ndisasm [-aihlruvw] [-b bits] [-o origin] [-s sync...]\n" + " [-e bytes] [-k start,bytes] [-p vendor] file\n" + " -a or -i activates auto (intelligent) sync\n" + " -b 16, -b 32 or -b 64 sets the processor mode\n" + " -u same as -b 32\n" + " -l same as -b 64\n" + " -w wide output (avoids continuation lines)\n" + " -h displays this text\n" + " -r or -v displays the version number\n" + " -e skips bytes of header\n" + " -k avoids disassembling bytes from position \n" + " -p selects the preferred vendor instruction set (intel, amd, cyrix, idt)\n"; + + fputs(help, stderr); +} + +void nasm_verror(errflags severity, const char *fmt, va_list val) +{ + severity &= ERR_MASK; + + vfprintf(stderr, fmt, val); + if (severity >= ERR_FATAL) + exit(severity - ERR_FATAL + 1); +} + +fatal_func nasm_verror_critical(errflags severity, const char *fmt, va_list val) +{ + nasm_verror(severity, fmt, val); + abort(); +} + +uint8_t warning_state[NUM_WARNINGS]; diff --git a/src/nasmlib/alloc.c b/src/nasmlib/alloc.c new file mode 100644 index 0000000..71570a3 --- /dev/null +++ b/src/nasmlib/alloc.c @@ -0,0 +1,178 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 1996-2019 The NASM Authors - All Rights Reserved */ + +/* + * nasmlib.c library routines for the Netwide Assembler + */ + +#include "compiler.h" +#include "nasmlib.h" +#include "error.h" +#include "alloc.h" + +size_t _nasm_last_string_size; + +fatal_func nasm_alloc_failed(void) +{ + nasm_critical("out of memory!"); +} + +void *nasm_malloc(size_t size) +{ + void *p; + +again: + p = malloc(size); + + if (unlikely(!p)) { + if (!size) { + size = 1; + goto again; + } + nasm_alloc_failed(); + } + return p; +} + +void *nasm_calloc(size_t nelem, size_t size) +{ + void *p; + +again: + p = calloc(nelem, size); + + if (unlikely(!p)) { + if (!nelem || !size) { + nelem = size = 1; + goto again; + } + nasm_alloc_failed(); + } + + return p; +} + +void *nasm_zalloc(size_t size) +{ + return nasm_calloc(size, 1); +} + +/* + * Unlike the system realloc, we do *not* allow size == 0 to be + * the equivalent to free(); we guarantee returning a non-NULL pointer. + * + * The check for calling malloc() is theoretically redundant, but be + * paranoid about the system library... + */ +void *nasm_realloc(void *q, size_t size) +{ + if (unlikely(!size)) + size = 1; + q = q ? realloc(q, size) : malloc(size); + return validate_ptr(q); +} + +void nasm_free(void *q) +{ + if (q) + free(q); +} + +char *nasm_strdup(const char *s) +{ + char *p; + const size_t size = strlen(s) + 1; + + _nasm_last_string_size = size; + p = nasm_malloc(size); + return memcpy(p, s, size); +} + +char *nasm_strndup(const char *s, size_t len) +{ + char *p; + + len = strnlen(s, len); + _nasm_last_string_size = len + 1; + p = nasm_malloc(len+1); + p[len] = '\0'; + return memcpy(p, s, len); +} + +char *nasm_strdupto(char **ptrp, const char *str) +{ + char *ptr = *ptrp; + if (str) { + if (ptr) + nasm_free(ptr); + *ptrp = ptr = nasm_strdup(str); + } + return ptr; +} + +char *nasm_strcat(const char *one, const char *two) +{ + char *rslt; + const size_t l1 = strlen(one); + const size_t s2 = strlen(two) + 1; + + _nasm_last_string_size = l1 + s2; + rslt = nasm_malloc(l1 + s2); + memcpy(rslt, one, l1); + memcpy(rslt + l1, two, s2); + return rslt; +} + +char *nasm_strcatn(const char *str1, ...) +{ + va_list ap; + char *rslt; /* Output buffer */ + size_t s; /* Total buffer size */ + size_t n; /* Number of arguments */ + size_t *ltbl; /* Table of lengths */ + size_t l, *lp; /* Length for current argument */ + const char *p; /* Currently examined argument */ + char *q; /* Output pointer */ + + n = 0; /* No strings encountered yet */ + p = str1; + va_start(ap, str1); + while (p) { + n++; + p = va_arg(ap, const char *); + } + va_end(ap); + + ltbl = nasm_malloc(n * sizeof(size_t)); + + s = 1; /* Space for final NULL */ + p = str1; + lp = ltbl; + va_start(ap, str1); + while (p) { + *lp++ = l = strlen(p); + s += l; + p = va_arg(ap, const char *); + } + va_end(ap); + + _nasm_last_string_size = s; + + q = rslt = nasm_malloc(s); + + p = str1; + lp = ltbl; + va_start(ap, str1); + while (p) { + l = *lp++; + memcpy(q, p, l); + q += l; + p = va_arg(ap, const char *); + } + va_end(ap); + *q = '\0'; + + nasm_free(ltbl); + + return rslt; +} diff --git a/src/nasmlib/asprintf.c b/src/nasmlib/asprintf.c new file mode 100644 index 0000000..15feecb --- /dev/null +++ b/src/nasmlib/asprintf.c @@ -0,0 +1,68 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 1996-2018 The NASM Authors - All Rights Reserved */ + +#include "compiler.h" +#include "nasmlib.h" +#include "alloc.h" + +/* + * nasm_[v]asprintf() are variants of the semi-standard [v]asprintf() + * functions, except that we return the pointer instead of a count. + * The length of the string (with or without the final NUL) is available + * by calling nasm_last_string_{len,size}() afterwards. + * + * nasm_[v]axprintf() are similar, but allocates a user-defined amount + * of storage before the string, and returns a pointer to the + * allocated buffer. The size of that area is not included in the value + * returned by nasm_last_string_size(). + */ + +void *nasm_vaxprintf(size_t extra, const char *fmt, va_list ap) +{ + char *strp; + va_list xap; + size_t bytes; + int len; + + va_copy(xap, ap); + len = vsnprintf(NULL, 0, fmt, xap); + nasm_assert(len >= 0); + bytes = (size_t)len + 1; + _nasm_last_string_size = bytes; + va_end(xap); + + strp = nasm_malloc(extra+bytes); + memset(strp, 0, extra); + len = vsnprintf(strp+extra, bytes, fmt, ap); + nasm_assert(bytes == (size_t)len + 1); + return strp; +} + +char *nasm_vasprintf(const char *fmt, va_list ap) +{ + return nasm_vaxprintf(0, fmt, ap); +} + +void *nasm_axprintf(size_t extra, const char *fmt, ...) +{ + va_list ap; + void *strp; + + va_start(ap, fmt); + strp = nasm_vaxprintf(extra, fmt, ap); + va_end(ap); + + return strp; +} + +char *nasm_asprintf(const char *fmt, ...) +{ + va_list ap; + char *strp; + + va_start(ap, fmt); + strp = nasm_vaxprintf(0, fmt, ap); + va_end(ap); + + return strp; +} diff --git a/src/nasmlib/badenum.c b/src/nasmlib/badenum.c new file mode 100644 index 0000000..65d1644 --- /dev/null +++ b/src/nasmlib/badenum.c @@ -0,0 +1,13 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 2017 The NASM Authors - All Rights Reserved */ + +#include "nasmlib.h" + +/* Used to avoid returning NULL to a debug printing function */ +const char *invalid_enum_str(int x) +{ + static char buf[64]; + + snprintf(buf, sizeof buf, "", x); + return buf; +} diff --git a/src/nasmlib/bsi.c b/src/nasmlib/bsi.c new file mode 100644 index 0000000..1adc80b --- /dev/null +++ b/src/nasmlib/bsi.c @@ -0,0 +1,46 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 1996-2016 The NASM Authors - All Rights Reserved */ + +/* + * nasmlib.c library routines for the Netwide Assembler + */ + +#include "compiler.h" + + +#include "nasmlib.h" + +/* + * Binary search. + */ +int bsi(const char *string, const char **array, int size) +{ + int i = -1, j = size; /* always, i < index < j */ + while (j - i >= 2) { + int k = (i + j) / 2; + int l = strcmp(string, array[k]); + if (l < 0) /* it's in the first half */ + j = k; + else if (l > 0) /* it's in the second half */ + i = k; + else /* we've got it :) */ + return k; + } + return -1; /* we haven't got it :( */ +} + +int bsii(const char *string, const char **array, int size) +{ + int i = -1, j = size; /* always, i < index < j */ + while (j - i >= 2) { + int k = (i + j) / 2; + int l = nasm_stricmp(string, array[k]); + if (l < 0) /* it's in the first half */ + j = k; + else if (l > 0) /* it's in the second half */ + i = k; + else /* we've got it :) */ + return k; + } + return -1; /* we haven't got it :( */ +} diff --git a/src/nasmlib/crc32b.c b/src/nasmlib/crc32b.c new file mode 100644 index 0000000..6c75b36 --- /dev/null +++ b/src/nasmlib/crc32b.c @@ -0,0 +1,85 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 1996-2021 The NASM Authors - All Rights Reserved */ + +#include "compiler.h" +#include "hashtbl.h" + +const uint32_t crc32_tab[256] = { + 0x00000000, 0x77073096, 0xEE0E612C, 0x990951BA, + 0x076DC419, 0x706AF48F, 0xE963A535, 0x9E6495A3, + 0x0EDB8832, 0x79DCB8A4, 0xE0D5E91E, 0x97D2D988, + 0x09B64C2B, 0x7EB17CBD, 0xE7B82D07, 0x90BF1D91, + 0x1DB71064, 0x6AB020F2, 0xF3B97148, 0x84BE41DE, + 0x1ADAD47D, 0x6DDDE4EB, 0xF4D4B551, 0x83D385C7, + 0x136C9856, 0x646BA8C0, 0xFD62F97A, 0x8A65C9EC, + 0x14015C4F, 0x63066CD9, 0xFA0F3D63, 0x8D080DF5, + 0x3B6E20C8, 0x4C69105E, 0xD56041E4, 0xA2677172, + 0x3C03E4D1, 0x4B04D447, 0xD20D85FD, 0xA50AB56B, + 0x35B5A8FA, 0x42B2986C, 0xDBBBC9D6, 0xACBCF940, + 0x32D86CE3, 0x45DF5C75, 0xDCD60DCF, 0xABD13D59, + 0x26D930AC, 0x51DE003A, 0xC8D75180, 0xBFD06116, + 0x21B4F4B5, 0x56B3C423, 0xCFBA9599, 0xB8BDA50F, + 0x2802B89E, 0x5F058808, 0xC60CD9B2, 0xB10BE924, + 0x2F6F7C87, 0x58684C11, 0xC1611DAB, 0xB6662D3D, + 0x76DC4190, 0x01DB7106, 0x98D220BC, 0xEFD5102A, + 0x71B18589, 0x06B6B51F, 0x9FBFE4A5, 0xE8B8D433, + 0x7807C9A2, 0x0F00F934, 0x9609A88E, 0xE10E9818, + 0x7F6A0DBB, 0x086D3D2D, 0x91646C97, 0xE6635C01, + 0x6B6B51F4, 0x1C6C6162, 0x856530D8, 0xF262004E, + 0x6C0695ED, 0x1B01A57B, 0x8208F4C1, 0xF50FC457, + 0x65B0D9C6, 0x12B7E950, 0x8BBEB8EA, 0xFCB9887C, + 0x62DD1DDF, 0x15DA2D49, 0x8CD37CF3, 0xFBD44C65, + 0x4DB26158, 0x3AB551CE, 0xA3BC0074, 0xD4BB30E2, + 0x4ADFA541, 0x3DD895D7, 0xA4D1C46D, 0xD3D6F4FB, + 0x4369E96A, 0x346ED9FC, 0xAD678846, 0xDA60B8D0, + 0x44042D73, 0x33031DE5, 0xAA0A4C5F, 0xDD0D7CC9, + 0x5005713C, 0x270241AA, 0xBE0B1010, 0xC90C2086, + 0x5768B525, 0x206F85B3, 0xB966D409, 0xCE61E49F, + 0x5EDEF90E, 0x29D9C998, 0xB0D09822, 0xC7D7A8B4, + 0x59B33D17, 0x2EB40D81, 0xB7BD5C3B, 0xC0BA6CAD, + 0xEDB88320, 0x9ABFB3B6, 0x03B6E20C, 0x74B1D29A, + 0xEAD54739, 0x9DD277AF, 0x04DB2615, 0x73DC1683, + 0xE3630B12, 0x94643B84, 0x0D6D6A3E, 0x7A6A5AA8, + 0xE40ECF0B, 0x9309FF9D, 0x0A00AE27, 0x7D079EB1, + 0xF00F9344, 0x8708A3D2, 0x1E01F268, 0x6906C2FE, + 0xF762575D, 0x806567CB, 0x196C3671, 0x6E6B06E7, + 0xFED41B76, 0x89D32BE0, 0x10DA7A5A, 0x67DD4ACC, + 0xF9B9DF6F, 0x8EBEEFF9, 0x17B7BE43, 0x60B08ED5, + 0xD6D6A3E8, 0xA1D1937E, 0x38D8C2C4, 0x4FDFF252, + 0xD1BB67F1, 0xA6BC5767, 0x3FB506DD, 0x48B2364B, + 0xD80D2BDA, 0xAF0A1B4C, 0x36034AF6, 0x41047A60, + 0xDF60EFC3, 0xA867DF55, 0x316E8EEF, 0x4669BE79, + 0xCB61B38C, 0xBC66831A, 0x256FD2A0, 0x5268E236, + 0xCC0C7795, 0xBB0B4703, 0x220216B9, 0x5505262F, + 0xC5BA3BBE, 0xB2BD0B28, 0x2BB45A92, 0x5CB36A04, + 0xC2D7FFA7, 0xB5D0CF31, 0x2CD99E8B, 0x5BDEAE1D, + 0x9B64C2B0, 0xEC63F226, 0x756AA39C, 0x026D930A, + 0x9C0906A9, 0xEB0E363F, 0x72076785, 0x05005713, + 0x95BF4A82, 0xE2B87A14, 0x7BB12BAE, 0x0CB61B38, + 0x92D28E9B, 0xE5D5BE0D, 0x7CDCEFB7, 0x0BDBDF21, + 0x86D3D2D4, 0xF1D4E242, 0x68DDB3F8, 0x1FDA836E, + 0x81BE16CD, 0xF6B9265B, 0x6FB077E1, 0x18B74777, + 0x88085AE6, 0xFF0F6A70, 0x66063BCA, 0x11010B5C, + 0x8F659EFF, 0xF862AE69, 0x616BFFD3, 0x166CCF45, + 0xA00AE278, 0xD70DD2EE, 0x4E048354, 0x3903B3C2, + 0xA7672661, 0xD06016F7, 0x4969474D, 0x3E6E77DB, + 0xAED16A4A, 0xD9D65ADC, 0x40DF0B66, 0x37D83BF0, + 0xA9BCAE53, 0xDEBB9EC5, 0x47B2CF7F, 0x30B5FFE9, + 0xBDBDF21C, 0xCABAC28A, 0x53B39330, 0x24B4A3A6, + 0xBAD03605, 0xCDD70693, 0x54DE5729, 0x23D967BF, + 0xB3667A2E, 0xC4614AB8, 0x5D681B02, 0x2A6F2B94, + 0xB40BBE37, 0xC30C8EA1, 0x5A05DF1B, 0x2D02EF8D +}; + +uint32_t crc32b(uint32_t crc, const void *data, size_t len) +{ + register const uint8_t *p = data; + register uint32_t hashval = crc; + + while (len--) + { + hashval = (hashval >> 8) ^ crc32_tab[(hashval ^ *p++) & 0xff]; + } + + return hashval; +} diff --git a/src/nasmlib/crc64.c b/src/nasmlib/crc64.c new file mode 100644 index 0000000..82301e2 --- /dev/null +++ b/src/nasmlib/crc64.c @@ -0,0 +1,177 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 1996-2014 The NASM Authors - All Rights Reserved */ + +#include "compiler.h" +#include "nctype.h" +#include "hashtbl.h" + +const uint64_t crc64_tab[256] = { + UINT64_C(0x0000000000000000), UINT64_C(0x7ad870c830358979), + UINT64_C(0xf5b0e190606b12f2), UINT64_C(0x8f689158505e9b8b), + UINT64_C(0xc038e5739841b68f), UINT64_C(0xbae095bba8743ff6), + UINT64_C(0x358804e3f82aa47d), UINT64_C(0x4f50742bc81f2d04), + UINT64_C(0xab28ecb46814fe75), UINT64_C(0xd1f09c7c5821770c), + UINT64_C(0x5e980d24087fec87), UINT64_C(0x24407dec384a65fe), + UINT64_C(0x6b1009c7f05548fa), UINT64_C(0x11c8790fc060c183), + UINT64_C(0x9ea0e857903e5a08), UINT64_C(0xe478989fa00bd371), + UINT64_C(0x7d08ff3b88be6f81), UINT64_C(0x07d08ff3b88be6f8), + UINT64_C(0x88b81eabe8d57d73), UINT64_C(0xf2606e63d8e0f40a), + UINT64_C(0xbd301a4810ffd90e), UINT64_C(0xc7e86a8020ca5077), + UINT64_C(0x4880fbd87094cbfc), UINT64_C(0x32588b1040a14285), + UINT64_C(0xd620138fe0aa91f4), UINT64_C(0xacf86347d09f188d), + UINT64_C(0x2390f21f80c18306), UINT64_C(0x594882d7b0f40a7f), + UINT64_C(0x1618f6fc78eb277b), UINT64_C(0x6cc0863448deae02), + UINT64_C(0xe3a8176c18803589), UINT64_C(0x997067a428b5bcf0), + UINT64_C(0xfa11fe77117cdf02), UINT64_C(0x80c98ebf2149567b), + UINT64_C(0x0fa11fe77117cdf0), UINT64_C(0x75796f2f41224489), + UINT64_C(0x3a291b04893d698d), UINT64_C(0x40f16bccb908e0f4), + UINT64_C(0xcf99fa94e9567b7f), UINT64_C(0xb5418a5cd963f206), + UINT64_C(0x513912c379682177), UINT64_C(0x2be1620b495da80e), + UINT64_C(0xa489f35319033385), UINT64_C(0xde51839b2936bafc), + UINT64_C(0x9101f7b0e12997f8), UINT64_C(0xebd98778d11c1e81), + UINT64_C(0x64b116208142850a), UINT64_C(0x1e6966e8b1770c73), + UINT64_C(0x8719014c99c2b083), UINT64_C(0xfdc17184a9f739fa), + UINT64_C(0x72a9e0dcf9a9a271), UINT64_C(0x08719014c99c2b08), + UINT64_C(0x4721e43f0183060c), UINT64_C(0x3df994f731b68f75), + UINT64_C(0xb29105af61e814fe), UINT64_C(0xc849756751dd9d87), + UINT64_C(0x2c31edf8f1d64ef6), UINT64_C(0x56e99d30c1e3c78f), + UINT64_C(0xd9810c6891bd5c04), UINT64_C(0xa3597ca0a188d57d), + UINT64_C(0xec09088b6997f879), UINT64_C(0x96d1784359a27100), + UINT64_C(0x19b9e91b09fcea8b), UINT64_C(0x636199d339c963f2), + UINT64_C(0xdf7adabd7a6e2d6f), UINT64_C(0xa5a2aa754a5ba416), + UINT64_C(0x2aca3b2d1a053f9d), UINT64_C(0x50124be52a30b6e4), + UINT64_C(0x1f423fcee22f9be0), UINT64_C(0x659a4f06d21a1299), + UINT64_C(0xeaf2de5e82448912), UINT64_C(0x902aae96b271006b), + UINT64_C(0x74523609127ad31a), UINT64_C(0x0e8a46c1224f5a63), + UINT64_C(0x81e2d7997211c1e8), UINT64_C(0xfb3aa75142244891), + UINT64_C(0xb46ad37a8a3b6595), UINT64_C(0xceb2a3b2ba0eecec), + UINT64_C(0x41da32eaea507767), UINT64_C(0x3b024222da65fe1e), + UINT64_C(0xa2722586f2d042ee), UINT64_C(0xd8aa554ec2e5cb97), + UINT64_C(0x57c2c41692bb501c), UINT64_C(0x2d1ab4dea28ed965), + UINT64_C(0x624ac0f56a91f461), UINT64_C(0x1892b03d5aa47d18), + UINT64_C(0x97fa21650afae693), UINT64_C(0xed2251ad3acf6fea), + UINT64_C(0x095ac9329ac4bc9b), UINT64_C(0x7382b9faaaf135e2), + UINT64_C(0xfcea28a2faafae69), UINT64_C(0x8632586aca9a2710), + UINT64_C(0xc9622c4102850a14), UINT64_C(0xb3ba5c8932b0836d), + UINT64_C(0x3cd2cdd162ee18e6), UINT64_C(0x460abd1952db919f), + UINT64_C(0x256b24ca6b12f26d), UINT64_C(0x5fb354025b277b14), + UINT64_C(0xd0dbc55a0b79e09f), UINT64_C(0xaa03b5923b4c69e6), + UINT64_C(0xe553c1b9f35344e2), UINT64_C(0x9f8bb171c366cd9b), + UINT64_C(0x10e3202993385610), UINT64_C(0x6a3b50e1a30ddf69), + UINT64_C(0x8e43c87e03060c18), UINT64_C(0xf49bb8b633338561), + UINT64_C(0x7bf329ee636d1eea), UINT64_C(0x012b592653589793), + UINT64_C(0x4e7b2d0d9b47ba97), UINT64_C(0x34a35dc5ab7233ee), + UINT64_C(0xbbcbcc9dfb2ca865), UINT64_C(0xc113bc55cb19211c), + UINT64_C(0x5863dbf1e3ac9dec), UINT64_C(0x22bbab39d3991495), + UINT64_C(0xadd33a6183c78f1e), UINT64_C(0xd70b4aa9b3f20667), + UINT64_C(0x985b3e827bed2b63), UINT64_C(0xe2834e4a4bd8a21a), + UINT64_C(0x6debdf121b863991), UINT64_C(0x1733afda2bb3b0e8), + UINT64_C(0xf34b37458bb86399), UINT64_C(0x8993478dbb8deae0), + UINT64_C(0x06fbd6d5ebd3716b), UINT64_C(0x7c23a61ddbe6f812), + UINT64_C(0x3373d23613f9d516), UINT64_C(0x49aba2fe23cc5c6f), + UINT64_C(0xc6c333a67392c7e4), UINT64_C(0xbc1b436e43a74e9d), + UINT64_C(0x95ac9329ac4bc9b5), UINT64_C(0xef74e3e19c7e40cc), + UINT64_C(0x601c72b9cc20db47), UINT64_C(0x1ac40271fc15523e), + UINT64_C(0x5594765a340a7f3a), UINT64_C(0x2f4c0692043ff643), + UINT64_C(0xa02497ca54616dc8), UINT64_C(0xdafce7026454e4b1), + UINT64_C(0x3e847f9dc45f37c0), UINT64_C(0x445c0f55f46abeb9), + UINT64_C(0xcb349e0da4342532), UINT64_C(0xb1eceec59401ac4b), + UINT64_C(0xfebc9aee5c1e814f), UINT64_C(0x8464ea266c2b0836), + UINT64_C(0x0b0c7b7e3c7593bd), UINT64_C(0x71d40bb60c401ac4), + UINT64_C(0xe8a46c1224f5a634), UINT64_C(0x927c1cda14c02f4d), + UINT64_C(0x1d148d82449eb4c6), UINT64_C(0x67ccfd4a74ab3dbf), + UINT64_C(0x289c8961bcb410bb), UINT64_C(0x5244f9a98c8199c2), + UINT64_C(0xdd2c68f1dcdf0249), UINT64_C(0xa7f41839ecea8b30), + UINT64_C(0x438c80a64ce15841), UINT64_C(0x3954f06e7cd4d138), + UINT64_C(0xb63c61362c8a4ab3), UINT64_C(0xcce411fe1cbfc3ca), + UINT64_C(0x83b465d5d4a0eece), UINT64_C(0xf96c151de49567b7), + UINT64_C(0x76048445b4cbfc3c), UINT64_C(0x0cdcf48d84fe7545), + UINT64_C(0x6fbd6d5ebd3716b7), UINT64_C(0x15651d968d029fce), + UINT64_C(0x9a0d8ccedd5c0445), UINT64_C(0xe0d5fc06ed698d3c), + UINT64_C(0xaf85882d2576a038), UINT64_C(0xd55df8e515432941), + UINT64_C(0x5a3569bd451db2ca), UINT64_C(0x20ed197575283bb3), + UINT64_C(0xc49581ead523e8c2), UINT64_C(0xbe4df122e51661bb), + UINT64_C(0x3125607ab548fa30), UINT64_C(0x4bfd10b2857d7349), + UINT64_C(0x04ad64994d625e4d), UINT64_C(0x7e7514517d57d734), + UINT64_C(0xf11d85092d094cbf), UINT64_C(0x8bc5f5c11d3cc5c6), + UINT64_C(0x12b5926535897936), UINT64_C(0x686de2ad05bcf04f), + UINT64_C(0xe70573f555e26bc4), UINT64_C(0x9ddd033d65d7e2bd), + UINT64_C(0xd28d7716adc8cfb9), UINT64_C(0xa85507de9dfd46c0), + UINT64_C(0x273d9686cda3dd4b), UINT64_C(0x5de5e64efd965432), + UINT64_C(0xb99d7ed15d9d8743), UINT64_C(0xc3450e196da80e3a), + UINT64_C(0x4c2d9f413df695b1), UINT64_C(0x36f5ef890dc31cc8), + UINT64_C(0x79a59ba2c5dc31cc), UINT64_C(0x037deb6af5e9b8b5), + UINT64_C(0x8c157a32a5b7233e), UINT64_C(0xf6cd0afa9582aa47), + UINT64_C(0x4ad64994d625e4da), UINT64_C(0x300e395ce6106da3), + UINT64_C(0xbf66a804b64ef628), UINT64_C(0xc5bed8cc867b7f51), + UINT64_C(0x8aeeace74e645255), UINT64_C(0xf036dc2f7e51db2c), + UINT64_C(0x7f5e4d772e0f40a7), UINT64_C(0x05863dbf1e3ac9de), + UINT64_C(0xe1fea520be311aaf), UINT64_C(0x9b26d5e88e0493d6), + UINT64_C(0x144e44b0de5a085d), UINT64_C(0x6e963478ee6f8124), + UINT64_C(0x21c640532670ac20), UINT64_C(0x5b1e309b16452559), + UINT64_C(0xd476a1c3461bbed2), UINT64_C(0xaeaed10b762e37ab), + UINT64_C(0x37deb6af5e9b8b5b), UINT64_C(0x4d06c6676eae0222), + UINT64_C(0xc26e573f3ef099a9), UINT64_C(0xb8b627f70ec510d0), + UINT64_C(0xf7e653dcc6da3dd4), UINT64_C(0x8d3e2314f6efb4ad), + UINT64_C(0x0256b24ca6b12f26), UINT64_C(0x788ec2849684a65f), + UINT64_C(0x9cf65a1b368f752e), UINT64_C(0xe62e2ad306bafc57), + UINT64_C(0x6946bb8b56e467dc), UINT64_C(0x139ecb4366d1eea5), + UINT64_C(0x5ccebf68aecec3a1), UINT64_C(0x2616cfa09efb4ad8), + UINT64_C(0xa97e5ef8cea5d153), UINT64_C(0xd3a62e30fe90582a), + UINT64_C(0xb0c7b7e3c7593bd8), UINT64_C(0xca1fc72bf76cb2a1), + UINT64_C(0x45775673a732292a), UINT64_C(0x3faf26bb9707a053), + UINT64_C(0x70ff52905f188d57), UINT64_C(0x0a2722586f2d042e), + UINT64_C(0x854fb3003f739fa5), UINT64_C(0xff97c3c80f4616dc), + UINT64_C(0x1bef5b57af4dc5ad), UINT64_C(0x61372b9f9f784cd4), + UINT64_C(0xee5fbac7cf26d75f), UINT64_C(0x9487ca0fff135e26), + UINT64_C(0xdbd7be24370c7322), UINT64_C(0xa10fceec0739fa5b), + UINT64_C(0x2e675fb4576761d0), UINT64_C(0x54bf2f7c6752e8a9), + UINT64_C(0xcdcf48d84fe75459), UINT64_C(0xb71738107fd2dd20), + UINT64_C(0x387fa9482f8c46ab), UINT64_C(0x42a7d9801fb9cfd2), + UINT64_C(0x0df7adabd7a6e2d6), UINT64_C(0x772fdd63e7936baf), + UINT64_C(0xf8474c3bb7cdf024), UINT64_C(0x829f3cf387f8795d), + UINT64_C(0x66e7a46c27f3aa2c), UINT64_C(0x1c3fd4a417c62355), + UINT64_C(0x935745fc4798b8de), UINT64_C(0xe98f353477ad31a7), + UINT64_C(0xa6df411fbfb21ca3), UINT64_C(0xdc0731d78f8795da), + UINT64_C(0x536fa08fdfd90e51), UINT64_C(0x29b7d047efec8728), +}; + +uint64_t crc64(uint64_t crc, const char *str) +{ + uint8_t c; + + while ((c = *str++) != 0) + crc = crc64_byte(crc, c); + + return crc; +} + +uint64_t crc64i(uint64_t crc, const char *str) +{ + uint8_t c; + + while ((c = *str++) != 0) + crc = crc64_byte(crc, nasm_tolower(c)); + + return crc; +} + +uint64_t crc64b(uint64_t crc, const void *data, size_t len) +{ + const uint8_t *str = data; + + while (len--) + crc = crc64_byte(crc, *str++); + + return crc; +} + +uint64_t crc64ib(uint64_t crc, const void *data, size_t len) +{ + const uint8_t *str = data; + + while (len--) + crc = crc64_byte(crc, nasm_tolower(*str++)); + + return crc; +} diff --git a/src/nasmlib/file.c b/src/nasmlib/file.c new file mode 100644 index 0000000..9de4c23 --- /dev/null +++ b/src/nasmlib/file.c @@ -0,0 +1,427 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 1996-2017 The NASM Authors - All Rights Reserved */ + +#include "compiler.h" +#include "nasmlib.h" +#include "error.h" + +#ifdef HAVE_FCNTL_H +# include +#endif +#ifdef HAVE_SYS_STAT_H +# include +#endif +#ifdef HAVE_IO_H +# include +#endif +#ifdef HAVE_UNISTD_H +# include +#endif + +#ifndef R_OK +# define R_OK 4 /* Classic Unix constant, same on Windows */ +#endif + +#ifdef S_ISREG +/* all good */ +#elif defined(HAVE_S_ISREG) +/* exists, but not a macro */ +# define S_ISREG S_ISREG +#elif defined(S_IFMT) && defined(S_IFREG) +# define S_ISREG(m) (((m) & S_IFMT) == S_IFREG) +#elif defined(_S_IFMT) && defined(_S_IFREG) +# define S_ISREG(m) (((m) & _S_IFMT) == _S_IFREG) +#endif + +/* + * On Windows, we want to use _wfopen(), as fopen() has a much smaller limit + * on the path length that it supports. + * + * Previously we tried to prefix the path name with \\?\ in order to + * let the Windows kernel know that we are not limited to PATH_MAX + * characters, but it breaks relative paths among other things, and + * apparently Windows 10 contains a registry option to override this + * limit anyway... but only for the wide character interfaces. + */ +#ifdef _WIN32 +#include +#include + +typedef wchar_t *os_filename; +typedef wchar_t os_fopenflag; + +static os_filename os_mangle_filename(const char *filename) +{ + size_t wclen; + wchar_t *buf; + + wclen = MultiByteToWideChar(CP_ACP, MB_ERR_INVALID_CHARS, filename, + -1, NULL, 0); + if (!wclen) + return NULL; + + /* wclen is in "characters" (UTF-16 code points) */ + buf = nasm_malloc(wclen << 1); + + wclen = MultiByteToWideChar(CP_ACP, MB_ERR_INVALID_CHARS, filename, + -1, buf, wclen); + if (!wclen) { + nasm_free(buf); + return NULL; + } + + return buf; +} + +static inline void os_free_filename(os_filename filename) +{ + nasm_free(filename); +} + +# define os_fopen _wfopen +# define os_access _waccess +# define os_remove _wremove + +/* + * On Win32/64, we have to use the _wstati64() function. Note that + * we can't use _wstat64() without depending on a needlessly new + * version os MSVCRT. + */ + +typedef struct _stati64 os_struct_stat; + +# define os_stat _wstati64 +# define os_fstat _fstati64 + +static inline void os_set_binary_mode(FILE *f) { + int ret = _setmode(_fileno(f), _O_BINARY); + + if (ret == -1) { + nasm_fatalf(ERR_NOFILE, "unable to set file mode to binary: %s", + strerror(errno)); + } +} + +#else /* not _WIN32 */ + +typedef const char *os_filename; +typedef char os_fopenflag; + +static inline os_filename os_mangle_filename(const char *filename) +{ + return filename; +} +static inline void os_free_filename(os_filename filename) +{ + (void)filename; /* Nothing to do */ +} + +static inline void os_set_binary_mode(FILE *f) { + (void)f; +} + +# define os_fopen fopen +# define os_remove remove + +#if defined(HAVE_FACCESSAT) && defined(AT_EACCESS) +static inline int os_access(os_filename pathname, int mode) +{ + return faccessat(AT_FDCWD, pathname, mode, AT_EACCESS); +} +# define os_access os_access +#elif defined(HAVE_ACCESS) +# define os_access access +#endif + +#ifdef HAVE_STRUCT_STAT +typedef struct stat os_struct_stat; +# ifdef HAVE_STAT +# define os_stat stat +# endif +# ifdef HAVE_FSTAT +# define os_fstat fstat +# endif +#else +struct dummy_struct_stat { + int st_mode; + int st_size; +}; +typedef struct dummy_struct_stat os_struct_stat; +#endif + +#endif /* Not _WIN32 */ + +#ifdef fileno +/* all good */ +#elif defined(HAVE_FILENO) +/* exists, but not a macro */ +# define fileno fileno +#elif defined(_fileno) || defined(HAVE__FILENO) +# define fileno _fileno +#endif + +#ifndef S_ISREG +# undef os_stat +# undef os_fstat +#endif + +/* Disable these functions if they don't support something we need */ +#ifndef fileno +# undef os_fstat +# undef os_ftruncate +# undef HAVE_MMAP +#endif + +/* + * If we don't have functional versions of these functions, + * stub them out so we don't need so many #ifndefs + */ +#ifndef os_stat +static inline int os_stat(os_filename osfname, os_struct_stat *st) +{ + (void)osfname; + (void)st; + return -1; +} +#endif + +#ifndef os_fstat +static inline int os_fstat(int fd, os_struct_stat *st) +{ + (void)fd; + (void)st; + return -1; +} +#endif + +#ifndef S_ISREG +static inline bool S_ISREG(int m) +{ + (void)m; + return false; +} +#endif + +void nasm_set_binary_mode(FILE *f) +{ + os_set_binary_mode(f); +} + +FILE *nasm_open_read(const char *filename, enum file_flags flags) +{ + FILE *f = NULL; + os_filename osfname; + + osfname = os_mangle_filename(filename); + if (osfname) { + os_fopenflag fopen_flags[4]; + memset(fopen_flags, 0, sizeof fopen_flags); + + fopen_flags[0] = 'r'; + fopen_flags[1] = (flags & NF_TEXT) ? 't' : 'b'; + +#if defined(__GLIBC__) || defined(__linux__) + /* + * Try to open this file with memory mapping for speed, unless we are + * going to do it "manually" with nasm_map_file() + */ + if (!(flags & NF_FORMAP)) + fopen_flags[2] = 'm'; +#endif + + while (true) { + f = os_fopen(osfname, fopen_flags); + if (f || errno != EINVAL || !fopen_flags[2]) + break; + + /* We got EINVAL but with 'm'; try again without 'm' */ + fopen_flags[2] = '\0'; + } + + os_free_filename(osfname); + } + + if (!f && (flags & NF_FATAL)) + nasm_fatalf(ERR_NOFILE, "unable to open input file: `%s': %s", + filename, strerror(errno)); + + return f; +} + +FILE *nasm_open_write(const char *filename, enum file_flags flags) +{ + FILE *f = NULL; + os_filename osfname; + + osfname = os_mangle_filename(filename); + if (osfname) { + os_fopenflag fopen_flags[3]; + + fopen_flags[0] = 'w'; + fopen_flags[1] = (flags & NF_TEXT) ? 't' : 'b'; + fopen_flags[2] = '\0'; + + f = os_fopen(osfname, fopen_flags); + os_free_filename(osfname); + } + + if (!f && (flags & NF_FATAL)) + nasm_fatalf(ERR_NOFILE, "unable to open output file: `%s': %s", + filename, strerror(errno)); + + switch (flags & NF_BUF_MASK) { + case NF_IONBF: + setvbuf(f, NULL, _IONBF, 0); + break; + case NF_IOLBF: + setvbuf(f, NULL, _IOLBF, 0); + break; + case NF_IOFBF: + setvbuf(f, NULL, _IOFBF, 0); + break; + default: + break; + } + + return f; +} + +/* The appropriate "rb" strings for os_fopen() */ +static const os_fopenflag fopenflags_rb[3] = { 'r', 'b', 0 }; + +/* + * Report the existence of a file + */ +bool nasm_file_exists(const char *filename) +{ +#ifndef os_access + FILE *f; +#endif + os_filename osfname; + bool exists; + + osfname = os_mangle_filename(filename); + if (!osfname) + return false; + +#ifdef os_access + exists = os_access(osfname, R_OK) == 0; +#else + f = os_fopen(osfname, fopenflags_rb); + exists = f != NULL; + if (f) + fclose(f); +#endif + + os_free_filename(osfname); + return exists; +} + +/* + * Report the file size of an open file. This MAY move the file pointer. + */ +off_t nasm_file_size(FILE *f) +{ + off_t where, end; + os_struct_stat st; + + if (!os_fstat(fileno(f), &st) && S_ISREG(st.st_mode)) + return st.st_size; + + /* Do it the hard way... this tests for seekability */ + + if (fseeko(f, 0, SEEK_CUR)) + goto fail; /* Not seekable, don't even try */ + + where = ftello(f); + if (where == (off_t)-1) + goto fail; + + if (fseeko(f, 0, SEEK_END)) + goto fail; + + end = ftello(f); + if (end == (off_t)-1) + goto fail; + + /* + * Move the file pointer back. If this fails, this is probably + * not a plain file. + */ + if (fseeko(f, where, SEEK_SET)) + goto fail; + + return end; + +fail: + return -1; +} + +/* + * Report file size given pathname + */ +off_t nasm_file_size_by_path(const char *pathname) +{ + os_filename osfname; + off_t len = -1; + os_struct_stat st; + FILE *fp; + + osfname = os_mangle_filename(pathname); + + if (!os_stat(osfname, &st) && S_ISREG(st.st_mode)) + len = st.st_size; + + fp = os_fopen(osfname, fopenflags_rb); + if (fp) { + len = nasm_file_size(fp); + fclose(fp); + } + + return len; +} + +/* + * Report the timestamp on a file, returns true if successful + */ +bool nasm_file_time(time_t *t, const char *pathname) +{ +#ifdef os_stat + os_filename osfname; + os_struct_stat st; + bool rv = false; + + osfname = os_mangle_filename(pathname); + if (!osfname) + return false; + + rv = !os_stat(osfname, &st); + *t = st.st_mtime; + os_free_filename(osfname); + + return rv; +#else + return false; /* No idea how to do this on this OS */ +#endif +} + +/* + * Delete a file (allows NULL as input -> do nothing) + */ +int nasm_remove(const char *pathname) +{ + int rv; + os_filename osfname; + + if (!pathname || !*pathname) + return 0; + + osfname = os_mangle_filename(pathname); + if (!osfname) + return false; + + rv = os_remove(osfname); + os_free_filename(osfname); + + return rv; +} diff --git a/src/nasmlib/fileio.c b/src/nasmlib/fileio.c new file mode 100644 index 0000000..579b286 --- /dev/null +++ b/src/nasmlib/fileio.c @@ -0,0 +1,91 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 1996-2017 The NASM Authors - All Rights Reserved */ + +#include "compiler.h" +#include "nasmlib.h" +#include "error.h" + +void nasm_read(void *ptr, size_t size, FILE *f) +{ + size_t n = fread(ptr, 1, size, f); + if (ferror(f)) { + nasm_fatal("unable to read input: %s", strerror(errno)); + } else if (n != size || feof(f)) { + nasm_fatal("fatal short read on input"); + } +} + +void nasm_write(const void *ptr, size_t size, FILE *f) +{ + size_t n = fwrite(ptr, 1, size, f); + if (n != size || ferror(f) || feof(f)) + nasm_fatal("unable to write output: %s", strerror(errno)); +} + +void fwriteint16_t(uint16_t data, FILE * fp) +{ + data = htole16(data); + nasm_write(&data, 2, fp); +} + +void fwriteint32_t(uint32_t data, FILE * fp) +{ + data = htole32(data); + nasm_write(&data, 4, fp); +} + +void fwriteint64_t(uint64_t data, FILE * fp) +{ + data = htole64(data); + nasm_write(&data, 8, fp); +} + +void fwriteaddr(uint64_t data, int size, FILE * fp) +{ + data = htole64(data); + nasm_write(&data, size, fp); +} + +/* Can we adjust the file size without actually writing all the bytes? */ + +#ifdef HAVE_IO_H +# include +#endif +#ifdef HAVE_UNISTD_H +# include +#endif + +#ifdef HAVE__CHSIZE_S +# define os_ftruncate(fd,size) _chsize_s(fd,size) +#elif defined(HAVE__CHSIZE) +# define os_ftruncate(fd,size) _chsize(fd,size) +#elif defined(HAVE_FTRUNCATE) +# define os_ftruncate(fd,size) ftruncate(fd,size) +#endif + +void fwritezero(off_t bytes, FILE *fp) +{ + size_t blksize; + +#ifdef os_ftruncate + if (bytes >= BUFSIZ && !ferror(fp) && !feof(fp)) { + off_t pos = ftello(fp); + if (pos != (off_t)-1) { + off_t end = pos + bytes; + if (!fflush(fp) && !os_ftruncate(fileno(fp), end)) { + fseeko(fp, 0, SEEK_END); + pos = ftello(fp); + if (pos != (off_t)-1) + bytes = end - pos; /* This SHOULD be zero */ + } + } + } +#endif + + while (bytes > 0) { + blksize = (bytes < ZERO_BUF_SIZE) ? bytes : ZERO_BUF_SIZE; + + nasm_write(zero_buffer, blksize, fp); + bytes -= blksize; + } +} diff --git a/src/nasmlib/hashtbl.c b/src/nasmlib/hashtbl.c new file mode 100644 index 0000000..5faba36 --- /dev/null +++ b/src/nasmlib/hashtbl.c @@ -0,0 +1,261 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 1996-2018 The NASM Authors - All Rights Reserved */ + +/* + * hashtbl.c + * + * Efficient dictionary hash table class. + */ + +#include "compiler.h" + +#include "nasm.h" +#include "hashtbl.h" + +#define HASH_MAX_LOAD 2 /* Higher = more memory-efficient, slower */ +#define HASH_INIT_SIZE 16 /* Initial size (power of 2, min 4) */ + +#define hash_calc(key,keylen) crc64b(CRC64_INIT, (key), (keylen)) +#define hash_calci(key,keylen) crc64ib(CRC64_INIT, (key), (keylen)) +#define hash_max_load(size) ((size) * (HASH_MAX_LOAD - 1) / HASH_MAX_LOAD) +#define hash_expand(size) ((size) << 1) +#define hash_mask(size) ((size) - 1) +#define hash_pos(hash, mask) ((hash) & (mask)) +#define hash_inc(hash, mask) ((((hash) >> 32) & (mask)) | 1) /* always odd */ +#define hash_pos_next(pos, inc, mask) (((pos) + (inc)) & (mask)) + +static void hash_init(struct hash_table *head) +{ + head->size = HASH_INIT_SIZE; + head->load = 0; + head->max_load = hash_max_load(head->size); + nasm_newn(head->table, head->size); +} + +/* + * Find an entry in a hash table. The key can be any binary object. + * + * On failure, if "insert" is non-NULL, store data in that structure + * which can be used to insert that node using hash_add(). + * See hash_add() for constraints on the uses of the insert object. + * + * On success, return a pointer to the "data" element of the hash + * structure. + */ +void **hash_findb(struct hash_table *head, const void *key, + size_t keylen, struct hash_insert *insert) +{ + struct hash_node *np = NULL; + struct hash_node *tbl = head->table; + uint64_t hash = hash_calc(key, keylen); + size_t mask = hash_mask(head->size); + size_t pos = hash_pos(hash, mask); + size_t inc = hash_inc(hash, mask); + + if (likely(tbl)) { + while ((np = &tbl[pos])->key) { + if (hash == np->hash && + keylen == np->keylen && + !memcmp(key, np->key, keylen)) + return &np->data; + pos = hash_pos_next(pos, inc, mask); + } + } + + /* Not found. Store info for insert if requested. */ + if (insert) { + insert->node.hash = hash; + insert->node.key = key; + insert->node.keylen = keylen; + insert->node.data = NULL; + insert->head = head; + insert->where = np; + } + return NULL; +} + +/* + * Same as hash_findb(), but for a C string. + */ +void **hash_find(struct hash_table *head, const char *key, + struct hash_insert *insert) +{ + prefetch(key); + + return hash_findb(head, key, strlen(key)+1, insert); +} + +/* + * Same as hash_findb(), but for case-insensitive hashing. + */ +void **hash_findib(struct hash_table *head, const void *key, size_t keylen, + struct hash_insert *insert) +{ + struct hash_node *np = NULL; + struct hash_node *tbl = head->table; + uint64_t hash = hash_calci(key, keylen); + size_t mask = hash_mask(head->size); + size_t pos = hash_pos(hash, mask); + size_t inc = hash_inc(hash, mask); + + if (likely(tbl)) { + while ((np = &tbl[pos])->key) { + if (hash == np->hash && + keylen == np->keylen && + !nasm_memicmp(key, np->key, keylen)) + return &np->data; + pos = hash_pos_next(pos, inc, mask); + } + } + + /* Not found. Store info for insert if requested. */ + if (insert) { + insert->node.hash = hash; + insert->node.key = key; + insert->node.keylen = keylen; + insert->node.data = NULL; + insert->head = head; + insert->where = np; + } + return NULL; +} + +/* + * Same as hash_find(), but for case-insensitive hashing. + */ +void **hash_findi(struct hash_table *head, const char *key, + struct hash_insert *insert) +{ + prefetch(key); + + return hash_findib(head, key, strlen(key)+1, insert); +} + +/* + * Insert node. Return a pointer to the "data" element of the newly + * created hash node. + * + * The following constraints apply: + * 1. A call to hash_add() invalidates all other outstanding hash_insert + * objects; attempting to use them causes a wild pointer reference. + * 2. The key provided must exactly match the key passed to hash_find*(), + * but it does not have to point to the same storage address. The key + * buffer provided to this function must not be freed for the lifespan + * of the hash. NULL will use the same pointer that was passed to + * hash_find*(). + */ +void **hash_add(struct hash_insert *insert, const void *key, void *data) +{ + struct hash_table *head = insert->head; + struct hash_node *np = insert->where; + + if (unlikely(!np)) { + hash_init(head); + /* The hash table is empty, so we don't need to iterate here */ + np = &head->table[hash_pos(insert->node.hash, hash_mask(head->size))]; + } + + /* + * Insert node. We can always do this, even if we need to + * rebalance immediately after. + */ + *np = insert->node; + np->data = data; + if (key) + np->key = key; + + if (unlikely(++head->load > head->max_load)) { + /* Need to expand the table */ + size_t newsize = hash_expand(head->size); + struct hash_node *newtbl; + size_t mask = hash_mask(newsize); + struct hash_node *op, *xp; + size_t i; + + nasm_newn(newtbl, newsize); + + /* Rebalance all the entries */ + for (i = 0, op = head->table; i < head->size; i++, op++) { + if (op->key) { + size_t pos = hash_pos(op->hash, mask); + size_t inc = hash_inc(op->hash, mask); + + while ((xp = &newtbl[pos])->key) + pos = hash_pos_next(pos, inc, mask); + + *xp = *op; + if (op == np) + np = xp; + } + } + nasm_free(head->table); + + head->table = newtbl; + head->size = newsize; + head->max_load = hash_max_load(newsize); + } + + return &np->data; +} + +/* + * Iterate over all members of a hash set. For the first call, iter + * should be as initialized by hash_iterator_init(). Returns a struct + * hash_node representing the current object, or NULL if we have + * reached the end of the hash table. + * + * Calling hash_add() will invalidate the iterator. + */ +const struct hash_node *hash_iterate(struct hash_iterator *iter) +{ + const struct hash_table *head = iter->head; + const struct hash_node *cp = iter->next; + const struct hash_node *ep = head->table + head->size; + + /* For an empty table, cp == ep == NULL */ + while (cp < ep) { + if (cp->key) { + iter->next = cp+1; + return cp; + } + cp++; + } + + iter->next = head->table; + return NULL; +} + +/* + * Free the hash itself. Doesn't free the data elements; use + * hash_iterate() to do that first, if needed. This function is normally + * used when the hash data entries are either freed separately, or + * compound objects which can't be freed in a single operation. + */ +void hash_free(struct hash_table *head) +{ + void *p = head->table; + memset(head, 0, sizeof *head); + nasm_free(p); +} + +/* + * Frees the hash *and* all data elements. This is applicable only in + * the case where the data element is a single allocation. If the + * second argument is false, the key string is part of the data + * allocation or belongs to an allocation which will be freed + * separately, if it is true the keys are also freed. + */ +void hash_free_all(struct hash_table *head, bool free_keys) +{ + struct hash_iterator it; + const struct hash_node *np; + + hash_for_each(head, it, np) { + if (np->data) + nasm_free(np->data); + if (free_keys && np->key) + nasm_free((void *)np->key); + } + + hash_free(head); +} diff --git a/src/nasmlib/ilog2.c b/src/nasmlib/ilog2.c new file mode 100644 index 0000000..cba2224 --- /dev/null +++ b/src/nasmlib/ilog2.c @@ -0,0 +1,2 @@ +#define ILOG2_C +#include "ilog2.h" diff --git a/src/nasmlib/md5c.c b/src/nasmlib/md5c.c new file mode 100644 index 0000000..79cf4e0 --- /dev/null +++ b/src/nasmlib/md5c.c @@ -0,0 +1,246 @@ +/* + * This code implements the MD5 message-digest algorithm. + * The algorithm is due to Ron Rivest. This code was + * written by Colin Plumb in 1993, no copyright is claimed. + * This code is in the public domain; do with it what you wish. + * + * Equivalent code is available from RSA Data Security, Inc. + * This code has been tested against that, and is equivalent, + * except that you don't need to include two pages of legalese + * with every copy. + * + * To compute the message digest of a chunk of bytes, declare an + * MD5Context structure, pass it to MD5Init, call MD5Update as + * needed on buffers full of bytes, and then call MD5Final, which + * will fill a supplied 16-byte array with the digest. + */ + +#include "md5.h" + +#ifdef WORDS_LITTLEENDIAN +#define byteReverse(buf, len) /* Nothing */ +#else +static void byteReverse(unsigned char *buf, unsigned longs); + +/* + * Note: this code is harmless on little-endian machines. + */ +static void byteReverse(unsigned char *buf, unsigned longs) +{ + uint32_t t; + do { + t = (uint32_t) ((unsigned) buf[3] << 8 | buf[2]) << 16 | + ((unsigned) buf[1] << 8 | buf[0]); + *(uint32_t *) buf = t; + buf += 4; + } while (--longs); +} +#endif + +/* + * Start MD5 accumulation. Set bit count to 0 and buffer to mysterious + * initialization constants. + */ +void MD5Init(MD5_CTX *ctx) +{ + ctx->buf[0] = 0x67452301; + ctx->buf[1] = 0xefcdab89; + ctx->buf[2] = 0x98badcfe; + ctx->buf[3] = 0x10325476; + + ctx->bits[0] = 0; + ctx->bits[1] = 0; +} + +/* + * Update context to reflect the concatenation of another buffer full + * of bytes. + */ +void MD5Update(MD5_CTX *ctx, unsigned char const *buf, unsigned len) +{ + uint32_t t; + + /* Update bitcount */ + + t = ctx->bits[0]; + if ((ctx->bits[0] = t + ((uint32_t) len << 3)) < t) + ctx->bits[1]++; /* Carry from low to high */ + ctx->bits[1] += len >> 29; + + t = (t >> 3) & 0x3f; /* Bytes already in shsInfo->data */ + + /* Handle any leading odd-sized chunks */ + + if (t) { + unsigned char *p = (unsigned char *) ctx->in + t; + + t = 64 - t; + if (len < t) { + memcpy(p, buf, len); + return; + } + memcpy(p, buf, t); + byteReverse(ctx->in, 16); + MD5Transform(ctx->buf, (uint32_t *) ctx->in); + buf += t; + len -= t; + } + /* Process data in 64-byte chunks */ + + while (len >= 64) { + memcpy(ctx->in, buf, 64); + byteReverse(ctx->in, 16); + MD5Transform(ctx->buf, (uint32_t *) ctx->in); + buf += 64; + len -= 64; + } + + /* Handle any remaining bytes of data. */ + + memcpy(ctx->in, buf, len); +} + +/* + * Final wrapup - pad to 64-byte boundary with the bit pattern + * 1 0* (64-bit count of bits processed, MSB-first) + */ +void MD5Final(unsigned char digest[16], MD5_CTX *ctx) +{ + unsigned count; + unsigned char *p; + + /* Compute number of bytes mod 64 */ + count = (ctx->bits[0] >> 3) & 0x3F; + + /* Set the first char of padding to 0x80. This is safe since there is + always at least one byte free */ + p = ctx->in + count; + *p++ = 0x80; + + /* Bytes of padding needed to make 64 bytes */ + count = 64 - 1 - count; + + /* Pad out to 56 mod 64 */ + if (count < 8) { + /* Two lots of padding: Pad the first block to 64 bytes */ + memset(p, 0, count); + byteReverse(ctx->in, 16); + MD5Transform(ctx->buf, (uint32_t *) ctx->in); + + /* Now fill the next block with 56 bytes */ + memset(ctx->in, 0, 56); + } else { + /* Pad block to 56 bytes */ + memset(p, 0, count - 8); + } + byteReverse(ctx->in, 14); + + /* Append length in bits and transform */ + ((uint32_t *) ctx->in)[14] = ctx->bits[0]; + ((uint32_t *) ctx->in)[15] = ctx->bits[1]; + + MD5Transform(ctx->buf, (uint32_t *) ctx->in); + byteReverse((unsigned char *) ctx->buf, 4); + memcpy(digest, ctx->buf, 16); + memset((char *) ctx, 0, sizeof(*ctx)); /* In case it's sensitive */ +} + +/* The four core functions - F1 is optimized somewhat */ + +/* #define F1(x, y, z) (x & y | ~x & z) */ +#define F1(x, y, z) (z ^ (x & (y ^ z))) +#define F2(x, y, z) F1(z, x, y) +#define F3(x, y, z) (x ^ y ^ z) +#define F4(x, y, z) (y ^ (x | ~z)) + +/* This is the central step in the MD5 algorithm. */ +#define MD5STEP(f, w, x, y, z, data, s) \ + ( w += f(x, y, z) + data, w = w<>(32-s), w += x ) + +/* + * The core of the MD5 algorithm, this alters an existing MD5 hash to + * reflect the addition of 16 longwords of new data. MD5Update blocks + * the data and converts bytes into longwords for this routine. + */ +void MD5Transform(uint32_t buf[4], uint32_t const in[16]) +{ + register uint32_t a, b, c, d; + + a = buf[0]; + b = buf[1]; + c = buf[2]; + d = buf[3]; + + MD5STEP(F1, a, b, c, d, in[0] + 0xd76aa478, 7); + MD5STEP(F1, d, a, b, c, in[1] + 0xe8c7b756, 12); + MD5STEP(F1, c, d, a, b, in[2] + 0x242070db, 17); + MD5STEP(F1, b, c, d, a, in[3] + 0xc1bdceee, 22); + MD5STEP(F1, a, b, c, d, in[4] + 0xf57c0faf, 7); + MD5STEP(F1, d, a, b, c, in[5] + 0x4787c62a, 12); + MD5STEP(F1, c, d, a, b, in[6] + 0xa8304613, 17); + MD5STEP(F1, b, c, d, a, in[7] + 0xfd469501, 22); + MD5STEP(F1, a, b, c, d, in[8] + 0x698098d8, 7); + MD5STEP(F1, d, a, b, c, in[9] + 0x8b44f7af, 12); + MD5STEP(F1, c, d, a, b, in[10] + 0xffff5bb1, 17); + MD5STEP(F1, b, c, d, a, in[11] + 0x895cd7be, 22); + MD5STEP(F1, a, b, c, d, in[12] + 0x6b901122, 7); + MD5STEP(F1, d, a, b, c, in[13] + 0xfd987193, 12); + MD5STEP(F1, c, d, a, b, in[14] + 0xa679438e, 17); + MD5STEP(F1, b, c, d, a, in[15] + 0x49b40821, 22); + + MD5STEP(F2, a, b, c, d, in[1] + 0xf61e2562, 5); + MD5STEP(F2, d, a, b, c, in[6] + 0xc040b340, 9); + MD5STEP(F2, c, d, a, b, in[11] + 0x265e5a51, 14); + MD5STEP(F2, b, c, d, a, in[0] + 0xe9b6c7aa, 20); + MD5STEP(F2, a, b, c, d, in[5] + 0xd62f105d, 5); + MD5STEP(F2, d, a, b, c, in[10] + 0x02441453, 9); + MD5STEP(F2, c, d, a, b, in[15] + 0xd8a1e681, 14); + MD5STEP(F2, b, c, d, a, in[4] + 0xe7d3fbc8, 20); + MD5STEP(F2, a, b, c, d, in[9] + 0x21e1cde6, 5); + MD5STEP(F2, d, a, b, c, in[14] + 0xc33707d6, 9); + MD5STEP(F2, c, d, a, b, in[3] + 0xf4d50d87, 14); + MD5STEP(F2, b, c, d, a, in[8] + 0x455a14ed, 20); + MD5STEP(F2, a, b, c, d, in[13] + 0xa9e3e905, 5); + MD5STEP(F2, d, a, b, c, in[2] + 0xfcefa3f8, 9); + MD5STEP(F2, c, d, a, b, in[7] + 0x676f02d9, 14); + MD5STEP(F2, b, c, d, a, in[12] + 0x8d2a4c8a, 20); + + MD5STEP(F3, a, b, c, d, in[5] + 0xfffa3942, 4); + MD5STEP(F3, d, a, b, c, in[8] + 0x8771f681, 11); + MD5STEP(F3, c, d, a, b, in[11] + 0x6d9d6122, 16); + MD5STEP(F3, b, c, d, a, in[14] + 0xfde5380c, 23); + MD5STEP(F3, a, b, c, d, in[1] + 0xa4beea44, 4); + MD5STEP(F3, d, a, b, c, in[4] + 0x4bdecfa9, 11); + MD5STEP(F3, c, d, a, b, in[7] + 0xf6bb4b60, 16); + MD5STEP(F3, b, c, d, a, in[10] + 0xbebfbc70, 23); + MD5STEP(F3, a, b, c, d, in[13] + 0x289b7ec6, 4); + MD5STEP(F3, d, a, b, c, in[0] + 0xeaa127fa, 11); + MD5STEP(F3, c, d, a, b, in[3] + 0xd4ef3085, 16); + MD5STEP(F3, b, c, d, a, in[6] + 0x04881d05, 23); + MD5STEP(F3, a, b, c, d, in[9] + 0xd9d4d039, 4); + MD5STEP(F3, d, a, b, c, in[12] + 0xe6db99e5, 11); + MD5STEP(F3, c, d, a, b, in[15] + 0x1fa27cf8, 16); + MD5STEP(F3, b, c, d, a, in[2] + 0xc4ac5665, 23); + + MD5STEP(F4, a, b, c, d, in[0] + 0xf4292244, 6); + MD5STEP(F4, d, a, b, c, in[7] + 0x432aff97, 10); + MD5STEP(F4, c, d, a, b, in[14] + 0xab9423a7, 15); + MD5STEP(F4, b, c, d, a, in[5] + 0xfc93a039, 21); + MD5STEP(F4, a, b, c, d, in[12] + 0x655b59c3, 6); + MD5STEP(F4, d, a, b, c, in[3] + 0x8f0ccc92, 10); + MD5STEP(F4, c, d, a, b, in[10] + 0xffeff47d, 15); + MD5STEP(F4, b, c, d, a, in[1] + 0x85845dd1, 21); + MD5STEP(F4, a, b, c, d, in[8] + 0x6fa87e4f, 6); + MD5STEP(F4, d, a, b, c, in[15] + 0xfe2ce6e0, 10); + MD5STEP(F4, c, d, a, b, in[6] + 0xa3014314, 15); + MD5STEP(F4, b, c, d, a, in[13] + 0x4e0811a1, 21); + MD5STEP(F4, a, b, c, d, in[4] + 0xf7537e82, 6); + MD5STEP(F4, d, a, b, c, in[11] + 0xbd3af235, 10); + MD5STEP(F4, c, d, a, b, in[2] + 0x2ad7d2bb, 15); + MD5STEP(F4, b, c, d, a, in[9] + 0xeb86d391, 21); + + buf[0] += a; + buf[1] += b; + buf[2] += c; + buf[3] += d; +} diff --git a/src/nasmlib/mmap.c b/src/nasmlib/mmap.c new file mode 100644 index 0000000..0e4d1a4 --- /dev/null +++ b/src/nasmlib/mmap.c @@ -0,0 +1,122 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 1996-2017 The NASM Authors - All Rights Reserved */ + +#include "nasmlib.h" + +/* ----------------------------------------------------------------------- * + * Unix-style memory mapping, using mmap(). + * ----------------------------------------------------------------------- */ +#if defined(HAVE_FILENO) && defined(HAVE_MMAP) + +#ifdef HAVE_FCNTL_H +# include +#endif +#ifdef HAVE_SYS_STAT_H +# include +#endif +#ifdef HAVE_UNISTD_H +# include +#endif +#ifdef HAVE_SYS_MMAN_H +# include +#endif + +/* + * System page size + */ + +/* File scope since not all compilers like static data in inline functions */ +static size_t nasm_pagemask; + +static size_t get_pagemask(void) +{ + size_t ps = 0; + +# if defined(HAVE_SYSCONF) && defined(_SC_PAGESIZE) + ps = sysconf(_SC_PAGESIZE); +# elif defined(HAVE_GETPAGESIZE) + ps = getpagesize(); +# elif defined(PAGE_SIZE) + ps = PAGE_SIZE; +# endif + + nasm_pagemask = ps = is_power2(ps) ? (ps - 1) : 0; + return ps; +} + +static inline size_t pagemask(void) +{ + size_t pm = nasm_pagemask; + + if (unlikely(!pm)) + return get_pagemask(); + + return pm; +} + +/* + * Try to map an input file into memory + */ +const void *nasm_map_file(FILE *fp, off_t start, off_t len) +{ + const char *p; + off_t astart; /* Aligned start */ + size_t salign; /* Amount of start adjustment */ + size_t alen; /* Aligned length */ + const size_t page_mask = pagemask(); + + if (unlikely(!page_mask)) + return NULL; /* Page size undefined? */ + + if (unlikely(!len)) + return NULL; /* Mapping nothing... */ + + if (unlikely(len != (off_t)(size_t)len)) + return NULL; /* Address space insufficient */ + + astart = start & ~(off_t)page_mask; + salign = start - astart; + alen = (len + salign + page_mask) & ~page_mask; + + p = mmap(NULL, alen, PROT_READ, MAP_SHARED, fileno(fp), astart); + return unlikely(p == MAP_FAILED) ? NULL : p + salign; +} + +/* + * Unmap an input file + */ +void nasm_unmap_file(const void *p, size_t len) +{ + const size_t page_mask = pagemask(); + uintptr_t astart; + size_t salign; + size_t alen; + + if (unlikely(!page_mask)) + return; + + astart = (uintptr_t)p & ~(uintptr_t)page_mask; + salign = (uintptr_t)p - astart; + alen = (len + salign + page_mask) & ~page_mask; + + munmap((void *)astart, alen); +} + +/* ----------------------------------------------------------------------- * + * No memory map support at all + * XXX: Add a section with Windows support + * ----------------------------------------------------------------------- */ +#else + +const void *nasm_map_file(FILE *fp, off_t start, off_t len) +{ + (void)fp; (void)start; (void)len; + return NULL; +} + +void nasm_unmap_file(const void *p, size_t len) +{ + (void)p; (void)len; +} + +#endif diff --git a/src/nasmlib/nctype.c b/src/nasmlib/nctype.c new file mode 100644 index 0000000..0293f46 --- /dev/null +++ b/src/nasmlib/nctype.c @@ -0,0 +1,86 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 1996-2018 The NASM Authors - All Rights Reserved */ + +#include "nctype.h" +#include + +/* + * Table of tolower() results. This avoids function calls + * on some platforms. + */ +unsigned char nasm_tolower_tab[256]; + +static void tolower_tab_init(void) +{ + int i; + + for (i = 0; i < 256; i++) + nasm_tolower_tab[i] = tolower(i); +} + +/* + * Table of character type flags; some are simply , + * some are NASM-specific. + */ + +uint16_t nasm_ctype_tab[256]; + +#if !defined(HAVE_ISCNTRL) && !defined(iscntrl) +# define iscntrl(x) ((x) < 32) +#endif +#if !defined(HAVE_ISASCII) && !defined(isascii) +# define isascii(x) ((x) < 128) +#endif + +static void ctype_tab_init(void) +{ + int i; + + for (i = 0; i < 256; i++) { + enum nasm_ctype ct = 0; + + if (iscntrl(i)) + ct |= NCT_CTRL; + + if (isascii(i)) + ct |= NCT_ASCII; + + if (isspace(i) && i != '\n') + ct |= NCT_SPACE; + + if (isalpha(i)) { + ct |= (nasm_tolower(i) == i) ? NCT_LOWER : NCT_UPPER; + ct |= NCT_ID|NCT_IDSTART; + } + + if (isdigit(i)) + ct |= NCT_DIGIT|NCT_ID; + + if (isxdigit(i)) + ct |= NCT_HEX; + + /* Non-ASCII character, but no ctype returned (e.g. Unicode) */ + if (!ct && !ispunct(i)) + ct |= NCT_ID|NCT_IDSTART; + + nasm_ctype_tab[i] = ct; + } + + nasm_ctype_tab['-'] |= NCT_MINUS; + nasm_ctype_tab['$'] |= NCT_DOLLAR|NCT_ID; + nasm_ctype_tab['_'] |= NCT_UNDER|NCT_ID|NCT_IDSTART; + nasm_ctype_tab['.'] |= NCT_ID|NCT_IDSTART; + nasm_ctype_tab['@'] |= NCT_ID|NCT_IDSTART; + nasm_ctype_tab['?'] |= NCT_ID|NCT_IDSTART; + nasm_ctype_tab['#'] |= NCT_ID; + nasm_ctype_tab['~'] |= NCT_ID; + nasm_ctype_tab['\''] |= NCT_QUOTE; + nasm_ctype_tab['\"'] |= NCT_QUOTE; + nasm_ctype_tab['`'] |= NCT_QUOTE; +} + +void nasm_ctype_init(void) +{ + tolower_tab_init(); + ctype_tab_init(); +} diff --git a/src/nasmlib/numstr.c b/src/nasmlib/numstr.c new file mode 100644 index 0000000..e03cd86 --- /dev/null +++ b/src/nasmlib/numstr.c @@ -0,0 +1,52 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 2023-2025 The NASM Authors - All Rights Reserved */ + +#include "nasmlib.h" + +const char * const nasmlib_digit_chars[2] = { + /* Lower case version */ + "0123456789" + "abcdefghijklmnopqrstuvwxyz" + "ABCDEFGHIJKLMNOPQRSTUVWXYZ" + "@_", + + /* Upper case version */ + "0123456789" + "ABCDEFGHIJKLMNOPQRSTUVWXYZ" + "abcdefghijklmnopqrstuvwxyz" + "@_" +}; + +/* + * Produce an unsigned integer string from a number with a specified + * base, digits and signedness. + */ +int numstr(char *buf, size_t buflen, uint64_t n, + int digits, unsigned int base, bool ucase) +{ + const char * const dchars = nasm_digit_chars(ucase); + bool moredigits = digits <= 0; + char *p; + int len; + + if (unlikely(base < 2) || unlikely(base > NUMSTR_MAXBASE) || + unlikely(!buflen)) + return -1; + + if (moredigits) + digits = -digits; + + p = buf + buflen; + *--p = '\0'; + + while (p > buf && (digits-- > 0 || (moredigits && n))) { + *--p = dchars[n % base]; + n /= base; + } + + len = buflen - (p - buf); /* Including final null */ + if (p != buf) + memmove(buf, p, len); + + return len - 1; +} diff --git a/src/nasmlib/path.c b/src/nasmlib/path.c new file mode 100644 index 0000000..1d7ad87 --- /dev/null +++ b/src/nasmlib/path.c @@ -0,0 +1,230 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 2017-2025 The NASM Authors - All Rights Reserved */ + +/* + * path.c - host operating system specific pathname manipulation functions + * + * This file is inherently nonportable ... please help adjusting it to + * any new platforms that may be necessary. + */ + +#include "compiler.h" +#include "nasmlib.h" +#include "error.h" + +#define PATH_UNKNOWN 0 +#define PATH_UNIX 1 +#define PATH_MSDOS 2 +#define PATH_MACCLASSIC 3 +#define PATH_VMS 4 + +#ifdef PATHSTYLE +/* PATHSTYLE set externally, hope it is correct */ +#elif defined(__MSDOS__) || defined(__DOS__) || \ + defined(__WINDOWS__) || defined(_Windows) || \ + defined(__OS2__) || defined(_WIN16) || defined(WIN32) || defined(_WIN32) +/* + * MS-DOS, Windows and like operating systems + */ +# define PATHSTYLE PATH_MSDOS +#elif defined(unix) || defined(__unix) || defined(__unix__) || \ + defined(__UNIX__) || defined(__Unix__) || \ + defined(_POSIX_VERSION) || defined(_XOPEN_VERSION) || \ + defined(__MACH__) || defined(__BEOS__) || defined(__HAIKU__) +/* + * Unix and Unix-like operating systems and others using + * the equivalent syntax (slashes as only separators, no concept of volume) + * + * This must come after the __MSDOS__ section, since it seems that at + * least DJGPP defines __unix__ despite not being a Unix environment at all. + */ +# define PATHSTYLE PATH_UNIX +#elif defined(Macintosh) || defined(macintosh) +# define PATHSTYLE PATH_MACCLASSIC +#elif defined(__VMS) +/* VMS (only partially supported, really) */ +# define PATHSTYLE PATH_VMS +#else +/* Something else entirely? */ +# define PATHSTYLE PATH_UNKNOWN +#endif + +#if PATHSTYLE == PATH_MSDOS +# define separators "/\\:" +# define cleandirend "/\\" +# define catsep '\\' +# define leaveonclean 2 /* Leave \\ at the start alone */ +# define curdir "." +#elif PATHSTYLE == PATH_UNIX +# define separators "/" +# define cleandirend "/" +# define catsep '/' +# define leaveonclean 1 +# define curdir "." +#elif PATHSTYLE == PATH_MACCLASSIC +# define separators ":" +# define curdir ":" +# define catsep ':' +# define cleandirend ":" +# define leaveonclean 0 +# define leave_leading 1 +#elif PATHSTYLE == PATH_VMS +# define separators ":]" +# define curdir "[]" +# define postext ";" +#else +/* No idea what to do here, do nothing. Feel free to add new ones. */ +# define curdir "" +#endif + +#ifndef extsep +# define extsep '.' +#endif + +/* + * This is an inline, because most compilers can greatly simplify this + * for a fixed string, like we have here. + */ +static inline bool pure_func ismatch(const char *charset, char ch) +{ + if (charset && *charset) { + const char *p; + for (p = charset; *p; p++) { + if (ch == *p) + return true; + } + } + + return false; +} + +static inline const char * pure_func first_filename_char(const char *path) +{ +#ifdef separators + const char *p = strchr(path, '\0'); + + while (p > path) { + if (ismatch(separators, p[-1])) + return p; + p--; + } + + return p; +#else + return path; +#endif +} + +/* Return the filename portion of a PATH as a new string */ +char *nasm_basename(const char *path) +{ + return nasm_strdup(first_filename_char(path)); +} + +/* Return the directory name portion of a PATH as a new string */ +char *nasm_dirname(const char *path) +{ + const char *p = first_filename_char(path); + const char *p0 = p; + (void)p0; /* Don't warn if unused */ + + if (p == path) + return nasm_strdup(curdir); + +#ifdef cleandirend + while (p > path+leaveonclean) { + if (ismatch(cleandirend, p[-1])) + break; + p--; + } +#endif + +#ifdef leave_leading + /* If the directory contained ONLY separators, leave as-is */ + if (p == path+leaveonclean) + p = p0; +#endif + + return nasm_strndup(path, p-path); +} + +/* + * Concatenate a directory path and a filename. Note that this function + * currently does NOT handle the case where file itself contains + * directory components (except on Unix platforms, because it is trivial.) + */ +char *nasm_catfile(const char *dir, const char *file) +{ +#ifndef catsep + return nasm_strcat(dir, file); +#else + size_t dl = strlen(dir); + size_t fl = strlen(file); + char *p, *pp; + bool dosep = true; + + if (!dl || ismatch(separators, dir[dl-1])) { + /* No separator necessary */ + dosep = false; + } + + p = pp = nasm_malloc(dl + fl + dosep + 1); + + memcpy(pp, dir, dl); + pp += dl; + if (dosep) + *pp++ = catsep; + + memcpy(pp, file, fl+1); + + return p; +#endif +} + +/* + * Add/modify a filename extension. Returns a newly allocated + * string buffer. If the extension is not an empty string, the first + * character is replaced by the appropriate extsep for the filesystem. + */ +char *filename_set_extension(const char *inname, const char *extension) +{ + const char *nulp, *ep, *p; + char *outname, *q; + size_t elen = strlen(extension); + size_t baselen; + + ep = nulp = strchr(inname, '\0'); + for (p = nulp-1; p >= inname; p--) { + char c = *p; + if (c == extsep) { + /* Found the beginning of an existing extension */ + ep = p; + break; + } + if (ismatch(separators, c)) { + /* Found the beginning of the file name */ + ep = p+1; + break; + } +#ifdef postext + if (ismatch(postext, c)) { + /* Found the beginning of a character sequence + that should be stripped off; keep searching from here */ + ep = p; + continue; + } +#endif + } + baselen = ep - inname; + + q = outname = nasm_malloc(baselen + elen + 1); + q = mempcpy(q, inname, baselen); + if (!elen) { + *q = '\0'; + } else { + *q++ = extsep; + memcpy(q, extension+1, elen); /* Includes final null */ + } + + return outname; +} diff --git a/src/nasmlib/perfhash.c b/src/nasmlib/perfhash.c new file mode 100644 index 0000000..5bd4669 --- /dev/null +++ b/src/nasmlib/perfhash.c @@ -0,0 +1,25 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 2017 The NASM Authors - All Rights Reserved */ + +#include "perfhash.h" +#include "hashtbl.h" /* For crc64i() */ + +int perfhash_find(const struct perfect_hash *hash, const char *str) +{ + uint32_t k1, k2; + uint64_t crc; + uint16_t ix; + + crc = crc64i(hash->crcinit, str); + k1 = (uint32_t)crc & hash->hashmask; + k2 = ((uint32_t)(crc >> 32) & hash->hashmask) + 1; + + ix = hash->hashvals[k1] + hash->hashvals[k2]; + + if (ix >= hash->tbllen || + !hash->strings[ix] || + nasm_stricmp(str, hash->strings[ix])) + return hash->errval; + + return hash->tbloffs + ix; +} diff --git a/src/nasmlib/raa.c b/src/nasmlib/raa.c new file mode 100644 index 0000000..7015279 --- /dev/null +++ b/src/nasmlib/raa.c @@ -0,0 +1,169 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 1996-2018 The NASM Authors - All Rights Reserved */ + +#include "nasmlib.h" +#include "raa.h" +#include "ilog2.h" + +/* + * Routines to manage a dynamic random access array of int64_ts which + * may grow in size to be more than the largest single malloc'able + * chunk. + */ + +#define RAA_LAYERSHIFT 11 /* 2^this many items per layer */ +#define RAA_LAYERSIZE ((size_t)1 << RAA_LAYERSHIFT) +#define RAA_LAYERMASK (RAA_LAYERSIZE-1) + +typedef struct RAA RAA; +typedef union RAA_UNION RAA_UNION; +typedef struct RAA_LEAF RAA_LEAF; +typedef struct RAA_BRANCH RAA_BRANCH; + +struct RAA { + /* Last position in this RAA */ + raaindex endposn; + + /* + * Number of layers below this one to get to the real data. 0 + * means this structure is a leaf, holding RAA_LAYERSIZE real + * data items; 1 and above mean it's a branch, holding + * RAA_LAYERSIZE pointers to the next level branch or leaf + * structures. + */ + unsigned int layers; + + /* + * Number of real data items spanned by one position in the + * `data' array at this level. This number is 0 trivially, for + * a leaf (level 0): for a level n branch it should be + * n*RAA_LAYERSHIFT. + */ + unsigned int shift; + + /* + * The actual data + */ + union RAA_UNION { + struct RAA_LEAF { + union intorptr data[RAA_LAYERSIZE]; + } l; + struct RAA_BRANCH { + struct RAA *data[RAA_LAYERSIZE]; + } b; + } u; +}; + +#define LEAFSIZ (sizeof(RAA)-sizeof(RAA_UNION)+sizeof(RAA_LEAF)) +#define BRANCHSIZ (sizeof(RAA)-sizeof(RAA_UNION)+sizeof(RAA_BRANCH)) + +static struct RAA *raa_init_layer(raaindex posn, unsigned int layers) +{ + struct RAA *r; + raaindex posmask; + + r = nasm_zalloc((layers == 0) ? LEAFSIZ : BRANCHSIZ); + r->shift = layers * RAA_LAYERSHIFT; + r->layers = layers; + posmask = ((raaindex)RAA_LAYERSIZE << r->shift) - 1; + r->endposn = posn | posmask; + return r; +} + +void raa_free(struct RAA *r) +{ + if (!r) + return; + + if (r->layers) { + struct RAA **p = r->u.b.data; + size_t i; + for (i = 0; i < RAA_LAYERSIZE; i++) + raa_free(*p++); + } + nasm_free(r); +} + +static const union intorptr * pure_func +real_raa_read(struct RAA *r, raaindex posn) +{ + nasm_assert(posn <= (~(raaindex)0 >> 1)); + + if (unlikely(!r || posn > r->endposn)) + return NULL; /* Beyond the end */ + + while (r->layers) { + size_t l = (posn >> r->shift) & RAA_LAYERMASK; + r = r->u.b.data[l]; + if (!r) + return NULL; /* Not present */ + } + return &r->u.l.data[posn & RAA_LAYERMASK]; +} + +int64_t raa_read(struct RAA *r, raaindex pos) +{ + const union intorptr *ip; + + ip = real_raa_read(r, pos); + return ip ? ip->i : 0; +} + +void *raa_read_ptr(struct RAA *r, raaindex pos) +{ + const union intorptr *ip; + + ip = real_raa_read(r, pos); + return ip ? ip->p : NULL; +} + + +static struct RAA * +real_raa_write(struct RAA *r, raaindex posn, union intorptr value) +{ + struct RAA *result; + + nasm_assert(posn <= (~(raaindex)0 >> 1)); + + if (unlikely(!r)) { + /* Create a new top-level RAA */ + r = raa_init_layer(posn, ilog2_64(posn)/RAA_LAYERSHIFT); + } else { + while (unlikely(r->endposn < posn)) { + /* We need to add layers to an existing RAA */ + struct RAA *s = raa_init_layer(r->endposn, r->layers + 1); + s->u.b.data[0] = r; + r = s; + } + } + + result = r; + + while (r->layers) { + struct RAA **s; + size_t l = (posn >> r->shift) & RAA_LAYERMASK; + s = &r->u.b.data[l]; + if (unlikely(!*s)) + *s = raa_init_layer(posn, r->layers - 1); + r = *s; + } + r->u.l.data[posn & RAA_LAYERMASK] = value; + + return result; +} + +struct RAA *raa_write(struct RAA *r, raaindex posn, int64_t value) +{ + union intorptr ip; + + ip.i = value; + return real_raa_write(r, posn, ip); +} + +struct RAA *raa_write_ptr(struct RAA *r, raaindex posn, void *value) +{ + union intorptr ip; + + ip.p = value; + return real_raa_write(r, posn, ip); +} diff --git a/src/nasmlib/rbtree.c b/src/nasmlib/rbtree.c new file mode 100644 index 0000000..65288fe --- /dev/null +++ b/src/nasmlib/rbtree.c @@ -0,0 +1,229 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 1996-2020 The NASM Authors - All Rights Reserved */ + +/* + * rbtree.c + * + * Simple implementation of a "left-leaning threaded red-black tree" + * with 64-bit integer keys. The search operation will return the + * highest node <= the key; only search and insert are supported, but + * additional standard llrbtree operations can be coded up at will. + * + * See http://www.cs.princeton.edu/~rs/talks/LLRB/RedBlack.pdf for + * information about left-leaning red-black trees. + * + * The "threaded" part means that left and right pointers that would + * otherwise be NULL are pointers to the in-order predecessor or + * successor node. The only pointers that are NULL are the very left- + * and rightmost, for which no corresponding side node exists. + * + * This, among other things, allows for efficient predecessor and + * successor operations without requiring dedicated space for a parent + * pointer. + * + * This implementation is robust for identical key values; such keys + * will not have their insertion order preserved, and after insertion + * of unrelated keys a lookup may return a different node for the + * duplicated key, but the prev/next operations will always enumerate + * all entries. + * + * The NULL pointers at the end are considered predecessor/successor + * pointers, so if the corresponding flags are clear it is always safe + * to access the pointed-to object without an explicit NULL pointer + * check. + */ + +#include "rbtree.h" +#include "nasmlib.h" + +struct rbtree *rb_search(const struct rbtree *tree, uint64_t key) +{ + const struct rbtree *best = NULL; + + if (tree) { + while (true) { + if (tree->key > key) { + if (tree->m.flags & RBTREE_NODE_PRED) + break; + tree = tree->m.left; + } else { + best = tree; + if (tree->key == key || (tree->m.flags & RBTREE_NODE_SUCC)) + break; + tree = tree->m.right; + } + } + } + return (struct rbtree *)best; +} + +struct rbtree *rb_search_exact(const struct rbtree *tree, uint64_t key) +{ + struct rbtree *rv; + + rv = rb_search(tree, key); + return (rv && rv->key == key) ? rv : NULL; +} + +/* Reds two left in a row? */ +static inline bool is_red_left_left(struct rbtree *h) +{ + return !(h->m.flags & RBTREE_NODE_PRED) && + !(h->m.left->m.flags & (RBTREE_NODE_BLACK|RBTREE_NODE_PRED)) && + !(h->m.left->m.left->m.flags & RBTREE_NODE_BLACK); +} + +/* Node to the right is red? */ +static inline bool is_red_right(struct rbtree *h) +{ + return !(h->m.flags & RBTREE_NODE_SUCC) && + !(h->m.right->m.flags & RBTREE_NODE_BLACK); +} + +/* Both the left and right hand nodes are red? */ +static inline bool is_red_both(struct rbtree *h) +{ + return !(h->m.flags & (RBTREE_NODE_PRED|RBTREE_NODE_SUCC)) + && !(h->m.left->m.flags & h->m.right->m.flags & RBTREE_NODE_BLACK); +} + +static inline struct rbtree *rotate_left(struct rbtree *h) +{ + struct rbtree *x = h->m.right; + enum rbtree_node_flags hf = h->m.flags; + enum rbtree_node_flags xf = x->m.flags; + + if (xf & RBTREE_NODE_PRED) { + h->m.right = x; + h->m.flags = (hf & RBTREE_NODE_PRED) | RBTREE_NODE_SUCC; + } else { + h->m.right = x->m.left; + h->m.flags = hf & RBTREE_NODE_PRED; + } + x->m.flags = (hf & RBTREE_NODE_BLACK) | (xf & RBTREE_NODE_SUCC); + x->m.left = h; + + return x; +} + +static inline struct rbtree *rotate_right(struct rbtree *h) +{ + struct rbtree *x = h->m.left; + enum rbtree_node_flags hf = h->m.flags; + enum rbtree_node_flags xf = x->m.flags; + + if (xf & RBTREE_NODE_SUCC) { + h->m.left = x; + h->m.flags = (hf & RBTREE_NODE_SUCC) | RBTREE_NODE_PRED; + } else { + h->m.left = x->m.right; + h->m.flags = hf & RBTREE_NODE_SUCC; + } + x->m.flags = (hf & RBTREE_NODE_BLACK) | (xf & RBTREE_NODE_PRED); + x->m.right = h; + + return x; +} + +static inline void color_flip(struct rbtree *h) +{ + h->m.flags ^= RBTREE_NODE_BLACK; + h->m.left->m.flags ^= RBTREE_NODE_BLACK; + h->m.right->m.flags ^= RBTREE_NODE_BLACK; +} + +static struct rbtree * +_rb_insert(struct rbtree *tree, struct rbtree *node); + +struct rbtree *rb_insert(struct rbtree *tree, struct rbtree *node) +{ + /* Initialize node as if it was the sole member of the tree */ + + nasm_zero(node->m); + node->m.flags = RBTREE_NODE_PRED|RBTREE_NODE_SUCC; + + if (unlikely(!tree)) + return node; + + return _rb_insert(tree, node); +} + +static struct rbtree * +_rb_insert(struct rbtree *tree, struct rbtree *node) +{ + /* Recursive part of the algorithm */ + + /* Red on both sides? */ + if (is_red_both(tree)) + color_flip(tree); + + if (node->key < tree->key) { + node->m.right = tree; /* Potential successor */ + if (tree->m.flags & RBTREE_NODE_PRED) { + node->m.left = tree->m.left; + tree->m.flags &= ~RBTREE_NODE_PRED; + tree->m.left = node; + } else { + tree->m.left = _rb_insert(tree->m.left, node); + } + } else { + node->m.left = tree; /* Potential predecessor */ + if (tree->m.flags & RBTREE_NODE_SUCC) { + node->m.right = tree->m.right; + tree->m.flags &= ~RBTREE_NODE_SUCC; + tree->m.right = node; + } else { + tree->m.right = _rb_insert(tree->m.right, node); + } + } + + if (is_red_right(tree)) + tree = rotate_left(tree); + + if (is_red_left_left(tree)) + tree = rotate_right(tree); + + return tree; +} + +struct rbtree *rb_first(const struct rbtree *tree) +{ + if (unlikely(!tree)) + return NULL; + + while (!(tree->m.flags & RBTREE_NODE_PRED)) + tree = tree->m.left; + + return (struct rbtree *)tree; +} + +struct rbtree *rb_last(const struct rbtree *tree) +{ + if (unlikely(!tree)) + return NULL; + + while (!(tree->m.flags & RBTREE_NODE_SUCC)) + tree = tree->m.right; + + return (struct rbtree *)tree; +} + +struct rbtree *rb_prev(const struct rbtree *node) +{ + struct rbtree *np = node->m.left; + + if (node->m.flags & RBTREE_NODE_PRED) + return np; + else + return rb_last(np); +} + +struct rbtree *rb_next(const struct rbtree *node) +{ + struct rbtree *np = node->m.right; + + if (node->m.flags & RBTREE_NODE_SUCC) + return np; + else + return rb_first(np); +} diff --git a/src/nasmlib/readnum.c b/src/nasmlib/readnum.c new file mode 100644 index 0000000..5a004b7 --- /dev/null +++ b/src/nasmlib/readnum.c @@ -0,0 +1,125 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 1996-2025 The NASM Authors - All Rights Reserved */ + +/* + * nasmlib.c library routines for the Netwide Assembler + */ + +#include "compiler.h" + +#include "nctype.h" +#include "nasmlib.h" +#include "nasm.h" +#include "error.h" + +#define lib_isnumchar(c) (nasm_isalnum(c) || (c) == '$' || (c) == '_') + +int64_t readnum(const char *str, bool *error) +{ + const char *r = str, *q; + int32_t pradix, sradix, radix; + int plen, slen, len; + uint64_t result, checklimit; + int digit, last; + bool warn = false; + int sign = 1; + + if (error) + *error = true; + + while (nasm_isspace(*r)) + r++; /* find start of number */ + + /* + * If the number came from make_tok_num (as a result of an %assign), it + * might have a '-' built into it (rather than in a preceding token). + */ + if (*r == '-') { + r++; + sign = -1; + } + + q = r; + + while (lib_isnumchar(*q)) + q++; /* find end of number */ + + len = q-r; + if (!len) { + /* Not numeric */ + return 0; + } + + /* + * Handle radix formats: + * + * 0 + * $ (hexadecimal) + * + */ + pradix = sradix = 0; + plen = slen = 0; + + if (len > 2 && *r == '0' && (pradix = radix_letter(r[1])) != 0) { + plen = 2; + } else if (len > 1 && *r == '$' && globl.dollarhex) { + /* Warning here would probably duplicate warnings */ + pradix = 16, plen = 1; + } + + if (len > 1 && (sradix = radix_letter(q[-1])) != 0) + slen = 1; + + if (pradix > sradix) { + radix = pradix; + r += plen; + } else if (sradix > pradix) { + radix = sradix; + q -= slen; + } else { + /* Either decimal, or invalid -- if invalid, we'll trip up + further down. */ + radix = 10; + } + + /* + * `checklimit' must be 2**64 / radix. We can't do that in + * 64-bit arithmetic, which we're (probably) using, so we + * cheat: since we know that all radices we use are even, we + * can divide 2**63 by radix/2 instead. + */ + checklimit = UINT64_C(0x8000000000000000) / (radix >> 1); + + /* + * Calculate the highest allowable value for the last digit of a + * 64-bit constant... in radix 10, it is 6, otherwise it is 0 + */ + last = (radix == 10 ? 6 : 0); + + result = 0; + while (*r && r < q) { + if (*r != '_') { + if (*r < '0' || (*r > '9' && *r < 'A') + || (digit = numvalue(*r)) >= radix) { + return 0; + } + if (result > checklimit || + (result == checklimit && digit >= last)) { + warn = true; + } + + result = radix * result + digit; + } + r++; + } + + if (warn) { + nasm_warn(WARN_NUMBER_OVERFLOW, + "numeric constant %s does not fit in 64 bits", + str); + } + + if (error) + *error = false; + return result * sign; +} diff --git a/src/nasmlib/realpath.c b/src/nasmlib/realpath.c new file mode 100644 index 0000000..8ba0b0e --- /dev/null +++ b/src/nasmlib/realpath.c @@ -0,0 +1,103 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 2016 The NASM Authors - All Rights Reserved */ + +/* + * realpath.c As system-independent as possible implementation of realpath() + */ + +#include "compiler.h" + +#include +#ifdef HAVE_UNISTD_H +# include +#endif +#ifdef HAVE_SYS_PARAM_H +# include +#endif + +#include "nasmlib.h" + +#ifdef HAVE_CANONICALIZE_FILE_NAME + +/* + * GNU-specific, but avoids the realpath(..., NULL) + * portability problem if it exists. + */ +char *nasm_realpath(const char *rel_path) +{ + char *rp = canonicalize_file_name(rel_path); + return rp ? rp : nasm_strdup(rel_path); +} + +#elif defined(HAVE_REALPATH) + +/* + * POSIX.1-2008 defines realpath(..., NULL); POSIX.1-2001 doesn't guarantee + * that a NULL second argument is supported. + */ + +char *nasm_realpath(const char *rel_path) +{ + char *rp; + + rp = realpath(rel_path, NULL); + + /* Not all implementations of realpath() support a NULL second argument */ + if (!rp && errno == EINVAL) { + long path_max = -1; + char *rp; + +#if defined(HAVE_PATHCONF) && defined(_PC_PATH_MAX) + path_max = pathconf(rel_path, _PC_PATH_MAX); /* POSIX */ +#endif + + if (path_max < 0) { +#ifdef PATH_MAX + path_max = PATH_MAX; /* SUSv2 */ +#elif defined(MAXPATHLEN) + path_max = MAXPATHLEN; /* Solaris */ +#else + path_max = 65536; /* Crazily high, we hope */ +#endif + } + + rp = nasm_malloc(path_max); + + if (!realpath(rel_path, rp)) { + nasm_free(rp); + rp = NULL; + } else { + /* On some systems, pathconf() can return a very large value */ + + rp[path_max - 1] = '\0'; /* Just in case overrun is possible */ + rp = nasm_realloc(rp, strlen(rp) + 1); + } + } + + return rp ? rp : nasm_strdup(rel_path); +} + +#elif defined(HAVE__FULLPATH) + +/* + * win32/win64 API + */ + +char *nasm_realpath(const char *rel_path) +{ + char *rp = _fullpath(NULL, rel_path, 0); + return rp ? rp : nasm_strdup(rel_path); +} + +#else + +/* + * There is nothing we know how to do here, so hope it just works anyway. + */ + +char *nasm_realpath(const char *rel_path) +{ + return nasm_strdup(rel_path); +} + +#endif diff --git a/src/nasmlib/rlimit.c b/src/nasmlib/rlimit.c new file mode 100644 index 0000000..9e926a1 --- /dev/null +++ b/src/nasmlib/rlimit.c @@ -0,0 +1,48 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 2020 The NASM Authors - All Rights Reserved */ + +#include "compiler.h" +#include "nasmlib.h" + +#ifdef HAVE_SYS_RESOURCE_H +# include +#endif + +#if defined(HAVE_GETRLIMIT) && defined(RLIMIT_STACK) + +size_t nasm_get_stack_size_limit(void) +{ + struct rlimit rl; + + if (getrlimit(RLIMIT_STACK, &rl)) + return SIZE_MAX; + +# ifdef RLIM_SAVED_MAX + if (rl.rlim_cur == RLIM_SAVED_MAX) + rl.rlim_cur = rl.rlim_max; +# endif + + if ( +# ifdef RLIM_INFINITY + rl.rlim_cur >= RLIM_INFINITY || +# endif +# ifdef RLIM_SAVED_CUR + rl.rlim_cur == RLIM_SAVED_CUR || +# endif +# ifdef RLIM_SAVED_MAX + rl.rlim_cur == RLIM_SAVED_MAX || +# endif + (size_t)rl.rlim_cur != rl.rlim_cur) + return SIZE_MAX; + + return rl.rlim_cur; +} + +#else + +size_t nasm_get_stack_size_limit(void) +{ + return SIZE_MAX; +} + +#endif diff --git a/src/nasmlib/saa.c b/src/nasmlib/saa.c new file mode 100644 index 0000000..2a25d7f --- /dev/null +++ b/src/nasmlib/saa.c @@ -0,0 +1,356 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 1996-2017 The NASM Authors - All Rights Reserved */ + +#include "compiler.h" +#include "nasmlib.h" +#include "ilog2.h" +#include "saa.h" + +/* Aggregate SAA components smaller than this */ +#define SAA_BLKSHIFT 16 +#define SAA_BLKLEN ((size_t)1 << SAA_BLKSHIFT) + +struct SAA *saa_init(size_t elem_len) +{ + struct SAA *s; + char *data; + + s = nasm_zalloc(sizeof(struct SAA)); + + if (elem_len >= SAA_BLKLEN) + s->blk_len = elem_len; + else + s->blk_len = SAA_BLKLEN - (SAA_BLKLEN % elem_len); + + s->elem_len = elem_len; + s->length = s->blk_len; + data = nasm_malloc(s->blk_len); + s->nblkptrs = s->nblks = 1; + s->blk_ptrs = nasm_malloc(sizeof(char *)); + s->blk_ptrs[0] = data; + s->wblk = s->rblk = &s->blk_ptrs[0]; + + return s; +} + +void saa_free(struct SAA *s) +{ + char **p; + size_t n; + + for (p = s->blk_ptrs, n = s->nblks; n; p++, n--) + nasm_free(*p); + + nasm_free(s->blk_ptrs); + nasm_free(s); +} + +/* Add one allocation block to an SAA */ +static void saa_extend(struct SAA *s) +{ + size_t blkn = s->nblks++; + + if (blkn >= s->nblkptrs) { + size_t rindex = s->rblk - s->blk_ptrs; + size_t windex = s->wblk - s->blk_ptrs; + + s->nblkptrs <<= 1; + s->blk_ptrs = + nasm_realloc(s->blk_ptrs, s->nblkptrs * sizeof(char *)); + + s->rblk = s->blk_ptrs + rindex; + s->wblk = s->blk_ptrs + windex; + } + + s->blk_ptrs[blkn] = nasm_malloc(s->blk_len); + s->length += s->blk_len; +} + +void *saa_wstruct(struct SAA *s) +{ + void *p; + + nasm_assert((s->wpos % s->elem_len) == 0); + + if (s->wpos + s->elem_len > s->blk_len) { + nasm_assert(s->wpos == s->blk_len); + if (s->wptr + s->elem_len > s->length) + saa_extend(s); + s->wblk++; + s->wpos = 0; + } + + p = *s->wblk + s->wpos; + s->wpos += s->elem_len; + s->wptr += s->elem_len; + + if (s->wptr > s->datalen) + s->datalen = s->wptr; + + return p; +} + +void saa_wbytes(struct SAA *s, const void *data, size_t len) +{ + const char *d = data; + + while (len) { + size_t l = s->blk_len - s->wpos; + if (l > len) + l = len; + if (l) { + if (d) { + memcpy(*s->wblk + s->wpos, d, l); + d += l; + } else + memset(*s->wblk + s->wpos, 0, l); + s->wpos += l; + s->wptr += l; + len -= l; + + if (s->datalen < s->wptr) + s->datalen = s->wptr; + } + if (len) { + if (s->wptr >= s->length) + saa_extend(s); + s->wblk++; + s->wpos = 0; + } + } +} + +/* + * Writes a string, *including* the final null, to the specified SAA, + * and return the number of bytes written. + */ +size_t saa_wcstring(struct SAA *s, const char *str) +{ + size_t bytes = strlen(str) + 1; + + saa_wbytes(s, str, bytes); + + return bytes; +} + +void saa_rewind(struct SAA *s) +{ + s->rblk = s->blk_ptrs; + s->rpos = s->rptr = 0; +} + +void *saa_rstruct(struct SAA *s) +{ + void *p; + + if (s->rptr + s->elem_len > s->datalen) + return NULL; + + nasm_assert((s->rpos % s->elem_len) == 0); + + if (s->rpos + s->elem_len > s->blk_len) { + s->rblk++; + s->rpos = 0; + } + + p = *s->rblk + s->rpos; + s->rpos += s->elem_len; + s->rptr += s->elem_len; + + return p; +} + +const void *saa_rbytes(struct SAA *s, size_t * lenp) +{ + const void *p; + size_t len; + + if (s->rptr >= s->datalen) { + *lenp = 0; + return NULL; + } + + if (s->rpos >= s->blk_len) { + s->rblk++; + s->rpos = 0; + } + + len = *lenp; + if (len > s->datalen - s->rptr) + len = s->datalen - s->rptr; + if (len > s->blk_len - s->rpos) + len = s->blk_len - s->rpos; + + *lenp = len; + p = *s->rblk + s->rpos; + + s->rpos += len; + s->rptr += len; + + return p; +} + +void saa_rnbytes(struct SAA *s, void *data, size_t len) +{ + char *d = data; + + nasm_assert(s->rptr + len <= s->datalen); + + while (len) { + size_t l; + const void *p; + + l = len; + p = saa_rbytes(s, &l); + + memcpy(d, p, l); + d += l; + len -= l; + } +} + +/* Same as saa_rnbytes, except position the counter first */ +void saa_fread(struct SAA *s, size_t posn, void *data, size_t len) +{ + size_t ix; + + nasm_assert(posn + len <= s->datalen); + + if (likely(s->blk_len == SAA_BLKLEN)) { + ix = posn >> SAA_BLKSHIFT; + s->rpos = posn & (SAA_BLKLEN - 1); + } else { + ix = posn / s->blk_len; + s->rpos = posn % s->blk_len; + } + s->rptr = posn; + s->rblk = &s->blk_ptrs[ix]; + + saa_rnbytes(s, data, len); +} + +/* Same as saa_wbytes, except position the counter first */ +void saa_fwrite(struct SAA *s, size_t posn, const void *data, size_t len) +{ + size_t ix; + size_t padding = 0; + + if (posn > s->datalen) { + padding = posn - s->datalen; + posn = s->datalen; + } + + if (likely(s->blk_len == SAA_BLKLEN)) { + ix = posn >> SAA_BLKSHIFT; + s->wpos = posn & (SAA_BLKLEN - 1); + } else { + ix = posn / s->blk_len; + s->wpos = posn % s->blk_len; + } + s->wptr = posn; + s->wblk = &s->blk_ptrs[ix]; + + if (!s->wpos) { + s->wpos = s->blk_len; + s->wblk--; + } + + if (padding) + saa_wbytes(s, NULL, padding); + + saa_wbytes(s, data, len); +} + +void saa_fpwrite(struct SAA *s, FILE * fp) +{ + const char *data; + size_t len; + + saa_rewind(s); + while (len = s->datalen, (data = saa_rbytes(s, &len)) != NULL) + nasm_write(data, len, fp); +} + +void saa_write8(struct SAA *s, uint8_t v) +{ + saa_wbytes(s, &v, 1); +} + +void saa_write16(struct SAA *s, uint16_t v) +{ + v = htole16(v); + saa_wbytes(s, &v, 2); +} + +void saa_write32(struct SAA *s, uint32_t v) +{ + v = htole32(v); + saa_wbytes(s, &v, 4); +} + +void saa_write64(struct SAA *s, uint64_t v) +{ + v = htole64(v); + saa_wbytes(s, &v, 8); +} + +void saa_writeaddr(struct SAA *s, uint64_t v, size_t len) +{ + v = htole64(v); + saa_wbytes(s, &v, len); +} + +/* + * Write an LEB128 value to an SAA. Each byte contains 7 bits of + * payload in littleendian order, with the topmost bit indicating + * continuation. + * + * For the signed format, the sign bit needs to be included, even if + * it zero, so may generate an encoding that would be invalid for + * the unsigned format, e.g 127: + * + * unsigned: 7F + * signed: FF 00 + * + * Thus, the >> 6 instead of >> 7 in the exit test for the signed + * version. + */ +void saa_wleb128u(struct SAA *s, uint64_t value) +{ + uint8_t buf[sizeof(value)*2]; /* Very conservative allocation :) */ + uint8_t *p = buf; + uint8_t byte; + + while (1) { + byte = value & 127; + value >>= 7; + if (!value) { + *p++ = byte; + break; + } + byte |= 0x80; + *p++ = byte; + } + saa_wbytes(s, buf, p-buf); +} + +/* write a signed LEB128 value to SAA */ +void saa_wleb128s(struct SAA *s, int64_t value) +{ + uint8_t buf[sizeof(value)*2]; /* Very conservative allocation :) */ + uint8_t *p = buf; + uint8_t byte; + int64_t sign = value >> 63; + + while (1) { + byte = value & 127; + if ((value >> 6) == sign) { + *p++ = byte; + break; + } + value >>= 7; + byte |= 0x80; + *p++ = byte; + } + saa_wbytes(s, buf, p-buf); +} diff --git a/src/nasmlib/string.c b/src/nasmlib/string.c new file mode 100644 index 0000000..e3704a9 --- /dev/null +++ b/src/nasmlib/string.c @@ -0,0 +1,194 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 1996-2016 The NASM Authors - All Rights Reserved */ + +/* + * nasmlib.c library routines for the Netwide Assembler + */ + +#include "compiler.h" +#include "nasmlib.h" +#include "nctype.h" + +#ifndef nasm_stricmp +int nasm_stricmp(const char *s1, const char *s2) +{ + unsigned char c1, c2; + int d; + + while (1) { + c1 = nasm_tolower(*s1++); + c2 = nasm_tolower(*s2++); + d = c1-c2; + + if (d) + return d; + if (!c1) + break; + } + return 0; +} +#endif + +#ifndef nasm_strnicmp +int nasm_strnicmp(const char *s1, const char *s2, size_t n) +{ + unsigned char c1, c2; + int d; + + while (n--) { + c1 = nasm_tolower(*s1++); + c2 = nasm_tolower(*s2++); + d = c1-c2; + + if (d) + return d; + if (!c1) + break; + } + return 0; +} +#endif + +int nasm_memicmp(const char *s1, const char *s2, size_t n) +{ + unsigned char c1, c2; + int d; + + while (n--) { + c1 = nasm_tolower(*s1++); + c2 = nasm_tolower(*s2++); + d = c1-c2; + if (d) + return d; + } + return 0; +} + +#ifndef nasm_strsep +char *nasm_strsep(char **stringp, const char *delim) +{ + char *s = *stringp; + char *e; + + if (!s) + return NULL; + + e = strpbrk(s, delim); + if (e) + *e++ = '\0'; + + *stringp = e; + return s; +} +#endif + +/* skip leading spaces */ +char *nasm_skip_spaces(const char *p) +{ + if (p) + while (*p && nasm_isspace(*p)) + p++; + return (char *)p; +} + +/* skip leading non-spaces */ +char *nasm_skip_word(const char *p) +{ + if (p) + while (*p && !nasm_isspace(*p)) + p++; + return (char *)p; +} + +/* zap leading spaces with zero */ +char *nasm_zap_spaces_fwd(char *p) +{ + if (p) + while (*p && nasm_isspace(*p)) + *p++ = 0x0; + return p; +} + +/* zap spaces with zero in reverse order */ +char *nasm_zap_spaces_rev(char *p) +{ + if (p) + while (*p && nasm_isspace(*p)) + *p-- = 0x0; + return p; +} + +/* zap leading and trailing spaces */ +char *nasm_trim_spaces(char *p) +{ + p = nasm_zap_spaces_fwd(p); + nasm_zap_spaces_fwd(nasm_skip_word(p)); + + return p; +} + +/* + * return the word extracted from a stream + * or NULL if nothing left + */ +char *nasm_get_word(char *p, char **tail) +{ + char *word = nasm_skip_spaces(p); + char *next = nasm_skip_word(word); + + if (word && *word) { + if (*next) + *next++ = '\0'; + } else + word = next = NULL; + + /* NOTE: the tail may start with spaces */ + *tail = next; + + return word; +} + +/* + * Extract "opt=val" values from the stream and + * returns "opt" + * + * Exceptions: + * 1) If "=val" passed the NULL returned though + * you may continue handling the tail via "next" + * 2) If "=" passed the NULL is returned and "val" + * is set to NULL as well + */ +char *nasm_opt_val(char *p, char **val, char **next) +{ + char *q, *nxt; + + *val = *next = NULL; + + p = nasm_get_word(p, &nxt); + if (!p) + return NULL; + + q = strchr(p, '='); + if (q) { + if (q == p) + p = NULL; + *q++='\0'; + if (*q) { + *val = q; + } else { + q = nasm_get_word(q + 1, &nxt); + if (q) + *val = q; + } + } else { + q = nasm_skip_spaces(nxt); + if (q && *q == '=') { + q = nasm_get_word(q + 1, &nxt); + if (q) + *val = q; + } + } + + *next = nxt; + return p; +} diff --git a/src/nasmlib/strlist.c b/src/nasmlib/strlist.c new file mode 100644 index 0000000..0da9e67 --- /dev/null +++ b/src/nasmlib/strlist.c @@ -0,0 +1,179 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 1996-2020 The NASM Authors - All Rights Reserved */ + +/* + * strlist.c - list of ordered strings, optionally made unique + */ + +#include "strlist.h" + +/* + * Create a string list. The list can be uniqizing or not. + */ +struct strlist *strlist_alloc(bool uniq) +{ + struct strlist *list = nasm_zalloc(sizeof(*list)); + list->tailp = &list->head; + list->uniq = uniq; + return list; +} + +/* + * Append a string to a string list. Return the entry pointer, which + * may be a pre-existing entry for a uniqizing list. + */ + +static const struct strlist_entry * +strlist_add_common(struct strlist *list, struct strlist_entry *e, + struct hash_insert *hi) +{ + e->offset = list->size; + e->next = NULL; + + *list->tailp = e; + list->tailp = &e->next; + list->nstr++; + list->size += e->size; + + if (list->uniq) + hash_add(hi, e->str, (void *)e); + + return e; +} + +const struct strlist_entry * +strlist_add(struct strlist *list, const char *str) +{ + struct strlist_entry *e; + struct hash_insert hi; + size_t size; + + prefetch(str); + + if (!list) + return NULL; + + size = strlen(str) + 1; + if (list->uniq) { + void **dp = hash_findb(&list->hash, str, size, &hi); + if (dp) + return *dp; + } + + /* Structure already has char[1] as EOS */ + e = nasm_malloc(sizeof(*e) - 1 + size); + e->size = size; + memcpy(e->str, str, size); + + return strlist_add_common(list, e, &hi); +} + +/* + * printf() to a string list + */ +const struct strlist_entry * +strlist_vprintf(struct strlist *list, const char *fmt, va_list ap) +{ + /* clang miscompiles offsetin() unless e is initialized here */ + struct strlist_entry *e = NULL; + struct hash_insert hi; + + if (!list) + return NULL; + + e = nasm_vaxprintf(offsetin(*e, str), fmt, ap); + e->size = nasm_last_string_size(); + + if (list->uniq) { + void **dp = hash_findb(&list->hash, e->str, e->size, &hi); + if (dp) { + nasm_free(e); + return *dp; + } + } + + return strlist_add_common(list, e, &hi); +} + +const struct strlist_entry * +strlist_printf(struct strlist *list, const char *fmt, ...) +{ + va_list ap; + const struct strlist_entry *e; + + va_start(ap, fmt); + e = strlist_vprintf(list, fmt, ap); + va_end(ap); + + return e; +} + +/* + * Free a string list. Sets the pointed to pointer to NULL. + */ +void strlist_free(struct strlist **listp) +{ + struct strlist *list = *listp; + struct strlist_entry *e, *tmp; + + if (!list) + return; + + if (list->uniq) + hash_free(&list->hash); + + list_for_each_safe(e, tmp, list->head) + nasm_free(e); + + nasm_free(list); + *listp = NULL; +} + +/* + * Search the string list for an entry. If found, return the entry pointer. + * Only possible on a uniqizing list. + */ +const struct strlist_entry * +strlist_find(const struct strlist *list, const char *str) +{ + void **hf; + + nasm_assert(list->uniq); + + hf = hash_find((struct hash_table *)&list->hash, str, NULL); + return hf ? *hf : NULL; +} + +/* + * Produce a linearized buffer containing the whole list, in order; + * The character "sep" is the separator between strings; this is + * typically either 0 or '\n'. strlist_size() will give the size of + * the returned buffer. + */ +void *strlist_linearize(const struct strlist *list, char sep) +{ + const struct strlist_entry *sl; + char *buf = nasm_malloc(list->size); + char *p = buf; + + strlist_for_each(sl, list) { + p = mempcpy(p, sl->str, sl->size); + p[-1] = sep; + } + + return buf; +} + +/* + * Output a string list to a file. The separator can be any string. + */ +void strlist_write(const struct strlist *list, const char *sep, FILE *f) +{ + const struct strlist_entry *sl; + size_t seplen = strlen(sep); + + strlist_for_each(sl, list) { + fwrite(sl->str, 1, sl->size - 1, f); + fwrite(sep, 1, seplen, f); + } +} diff --git a/src/nasmlib/ver.c b/src/nasmlib/ver.c new file mode 100644 index 0000000..174b68e --- /dev/null +++ b/src/nasmlib/ver.c @@ -0,0 +1,50 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 1996-2020 The NASM Authors - All Rights Reserved */ + +#include "ver.h" +#include "version.h" + +/* This is printed when entering nasm -v */ +const char nasm_version[] = NASM_VER; +const char nasm_date[] = __DATE__; +const char nasm_compile_options[] = "" +#ifdef DEBUG + " with -DDEBUG" +#endif + ; + +bool reproducible; /* Reproducible output */ + +/* These are used by some backends. For a reproducible build, + * these cannot contain version numbers. + */ +static const char * const _nasm_comment[2] = +{ + "The Netwide Assembler " NASM_VER, + "The Netwide Assembler" +}; + +static const char * const _nasm_signature[2] = { + "NASM " NASM_VER, + "NASM" +}; + +const char * pure_func nasm_comment(void) +{ + return _nasm_comment[reproducible]; +} + +size_t pure_func nasm_comment_len(void) +{ + return strlen(nasm_comment()); +} + +const char * pure_func nasm_signature(void) +{ + return _nasm_signature[reproducible]; +} + +size_t pure_func nasm_signature_len(void) +{ + return strlen(nasm_signature()); +} diff --git a/src/nasmlib/zerobuf.c b/src/nasmlib/zerobuf.c new file mode 100644 index 0000000..262f936 --- /dev/null +++ b/src/nasmlib/zerobuf.c @@ -0,0 +1,12 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 1996-2016 The NASM Authors - All Rights Reserved */ + +/* + * nasmlib.c library routines for the Netwide Assembler + */ + +#include "compiler.h" +#include "nasmlib.h" + +/* Uninitialized -> all zero by C spec */ +const uint8_t zero_buffer[ZERO_BUF_SIZE]; diff --git a/src/ndisasm.c b/src/ndisasm.c new file mode 100644 index 0000000..ec70869 --- /dev/null +++ b/src/ndisasm.c @@ -0,0 +1,409 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 1996-2025 The NASM Authors - All Rights Reserved */ + +/* + * ndisasm.c the Netwide Disassembler main module + */ + +#include "compiler.h" + +#include "nctype.h" +#include + +#include "insns.h" +#include "nasm.h" +#include "nasmlib.h" +#include "error.h" +#include "ver.h" +#include "sync.h" +#include "disasm.h" + +#include "zamenyator.h" + +const char *_progname; + +static int bpl = 8; /* bytes per line of hex dump */ + +static void output_ins(uint64_t, const uint8_t *, int, const char *); +static bool skip(off_t *posp, off_t dist, FILE *fp); + +int main(int argc, char **argv) +{ + uint8_t buffer[INSN_MAX * 2], *p; + const uint8_t *q; + char outbuf[256]; + char *pname = *argv; + char *filename = NULL; + uint64_t nextsync, synclen; + size_t lenread; + bool autosync = false; + int bits = 16, b; + bool eof; + iflag_t prefer; + bool rn_error; + uint64_t offset, dataread, datamax; + off_t fileoffs, initskip; + FILE *fp; + + _progname = argv[0]; + + reset_global_defaults(0); + nasm_ctype_init(); + iflag_clear_all(&prefer); + + offset = 0; + datamax = UINT64_C(-1); + initskip = 0; + + init_sync(); + + while (--argc) { + char *v, *vv, *p = *++argv; + if (*p == '-' && p[1]) { + p++; + while (*p) + switch (nasm_tolower(*p)) { + case 'a': /* auto or intelligent sync */ + case 'i': + autosync = true; + p++; + break; + case 'h': + usage(); + return 0; + case 'r': + case 'v': + fprintf(stderr, + "NDISASM version %s compiled on %s\n", + nasm_version, nasm_date); + return 0; + case 'u': /* -u for -b 32, -uu for -b 64 */ + if (bits < 64) + bits <<= 1; + p++; + break; + case 'l': + bits = 64; + p++; + break; + case 'w': + bpl = 16; + p++; + break; + case 'z': /* max number of bytes to read */ + v = p[1] ? p + 1 : --argc ? *++argv : NULL; + if (!v) { + fprintf(stderr, "%s: `-z' requires an argument\n", + pname); + return 1; + } + datamax = readnum(v, &rn_error); + if (rn_error) { + fprintf(stderr, + "%s: `-z' requires a numeric argument\n", + pname); + return 1; + } + p = ""; /* force to next argument */ + break; + + case 'b': /* bits */ + v = p[1] ? p + 1 : --argc ? *++argv : NULL; + if (!v) { + fprintf(stderr, "%s: `-b' requires an argument\n", + pname); + return 1; + } + b = readnum(v, &rn_error); + if (rn_error || + !(bits == 16 || bits == 32 || bits == 64)) { + fprintf(stderr, "%s: argument to `-b' should" + " be 16, 32 or 64\n", pname); + } else { + bits = b; + } + p = ""; /* force to next argument */ + break; + case 'o': /* origin */ + v = p[1] ? p + 1 : --argc ? *++argv : NULL; + if (!v) { + fprintf(stderr, "%s: `-o' requires an argument\n", + pname); + return 1; + } + offset = readnum(v, &rn_error); + if (rn_error) { + fprintf(stderr, + "%s: `-o' requires a numeric argument\n", + pname); + return 1; + } + p = ""; /* force to next argument */ + break; + case 's': /* sync point */ + v = p[1] ? p + 1 : --argc ? *++argv : NULL; + if (!v) { + fprintf(stderr, "%s: `-s' requires an argument\n", + pname); + return 1; + } + add_sync(readnum(v, &rn_error), 0L); + if (rn_error) { + fprintf(stderr, + "%s: `-s' requires a numeric argument\n", + pname); + return 1; + } + p = ""; /* force to next argument */ + break; + case 'e': /* skip a header */ + v = p[1] ? p + 1 : --argc ? *++argv : NULL; + if (!v) { + fprintf(stderr, "%s: `-e' requires an argument\n", + pname); + return 1; + } + initskip = readnum(v, &rn_error); + if (rn_error) { + fprintf(stderr, + "%s: `-e' requires a numeric argument\n", + pname); + return 1; + } + p = ""; /* force to next argument */ + break; + case 'k': /* skip a region */ + v = p[1] ? p + 1 : --argc ? *++argv : NULL; + if (!v) { + fprintf(stderr, "%s: `-k' requires an argument\n", + pname); + return 1; + } + vv = strchr(v, ','); + if (!vv) { + fprintf(stderr, + "%s: `-k' requires two numbers separated" + " by a comma\n", pname); + return 1; + } + *vv++ = '\0'; + nextsync = readnum(v, &rn_error); + if (rn_error) { + fprintf(stderr, + "%s: `-k' requires numeric arguments\n", + pname); + return 1; + } + synclen = readnum(vv, &rn_error); + if (rn_error) { + fprintf(stderr, + "%s: `-k' requires numeric arguments\n", + pname); + return 1; + } + add_sync(nextsync, synclen); + p = ""; /* force to next argument */ + break; + case 'p': /* preferred vendor */ + v = p[1] ? p + 1 : --argc ? *++argv : NULL; + if (!v) { + fprintf(stderr, "%s: `-p' requires an argument\n", + pname); + return 1; + } + if (!strcmp(v, "intel")) { + iflag_clear_all(&prefer); /* default */ + } else if (!strcmp(v, "amd")) { + iflag_clear_all(&prefer); + iflag_set(&prefer, IF_AMD); + iflag_set(&prefer, IF_3DNOW); + } else if (!strcmp(v, "cyrix")) { + iflag_clear_all(&prefer); + iflag_set(&prefer, IF_CYRIX); + iflag_set(&prefer, IF_3DNOW); + } else if (!strcmp(v, "idt") || + !strcmp(v, "centaur") || + !strcmp(v, "winchip")) { + iflag_clear_all(&prefer); + iflag_set(&prefer, IF_3DNOW); + } else { + fprintf(stderr, + "%s: unknown vendor `%s' specified with `-p'\n", + pname, v); + return 1; + } + p = ""; /* force to next argument */ + break; + default: /*bf */ + fprintf(stderr, "%s: unrecognised option `-%c'\n", + pname, *p); + return 1; + } + } else if (!filename) { + filename = p; + } else { + fprintf(stderr, "%s: more than one filename specified\n", + pname); + return 1; + } + } + + if (!filename) { + usage(); + return 1; + } + + if (strcmp(filename, "-")) { + fp = fopen(filename, "rb"); + if (!fp) { + fprintf(stderr, "%s: unable to open `%s': %s\n", + pname, filename, strerror(errno)); + return 1; + } + } else { + nasm_set_binary_mode(stdin); + fp = stdin; + } + + reset_global_defaults(bits); + + fileoffs = 0; + dataread = 0; + if (!skip(&fileoffs, initskip, fp)) + return 1; /* EOF before header */ + + /* + * This main loop is really horrible, and wants rewriting with + * an axe. It'll stay the way it is for a while though, until I + * find the energy... + */ + + q = p = buffer; + nextsync = next_sync(offset, &synclen); + lenread = 0; + eof = false; + + while (lenread > 0 || (dataread < datamax && !eof && !feof(fp))) { + size_t to_read = buffer + sizeof(buffer) - p; + if ((nextsync || synclen) && + to_read > nextsync - offset - (p - q)) + to_read = nextsync - offset - (p - q); + if (to_read > datamax - dataread) + to_read = datamax - dataread; + + lenread = 0; + if (to_read) { + lenread = fread(p, 1, to_read, fp); + dataread += lenread; + fileoffs += lenread; + p += lenread; + eof |= !lenread; /* help along systems with bad feof */ + } + + if ((nextsync || synclen) && offset == nextsync) { + if (synclen) { + fprintf(stdout, "%08"PRIX64" skipping 0x%"PRIX64" bytes\n", + offset, synclen); + offset += synclen; + dataread += synclen; + eof |= skip(&fileoffs, synclen, fp); + } + q = p = buffer; + nextsync = next_sync(offset, &synclen); + } + while (p > q && (p - q >= INSN_MAX || lenread == 0)) { + size_t lendis = disasm(q, INSN_MAX, outbuf, sizeof(outbuf), + bits, offset, autosync, &prefer); + if (!lendis || q + lendis > p || + ((nextsync || synclen) && lendis > nextsync - offset)) + lendis = eatbyte(*q, outbuf, sizeof(outbuf), bits); + output_ins(offset, q, lendis, outbuf); + q += lendis; + offset += lendis; + } + if (q >= buffer + INSN_MAX) { + int count = p - q; + memmove(buffer, q, count); + p -= (q - buffer); + q = buffer; + } + } + + if (fp != stdin) + fclose(fp); + + return 0; +} + + + +static void output_ins(uint64_t offset, const uint8_t *data, + int datalen, const char *insn) +{ + int bytes; + int addrwidth; + const char *translated = translate_insn(insn); // <-- МЕНЯЕМ НА translate_insn // <-- вызов заменятора + + addrwidth = fprintf(stdout, "%08"PRIX64" ", offset); + + bytes = 0; + while (datalen > 0 && bytes < bpl) { + fprintf(stdout, "%02X", *data++); + bytes++; + datalen--; + } + + fprintf(stdout, "%*s %s\n", (bpl - bytes) << 1, "", translated); + + while (datalen > 0) { + fprintf(stdout, "%*s", addrwidth, "-"); + bytes = 0; + while (datalen > 0 && bytes < bpl) { + fprintf(stdout, "%02X", *data++); + bytes++; + datalen--; + } + putchar('\n'); + } +} + +/* + * Skip a certain amount of data in a file, either by seeking if + * possible, or if that fails then by reading and discarding. + * Returns true if successful, false on EOF; updates posp. + */ +static bool skip(off_t *posp, off_t dist, FILE *fp) +{ + if (!dist) + return true; + + /* + * Got to be careful with fseek: at least one fseek I've tried + * doesn't approve of SEEK_CUR (WHICH ONE?). Weird... + */ + if (!fseeko(fp, *posp + dist, SEEK_SET)) { + *posp += dist; + } else { + off_t pos = ftello(fp); + if (pos != (off_t)-1) { + /* Possibly a partial seek? */ + dist -= (pos - *posp); + *posp = pos; + } + + while (dist > 0) { + static char junk_buf[BUFSIZ]; + size_t len = sizeof junk_buf; + size_t skipped; + if (dist < (off_t)len) + len = dist; + skipped = fread(junk_buf, 1, len, fp); + dist -= skipped; + *posp += skipped; + if (skipped < len) + return false; /* EOF */ + } + } + + return true; +} diff --git a/src/output/outform.c b/src/output/outform.c new file mode 100644 index 0000000..e2f0536 --- /dev/null +++ b/src/output/outform.c @@ -0,0 +1,105 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 1996-2011 The NASM Authors - All Rights Reserved */ + +/* + * outform.c manages a list of output formats, and associates + * them with their relevant drivers. Also has a + * routine to find the correct driver given a name + * for it + */ + +#include "compiler.h" + + +#define BUILD_DRIVERS_ARRAY +#include "outform.h" +#include "outlib.h" + +const struct ofmt *ofmt_find(const char *name, + const struct ofmt_alias **ofmt_alias) +{ + const struct ofmt * const *ofp; + const struct ofmt *of; + unsigned int i; + + *ofmt_alias = NULL; + + /* primary targets first */ + for (ofp = drivers; (of = *ofp); ofp++) { + if (!nasm_stricmp(name, of->shortname)) + return of; + } + + /* lets walk thru aliases then */ + for (i = 0; i < ARRAY_SIZE(ofmt_aliases); i++) { + if (ofmt_aliases[i].shortname && + !nasm_stricmp(name, ofmt_aliases[i].shortname)) { + *ofmt_alias = &ofmt_aliases[i]; + return ofmt_aliases[i].ofmt; + } + } + + return NULL; +} + +const struct dfmt *dfmt_find(const struct ofmt *ofmt, const char *name) +{ + const struct dfmt * const *dfp; + const struct dfmt *df; + + for (dfp = ofmt->debug_formats; (df = *dfp); dfp++) { + if (!nasm_stricmp(name, df->shortname)) + return df; + } + return NULL; +} + +void ofmt_list(const struct ofmt *deffmt, FILE * fp) +{ + const struct ofmt * const *ofp, *of; + unsigned int i; + + /* primary targets first */ + for (ofp = drivers; (of = *ofp); ofp++) { + fprintf(fp, " %-20s %s%s\n", + of->shortname, + of->fullname, + of == deffmt ? " [default]" : ""); + } + + /* lets walk through aliases then */ + for (i = 0; i < ARRAY_SIZE(ofmt_aliases); i++) { + if (!ofmt_aliases[i].shortname) + continue; + fprintf(fp, " %-20s Alias for \"%s\"\n", + ofmt_aliases[i].shortname, + ofmt_aliases[i].ofmt->shortname); + } +} + +void dfmt_list(FILE *fp) +{ + const struct ofmt * const *ofp; + const struct ofmt *of; + const struct dfmt * const *dfp; + const struct dfmt *df; + char prefixbuf[32]; + const char *prefix; + + for (ofp = drivers; (of = *ofp); ofp++) { + if (of->debug_formats && of->debug_formats != null_debug_arr) { + snprintf(prefixbuf, sizeof prefixbuf, "%s:", + of->shortname); + prefix = prefixbuf; + + for (dfp = of->debug_formats; (df = *dfp); dfp++) { + if (df != &null_debug_form) + fprintf(fp, " %-10s %-9s %s%s\n", + prefix, + df->shortname, df->fullname, + df == of->default_dfmt ? " [default]" : ""); + prefix = ""; + } + } + } +} diff --git a/src/output/outlib.c b/src/output/outlib.c new file mode 100644 index 0000000..b6daebc --- /dev/null +++ b/src/output/outlib.c @@ -0,0 +1,294 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 1996-2020 The NASM Authors - All Rights Reserved */ + +/* + * outlib.c + * + * Common routines for the output backends. + */ + +#include "outlib.h" +#include "raa.h" + +uint64_t realsize(enum out_type type, uint64_t size) +{ + switch (type) { + case OUT_REL1ADR: + return 1; + case OUT_REL2ADR: + return 2; + case OUT_REL4ADR: + return 4; + case OUT_REL8ADR: + return 8; + default: + return size; + } +} + +/* Common section/symbol handling */ + +struct ol_sect *_ol_sect_list; +uint64_t _ol_nsects; /* True sections, not external symbols */ +static struct ol_sect **ol_sect_tail = &_ol_sect_list; +static struct hash_table ol_secthash; +static struct RAA *ol_sect_index_tbl; + +struct ol_sym *_ol_sym_list; +uint64_t _ol_nsyms; +static struct ol_sym **ol_sym_tail = &_ol_sym_list; +static struct hash_table ol_symhash; + +void ol_init(void) +{ +} + +static void ol_free_symbols(void) +{ + struct ol_sym *s, *stmp; + + hash_free(&ol_symhash); + + list_for_each_safe(s, stmp, _ol_sym_list) { + nasm_free((char *)s->name); + nasm_free(s); + } + + _ol_nsyms = 0; + _ol_sym_list = NULL; + ol_sym_tail = &_ol_sym_list; +} + +static void ol_free_sections(void) +{ + struct ol_sect *s, *stmp; + + hash_free(&ol_secthash); + raa_free(ol_sect_index_tbl); + ol_sect_index_tbl = NULL; + + list_for_each_safe(s, stmp, _ol_sect_list) { + saa_free(s->data); + saa_free(s->reloc); + nasm_free((char *)s->name); + nasm_free(s); + } + + _ol_nsects = 0; + _ol_sect_list = NULL; + ol_sect_tail = &_ol_sect_list; +} + +void ol_cleanup(void) +{ + ol_free_symbols(); + ol_free_sections(); +} + +/* + * Allocate a section index and add a section, subsection, or external + * symbol to the section-by-index table. If the index provided is zero, + * allocate a new index via seg_alloc(). + */ +static uint32_t ol_seg_alloc(void *s, uint32_t ix) +{ + if (!ix) + ix = seg_alloc(); + ol_sect_index_tbl = raa_write_ptr(ol_sect_index_tbl, ix >> 1, s); + return ix; +} + +/* + * Find a section or create a new section structure if it does not exist + * and allocate it an index value via seg_alloc(). + */ +struct ol_sect *_ol_get_sect(const char *name, size_t ssize, size_t rsize) +{ + struct ol_sect *s, **sp; + struct hash_insert hi; + + sp = (struct ol_sect **)hash_find(&ol_secthash, name, &hi); + if (sp) + return *sp; + + s = nasm_zalloc(ssize); + s->syml.tail = &s->syml.head; + s->name = nasm_strdup(name); + s->data = saa_init(1); + s->reloc = saa_init(rsize); + *ol_sect_tail = s; + ol_sect_tail = &s->next; + _ol_nsects++; + s->index = s->subindex = ol_seg_alloc(s, 0); + + hash_add(&hi, s->name, s); + return s; +} + +/* Find a section by name without creating one */ +struct ol_sect *_ol_sect_by_name(const char *name) +{ + struct ol_sect **sp; + + sp = (struct ol_sect **)hash_find(&ol_secthash, name, NULL); + return sp ? *sp : NULL; +} + +/* Find a section or external symbol by index; NULL if not valid */ +struct ol_sect *_ol_sect_by_index(int32_t index) +{ + uint32_t ix = index; + + if (unlikely(ix >= SEG_ABS)) + return NULL; + + return raa_read_ptr(ol_sect_index_tbl, ix >> 1); +} + +/* + * Start a new subsection for the given section. At the moment, once a + * subsection has been created, it is not possible to revert to an + * earlier subsection. ol_sect_by_index() will return the main section + * structure. Returns the new section index. This is used to prevent + * the front end from optimizing across subsection boundaries. + */ +int32_t _ol_new_subsection(struct ol_sect *sect) +{ + if (unlikely(!sect)) + return NO_SEG; + + return sect->subindex = ol_seg_alloc(sect, 0); +} + +/* + * Insert a symbol into a list; need to use upcasting using container_of() + * to walk the list later. + */ +static void ol_add_sym_to(struct ol_symlist *syml, struct ol_symhead *head, + uint64_t offset) +{ + syml->tree.key = offset; + head->tree = rb_insert(head->tree, &syml->tree); + *head->tail = syml; + head->tail = &syml->next; + head->n++; +} + +/* + * Create a location structure from seg:offs + */ +void ol_mkloc(struct ol_loc *loc, int64_t offs, int32_t seg) +{ + nasm_zero(*loc); + loc->offs = offs; + + if (unlikely((uint32_t)seg >= SEG_ABS)) { + if (likely(seg == NO_SEG)) { + loc->seg.t = OS_NOSEG; + } else { + loc->seg.t = OS_ABS; + loc->seg.index = seg - SEG_ABS; + } + } else { + loc->seg.index = seg & ~1; + loc->seg.t = OS_SECT | (seg & 1); + loc->seg.s.sect = _ol_sect_by_index(loc->seg.index); + } +} + +/* + * Create a new symbol. If this symbol is OS_OFFS, add it to the relevant + * section, too. If the symbol already exists, return NULL; this is + * different from ol_get_section() as a single section may be invoked + * many times. On the contrary, the front end will prevent a single symbol + * from being defined more than once. + * + * If flags has OF_GLOBAL set, add it to the global symbol hash for + * the containing section if applicable. + * + * If flags has OF_IMPSEC set, allocate a segment index for it via + * seg_alloc() unless v->index is already set, and add it to the + * section by index list. + */ +struct ol_sym *_ol_new_sym(const char *name, const struct ol_loc *v, + uint32_t flags, size_t size) +{ + struct hash_insert hi; + struct ol_sym *sym; + + if (hash_find(&ol_symhash, name, &hi)) + return NULL; /* Symbol already exists */ + + flags |= OF_SYMBOL; + + sym = nasm_zalloc(size); + sym->name = nasm_strdup(name); + sym->v = *v; + + if (sym->v.seg.t & OS_SECT) { + struct ol_sect *sect = sym->v.seg.s.sect; + + if (!sect || (sect->flags & OF_SYMBOL)) + /* Must be an external or common reference */ + flags |= OF_IMPSEC; + + if (flags & OF_IMPSEC) { + /* Metasection */ + if (!sym->v.seg.s.sym) { + sym->v.seg.s.sym = sym; + sym->v.seg.index = ol_seg_alloc(sym, sym->v.seg.index); + } + } else if (sym->v.seg.t == OS_OFFS) { + struct ol_sect * const sect = sym->v.seg.s.sect; + const uint64_t offs = sym->v.offs; + + ol_add_sym_to(&sym->syml, §->syml, offs); + if (flags & OF_GLOBAL) + ol_add_sym_to(&sym->symg, §->symg, offs); + } + } + sym->flags = flags; + + *ol_sym_tail = sym; + ol_sym_tail = &sym->next; + _ol_nsyms++; + + hash_add(&hi, sym->name, sym); + return sym; +} + +/* Find a symbol in the global namespace */ +struct ol_sym *_ol_sym_by_name(const char *name) +{ + struct ol_sym **symp; + + symp = (struct ol_sym **)hash_find(&ol_symhash, name, NULL); + return symp ? *symp : NULL; +} + +/* + * Find a symbol by address in a specific section. If no symbol is defined + * at that exact address, return the immediately previously defined one. + * If global is set, then only return global symbols. + */ +struct ol_sym *_ol_sym_by_address(struct ol_sect *sect, int64_t addr, + bool global) +{ + struct ol_symhead *head; + size_t t_offs; + struct rbtree *t; + + if (global) { + head = §->symg; + t_offs = offsetof(struct ol_sym, symg.tree); + } else { + head = §->syml; + t_offs = offsetof(struct ol_sym, syml.tree); + } + + t = rb_search(head->tree, addr); + if (!t) + return NULL; + + return (struct ol_sym *)((char *)t - t_offs); +} diff --git a/src/prefix.c b/src/prefix.c new file mode 100644 index 0000000..59145cd --- /dev/null +++ b/src/prefix.c @@ -0,0 +1,480 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 2025 The NASM Authors - All Rights Reserved */ + +#include "disasm.h" +#include "nasmlib.h" + +/* + * Parse various register combinations. Note that this does NOT + * generate the REX_[BXR][1V] flags, as they are not used by the + * disassembler. + */ +static uint32_t +xbits(uint32_t val, unsigned int from, unsigned int count, unsigned int to) +{ + const uint32_t tomask = ((UINT32_C(1) << count)-1) << to; + + if (to < from) + return (val >> (from-to)) & tomask; + else + return (val << (to-from)) & tomask; +} + +/* ------ EVEX decoding ------ */ + +#define EVEX_INVERTED 0x087cf000 + +static uint32_t +evexbits(uint32_t val, unsigned int from, unsigned int count, unsigned int to) +{ + return xbits(val ^ EVEX_INVERTED, from, count, to); +} + +static uint32_t evex_rreg(uint32_t evex) +{ + return evexbits(evex,15,1,3) + evexbits(evex,12,1,4); +} +static uint32_t evex_xreg(uint32_t evex, bool xv) +{ + uint32_t x = evexbits(evex,14,1,3); + x += evexbits(evex,xv ? 27 : 18,1,4); + return x; +} +static uint32_t evex_breg(uint32_t evex, bool bv) +{ + uint32_t b = evexbits(evex,13,1,3); + b += evexbits(evex,bv ? 14 : 11,1,4); + return b; +} +static uint32_t evex_vreg(uint32_t evex, bool xv) +{ + uint32_t v = evexbits(evex,19,4,0); + if (!xv) + v += evexbits(evex,27,1,4); + return v; +} +static uint32_t evex_aaa(uint32_t evex) +{ + return evexbits(evex,24,3,0); +} +static uint32_t evex_z(uint32_t evex) +{ + return evexbits(evex,31,1,0); +} +static uint32_t evex_l(uint32_t evex) +{ + return evexbits(evex,29,2,0); +} +static uint32_t evex_b(uint32_t evex) +{ + return evexbits(evex,28,1,0); +} +static uint32_t evex_nf(uint32_t evex) +{ + return evexbits(evex,26,1,0); +} +static uint32_t evex_scc(uint32_t evex) +{ + return evexbits(evex,24,4,0); +} +static uint32_t evex_dfl(uint32_t evex) +{ + return evexbits(evex,19,4,0); +} +static uint32_t evex_map(uint32_t evex) +{ + return evexbits(evex,8,3,0); +} +static uint32_t evex_w(uint32_t evex) +{ + return evexbits(evex,23,1,0); +} +static uint32_t evex_pp(uint32_t evex) +{ + return evexbits(evex,16,2,0); +} + +/* ------ VEX3 decoding ------ */ + +static uint32_t vex2to3(uint32_t vex2) +{ + return (vex2 & 0x80fe) + ((vex2 & 0x7f00) << 8) + 0x6100; +} + +static uint32_t vex3_rreg(uint32_t vex) +{ + return xbits(~vex,15,1,3); +} +static uint32_t vex3_xreg(uint32_t vex) +{ + return xbits(~vex,14,1,3); +} +static uint32_t vex3_breg(uint32_t vex) +{ + return xbits(~vex,13,1,3); +} +static uint32_t vex3_map(uint32_t vex) +{ + return xbits(vex,8,5,0); +} +static uint32_t vex3_vreg(uint32_t vex) +{ + return xbits(~vex,19,4,0); +} +static uint32_t vex3_l(uint32_t vex) +{ + return xbits(vex,18,1,0); +} +static uint32_t vex3_pp(uint32_t vex) +{ + return xbits(vex,16,2,0); +} +static uint32_t vex3_w(uint32_t vex) +{ + return xbits(vex,23,1,0); +} + +/* ------ REX2 decoding ------ */ + +static uint32_t rex2_rreg(uint32_t rex) +{ + return xbits(rex,14,1,4) + xbits(rex,10,1,3); +} +static uint32_t rex2_xreg(uint32_t rex) +{ + return xbits(rex,13,1,4) + xbits(rex,9,1,3); +} +static uint32_t rex2_breg(uint32_t rex) +{ + return xbits(rex,12,1,4) + xbits(rex,8,1,3); +} +static uint32_t rex2_w(uint32_t rex) +{ + return xbits(rex,11,1,0); +} +static uint32_t rex2_map(uint32_t rex) +{ + return xbits(rex,15,1,0); +} + +/* ------ REX decoding ------ */ + +static uint32_t rex_rreg(uint32_t rex) +{ + return xbits(rex,2,1,3); +} +static uint32_t rex_xreg(uint32_t rex) +{ + return xbits(rex,1,1,3); +} +static uint32_t rex_breg(uint32_t rex) +{ + return xbits(rex,0,1,3); +} +static uint32_t rex_w(uint32_t rex) +{ + return xbits(rex,3,1,0); +} + +/* + * Parse an EVEX prefix. + */ +static void parse_evex(struct rexfields *rf, uint32_t val) +{ + rf->type = REX_EVEX; + rf->len = 4; + rf->raw = val; + rf->opc = (uint8_t)val; + + rf->breg = evex_breg(val, false); + rf->bregbv = evex_breg(val, true); + rf->xreg = evex_xreg(val, false); + rf->xregxv = evex_xreg(val, true); + rf->vreg = evex_vreg(val, false); + rf->vregxv = evex_vreg(val, true); + + rf->rreg = evex_rreg(val); + rf->map = evex_map(val); + rf->xmap = rf->map + MAP_BASE_EVEX; + rf->pp = evex_pp(val); + rf->l = evex_l(val); + rf->w = evex_w(val); + rf->z = evex_z(val); + rf->b = evex_b(val); + rf->nd = rf->b; + rf->zu = rf->b; + rf->aaa = evex_aaa(val); + rf->scc = evex_scc(val); + rf->dfl = evex_dfl(val); + rf->nf = evex_nf(val); + + rf->flags = REX_EV | REX_P | ((~val >> 13) & 7) | (rf->w << 3); +} + +/* ------ Set value for all moptypes ------ */ + +/* case statements for original REX */ +#define CASE_REX \ + case 0x40: case 0x41: case 0x42: case 0x43: \ + case 0x44: case 0x45: case 0x46: case 0x47: \ + case 0x48: case 0x49: case 0x4a: case 0x4b: \ + case 0x4c: case 0x4d: case 0x4e: case 0x4f + +static const uint8_t * +parse_rex(struct rexfields *rf, uint8_t op, const uint8_t *p) +{ + uint32_t breg = 0; + uint32_t xreg = 0; + uint32_t vreg = 0; + uint32_t val = op; + + rf->opc = op; + + switch (op) { + CASE_REX: + rf->type = REX_REX; + rf->flags = op; + rf->len = 1; + rf->raw = op; + rf->opc = 0x40; /* Mask out payload bits */ + breg = rex_breg(op); + xreg = rex_xreg(op); + rf->rreg = rex_rreg(op); + rf->w = rex_w(op); + break; + + case 0xd5: + rf->type = REX_REX2; + rf->len = 2; + rf->raw = val = getu16(p); + rf->flags = REX_2 | REX_P | ((val >> 8) & 15); + rf->opc = (uint8_t)val; + breg = rex2_breg(val); + xreg = rex2_xreg(val); + rf->rreg = rex2_rreg(val); + rf->w = rex2_w(val); + rf->map = rex2_map(val); + rf->xmap = rf->map + MAP_BASE_REX2; + break; + + case 0xc5: + rf->raw = val = getu16(p); + val = vex2to3(val); + rf->map = 1; + rf->xmap = rf->map + MAP_BASE_VEX; + rf->len = 2; + goto vex_common; + + case 0x8f: + rf->raw = val = op + (getu16(p+1) << 8); + rf->map = vex3_map(val); + if (rf->map < 8) + return NULL; + rf->xmap = rf->map + MAP_BASE_XOP; + rf->len = 3; + goto vex_common; + + case 0xc4: + rf->raw = val = op + (getu16(p+1) << 8); + rf->map = vex3_map(val); + rf->xmap = rf->map + MAP_BASE_VEX; + rf->len = 3; + vex_common: + rf->type = REX_VEX; + breg = vex3_breg(val); + xreg = vex3_xreg(val); + vreg = vex3_vreg(val); + rf->rreg = vex3_rreg(val); + rf->pp = vex3_pp(val); + rf->l = vex3_l(val); + rf->w = vex3_w(val); + rf->flags = REX_P | REX_V | ((~val >> 8) & 7) | (rf->w << 3); + break; + + case 0x62: + parse_evex(rf, getu32(p)); + return p + rf->len; + + default: + return p; /* Not a prefix */ + } + + rf->bregbv = rf->breg = breg; + rf->xregxv = rf->xreg = xreg; + rf->vregxv = rf->vreg = vreg; + + return p + rf->len; +} + +/* + * The buffer must contain at least 20 readable bytes, although the + * actual values beyond the end of the current valid instruction do + * not matter. This function returns NULL if the instruction is + * inherently invalid. + */ +const uint8_t * +parse_prefixes(struct prefix_info *pf, const uint8_t *data, int bits) +{ + bool end_prefix; + const uint8_t *p = data; + const uint8_t *maxp; + + nasm_zero(*pf); + + /* + * The maximum instruction length is 15 bytes; fail in parse_prefixes() + * unless there is at least one byte left for the actual opcode. + */ + maxp = p + 15 - 1; + + pf->asize = bits; + pf->osize = (bits == 64) ? 32 : bits; + + /* + * WAIT is not really a prefix, but an instruction in its own + * right. Only decode it as the very first byte (otherwise + * prefixes apply to the WAIT instruction, not to anything + * following it!) so that in case WAIT actually is prefixed with + * something, those prefixes will be separately emitted by + * eat_byte(). + * + * Since WAIT is really an instruction, it doesn't count towards + * the length of the following instruction, either. + */ + + if (*p == 0x9b) { + pf->wait = *p++; + maxp++; /* Does not count toward instruction length */ + } + + end_prefix = false; + while (!end_prefix) { + uint8_t b = *p; + + switch (b) { + case 0xf2: + case 0xf3: + pf->rep = b; + pf->rex.pp = b ^ 0xfd; /* F2 = 3, F3 = 2 */ + p++; + break; + + case 0xf0: + pf->lock = b; + p++; + break; + + case 0x26: + pf->segover = R_ES; + goto isseg; + case 0x2e: + pf->segover = R_CS; + goto isseg; + case 0x36: + pf->segover = R_SS; + goto isseg; + case 0x3e: + pf->segover = R_DS; + goto isseg; + case 0x64: + pf->segover = R_FS; + goto isseg; + case 0x65: + pf->segover = R_GS; + isseg: + pf->seg = b; + p++; + break; + + case 0x66: + pf->osize = (bits == 16) ? 32 : 16; + pf->osp = b; + pf->rex.pp = 1; + p++; + break; + case 0x67: + pf->asize = (bits == 32) ? 16 : 32; + pf->asp = b; + p++; + break; + + CASE_REX: + case 0xd5: /* REX2 */ + if (bits == 64) + p = parse_rex(&pf->rex, b, p); + end_prefix = true; + break; + + case 0x8f: /* XOP */ + if (!(p[1] & 030)) { + /* Only maps 8-31 valid to protect 8F /0 */ + end_prefix = true; + break; + } + /* fall through */ + case 0xc4: /* VEX2 */ + case 0xc5: /* VEX3 */ + case 0x62: /* EVEX */ + if (bits == 64 || (p[1] & 0xe0) == 0xe0) + p = parse_rex(&pf->rex, b, p); + end_prefix = true; + break; + + default: + end_prefix = true; + break; + } + + if (p > maxp) + return NULL; /* Invalid instruction */ + } + + switch (pf->rex.type) { + case REX_VEX: + case REX_EVEX: + if (pf->osp || pf->rep) + return NULL; /* Invalid instruction (illegal prefix) */ + break; + + case REX_REX2: + break; + + case REX_REX: + /* Redundant REX prefixes are ignored */ + while ((*p & 0xf0) == 0x40) { + p++; + if (p > maxp) + return NULL; + } + /* fall through */ + + case REX_NONE: + /* + * Look for legacy map prefixes. These must come after all + * possible REX prefixes. + */ + if (*p == 0x0f) { + pf->rex.map = 1; + p++; + switch (*p) { + case 0x38: + pf->rex.map = 2; + p++; + break; + case 0x3a: + pf->rex.map = 3; + p++; + break; + default: + break; + } + } + pf->rex.xmap = pf->rex.map + MAP_BASE_NOVEX; + break; + } + + if (p > maxp) + return NULL; + + return p; +} diff --git a/src/stdlib/snprintf.c b/src/stdlib/snprintf.c new file mode 100644 index 0000000..e4a1c0b --- /dev/null +++ b/src/stdlib/snprintf.c @@ -0,0 +1,26 @@ +/* + * snprintf() + * + * Implement snprintf() in terms of vsnprintf() + */ + +#include "compiler.h" + + +#include "nasmlib.h" + +#if !defined(HAVE_SNPRINTF) && !defined(HAVE__SNPRINTF) + +int snprintf(char *str, size_t size, const char *format, ...) +{ + va_list ap; + int rv; + + va_start(ap, format); + rv = vsnprintf(str, size, format, ap); + va_end(ap); + + return rv; +} + +#endif diff --git a/src/stdlib/strlcpy.c b/src/stdlib/strlcpy.c new file mode 100644 index 0000000..22d9ccf --- /dev/null +++ b/src/stdlib/strlcpy.c @@ -0,0 +1,51 @@ +/* + * Copyright (c) 1998 Todd C. Miller + * + * Permission to use, copy, modify, and distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#include "compiler.h" + +/* + * Copy src to string dst of size siz. At most siz-1 characters + * will be copied. Always NUL terminates (unless siz == 0). + * Returns strlen(src); if retval >= siz, truncation occurred. + */ +#ifndef HAVE_STRLCPY + +size_t strlcpy(char *dst, const char *src, size_t siz) +{ + char *d = dst; + const char *s = src; + size_t n = siz; + + /* Copy as many bytes as will fit */ + if (n != 0) { + while (--n != 0) { + if ((*d++ = *s++) == '\0') + break; + } + } + + /* Not enough room in dst, add NUL and traverse rest of src */ + if (n == 0) { + if (siz != 0) + *d = '\0'; /* NUL-terminate dst */ + while (*s++) + ; + } + + return(s - src - 1); /* count does not include NUL */ +} + +#endif diff --git a/src/stdlib/strnlen.c b/src/stdlib/strnlen.c new file mode 100644 index 0000000..02449f3 --- /dev/null +++ b/src/stdlib/strnlen.c @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 1996-2016 The NASM Authors - All Rights Reserved */ + +#include "compiler.h" + +#ifndef HAVE_STRNLEN + +size_t strnlen(const char *s, size_t maxlen) +{ + const char *end = memchr(s, 0, maxlen); + + return end ? (size_t)(end - s) : maxlen; +} + +#endif diff --git a/src/stdlib/vsnprintf.c b/src/stdlib/vsnprintf.c new file mode 100644 index 0000000..58de651 --- /dev/null +++ b/src/stdlib/vsnprintf.c @@ -0,0 +1,46 @@ +/* + * vsnprintf() + * + * Poor substitute for a real vsnprintf() function for systems + * that don't have them... + */ + +#include "compiler.h" + + +#include "nasmlib.h" +#include "error.h" + +#if !defined(HAVE_VSNPRINTF) && !defined(HAVE__VSNPRINTF) + +#define BUFFER_SIZE 65536 /* Bigger than any string we might print... */ + +static char snprintf_buffer[BUFFER_SIZE]; + +int vsnprintf(char *str, size_t size, const char *format, va_list ap) +{ + int rv, bytes; + + if (size > BUFFER_SIZE) { + nasm_panic("vsnprintf: size (%llu) > BUFFER_SIZE (%d)", + (unsigned long long)size, BUFFER_SIZE); + size = BUFFER_SIZE; + } + + rv = vsprintf(snprintf_buffer, format, ap); + if (rv >= BUFFER_SIZE) + nasm_panic("vsnprintf buffer overflow"); + + if (size > 0) { + if ((size_t)rv < size-1) + bytes = rv; + else + bytes = size-1; + memcpy(str, snprintf_buffer, bytes); + str[bytes] = '\0'; + } + + return rv; +} + +#endif diff --git a/src/sync.c b/src/sync.c new file mode 100644 index 0000000..b086907 --- /dev/null +++ b/src/sync.c @@ -0,0 +1,100 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* Copyright 1996-2009 The NASM Authors - All Rights Reserved */ + +/* + * sync.c the Netwide Disassembler synchronisation processing module + */ + +#include "compiler.h" + + +#include "nasmlib.h" +#include "sync.h" + +/* initial # of sync points (*must* be power of two)*/ +#define SYNC_INITIAL_CHUNK (1U << 12) + +/* + * This lot manages the current set of sync points by means of a + * heap (priority queue) structure. + */ + +static struct Sync { + uint64_t pos; + uint64_t length; +} *synx; + +static size_t max_synx, nsynx; + +static inline void swap_sync(size_t dst, size_t src) +{ + struct Sync t = synx[dst]; + synx[dst] = synx[src]; + synx[src] = t; +} + +void init_sync(void) +{ + max_synx = SYNC_INITIAL_CHUNK; + synx = nasm_malloc((max_synx + 1) * sizeof(*synx)); + nsynx = 0; +} + +void add_sync(uint64_t pos, uint64_t length) +{ + size_t i; + static bool synx_oom = false; + + if (nsynx >= max_synx) { + struct Sync *xsynx; + size_t xmaxsynx = max_synx << 1; + if (synx_oom || xmaxsynx < max_synx || + !(xsynx = realloc(synx, (xmaxsynx + 1) * sizeof(*synx)))) { + synx_oom = true; + return; + } + } + + nsynx++; + synx[nsynx].pos = pos; + synx[nsynx].length = length; + + for (i = nsynx; i > 1; i >>= 1) { + if (synx[i >> 1].pos > synx[i].pos) + swap_sync(i >> 1, i); + } +} + +uint64_t next_sync(uint64_t position, uint64_t *length) +{ + while (nsynx > 0 && synx[1].pos + synx[1].length <= position) { + size_t i, j; + + swap_sync(nsynx, 1); + nsynx--; + + i = 1; + while (i * 2 <= nsynx) { + j = i * 2; + if (synx[j].pos < synx[i].pos && + (j + 1 > nsynx || synx[j + 1].pos > synx[j].pos)) { + swap_sync(j, i); + i = j; + } else if (j + 1 <= nsynx && synx[j + 1].pos < synx[i].pos) { + swap_sync(j + 1, i); + i = j + 1; + } else + break; + } + } + + if (nsynx > 0) { + if (length) + *length = synx[1].length; + return synx[1].pos; + } else { + if (length) + *length = 0L; + return 0; + } +} diff --git a/src/x86/iflag.c b/src/x86/iflag.c new file mode 100644 index 0000000..cd0d63d --- /dev/null +++ b/src/x86/iflag.c @@ -0,0 +1,661 @@ +/* This file is auto-generated. Don't edit. */ +#include "iflag.h" + +/* All combinations of instruction flags used in instruction patterns */ +const iflag_t insns_flags[655] = { + {{UINT32_C(0x01000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000)}}, /* 0 : PSEUDO */ + {{UINT32_C(0x01000000),UINT32_C(0x00800000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000)}}, /* 1 : PSEUDO,DFV */ + {{UINT32_C(0x00000000),UINT32_C(0x00400000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000001)}}, /* 2 : BESTDIS,8086 */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000008)}}, /* 3 : 386 */ + {{UINT32_C(0x00000000),UINT32_C(0x00400000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000040)}}, /* 4 : BESTDIS,P6 */ + {{UINT32_C(0x00000000),UINT32_C(0x00402000),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 5 : LONG,BESTDIS,PROT,X86_64 */ + {{UINT32_C(0x40000003),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000001)}}, /* 6 : SM0,SM1,NOAPX,8086 */ + {{UINT32_C(0x40000003),UINT32_C(0x00000008),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000008)}}, /* 7 : SM0,SM1,NOAPX,ZU,386 */ + {{UINT32_C(0x40000003),UINT32_C(0x00002008),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 8 : SM0,SM1,NOAPX,ZU,LONG,PROT,X86_64 */ + {{UINT32_C(0x40000003),UINT32_C(0x00004000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000001)}}, /* 9 : SM0,SM1,NOAPX,NOHLE,8086 */ + {{UINT32_C(0x40000003),UINT32_C(0x00004000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000008)}}, /* 10 : SM0,SM1,NOAPX,NOHLE,386 */ + {{UINT32_C(0x40000003),UINT32_C(0x00006000),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 11 : SM0,SM1,NOAPX,LONG,NOHLE,PROT,X86_64 */ + {{UINT32_C(0x00000003),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000001)}}, /* 12 : SM0,SM1,8086 */ + {{UINT32_C(0x00000003),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000008)}}, /* 13 : SM0,SM1,386 */ + {{UINT32_C(0x00000003),UINT32_C(0x00002000),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 14 : SM0,SM1,LONG,PROT,X86_64 */ + {{UINT32_C(0x08000003),UINT32_C(0x00002000),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 15 : SM0,SM1,OPT,LONG,PROT,X86_64 */ + {{UINT32_C(0x08800003),UINT32_C(0x00002000),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 16 : SM0,SM1,SDWORD,OPT,LONG,PROT,X86_64 */ + {{UINT32_C(0x40000003),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 17 : SM0,SM1,NOAPX,FUTURE */ + {{UINT32_C(0x40000003),UINT32_C(0x00002000),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 18 : SM0,SM1,NOAPX,LONG,PROT,FUTURE */ + {{UINT32_C(0x00000003),UINT32_C(0x00000080),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 19 : SM0,SM1,WIG,EVEX,PROT,FUTURE */ + {{UINT32_C(0x00000003),UINT32_C(0x00000000),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 20 : SM0,SM1,EVEX,PROT,FUTURE */ + {{UINT32_C(0x00000003),UINT32_C(0x00000100),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 21 : SM0,SM1,WW,EVEX,PROT,FUTURE */ + {{UINT32_C(0x00000003),UINT32_C(0x00002100),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 22 : SM0,SM1,WW,LONG,EVEX,PROT,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000001)}}, /* 23 : 8086 */ + {{UINT32_C(0x00000000),UINT32_C(0x00002000),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 24 : LONG,PROT,X86_64 */ + {{UINT32_C(0x00000003),UINT32_C(0x00080400),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000001)}}, /* 25 : SM0,SM1,LOCK,FL,8086 */ + {{UINT32_C(0x00000003),UINT32_C(0x00080400),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000008)}}, /* 26 : SM0,SM1,LOCK,FL,386 */ + {{UINT32_C(0x00000003),UINT32_C(0x00082400),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 27 : SM0,SM1,LOCK,LONG,FL,PROT,X86_64 */ + {{UINT32_C(0x00000003),UINT32_C(0x00080000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000001)}}, /* 28 : SM0,SM1,FL,8086 */ + {{UINT32_C(0x00000003),UINT32_C(0x00080000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000008)}}, /* 29 : SM0,SM1,FL,386 */ + {{UINT32_C(0x00000003),UINT32_C(0x00082000),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 30 : SM0,SM1,LONG,FL,PROT,X86_64 */ + {{UINT32_C(0x00000003),UINT32_C(0x00080408),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000008)}}, /* 31 : SM0,SM1,ZU,LOCK,FL,386 */ + {{UINT32_C(0x00000003),UINT32_C(0x00080008),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000008)}}, /* 32 : SM0,SM1,ZU,FL,386 */ + {{UINT32_C(0x00000003),UINT32_C(0x00082408),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 33 : SM0,SM1,ZU,LOCK,LONG,FL,PROT,X86_64 */ + {{UINT32_C(0x00000003),UINT32_C(0x00082008),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 34 : SM0,SM1,ZU,LONG,FL,PROT,X86_64 */ + {{UINT32_C(0x80000007),UINT32_C(0x0008208c),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 35 : SM0,SM1,SM2,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {{UINT32_C(0x80000003),UINT32_C(0x00082084),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 36 : SM0,SM1,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {{UINT32_C(0x80000003),UINT32_C(0x0008208c),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 37 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {{UINT32_C(0x80000007),UINT32_C(0x0008200c),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 38 : SM0,SM1,SM2,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {{UINT32_C(0x80000003),UINT32_C(0x00082004),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 39 : SM0,SM1,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {{UINT32_C(0x80000003),UINT32_C(0x0008200c),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 40 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {{UINT32_C(0x80000007),UINT32_C(0x0008210c),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 41 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {{UINT32_C(0x80000003),UINT32_C(0x00082104),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 42 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {{UINT32_C(0x80000003),UINT32_C(0x0008210c),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 43 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {{UINT32_C(0x00000007),UINT32_C(0x00082088),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 44 : SM0,SM1,SM2,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {{UINT32_C(0x00000003),UINT32_C(0x00082080),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 45 : SM0,SM1,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {{UINT32_C(0x00000003),UINT32_C(0x00082088),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 46 : SM0,SM1,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {{UINT32_C(0x00000007),UINT32_C(0x00082008),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 47 : SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {{UINT32_C(0x00000003),UINT32_C(0x00082000),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 48 : SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + {{UINT32_C(0x00000003),UINT32_C(0x00082008),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 49 : SM0,SM1,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {{UINT32_C(0x00000007),UINT32_C(0x00082108),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 50 : SM0,SM1,SM2,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {{UINT32_C(0x00000003),UINT32_C(0x00082100),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 51 : SM0,SM1,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {{UINT32_C(0x00000003),UINT32_C(0x00082108),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 52 : SM0,SM1,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {{UINT32_C(0x40000003),UINT32_C(0x00080000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000001)}}, /* 53 : SM0,SM1,NOAPX,FL,8086 */ + {{UINT32_C(0x40000003),UINT32_C(0x00080000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000008)}}, /* 54 : SM0,SM1,NOAPX,FL,386 */ + {{UINT32_C(0x40000003),UINT32_C(0x00082000),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 55 : SM0,SM1,NOAPX,LONG,FL,PROT,X86_64 */ + {{UINT32_C(0x00000000),UINT32_C(0x00080000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000001)}}, /* 56 : FL,8086 */ + {{UINT32_C(0x00000000),UINT32_C(0x00080000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000008)}}, /* 57 : FL,386 */ + {{UINT32_C(0x00000000),UINT32_C(0x00082000),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 58 : LONG,FL,PROT,X86_64 */ + {{UINT32_C(0x00000000),UINT32_C(0x00080000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000002)}}, /* 59 : FL,186 */ + {{UINT32_C(0x40000003),UINT32_C(0x00000000),UINT32_C(0x00400001),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 60 : SM0,SM1,NOAPX,VEX,BMI2,FUTURE */ + {{UINT32_C(0x40000001),UINT32_C(0x00000000),UINT32_C(0x00400001),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 61 : SM0,NOAPX,VEX,BMI2,FUTURE */ + {{UINT32_C(0xc8000003),UINT32_C(0x00000001),UINT32_C(0x00400001),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 62 : SM0,SM1,OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {{UINT32_C(0xc8000001),UINT32_C(0x00000001),UINT32_C(0x00400001),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 63 : SM0,OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {{UINT32_C(0x80000001),UINT32_C(0x00082084),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 64 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {{UINT32_C(0x80000001),UINT32_C(0x0008208c),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 65 : SM0,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {{UINT32_C(0x80000001),UINT32_C(0x00082004),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 66 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {{UINT32_C(0x80000001),UINT32_C(0x0008200c),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 67 : SM0,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {{UINT32_C(0x80000001),UINT32_C(0x00082104),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 68 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {{UINT32_C(0x80000001),UINT32_C(0x0008210c),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 69 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {{UINT32_C(0x00000003),UINT32_C(0x00002000),UINT32_C(0x00400012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 70 : SM0,SM1,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {{UINT32_C(0x00000001),UINT32_C(0x00002000),UINT32_C(0x00400012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 71 : SM0,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {{UINT32_C(0x88000003),UINT32_C(0x00002001),UINT32_C(0x00400012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 72 : SM0,SM1,OPT,NF,NF_R,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {{UINT32_C(0x88000001),UINT32_C(0x00002001),UINT32_C(0x00400012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 73 : SM0,OPT,NF,NF_R,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {{UINT32_C(0x60000000),UINT32_C(0x00081000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000001)}}, /* 74 : NOREX,NOAPX,NOLONG,FL,8086 */ + {{UINT32_C(0x60000000),UINT32_C(0x00081000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000008)}}, /* 75 : NOREX,NOAPX,NOLONG,FL,386 */ + {{UINT32_C(0x00000000),UINT32_C(0x00080400),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000001)}}, /* 76 : LOCK,FL,8086 */ + {{UINT32_C(0x00000000),UINT32_C(0x00080400),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000008)}}, /* 77 : LOCK,FL,386 */ + {{UINT32_C(0x00000000),UINT32_C(0x00082400),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 78 : LOCK,LONG,FL,PROT,X86_64 */ + {{UINT32_C(0x80000000),UINT32_C(0x0000248c),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 79 : NF,NF_E,ZU,WIG,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {{UINT32_C(0x80000000),UINT32_C(0x00002484),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 80 : NF,NF_E,WIG,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {{UINT32_C(0x80000000),UINT32_C(0x0000240c),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 81 : NF,NF_E,ZU,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {{UINT32_C(0x80000000),UINT32_C(0x00002404),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 82 : NF,NF_E,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {{UINT32_C(0x80000000),UINT32_C(0x0000250c),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 83 : NF,NF_E,ZU,WW,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {{UINT32_C(0x80000000),UINT32_C(0x00002504),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 84 : NF,NF_E,WW,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {{UINT32_C(0x80000001),UINT32_C(0x00002084),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 85 : SM0,NF,NF_E,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {{UINT32_C(0x80000001),UINT32_C(0x00002004),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 86 : SM0,NF,NF_E,LONG,EVEX,PROT,APX,X86_64 */ + {{UINT32_C(0x80000001),UINT32_C(0x00002104),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 87 : SM0,NF,NF_E,WW,LONG,EVEX,PROT,APX,X86_64 */ + {{UINT32_C(0x00000007),UINT32_C(0x00080000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000002)}}, /* 88 : SM0,SM1,SM2,FL,186 */ + {{UINT32_C(0x00000003),UINT32_C(0x00080000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000002)}}, /* 89 : SM0,SM1,FL,186 */ + {{UINT32_C(0x00000007),UINT32_C(0x00080000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000008)}}, /* 90 : SM0,SM1,SM2,FL,386 */ + {{UINT32_C(0x00000007),UINT32_C(0x00082000),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 91 : SM0,SM1,SM2,LONG,FL,PROT,X86_64 */ + {{UINT32_C(0x80000007),UINT32_C(0x0000200c),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 92 : SM0,SM1,SM2,NF,NF_E,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {{UINT32_C(0x80000003),UINT32_C(0x00002004),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 93 : SM0,SM1,NF,NF_E,LONG,EVEX,PROT,APX,X86_64 */ + {{UINT32_C(0x80000003),UINT32_C(0x0000200c),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 94 : SM0,SM1,NF,NF_E,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {{UINT32_C(0x80000007),UINT32_C(0x0000210c),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 95 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {{UINT32_C(0x80000003),UINT32_C(0x00002104),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 96 : SM0,SM1,NF,NF_E,WW,LONG,EVEX,PROT,APX,X86_64 */ + {{UINT32_C(0x80000003),UINT32_C(0x0000210c),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 97 : SM0,SM1,NF,NF_E,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {{UINT32_C(0x80000007),UINT32_C(0x0000202c),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 98 : SM0,SM1,SM2,NF,NF_E,ZU,ZU_E,LONG,EVEX,PROT,APX,X86_64 */ + {{UINT32_C(0x80000007),UINT32_C(0x0000212c),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 99 : SM0,SM1,SM2,NF,NF_E,ZU,ZU_E,WW,LONG,EVEX,PROT,APX,X86_64 */ + {{UINT32_C(0x40000000),UINT32_C(0x00000000),UINT32_C(0x00400001),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 100 : NOAPX,VEX,BMI2,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00002000),UINT32_C(0x00400012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 101 : LONG,EVEX,PROT,BMI2,APX,FUTURE */ + {{UINT32_C(0x40000000),UINT32_C(0x00002000),UINT32_C(0x00400011),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 102 : NOAPX,LONG,VEX,PROT,BMI2,X86_64 */ + {{UINT32_C(0x00000000),UINT32_C(0x00002000),UINT32_C(0x00400012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 103 : LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {{UINT32_C(0xc8000000),UINT32_C(0x00000001),UINT32_C(0x00400001),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 104 : OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {{UINT32_C(0xc8000000),UINT32_C(0x00002001),UINT32_C(0x00400011),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 105 : OPT,NOAPX,NF,NF_R,LONG,VEX,PROT,BMI2,X86_64 */ + {{UINT32_C(0x80000000),UINT32_C(0x00002084),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 106 : NF,NF_E,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {{UINT32_C(0x80000000),UINT32_C(0x00002004),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 107 : NF,NF_E,LONG,EVEX,PROT,APX,X86_64 */ + {{UINT32_C(0x80000000),UINT32_C(0x00002104),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 108 : NF,NF_E,WW,LONG,EVEX,PROT,APX,X86_64 */ + {{UINT32_C(0x00000000),UINT32_C(0x00000400),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000001)}}, /* 109 : LOCK,8086 */ + {{UINT32_C(0x00000000),UINT32_C(0x00000400),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000008)}}, /* 110 : LOCK,386 */ + {{UINT32_C(0x00000000),UINT32_C(0x00002400),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 111 : LOCK,LONG,PROT,X86_64 */ + {{UINT32_C(0x00000000),UINT32_C(0x00002488),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 112 : ZU,WIG,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {{UINT32_C(0x00000000),UINT32_C(0x00002480),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 113 : WIG,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {{UINT32_C(0x00000000),UINT32_C(0x00002408),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 114 : ZU,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {{UINT32_C(0x00000000),UINT32_C(0x00002400),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 115 : LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {{UINT32_C(0x00000000),UINT32_C(0x00002508),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 116 : ZU,WW,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {{UINT32_C(0x00000000),UINT32_C(0x00002500),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 117 : WW,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {{UINT32_C(0x40000000),UINT32_C(0x00080008),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00400000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 118 : NOAPX,ZU,FL,ADX,FUTURE */ + {{UINT32_C(0x40000000),UINT32_C(0x00082008),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00400000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 119 : NOAPX,ZU,LONG,FL,PROT,ADX,X86_64 */ + {{UINT32_C(0x00000000),UINT32_C(0x00082008),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00440000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 120 : ZU,LONG,FL,EVEX,PROT,APX,ADX,X86_64 */ + {{UINT32_C(0x80000001),UINT32_C(0x0000200c),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 121 : SM0,NF,NF_E,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {{UINT32_C(0x80000001),UINT32_C(0x0000210c),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 122 : SM0,NF,NF_E,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {{UINT32_C(0x60000000),UINT32_C(0x00001000),UINT32_C(0x00000020),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00080000),UINT32_C(0x00000008)}}, /* 123 : NOREX,NOAPX,NOLONG,UNDOC,OBSOLETE,386 */ + {{UINT32_C(0x00000003),UINT32_C(0x00080000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800),UINT32_C(0x00008000)}}, /* 124 : SM0,SM1,FL,LZCNT,FUTURE */ + {{UINT32_C(0x00000003),UINT32_C(0x00082000),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800),UINT32_C(0x00000800)}}, /* 125 : SM0,SM1,LONG,FL,PROT,LZCNT,X86_64 */ + {{UINT32_C(0x80000003),UINT32_C(0x00002004),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000800),UINT32_C(0x00000800)}}, /* 126 : SM0,SM1,NF,NF_E,LONG,EVEX,PROT,APX,LZCNT,X86_64 */ + {{UINT32_C(0x80000003),UINT32_C(0x00002104),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000800),UINT32_C(0x00000800)}}, /* 127 : SM0,SM1,NF,NF_E,WW,LONG,EVEX,PROT,APX,LZCNT,X86_64 */ + {{UINT32_C(0x00000003),UINT32_C(0x00080000),UINT32_C(0x00200000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 128 : SM0,SM1,FL,BMI1,FUTURE */ + {{UINT32_C(0x00000003),UINT32_C(0x00082000),UINT32_C(0x00200010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 129 : SM0,SM1,LONG,FL,PROT,BMI1,X86_64 */ + {{UINT32_C(0x80000003),UINT32_C(0x00002004),UINT32_C(0x00200012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 130 : SM0,SM1,NF,NF_E,LONG,EVEX,PROT,BMI1,APX,X86_64 */ + {{UINT32_C(0x80000003),UINT32_C(0x00002104),UINT32_C(0x00200012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 131 : SM0,SM1,NF,NF_E,WW,LONG,EVEX,PROT,BMI1,APX,X86_64 */ + {{UINT32_C(0x40000007),UINT32_C(0x00080000),UINT32_C(0x00200001),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 132 : SM0,SM1,SM2,NOAPX,FL,VEX,BMI1,FUTURE */ + {{UINT32_C(0x40000003),UINT32_C(0x00080000),UINT32_C(0x00200001),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 133 : SM0,SM1,NOAPX,FL,VEX,BMI1,FUTURE */ + {{UINT32_C(0x40000007),UINT32_C(0x00082000),UINT32_C(0x00200011),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 134 : SM0,SM1,SM2,NOAPX,LONG,FL,VEX,PROT,BMI1,X86_64 */ + {{UINT32_C(0x40000003),UINT32_C(0x00082000),UINT32_C(0x00200011),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 135 : SM0,SM1,NOAPX,LONG,FL,VEX,PROT,BMI1,X86_64 */ + {{UINT32_C(0x80000007),UINT32_C(0x00002004),UINT32_C(0x00200012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 136 : SM0,SM1,SM2,NF,NF_E,LONG,EVEX,PROT,BMI1,APX,X86_64 */ + {{UINT32_C(0x40000007),UINT32_C(0x00080000),UINT32_C(0x00400001),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 137 : SM0,SM1,SM2,NOAPX,FL,VEX,BMI2,FUTURE */ + {{UINT32_C(0x40000003),UINT32_C(0x00080000),UINT32_C(0x00400001),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 138 : SM0,SM1,NOAPX,FL,VEX,BMI2,FUTURE */ + {{UINT32_C(0x40000007),UINT32_C(0x00082000),UINT32_C(0x00400011),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 139 : SM0,SM1,SM2,NOAPX,LONG,FL,VEX,PROT,BMI2,X86_64 */ + {{UINT32_C(0x40000003),UINT32_C(0x00082000),UINT32_C(0x00400011),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 140 : SM0,SM1,NOAPX,LONG,FL,VEX,PROT,BMI2,X86_64 */ + {{UINT32_C(0x40000007),UINT32_C(0x00000000),UINT32_C(0x00400001),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 141 : SM0,SM1,SM2,NOAPX,VEX,BMI2,FUTURE */ + {{UINT32_C(0x00000007),UINT32_C(0x00002000),UINT32_C(0x00400012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 142 : SM0,SM1,SM2,LONG,EVEX,PROT,BMI2,APX,FUTURE */ + {{UINT32_C(0x00000003),UINT32_C(0x00002000),UINT32_C(0x00400012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 143 : SM0,SM1,LONG,EVEX,PROT,BMI2,APX,FUTURE */ + {{UINT32_C(0x40000007),UINT32_C(0x00002000),UINT32_C(0x00400011),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 144 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,BMI2,X86_64 */ + {{UINT32_C(0x00000007),UINT32_C(0x00002000),UINT32_C(0x00400012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 145 : SM0,SM1,SM2,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {{UINT32_C(0x40000003),UINT32_C(0x00002000),UINT32_C(0x00400011),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 146 : SM0,SM1,NOAPX,LONG,VEX,PROT,BMI2,X86_64 */ + {{UINT32_C(0x40000003),UINT32_C(0x00080000),UINT32_C(0x00800001),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00080000),UINT32_C(0x00088000)}}, /* 147 : SM0,SM1,NOAPX,FL,VEX,TBM,OBSOLETE,FUTURE,AMD */ + {{UINT32_C(0x40000001),UINT32_C(0x00080000),UINT32_C(0x00800001),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00080000),UINT32_C(0x00088000)}}, /* 148 : SM0,NOAPX,FL,VEX,TBM,OBSOLETE,FUTURE,AMD */ + {{UINT32_C(0x40000003),UINT32_C(0x00082000),UINT32_C(0x00800011),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00080000),UINT32_C(0x00080800)}}, /* 149 : SM0,SM1,NOAPX,LONG,FL,VEX,PROT,TBM,OBSOLETE,X86_64,AMD */ + {{UINT32_C(0x40000001),UINT32_C(0x00082000),UINT32_C(0x00800011),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00080000),UINT32_C(0x00080800)}}, /* 150 : SM0,NOAPX,LONG,FL,VEX,PROT,TBM,OBSOLETE,X86_64,AMD */ + {{UINT32_C(0x40000003),UINT32_C(0x00000000),UINT32_C(0x00800001),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00080000),UINT32_C(0x00088000)}}, /* 151 : SM0,SM1,NOAPX,VEX,TBM,OBSOLETE,FUTURE,AMD */ + {{UINT32_C(0x40000003),UINT32_C(0x00002000),UINT32_C(0x00800011),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00080000),UINT32_C(0x00080800)}}, /* 152 : SM0,SM1,NOAPX,LONG,VEX,PROT,TBM,OBSOLETE,X86_64,AMD */ + {{UINT32_C(0x40000000),UINT32_C(0x00000000),UINT32_C(0x00800001),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00080000),UINT32_C(0x00088000)}}, /* 153 : NOAPX,VEX,TBM,OBSOLETE,FUTURE,AMD */ + {{UINT32_C(0x40000000),UINT32_C(0x00002000),UINT32_C(0x00800011),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00080000),UINT32_C(0x00080800)}}, /* 154 : NOAPX,LONG,VEX,PROT,TBM,OBSOLETE,X86_64,AMD */ + {{UINT32_C(0x40000000),UINT32_C(0x00080000),UINT32_C(0x00800001),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00080000),UINT32_C(0x00088000)}}, /* 155 : NOAPX,FL,VEX,TBM,OBSOLETE,FUTURE,AMD */ + {{UINT32_C(0x40000000),UINT32_C(0x00082000),UINT32_C(0x00800011),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00080000),UINT32_C(0x00080800)}}, /* 156 : NOAPX,LONG,FL,VEX,PROT,TBM,OBSOLETE,X86_64,AMD */ + {{UINT32_C(0x60000420),UINT32_C(0x00081000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000001)}}, /* 157 : AR0,SB,NOREX,NOAPX,NOLONG,FL,8086 */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000010)}}, /* 158 : 486 */ + {{UINT32_C(0x68000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000001)}}, /* 159 : OPT,NOREX,NOAPX,8086 */ + {{UINT32_C(0x40000003),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00020000),UINT32_C(0x00001000)}}, /* 160 : SM0,SM1,NOAPX,MOVBE,NEHALEM */ + {{UINT32_C(0x40000003),UINT32_C(0x00002000),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00020000),UINT32_C(0x00001000)}}, /* 161 : SM0,SM1,NOAPX,LONG,PROT,MOVBE,NEHALEM */ + {{UINT32_C(0x00000003),UINT32_C(0x00002000),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00020000),UINT32_C(0x00001000)}}, /* 162 : SM0,SM1,LONG,EVEX,PROT,APX,MOVBE,NEHALEM */ + {{UINT32_C(0x00000003),UINT32_C(0x00002100),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00020000),UINT32_C(0x00001000)}}, /* 163 : SM0,SM1,WW,LONG,EVEX,PROT,APX,MOVBE,NEHALEM */ + {{UINT32_C(0x08000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000001)}}, /* 164 : OPT,8086 */ + {{UINT32_C(0x08000000),UINT32_C(0x00000008),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000008)}}, /* 165 : OPT,ZU,386 */ + {{UINT32_C(0x08000000),UINT32_C(0x00002008),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 166 : OPT,ZU,LONG,PROT,X86_64 */ + {{UINT32_C(0x00400060),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000008)}}, /* 167 : AR0,AR1,SX,386 */ + {{UINT32_C(0x00400060),UINT32_C(0x00002000),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 168 : AR0,AR1,SX,LONG,PROT,X86_64 */ + {{UINT32_C(0x08440060),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000001)}}, /* 169 : AR0,AR1,NWSIZE,SX,OPT,8086 */ + {{UINT32_C(0x08440060),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000008)}}, /* 170 : AR0,AR1,NWSIZE,SX,OPT,386 */ + {{UINT32_C(0x08440060),UINT32_C(0x00002000),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 171 : AR0,AR1,NWSIZE,SX,OPT,LONG,PROT,X86_64 */ + {{UINT32_C(0x08040000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000001)}}, /* 172 : NWSIZE,OPT,8086 */ + {{UINT32_C(0x08040000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000008)}}, /* 173 : NWSIZE,OPT,386 */ + {{UINT32_C(0x08040000),UINT32_C(0x00002000),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 174 : NWSIZE,OPT,LONG,PROT,X86_64 */ + {{UINT32_C(0x00000003),UINT32_C(0x00080400),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000020)}}, /* 175 : SM0,SM1,LOCK,FL,PENT */ + {{UINT32_C(0x00000000),UINT32_C(0x00080400),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000020)}}, /* 176 : LOCK,FL,PENT */ + {{UINT32_C(0x00000003),UINT32_C(0x00080400),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000010)}}, /* 177 : SM0,SM1,LOCK,FL,486 */ + {{UINT32_C(0x00000000),UINT32_C(0x00002008),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 178 : ZU,LONG,PROT,X86_64 */ + {{UINT32_C(0x00000000),UINT32_C(0x00000008),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000008)}}, /* 179 : ZU,386 */ + {{UINT32_C(0x60000000),UINT32_C(0x00001008),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000008)}}, /* 180 : NOREX,NOAPX,ZU,NOLONG,386 */ + {{UINT32_C(0x00000003),UINT32_C(0x00000800),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000001)}}, /* 181 : SM0,SM1,LOCK1,8086 */ + {{UINT32_C(0x00000003),UINT32_C(0x00000800),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000008)}}, /* 182 : SM0,SM1,LOCK1,386 */ + {{UINT32_C(0x00000003),UINT32_C(0x00002800),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 183 : SM0,SM1,LOCK1,LONG,PROT,X86_64 */ + {{UINT32_C(0x00000003),UINT32_C(0x00000400),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000001)}}, /* 184 : SM0,SM1,LOCK,8086 */ + {{UINT32_C(0x00000003),UINT32_C(0x00000400),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000008)}}, /* 185 : SM0,SM1,LOCK,386 */ + {{UINT32_C(0x00000003),UINT32_C(0x00002400),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 186 : SM0,SM1,LOCK,LONG,PROT,X86_64 */ + {{UINT32_C(0x60000003),UINT32_C(0x00081400),UINT32_C(0x00000020),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00080000),UINT32_C(0x00000010)}}, /* 187 : SM0,SM1,NOREX,NOAPX,LOCK,NOLONG,FL,UNDOC,OBSOLETE,486 */ + {{UINT32_C(0x00000000),UINT32_C(0x00022000),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 188 : LONG,REX2,PROT,APX,X86_64 */ + {{UINT32_C(0x600c0020),UINT32_C(0x00001000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000001)}}, /* 189 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + {{UINT32_C(0x400c0020),UINT32_C(0x00002000),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 190 : AR0,NWSIZE,OSIZE,NOAPX,LONG,PROT,X86_64 */ + {{UINT32_C(0x620c0020),UINT32_C(0x00001000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000001)}}, /* 191 : AR0,NWSIZE,OSIZE,JMP_RELAX,NOREX,NOAPX,NOLONG,8086 */ + {{UINT32_C(0x420c0020),UINT32_C(0x00002000),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 192 : AR0,NWSIZE,OSIZE,JMP_RELAX,NOAPX,LONG,PROT,X86_64 */ + {{UINT32_C(0x42440020),UINT32_C(0x00002000),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 193 : AR0,NWSIZE,SX,JMP_RELAX,NOAPX,LONG,PROT,X86_64 */ + {{UINT32_C(0x600c0020),UINT32_C(0x00011000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000001)}}, /* 194 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,BND,8086 */ + {{UINT32_C(0x000c0020),UINT32_C(0x00012000),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 195 : AR0,NWSIZE,OSIZE,LONG,BND,PROT,X86_64 */ + {{UINT32_C(0x00440020),UINT32_C(0x00012000),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 196 : AR0,NWSIZE,SX,LONG,BND,PROT,X86_64 */ + {{UINT32_C(0x600c0020),UINT32_C(0x00011000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000008)}}, /* 197 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,BND,386 */ + {{UINT32_C(0x60080020),UINT32_C(0x00001000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000001)}}, /* 198 : AR0,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + {{UINT32_C(0x60080020),UINT32_C(0x00001000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000008)}}, /* 199 : AR0,OSIZE,NOREX,NOAPX,NOLONG,386 */ + {{UINT32_C(0x60400023),UINT32_C(0x00001000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000001)}}, /* 200 : SM0,SM1,AR0,SX,NOREX,NOAPX,NOLONG,8086 */ + {{UINT32_C(0x60400023),UINT32_C(0x00001000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000008)}}, /* 201 : SM0,SM1,AR0,SX,NOREX,NOAPX,NOLONG,386 */ + {{UINT32_C(0x60080040),UINT32_C(0x00001000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000001)}}, /* 202 : AR1,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + {{UINT32_C(0x60080040),UINT32_C(0x00001000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000008)}}, /* 203 : AR1,OSIZE,NOREX,NOAPX,NOLONG,386 */ + {{UINT32_C(0x000c0020),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000008)}}, /* 204 : AR0,NWSIZE,OSIZE,386 */ + {{UINT32_C(0x000c0020),UINT32_C(0x00002000),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 205 : AR0,NWSIZE,OSIZE,LONG,PROT,X86_64 */ + {{UINT32_C(0x640c0020),UINT32_C(0x00011000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000001)}}, /* 206 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {{UINT32_C(0x440c0020),UINT32_C(0x00012000),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 207 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {{UINT32_C(0x660c0020),UINT32_C(0x00011000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000001)}}, /* 208 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {{UINT32_C(0x460c0020),UINT32_C(0x00012000),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 209 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {{UINT32_C(0x46440020),UINT32_C(0x00012000),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 210 : AR0,NWSIZE,SX,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {{UINT32_C(0x640c0020),UINT32_C(0x00011000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000008)}}, /* 211 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {{UINT32_C(0x44440020),UINT32_C(0x00012000),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 212 : AR0,NWSIZE,SX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {{UINT32_C(0x40080020),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000001)}}, /* 213 : AR0,OSIZE,NOAPX,8086 */ + {{UINT32_C(0x600c0020),UINT32_C(0x00001000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000008)}}, /* 214 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,386 */ + {{UINT32_C(0x600c0060),UINT32_C(0x00001000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000001)}}, /* 215 : AR0,AR1,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + {{UINT32_C(0x600c0060),UINT32_C(0x00001000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000008)}}, /* 216 : AR0,AR1,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,386 */ + {{UINT32_C(0x400c0060),UINT32_C(0x00002000),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 217 : AR0,AR1,NWSIZE,OSIZE,NOAPX,LONG,PROT,X86_64 */ + {{UINT32_C(0x00080020),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000400)}}, /* 218 : AR0,OSIZE,IA64 */ + {{UINT32_C(0x00080020),UINT32_C(0x00002000),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 219 : AR0,OSIZE,LONG,PROT,X86_64 */ + {{UINT32_C(0x400c0020),UINT32_C(0x00012000),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 220 : AR0,NWSIZE,OSIZE,NOAPX,LONG,BND,PROT,X86_64 */ + {{UINT32_C(0x40440020),UINT32_C(0x00012000),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 221 : AR0,NWSIZE,SX,NOAPX,LONG,BND,PROT,X86_64 */ + {{UINT32_C(0x00040000),UINT32_C(0x00012000),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 222 : NWSIZE,LONG,BND,PROT,X86_64 */ + {{UINT32_C(0x00040000),UINT32_C(0x00010000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000001)}}, /* 223 : NWSIZE,BND,8086 */ + {{UINT32_C(0x60040000),UINT32_C(0x00011000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000008)}}, /* 224 : NWSIZE,NOREX,NOAPX,NOLONG,BND,386 */ + {{UINT32_C(0x60000000),UINT32_C(0x00001000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000001)}}, /* 225 : NOREX,NOAPX,NOLONG,8086 */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00080040)}}, /* 226 : P6,AMD */ + {{UINT32_C(0x40000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000040)}}, /* 227 : NOAPX,P6 */ + {{UINT32_C(0x40000000),UINT32_C(0x00000000),UINT32_C(0x00000004),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000040)}}, /* 228 : NOAPX,PRIV,P6 */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000004),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00080040)}}, /* 229 : PRIV,P6,AMD */ + {{UINT32_C(0x00000000),UINT32_C(0x00002000),UINT32_C(0x00000014),UINT32_C(0x00000000),UINT32_C(0x00000004),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 230 : LONG,PRIV,PROT,FRED,X86_64 */ + {{UINT32_C(0x00000000),UINT32_C(0x00080000),UINT32_C(0x00000004),UINT32_C(0x00000000),UINT32_C(0x00004000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 231 : FL,PRIV,SMAP,FUTURE */ + {{UINT32_C(0x60000000),UINT32_C(0x00001000),UINT32_C(0x00000020),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000001)}}, /* 232 : NOREX,NOAPX,NOLONG,UNDOC,8086 */ + {{UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000001)}}, /* 233 : NWSIZE,8086 */ + {{UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000008)}}, /* 234 : NWSIZE,386 */ + {{UINT32_C(0x00040000),UINT32_C(0x00002000),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 235 : NWSIZE,LONG,PROT,X86_64 */ + {{UINT32_C(0x00040000),UINT32_C(0x00080000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000001)}}, /* 236 : NWSIZE,FL,8086 */ + {{UINT32_C(0x00040000),UINT32_C(0x00080000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000008)}}, /* 237 : NWSIZE,FL,386 */ + {{UINT32_C(0x00040000),UINT32_C(0x00082000),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 238 : NWSIZE,LONG,FL,PROT,X86_64 */ + {{UINT32_C(0x40000000),UINT32_C(0x00080000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000001)}}, /* 239 : NOAPX,FL,8086 */ + {{UINT32_C(0x40000000),UINT32_C(0x00080000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000008)}}, /* 240 : NOAPX,FL,386 */ + {{UINT32_C(0x40000000),UINT32_C(0x00082000),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 241 : NOAPX,LONG,FL,PROT,X86_64 */ + {{UINT32_C(0x40000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000001)}}, /* 242 : NOAPX,8086 */ + {{UINT32_C(0x40000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000008)}}, /* 243 : NOAPX,386 */ + {{UINT32_C(0x40000000),UINT32_C(0x00002000),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 244 : NOAPX,LONG,PROT,X86_64 */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000002)}}, /* 245 : 186 */ + {{UINT32_C(0x00000000),UINT32_C(0x00002000),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00080800)}}, /* 246 : LONG,PROT,X86_64,AMD */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000008),UINT32_C(0x00008000)}}, /* 247 : SERIALIZE,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000400),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000100)}}, /* 248 : SSE2,WILLAMETTE */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000040),UINT32_C(0x00008000)}}, /* 249 : CLFLUSHOPT,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000080),UINT32_C(0x00008000)}}, /* 250 : CLWB,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00380000),UINT32_C(0x00008000)}}, /* 251 : OBSOLETE,NEVER,NOP,FUTURE */ + {{UINT32_C(0x60000000),UINT32_C(0x00001000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00010000),UINT32_C(0x00088000)}}, /* 252 : NOREX,NOAPX,NOLONG,CLZERO,FUTURE,AMD */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00010000),UINT32_C(0x00088000)}}, /* 253 : CLZERO,FUTURE,AMD */ + {{UINT32_C(0x00000000),UINT32_C(0x00002000),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00010000),UINT32_C(0x00080800)}}, /* 254 : LONG,PROT,CLZERO,X86_64,AMD */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000004),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000010)}}, /* 255 : PRIV,486 */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000004),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000004),UINT32_C(0x00008000)}}, /* 256 : PRIV,WBNOINVD,FUTURE */ + {{UINT32_C(0x60000000),UINT32_C(0x00001000),UINT32_C(0x00000004),UINT32_C(0x00000000),UINT32_C(0x40000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 257 : NOREX,NOAPX,NOLONG,PRIV,INVPCID,FUTURE */ + {{UINT32_C(0x40000000),UINT32_C(0x00002000),UINT32_C(0x00000014),UINT32_C(0x00000000),UINT32_C(0x40000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 258 : NOAPX,LONG,PRIV,PROT,INVPCID,X86_64 */ + {{UINT32_C(0x00000000),UINT32_C(0x00002000),UINT32_C(0x00000016),UINT32_C(0x00000000),UINT32_C(0x40040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 259 : LONG,EVEX,PRIV,PROT,APX,INVPCID,X86_64 */ + {{UINT32_C(0x60000000),UINT32_C(0x00001000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00080800)}}, /* 260 : NOREX,NOAPX,NOLONG,X86_64,AMD */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00080800)}}, /* 261 : X86_64,AMD */ + {{UINT32_C(0x40000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000020)}}, /* 262 : NOAPX,PENT */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 263 : X86_64 */ + {{UINT32_C(0x00000000),UINT32_C(0x00080000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000100),UINT32_C(0x00008000)}}, /* 264 : FL,RDRAND,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00082000),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000100),UINT32_C(0x00000800)}}, /* 265 : LONG,FL,PROT,RDRAND,X86_64 */ + {{UINT32_C(0x00000000),UINT32_C(0x00080000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000200),UINT32_C(0x00008000)}}, /* 266 : FL,RDSEED,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00082000),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000200),UINT32_C(0x00000800)}}, /* 267 : LONG,FL,PROT,RDSEED,X86_64 */ + {{UINT32_C(0x08000000),UINT32_C(0x00002000),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000400),UINT32_C(0x00000800)}}, /* 268 : OPT,LONG,PROT,RDPID,X86_64 */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000400),UINT32_C(0x00008000)}}, /* 269 : RDPID,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00002000),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000400),UINT32_C(0x00000800)}}, /* 270 : LONG,PROT,RDPID,X86_64 */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000004),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000004)}}, /* 271 : PRIV,286 */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000020)}}, /* 272 : PENT */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000004)}}, /* 273 : 286 */ + {{UINT32_C(0x60000000),UINT32_C(0x00001000),UINT32_C(0x00000004),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000008)}}, /* 274 : NOREX,NOAPX,NOLONG,PRIV,386 */ + {{UINT32_C(0x00040000),UINT32_C(0x00002000),UINT32_C(0x00000014),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 275 : NWSIZE,LONG,PRIV,PROT,X86_64 */ + {{UINT32_C(0x60000000),UINT32_C(0x00001000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00080000),UINT32_C(0x00000008)}}, /* 276 : NOREX,NOAPX,NOLONG,OBSOLETE,386 */ + {{UINT32_C(0x40000000),UINT32_C(0x00000000),UINT32_C(0x00000004),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000020)}}, /* 277 : NOAPX,PRIV,PENT */ + {{UINT32_C(0x40000000),UINT32_C(0x00002000),UINT32_C(0x00000015),UINT32_C(0x00000000),UINT32_C(0x08000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 278 : NOAPX,LONG,VEX,PRIV,PROT,MSR_IMM,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00002000),UINT32_C(0x00000016),UINT32_C(0x00000000),UINT32_C(0x08040000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 279 : LONG,EVEX,PRIV,PROT,APX,MSR_IMM,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000004),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000020),UINT32_C(0x00008000)}}, /* 280 : PRIV,WRMSRNS,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00002000),UINT32_C(0x00000014),UINT32_C(0x00000000),UINT32_C(0x00000080),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 281 : LONG,PRIV,PROT,MSRLIST,X86_64 */ + {{UINT32_C(0x40000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 282 : NOAPX,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00002000),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 283 : LONG,EVEX,PROT,APX,FUTURE */ + {{UINT32_C(0x40000000),UINT32_C(0x00000000),UINT32_C(0x00000001),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 284 : NOAPX,VEX,FUTURE */ + {{UINT32_C(0x60000003),UINT32_C(0x00001000),UINT32_C(0x00000020),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00080000),UINT32_C(0x00000008)}}, /* 285 : SM0,SM1,NOREX,NOAPX,NOLONG,UNDOC,OBSOLETE,386 */ + {{UINT32_C(0x60000000),UINT32_C(0x00001000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00080000),UINT32_C(0x00040020)}}, /* 286 : NOREX,NOAPX,NOLONG,OBSOLETE,PENT,CYRIX */ + {{UINT32_C(0x60000000),UINT32_C(0x00001000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00080000),UINT32_C(0x00040040)}}, /* 287 : NOREX,NOAPX,NOLONG,OBSOLETE,P6,CYRIX */ + {{UINT32_C(0x60000000),UINT32_C(0x00001000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00080000),UINT32_C(0x00040010)}}, /* 288 : NOREX,NOAPX,NOLONG,OBSOLETE,486,CYRIX */ + {{UINT32_C(0x00000000),UINT32_C(0x00080000),UINT32_C(0x00000008),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000020)}}, /* 289 : FL,SMM,PENT */ + {{UINT32_C(0x60000000),UINT32_C(0x00001000),UINT32_C(0x00000008),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00080000),UINT32_C(0x00040040)}}, /* 290 : NOREX,NOAPX,NOLONG,SMM,OBSOLETE,P6,CYRIX */ + {{UINT32_C(0x60000000),UINT32_C(0x00001000),UINT32_C(0x00000008),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00080000),UINT32_C(0x00040010)}}, /* 291 : NOREX,NOAPX,NOLONG,SMM,OBSOLETE,486,CYRIX */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000004),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000001)}}, /* 292 : PRIV,8086 */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x01000000),UINT32_C(0x00000000),UINT32_C(0x00000200)}}, /* 293 : MONITOR,PRESCOTT */ + {{UINT32_C(0x60000000),UINT32_C(0x00001000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x01000000),UINT32_C(0x00000000),UINT32_C(0x00000200)}}, /* 294 : NOREX,NOAPX,NOLONG,MONITOR,PRESCOTT */ + {{UINT32_C(0x00000000),UINT32_C(0x00002000),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x01000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 295 : LONG,PROT,MONITOR,X86_64 */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x02000000),UINT32_C(0x00000000),UINT32_C(0x00088000)}}, /* 296 : MONITORX,FUTURE,AMD */ + {{UINT32_C(0x60000000),UINT32_C(0x00001000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x02000000),UINT32_C(0x00000000),UINT32_C(0x00088000)}}, /* 297 : NOREX,NOAPX,NOLONG,MONITORX,FUTURE,AMD */ + {{UINT32_C(0x00000000),UINT32_C(0x00002000),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x02000000),UINT32_C(0x00000000),UINT32_C(0x00088000)}}, /* 298 : LONG,PROT,MONITORX,FUTURE,AMD */ + {{UINT32_C(0x00000000),UINT32_C(0x00002000),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x02000000),UINT32_C(0x00000000),UINT32_C(0x00080800)}}, /* 299 : LONG,PROT,MONITORX,X86_64,AMD */ + {{UINT32_C(0x00000000),UINT32_C(0x00080000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x04000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 300 : FL,WAITPKG,FUTURE */ + {{UINT32_C(0x60000000),UINT32_C(0x00001000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x04000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 301 : NOREX,NOAPX,NOLONG,WAITPKG,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x04000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 302 : WAITPKG,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00002000),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x04000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 303 : LONG,PROT,WAITPKG,X86_64 */ + {{UINT32_C(0x40000000),UINT32_C(0x00000008),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000008)}}, /* 304 : NOAPX,ZU,386 */ + {{UINT32_C(0x60000000),UINT32_C(0x00001000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000008)}}, /* 305 : NOREX,NOAPX,NOLONG,386 */ + {{UINT32_C(0x60000000),UINT32_C(0x00001000),UINT32_C(0x00000020),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00080000),UINT32_C(0x00000001)}}, /* 306 : NOREX,NOAPX,NOLONG,UNDOC,OBSOLETE,8086 */ + {{UINT32_C(0x60000003),UINT32_C(0x00081000),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000004)}}, /* 307 : SM0,SM1,NOREX,NOAPX,NOLONG,FL,PROT,286 */ + {{UINT32_C(0x60000003),UINT32_C(0x00081000),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000008)}}, /* 308 : SM0,SM1,NOREX,NOAPX,NOLONG,FL,PROT,386 */ + {{UINT32_C(0x00000000),UINT32_C(0x00080000),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000004)}}, /* 309 : FL,PROT,286 */ + {{UINT32_C(0x00000000),UINT32_C(0x00080000),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000008)}}, /* 310 : FL,PROT,386 */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000004)}}, /* 311 : PROT,286 */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000008)}}, /* 312 : PROT,386 */ + {{UINT32_C(0x00000000),UINT32_C(0x00002000),UINT32_C(0x00000014),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000010),UINT32_C(0x00000800)}}, /* 313 : LONG,PRIV,PROT,LKGS,X86_64 */ + {{UINT32_C(0x000c0020),UINT32_C(0x00000000),UINT32_C(0x00000004),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000004)}}, /* 314 : AR0,NWSIZE,OSIZE,PRIV,286 */ + {{UINT32_C(0x000c0020),UINT32_C(0x00000000),UINT32_C(0x00000004),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000008)}}, /* 315 : AR0,NWSIZE,OSIZE,PRIV,386 */ + {{UINT32_C(0x000c0020),UINT32_C(0x00002000),UINT32_C(0x00000014),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 316 : AR0,NWSIZE,OSIZE,LONG,PRIV,PROT,X86_64 */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000014),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000004)}}, /* 317 : PRIV,PROT,286 */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000014),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000008)}}, /* 318 : PRIV,PROT,386 */ + {{UINT32_C(0x00000000),UINT32_C(0x00002000),UINT32_C(0x00000014),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 319 : LONG,PRIV,PROT,X86_64 */ + {{UINT32_C(0x000c0020),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000004)}}, /* 320 : AR0,NWSIZE,OSIZE,286 */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000020),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00080000),UINT32_C(0x00000008)}}, /* 321 : UNDOC,OBSOLETE,386 */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000020),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00080000),UINT32_C(0x00000004)}}, /* 322 : UNDOC,OBSOLETE,286 */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000040),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000001)}}, /* 323 : FPU,8086 */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000040),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000040)}}, /* 324 : FPU,P6 */ + {{UINT32_C(0x00000000),UINT32_C(0x00080000),UINT32_C(0x00000040),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000040)}}, /* 325 : FL,FPU,P6 */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000040),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000008)}}, /* 326 : FPU,386 */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000100),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000020)}}, /* 327 : 3DNOW,PENT */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000060),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000004)}}, /* 328 : UNDOC,FPU,286 */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000040),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000200)}}, /* 329 : FPU,PRESCOTT */ + {{UINT32_C(0x00000820),UINT32_C(0x00000000),UINT32_C(0x00000040),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000001)}}, /* 330 : AR0,SW,FPU,8086 */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000040),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000004)}}, /* 331 : FPU,286 */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000080),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000020)}}, /* 332 : MMX,PENT */ + {{UINT32_C(0x00000000),UINT32_C(0x00002000),UINT32_C(0x00000090),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 333 : LONG,PROT,MMX,X86_64 */ + {{UINT32_C(0x00002060),UINT32_C(0x00000000),UINT32_C(0x00000080),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000020)}}, /* 334 : AR0,AR1,SQ,MMX,PENT */ + {{UINT32_C(0x00002060),UINT32_C(0x00000000),UINT32_C(0x00000080),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00040020)}}, /* 335 : AR0,AR1,SQ,MMX,PENT,CYRIX */ + {{UINT32_C(0x00002060),UINT32_C(0x00000000),UINT32_C(0x00000100),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000020)}}, /* 336 : AR0,AR1,SQ,3DNOW,PENT */ + {{UINT32_C(0x00002020),UINT32_C(0x00000000),UINT32_C(0x00000100),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000020)}}, /* 337 : AR0,SQ,3DNOW,PENT */ + {{UINT32_C(0x000c0020),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000001)}}, /* 338 : AR0,NWSIZE,OSIZE,8086 */ + {{UINT32_C(0x00440020),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000002)}}, /* 339 : AR0,NWSIZE,SX,186 */ + {{UINT32_C(0x000c0020),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000002)}}, /* 340 : AR0,NWSIZE,OSIZE,186 */ + {{UINT32_C(0x60000000),UINT32_C(0x00001000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000002)}}, /* 341 : NOREX,NOAPX,NOLONG,186 */ + {{UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000002)}}, /* 342 : NWSIZE,186 */ + {{UINT32_C(0x00040000),UINT32_C(0x00022000),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 343 : NWSIZE,LONG,REX2,PROT,APX,X86_64 */ + {{UINT32_C(0x00040000),UINT32_C(0x00002000),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 344 : NWSIZE,LONG,EVEX,PROT,APX,X86_64 */ + {{UINT32_C(0x00000003),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000002)}}, /* 345 : SM0,SM1,186 */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000020),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000002)}}, /* 346 : UNDOC,186 */ + {{UINT32_C(0x00000006),UINT32_C(0x00a02080),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 347 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {{UINT32_C(0x00000006),UINT32_C(0x00a02000),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 348 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {{UINT32_C(0x00000006),UINT32_C(0x00a02100),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 349 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {{UINT32_C(0x00000003),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000040)}}, /* 350 : SM0,SM1,P6 */ + {{UINT32_C(0x00000007),UINT32_C(0x00002000),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 351 : SM0,SM1,SM2,LONG,EVEX,PROT,APX,X86_64 */ + {{UINT32_C(0x00000007),UINT32_C(0x00002100),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 352 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {{UINT32_C(0x00000003),UINT32_C(0x00002000),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 353 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {{UINT32_C(0x00000003),UINT32_C(0x00002100),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 354 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {{UINT32_C(0x00000007),UINT32_C(0x00002008),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 355 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {{UINT32_C(0x00000003),UINT32_C(0x00002008),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 356 : SM0,SM1,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {{UINT32_C(0x00000007),UINT32_C(0x00002108),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 357 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {{UINT32_C(0x00000003),UINT32_C(0x00002108),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 358 : SM0,SM1,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {{UINT32_C(0x00000420),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000008)}}, /* 359 : AR0,SB,386 */ + {{UINT32_C(0x00000000),UINT32_C(0x00002088),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 360 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {{UINT32_C(0x00000000),UINT32_C(0x000020a8),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 361 : ZU,ZU_E,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {{UINT32_C(0x40000007),UINT32_C(0x00002000),UINT32_C(0x00000011),UINT32_C(0x00000000),UINT32_C(0x00000020),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 362 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {{UINT32_C(0x00000007),UINT32_C(0x00002000),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040020),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 363 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000200),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000080)}}, /* 364 : SSE,KATMAI */ + {{UINT32_C(0x00000000),UINT32_C(0x00080000),UINT32_C(0x00000200),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000080)}}, /* 365 : FL,SSE,KATMAI */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000280),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000080)}}, /* 366 : MMX,SSE,KATMAI */ + {{UINT32_C(0x00400040),UINT32_C(0x00002000),UINT32_C(0x00000210),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 367 : AR1,SX,LONG,PROT,SSE,X86_64 */ + {{UINT32_C(0x00000000),UINT32_C(0x00002000),UINT32_C(0x00000210),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 368 : LONG,PROT,SSE,X86_64 */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000240),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000040)}}, /* 369 : FPU,SSE,P6 */ + {{UINT32_C(0x00000000),UINT32_C(0x00002000),UINT32_C(0x00000250),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 370 : LONG,PROT,FPU,SSE,X86_64 */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00001000)}}, /* 371 : NEHALEM */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000004),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00001000)}}, /* 372 : PRIV,NEHALEM */ + {{UINT32_C(0x40000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00001000)}}, /* 373 : NOAPX,NEHALEM */ + {{UINT32_C(0x40000000),UINT32_C(0x00002000),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00001000)}}, /* 374 : NOAPX,LONG,PROT,NEHALEM */ + {{UINT32_C(0x00000420),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000080)}}, /* 375 : AR0,SB,KATMAI */ + {{UINT32_C(0x00000420),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000040),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 376 : AR0,SB,PREFETCHI,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000080)}}, /* 377 : KATMAI */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000080),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000080)}}, /* 378 : MMX,KATMAI */ + {{UINT32_C(0x00002060),UINT32_C(0x00000000),UINT32_C(0x00000080),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000080)}}, /* 379 : AR0,AR1,SQ,MMX,KATMAI */ + {{UINT32_C(0x00000480),UINT32_C(0x00000000),UINT32_C(0x00000080),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000080)}}, /* 380 : AR2,SB,MMX,KATMAI */ + {{UINT32_C(0x00008060),UINT32_C(0x00000000),UINT32_C(0x00000400),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000100)}}, /* 381 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {{UINT32_C(0x00001060),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000100)}}, /* 382 : AR0,AR1,SD,WILLAMETTE */ + {{UINT32_C(0x00002060),UINT32_C(0x00002000),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 383 : AR0,AR1,SQ,LONG,PROT,X86_64 */ + {{UINT32_C(0x00001060),UINT32_C(0x00000000),UINT32_C(0x00000400),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000100)}}, /* 384 : AR0,AR1,SD,SSE2,WILLAMETTE */ + {{UINT32_C(0x00002060),UINT32_C(0x00000000),UINT32_C(0x00000400),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000100)}}, /* 385 : AR0,AR1,SQ,SSE2,WILLAMETTE */ + {{UINT32_C(0x00000000),UINT32_C(0x00002000),UINT32_C(0x00000410),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 386 : LONG,PROT,SSE2,X86_64 */ + {{UINT32_C(0x00002060),UINT32_C(0x00000000),UINT32_C(0x00000080),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000100)}}, /* 387 : AR0,AR1,SQ,MMX,WILLAMETTE */ + {{UINT32_C(0x00000480),UINT32_C(0x00000000),UINT32_C(0x00000400),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000100)}}, /* 388 : AR2,SB,SSE2,WILLAMETTE */ + {{UINT32_C(0x00000480),UINT32_C(0x00002000),UINT32_C(0x00000410),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 389 : AR2,SB,LONG,PROT,SSE2,X86_64 */ + {{UINT32_C(0x00000440),UINT32_C(0x00000000),UINT32_C(0x00000400),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000100)}}, /* 390 : AR1,SB,SSE2,WILLAMETTE */ + {{UINT32_C(0x00000000),UINT32_C(0x00080000),UINT32_C(0x00000400),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000100)}}, /* 391 : FL,SSE2,WILLAMETTE */ + {{UINT32_C(0x00400040),UINT32_C(0x00002000),UINT32_C(0x00000410),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 392 : AR1,SX,LONG,PROT,SSE2,X86_64 */ + {{UINT32_C(0x00008060),UINT32_C(0x00000000),UINT32_C(0x00000800),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000200)}}, /* 393 : AR0,AR1,SO,SSE3,PRESCOTT */ + {{UINT32_C(0x00002060),UINT32_C(0x00000000),UINT32_C(0x00000800),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000200)}}, /* 394 : AR0,AR1,SQ,SSE3,PRESCOTT */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000200)}}, /* 395 : SSE3,PRESCOTT */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00001000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00088000)}}, /* 396 : VMX,FUTURE,AMD */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00001000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 397 : VMX,FUTURE */ + {{UINT32_C(0x60001060),UINT32_C(0x00001000),UINT32_C(0x00001000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 398 : AR0,AR1,SD,NOREX,NOAPX,NOLONG,VMX,FUTURE */ + {{UINT32_C(0x00042060),UINT32_C(0x00002000),UINT32_C(0x00001010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 399 : AR0,AR1,SQ,NWSIZE,LONG,PROT,VMX,X86_64 */ + {{UINT32_C(0x60008060),UINT32_C(0x00001000),UINT32_C(0x00001000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 400 : AR0,AR1,SO,NOREX,NOAPX,NOLONG,VMX,FUTURE */ + {{UINT32_C(0x40048060),UINT32_C(0x00002000),UINT32_C(0x00001010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 401 : AR0,AR1,SO,NWSIZE,NOAPX,LONG,PROT,VMX,X86_64 */ + {{UINT32_C(0x00008060),UINT32_C(0x00002000),UINT32_C(0x00001012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 402 : AR0,AR1,SO,LONG,EVEX,PROT,VMX,APX,X86_64 */ + {{UINT32_C(0x40002060),UINT32_C(0x00000000),UINT32_C(0x00002080),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 403 : AR0,AR1,SQ,NOAPX,MMX,SSSE3,FUTURE */ + {{UINT32_C(0x40000000),UINT32_C(0x00000000),UINT32_C(0x00002000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 404 : NOAPX,SSSE3,FUTURE */ + {{UINT32_C(0x400020e0),UINT32_C(0x00000000),UINT32_C(0x00002080),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 405 : AR0,AR1,AR2,SQ,NOAPX,MMX,SSSE3,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00004000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00088000)}}, /* 406 : SSE4A,FUTURE,AMD */ + {{UINT32_C(0x00002060),UINT32_C(0x00000000),UINT32_C(0x00004000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00088000)}}, /* 407 : AR0,AR1,SQ,SSE4A,FUTURE,AMD */ + {{UINT32_C(0x00001060),UINT32_C(0x00000000),UINT32_C(0x00004000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00088000)}}, /* 408 : AR0,AR1,SD,SSE4A,FUTURE,AMD */ + {{UINT32_C(0x40000000),UINT32_C(0x00000000),UINT32_C(0x00008000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 409 : NOAPX,SSE41,FUTURE */ + {{UINT32_C(0x40000000),UINT32_C(0x00002000),UINT32_C(0x00008010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 410 : NOAPX,LONG,PROT,SSE41,X86_64 */ + {{UINT32_C(0x40040000),UINT32_C(0x00002000),UINT32_C(0x00008010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 411 : NWSIZE,NOAPX,LONG,PROT,SSE41,X86_64 */ + {{UINT32_C(0x40000480),UINT32_C(0x00000000),UINT32_C(0x00008000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 412 : AR2,SB,NOAPX,SSE41,FUTURE */ + {{UINT32_C(0x40000480),UINT32_C(0x00002000),UINT32_C(0x00008010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 413 : AR2,SB,NOAPX,LONG,PROT,SSE41,X86_64 */ + {{UINT32_C(0x40002060),UINT32_C(0x00000000),UINT32_C(0x00008000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 414 : AR0,AR1,SQ,NOAPX,SSE41,FUTURE */ + {{UINT32_C(0x40001060),UINT32_C(0x00000000),UINT32_C(0x00008000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 415 : AR0,AR1,SD,NOAPX,SSE41,FUTURE */ + {{UINT32_C(0x40000860),UINT32_C(0x00000000),UINT32_C(0x00008000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 416 : AR0,AR1,SW,NOAPX,SSE41,FUTURE */ + {{UINT32_C(0x40000000),UINT32_C(0x00000000),UINT32_C(0x00010000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 417 : NOAPX,SSE42,FUTURE */ + {{UINT32_C(0x40000000),UINT32_C(0x00002000),UINT32_C(0x00010010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 418 : NOAPX,LONG,PROT,SSE42,X86_64 */ + {{UINT32_C(0x00000000),UINT32_C(0x00002080),UINT32_C(0x00010012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 419 : WIG,LONG,EVEX,PROT,SSE42,APX,X86_64 */ + {{UINT32_C(0x00000000),UINT32_C(0x00002000),UINT32_C(0x00010012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 420 : LONG,EVEX,PROT,SSE42,APX,X86_64 */ + {{UINT32_C(0x00000000),UINT32_C(0x00002100),UINT32_C(0x00010012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 421 : WW,LONG,EVEX,PROT,SSE42,APX,X86_64 */ + {{UINT32_C(0x48000000),UINT32_C(0x00002000),UINT32_C(0x00010010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 422 : OPT,NOAPX,LONG,PROT,SSE42,X86_64 */ + {{UINT32_C(0x08000000),UINT32_C(0x00002080),UINT32_C(0x00010012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 423 : OPT,WIG,LONG,EVEX,PROT,SSE42,APX,X86_64 */ + {{UINT32_C(0x40000000),UINT32_C(0x00002000),UINT32_C(0x00010010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 424 : NOAPX,LONG,PROT,SSE42,FUTURE */ + {{UINT32_C(0x00000860),UINT32_C(0x00080000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00001000)}}, /* 425 : AR0,AR1,SW,FL,NEHALEM */ + {{UINT32_C(0x00001060),UINT32_C(0x00080000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00001000)}}, /* 426 : AR0,AR1,SD,FL,NEHALEM */ + {{UINT32_C(0x00002060),UINT32_C(0x00082000),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00001000)}}, /* 427 : AR0,AR1,SQ,LONG,FL,PROT,NEHALEM */ + {{UINT32_C(0x80000003),UINT32_C(0x00002004),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00001000)}}, /* 428 : SM0,SM1,NF,NF_E,LONG,EVEX,PROT,APX,NEHALEM */ + {{UINT32_C(0x80000003),UINT32_C(0x00002104),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00001000)}}, /* 429 : SM0,SM1,NF,NF_E,WW,LONG,EVEX,PROT,APX,NEHALEM */ + {{UINT32_C(0x40000000),UINT32_C(0x00080000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000080)}}, /* 430 : NOAPX,FL,KATMAI */ + {{UINT32_C(0x00002060),UINT32_C(0x00000000),UINT32_C(0x00000100),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00040020)}}, /* 431 : AR0,AR1,SQ,3DNOW,PENT,CYRIX */ + {{UINT32_C(0x40000000),UINT32_C(0x00000000),UINT32_C(0x00000200),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00002000)}}, /* 432 : NOAPX,SSE,WESTMERE */ + {{UINT32_C(0x40000000),UINT32_C(0x00000080),UINT32_C(0x00040001),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00004000)}}, /* 433 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {{UINT32_C(0x40000000),UINT32_C(0x00080000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x10000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 434 : NOAPX,FL,AESKLE,FUTURE */ + {{UINT32_C(0x40000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x10000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 435 : NOAPX,AESKLE,FUTURE */ + {{UINT32_C(0x40000000),UINT32_C(0x00080000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x20000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 436 : NOAPX,FL,AESKLEWIDE_KL,FUTURE */ + {{UINT32_C(0x40000000),UINT32_C(0x00000080),UINT32_C(0x00000001),UINT32_C(0x00000040),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 437 : NOAPX,WIG,VEX,VAES,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00000080),UINT32_C(0x02000012),UINT32_C(0x00000041),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 438 : WIG,EVEX,PROT,AVX512,AVX512VL,VAES,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00000080),UINT32_C(0x02000012),UINT32_C(0x00000040),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 439 : WIG,EVEX,PROT,AVX512,VAES,FUTURE */ + {{UINT32_C(0x40000000),UINT32_C(0x000000c0),UINT32_C(0x00040001),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00004000)}}, /* 440 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {{UINT32_C(0x40000000),UINT32_C(0x00000000),UINT32_C(0x00040001),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00004000)}}, /* 441 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {{UINT32_C(0x40000000),UINT32_C(0x000800c0),UINT32_C(0x00040001),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00004000)}}, /* 442 : NOAPX,LIG,WIG,FL,VEX,AVX,SANDYBRIDGE */ + {{UINT32_C(0x40008060),UINT32_C(0x00000080),UINT32_C(0x00040001),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00004000)}}, /* 443 : AR0,AR1,SO,NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {{UINT32_C(0x40010060),UINT32_C(0x00000080),UINT32_C(0x00040001),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00004000)}}, /* 444 : AR0,AR1,SY,NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {{UINT32_C(0x40000000),UINT32_C(0x00000040),UINT32_C(0x00040001),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00004000)}}, /* 445 : NOAPX,LIG,VEX,AVX,SANDYBRIDGE */ + {{UINT32_C(0x40000000),UINT32_C(0x00002040),UINT32_C(0x00040011),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00004000)}}, /* 446 : NOAPX,LIG,LONG,VEX,PROT,AVX,SANDYBRIDGE */ + {{UINT32_C(0x400010e0),UINT32_C(0x00000040),UINT32_C(0x00040001),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00004000)}}, /* 447 : AR0,AR1,AR2,SD,NOAPX,LIG,VEX,AVX,SANDYBRIDGE */ + {{UINT32_C(0x40001060),UINT32_C(0x00000040),UINT32_C(0x00040001),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00004000)}}, /* 448 : AR0,AR1,SD,NOAPX,LIG,VEX,AVX,SANDYBRIDGE */ + {{UINT32_C(0x400020e0),UINT32_C(0x00002040),UINT32_C(0x00040011),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00004000)}}, /* 449 : AR0,AR1,AR2,SQ,NOAPX,LIG,LONG,VEX,PROT,AVX,SANDYBRIDGE */ + {{UINT32_C(0x40002060),UINT32_C(0x00002040),UINT32_C(0x00040011),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00004000)}}, /* 450 : AR0,AR1,SQ,NOAPX,LIG,LONG,VEX,PROT,AVX,SANDYBRIDGE */ + {{UINT32_C(0x400080e0),UINT32_C(0x00000000),UINT32_C(0x00040001),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00004000)}}, /* 451 : AR0,AR1,AR2,SO,NOAPX,VEX,AVX,SANDYBRIDGE */ + {{UINT32_C(0x400100e0),UINT32_C(0x00000000),UINT32_C(0x00040001),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00004000)}}, /* 452 : AR0,AR1,AR2,SY,NOAPX,VEX,AVX,SANDYBRIDGE */ + {{UINT32_C(0x40002060),UINT32_C(0x00000080),UINT32_C(0x00040001),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00004000)}}, /* 453 : AR0,AR1,SQ,NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {{UINT32_C(0x40002060),UINT32_C(0x00002000),UINT32_C(0x00040011),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00004000)}}, /* 454 : AR0,AR1,SQ,NOAPX,LONG,VEX,PROT,AVX,SANDYBRIDGE */ + {{UINT32_C(0x40000000),UINT32_C(0x00002080),UINT32_C(0x00040011),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00004000)}}, /* 455 : NOAPX,WIG,LONG,VEX,PROT,AVX,SANDYBRIDGE */ + {{UINT32_C(0x40000000),UINT32_C(0x00002000),UINT32_C(0x00040011),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00004000)}}, /* 456 : NOAPX,LONG,VEX,PROT,AVX,SANDYBRIDGE */ + {{UINT32_C(0x40000000),UINT32_C(0x00080000),UINT32_C(0x00040001),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00004000)}}, /* 457 : NOAPX,FL,VEX,AVX,SANDYBRIDGE */ + {{UINT32_C(0x40000000),UINT32_C(0x00000080),UINT32_C(0x00000001),UINT32_C(0x00000080),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 458 : NOAPX,WIG,VEX,VPCLMULQDQ,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00000080),UINT32_C(0x00000012),UINT32_C(0x00000081),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 459 : WIG,EVEX,PROT,AVX512VL,VPCLMULQDQ,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00000080),UINT32_C(0x02000012),UINT32_C(0x00000080),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 460 : WIG,EVEX,PROT,AVX512,VPCLMULQDQ,FUTURE */ + {{UINT32_C(0x40000000),UINT32_C(0x00000000),UINT32_C(0x00100001),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 461 : NOAPX,VEX,FMA,FUTURE */ + {{UINT32_C(0x40000000),UINT32_C(0x00000000),UINT32_C(0x00000001),UINT32_C(0x00020000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 462 : NOAPX,VEX,F16C,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00040020)}}, /* 463 : PENT,CYRIX */ + {{UINT32_C(0x40000000),UINT32_C(0x00000000),UINT32_C(0x00000001),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00080008)}}, /* 464 : NOAPX,VEX,386,AMD */ + {{UINT32_C(0x40000000),UINT32_C(0x00002000),UINT32_C(0x00000011),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00080800)}}, /* 465 : NOAPX,LONG,VEX,PROT,X86_64,AMD */ + {{UINT32_C(0x40000000),UINT32_C(0x00000000),UINT32_C(0x00020001),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00088000)}}, /* 466 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {{UINT32_C(0x40000000),UINT32_C(0x00000080),UINT32_C(0x00080001),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 467 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {{UINT32_C(0x40000000),UINT32_C(0x00000000),UINT32_C(0x00080001),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 468 : NOAPX,VEX,AVX2,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x01000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 469 : RTM,FUTURE */ + {{UINT32_C(0x600c0020),UINT32_C(0x00001000),UINT32_C(0x01000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 470 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,RTM,FUTURE */ + {{UINT32_C(0x000c0020),UINT32_C(0x00002000),UINT32_C(0x01000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 471 : AR0,NWSIZE,OSIZE,LONG,PROT,RTM,X86_64 */ + {{UINT32_C(0x00440020),UINT32_C(0x00002000),UINT32_C(0x01000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 472 : AR0,NWSIZE,SX,LONG,PROT,RTM,X86_64 */ + {{UINT32_C(0x00000000),UINT32_C(0x000c0000),UINT32_C(0x01000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 473 : HLE,FL,RTM,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x80000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 474 : PREFETCHWT1,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00008000),UINT32_C(0x40000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 475 : MIB,MPX,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x40000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 476 : MPX,FUTURE */ + {{UINT32_C(0x60000000),UINT32_C(0x00001000),UINT32_C(0x40000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 477 : NOREX,NOAPX,NOLONG,MPX,FUTURE */ + {{UINT32_C(0x00040000),UINT32_C(0x00002000),UINT32_C(0x40000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 478 : NWSIZE,LONG,PROT,MPX,X86_64 */ + {{UINT32_C(0x60000000),UINT32_C(0x00009000),UINT32_C(0x40000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 479 : NOREX,NOAPX,NOLONG,MIB,MPX,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x0000a000),UINT32_C(0x40000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 480 : LONG,MIB,PROT,MPX,X86_64 */ + {{UINT32_C(0x40000000),UINT32_C(0x00000000),UINT32_C(0x80000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 481 : NOAPX,SHA,FUTURE */ + {{UINT32_C(0x40000000),UINT32_C(0x00000000),UINT32_C(0x00040001),UINT32_C(0x00000000),UINT32_C(0x00008000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 482 : NOAPX,VEX,AVX,SHA512,FUTURE */ + {{UINT32_C(0x40000000),UINT32_C(0x00000000),UINT32_C(0x00040001),UINT32_C(0x00000000),UINT32_C(0x00010000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 483 : NOAPX,VEX,AVX,HSM3,FUTURE */ + {{UINT32_C(0x40000000),UINT32_C(0x00000000),UINT32_C(0x00040001),UINT32_C(0x00000000),UINT32_C(0x00020000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 484 : NOAPX,VEX,AVX,HSM4,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00040012),UINT32_C(0x00000000),UINT32_C(0x00020000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 485 : EVEX,PROT,AVX,HSM4,FUTURE */ + {{UINT32_C(0x40000860),UINT32_C(0x00000000),UINT32_C(0x00000001),UINT32_C(0x00000000),UINT32_C(0x00000100),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 486 : AR0,AR1,SW,NOAPX,VEX,AVXNECONVERT,FUTURE */ + {{UINT32_C(0x40008060),UINT32_C(0x00000000),UINT32_C(0x00000001),UINT32_C(0x00000000),UINT32_C(0x00000100),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 487 : AR0,AR1,SO,NOAPX,VEX,AVXNECONVERT,FUTURE */ + {{UINT32_C(0x40010060),UINT32_C(0x00000000),UINT32_C(0x00000001),UINT32_C(0x00000000),UINT32_C(0x00000100),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 488 : AR0,AR1,SY,NOAPX,VEX,AVXNECONVERT,FUTURE */ + {{UINT32_C(0x50008060),UINT32_C(0x00000000),UINT32_C(0x00000001),UINT32_C(0x00000000),UINT32_C(0x00000100),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 489 : AR0,AR1,SO,LATEVEX,NOAPX,VEX,AVXNECONVERT,FUTURE */ + {{UINT32_C(0x50010060),UINT32_C(0x00000000),UINT32_C(0x00000001),UINT32_C(0x00000000),UINT32_C(0x00000100),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 490 : AR0,AR1,SY,LATEVEX,NOAPX,VEX,AVXNECONVERT,FUTURE */ + {{UINT32_C(0x500080e0),UINT32_C(0x00000000),UINT32_C(0x00000001),UINT32_C(0x00000000),UINT32_C(0x00000200),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 491 : AR0,AR1,AR2,SO,LATEVEX,NOAPX,VEX,AVXVNNI,FUTURE */ + {{UINT32_C(0x500100e0),UINT32_C(0x00000000),UINT32_C(0x00000001),UINT32_C(0x00000000),UINT32_C(0x00000200),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 492 : AR0,AR1,AR2,SY,LATEVEX,NOAPX,VEX,AVXVNNI,FUTURE */ + {{UINT32_C(0x500080e0),UINT32_C(0x00000000),UINT32_C(0x00040001),UINT32_C(0x00000000),UINT32_C(0x00000400),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 493 : AR0,AR1,AR2,SO,LATEVEX,NOAPX,VEX,AVX,AVXVNNIINT8,FUTURE */ + {{UINT32_C(0x500100e0),UINT32_C(0x00000000),UINT32_C(0x00040001),UINT32_C(0x00000000),UINT32_C(0x00000400),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 494 : AR0,AR1,AR2,SY,LATEVEX,NOAPX,VEX,AVX,AVXVNNIINT8,FUTURE */ + {{UINT32_C(0x500080e0),UINT32_C(0x00000000),UINT32_C(0x00040001),UINT32_C(0x00000000),UINT32_C(0x00000800),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 495 : AR0,AR1,AR2,SO,LATEVEX,NOAPX,VEX,AVX,AVXVNNIINT16,FUTURE */ + {{UINT32_C(0x500100e0),UINT32_C(0x00000000),UINT32_C(0x00040001),UINT32_C(0x00000000),UINT32_C(0x00000800),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 496 : AR0,AR1,AR2,SY,LATEVEX,NOAPX,VEX,AVX,AVXVNNIINT16,FUTURE */ + {{UINT32_C(0x500080e0),UINT32_C(0x00000000),UINT32_C(0x00000001),UINT32_C(0x00000000),UINT32_C(0x00001000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 497 : AR0,AR1,AR2,SO,LATEVEX,NOAPX,VEX,AVXIFMA,FUTURE */ + {{UINT32_C(0x500100e0),UINT32_C(0x00000000),UINT32_C(0x00000001),UINT32_C(0x00000000),UINT32_C(0x00001000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 498 : AR0,AR1,AR2,SY,LATEVEX,NOAPX,VEX,AVXIFMA,FUTURE */ + {{UINT32_C(0x40000000),UINT32_C(0x00000008),UINT32_C(0x00000001),UINT32_C(0x00000002),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 499 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00002008),UINT32_C(0x00000012),UINT32_C(0x00000002),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 500 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {{UINT32_C(0x40000000),UINT32_C(0x00000008),UINT32_C(0x04000001),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 501 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00002008),UINT32_C(0x04000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 502 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {{UINT32_C(0x40000000),UINT32_C(0x00000008),UINT32_C(0x00000001),UINT32_C(0x00000004),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 503 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00002008),UINT32_C(0x00000012),UINT32_C(0x00000004),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 504 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {{UINT32_C(0x40000000),UINT32_C(0x00002008),UINT32_C(0x00000011),UINT32_C(0x00000004),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 505 : NOAPX,ZU,LONG,VEX,PROT,AVX512BW,X86_64 */ + {{UINT32_C(0x00000000),UINT32_C(0x00002008),UINT32_C(0x00000012),UINT32_C(0x00000004),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 506 : ZU,LONG,EVEX,PROT,AVX512BW,APX,X86_64 */ + {{UINT32_C(0x40000007),UINT32_C(0x00000008),UINT32_C(0x00000001),UINT32_C(0x00000002),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 507 : SM0,SM1,SM2,NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {{UINT32_C(0x00000007),UINT32_C(0x00002008),UINT32_C(0x00000012),UINT32_C(0x00000002),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 508 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {{UINT32_C(0x40000003),UINT32_C(0x00000008),UINT32_C(0x00000001),UINT32_C(0x00000002),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 509 : SM0,SM1,NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {{UINT32_C(0x00000003),UINT32_C(0x00002008),UINT32_C(0x00000012),UINT32_C(0x00000002),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 510 : SM0,SM1,ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {{UINT32_C(0x40000007),UINT32_C(0x00000008),UINT32_C(0x00000001),UINT32_C(0x00000004),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 511 : SM0,SM1,SM2,NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {{UINT32_C(0x00000007),UINT32_C(0x00002008),UINT32_C(0x00000012),UINT32_C(0x00000004),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 512 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {{UINT32_C(0x40000003),UINT32_C(0x00000008),UINT32_C(0x00000001),UINT32_C(0x00000004),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 513 : SM0,SM1,NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {{UINT32_C(0x00000003),UINT32_C(0x00002008),UINT32_C(0x00000012),UINT32_C(0x00000004),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 514 : SM0,SM1,ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {{UINT32_C(0x40000007),UINT32_C(0x00080008),UINT32_C(0x00000001),UINT32_C(0x00000002),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 515 : SM0,SM1,SM2,NOAPX,ZU,FL,VEX,AVX512DQ,FUTURE */ + {{UINT32_C(0x00000007),UINT32_C(0x00082008),UINT32_C(0x00000012),UINT32_C(0x00000002),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 516 : SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {{UINT32_C(0x40000003),UINT32_C(0x00080008),UINT32_C(0x00000001),UINT32_C(0x00000002),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 517 : SM0,SM1,NOAPX,ZU,FL,VEX,AVX512DQ,FUTURE */ + {{UINT32_C(0x00000003),UINT32_C(0x00082008),UINT32_C(0x00000012),UINT32_C(0x00000002),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 518 : SM0,SM1,ZU,LONG,FL,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {{UINT32_C(0x40000007),UINT32_C(0x00080008),UINT32_C(0x00000001),UINT32_C(0x00000004),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 519 : SM0,SM1,SM2,NOAPX,ZU,FL,VEX,AVX512BW,FUTURE */ + {{UINT32_C(0x00000007),UINT32_C(0x00082008),UINT32_C(0x00000012),UINT32_C(0x00000004),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 520 : SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,AVX512BW,APX,FUTURE */ + {{UINT32_C(0x40000003),UINT32_C(0x00080008),UINT32_C(0x00000001),UINT32_C(0x00000004),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 521 : SM0,SM1,NOAPX,ZU,FL,VEX,AVX512BW,FUTURE */ + {{UINT32_C(0x00000003),UINT32_C(0x00082008),UINT32_C(0x00000012),UINT32_C(0x00000004),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 522 : SM0,SM1,ZU,LONG,FL,EVEX,PROT,AVX512BW,APX,FUTURE */ + {{UINT32_C(0x40000007),UINT32_C(0x00000008),UINT32_C(0x04000001),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 523 : SM0,SM1,SM2,NOAPX,ZU,VEX,AVX512F,FUTURE */ + {{UINT32_C(0x00000007),UINT32_C(0x00002008),UINT32_C(0x04000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 524 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {{UINT32_C(0x40000003),UINT32_C(0x00000008),UINT32_C(0x04000001),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 525 : SM0,SM1,NOAPX,ZU,VEX,AVX512F,FUTURE */ + {{UINT32_C(0x00000003),UINT32_C(0x00002008),UINT32_C(0x04000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 526 : SM0,SM1,ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {{UINT32_C(0x40000007),UINT32_C(0x00080008),UINT32_C(0x04000001),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 527 : SM0,SM1,SM2,NOAPX,ZU,FL,VEX,AVX512F,FUTURE */ + {{UINT32_C(0x00000007),UINT32_C(0x00082008),UINT32_C(0x04000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 528 : SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,AVX512F,APX,FUTURE */ + {{UINT32_C(0x40000003),UINT32_C(0x00080008),UINT32_C(0x04000001),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 529 : SM0,SM1,NOAPX,ZU,FL,VEX,AVX512F,FUTURE */ + {{UINT32_C(0x00000003),UINT32_C(0x00082008),UINT32_C(0x04000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 530 : SM0,SM1,ZU,LONG,FL,EVEX,PROT,AVX512F,APX,FUTURE */ + {{UINT32_C(0x40000001),UINT32_C(0x00000008),UINT32_C(0x00000001),UINT32_C(0x00000002),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 531 : SM0,NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {{UINT32_C(0x00000001),UINT32_C(0x00002008),UINT32_C(0x00000012),UINT32_C(0x00000002),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 532 : SM0,ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {{UINT32_C(0x40000001),UINT32_C(0x00000008),UINT32_C(0x04000001),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 533 : SM0,NOAPX,ZU,VEX,AVX512F,FUTURE */ + {{UINT32_C(0x00000001),UINT32_C(0x00002008),UINT32_C(0x04000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 534 : SM0,ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {{UINT32_C(0x40000001),UINT32_C(0x00000008),UINT32_C(0x00000001),UINT32_C(0x00000004),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 535 : SM0,NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {{UINT32_C(0x00000001),UINT32_C(0x00002008),UINT32_C(0x00000012),UINT32_C(0x00000004),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 536 : SM0,ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {{UINT32_C(0x40000000),UINT32_C(0x00080008),UINT32_C(0x00000001),UINT32_C(0x00000002),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 537 : NOAPX,ZU,FL,VEX,AVX512DQ,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00082008),UINT32_C(0x00000012),UINT32_C(0x00000002),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 538 : ZU,LONG,FL,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {{UINT32_C(0x40000000),UINT32_C(0x00080008),UINT32_C(0x04000001),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 539 : NOAPX,ZU,FL,VEX,AVX512F,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00082008),UINT32_C(0x04000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 540 : ZU,LONG,FL,EVEX,PROT,AVX512F,APX,FUTURE */ + {{UINT32_C(0x40000000),UINT32_C(0x00080008),UINT32_C(0x00000001),UINT32_C(0x00000004),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 541 : NOAPX,ZU,FL,VEX,AVX512BW,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00082008),UINT32_C(0x00000012),UINT32_C(0x00000004),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 542 : ZU,LONG,FL,EVEX,PROT,AVX512BW,APX,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x02000012),UINT32_C(0x00000001),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 543 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x02000012),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 544 : EVEX,PROT,AVX512,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00000040),UINT32_C(0x02000012),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 545 : LIG,EVEX,PROT,AVX512,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000012),UINT32_C(0x00000003),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 546 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000012),UINT32_C(0x00000002),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 547 : EVEX,PROT,AVX512DQ,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00080040),UINT32_C(0x02000012),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 548 : LIG,FL,EVEX,PROT,AVX512,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000012),UINT32_C(0x00000005),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 549 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000012),UINT32_C(0x00000004),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 550 : EVEX,PROT,AVX512BW,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x10000012),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 551 : EVEX,PROT,AVX512ER,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00000080),UINT32_C(0x02000012),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 552 : WIG,EVEX,PROT,AVX512,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00000040),UINT32_C(0x00000012),UINT32_C(0x00000002),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 553 : LIG,EVEX,PROT,AVX512DQ,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x20000012),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 554 : EVEX,PROT,AVX512PF,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00000080),UINT32_C(0x00000012),UINT32_C(0x00000005),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 555 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00000080),UINT32_C(0x00000012),UINT32_C(0x00000004),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 556 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x08000012),UINT32_C(0x00000001),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 557 : EVEX,PROT,AVX512CD,AVX512VL,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x08000012),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 558 : EVEX,PROT,AVX512CD,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000012),UINT32_C(0x00000011),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 559 : EVEX,PROT,AVX512VL,AVX512VBMI,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000012),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 560 : EVEX,PROT,AVX512VBMI,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000012),UINT32_C(0x00000009),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 561 : EVEX,PROT,AVX512VL,AVX512IFMA,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000012),UINT32_C(0x00000008),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 562 : EVEX,PROT,AVX512IFMA,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00000080),UINT32_C(0x02000012),UINT32_C(0x00000001),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 563 : WIG,EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00000040),UINT32_C(0x10000012),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 564 : LIG,EVEX,PROT,AVX512ER,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000012),UINT32_C(0x00008001),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 565 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000012),UINT32_C(0x00008000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 566 : EVEX,PROT,AVX512FP16,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00000040),UINT32_C(0x00000012),UINT32_C(0x00008000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 567 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00002000),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00800000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 568 : LONG,PROT,PKU,X86_64 */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00001000),UINT32_C(0x00008000)}}, /* 569 : PTWRITE,FUTURE */ + {{UINT32_C(0x00400020),UINT32_C(0x00002000),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00001000),UINT32_C(0x00000800)}}, /* 570 : AR0,SX,LONG,PROT,PTWRITE,X86_64 */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00002000),UINT32_C(0x00008000)}}, /* 571 : CLDEMOTE,FUTURE */ + {{UINT32_C(0x40000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00004000),UINT32_C(0x00008000)}}, /* 572 : NOAPX,MOVDIRI,FUTURE */ + {{UINT32_C(0x40000000),UINT32_C(0x00002000),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00004000),UINT32_C(0x00000800)}}, /* 573 : NOAPX,LONG,PROT,MOVDIRI,X86_64 */ + {{UINT32_C(0x00000000),UINT32_C(0x00002000),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00004000),UINT32_C(0x00000800)}}, /* 574 : LONG,EVEX,PROT,APX,MOVDIRI,X86_64 */ + {{UINT32_C(0x60000000),UINT32_C(0x00001000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000),UINT32_C(0x00008000)}}, /* 575 : NOREX,NOAPX,NOLONG,MOVDIR64B,FUTURE */ + {{UINT32_C(0x40000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000),UINT32_C(0x00008000)}}, /* 576 : NOAPX,MOVDIR64B,FUTURE */ + {{UINT32_C(0x40000000),UINT32_C(0x00002000),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000),UINT32_C(0x00000800)}}, /* 577 : NOAPX,LONG,PROT,MOVDIR64B,X86_64 */ + {{UINT32_C(0x00000000),UINT32_C(0x00002000),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00008000),UINT32_C(0x00000800)}}, /* 578 : LONG,EVEX,PROT,APX,MOVDIR64B,X86_64 */ + {{UINT32_C(0x00000000),UINT32_C(0x00080000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000002),UINT32_C(0x00008000)}}, /* 579 : FL,PCONFIG,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000001),UINT32_C(0x00008000)}}, /* 580 : PBNDKB,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00008000)}}, /* 581 : MOVRS,FUTURE */ + {{UINT32_C(0x40000000),UINT32_C(0x00000000),UINT32_C(0x00000200),UINT32_C(0x00000100),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 582 : NOAPX,SSE,GFNI,FUTURE */ + {{UINT32_C(0x40000000),UINT32_C(0x00000000),UINT32_C(0x00040001),UINT32_C(0x00000100),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 583 : NOAPX,VEX,AVX,GFNI,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000012),UINT32_C(0x00000101),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 584 : EVEX,PROT,AVX512VL,GFNI,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x02000012),UINT32_C(0x00000100),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 585 : EVEX,PROT,AVX512,GFNI,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000012),UINT32_C(0x00000201),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 586 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000012),UINT32_C(0x00000200),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 587 : EVEX,PROT,AVX512VBMI2,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000012),UINT32_C(0x00000401),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 588 : EVEX,PROT,AVX512VL,AVX512VNNI,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000012),UINT32_C(0x00000400),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 589 : EVEX,PROT,AVX512VNNI,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000012),UINT32_C(0x00000801),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 590 : EVEX,PROT,AVX512VL,AVX512BITALG,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000012),UINT32_C(0x00000800),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 591 : EVEX,PROT,AVX512BITALG,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000012),UINT32_C(0x00001001),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 592 : EVEX,PROT,AVX512VL,AVX512VPOPCNTDQ,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000012),UINT32_C(0x00001000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 593 : EVEX,PROT,AVX512VPOPCNTDQ,FUTURE */ + {{UINT32_C(0x000080e0),UINT32_C(0x00000000),UINT32_C(0x00000012),UINT32_C(0x00002000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 594 : AR0,AR1,AR2,SO,EVEX,PROT,AVX5124FMAPS,FUTURE */ + {{UINT32_C(0x000080e0),UINT32_C(0x00000040),UINT32_C(0x00000012),UINT32_C(0x00002000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 595 : AR0,AR1,AR2,SO,LIG,EVEX,PROT,AVX5124FMAPS,FUTURE */ + {{UINT32_C(0x000080e0),UINT32_C(0x00000000),UINT32_C(0x00000012),UINT32_C(0x00004000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 596 : AR0,AR1,AR2,SO,EVEX,PROT,AVX5124VNNIW,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 597 : SGX,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00080000),UINT32_C(0x00000000),UINT32_C(0x00080000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 598 : FL,CET,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00080000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 599 : CET,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00002000),UINT32_C(0x00000010),UINT32_C(0x00080000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 600 : LONG,PROT,CET,X86_64 */ + {{UINT32_C(0x40000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00080000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 601 : NOAPX,CET,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00002000),UINT32_C(0x00000012),UINT32_C(0x00080000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 602 : LONG,EVEX,PROT,CET,APX,X86_64 */ + {{UINT32_C(0x40000000),UINT32_C(0x00002000),UINT32_C(0x00000010),UINT32_C(0x00080000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 603 : NOAPX,LONG,PROT,CET,X86_64 */ + {{UINT32_C(0x60020060),UINT32_C(0x00081000),UINT32_C(0x00000000),UINT32_C(0x00100000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 604 : AR0,AR1,SZ,NOREX,NOAPX,NOLONG,FL,ENQCMD,FUTURE */ + {{UINT32_C(0x40020060),UINT32_C(0x00080000),UINT32_C(0x00000000),UINT32_C(0x00100000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 605 : AR0,AR1,SZ,NOAPX,FL,ENQCMD,FUTURE */ + {{UINT32_C(0x40020060),UINT32_C(0x00082000),UINT32_C(0x00000010),UINT32_C(0x00100000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 606 : AR0,AR1,SZ,NOAPX,LONG,FL,PROT,ENQCMD,X86_64 */ + {{UINT32_C(0x00020060),UINT32_C(0x00082000),UINT32_C(0x00000016),UINT32_C(0x00100000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 607 : AR0,AR1,SZ,LONG,FL,EVEX,PRIV,PROT,ENQCMD,APX,X86_64 */ + {{UINT32_C(0x60020060),UINT32_C(0x00081000),UINT32_C(0x00000004),UINT32_C(0x00100000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 608 : AR0,AR1,SZ,NOREX,NOAPX,NOLONG,FL,PRIV,ENQCMD,FUTURE */ + {{UINT32_C(0x40020060),UINT32_C(0x00080000),UINT32_C(0x00000004),UINT32_C(0x00100000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 609 : AR0,AR1,SZ,NOAPX,FL,PRIV,ENQCMD,FUTURE */ + {{UINT32_C(0x40020060),UINT32_C(0x00082000),UINT32_C(0x00000014),UINT32_C(0x00100000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 610 : AR0,AR1,SZ,NOAPX,LONG,FL,PRIV,PROT,ENQCMD,X86_64 */ + {{UINT32_C(0x00000000),UINT32_C(0x00080000),UINT32_C(0x00000004),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000002),UINT32_C(0x00008000)}}, /* 611 : FL,PRIV,PCONFIG,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00200000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 612 : TSXLDTRK,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000012),UINT32_C(0x00400001),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 613 : EVEX,PROT,AVX512VL,AVX512BF16,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000012),UINT32_C(0x00400000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 614 : EVEX,PROT,AVX512BF16,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000012),UINT32_C(0x00800001),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 615 : EVEX,PROT,AVX512VL,AVX512VP2INTERSECT,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x04000012),UINT32_C(0x00800000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 616 : EVEX,PROT,AVX512F,AVX512VP2INTERSECT,FUTURE */ + {{UINT32_C(0x40020020),UINT32_C(0x00002000),UINT32_C(0x00000011),UINT32_C(0x01000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 617 : AR0,SZ,NOAPX,LONG,VEX,PROT,AMXTILE,X86_64 */ + {{UINT32_C(0x00020020),UINT32_C(0x00002000),UINT32_C(0x00000012),UINT32_C(0x01000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 618 : AR0,SZ,LONG,EVEX,PROT,AMXTILE,APX,X86_64 */ + {{UINT32_C(0x40000000),UINT32_C(0x00002000),UINT32_C(0x00000011),UINT32_C(0x02000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 619 : NOAPX,LONG,VEX,PROT,AMXBF16,X86_64 */ + {{UINT32_C(0x40000000),UINT32_C(0x00002000),UINT32_C(0x00000011),UINT32_C(0x04000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 620 : NOAPX,LONG,VEX,PROT,AMXFP16,X86_64 */ + {{UINT32_C(0x40000000),UINT32_C(0x00002000),UINT32_C(0x00000011),UINT32_C(0x40000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 621 : NOAPX,LONG,VEX,PROT,AMXCOMPLEX,X86_64 */ + {{UINT32_C(0x40000000),UINT32_C(0x00002000),UINT32_C(0x00000011),UINT32_C(0x20000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 622 : NOAPX,LONG,VEX,PROT,AMXINT8,X86_64 */ + {{UINT32_C(0x40200040),UINT32_C(0x0000a200),UINT32_C(0x00000011),UINT32_C(0x01000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 623 : AR1,ANYSIZE,NOAPX,SIB,LONG,MIB,VEX,PROT,AMXTILE,APX,X86_64 */ + {{UINT32_C(0x00200040),UINT32_C(0x0000a200),UINT32_C(0x00000012),UINT32_C(0x01000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 624 : AR1,ANYSIZE,SIB,LONG,MIB,EVEX,PROT,AMXTILE,APX,X86_64 */ + {{UINT32_C(0x40000000),UINT32_C(0x00002000),UINT32_C(0x00000011),UINT32_C(0x01000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 625 : NOAPX,LONG,VEX,PROT,AMXTILE,X86_64 */ + {{UINT32_C(0x40200020),UINT32_C(0x0000a200),UINT32_C(0x00000011),UINT32_C(0x01000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 626 : AR0,ANYSIZE,NOAPX,SIB,LONG,MIB,VEX,PROT,AMXTILE,APX,X86_64 */ + {{UINT32_C(0x00200020),UINT32_C(0x0000a200),UINT32_C(0x00000012),UINT32_C(0x01000000),UINT32_C(0x00040000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 627 : AR0,ANYSIZE,SIB,LONG,MIB,EVEX,PROT,AMXTILE,APX,X86_64 */ + {{UINT32_C(0x40200040),UINT32_C(0x0000a200),UINT32_C(0x00000011),UINT32_C(0x01000000),UINT32_C(0x00040001),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 628 : AR1,ANYSIZE,NOAPX,SIB,LONG,MIB,VEX,PROT,AMXTILE,AMXMOVRS,APX,FUTURE */ + {{UINT32_C(0x00200040),UINT32_C(0x0000a200),UINT32_C(0x00000012),UINT32_C(0x01000000),UINT32_C(0x00040001),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 629 : AR1,ANYSIZE,SIB,LONG,MIB,EVEX,PROT,AMXTILE,AMXMOVRS,APX,FUTURE */ + {{UINT32_C(0x40000000),UINT32_C(0x00000200),UINT32_C(0x00000001),UINT32_C(0x00000000),UINT32_C(0x00000002),UINT32_C(0x00180000),UINT32_C(0x00008000)}}, /* 630 : NOAPX,SIB,VEX,AMXTRANSPOSE,OBSOLETE,NEVER,FUTURE */ + {{UINT32_C(0x40000000),UINT32_C(0x00000000),UINT32_C(0x00000001),UINT32_C(0x00000000),UINT32_C(0x00000002),UINT32_C(0x00180000),UINT32_C(0x00008000)}}, /* 631 : NOAPX,VEX,AMXTRANSPOSE,OBSOLETE,NEVER,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000012),UINT32_C(0x80000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 632 : EVEX,PROT,AMXAVX512,FUTURE */ + {{UINT32_C(0x40000000),UINT32_C(0x00000000),UINT32_C(0x00000001),UINT32_C(0x08000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 633 : NOAPX,VEX,AMXFP8,FUTURE */ + {{UINT32_C(0x40000000),UINT32_C(0x00000000),UINT32_C(0x00000001),UINT32_C(0x10000000),UINT32_C(0x00000000),UINT32_C(0x00180000),UINT32_C(0x00008000)}}, /* 634 : NOAPX,VEX,AMXTF32,OBSOLETE,NEVER,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00080040),UINT32_C(0x00000012),UINT32_C(0x00008000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 635 : LIG,FL,EVEX,PROT,AVX512FP16,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00000080),UINT32_C(0x00000012),UINT32_C(0x00008000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 636 : WIG,EVEX,PROT,AVX512FP16,FUTURE */ + {{UINT32_C(0x40002060),UINT32_C(0x00002000),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000008),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 637 : AR0,AR1,SQ,NOAPX,LONG,PROT,RAOINT,X86_64 */ + {{UINT32_C(0x00002060),UINT32_C(0x00002100),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00040008),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 638 : AR0,AR1,SQ,WW,LONG,EVEX,PROT,RAOINT,APX,X86_64 */ + {{UINT32_C(0x00000000),UINT32_C(0x00002000),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 639 : LONG,PROT,UINTR,X86_64 */ + {{UINT32_C(0x00040000),UINT32_C(0x00002000),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 640 : NWSIZE,LONG,PROT,UINTR,X86_64 */ + {{UINT32_C(0x00000000),UINT32_C(0x00082000),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000010),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 641 : LONG,FL,PROT,UINTR,X86_64 */ + {{UINT32_C(0x40000460),UINT32_C(0x00000000),UINT32_C(0x00000004),UINT32_C(0x00000000),UINT32_C(0x00002000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 642 : AR0,AR1,SB,NOAPX,PRIV,HRESET,FUTURE */ + {{UINT32_C(0x40000420),UINT32_C(0x00000000),UINT32_C(0x00000004),UINT32_C(0x00000000),UINT32_C(0x00002000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 643 : AR0,SB,NOAPX,PRIV,HRESET,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00100000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 644 : EVEX,PROT,AVX10_2,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00000040),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00100000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 645 : LIG,EVEX,PROT,AVX10_2,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00300000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 646 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {{UINT32_C(0x00000000),UINT32_C(0x00002040),UINT32_C(0x00000012),UINT32_C(0x00000000),UINT32_C(0x00100000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 647 : LIG,LONG,EVEX,PROT,AVX10_2,X86_64 */ + {{UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000012),UINT32_C(0x00010000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00008000)}}, /* 648 : EVEX,PROT,AVX512BMM,FUTURE */ + {{UINT32_C(0x00000006),UINT32_C(0x00000000),UINT32_C(0x00000020),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000040)}}, /* 649 : SM1,SM2,UNDOC,P6 */ + {{UINT32_C(0x00000006),UINT32_C(0x00002000),UINT32_C(0x00000030),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 650 : SM1,SM2,LONG,PROT,UNDOC,X86_64 */ + {{UINT32_C(0x00000006),UINT32_C(0x00080000),UINT32_C(0x00000020),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000040)}}, /* 651 : SM1,SM2,FL,UNDOC,P6 */ + {{UINT32_C(0x00000006),UINT32_C(0x00082000),UINT32_C(0x00000030),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 652 : SM1,SM2,LONG,FL,PROT,UNDOC,X86_64 */ + {{UINT32_C(0x00000000),UINT32_C(0x00080000),UINT32_C(0x00000020),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000040)}}, /* 653 : FL,UNDOC,P6 */ + {{UINT32_C(0x00000000),UINT32_C(0x00082000),UINT32_C(0x00000030),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000000),UINT32_C(0x00000800)}}, /* 654 : LONG,FL,PROT,UNDOC,X86_64 */ +}; diff --git a/src/x86/insnsa.c b/src/x86/insnsa.c new file mode 100644 index 0000000..3a71345 --- /dev/null +++ b/src/x86/insnsa.c @@ -0,0 +1,47500 @@ +/* This file auto-generated from insns.dat by insns.pl - don't edit it */ + +#include "nasm.h" +#include "insns.h" + +static const struct itemplate instrux_RESB[1] = { + /* 0 : RESB imm [ resb ] PSEUDO */ + /* 340 : PSEUDO */ + {I_RESB, 1, {IMM_NORMAL,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72978, 0, 32}, +}; + +static const struct itemplate instrux_RESW[1] = { + /* 0 : RESW imm [ resb ] PSEUDO */ + /* 340 : PSEUDO */ + {I_RESW, 1, {IMM_NORMAL,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72978, 0, 33}, +}; + +static const struct itemplate instrux_RESD[1] = { + /* 0 : RESD imm [ resb ] PSEUDO */ + /* 340 : PSEUDO */ + {I_RESD, 1, {IMM_NORMAL,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72978, 0, 34}, +}; + +static const struct itemplate instrux_RESQ[1] = { + /* 0 : RESQ imm [ resb ] PSEUDO */ + /* 340 : PSEUDO */ + {I_RESQ, 1, {IMM_NORMAL,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72978, 0, 35}, +}; + +static const struct itemplate instrux_REST[1] = { + /* 0 : REST imm [ resb ] PSEUDO */ + /* 340 : PSEUDO */ + {I_REST, 1, {IMM_NORMAL,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72978, 0, 36}, +}; + +static const struct itemplate instrux_RESO[1] = { + /* 0 : RESO imm [ resb ] PSEUDO */ + /* 340 : PSEUDO */ + {I_RESO, 1, {IMM_NORMAL,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72978, 0, 37}, +}; + +static const struct itemplate instrux_RESY[1] = { + /* 0 : RESY imm [ resb ] PSEUDO */ + /* 340 : PSEUDO */ + {I_RESY, 1, {IMM_NORMAL,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72978, 0, 38}, +}; + +static const struct itemplate instrux_RESZ[1] = { + /* 0 : RESZ imm [ resb ] PSEUDO */ + /* 340 : PSEUDO */ + {I_RESZ, 1, {IMM_NORMAL,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72978, 0, 39}, +}; + +static const struct itemplate instrux_EQU[3] = { + /* 0 : EQU imm ignore PSEUDO */ + /* no bytecode : PSEUDO */ + {I_EQU, 1, {IMM_NORMAL,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73486, 0, 41}, + /* 1 : EQU imm:imm ignore PSEUDO */ + /* no bytecode : PSEUDO */ + {I_EQU, 2, {IMM_NORMAL|COLON,IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+73486, 0, 42}, + /* 2 : EQU spec4 ignore PSEUDO,DFV */ + /* no bytecode : PSEUDO,DFV */ + {I_EQU, 1, {IMMEDIATE|FOURBITS,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73486, 1, 43}, +}; + +static const struct itemplate instrux_NOP[7] = { + /* 0 : NOP void [ osz norexb nof3 90 ] BESTDIS,8086 */ + /* 330 314 326 001(90) : BESTDIS,8086 */ + {I_NOP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+66387, 2, 47}, + /* 1 : NOP rm16 [m: o16 0f 1f /0 ] BESTDIS,P6 */ + /* 320 355 001(1f) 200 : BESTDIS,P6 */ + {I_NOP, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+66399, 4, 49}, + /* 2 : NOP rm32 [m: o32 0f 1f /0 ] BESTDIS,P6 */ + /* 321 355 001(1f) 200 : BESTDIS,P6 */ + {I_NOP, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+66405, 4, 50}, + /* 3 : NOP rm64 [m: o64 0f 1f /0 ] LONG,BESTDIS,PROT,X86_64 */ + /* 324 355 001(1f) 200 : LONG,BESTDIS,PROT,X86_64 */ + {I_NOP, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+66411, 5, 51}, + /* 4 : NOP imm,reg16,rm16 [irm: o16 0f ibn /r ] SM1-2,UNDOC,P6 */ + /* 320 355 300 121 : SM1,SM2,UNDOC,P6 */ + {I_NOP, 3, {IMM_NORMAL,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+72569, 649, 7658}, + /* 5 : NOP imm,reg32,rm32 [irm: o32 0f ibn /r ] SM1-2,UNDOC,P6 */ + /* 321 355 300 121 : SM1,SM2,UNDOC,P6 */ + {I_NOP, 3, {IMM_NORMAL,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+72574, 649, 7659}, + /* 6 : NOP imm,reg64,rm64 [irm: o64 0f ibn /r ] SM1-2,LONG,PROT,UNDOC,X86_64 */ + /* 324 355 300 121 : SM1,SM2,LONG,PROT,UNDOC,X86_64 */ + {I_NOP, 3, {IMM_NORMAL,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+72579, 650, 7660}, +}; + +static const struct itemplate instrux_NOP2[1] = { + /* 0 : NOP2 void [ norexb nof3 66 90 ] ND,386 */ + /* 314 326 361 001(90) : 386 */ + {I_NOP2, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+66393, 3, 48}, +}; + +static const struct itemplate instrux_MOV[84] = { + /* 0 : MOV reg_al,mem_offs [-i: o8 a0 iwdq ] SM0-1,NOAPX,8086 */ + /* 001(a0) 045 : SM0,SM1,NOAPX,8086 */ + {I_MOV, 2, {REG_AL|RN_L16,MEM_OFFS,0,0,0}, NO_DECORATOR, nasm_bytecodes+72584, 6, 54}, + /* 1 : MOV reg_ax,mem_offs [-i: o16 a1 iwdq ] SM0-1,NOAPX,8086 */ + /* 320 001(a1) 045 : SM0,SM1,NOAPX,8086 */ + {I_MOV, 2, {REG_AX|RN_L16,MEM_OFFS,0,0,0}, NO_DECORATOR, nasm_bytecodes+71319, 6, 55}, + /* 2 : MOV reg_eax,mem_offs [-i: o32 a1 iwdq ] SM0-1,NOAPX,ZU,386 */ + /* 321 001(a1) 045 : SM0,SM1,NOAPX,ZU,386 */ + {I_MOV, 2, {REG_EAX|RN_L16,MEM_OFFS,0,0,0}, NO_DECORATOR, nasm_bytecodes+71324, 7, 56}, + /* 3 : MOV reg_rax,mem_offs [-i: o64 a1 iwdq ] SM0-1,NOAPX,ZU,LONG,PROT,X86_64 */ + /* 324 001(a1) 045 : SM0,SM1,NOAPX,ZU,LONG,PROT,X86_64 */ + {I_MOV, 2, {REG_RAX|RN_L16,MEM_OFFS,0,0,0}, NO_DECORATOR, nasm_bytecodes+71329, 8, 57}, + /* 4 : MOV mem_offs,reg_al [i-: o8 a2 iwdq ] SM0-1,NOAPX,NOHLE,8086 */ + /* 001(a2) 044 : SM0,SM1,NOAPX,NOHLE,8086 */ + {I_MOV, 2, {MEM_OFFS,REG_AL|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+72588, 9, 58}, + /* 5 : MOV mem_offs,reg_ax [i-: o16 a3 iwdq ] SM0-1,NOAPX,NOHLE,8086 */ + /* 320 001(a3) 044 : SM0,SM1,NOAPX,NOHLE,8086 */ + {I_MOV, 2, {MEM_OFFS,REG_AX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+71334, 9, 59}, + /* 6 : MOV mem_offs,reg_eax [i-: o32 a3 iwdq ] SM0-1,NOAPX,NOHLE,386 */ + /* 321 001(a3) 044 : SM0,SM1,NOAPX,NOHLE,386 */ + {I_MOV, 2, {MEM_OFFS,REG_EAX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+71339, 10, 60}, + /* 7 : MOV mem_offs,reg_rax [i-: o64 a3 iwdq ] SM0-1,NOAPX,LONG,NOHLE,PROT,X86_64 */ + /* 324 001(a3) 044 : SM0,SM1,NOAPX,LONG,NOHLE,PROT,X86_64 */ + {I_MOV, 2, {MEM_OFFS,REG_RAX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+71344, 11, 61}, + /* 8 : MOV rm8,reg8 [mr: hlexr o8 88 /r ] SM0-1,8086 */ + /* 271 001(88) 101 : SM0,SM1,8086 */ + {I_MOV, 2, {RM_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+71349, 12, 70}, + /* 9 : MOV rm16,reg16 [mr: hlexr o16 89 /r ] SM0-1,8086 */ + /* 271 320 001(89) 101 : SM0,SM1,8086 */ + {I_MOV, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66417, 12, 71}, + /* 10 : MOV rm32,reg32 [mr: hlexr o32 89 /r ] SM0-1,386 */ + /* 271 321 001(89) 101 : SM0,SM1,386 */ + {I_MOV, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+66423, 13, 72}, + /* 11 : MOV rm64,reg64 [mr: hlexr o64 89 /r ] SM0-1,LONG,PROT,X86_64 */ + /* 271 324 001(89) 101 : SM0,SM1,LONG,PROT,X86_64 */ + {I_MOV, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+66429, 14, 73}, + /* 12 : MOV reg8,rm8 [rm: o8 8a /r ] SM0-1,8086 */ + /* 001(8a) 110 : SM0,SM1,8086 */ + {I_MOV, 2, {REG_GPR|BITS8,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+66443, 12, 74}, + /* 13 : MOV reg16,rm16 [rm: o16 8b /r ] SM0-1,8086 */ + /* 320 001(8b) 110 : SM0,SM1,8086 */ + {I_MOV, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66988, 12, 75}, + /* 14 : MOV reg32,rm32 [rm: o32 8b /r ] SM0-1,386 */ + /* 321 001(8b) 110 : SM0,SM1,386 */ + {I_MOV, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+66994, 13, 76}, + /* 15 : MOV reg64,rm64 [rm: o64 8b /r ] SM0-1,LONG,PROT,X86_64 */ + /* 324 001(8b) 110 : SM0,SM1,LONG,PROT,X86_64 */ + {I_MOV, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+67000, 14, 77}, + /* 16 : MOV reg64,udword64 [ri: o32 b8+r id,u ] ND,SM0-1,OPT,LONG,PROT,X86_64 */ + /* 321 010 270(265 : SM0,SM1,OPT,LONG,PROT,X86_64 */ + {I_MOV, 2, {REG_GPR|BITS64,UDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+71354, 15, 78}, + /* 17 : MOV reg64,sdword64 [mi: o64 c7 /0 id,s ] ND,SM0-1,SDWORD,OPT,LONG,PROT,X86_64 */ + /* 324 001(c7) 200 255 : SM0,SM1,SDWORD,OPT,LONG,PROT,X86_64 */ + {I_MOV, 2, {REG_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+54866, 16, 79}, + /* 18 : MOV reg8,imm8 [ri: o8 b0+r ib ] SM0-1,8086 */ + /* 010 260(021 : SM0,SM1,8086 */ + {I_MOV, 2, {REG_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+72592, 12, 80}, + /* 19 : MOV reg16,imm16 [ri: o16 b8+r iw ] SM0-1,8086 */ + /* 320 010 270(031 : SM0,SM1,8086 */ + {I_MOV, 2, {REG_GPR|BITS16,IMM_NORMAL|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+71359, 12, 81}, + /* 20 : MOV reg32,imm32 [ri: o32 b8+r id ] SM0-1,386 */ + /* 321 010 270(041 : SM0,SM1,386 */ + {I_MOV, 2, {REG_GPR|BITS32,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+71364, 13, 82}, + /* 21 : MOV reg64,imm64 [ri: o64 b8+r iq ] SM0-1,LONG,PROT,X86_64 */ + /* 324 010 270(055 : SM0,SM1,LONG,PROT,X86_64 */ + {I_MOV, 2, {REG_GPR|BITS64,IMM_NORMAL|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+71369, 14, 83}, + /* 22 : MOV reg8,imm8|abs [ri: o8 b0+r ib ] SM0,ND,SM1,8086 */ + /* 010 260(021 : SM0,SM1,8086 */ + {I_MOV, 2, {REG_GPR|BITS8,IMM_NORMAL|BITS8|ABS,0,0,0}, NO_DECORATOR, nasm_bytecodes+72592, 12, 84}, + /* 23 : MOV reg16,imm16|abs [ri: o16 b8+r iw ] SM0,ND,SM1,8086 */ + /* 320 010 270(031 : SM0,SM1,8086 */ + {I_MOV, 2, {REG_GPR|BITS16,IMM_NORMAL|BITS16|ABS,0,0,0}, NO_DECORATOR, nasm_bytecodes+71359, 12, 85}, + /* 24 : MOV reg32,imm32|abs [ri: o32 b8+r id ] ND,SM0-1,386 */ + /* 321 010 270(041 : SM0,SM1,386 */ + {I_MOV, 2, {REG_GPR|BITS32,IMM_NORMAL|BITS32|ABS,0,0,0}, NO_DECORATOR, nasm_bytecodes+71364, 13, 86}, + /* 25 : MOV reg64,imm64|abs [ri: o64 b8+r iq ] SM0,ND,SM1,LONG,PROT,X86_64 */ + /* 324 010 270(055 : SM0,SM1,LONG,PROT,X86_64 */ + {I_MOV, 2, {REG_GPR|BITS64,IMM_NORMAL|BITS64|ABS,0,0,0}, NO_DECORATOR, nasm_bytecodes+71369, 14, 87}, + /* 26 : MOV rm8,imm8 [mi: hlexr o8 c6 /0 ib ] SM0-1,8086 */ + /* 271 001(c6) 200 021 : SM0,SM1,8086 */ + {I_MOV, 2, {RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+66435, 12, 92}, + /* 27 : MOV rm16,imm16 [mi: hlexr o16 c7 /0 iw ] SM0-1,8086 */ + /* 271 320 001(c7) 200 031 : SM0,SM1,8086 */ + {I_MOV, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+54851, 12, 93}, + /* 28 : MOV rm32,imm32 [mi: hlexr o32 c7 /0 id ] SM0-1,386 */ + /* 271 321 001(c7) 200 041 : SM0,SM1,386 */ + {I_MOV, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+54858, 13, 94}, + /* 29 : MOV rm64,sdword64 [mi: hlexr o64 c7 /0 id,s ] SM0-1,LONG,PROT,X86_64 */ + /* 271 324 001(c7) 200 255 : SM0,SM1,LONG,PROT,X86_64 */ + {I_MOV, 2, {RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+54865, 14, 95}, + /* 30 : MOV reg32,reg_creg [mr: rex.l 0f 20 /r ] NOREX,NOAPX,NOLONG,PRIV,386 */ + /* 334 355 001(20) 101 : NOREX,NOAPX,NOLONG,PRIV,386 */ + {I_MOV, 2, {REG_GPR|BITS32|RN_L16,REG_CREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+67377, 274, 1658}, + /* 31 : MOV reg_creg,reg32 [rm: rex.l 0f 22 /r ] NOREX,NOAPX,NOLONG,PRIV,386 */ + /* 334 355 001(22) 110 : NOREX,NOAPX,NOLONG,PRIV,386 */ + {I_MOV, 2, {REG_CREG|RN_L16,REG_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+67383, 274, 1659}, + /* 32 : MOV reg64,reg_creg [mr: o64nw 0f 20 /r ] LONG,PRIV,PROT,X86_64 */ + /* 323 355 001(20) 101 : NWSIZE,LONG,PRIV,PROT,X86_64 */ + {I_MOV, 2, {REG_GPR|BITS64,REG_CREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+67389, 275, 1660}, + /* 33 : MOV reg_creg,reg64 [rm: o64nw 0f 22 /r ] LONG,PRIV,PROT,X86_64 */ + /* 323 355 001(22) 110 : NWSIZE,LONG,PRIV,PROT,X86_64 */ + {I_MOV, 2, {REG_CREG,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+67395, 275, 1661}, + /* 34 : MOV reg32,reg_dreg [mr: 0f 21 /r ] NOREX,NOAPX,NOLONG,PRIV,386 */ + /* 355 001(21) 101 : NOREX,NOAPX,NOLONG,PRIV,386 */ + {I_MOV, 2, {REG_GPR|BITS32|RN_L16,REG_DREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+67402, 274, 1662}, + /* 35 : MOV reg_dreg,reg32 [rm: 0f 23 /r ] NOREX,NOAPX,NOLONG,PRIV,386 */ + /* 355 001(23) 110 : NOREX,NOAPX,NOLONG,PRIV,386 */ + {I_MOV, 2, {REG_DREG|RN_L16,REG_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+67408, 274, 1663}, + /* 36 : MOV reg64,reg_dreg [mr: o64nw 0f 21 /r ] LONG,PRIV,PROT,X86_64 */ + /* 323 355 001(21) 101 : NWSIZE,LONG,PRIV,PROT,X86_64 */ + {I_MOV, 2, {REG_GPR|BITS64,REG_DREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+67401, 275, 1664}, + /* 37 : MOV reg_dreg,reg64 [rm: o64nw 0f 23 /r ] LONG,PRIV,PROT,X86_64 */ + /* 323 355 001(23) 110 : NWSIZE,LONG,PRIV,PROT,X86_64 */ + {I_MOV, 2, {REG_DREG,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+67407, 275, 1665}, + /* 38 : MOV reg32,reg_treg [mr: 0f 24 /r ] ND,NOREX,NOAPX,NOLONG,OBSOLETE,386 */ + /* 355 001(24) 101 : NOREX,NOAPX,NOLONG,OBSOLETE,386 */ + {I_MOV, 2, {REG_GPR|BITS32|RN_L16,REG_TREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+71834, 276, 1666}, + /* 39 : MOV reg_treg,reg32 [rm: 0f 26 /r ] ND,NOREX,NOAPX,NOLONG,OBSOLETE,386 */ + /* 355 001(26) 110 : NOREX,NOAPX,NOLONG,OBSOLETE,386 */ + {I_MOV, 2, {REG_TREG|RN_L16,REG_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+71839, 276, 1667}, + /* 40 : MOV mem16,reg_sreg [mr: 8c /r ] 8086 */ + /* 001(8c) 101 : 8086 */ + {I_MOV, 2, {MEMORY|BITS16,REG_SREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+71900, 23, 1762}, + /* 41 : MOV reg16,reg_sreg [mr: o16 8c /r ] 8086 */ + /* 320 001(8c) 101 : 8086 */ + {I_MOV, 2, {REG_GPR|BITS16,REG_SREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+71899, 23, 1763}, + /* 42 : MOV reg32,reg_sreg [mr: optd o32 8c /r ] 386 */ + /* 337 321 001(8c) 101 : 386 */ + {I_MOV, 2, {REG_GPR|BITS32,REG_SREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+67509, 3, 1764}, + /* 43 : MOV reg64,reg_sreg [mr: optd o64 8c /r ] LONG,386,X86_64 */ + /* 337 324 001(8c) 101 : LONG,PROT,X86_64 */ + {I_MOV, 2, {REG_GPR|BITS64,REG_SREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+67515, 24, 1765}, + /* 44 : MOV reg_sreg,mem16 [rm: 8e /r ] 8086 */ + /* 001(8e) 110 : 8086 */ + {I_MOV, 2, {REG_SREG,MEMORY|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+67535, 23, 1766}, + /* 45 : MOV reg_sreg,reg16 [rm: optw o16 8e /r ] 8086 */ + /* 336 320 001(8e) 110 : 8086 */ + {I_MOV, 2, {REG_SREG,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+67521, 23, 1767}, + /* 46 : MOV reg_sreg,reg32 [rm: optw o32 8e /r ] 386 */ + /* 336 321 001(8e) 110 : 386 */ + {I_MOV, 2, {REG_SREG,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+67527, 3, 1768}, + /* 47 : MOV reg_sreg,reg64 [rm: optw o64 8e /r ] LONG,386,X86_64 */ + /* 336 324 001(8e) 110 : LONG,PROT,X86_64 */ + {I_MOV, 2, {REG_SREG,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+67533, 24, 1769}, + /* 48 : MOV kreg8,krm8 [rm: vex.l0.0f.ko8 90 /r ] ND,ZU,AVX512DQ,FUTURE */ + /* 270(001 001) 001(90) 110 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_MOV, 2, {OPMASKREG|BITS8|RN_L16,RM_OPMASK|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65281, 499, 4430}, + /* 49 : MOV kreg8,krm8 [rm: evex.l0.0f.ko8 90 /r ] ND,ZU,AVX512DQ,FUTURE,APX */ + /* 250(f1 7d 08) 300 001(90) 110 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_MOV, 2, {OPMASKREG|BITS8,RM_OPMASK|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+29614, 500, 4430}, + /* 50 : MOV kreg16,krm16 [rm: vex.l0.0f.ko16 90 /r ] ND,ZU,AVX512F,FUTURE */ + /* 270(001 000) 001(90) 110 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_MOV, 2, {OPMASKREG|BITS16|RN_L16,RM_OPMASK|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65288, 501, 4431}, + /* 51 : MOV kreg16,krm16 [rm: evex.l0.0f.ko16 90 /r ] ND,ZU,AVX512F,FUTURE,APX */ + /* 250(f1 7c 08) 300 001(90) 110 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_MOV, 2, {OPMASKREG|BITS16,RM_OPMASK|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29623, 502, 4431}, + /* 52 : MOV kreg32,krm32 [rm: vex.l0.0f.ko32 90 /r ] ND,ZU,AVX512BW,FUTURE */ + /* 270(001 201) 001(90) 110 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_MOV, 2, {OPMASKREG|BITS32|RN_L16,RM_OPMASK|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65295, 503, 4432}, + /* 53 : MOV kreg32,krm32 [rm: evex.l0.0f.ko32 90 /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 250(f1 fd 08) 300 001(90) 110 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_MOV, 2, {OPMASKREG|BITS32,RM_OPMASK|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+29632, 504, 4432}, + /* 54 : MOV kreg64,krm64 [rm: vex.l0.0f.ko64 90 /r ] ND,ZU,AVX512BW,FUTURE */ + /* 270(001 200) 001(90) 110 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_MOV, 2, {OPMASKREG|BITS64|RN_L16,RM_OPMASK|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65302, 503, 4433}, + /* 55 : MOV kreg64,krm64 [rm: evex.l0.0f.ko64 90 /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 250(f1 fc 08) 300 001(90) 110 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_MOV, 2, {OPMASKREG|BITS64,RM_OPMASK|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+29641, 504, 4433}, + /* 56 : MOV mem8,kreg8 [mr: vex.l0.0f.ko8 91 /r ] ND,ZU,AVX512DQ,FUTURE */ + /* 270(001 001) 001(91) 101 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_MOV, 2, {MEMORY|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65309, 499, 4446}, + /* 57 : MOV mem8,kreg8 [mr: evex.l0.0f.ko8 91 /r ] ND,ZU,AVX512DQ,FUTURE,APX */ + /* 250(f1 7d 08) 300 001(91) 101 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_MOV, 2, {MEMORY|BITS8,OPMASKREG|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+29650, 500, 4446}, + /* 58 : MOV mem16,kreg16 [mr: vex.l0.0f.ko16 91 /r ] ND,ZU,AVX512DQ,FUTURE */ + /* 270(001 000) 001(91) 101 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_MOV, 2, {MEMORY|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65316, 499, 4447}, + /* 59 : MOV mem16,kreg16 [mr: evex.l0.0f.ko16 91 /r ] ND,ZU,AVX512DQ,FUTURE,APX */ + /* 250(f1 7c 08) 300 001(91) 101 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_MOV, 2, {MEMORY|BITS16,OPMASKREG|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29659, 500, 4447}, + /* 60 : MOV mem32,kreg32 [mr: vex.l0.0f.ko32 91 /r ] ND,ZU,AVX512BW,FUTURE */ + /* 270(001 201) 001(91) 101 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_MOV, 2, {MEMORY|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65323, 503, 4448}, + /* 61 : MOV mem32,kreg32 [mr: evex.l0.0f.ko32 91 /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 250(f1 fd 08) 300 001(91) 101 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_MOV, 2, {MEMORY|BITS32,OPMASKREG|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+29668, 504, 4448}, + /* 62 : MOV mem64,kreg64 [mr: vex.l0.0f.ko64 91 /r ] ND,ZU,AVX512BW,FUTURE */ + /* 270(001 200) 001(91) 101 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_MOV, 2, {MEMORY|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65330, 503, 4449}, + /* 63 : MOV mem64,kreg64 [mr: evex.l0.0f.ko64 91 /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 250(f1 fc 08) 300 001(91) 101 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_MOV, 2, {MEMORY|BITS64,OPMASKREG|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+29677, 504, 4449}, + /* 64 : MOV kreg32,reg32 [rm: vex.l0.0f.f2.w0 92 /r ] ND,ZU,AVX512BW,FUTURE */ + /* 270(001 003) 001(92) 110 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_MOV, 2, {OPMASKREG|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65337, 503, 4456}, + /* 65 : MOV kreg32,reg32 [rm: evex.l0.0f.f2.w0 92 /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 250(f1 7f 08) 300 001(92) 110 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_MOV, 2, {OPMASKREG|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+29686, 504, 4456}, + /* 66 : MOV kreg64,reg64 [rm: vex.l0.0f.f2.w1 92 /r ] ND,ZU,LONG,PROT,AVX512BW,X86_64 */ + /* 270(001 203) 001(92) 110 : NOAPX,ZU,LONG,VEX,PROT,AVX512BW,X86_64 */ + {I_MOV, 2, {OPMASKREG|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65344, 505, 4457}, + /* 67 : MOV kreg64,reg64 [rm: evex.l0.0f.f2.w1 92 /r ] ND,ZU,LONG,PROT,AVX512BW,X86_64,APX */ + /* 250(f1 ff 08) 300 001(92) 110 : ZU,LONG,EVEX,PROT,AVX512BW,APX,X86_64 */ + {I_MOV, 2, {OPMASKREG|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+29695, 506, 4457}, + /* 68 : MOV reg32,kreg32 [rm: vex.l0.0f.f2.w0 93 /r ] ND,ZU,AVX512BW,FUTURE */ + /* 270(001 003) 001(93) 110 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_MOV, 2, {REG_GPR|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65351, 503, 4464}, + /* 69 : MOV reg32,kreg32 [rm: evex.l0.0f.f2.w0 93 /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 250(f1 7f 08) 300 001(93) 110 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_MOV, 2, {REG_GPR|BITS32,OPMASKREG|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+29704, 504, 4464}, + /* 70 : MOV reg64,kreg64 [rm: vex.l0.0f.f2.w1 93 /r ] ND,ZU,LONG,PROT,AVX512BW,X86_64 */ + /* 270(001 203) 001(93) 110 : NOAPX,ZU,LONG,VEX,PROT,AVX512BW,X86_64 */ + {I_MOV, 2, {REG_GPR|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65358, 505, 4465}, + /* 71 : MOV reg64,kreg64 [rm: evex.l0.0f.f2.w1 93 /r ] ND,ZU,LONG,PROT,AVX512BW,X86_64,APX */ + /* 250(f1 ff 08) 300 001(93) 110 : ZU,LONG,EVEX,PROT,AVX512BW,APX,X86_64 */ + {I_MOV, 2, {REG_GPR|BITS64,OPMASKREG|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+29713, 506, 4465}, + /* 72 : MOV kreg8,reg32 [rm: vex.l0.0f.66.w0 92 /r ] ND,ZU,AVX512DQ,FUTURE */ + /* 270(001 001) 001(92) 110 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_MOV, 2, {OPMASKREG|BITS8|RN_L16,REG_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65365, 499, 4469}, + /* 73 : MOV kreg8,reg32 [rm: evex.l0.0f.66.w0 92 /r ] ND,ZU,AVX512DQ,FUTURE,APX */ + /* 250(f1 7d 08) 300 001(92) 110 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_MOV, 2, {OPMASKREG|BITS8,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+29722, 500, 4469}, + /* 74 : MOV kreg8,reg8 [rm: vex.l0.0f.66.w0 92 /r ] ND,ZU,AVX512DQ,FUTURE */ + /* 270(001 001) 001(92) 110 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_MOV, 2, {OPMASKREG|BITS8|RN_L16,REG_GPR|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65365, 499, 4473}, + /* 75 : MOV kreg8,reg8 [rm: evex.l0.0f.66.w0 92 /r ] ND,ZU,AVX512DQ,FUTURE,APX */ + /* 250(f1 7d 08) 300 001(92) 110 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_MOV, 2, {OPMASKREG|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+29722, 500, 4473}, + /* 76 : MOV kreg16,reg32 [rm: vex.l0.0f.np.w0 92 /r ] ND,ZU,AVX512F,FUTURE */ + /* 270(001 000) 001(92) 110 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_MOV, 2, {OPMASKREG|BITS16|RN_L16,REG_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65372, 501, 4477}, + /* 77 : MOV kreg16,reg32 [rm: evex.l0.0f.np.w0 92 /r ] ND,ZU,AVX512F,FUTURE,APX */ + /* 250(f1 7c 08) 300 001(92) 110 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_MOV, 2, {OPMASKREG|BITS16,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+29731, 502, 4477}, + /* 78 : MOV kreg16,reg16 [rm: vex.l0.0f.np.w0 92 /r ] ND,ZU,AVX512F,FUTURE */ + /* 270(001 000) 001(92) 110 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_MOV, 2, {OPMASKREG|BITS16|RN_L16,REG_GPR|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65372, 501, 4481}, + /* 79 : MOV kreg16,reg16 [rm: evex.l0.0f.np.w0 92 /r ] ND,ZU,AVX512F,FUTURE,APX */ + /* 250(f1 7c 08) 300 001(92) 110 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_MOV, 2, {OPMASKREG|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29731, 502, 4481}, + /* 80 : MOV reg32,kreg8 [rm: vex.l0.0f.66.w0 93 /r ] ND,ZU,AVX512DQ,FUTURE */ + /* 270(001 001) 001(93) 110 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_MOV, 2, {REG_GPR|BITS32|RN_L16,OPMASKREG|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65379, 499, 4485}, + /* 81 : MOV reg32,kreg8 [rm: evex.l0.0f.66.w0 93 /r ] ND,ZU,AVX512DQ,FUTURE,APX */ + /* 250(f1 7d 08) 300 001(93) 110 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_MOV, 2, {REG_GPR|BITS32,OPMASKREG|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+29740, 500, 4485}, + /* 82 : MOV reg32,kreg16 [rm: vex.l0.0f.np.w0 93 /r ] ND,ZU,AVX512F,FUTURE */ + /* 270(001 000) 001(93) 110 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_MOV, 2, {REG_GPR|BITS32|RN_L16,OPMASKREG|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65386, 501, 4489}, + /* 83 : MOV reg32,kreg16 [rm: evex.l0.0f.np.w0 93 /r ] ND,ZU,AVX512F,FUTURE,APX */ + /* 250(f1 7c 08) 300 001(93) 110 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_MOV, 2, {REG_GPR|BITS32,OPMASKREG|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29749, 502, 4489}, +}; + +static const struct itemplate instrux_MOVABS[12] = { + /* 0 : MOVABS reg_al,mem_offs [-i: o8 a0 iwdq ] SM0,ND,SM1,NOAPX,8086 */ + /* 001(a0) 045 : SM0,SM1,NOAPX,8086 */ + {I_MOVABS, 2, {REG_AL|RN_L16,MEM_OFFS,0,0,0}, NO_DECORATOR, nasm_bytecodes+72584, 6, 62}, + /* 1 : MOVABS reg_ax,mem_offs [-i: o16 a1 iwdq ] SM0,ND,SM1,NOAPX,8086 */ + /* 320 001(a1) 045 : SM0,SM1,NOAPX,8086 */ + {I_MOVABS, 2, {REG_AX|RN_L16,MEM_OFFS,0,0,0}, NO_DECORATOR, nasm_bytecodes+71319, 6, 63}, + /* 2 : MOVABS reg_eax,mem_offs [-i: o32 a1 iwdq ] ND,SM0-1,NOAPX,ZU,386 */ + /* 321 001(a1) 045 : SM0,SM1,NOAPX,ZU,386 */ + {I_MOVABS, 2, {REG_EAX|RN_L16,MEM_OFFS,0,0,0}, NO_DECORATOR, nasm_bytecodes+71324, 7, 64}, + /* 3 : MOVABS reg_rax,mem_offs [-i: o64 a1 iwdq ] SM0,ND,SM1,NOAPX,ZU,LONG,PROT,X86_64 */ + /* 324 001(a1) 045 : SM0,SM1,NOAPX,ZU,LONG,PROT,X86_64 */ + {I_MOVABS, 2, {REG_RAX|RN_L16,MEM_OFFS,0,0,0}, NO_DECORATOR, nasm_bytecodes+71329, 8, 65}, + /* 4 : MOVABS mem_offs,reg_al [i-: o8 a2 iwdq ] SM0,ND,SM1,NOAPX,NOHLE,8086 */ + /* 001(a2) 044 : SM0,SM1,NOAPX,NOHLE,8086 */ + {I_MOVABS, 2, {MEM_OFFS,REG_AL|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+72588, 9, 66}, + /* 5 : MOVABS mem_offs,reg_ax [i-: o16 a3 iwdq ] SM0,ND,SM1,NOAPX,NOHLE,8086 */ + /* 320 001(a3) 044 : SM0,SM1,NOAPX,NOHLE,8086 */ + {I_MOVABS, 2, {MEM_OFFS,REG_AX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+71334, 9, 67}, + /* 6 : MOVABS mem_offs,reg_eax [i-: o32 a3 iwdq ] ND,SM0-1,NOAPX,NOHLE,386 */ + /* 321 001(a3) 044 : SM0,SM1,NOAPX,NOHLE,386 */ + {I_MOVABS, 2, {MEM_OFFS,REG_EAX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+71339, 10, 68}, + /* 7 : MOVABS mem_offs,reg_rax [i-: o64 a3 iwdq ] ND,SM0-1,NOAPX,LONG,NOHLE,PROT,X86_64 */ + /* 324 001(a3) 044 : SM0,SM1,NOAPX,LONG,NOHLE,PROT,X86_64 */ + {I_MOVABS, 2, {MEM_OFFS,REG_RAX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+71344, 11, 69}, + /* 8 : MOVABS reg8,imm8 [ri: o8 b0+r ib ] ND,SM0-1,8086 */ + /* 010 260(021 : SM0,SM1,8086 */ + {I_MOVABS, 2, {REG_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+72592, 12, 88}, + /* 9 : MOVABS reg16,imm16 [ri: o16 b8+r iw ] SM0,ND,SM1,8086 */ + /* 320 010 270(031 : SM0,SM1,8086 */ + {I_MOVABS, 2, {REG_GPR|BITS16,IMM_NORMAL|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+71359, 12, 89}, + /* 10 : MOVABS reg32,imm32 [ri: o32 b8+r id ] SM0,ND,SM1,386 */ + /* 321 010 270(041 : SM0,SM1,386 */ + {I_MOVABS, 2, {REG_GPR|BITS32,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+71364, 13, 90}, + /* 11 : MOVABS reg64,imm64 [ri: o64 b8+r iq ] ND,SM0-1,LONG,PROT,X86_64 */ + /* 324 010 270(055 : SM0,SM1,LONG,PROT,X86_64 */ + {I_MOVABS, 2, {REG_GPR|BITS64,IMM_NORMAL|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+71369, 14, 91}, +}; + +static const struct itemplate instrux_MOVRS[8] = { + /* 0 : MOVRS reg8,mem8 [rm: o8 norep 0f38 8a /r ] SM0-1,FUTURE */ + /* 331 356 001(8a) 110 : SM0,SM1,NOAPX,FUTURE */ + {I_MOVRS, 2, {REG_GPR|BITS8|RN_L16,MEMORY|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66441, 17, 96}, + /* 1 : MOVRS reg16,mem16 [rm: o16 norep 0f38 8b /r ] SM0-1,FUTURE */ + /* 320 331 356 001(8b) 110 : SM0,SM1,NOAPX,FUTURE */ + {I_MOVRS, 2, {REG_GPR|BITS16|RN_L16,MEMORY|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+54872, 17, 97}, + /* 2 : MOVRS reg32,mem32 [rm: o32 norep 0f38 8b /r ] SM0-1,FUTURE */ + /* 321 331 356 001(8b) 110 : SM0,SM1,NOAPX,FUTURE */ + {I_MOVRS, 2, {REG_GPR|BITS32|RN_L16,MEMORY|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+54879, 17, 98}, + /* 3 : MOVRS reg64,mem64 [rm: o64 norep 0f38 8b /r ] SM0-1,LONG,PROT,X86_64,FUTURE */ + /* 324 331 356 001(8b) 110 : SM0,SM1,NOAPX,LONG,PROT,FUTURE */ + {I_MOVRS, 2, {REG_GPR|BITS64|RN_L16,MEMORY|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+54886, 18, 99}, + /* 4 : MOVRS reg8,mem8 [rm: evex.nf0.nd0.l0.m4.o8 8a /r ] SM0-1,FUTURE */ + /* 250(f4 7c 08) 300 001(8a) 110 : SM0,SM1,WIG,EVEX,PROT,FUTURE */ + {I_MOVRS, 2, {REG_GPR|BITS8,MEMORY|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+23323, 19, 100}, + /* 5 : MOVRS reg16,mem16 [rm: evex.nf0.nd0.l0.m4.o16 8b /r ] SM0-1,FUTURE */ + /* 250(f4 7d 08) 300 320 001(8b) 110 : SM0,SM1,EVEX,PROT,FUTURE */ + {I_MOVRS, 2, {REG_GPR|BITS16,MEMORY|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+9143, 20, 101}, + /* 6 : MOVRS reg32,mem32 [rm: evex.nf0.nd0.l0.m4.o32 8b /r ] SM0-1,FUTURE */ + /* 250(f4 7c 08) 300 321 001(8b) 110 : SM0,SM1,WW,EVEX,PROT,FUTURE */ + {I_MOVRS, 2, {REG_GPR|BITS32,MEMORY|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+9153, 21, 102}, + /* 7 : MOVRS reg64,mem64 [rm: evex.nf0.nd0.l0.m4.o64 8b /r ] SM0-1,LONG,PROT,X86_64,FUTURE */ + /* 250(f4 fc 08) 300 324 001(8b) 110 : SM0,SM1,WW,LONG,EVEX,PROT,FUTURE */ + {I_MOVRS, 2, {REG_GPR|BITS64,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+9163, 22, 103}, +}; + +static const struct itemplate instrux_LEA[6] = { + /* 0 : LEA reg16,mem [rm: o16 8d /r ] 8086 */ + /* 320 001(8d) 110 : 8086 */ + {I_LEA, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+71374, 23, 106}, + /* 1 : LEA reg32,mem [rm: o32 8d /r ] 386 */ + /* 321 001(8d) 110 : 386 */ + {I_LEA, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+71379, 3, 107}, + /* 2 : LEA reg64,mem [rm: o64 8d /r ] LONG,PROT,X86_64 */ + /* 324 001(8d) 110 : LONG,PROT,X86_64 */ + {I_LEA, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+71384, 24, 108}, + /* 3 : LEA reg16,imm16 [rn: o16 8d /r ] ND,8086 */ + /* 320 001(8d) 110 : 8086 */ + {I_LEA, 2, {REG_GPR|BITS16,IMM_NORMAL|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+71374, 23, 109}, + /* 4 : LEA reg32,imm32 [rn: o32 8d /r ] ND,386 */ + /* 321 001(8d) 110 : 386 */ + {I_LEA, 2, {REG_GPR|BITS32,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+71379, 3, 110}, + /* 5 : LEA reg64,sdword64 [rn: o64 8d /r ] ND,LONG,PROT,X86_64 */ + /* 324 001(8d) 110 : LONG,PROT,X86_64 */ + {I_LEA, 2, {REG_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+71384, 24, 111}, +}; + +static const struct itemplate instrux_ADD[80] = { + /* 0 : ADD rm8,reg8 [mr: hle o8 00 /r ] SM0-1,LOCK,FL,8086 */ + /* 273 001(00) 101 : SM0,SM1,LOCK,FL,8086 */ + {I_ADD, 2, {RM_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+71389, 25, 114}, + /* 1 : ADD rm16,reg16 [mr: hle o16 01 /r ] SM0-1,LOCK,FL,8086 */ + /* 273 320 001(01) 101 : SM0,SM1,LOCK,FL,8086 */ + {I_ADD, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66447, 25, 115}, + /* 2 : ADD rm32,reg32 [mr: hle o32 01 /r ] SM0-1,LOCK,FL,386 */ + /* 273 321 001(01) 101 : SM0,SM1,LOCK,FL,386 */ + {I_ADD, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+66453, 26, 116}, + /* 3 : ADD rm64,reg64 [mr: hle o64 01 /r ] SM0-1,LOCK,LONG,FL,PROT,X86_64 */ + /* 273 324 001(01) 101 : SM0,SM1,LOCK,LONG,FL,PROT,X86_64 */ + {I_ADD, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+66459, 27, 117}, + /* 4 : ADD reg8,rm8 [rm: o8 02 /r ] SM0-1,FL,8086 */ + /* 001(02) 110 : SM0,SM1,FL,8086 */ + {I_ADD, 2, {REG_GPR|BITS8,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+69539, 28, 118}, + /* 5 : ADD reg16,rm16 [rm: o16 03 /r ] SM0-1,FL,8086 */ + /* 320 001(03) 110 : SM0,SM1,FL,8086 */ + {I_ADD, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+9198, 28, 119}, + /* 6 : ADD reg32,rm32 [rm: o32 03 /r ] SM0-1,FL,386 */ + /* 321 001(03) 110 : SM0,SM1,FL,386 */ + {I_ADD, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+9228, 29, 120}, + /* 7 : ADD reg64,rm64 [rm: o64 03 /r ] SM0-1,LONG,FL,PROT,X86_64 */ + /* 324 001(03) 110 : SM0,SM1,LONG,FL,PROT,X86_64 */ + {I_ADD, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+9258, 30, 121}, + /* 8 : ADD reg_al,imm8 [-i: o8 04 ib ] SM0-1,FL,8086 */ + /* 001(04) 021 : SM0,SM1,FL,8086 */ + {I_ADD, 2, {REG_AL,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+72596, 28, 122}, + /* 9 : ADD rm8,imm8 [mi: hle 80 /0 ib ] SM0-1,LOCK,FL,8086 */ + /* 273 001(80) 200 021 : SM0,SM1,LOCK,FL,8086 */ + {I_ADD, 2, {RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+66465, 25, 123}, + /* 10 : ADD rm16,sbyteword16 [mi: hle o16 83 /0 ib,s ] SM0-1,LOCK,FL,8086 */ + /* 273 320 001(83) 200 275 : SM0,SM1,LOCK,FL,8086 */ + {I_ADD, 2, {RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+54893, 25, 124}, + /* 11 : ADD reg_ax,imm16 [-i: o16 05 iw ] SM0-1,FL,8086 */ + /* 320 001(05) 031 : SM0,SM1,FL,8086 */ + {I_ADD, 2, {REG_AX,IMM_NORMAL|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+71394, 28, 125}, + /* 12 : ADD rm16,imm16 [mi: hle o16 81 /0 iw ] SM0-1,LOCK,FL,8086 */ + /* 273 320 001(81) 200 031 : SM0,SM1,LOCK,FL,8086 */ + {I_ADD, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+54900, 25, 126}, + /* 13 : ADD rm32,sbytedword32 [mi: hle o32 83 /0 ib,s ] SM0-1,ZU,LOCK,FL,386 */ + /* 273 321 001(83) 200 275 : SM0,SM1,ZU,LOCK,FL,386 */ + {I_ADD, 2, {RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+54907, 31, 127}, + /* 14 : ADD reg_eax,imm32 [-i: o32 05 id ] SM0-1,ZU,FL,386 */ + /* 321 001(05) 041 : SM0,SM1,ZU,FL,386 */ + {I_ADD, 2, {REG_EAX,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+71399, 32, 128}, + /* 15 : ADD rm32,imm32 [mi: hle o32 81 /0 id ] SM0-1,ZU,LOCK,FL,386 */ + /* 273 321 001(81) 200 041 : SM0,SM1,ZU,LOCK,FL,386 */ + {I_ADD, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+54914, 31, 129}, + /* 16 : ADD rm64,sbytedword64 [mi: hle o64 83 /0 ib,s ] SM0-1,ZU,LOCK,LONG,FL,PROT,X86_64 */ + /* 273 324 001(83) 200 275 : SM0,SM1,ZU,LOCK,LONG,FL,PROT,X86_64 */ + {I_ADD, 2, {RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+54921, 33, 130}, + /* 17 : ADD reg_rax,sdword64 [-i: o64 05 id,s ] SM0-1,ZU,LONG,FL,PROT,X86_64 */ + /* 324 001(05) 255 : SM0,SM1,ZU,LONG,FL,PROT,X86_64 */ + {I_ADD, 2, {REG_RAX,SDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+71404, 34, 131}, + /* 18 : ADD rm64,sdword64 [mi: hle o64 81 /0 id,s ] SM0-1,ZU,LOCK,LONG,FL,PROT,X86_64 */ + /* 273 324 001(81) 200 255 : SM0,SM1,ZU,LOCK,LONG,FL,PROT,X86_64 */ + {I_ADD, 2, {RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+54928, 33, 132}, + /* 19 : ADD reg8?,reg8,rm8 [vrm: evex.nd1.nf.l0.m4.o8 02 /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(02) 121 : SM0,SM1,SM2,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 3, {REG_GPR|BITS8,REG_GPR|BITS8,RM_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+23332, 35, 133}, + /* 20 : ADD reg8,rm8 [rm: evex.nd0.nf.l0.m4.o8 02 /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(02) 110 : SM0,SM1,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 2, {REG_GPR|BITS8,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+23341, 36, 133}, + /* 21 : ADD reg8?,rm8 [v+rm: evex.nd1.nf.l0.m4.o8 02 /r ] ND,SM0,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(02) 110 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 2, {REG_GPR|BITS8,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+23350, 37, 133}, + /* 22 : ADD reg16?,reg16,rm16 [vrm: evex.nd1.nf.l0.m4.o16 03 /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(03) 121 : SM0,SM1,SM2,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+9173, 38, 134}, + /* 23 : ADD reg16,rm16 [rm: evex.nd0.nf.l0.m4.o16 03 /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(03) 110 : SM0,SM1,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+9183, 39, 134}, + /* 24 : ADD reg16?,rm16 [v+rm: evex.nd1.nf.l0.m4.o16 03 /r ] ND,SM0,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(03) 110 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+9193, 40, 134}, + /* 25 : ADD reg32?,reg32,rm32 [vrm: evex.nd1.nf.l0.m4.o32 03 /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(03) 121 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+9203, 41, 135}, + /* 26 : ADD reg32,rm32 [rm: evex.nd0.nf.l0.m4.o32 03 /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(03) 110 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+9213, 42, 135}, + /* 27 : ADD reg32?,rm32 [v+rm: evex.nd1.nf.l0.m4.o32 03 /r ] ND,SM0,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(03) 110 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+9223, 43, 135}, + /* 28 : ADD reg64?,reg64,rm64 [vrm: evex.nd1.nf.l0.m4.o64 03 /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(03) 121 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+9233, 41, 136}, + /* 29 : ADD reg64,rm64 [rm: evex.nd0.nf.l0.m4.o64 03 /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(03) 110 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+9243, 42, 136}, + /* 30 : ADD reg64?,rm64 [v+rm: evex.nd1.nf.l0.m4.o64 03 /r ] SM0,ND,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(03) 110 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+9253, 43, 136}, + /* 31 : ADD reg8?,rm8,reg8 [vmr: evex.nd1.nf.l0.m4.o8 00 /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(00) 112 : SM0,SM1,SM2,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 3, {REG_GPR|BITS8,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+23359, 35, 137}, + /* 32 : ADD rm8,reg8 [mr: evex.nd0.nf.l0.m4.o8 00 /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(00) 101 : SM0,SM1,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 2, {RM_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+23368, 36, 137}, + /* 33 : ADD reg8?,reg8 [v+mr: evex.nd1.nf.l0.m4.o8 00 /r ] ND,SM0,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(00) 101 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+23377, 37, 137}, + /* 34 : ADD reg16?,rm16,reg16 [vmr: evex.nd1.nf.l0.m4.o16 01 /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(01) 112 : SM0,SM1,SM2,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 3, {REG_GPR|BITS16,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+9263, 38, 138}, + /* 35 : ADD rm16,reg16 [mr: evex.nd0.nf.l0.m4.o16 01 /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(01) 101 : SM0,SM1,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+9273, 39, 138}, + /* 36 : ADD reg16?,reg16 [v+mr: evex.nd1.nf.l0.m4.o16 01 /r ] ND,SM0,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(01) 101 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+9283, 40, 138}, + /* 37 : ADD reg32?,rm32,reg32 [vmr: evex.nd1.nf.l0.m4.o32 01 /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(01) 112 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+9293, 41, 139}, + /* 38 : ADD rm32,reg32 [mr: evex.nd0.nf.l0.m4.o32 01 /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(01) 101 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+9303, 42, 139}, + /* 39 : ADD reg32?,reg32 [v+mr: evex.nd1.nf.l0.m4.o32 01 /r ] ND,SM0,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(01) 101 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+9313, 43, 139}, + /* 40 : ADD reg64?,rm64,reg64 [vmr: evex.nd1.nf.l0.m4.o64 01 /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(01) 112 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+9323, 41, 140}, + /* 41 : ADD rm64,reg64 [mr: evex.nd0.nf.l0.m4.o64 01 /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(01) 101 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+9333, 42, 140}, + /* 42 : ADD reg64?,reg64 [v+mr: evex.nd1.nf.l0.m4.o64 01 /r ] ND,SM0,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(01) 101 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+9343, 43, 140}, + /* 43 : ADD reg16?,rm16,sbyteword16 [vmi: evex.nd1.nf.l0.m4.o16 83 /0 ib,s ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(83) 210 276 : SM0,SM1,SM2,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 3, {REG_GPR|BITS16,RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+24, 38, 141}, + /* 44 : ADD rm16,sbyteword16 [mi: evex.nd0.nf.l0.m4.o16 83 /0 ib,s ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(83) 200 275 : SM0,SM1,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 2, {RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+35, 39, 141}, + /* 45 : ADD reg16?,sbyteword16 [v+mi: evex.nd1.nf.l0.m4.o16 83 /0 ib,s ] ND,SM0,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(83) 200 275 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 2, {REG_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+46, 40, 141}, + /* 46 : ADD reg32?,rm32,sbytedword32 [vmi: evex.nd1.nf.l0.m4.o32 83 /0 ib,s ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(83) 210 276 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 3, {REG_GPR|BITS32,RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+57, 41, 142}, + /* 47 : ADD rm32,sbytedword32 [mi: evex.nd0.nf.l0.m4.o32 83 /0 ib,s ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(83) 200 275 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 2, {RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+68, 42, 142}, + /* 48 : ADD reg32?,sbytedword32 [v+mi: evex.nd1.nf.l0.m4.o32 83 /0 ib,s ] SM0,ND,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(83) 200 275 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 2, {REG_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+79, 43, 142}, + /* 49 : ADD reg64?,rm64,sbytedword64 [vmi: evex.nd1.nf.l0.m4.o64 83 /0 ib,s ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(83) 210 276 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 3, {REG_GPR|BITS64,RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+90, 41, 143}, + /* 50 : ADD rm64,sbytedword64 [mi: evex.nd0.nf.l0.m4.o64 83 /0 ib,s ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(83) 200 275 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 2, {RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+101, 42, 143}, + /* 51 : ADD reg64?,sbytedword64 [v+mi: evex.nd1.nf.l0.m4.o64 83 /0 ib,s ] SM0,ND,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(83) 200 275 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 2, {REG_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+112, 43, 143}, + /* 52 : ADD reg8?,rm8,imm8 [vmi: evex.nd1.nf.l0.m4.o8 80 /0 ib ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(80) 210 022 : SM0,SM1,SM2,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 3, {REG_GPR|BITS8,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+9353, 35, 144}, + /* 53 : ADD rm8,imm8 [mi: evex.nd0.nf.l0.m4.o8 80 /0 ib ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(80) 200 021 : SM0,SM1,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 2, {RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+9363, 36, 144}, + /* 54 : ADD reg8?,imm8 [v+mi: evex.nd1.nf.l0.m4.o8 80 /0 ib ] SM0,ND,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(80) 200 021 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 2, {REG_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+9373, 37, 144}, + /* 55 : ADD reg16?,rm16,imm16 [vmi: evex.nd1.nf.l0.m4.o16 81 /0 iw ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(81) 210 032 : SM0,SM1,SM2,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 3, {REG_GPR|BITS16,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+123, 38, 145}, + /* 56 : ADD rm16,imm16 [mi: evex.nd0.nf.l0.m4.o16 81 /0 iw ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(81) 200 031 : SM0,SM1,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+134, 39, 145}, + /* 57 : ADD reg16?,imm16 [v+mi: evex.nd1.nf.l0.m4.o16 81 /0 iw ] SM0,ND,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(81) 200 031 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 2, {REG_GPR|BITS16,IMM_NORMAL|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+145, 40, 145}, + /* 58 : ADD reg32?,rm32,imm32 [vmi: evex.nd1.nf.l0.m4.o32 81 /0 id ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(81) 210 042 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 3, {REG_GPR|BITS32,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+156, 41, 146}, + /* 59 : ADD rm32,imm32 [mi: evex.nd0.nf.l0.m4.o32 81 /0 id ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(81) 200 041 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+167, 42, 146}, + /* 60 : ADD reg32?,imm32 [v+mi: evex.nd1.nf.l0.m4.o32 81 /0 id ] SM0,ND,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(81) 200 041 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 2, {REG_GPR|BITS32,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+178, 43, 146}, + /* 61 : ADD reg64?,rm64,sdword64 [vmi: evex.nd1.nf.l0.m4.o64 81 /0 id,s ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(81) 210 256 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 3, {REG_GPR|BITS64,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+189, 41, 147}, + /* 62 : ADD rm64,sdword64 [mi: evex.nd0.nf.l0.m4.o64 81 /0 id,s ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(81) 200 255 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 2, {RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+200, 42, 147}, + /* 63 : ADD reg64?,sdword64 [v+mi: evex.nd1.nf.l0.m4.o64 81 /0 id,s ] ND,SM0,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(81) 200 255 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 2, {REG_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+211, 43, 147}, + /* 64 : ADD kreg8,kreg8*,kreg8 [rvm: vex.l1.0f.ko8 4a /r ] ND,SM0,SM1,SM2,ZU,FL,AVX512DQ,FUTURE */ + /* 261(001 005) 001(4a) 120 : SM0,SM1,SM2,NOAPX,ZU,FL,VEX,AVX512DQ,FUTURE */ + {I_ADD, 3, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65393, 515, 4503}, + /* 65 : ADD kreg8,kreg8*,kreg8 [rvm: evex.l1.0f.ko8 4a /r ] ND,SM0,SM1,SM2,ZU,FL,AVX512DQ,FUTURE,APX */ + /* 241(f1 7d 28) 300 001(4a) 120 : SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_ADD, 3, {OPMASKREG|BITS8,OPMASKREG|BITS8,OPMASKREG|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+29758, 516, 4503}, + /* 66 : ADD kreg8,kreg8 [r+vm: vex.l1.0f.ko8 4a /r ] ND,SM0,SM1,ZU,FL,AVX512DQ,FUTURE */ + /* 260(001 005) 001(4a) 110 : SM0,SM1,NOAPX,ZU,FL,VEX,AVX512DQ,FUTURE */ + {I_ADD, 2, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65400, 517, 4503}, + /* 67 : ADD kreg8,kreg8 [r+vm: evex.l1.0f.ko8 4a /r ] ND,SM0,SM1,ZU,FL,AVX512DQ,FUTURE,APX */ + /* 240(f1 7d 28) 300 001(4a) 110 : SM0,SM1,ZU,LONG,FL,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_ADD, 2, {OPMASKREG|BITS8,OPMASKREG|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+29767, 518, 4503}, + /* 68 : ADD kreg16,kreg16*,kreg16 [rvm: vex.l1.0f.ko16 4a /r ] SM0,ND,SM1,SM2,ZU,FL,AVX512DQ,FUTURE */ + /* 261(001 004) 001(4a) 120 : SM0,SM1,SM2,NOAPX,ZU,FL,VEX,AVX512DQ,FUTURE */ + {I_ADD, 3, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65407, 515, 4504}, + /* 69 : ADD kreg16,kreg16*,kreg16 [rvm: evex.l1.0f.ko16 4a /r ] SM0,ND,SM1,SM2,ZU,FL,AVX512DQ,FUTURE,APX */ + /* 241(f1 7c 28) 300 001(4a) 120 : SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_ADD, 3, {OPMASKREG|BITS16,OPMASKREG|BITS16,OPMASKREG|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+29776, 516, 4504}, + /* 70 : ADD kreg16,kreg16 [r+vm: vex.l1.0f.ko16 4a /r ] SM0,ND,SM1,ZU,FL,AVX512DQ,FUTURE */ + /* 260(001 004) 001(4a) 110 : SM0,SM1,NOAPX,ZU,FL,VEX,AVX512DQ,FUTURE */ + {I_ADD, 2, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65414, 517, 4504}, + /* 71 : ADD kreg16,kreg16 [r+vm: evex.l1.0f.ko16 4a /r ] SM0,ND,SM1,ZU,FL,AVX512DQ,FUTURE,APX */ + /* 240(f1 7c 28) 300 001(4a) 110 : SM0,SM1,ZU,LONG,FL,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_ADD, 2, {OPMASKREG|BITS16,OPMASKREG|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29785, 518, 4504}, + /* 72 : ADD kreg32,kreg32*,kreg32 [rvm: vex.l1.0f.ko32 4a /r ] ND,SM0,SM1,SM2,ZU,FL,AVX512BW,FUTURE */ + /* 261(001 205) 001(4a) 120 : SM0,SM1,SM2,NOAPX,ZU,FL,VEX,AVX512BW,FUTURE */ + {I_ADD, 3, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65421, 519, 4505}, + /* 73 : ADD kreg32,kreg32*,kreg32 [rvm: evex.l1.0f.ko32 4a /r ] ND,SM0,SM1,SM2,ZU,FL,AVX512BW,FUTURE,APX */ + /* 241(f1 fd 28) 300 001(4a) 120 : SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_ADD, 3, {OPMASKREG|BITS32,OPMASKREG|BITS32,OPMASKREG|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+29794, 520, 4505}, + /* 74 : ADD kreg32,kreg32 [r+vm: vex.l1.0f.ko32 4a /r ] ND,SM0,SM1,ZU,FL,AVX512BW,FUTURE */ + /* 260(001 205) 001(4a) 110 : SM0,SM1,NOAPX,ZU,FL,VEX,AVX512BW,FUTURE */ + {I_ADD, 2, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65428, 521, 4505}, + /* 75 : ADD kreg32,kreg32 [r+vm: evex.l1.0f.ko32 4a /r ] ND,SM0,SM1,ZU,FL,AVX512BW,FUTURE,APX */ + /* 240(f1 fd 28) 300 001(4a) 110 : SM0,SM1,ZU,LONG,FL,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_ADD, 2, {OPMASKREG|BITS32,OPMASKREG|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+29803, 522, 4505}, + /* 76 : ADD kreg64,kreg64*,kreg64 [rvm: vex.l1.0f.ko64 4a /r ] SM0,ND,SM1,SM2,ZU,FL,AVX512BW,FUTURE */ + /* 261(001 204) 001(4a) 120 : SM0,SM1,SM2,NOAPX,ZU,FL,VEX,AVX512BW,FUTURE */ + {I_ADD, 3, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65435, 519, 4506}, + /* 77 : ADD kreg64,kreg64*,kreg64 [rvm: evex.l1.0f.ko64 4a /r ] SM0,ND,SM1,SM2,ZU,FL,AVX512BW,FUTURE,APX */ + /* 241(f1 fc 28) 300 001(4a) 120 : SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_ADD, 3, {OPMASKREG|BITS64,OPMASKREG|BITS64,OPMASKREG|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+29812, 520, 4506}, + /* 78 : ADD kreg64,kreg64 [r+vm: vex.l1.0f.ko64 4a /r ] SM0,ND,SM1,ZU,FL,AVX512BW,FUTURE */ + /* 260(001 204) 001(4a) 110 : SM0,SM1,NOAPX,ZU,FL,VEX,AVX512BW,FUTURE */ + {I_ADD, 2, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65442, 521, 4506}, + /* 79 : ADD kreg64,kreg64 [r+vm: evex.l1.0f.ko64 4a /r ] SM0,ND,SM1,ZU,FL,AVX512BW,FUTURE,APX */ + /* 240(f1 fc 28) 300 001(4a) 110 : SM0,SM1,ZU,LONG,FL,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_ADD, 2, {OPMASKREG|BITS64,OPMASKREG|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+29821, 522, 4506}, +}; + +static const struct itemplate instrux_OR[80] = { + /* 0 : OR rm8,reg8 [mr: hle o8 08 /r ] SM0-1,LOCK,FL,8086 */ + /* 273 001(08) 101 : SM0,SM1,LOCK,FL,8086 */ + {I_OR, 2, {RM_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+71409, 25, 148}, + /* 1 : OR rm16,reg16 [mr: hle o16 09 /r ] SM0-1,LOCK,FL,8086 */ + /* 273 320 001(09) 101 : SM0,SM1,LOCK,FL,8086 */ + {I_OR, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66471, 25, 149}, + /* 2 : OR rm32,reg32 [mr: hle o32 09 /r ] SM0-1,LOCK,FL,386 */ + /* 273 321 001(09) 101 : SM0,SM1,LOCK,FL,386 */ + {I_OR, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+66477, 26, 150}, + /* 3 : OR rm64,reg64 [mr: hle o64 09 /r ] SM0-1,LOCK,LONG,FL,PROT,X86_64 */ + /* 273 324 001(09) 101 : SM0,SM1,LOCK,LONG,FL,PROT,X86_64 */ + {I_OR, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+66483, 27, 151}, + /* 4 : OR reg8,rm8 [rm: o8 0a /r ] SM0-1,FL,8086 */ + /* 001(0a) 110 : SM0,SM1,FL,8086 */ + {I_OR, 2, {REG_GPR|BITS8,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+69659, 28, 152}, + /* 5 : OR reg16,rm16 [rm: o16 0b /r ] SM0-1,FL,8086 */ + /* 320 001(0b) 110 : SM0,SM1,FL,8086 */ + {I_OR, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+9408, 28, 153}, + /* 6 : OR reg32,rm32 [rm: o32 0b /r ] SM0-1,FL,386 */ + /* 321 001(0b) 110 : SM0,SM1,FL,386 */ + {I_OR, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+9438, 29, 154}, + /* 7 : OR reg64,rm64 [rm: o64 0b /r ] SM0-1,LONG,FL,PROT,X86_64 */ + /* 324 001(0b) 110 : SM0,SM1,LONG,FL,PROT,X86_64 */ + {I_OR, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+9468, 30, 155}, + /* 8 : OR reg_al,imm8 [-i: o8 0c ib ] SM0-1,FL,8086 */ + /* 001(0c) 021 : SM0,SM1,FL,8086 */ + {I_OR, 2, {REG_AL,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+72600, 28, 156}, + /* 9 : OR rm8,imm8 [mi: hle 80 /1 ib ] SM0-1,LOCK,FL,8086 */ + /* 273 001(80) 201 021 : SM0,SM1,LOCK,FL,8086 */ + {I_OR, 2, {RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+66489, 25, 157}, + /* 10 : OR rm16,sbyteword16 [mi: hle o16 83 /1 ib,s ] SM0-1,LOCK,FL,8086 */ + /* 273 320 001(83) 201 275 : SM0,SM1,LOCK,FL,8086 */ + {I_OR, 2, {RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+54935, 25, 158}, + /* 11 : OR reg_ax,imm16 [-i: o16 0d iw ] SM0-1,FL,8086 */ + /* 320 001(0d) 031 : SM0,SM1,FL,8086 */ + {I_OR, 2, {REG_AX,IMM_NORMAL|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+71414, 28, 159}, + /* 12 : OR rm16,imm16 [mi: hle o16 81 /1 iw ] SM0-1,LOCK,FL,8086 */ + /* 273 320 001(81) 201 031 : SM0,SM1,LOCK,FL,8086 */ + {I_OR, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+54942, 25, 160}, + /* 13 : OR rm32,sbytedword32 [mi: hle o32 83 /1 ib,s ] SM0-1,ZU,LOCK,FL,386 */ + /* 273 321 001(83) 201 275 : SM0,SM1,ZU,LOCK,FL,386 */ + {I_OR, 2, {RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+54949, 31, 161}, + /* 14 : OR reg_eax,imm32 [-i: o32 0d id ] SM0-1,ZU,FL,386 */ + /* 321 001(0d) 041 : SM0,SM1,ZU,FL,386 */ + {I_OR, 2, {REG_EAX,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+71419, 32, 162}, + /* 15 : OR rm32,imm32 [mi: hle o32 81 /1 id ] SM0-1,ZU,LOCK,FL,386 */ + /* 273 321 001(81) 201 041 : SM0,SM1,ZU,LOCK,FL,386 */ + {I_OR, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+54956, 31, 163}, + /* 16 : OR rm64,sbytedword64 [mi: hle o64 83 /1 ib,s ] SM0-1,ZU,LOCK,LONG,FL,PROT,X86_64 */ + /* 273 324 001(83) 201 275 : SM0,SM1,ZU,LOCK,LONG,FL,PROT,X86_64 */ + {I_OR, 2, {RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+54963, 33, 164}, + /* 17 : OR reg_rax,sdword64 [-i: o64 0d id,s ] SM0-1,ZU,LONG,FL,PROT,X86_64 */ + /* 324 001(0d) 255 : SM0,SM1,ZU,LONG,FL,PROT,X86_64 */ + {I_OR, 2, {REG_RAX,SDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+71424, 34, 165}, + /* 18 : OR rm64,sdword64 [mi: hle o64 81 /1 id,s ] SM0-1,ZU,LOCK,LONG,FL,PROT,X86_64 */ + /* 273 324 001(81) 201 255 : SM0,SM1,ZU,LOCK,LONG,FL,PROT,X86_64 */ + {I_OR, 2, {RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+54970, 33, 166}, + /* 19 : OR reg8?,reg8,rm8 [vrm: evex.nd1.nf.l0.m4.o8 0a /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(0a) 121 : SM0,SM1,SM2,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 3, {REG_GPR|BITS8,REG_GPR|BITS8,RM_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+23386, 35, 167}, + /* 20 : OR reg8,rm8 [rm: evex.nd0.nf.l0.m4.o8 0a /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(0a) 110 : SM0,SM1,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 2, {REG_GPR|BITS8,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+23395, 36, 167}, + /* 21 : OR reg8?,rm8 [v+rm: evex.nd1.nf.l0.m4.o8 0a /r ] ND,SM0,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(0a) 110 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 2, {REG_GPR|BITS8,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+23404, 37, 167}, + /* 22 : OR reg16?,reg16,rm16 [vrm: evex.nd1.nf.l0.m4.o16 0b /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(0b) 121 : SM0,SM1,SM2,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+9383, 38, 168}, + /* 23 : OR reg16,rm16 [rm: evex.nd0.nf.l0.m4.o16 0b /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(0b) 110 : SM0,SM1,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+9393, 39, 168}, + /* 24 : OR reg16?,rm16 [v+rm: evex.nd1.nf.l0.m4.o16 0b /r ] ND,SM0,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(0b) 110 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+9403, 40, 168}, + /* 25 : OR reg32?,reg32,rm32 [vrm: evex.nd1.nf.l0.m4.o32 0b /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(0b) 121 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+9413, 41, 169}, + /* 26 : OR reg32,rm32 [rm: evex.nd0.nf.l0.m4.o32 0b /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(0b) 110 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+9423, 42, 169}, + /* 27 : OR reg32?,rm32 [v+rm: evex.nd1.nf.l0.m4.o32 0b /r ] SM0,ND,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(0b) 110 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+9433, 43, 169}, + /* 28 : OR reg64?,reg64,rm64 [vrm: evex.nd1.nf.l0.m4.o64 0b /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(0b) 121 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+9443, 41, 170}, + /* 29 : OR reg64,rm64 [rm: evex.nd0.nf.l0.m4.o64 0b /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(0b) 110 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+9453, 42, 170}, + /* 30 : OR reg64?,rm64 [v+rm: evex.nd1.nf.l0.m4.o64 0b /r ] ND,SM0,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(0b) 110 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+9463, 43, 170}, + /* 31 : OR reg8?,rm8,reg8 [vmr: evex.nd1.nf.l0.m4.o8 08 /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(08) 112 : SM0,SM1,SM2,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 3, {REG_GPR|BITS8,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+23413, 35, 171}, + /* 32 : OR rm8,reg8 [mr: evex.nd0.nf.l0.m4.o8 08 /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(08) 101 : SM0,SM1,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 2, {RM_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+23422, 36, 171}, + /* 33 : OR reg8?,reg8 [v+mr: evex.nd1.nf.l0.m4.o8 08 /r ] ND,SM0,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(08) 101 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+23431, 37, 171}, + /* 34 : OR reg16?,rm16,reg16 [vmr: evex.nd1.nf.l0.m4.o16 09 /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(09) 112 : SM0,SM1,SM2,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 3, {REG_GPR|BITS16,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+9473, 38, 172}, + /* 35 : OR rm16,reg16 [mr: evex.nd0.nf.l0.m4.o16 09 /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(09) 101 : SM0,SM1,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+9483, 39, 172}, + /* 36 : OR reg16?,reg16 [v+mr: evex.nd1.nf.l0.m4.o16 09 /r ] ND,SM0,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(09) 101 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+9493, 40, 172}, + /* 37 : OR reg32?,rm32,reg32 [vmr: evex.nd1.nf.l0.m4.o32 09 /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(09) 112 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+9503, 41, 173}, + /* 38 : OR rm32,reg32 [mr: evex.nd0.nf.l0.m4.o32 09 /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(09) 101 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+9513, 42, 173}, + /* 39 : OR reg32?,reg32 [v+mr: evex.nd1.nf.l0.m4.o32 09 /r ] SM0,ND,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(09) 101 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+9523, 43, 173}, + /* 40 : OR reg64?,rm64,reg64 [vmr: evex.nd1.nf.l0.m4.o64 09 /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(09) 112 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+9533, 41, 174}, + /* 41 : OR rm64,reg64 [mr: evex.nd0.nf.l0.m4.o64 09 /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(09) 101 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+9543, 42, 174}, + /* 42 : OR reg64?,reg64 [v+mr: evex.nd1.nf.l0.m4.o64 09 /r ] SM0,ND,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(09) 101 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+9553, 43, 174}, + /* 43 : OR reg16?,rm16,sbyteword16 [vmi: evex.nd1.nf.l0.m4.o16 83 /1 ib,s ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(83) 211 276 : SM0,SM1,SM2,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 3, {REG_GPR|BITS16,RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+222, 38, 175}, + /* 44 : OR rm16,sbyteword16 [mi: evex.nd0.nf.l0.m4.o16 83 /1 ib,s ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(83) 201 275 : SM0,SM1,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 2, {RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+233, 39, 175}, + /* 45 : OR reg16?,sbyteword16 [v+mi: evex.nd1.nf.l0.m4.o16 83 /1 ib,s ] ND,SM0,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(83) 201 275 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 2, {REG_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+244, 40, 175}, + /* 46 : OR reg32?,rm32,sbytedword32 [vmi: evex.nd1.nf.l0.m4.o32 83 /1 ib,s ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(83) 211 276 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 3, {REG_GPR|BITS32,RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+255, 41, 176}, + /* 47 : OR rm32,sbytedword32 [mi: evex.nd0.nf.l0.m4.o32 83 /1 ib,s ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(83) 201 275 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 2, {RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+266, 42, 176}, + /* 48 : OR reg32?,sbytedword32 [v+mi: evex.nd1.nf.l0.m4.o32 83 /1 ib,s ] ND,SM0,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(83) 201 275 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 2, {REG_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+277, 43, 176}, + /* 49 : OR reg64?,rm64,sbytedword64 [vmi: evex.nd1.nf.l0.m4.o64 83 /1 ib,s ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(83) 211 276 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 3, {REG_GPR|BITS64,RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+288, 41, 177}, + /* 50 : OR rm64,sbytedword64 [mi: evex.nd0.nf.l0.m4.o64 83 /1 ib,s ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(83) 201 275 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 2, {RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+299, 42, 177}, + /* 51 : OR reg64?,sbytedword64 [v+mi: evex.nd1.nf.l0.m4.o64 83 /1 ib,s ] SM0,ND,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(83) 201 275 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 2, {REG_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+310, 43, 177}, + /* 52 : OR reg8?,rm8,imm8 [vmi: evex.nd1.nf.l0.m4.o8 80 /1 ib ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(80) 211 022 : SM0,SM1,SM2,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 3, {REG_GPR|BITS8,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+9563, 35, 178}, + /* 53 : OR rm8,imm8 [mi: evex.nd0.nf.l0.m4.o8 80 /1 ib ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(80) 201 021 : SM0,SM1,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 2, {RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+9573, 36, 178}, + /* 54 : OR reg8?,imm8 [v+mi: evex.nd1.nf.l0.m4.o8 80 /1 ib ] ND,SM0,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(80) 201 021 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 2, {REG_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+9583, 37, 178}, + /* 55 : OR reg16?,rm16,imm16 [vmi: evex.nd1.nf.l0.m4.o16 81 /1 iw ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(81) 211 032 : SM0,SM1,SM2,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 3, {REG_GPR|BITS16,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+321, 38, 179}, + /* 56 : OR rm16,imm16 [mi: evex.nd0.nf.l0.m4.o16 81 /1 iw ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(81) 201 031 : SM0,SM1,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+332, 39, 179}, + /* 57 : OR reg16?,imm16 [v+mi: evex.nd1.nf.l0.m4.o16 81 /1 iw ] SM0,ND,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(81) 201 031 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 2, {REG_GPR|BITS16,IMM_NORMAL|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+343, 40, 179}, + /* 58 : OR reg32?,rm32,imm32 [vmi: evex.nd1.nf.l0.m4.o32 81 /1 id ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(81) 211 042 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 3, {REG_GPR|BITS32,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+354, 41, 180}, + /* 59 : OR rm32,imm32 [mi: evex.nd0.nf.l0.m4.o32 81 /1 id ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(81) 201 041 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+365, 42, 180}, + /* 60 : OR reg32?,imm32 [v+mi: evex.nd1.nf.l0.m4.o32 81 /1 id ] ND,SM0,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(81) 201 041 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 2, {REG_GPR|BITS32,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+376, 43, 180}, + /* 61 : OR reg64?,rm64,sdword64 [vmi: evex.nd1.nf.l0.m4.o64 81 /1 id,s ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(81) 211 256 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 3, {REG_GPR|BITS64,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+387, 41, 181}, + /* 62 : OR rm64,sdword64 [mi: evex.nd0.nf.l0.m4.o64 81 /1 id,s ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(81) 201 255 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 2, {RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+398, 42, 181}, + /* 63 : OR reg64?,sdword64 [v+mi: evex.nd1.nf.l0.m4.o64 81 /1 id,s ] ND,SM0,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(81) 201 255 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 2, {REG_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+409, 43, 181}, + /* 64 : OR kreg8,kreg8*,kreg8 [rvm: vex.nds.l1.0f.ko8 45 /r ] SM0,ND,SM1,SM2,ZU,FL,AVX512DQ,FUTURE */ + /* 261(001 005) 001(45) 120 : SM0,SM1,SM2,NOAPX,ZU,FL,VEX,AVX512DQ,FUTURE */ + {I_OR, 3, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65617, 515, 4567}, + /* 65 : OR kreg8,kreg8*,kreg8 [rvm: evex.nds.l1.0f.ko8 45 /r ] SM0,ND,SM1,SM2,ZU,FL,AVX512DQ,FUTURE,APX */ + /* 241(f1 7d 28) 300 001(45) 120 : SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_OR, 3, {OPMASKREG|BITS8,OPMASKREG|BITS8,OPMASKREG|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+30046, 516, 4567}, + /* 66 : OR kreg8,kreg8 [r+vm: vex.nds.l1.0f.ko8 45 /r ] SM0,ND,SM1,ZU,FL,AVX512DQ,FUTURE */ + /* 260(001 005) 001(45) 110 : SM0,SM1,NOAPX,ZU,FL,VEX,AVX512DQ,FUTURE */ + {I_OR, 2, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65624, 517, 4567}, + /* 67 : OR kreg8,kreg8 [r+vm: evex.nds.l1.0f.ko8 45 /r ] SM0,ND,SM1,ZU,FL,AVX512DQ,FUTURE,APX */ + /* 240(f1 7d 28) 300 001(45) 110 : SM0,SM1,ZU,LONG,FL,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_OR, 2, {OPMASKREG|BITS8,OPMASKREG|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+30055, 518, 4567}, + /* 68 : OR kreg16,kreg16*,kreg16 [rvm: vex.nds.l1.0f.ko16 45 /r ] ND,SM0,SM1,SM2,ZU,FL,AVX512F,FUTURE */ + /* 261(001 004) 001(45) 120 : SM0,SM1,SM2,NOAPX,ZU,FL,VEX,AVX512F,FUTURE */ + {I_OR, 3, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65631, 527, 4568}, + /* 69 : OR kreg16,kreg16*,kreg16 [rvm: evex.nds.l1.0f.ko16 45 /r ] ND,SM0,SM1,SM2,ZU,FL,AVX512F,FUTURE,APX */ + /* 241(f1 7c 28) 300 001(45) 120 : SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_OR, 3, {OPMASKREG|BITS16,OPMASKREG|BITS16,OPMASKREG|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+30064, 528, 4568}, + /* 70 : OR kreg16,kreg16 [r+vm: vex.nds.l1.0f.ko16 45 /r ] ND,SM0,SM1,ZU,FL,AVX512F,FUTURE */ + /* 260(001 004) 001(45) 110 : SM0,SM1,NOAPX,ZU,FL,VEX,AVX512F,FUTURE */ + {I_OR, 2, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65638, 529, 4568}, + /* 71 : OR kreg16,kreg16 [r+vm: evex.nds.l1.0f.ko16 45 /r ] ND,SM0,SM1,ZU,FL,AVX512F,FUTURE,APX */ + /* 240(f1 7c 28) 300 001(45) 110 : SM0,SM1,ZU,LONG,FL,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_OR, 2, {OPMASKREG|BITS16,OPMASKREG|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+30073, 530, 4568}, + /* 72 : OR kreg32,kreg32*,kreg32 [rvm: vex.nds.l1.0f.ko32 45 /r ] ND,SM0,SM1,SM2,ZU,FL,AVX512BW,FUTURE */ + /* 261(001 205) 001(45) 120 : SM0,SM1,SM2,NOAPX,ZU,FL,VEX,AVX512BW,FUTURE */ + {I_OR, 3, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65645, 519, 4569}, + /* 73 : OR kreg32,kreg32*,kreg32 [rvm: evex.nds.l1.0f.ko32 45 /r ] ND,SM0,SM1,SM2,ZU,FL,AVX512BW,FUTURE,APX */ + /* 241(f1 fd 28) 300 001(45) 120 : SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_OR, 3, {OPMASKREG|BITS32,OPMASKREG|BITS32,OPMASKREG|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+30082, 520, 4569}, + /* 74 : OR kreg32,kreg32 [r+vm: vex.nds.l1.0f.ko32 45 /r ] SM0,ND,SM1,ZU,FL,AVX512BW,FUTURE */ + /* 260(001 205) 001(45) 110 : SM0,SM1,NOAPX,ZU,FL,VEX,AVX512BW,FUTURE */ + {I_OR, 2, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65652, 521, 4569}, + /* 75 : OR kreg32,kreg32 [r+vm: evex.nds.l1.0f.ko32 45 /r ] SM0,ND,SM1,ZU,FL,AVX512BW,FUTURE,APX */ + /* 240(f1 fd 28) 300 001(45) 110 : SM0,SM1,ZU,LONG,FL,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_OR, 2, {OPMASKREG|BITS32,OPMASKREG|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+30091, 522, 4569}, + /* 76 : OR kreg64,kreg64*,kreg64 [rvm: vex.nds.l1.0f.ko64 45 /r ] ND,SM0,SM1,SM2,ZU,FL,AVX512BW,FUTURE */ + /* 261(001 204) 001(45) 120 : SM0,SM1,SM2,NOAPX,ZU,FL,VEX,AVX512BW,FUTURE */ + {I_OR, 3, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65659, 519, 4570}, + /* 77 : OR kreg64,kreg64*,kreg64 [rvm: evex.nds.l1.0f.ko64 45 /r ] ND,SM0,SM1,SM2,ZU,FL,AVX512BW,FUTURE,APX */ + /* 241(f1 fc 28) 300 001(45) 120 : SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_OR, 3, {OPMASKREG|BITS64,OPMASKREG|BITS64,OPMASKREG|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+30100, 520, 4570}, + /* 78 : OR kreg64,kreg64 [r+vm: vex.nds.l1.0f.ko64 45 /r ] ND,SM0,SM1,ZU,FL,AVX512BW,FUTURE */ + /* 260(001 204) 001(45) 110 : SM0,SM1,NOAPX,ZU,FL,VEX,AVX512BW,FUTURE */ + {I_OR, 2, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65666, 521, 4570}, + /* 79 : OR kreg64,kreg64 [r+vm: evex.nds.l1.0f.ko64 45 /r ] ND,SM0,SM1,ZU,FL,AVX512BW,FUTURE,APX */ + /* 240(f1 fc 28) 300 001(45) 110 : SM0,SM1,ZU,LONG,FL,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_OR, 2, {OPMASKREG|BITS64,OPMASKREG|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+30109, 522, 4570}, +}; + +static const struct itemplate instrux_ADC[64] = { + /* 0 : ADC rm8,reg8 [mr: hle o8 10 /r ] SM0-1,LOCK,FL,8086 */ + /* 273 001(10) 101 : SM0,SM1,LOCK,FL,8086 */ + {I_ADC, 2, {RM_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+71429, 25, 182}, + /* 1 : ADC rm16,reg16 [mr: hle o16 11 /r ] SM0-1,LOCK,FL,8086 */ + /* 273 320 001(11) 101 : SM0,SM1,LOCK,FL,8086 */ + {I_ADC, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66495, 25, 183}, + /* 2 : ADC rm32,reg32 [mr: hle o32 11 /r ] SM0-1,LOCK,FL,386 */ + /* 273 321 001(11) 101 : SM0,SM1,LOCK,FL,386 */ + {I_ADC, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+66501, 26, 184}, + /* 3 : ADC rm64,reg64 [mr: hle o64 11 /r ] SM0-1,LOCK,LONG,FL,PROT,X86_64 */ + /* 273 324 001(11) 101 : SM0,SM1,LOCK,LONG,FL,PROT,X86_64 */ + {I_ADC, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+66507, 27, 185}, + /* 4 : ADC reg8,rm8 [rm: o8 12 /r ] SM0-1,FL,8086 */ + /* 001(12) 110 : SM0,SM1,FL,8086 */ + {I_ADC, 2, {REG_GPR|BITS8,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+69437, 28, 186}, + /* 5 : ADC reg16,rm16 [rm: o16 13 /r ] SM0-1,FL,8086 */ + /* 320 001(13) 110 : SM0,SM1,FL,8086 */ + {I_ADC, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+9618, 28, 187}, + /* 6 : ADC reg32,rm32 [rm: o32 13 /r ] SM0-1,FL,386 */ + /* 321 001(13) 110 : SM0,SM1,FL,386 */ + {I_ADC, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+9648, 29, 188}, + /* 7 : ADC reg64,rm64 [rm: o64 13 /r ] SM0-1,LONG,FL,PROT,X86_64 */ + /* 324 001(13) 110 : SM0,SM1,LONG,FL,PROT,X86_64 */ + {I_ADC, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+9678, 30, 189}, + /* 8 : ADC reg_al,imm8 [-i: o8 14 ib ] SM0-1,FL,8086 */ + /* 001(14) 021 : SM0,SM1,FL,8086 */ + {I_ADC, 2, {REG_AL,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+72604, 28, 190}, + /* 9 : ADC rm8,imm8 [mi: hle 80 /2 ib ] SM0-1,LOCK,FL,8086 */ + /* 273 001(80) 202 021 : SM0,SM1,LOCK,FL,8086 */ + {I_ADC, 2, {RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+66513, 25, 191}, + /* 10 : ADC rm16,sbyteword16 [mi: hle o16 83 /2 ib,s ] SM0-1,LOCK,FL,8086 */ + /* 273 320 001(83) 202 275 : SM0,SM1,LOCK,FL,8086 */ + {I_ADC, 2, {RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+54977, 25, 192}, + /* 11 : ADC reg_ax,imm16 [-i: o16 15 iw ] SM0-1,FL,8086 */ + /* 320 001(15) 031 : SM0,SM1,FL,8086 */ + {I_ADC, 2, {REG_AX,IMM_NORMAL|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+71434, 28, 193}, + /* 12 : ADC rm16,imm16 [mi: hle o16 81 /2 iw ] SM0-1,LOCK,FL,8086 */ + /* 273 320 001(81) 202 031 : SM0,SM1,LOCK,FL,8086 */ + {I_ADC, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+54984, 25, 194}, + /* 13 : ADC rm32,sbytedword32 [mi: hle o32 83 /2 ib,s ] SM0-1,ZU,LOCK,FL,386 */ + /* 273 321 001(83) 202 275 : SM0,SM1,ZU,LOCK,FL,386 */ + {I_ADC, 2, {RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+54991, 31, 195}, + /* 14 : ADC reg_eax,imm32 [-i: o32 15 id ] SM0-1,ZU,FL,386 */ + /* 321 001(15) 041 : SM0,SM1,ZU,FL,386 */ + {I_ADC, 2, {REG_EAX,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+71439, 32, 196}, + /* 15 : ADC rm32,imm32 [mi: hle o32 81 /2 id ] SM0-1,ZU,LOCK,FL,386 */ + /* 273 321 001(81) 202 041 : SM0,SM1,ZU,LOCK,FL,386 */ + {I_ADC, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+54998, 31, 197}, + /* 16 : ADC rm64,sbytedword64 [mi: hle o64 83 /2 ib,s ] SM0-1,ZU,LOCK,LONG,FL,PROT,X86_64 */ + /* 273 324 001(83) 202 275 : SM0,SM1,ZU,LOCK,LONG,FL,PROT,X86_64 */ + {I_ADC, 2, {RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+55005, 33, 198}, + /* 17 : ADC reg_rax,sdword64 [-i: o64 15 id,s ] SM0-1,ZU,LONG,FL,PROT,X86_64 */ + /* 324 001(15) 255 : SM0,SM1,ZU,LONG,FL,PROT,X86_64 */ + {I_ADC, 2, {REG_RAX,SDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+71444, 34, 199}, + /* 18 : ADC rm64,sdword64 [mi: hle o64 81 /2 id,s ] SM0-1,ZU,LOCK,LONG,FL,PROT,X86_64 */ + /* 273 324 001(81) 202 255 : SM0,SM1,ZU,LOCK,LONG,FL,PROT,X86_64 */ + {I_ADC, 2, {RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+55012, 33, 200}, + /* 19 : ADC reg8?,reg8,rm8 [vrm: evex.nd1..l0.m4.o8 12 /r ] SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(12) 121 : SM0,SM1,SM2,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 3, {REG_GPR|BITS8,REG_GPR|BITS8,RM_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+23440, 44, 201}, + /* 20 : ADC reg8,rm8 [rm: evex.nd0..l0.m4.o8 12 /r ] SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(12) 110 : SM0,SM1,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 2, {REG_GPR|BITS8,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+23449, 45, 201}, + /* 21 : ADC reg8?,rm8 [v+rm: evex.nd1..l0.m4.o8 12 /r ] ND,SM0,SM1,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(12) 110 : SM0,SM1,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 2, {REG_GPR|BITS8,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+23458, 46, 201}, + /* 22 : ADC reg16?,reg16,rm16 [vrm: evex.nd1..l0.m4.o16 13 /r ] SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(13) 121 : SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+9593, 47, 202}, + /* 23 : ADC reg16,rm16 [rm: evex.nd0..l0.m4.o16 13 /r ] SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(13) 110 : SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+9603, 48, 202}, + /* 24 : ADC reg16?,rm16 [v+rm: evex.nd1..l0.m4.o16 13 /r ] ND,SM0,SM1,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(13) 110 : SM0,SM1,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+9613, 49, 202}, + /* 25 : ADC reg32?,reg32,rm32 [vrm: evex.nd1..l0.m4.o32 13 /r ] SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(13) 121 : SM0,SM1,SM2,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+9623, 50, 203}, + /* 26 : ADC reg32,rm32 [rm: evex.nd0..l0.m4.o32 13 /r ] SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(13) 110 : SM0,SM1,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+9633, 51, 203}, + /* 27 : ADC reg32?,rm32 [v+rm: evex.nd1..l0.m4.o32 13 /r ] ND,SM0,SM1,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(13) 110 : SM0,SM1,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+9643, 52, 203}, + /* 28 : ADC reg64?,reg64,rm64 [vrm: evex.nd1..l0.m4.o64 13 /r ] SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(13) 121 : SM0,SM1,SM2,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+9653, 50, 204}, + /* 29 : ADC reg64,rm64 [rm: evex.nd0..l0.m4.o64 13 /r ] SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(13) 110 : SM0,SM1,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+9663, 51, 204}, + /* 30 : ADC reg64?,rm64 [v+rm: evex.nd1..l0.m4.o64 13 /r ] SM0,ND,SM1,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(13) 110 : SM0,SM1,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+9673, 52, 204}, + /* 31 : ADC reg8?,rm8,reg8 [vmr: evex.nd1..l0.m4.o8 10 /r ] SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(10) 112 : SM0,SM1,SM2,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 3, {REG_GPR|BITS8,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+23467, 44, 205}, + /* 32 : ADC rm8,reg8 [mr: evex.nd0..l0.m4.o8 10 /r ] SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(10) 101 : SM0,SM1,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 2, {RM_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+23476, 45, 205}, + /* 33 : ADC reg8?,reg8 [v+mr: evex.nd1..l0.m4.o8 10 /r ] ND,SM0,SM1,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(10) 101 : SM0,SM1,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+23485, 46, 205}, + /* 34 : ADC reg16?,rm16,reg16 [vmr: evex.nd1..l0.m4.o16 11 /r ] SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(11) 112 : SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 3, {REG_GPR|BITS16,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+9683, 47, 206}, + /* 35 : ADC rm16,reg16 [mr: evex.nd0..l0.m4.o16 11 /r ] SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(11) 101 : SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+9693, 48, 206}, + /* 36 : ADC reg16?,reg16 [v+mr: evex.nd1..l0.m4.o16 11 /r ] ND,SM0,SM1,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(11) 101 : SM0,SM1,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+9703, 49, 206}, + /* 37 : ADC reg32?,rm32,reg32 [vmr: evex.nd1..l0.m4.o32 11 /r ] SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(11) 112 : SM0,SM1,SM2,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+9713, 50, 207}, + /* 38 : ADC rm32,reg32 [mr: evex.nd0..l0.m4.o32 11 /r ] SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(11) 101 : SM0,SM1,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+9723, 51, 207}, + /* 39 : ADC reg32?,reg32 [v+mr: evex.nd1..l0.m4.o32 11 /r ] SM0,ND,SM1,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(11) 101 : SM0,SM1,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+9733, 52, 207}, + /* 40 : ADC reg64?,rm64,reg64 [vmr: evex.nd1..l0.m4.o64 11 /r ] SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(11) 112 : SM0,SM1,SM2,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+9743, 50, 208}, + /* 41 : ADC rm64,reg64 [mr: evex.nd0..l0.m4.o64 11 /r ] SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(11) 101 : SM0,SM1,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+9753, 51, 208}, + /* 42 : ADC reg64?,reg64 [v+mr: evex.nd1..l0.m4.o64 11 /r ] ND,SM0,SM1,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(11) 101 : SM0,SM1,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+9763, 52, 208}, + /* 43 : ADC reg16?,rm16,sbyteword16 [vmi: evex.nd1..l0.m4.o16 83 /2 ib,s ] SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(83) 212 276 : SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 3, {REG_GPR|BITS16,RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+420, 47, 209}, + /* 44 : ADC rm16,sbyteword16 [mi: evex.nd0..l0.m4.o16 83 /2 ib,s ] SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(83) 202 275 : SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 2, {RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+431, 48, 209}, + /* 45 : ADC reg16?,sbyteword16 [v+mi: evex.nd1..l0.m4.o16 83 /2 ib,s ] ND,SM0,SM1,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(83) 202 275 : SM0,SM1,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 2, {REG_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+442, 49, 209}, + /* 46 : ADC reg32?,rm32,sbytedword32 [vmi: evex.nd1..l0.m4.o32 83 /2 ib,s ] SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(83) 212 276 : SM0,SM1,SM2,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 3, {REG_GPR|BITS32,RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+453, 50, 210}, + /* 47 : ADC rm32,sbytedword32 [mi: evex.nd0..l0.m4.o32 83 /2 ib,s ] SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(83) 202 275 : SM0,SM1,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 2, {RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+464, 51, 210}, + /* 48 : ADC reg32?,sbytedword32 [v+mi: evex.nd1..l0.m4.o32 83 /2 ib,s ] SM0,ND,SM1,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(83) 202 275 : SM0,SM1,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 2, {REG_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+475, 52, 210}, + /* 49 : ADC reg64?,rm64,sbytedword64 [vmi: evex.nd1..l0.m4.o64 83 /2 ib,s ] SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(83) 212 276 : SM0,SM1,SM2,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 3, {REG_GPR|BITS64,RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+486, 50, 211}, + /* 50 : ADC rm64,sbytedword64 [mi: evex.nd0..l0.m4.o64 83 /2 ib,s ] SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(83) 202 275 : SM0,SM1,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 2, {RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+497, 51, 211}, + /* 51 : ADC reg64?,sbytedword64 [v+mi: evex.nd1..l0.m4.o64 83 /2 ib,s ] SM0,ND,SM1,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(83) 202 275 : SM0,SM1,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 2, {REG_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+508, 52, 211}, + /* 52 : ADC reg8?,rm8,imm8 [vmi: evex.nd1..l0.m4.o8 80 /2 ib ] SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(80) 212 022 : SM0,SM1,SM2,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 3, {REG_GPR|BITS8,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+9773, 44, 212}, + /* 53 : ADC rm8,imm8 [mi: evex.nd0..l0.m4.o8 80 /2 ib ] SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(80) 202 021 : SM0,SM1,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 2, {RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+9783, 45, 212}, + /* 54 : ADC reg8?,imm8 [v+mi: evex.nd1..l0.m4.o8 80 /2 ib ] SM0,ND,SM1,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(80) 202 021 : SM0,SM1,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 2, {REG_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+9793, 46, 212}, + /* 55 : ADC reg16?,rm16,imm16 [vmi: evex.nd1..l0.m4.o16 81 /2 iw ] SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(81) 212 032 : SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 3, {REG_GPR|BITS16,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+519, 47, 213}, + /* 56 : ADC rm16,imm16 [mi: evex.nd0..l0.m4.o16 81 /2 iw ] SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(81) 202 031 : SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+530, 48, 213}, + /* 57 : ADC reg16?,imm16 [v+mi: evex.nd1..l0.m4.o16 81 /2 iw ] ND,SM0,SM1,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(81) 202 031 : SM0,SM1,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 2, {REG_GPR|BITS16,IMM_NORMAL|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+541, 49, 213}, + /* 58 : ADC reg32?,rm32,imm32 [vmi: evex.nd1..l0.m4.o32 81 /2 id ] SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(81) 212 042 : SM0,SM1,SM2,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 3, {REG_GPR|BITS32,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+552, 50, 214}, + /* 59 : ADC rm32,imm32 [mi: evex.nd0..l0.m4.o32 81 /2 id ] SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(81) 202 041 : SM0,SM1,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+563, 51, 214}, + /* 60 : ADC reg32?,imm32 [v+mi: evex.nd1..l0.m4.o32 81 /2 id ] SM0,ND,SM1,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(81) 202 041 : SM0,SM1,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 2, {REG_GPR|BITS32,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+574, 52, 214}, + /* 61 : ADC reg64?,rm64,sdword64 [vmi: evex.nd1..l0.m4.o64 81 /2 id,s ] SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(81) 212 256 : SM0,SM1,SM2,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 3, {REG_GPR|BITS64,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+585, 50, 215}, + /* 62 : ADC rm64,sdword64 [mi: evex.nd0..l0.m4.o64 81 /2 id,s ] SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(81) 202 255 : SM0,SM1,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 2, {RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+596, 51, 215}, + /* 63 : ADC reg64?,sdword64 [v+mi: evex.nd1..l0.m4.o64 81 /2 id,s ] ND,SM0,SM1,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(81) 202 255 : SM0,SM1,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 2, {REG_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+607, 52, 215}, +}; + +static const struct itemplate instrux_SBB[64] = { + /* 0 : SBB rm8,reg8 [mr: hle o8 18 /r ] SM0-1,LOCK,FL,8086 */ + /* 273 001(18) 101 : SM0,SM1,LOCK,FL,8086 */ + {I_SBB, 2, {RM_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+71449, 25, 216}, + /* 1 : SBB rm16,reg16 [mr: hle o16 19 /r ] SM0-1,LOCK,FL,8086 */ + /* 273 320 001(19) 101 : SM0,SM1,LOCK,FL,8086 */ + {I_SBB, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66519, 25, 217}, + /* 2 : SBB rm32,reg32 [mr: hle o32 19 /r ] SM0-1,LOCK,FL,386 */ + /* 273 321 001(19) 101 : SM0,SM1,LOCK,FL,386 */ + {I_SBB, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+66525, 26, 218}, + /* 3 : SBB rm64,reg64 [mr: hle o64 19 /r ] SM0-1,LOCK,LONG,FL,PROT,X86_64 */ + /* 273 324 001(19) 101 : SM0,SM1,LOCK,LONG,FL,PROT,X86_64 */ + {I_SBB, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+66531, 27, 219}, + /* 4 : SBB reg8,rm8 [rm: o8 1a /r ] SM0-1,FL,8086 */ + /* 001(1a) 110 : SM0,SM1,FL,8086 */ + {I_SBB, 2, {REG_GPR|BITS8,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+70031, 28, 220}, + /* 5 : SBB reg16,rm16 [rm: o16 1b /r ] SM0-1,FL,8086 */ + /* 320 001(1b) 110 : SM0,SM1,FL,8086 */ + {I_SBB, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+9828, 28, 221}, + /* 6 : SBB reg32,rm32 [rm: o32 1b /r ] SM0-1,FL,386 */ + /* 321 001(1b) 110 : SM0,SM1,FL,386 */ + {I_SBB, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+9858, 29, 222}, + /* 7 : SBB reg64,rm64 [rm: o64 1b /r ] SM0-1,LONG,FL,PROT,X86_64 */ + /* 324 001(1b) 110 : SM0,SM1,LONG,FL,PROT,X86_64 */ + {I_SBB, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+9888, 30, 223}, + /* 8 : SBB reg_al,imm8 [-i: o8 1c ib ] SM0-1,FL,8086 */ + /* 001(1c) 021 : SM0,SM1,FL,8086 */ + {I_SBB, 2, {REG_AL,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+72608, 28, 224}, + /* 9 : SBB rm8,imm8 [mi: hle 80 /3 ib ] SM0-1,LOCK,FL,8086 */ + /* 273 001(80) 203 021 : SM0,SM1,LOCK,FL,8086 */ + {I_SBB, 2, {RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+66537, 25, 225}, + /* 10 : SBB rm16,sbyteword16 [mi: hle o16 83 /3 ib,s ] SM0-1,LOCK,FL,8086 */ + /* 273 320 001(83) 203 275 : SM0,SM1,LOCK,FL,8086 */ + {I_SBB, 2, {RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+55019, 25, 226}, + /* 11 : SBB reg_ax,imm16 [-i: o16 1d iw ] SM0-1,FL,8086 */ + /* 320 001(1d) 031 : SM0,SM1,FL,8086 */ + {I_SBB, 2, {REG_AX,IMM_NORMAL|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+71454, 28, 227}, + /* 12 : SBB rm16,imm16 [mi: hle o16 81 /3 iw ] SM0-1,LOCK,FL,8086 */ + /* 273 320 001(81) 203 031 : SM0,SM1,LOCK,FL,8086 */ + {I_SBB, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55026, 25, 228}, + /* 13 : SBB rm32,sbytedword32 [mi: hle o32 83 /3 ib,s ] SM0-1,ZU,LOCK,FL,386 */ + /* 273 321 001(83) 203 275 : SM0,SM1,ZU,LOCK,FL,386 */ + {I_SBB, 2, {RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+55033, 31, 229}, + /* 14 : SBB reg_eax,imm32 [-i: o32 1d id ] SM0-1,ZU,FL,386 */ + /* 321 001(1d) 041 : SM0,SM1,ZU,FL,386 */ + {I_SBB, 2, {REG_EAX,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+71459, 32, 230}, + /* 15 : SBB rm32,imm32 [mi: hle o32 81 /3 id ] SM0-1,ZU,LOCK,FL,386 */ + /* 273 321 001(81) 203 041 : SM0,SM1,ZU,LOCK,FL,386 */ + {I_SBB, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+55040, 31, 231}, + /* 16 : SBB rm64,sbytedword64 [mi: hle o64 83 /3 ib,s ] SM0-1,ZU,LOCK,LONG,FL,PROT,X86_64 */ + /* 273 324 001(83) 203 275 : SM0,SM1,ZU,LOCK,LONG,FL,PROT,X86_64 */ + {I_SBB, 2, {RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+55047, 33, 232}, + /* 17 : SBB reg_rax,sdword64 [-i: o64 1d id,s ] SM0-1,ZU,LONG,FL,PROT,X86_64 */ + /* 324 001(1d) 255 : SM0,SM1,ZU,LONG,FL,PROT,X86_64 */ + {I_SBB, 2, {REG_RAX,SDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+71464, 34, 233}, + /* 18 : SBB rm64,sdword64 [mi: hle o64 81 /3 id,s ] SM0-1,ZU,LOCK,LONG,FL,PROT,X86_64 */ + /* 273 324 001(81) 203 255 : SM0,SM1,ZU,LOCK,LONG,FL,PROT,X86_64 */ + {I_SBB, 2, {RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+55054, 33, 234}, + /* 19 : SBB reg8?,reg8,rm8 [vrm: evex.nd1..l0.m4.o8 1a /r ] SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(1a) 121 : SM0,SM1,SM2,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 3, {REG_GPR|BITS8,REG_GPR|BITS8,RM_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+23494, 44, 235}, + /* 20 : SBB reg8,rm8 [rm: evex.nd0..l0.m4.o8 1a /r ] SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(1a) 110 : SM0,SM1,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 2, {REG_GPR|BITS8,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+23503, 45, 235}, + /* 21 : SBB reg8?,rm8 [v+rm: evex.nd1..l0.m4.o8 1a /r ] SM0,ND,SM1,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(1a) 110 : SM0,SM1,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 2, {REG_GPR|BITS8,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+23512, 46, 235}, + /* 22 : SBB reg16?,reg16,rm16 [vrm: evex.nd1..l0.m4.o16 1b /r ] SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(1b) 121 : SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+9803, 47, 236}, + /* 23 : SBB reg16,rm16 [rm: evex.nd0..l0.m4.o16 1b /r ] SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(1b) 110 : SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+9813, 48, 236}, + /* 24 : SBB reg16?,rm16 [v+rm: evex.nd1..l0.m4.o16 1b /r ] ND,SM0,SM1,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(1b) 110 : SM0,SM1,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+9823, 49, 236}, + /* 25 : SBB reg32?,reg32,rm32 [vrm: evex.nd1..l0.m4.o32 1b /r ] SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(1b) 121 : SM0,SM1,SM2,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+9833, 50, 237}, + /* 26 : SBB reg32,rm32 [rm: evex.nd0..l0.m4.o32 1b /r ] SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(1b) 110 : SM0,SM1,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+9843, 51, 237}, + /* 27 : SBB reg32?,rm32 [v+rm: evex.nd1..l0.m4.o32 1b /r ] ND,SM0,SM1,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(1b) 110 : SM0,SM1,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+9853, 52, 237}, + /* 28 : SBB reg64?,reg64,rm64 [vrm: evex.nd1..l0.m4.o64 1b /r ] SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(1b) 121 : SM0,SM1,SM2,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+9863, 50, 238}, + /* 29 : SBB reg64,rm64 [rm: evex.nd0..l0.m4.o64 1b /r ] SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(1b) 110 : SM0,SM1,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+9873, 51, 238}, + /* 30 : SBB reg64?,rm64 [v+rm: evex.nd1..l0.m4.o64 1b /r ] ND,SM0,SM1,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(1b) 110 : SM0,SM1,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+9883, 52, 238}, + /* 31 : SBB reg8?,rm8,reg8 [vmr: evex.nd1..l0.m4.o8 18 /r ] SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(18) 112 : SM0,SM1,SM2,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 3, {REG_GPR|BITS8,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+23521, 44, 239}, + /* 32 : SBB rm8,reg8 [mr: evex.nd0..l0.m4.o8 18 /r ] SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(18) 101 : SM0,SM1,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 2, {RM_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+23530, 45, 239}, + /* 33 : SBB reg8?,reg8 [v+mr: evex.nd1..l0.m4.o8 18 /r ] SM0,ND,SM1,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(18) 101 : SM0,SM1,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+23539, 46, 239}, + /* 34 : SBB reg16?,rm16,reg16 [vmr: evex.nd1..l0.m4.o16 19 /r ] SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(19) 112 : SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 3, {REG_GPR|BITS16,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+9893, 47, 240}, + /* 35 : SBB rm16,reg16 [mr: evex.nd0..l0.m4.o16 19 /r ] SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(19) 101 : SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+9903, 48, 240}, + /* 36 : SBB reg16?,reg16 [v+mr: evex.nd1..l0.m4.o16 19 /r ] SM0,ND,SM1,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(19) 101 : SM0,SM1,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+9913, 49, 240}, + /* 37 : SBB reg32?,rm32,reg32 [vmr: evex.nd1..l0.m4.o32 19 /r ] SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(19) 112 : SM0,SM1,SM2,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+9923, 50, 241}, + /* 38 : SBB rm32,reg32 [mr: evex.nd0..l0.m4.o32 19 /r ] SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(19) 101 : SM0,SM1,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+9933, 51, 241}, + /* 39 : SBB reg32?,reg32 [v+mr: evex.nd1..l0.m4.o32 19 /r ] ND,SM0,SM1,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(19) 101 : SM0,SM1,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+9943, 52, 241}, + /* 40 : SBB reg64?,rm64,reg64 [vmr: evex.nd1..l0.m4.o64 19 /r ] SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(19) 112 : SM0,SM1,SM2,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+9953, 50, 242}, + /* 41 : SBB rm64,reg64 [mr: evex.nd0..l0.m4.o64 19 /r ] SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(19) 101 : SM0,SM1,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+9963, 51, 242}, + /* 42 : SBB reg64?,reg64 [v+mr: evex.nd1..l0.m4.o64 19 /r ] ND,SM0,SM1,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(19) 101 : SM0,SM1,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+9973, 52, 242}, + /* 43 : SBB reg16?,rm16,sbyteword16 [vmi: evex.nd1..l0.m4.o16 83 /3 ib,s ] SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(83) 213 276 : SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 3, {REG_GPR|BITS16,RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+618, 47, 243}, + /* 44 : SBB rm16,sbyteword16 [mi: evex.nd0..l0.m4.o16 83 /3 ib,s ] SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(83) 203 275 : SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 2, {RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+629, 48, 243}, + /* 45 : SBB reg16?,sbyteword16 [v+mi: evex.nd1..l0.m4.o16 83 /3 ib,s ] SM0,ND,SM1,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(83) 203 275 : SM0,SM1,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 2, {REG_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+640, 49, 243}, + /* 46 : SBB reg32?,rm32,sbytedword32 [vmi: evex.nd1..l0.m4.o32 83 /3 ib,s ] SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(83) 213 276 : SM0,SM1,SM2,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 3, {REG_GPR|BITS32,RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+651, 50, 244}, + /* 47 : SBB rm32,sbytedword32 [mi: evex.nd0..l0.m4.o32 83 /3 ib,s ] SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(83) 203 275 : SM0,SM1,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 2, {RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+662, 51, 244}, + /* 48 : SBB reg32?,sbytedword32 [v+mi: evex.nd1..l0.m4.o32 83 /3 ib,s ] ND,SM0,SM1,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(83) 203 275 : SM0,SM1,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 2, {REG_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+673, 52, 244}, + /* 49 : SBB reg64?,rm64,sbytedword64 [vmi: evex.nd1..l0.m4.o64 83 /3 ib,s ] SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(83) 213 276 : SM0,SM1,SM2,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 3, {REG_GPR|BITS64,RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+684, 50, 245}, + /* 50 : SBB rm64,sbytedword64 [mi: evex.nd0..l0.m4.o64 83 /3 ib,s ] SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(83) 203 275 : SM0,SM1,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 2, {RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+695, 51, 245}, + /* 51 : SBB reg64?,sbytedword64 [v+mi: evex.nd1..l0.m4.o64 83 /3 ib,s ] SM0,ND,SM1,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(83) 203 275 : SM0,SM1,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 2, {REG_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+706, 52, 245}, + /* 52 : SBB reg8?,rm8,imm8 [vmi: evex.nd1..l0.m4.o8 80 /3 ib ] SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(80) 213 022 : SM0,SM1,SM2,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 3, {REG_GPR|BITS8,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+9983, 44, 246}, + /* 53 : SBB rm8,imm8 [mi: evex.nd0..l0.m4.o8 80 /3 ib ] SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(80) 203 021 : SM0,SM1,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 2, {RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+9993, 45, 246}, + /* 54 : SBB reg8?,imm8 [v+mi: evex.nd1..l0.m4.o8 80 /3 ib ] ND,SM0,SM1,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(80) 203 021 : SM0,SM1,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 2, {REG_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+10003, 46, 246}, + /* 55 : SBB reg16?,rm16,imm16 [vmi: evex.nd1..l0.m4.o16 81 /3 iw ] SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(81) 213 032 : SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 3, {REG_GPR|BITS16,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+717, 47, 247}, + /* 56 : SBB rm16,imm16 [mi: evex.nd0..l0.m4.o16 81 /3 iw ] SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(81) 203 031 : SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+728, 48, 247}, + /* 57 : SBB reg16?,imm16 [v+mi: evex.nd1..l0.m4.o16 81 /3 iw ] SM0,ND,SM1,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(81) 203 031 : SM0,SM1,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 2, {REG_GPR|BITS16,IMM_NORMAL|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+739, 49, 247}, + /* 58 : SBB reg32?,rm32,imm32 [vmi: evex.nd1..l0.m4.o32 81 /3 id ] SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(81) 213 042 : SM0,SM1,SM2,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 3, {REG_GPR|BITS32,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+750, 50, 248}, + /* 59 : SBB rm32,imm32 [mi: evex.nd0..l0.m4.o32 81 /3 id ] SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(81) 203 041 : SM0,SM1,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+761, 51, 248}, + /* 60 : SBB reg32?,imm32 [v+mi: evex.nd1..l0.m4.o32 81 /3 id ] SM0,ND,SM1,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(81) 203 041 : SM0,SM1,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 2, {REG_GPR|BITS32,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+772, 52, 248}, + /* 61 : SBB reg64?,rm64,sdword64 [vmi: evex.nd1..l0.m4.o64 81 /3 id,s ] SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(81) 213 256 : SM0,SM1,SM2,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 3, {REG_GPR|BITS64,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+783, 50, 249}, + /* 62 : SBB rm64,sdword64 [mi: evex.nd0..l0.m4.o64 81 /3 id,s ] SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(81) 203 255 : SM0,SM1,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 2, {RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+794, 51, 249}, + /* 63 : SBB reg64?,sdword64 [v+mi: evex.nd1..l0.m4.o64 81 /3 id,s ] SM0,ND,SM1,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(81) 203 255 : SM0,SM1,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 2, {REG_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+805, 52, 249}, +}; + +static const struct itemplate instrux_AND[80] = { + /* 0 : AND rm8,reg8 [mr: hle o8 20 /r ] SM0-1,LOCK,FL,8086 */ + /* 273 001(20) 101 : SM0,SM1,LOCK,FL,8086 */ + {I_AND, 2, {RM_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+71469, 25, 250}, + /* 1 : AND rm16,reg16 [mr: hle o16 21 /r ] SM0-1,LOCK,FL,8086 */ + /* 273 320 001(21) 101 : SM0,SM1,LOCK,FL,8086 */ + {I_AND, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66543, 25, 251}, + /* 2 : AND rm32,reg32 [mr: hle o32 21 /r ] SM0-1,LOCK,FL,386 */ + /* 273 321 001(21) 101 : SM0,SM1,LOCK,FL,386 */ + {I_AND, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+66549, 26, 252}, + /* 3 : AND rm64,reg64 [mr: hle o64 21 /r ] SM0-1,LOCK,LONG,FL,PROT,X86_64 */ + /* 273 324 001(21) 101 : SM0,SM1,LOCK,LONG,FL,PROT,X86_64 */ + {I_AND, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+66555, 27, 253}, + /* 4 : AND reg8,rm8 [rm: o8 22 /r ] SM0-1,FL,8086 */ + /* 001(22) 110 : SM0,SM1,FL,8086 */ + {I_AND, 2, {REG_GPR|BITS8,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+69791, 28, 254}, + /* 5 : AND reg16,rm16 [rm: o16 23 /r ] SM0-1,FL,8086 */ + /* 320 001(23) 110 : SM0,SM1,FL,8086 */ + {I_AND, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+10038, 28, 255}, + /* 6 : AND reg32,rm32 [rm: o32 23 /r ] SM0-1,FL,386 */ + /* 321 001(23) 110 : SM0,SM1,FL,386 */ + {I_AND, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+10068, 29, 256}, + /* 7 : AND reg64,rm64 [rm: o64 23 /r ] SM0-1,LONG,FL,PROT,X86_64 */ + /* 324 001(23) 110 : SM0,SM1,LONG,FL,PROT,X86_64 */ + {I_AND, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+10098, 30, 257}, + /* 8 : AND reg_al,imm8 [-i: o8 24 ib ] SM0-1,FL,8086 */ + /* 001(24) 021 : SM0,SM1,FL,8086 */ + {I_AND, 2, {REG_AL,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+72612, 28, 258}, + /* 9 : AND rm8,imm8 [mi: hle 80 /4 ib ] SM0-1,LOCK,FL,8086 */ + /* 273 001(80) 204 021 : SM0,SM1,LOCK,FL,8086 */ + {I_AND, 2, {RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+66561, 25, 259}, + /* 10 : AND rm16,sbyteword16 [mi: hle o16 83 /4 ib,s ] SM0-1,LOCK,FL,8086 */ + /* 273 320 001(83) 204 275 : SM0,SM1,LOCK,FL,8086 */ + {I_AND, 2, {RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+55061, 25, 260}, + /* 11 : AND reg_ax,imm16 [-i: o16 25 iw ] SM0-1,FL,8086 */ + /* 320 001(25) 031 : SM0,SM1,FL,8086 */ + {I_AND, 2, {REG_AX,IMM_NORMAL|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+71474, 28, 261}, + /* 12 : AND rm16,imm16 [mi: hle o16 81 /4 iw ] SM0-1,LOCK,FL,8086 */ + /* 273 320 001(81) 204 031 : SM0,SM1,LOCK,FL,8086 */ + {I_AND, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55068, 25, 262}, + /* 13 : AND rm32,sbytedword32 [mi: hle o32 83 /4 ib,s ] SM0-1,ZU,LOCK,FL,386 */ + /* 273 321 001(83) 204 275 : SM0,SM1,ZU,LOCK,FL,386 */ + {I_AND, 2, {RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+55075, 31, 263}, + /* 14 : AND reg_eax,imm32 [-i: o32 25 id ] SM0-1,ZU,FL,386 */ + /* 321 001(25) 041 : SM0,SM1,ZU,FL,386 */ + {I_AND, 2, {REG_EAX,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+71479, 32, 264}, + /* 15 : AND rm32,imm32 [mi: hle o32 81 /4 id ] SM0-1,ZU,LOCK,FL,386 */ + /* 273 321 001(81) 204 041 : SM0,SM1,ZU,LOCK,FL,386 */ + {I_AND, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+55082, 31, 265}, + /* 16 : AND rm64,sbytedword64 [mi: hle o64 83 /4 ib,s ] SM0-1,ZU,LOCK,LONG,FL,PROT,X86_64 */ + /* 273 324 001(83) 204 275 : SM0,SM1,ZU,LOCK,LONG,FL,PROT,X86_64 */ + {I_AND, 2, {RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+55089, 33, 266}, + /* 17 : AND reg_rax,sdword64 [-i: o64 25 id,s ] SM0-1,ZU,LONG,FL,PROT,X86_64 */ + /* 324 001(25) 255 : SM0,SM1,ZU,LONG,FL,PROT,X86_64 */ + {I_AND, 2, {REG_RAX,SDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+71484, 34, 267}, + /* 18 : AND rm64,sdword64 [mi: hle o64 81 /4 id,s ] SM0-1,ZU,LOCK,LONG,FL,PROT,X86_64 */ + /* 273 324 001(81) 204 255 : SM0,SM1,ZU,LOCK,LONG,FL,PROT,X86_64 */ + {I_AND, 2, {RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+55096, 33, 268}, + /* 19 : AND reg8?,reg8,rm8 [vrm: evex.nd1.nf.l0.m4.o8 22 /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(22) 121 : SM0,SM1,SM2,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 3, {REG_GPR|BITS8,REG_GPR|BITS8,RM_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+23548, 35, 269}, + /* 20 : AND reg8,rm8 [rm: evex.nd0.nf.l0.m4.o8 22 /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(22) 110 : SM0,SM1,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 2, {REG_GPR|BITS8,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+23557, 36, 269}, + /* 21 : AND reg8?,rm8 [v+rm: evex.nd1.nf.l0.m4.o8 22 /r ] ND,SM0,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(22) 110 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 2, {REG_GPR|BITS8,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+23566, 37, 269}, + /* 22 : AND reg16?,reg16,rm16 [vrm: evex.nd1.nf.l0.m4.o16 23 /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(23) 121 : SM0,SM1,SM2,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+10013, 38, 270}, + /* 23 : AND reg16,rm16 [rm: evex.nd0.nf.l0.m4.o16 23 /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(23) 110 : SM0,SM1,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+10023, 39, 270}, + /* 24 : AND reg16?,rm16 [v+rm: evex.nd1.nf.l0.m4.o16 23 /r ] SM0,ND,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(23) 110 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+10033, 40, 270}, + /* 25 : AND reg32?,reg32,rm32 [vrm: evex.nd1.nf.l0.m4.o32 23 /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(23) 121 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+10043, 41, 271}, + /* 26 : AND reg32,rm32 [rm: evex.nd0.nf.l0.m4.o32 23 /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(23) 110 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+10053, 42, 271}, + /* 27 : AND reg32?,rm32 [v+rm: evex.nd1.nf.l0.m4.o32 23 /r ] ND,SM0,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(23) 110 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+10063, 43, 271}, + /* 28 : AND reg64?,reg64,rm64 [vrm: evex.nd1.nf.l0.m4.o64 23 /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(23) 121 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+10073, 41, 272}, + /* 29 : AND reg64,rm64 [rm: evex.nd0.nf.l0.m4.o64 23 /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(23) 110 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+10083, 42, 272}, + /* 30 : AND reg64?,rm64 [v+rm: evex.nd1.nf.l0.m4.o64 23 /r ] SM0,ND,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(23) 110 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+10093, 43, 272}, + /* 31 : AND reg8?,rm8,reg8 [vmr: evex.nd1.nf.l0.m4.o8 20 /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(20) 112 : SM0,SM1,SM2,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 3, {REG_GPR|BITS8,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+23575, 35, 273}, + /* 32 : AND rm8,reg8 [mr: evex.nd0.nf.l0.m4.o8 20 /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(20) 101 : SM0,SM1,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 2, {RM_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+23584, 36, 273}, + /* 33 : AND reg8?,reg8 [v+mr: evex.nd1.nf.l0.m4.o8 20 /r ] ND,SM0,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(20) 101 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+23593, 37, 273}, + /* 34 : AND reg16?,rm16,reg16 [vmr: evex.nd1.nf.l0.m4.o16 21 /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(21) 112 : SM0,SM1,SM2,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 3, {REG_GPR|BITS16,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+10103, 38, 274}, + /* 35 : AND rm16,reg16 [mr: evex.nd0.nf.l0.m4.o16 21 /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(21) 101 : SM0,SM1,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+10113, 39, 274}, + /* 36 : AND reg16?,reg16 [v+mr: evex.nd1.nf.l0.m4.o16 21 /r ] SM0,ND,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(21) 101 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+10123, 40, 274}, + /* 37 : AND reg32?,rm32,reg32 [vmr: evex.nd1.nf.l0.m4.o32 21 /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(21) 112 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+10133, 41, 275}, + /* 38 : AND rm32,reg32 [mr: evex.nd0.nf.l0.m4.o32 21 /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(21) 101 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+10143, 42, 275}, + /* 39 : AND reg32?,reg32 [v+mr: evex.nd1.nf.l0.m4.o32 21 /r ] ND,SM0,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(21) 101 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+10153, 43, 275}, + /* 40 : AND reg64?,rm64,reg64 [vmr: evex.nd1.nf.l0.m4.o64 21 /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(21) 112 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+10163, 41, 276}, + /* 41 : AND rm64,reg64 [mr: evex.nd0.nf.l0.m4.o64 21 /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(21) 101 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+10173, 42, 276}, + /* 42 : AND reg64?,reg64 [v+mr: evex.nd1.nf.l0.m4.o64 21 /r ] ND,SM0,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(21) 101 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+10183, 43, 276}, + /* 43 : AND reg16?,rm16,sbyteword16 [vmi: evex.nd1.nf.l0.m4.o16 83 /4 ib,s ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(83) 214 276 : SM0,SM1,SM2,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 3, {REG_GPR|BITS16,RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+816, 38, 277}, + /* 44 : AND rm16,sbyteword16 [mi: evex.nd0.nf.l0.m4.o16 83 /4 ib,s ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(83) 204 275 : SM0,SM1,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 2, {RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+827, 39, 277}, + /* 45 : AND reg16?,sbyteword16 [v+mi: evex.nd1.nf.l0.m4.o16 83 /4 ib,s ] ND,SM0,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(83) 204 275 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 2, {REG_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+838, 40, 277}, + /* 46 : AND reg32?,rm32,sbytedword32 [vmi: evex.nd1.nf.l0.m4.o32 83 /4 ib,s ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(83) 214 276 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 3, {REG_GPR|BITS32,RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+849, 41, 278}, + /* 47 : AND rm32,sbytedword32 [mi: evex.nd0.nf.l0.m4.o32 83 /4 ib,s ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(83) 204 275 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 2, {RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+860, 42, 278}, + /* 48 : AND reg32?,sbytedword32 [v+mi: evex.nd1.nf.l0.m4.o32 83 /4 ib,s ] ND,SM0,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(83) 204 275 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 2, {REG_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+871, 43, 278}, + /* 49 : AND reg64?,rm64,sbytedword64 [vmi: evex.nd1.nf.l0.m4.o64 83 /4 ib,s ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(83) 214 276 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 3, {REG_GPR|BITS64,RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+882, 41, 279}, + /* 50 : AND rm64,sbytedword64 [mi: evex.nd0.nf.l0.m4.o64 83 /4 ib,s ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(83) 204 275 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 2, {RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+893, 42, 279}, + /* 51 : AND reg64?,sbytedword64 [v+mi: evex.nd1.nf.l0.m4.o64 83 /4 ib,s ] SM0,ND,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(83) 204 275 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 2, {REG_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+904, 43, 279}, + /* 52 : AND reg8?,rm8,imm8 [vmi: evex.nd1.nf.l0.m4.o8 80 /4 ib ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(80) 214 022 : SM0,SM1,SM2,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 3, {REG_GPR|BITS8,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+10193, 35, 280}, + /* 53 : AND rm8,imm8 [mi: evex.nd0.nf.l0.m4.o8 80 /4 ib ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(80) 204 021 : SM0,SM1,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 2, {RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+10203, 36, 280}, + /* 54 : AND reg8?,imm8 [v+mi: evex.nd1.nf.l0.m4.o8 80 /4 ib ] ND,SM0,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(80) 204 021 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 2, {REG_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+10213, 37, 280}, + /* 55 : AND reg16?,rm16,imm16 [vmi: evex.nd1.nf.l0.m4.o16 81 /4 iw ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(81) 214 032 : SM0,SM1,SM2,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 3, {REG_GPR|BITS16,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+915, 38, 281}, + /* 56 : AND rm16,imm16 [mi: evex.nd0.nf.l0.m4.o16 81 /4 iw ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(81) 204 031 : SM0,SM1,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+926, 39, 281}, + /* 57 : AND reg16?,imm16 [v+mi: evex.nd1.nf.l0.m4.o16 81 /4 iw ] ND,SM0,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(81) 204 031 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 2, {REG_GPR|BITS16,IMM_NORMAL|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+937, 40, 281}, + /* 58 : AND reg32?,rm32,imm32 [vmi: evex.nd1.nf.l0.m4.o32 81 /4 id ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(81) 214 042 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 3, {REG_GPR|BITS32,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+948, 41, 282}, + /* 59 : AND rm32,imm32 [mi: evex.nd0.nf.l0.m4.o32 81 /4 id ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(81) 204 041 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+959, 42, 282}, + /* 60 : AND reg32?,imm32 [v+mi: evex.nd1.nf.l0.m4.o32 81 /4 id ] ND,SM0,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(81) 204 041 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 2, {REG_GPR|BITS32,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+970, 43, 282}, + /* 61 : AND reg64?,rm64,sdword64 [vmi: evex.nd1.nf.l0.m4.o64 81 /4 id,s ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(81) 214 256 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 3, {REG_GPR|BITS64,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+981, 41, 283}, + /* 62 : AND rm64,sdword64 [mi: evex.nd0.nf.l0.m4.o64 81 /4 id,s ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(81) 204 255 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 2, {RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+992, 42, 283}, + /* 63 : AND reg64?,sdword64 [v+mi: evex.nd1.nf.l0.m4.o64 81 /4 id,s ] ND,SM0,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(81) 204 255 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 2, {REG_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+1003, 43, 283}, + /* 64 : AND kreg8,kreg8*,kreg8 [rvm: vex.l1.0f.ko8 41 /r ] ND,SM0,SM1,SM2,ZU,FL,AVX512DQ,FUTURE */ + /* 261(001 005) 001(41) 120 : SM0,SM1,SM2,NOAPX,ZU,FL,VEX,AVX512DQ,FUTURE */ + {I_AND, 3, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65449, 515, 4519}, + /* 65 : AND kreg8,kreg8*,kreg8 [rvm: evex.l1.0f.ko8 41 /r ] ND,SM0,SM1,SM2,ZU,FL,AVX512DQ,FUTURE,APX */ + /* 241(f1 7d 28) 300 001(41) 120 : SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_AND, 3, {OPMASKREG|BITS8,OPMASKREG|BITS8,OPMASKREG|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+29830, 516, 4519}, + /* 66 : AND kreg8,kreg8 [r+vm: vex.l1.0f.ko8 41 /r ] ND,SM0,SM1,ZU,FL,AVX512DQ,FUTURE */ + /* 260(001 005) 001(41) 110 : SM0,SM1,NOAPX,ZU,FL,VEX,AVX512DQ,FUTURE */ + {I_AND, 2, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65456, 517, 4519}, + /* 67 : AND kreg8,kreg8 [r+vm: evex.l1.0f.ko8 41 /r ] ND,SM0,SM1,ZU,FL,AVX512DQ,FUTURE,APX */ + /* 240(f1 7d 28) 300 001(41) 110 : SM0,SM1,ZU,LONG,FL,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_AND, 2, {OPMASKREG|BITS8,OPMASKREG|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+29839, 518, 4519}, + /* 68 : AND kreg16,kreg16*,kreg16 [rvm: vex.l1.0f.ko16 41 /r ] ND,SM0,SM1,SM2,ZU,FL,AVX512F,FUTURE */ + /* 261(001 004) 001(41) 120 : SM0,SM1,SM2,NOAPX,ZU,FL,VEX,AVX512F,FUTURE */ + {I_AND, 3, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65463, 527, 4520}, + /* 69 : AND kreg16,kreg16*,kreg16 [rvm: evex.l1.0f.ko16 41 /r ] ND,SM0,SM1,SM2,ZU,FL,AVX512F,FUTURE,APX */ + /* 241(f1 7c 28) 300 001(41) 120 : SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_AND, 3, {OPMASKREG|BITS16,OPMASKREG|BITS16,OPMASKREG|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+29848, 528, 4520}, + /* 70 : AND kreg16,kreg16 [r+vm: vex.l1.0f.ko16 41 /r ] SM0,ND,SM1,ZU,FL,AVX512F,FUTURE */ + /* 260(001 004) 001(41) 110 : SM0,SM1,NOAPX,ZU,FL,VEX,AVX512F,FUTURE */ + {I_AND, 2, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65470, 529, 4520}, + /* 71 : AND kreg16,kreg16 [r+vm: evex.l1.0f.ko16 41 /r ] SM0,ND,SM1,ZU,FL,AVX512F,FUTURE,APX */ + /* 240(f1 7c 28) 300 001(41) 110 : SM0,SM1,ZU,LONG,FL,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_AND, 2, {OPMASKREG|BITS16,OPMASKREG|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29857, 530, 4520}, + /* 72 : AND kreg32,kreg32*,kreg32 [rvm: vex.l1.0f.ko32 41 /r ] SM0,ND,SM1,SM2,ZU,FL,AVX512BW,FUTURE */ + /* 261(001 205) 001(41) 120 : SM0,SM1,SM2,NOAPX,ZU,FL,VEX,AVX512BW,FUTURE */ + {I_AND, 3, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65477, 519, 4521}, + /* 73 : AND kreg32,kreg32*,kreg32 [rvm: evex.l1.0f.ko32 41 /r ] SM0,ND,SM1,SM2,ZU,FL,AVX512BW,FUTURE,APX */ + /* 241(f1 fd 28) 300 001(41) 120 : SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_AND, 3, {OPMASKREG|BITS32,OPMASKREG|BITS32,OPMASKREG|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+29866, 520, 4521}, + /* 74 : AND kreg32,kreg32 [r+vm: vex.l1.0f.ko32 41 /r ] SM0,ND,SM1,ZU,FL,AVX512BW,FUTURE */ + /* 260(001 205) 001(41) 110 : SM0,SM1,NOAPX,ZU,FL,VEX,AVX512BW,FUTURE */ + {I_AND, 2, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65484, 521, 4521}, + /* 75 : AND kreg32,kreg32 [r+vm: evex.l1.0f.ko32 41 /r ] SM0,ND,SM1,ZU,FL,AVX512BW,FUTURE,APX */ + /* 240(f1 fd 28) 300 001(41) 110 : SM0,SM1,ZU,LONG,FL,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_AND, 2, {OPMASKREG|BITS32,OPMASKREG|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+29875, 522, 4521}, + /* 76 : AND kreg64,kreg64*,kreg64 [rvm: vex.l1.0f.ko64 41 /r ] ND,SM0,SM1,SM2,ZU,FL,AVX512BW,FUTURE */ + /* 261(001 204) 001(41) 120 : SM0,SM1,SM2,NOAPX,ZU,FL,VEX,AVX512BW,FUTURE */ + {I_AND, 3, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65491, 519, 4522}, + /* 77 : AND kreg64,kreg64*,kreg64 [rvm: evex.l1.0f.ko64 41 /r ] ND,SM0,SM1,SM2,ZU,FL,AVX512BW,FUTURE,APX */ + /* 241(f1 fc 28) 300 001(41) 120 : SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_AND, 3, {OPMASKREG|BITS64,OPMASKREG|BITS64,OPMASKREG|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+29884, 520, 4522}, + /* 78 : AND kreg64,kreg64 [r+vm: vex.l1.0f.ko64 41 /r ] ND,SM0,SM1,ZU,FL,AVX512BW,FUTURE */ + /* 260(001 204) 001(41) 110 : SM0,SM1,NOAPX,ZU,FL,VEX,AVX512BW,FUTURE */ + {I_AND, 2, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65498, 521, 4522}, + /* 79 : AND kreg64,kreg64 [r+vm: evex.l1.0f.ko64 41 /r ] ND,SM0,SM1,ZU,FL,AVX512BW,FUTURE,APX */ + /* 240(f1 fc 28) 300 001(41) 110 : SM0,SM1,ZU,LONG,FL,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_AND, 2, {OPMASKREG|BITS64,OPMASKREG|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+29893, 522, 4522}, +}; + +static const struct itemplate instrux_SUB[64] = { + /* 0 : SUB rm8,reg8 [mr: hle o8 28 /r ] SM0-1,LOCK,FL,8086 */ + /* 273 001(28) 101 : SM0,SM1,LOCK,FL,8086 */ + {I_SUB, 2, {RM_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+71489, 25, 284}, + /* 1 : SUB rm16,reg16 [mr: hle o16 29 /r ] SM0-1,LOCK,FL,8086 */ + /* 273 320 001(29) 101 : SM0,SM1,LOCK,FL,8086 */ + {I_SUB, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66567, 25, 285}, + /* 2 : SUB rm32,reg32 [mr: hle o32 29 /r ] SM0-1,LOCK,FL,386 */ + /* 273 321 001(29) 101 : SM0,SM1,LOCK,FL,386 */ + {I_SUB, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+66573, 26, 286}, + /* 3 : SUB rm64,reg64 [mr: hle o64 29 /r ] SM0-1,LOCK,LONG,FL,PROT,X86_64 */ + /* 273 324 001(29) 101 : SM0,SM1,LOCK,LONG,FL,PROT,X86_64 */ + {I_SUB, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+66579, 27, 287}, + /* 4 : SUB reg8,rm8 [rm: o8 2a /r ] SM0-1,FL,8086 */ + /* 001(2a) 110 : SM0,SM1,FL,8086 */ + {I_SUB, 2, {REG_GPR|BITS8,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+69701, 28, 288}, + /* 5 : SUB reg16,rm16 [rm: o16 2b /r ] SM0-1,FL,8086 */ + /* 320 001(2b) 110 : SM0,SM1,FL,8086 */ + {I_SUB, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+10248, 28, 289}, + /* 6 : SUB reg32,rm32 [rm: o32 2b /r ] SM0-1,FL,386 */ + /* 321 001(2b) 110 : SM0,SM1,FL,386 */ + {I_SUB, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+10278, 29, 290}, + /* 7 : SUB reg64,rm64 [rm: o64 2b /r ] SM0-1,LONG,FL,PROT,X86_64 */ + /* 324 001(2b) 110 : SM0,SM1,LONG,FL,PROT,X86_64 */ + {I_SUB, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+10308, 30, 291}, + /* 8 : SUB reg_al,imm8 [-i: o8 2c ib ] SM0-1,FL,8086 */ + /* 001(2c) 021 : SM0,SM1,FL,8086 */ + {I_SUB, 2, {REG_AL,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+72616, 28, 292}, + /* 9 : SUB rm8,imm8 [mi: hle 80 /5 ib ] SM0-1,LOCK,FL,8086 */ + /* 273 001(80) 205 021 : SM0,SM1,LOCK,FL,8086 */ + {I_SUB, 2, {RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+66585, 25, 293}, + /* 10 : SUB rm16,sbyteword16 [mi: hle o16 83 /5 ib,s ] SM0-1,LOCK,FL,8086 */ + /* 273 320 001(83) 205 275 : SM0,SM1,LOCK,FL,8086 */ + {I_SUB, 2, {RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+55103, 25, 294}, + /* 11 : SUB reg_ax,imm16 [-i: o16 2d iw ] SM0-1,FL,8086 */ + /* 320 001(2d) 031 : SM0,SM1,FL,8086 */ + {I_SUB, 2, {REG_AX,IMM_NORMAL|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+71494, 28, 295}, + /* 12 : SUB rm16,imm16 [mi: hle o16 81 /5 iw ] SM0-1,LOCK,FL,8086 */ + /* 273 320 001(81) 205 031 : SM0,SM1,LOCK,FL,8086 */ + {I_SUB, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55110, 25, 296}, + /* 13 : SUB rm32,sbytedword32 [mi: hle o32 83 /5 ib,s ] SM0-1,ZU,LOCK,FL,386 */ + /* 273 321 001(83) 205 275 : SM0,SM1,ZU,LOCK,FL,386 */ + {I_SUB, 2, {RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+55117, 31, 297}, + /* 14 : SUB reg_eax,imm32 [-i: o32 2d id ] SM0-1,ZU,FL,386 */ + /* 321 001(2d) 041 : SM0,SM1,ZU,FL,386 */ + {I_SUB, 2, {REG_EAX,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+71499, 32, 298}, + /* 15 : SUB rm32,imm32 [mi: hle o32 81 /5 id ] SM0-1,ZU,LOCK,FL,386 */ + /* 273 321 001(81) 205 041 : SM0,SM1,ZU,LOCK,FL,386 */ + {I_SUB, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+55124, 31, 299}, + /* 16 : SUB rm64,sbytedword64 [mi: hle o64 83 /5 ib,s ] SM0-1,ZU,LOCK,LONG,FL,PROT,X86_64 */ + /* 273 324 001(83) 205 275 : SM0,SM1,ZU,LOCK,LONG,FL,PROT,X86_64 */ + {I_SUB, 2, {RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+55131, 33, 300}, + /* 17 : SUB reg_rax,sdword64 [-i: o64 2d id,s ] SM0-1,ZU,LONG,FL,PROT,X86_64 */ + /* 324 001(2d) 255 : SM0,SM1,ZU,LONG,FL,PROT,X86_64 */ + {I_SUB, 2, {REG_RAX,SDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+71504, 34, 301}, + /* 18 : SUB rm64,sdword64 [mi: hle o64 81 /5 id,s ] SM0-1,ZU,LOCK,LONG,FL,PROT,X86_64 */ + /* 273 324 001(81) 205 255 : SM0,SM1,ZU,LOCK,LONG,FL,PROT,X86_64 */ + {I_SUB, 2, {RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+55138, 33, 302}, + /* 19 : SUB reg8?,reg8,rm8 [vrm: evex.nd1.nf.l0.m4.o8 2a /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(2a) 121 : SM0,SM1,SM2,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 3, {REG_GPR|BITS8,REG_GPR|BITS8,RM_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+23602, 35, 303}, + /* 20 : SUB reg8,rm8 [rm: evex.nd0.nf.l0.m4.o8 2a /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(2a) 110 : SM0,SM1,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 2, {REG_GPR|BITS8,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+23611, 36, 303}, + /* 21 : SUB reg8?,rm8 [v+rm: evex.nd1.nf.l0.m4.o8 2a /r ] SM0,ND,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(2a) 110 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 2, {REG_GPR|BITS8,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+23620, 37, 303}, + /* 22 : SUB reg16?,reg16,rm16 [vrm: evex.nd1.nf.l0.m4.o16 2b /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(2b) 121 : SM0,SM1,SM2,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+10223, 38, 304}, + /* 23 : SUB reg16,rm16 [rm: evex.nd0.nf.l0.m4.o16 2b /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(2b) 110 : SM0,SM1,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+10233, 39, 304}, + /* 24 : SUB reg16?,rm16 [v+rm: evex.nd1.nf.l0.m4.o16 2b /r ] SM0,ND,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(2b) 110 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+10243, 40, 304}, + /* 25 : SUB reg32?,reg32,rm32 [vrm: evex.nd1.nf.l0.m4.o32 2b /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(2b) 121 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+10253, 41, 305}, + /* 26 : SUB reg32,rm32 [rm: evex.nd0.nf.l0.m4.o32 2b /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(2b) 110 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+10263, 42, 305}, + /* 27 : SUB reg32?,rm32 [v+rm: evex.nd1.nf.l0.m4.o32 2b /r ] SM0,ND,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(2b) 110 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+10273, 43, 305}, + /* 28 : SUB reg64?,reg64,rm64 [vrm: evex.nd1.nf.l0.m4.o64 2b /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(2b) 121 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+10283, 41, 306}, + /* 29 : SUB reg64,rm64 [rm: evex.nd0.nf.l0.m4.o64 2b /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(2b) 110 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+10293, 42, 306}, + /* 30 : SUB reg64?,rm64 [v+rm: evex.nd1.nf.l0.m4.o64 2b /r ] ND,SM0,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(2b) 110 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+10303, 43, 306}, + /* 31 : SUB reg8?,rm8,reg8 [vmr: evex.nd1.nf.l0.m4.o8 28 /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(28) 112 : SM0,SM1,SM2,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 3, {REG_GPR|BITS8,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+23629, 35, 307}, + /* 32 : SUB rm8,reg8 [mr: evex.nd0.nf.l0.m4.o8 28 /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(28) 101 : SM0,SM1,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 2, {RM_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+23638, 36, 307}, + /* 33 : SUB reg8?,reg8 [v+mr: evex.nd1.nf.l0.m4.o8 28 /r ] ND,SM0,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(28) 101 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+23647, 37, 307}, + /* 34 : SUB reg16?,rm16,reg16 [vmr: evex.nd1.nf.l0.m4.o16 29 /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(29) 112 : SM0,SM1,SM2,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 3, {REG_GPR|BITS16,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+10313, 38, 308}, + /* 35 : SUB rm16,reg16 [mr: evex.nd0.nf.l0.m4.o16 29 /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(29) 101 : SM0,SM1,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+10323, 39, 308}, + /* 36 : SUB reg16?,reg16 [v+mr: evex.nd1.nf.l0.m4.o16 29 /r ] SM0,ND,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(29) 101 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+10333, 40, 308}, + /* 37 : SUB reg32?,rm32,reg32 [vmr: evex.nd1.nf.l0.m4.o32 29 /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(29) 112 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+10343, 41, 309}, + /* 38 : SUB rm32,reg32 [mr: evex.nd0.nf.l0.m4.o32 29 /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(29) 101 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+10353, 42, 309}, + /* 39 : SUB reg32?,reg32 [v+mr: evex.nd1.nf.l0.m4.o32 29 /r ] SM0,ND,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(29) 101 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+10363, 43, 309}, + /* 40 : SUB reg64?,rm64,reg64 [vmr: evex.nd1.nf.l0.m4.o64 29 /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(29) 112 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+10373, 41, 310}, + /* 41 : SUB rm64,reg64 [mr: evex.nd0.nf.l0.m4.o64 29 /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(29) 101 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+10383, 42, 310}, + /* 42 : SUB reg64?,reg64 [v+mr: evex.nd1.nf.l0.m4.o64 29 /r ] ND,SM0,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(29) 101 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+10393, 43, 310}, + /* 43 : SUB reg16?,rm16,sbyteword16 [vmi: evex.nd1.nf.l0.m4.o16 83 /5 ib,s ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(83) 215 276 : SM0,SM1,SM2,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 3, {REG_GPR|BITS16,RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+1014, 38, 311}, + /* 44 : SUB rm16,sbyteword16 [mi: evex.nd0.nf.l0.m4.o16 83 /5 ib,s ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(83) 205 275 : SM0,SM1,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 2, {RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+1025, 39, 311}, + /* 45 : SUB reg16?,sbyteword16 [v+mi: evex.nd1.nf.l0.m4.o16 83 /5 ib,s ] SM0,ND,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(83) 205 275 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 2, {REG_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+1036, 40, 311}, + /* 46 : SUB reg32?,rm32,sbytedword32 [vmi: evex.nd1.nf.l0.m4.o32 83 /5 ib,s ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(83) 215 276 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 3, {REG_GPR|BITS32,RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+1047, 41, 312}, + /* 47 : SUB rm32,sbytedword32 [mi: evex.nd0.nf.l0.m4.o32 83 /5 ib,s ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(83) 205 275 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 2, {RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+1058, 42, 312}, + /* 48 : SUB reg32?,sbytedword32 [v+mi: evex.nd1.nf.l0.m4.o32 83 /5 ib,s ] SM0,ND,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(83) 205 275 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 2, {REG_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+1069, 43, 312}, + /* 49 : SUB reg64?,rm64,sbytedword64 [vmi: evex.nd1.nf.l0.m4.o64 83 /5 ib,s ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(83) 215 276 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 3, {REG_GPR|BITS64,RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+1080, 41, 313}, + /* 50 : SUB rm64,sbytedword64 [mi: evex.nd0.nf.l0.m4.o64 83 /5 ib,s ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(83) 205 275 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 2, {RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+1091, 42, 313}, + /* 51 : SUB reg64?,sbytedword64 [v+mi: evex.nd1.nf.l0.m4.o64 83 /5 ib,s ] SM0,ND,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(83) 205 275 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 2, {REG_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+1102, 43, 313}, + /* 52 : SUB reg8?,rm8,imm8 [vmi: evex.nd1.nf.l0.m4.o8 80 /5 ib ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(80) 215 022 : SM0,SM1,SM2,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 3, {REG_GPR|BITS8,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+10403, 35, 314}, + /* 53 : SUB rm8,imm8 [mi: evex.nd0.nf.l0.m4.o8 80 /5 ib ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(80) 205 021 : SM0,SM1,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 2, {RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+10413, 36, 314}, + /* 54 : SUB reg8?,imm8 [v+mi: evex.nd1.nf.l0.m4.o8 80 /5 ib ] ND,SM0,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(80) 205 021 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 2, {REG_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+10423, 37, 314}, + /* 55 : SUB reg16?,rm16,imm16 [vmi: evex.nd1.nf.l0.m4.o16 81 /5 iw ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(81) 215 032 : SM0,SM1,SM2,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 3, {REG_GPR|BITS16,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+1113, 38, 315}, + /* 56 : SUB rm16,imm16 [mi: evex.nd0.nf.l0.m4.o16 81 /5 iw ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(81) 205 031 : SM0,SM1,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+1124, 39, 315}, + /* 57 : SUB reg16?,imm16 [v+mi: evex.nd1.nf.l0.m4.o16 81 /5 iw ] SM0,ND,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(81) 205 031 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 2, {REG_GPR|BITS16,IMM_NORMAL|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+1135, 40, 315}, + /* 58 : SUB reg32?,rm32,imm32 [vmi: evex.nd1.nf.l0.m4.o32 81 /5 id ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(81) 215 042 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 3, {REG_GPR|BITS32,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+1146, 41, 316}, + /* 59 : SUB rm32,imm32 [mi: evex.nd0.nf.l0.m4.o32 81 /5 id ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(81) 205 041 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+1157, 42, 316}, + /* 60 : SUB reg32?,imm32 [v+mi: evex.nd1.nf.l0.m4.o32 81 /5 id ] SM0,ND,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(81) 205 041 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 2, {REG_GPR|BITS32,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+1168, 43, 316}, + /* 61 : SUB reg64?,rm64,sdword64 [vmi: evex.nd1.nf.l0.m4.o64 81 /5 id,s ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(81) 215 256 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 3, {REG_GPR|BITS64,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+1179, 41, 317}, + /* 62 : SUB rm64,sdword64 [mi: evex.nd0.nf.l0.m4.o64 81 /5 id,s ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(81) 205 255 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 2, {RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+1190, 42, 317}, + /* 63 : SUB reg64?,sdword64 [v+mi: evex.nd1.nf.l0.m4.o64 81 /5 id,s ] SM0,ND,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(81) 205 255 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 2, {REG_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+1201, 43, 317}, +}; + +static const struct itemplate instrux_XOR[80] = { + /* 0 : XOR rm8,reg8 [mr: hle o8 30 /r ] SM0-1,LOCK,FL,8086 */ + /* 273 001(30) 101 : SM0,SM1,LOCK,FL,8086 */ + {I_XOR, 2, {RM_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+71509, 25, 318}, + /* 1 : XOR rm16,reg16 [mr: hle o16 31 /r ] SM0-1,LOCK,FL,8086 */ + /* 273 320 001(31) 101 : SM0,SM1,LOCK,FL,8086 */ + {I_XOR, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66591, 25, 319}, + /* 2 : XOR rm32,reg32 [mr: hle o32 31 /r ] SM0-1,LOCK,FL,386 */ + /* 273 321 001(31) 101 : SM0,SM1,LOCK,FL,386 */ + {I_XOR, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+66597, 26, 320}, + /* 3 : XOR rm64,reg64 [mr: hle o64 31 /r ] SM0-1,LOCK,LONG,FL,PROT,X86_64 */ + /* 273 324 001(31) 101 : SM0,SM1,LOCK,LONG,FL,PROT,X86_64 */ + {I_XOR, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+66603, 27, 321}, + /* 4 : XOR reg8,rm8 [rm: o8 32 /r ] SM0-1,FL,8086 */ + /* 001(32) 110 : SM0,SM1,FL,8086 */ + {I_XOR, 2, {REG_GPR|BITS8,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+69827, 28, 322}, + /* 5 : XOR reg16,rm16 [rm: o16 33 /r ] SM0-1,FL,8086 */ + /* 320 001(33) 110 : SM0,SM1,FL,8086 */ + {I_XOR, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+10458, 28, 323}, + /* 6 : XOR reg32,rm32 [rm: o32 33 /r ] SM0-1,FL,386 */ + /* 321 001(33) 110 : SM0,SM1,FL,386 */ + {I_XOR, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+10488, 29, 324}, + /* 7 : XOR reg64,rm64 [rm: o64 33 /r ] SM0-1,LONG,FL,PROT,X86_64 */ + /* 324 001(33) 110 : SM0,SM1,LONG,FL,PROT,X86_64 */ + {I_XOR, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+10518, 30, 325}, + /* 8 : XOR reg_al,imm8 [-i: o8 34 ib ] SM0-1,FL,8086 */ + /* 001(34) 021 : SM0,SM1,FL,8086 */ + {I_XOR, 2, {REG_AL,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+72620, 28, 326}, + /* 9 : XOR rm8,imm8 [mi: hle 80 /6 ib ] SM0-1,LOCK,FL,8086 */ + /* 273 001(80) 206 021 : SM0,SM1,LOCK,FL,8086 */ + {I_XOR, 2, {RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+66609, 25, 327}, + /* 10 : XOR rm16,sbyteword16 [mi: hle o16 83 /6 ib,s ] SM0-1,LOCK,FL,8086 */ + /* 273 320 001(83) 206 275 : SM0,SM1,LOCK,FL,8086 */ + {I_XOR, 2, {RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+55145, 25, 328}, + /* 11 : XOR reg_ax,imm16 [-i: o16 35 iw ] SM0-1,FL,8086 */ + /* 320 001(35) 031 : SM0,SM1,FL,8086 */ + {I_XOR, 2, {REG_AX,IMM_NORMAL|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+71514, 28, 329}, + /* 12 : XOR rm16,imm16 [mi: hle o16 81 /6 iw ] SM0-1,LOCK,FL,8086 */ + /* 273 320 001(81) 206 031 : SM0,SM1,LOCK,FL,8086 */ + {I_XOR, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55152, 25, 330}, + /* 13 : XOR rm32,sbytedword32 [mi: hle o32 83 /6 ib,s ] SM0-1,ZU,LOCK,FL,386 */ + /* 273 321 001(83) 206 275 : SM0,SM1,ZU,LOCK,FL,386 */ + {I_XOR, 2, {RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+55159, 31, 331}, + /* 14 : XOR reg_eax,imm32 [-i: o32 35 id ] SM0-1,ZU,FL,386 */ + /* 321 001(35) 041 : SM0,SM1,ZU,FL,386 */ + {I_XOR, 2, {REG_EAX,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+71519, 32, 332}, + /* 15 : XOR rm32,imm32 [mi: hle o32 81 /6 id ] SM0-1,ZU,LOCK,FL,386 */ + /* 273 321 001(81) 206 041 : SM0,SM1,ZU,LOCK,FL,386 */ + {I_XOR, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+55166, 31, 333}, + /* 16 : XOR rm64,sbytedword64 [mi: hle o64 83 /6 ib,s ] SM0-1,ZU,LOCK,LONG,FL,PROT,X86_64 */ + /* 273 324 001(83) 206 275 : SM0,SM1,ZU,LOCK,LONG,FL,PROT,X86_64 */ + {I_XOR, 2, {RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+55173, 33, 334}, + /* 17 : XOR reg_rax,sdword64 [-i: o64 35 id,s ] SM0-1,ZU,LONG,FL,PROT,X86_64 */ + /* 324 001(35) 255 : SM0,SM1,ZU,LONG,FL,PROT,X86_64 */ + {I_XOR, 2, {REG_RAX,SDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+71524, 34, 335}, + /* 18 : XOR rm64,sdword64 [mi: hle o64 81 /6 id,s ] SM0-1,ZU,LOCK,LONG,FL,PROT,X86_64 */ + /* 273 324 001(81) 206 255 : SM0,SM1,ZU,LOCK,LONG,FL,PROT,X86_64 */ + {I_XOR, 2, {RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+55180, 33, 336}, + /* 19 : XOR reg8?,reg8,rm8 [vrm: evex.nd1.nf.l0.m4.o8 32 /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(32) 121 : SM0,SM1,SM2,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 3, {REG_GPR|BITS8,REG_GPR|BITS8,RM_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+23656, 35, 337}, + /* 20 : XOR reg8,rm8 [rm: evex.nd0.nf.l0.m4.o8 32 /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(32) 110 : SM0,SM1,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 2, {REG_GPR|BITS8,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+23665, 36, 337}, + /* 21 : XOR reg8?,rm8 [v+rm: evex.nd1.nf.l0.m4.o8 32 /r ] SM0,ND,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(32) 110 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 2, {REG_GPR|BITS8,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+23674, 37, 337}, + /* 22 : XOR reg16?,reg16,rm16 [vrm: evex.nd1.nf.l0.m4.o16 33 /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(33) 121 : SM0,SM1,SM2,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+10433, 38, 338}, + /* 23 : XOR reg16,rm16 [rm: evex.nd0.nf.l0.m4.o16 33 /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(33) 110 : SM0,SM1,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+10443, 39, 338}, + /* 24 : XOR reg16?,rm16 [v+rm: evex.nd1.nf.l0.m4.o16 33 /r ] SM0,ND,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(33) 110 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+10453, 40, 338}, + /* 25 : XOR reg32?,reg32,rm32 [vrm: evex.nd1.nf.l0.m4.o32 33 /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(33) 121 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+10463, 41, 339}, + /* 26 : XOR reg32,rm32 [rm: evex.nd0.nf.l0.m4.o32 33 /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(33) 110 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+10473, 42, 339}, + /* 27 : XOR reg32?,rm32 [v+rm: evex.nd1.nf.l0.m4.o32 33 /r ] ND,SM0,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(33) 110 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+10483, 43, 339}, + /* 28 : XOR reg64?,reg64,rm64 [vrm: evex.nd1.nf.l0.m4.o64 33 /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(33) 121 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+10493, 41, 340}, + /* 29 : XOR reg64,rm64 [rm: evex.nd0.nf.l0.m4.o64 33 /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(33) 110 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+10503, 42, 340}, + /* 30 : XOR reg64?,rm64 [v+rm: evex.nd1.nf.l0.m4.o64 33 /r ] ND,SM0,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(33) 110 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+10513, 43, 340}, + /* 31 : XOR reg8?,rm8,reg8 [vmr: evex.nd1.nf.l0.m4.o8 30 /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(30) 112 : SM0,SM1,SM2,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 3, {REG_GPR|BITS8,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+23683, 35, 341}, + /* 32 : XOR rm8,reg8 [mr: evex.nd0.nf.l0.m4.o8 30 /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(30) 101 : SM0,SM1,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 2, {RM_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+23692, 36, 341}, + /* 33 : XOR reg8?,reg8 [v+mr: evex.nd1.nf.l0.m4.o8 30 /r ] SM0,ND,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(30) 101 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+23701, 37, 341}, + /* 34 : XOR reg16?,rm16,reg16 [vmr: evex.nd1.nf.l0.m4.o16 31 /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(31) 112 : SM0,SM1,SM2,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 3, {REG_GPR|BITS16,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+10523, 38, 342}, + /* 35 : XOR rm16,reg16 [mr: evex.nd0.nf.l0.m4.o16 31 /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(31) 101 : SM0,SM1,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+10533, 39, 342}, + /* 36 : XOR reg16?,reg16 [v+mr: evex.nd1.nf.l0.m4.o16 31 /r ] SM0,ND,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(31) 101 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+10543, 40, 342}, + /* 37 : XOR reg32?,rm32,reg32 [vmr: evex.nd1.nf.l0.m4.o32 31 /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(31) 112 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+10553, 41, 343}, + /* 38 : XOR rm32,reg32 [mr: evex.nd0.nf.l0.m4.o32 31 /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(31) 101 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+10563, 42, 343}, + /* 39 : XOR reg32?,reg32 [v+mr: evex.nd1.nf.l0.m4.o32 31 /r ] SM0,ND,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(31) 101 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+10573, 43, 343}, + /* 40 : XOR reg64?,rm64,reg64 [vmr: evex.nd1.nf.l0.m4.o64 31 /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(31) 112 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+10583, 41, 344}, + /* 41 : XOR rm64,reg64 [mr: evex.nd0.nf.l0.m4.o64 31 /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(31) 101 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+10593, 42, 344}, + /* 42 : XOR reg64?,reg64 [v+mr: evex.nd1.nf.l0.m4.o64 31 /r ] ND,SM0,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(31) 101 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+10603, 43, 344}, + /* 43 : XOR reg16?,rm16,sbyteword16 [vmi: evex.nd1.nf.l0.m4.o16 83 /6 ib,s ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(83) 216 276 : SM0,SM1,SM2,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 3, {REG_GPR|BITS16,RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+1212, 38, 345}, + /* 44 : XOR rm16,sbyteword16 [mi: evex.nd0.nf.l0.m4.o16 83 /6 ib,s ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(83) 206 275 : SM0,SM1,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 2, {RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+1223, 39, 345}, + /* 45 : XOR reg16?,sbyteword16 [v+mi: evex.nd1.nf.l0.m4.o16 83 /6 ib,s ] SM0,ND,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(83) 206 275 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 2, {REG_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+1234, 40, 345}, + /* 46 : XOR reg32?,rm32,sbytedword32 [vmi: evex.nd1.nf.l0.m4.o32 83 /6 ib,s ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(83) 216 276 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 3, {REG_GPR|BITS32,RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+1245, 41, 346}, + /* 47 : XOR rm32,sbytedword32 [mi: evex.nd0.nf.l0.m4.o32 83 /6 ib,s ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(83) 206 275 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 2, {RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+1256, 42, 346}, + /* 48 : XOR reg32?,sbytedword32 [v+mi: evex.nd1.nf.l0.m4.o32 83 /6 ib,s ] ND,SM0,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(83) 206 275 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 2, {REG_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+1267, 43, 346}, + /* 49 : XOR reg64?,rm64,sbytedword64 [vmi: evex.nd1.nf.l0.m4.o64 83 /6 ib,s ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(83) 216 276 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 3, {REG_GPR|BITS64,RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+1278, 41, 347}, + /* 50 : XOR rm64,sbytedword64 [mi: evex.nd0.nf.l0.m4.o64 83 /6 ib,s ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(83) 206 275 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 2, {RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+1289, 42, 347}, + /* 51 : XOR reg64?,sbytedword64 [v+mi: evex.nd1.nf.l0.m4.o64 83 /6 ib,s ] ND,SM0,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(83) 206 275 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 2, {REG_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+1300, 43, 347}, + /* 52 : XOR reg8?,rm8,imm8 [vmi: evex.nd1.nf.l0.m4.o8 80 /6 ib ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(80) 216 022 : SM0,SM1,SM2,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 3, {REG_GPR|BITS8,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+10613, 35, 348}, + /* 53 : XOR rm8,imm8 [mi: evex.nd0.nf.l0.m4.o8 80 /6 ib ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(80) 206 021 : SM0,SM1,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 2, {RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+10623, 36, 348}, + /* 54 : XOR reg8?,imm8 [v+mi: evex.nd1.nf.l0.m4.o8 80 /6 ib ] ND,SM0,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(80) 206 021 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 2, {REG_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+10633, 37, 348}, + /* 55 : XOR reg16?,rm16,imm16 [vmi: evex.nd1.nf.l0.m4.o16 81 /6 iw ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(81) 216 032 : SM0,SM1,SM2,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 3, {REG_GPR|BITS16,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+1311, 38, 349}, + /* 56 : XOR rm16,imm16 [mi: evex.nd0.nf.l0.m4.o16 81 /6 iw ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(81) 206 031 : SM0,SM1,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+1322, 39, 349}, + /* 57 : XOR reg16?,imm16 [v+mi: evex.nd1.nf.l0.m4.o16 81 /6 iw ] SM0,ND,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(81) 206 031 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 2, {REG_GPR|BITS16,IMM_NORMAL|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+1333, 40, 349}, + /* 58 : XOR reg32?,rm32,imm32 [vmi: evex.nd1.nf.l0.m4.o32 81 /6 id ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(81) 216 042 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 3, {REG_GPR|BITS32,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+1344, 41, 350}, + /* 59 : XOR rm32,imm32 [mi: evex.nd0.nf.l0.m4.o32 81 /6 id ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(81) 206 041 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+1355, 42, 350}, + /* 60 : XOR reg32?,imm32 [v+mi: evex.nd1.nf.l0.m4.o32 81 /6 id ] SM0,ND,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(81) 206 041 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 2, {REG_GPR|BITS32,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+1366, 43, 350}, + /* 61 : XOR reg64?,rm64,sdword64 [vmi: evex.nd1.nf.l0.m4.o64 81 /6 id,s ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(81) 216 256 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 3, {REG_GPR|BITS64,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+1377, 41, 351}, + /* 62 : XOR rm64,sdword64 [mi: evex.nd0.nf.l0.m4.o64 81 /6 id,s ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(81) 206 255 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 2, {RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+1388, 42, 351}, + /* 63 : XOR reg64?,sdword64 [v+mi: evex.nd1.nf.l0.m4.o64 81 /6 id,s ] SM0,ND,SM1,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(81) 206 255 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 2, {REG_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+1399, 43, 351}, + /* 64 : XOR kreg8,kreg8*,kreg8 [rvm: vex.nds.l1.0f.ko8 47 /r ] SM0,ND,SM1,SM2,ZU,FL,AVX512DQ,FUTURE */ + /* 261(001 005) 001(47) 120 : SM0,SM1,SM2,NOAPX,ZU,FL,VEX,AVX512DQ,FUTURE */ + {I_XOR, 3, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65827, 515, 4713}, + /* 65 : XOR kreg8,kreg8*,kreg8 [rvm: evex.nds.l1.0f.ko8 47 /r ] SM0,ND,SM1,SM2,ZU,FL,AVX512DQ,FUTURE,APX */ + /* 241(f1 7d 28) 300 001(47) 120 : SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_XOR, 3, {OPMASKREG|BITS8,OPMASKREG|BITS8,OPMASKREG|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+30316, 516, 4713}, + /* 66 : XOR kreg8,kreg8 [r+vm: vex.nds.l1.0f.ko8 47 /r ] SM0,ND,SM1,ZU,FL,AVX512DQ,FUTURE */ + /* 260(001 005) 001(47) 110 : SM0,SM1,NOAPX,ZU,FL,VEX,AVX512DQ,FUTURE */ + {I_XOR, 2, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65834, 517, 4713}, + /* 67 : XOR kreg8,kreg8 [r+vm: evex.nds.l1.0f.ko8 47 /r ] SM0,ND,SM1,ZU,FL,AVX512DQ,FUTURE,APX */ + /* 240(f1 7d 28) 300 001(47) 110 : SM0,SM1,ZU,LONG,FL,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_XOR, 2, {OPMASKREG|BITS8,OPMASKREG|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+30325, 518, 4713}, + /* 68 : XOR kreg16,kreg16*,kreg16 [rvm: vex.nds.l1.0f.ko16 47 /r ] SM0,ND,SM1,SM2,ZU,FL,AVX512F,FUTURE */ + /* 261(001 004) 001(47) 120 : SM0,SM1,SM2,NOAPX,ZU,FL,VEX,AVX512F,FUTURE */ + {I_XOR, 3, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65841, 527, 4714}, + /* 69 : XOR kreg16,kreg16*,kreg16 [rvm: evex.nds.l1.0f.ko16 47 /r ] SM0,ND,SM1,SM2,ZU,FL,AVX512F,FUTURE,APX */ + /* 241(f1 7c 28) 300 001(47) 120 : SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_XOR, 3, {OPMASKREG|BITS16,OPMASKREG|BITS16,OPMASKREG|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+30334, 528, 4714}, + /* 70 : XOR kreg16,kreg16 [r+vm: vex.nds.l1.0f.ko16 47 /r ] ND,SM0,SM1,ZU,FL,AVX512F,FUTURE */ + /* 260(001 004) 001(47) 110 : SM0,SM1,NOAPX,ZU,FL,VEX,AVX512F,FUTURE */ + {I_XOR, 2, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65848, 529, 4714}, + /* 71 : XOR kreg16,kreg16 [r+vm: evex.nds.l1.0f.ko16 47 /r ] ND,SM0,SM1,ZU,FL,AVX512F,FUTURE,APX */ + /* 240(f1 7c 28) 300 001(47) 110 : SM0,SM1,ZU,LONG,FL,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_XOR, 2, {OPMASKREG|BITS16,OPMASKREG|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+30343, 530, 4714}, + /* 72 : XOR kreg32,kreg32*,kreg32 [rvm: vex.nds.l1.0f.ko32 47 /r ] ND,SM0,SM1,SM2,ZU,FL,AVX512BW,FUTURE */ + /* 261(001 205) 001(47) 120 : SM0,SM1,SM2,NOAPX,ZU,FL,VEX,AVX512BW,FUTURE */ + {I_XOR, 3, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65855, 519, 4715}, + /* 73 : XOR kreg32,kreg32*,kreg32 [rvm: evex.nds.l1.0f.ko32 47 /r ] ND,SM0,SM1,SM2,ZU,FL,AVX512BW,FUTURE,APX */ + /* 241(f1 fd 28) 300 001(47) 120 : SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_XOR, 3, {OPMASKREG|BITS32,OPMASKREG|BITS32,OPMASKREG|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+30352, 520, 4715}, + /* 74 : XOR kreg32,kreg32 [r+vm: vex.nds.l1.0f.ko32 47 /r ] ND,SM0,SM1,ZU,FL,AVX512BW,FUTURE */ + /* 260(001 205) 001(47) 110 : SM0,SM1,NOAPX,ZU,FL,VEX,AVX512BW,FUTURE */ + {I_XOR, 2, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65862, 521, 4715}, + /* 75 : XOR kreg32,kreg32 [r+vm: evex.nds.l1.0f.ko32 47 /r ] ND,SM0,SM1,ZU,FL,AVX512BW,FUTURE,APX */ + /* 240(f1 fd 28) 300 001(47) 110 : SM0,SM1,ZU,LONG,FL,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_XOR, 2, {OPMASKREG|BITS32,OPMASKREG|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+30361, 522, 4715}, + /* 76 : XOR kreg64,kreg64*,kreg64 [rvm: vex.nds.l1.0f.ko64 47 /r ] ND,SM0,SM1,SM2,ZU,FL,AVX512BW,FUTURE */ + /* 261(001 204) 001(47) 120 : SM0,SM1,SM2,NOAPX,ZU,FL,VEX,AVX512BW,FUTURE */ + {I_XOR, 3, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65869, 519, 4716}, + /* 77 : XOR kreg64,kreg64*,kreg64 [rvm: evex.nds.l1.0f.ko64 47 /r ] ND,SM0,SM1,SM2,ZU,FL,AVX512BW,FUTURE,APX */ + /* 241(f1 fc 28) 300 001(47) 120 : SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_XOR, 3, {OPMASKREG|BITS64,OPMASKREG|BITS64,OPMASKREG|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+30370, 520, 4716}, + /* 78 : XOR kreg64,kreg64 [r+vm: vex.nds.l1.0f.ko64 47 /r ] SM0,ND,SM1,ZU,FL,AVX512BW,FUTURE */ + /* 260(001 204) 001(47) 110 : SM0,SM1,NOAPX,ZU,FL,VEX,AVX512BW,FUTURE */ + {I_XOR, 2, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65876, 521, 4716}, + /* 79 : XOR kreg64,kreg64 [r+vm: evex.nds.l1.0f.ko64 47 /r ] SM0,ND,SM1,ZU,FL,AVX512BW,FUTURE,APX */ + /* 240(f1 fc 28) 300 001(47) 110 : SM0,SM1,ZU,LONG,FL,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_XOR, 2, {OPMASKREG|BITS64,OPMASKREG|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+30379, 522, 4716}, +}; + +static const struct itemplate instrux_CMP[19] = { + /* 0 : CMP rm8,reg8 [mr: hle o8 38 /r ] SM0-1,FL,8086 */ + /* 273 001(38) 101 : SM0,SM1,FL,8086 */ + {I_CMP, 2, {RM_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+71529, 28, 352}, + /* 1 : CMP rm16,reg16 [mr: hle o16 39 /r ] SM0-1,FL,8086 */ + /* 273 320 001(39) 101 : SM0,SM1,FL,8086 */ + {I_CMP, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66615, 28, 353}, + /* 2 : CMP rm32,reg32 [mr: hle o32 39 /r ] SM0-1,FL,386 */ + /* 273 321 001(39) 101 : SM0,SM1,FL,386 */ + {I_CMP, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+66621, 29, 354}, + /* 3 : CMP rm64,reg64 [mr: hle o64 39 /r ] SM0-1,LONG,FL,PROT,X86_64 */ + /* 273 324 001(39) 101 : SM0,SM1,LONG,FL,PROT,X86_64 */ + {I_CMP, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+66627, 30, 355}, + /* 4 : CMP reg8,rm8 [rm: o8 3a /r ] SM0-1,FL,8086 */ + /* 001(3a) 110 : SM0,SM1,FL,8086 */ + {I_CMP, 2, {REG_GPR|BITS8,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+69773, 28, 356}, + /* 5 : CMP reg16,rm16 [rm: o16 3b /r ] SM0-1,FL,8086 */ + /* 320 001(3b) 110 : SM0,SM1,FL,8086 */ + {I_CMP, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+71534, 28, 357}, + /* 6 : CMP reg32,rm32 [rm: o32 3b /r ] SM0-1,FL,386 */ + /* 321 001(3b) 110 : SM0,SM1,FL,386 */ + {I_CMP, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+71539, 29, 358}, + /* 7 : CMP reg64,rm64 [rm: o64 3b /r ] SM0-1,LONG,FL,PROT,X86_64 */ + /* 324 001(3b) 110 : SM0,SM1,LONG,FL,PROT,X86_64 */ + {I_CMP, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+71544, 30, 359}, + /* 8 : CMP reg_al,imm8 [-i: o8 3c ib ] SM0-1,FL,8086 */ + /* 001(3c) 021 : SM0,SM1,FL,8086 */ + {I_CMP, 2, {REG_AL,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+72624, 28, 360}, + /* 9 : CMP rm8,imm8 [mi: hle 80 /7 ib ] SM0-1,FL,8086 */ + /* 273 001(80) 207 021 : SM0,SM1,FL,8086 */ + {I_CMP, 2, {RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+66633, 28, 361}, + /* 10 : CMP rm16,sbyteword16 [mi: hle o16 83 /7 ib,s ] SM0-1,FL,8086 */ + /* 273 320 001(83) 207 275 : SM0,SM1,FL,8086 */ + {I_CMP, 2, {RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+55187, 28, 362}, + /* 11 : CMP reg_ax,imm16 [-i: o16 3d iw ] SM0-1,FL,8086 */ + /* 320 001(3d) 031 : SM0,SM1,FL,8086 */ + {I_CMP, 2, {REG_AX,IMM_NORMAL|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+71549, 28, 363}, + /* 12 : CMP rm16,imm16 [mi: hle o16 81 /7 iw ] SM0-1,FL,8086 */ + /* 273 320 001(81) 207 031 : SM0,SM1,FL,8086 */ + {I_CMP, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55194, 28, 364}, + /* 13 : CMP rm32,sbytedword32 [mi: hle o32 83 /7 ib,s ] SM0-1,ZU,FL,386 */ + /* 273 321 001(83) 207 275 : SM0,SM1,ZU,FL,386 */ + {I_CMP, 2, {RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+55201, 32, 365}, + /* 14 : CMP reg_eax,imm32 [-i: o32 3d id ] SM0-1,ZU,FL,386 */ + /* 321 001(3d) 041 : SM0,SM1,ZU,FL,386 */ + {I_CMP, 2, {REG_EAX,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+71554, 32, 366}, + /* 15 : CMP rm32,imm32 [mi: hle o32 81 /7 id ] SM0-1,ZU,FL,386 */ + /* 273 321 001(81) 207 041 : SM0,SM1,ZU,FL,386 */ + {I_CMP, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+55208, 32, 367}, + /* 16 : CMP rm64,sbytedword64 [mi: hle o64 83 /7 ib,s ] SM0-1,ZU,LONG,FL,PROT,X86_64 */ + /* 273 324 001(83) 207 275 : SM0,SM1,ZU,LONG,FL,PROT,X86_64 */ + {I_CMP, 2, {RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+55215, 34, 368}, + /* 17 : CMP reg_rax,sdword64 [-i: o64 3d id,s ] SM0-1,ZU,LONG,FL,PROT,X86_64 */ + /* 324 001(3d) 255 : SM0,SM1,ZU,LONG,FL,PROT,X86_64 */ + {I_CMP, 2, {REG_RAX,SDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+71559, 34, 369}, + /* 18 : CMP rm64,sdword64 [mi: hle o64 81 /7 id,s ] SM0-1,ZU,LONG,FL,PROT,X86_64 */ + /* 273 324 001(81) 207 255 : SM0,SM1,ZU,LONG,FL,PROT,X86_64 */ + {I_CMP, 2, {RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+55222, 34, 370}, +}; + +static const struct itemplate instrux_TEST[24] = { + /* 0 : TEST rm8,reg8 [mr: o8 84 /r ] SM0-1,FL,8086 */ + /* 001(84) 101 : SM0,SM1,FL,8086 */ + {I_TEST, 2, {RM_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+72628, 28, 373}, + /* 1 : TEST rm16,reg16 [mr: o16 85 /r ] SM0-1,FL,8086 */ + /* 320 001(85) 101 : SM0,SM1,FL,8086 */ + {I_TEST, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+71564, 28, 374}, + /* 2 : TEST rm32,reg32 [mr: o32 85 /r ] SM0-1,FL,386 */ + /* 321 001(85) 101 : SM0,SM1,FL,386 */ + {I_TEST, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+71569, 29, 375}, + /* 3 : TEST rm64,reg64 [mr: o64 85 /r ] SM0-1,LONG,FL,PROT,X86_64 */ + /* 324 001(85) 101 : SM0,SM1,LONG,FL,PROT,X86_64 */ + {I_TEST, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+71574, 30, 376}, + /* 4 : TEST reg8,mem8 [rm: o8 84 /r ] SM0,ND,SM1,FL,8086 */ + /* 001(84) 110 : SM0,SM1,FL,8086 */ + {I_TEST, 2, {REG_GPR|BITS8,MEMORY|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+72632, 28, 377}, + /* 5 : TEST reg16,mem16 [rm: o16 85 /r ] SM0,ND,SM1,FL,8086 */ + /* 320 001(85) 110 : SM0,SM1,FL,8086 */ + {I_TEST, 2, {REG_GPR|BITS16,MEMORY|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+71579, 28, 378}, + /* 6 : TEST reg32,mem32 [rm: o32 85 /r ] ND,SM0-1,FL,386 */ + /* 321 001(85) 110 : SM0,SM1,FL,386 */ + {I_TEST, 2, {REG_GPR|BITS32,MEMORY|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+71584, 29, 379}, + /* 7 : TEST reg64,mem64 [rm: o64 85 /r ] ND,SM0-1,LONG,FL,PROT,X86_64 */ + /* 324 001(85) 110 : SM0,SM1,LONG,FL,PROT,X86_64 */ + {I_TEST, 2, {REG_GPR|BITS64,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+71589, 30, 380}, + /* 8 : TEST reg_al,imm8 [-i: o8 a8 ib ] SM0-1,NOAPX,FL,8086 */ + /* 001(a8) 021 : SM0,SM1,NOAPX,FL,8086 */ + {I_TEST, 2, {REG_AL|RN_L16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+72636, 53, 381}, + /* 9 : TEST reg_ax,imm16 [-i: o16 a9 iw ] SM0-1,NOAPX,FL,8086 */ + /* 320 001(a9) 031 : SM0,SM1,NOAPX,FL,8086 */ + {I_TEST, 2, {REG_AX|RN_L16,IMM_NORMAL|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+71594, 53, 382}, + /* 10 : TEST reg_eax,imm32 [-i: o32 a9 id ] SM0-1,NOAPX,FL,386 */ + /* 321 001(a9) 041 : SM0,SM1,NOAPX,FL,386 */ + {I_TEST, 2, {REG_EAX|RN_L16,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+71599, 54, 383}, + /* 11 : TEST reg_rax,sdword64 [-i: o64 a9 id,s ] SM0-1,NOAPX,LONG,FL,PROT,X86_64 */ + /* 324 001(a9) 255 : SM0,SM1,NOAPX,LONG,FL,PROT,X86_64 */ + {I_TEST, 2, {REG_RAX|RN_L16,SDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+71604, 55, 384}, + /* 12 : TEST rm8,imm8 [mi: o8 f6 /0 ib ] SM0-1,FL,8086 */ + /* 001(f6) 200 021 : SM0,SM1,FL,8086 */ + {I_TEST, 2, {RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+71609, 28, 385}, + /* 13 : TEST rm16,imm16 [mi: o16 f7 /0 iw ] SM0-1,FL,8086 */ + /* 320 001(f7) 200 031 : SM0,SM1,FL,8086 */ + {I_TEST, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66639, 28, 386}, + /* 14 : TEST rm32,imm32 [mi: o32 f7 /0 id ] SM0-1,FL,386 */ + /* 321 001(f7) 200 041 : SM0,SM1,FL,386 */ + {I_TEST, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+66645, 29, 387}, + /* 15 : TEST rm64,sdword64 [mi: o64 f7 /0 id,s ] SM0-1,LONG,FL,PROT,X86_64 */ + /* 324 001(f7) 200 255 : SM0,SM1,LONG,FL,PROT,X86_64 */ + {I_TEST, 2, {RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+66651, 30, 388}, + /* 16 : TEST kreg8,kreg8 [rm: vex.l0.0f.ko8 99 /r ] ND,SM0-1,ZU,FL,AVX512DQ,FUTURE */ + /* 270(001 001) 001(99) 110 : SM0,SM1,NOAPX,ZU,FL,VEX,AVX512DQ,FUTURE */ + {I_TEST, 2, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65701, 517, 4663}, + /* 17 : TEST kreg8,kreg8 [rm: evex.l0.0f.ko8 99 /r ] ND,SM0-1,ZU,FL,AVX512DQ,FUTURE,APX */ + /* 250(f1 7d 08) 300 001(99) 110 : SM0,SM1,ZU,LONG,FL,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_TEST, 2, {OPMASKREG|BITS8,OPMASKREG|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+30154, 518, 4663}, + /* 18 : TEST kreg16,kreg16 [rm: vex.l0.0f.ko16 99 /r ] ND,SM0-1,ZU,FL,AVX512DQ,FUTURE */ + /* 270(001 000) 001(99) 110 : SM0,SM1,NOAPX,ZU,FL,VEX,AVX512DQ,FUTURE */ + {I_TEST, 2, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65708, 517, 4664}, + /* 19 : TEST kreg16,kreg16 [rm: evex.l0.0f.ko16 99 /r ] ND,SM0-1,ZU,FL,AVX512DQ,FUTURE,APX */ + /* 250(f1 7c 08) 300 001(99) 110 : SM0,SM1,ZU,LONG,FL,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_TEST, 2, {OPMASKREG|BITS16,OPMASKREG|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+30163, 518, 4664}, + /* 20 : TEST kreg32,kreg32 [rm: vex.l0.0f.ko32 99 /r ] ND,SM0-1,ZU,FL,AVX512BW,FUTURE */ + /* 270(001 201) 001(99) 110 : SM0,SM1,NOAPX,ZU,FL,VEX,AVX512BW,FUTURE */ + {I_TEST, 2, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65715, 521, 4665}, + /* 21 : TEST kreg32,kreg32 [rm: evex.l0.0f.ko32 99 /r ] ND,SM0-1,ZU,FL,AVX512BW,FUTURE,APX */ + /* 250(f1 fd 08) 300 001(99) 110 : SM0,SM1,ZU,LONG,FL,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_TEST, 2, {OPMASKREG|BITS32,OPMASKREG|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+30172, 522, 4665}, + /* 22 : TEST kreg64,kreg64 [rm: vex.l0.0f.ko64 99 /r ] ND,SM0-1,ZU,FL,AVX512BW,FUTURE */ + /* 270(001 200) 001(99) 110 : SM0,SM1,NOAPX,ZU,FL,VEX,AVX512BW,FUTURE */ + {I_TEST, 2, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65722, 521, 4666}, + /* 23 : TEST kreg64,kreg64 [rm: evex.l0.0f.ko64 99 /r ] ND,SM0-1,ZU,FL,AVX512BW,FUTURE,APX */ + /* 250(f1 fc 08) 300 001(99) 110 : SM0,SM1,ZU,LONG,FL,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_TEST, 2, {OPMASKREG|BITS64,OPMASKREG|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+30181, 522, 4666}, +}; + +static const struct itemplate instrux_ROL[100] = { + /* 0 : ROL rm8,unity [m-: o8 d0 /0 ] FL,8086 */ + /* 001(d0) 200 : FL,8086 */ + {I_ROL, 2, {RM_GPR|BITS8,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+23733, 56, 391}, + /* 1 : ROL rm16,unity [m-: o16 d1 /0 ] FL,8086 */ + /* 320 001(d1) 200 : FL,8086 */ + {I_ROL, 2, {RM_GPR|BITS16,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+10688, 56, 392}, + /* 2 : ROL rm32,unity [m-: o32 d1 /0 ] FL,386 */ + /* 321 001(d1) 200 : FL,386 */ + {I_ROL, 2, {RM_GPR|BITS32,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+10718, 57, 393}, + /* 3 : ROL rm64,unity [m-: o64 d1 /0 ] LONG,FL,PROT,X86_64 */ + /* 324 001(d1) 200 : LONG,FL,PROT,X86_64 */ + {I_ROL, 2, {RM_GPR|BITS64,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+10748, 58, 394}, + /* 4 : ROL rm8,reg_cl [m-: o8 d2 /0 ] FL,8086 */ + /* 001(d2) 200 : FL,8086 */ + {I_ROL, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+23760, 56, 395}, + /* 5 : ROL rm16,reg_cl [m-: o16 d3 /0 ] FL,8086 */ + /* 320 001(d3) 200 : FL,8086 */ + {I_ROL, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+10778, 56, 396}, + /* 6 : ROL rm32,reg_cl [m-: o32 d3 /0 ] FL,386 */ + /* 321 001(d3) 200 : FL,386 */ + {I_ROL, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+10808, 57, 397}, + /* 7 : ROL rm64,reg_cl [m-: o64 d3 /0 ] LONG,FL,PROT,X86_64 */ + /* 324 001(d3) 200 : LONG,FL,PROT,X86_64 */ + {I_ROL, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+10838, 58, 398}, + /* 8 : ROL rm8,reg_cx [m-: o8 d2 /0 ] ND,FL,8086 */ + /* 001(d2) 200 : FL,8086 */ + {I_ROL, 2, {RM_GPR|BITS8,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+23760, 56, 399}, + /* 9 : ROL rm16,reg_cx [m-: o16 d3 /0 ] ND,FL,8086 */ + /* 320 001(d3) 200 : FL,8086 */ + {I_ROL, 2, {RM_GPR|BITS16,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+10778, 56, 400}, + /* 10 : ROL rm32,reg_cx [m-: o32 d3 /0 ] ND,FL,386 */ + /* 321 001(d3) 200 : FL,386 */ + {I_ROL, 2, {RM_GPR|BITS32,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+10808, 57, 401}, + /* 11 : ROL rm64,reg_cx [m-: o64 d3 /0 ] ND,LONG,FL,PROT,X86_64 */ + /* 324 001(d3) 200 : LONG,FL,PROT,X86_64 */ + {I_ROL, 2, {RM_GPR|BITS64,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+10838, 58, 402}, + /* 12 : ROL rm8,reg_ecx [m-: o8 d2 /0 ] ND,FL,8086 */ + /* 001(d2) 200 : FL,8086 */ + {I_ROL, 2, {RM_GPR|BITS8,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+23760, 56, 403}, + /* 13 : ROL rm16,reg_ecx [m-: o16 d3 /0 ] ND,FL,8086 */ + /* 320 001(d3) 200 : FL,8086 */ + {I_ROL, 2, {RM_GPR|BITS16,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+10778, 56, 404}, + /* 14 : ROL rm32,reg_ecx [m-: o32 d3 /0 ] ND,FL,386 */ + /* 321 001(d3) 200 : FL,386 */ + {I_ROL, 2, {RM_GPR|BITS32,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+10808, 57, 405}, + /* 15 : ROL rm64,reg_ecx [m-: o64 d3 /0 ] ND,LONG,FL,PROT,X86_64 */ + /* 324 001(d3) 200 : LONG,FL,PROT,X86_64 */ + {I_ROL, 2, {RM_GPR|BITS64,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+10838, 58, 406}, + /* 16 : ROL rm8,reg_rcx [m-: o8 d2 /0 ] ND,FL,8086 */ + /* 001(d2) 200 : FL,8086 */ + {I_ROL, 2, {RM_GPR|BITS8,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+23760, 56, 407}, + /* 17 : ROL rm16,reg_rcx [m-: o16 d3 /0 ] ND,FL,8086 */ + /* 320 001(d3) 200 : FL,8086 */ + {I_ROL, 2, {RM_GPR|BITS16,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+10778, 56, 408}, + /* 18 : ROL rm32,reg_rcx [m-: o32 d3 /0 ] ND,FL,386 */ + /* 321 001(d3) 200 : FL,386 */ + {I_ROL, 2, {RM_GPR|BITS32,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+10808, 57, 409}, + /* 19 : ROL rm64,reg_rcx [m-: o64 d3 /0 ] ND,LONG,FL,PROT,X86_64 */ + /* 324 001(d3) 200 : LONG,FL,PROT,X86_64 */ + {I_ROL, 2, {RM_GPR|BITS64,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+10838, 58, 410}, + /* 20 : ROL rm8,imm8 [mi: o8 c0 /0 ib,u ] FL,186 */ + /* 001(c0) 200 025 : FL,186 */ + {I_ROL, 2, {RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+10868, 59, 411}, + /* 21 : ROL rm16,imm8 [mi: o16 c1 /0 ib,u ] FL,186 */ + /* 320 001(c1) 200 025 : FL,186 */ + {I_ROL, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1437, 59, 412}, + /* 22 : ROL rm32,imm8 [mi: o32 c1 /0 ib,u ] FL,386 */ + /* 321 001(c1) 200 025 : FL,386 */ + {I_ROL, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1470, 57, 413}, + /* 23 : ROL rm64,imm8 [mi: o64 c1 /0 ib,u ] LONG,FL,PROT,X86_64 */ + /* 324 001(c1) 200 025 : LONG,FL,PROT,X86_64 */ + {I_ROL, 2, {RM_GPR|BITS64,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1503, 58, 414}, + /* 24 : ROL reg32,rm32,imm_known8 [rmi: vex.lz.f2.0f3a.w0 f0 /r ib^1f ] ND,SM0-1,OPT,NF,NF_R,BMI2,FUTURE */ + /* 270(003 003) 001(f0) 110 306 000 037 : SM0,SM1,OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {I_ROL, 3, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,IMM_KNOWN|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+10643, 62, 622}, + /* 25 : ROL reg64,rm64,imm_known8 [rmi: vex.lz.f2.0f3a.w1 f0 /r ib^3f ] SM0,ND,SM1,OPT,NF,NF_R,BMI2,FUTURE */ + /* 270(003 203) 001(f0) 110 306 000 077 : SM0,SM1,OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {I_ROL, 3, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,IMM_KNOWN|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+10653, 62, 640}, + /* 26 : ROL reg8?,rm8,unity [vm-: evex.nd1.nf.l0.m4.o8 d0 /0 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d0) 210 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 3, {REG_GPR|BITS8,RM_GPR|BITS8,UNITY|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+23710, 37, 659}, + /* 27 : ROL rm8,unity [m-: evex.nd0.nf.l0.m4.o8 d0 /0 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(d0) 200 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 2, {RM_GPR|BITS8,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+23719, 64, 659}, + /* 28 : ROL reg8?,unity [v+m-: evex.nd1.nf.l0.m4.o8 d0 /0 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d0) 200 : SM0,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 2, {REG_GPR|BITS8,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+23728, 65, 659}, + /* 29 : ROL reg16?,rm16,unity [vm-: evex.nd1.nf.l0.m4.o16 d1 /0 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d1) 210 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 3, {REG_GPR|BITS16,RM_GPR|BITS16,UNITY|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+10663, 40, 660}, + /* 30 : ROL rm16,unity [m-: evex.nd0.nf.l0.m4.o16 d1 /0 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(d1) 200 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 2, {RM_GPR|BITS16,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+10673, 66, 660}, + /* 31 : ROL reg16?,unity [v+m-: evex.nd1.nf.l0.m4.o16 d1 /0 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d1) 200 : SM0,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 2, {REG_GPR|BITS16,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+10683, 67, 660}, + /* 32 : ROL reg32?,rm32,unity [vm-: evex.nd1.nf.l0.m4.o32 d1 /0 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d1) 210 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 3, {REG_GPR|BITS32,RM_GPR|BITS32,UNITY|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+10693, 43, 661}, + /* 33 : ROL rm32,unity [m-: evex.nd0.nf.l0.m4.o32 d1 /0 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(d1) 200 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 2, {RM_GPR|BITS32,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+10703, 68, 661}, + /* 34 : ROL reg32?,unity [v+m-: evex.nd1.nf.l0.m4.o32 d1 /0 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d1) 200 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 2, {REG_GPR|BITS32,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+10713, 69, 661}, + /* 35 : ROL reg64?,rm64,unity [vm-: evex.nd1.nf.l0.m4.o64 d1 /0 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d1) 210 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 3, {REG_GPR|BITS64,RM_GPR|BITS64,UNITY|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+10723, 43, 662}, + /* 36 : ROL rm64,unity [m-: evex.nd0.nf.l0.m4.o64 d1 /0 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(d1) 200 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 2, {RM_GPR|BITS64,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+10733, 68, 662}, + /* 37 : ROL reg64?,unity [v+m-: evex.nd1.nf.l0.m4.o64 d1 /0 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d1) 200 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 2, {REG_GPR|BITS64,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+10743, 69, 662}, + /* 38 : ROL reg8?,rm8,reg_cl [vm-: evex.nd1.nf.l0.m4.o8 d2 /0 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d2) 210 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 3, {REG_GPR|BITS8,RM_GPR|BITS8,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+23737, 37, 663}, + /* 39 : ROL rm8,reg_cl [m-: evex.nd0.nf.l0.m4.o8 d2 /0 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(d2) 200 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+23746, 64, 663}, + /* 40 : ROL reg8?,reg_cl [v+m-: evex.nd1.nf.l0.m4.o8 d2 /0 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d2) 200 : SM0,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 2, {REG_GPR|BITS8,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+23755, 65, 663}, + /* 41 : ROL reg16?,rm16,reg_cl [vm-: evex.nd1.nf.l0.m4.o16 d3 /0 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d3) 210 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 3, {REG_GPR|BITS16,RM_GPR|BITS16,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+10753, 40, 664}, + /* 42 : ROL rm16,reg_cl [m-: evex.nd0.nf.l0.m4.o16 d3 /0 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(d3) 200 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+10763, 66, 664}, + /* 43 : ROL reg16?,reg_cl [v+m-: evex.nd1.nf.l0.m4.o16 d3 /0 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d3) 200 : SM0,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 2, {REG_GPR|BITS16,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+10773, 67, 664}, + /* 44 : ROL reg32?,rm32,reg_cl [vm-: evex.nd1.nf.l0.m4.o32 d3 /0 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d3) 210 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+10783, 43, 665}, + /* 45 : ROL rm32,reg_cl [m-: evex.nd0.nf.l0.m4.o32 d3 /0 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(d3) 200 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+10793, 68, 665}, + /* 46 : ROL reg32?,reg_cl [v+m-: evex.nd1.nf.l0.m4.o32 d3 /0 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d3) 200 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 2, {REG_GPR|BITS32,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+10803, 69, 665}, + /* 47 : ROL reg64?,rm64,reg_cl [vm-: evex.nd1.nf.l0.m4.o64 d3 /0 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d3) 210 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+10813, 43, 666}, + /* 48 : ROL rm64,reg_cl [m-: evex.nd0.nf.l0.m4.o64 d3 /0 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(d3) 200 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+10823, 68, 666}, + /* 49 : ROL reg64?,reg_cl [v+m-: evex.nd1.nf.l0.m4.o64 d3 /0 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d3) 200 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 2, {REG_GPR|BITS64,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+10833, 69, 666}, + /* 50 : ROL reg8?,rm8,reg_cx [vm-: evex.nd1.nf.l0.m4.o8 d2 /0 ] ND,SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d2) 210 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 3, {REG_GPR|BITS8,RM_GPR|BITS8,REG_CX,0,0}, NO_DECORATOR, nasm_bytecodes+23737, 37, 667}, + /* 51 : ROL rm8,reg_cx [m-: evex.nd0.nf.l0.m4.o8 d2 /0 ] ND,SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(d2) 200 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 2, {RM_GPR|BITS8,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+23746, 64, 667}, + /* 52 : ROL reg8?,reg_cx [v+m-: evex.nd1.nf.l0.m4.o8 d2 /0 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d2) 200 : SM0,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 2, {REG_GPR|BITS8,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+23755, 65, 667}, + /* 53 : ROL reg16?,rm16,reg_cx [vm-: evex.nd1.nf.l0.m4.o16 d3 /0 ] ND,SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d3) 210 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 3, {REG_GPR|BITS16,RM_GPR|BITS16,REG_CX,0,0}, NO_DECORATOR, nasm_bytecodes+10753, 40, 668}, + /* 54 : ROL rm16,reg_cx [m-: evex.nd0.nf.l0.m4.o16 d3 /0 ] SM0,ND,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(d3) 200 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 2, {RM_GPR|BITS16,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+10763, 66, 668}, + /* 55 : ROL reg16?,reg_cx [v+m-: evex.nd1.nf.l0.m4.o16 d3 /0 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d3) 200 : SM0,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 2, {REG_GPR|BITS16,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+10773, 67, 668}, + /* 56 : ROL reg32?,rm32,reg_cx [vm-: evex.nd1.nf.l0.m4.o32 d3 /0 ] SM0,ND,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d3) 210 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_CX,0,0}, NO_DECORATOR, nasm_bytecodes+10783, 43, 669}, + /* 57 : ROL rm32,reg_cx [m-: evex.nd0.nf.l0.m4.o32 d3 /0 ] ND,SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(d3) 200 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 2, {RM_GPR|BITS32,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+10793, 68, 669}, + /* 58 : ROL reg32?,reg_cx [v+m-: evex.nd1.nf.l0.m4.o32 d3 /0 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d3) 200 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 2, {REG_GPR|BITS32,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+10803, 69, 669}, + /* 59 : ROL reg64?,rm64,reg_cx [vm-: evex.nd1.nf.l0.m4.o64 d3 /0 ] SM0,ND,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d3) 210 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_CX,0,0}, NO_DECORATOR, nasm_bytecodes+10813, 43, 670}, + /* 60 : ROL rm64,reg_cx [m-: evex.nd0.nf.l0.m4.o64 d3 /0 ] ND,SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(d3) 200 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 2, {RM_GPR|BITS64,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+10823, 68, 670}, + /* 61 : ROL reg64?,reg_cx [v+m-: evex.nd1.nf.l0.m4.o64 d3 /0 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d3) 200 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 2, {REG_GPR|BITS64,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+10833, 69, 670}, + /* 62 : ROL reg8?,rm8,reg_ecx [vm-: evex.nd1.nf.l0.m4.o8 d2 /0 ] ND,SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d2) 210 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 3, {REG_GPR|BITS8,RM_GPR|BITS8,REG_ECX,0,0}, NO_DECORATOR, nasm_bytecodes+23737, 37, 671}, + /* 63 : ROL rm8,reg_ecx [m-: evex.nd0.nf.l0.m4.o8 d2 /0 ] ND,SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(d2) 200 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 2, {RM_GPR|BITS8,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+23746, 64, 671}, + /* 64 : ROL reg8?,reg_ecx [v+m-: evex.nd1.nf.l0.m4.o8 d2 /0 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d2) 200 : SM0,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 2, {REG_GPR|BITS8,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+23755, 65, 671}, + /* 65 : ROL reg16?,rm16,reg_ecx [vm-: evex.nd1.nf.l0.m4.o16 d3 /0 ] ND,SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d3) 210 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 3, {REG_GPR|BITS16,RM_GPR|BITS16,REG_ECX,0,0}, NO_DECORATOR, nasm_bytecodes+10753, 40, 672}, + /* 66 : ROL rm16,reg_ecx [m-: evex.nd0.nf.l0.m4.o16 d3 /0 ] ND,SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(d3) 200 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 2, {RM_GPR|BITS16,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+10763, 66, 672}, + /* 67 : ROL reg16?,reg_ecx [v+m-: evex.nd1.nf.l0.m4.o16 d3 /0 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d3) 200 : SM0,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 2, {REG_GPR|BITS16,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+10773, 67, 672}, + /* 68 : ROL reg32?,rm32,reg_ecx [vm-: evex.nd1.nf.l0.m4.o32 d3 /0 ] SM0,ND,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d3) 210 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_ECX,0,0}, NO_DECORATOR, nasm_bytecodes+10783, 43, 673}, + /* 69 : ROL rm32,reg_ecx [m-: evex.nd0.nf.l0.m4.o32 d3 /0 ] SM0,ND,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(d3) 200 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 2, {RM_GPR|BITS32,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+10793, 68, 673}, + /* 70 : ROL reg32?,reg_ecx [v+m-: evex.nd1.nf.l0.m4.o32 d3 /0 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d3) 200 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 2, {REG_GPR|BITS32,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+10803, 69, 673}, + /* 71 : ROL reg64?,rm64,reg_ecx [vm-: evex.nd1.nf.l0.m4.o64 d3 /0 ] SM0,ND,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d3) 210 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_ECX,0,0}, NO_DECORATOR, nasm_bytecodes+10813, 43, 674}, + /* 72 : ROL rm64,reg_ecx [m-: evex.nd0.nf.l0.m4.o64 d3 /0 ] ND,SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(d3) 200 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 2, {RM_GPR|BITS64,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+10823, 68, 674}, + /* 73 : ROL reg64?,reg_ecx [v+m-: evex.nd1.nf.l0.m4.o64 d3 /0 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d3) 200 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 2, {REG_GPR|BITS64,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+10833, 69, 674}, + /* 74 : ROL reg8?,rm8,reg_rcx [vm-: evex.nd1.nf.l0.m4.o8 d2 /0 ] SM0,ND,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d2) 210 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 3, {REG_GPR|BITS8,RM_GPR|BITS8,REG_RCX,0,0}, NO_DECORATOR, nasm_bytecodes+23737, 37, 675}, + /* 75 : ROL rm8,reg_rcx [m-: evex.nd0.nf.l0.m4.o8 d2 /0 ] SM0,ND,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(d2) 200 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 2, {RM_GPR|BITS8,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+23746, 64, 675}, + /* 76 : ROL reg8?,reg_rcx [v+m-: evex.nd1.nf.l0.m4.o8 d2 /0 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d2) 200 : SM0,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 2, {REG_GPR|BITS8,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+23755, 65, 675}, + /* 77 : ROL reg16?,rm16,reg_rcx [vm-: evex.nd1.nf.l0.m4.o16 d3 /0 ] SM0,ND,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d3) 210 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 3, {REG_GPR|BITS16,RM_GPR|BITS16,REG_RCX,0,0}, NO_DECORATOR, nasm_bytecodes+10753, 40, 676}, + /* 78 : ROL rm16,reg_rcx [m-: evex.nd0.nf.l0.m4.o16 d3 /0 ] SM0,ND,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(d3) 200 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 2, {RM_GPR|BITS16,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+10763, 66, 676}, + /* 79 : ROL reg16?,reg_rcx [v+m-: evex.nd1.nf.l0.m4.o16 d3 /0 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d3) 200 : SM0,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 2, {REG_GPR|BITS16,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+10773, 67, 676}, + /* 80 : ROL reg32?,rm32,reg_rcx [vm-: evex.nd1.nf.l0.m4.o32 d3 /0 ] SM0,ND,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d3) 210 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_RCX,0,0}, NO_DECORATOR, nasm_bytecodes+10783, 43, 677}, + /* 81 : ROL rm32,reg_rcx [m-: evex.nd0.nf.l0.m4.o32 d3 /0 ] SM0,ND,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(d3) 200 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 2, {RM_GPR|BITS32,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+10793, 68, 677}, + /* 82 : ROL reg32?,reg_rcx [v+m-: evex.nd1.nf.l0.m4.o32 d3 /0 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d3) 200 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 2, {REG_GPR|BITS32,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+10803, 69, 677}, + /* 83 : ROL reg64?,rm64,reg_rcx [vm-: evex.nd1.nf.l0.m4.o64 d3 /0 ] ND,SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d3) 210 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_RCX,0,0}, NO_DECORATOR, nasm_bytecodes+10813, 43, 678}, + /* 84 : ROL rm64,reg_rcx [m-: evex.nd0.nf.l0.m4.o64 d3 /0 ] SM0,ND,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(d3) 200 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 2, {RM_GPR|BITS64,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+10823, 68, 678}, + /* 85 : ROL reg64?,reg_rcx [v+m-: evex.nd1.nf.l0.m4.o64 d3 /0 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d3) 200 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 2, {REG_GPR|BITS64,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+10833, 69, 678}, + /* 86 : ROL reg8?,rm8,imm8 [vmi: evex.nd1.nf.l0.m4.o8 c0 /0 ib,u ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(c0) 210 026 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 3, {REG_GPR|BITS8,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+10843, 37, 679}, + /* 87 : ROL rm8,imm8 [mi: evex.nd0.nf.l0.m4.o8 c0 /0 ib,u ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(c0) 200 025 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 2, {RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+10853, 64, 679}, + /* 88 : ROL reg8?,imm8 [v+mi: evex.nd1.nf.l0.m4.o8 c0 /0 ib,u ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(c0) 200 025 : SM0,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 2, {REG_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+10863, 65, 679}, + /* 89 : ROL reg16?,rm16,imm8 [vmi: evex.nd1.nf.l0.m4.o16 c1 /0 ib,u ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(c1) 210 026 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 3, {REG_GPR|BITS16,RM_GPR|BITS16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+1410, 40, 680}, + /* 90 : ROL rm16,imm8 [mi: evex.nd0.nf.l0.m4.o16 c1 /0 ib,u ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(c1) 200 025 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1421, 66, 680}, + /* 91 : ROL reg16?,imm8 [v+mi: evex.nd1.nf.l0.m4.o16 c1 /0 ib,u ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(c1) 200 025 : SM0,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 2, {REG_GPR|BITS16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1432, 67, 680}, + /* 92 : ROL reg32?,rm32,imm8 [vmi: evex.nd1.nf.l0.m4.o32 c1 /0 ib,u ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(c1) 210 026 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 3, {REG_GPR|BITS32,RM_GPR|BITS32,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+1443, 43, 681}, + /* 93 : ROL rm32,imm8 [mi: evex.nd0.nf.l0.m4.o32 c1 /0 ib,u ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(c1) 200 025 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1454, 68, 681}, + /* 94 : ROL reg32?,imm8 [v+mi: evex.nd1.nf.l0.m4.o32 c1 /0 ib,u ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(c1) 200 025 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 2, {REG_GPR|BITS32,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1465, 69, 681}, + /* 95 : ROL reg64?,rm64,imm8 [vmi: evex.nd1.nf.l0.m4.o64 c1 /0 ib,u ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(c1) 210 026 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 3, {REG_GPR|BITS64,RM_GPR|BITS64,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+1476, 43, 682}, + /* 96 : ROL rm64,imm8 [mi: evex.nd0.nf.l0.m4.o64 c1 /0 ib,u ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(c1) 200 025 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 2, {RM_GPR|BITS64,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1487, 68, 682}, + /* 97 : ROL reg64?,imm8 [v+mi: evex.nd1.nf.l0.m4.o64 c1 /0 ib,u ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(c1) 200 025 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 2, {REG_GPR|BITS64,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1498, 69, 682}, + /* 98 : ROL reg32,rm32,imm_known8 [rmi: evex.lz.f2.0f3a.w0 f0 /r ib^1f ] ND,SM0-1,OPT,NF,NF_R,LONG,PROT,BMI2,APX,X86_64 */ + /* 250(f3 7f 08) 300 001(f0) 110 306 000 037 : SM0,SM1,OPT,NF,NF_R,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_ROL, 3, {REG_GPR|BITS32,RM_GPR|BITS32,IMM_KNOWN|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+0, 72, 888}, + /* 99 : ROL reg64,rm64,imm_known8 [rmi: evex.lz.f2.0f3a.w1 f0 /r ib^3f ] ND,SM0-1,OPT,NF,NF_R,LONG,PROT,BMI2,APX,X86_64 */ + /* 250(f3 ff 08) 300 001(f0) 110 306 000 077 : SM0,SM1,OPT,NF,NF_R,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_ROL, 3, {REG_GPR|BITS64,RM_GPR|BITS64,IMM_KNOWN|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+12, 72, 906}, +}; + +static const struct itemplate instrux_ROR[100] = { + /* 0 : ROR rm8,unity [m-: o8 d0 /1 ] FL,8086 */ + /* 001(d0) 201 : FL,8086 */ + {I_ROR, 2, {RM_GPR|BITS8,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+23787, 56, 415}, + /* 1 : ROR rm16,unity [m-: o16 d1 /1 ] FL,8086 */ + /* 320 001(d1) 201 : FL,8086 */ + {I_ROR, 2, {RM_GPR|BITS16,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+10898, 56, 416}, + /* 2 : ROR rm32,unity [m-: o32 d1 /1 ] FL,386 */ + /* 321 001(d1) 201 : FL,386 */ + {I_ROR, 2, {RM_GPR|BITS32,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+10928, 57, 417}, + /* 3 : ROR rm64,unity [m-: o64 d1 /1 ] LONG,FL,PROT,X86_64 */ + /* 324 001(d1) 201 : LONG,FL,PROT,X86_64 */ + {I_ROR, 2, {RM_GPR|BITS64,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+10958, 58, 418}, + /* 4 : ROR rm8,reg_cl [m-: o8 d2 /1 ] FL,8086 */ + /* 001(d2) 201 : FL,8086 */ + {I_ROR, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+23814, 56, 419}, + /* 5 : ROR rm16,reg_cl [m-: o16 d3 /1 ] FL,8086 */ + /* 320 001(d3) 201 : FL,8086 */ + {I_ROR, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+10988, 56, 420}, + /* 6 : ROR rm32,reg_cl [m-: o32 d3 /1 ] FL,386 */ + /* 321 001(d3) 201 : FL,386 */ + {I_ROR, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11018, 57, 421}, + /* 7 : ROR rm64,reg_cl [m-: o64 d3 /1 ] LONG,FL,PROT,X86_64 */ + /* 324 001(d3) 201 : LONG,FL,PROT,X86_64 */ + {I_ROR, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11048, 58, 422}, + /* 8 : ROR rm8,reg_cx [m-: o8 d2 /1 ] ND,FL,8086 */ + /* 001(d2) 201 : FL,8086 */ + {I_ROR, 2, {RM_GPR|BITS8,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+23814, 56, 423}, + /* 9 : ROR rm16,reg_cx [m-: o16 d3 /1 ] ND,FL,8086 */ + /* 320 001(d3) 201 : FL,8086 */ + {I_ROR, 2, {RM_GPR|BITS16,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+10988, 56, 424}, + /* 10 : ROR rm32,reg_cx [m-: o32 d3 /1 ] ND,FL,386 */ + /* 321 001(d3) 201 : FL,386 */ + {I_ROR, 2, {RM_GPR|BITS32,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11018, 57, 425}, + /* 11 : ROR rm64,reg_cx [m-: o64 d3 /1 ] ND,LONG,FL,PROT,X86_64 */ + /* 324 001(d3) 201 : LONG,FL,PROT,X86_64 */ + {I_ROR, 2, {RM_GPR|BITS64,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11048, 58, 426}, + /* 12 : ROR rm8,reg_ecx [m-: o8 d2 /1 ] ND,FL,8086 */ + /* 001(d2) 201 : FL,8086 */ + {I_ROR, 2, {RM_GPR|BITS8,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+23814, 56, 427}, + /* 13 : ROR rm16,reg_ecx [m-: o16 d3 /1 ] ND,FL,8086 */ + /* 320 001(d3) 201 : FL,8086 */ + {I_ROR, 2, {RM_GPR|BITS16,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+10988, 56, 428}, + /* 14 : ROR rm32,reg_ecx [m-: o32 d3 /1 ] ND,FL,386 */ + /* 321 001(d3) 201 : FL,386 */ + {I_ROR, 2, {RM_GPR|BITS32,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11018, 57, 429}, + /* 15 : ROR rm64,reg_ecx [m-: o64 d3 /1 ] ND,LONG,FL,PROT,X86_64 */ + /* 324 001(d3) 201 : LONG,FL,PROT,X86_64 */ + {I_ROR, 2, {RM_GPR|BITS64,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11048, 58, 430}, + /* 16 : ROR rm8,reg_rcx [m-: o8 d2 /1 ] ND,FL,8086 */ + /* 001(d2) 201 : FL,8086 */ + {I_ROR, 2, {RM_GPR|BITS8,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+23814, 56, 431}, + /* 17 : ROR rm16,reg_rcx [m-: o16 d3 /1 ] ND,FL,8086 */ + /* 320 001(d3) 201 : FL,8086 */ + {I_ROR, 2, {RM_GPR|BITS16,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+10988, 56, 432}, + /* 18 : ROR rm32,reg_rcx [m-: o32 d3 /1 ] ND,FL,386 */ + /* 321 001(d3) 201 : FL,386 */ + {I_ROR, 2, {RM_GPR|BITS32,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11018, 57, 433}, + /* 19 : ROR rm64,reg_rcx [m-: o64 d3 /1 ] ND,LONG,FL,PROT,X86_64 */ + /* 324 001(d3) 201 : LONG,FL,PROT,X86_64 */ + {I_ROR, 2, {RM_GPR|BITS64,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11048, 58, 434}, + /* 20 : ROR rm8,imm8 [mi: o8 c0 /1 ib,u ] FL,186 */ + /* 001(c0) 201 025 : FL,186 */ + {I_ROR, 2, {RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+11078, 59, 435}, + /* 21 : ROR rm16,imm8 [mi: o16 c1 /1 ib,u ] FL,186 */ + /* 320 001(c1) 201 025 : FL,186 */ + {I_ROR, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1536, 59, 436}, + /* 22 : ROR rm32,imm8 [mi: o32 c1 /1 ib,u ] FL,386 */ + /* 321 001(c1) 201 025 : FL,386 */ + {I_ROR, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1569, 57, 437}, + /* 23 : ROR rm64,imm8 [mi: o64 c1 /1 ib,u ] LONG,FL,PROT,X86_64 */ + /* 324 001(c1) 201 025 : LONG,FL,PROT,X86_64 */ + {I_ROR, 2, {RM_GPR|BITS64,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1602, 58, 438}, + /* 24 : ROR reg32,rm32,imm8 [rmi: vex.lz.f2.0f3a.w0 f0 /r ib ] SM0,ND,SM1,OPT,NF,NF_R,BMI2,FUTURE */ + /* 270(003 003) 001(f0) 110 022 : SM0,SM1,OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {I_ROR, 3, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+51259, 62, 621}, + /* 25 : ROR reg64,rm64,imm8 [rmi: vex.lz.f2.0f3a.w1 f0 /r ib ] SM0,ND,SM1,OPT,NF,NF_R,BMI2,FUTURE */ + /* 270(003 203) 001(f0) 110 022 : SM0,SM1,OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {I_ROR, 3, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+51267, 62, 639}, + /* 26 : ROR reg8?,rm8,unity [vm-: evex.nd1.nf.l0.m4.o8 d0 /1 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d0) 211 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 3, {REG_GPR|BITS8,RM_GPR|BITS8,UNITY|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+23764, 37, 683}, + /* 27 : ROR rm8,unity [m-: evex.nd0.nf.l0.m4.o8 d0 /1 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(d0) 201 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 2, {RM_GPR|BITS8,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+23773, 64, 683}, + /* 28 : ROR reg8?,unity [v+m-: evex.nd1.nf.l0.m4.o8 d0 /1 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d0) 201 : SM0,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 2, {REG_GPR|BITS8,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+23782, 65, 683}, + /* 29 : ROR reg16?,rm16,unity [vm-: evex.nd1.nf.l0.m4.o16 d1 /1 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d1) 211 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 3, {REG_GPR|BITS16,RM_GPR|BITS16,UNITY|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+10873, 40, 684}, + /* 30 : ROR rm16,unity [m-: evex.nd0.nf.l0.m4.o16 d1 /1 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(d1) 201 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 2, {RM_GPR|BITS16,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+10883, 66, 684}, + /* 31 : ROR reg16?,unity [v+m-: evex.nd1.nf.l0.m4.o16 d1 /1 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d1) 201 : SM0,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 2, {REG_GPR|BITS16,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+10893, 67, 684}, + /* 32 : ROR reg32?,rm32,unity [vm-: evex.nd1.nf.l0.m4.o32 d1 /1 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d1) 211 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 3, {REG_GPR|BITS32,RM_GPR|BITS32,UNITY|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+10903, 43, 685}, + /* 33 : ROR rm32,unity [m-: evex.nd0.nf.l0.m4.o32 d1 /1 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(d1) 201 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 2, {RM_GPR|BITS32,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+10913, 68, 685}, + /* 34 : ROR reg32?,unity [v+m-: evex.nd1.nf.l0.m4.o32 d1 /1 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d1) 201 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 2, {REG_GPR|BITS32,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+10923, 69, 685}, + /* 35 : ROR reg64?,rm64,unity [vm-: evex.nd1.nf.l0.m4.o64 d1 /1 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d1) 211 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 3, {REG_GPR|BITS64,RM_GPR|BITS64,UNITY|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+10933, 43, 686}, + /* 36 : ROR rm64,unity [m-: evex.nd0.nf.l0.m4.o64 d1 /1 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(d1) 201 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 2, {RM_GPR|BITS64,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+10943, 68, 686}, + /* 37 : ROR reg64?,unity [v+m-: evex.nd1.nf.l0.m4.o64 d1 /1 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d1) 201 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 2, {REG_GPR|BITS64,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+10953, 69, 686}, + /* 38 : ROR reg8?,rm8,reg_cl [vm-: evex.nd1.nf.l0.m4.o8 d2 /1 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d2) 211 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 3, {REG_GPR|BITS8,RM_GPR|BITS8,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+23791, 37, 687}, + /* 39 : ROR rm8,reg_cl [m-: evex.nd0.nf.l0.m4.o8 d2 /1 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(d2) 201 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+23800, 64, 687}, + /* 40 : ROR reg8?,reg_cl [v+m-: evex.nd1.nf.l0.m4.o8 d2 /1 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d2) 201 : SM0,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 2, {REG_GPR|BITS8,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+23809, 65, 687}, + /* 41 : ROR reg16?,rm16,reg_cl [vm-: evex.nd1.nf.l0.m4.o16 d3 /1 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d3) 211 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 3, {REG_GPR|BITS16,RM_GPR|BITS16,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+10963, 40, 688}, + /* 42 : ROR rm16,reg_cl [m-: evex.nd0.nf.l0.m4.o16 d3 /1 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(d3) 201 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+10973, 66, 688}, + /* 43 : ROR reg16?,reg_cl [v+m-: evex.nd1.nf.l0.m4.o16 d3 /1 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d3) 201 : SM0,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 2, {REG_GPR|BITS16,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+10983, 67, 688}, + /* 44 : ROR reg32?,rm32,reg_cl [vm-: evex.nd1.nf.l0.m4.o32 d3 /1 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d3) 211 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+10993, 43, 689}, + /* 45 : ROR rm32,reg_cl [m-: evex.nd0.nf.l0.m4.o32 d3 /1 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(d3) 201 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11003, 68, 689}, + /* 46 : ROR reg32?,reg_cl [v+m-: evex.nd1.nf.l0.m4.o32 d3 /1 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d3) 201 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 2, {REG_GPR|BITS32,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11013, 69, 689}, + /* 47 : ROR reg64?,rm64,reg_cl [vm-: evex.nd1.nf.l0.m4.o64 d3 /1 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d3) 211 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+11023, 43, 690}, + /* 48 : ROR rm64,reg_cl [m-: evex.nd0.nf.l0.m4.o64 d3 /1 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(d3) 201 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11033, 68, 690}, + /* 49 : ROR reg64?,reg_cl [v+m-: evex.nd1.nf.l0.m4.o64 d3 /1 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d3) 201 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 2, {REG_GPR|BITS64,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11043, 69, 690}, + /* 50 : ROR reg8?,rm8,reg_cx [vm-: evex.nd1.nf.l0.m4.o8 d2 /1 ] ND,SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d2) 211 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 3, {REG_GPR|BITS8,RM_GPR|BITS8,REG_CX,0,0}, NO_DECORATOR, nasm_bytecodes+23791, 37, 691}, + /* 51 : ROR rm8,reg_cx [m-: evex.nd0.nf.l0.m4.o8 d2 /1 ] ND,SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(d2) 201 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 2, {RM_GPR|BITS8,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+23800, 64, 691}, + /* 52 : ROR reg8?,reg_cx [v+m-: evex.nd1.nf.l0.m4.o8 d2 /1 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d2) 201 : SM0,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 2, {REG_GPR|BITS8,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+23809, 65, 691}, + /* 53 : ROR reg16?,rm16,reg_cx [vm-: evex.nd1.nf.l0.m4.o16 d3 /1 ] ND,SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d3) 211 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 3, {REG_GPR|BITS16,RM_GPR|BITS16,REG_CX,0,0}, NO_DECORATOR, nasm_bytecodes+10963, 40, 692}, + /* 54 : ROR rm16,reg_cx [m-: evex.nd0.nf.l0.m4.o16 d3 /1 ] SM0,ND,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(d3) 201 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 2, {RM_GPR|BITS16,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+10973, 66, 692}, + /* 55 : ROR reg16?,reg_cx [v+m-: evex.nd1.nf.l0.m4.o16 d3 /1 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d3) 201 : SM0,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 2, {REG_GPR|BITS16,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+10983, 67, 692}, + /* 56 : ROR reg32?,rm32,reg_cx [vm-: evex.nd1.nf.l0.m4.o32 d3 /1 ] ND,SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d3) 211 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_CX,0,0}, NO_DECORATOR, nasm_bytecodes+10993, 43, 693}, + /* 57 : ROR rm32,reg_cx [m-: evex.nd0.nf.l0.m4.o32 d3 /1 ] SM0,ND,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(d3) 201 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 2, {RM_GPR|BITS32,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11003, 68, 693}, + /* 58 : ROR reg32?,reg_cx [v+m-: evex.nd1.nf.l0.m4.o32 d3 /1 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d3) 201 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 2, {REG_GPR|BITS32,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11013, 69, 693}, + /* 59 : ROR reg64?,rm64,reg_cx [vm-: evex.nd1.nf.l0.m4.o64 d3 /1 ] SM0,ND,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d3) 211 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_CX,0,0}, NO_DECORATOR, nasm_bytecodes+11023, 43, 694}, + /* 60 : ROR rm64,reg_cx [m-: evex.nd0.nf.l0.m4.o64 d3 /1 ] SM0,ND,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(d3) 201 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 2, {RM_GPR|BITS64,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11033, 68, 694}, + /* 61 : ROR reg64?,reg_cx [v+m-: evex.nd1.nf.l0.m4.o64 d3 /1 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d3) 201 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 2, {REG_GPR|BITS64,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11043, 69, 694}, + /* 62 : ROR reg8?,rm8,reg_ecx [vm-: evex.nd1.nf.l0.m4.o8 d2 /1 ] ND,SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d2) 211 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 3, {REG_GPR|BITS8,RM_GPR|BITS8,REG_ECX,0,0}, NO_DECORATOR, nasm_bytecodes+23791, 37, 695}, + /* 63 : ROR rm8,reg_ecx [m-: evex.nd0.nf.l0.m4.o8 d2 /1 ] SM0,ND,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(d2) 201 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 2, {RM_GPR|BITS8,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+23800, 64, 695}, + /* 64 : ROR reg8?,reg_ecx [v+m-: evex.nd1.nf.l0.m4.o8 d2 /1 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d2) 201 : SM0,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 2, {REG_GPR|BITS8,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+23809, 65, 695}, + /* 65 : ROR reg16?,rm16,reg_ecx [vm-: evex.nd1.nf.l0.m4.o16 d3 /1 ] SM0,ND,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d3) 211 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 3, {REG_GPR|BITS16,RM_GPR|BITS16,REG_ECX,0,0}, NO_DECORATOR, nasm_bytecodes+10963, 40, 696}, + /* 66 : ROR rm16,reg_ecx [m-: evex.nd0.nf.l0.m4.o16 d3 /1 ] SM0,ND,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(d3) 201 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 2, {RM_GPR|BITS16,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+10973, 66, 696}, + /* 67 : ROR reg16?,reg_ecx [v+m-: evex.nd1.nf.l0.m4.o16 d3 /1 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d3) 201 : SM0,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 2, {REG_GPR|BITS16,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+10983, 67, 696}, + /* 68 : ROR reg32?,rm32,reg_ecx [vm-: evex.nd1.nf.l0.m4.o32 d3 /1 ] ND,SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d3) 211 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_ECX,0,0}, NO_DECORATOR, nasm_bytecodes+10993, 43, 697}, + /* 69 : ROR rm32,reg_ecx [m-: evex.nd0.nf.l0.m4.o32 d3 /1 ] SM0,ND,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(d3) 201 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 2, {RM_GPR|BITS32,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11003, 68, 697}, + /* 70 : ROR reg32?,reg_ecx [v+m-: evex.nd1.nf.l0.m4.o32 d3 /1 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d3) 201 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 2, {REG_GPR|BITS32,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11013, 69, 697}, + /* 71 : ROR reg64?,rm64,reg_ecx [vm-: evex.nd1.nf.l0.m4.o64 d3 /1 ] SM0,ND,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d3) 211 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_ECX,0,0}, NO_DECORATOR, nasm_bytecodes+11023, 43, 698}, + /* 72 : ROR rm64,reg_ecx [m-: evex.nd0.nf.l0.m4.o64 d3 /1 ] ND,SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(d3) 201 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 2, {RM_GPR|BITS64,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11033, 68, 698}, + /* 73 : ROR reg64?,reg_ecx [v+m-: evex.nd1.nf.l0.m4.o64 d3 /1 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d3) 201 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 2, {REG_GPR|BITS64,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11043, 69, 698}, + /* 74 : ROR reg8?,rm8,reg_rcx [vm-: evex.nd1.nf.l0.m4.o8 d2 /1 ] SM0,ND,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d2) 211 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 3, {REG_GPR|BITS8,RM_GPR|BITS8,REG_RCX,0,0}, NO_DECORATOR, nasm_bytecodes+23791, 37, 699}, + /* 75 : ROR rm8,reg_rcx [m-: evex.nd0.nf.l0.m4.o8 d2 /1 ] ND,SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(d2) 201 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 2, {RM_GPR|BITS8,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+23800, 64, 699}, + /* 76 : ROR reg8?,reg_rcx [v+m-: evex.nd1.nf.l0.m4.o8 d2 /1 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d2) 201 : SM0,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 2, {REG_GPR|BITS8,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+23809, 65, 699}, + /* 77 : ROR reg16?,rm16,reg_rcx [vm-: evex.nd1.nf.l0.m4.o16 d3 /1 ] SM0,ND,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d3) 211 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 3, {REG_GPR|BITS16,RM_GPR|BITS16,REG_RCX,0,0}, NO_DECORATOR, nasm_bytecodes+10963, 40, 700}, + /* 78 : ROR rm16,reg_rcx [m-: evex.nd0.nf.l0.m4.o16 d3 /1 ] ND,SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(d3) 201 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 2, {RM_GPR|BITS16,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+10973, 66, 700}, + /* 79 : ROR reg16?,reg_rcx [v+m-: evex.nd1.nf.l0.m4.o16 d3 /1 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d3) 201 : SM0,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 2, {REG_GPR|BITS16,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+10983, 67, 700}, + /* 80 : ROR reg32?,rm32,reg_rcx [vm-: evex.nd1.nf.l0.m4.o32 d3 /1 ] SM0,ND,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d3) 211 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_RCX,0,0}, NO_DECORATOR, nasm_bytecodes+10993, 43, 701}, + /* 81 : ROR rm32,reg_rcx [m-: evex.nd0.nf.l0.m4.o32 d3 /1 ] SM0,ND,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(d3) 201 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 2, {RM_GPR|BITS32,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11003, 68, 701}, + /* 82 : ROR reg32?,reg_rcx [v+m-: evex.nd1.nf.l0.m4.o32 d3 /1 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d3) 201 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 2, {REG_GPR|BITS32,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11013, 69, 701}, + /* 83 : ROR reg64?,rm64,reg_rcx [vm-: evex.nd1.nf.l0.m4.o64 d3 /1 ] ND,SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d3) 211 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_RCX,0,0}, NO_DECORATOR, nasm_bytecodes+11023, 43, 702}, + /* 84 : ROR rm64,reg_rcx [m-: evex.nd0.nf.l0.m4.o64 d3 /1 ] SM0,ND,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(d3) 201 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 2, {RM_GPR|BITS64,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11033, 68, 702}, + /* 85 : ROR reg64?,reg_rcx [v+m-: evex.nd1.nf.l0.m4.o64 d3 /1 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d3) 201 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 2, {REG_GPR|BITS64,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11043, 69, 702}, + /* 86 : ROR reg8?,rm8,imm8 [vmi: evex.nd1.nf.l0.m4.o8 c0 /1 ib,u ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(c0) 211 026 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 3, {REG_GPR|BITS8,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+11053, 37, 703}, + /* 87 : ROR rm8,imm8 [mi: evex.nd0.nf.l0.m4.o8 c0 /1 ib,u ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(c0) 201 025 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 2, {RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+11063, 64, 703}, + /* 88 : ROR reg8?,imm8 [v+mi: evex.nd1.nf.l0.m4.o8 c0 /1 ib,u ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(c0) 201 025 : SM0,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 2, {REG_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+11073, 65, 703}, + /* 89 : ROR reg16?,rm16,imm8 [vmi: evex.nd1.nf.l0.m4.o16 c1 /1 ib,u ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(c1) 211 026 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 3, {REG_GPR|BITS16,RM_GPR|BITS16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+1509, 40, 704}, + /* 90 : ROR rm16,imm8 [mi: evex.nd0.nf.l0.m4.o16 c1 /1 ib,u ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(c1) 201 025 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1520, 66, 704}, + /* 91 : ROR reg16?,imm8 [v+mi: evex.nd1.nf.l0.m4.o16 c1 /1 ib,u ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(c1) 201 025 : SM0,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 2, {REG_GPR|BITS16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1531, 67, 704}, + /* 92 : ROR reg32?,rm32,imm8 [vmi: evex.nd1.nf.l0.m4.o32 c1 /1 ib,u ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(c1) 211 026 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 3, {REG_GPR|BITS32,RM_GPR|BITS32,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+1542, 43, 705}, + /* 93 : ROR rm32,imm8 [mi: evex.nd0.nf.l0.m4.o32 c1 /1 ib,u ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(c1) 201 025 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1553, 68, 705}, + /* 94 : ROR reg32?,imm8 [v+mi: evex.nd1.nf.l0.m4.o32 c1 /1 ib,u ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(c1) 201 025 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 2, {REG_GPR|BITS32,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1564, 69, 705}, + /* 95 : ROR reg64?,rm64,imm8 [vmi: evex.nd1.nf.l0.m4.o64 c1 /1 ib,u ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(c1) 211 026 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 3, {REG_GPR|BITS64,RM_GPR|BITS64,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+1575, 43, 706}, + /* 96 : ROR rm64,imm8 [mi: evex.nd0.nf.l0.m4.o64 c1 /1 ib,u ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(c1) 201 025 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 2, {RM_GPR|BITS64,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1586, 68, 706}, + /* 97 : ROR reg64?,imm8 [v+mi: evex.nd1.nf.l0.m4.o64 c1 /1 ib,u ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(c1) 201 025 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 2, {REG_GPR|BITS64,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1597, 69, 706}, + /* 98 : ROR reg32,rm32,imm8 [rmi: evex.lz.f2.0f3a.w0 f0 /r ib ] SM0,ND,SM1,OPT,NF,NF_R,LONG,PROT,BMI2,APX,X86_64 */ + /* 250(f3 7f 08) 300 001(f0) 110 022 : SM0,SM1,OPT,NF,NF_R,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_ROR, 3, {REG_GPR|BITS32,RM_GPR|BITS32,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+12133, 72, 887}, + /* 99 : ROR reg64,rm64,imm8 [rmi: evex.lz.f2.0f3a.w1 f0 /r ib ] ND,SM0-1,OPT,NF,NF_R,LONG,PROT,BMI2,APX,X86_64 */ + /* 250(f3 ff 08) 300 001(f0) 110 022 : SM0,SM1,OPT,NF,NF_R,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_ROR, 3, {REG_GPR|BITS64,RM_GPR|BITS64,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+12143, 72, 905}, +}; + +static const struct itemplate instrux_RCL[96] = { + /* 0 : RCL rm8,unity [m-: o8 d0 /2 ] FL,8086 */ + /* 001(d0) 202 : FL,8086 */ + {I_RCL, 2, {RM_GPR|BITS8,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+23841, 56, 439}, + /* 1 : RCL rm16,unity [m-: o16 d1 /2 ] FL,8086 */ + /* 320 001(d1) 202 : FL,8086 */ + {I_RCL, 2, {RM_GPR|BITS16,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11108, 56, 440}, + /* 2 : RCL rm32,unity [m-: o32 d1 /2 ] FL,386 */ + /* 321 001(d1) 202 : FL,386 */ + {I_RCL, 2, {RM_GPR|BITS32,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11138, 57, 441}, + /* 3 : RCL rm64,unity [m-: o64 d1 /2 ] LONG,FL,PROT,X86_64 */ + /* 324 001(d1) 202 : LONG,FL,PROT,X86_64 */ + {I_RCL, 2, {RM_GPR|BITS64,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11168, 58, 442}, + /* 4 : RCL rm8,reg_cl [m-: o8 d2 /2 ] FL,8086 */ + /* 001(d2) 202 : FL,8086 */ + {I_RCL, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+23868, 56, 443}, + /* 5 : RCL rm16,reg_cl [m-: o16 d3 /2 ] FL,8086 */ + /* 320 001(d3) 202 : FL,8086 */ + {I_RCL, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11198, 56, 444}, + /* 6 : RCL rm32,reg_cl [m-: o32 d3 /2 ] FL,386 */ + /* 321 001(d3) 202 : FL,386 */ + {I_RCL, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11228, 57, 445}, + /* 7 : RCL rm64,reg_cl [m-: o64 d3 /2 ] LONG,FL,PROT,X86_64 */ + /* 324 001(d3) 202 : LONG,FL,PROT,X86_64 */ + {I_RCL, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11258, 58, 446}, + /* 8 : RCL rm8,reg_cx [m-: o8 d2 /2 ] ND,FL,8086 */ + /* 001(d2) 202 : FL,8086 */ + {I_RCL, 2, {RM_GPR|BITS8,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+23868, 56, 447}, + /* 9 : RCL rm16,reg_cx [m-: o16 d3 /2 ] ND,FL,8086 */ + /* 320 001(d3) 202 : FL,8086 */ + {I_RCL, 2, {RM_GPR|BITS16,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11198, 56, 448}, + /* 10 : RCL rm32,reg_cx [m-: o32 d3 /2 ] ND,FL,386 */ + /* 321 001(d3) 202 : FL,386 */ + {I_RCL, 2, {RM_GPR|BITS32,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11228, 57, 449}, + /* 11 : RCL rm64,reg_cx [m-: o64 d3 /2 ] ND,LONG,FL,PROT,X86_64 */ + /* 324 001(d3) 202 : LONG,FL,PROT,X86_64 */ + {I_RCL, 2, {RM_GPR|BITS64,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11258, 58, 450}, + /* 12 : RCL rm8,reg_ecx [m-: o8 d2 /2 ] ND,FL,8086 */ + /* 001(d2) 202 : FL,8086 */ + {I_RCL, 2, {RM_GPR|BITS8,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+23868, 56, 451}, + /* 13 : RCL rm16,reg_ecx [m-: o16 d3 /2 ] ND,FL,8086 */ + /* 320 001(d3) 202 : FL,8086 */ + {I_RCL, 2, {RM_GPR|BITS16,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11198, 56, 452}, + /* 14 : RCL rm32,reg_ecx [m-: o32 d3 /2 ] ND,FL,386 */ + /* 321 001(d3) 202 : FL,386 */ + {I_RCL, 2, {RM_GPR|BITS32,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11228, 57, 453}, + /* 15 : RCL rm64,reg_ecx [m-: o64 d3 /2 ] ND,LONG,FL,PROT,X86_64 */ + /* 324 001(d3) 202 : LONG,FL,PROT,X86_64 */ + {I_RCL, 2, {RM_GPR|BITS64,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11258, 58, 454}, + /* 16 : RCL rm8,reg_rcx [m-: o8 d2 /2 ] ND,FL,8086 */ + /* 001(d2) 202 : FL,8086 */ + {I_RCL, 2, {RM_GPR|BITS8,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+23868, 56, 455}, + /* 17 : RCL rm16,reg_rcx [m-: o16 d3 /2 ] ND,FL,8086 */ + /* 320 001(d3) 202 : FL,8086 */ + {I_RCL, 2, {RM_GPR|BITS16,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11198, 56, 456}, + /* 18 : RCL rm32,reg_rcx [m-: o32 d3 /2 ] ND,FL,386 */ + /* 321 001(d3) 202 : FL,386 */ + {I_RCL, 2, {RM_GPR|BITS32,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11228, 57, 457}, + /* 19 : RCL rm64,reg_rcx [m-: o64 d3 /2 ] ND,LONG,FL,PROT,X86_64 */ + /* 324 001(d3) 202 : LONG,FL,PROT,X86_64 */ + {I_RCL, 2, {RM_GPR|BITS64,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11258, 58, 458}, + /* 20 : RCL rm8,imm8 [mi: o8 c0 /2 ib,u ] FL,186 */ + /* 001(c0) 202 025 : FL,186 */ + {I_RCL, 2, {RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+11288, 59, 459}, + /* 21 : RCL rm16,imm8 [mi: o16 c1 /2 ib,u ] FL,186 */ + /* 320 001(c1) 202 025 : FL,186 */ + {I_RCL, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1635, 59, 460}, + /* 22 : RCL rm32,imm8 [mi: o32 c1 /2 ib,u ] FL,386 */ + /* 321 001(c1) 202 025 : FL,386 */ + {I_RCL, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1668, 57, 461}, + /* 23 : RCL rm64,imm8 [mi: o64 c1 /2 ib,u ] LONG,FL,PROT,X86_64 */ + /* 324 001(c1) 202 025 : LONG,FL,PROT,X86_64 */ + {I_RCL, 2, {RM_GPR|BITS64,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1701, 58, 462}, + /* 24 : RCL reg8?,rm8,unity [vm-: evex.nd1.nf.l0.m4.o8 d0 /2 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d0) 212 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 3, {REG_GPR|BITS8,RM_GPR|BITS8,UNITY|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+23818, 37, 707}, + /* 25 : RCL rm8,unity [m-: evex.nd0.nf.l0.m4.o8 d0 /2 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(d0) 202 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 2, {RM_GPR|BITS8,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+23827, 64, 707}, + /* 26 : RCL reg8?,unity [v+m-: evex.nd1.nf.l0.m4.o8 d0 /2 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d0) 202 : SM0,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 2, {REG_GPR|BITS8,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+23836, 65, 707}, + /* 27 : RCL reg16?,rm16,unity [vm-: evex.nd1.nf.l0.m4.o16 d1 /2 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d1) 212 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 3, {REG_GPR|BITS16,RM_GPR|BITS16,UNITY|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+11083, 40, 708}, + /* 28 : RCL rm16,unity [m-: evex.nd0.nf.l0.m4.o16 d1 /2 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(d1) 202 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 2, {RM_GPR|BITS16,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11093, 66, 708}, + /* 29 : RCL reg16?,unity [v+m-: evex.nd1.nf.l0.m4.o16 d1 /2 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d1) 202 : SM0,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 2, {REG_GPR|BITS16,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11103, 67, 708}, + /* 30 : RCL reg32?,rm32,unity [vm-: evex.nd1.nf.l0.m4.o32 d1 /2 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d1) 212 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 3, {REG_GPR|BITS32,RM_GPR|BITS32,UNITY|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+11113, 43, 709}, + /* 31 : RCL rm32,unity [m-: evex.nd0.nf.l0.m4.o32 d1 /2 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(d1) 202 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 2, {RM_GPR|BITS32,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11123, 68, 709}, + /* 32 : RCL reg32?,unity [v+m-: evex.nd1.nf.l0.m4.o32 d1 /2 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d1) 202 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 2, {REG_GPR|BITS32,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11133, 69, 709}, + /* 33 : RCL reg64?,rm64,unity [vm-: evex.nd1.nf.l0.m4.o64 d1 /2 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d1) 212 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 3, {REG_GPR|BITS64,RM_GPR|BITS64,UNITY|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+11143, 43, 710}, + /* 34 : RCL rm64,unity [m-: evex.nd0.nf.l0.m4.o64 d1 /2 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(d1) 202 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 2, {RM_GPR|BITS64,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11153, 68, 710}, + /* 35 : RCL reg64?,unity [v+m-: evex.nd1.nf.l0.m4.o64 d1 /2 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d1) 202 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 2, {REG_GPR|BITS64,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11163, 69, 710}, + /* 36 : RCL reg8?,rm8,reg_cl [vm-: evex.nd1.nf.l0.m4.o8 d2 /2 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d2) 212 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 3, {REG_GPR|BITS8,RM_GPR|BITS8,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+23845, 37, 711}, + /* 37 : RCL rm8,reg_cl [m-: evex.nd0.nf.l0.m4.o8 d2 /2 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(d2) 202 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+23854, 64, 711}, + /* 38 : RCL reg8?,reg_cl [v+m-: evex.nd1.nf.l0.m4.o8 d2 /2 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d2) 202 : SM0,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 2, {REG_GPR|BITS8,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+23863, 65, 711}, + /* 39 : RCL reg16?,rm16,reg_cl [vm-: evex.nd1.nf.l0.m4.o16 d3 /2 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d3) 212 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 3, {REG_GPR|BITS16,RM_GPR|BITS16,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+11173, 40, 712}, + /* 40 : RCL rm16,reg_cl [m-: evex.nd0.nf.l0.m4.o16 d3 /2 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(d3) 202 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11183, 66, 712}, + /* 41 : RCL reg16?,reg_cl [v+m-: evex.nd1.nf.l0.m4.o16 d3 /2 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d3) 202 : SM0,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 2, {REG_GPR|BITS16,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11193, 67, 712}, + /* 42 : RCL reg32?,rm32,reg_cl [vm-: evex.nd1.nf.l0.m4.o32 d3 /2 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d3) 212 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+11203, 43, 713}, + /* 43 : RCL rm32,reg_cl [m-: evex.nd0.nf.l0.m4.o32 d3 /2 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(d3) 202 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11213, 68, 713}, + /* 44 : RCL reg32?,reg_cl [v+m-: evex.nd1.nf.l0.m4.o32 d3 /2 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d3) 202 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 2, {REG_GPR|BITS32,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11223, 69, 713}, + /* 45 : RCL reg64?,rm64,reg_cl [vm-: evex.nd1.nf.l0.m4.o64 d3 /2 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d3) 212 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+11233, 43, 714}, + /* 46 : RCL rm64,reg_cl [m-: evex.nd0.nf.l0.m4.o64 d3 /2 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(d3) 202 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11243, 68, 714}, + /* 47 : RCL reg64?,reg_cl [v+m-: evex.nd1.nf.l0.m4.o64 d3 /2 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d3) 202 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 2, {REG_GPR|BITS64,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11253, 69, 714}, + /* 48 : RCL reg8?,rm8,reg_cx [vm-: evex.nd1.nf.l0.m4.o8 d2 /2 ] SM0,ND,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d2) 212 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 3, {REG_GPR|BITS8,RM_GPR|BITS8,REG_CX,0,0}, NO_DECORATOR, nasm_bytecodes+23845, 37, 715}, + /* 49 : RCL rm8,reg_cx [m-: evex.nd0.nf.l0.m4.o8 d2 /2 ] SM0,ND,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(d2) 202 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 2, {RM_GPR|BITS8,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+23854, 64, 715}, + /* 50 : RCL reg8?,reg_cx [v+m-: evex.nd1.nf.l0.m4.o8 d2 /2 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d2) 202 : SM0,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 2, {REG_GPR|BITS8,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+23863, 65, 715}, + /* 51 : RCL reg16?,rm16,reg_cx [vm-: evex.nd1.nf.l0.m4.o16 d3 /2 ] ND,SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d3) 212 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 3, {REG_GPR|BITS16,RM_GPR|BITS16,REG_CX,0,0}, NO_DECORATOR, nasm_bytecodes+11173, 40, 716}, + /* 52 : RCL rm16,reg_cx [m-: evex.nd0.nf.l0.m4.o16 d3 /2 ] SM0,ND,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(d3) 202 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 2, {RM_GPR|BITS16,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11183, 66, 716}, + /* 53 : RCL reg16?,reg_cx [v+m-: evex.nd1.nf.l0.m4.o16 d3 /2 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d3) 202 : SM0,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 2, {REG_GPR|BITS16,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11193, 67, 716}, + /* 54 : RCL reg32?,rm32,reg_cx [vm-: evex.nd1.nf.l0.m4.o32 d3 /2 ] ND,SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d3) 212 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_CX,0,0}, NO_DECORATOR, nasm_bytecodes+11203, 43, 717}, + /* 55 : RCL rm32,reg_cx [m-: evex.nd0.nf.l0.m4.o32 d3 /2 ] ND,SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(d3) 202 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 2, {RM_GPR|BITS32,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11213, 68, 717}, + /* 56 : RCL reg32?,reg_cx [v+m-: evex.nd1.nf.l0.m4.o32 d3 /2 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d3) 202 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 2, {REG_GPR|BITS32,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11223, 69, 717}, + /* 57 : RCL reg64?,rm64,reg_cx [vm-: evex.nd1.nf.l0.m4.o64 d3 /2 ] SM0,ND,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d3) 212 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_CX,0,0}, NO_DECORATOR, nasm_bytecodes+11233, 43, 718}, + /* 58 : RCL rm64,reg_cx [m-: evex.nd0.nf.l0.m4.o64 d3 /2 ] ND,SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(d3) 202 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 2, {RM_GPR|BITS64,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11243, 68, 718}, + /* 59 : RCL reg64?,reg_cx [v+m-: evex.nd1.nf.l0.m4.o64 d3 /2 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d3) 202 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 2, {REG_GPR|BITS64,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11253, 69, 718}, + /* 60 : RCL reg8?,rm8,reg_ecx [vm-: evex.nd1.nf.l0.m4.o8 d2 /2 ] SM0,ND,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d2) 212 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 3, {REG_GPR|BITS8,RM_GPR|BITS8,REG_ECX,0,0}, NO_DECORATOR, nasm_bytecodes+23845, 37, 719}, + /* 61 : RCL rm8,reg_ecx [m-: evex.nd0.nf.l0.m4.o8 d2 /2 ] SM0,ND,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(d2) 202 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 2, {RM_GPR|BITS8,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+23854, 64, 719}, + /* 62 : RCL reg8?,reg_ecx [v+m-: evex.nd1.nf.l0.m4.o8 d2 /2 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d2) 202 : SM0,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 2, {REG_GPR|BITS8,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+23863, 65, 719}, + /* 63 : RCL reg16?,rm16,reg_ecx [vm-: evex.nd1.nf.l0.m4.o16 d3 /2 ] ND,SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d3) 212 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 3, {REG_GPR|BITS16,RM_GPR|BITS16,REG_ECX,0,0}, NO_DECORATOR, nasm_bytecodes+11173, 40, 720}, + /* 64 : RCL rm16,reg_ecx [m-: evex.nd0.nf.l0.m4.o16 d3 /2 ] ND,SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(d3) 202 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 2, {RM_GPR|BITS16,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11183, 66, 720}, + /* 65 : RCL reg16?,reg_ecx [v+m-: evex.nd1.nf.l0.m4.o16 d3 /2 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d3) 202 : SM0,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 2, {REG_GPR|BITS16,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11193, 67, 720}, + /* 66 : RCL reg32?,rm32,reg_ecx [vm-: evex.nd1.nf.l0.m4.o32 d3 /2 ] SM0,ND,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d3) 212 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_ECX,0,0}, NO_DECORATOR, nasm_bytecodes+11203, 43, 721}, + /* 67 : RCL rm32,reg_ecx [m-: evex.nd0.nf.l0.m4.o32 d3 /2 ] SM0,ND,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(d3) 202 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 2, {RM_GPR|BITS32,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11213, 68, 721}, + /* 68 : RCL reg32?,reg_ecx [v+m-: evex.nd1.nf.l0.m4.o32 d3 /2 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d3) 202 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 2, {REG_GPR|BITS32,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11223, 69, 721}, + /* 69 : RCL reg64?,rm64,reg_ecx [vm-: evex.nd1.nf.l0.m4.o64 d3 /2 ] SM0,ND,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d3) 212 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_ECX,0,0}, NO_DECORATOR, nasm_bytecodes+11233, 43, 722}, + /* 70 : RCL rm64,reg_ecx [m-: evex.nd0.nf.l0.m4.o64 d3 /2 ] ND,SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(d3) 202 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 2, {RM_GPR|BITS64,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11243, 68, 722}, + /* 71 : RCL reg64?,reg_ecx [v+m-: evex.nd1.nf.l0.m4.o64 d3 /2 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d3) 202 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 2, {REG_GPR|BITS64,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11253, 69, 722}, + /* 72 : RCL reg8?,rm8,reg_rcx [vm-: evex.nd1.nf.l0.m4.o8 d2 /2 ] ND,SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d2) 212 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 3, {REG_GPR|BITS8,RM_GPR|BITS8,REG_RCX,0,0}, NO_DECORATOR, nasm_bytecodes+23845, 37, 723}, + /* 73 : RCL rm8,reg_rcx [m-: evex.nd0.nf.l0.m4.o8 d2 /2 ] ND,SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(d2) 202 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 2, {RM_GPR|BITS8,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+23854, 64, 723}, + /* 74 : RCL reg8?,reg_rcx [v+m-: evex.nd1.nf.l0.m4.o8 d2 /2 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d2) 202 : SM0,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 2, {REG_GPR|BITS8,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+23863, 65, 723}, + /* 75 : RCL reg16?,rm16,reg_rcx [vm-: evex.nd1.nf.l0.m4.o16 d3 /2 ] ND,SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d3) 212 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 3, {REG_GPR|BITS16,RM_GPR|BITS16,REG_RCX,0,0}, NO_DECORATOR, nasm_bytecodes+11173, 40, 724}, + /* 76 : RCL rm16,reg_rcx [m-: evex.nd0.nf.l0.m4.o16 d3 /2 ] ND,SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(d3) 202 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 2, {RM_GPR|BITS16,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11183, 66, 724}, + /* 77 : RCL reg16?,reg_rcx [v+m-: evex.nd1.nf.l0.m4.o16 d3 /2 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d3) 202 : SM0,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 2, {REG_GPR|BITS16,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11193, 67, 724}, + /* 78 : RCL reg32?,rm32,reg_rcx [vm-: evex.nd1.nf.l0.m4.o32 d3 /2 ] ND,SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d3) 212 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_RCX,0,0}, NO_DECORATOR, nasm_bytecodes+11203, 43, 725}, + /* 79 : RCL rm32,reg_rcx [m-: evex.nd0.nf.l0.m4.o32 d3 /2 ] ND,SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(d3) 202 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 2, {RM_GPR|BITS32,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11213, 68, 725}, + /* 80 : RCL reg32?,reg_rcx [v+m-: evex.nd1.nf.l0.m4.o32 d3 /2 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d3) 202 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 2, {REG_GPR|BITS32,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11223, 69, 725}, + /* 81 : RCL reg64?,rm64,reg_rcx [vm-: evex.nd1.nf.l0.m4.o64 d3 /2 ] SM0,ND,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d3) 212 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_RCX,0,0}, NO_DECORATOR, nasm_bytecodes+11233, 43, 726}, + /* 82 : RCL rm64,reg_rcx [m-: evex.nd0.nf.l0.m4.o64 d3 /2 ] SM0,ND,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(d3) 202 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 2, {RM_GPR|BITS64,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11243, 68, 726}, + /* 83 : RCL reg64?,reg_rcx [v+m-: evex.nd1.nf.l0.m4.o64 d3 /2 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d3) 202 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 2, {REG_GPR|BITS64,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11253, 69, 726}, + /* 84 : RCL reg8?,rm8,imm8 [vmi: evex.nd1.nf.l0.m4.o8 c0 /2 ib,u ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(c0) 212 026 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 3, {REG_GPR|BITS8,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+11263, 37, 727}, + /* 85 : RCL rm8,imm8 [mi: evex.nd0.nf.l0.m4.o8 c0 /2 ib,u ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(c0) 202 025 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 2, {RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+11273, 64, 727}, + /* 86 : RCL reg8?,imm8 [v+mi: evex.nd1.nf.l0.m4.o8 c0 /2 ib,u ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(c0) 202 025 : SM0,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 2, {REG_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+11283, 65, 727}, + /* 87 : RCL reg16?,rm16,imm8 [vmi: evex.nd1.nf.l0.m4.o16 c1 /2 ib,u ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(c1) 212 026 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 3, {REG_GPR|BITS16,RM_GPR|BITS16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+1608, 40, 728}, + /* 88 : RCL rm16,imm8 [mi: evex.nd0.nf.l0.m4.o16 c1 /2 ib,u ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(c1) 202 025 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1619, 66, 728}, + /* 89 : RCL reg16?,imm8 [v+mi: evex.nd1.nf.l0.m4.o16 c1 /2 ib,u ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(c1) 202 025 : SM0,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 2, {REG_GPR|BITS16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1630, 67, 728}, + /* 90 : RCL reg32?,rm32,imm8 [vmi: evex.nd1.nf.l0.m4.o32 c1 /2 ib,u ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(c1) 212 026 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 3, {REG_GPR|BITS32,RM_GPR|BITS32,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+1641, 43, 729}, + /* 91 : RCL rm32,imm8 [mi: evex.nd0.nf.l0.m4.o32 c1 /2 ib,u ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(c1) 202 025 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1652, 68, 729}, + /* 92 : RCL reg32?,imm8 [v+mi: evex.nd1.nf.l0.m4.o32 c1 /2 ib,u ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(c1) 202 025 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 2, {REG_GPR|BITS32,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1663, 69, 729}, + /* 93 : RCL reg64?,rm64,imm8 [vmi: evex.nd1.nf.l0.m4.o64 c1 /2 ib,u ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(c1) 212 026 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 3, {REG_GPR|BITS64,RM_GPR|BITS64,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+1674, 43, 730}, + /* 94 : RCL rm64,imm8 [mi: evex.nd0.nf.l0.m4.o64 c1 /2 ib,u ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(c1) 202 025 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 2, {RM_GPR|BITS64,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1685, 68, 730}, + /* 95 : RCL reg64?,imm8 [v+mi: evex.nd1.nf.l0.m4.o64 c1 /2 ib,u ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(c1) 202 025 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 2, {REG_GPR|BITS64,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1696, 69, 730}, +}; + +static const struct itemplate instrux_RCR[96] = { + /* 0 : RCR rm8,unity [m-: o8 d0 /3 ] FL,8086 */ + /* 001(d0) 203 : FL,8086 */ + {I_RCR, 2, {RM_GPR|BITS8,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+23895, 56, 463}, + /* 1 : RCR rm16,unity [m-: o16 d1 /3 ] FL,8086 */ + /* 320 001(d1) 203 : FL,8086 */ + {I_RCR, 2, {RM_GPR|BITS16,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11318, 56, 464}, + /* 2 : RCR rm32,unity [m-: o32 d1 /3 ] FL,386 */ + /* 321 001(d1) 203 : FL,386 */ + {I_RCR, 2, {RM_GPR|BITS32,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11348, 57, 465}, + /* 3 : RCR rm64,unity [m-: o64 d1 /3 ] LONG,FL,PROT,X86_64 */ + /* 324 001(d1) 203 : LONG,FL,PROT,X86_64 */ + {I_RCR, 2, {RM_GPR|BITS64,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11378, 58, 466}, + /* 4 : RCR rm8,reg_cl [m-: o8 d2 /3 ] FL,8086 */ + /* 001(d2) 203 : FL,8086 */ + {I_RCR, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+23922, 56, 467}, + /* 5 : RCR rm16,reg_cl [m-: o16 d3 /3 ] FL,8086 */ + /* 320 001(d3) 203 : FL,8086 */ + {I_RCR, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11408, 56, 468}, + /* 6 : RCR rm32,reg_cl [m-: o32 d3 /3 ] FL,386 */ + /* 321 001(d3) 203 : FL,386 */ + {I_RCR, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11438, 57, 469}, + /* 7 : RCR rm64,reg_cl [m-: o64 d3 /3 ] LONG,FL,PROT,X86_64 */ + /* 324 001(d3) 203 : LONG,FL,PROT,X86_64 */ + {I_RCR, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11468, 58, 470}, + /* 8 : RCR rm8,reg_cx [m-: o8 d2 /3 ] ND,FL,8086 */ + /* 001(d2) 203 : FL,8086 */ + {I_RCR, 2, {RM_GPR|BITS8,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+23922, 56, 471}, + /* 9 : RCR rm16,reg_cx [m-: o16 d3 /3 ] ND,FL,8086 */ + /* 320 001(d3) 203 : FL,8086 */ + {I_RCR, 2, {RM_GPR|BITS16,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11408, 56, 472}, + /* 10 : RCR rm32,reg_cx [m-: o32 d3 /3 ] ND,FL,386 */ + /* 321 001(d3) 203 : FL,386 */ + {I_RCR, 2, {RM_GPR|BITS32,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11438, 57, 473}, + /* 11 : RCR rm64,reg_cx [m-: o64 d3 /3 ] ND,LONG,FL,PROT,X86_64 */ + /* 324 001(d3) 203 : LONG,FL,PROT,X86_64 */ + {I_RCR, 2, {RM_GPR|BITS64,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11468, 58, 474}, + /* 12 : RCR rm8,reg_ecx [m-: o8 d2 /3 ] ND,FL,8086 */ + /* 001(d2) 203 : FL,8086 */ + {I_RCR, 2, {RM_GPR|BITS8,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+23922, 56, 475}, + /* 13 : RCR rm16,reg_ecx [m-: o16 d3 /3 ] ND,FL,8086 */ + /* 320 001(d3) 203 : FL,8086 */ + {I_RCR, 2, {RM_GPR|BITS16,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11408, 56, 476}, + /* 14 : RCR rm32,reg_ecx [m-: o32 d3 /3 ] ND,FL,386 */ + /* 321 001(d3) 203 : FL,386 */ + {I_RCR, 2, {RM_GPR|BITS32,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11438, 57, 477}, + /* 15 : RCR rm64,reg_ecx [m-: o64 d3 /3 ] ND,LONG,FL,PROT,X86_64 */ + /* 324 001(d3) 203 : LONG,FL,PROT,X86_64 */ + {I_RCR, 2, {RM_GPR|BITS64,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11468, 58, 478}, + /* 16 : RCR rm8,reg_rcx [m-: o8 d2 /3 ] ND,FL,8086 */ + /* 001(d2) 203 : FL,8086 */ + {I_RCR, 2, {RM_GPR|BITS8,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+23922, 56, 479}, + /* 17 : RCR rm16,reg_rcx [m-: o16 d3 /3 ] ND,FL,8086 */ + /* 320 001(d3) 203 : FL,8086 */ + {I_RCR, 2, {RM_GPR|BITS16,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11408, 56, 480}, + /* 18 : RCR rm32,reg_rcx [m-: o32 d3 /3 ] ND,FL,386 */ + /* 321 001(d3) 203 : FL,386 */ + {I_RCR, 2, {RM_GPR|BITS32,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11438, 57, 481}, + /* 19 : RCR rm64,reg_rcx [m-: o64 d3 /3 ] ND,LONG,FL,PROT,X86_64 */ + /* 324 001(d3) 203 : LONG,FL,PROT,X86_64 */ + {I_RCR, 2, {RM_GPR|BITS64,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11468, 58, 482}, + /* 20 : RCR rm8,imm8 [mi: o8 c0 /3 ib,u ] FL,186 */ + /* 001(c0) 203 025 : FL,186 */ + {I_RCR, 2, {RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+11498, 59, 483}, + /* 21 : RCR rm16,imm8 [mi: o16 c1 /3 ib,u ] FL,186 */ + /* 320 001(c1) 203 025 : FL,186 */ + {I_RCR, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1734, 59, 484}, + /* 22 : RCR rm32,imm8 [mi: o32 c1 /3 ib,u ] FL,386 */ + /* 321 001(c1) 203 025 : FL,386 */ + {I_RCR, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1767, 57, 485}, + /* 23 : RCR rm64,imm8 [mi: o64 c1 /3 ib,u ] LONG,FL,PROT,X86_64 */ + /* 324 001(c1) 203 025 : LONG,FL,PROT,X86_64 */ + {I_RCR, 2, {RM_GPR|BITS64,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1800, 58, 486}, + /* 24 : RCR reg8?,rm8,unity [vm-: evex.nd1.nf.l0.m4.o8 d0 /3 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d0) 213 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 3, {REG_GPR|BITS8,RM_GPR|BITS8,UNITY|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+23872, 37, 731}, + /* 25 : RCR rm8,unity [m-: evex.nd0.nf.l0.m4.o8 d0 /3 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(d0) 203 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 2, {RM_GPR|BITS8,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+23881, 64, 731}, + /* 26 : RCR reg8?,unity [v+m-: evex.nd1.nf.l0.m4.o8 d0 /3 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d0) 203 : SM0,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 2, {REG_GPR|BITS8,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+23890, 65, 731}, + /* 27 : RCR reg16?,rm16,unity [vm-: evex.nd1.nf.l0.m4.o16 d1 /3 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d1) 213 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 3, {REG_GPR|BITS16,RM_GPR|BITS16,UNITY|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+11293, 40, 732}, + /* 28 : RCR rm16,unity [m-: evex.nd0.nf.l0.m4.o16 d1 /3 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(d1) 203 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 2, {RM_GPR|BITS16,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11303, 66, 732}, + /* 29 : RCR reg16?,unity [v+m-: evex.nd1.nf.l0.m4.o16 d1 /3 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d1) 203 : SM0,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 2, {REG_GPR|BITS16,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11313, 67, 732}, + /* 30 : RCR reg32?,rm32,unity [vm-: evex.nd1.nf.l0.m4.o32 d1 /3 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d1) 213 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 3, {REG_GPR|BITS32,RM_GPR|BITS32,UNITY|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+11323, 43, 733}, + /* 31 : RCR rm32,unity [m-: evex.nd0.nf.l0.m4.o32 d1 /3 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(d1) 203 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 2, {RM_GPR|BITS32,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11333, 68, 733}, + /* 32 : RCR reg32?,unity [v+m-: evex.nd1.nf.l0.m4.o32 d1 /3 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d1) 203 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 2, {REG_GPR|BITS32,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11343, 69, 733}, + /* 33 : RCR reg64?,rm64,unity [vm-: evex.nd1.nf.l0.m4.o64 d1 /3 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d1) 213 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 3, {REG_GPR|BITS64,RM_GPR|BITS64,UNITY|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+11353, 43, 734}, + /* 34 : RCR rm64,unity [m-: evex.nd0.nf.l0.m4.o64 d1 /3 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(d1) 203 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 2, {RM_GPR|BITS64,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11363, 68, 734}, + /* 35 : RCR reg64?,unity [v+m-: evex.nd1.nf.l0.m4.o64 d1 /3 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d1) 203 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 2, {REG_GPR|BITS64,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11373, 69, 734}, + /* 36 : RCR reg8?,rm8,reg_cl [vm-: evex.nd1.nf.l0.m4.o8 d2 /3 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d2) 213 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 3, {REG_GPR|BITS8,RM_GPR|BITS8,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+23899, 37, 735}, + /* 37 : RCR rm8,reg_cl [m-: evex.nd0.nf.l0.m4.o8 d2 /3 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(d2) 203 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+23908, 64, 735}, + /* 38 : RCR reg8?,reg_cl [v+m-: evex.nd1.nf.l0.m4.o8 d2 /3 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d2) 203 : SM0,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 2, {REG_GPR|BITS8,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+23917, 65, 735}, + /* 39 : RCR reg16?,rm16,reg_cl [vm-: evex.nd1.nf.l0.m4.o16 d3 /3 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d3) 213 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 3, {REG_GPR|BITS16,RM_GPR|BITS16,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+11383, 40, 736}, + /* 40 : RCR rm16,reg_cl [m-: evex.nd0.nf.l0.m4.o16 d3 /3 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(d3) 203 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11393, 66, 736}, + /* 41 : RCR reg16?,reg_cl [v+m-: evex.nd1.nf.l0.m4.o16 d3 /3 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d3) 203 : SM0,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 2, {REG_GPR|BITS16,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11403, 67, 736}, + /* 42 : RCR reg32?,rm32,reg_cl [vm-: evex.nd1.nf.l0.m4.o32 d3 /3 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d3) 213 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+11413, 43, 737}, + /* 43 : RCR rm32,reg_cl [m-: evex.nd0.nf.l0.m4.o32 d3 /3 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(d3) 203 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11423, 68, 737}, + /* 44 : RCR reg32?,reg_cl [v+m-: evex.nd1.nf.l0.m4.o32 d3 /3 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d3) 203 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 2, {REG_GPR|BITS32,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11433, 69, 737}, + /* 45 : RCR reg64?,rm64,reg_cl [vm-: evex.nd1.nf.l0.m4.o64 d3 /3 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d3) 213 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+11443, 43, 738}, + /* 46 : RCR rm64,reg_cl [m-: evex.nd0.nf.l0.m4.o64 d3 /3 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(d3) 203 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11453, 68, 738}, + /* 47 : RCR reg64?,reg_cl [v+m-: evex.nd1.nf.l0.m4.o64 d3 /3 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d3) 203 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 2, {REG_GPR|BITS64,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11463, 69, 738}, + /* 48 : RCR reg8?,rm8,reg_cx [vm-: evex.nd1.nf.l0.m4.o8 d2 /3 ] ND,SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d2) 213 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 3, {REG_GPR|BITS8,RM_GPR|BITS8,REG_CX,0,0}, NO_DECORATOR, nasm_bytecodes+23899, 37, 739}, + /* 49 : RCR rm8,reg_cx [m-: evex.nd0.nf.l0.m4.o8 d2 /3 ] SM0,ND,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(d2) 203 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 2, {RM_GPR|BITS8,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+23908, 64, 739}, + /* 50 : RCR reg8?,reg_cx [v+m-: evex.nd1.nf.l0.m4.o8 d2 /3 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d2) 203 : SM0,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 2, {REG_GPR|BITS8,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+23917, 65, 739}, + /* 51 : RCR reg16?,rm16,reg_cx [vm-: evex.nd1.nf.l0.m4.o16 d3 /3 ] ND,SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d3) 213 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 3, {REG_GPR|BITS16,RM_GPR|BITS16,REG_CX,0,0}, NO_DECORATOR, nasm_bytecodes+11383, 40, 740}, + /* 52 : RCR rm16,reg_cx [m-: evex.nd0.nf.l0.m4.o16 d3 /3 ] SM0,ND,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(d3) 203 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 2, {RM_GPR|BITS16,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11393, 66, 740}, + /* 53 : RCR reg16?,reg_cx [v+m-: evex.nd1.nf.l0.m4.o16 d3 /3 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d3) 203 : SM0,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 2, {REG_GPR|BITS16,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11403, 67, 740}, + /* 54 : RCR reg32?,rm32,reg_cx [vm-: evex.nd1.nf.l0.m4.o32 d3 /3 ] ND,SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d3) 213 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_CX,0,0}, NO_DECORATOR, nasm_bytecodes+11413, 43, 741}, + /* 55 : RCR rm32,reg_cx [m-: evex.nd0.nf.l0.m4.o32 d3 /3 ] SM0,ND,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(d3) 203 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 2, {RM_GPR|BITS32,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11423, 68, 741}, + /* 56 : RCR reg32?,reg_cx [v+m-: evex.nd1.nf.l0.m4.o32 d3 /3 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d3) 203 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 2, {REG_GPR|BITS32,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11433, 69, 741}, + /* 57 : RCR reg64?,rm64,reg_cx [vm-: evex.nd1.nf.l0.m4.o64 d3 /3 ] ND,SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d3) 213 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_CX,0,0}, NO_DECORATOR, nasm_bytecodes+11443, 43, 742}, + /* 58 : RCR rm64,reg_cx [m-: evex.nd0.nf.l0.m4.o64 d3 /3 ] SM0,ND,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(d3) 203 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 2, {RM_GPR|BITS64,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11453, 68, 742}, + /* 59 : RCR reg64?,reg_cx [v+m-: evex.nd1.nf.l0.m4.o64 d3 /3 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d3) 203 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 2, {REG_GPR|BITS64,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11463, 69, 742}, + /* 60 : RCR reg8?,rm8,reg_ecx [vm-: evex.nd1.nf.l0.m4.o8 d2 /3 ] SM0,ND,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d2) 213 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 3, {REG_GPR|BITS8,RM_GPR|BITS8,REG_ECX,0,0}, NO_DECORATOR, nasm_bytecodes+23899, 37, 743}, + /* 61 : RCR rm8,reg_ecx [m-: evex.nd0.nf.l0.m4.o8 d2 /3 ] ND,SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(d2) 203 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 2, {RM_GPR|BITS8,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+23908, 64, 743}, + /* 62 : RCR reg8?,reg_ecx [v+m-: evex.nd1.nf.l0.m4.o8 d2 /3 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d2) 203 : SM0,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 2, {REG_GPR|BITS8,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+23917, 65, 743}, + /* 63 : RCR reg16?,rm16,reg_ecx [vm-: evex.nd1.nf.l0.m4.o16 d3 /3 ] SM0,ND,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d3) 213 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 3, {REG_GPR|BITS16,RM_GPR|BITS16,REG_ECX,0,0}, NO_DECORATOR, nasm_bytecodes+11383, 40, 744}, + /* 64 : RCR rm16,reg_ecx [m-: evex.nd0.nf.l0.m4.o16 d3 /3 ] SM0,ND,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(d3) 203 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 2, {RM_GPR|BITS16,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11393, 66, 744}, + /* 65 : RCR reg16?,reg_ecx [v+m-: evex.nd1.nf.l0.m4.o16 d3 /3 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d3) 203 : SM0,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 2, {REG_GPR|BITS16,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11403, 67, 744}, + /* 66 : RCR reg32?,rm32,reg_ecx [vm-: evex.nd1.nf.l0.m4.o32 d3 /3 ] SM0,ND,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d3) 213 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_ECX,0,0}, NO_DECORATOR, nasm_bytecodes+11413, 43, 745}, + /* 67 : RCR rm32,reg_ecx [m-: evex.nd0.nf.l0.m4.o32 d3 /3 ] SM0,ND,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(d3) 203 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 2, {RM_GPR|BITS32,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11423, 68, 745}, + /* 68 : RCR reg32?,reg_ecx [v+m-: evex.nd1.nf.l0.m4.o32 d3 /3 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d3) 203 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 2, {REG_GPR|BITS32,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11433, 69, 745}, + /* 69 : RCR reg64?,rm64,reg_ecx [vm-: evex.nd1.nf.l0.m4.o64 d3 /3 ] ND,SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d3) 213 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_ECX,0,0}, NO_DECORATOR, nasm_bytecodes+11443, 43, 746}, + /* 70 : RCR rm64,reg_ecx [m-: evex.nd0.nf.l0.m4.o64 d3 /3 ] ND,SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(d3) 203 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 2, {RM_GPR|BITS64,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11453, 68, 746}, + /* 71 : RCR reg64?,reg_ecx [v+m-: evex.nd1.nf.l0.m4.o64 d3 /3 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d3) 203 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 2, {REG_GPR|BITS64,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11463, 69, 746}, + /* 72 : RCR reg8?,rm8,reg_rcx [vm-: evex.nd1.nf.l0.m4.o8 d2 /3 ] SM0,ND,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d2) 213 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 3, {REG_GPR|BITS8,RM_GPR|BITS8,REG_RCX,0,0}, NO_DECORATOR, nasm_bytecodes+23899, 37, 747}, + /* 73 : RCR rm8,reg_rcx [m-: evex.nd0.nf.l0.m4.o8 d2 /3 ] ND,SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(d2) 203 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 2, {RM_GPR|BITS8,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+23908, 64, 747}, + /* 74 : RCR reg8?,reg_rcx [v+m-: evex.nd1.nf.l0.m4.o8 d2 /3 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d2) 203 : SM0,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 2, {REG_GPR|BITS8,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+23917, 65, 747}, + /* 75 : RCR reg16?,rm16,reg_rcx [vm-: evex.nd1.nf.l0.m4.o16 d3 /3 ] ND,SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d3) 213 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 3, {REG_GPR|BITS16,RM_GPR|BITS16,REG_RCX,0,0}, NO_DECORATOR, nasm_bytecodes+11383, 40, 748}, + /* 76 : RCR rm16,reg_rcx [m-: evex.nd0.nf.l0.m4.o16 d3 /3 ] ND,SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(d3) 203 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 2, {RM_GPR|BITS16,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11393, 66, 748}, + /* 77 : RCR reg16?,reg_rcx [v+m-: evex.nd1.nf.l0.m4.o16 d3 /3 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d3) 203 : SM0,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 2, {REG_GPR|BITS16,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11403, 67, 748}, + /* 78 : RCR reg32?,rm32,reg_rcx [vm-: evex.nd1.nf.l0.m4.o32 d3 /3 ] SM0,ND,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d3) 213 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_RCX,0,0}, NO_DECORATOR, nasm_bytecodes+11413, 43, 749}, + /* 79 : RCR rm32,reg_rcx [m-: evex.nd0.nf.l0.m4.o32 d3 /3 ] ND,SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(d3) 203 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 2, {RM_GPR|BITS32,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11423, 68, 749}, + /* 80 : RCR reg32?,reg_rcx [v+m-: evex.nd1.nf.l0.m4.o32 d3 /3 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d3) 203 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 2, {REG_GPR|BITS32,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11433, 69, 749}, + /* 81 : RCR reg64?,rm64,reg_rcx [vm-: evex.nd1.nf.l0.m4.o64 d3 /3 ] SM0,ND,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d3) 213 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_RCX,0,0}, NO_DECORATOR, nasm_bytecodes+11443, 43, 750}, + /* 82 : RCR rm64,reg_rcx [m-: evex.nd0.nf.l0.m4.o64 d3 /3 ] SM0,ND,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(d3) 203 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 2, {RM_GPR|BITS64,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11453, 68, 750}, + /* 83 : RCR reg64?,reg_rcx [v+m-: evex.nd1.nf.l0.m4.o64 d3 /3 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d3) 203 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 2, {REG_GPR|BITS64,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11463, 69, 750}, + /* 84 : RCR reg8?,rm8,imm8 [vmi: evex.nd1.nf.l0.m4.o8 c0 /3 ib,u ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(c0) 213 026 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 3, {REG_GPR|BITS8,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+11473, 37, 751}, + /* 85 : RCR rm8,imm8 [mi: evex.nd0.nf.l0.m4.o8 c0 /3 ib,u ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(c0) 203 025 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 2, {RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+11483, 64, 751}, + /* 86 : RCR reg8?,imm8 [v+mi: evex.nd1.nf.l0.m4.o8 c0 /3 ib,u ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(c0) 203 025 : SM0,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 2, {REG_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+11493, 65, 751}, + /* 87 : RCR reg16?,rm16,imm8 [vmi: evex.nd1.nf.l0.m4.o16 c1 /3 ib,u ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(c1) 213 026 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 3, {REG_GPR|BITS16,RM_GPR|BITS16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+1707, 40, 752}, + /* 88 : RCR rm16,imm8 [mi: evex.nd0.nf.l0.m4.o16 c1 /3 ib,u ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(c1) 203 025 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1718, 66, 752}, + /* 89 : RCR reg16?,imm8 [v+mi: evex.nd1.nf.l0.m4.o16 c1 /3 ib,u ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(c1) 203 025 : SM0,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 2, {REG_GPR|BITS16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1729, 67, 752}, + /* 90 : RCR reg32?,rm32,imm8 [vmi: evex.nd1.nf.l0.m4.o32 c1 /3 ib,u ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(c1) 213 026 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 3, {REG_GPR|BITS32,RM_GPR|BITS32,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+1740, 43, 753}, + /* 91 : RCR rm32,imm8 [mi: evex.nd0.nf.l0.m4.o32 c1 /3 ib,u ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(c1) 203 025 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1751, 68, 753}, + /* 92 : RCR reg32?,imm8 [v+mi: evex.nd1.nf.l0.m4.o32 c1 /3 ib,u ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(c1) 203 025 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 2, {REG_GPR|BITS32,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1762, 69, 753}, + /* 93 : RCR reg64?,rm64,imm8 [vmi: evex.nd1.nf.l0.m4.o64 c1 /3 ib,u ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(c1) 213 026 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 3, {REG_GPR|BITS64,RM_GPR|BITS64,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+1773, 43, 754}, + /* 94 : RCR rm64,imm8 [mi: evex.nd0.nf.l0.m4.o64 c1 /3 ib,u ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(c1) 203 025 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 2, {RM_GPR|BITS64,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1784, 68, 754}, + /* 95 : RCR reg64?,imm8 [v+mi: evex.nd1.nf.l0.m4.o64 c1 /3 ib,u ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(c1) 203 025 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 2, {REG_GPR|BITS64,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1795, 69, 754}, +}; + +static const struct itemplate instrux_SHL[136] = { + /* 0 : SHL rm8,unity [m-: o8 d0 /4 ] FL,8086 */ + /* 001(d0) 204 : FL,8086 */ + {I_SHL, 2, {RM_GPR|BITS8,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+23949, 56, 487}, + /* 1 : SHL rm16,unity [m-: o16 d1 /4 ] FL,8086 */ + /* 320 001(d1) 204 : FL,8086 */ + {I_SHL, 2, {RM_GPR|BITS16,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11528, 56, 488}, + /* 2 : SHL rm32,unity [m-: o32 d1 /4 ] FL,386 */ + /* 321 001(d1) 204 : FL,386 */ + {I_SHL, 2, {RM_GPR|BITS32,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11558, 57, 489}, + /* 3 : SHL rm64,unity [m-: o64 d1 /4 ] LONG,FL,PROT,X86_64 */ + /* 324 001(d1) 204 : LONG,FL,PROT,X86_64 */ + {I_SHL, 2, {RM_GPR|BITS64,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11588, 58, 490}, + /* 4 : SHL rm8,reg_cl [m-: o8 d2 /4 ] FL,8086 */ + /* 001(d2) 204 : FL,8086 */ + {I_SHL, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+23976, 56, 491}, + /* 5 : SHL rm16,reg_cl [m-: o16 d3 /4 ] FL,8086 */ + /* 320 001(d3) 204 : FL,8086 */ + {I_SHL, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11618, 56, 492}, + /* 6 : SHL rm32,reg_cl [m-: o32 d3 /4 ] FL,386 */ + /* 321 001(d3) 204 : FL,386 */ + {I_SHL, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11648, 57, 493}, + /* 7 : SHL rm64,reg_cl [m-: o64 d3 /4 ] LONG,FL,PROT,X86_64 */ + /* 324 001(d3) 204 : LONG,FL,PROT,X86_64 */ + {I_SHL, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11678, 58, 494}, + /* 8 : SHL rm8,reg_cx [m-: o8 d2 /4 ] ND,FL,8086 */ + /* 001(d2) 204 : FL,8086 */ + {I_SHL, 2, {RM_GPR|BITS8,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+23976, 56, 495}, + /* 9 : SHL rm16,reg_cx [m-: o16 d3 /4 ] ND,FL,8086 */ + /* 320 001(d3) 204 : FL,8086 */ + {I_SHL, 2, {RM_GPR|BITS16,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11618, 56, 496}, + /* 10 : SHL rm32,reg_cx [m-: o32 d3 /4 ] ND,FL,386 */ + /* 321 001(d3) 204 : FL,386 */ + {I_SHL, 2, {RM_GPR|BITS32,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11648, 57, 497}, + /* 11 : SHL rm64,reg_cx [m-: o64 d3 /4 ] ND,LONG,FL,PROT,X86_64 */ + /* 324 001(d3) 204 : LONG,FL,PROT,X86_64 */ + {I_SHL, 2, {RM_GPR|BITS64,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11678, 58, 498}, + /* 12 : SHL rm8,reg_ecx [m-: o8 d2 /4 ] ND,FL,8086 */ + /* 001(d2) 204 : FL,8086 */ + {I_SHL, 2, {RM_GPR|BITS8,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+23976, 56, 499}, + /* 13 : SHL rm16,reg_ecx [m-: o16 d3 /4 ] ND,FL,8086 */ + /* 320 001(d3) 204 : FL,8086 */ + {I_SHL, 2, {RM_GPR|BITS16,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11618, 56, 500}, + /* 14 : SHL rm32,reg_ecx [m-: o32 d3 /4 ] ND,FL,386 */ + /* 321 001(d3) 204 : FL,386 */ + {I_SHL, 2, {RM_GPR|BITS32,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11648, 57, 501}, + /* 15 : SHL rm64,reg_ecx [m-: o64 d3 /4 ] ND,LONG,FL,PROT,X86_64 */ + /* 324 001(d3) 204 : LONG,FL,PROT,X86_64 */ + {I_SHL, 2, {RM_GPR|BITS64,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11678, 58, 502}, + /* 16 : SHL rm8,reg_rcx [m-: o8 d2 /4 ] ND,FL,8086 */ + /* 001(d2) 204 : FL,8086 */ + {I_SHL, 2, {RM_GPR|BITS8,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+23976, 56, 503}, + /* 17 : SHL rm16,reg_rcx [m-: o16 d3 /4 ] ND,FL,8086 */ + /* 320 001(d3) 204 : FL,8086 */ + {I_SHL, 2, {RM_GPR|BITS16,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11618, 56, 504}, + /* 18 : SHL rm32,reg_rcx [m-: o32 d3 /4 ] ND,FL,386 */ + /* 321 001(d3) 204 : FL,386 */ + {I_SHL, 2, {RM_GPR|BITS32,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11648, 57, 505}, + /* 19 : SHL rm64,reg_rcx [m-: o64 d3 /4 ] ND,LONG,FL,PROT,X86_64 */ + /* 324 001(d3) 204 : LONG,FL,PROT,X86_64 */ + {I_SHL, 2, {RM_GPR|BITS64,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11678, 58, 506}, + /* 20 : SHL rm8,imm8 [mi: o8 c0 /4 ib,u ] FL,186 */ + /* 001(c0) 204 025 : FL,186 */ + {I_SHL, 2, {RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+11708, 59, 507}, + /* 21 : SHL rm16,imm8 [mi: o16 c1 /4 ib,u ] FL,186 */ + /* 320 001(c1) 204 025 : FL,186 */ + {I_SHL, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1833, 59, 508}, + /* 22 : SHL rm32,imm8 [mi: o32 c1 /4 ib,u ] FL,386 */ + /* 321 001(c1) 204 025 : FL,386 */ + {I_SHL, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1866, 57, 509}, + /* 23 : SHL rm64,imm8 [mi: o64 c1 /4 ib,u ] LONG,FL,PROT,X86_64 */ + /* 324 001(c1) 204 025 : LONG,FL,PROT,X86_64 */ + {I_SHL, 2, {RM_GPR|BITS64,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1899, 58, 510}, + /* 24 : SHL reg32,rm32*,reg8 [rmv: vex.lz.66.0f38.w0 f7 /r ] ND,SM0,SM1,OPT,NF,NF_R,BMI2,FUTURE */ + /* 262(002 001) 001(f7) 110 : SM0,SM1,OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {I_SHL, 3, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,REG_GPR|BITS8|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55229, 62, 623}, + /* 25 : SHL reg32,reg8 [r+mv: vex.lz.66.0f38.w0 f7 /r ] ND,SM0,OPT,NF,NF_R,BMI2,FUTURE */ + /* 261(002 001) 001(f7) 100 : SM0,OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {I_SHL, 2, {REG_GPR|BITS32|RN_L16,REG_GPR|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55236, 63, 623}, + /* 26 : SHL reg32,rm32*,reg16 [rmv: vex.lz.66.0f38.w0 f7 /r ] SM0,ND,SM1,OPT,NF,NF_R,BMI2,FUTURE */ + /* 262(002 001) 001(f7) 110 : SM0,SM1,OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {I_SHL, 3, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,REG_GPR|BITS16|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55229, 62, 627}, + /* 27 : SHL reg32,reg16 [r+mv: vex.lz.66.0f38.w0 f7 /r ] ND,SM0,OPT,NF,NF_R,BMI2,FUTURE */ + /* 261(002 001) 001(f7) 100 : SM0,OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {I_SHL, 2, {REG_GPR|BITS32|RN_L16,REG_GPR|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55236, 63, 627}, + /* 28 : SHL reg32,rm32*,reg32 [rmv: vex.lz.66.0f38.w0 f7 /r ] ND,SM0,SM1,OPT,NF,NF_R,BMI2,FUTURE */ + /* 262(002 001) 001(f7) 110 : SM0,SM1,OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {I_SHL, 3, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55229, 62, 631}, + /* 29 : SHL reg32,reg32 [r+mv: vex.lz.66.0f38.w0 f7 /r ] SM0,ND,OPT,NF,NF_R,BMI2,FUTURE */ + /* 261(002 001) 001(f7) 100 : SM0,OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {I_SHL, 2, {REG_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55236, 63, 631}, + /* 30 : SHL reg32,rm32*,reg64 [rmv: vex.lz.66.0f38.w0 f7 /r ] SM0,ND,SM1,OPT,NF,NF_R,BMI2,FUTURE */ + /* 262(002 001) 001(f7) 110 : SM0,SM1,OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {I_SHL, 3, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,REG_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55229, 62, 635}, + /* 31 : SHL reg32,reg64 [r+mv: vex.lz.66.0f38.w0 f7 /r ] SM0,ND,OPT,NF,NF_R,BMI2,FUTURE */ + /* 261(002 001) 001(f7) 100 : SM0,OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {I_SHL, 2, {REG_GPR|BITS32|RN_L16,REG_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55236, 63, 635}, + /* 32 : SHL reg64,rm64*,reg8 [rmv: vex.lz.66.0f38.w1 f7 /r ] ND,SM0,SM1,OPT,NF,NF_R,BMI2,FUTURE */ + /* 262(002 201) 001(f7) 110 : SM0,SM1,OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {I_SHL, 3, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,REG_GPR|BITS8|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55271, 62, 641}, + /* 33 : SHL reg64,reg8 [r+mv: vex.lz.66.0f38.w1 f7 /r ] ND,SM0,OPT,NF,NF_R,BMI2,FUTURE */ + /* 261(002 201) 001(f7) 100 : SM0,OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {I_SHL, 2, {REG_GPR|BITS64|RN_L16,REG_GPR|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55278, 63, 641}, + /* 34 : SHL reg64,rm64*,reg16 [rmv: vex.lz.66.0f38.w1 f7 /r ] SM0,ND,SM1,OPT,NF,NF_R,BMI2,FUTURE */ + /* 262(002 201) 001(f7) 110 : SM0,SM1,OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {I_SHL, 3, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,REG_GPR|BITS16|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55271, 62, 645}, + /* 35 : SHL reg64,reg16 [r+mv: vex.lz.66.0f38.w1 f7 /r ] ND,SM0,OPT,NF,NF_R,BMI2,FUTURE */ + /* 261(002 201) 001(f7) 100 : SM0,OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {I_SHL, 2, {REG_GPR|BITS64|RN_L16,REG_GPR|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55278, 63, 645}, + /* 36 : SHL reg64,rm64*,reg32 [rmv: vex.lz.66.0f38.w1 f7 /r ] ND,SM0,SM1,OPT,NF,NF_R,BMI2,FUTURE */ + /* 262(002 201) 001(f7) 110 : SM0,SM1,OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {I_SHL, 3, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55271, 62, 649}, + /* 37 : SHL reg64,reg32 [r+mv: vex.lz.66.0f38.w1 f7 /r ] SM0,ND,OPT,NF,NF_R,BMI2,FUTURE */ + /* 261(002 201) 001(f7) 100 : SM0,OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {I_SHL, 2, {REG_GPR|BITS64|RN_L16,REG_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55278, 63, 649}, + /* 38 : SHL reg64,rm64*,reg64 [rmv: vex.lz.66.0f38.w1 f7 /r ] ND,SM0,SM1,OPT,NF,NF_R,BMI2,FUTURE */ + /* 262(002 201) 001(f7) 110 : SM0,SM1,OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {I_SHL, 3, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55271, 62, 653}, + /* 39 : SHL reg64,reg64 [r+mv: vex.lz.66.0f38.w1 f7 /r ] ND,SM0,OPT,NF,NF_R,BMI2,FUTURE */ + /* 261(002 201) 001(f7) 100 : SM0,OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {I_SHL, 2, {REG_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55278, 63, 653}, + /* 40 : SHL reg8?,rm8,unity [vm-: evex.nd1.nf.l0.m4.o8 d0 /4 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d0) 214 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 3, {REG_GPR|BITS8,RM_GPR|BITS8,UNITY|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+23926, 37, 755}, + /* 41 : SHL rm8,unity [m-: evex.nd0.nf.l0.m4.o8 d0 /4 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(d0) 204 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 2, {RM_GPR|BITS8,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+23935, 64, 755}, + /* 42 : SHL reg8?,unity [v+m-: evex.nd1.nf.l0.m4.o8 d0 /4 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d0) 204 : SM0,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 2, {REG_GPR|BITS8,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+23944, 65, 755}, + /* 43 : SHL reg16?,rm16,unity [vm-: evex.nd1.nf.l0.m4.o16 d1 /4 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d1) 214 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 3, {REG_GPR|BITS16,RM_GPR|BITS16,UNITY|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+11503, 40, 756}, + /* 44 : SHL rm16,unity [m-: evex.nd0.nf.l0.m4.o16 d1 /4 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(d1) 204 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 2, {RM_GPR|BITS16,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11513, 66, 756}, + /* 45 : SHL reg16?,unity [v+m-: evex.nd1.nf.l0.m4.o16 d1 /4 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d1) 204 : SM0,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 2, {REG_GPR|BITS16,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11523, 67, 756}, + /* 46 : SHL reg32?,rm32,unity [vm-: evex.nd1.nf.l0.m4.o32 d1 /4 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d1) 214 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 3, {REG_GPR|BITS32,RM_GPR|BITS32,UNITY|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+11533, 43, 757}, + /* 47 : SHL rm32,unity [m-: evex.nd0.nf.l0.m4.o32 d1 /4 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(d1) 204 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 2, {RM_GPR|BITS32,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11543, 68, 757}, + /* 48 : SHL reg32?,unity [v+m-: evex.nd1.nf.l0.m4.o32 d1 /4 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d1) 204 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 2, {REG_GPR|BITS32,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11553, 69, 757}, + /* 49 : SHL reg64?,rm64,unity [vm-: evex.nd1.nf.l0.m4.o64 d1 /4 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d1) 214 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 3, {REG_GPR|BITS64,RM_GPR|BITS64,UNITY|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+11563, 43, 758}, + /* 50 : SHL rm64,unity [m-: evex.nd0.nf.l0.m4.o64 d1 /4 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(d1) 204 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 2, {RM_GPR|BITS64,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11573, 68, 758}, + /* 51 : SHL reg64?,unity [v+m-: evex.nd1.nf.l0.m4.o64 d1 /4 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d1) 204 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 2, {REG_GPR|BITS64,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11583, 69, 758}, + /* 52 : SHL reg8?,rm8,reg_cl [vm-: evex.nd1.nf.l0.m4.o8 d2 /4 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d2) 214 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 3, {REG_GPR|BITS8,RM_GPR|BITS8,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+23953, 37, 759}, + /* 53 : SHL rm8,reg_cl [m-: evex.nd0.nf.l0.m4.o8 d2 /4 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(d2) 204 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+23962, 64, 759}, + /* 54 : SHL reg8?,reg_cl [v+m-: evex.nd1.nf.l0.m4.o8 d2 /4 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d2) 204 : SM0,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 2, {REG_GPR|BITS8,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+23971, 65, 759}, + /* 55 : SHL reg16?,rm16,reg_cl [vm-: evex.nd1.nf.l0.m4.o16 d3 /4 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d3) 214 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 3, {REG_GPR|BITS16,RM_GPR|BITS16,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+11593, 40, 760}, + /* 56 : SHL rm16,reg_cl [m-: evex.nd0.nf.l0.m4.o16 d3 /4 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(d3) 204 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11603, 66, 760}, + /* 57 : SHL reg16?,reg_cl [v+m-: evex.nd1.nf.l0.m4.o16 d3 /4 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d3) 204 : SM0,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 2, {REG_GPR|BITS16,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11613, 67, 760}, + /* 58 : SHL reg32?,rm32,reg_cl [vm-: evex.nd1.nf.l0.m4.o32 d3 /4 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d3) 214 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+11623, 43, 761}, + /* 59 : SHL rm32,reg_cl [m-: evex.nd0.nf.l0.m4.o32 d3 /4 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(d3) 204 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11633, 68, 761}, + /* 60 : SHL reg32?,reg_cl [v+m-: evex.nd1.nf.l0.m4.o32 d3 /4 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d3) 204 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 2, {REG_GPR|BITS32,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11643, 69, 761}, + /* 61 : SHL reg64?,rm64,reg_cl [vm-: evex.nd1.nf.l0.m4.o64 d3 /4 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d3) 214 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+11653, 43, 762}, + /* 62 : SHL rm64,reg_cl [m-: evex.nd0.nf.l0.m4.o64 d3 /4 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(d3) 204 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11663, 68, 762}, + /* 63 : SHL reg64?,reg_cl [v+m-: evex.nd1.nf.l0.m4.o64 d3 /4 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d3) 204 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 2, {REG_GPR|BITS64,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11673, 69, 762}, + /* 64 : SHL reg8?,rm8,reg_cx [vm-: evex.nd1.nf.l0.m4.o8 d2 /4 ] ND,SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d2) 214 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 3, {REG_GPR|BITS8,RM_GPR|BITS8,REG_CX,0,0}, NO_DECORATOR, nasm_bytecodes+23953, 37, 763}, + /* 65 : SHL rm8,reg_cx [m-: evex.nd0.nf.l0.m4.o8 d2 /4 ] SM0,ND,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(d2) 204 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 2, {RM_GPR|BITS8,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+23962, 64, 763}, + /* 66 : SHL reg8?,reg_cx [v+m-: evex.nd1.nf.l0.m4.o8 d2 /4 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d2) 204 : SM0,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 2, {REG_GPR|BITS8,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+23971, 65, 763}, + /* 67 : SHL reg16?,rm16,reg_cx [vm-: evex.nd1.nf.l0.m4.o16 d3 /4 ] ND,SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d3) 214 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 3, {REG_GPR|BITS16,RM_GPR|BITS16,REG_CX,0,0}, NO_DECORATOR, nasm_bytecodes+11593, 40, 764}, + /* 68 : SHL rm16,reg_cx [m-: evex.nd0.nf.l0.m4.o16 d3 /4 ] ND,SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(d3) 204 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 2, {RM_GPR|BITS16,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11603, 66, 764}, + /* 69 : SHL reg16?,reg_cx [v+m-: evex.nd1.nf.l0.m4.o16 d3 /4 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d3) 204 : SM0,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 2, {REG_GPR|BITS16,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11613, 67, 764}, + /* 70 : SHL reg32?,rm32,reg_cx [vm-: evex.nd1.nf.l0.m4.o32 d3 /4 ] ND,SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d3) 214 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_CX,0,0}, NO_DECORATOR, nasm_bytecodes+11623, 43, 765}, + /* 71 : SHL rm32,reg_cx [m-: evex.nd0.nf.l0.m4.o32 d3 /4 ] SM0,ND,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(d3) 204 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 2, {RM_GPR|BITS32,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11633, 68, 765}, + /* 72 : SHL reg32?,reg_cx [v+m-: evex.nd1.nf.l0.m4.o32 d3 /4 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d3) 204 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 2, {REG_GPR|BITS32,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11643, 69, 765}, + /* 73 : SHL reg64?,rm64,reg_cx [vm-: evex.nd1.nf.l0.m4.o64 d3 /4 ] SM0,ND,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d3) 214 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_CX,0,0}, NO_DECORATOR, nasm_bytecodes+11653, 43, 766}, + /* 74 : SHL rm64,reg_cx [m-: evex.nd0.nf.l0.m4.o64 d3 /4 ] ND,SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(d3) 204 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 2, {RM_GPR|BITS64,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11663, 68, 766}, + /* 75 : SHL reg64?,reg_cx [v+m-: evex.nd1.nf.l0.m4.o64 d3 /4 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d3) 204 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 2, {REG_GPR|BITS64,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11673, 69, 766}, + /* 76 : SHL reg8?,rm8,reg_ecx [vm-: evex.nd1.nf.l0.m4.o8 d2 /4 ] ND,SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d2) 214 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 3, {REG_GPR|BITS8,RM_GPR|BITS8,REG_ECX,0,0}, NO_DECORATOR, nasm_bytecodes+23953, 37, 767}, + /* 77 : SHL rm8,reg_ecx [m-: evex.nd0.nf.l0.m4.o8 d2 /4 ] ND,SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(d2) 204 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 2, {RM_GPR|BITS8,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+23962, 64, 767}, + /* 78 : SHL reg8?,reg_ecx [v+m-: evex.nd1.nf.l0.m4.o8 d2 /4 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d2) 204 : SM0,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 2, {REG_GPR|BITS8,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+23971, 65, 767}, + /* 79 : SHL reg16?,rm16,reg_ecx [vm-: evex.nd1.nf.l0.m4.o16 d3 /4 ] ND,SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d3) 214 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 3, {REG_GPR|BITS16,RM_GPR|BITS16,REG_ECX,0,0}, NO_DECORATOR, nasm_bytecodes+11593, 40, 768}, + /* 80 : SHL rm16,reg_ecx [m-: evex.nd0.nf.l0.m4.o16 d3 /4 ] ND,SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(d3) 204 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 2, {RM_GPR|BITS16,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11603, 66, 768}, + /* 81 : SHL reg16?,reg_ecx [v+m-: evex.nd1.nf.l0.m4.o16 d3 /4 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d3) 204 : SM0,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 2, {REG_GPR|BITS16,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11613, 67, 768}, + /* 82 : SHL reg32?,rm32,reg_ecx [vm-: evex.nd1.nf.l0.m4.o32 d3 /4 ] ND,SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d3) 214 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_ECX,0,0}, NO_DECORATOR, nasm_bytecodes+11623, 43, 769}, + /* 83 : SHL rm32,reg_ecx [m-: evex.nd0.nf.l0.m4.o32 d3 /4 ] SM0,ND,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(d3) 204 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 2, {RM_GPR|BITS32,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11633, 68, 769}, + /* 84 : SHL reg32?,reg_ecx [v+m-: evex.nd1.nf.l0.m4.o32 d3 /4 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d3) 204 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 2, {REG_GPR|BITS32,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11643, 69, 769}, + /* 85 : SHL reg64?,rm64,reg_ecx [vm-: evex.nd1.nf.l0.m4.o64 d3 /4 ] ND,SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d3) 214 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_ECX,0,0}, NO_DECORATOR, nasm_bytecodes+11653, 43, 770}, + /* 86 : SHL rm64,reg_ecx [m-: evex.nd0.nf.l0.m4.o64 d3 /4 ] SM0,ND,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(d3) 204 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 2, {RM_GPR|BITS64,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11663, 68, 770}, + /* 87 : SHL reg64?,reg_ecx [v+m-: evex.nd1.nf.l0.m4.o64 d3 /4 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d3) 204 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 2, {REG_GPR|BITS64,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11673, 69, 770}, + /* 88 : SHL reg8?,rm8,reg_rcx [vm-: evex.nd1.nf.l0.m4.o8 d2 /4 ] SM0,ND,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d2) 214 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 3, {REG_GPR|BITS8,RM_GPR|BITS8,REG_RCX,0,0}, NO_DECORATOR, nasm_bytecodes+23953, 37, 771}, + /* 89 : SHL rm8,reg_rcx [m-: evex.nd0.nf.l0.m4.o8 d2 /4 ] SM0,ND,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(d2) 204 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 2, {RM_GPR|BITS8,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+23962, 64, 771}, + /* 90 : SHL reg8?,reg_rcx [v+m-: evex.nd1.nf.l0.m4.o8 d2 /4 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d2) 204 : SM0,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 2, {REG_GPR|BITS8,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+23971, 65, 771}, + /* 91 : SHL reg16?,rm16,reg_rcx [vm-: evex.nd1.nf.l0.m4.o16 d3 /4 ] SM0,ND,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d3) 214 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 3, {REG_GPR|BITS16,RM_GPR|BITS16,REG_RCX,0,0}, NO_DECORATOR, nasm_bytecodes+11593, 40, 772}, + /* 92 : SHL rm16,reg_rcx [m-: evex.nd0.nf.l0.m4.o16 d3 /4 ] ND,SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(d3) 204 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 2, {RM_GPR|BITS16,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11603, 66, 772}, + /* 93 : SHL reg16?,reg_rcx [v+m-: evex.nd1.nf.l0.m4.o16 d3 /4 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d3) 204 : SM0,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 2, {REG_GPR|BITS16,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11613, 67, 772}, + /* 94 : SHL reg32?,rm32,reg_rcx [vm-: evex.nd1.nf.l0.m4.o32 d3 /4 ] ND,SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d3) 214 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_RCX,0,0}, NO_DECORATOR, nasm_bytecodes+11623, 43, 773}, + /* 95 : SHL rm32,reg_rcx [m-: evex.nd0.nf.l0.m4.o32 d3 /4 ] ND,SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(d3) 204 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 2, {RM_GPR|BITS32,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11633, 68, 773}, + /* 96 : SHL reg32?,reg_rcx [v+m-: evex.nd1.nf.l0.m4.o32 d3 /4 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d3) 204 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 2, {REG_GPR|BITS32,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11643, 69, 773}, + /* 97 : SHL reg64?,rm64,reg_rcx [vm-: evex.nd1.nf.l0.m4.o64 d3 /4 ] ND,SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d3) 214 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_RCX,0,0}, NO_DECORATOR, nasm_bytecodes+11653, 43, 774}, + /* 98 : SHL rm64,reg_rcx [m-: evex.nd0.nf.l0.m4.o64 d3 /4 ] ND,SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(d3) 204 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 2, {RM_GPR|BITS64,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11663, 68, 774}, + /* 99 : SHL reg64?,reg_rcx [v+m-: evex.nd1.nf.l0.m4.o64 d3 /4 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d3) 204 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 2, {REG_GPR|BITS64,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11673, 69, 774}, + /* 100 : SHL reg8?,rm8,imm8 [vmi: evex.nd1.nf.l0.m4.o8 c0 /4 ib,u ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(c0) 214 026 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 3, {REG_GPR|BITS8,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+11683, 37, 775}, + /* 101 : SHL rm8,imm8 [mi: evex.nd0.nf.l0.m4.o8 c0 /4 ib,u ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(c0) 204 025 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 2, {RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+11693, 64, 775}, + /* 102 : SHL reg8?,imm8 [v+mi: evex.nd1.nf.l0.m4.o8 c0 /4 ib,u ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(c0) 204 025 : SM0,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 2, {REG_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+11703, 65, 775}, + /* 103 : SHL reg16?,rm16,imm8 [vmi: evex.nd1.nf.l0.m4.o16 c1 /4 ib,u ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(c1) 214 026 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 3, {REG_GPR|BITS16,RM_GPR|BITS16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+1806, 40, 776}, + /* 104 : SHL rm16,imm8 [mi: evex.nd0.nf.l0.m4.o16 c1 /4 ib,u ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(c1) 204 025 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1817, 66, 776}, + /* 105 : SHL reg16?,imm8 [v+mi: evex.nd1.nf.l0.m4.o16 c1 /4 ib,u ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(c1) 204 025 : SM0,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 2, {REG_GPR|BITS16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1828, 67, 776}, + /* 106 : SHL reg32?,rm32,imm8 [vmi: evex.nd1.nf.l0.m4.o32 c1 /4 ib,u ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(c1) 214 026 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 3, {REG_GPR|BITS32,RM_GPR|BITS32,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+1839, 43, 777}, + /* 107 : SHL rm32,imm8 [mi: evex.nd0.nf.l0.m4.o32 c1 /4 ib,u ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(c1) 204 025 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1850, 68, 777}, + /* 108 : SHL reg32?,imm8 [v+mi: evex.nd1.nf.l0.m4.o32 c1 /4 ib,u ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(c1) 204 025 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 2, {REG_GPR|BITS32,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1861, 69, 777}, + /* 109 : SHL reg64?,rm64,imm8 [vmi: evex.nd1.nf.l0.m4.o64 c1 /4 ib,u ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(c1) 214 026 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 3, {REG_GPR|BITS64,RM_GPR|BITS64,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+1872, 43, 778}, + /* 110 : SHL rm64,imm8 [mi: evex.nd0.nf.l0.m4.o64 c1 /4 ib,u ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(c1) 204 025 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 2, {RM_GPR|BITS64,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1883, 68, 778}, + /* 111 : SHL reg64?,imm8 [v+mi: evex.nd1.nf.l0.m4.o64 c1 /4 ib,u ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(c1) 204 025 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 2, {REG_GPR|BITS64,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1894, 69, 778}, + /* 112 : SHL reg32,rm32*,reg8 [rmv: evex.lz.66.0f38.w0 f7 /r ] SM0,ND,SM1,OPT,NF,NF_R,LONG,PROT,BMI2,APX,X86_64 */ + /* 242(f2 7d 08) 300 001(f7) 110 : SM0,SM1,OPT,NF,NF_R,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SHL, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24088, 72, 889}, + /* 113 : SHL reg32,reg8 [r+mv: evex.lz.66.0f38.w0 f7 /r ] SM0,ND,OPT,NF,NF_R,LONG,PROT,BMI2,APX,X86_64 */ + /* 241(f2 7d 08) 300 001(f7) 100 : SM0,OPT,NF,NF_R,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SHL, 2, {REG_GPR|BITS32,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+24097, 73, 889}, + /* 114 : SHL reg32,rm32*,reg16 [rmv: evex.lz.66.0f38.w0 f7 /r ] SM0,ND,SM1,OPT,NF,NF_R,LONG,PROT,BMI2,APX,X86_64 */ + /* 242(f2 7d 08) 300 001(f7) 110 : SM0,SM1,OPT,NF,NF_R,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SHL, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+24088, 72, 893}, + /* 115 : SHL reg32,reg16 [r+mv: evex.lz.66.0f38.w0 f7 /r ] ND,SM0,OPT,NF,NF_R,LONG,PROT,BMI2,APX,X86_64 */ + /* 241(f2 7d 08) 300 001(f7) 100 : SM0,OPT,NF,NF_R,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SHL, 2, {REG_GPR|BITS32,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+24097, 73, 893}, + /* 116 : SHL reg32,rm32*,reg32 [rmv: evex.lz.66.0f38.w0 f7 /r ] SM0,ND,SM1,OPT,NF,NF_R,LONG,PROT,BMI2,APX,X86_64 */ + /* 242(f2 7d 08) 300 001(f7) 110 : SM0,SM1,OPT,NF,NF_R,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SHL, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+24088, 72, 897}, + /* 117 : SHL reg32,reg32 [r+mv: evex.lz.66.0f38.w0 f7 /r ] ND,SM0,OPT,NF,NF_R,LONG,PROT,BMI2,APX,X86_64 */ + /* 241(f2 7d 08) 300 001(f7) 100 : SM0,OPT,NF,NF_R,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SHL, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+24097, 73, 897}, + /* 118 : SHL reg32,rm32*,reg64 [rmv: evex.lz.66.0f38.w0 f7 /r ] ND,SM0,SM1,OPT,NF,NF_R,LONG,PROT,BMI2,APX,X86_64 */ + /* 242(f2 7d 08) 300 001(f7) 110 : SM0,SM1,OPT,NF,NF_R,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SHL, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+24088, 72, 901}, + /* 119 : SHL reg32,reg64 [r+mv: evex.lz.66.0f38.w0 f7 /r ] SM0,ND,OPT,NF,NF_R,LONG,PROT,BMI2,APX,X86_64 */ + /* 241(f2 7d 08) 300 001(f7) 100 : SM0,OPT,NF,NF_R,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SHL, 2, {REG_GPR|BITS32,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+24097, 73, 901}, + /* 120 : SHL reg64,rm64*,reg8 [rmv: evex.lz.66.0f38.w1 f7 /r ] ND,SM0,SM1,OPT,NF,NF_R,LONG,PROT,BMI2,APX,X86_64 */ + /* 242(f2 fd 08) 300 001(f7) 110 : SM0,SM1,OPT,NF,NF_R,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SHL, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24142, 72, 907}, + /* 121 : SHL reg64,reg8 [r+mv: evex.lz.66.0f38.w1 f7 /r ] ND,SM0,OPT,NF,NF_R,LONG,PROT,BMI2,APX,X86_64 */ + /* 241(f2 fd 08) 300 001(f7) 100 : SM0,OPT,NF,NF_R,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SHL, 2, {REG_GPR|BITS64,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+24151, 73, 907}, + /* 122 : SHL reg64,rm64*,reg16 [rmv: evex.lz.66.0f38.w1 f7 /r ] SM0,ND,SM1,OPT,NF,NF_R,LONG,PROT,BMI2,APX,X86_64 */ + /* 242(f2 fd 08) 300 001(f7) 110 : SM0,SM1,OPT,NF,NF_R,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SHL, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+24142, 72, 911}, + /* 123 : SHL reg64,reg16 [r+mv: evex.lz.66.0f38.w1 f7 /r ] ND,SM0,OPT,NF,NF_R,LONG,PROT,BMI2,APX,X86_64 */ + /* 241(f2 fd 08) 300 001(f7) 100 : SM0,OPT,NF,NF_R,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SHL, 2, {REG_GPR|BITS64,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+24151, 73, 911}, + /* 124 : SHL reg64,rm64*,reg32 [rmv: evex.lz.66.0f38.w1 f7 /r ] ND,SM0,SM1,OPT,NF,NF_R,LONG,PROT,BMI2,APX,X86_64 */ + /* 242(f2 fd 08) 300 001(f7) 110 : SM0,SM1,OPT,NF,NF_R,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SHL, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+24142, 72, 915}, + /* 125 : SHL reg64,reg32 [r+mv: evex.lz.66.0f38.w1 f7 /r ] SM0,ND,OPT,NF,NF_R,LONG,PROT,BMI2,APX,X86_64 */ + /* 241(f2 fd 08) 300 001(f7) 100 : SM0,OPT,NF,NF_R,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SHL, 2, {REG_GPR|BITS64,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+24151, 73, 915}, + /* 126 : SHL reg64,rm64*,reg64 [rmv: evex.lz.66.0f38.w1 f7 /r ] ND,SM0,SM1,OPT,NF,NF_R,LONG,PROT,BMI2,APX,X86_64 */ + /* 242(f2 fd 08) 300 001(f7) 110 : SM0,SM1,OPT,NF,NF_R,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SHL, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+24142, 72, 919}, + /* 127 : SHL reg64,reg64 [r+mv: evex.lz.66.0f38.w1 f7 /r ] ND,SM0,OPT,NF,NF_R,LONG,PROT,BMI2,APX,X86_64 */ + /* 241(f2 fd 08) 300 001(f7) 100 : SM0,OPT,NF,NF_R,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SHL, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+24151, 73, 919}, + /* 128 : SHL kreg8,kreg8,imm8 [rmi: vex.l0.66.0f3a.w0 32 /r ib ] SM0,ND,SM1,ZU,FL,AVX512DQ,FUTURE */ + /* 270(003 001) 001(32) 110 022 : SM0,SM1,NOAPX,ZU,FL,VEX,AVX512DQ,FUTURE */ + {I_SHL, 3, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54715, 517, 4615}, + /* 129 : SHL kreg8,kreg8,imm8 [rmi: evex.l0.66.0f3a.w0 32 /r ib ] SM0,ND,SM1,ZU,FL,AVX512DQ,FUTURE,APX */ + /* 250(f3 7d 08) 300 001(32) 110 022 : SM0,SM1,ZU,LONG,FL,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_SHL, 3, {OPMASKREG|BITS8,OPMASKREG|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18053, 518, 4615}, + /* 130 : SHL kreg16,kreg16,imm8 [rmi: vex.l0.66.0f3a.w1 32 /r ib ] ND,SM0-1,ZU,FL,AVX512F,FUTURE */ + /* 270(003 201) 001(32) 110 022 : SM0,SM1,NOAPX,ZU,FL,VEX,AVX512F,FUTURE */ + {I_SHL, 3, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54723, 529, 4616}, + /* 131 : SHL kreg16,kreg16,imm8 [rmi: evex.l0.66.0f3a.w1 32 /r ib ] ND,SM0-1,ZU,FL,AVX512F,FUTURE,APX */ + /* 250(f3 fd 08) 300 001(32) 110 022 : SM0,SM1,ZU,LONG,FL,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_SHL, 3, {OPMASKREG|BITS16,OPMASKREG|BITS16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18063, 530, 4616}, + /* 132 : SHL kreg32,kreg32,imm8 [rmi: vex.l0.66.0f3a.w0 33 /r ib ] ND,SM0-1,ZU,FL,AVX512BW,FUTURE */ + /* 270(003 001) 001(33) 110 022 : SM0,SM1,NOAPX,ZU,FL,VEX,AVX512BW,FUTURE */ + {I_SHL, 3, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54731, 521, 4617}, + /* 133 : SHL kreg32,kreg32,imm8 [rmi: evex.l0.66.0f3a.w0 33 /r ib ] ND,SM0-1,ZU,FL,AVX512BW,FUTURE,APX */ + /* 250(f3 7d 08) 300 001(33) 110 022 : SM0,SM1,ZU,LONG,FL,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_SHL, 3, {OPMASKREG|BITS32,OPMASKREG|BITS32,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18073, 522, 4617}, + /* 134 : SHL kreg64,kreg64,imm8 [rmi: vex.l0.66.0f3a.w1 33 /r ib ] ND,SM0-1,ZU,FL,AVX512BW,FUTURE */ + /* 270(003 201) 001(33) 110 022 : SM0,SM1,NOAPX,ZU,FL,VEX,AVX512BW,FUTURE */ + {I_SHL, 3, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54739, 521, 4618}, + /* 135 : SHL kreg64,kreg64,imm8 [rmi: evex.l0.66.0f3a.w1 33 /r ib ] ND,SM0-1,ZU,FL,AVX512BW,FUTURE,APX */ + /* 250(f3 fd 08) 300 001(33) 110 022 : SM0,SM1,ZU,LONG,FL,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_SHL, 3, {OPMASKREG|BITS64,OPMASKREG|BITS64,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18083, 522, 4618}, +}; + +static const struct itemplate instrux_SAL[128] = { + /* 0 : SAL rm8,unity [m-: o8 d0 /4 ] FL,8086 */ + /* 001(d0) 204 : FL,8086 */ + {I_SAL, 2, {RM_GPR|BITS8,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+23949, 56, 511}, + /* 1 : SAL rm16,unity [m-: o16 d1 /4 ] FL,8086 */ + /* 320 001(d1) 204 : FL,8086 */ + {I_SAL, 2, {RM_GPR|BITS16,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11528, 56, 512}, + /* 2 : SAL rm32,unity [m-: o32 d1 /4 ] FL,386 */ + /* 321 001(d1) 204 : FL,386 */ + {I_SAL, 2, {RM_GPR|BITS32,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11558, 57, 513}, + /* 3 : SAL rm64,unity [m-: o64 d1 /4 ] LONG,FL,PROT,X86_64 */ + /* 324 001(d1) 204 : LONG,FL,PROT,X86_64 */ + {I_SAL, 2, {RM_GPR|BITS64,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11588, 58, 514}, + /* 4 : SAL rm8,reg_cl [m-: o8 d2 /4 ] FL,8086 */ + /* 001(d2) 204 : FL,8086 */ + {I_SAL, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+23976, 56, 515}, + /* 5 : SAL rm16,reg_cl [m-: o16 d3 /4 ] FL,8086 */ + /* 320 001(d3) 204 : FL,8086 */ + {I_SAL, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11618, 56, 516}, + /* 6 : SAL rm32,reg_cl [m-: o32 d3 /4 ] FL,386 */ + /* 321 001(d3) 204 : FL,386 */ + {I_SAL, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11648, 57, 517}, + /* 7 : SAL rm64,reg_cl [m-: o64 d3 /4 ] LONG,FL,PROT,X86_64 */ + /* 324 001(d3) 204 : LONG,FL,PROT,X86_64 */ + {I_SAL, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11678, 58, 518}, + /* 8 : SAL rm8,reg_cx [m-: o8 d2 /4 ] ND,FL,8086 */ + /* 001(d2) 204 : FL,8086 */ + {I_SAL, 2, {RM_GPR|BITS8,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+23976, 56, 519}, + /* 9 : SAL rm16,reg_cx [m-: o16 d3 /4 ] ND,FL,8086 */ + /* 320 001(d3) 204 : FL,8086 */ + {I_SAL, 2, {RM_GPR|BITS16,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11618, 56, 520}, + /* 10 : SAL rm32,reg_cx [m-: o32 d3 /4 ] ND,FL,386 */ + /* 321 001(d3) 204 : FL,386 */ + {I_SAL, 2, {RM_GPR|BITS32,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11648, 57, 521}, + /* 11 : SAL rm64,reg_cx [m-: o64 d3 /4 ] ND,LONG,FL,PROT,X86_64 */ + /* 324 001(d3) 204 : LONG,FL,PROT,X86_64 */ + {I_SAL, 2, {RM_GPR|BITS64,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11678, 58, 522}, + /* 12 : SAL rm8,reg_ecx [m-: o8 d2 /4 ] ND,FL,8086 */ + /* 001(d2) 204 : FL,8086 */ + {I_SAL, 2, {RM_GPR|BITS8,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+23976, 56, 523}, + /* 13 : SAL rm16,reg_ecx [m-: o16 d3 /4 ] ND,FL,8086 */ + /* 320 001(d3) 204 : FL,8086 */ + {I_SAL, 2, {RM_GPR|BITS16,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11618, 56, 524}, + /* 14 : SAL rm32,reg_ecx [m-: o32 d3 /4 ] ND,FL,386 */ + /* 321 001(d3) 204 : FL,386 */ + {I_SAL, 2, {RM_GPR|BITS32,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11648, 57, 525}, + /* 15 : SAL rm64,reg_ecx [m-: o64 d3 /4 ] ND,LONG,FL,PROT,X86_64 */ + /* 324 001(d3) 204 : LONG,FL,PROT,X86_64 */ + {I_SAL, 2, {RM_GPR|BITS64,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11678, 58, 526}, + /* 16 : SAL rm8,reg_rcx [m-: o8 d2 /4 ] ND,FL,8086 */ + /* 001(d2) 204 : FL,8086 */ + {I_SAL, 2, {RM_GPR|BITS8,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+23976, 56, 527}, + /* 17 : SAL rm16,reg_rcx [m-: o16 d3 /4 ] ND,FL,8086 */ + /* 320 001(d3) 204 : FL,8086 */ + {I_SAL, 2, {RM_GPR|BITS16,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11618, 56, 528}, + /* 18 : SAL rm32,reg_rcx [m-: o32 d3 /4 ] ND,FL,386 */ + /* 321 001(d3) 204 : FL,386 */ + {I_SAL, 2, {RM_GPR|BITS32,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11648, 57, 529}, + /* 19 : SAL rm64,reg_rcx [m-: o64 d3 /4 ] ND,LONG,FL,PROT,X86_64 */ + /* 324 001(d3) 204 : LONG,FL,PROT,X86_64 */ + {I_SAL, 2, {RM_GPR|BITS64,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11678, 58, 530}, + /* 20 : SAL rm8,imm8 [mi: o8 c0 /4 ib,u ] FL,186 */ + /* 001(c0) 204 025 : FL,186 */ + {I_SAL, 2, {RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+11708, 59, 531}, + /* 21 : SAL rm16,imm8 [mi: o16 c1 /4 ib,u ] FL,186 */ + /* 320 001(c1) 204 025 : FL,186 */ + {I_SAL, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1833, 59, 532}, + /* 22 : SAL rm32,imm8 [mi: o32 c1 /4 ib,u ] FL,386 */ + /* 321 001(c1) 204 025 : FL,386 */ + {I_SAL, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1866, 57, 533}, + /* 23 : SAL rm64,imm8 [mi: o64 c1 /4 ib,u ] LONG,FL,PROT,X86_64 */ + /* 324 001(c1) 204 025 : LONG,FL,PROT,X86_64 */ + {I_SAL, 2, {RM_GPR|BITS64,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1899, 58, 534}, + /* 24 : SAL reg32,rm32*,reg8 [rmv: vex.lz.66.0f38.w0 f7 /r ] SM0,ND,SM1,OPT,NF,NF_R,BMI2,FUTURE */ + /* 262(002 001) 001(f7) 110 : SM0,SM1,OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {I_SAL, 3, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,REG_GPR|BITS8|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55229, 62, 624}, + /* 25 : SAL reg32,reg8 [r+mv: vex.lz.66.0f38.w0 f7 /r ] SM0,ND,OPT,NF,NF_R,BMI2,FUTURE */ + /* 261(002 001) 001(f7) 100 : SM0,OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {I_SAL, 2, {REG_GPR|BITS32|RN_L16,REG_GPR|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55236, 63, 624}, + /* 26 : SAL reg32,rm32*,reg16 [rmv: vex.lz.66.0f38.w0 f7 /r ] SM0,ND,SM1,OPT,NF,NF_R,BMI2,FUTURE */ + /* 262(002 001) 001(f7) 110 : SM0,SM1,OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {I_SAL, 3, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,REG_GPR|BITS16|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55229, 62, 628}, + /* 27 : SAL reg32,reg16 [r+mv: vex.lz.66.0f38.w0 f7 /r ] ND,SM0,OPT,NF,NF_R,BMI2,FUTURE */ + /* 261(002 001) 001(f7) 100 : SM0,OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {I_SAL, 2, {REG_GPR|BITS32|RN_L16,REG_GPR|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55236, 63, 628}, + /* 28 : SAL reg32,rm32*,reg32 [rmv: vex.lz.66.0f38.w0 f7 /r ] ND,SM0,SM1,OPT,NF,NF_R,BMI2,FUTURE */ + /* 262(002 001) 001(f7) 110 : SM0,SM1,OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {I_SAL, 3, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55229, 62, 632}, + /* 29 : SAL reg32,reg32 [r+mv: vex.lz.66.0f38.w0 f7 /r ] SM0,ND,OPT,NF,NF_R,BMI2,FUTURE */ + /* 261(002 001) 001(f7) 100 : SM0,OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {I_SAL, 2, {REG_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55236, 63, 632}, + /* 30 : SAL reg32,rm32*,reg64 [rmv: vex.lz.66.0f38.w0 f7 /r ] ND,SM0,SM1,OPT,NF,NF_R,BMI2,FUTURE */ + /* 262(002 001) 001(f7) 110 : SM0,SM1,OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {I_SAL, 3, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,REG_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55229, 62, 636}, + /* 31 : SAL reg32,reg64 [r+mv: vex.lz.66.0f38.w0 f7 /r ] SM0,ND,OPT,NF,NF_R,BMI2,FUTURE */ + /* 261(002 001) 001(f7) 100 : SM0,OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {I_SAL, 2, {REG_GPR|BITS32|RN_L16,REG_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55236, 63, 636}, + /* 32 : SAL reg64,rm64*,reg8 [rmv: vex.lz.66.0f38.w1 f7 /r ] SM0,ND,SM1,OPT,NF,NF_R,BMI2,FUTURE */ + /* 262(002 201) 001(f7) 110 : SM0,SM1,OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {I_SAL, 3, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,REG_GPR|BITS8|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55271, 62, 642}, + /* 33 : SAL reg64,reg8 [r+mv: vex.lz.66.0f38.w1 f7 /r ] SM0,ND,OPT,NF,NF_R,BMI2,FUTURE */ + /* 261(002 201) 001(f7) 100 : SM0,OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {I_SAL, 2, {REG_GPR|BITS64|RN_L16,REG_GPR|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55278, 63, 642}, + /* 34 : SAL reg64,rm64*,reg16 [rmv: vex.lz.66.0f38.w1 f7 /r ] SM0,ND,SM1,OPT,NF,NF_R,BMI2,FUTURE */ + /* 262(002 201) 001(f7) 110 : SM0,SM1,OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {I_SAL, 3, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,REG_GPR|BITS16|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55271, 62, 646}, + /* 35 : SAL reg64,reg16 [r+mv: vex.lz.66.0f38.w1 f7 /r ] SM0,ND,OPT,NF,NF_R,BMI2,FUTURE */ + /* 261(002 201) 001(f7) 100 : SM0,OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {I_SAL, 2, {REG_GPR|BITS64|RN_L16,REG_GPR|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55278, 63, 646}, + /* 36 : SAL reg64,rm64*,reg32 [rmv: vex.lz.66.0f38.w1 f7 /r ] SM0,ND,SM1,OPT,NF,NF_R,BMI2,FUTURE */ + /* 262(002 201) 001(f7) 110 : SM0,SM1,OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {I_SAL, 3, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55271, 62, 650}, + /* 37 : SAL reg64,reg32 [r+mv: vex.lz.66.0f38.w1 f7 /r ] SM0,ND,OPT,NF,NF_R,BMI2,FUTURE */ + /* 261(002 201) 001(f7) 100 : SM0,OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {I_SAL, 2, {REG_GPR|BITS64|RN_L16,REG_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55278, 63, 650}, + /* 38 : SAL reg64,rm64*,reg64 [rmv: vex.lz.66.0f38.w1 f7 /r ] ND,SM0,SM1,OPT,NF,NF_R,BMI2,FUTURE */ + /* 262(002 201) 001(f7) 110 : SM0,SM1,OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {I_SAL, 3, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55271, 62, 654}, + /* 39 : SAL reg64,reg64 [r+mv: vex.lz.66.0f38.w1 f7 /r ] SM0,ND,OPT,NF,NF_R,BMI2,FUTURE */ + /* 261(002 201) 001(f7) 100 : SM0,OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {I_SAL, 2, {REG_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55278, 63, 654}, + /* 40 : SAL reg8?,rm8,unity [vm-: evex.nd1.nf.l0.m4.o8 d0 /4 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d0) 214 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 3, {REG_GPR|BITS8,RM_GPR|BITS8,UNITY|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+23926, 37, 779}, + /* 41 : SAL rm8,unity [m-: evex.nd0.nf.l0.m4.o8 d0 /4 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(d0) 204 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 2, {RM_GPR|BITS8,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+23935, 64, 779}, + /* 42 : SAL reg8?,unity [v+m-: evex.nd1.nf.l0.m4.o8 d0 /4 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d0) 204 : SM0,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 2, {REG_GPR|BITS8,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+23944, 65, 779}, + /* 43 : SAL reg16?,rm16,unity [vm-: evex.nd1.nf.l0.m4.o16 d1 /4 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d1) 214 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 3, {REG_GPR|BITS16,RM_GPR|BITS16,UNITY|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+11503, 40, 780}, + /* 44 : SAL rm16,unity [m-: evex.nd0.nf.l0.m4.o16 d1 /4 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(d1) 204 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 2, {RM_GPR|BITS16,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11513, 66, 780}, + /* 45 : SAL reg16?,unity [v+m-: evex.nd1.nf.l0.m4.o16 d1 /4 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d1) 204 : SM0,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 2, {REG_GPR|BITS16,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11523, 67, 780}, + /* 46 : SAL reg32?,rm32,unity [vm-: evex.nd1.nf.l0.m4.o32 d1 /4 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d1) 214 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 3, {REG_GPR|BITS32,RM_GPR|BITS32,UNITY|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+11533, 43, 781}, + /* 47 : SAL rm32,unity [m-: evex.nd0.nf.l0.m4.o32 d1 /4 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(d1) 204 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 2, {RM_GPR|BITS32,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11543, 68, 781}, + /* 48 : SAL reg32?,unity [v+m-: evex.nd1.nf.l0.m4.o32 d1 /4 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d1) 204 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 2, {REG_GPR|BITS32,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11553, 69, 781}, + /* 49 : SAL reg64?,rm64,unity [vm-: evex.nd1.nf.l0.m4.o64 d1 /4 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d1) 214 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 3, {REG_GPR|BITS64,RM_GPR|BITS64,UNITY|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+11563, 43, 782}, + /* 50 : SAL rm64,unity [m-: evex.nd0.nf.l0.m4.o64 d1 /4 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(d1) 204 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 2, {RM_GPR|BITS64,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11573, 68, 782}, + /* 51 : SAL reg64?,unity [v+m-: evex.nd1.nf.l0.m4.o64 d1 /4 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d1) 204 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 2, {REG_GPR|BITS64,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11583, 69, 782}, + /* 52 : SAL reg8?,rm8,reg_cl [vm-: evex.nd1.nf.l0.m4.o8 d2 /4 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d2) 214 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 3, {REG_GPR|BITS8,RM_GPR|BITS8,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+23953, 37, 783}, + /* 53 : SAL rm8,reg_cl [m-: evex.nd0.nf.l0.m4.o8 d2 /4 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(d2) 204 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+23962, 64, 783}, + /* 54 : SAL reg8?,reg_cl [v+m-: evex.nd1.nf.l0.m4.o8 d2 /4 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d2) 204 : SM0,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 2, {REG_GPR|BITS8,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+23971, 65, 783}, + /* 55 : SAL reg16?,rm16,reg_cl [vm-: evex.nd1.nf.l0.m4.o16 d3 /4 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d3) 214 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 3, {REG_GPR|BITS16,RM_GPR|BITS16,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+11593, 40, 784}, + /* 56 : SAL rm16,reg_cl [m-: evex.nd0.nf.l0.m4.o16 d3 /4 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(d3) 204 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11603, 66, 784}, + /* 57 : SAL reg16?,reg_cl [v+m-: evex.nd1.nf.l0.m4.o16 d3 /4 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d3) 204 : SM0,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 2, {REG_GPR|BITS16,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11613, 67, 784}, + /* 58 : SAL reg32?,rm32,reg_cl [vm-: evex.nd1.nf.l0.m4.o32 d3 /4 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d3) 214 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+11623, 43, 785}, + /* 59 : SAL rm32,reg_cl [m-: evex.nd0.nf.l0.m4.o32 d3 /4 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(d3) 204 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11633, 68, 785}, + /* 60 : SAL reg32?,reg_cl [v+m-: evex.nd1.nf.l0.m4.o32 d3 /4 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d3) 204 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 2, {REG_GPR|BITS32,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11643, 69, 785}, + /* 61 : SAL reg64?,rm64,reg_cl [vm-: evex.nd1.nf.l0.m4.o64 d3 /4 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d3) 214 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+11653, 43, 786}, + /* 62 : SAL rm64,reg_cl [m-: evex.nd0.nf.l0.m4.o64 d3 /4 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(d3) 204 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11663, 68, 786}, + /* 63 : SAL reg64?,reg_cl [v+m-: evex.nd1.nf.l0.m4.o64 d3 /4 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d3) 204 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 2, {REG_GPR|BITS64,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11673, 69, 786}, + /* 64 : SAL reg8?,rm8,reg_cx [vm-: evex.nd1.nf.l0.m4.o8 d2 /4 ] SM0,ND,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d2) 214 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 3, {REG_GPR|BITS8,RM_GPR|BITS8,REG_CX,0,0}, NO_DECORATOR, nasm_bytecodes+23953, 37, 787}, + /* 65 : SAL rm8,reg_cx [m-: evex.nd0.nf.l0.m4.o8 d2 /4 ] ND,SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(d2) 204 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 2, {RM_GPR|BITS8,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+23962, 64, 787}, + /* 66 : SAL reg8?,reg_cx [v+m-: evex.nd1.nf.l0.m4.o8 d2 /4 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d2) 204 : SM0,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 2, {REG_GPR|BITS8,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+23971, 65, 787}, + /* 67 : SAL reg16?,rm16,reg_cx [vm-: evex.nd1.nf.l0.m4.o16 d3 /4 ] SM0,ND,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d3) 214 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 3, {REG_GPR|BITS16,RM_GPR|BITS16,REG_CX,0,0}, NO_DECORATOR, nasm_bytecodes+11593, 40, 788}, + /* 68 : SAL rm16,reg_cx [m-: evex.nd0.nf.l0.m4.o16 d3 /4 ] SM0,ND,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(d3) 204 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 2, {RM_GPR|BITS16,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11603, 66, 788}, + /* 69 : SAL reg16?,reg_cx [v+m-: evex.nd1.nf.l0.m4.o16 d3 /4 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d3) 204 : SM0,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 2, {REG_GPR|BITS16,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11613, 67, 788}, + /* 70 : SAL reg32?,rm32,reg_cx [vm-: evex.nd1.nf.l0.m4.o32 d3 /4 ] ND,SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d3) 214 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_CX,0,0}, NO_DECORATOR, nasm_bytecodes+11623, 43, 789}, + /* 71 : SAL rm32,reg_cx [m-: evex.nd0.nf.l0.m4.o32 d3 /4 ] SM0,ND,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(d3) 204 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 2, {RM_GPR|BITS32,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11633, 68, 789}, + /* 72 : SAL reg32?,reg_cx [v+m-: evex.nd1.nf.l0.m4.o32 d3 /4 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d3) 204 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 2, {REG_GPR|BITS32,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11643, 69, 789}, + /* 73 : SAL reg64?,rm64,reg_cx [vm-: evex.nd1.nf.l0.m4.o64 d3 /4 ] ND,SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d3) 214 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_CX,0,0}, NO_DECORATOR, nasm_bytecodes+11653, 43, 790}, + /* 74 : SAL rm64,reg_cx [m-: evex.nd0.nf.l0.m4.o64 d3 /4 ] ND,SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(d3) 204 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 2, {RM_GPR|BITS64,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11663, 68, 790}, + /* 75 : SAL reg64?,reg_cx [v+m-: evex.nd1.nf.l0.m4.o64 d3 /4 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d3) 204 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 2, {REG_GPR|BITS64,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11673, 69, 790}, + /* 76 : SAL reg8?,rm8,reg_ecx [vm-: evex.nd1.nf.l0.m4.o8 d2 /4 ] ND,SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d2) 214 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 3, {REG_GPR|BITS8,RM_GPR|BITS8,REG_ECX,0,0}, NO_DECORATOR, nasm_bytecodes+23953, 37, 791}, + /* 77 : SAL rm8,reg_ecx [m-: evex.nd0.nf.l0.m4.o8 d2 /4 ] SM0,ND,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(d2) 204 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 2, {RM_GPR|BITS8,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+23962, 64, 791}, + /* 78 : SAL reg8?,reg_ecx [v+m-: evex.nd1.nf.l0.m4.o8 d2 /4 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d2) 204 : SM0,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 2, {REG_GPR|BITS8,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+23971, 65, 791}, + /* 79 : SAL reg16?,rm16,reg_ecx [vm-: evex.nd1.nf.l0.m4.o16 d3 /4 ] SM0,ND,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d3) 214 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 3, {REG_GPR|BITS16,RM_GPR|BITS16,REG_ECX,0,0}, NO_DECORATOR, nasm_bytecodes+11593, 40, 792}, + /* 80 : SAL rm16,reg_ecx [m-: evex.nd0.nf.l0.m4.o16 d3 /4 ] ND,SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(d3) 204 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 2, {RM_GPR|BITS16,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11603, 66, 792}, + /* 81 : SAL reg16?,reg_ecx [v+m-: evex.nd1.nf.l0.m4.o16 d3 /4 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d3) 204 : SM0,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 2, {REG_GPR|BITS16,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11613, 67, 792}, + /* 82 : SAL reg32?,rm32,reg_ecx [vm-: evex.nd1.nf.l0.m4.o32 d3 /4 ] ND,SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d3) 214 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_ECX,0,0}, NO_DECORATOR, nasm_bytecodes+11623, 43, 793}, + /* 83 : SAL rm32,reg_ecx [m-: evex.nd0.nf.l0.m4.o32 d3 /4 ] SM0,ND,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(d3) 204 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 2, {RM_GPR|BITS32,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11633, 68, 793}, + /* 84 : SAL reg32?,reg_ecx [v+m-: evex.nd1.nf.l0.m4.o32 d3 /4 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d3) 204 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 2, {REG_GPR|BITS32,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11643, 69, 793}, + /* 85 : SAL reg64?,rm64,reg_ecx [vm-: evex.nd1.nf.l0.m4.o64 d3 /4 ] SM0,ND,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d3) 214 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_ECX,0,0}, NO_DECORATOR, nasm_bytecodes+11653, 43, 794}, + /* 86 : SAL rm64,reg_ecx [m-: evex.nd0.nf.l0.m4.o64 d3 /4 ] ND,SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(d3) 204 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 2, {RM_GPR|BITS64,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11663, 68, 794}, + /* 87 : SAL reg64?,reg_ecx [v+m-: evex.nd1.nf.l0.m4.o64 d3 /4 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d3) 204 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 2, {REG_GPR|BITS64,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11673, 69, 794}, + /* 88 : SAL reg8?,rm8,reg_rcx [vm-: evex.nd1.nf.l0.m4.o8 d2 /4 ] SM0,ND,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d2) 214 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 3, {REG_GPR|BITS8,RM_GPR|BITS8,REG_RCX,0,0}, NO_DECORATOR, nasm_bytecodes+23953, 37, 795}, + /* 89 : SAL rm8,reg_rcx [m-: evex.nd0.nf.l0.m4.o8 d2 /4 ] SM0,ND,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(d2) 204 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 2, {RM_GPR|BITS8,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+23962, 64, 795}, + /* 90 : SAL reg8?,reg_rcx [v+m-: evex.nd1.nf.l0.m4.o8 d2 /4 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d2) 204 : SM0,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 2, {REG_GPR|BITS8,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+23971, 65, 795}, + /* 91 : SAL reg16?,rm16,reg_rcx [vm-: evex.nd1.nf.l0.m4.o16 d3 /4 ] ND,SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d3) 214 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 3, {REG_GPR|BITS16,RM_GPR|BITS16,REG_RCX,0,0}, NO_DECORATOR, nasm_bytecodes+11593, 40, 796}, + /* 92 : SAL rm16,reg_rcx [m-: evex.nd0.nf.l0.m4.o16 d3 /4 ] SM0,ND,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(d3) 204 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 2, {RM_GPR|BITS16,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11603, 66, 796}, + /* 93 : SAL reg16?,reg_rcx [v+m-: evex.nd1.nf.l0.m4.o16 d3 /4 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d3) 204 : SM0,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 2, {REG_GPR|BITS16,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11613, 67, 796}, + /* 94 : SAL reg32?,rm32,reg_rcx [vm-: evex.nd1.nf.l0.m4.o32 d3 /4 ] SM0,ND,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d3) 214 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_RCX,0,0}, NO_DECORATOR, nasm_bytecodes+11623, 43, 797}, + /* 95 : SAL rm32,reg_rcx [m-: evex.nd0.nf.l0.m4.o32 d3 /4 ] SM0,ND,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(d3) 204 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 2, {RM_GPR|BITS32,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11633, 68, 797}, + /* 96 : SAL reg32?,reg_rcx [v+m-: evex.nd1.nf.l0.m4.o32 d3 /4 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d3) 204 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 2, {REG_GPR|BITS32,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11643, 69, 797}, + /* 97 : SAL reg64?,rm64,reg_rcx [vm-: evex.nd1.nf.l0.m4.o64 d3 /4 ] SM0,ND,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d3) 214 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_RCX,0,0}, NO_DECORATOR, nasm_bytecodes+11653, 43, 798}, + /* 98 : SAL rm64,reg_rcx [m-: evex.nd0.nf.l0.m4.o64 d3 /4 ] ND,SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(d3) 204 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 2, {RM_GPR|BITS64,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11663, 68, 798}, + /* 99 : SAL reg64?,reg_rcx [v+m-: evex.nd1.nf.l0.m4.o64 d3 /4 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d3) 204 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 2, {REG_GPR|BITS64,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11673, 69, 798}, + /* 100 : SAL reg8?,rm8,imm8 [vmi: evex.nd1.nf.l0.m4.o8 c0 /4 ib,u ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(c0) 214 026 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 3, {REG_GPR|BITS8,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+11683, 37, 799}, + /* 101 : SAL rm8,imm8 [mi: evex.nd0.nf.l0.m4.o8 c0 /4 ib,u ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(c0) 204 025 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 2, {RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+11693, 64, 799}, + /* 102 : SAL reg8?,imm8 [v+mi: evex.nd1.nf.l0.m4.o8 c0 /4 ib,u ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(c0) 204 025 : SM0,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 2, {REG_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+11703, 65, 799}, + /* 103 : SAL reg16?,rm16,imm8 [vmi: evex.nd1.nf.l0.m4.o16 c1 /4 ib,u ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(c1) 214 026 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 3, {REG_GPR|BITS16,RM_GPR|BITS16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+1806, 40, 800}, + /* 104 : SAL rm16,imm8 [mi: evex.nd0.nf.l0.m4.o16 c1 /4 ib,u ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(c1) 204 025 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1817, 66, 800}, + /* 105 : SAL reg16?,imm8 [v+mi: evex.nd1.nf.l0.m4.o16 c1 /4 ib,u ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(c1) 204 025 : SM0,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 2, {REG_GPR|BITS16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1828, 67, 800}, + /* 106 : SAL reg32?,rm32,imm8 [vmi: evex.nd1.nf.l0.m4.o32 c1 /4 ib,u ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(c1) 214 026 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 3, {REG_GPR|BITS32,RM_GPR|BITS32,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+1839, 43, 801}, + /* 107 : SAL rm32,imm8 [mi: evex.nd0.nf.l0.m4.o32 c1 /4 ib,u ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(c1) 204 025 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1850, 68, 801}, + /* 108 : SAL reg32?,imm8 [v+mi: evex.nd1.nf.l0.m4.o32 c1 /4 ib,u ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(c1) 204 025 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 2, {REG_GPR|BITS32,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1861, 69, 801}, + /* 109 : SAL reg64?,rm64,imm8 [vmi: evex.nd1.nf.l0.m4.o64 c1 /4 ib,u ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(c1) 214 026 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 3, {REG_GPR|BITS64,RM_GPR|BITS64,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+1872, 43, 802}, + /* 110 : SAL rm64,imm8 [mi: evex.nd0.nf.l0.m4.o64 c1 /4 ib,u ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(c1) 204 025 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 2, {RM_GPR|BITS64,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1883, 68, 802}, + /* 111 : SAL reg64?,imm8 [v+mi: evex.nd1.nf.l0.m4.o64 c1 /4 ib,u ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(c1) 204 025 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 2, {REG_GPR|BITS64,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1894, 69, 802}, + /* 112 : SAL reg32,rm32*,reg8 [rmv: evex.lz.66.0f38.w0 f7 /r ] ND,SM0,SM1,OPT,NF,NF_R,LONG,PROT,BMI2,APX,X86_64 */ + /* 242(f2 7d 08) 300 001(f7) 110 : SM0,SM1,OPT,NF,NF_R,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SAL, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24088, 72, 890}, + /* 113 : SAL reg32,reg8 [r+mv: evex.lz.66.0f38.w0 f7 /r ] ND,SM0,OPT,NF,NF_R,LONG,PROT,BMI2,APX,X86_64 */ + /* 241(f2 7d 08) 300 001(f7) 100 : SM0,OPT,NF,NF_R,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SAL, 2, {REG_GPR|BITS32,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+24097, 73, 890}, + /* 114 : SAL reg32,rm32*,reg16 [rmv: evex.lz.66.0f38.w0 f7 /r ] ND,SM0,SM1,OPT,NF,NF_R,LONG,PROT,BMI2,APX,X86_64 */ + /* 242(f2 7d 08) 300 001(f7) 110 : SM0,SM1,OPT,NF,NF_R,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SAL, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+24088, 72, 894}, + /* 115 : SAL reg32,reg16 [r+mv: evex.lz.66.0f38.w0 f7 /r ] ND,SM0,OPT,NF,NF_R,LONG,PROT,BMI2,APX,X86_64 */ + /* 241(f2 7d 08) 300 001(f7) 100 : SM0,OPT,NF,NF_R,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SAL, 2, {REG_GPR|BITS32,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+24097, 73, 894}, + /* 116 : SAL reg32,rm32*,reg32 [rmv: evex.lz.66.0f38.w0 f7 /r ] SM0,ND,SM1,OPT,NF,NF_R,LONG,PROT,BMI2,APX,X86_64 */ + /* 242(f2 7d 08) 300 001(f7) 110 : SM0,SM1,OPT,NF,NF_R,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SAL, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+24088, 72, 898}, + /* 117 : SAL reg32,reg32 [r+mv: evex.lz.66.0f38.w0 f7 /r ] SM0,ND,OPT,NF,NF_R,LONG,PROT,BMI2,APX,X86_64 */ + /* 241(f2 7d 08) 300 001(f7) 100 : SM0,OPT,NF,NF_R,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SAL, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+24097, 73, 898}, + /* 118 : SAL reg32,rm32*,reg64 [rmv: evex.lz.66.0f38.w0 f7 /r ] SM0,ND,SM1,OPT,NF,NF_R,LONG,PROT,BMI2,APX,X86_64 */ + /* 242(f2 7d 08) 300 001(f7) 110 : SM0,SM1,OPT,NF,NF_R,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SAL, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+24088, 72, 902}, + /* 119 : SAL reg32,reg64 [r+mv: evex.lz.66.0f38.w0 f7 /r ] ND,SM0,OPT,NF,NF_R,LONG,PROT,BMI2,APX,X86_64 */ + /* 241(f2 7d 08) 300 001(f7) 100 : SM0,OPT,NF,NF_R,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SAL, 2, {REG_GPR|BITS32,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+24097, 73, 902}, + /* 120 : SAL reg64,rm64*,reg8 [rmv: evex.lz.66.0f38.w1 f7 /r ] ND,SM0,SM1,OPT,NF,NF_R,LONG,PROT,BMI2,APX,X86_64 */ + /* 242(f2 fd 08) 300 001(f7) 110 : SM0,SM1,OPT,NF,NF_R,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SAL, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24142, 72, 908}, + /* 121 : SAL reg64,reg8 [r+mv: evex.lz.66.0f38.w1 f7 /r ] ND,SM0,OPT,NF,NF_R,LONG,PROT,BMI2,APX,X86_64 */ + /* 241(f2 fd 08) 300 001(f7) 100 : SM0,OPT,NF,NF_R,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SAL, 2, {REG_GPR|BITS64,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+24151, 73, 908}, + /* 122 : SAL reg64,rm64*,reg16 [rmv: evex.lz.66.0f38.w1 f7 /r ] ND,SM0,SM1,OPT,NF,NF_R,LONG,PROT,BMI2,APX,X86_64 */ + /* 242(f2 fd 08) 300 001(f7) 110 : SM0,SM1,OPT,NF,NF_R,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SAL, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+24142, 72, 912}, + /* 123 : SAL reg64,reg16 [r+mv: evex.lz.66.0f38.w1 f7 /r ] SM0,ND,OPT,NF,NF_R,LONG,PROT,BMI2,APX,X86_64 */ + /* 241(f2 fd 08) 300 001(f7) 100 : SM0,OPT,NF,NF_R,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SAL, 2, {REG_GPR|BITS64,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+24151, 73, 912}, + /* 124 : SAL reg64,rm64*,reg32 [rmv: evex.lz.66.0f38.w1 f7 /r ] SM0,ND,SM1,OPT,NF,NF_R,LONG,PROT,BMI2,APX,X86_64 */ + /* 242(f2 fd 08) 300 001(f7) 110 : SM0,SM1,OPT,NF,NF_R,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SAL, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+24142, 72, 916}, + /* 125 : SAL reg64,reg32 [r+mv: evex.lz.66.0f38.w1 f7 /r ] ND,SM0,OPT,NF,NF_R,LONG,PROT,BMI2,APX,X86_64 */ + /* 241(f2 fd 08) 300 001(f7) 100 : SM0,OPT,NF,NF_R,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SAL, 2, {REG_GPR|BITS64,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+24151, 73, 916}, + /* 126 : SAL reg64,rm64*,reg64 [rmv: evex.lz.66.0f38.w1 f7 /r ] SM0,ND,SM1,OPT,NF,NF_R,LONG,PROT,BMI2,APX,X86_64 */ + /* 242(f2 fd 08) 300 001(f7) 110 : SM0,SM1,OPT,NF,NF_R,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SAL, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+24142, 72, 920}, + /* 127 : SAL reg64,reg64 [r+mv: evex.lz.66.0f38.w1 f7 /r ] ND,SM0,OPT,NF,NF_R,LONG,PROT,BMI2,APX,X86_64 */ + /* 241(f2 fd 08) 300 001(f7) 100 : SM0,OPT,NF,NF_R,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SAL, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+24151, 73, 920}, +}; + +static const struct itemplate instrux_SHR[136] = { + /* 0 : SHR rm8,unity [m-: o8 d0 /5 ] FL,8086 */ + /* 001(d0) 205 : FL,8086 */ + {I_SHR, 2, {RM_GPR|BITS8,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+24003, 56, 535}, + /* 1 : SHR rm16,unity [m-: o16 d1 /5 ] FL,8086 */ + /* 320 001(d1) 205 : FL,8086 */ + {I_SHR, 2, {RM_GPR|BITS16,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11738, 56, 536}, + /* 2 : SHR rm32,unity [m-: o32 d1 /5 ] FL,386 */ + /* 321 001(d1) 205 : FL,386 */ + {I_SHR, 2, {RM_GPR|BITS32,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11768, 57, 537}, + /* 3 : SHR rm64,unity [m-: o64 d1 /5 ] LONG,FL,PROT,X86_64 */ + /* 324 001(d1) 205 : LONG,FL,PROT,X86_64 */ + {I_SHR, 2, {RM_GPR|BITS64,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11798, 58, 538}, + /* 4 : SHR rm8,reg_cl [m-: o8 d2 /5 ] FL,8086 */ + /* 001(d2) 205 : FL,8086 */ + {I_SHR, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+24030, 56, 539}, + /* 5 : SHR rm16,reg_cl [m-: o16 d3 /5 ] FL,8086 */ + /* 320 001(d3) 205 : FL,8086 */ + {I_SHR, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11828, 56, 540}, + /* 6 : SHR rm32,reg_cl [m-: o32 d3 /5 ] FL,386 */ + /* 321 001(d3) 205 : FL,386 */ + {I_SHR, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11858, 57, 541}, + /* 7 : SHR rm64,reg_cl [m-: o64 d3 /5 ] LONG,FL,PROT,X86_64 */ + /* 324 001(d3) 205 : LONG,FL,PROT,X86_64 */ + {I_SHR, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11888, 58, 542}, + /* 8 : SHR rm8,reg_cx [m-: o8 d2 /5 ] ND,FL,8086 */ + /* 001(d2) 205 : FL,8086 */ + {I_SHR, 2, {RM_GPR|BITS8,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+24030, 56, 543}, + /* 9 : SHR rm16,reg_cx [m-: o16 d3 /5 ] ND,FL,8086 */ + /* 320 001(d3) 205 : FL,8086 */ + {I_SHR, 2, {RM_GPR|BITS16,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11828, 56, 544}, + /* 10 : SHR rm32,reg_cx [m-: o32 d3 /5 ] ND,FL,386 */ + /* 321 001(d3) 205 : FL,386 */ + {I_SHR, 2, {RM_GPR|BITS32,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11858, 57, 545}, + /* 11 : SHR rm64,reg_cx [m-: o64 d3 /5 ] ND,LONG,FL,PROT,X86_64 */ + /* 324 001(d3) 205 : LONG,FL,PROT,X86_64 */ + {I_SHR, 2, {RM_GPR|BITS64,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11888, 58, 546}, + /* 12 : SHR rm8,reg_ecx [m-: o8 d2 /5 ] ND,FL,8086 */ + /* 001(d2) 205 : FL,8086 */ + {I_SHR, 2, {RM_GPR|BITS8,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+24030, 56, 547}, + /* 13 : SHR rm16,reg_ecx [m-: o16 d3 /5 ] ND,FL,8086 */ + /* 320 001(d3) 205 : FL,8086 */ + {I_SHR, 2, {RM_GPR|BITS16,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11828, 56, 548}, + /* 14 : SHR rm32,reg_ecx [m-: o32 d3 /5 ] ND,FL,386 */ + /* 321 001(d3) 205 : FL,386 */ + {I_SHR, 2, {RM_GPR|BITS32,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11858, 57, 549}, + /* 15 : SHR rm64,reg_ecx [m-: o64 d3 /5 ] ND,LONG,FL,PROT,X86_64 */ + /* 324 001(d3) 205 : LONG,FL,PROT,X86_64 */ + {I_SHR, 2, {RM_GPR|BITS64,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11888, 58, 550}, + /* 16 : SHR rm8,reg_rcx [m-: o8 d2 /5 ] ND,FL,8086 */ + /* 001(d2) 205 : FL,8086 */ + {I_SHR, 2, {RM_GPR|BITS8,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+24030, 56, 551}, + /* 17 : SHR rm16,reg_rcx [m-: o16 d3 /5 ] ND,FL,8086 */ + /* 320 001(d3) 205 : FL,8086 */ + {I_SHR, 2, {RM_GPR|BITS16,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11828, 56, 552}, + /* 18 : SHR rm32,reg_rcx [m-: o32 d3 /5 ] ND,FL,386 */ + /* 321 001(d3) 205 : FL,386 */ + {I_SHR, 2, {RM_GPR|BITS32,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11858, 57, 553}, + /* 19 : SHR rm64,reg_rcx [m-: o64 d3 /5 ] ND,LONG,FL,PROT,X86_64 */ + /* 324 001(d3) 205 : LONG,FL,PROT,X86_64 */ + {I_SHR, 2, {RM_GPR|BITS64,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11888, 58, 554}, + /* 20 : SHR rm8,imm8 [mi: o8 c0 /5 ib,u ] FL,186 */ + /* 001(c0) 205 025 : FL,186 */ + {I_SHR, 2, {RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+11918, 59, 555}, + /* 21 : SHR rm16,imm8 [mi: o16 c1 /5 ib,u ] FL,186 */ + /* 320 001(c1) 205 025 : FL,186 */ + {I_SHR, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1932, 59, 556}, + /* 22 : SHR rm32,imm8 [mi: o32 c1 /5 ib,u ] FL,386 */ + /* 321 001(c1) 205 025 : FL,386 */ + {I_SHR, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1965, 57, 557}, + /* 23 : SHR rm64,imm8 [mi: o64 c1 /5 ib,u ] LONG,FL,PROT,X86_64 */ + /* 324 001(c1) 205 025 : LONG,FL,PROT,X86_64 */ + {I_SHR, 2, {RM_GPR|BITS64,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1998, 58, 558}, + /* 24 : SHR reg32,rm32*,reg8 [rmv: vex.lz.f2.0f38.w0 f7 /r ] SM0,ND,SM1,OPT,NF,NF_R,BMI2,FUTURE */ + /* 262(002 003) 001(f7) 110 : SM0,SM1,OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {I_SHR, 3, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,REG_GPR|BITS8|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55257, 62, 626}, + /* 25 : SHR reg32,reg8 [r+mv: vex.lz.f2.0f38.w0 f7 /r ] SM0,ND,OPT,NF,NF_R,BMI2,FUTURE */ + /* 261(002 003) 001(f7) 100 : SM0,OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {I_SHR, 2, {REG_GPR|BITS32|RN_L16,REG_GPR|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55264, 63, 626}, + /* 26 : SHR reg32,rm32*,reg16 [rmv: vex.lz.f2.0f38.w0 f7 /r ] SM0,ND,SM1,OPT,NF,NF_R,BMI2,FUTURE */ + /* 262(002 003) 001(f7) 110 : SM0,SM1,OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {I_SHR, 3, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,REG_GPR|BITS16|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55257, 62, 630}, + /* 27 : SHR reg32,reg16 [r+mv: vex.lz.f2.0f38.w0 f7 /r ] ND,SM0,OPT,NF,NF_R,BMI2,FUTURE */ + /* 261(002 003) 001(f7) 100 : SM0,OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {I_SHR, 2, {REG_GPR|BITS32|RN_L16,REG_GPR|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55264, 63, 630}, + /* 28 : SHR reg32,rm32*,reg32 [rmv: vex.lz.f2.0f38.w0 f7 /r ] SM0,ND,SM1,OPT,NF,NF_R,BMI2,FUTURE */ + /* 262(002 003) 001(f7) 110 : SM0,SM1,OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {I_SHR, 3, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55257, 62, 634}, + /* 29 : SHR reg32,reg32 [r+mv: vex.lz.f2.0f38.w0 f7 /r ] SM0,ND,OPT,NF,NF_R,BMI2,FUTURE */ + /* 261(002 003) 001(f7) 100 : SM0,OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {I_SHR, 2, {REG_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55264, 63, 634}, + /* 30 : SHR reg32,rm32*,reg64 [rmv: vex.lz.f2.0f38.w0 f7 /r ] ND,SM0,SM1,OPT,NF,NF_R,BMI2,FUTURE */ + /* 262(002 003) 001(f7) 110 : SM0,SM1,OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {I_SHR, 3, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,REG_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55257, 62, 638}, + /* 31 : SHR reg32,reg64 [r+mv: vex.lz.f2.0f38.w0 f7 /r ] SM0,ND,OPT,NF,NF_R,BMI2,FUTURE */ + /* 261(002 003) 001(f7) 100 : SM0,OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {I_SHR, 2, {REG_GPR|BITS32|RN_L16,REG_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55264, 63, 638}, + /* 32 : SHR reg64,rm64*,reg8 [rmv: vex.lz.f2.0f38.w1 f7 /r ] ND,SM0,SM1,OPT,NF,NF_R,BMI2,FUTURE */ + /* 262(002 203) 001(f7) 110 : SM0,SM1,OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {I_SHR, 3, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,REG_GPR|BITS8|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55299, 62, 644}, + /* 33 : SHR reg64,reg8 [r+mv: vex.lz.f2.0f38.w1 f7 /r ] SM0,ND,OPT,NF,NF_R,BMI2,FUTURE */ + /* 261(002 203) 001(f7) 100 : SM0,OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {I_SHR, 2, {REG_GPR|BITS64|RN_L16,REG_GPR|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55306, 63, 644}, + /* 34 : SHR reg64,rm64*,reg16 [rmv: vex.lz.f2.0f38.w1 f7 /r ] SM0,ND,SM1,OPT,NF,NF_R,BMI2,FUTURE */ + /* 262(002 203) 001(f7) 110 : SM0,SM1,OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {I_SHR, 3, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,REG_GPR|BITS16|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55299, 62, 648}, + /* 35 : SHR reg64,reg16 [r+mv: vex.lz.f2.0f38.w1 f7 /r ] ND,SM0,OPT,NF,NF_R,BMI2,FUTURE */ + /* 261(002 203) 001(f7) 100 : SM0,OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {I_SHR, 2, {REG_GPR|BITS64|RN_L16,REG_GPR|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55306, 63, 648}, + /* 36 : SHR reg64,rm64*,reg32 [rmv: vex.lz.f2.0f38.w1 f7 /r ] ND,SM0,SM1,OPT,NF,NF_R,BMI2,FUTURE */ + /* 262(002 203) 001(f7) 110 : SM0,SM1,OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {I_SHR, 3, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55299, 62, 652}, + /* 37 : SHR reg64,reg32 [r+mv: vex.lz.f2.0f38.w1 f7 /r ] ND,SM0,OPT,NF,NF_R,BMI2,FUTURE */ + /* 261(002 203) 001(f7) 100 : SM0,OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {I_SHR, 2, {REG_GPR|BITS64|RN_L16,REG_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55306, 63, 652}, + /* 38 : SHR reg64,rm64*,reg64 [rmv: vex.lz.f2.0f38.w1 f7 /r ] ND,SM0,SM1,OPT,NF,NF_R,BMI2,FUTURE */ + /* 262(002 203) 001(f7) 110 : SM0,SM1,OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {I_SHR, 3, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55299, 62, 656}, + /* 39 : SHR reg64,reg64 [r+mv: vex.lz.f2.0f38.w1 f7 /r ] ND,SM0,OPT,NF,NF_R,BMI2,FUTURE */ + /* 261(002 203) 001(f7) 100 : SM0,OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {I_SHR, 2, {REG_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55306, 63, 656}, + /* 40 : SHR reg8?,rm8,unity [vm-: evex.nd1.nf.l0.m4.o8 d0 /5 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d0) 215 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 3, {REG_GPR|BITS8,RM_GPR|BITS8,UNITY|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+23980, 37, 803}, + /* 41 : SHR rm8,unity [m-: evex.nd0.nf.l0.m4.o8 d0 /5 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(d0) 205 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 2, {RM_GPR|BITS8,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+23989, 64, 803}, + /* 42 : SHR reg8?,unity [v+m-: evex.nd1.nf.l0.m4.o8 d0 /5 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d0) 205 : SM0,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 2, {REG_GPR|BITS8,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+23998, 65, 803}, + /* 43 : SHR reg16?,rm16,unity [vm-: evex.nd1.nf.l0.m4.o16 d1 /5 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d1) 215 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 3, {REG_GPR|BITS16,RM_GPR|BITS16,UNITY|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+11713, 40, 804}, + /* 44 : SHR rm16,unity [m-: evex.nd0.nf.l0.m4.o16 d1 /5 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(d1) 205 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 2, {RM_GPR|BITS16,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11723, 66, 804}, + /* 45 : SHR reg16?,unity [v+m-: evex.nd1.nf.l0.m4.o16 d1 /5 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d1) 205 : SM0,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 2, {REG_GPR|BITS16,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11733, 67, 804}, + /* 46 : SHR reg32?,rm32,unity [vm-: evex.nd1.nf.l0.m4.o32 d1 /5 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d1) 215 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 3, {REG_GPR|BITS32,RM_GPR|BITS32,UNITY|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+11743, 43, 805}, + /* 47 : SHR rm32,unity [m-: evex.nd0.nf.l0.m4.o32 d1 /5 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(d1) 205 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 2, {RM_GPR|BITS32,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11753, 68, 805}, + /* 48 : SHR reg32?,unity [v+m-: evex.nd1.nf.l0.m4.o32 d1 /5 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d1) 205 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 2, {REG_GPR|BITS32,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11763, 69, 805}, + /* 49 : SHR reg64?,rm64,unity [vm-: evex.nd1.nf.l0.m4.o64 d1 /5 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d1) 215 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 3, {REG_GPR|BITS64,RM_GPR|BITS64,UNITY|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+11773, 43, 806}, + /* 50 : SHR rm64,unity [m-: evex.nd0.nf.l0.m4.o64 d1 /5 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(d1) 205 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 2, {RM_GPR|BITS64,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11783, 68, 806}, + /* 51 : SHR reg64?,unity [v+m-: evex.nd1.nf.l0.m4.o64 d1 /5 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d1) 205 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 2, {REG_GPR|BITS64,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11793, 69, 806}, + /* 52 : SHR reg8?,rm8,reg_cl [vm-: evex.nd1.nf.l0.m4.o8 d2 /5 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d2) 215 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 3, {REG_GPR|BITS8,RM_GPR|BITS8,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+24007, 37, 807}, + /* 53 : SHR rm8,reg_cl [m-: evex.nd0.nf.l0.m4.o8 d2 /5 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(d2) 205 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+24016, 64, 807}, + /* 54 : SHR reg8?,reg_cl [v+m-: evex.nd1.nf.l0.m4.o8 d2 /5 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d2) 205 : SM0,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 2, {REG_GPR|BITS8,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+24025, 65, 807}, + /* 55 : SHR reg16?,rm16,reg_cl [vm-: evex.nd1.nf.l0.m4.o16 d3 /5 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d3) 215 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 3, {REG_GPR|BITS16,RM_GPR|BITS16,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+11803, 40, 808}, + /* 56 : SHR rm16,reg_cl [m-: evex.nd0.nf.l0.m4.o16 d3 /5 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(d3) 205 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11813, 66, 808}, + /* 57 : SHR reg16?,reg_cl [v+m-: evex.nd1.nf.l0.m4.o16 d3 /5 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d3) 205 : SM0,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 2, {REG_GPR|BITS16,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11823, 67, 808}, + /* 58 : SHR reg32?,rm32,reg_cl [vm-: evex.nd1.nf.l0.m4.o32 d3 /5 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d3) 215 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+11833, 43, 809}, + /* 59 : SHR rm32,reg_cl [m-: evex.nd0.nf.l0.m4.o32 d3 /5 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(d3) 205 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11843, 68, 809}, + /* 60 : SHR reg32?,reg_cl [v+m-: evex.nd1.nf.l0.m4.o32 d3 /5 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d3) 205 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 2, {REG_GPR|BITS32,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11853, 69, 809}, + /* 61 : SHR reg64?,rm64,reg_cl [vm-: evex.nd1.nf.l0.m4.o64 d3 /5 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d3) 215 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+11863, 43, 810}, + /* 62 : SHR rm64,reg_cl [m-: evex.nd0.nf.l0.m4.o64 d3 /5 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(d3) 205 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11873, 68, 810}, + /* 63 : SHR reg64?,reg_cl [v+m-: evex.nd1.nf.l0.m4.o64 d3 /5 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d3) 205 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 2, {REG_GPR|BITS64,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11883, 69, 810}, + /* 64 : SHR reg8?,rm8,reg_cx [vm-: evex.nd1.nf.l0.m4.o8 d2 /5 ] ND,SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d2) 215 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 3, {REG_GPR|BITS8,RM_GPR|BITS8,REG_CX,0,0}, NO_DECORATOR, nasm_bytecodes+24007, 37, 811}, + /* 65 : SHR rm8,reg_cx [m-: evex.nd0.nf.l0.m4.o8 d2 /5 ] SM0,ND,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(d2) 205 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 2, {RM_GPR|BITS8,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+24016, 64, 811}, + /* 66 : SHR reg8?,reg_cx [v+m-: evex.nd1.nf.l0.m4.o8 d2 /5 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d2) 205 : SM0,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 2, {REG_GPR|BITS8,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+24025, 65, 811}, + /* 67 : SHR reg16?,rm16,reg_cx [vm-: evex.nd1.nf.l0.m4.o16 d3 /5 ] ND,SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d3) 215 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 3, {REG_GPR|BITS16,RM_GPR|BITS16,REG_CX,0,0}, NO_DECORATOR, nasm_bytecodes+11803, 40, 812}, + /* 68 : SHR rm16,reg_cx [m-: evex.nd0.nf.l0.m4.o16 d3 /5 ] SM0,ND,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(d3) 205 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 2, {RM_GPR|BITS16,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11813, 66, 812}, + /* 69 : SHR reg16?,reg_cx [v+m-: evex.nd1.nf.l0.m4.o16 d3 /5 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d3) 205 : SM0,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 2, {REG_GPR|BITS16,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11823, 67, 812}, + /* 70 : SHR reg32?,rm32,reg_cx [vm-: evex.nd1.nf.l0.m4.o32 d3 /5 ] SM0,ND,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d3) 215 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_CX,0,0}, NO_DECORATOR, nasm_bytecodes+11833, 43, 813}, + /* 71 : SHR rm32,reg_cx [m-: evex.nd0.nf.l0.m4.o32 d3 /5 ] ND,SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(d3) 205 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 2, {RM_GPR|BITS32,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11843, 68, 813}, + /* 72 : SHR reg32?,reg_cx [v+m-: evex.nd1.nf.l0.m4.o32 d3 /5 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d3) 205 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 2, {REG_GPR|BITS32,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11853, 69, 813}, + /* 73 : SHR reg64?,rm64,reg_cx [vm-: evex.nd1.nf.l0.m4.o64 d3 /5 ] SM0,ND,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d3) 215 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_CX,0,0}, NO_DECORATOR, nasm_bytecodes+11863, 43, 814}, + /* 74 : SHR rm64,reg_cx [m-: evex.nd0.nf.l0.m4.o64 d3 /5 ] ND,SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(d3) 205 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 2, {RM_GPR|BITS64,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11873, 68, 814}, + /* 75 : SHR reg64?,reg_cx [v+m-: evex.nd1.nf.l0.m4.o64 d3 /5 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d3) 205 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 2, {REG_GPR|BITS64,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11883, 69, 814}, + /* 76 : SHR reg8?,rm8,reg_ecx [vm-: evex.nd1.nf.l0.m4.o8 d2 /5 ] ND,SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d2) 215 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 3, {REG_GPR|BITS8,RM_GPR|BITS8,REG_ECX,0,0}, NO_DECORATOR, nasm_bytecodes+24007, 37, 815}, + /* 77 : SHR rm8,reg_ecx [m-: evex.nd0.nf.l0.m4.o8 d2 /5 ] SM0,ND,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(d2) 205 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 2, {RM_GPR|BITS8,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+24016, 64, 815}, + /* 78 : SHR reg8?,reg_ecx [v+m-: evex.nd1.nf.l0.m4.o8 d2 /5 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d2) 205 : SM0,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 2, {REG_GPR|BITS8,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+24025, 65, 815}, + /* 79 : SHR reg16?,rm16,reg_ecx [vm-: evex.nd1.nf.l0.m4.o16 d3 /5 ] ND,SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d3) 215 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 3, {REG_GPR|BITS16,RM_GPR|BITS16,REG_ECX,0,0}, NO_DECORATOR, nasm_bytecodes+11803, 40, 816}, + /* 80 : SHR rm16,reg_ecx [m-: evex.nd0.nf.l0.m4.o16 d3 /5 ] SM0,ND,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(d3) 205 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 2, {RM_GPR|BITS16,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11813, 66, 816}, + /* 81 : SHR reg16?,reg_ecx [v+m-: evex.nd1.nf.l0.m4.o16 d3 /5 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d3) 205 : SM0,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 2, {REG_GPR|BITS16,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11823, 67, 816}, + /* 82 : SHR reg32?,rm32,reg_ecx [vm-: evex.nd1.nf.l0.m4.o32 d3 /5 ] ND,SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d3) 215 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_ECX,0,0}, NO_DECORATOR, nasm_bytecodes+11833, 43, 817}, + /* 83 : SHR rm32,reg_ecx [m-: evex.nd0.nf.l0.m4.o32 d3 /5 ] ND,SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(d3) 205 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 2, {RM_GPR|BITS32,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11843, 68, 817}, + /* 84 : SHR reg32?,reg_ecx [v+m-: evex.nd1.nf.l0.m4.o32 d3 /5 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d3) 205 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 2, {REG_GPR|BITS32,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11853, 69, 817}, + /* 85 : SHR reg64?,rm64,reg_ecx [vm-: evex.nd1.nf.l0.m4.o64 d3 /5 ] SM0,ND,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d3) 215 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_ECX,0,0}, NO_DECORATOR, nasm_bytecodes+11863, 43, 818}, + /* 86 : SHR rm64,reg_ecx [m-: evex.nd0.nf.l0.m4.o64 d3 /5 ] SM0,ND,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(d3) 205 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 2, {RM_GPR|BITS64,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11873, 68, 818}, + /* 87 : SHR reg64?,reg_ecx [v+m-: evex.nd1.nf.l0.m4.o64 d3 /5 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d3) 205 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 2, {REG_GPR|BITS64,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11883, 69, 818}, + /* 88 : SHR reg8?,rm8,reg_rcx [vm-: evex.nd1.nf.l0.m4.o8 d2 /5 ] ND,SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d2) 215 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 3, {REG_GPR|BITS8,RM_GPR|BITS8,REG_RCX,0,0}, NO_DECORATOR, nasm_bytecodes+24007, 37, 819}, + /* 89 : SHR rm8,reg_rcx [m-: evex.nd0.nf.l0.m4.o8 d2 /5 ] SM0,ND,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(d2) 205 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 2, {RM_GPR|BITS8,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+24016, 64, 819}, + /* 90 : SHR reg8?,reg_rcx [v+m-: evex.nd1.nf.l0.m4.o8 d2 /5 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d2) 205 : SM0,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 2, {REG_GPR|BITS8,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+24025, 65, 819}, + /* 91 : SHR reg16?,rm16,reg_rcx [vm-: evex.nd1.nf.l0.m4.o16 d3 /5 ] ND,SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d3) 215 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 3, {REG_GPR|BITS16,RM_GPR|BITS16,REG_RCX,0,0}, NO_DECORATOR, nasm_bytecodes+11803, 40, 820}, + /* 92 : SHR rm16,reg_rcx [m-: evex.nd0.nf.l0.m4.o16 d3 /5 ] ND,SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(d3) 205 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 2, {RM_GPR|BITS16,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11813, 66, 820}, + /* 93 : SHR reg16?,reg_rcx [v+m-: evex.nd1.nf.l0.m4.o16 d3 /5 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d3) 205 : SM0,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 2, {REG_GPR|BITS16,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11823, 67, 820}, + /* 94 : SHR reg32?,rm32,reg_rcx [vm-: evex.nd1.nf.l0.m4.o32 d3 /5 ] ND,SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d3) 215 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_RCX,0,0}, NO_DECORATOR, nasm_bytecodes+11833, 43, 821}, + /* 95 : SHR rm32,reg_rcx [m-: evex.nd0.nf.l0.m4.o32 d3 /5 ] ND,SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(d3) 205 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 2, {RM_GPR|BITS32,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11843, 68, 821}, + /* 96 : SHR reg32?,reg_rcx [v+m-: evex.nd1.nf.l0.m4.o32 d3 /5 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d3) 205 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 2, {REG_GPR|BITS32,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11853, 69, 821}, + /* 97 : SHR reg64?,rm64,reg_rcx [vm-: evex.nd1.nf.l0.m4.o64 d3 /5 ] SM0,ND,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d3) 215 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_RCX,0,0}, NO_DECORATOR, nasm_bytecodes+11863, 43, 822}, + /* 98 : SHR rm64,reg_rcx [m-: evex.nd0.nf.l0.m4.o64 d3 /5 ] SM0,ND,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(d3) 205 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 2, {RM_GPR|BITS64,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11873, 68, 822}, + /* 99 : SHR reg64?,reg_rcx [v+m-: evex.nd1.nf.l0.m4.o64 d3 /5 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d3) 205 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 2, {REG_GPR|BITS64,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+11883, 69, 822}, + /* 100 : SHR reg8?,rm8,imm8 [vmi: evex.nd1.nf.l0.m4.o8 c0 /5 ib,u ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(c0) 215 026 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 3, {REG_GPR|BITS8,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+11893, 37, 823}, + /* 101 : SHR rm8,imm8 [mi: evex.nd0.nf.l0.m4.o8 c0 /5 ib,u ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(c0) 205 025 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 2, {RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+11903, 64, 823}, + /* 102 : SHR reg8?,imm8 [v+mi: evex.nd1.nf.l0.m4.o8 c0 /5 ib,u ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(c0) 205 025 : SM0,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 2, {REG_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+11913, 65, 823}, + /* 103 : SHR reg16?,rm16,imm8 [vmi: evex.nd1.nf.l0.m4.o16 c1 /5 ib,u ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(c1) 215 026 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 3, {REG_GPR|BITS16,RM_GPR|BITS16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+1905, 40, 824}, + /* 104 : SHR rm16,imm8 [mi: evex.nd0.nf.l0.m4.o16 c1 /5 ib,u ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(c1) 205 025 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1916, 66, 824}, + /* 105 : SHR reg16?,imm8 [v+mi: evex.nd1.nf.l0.m4.o16 c1 /5 ib,u ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(c1) 205 025 : SM0,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 2, {REG_GPR|BITS16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1927, 67, 824}, + /* 106 : SHR reg32?,rm32,imm8 [vmi: evex.nd1.nf.l0.m4.o32 c1 /5 ib,u ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(c1) 215 026 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 3, {REG_GPR|BITS32,RM_GPR|BITS32,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+1938, 43, 825}, + /* 107 : SHR rm32,imm8 [mi: evex.nd0.nf.l0.m4.o32 c1 /5 ib,u ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(c1) 205 025 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1949, 68, 825}, + /* 108 : SHR reg32?,imm8 [v+mi: evex.nd1.nf.l0.m4.o32 c1 /5 ib,u ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(c1) 205 025 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 2, {REG_GPR|BITS32,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1960, 69, 825}, + /* 109 : SHR reg64?,rm64,imm8 [vmi: evex.nd1.nf.l0.m4.o64 c1 /5 ib,u ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(c1) 215 026 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 3, {REG_GPR|BITS64,RM_GPR|BITS64,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+1971, 43, 826}, + /* 110 : SHR rm64,imm8 [mi: evex.nd0.nf.l0.m4.o64 c1 /5 ib,u ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(c1) 205 025 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 2, {RM_GPR|BITS64,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1982, 68, 826}, + /* 111 : SHR reg64?,imm8 [v+mi: evex.nd1.nf.l0.m4.o64 c1 /5 ib,u ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(c1) 205 025 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 2, {REG_GPR|BITS64,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1993, 69, 826}, + /* 112 : SHR reg32,rm32*,reg8 [rmv: evex.lz.f2.0f38.w0 f7 /r ] SM0,ND,SM1,OPT,NF,NF_R,LONG,PROT,BMI2,APX,X86_64 */ + /* 242(f2 7f 08) 300 001(f7) 110 : SM0,SM1,OPT,NF,NF_R,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SHR, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24124, 72, 892}, + /* 113 : SHR reg32,reg8 [r+mv: evex.lz.f2.0f38.w0 f7 /r ] ND,SM0,OPT,NF,NF_R,LONG,PROT,BMI2,APX,X86_64 */ + /* 241(f2 7f 08) 300 001(f7) 100 : SM0,OPT,NF,NF_R,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SHR, 2, {REG_GPR|BITS32,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+24133, 73, 892}, + /* 114 : SHR reg32,rm32*,reg16 [rmv: evex.lz.f2.0f38.w0 f7 /r ] ND,SM0,SM1,OPT,NF,NF_R,LONG,PROT,BMI2,APX,X86_64 */ + /* 242(f2 7f 08) 300 001(f7) 110 : SM0,SM1,OPT,NF,NF_R,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SHR, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+24124, 72, 896}, + /* 115 : SHR reg32,reg16 [r+mv: evex.lz.f2.0f38.w0 f7 /r ] SM0,ND,OPT,NF,NF_R,LONG,PROT,BMI2,APX,X86_64 */ + /* 241(f2 7f 08) 300 001(f7) 100 : SM0,OPT,NF,NF_R,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SHR, 2, {REG_GPR|BITS32,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+24133, 73, 896}, + /* 116 : SHR reg32,rm32*,reg32 [rmv: evex.lz.f2.0f38.w0 f7 /r ] ND,SM0,SM1,OPT,NF,NF_R,LONG,PROT,BMI2,APX,X86_64 */ + /* 242(f2 7f 08) 300 001(f7) 110 : SM0,SM1,OPT,NF,NF_R,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SHR, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+24124, 72, 900}, + /* 117 : SHR reg32,reg32 [r+mv: evex.lz.f2.0f38.w0 f7 /r ] ND,SM0,OPT,NF,NF_R,LONG,PROT,BMI2,APX,X86_64 */ + /* 241(f2 7f 08) 300 001(f7) 100 : SM0,OPT,NF,NF_R,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SHR, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+24133, 73, 900}, + /* 118 : SHR reg32,rm32*,reg64 [rmv: evex.lz.f2.0f38.w0 f7 /r ] SM0,ND,SM1,OPT,NF,NF_R,LONG,PROT,BMI2,APX,X86_64 */ + /* 242(f2 7f 08) 300 001(f7) 110 : SM0,SM1,OPT,NF,NF_R,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SHR, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+24124, 72, 904}, + /* 119 : SHR reg32,reg64 [r+mv: evex.lz.f2.0f38.w0 f7 /r ] ND,SM0,OPT,NF,NF_R,LONG,PROT,BMI2,APX,X86_64 */ + /* 241(f2 7f 08) 300 001(f7) 100 : SM0,OPT,NF,NF_R,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SHR, 2, {REG_GPR|BITS32,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+24133, 73, 904}, + /* 120 : SHR reg64,rm64*,reg8 [rmv: evex.lz.f2.0f38.w1 f7 /r ] ND,SM0,SM1,OPT,NF,NF_R,LONG,PROT,BMI2,APX,X86_64 */ + /* 242(f2 ff 08) 300 001(f7) 110 : SM0,SM1,OPT,NF,NF_R,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SHR, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24178, 72, 910}, + /* 121 : SHR reg64,reg8 [r+mv: evex.lz.f2.0f38.w1 f7 /r ] SM0,ND,OPT,NF,NF_R,LONG,PROT,BMI2,APX,X86_64 */ + /* 241(f2 ff 08) 300 001(f7) 100 : SM0,OPT,NF,NF_R,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SHR, 2, {REG_GPR|BITS64,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+24187, 73, 910}, + /* 122 : SHR reg64,rm64*,reg16 [rmv: evex.lz.f2.0f38.w1 f7 /r ] ND,SM0,SM1,OPT,NF,NF_R,LONG,PROT,BMI2,APX,X86_64 */ + /* 242(f2 ff 08) 300 001(f7) 110 : SM0,SM1,OPT,NF,NF_R,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SHR, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+24178, 72, 914}, + /* 123 : SHR reg64,reg16 [r+mv: evex.lz.f2.0f38.w1 f7 /r ] SM0,ND,OPT,NF,NF_R,LONG,PROT,BMI2,APX,X86_64 */ + /* 241(f2 ff 08) 300 001(f7) 100 : SM0,OPT,NF,NF_R,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SHR, 2, {REG_GPR|BITS64,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+24187, 73, 914}, + /* 124 : SHR reg64,rm64*,reg32 [rmv: evex.lz.f2.0f38.w1 f7 /r ] SM0,ND,SM1,OPT,NF,NF_R,LONG,PROT,BMI2,APX,X86_64 */ + /* 242(f2 ff 08) 300 001(f7) 110 : SM0,SM1,OPT,NF,NF_R,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SHR, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+24178, 72, 918}, + /* 125 : SHR reg64,reg32 [r+mv: evex.lz.f2.0f38.w1 f7 /r ] ND,SM0,OPT,NF,NF_R,LONG,PROT,BMI2,APX,X86_64 */ + /* 241(f2 ff 08) 300 001(f7) 100 : SM0,OPT,NF,NF_R,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SHR, 2, {REG_GPR|BITS64,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+24187, 73, 918}, + /* 126 : SHR reg64,rm64*,reg64 [rmv: evex.lz.f2.0f38.w1 f7 /r ] ND,SM0,SM1,OPT,NF,NF_R,LONG,PROT,BMI2,APX,X86_64 */ + /* 242(f2 ff 08) 300 001(f7) 110 : SM0,SM1,OPT,NF,NF_R,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SHR, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+24178, 72, 922}, + /* 127 : SHR reg64,reg64 [r+mv: evex.lz.f2.0f38.w1 f7 /r ] ND,SM0,OPT,NF,NF_R,LONG,PROT,BMI2,APX,X86_64 */ + /* 241(f2 ff 08) 300 001(f7) 100 : SM0,OPT,NF,NF_R,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SHR, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+24187, 73, 922}, + /* 128 : SHR kreg8,kreg8,imm8 [rmi: vex.l0.66.0f3a.w0 30 /r ib ] ND,SM0-1,ZU,FL,AVX512DQ,FUTURE */ + /* 270(003 001) 001(30) 110 022 : SM0,SM1,NOAPX,ZU,FL,VEX,AVX512DQ,FUTURE */ + {I_SHR, 3, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54747, 517, 4647}, + /* 129 : SHR kreg8,kreg8,imm8 [rmi: evex.l0.66.0f3a.w0 30 /r ib ] ND,SM0-1,ZU,FL,AVX512DQ,FUTURE,APX */ + /* 250(f3 7d 08) 300 001(30) 110 022 : SM0,SM1,ZU,LONG,FL,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_SHR, 3, {OPMASKREG|BITS8,OPMASKREG|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18093, 518, 4647}, + /* 130 : SHR kreg16,kreg16,imm8 [rmi: vex.l0.66.0f3a.w1 30 /r ib ] ND,SM0-1,ZU,FL,AVX512F,FUTURE */ + /* 270(003 201) 001(30) 110 022 : SM0,SM1,NOAPX,ZU,FL,VEX,AVX512F,FUTURE */ + {I_SHR, 3, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54755, 529, 4648}, + /* 131 : SHR kreg16,kreg16,imm8 [rmi: evex.l0.66.0f3a.w1 30 /r ib ] ND,SM0-1,ZU,FL,AVX512F,FUTURE,APX */ + /* 250(f3 fd 08) 300 001(30) 110 022 : SM0,SM1,ZU,LONG,FL,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_SHR, 3, {OPMASKREG|BITS16,OPMASKREG|BITS16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18103, 530, 4648}, + /* 132 : SHR kreg32,kreg32,imm8 [rmi: vex.l0.66.0f3a.w0 31 /r ib ] ND,SM0-1,ZU,FL,AVX512BW,FUTURE */ + /* 270(003 001) 001(31) 110 022 : SM0,SM1,NOAPX,ZU,FL,VEX,AVX512BW,FUTURE */ + {I_SHR, 3, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54763, 521, 4649}, + /* 133 : SHR kreg32,kreg32,imm8 [rmi: evex.l0.66.0f3a.w0 31 /r ib ] ND,SM0-1,ZU,FL,AVX512BW,FUTURE,APX */ + /* 250(f3 7d 08) 300 001(31) 110 022 : SM0,SM1,ZU,LONG,FL,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_SHR, 3, {OPMASKREG|BITS32,OPMASKREG|BITS32,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18113, 522, 4649}, + /* 134 : SHR kreg64,kreg64,imm8 [rmi: vex.l0.66.0f3a.w1 31 /r ib ] SM0,ND,SM1,ZU,FL,AVX512BW,FUTURE */ + /* 270(003 201) 001(31) 110 022 : SM0,SM1,NOAPX,ZU,FL,VEX,AVX512BW,FUTURE */ + {I_SHR, 3, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54771, 521, 4650}, + /* 135 : SHR kreg64,kreg64,imm8 [rmi: evex.l0.66.0f3a.w1 31 /r ib ] SM0,ND,SM1,ZU,FL,AVX512BW,FUTURE,APX */ + /* 250(f3 fd 08) 300 001(31) 110 022 : SM0,SM1,ZU,LONG,FL,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_SHR, 3, {OPMASKREG|BITS64,OPMASKREG|BITS64,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18123, 522, 4650}, +}; + +static const struct itemplate instrux_SAR[128] = { + /* 0 : SAR rm8,unity [m-: o8 d0 /7 ] FL,8086 */ + /* 001(d0) 207 : FL,8086 */ + {I_SAR, 2, {RM_GPR|BITS8,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+24057, 56, 559}, + /* 1 : SAR rm16,unity [m-: o16 d1 /7 ] FL,8086 */ + /* 320 001(d1) 207 : FL,8086 */ + {I_SAR, 2, {RM_GPR|BITS16,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11948, 56, 560}, + /* 2 : SAR rm32,unity [m-: o32 d1 /7 ] FL,386 */ + /* 321 001(d1) 207 : FL,386 */ + {I_SAR, 2, {RM_GPR|BITS32,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11978, 57, 561}, + /* 3 : SAR rm64,unity [m-: o64 d1 /7 ] LONG,FL,PROT,X86_64 */ + /* 324 001(d1) 207 : LONG,FL,PROT,X86_64 */ + {I_SAR, 2, {RM_GPR|BITS64,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+12008, 58, 562}, + /* 4 : SAR rm8,reg_cl [m-: o8 d2 /7 ] FL,8086 */ + /* 001(d2) 207 : FL,8086 */ + {I_SAR, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+24084, 56, 563}, + /* 5 : SAR rm16,reg_cl [m-: o16 d3 /7 ] FL,8086 */ + /* 320 001(d3) 207 : FL,8086 */ + {I_SAR, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+12038, 56, 564}, + /* 6 : SAR rm32,reg_cl [m-: o32 d3 /7 ] FL,386 */ + /* 321 001(d3) 207 : FL,386 */ + {I_SAR, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+12068, 57, 565}, + /* 7 : SAR rm64,reg_cl [m-: o64 d3 /7 ] LONG,FL,PROT,X86_64 */ + /* 324 001(d3) 207 : LONG,FL,PROT,X86_64 */ + {I_SAR, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+12098, 58, 566}, + /* 8 : SAR rm8,reg_cx [m-: o8 d2 /7 ] ND,FL,8086 */ + /* 001(d2) 207 : FL,8086 */ + {I_SAR, 2, {RM_GPR|BITS8,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+24084, 56, 567}, + /* 9 : SAR rm16,reg_cx [m-: o16 d3 /7 ] ND,FL,8086 */ + /* 320 001(d3) 207 : FL,8086 */ + {I_SAR, 2, {RM_GPR|BITS16,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12038, 56, 568}, + /* 10 : SAR rm32,reg_cx [m-: o32 d3 /7 ] ND,FL,386 */ + /* 321 001(d3) 207 : FL,386 */ + {I_SAR, 2, {RM_GPR|BITS32,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12068, 57, 569}, + /* 11 : SAR rm64,reg_cx [m-: o64 d3 /7 ] ND,LONG,FL,PROT,X86_64 */ + /* 324 001(d3) 207 : LONG,FL,PROT,X86_64 */ + {I_SAR, 2, {RM_GPR|BITS64,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12098, 58, 570}, + /* 12 : SAR rm8,reg_ecx [m-: o8 d2 /7 ] ND,FL,8086 */ + /* 001(d2) 207 : FL,8086 */ + {I_SAR, 2, {RM_GPR|BITS8,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+24084, 56, 571}, + /* 13 : SAR rm16,reg_ecx [m-: o16 d3 /7 ] ND,FL,8086 */ + /* 320 001(d3) 207 : FL,8086 */ + {I_SAR, 2, {RM_GPR|BITS16,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12038, 56, 572}, + /* 14 : SAR rm32,reg_ecx [m-: o32 d3 /7 ] ND,FL,386 */ + /* 321 001(d3) 207 : FL,386 */ + {I_SAR, 2, {RM_GPR|BITS32,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12068, 57, 573}, + /* 15 : SAR rm64,reg_ecx [m-: o64 d3 /7 ] ND,LONG,FL,PROT,X86_64 */ + /* 324 001(d3) 207 : LONG,FL,PROT,X86_64 */ + {I_SAR, 2, {RM_GPR|BITS64,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12098, 58, 574}, + /* 16 : SAR rm8,reg_rcx [m-: o8 d2 /7 ] ND,FL,8086 */ + /* 001(d2) 207 : FL,8086 */ + {I_SAR, 2, {RM_GPR|BITS8,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+24084, 56, 575}, + /* 17 : SAR rm16,reg_rcx [m-: o16 d3 /7 ] ND,FL,8086 */ + /* 320 001(d3) 207 : FL,8086 */ + {I_SAR, 2, {RM_GPR|BITS16,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12038, 56, 576}, + /* 18 : SAR rm32,reg_rcx [m-: o32 d3 /7 ] ND,FL,386 */ + /* 321 001(d3) 207 : FL,386 */ + {I_SAR, 2, {RM_GPR|BITS32,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12068, 57, 577}, + /* 19 : SAR rm64,reg_rcx [m-: o64 d3 /7 ] ND,LONG,FL,PROT,X86_64 */ + /* 324 001(d3) 207 : LONG,FL,PROT,X86_64 */ + {I_SAR, 2, {RM_GPR|BITS64,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12098, 58, 578}, + /* 20 : SAR rm8,imm8 [mi: o8 c0 /7 ib,u ] FL,186 */ + /* 001(c0) 207 025 : FL,186 */ + {I_SAR, 2, {RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+12128, 59, 579}, + /* 21 : SAR rm16,imm8 [mi: o16 c1 /7 ib,u ] FL,186 */ + /* 320 001(c1) 207 025 : FL,186 */ + {I_SAR, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+2031, 59, 580}, + /* 22 : SAR rm32,imm8 [mi: o32 c1 /7 ib,u ] FL,386 */ + /* 321 001(c1) 207 025 : FL,386 */ + {I_SAR, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+2064, 57, 581}, + /* 23 : SAR rm64,imm8 [mi: o64 c1 /7 ib,u ] LONG,FL,PROT,X86_64 */ + /* 324 001(c1) 207 025 : LONG,FL,PROT,X86_64 */ + {I_SAR, 2, {RM_GPR|BITS64,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+2097, 58, 582}, + /* 24 : SAR reg32,rm32*,reg8 [rmv: vex.lz.f3.0f38.w0 f7 /r ] ND,SM0,SM1,OPT,NF,NF_R,BMI2,FUTURE */ + /* 262(002 002) 001(f7) 110 : SM0,SM1,OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {I_SAR, 3, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,REG_GPR|BITS8|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55243, 62, 625}, + /* 25 : SAR reg32,reg8 [r+mv: vex.lz.f3.0f38.w0 f7 /r ] ND,SM0,OPT,NF,NF_R,BMI2,FUTURE */ + /* 261(002 002) 001(f7) 100 : SM0,OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {I_SAR, 2, {REG_GPR|BITS32|RN_L16,REG_GPR|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55250, 63, 625}, + /* 26 : SAR reg32,rm32*,reg16 [rmv: vex.lz.f3.0f38.w0 f7 /r ] SM0,ND,SM1,OPT,NF,NF_R,BMI2,FUTURE */ + /* 262(002 002) 001(f7) 110 : SM0,SM1,OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {I_SAR, 3, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,REG_GPR|BITS16|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55243, 62, 629}, + /* 27 : SAR reg32,reg16 [r+mv: vex.lz.f3.0f38.w0 f7 /r ] ND,SM0,OPT,NF,NF_R,BMI2,FUTURE */ + /* 261(002 002) 001(f7) 100 : SM0,OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {I_SAR, 2, {REG_GPR|BITS32|RN_L16,REG_GPR|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55250, 63, 629}, + /* 28 : SAR reg32,rm32*,reg32 [rmv: vex.lz.f3.0f38.w0 f7 /r ] SM0,ND,SM1,OPT,NF,NF_R,BMI2,FUTURE */ + /* 262(002 002) 001(f7) 110 : SM0,SM1,OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {I_SAR, 3, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55243, 62, 633}, + /* 29 : SAR reg32,reg32 [r+mv: vex.lz.f3.0f38.w0 f7 /r ] ND,SM0,OPT,NF,NF_R,BMI2,FUTURE */ + /* 261(002 002) 001(f7) 100 : SM0,OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {I_SAR, 2, {REG_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55250, 63, 633}, + /* 30 : SAR reg32,rm32*,reg64 [rmv: vex.lz.f3.0f38.w0 f7 /r ] ND,SM0,SM1,OPT,NF,NF_R,BMI2,FUTURE */ + /* 262(002 002) 001(f7) 110 : SM0,SM1,OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {I_SAR, 3, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,REG_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55243, 62, 637}, + /* 31 : SAR reg32,reg64 [r+mv: vex.lz.f3.0f38.w0 f7 /r ] SM0,ND,OPT,NF,NF_R,BMI2,FUTURE */ + /* 261(002 002) 001(f7) 100 : SM0,OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {I_SAR, 2, {REG_GPR|BITS32|RN_L16,REG_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55250, 63, 637}, + /* 32 : SAR reg64,rm64*,reg8 [rmv: vex.lz.f3.0f38.w1 f7 /r ] SM0,ND,SM1,OPT,NF,NF_R,BMI2,FUTURE */ + /* 262(002 202) 001(f7) 110 : SM0,SM1,OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {I_SAR, 3, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,REG_GPR|BITS8|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55285, 62, 643}, + /* 33 : SAR reg64,reg8 [r+mv: vex.lz.f3.0f38.w1 f7 /r ] SM0,ND,OPT,NF,NF_R,BMI2,FUTURE */ + /* 261(002 202) 001(f7) 100 : SM0,OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {I_SAR, 2, {REG_GPR|BITS64|RN_L16,REG_GPR|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55292, 63, 643}, + /* 34 : SAR reg64,rm64*,reg16 [rmv: vex.lz.f3.0f38.w1 f7 /r ] ND,SM0,SM1,OPT,NF,NF_R,BMI2,FUTURE */ + /* 262(002 202) 001(f7) 110 : SM0,SM1,OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {I_SAR, 3, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,REG_GPR|BITS16|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55285, 62, 647}, + /* 35 : SAR reg64,reg16 [r+mv: vex.lz.f3.0f38.w1 f7 /r ] ND,SM0,OPT,NF,NF_R,BMI2,FUTURE */ + /* 261(002 202) 001(f7) 100 : SM0,OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {I_SAR, 2, {REG_GPR|BITS64|RN_L16,REG_GPR|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55292, 63, 647}, + /* 36 : SAR reg64,rm64*,reg32 [rmv: vex.lz.f3.0f38.w1 f7 /r ] ND,SM0,SM1,OPT,NF,NF_R,BMI2,FUTURE */ + /* 262(002 202) 001(f7) 110 : SM0,SM1,OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {I_SAR, 3, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55285, 62, 651}, + /* 37 : SAR reg64,reg32 [r+mv: vex.lz.f3.0f38.w1 f7 /r ] ND,SM0,OPT,NF,NF_R,BMI2,FUTURE */ + /* 261(002 202) 001(f7) 100 : SM0,OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {I_SAR, 2, {REG_GPR|BITS64|RN_L16,REG_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55292, 63, 651}, + /* 38 : SAR reg64,rm64*,reg64 [rmv: vex.lz.f3.0f38.w1 f7 /r ] SM0,ND,SM1,OPT,NF,NF_R,BMI2,FUTURE */ + /* 262(002 202) 001(f7) 110 : SM0,SM1,OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {I_SAR, 3, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55285, 62, 655}, + /* 39 : SAR reg64,reg64 [r+mv: vex.lz.f3.0f38.w1 f7 /r ] ND,SM0,OPT,NF,NF_R,BMI2,FUTURE */ + /* 261(002 202) 001(f7) 100 : SM0,OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {I_SAR, 2, {REG_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55292, 63, 655}, + /* 40 : SAR reg8?,rm8,unity [vm-: evex.nd1.nf.l0.m4.o8 d0 /7 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d0) 217 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 3, {REG_GPR|BITS8,RM_GPR|BITS8,UNITY|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+24034, 37, 827}, + /* 41 : SAR rm8,unity [m-: evex.nd0.nf.l0.m4.o8 d0 /7 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(d0) 207 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 2, {RM_GPR|BITS8,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+24043, 64, 827}, + /* 42 : SAR reg8?,unity [v+m-: evex.nd1.nf.l0.m4.o8 d0 /7 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d0) 207 : SM0,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 2, {REG_GPR|BITS8,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+24052, 65, 827}, + /* 43 : SAR reg16?,rm16,unity [vm-: evex.nd1.nf.l0.m4.o16 d1 /7 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d1) 217 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 3, {REG_GPR|BITS16,RM_GPR|BITS16,UNITY|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+11923, 40, 828}, + /* 44 : SAR rm16,unity [m-: evex.nd0.nf.l0.m4.o16 d1 /7 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(d1) 207 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 2, {RM_GPR|BITS16,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11933, 66, 828}, + /* 45 : SAR reg16?,unity [v+m-: evex.nd1.nf.l0.m4.o16 d1 /7 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d1) 207 : SM0,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 2, {REG_GPR|BITS16,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11943, 67, 828}, + /* 46 : SAR reg32?,rm32,unity [vm-: evex.nd1.nf.l0.m4.o32 d1 /7 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d1) 217 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 3, {REG_GPR|BITS32,RM_GPR|BITS32,UNITY|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+11953, 43, 829}, + /* 47 : SAR rm32,unity [m-: evex.nd0.nf.l0.m4.o32 d1 /7 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(d1) 207 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 2, {RM_GPR|BITS32,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11963, 68, 829}, + /* 48 : SAR reg32?,unity [v+m-: evex.nd1.nf.l0.m4.o32 d1 /7 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d1) 207 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 2, {REG_GPR|BITS32,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11973, 69, 829}, + /* 49 : SAR reg64?,rm64,unity [vm-: evex.nd1.nf.l0.m4.o64 d1 /7 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d1) 217 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 3, {REG_GPR|BITS64,RM_GPR|BITS64,UNITY|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+11983, 43, 830}, + /* 50 : SAR rm64,unity [m-: evex.nd0.nf.l0.m4.o64 d1 /7 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(d1) 207 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 2, {RM_GPR|BITS64,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11993, 68, 830}, + /* 51 : SAR reg64?,unity [v+m-: evex.nd1.nf.l0.m4.o64 d1 /7 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d1) 207 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 2, {REG_GPR|BITS64,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+12003, 69, 830}, + /* 52 : SAR reg8?,rm8,reg_cl [vm-: evex.nd1.nf.l0.m4.o8 d2 /7 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d2) 217 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 3, {REG_GPR|BITS8,RM_GPR|BITS8,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+24061, 37, 831}, + /* 53 : SAR rm8,reg_cl [m-: evex.nd0.nf.l0.m4.o8 d2 /7 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(d2) 207 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+24070, 64, 831}, + /* 54 : SAR reg8?,reg_cl [v+m-: evex.nd1.nf.l0.m4.o8 d2 /7 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d2) 207 : SM0,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 2, {REG_GPR|BITS8,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+24079, 65, 831}, + /* 55 : SAR reg16?,rm16,reg_cl [vm-: evex.nd1.nf.l0.m4.o16 d3 /7 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d3) 217 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 3, {REG_GPR|BITS16,RM_GPR|BITS16,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+12013, 40, 832}, + /* 56 : SAR rm16,reg_cl [m-: evex.nd0.nf.l0.m4.o16 d3 /7 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(d3) 207 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+12023, 66, 832}, + /* 57 : SAR reg16?,reg_cl [v+m-: evex.nd1.nf.l0.m4.o16 d3 /7 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d3) 207 : SM0,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 2, {REG_GPR|BITS16,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+12033, 67, 832}, + /* 58 : SAR reg32?,rm32,reg_cl [vm-: evex.nd1.nf.l0.m4.o32 d3 /7 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d3) 217 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+12043, 43, 833}, + /* 59 : SAR rm32,reg_cl [m-: evex.nd0.nf.l0.m4.o32 d3 /7 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(d3) 207 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+12053, 68, 833}, + /* 60 : SAR reg32?,reg_cl [v+m-: evex.nd1.nf.l0.m4.o32 d3 /7 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d3) 207 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 2, {REG_GPR|BITS32,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+12063, 69, 833}, + /* 61 : SAR reg64?,rm64,reg_cl [vm-: evex.nd1.nf.l0.m4.o64 d3 /7 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d3) 217 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+12073, 43, 834}, + /* 62 : SAR rm64,reg_cl [m-: evex.nd0.nf.l0.m4.o64 d3 /7 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(d3) 207 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+12083, 68, 834}, + /* 63 : SAR reg64?,reg_cl [v+m-: evex.nd1.nf.l0.m4.o64 d3 /7 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d3) 207 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 2, {REG_GPR|BITS64,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+12093, 69, 834}, + /* 64 : SAR reg8?,rm8,reg_cx [vm-: evex.nd1.nf.l0.m4.o8 d2 /7 ] SM0,ND,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d2) 217 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 3, {REG_GPR|BITS8,RM_GPR|BITS8,REG_CX,0,0}, NO_DECORATOR, nasm_bytecodes+24061, 37, 835}, + /* 65 : SAR rm8,reg_cx [m-: evex.nd0.nf.l0.m4.o8 d2 /7 ] ND,SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(d2) 207 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 2, {RM_GPR|BITS8,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+24070, 64, 835}, + /* 66 : SAR reg8?,reg_cx [v+m-: evex.nd1.nf.l0.m4.o8 d2 /7 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d2) 207 : SM0,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 2, {REG_GPR|BITS8,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+24079, 65, 835}, + /* 67 : SAR reg16?,rm16,reg_cx [vm-: evex.nd1.nf.l0.m4.o16 d3 /7 ] ND,SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d3) 217 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 3, {REG_GPR|BITS16,RM_GPR|BITS16,REG_CX,0,0}, NO_DECORATOR, nasm_bytecodes+12013, 40, 836}, + /* 68 : SAR rm16,reg_cx [m-: evex.nd0.nf.l0.m4.o16 d3 /7 ] ND,SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(d3) 207 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 2, {RM_GPR|BITS16,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12023, 66, 836}, + /* 69 : SAR reg16?,reg_cx [v+m-: evex.nd1.nf.l0.m4.o16 d3 /7 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d3) 207 : SM0,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 2, {REG_GPR|BITS16,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12033, 67, 836}, + /* 70 : SAR reg32?,rm32,reg_cx [vm-: evex.nd1.nf.l0.m4.o32 d3 /7 ] SM0,ND,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d3) 217 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_CX,0,0}, NO_DECORATOR, nasm_bytecodes+12043, 43, 837}, + /* 71 : SAR rm32,reg_cx [m-: evex.nd0.nf.l0.m4.o32 d3 /7 ] ND,SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(d3) 207 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 2, {RM_GPR|BITS32,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12053, 68, 837}, + /* 72 : SAR reg32?,reg_cx [v+m-: evex.nd1.nf.l0.m4.o32 d3 /7 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d3) 207 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 2, {REG_GPR|BITS32,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12063, 69, 837}, + /* 73 : SAR reg64?,rm64,reg_cx [vm-: evex.nd1.nf.l0.m4.o64 d3 /7 ] ND,SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d3) 217 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_CX,0,0}, NO_DECORATOR, nasm_bytecodes+12073, 43, 838}, + /* 74 : SAR rm64,reg_cx [m-: evex.nd0.nf.l0.m4.o64 d3 /7 ] SM0,ND,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(d3) 207 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 2, {RM_GPR|BITS64,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12083, 68, 838}, + /* 75 : SAR reg64?,reg_cx [v+m-: evex.nd1.nf.l0.m4.o64 d3 /7 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d3) 207 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 2, {REG_GPR|BITS64,REG_CX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12093, 69, 838}, + /* 76 : SAR reg8?,rm8,reg_ecx [vm-: evex.nd1.nf.l0.m4.o8 d2 /7 ] ND,SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d2) 217 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 3, {REG_GPR|BITS8,RM_GPR|BITS8,REG_ECX,0,0}, NO_DECORATOR, nasm_bytecodes+24061, 37, 839}, + /* 77 : SAR rm8,reg_ecx [m-: evex.nd0.nf.l0.m4.o8 d2 /7 ] SM0,ND,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(d2) 207 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 2, {RM_GPR|BITS8,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+24070, 64, 839}, + /* 78 : SAR reg8?,reg_ecx [v+m-: evex.nd1.nf.l0.m4.o8 d2 /7 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d2) 207 : SM0,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 2, {REG_GPR|BITS8,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+24079, 65, 839}, + /* 79 : SAR reg16?,rm16,reg_ecx [vm-: evex.nd1.nf.l0.m4.o16 d3 /7 ] ND,SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d3) 217 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 3, {REG_GPR|BITS16,RM_GPR|BITS16,REG_ECX,0,0}, NO_DECORATOR, nasm_bytecodes+12013, 40, 840}, + /* 80 : SAR rm16,reg_ecx [m-: evex.nd0.nf.l0.m4.o16 d3 /7 ] SM0,ND,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(d3) 207 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 2, {RM_GPR|BITS16,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12023, 66, 840}, + /* 81 : SAR reg16?,reg_ecx [v+m-: evex.nd1.nf.l0.m4.o16 d3 /7 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d3) 207 : SM0,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 2, {REG_GPR|BITS16,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12033, 67, 840}, + /* 82 : SAR reg32?,rm32,reg_ecx [vm-: evex.nd1.nf.l0.m4.o32 d3 /7 ] SM0,ND,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d3) 217 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_ECX,0,0}, NO_DECORATOR, nasm_bytecodes+12043, 43, 841}, + /* 83 : SAR rm32,reg_ecx [m-: evex.nd0.nf.l0.m4.o32 d3 /7 ] SM0,ND,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(d3) 207 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 2, {RM_GPR|BITS32,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12053, 68, 841}, + /* 84 : SAR reg32?,reg_ecx [v+m-: evex.nd1.nf.l0.m4.o32 d3 /7 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d3) 207 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 2, {REG_GPR|BITS32,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12063, 69, 841}, + /* 85 : SAR reg64?,rm64,reg_ecx [vm-: evex.nd1.nf.l0.m4.o64 d3 /7 ] ND,SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d3) 217 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_ECX,0,0}, NO_DECORATOR, nasm_bytecodes+12073, 43, 842}, + /* 86 : SAR rm64,reg_ecx [m-: evex.nd0.nf.l0.m4.o64 d3 /7 ] ND,SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(d3) 207 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 2, {RM_GPR|BITS64,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12083, 68, 842}, + /* 87 : SAR reg64?,reg_ecx [v+m-: evex.nd1.nf.l0.m4.o64 d3 /7 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d3) 207 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 2, {REG_GPR|BITS64,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12093, 69, 842}, + /* 88 : SAR reg8?,rm8,reg_rcx [vm-: evex.nd1.nf.l0.m4.o8 d2 /7 ] ND,SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d2) 217 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 3, {REG_GPR|BITS8,RM_GPR|BITS8,REG_RCX,0,0}, NO_DECORATOR, nasm_bytecodes+24061, 37, 843}, + /* 89 : SAR rm8,reg_rcx [m-: evex.nd0.nf.l0.m4.o8 d2 /7 ] SM0,ND,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(d2) 207 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 2, {RM_GPR|BITS8,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+24070, 64, 843}, + /* 90 : SAR reg8?,reg_rcx [v+m-: evex.nd1.nf.l0.m4.o8 d2 /7 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d2) 207 : SM0,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 2, {REG_GPR|BITS8,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+24079, 65, 843}, + /* 91 : SAR reg16?,rm16,reg_rcx [vm-: evex.nd1.nf.l0.m4.o16 d3 /7 ] ND,SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d3) 217 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 3, {REG_GPR|BITS16,RM_GPR|BITS16,REG_RCX,0,0}, NO_DECORATOR, nasm_bytecodes+12013, 40, 844}, + /* 92 : SAR rm16,reg_rcx [m-: evex.nd0.nf.l0.m4.o16 d3 /7 ] ND,SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(d3) 207 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 2, {RM_GPR|BITS16,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12023, 66, 844}, + /* 93 : SAR reg16?,reg_rcx [v+m-: evex.nd1.nf.l0.m4.o16 d3 /7 ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d3) 207 : SM0,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 2, {REG_GPR|BITS16,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12033, 67, 844}, + /* 94 : SAR reg32?,rm32,reg_rcx [vm-: evex.nd1.nf.l0.m4.o32 d3 /7 ] SM0,ND,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d3) 217 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_RCX,0,0}, NO_DECORATOR, nasm_bytecodes+12043, 43, 845}, + /* 95 : SAR rm32,reg_rcx [m-: evex.nd0.nf.l0.m4.o32 d3 /7 ] SM0,ND,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(d3) 207 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 2, {RM_GPR|BITS32,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12053, 68, 845}, + /* 96 : SAR reg32?,reg_rcx [v+m-: evex.nd1.nf.l0.m4.o32 d3 /7 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d3) 207 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 2, {REG_GPR|BITS32,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12063, 69, 845}, + /* 97 : SAR reg64?,rm64,reg_rcx [vm-: evex.nd1.nf.l0.m4.o64 d3 /7 ] ND,SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d3) 217 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_RCX,0,0}, NO_DECORATOR, nasm_bytecodes+12073, 43, 846}, + /* 98 : SAR rm64,reg_rcx [m-: evex.nd0.nf.l0.m4.o64 d3 /7 ] ND,SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(d3) 207 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 2, {RM_GPR|BITS64,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12083, 68, 846}, + /* 99 : SAR reg64?,reg_rcx [v+m-: evex.nd1.nf.l0.m4.o64 d3 /7 ] ND,SM0,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d3) 207 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 2, {REG_GPR|BITS64,REG_RCX,0,0,0}, NO_DECORATOR, nasm_bytecodes+12093, 69, 846}, + /* 100 : SAR reg8?,rm8,imm8 [vmi: evex.nd1.nf.l0.m4.o8 c0 /7 ib,u ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(c0) 217 026 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 3, {REG_GPR|BITS8,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+12103, 37, 847}, + /* 101 : SAR rm8,imm8 [mi: evex.nd0.nf.l0.m4.o8 c0 /7 ib,u ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(c0) 207 025 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 2, {RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+12113, 64, 847}, + /* 102 : SAR reg8?,imm8 [v+mi: evex.nd1.nf.l0.m4.o8 c0 /7 ib,u ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(c0) 207 025 : SM0,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 2, {REG_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+12123, 65, 847}, + /* 103 : SAR reg16?,rm16,imm8 [vmi: evex.nd1.nf.l0.m4.o16 c1 /7 ib,u ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(c1) 217 026 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 3, {REG_GPR|BITS16,RM_GPR|BITS16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+2004, 40, 848}, + /* 104 : SAR rm16,imm8 [mi: evex.nd0.nf.l0.m4.o16 c1 /7 ib,u ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(c1) 207 025 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+2015, 66, 848}, + /* 105 : SAR reg16?,imm8 [v+mi: evex.nd1.nf.l0.m4.o16 c1 /7 ib,u ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(c1) 207 025 : SM0,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 2, {REG_GPR|BITS16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+2026, 67, 848}, + /* 106 : SAR reg32?,rm32,imm8 [vmi: evex.nd1.nf.l0.m4.o32 c1 /7 ib,u ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(c1) 217 026 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 3, {REG_GPR|BITS32,RM_GPR|BITS32,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+2037, 43, 849}, + /* 107 : SAR rm32,imm8 [mi: evex.nd0.nf.l0.m4.o32 c1 /7 ib,u ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(c1) 207 025 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+2048, 68, 849}, + /* 108 : SAR reg32?,imm8 [v+mi: evex.nd1.nf.l0.m4.o32 c1 /7 ib,u ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(c1) 207 025 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 2, {REG_GPR|BITS32,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+2059, 69, 849}, + /* 109 : SAR reg64?,rm64,imm8 [vmi: evex.nd1.nf.l0.m4.o64 c1 /7 ib,u ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(c1) 217 026 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 3, {REG_GPR|BITS64,RM_GPR|BITS64,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+2070, 43, 850}, + /* 110 : SAR rm64,imm8 [mi: evex.nd0.nf.l0.m4.o64 c1 /7 ib,u ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(c1) 207 025 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 2, {RM_GPR|BITS64,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+2081, 68, 850}, + /* 111 : SAR reg64?,imm8 [v+mi: evex.nd1.nf.l0.m4.o64 c1 /7 ib,u ] SM0,ND,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(c1) 207 025 : SM0,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 2, {REG_GPR|BITS64,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+2092, 69, 850}, + /* 112 : SAR reg32,rm32*,reg8 [rmv: evex.lz.f3.0f38.w0 f7 /r ] ND,SM0,SM1,OPT,NF,NF_R,LONG,PROT,BMI2,APX,X86_64 */ + /* 242(f2 7e 08) 300 001(f7) 110 : SM0,SM1,OPT,NF,NF_R,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SAR, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24106, 72, 891}, + /* 113 : SAR reg32,reg8 [r+mv: evex.lz.f3.0f38.w0 f7 /r ] SM0,ND,OPT,NF,NF_R,LONG,PROT,BMI2,APX,X86_64 */ + /* 241(f2 7e 08) 300 001(f7) 100 : SM0,OPT,NF,NF_R,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SAR, 2, {REG_GPR|BITS32,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+24115, 73, 891}, + /* 114 : SAR reg32,rm32*,reg16 [rmv: evex.lz.f3.0f38.w0 f7 /r ] ND,SM0,SM1,OPT,NF,NF_R,LONG,PROT,BMI2,APX,X86_64 */ + /* 242(f2 7e 08) 300 001(f7) 110 : SM0,SM1,OPT,NF,NF_R,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SAR, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+24106, 72, 895}, + /* 115 : SAR reg32,reg16 [r+mv: evex.lz.f3.0f38.w0 f7 /r ] SM0,ND,OPT,NF,NF_R,LONG,PROT,BMI2,APX,X86_64 */ + /* 241(f2 7e 08) 300 001(f7) 100 : SM0,OPT,NF,NF_R,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SAR, 2, {REG_GPR|BITS32,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+24115, 73, 895}, + /* 116 : SAR reg32,rm32*,reg32 [rmv: evex.lz.f3.0f38.w0 f7 /r ] SM0,ND,SM1,OPT,NF,NF_R,LONG,PROT,BMI2,APX,X86_64 */ + /* 242(f2 7e 08) 300 001(f7) 110 : SM0,SM1,OPT,NF,NF_R,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SAR, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+24106, 72, 899}, + /* 117 : SAR reg32,reg32 [r+mv: evex.lz.f3.0f38.w0 f7 /r ] SM0,ND,OPT,NF,NF_R,LONG,PROT,BMI2,APX,X86_64 */ + /* 241(f2 7e 08) 300 001(f7) 100 : SM0,OPT,NF,NF_R,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SAR, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+24115, 73, 899}, + /* 118 : SAR reg32,rm32*,reg64 [rmv: evex.lz.f3.0f38.w0 f7 /r ] ND,SM0,SM1,OPT,NF,NF_R,LONG,PROT,BMI2,APX,X86_64 */ + /* 242(f2 7e 08) 300 001(f7) 110 : SM0,SM1,OPT,NF,NF_R,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SAR, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+24106, 72, 903}, + /* 119 : SAR reg32,reg64 [r+mv: evex.lz.f3.0f38.w0 f7 /r ] ND,SM0,OPT,NF,NF_R,LONG,PROT,BMI2,APX,X86_64 */ + /* 241(f2 7e 08) 300 001(f7) 100 : SM0,OPT,NF,NF_R,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SAR, 2, {REG_GPR|BITS32,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+24115, 73, 903}, + /* 120 : SAR reg64,rm64*,reg8 [rmv: evex.lz.f3.0f38.w1 f7 /r ] SM0,ND,SM1,OPT,NF,NF_R,LONG,PROT,BMI2,APX,X86_64 */ + /* 242(f2 fe 08) 300 001(f7) 110 : SM0,SM1,OPT,NF,NF_R,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SAR, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24160, 72, 909}, + /* 121 : SAR reg64,reg8 [r+mv: evex.lz.f3.0f38.w1 f7 /r ] SM0,ND,OPT,NF,NF_R,LONG,PROT,BMI2,APX,X86_64 */ + /* 241(f2 fe 08) 300 001(f7) 100 : SM0,OPT,NF,NF_R,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SAR, 2, {REG_GPR|BITS64,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+24169, 73, 909}, + /* 122 : SAR reg64,rm64*,reg16 [rmv: evex.lz.f3.0f38.w1 f7 /r ] SM0,ND,SM1,OPT,NF,NF_R,LONG,PROT,BMI2,APX,X86_64 */ + /* 242(f2 fe 08) 300 001(f7) 110 : SM0,SM1,OPT,NF,NF_R,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SAR, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+24160, 72, 913}, + /* 123 : SAR reg64,reg16 [r+mv: evex.lz.f3.0f38.w1 f7 /r ] ND,SM0,OPT,NF,NF_R,LONG,PROT,BMI2,APX,X86_64 */ + /* 241(f2 fe 08) 300 001(f7) 100 : SM0,OPT,NF,NF_R,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SAR, 2, {REG_GPR|BITS64,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+24169, 73, 913}, + /* 124 : SAR reg64,rm64*,reg32 [rmv: evex.lz.f3.0f38.w1 f7 /r ] ND,SM0,SM1,OPT,NF,NF_R,LONG,PROT,BMI2,APX,X86_64 */ + /* 242(f2 fe 08) 300 001(f7) 110 : SM0,SM1,OPT,NF,NF_R,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SAR, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+24160, 72, 917}, + /* 125 : SAR reg64,reg32 [r+mv: evex.lz.f3.0f38.w1 f7 /r ] ND,SM0,OPT,NF,NF_R,LONG,PROT,BMI2,APX,X86_64 */ + /* 241(f2 fe 08) 300 001(f7) 100 : SM0,OPT,NF,NF_R,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SAR, 2, {REG_GPR|BITS64,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+24169, 73, 917}, + /* 126 : SAR reg64,rm64*,reg64 [rmv: evex.lz.f3.0f38.w1 f7 /r ] ND,SM0,SM1,OPT,NF,NF_R,LONG,PROT,BMI2,APX,X86_64 */ + /* 242(f2 fe 08) 300 001(f7) 110 : SM0,SM1,OPT,NF,NF_R,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SAR, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+24160, 72, 921}, + /* 127 : SAR reg64,reg64 [r+mv: evex.lz.f3.0f38.w1 f7 /r ] ND,SM0,OPT,NF,NF_R,LONG,PROT,BMI2,APX,X86_64 */ + /* 241(f2 fe 08) 300 001(f7) 100 : SM0,OPT,NF,NF_R,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SAR, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+24169, 73, 921}, +}; + +static const struct itemplate instrux_RORX[4] = { + /* 0 : RORX reg32,rm32,imm8 [rmi: vex.lz.f2.0f3a.w0 f0 /r ib ] SM0-1,BMI2,FUTURE */ + /* 270(003 003) 001(f0) 110 022 : SM0,SM1,NOAPX,VEX,BMI2,FUTURE */ + {I_RORX, 3, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+51259, 60, 585}, + /* 1 : RORX reg64,rm64,imm8 [rmi: vex.lz.f2.0f3a.w1 f0 /r ib ] SM0-1,BMI2,FUTURE */ + /* 270(003 203) 001(f0) 110 022 : SM0,SM1,NOAPX,VEX,BMI2,FUTURE */ + {I_RORX, 3, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+51267, 60, 603}, + /* 2 : RORX reg32,rm32,imm8 [rmi: evex.lz.f2.0f3a.w0 f0 /r ib ] SM0-1,LONG,PROT,BMI2,APX,X86_64 */ + /* 250(f3 7f 08) 300 001(f0) 110 022 : SM0,SM1,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_RORX, 3, {REG_GPR|BITS32,RM_GPR|BITS32,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+12133, 70, 851}, + /* 3 : RORX reg64,rm64,imm8 [rmi: evex.lz.f2.0f3a.w1 f0 /r ib ] SM0-1,LONG,PROT,BMI2,APX,X86_64 */ + /* 250(f3 ff 08) 300 001(f0) 110 022 : SM0,SM1,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_RORX, 3, {REG_GPR|BITS64,RM_GPR|BITS64,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+12143, 70, 869}, +}; + +static const struct itemplate instrux_ROLX[4] = { + /* 0 : ROLX reg32,rm32,imm_known8 [rmi: vex.lz.f2.0f3a.w0 f0 /r ib^1f ] SM0-1,BMI2,FUTURE */ + /* 270(003 003) 001(f0) 110 306 000 037 : SM0,SM1,NOAPX,VEX,BMI2,FUTURE */ + {I_ROLX, 3, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,IMM_KNOWN|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+10643, 60, 586}, + /* 1 : ROLX reg64,rm64,imm_known8 [rmi: vex.lz.f2.0f3a.w1 f0 /r ib^3f ] SM0-1,BMI2,FUTURE */ + /* 270(003 203) 001(f0) 110 306 000 077 : SM0,SM1,NOAPX,VEX,BMI2,FUTURE */ + {I_ROLX, 3, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,IMM_KNOWN|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+10653, 60, 604}, + /* 2 : ROLX reg32,rm32,imm_known8 [rmi: evex.lz.f2.0f3a.w0 f0 /r ib^1f ] SM0-1,LONG,PROT,BMI2,APX,X86_64 */ + /* 250(f3 7f 08) 300 001(f0) 110 306 000 037 : SM0,SM1,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_ROLX, 3, {REG_GPR|BITS32,RM_GPR|BITS32,IMM_KNOWN|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+0, 70, 852}, + /* 3 : ROLX reg64,rm64,imm_known8 [rmi: evex.lz.f2.0f3a.w1 f0 /r ib^3f ] SM0-1,LONG,PROT,BMI2,APX,X86_64 */ + /* 250(f3 ff 08) 300 001(f0) 110 306 000 077 : SM0,SM1,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_ROLX, 3, {REG_GPR|BITS64,RM_GPR|BITS64,IMM_KNOWN|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+12, 70, 870}, +}; + +static const struct itemplate instrux_SHLX[32] = { + /* 0 : SHLX reg32,rm32*,reg8 [rmv: vex.lz.66.0f38.w0 f7 /r ] SM0,ND,SM1,BMI2,FUTURE */ + /* 262(002 001) 001(f7) 110 : SM0,SM1,NOAPX,VEX,BMI2,FUTURE */ + {I_SHLX, 3, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,REG_GPR|BITS8|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55229, 60, 587}, + /* 1 : SHLX reg32,reg8 [r+mv: vex.lz.66.0f38.w0 f7 /r ] ND,SM0,BMI2,FUTURE */ + /* 261(002 001) 001(f7) 100 : SM0,NOAPX,VEX,BMI2,FUTURE */ + {I_SHLX, 2, {REG_GPR|BITS32|RN_L16,REG_GPR|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55236, 61, 587}, + /* 2 : SHLX reg32,rm32*,reg16 [rmv: vex.lz.66.0f38.w0 f7 /r ] SM0,ND,SM1,BMI2,FUTURE */ + /* 262(002 001) 001(f7) 110 : SM0,SM1,NOAPX,VEX,BMI2,FUTURE */ + {I_SHLX, 3, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,REG_GPR|BITS16|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55229, 60, 591}, + /* 3 : SHLX reg32,reg16 [r+mv: vex.lz.66.0f38.w0 f7 /r ] ND,SM0,BMI2,FUTURE */ + /* 261(002 001) 001(f7) 100 : SM0,NOAPX,VEX,BMI2,FUTURE */ + {I_SHLX, 2, {REG_GPR|BITS32|RN_L16,REG_GPR|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55236, 61, 591}, + /* 4 : SHLX reg32,rm32*,reg32 [rmv: vex.lz.66.0f38.w0 f7 /r ] SM0,SM1,BMI2,FUTURE */ + /* 262(002 001) 001(f7) 110 : SM0,SM1,NOAPX,VEX,BMI2,FUTURE */ + {I_SHLX, 3, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55229, 60, 595}, + /* 5 : SHLX reg32,reg32 [r+mv: vex.lz.66.0f38.w0 f7 /r ] SM0,ND,BMI2,FUTURE */ + /* 261(002 001) 001(f7) 100 : SM0,NOAPX,VEX,BMI2,FUTURE */ + {I_SHLX, 2, {REG_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55236, 61, 595}, + /* 6 : SHLX reg32,rm32*,reg64 [rmv: vex.lz.66.0f38.w0 f7 /r ] ND,SM0,SM1,BMI2,FUTURE */ + /* 262(002 001) 001(f7) 110 : SM0,SM1,NOAPX,VEX,BMI2,FUTURE */ + {I_SHLX, 3, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,REG_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55229, 60, 599}, + /* 7 : SHLX reg32,reg64 [r+mv: vex.lz.66.0f38.w0 f7 /r ] SM0,ND,BMI2,FUTURE */ + /* 261(002 001) 001(f7) 100 : SM0,NOAPX,VEX,BMI2,FUTURE */ + {I_SHLX, 2, {REG_GPR|BITS32|RN_L16,REG_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55236, 61, 599}, + /* 8 : SHLX reg64,rm64*,reg8 [rmv: vex.lz.66.0f38.w1 f7 /r ] SM0,ND,SM1,BMI2,FUTURE */ + /* 262(002 201) 001(f7) 110 : SM0,SM1,NOAPX,VEX,BMI2,FUTURE */ + {I_SHLX, 3, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,REG_GPR|BITS8|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55271, 60, 605}, + /* 9 : SHLX reg64,reg8 [r+mv: vex.lz.66.0f38.w1 f7 /r ] SM0,ND,BMI2,FUTURE */ + /* 261(002 201) 001(f7) 100 : SM0,NOAPX,VEX,BMI2,FUTURE */ + {I_SHLX, 2, {REG_GPR|BITS64|RN_L16,REG_GPR|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55278, 61, 605}, + /* 10 : SHLX reg64,rm64*,reg16 [rmv: vex.lz.66.0f38.w1 f7 /r ] ND,SM0,SM1,BMI2,FUTURE */ + /* 262(002 201) 001(f7) 110 : SM0,SM1,NOAPX,VEX,BMI2,FUTURE */ + {I_SHLX, 3, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,REG_GPR|BITS16|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55271, 60, 609}, + /* 11 : SHLX reg64,reg16 [r+mv: vex.lz.66.0f38.w1 f7 /r ] SM0,ND,BMI2,FUTURE */ + /* 261(002 201) 001(f7) 100 : SM0,NOAPX,VEX,BMI2,FUTURE */ + {I_SHLX, 2, {REG_GPR|BITS64|RN_L16,REG_GPR|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55278, 61, 609}, + /* 12 : SHLX reg64,rm64*,reg32 [rmv: vex.lz.66.0f38.w1 f7 /r ] ND,SM0,SM1,BMI2,FUTURE */ + /* 262(002 201) 001(f7) 110 : SM0,SM1,NOAPX,VEX,BMI2,FUTURE */ + {I_SHLX, 3, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55271, 60, 613}, + /* 13 : SHLX reg64,reg32 [r+mv: vex.lz.66.0f38.w1 f7 /r ] SM0,ND,BMI2,FUTURE */ + /* 261(002 201) 001(f7) 100 : SM0,NOAPX,VEX,BMI2,FUTURE */ + {I_SHLX, 2, {REG_GPR|BITS64|RN_L16,REG_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55278, 61, 613}, + /* 14 : SHLX reg64,rm64*,reg64 [rmv: vex.lz.66.0f38.w1 f7 /r ] SM0,SM1,BMI2,FUTURE */ + /* 262(002 201) 001(f7) 110 : SM0,SM1,NOAPX,VEX,BMI2,FUTURE */ + {I_SHLX, 3, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55271, 60, 617}, + /* 15 : SHLX reg64,reg64 [r+mv: vex.lz.66.0f38.w1 f7 /r ] ND,SM0,BMI2,FUTURE */ + /* 261(002 201) 001(f7) 100 : SM0,NOAPX,VEX,BMI2,FUTURE */ + {I_SHLX, 2, {REG_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55278, 61, 617}, + /* 16 : SHLX reg32,rm32*,reg8 [rmv: evex.lz.66.0f38.w0 f7 /r ] SM0,ND,SM1,LONG,PROT,BMI2,APX,X86_64 */ + /* 242(f2 7d 08) 300 001(f7) 110 : SM0,SM1,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SHLX, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24088, 70, 853}, + /* 17 : SHLX reg32,reg8 [r+mv: evex.lz.66.0f38.w0 f7 /r ] ND,SM0,LONG,PROT,BMI2,APX,X86_64 */ + /* 241(f2 7d 08) 300 001(f7) 100 : SM0,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SHLX, 2, {REG_GPR|BITS32,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+24097, 71, 853}, + /* 18 : SHLX reg32,rm32*,reg16 [rmv: evex.lz.66.0f38.w0 f7 /r ] ND,SM0,SM1,LONG,PROT,BMI2,APX,X86_64 */ + /* 242(f2 7d 08) 300 001(f7) 110 : SM0,SM1,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SHLX, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+24088, 70, 857}, + /* 19 : SHLX reg32,reg16 [r+mv: evex.lz.66.0f38.w0 f7 /r ] ND,SM0,LONG,PROT,BMI2,APX,X86_64 */ + /* 241(f2 7d 08) 300 001(f7) 100 : SM0,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SHLX, 2, {REG_GPR|BITS32,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+24097, 71, 857}, + /* 20 : SHLX reg32,rm32*,reg32 [rmv: evex.lz.66.0f38.w0 f7 /r ] SM0,SM1,LONG,PROT,BMI2,APX,X86_64 */ + /* 242(f2 7d 08) 300 001(f7) 110 : SM0,SM1,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SHLX, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+24088, 70, 861}, + /* 21 : SHLX reg32,reg32 [r+mv: evex.lz.66.0f38.w0 f7 /r ] ND,SM0,LONG,PROT,BMI2,APX,X86_64 */ + /* 241(f2 7d 08) 300 001(f7) 100 : SM0,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SHLX, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+24097, 71, 861}, + /* 22 : SHLX reg32,rm32*,reg64 [rmv: evex.lz.66.0f38.w0 f7 /r ] ND,SM0,SM1,LONG,PROT,BMI2,APX,X86_64 */ + /* 242(f2 7d 08) 300 001(f7) 110 : SM0,SM1,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SHLX, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+24088, 70, 865}, + /* 23 : SHLX reg32,reg64 [r+mv: evex.lz.66.0f38.w0 f7 /r ] ND,SM0,LONG,PROT,BMI2,APX,X86_64 */ + /* 241(f2 7d 08) 300 001(f7) 100 : SM0,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SHLX, 2, {REG_GPR|BITS32,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+24097, 71, 865}, + /* 24 : SHLX reg64,rm64*,reg8 [rmv: evex.lz.66.0f38.w1 f7 /r ] SM0,ND,SM1,LONG,PROT,BMI2,APX,X86_64 */ + /* 242(f2 fd 08) 300 001(f7) 110 : SM0,SM1,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SHLX, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24142, 70, 871}, + /* 25 : SHLX reg64,reg8 [r+mv: evex.lz.66.0f38.w1 f7 /r ] ND,SM0,LONG,PROT,BMI2,APX,X86_64 */ + /* 241(f2 fd 08) 300 001(f7) 100 : SM0,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SHLX, 2, {REG_GPR|BITS64,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+24151, 71, 871}, + /* 26 : SHLX reg64,rm64*,reg16 [rmv: evex.lz.66.0f38.w1 f7 /r ] ND,SM0,SM1,LONG,PROT,BMI2,APX,X86_64 */ + /* 242(f2 fd 08) 300 001(f7) 110 : SM0,SM1,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SHLX, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+24142, 70, 875}, + /* 27 : SHLX reg64,reg16 [r+mv: evex.lz.66.0f38.w1 f7 /r ] SM0,ND,LONG,PROT,BMI2,APX,X86_64 */ + /* 241(f2 fd 08) 300 001(f7) 100 : SM0,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SHLX, 2, {REG_GPR|BITS64,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+24151, 71, 875}, + /* 28 : SHLX reg64,rm64*,reg32 [rmv: evex.lz.66.0f38.w1 f7 /r ] SM0,ND,SM1,LONG,PROT,BMI2,APX,X86_64 */ + /* 242(f2 fd 08) 300 001(f7) 110 : SM0,SM1,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SHLX, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+24142, 70, 879}, + /* 29 : SHLX reg64,reg32 [r+mv: evex.lz.66.0f38.w1 f7 /r ] SM0,ND,LONG,PROT,BMI2,APX,X86_64 */ + /* 241(f2 fd 08) 300 001(f7) 100 : SM0,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SHLX, 2, {REG_GPR|BITS64,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+24151, 71, 879}, + /* 30 : SHLX reg64,rm64*,reg64 [rmv: evex.lz.66.0f38.w1 f7 /r ] SM0,SM1,LONG,PROT,BMI2,APX,X86_64 */ + /* 242(f2 fd 08) 300 001(f7) 110 : SM0,SM1,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SHLX, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+24142, 70, 883}, + /* 31 : SHLX reg64,reg64 [r+mv: evex.lz.66.0f38.w1 f7 /r ] ND,SM0,LONG,PROT,BMI2,APX,X86_64 */ + /* 241(f2 fd 08) 300 001(f7) 100 : SM0,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SHLX, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+24151, 71, 883}, +}; + +static const struct itemplate instrux_SALX[32] = { + /* 0 : SALX reg32,rm32*,reg8 [rmv: vex.lz.66.0f38.w0 f7 /r ] ND,SM0,SM1,BMI2,FUTURE */ + /* 262(002 001) 001(f7) 110 : SM0,SM1,NOAPX,VEX,BMI2,FUTURE */ + {I_SALX, 3, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,REG_GPR|BITS8|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55229, 60, 588}, + /* 1 : SALX reg32,reg8 [r+mv: vex.lz.66.0f38.w0 f7 /r ] SM0,ND,BMI2,FUTURE */ + /* 261(002 001) 001(f7) 100 : SM0,NOAPX,VEX,BMI2,FUTURE */ + {I_SALX, 2, {REG_GPR|BITS32|RN_L16,REG_GPR|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55236, 61, 588}, + /* 2 : SALX reg32,rm32*,reg16 [rmv: vex.lz.66.0f38.w0 f7 /r ] SM0,ND,SM1,BMI2,FUTURE */ + /* 262(002 001) 001(f7) 110 : SM0,SM1,NOAPX,VEX,BMI2,FUTURE */ + {I_SALX, 3, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,REG_GPR|BITS16|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55229, 60, 592}, + /* 3 : SALX reg32,reg16 [r+mv: vex.lz.66.0f38.w0 f7 /r ] ND,SM0,BMI2,FUTURE */ + /* 261(002 001) 001(f7) 100 : SM0,NOAPX,VEX,BMI2,FUTURE */ + {I_SALX, 2, {REG_GPR|BITS32|RN_L16,REG_GPR|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55236, 61, 592}, + /* 4 : SALX reg32,rm32*,reg32 [rmv: vex.lz.66.0f38.w0 f7 /r ] SM0,ND,SM1,BMI2,FUTURE */ + /* 262(002 001) 001(f7) 110 : SM0,SM1,NOAPX,VEX,BMI2,FUTURE */ + {I_SALX, 3, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55229, 60, 596}, + /* 5 : SALX reg32,reg32 [r+mv: vex.lz.66.0f38.w0 f7 /r ] ND,SM0,BMI2,FUTURE */ + /* 261(002 001) 001(f7) 100 : SM0,NOAPX,VEX,BMI2,FUTURE */ + {I_SALX, 2, {REG_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55236, 61, 596}, + /* 6 : SALX reg32,rm32*,reg64 [rmv: vex.lz.66.0f38.w0 f7 /r ] ND,SM0,SM1,BMI2,FUTURE */ + /* 262(002 001) 001(f7) 110 : SM0,SM1,NOAPX,VEX,BMI2,FUTURE */ + {I_SALX, 3, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,REG_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55229, 60, 600}, + /* 7 : SALX reg32,reg64 [r+mv: vex.lz.66.0f38.w0 f7 /r ] SM0,ND,BMI2,FUTURE */ + /* 261(002 001) 001(f7) 100 : SM0,NOAPX,VEX,BMI2,FUTURE */ + {I_SALX, 2, {REG_GPR|BITS32|RN_L16,REG_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55236, 61, 600}, + /* 8 : SALX reg64,rm64*,reg8 [rmv: vex.lz.66.0f38.w1 f7 /r ] ND,SM0,SM1,BMI2,FUTURE */ + /* 262(002 201) 001(f7) 110 : SM0,SM1,NOAPX,VEX,BMI2,FUTURE */ + {I_SALX, 3, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,REG_GPR|BITS8|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55271, 60, 606}, + /* 9 : SALX reg64,reg8 [r+mv: vex.lz.66.0f38.w1 f7 /r ] SM0,ND,BMI2,FUTURE */ + /* 261(002 201) 001(f7) 100 : SM0,NOAPX,VEX,BMI2,FUTURE */ + {I_SALX, 2, {REG_GPR|BITS64|RN_L16,REG_GPR|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55278, 61, 606}, + /* 10 : SALX reg64,rm64*,reg16 [rmv: vex.lz.66.0f38.w1 f7 /r ] SM0,ND,SM1,BMI2,FUTURE */ + /* 262(002 201) 001(f7) 110 : SM0,SM1,NOAPX,VEX,BMI2,FUTURE */ + {I_SALX, 3, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,REG_GPR|BITS16|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55271, 60, 610}, + /* 11 : SALX reg64,reg16 [r+mv: vex.lz.66.0f38.w1 f7 /r ] SM0,ND,BMI2,FUTURE */ + /* 261(002 201) 001(f7) 100 : SM0,NOAPX,VEX,BMI2,FUTURE */ + {I_SALX, 2, {REG_GPR|BITS64|RN_L16,REG_GPR|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55278, 61, 610}, + /* 12 : SALX reg64,rm64*,reg32 [rmv: vex.lz.66.0f38.w1 f7 /r ] ND,SM0,SM1,BMI2,FUTURE */ + /* 262(002 201) 001(f7) 110 : SM0,SM1,NOAPX,VEX,BMI2,FUTURE */ + {I_SALX, 3, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55271, 60, 614}, + /* 13 : SALX reg64,reg32 [r+mv: vex.lz.66.0f38.w1 f7 /r ] ND,SM0,BMI2,FUTURE */ + /* 261(002 201) 001(f7) 100 : SM0,NOAPX,VEX,BMI2,FUTURE */ + {I_SALX, 2, {REG_GPR|BITS64|RN_L16,REG_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55278, 61, 614}, + /* 14 : SALX reg64,rm64*,reg64 [rmv: vex.lz.66.0f38.w1 f7 /r ] ND,SM0,SM1,BMI2,FUTURE */ + /* 262(002 201) 001(f7) 110 : SM0,SM1,NOAPX,VEX,BMI2,FUTURE */ + {I_SALX, 3, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55271, 60, 618}, + /* 15 : SALX reg64,reg64 [r+mv: vex.lz.66.0f38.w1 f7 /r ] SM0,ND,BMI2,FUTURE */ + /* 261(002 201) 001(f7) 100 : SM0,NOAPX,VEX,BMI2,FUTURE */ + {I_SALX, 2, {REG_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55278, 61, 618}, + /* 16 : SALX reg32,rm32*,reg8 [rmv: evex.lz.66.0f38.w0 f7 /r ] SM0,ND,SM1,LONG,PROT,BMI2,APX,X86_64 */ + /* 242(f2 7d 08) 300 001(f7) 110 : SM0,SM1,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SALX, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24088, 70, 854}, + /* 17 : SALX reg32,reg8 [r+mv: evex.lz.66.0f38.w0 f7 /r ] SM0,ND,LONG,PROT,BMI2,APX,X86_64 */ + /* 241(f2 7d 08) 300 001(f7) 100 : SM0,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SALX, 2, {REG_GPR|BITS32,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+24097, 71, 854}, + /* 18 : SALX reg32,rm32*,reg16 [rmv: evex.lz.66.0f38.w0 f7 /r ] SM0,ND,SM1,LONG,PROT,BMI2,APX,X86_64 */ + /* 242(f2 7d 08) 300 001(f7) 110 : SM0,SM1,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SALX, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+24088, 70, 858}, + /* 19 : SALX reg32,reg16 [r+mv: evex.lz.66.0f38.w0 f7 /r ] SM0,ND,LONG,PROT,BMI2,APX,X86_64 */ + /* 241(f2 7d 08) 300 001(f7) 100 : SM0,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SALX, 2, {REG_GPR|BITS32,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+24097, 71, 858}, + /* 20 : SALX reg32,rm32*,reg32 [rmv: evex.lz.66.0f38.w0 f7 /r ] ND,SM0,SM1,LONG,PROT,BMI2,APX,X86_64 */ + /* 242(f2 7d 08) 300 001(f7) 110 : SM0,SM1,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SALX, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+24088, 70, 862}, + /* 21 : SALX reg32,reg32 [r+mv: evex.lz.66.0f38.w0 f7 /r ] SM0,ND,LONG,PROT,BMI2,APX,X86_64 */ + /* 241(f2 7d 08) 300 001(f7) 100 : SM0,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SALX, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+24097, 71, 862}, + /* 22 : SALX reg32,rm32*,reg64 [rmv: evex.lz.66.0f38.w0 f7 /r ] SM0,ND,SM1,LONG,PROT,BMI2,APX,X86_64 */ + /* 242(f2 7d 08) 300 001(f7) 110 : SM0,SM1,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SALX, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+24088, 70, 866}, + /* 23 : SALX reg32,reg64 [r+mv: evex.lz.66.0f38.w0 f7 /r ] SM0,ND,LONG,PROT,BMI2,APX,X86_64 */ + /* 241(f2 7d 08) 300 001(f7) 100 : SM0,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SALX, 2, {REG_GPR|BITS32,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+24097, 71, 866}, + /* 24 : SALX reg64,rm64*,reg8 [rmv: evex.lz.66.0f38.w1 f7 /r ] SM0,ND,SM1,LONG,PROT,BMI2,APX,X86_64 */ + /* 242(f2 fd 08) 300 001(f7) 110 : SM0,SM1,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SALX, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24142, 70, 872}, + /* 25 : SALX reg64,reg8 [r+mv: evex.lz.66.0f38.w1 f7 /r ] ND,SM0,LONG,PROT,BMI2,APX,X86_64 */ + /* 241(f2 fd 08) 300 001(f7) 100 : SM0,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SALX, 2, {REG_GPR|BITS64,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+24151, 71, 872}, + /* 26 : SALX reg64,rm64*,reg16 [rmv: evex.lz.66.0f38.w1 f7 /r ] ND,SM0,SM1,LONG,PROT,BMI2,APX,X86_64 */ + /* 242(f2 fd 08) 300 001(f7) 110 : SM0,SM1,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SALX, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+24142, 70, 876}, + /* 27 : SALX reg64,reg16 [r+mv: evex.lz.66.0f38.w1 f7 /r ] ND,SM0,LONG,PROT,BMI2,APX,X86_64 */ + /* 241(f2 fd 08) 300 001(f7) 100 : SM0,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SALX, 2, {REG_GPR|BITS64,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+24151, 71, 876}, + /* 28 : SALX reg64,rm64*,reg32 [rmv: evex.lz.66.0f38.w1 f7 /r ] ND,SM0,SM1,LONG,PROT,BMI2,APX,X86_64 */ + /* 242(f2 fd 08) 300 001(f7) 110 : SM0,SM1,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SALX, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+24142, 70, 880}, + /* 29 : SALX reg64,reg32 [r+mv: evex.lz.66.0f38.w1 f7 /r ] ND,SM0,LONG,PROT,BMI2,APX,X86_64 */ + /* 241(f2 fd 08) 300 001(f7) 100 : SM0,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SALX, 2, {REG_GPR|BITS64,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+24151, 71, 880}, + /* 30 : SALX reg64,rm64*,reg64 [rmv: evex.lz.66.0f38.w1 f7 /r ] SM0,ND,SM1,LONG,PROT,BMI2,APX,X86_64 */ + /* 242(f2 fd 08) 300 001(f7) 110 : SM0,SM1,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SALX, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+24142, 70, 884}, + /* 31 : SALX reg64,reg64 [r+mv: evex.lz.66.0f38.w1 f7 /r ] SM0,ND,LONG,PROT,BMI2,APX,X86_64 */ + /* 241(f2 fd 08) 300 001(f7) 100 : SM0,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SALX, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+24151, 71, 884}, +}; + +static const struct itemplate instrux_SARX[32] = { + /* 0 : SARX reg32,rm32*,reg8 [rmv: vex.lz.f3.0f38.w0 f7 /r ] ND,SM0,SM1,BMI2,FUTURE */ + /* 262(002 002) 001(f7) 110 : SM0,SM1,NOAPX,VEX,BMI2,FUTURE */ + {I_SARX, 3, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,REG_GPR|BITS8|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55243, 60, 589}, + /* 1 : SARX reg32,reg8 [r+mv: vex.lz.f3.0f38.w0 f7 /r ] ND,SM0,BMI2,FUTURE */ + /* 261(002 002) 001(f7) 100 : SM0,NOAPX,VEX,BMI2,FUTURE */ + {I_SARX, 2, {REG_GPR|BITS32|RN_L16,REG_GPR|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55250, 61, 589}, + /* 2 : SARX reg32,rm32*,reg16 [rmv: vex.lz.f3.0f38.w0 f7 /r ] ND,SM0,SM1,BMI2,FUTURE */ + /* 262(002 002) 001(f7) 110 : SM0,SM1,NOAPX,VEX,BMI2,FUTURE */ + {I_SARX, 3, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,REG_GPR|BITS16|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55243, 60, 593}, + /* 3 : SARX reg32,reg16 [r+mv: vex.lz.f3.0f38.w0 f7 /r ] ND,SM0,BMI2,FUTURE */ + /* 261(002 002) 001(f7) 100 : SM0,NOAPX,VEX,BMI2,FUTURE */ + {I_SARX, 2, {REG_GPR|BITS32|RN_L16,REG_GPR|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55250, 61, 593}, + /* 4 : SARX reg32,rm32*,reg32 [rmv: vex.lz.f3.0f38.w0 f7 /r ] SM0,SM1,BMI2,FUTURE */ + /* 262(002 002) 001(f7) 110 : SM0,SM1,NOAPX,VEX,BMI2,FUTURE */ + {I_SARX, 3, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55243, 60, 597}, + /* 5 : SARX reg32,reg32 [r+mv: vex.lz.f3.0f38.w0 f7 /r ] SM0,ND,BMI2,FUTURE */ + /* 261(002 002) 001(f7) 100 : SM0,NOAPX,VEX,BMI2,FUTURE */ + {I_SARX, 2, {REG_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55250, 61, 597}, + /* 6 : SARX reg32,rm32*,reg64 [rmv: vex.lz.f3.0f38.w0 f7 /r ] ND,SM0,SM1,BMI2,FUTURE */ + /* 262(002 002) 001(f7) 110 : SM0,SM1,NOAPX,VEX,BMI2,FUTURE */ + {I_SARX, 3, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,REG_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55243, 60, 601}, + /* 7 : SARX reg32,reg64 [r+mv: vex.lz.f3.0f38.w0 f7 /r ] SM0,ND,BMI2,FUTURE */ + /* 261(002 002) 001(f7) 100 : SM0,NOAPX,VEX,BMI2,FUTURE */ + {I_SARX, 2, {REG_GPR|BITS32|RN_L16,REG_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55250, 61, 601}, + /* 8 : SARX reg64,rm64*,reg8 [rmv: vex.lz.f3.0f38.w1 f7 /r ] SM0,ND,SM1,BMI2,FUTURE */ + /* 262(002 202) 001(f7) 110 : SM0,SM1,NOAPX,VEX,BMI2,FUTURE */ + {I_SARX, 3, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,REG_GPR|BITS8|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55285, 60, 607}, + /* 9 : SARX reg64,reg8 [r+mv: vex.lz.f3.0f38.w1 f7 /r ] ND,SM0,BMI2,FUTURE */ + /* 261(002 202) 001(f7) 100 : SM0,NOAPX,VEX,BMI2,FUTURE */ + {I_SARX, 2, {REG_GPR|BITS64|RN_L16,REG_GPR|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55292, 61, 607}, + /* 10 : SARX reg64,rm64*,reg16 [rmv: vex.lz.f3.0f38.w1 f7 /r ] ND,SM0,SM1,BMI2,FUTURE */ + /* 262(002 202) 001(f7) 110 : SM0,SM1,NOAPX,VEX,BMI2,FUTURE */ + {I_SARX, 3, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,REG_GPR|BITS16|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55285, 60, 611}, + /* 11 : SARX reg64,reg16 [r+mv: vex.lz.f3.0f38.w1 f7 /r ] SM0,ND,BMI2,FUTURE */ + /* 261(002 202) 001(f7) 100 : SM0,NOAPX,VEX,BMI2,FUTURE */ + {I_SARX, 2, {REG_GPR|BITS64|RN_L16,REG_GPR|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55292, 61, 611}, + /* 12 : SARX reg64,rm64*,reg32 [rmv: vex.lz.f3.0f38.w1 f7 /r ] SM0,ND,SM1,BMI2,FUTURE */ + /* 262(002 202) 001(f7) 110 : SM0,SM1,NOAPX,VEX,BMI2,FUTURE */ + {I_SARX, 3, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55285, 60, 615}, + /* 13 : SARX reg64,reg32 [r+mv: vex.lz.f3.0f38.w1 f7 /r ] ND,SM0,BMI2,FUTURE */ + /* 261(002 202) 001(f7) 100 : SM0,NOAPX,VEX,BMI2,FUTURE */ + {I_SARX, 2, {REG_GPR|BITS64|RN_L16,REG_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55292, 61, 615}, + /* 14 : SARX reg64,rm64*,reg64 [rmv: vex.lz.f3.0f38.w1 f7 /r ] SM0,SM1,BMI2,FUTURE */ + /* 262(002 202) 001(f7) 110 : SM0,SM1,NOAPX,VEX,BMI2,FUTURE */ + {I_SARX, 3, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55285, 60, 619}, + /* 15 : SARX reg64,reg64 [r+mv: vex.lz.f3.0f38.w1 f7 /r ] SM0,ND,BMI2,FUTURE */ + /* 261(002 202) 001(f7) 100 : SM0,NOAPX,VEX,BMI2,FUTURE */ + {I_SARX, 2, {REG_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55292, 61, 619}, + /* 16 : SARX reg32,rm32*,reg8 [rmv: evex.lz.f3.0f38.w0 f7 /r ] SM0,ND,SM1,LONG,PROT,BMI2,APX,X86_64 */ + /* 242(f2 7e 08) 300 001(f7) 110 : SM0,SM1,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SARX, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24106, 70, 855}, + /* 17 : SARX reg32,reg8 [r+mv: evex.lz.f3.0f38.w0 f7 /r ] SM0,ND,LONG,PROT,BMI2,APX,X86_64 */ + /* 241(f2 7e 08) 300 001(f7) 100 : SM0,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SARX, 2, {REG_GPR|BITS32,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+24115, 71, 855}, + /* 18 : SARX reg32,rm32*,reg16 [rmv: evex.lz.f3.0f38.w0 f7 /r ] ND,SM0,SM1,LONG,PROT,BMI2,APX,X86_64 */ + /* 242(f2 7e 08) 300 001(f7) 110 : SM0,SM1,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SARX, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+24106, 70, 859}, + /* 19 : SARX reg32,reg16 [r+mv: evex.lz.f3.0f38.w0 f7 /r ] SM0,ND,LONG,PROT,BMI2,APX,X86_64 */ + /* 241(f2 7e 08) 300 001(f7) 100 : SM0,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SARX, 2, {REG_GPR|BITS32,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+24115, 71, 859}, + /* 20 : SARX reg32,rm32*,reg32 [rmv: evex.lz.f3.0f38.w0 f7 /r ] SM0,SM1,LONG,PROT,BMI2,APX,X86_64 */ + /* 242(f2 7e 08) 300 001(f7) 110 : SM0,SM1,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SARX, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+24106, 70, 863}, + /* 21 : SARX reg32,reg32 [r+mv: evex.lz.f3.0f38.w0 f7 /r ] SM0,ND,LONG,PROT,BMI2,APX,X86_64 */ + /* 241(f2 7e 08) 300 001(f7) 100 : SM0,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SARX, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+24115, 71, 863}, + /* 22 : SARX reg32,rm32*,reg64 [rmv: evex.lz.f3.0f38.w0 f7 /r ] SM0,ND,SM1,LONG,PROT,BMI2,APX,X86_64 */ + /* 242(f2 7e 08) 300 001(f7) 110 : SM0,SM1,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SARX, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+24106, 70, 867}, + /* 23 : SARX reg32,reg64 [r+mv: evex.lz.f3.0f38.w0 f7 /r ] ND,SM0,LONG,PROT,BMI2,APX,X86_64 */ + /* 241(f2 7e 08) 300 001(f7) 100 : SM0,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SARX, 2, {REG_GPR|BITS32,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+24115, 71, 867}, + /* 24 : SARX reg64,rm64*,reg8 [rmv: evex.lz.f3.0f38.w1 f7 /r ] SM0,ND,SM1,LONG,PROT,BMI2,APX,X86_64 */ + /* 242(f2 fe 08) 300 001(f7) 110 : SM0,SM1,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SARX, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24160, 70, 873}, + /* 25 : SARX reg64,reg8 [r+mv: evex.lz.f3.0f38.w1 f7 /r ] ND,SM0,LONG,PROT,BMI2,APX,X86_64 */ + /* 241(f2 fe 08) 300 001(f7) 100 : SM0,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SARX, 2, {REG_GPR|BITS64,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+24169, 71, 873}, + /* 26 : SARX reg64,rm64*,reg16 [rmv: evex.lz.f3.0f38.w1 f7 /r ] SM0,ND,SM1,LONG,PROT,BMI2,APX,X86_64 */ + /* 242(f2 fe 08) 300 001(f7) 110 : SM0,SM1,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SARX, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+24160, 70, 877}, + /* 27 : SARX reg64,reg16 [r+mv: evex.lz.f3.0f38.w1 f7 /r ] ND,SM0,LONG,PROT,BMI2,APX,X86_64 */ + /* 241(f2 fe 08) 300 001(f7) 100 : SM0,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SARX, 2, {REG_GPR|BITS64,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+24169, 71, 877}, + /* 28 : SARX reg64,rm64*,reg32 [rmv: evex.lz.f3.0f38.w1 f7 /r ] SM0,ND,SM1,LONG,PROT,BMI2,APX,X86_64 */ + /* 242(f2 fe 08) 300 001(f7) 110 : SM0,SM1,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SARX, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+24160, 70, 881}, + /* 29 : SARX reg64,reg32 [r+mv: evex.lz.f3.0f38.w1 f7 /r ] ND,SM0,LONG,PROT,BMI2,APX,X86_64 */ + /* 241(f2 fe 08) 300 001(f7) 100 : SM0,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SARX, 2, {REG_GPR|BITS64,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+24169, 71, 881}, + /* 30 : SARX reg64,rm64*,reg64 [rmv: evex.lz.f3.0f38.w1 f7 /r ] SM0,SM1,LONG,PROT,BMI2,APX,X86_64 */ + /* 242(f2 fe 08) 300 001(f7) 110 : SM0,SM1,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SARX, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+24160, 70, 885}, + /* 31 : SARX reg64,reg64 [r+mv: evex.lz.f3.0f38.w1 f7 /r ] SM0,ND,LONG,PROT,BMI2,APX,X86_64 */ + /* 241(f2 fe 08) 300 001(f7) 100 : SM0,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SARX, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+24169, 71, 885}, +}; + +static const struct itemplate instrux_SHRX[32] = { + /* 0 : SHRX reg32,rm32*,reg8 [rmv: vex.lz.f2.0f38.w0 f7 /r ] SM0,ND,SM1,BMI2,FUTURE */ + /* 262(002 003) 001(f7) 110 : SM0,SM1,NOAPX,VEX,BMI2,FUTURE */ + {I_SHRX, 3, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,REG_GPR|BITS8|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55257, 60, 590}, + /* 1 : SHRX reg32,reg8 [r+mv: vex.lz.f2.0f38.w0 f7 /r ] ND,SM0,BMI2,FUTURE */ + /* 261(002 003) 001(f7) 100 : SM0,NOAPX,VEX,BMI2,FUTURE */ + {I_SHRX, 2, {REG_GPR|BITS32|RN_L16,REG_GPR|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55264, 61, 590}, + /* 2 : SHRX reg32,rm32*,reg16 [rmv: vex.lz.f2.0f38.w0 f7 /r ] ND,SM0,SM1,BMI2,FUTURE */ + /* 262(002 003) 001(f7) 110 : SM0,SM1,NOAPX,VEX,BMI2,FUTURE */ + {I_SHRX, 3, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,REG_GPR|BITS16|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55257, 60, 594}, + /* 3 : SHRX reg32,reg16 [r+mv: vex.lz.f2.0f38.w0 f7 /r ] SM0,ND,BMI2,FUTURE */ + /* 261(002 003) 001(f7) 100 : SM0,NOAPX,VEX,BMI2,FUTURE */ + {I_SHRX, 2, {REG_GPR|BITS32|RN_L16,REG_GPR|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55264, 61, 594}, + /* 4 : SHRX reg32,rm32*,reg32 [rmv: vex.lz.f2.0f38.w0 f7 /r ] SM0,SM1,BMI2,FUTURE */ + /* 262(002 003) 001(f7) 110 : SM0,SM1,NOAPX,VEX,BMI2,FUTURE */ + {I_SHRX, 3, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55257, 60, 598}, + /* 5 : SHRX reg32,reg32 [r+mv: vex.lz.f2.0f38.w0 f7 /r ] SM0,ND,BMI2,FUTURE */ + /* 261(002 003) 001(f7) 100 : SM0,NOAPX,VEX,BMI2,FUTURE */ + {I_SHRX, 2, {REG_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55264, 61, 598}, + /* 6 : SHRX reg32,rm32*,reg64 [rmv: vex.lz.f2.0f38.w0 f7 /r ] ND,SM0,SM1,BMI2,FUTURE */ + /* 262(002 003) 001(f7) 110 : SM0,SM1,NOAPX,VEX,BMI2,FUTURE */ + {I_SHRX, 3, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,REG_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55257, 60, 602}, + /* 7 : SHRX reg32,reg64 [r+mv: vex.lz.f2.0f38.w0 f7 /r ] ND,SM0,BMI2,FUTURE */ + /* 261(002 003) 001(f7) 100 : SM0,NOAPX,VEX,BMI2,FUTURE */ + {I_SHRX, 2, {REG_GPR|BITS32|RN_L16,REG_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55264, 61, 602}, + /* 8 : SHRX reg64,rm64*,reg8 [rmv: vex.lz.f2.0f38.w1 f7 /r ] ND,SM0,SM1,BMI2,FUTURE */ + /* 262(002 203) 001(f7) 110 : SM0,SM1,NOAPX,VEX,BMI2,FUTURE */ + {I_SHRX, 3, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,REG_GPR|BITS8|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55299, 60, 608}, + /* 9 : SHRX reg64,reg8 [r+mv: vex.lz.f2.0f38.w1 f7 /r ] ND,SM0,BMI2,FUTURE */ + /* 261(002 203) 001(f7) 100 : SM0,NOAPX,VEX,BMI2,FUTURE */ + {I_SHRX, 2, {REG_GPR|BITS64|RN_L16,REG_GPR|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55306, 61, 608}, + /* 10 : SHRX reg64,rm64*,reg16 [rmv: vex.lz.f2.0f38.w1 f7 /r ] ND,SM0,SM1,BMI2,FUTURE */ + /* 262(002 203) 001(f7) 110 : SM0,SM1,NOAPX,VEX,BMI2,FUTURE */ + {I_SHRX, 3, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,REG_GPR|BITS16|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55299, 60, 612}, + /* 11 : SHRX reg64,reg16 [r+mv: vex.lz.f2.0f38.w1 f7 /r ] ND,SM0,BMI2,FUTURE */ + /* 261(002 203) 001(f7) 100 : SM0,NOAPX,VEX,BMI2,FUTURE */ + {I_SHRX, 2, {REG_GPR|BITS64|RN_L16,REG_GPR|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55306, 61, 612}, + /* 12 : SHRX reg64,rm64*,reg32 [rmv: vex.lz.f2.0f38.w1 f7 /r ] SM0,ND,SM1,BMI2,FUTURE */ + /* 262(002 203) 001(f7) 110 : SM0,SM1,NOAPX,VEX,BMI2,FUTURE */ + {I_SHRX, 3, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55299, 60, 616}, + /* 13 : SHRX reg64,reg32 [r+mv: vex.lz.f2.0f38.w1 f7 /r ] SM0,ND,BMI2,FUTURE */ + /* 261(002 203) 001(f7) 100 : SM0,NOAPX,VEX,BMI2,FUTURE */ + {I_SHRX, 2, {REG_GPR|BITS64|RN_L16,REG_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55306, 61, 616}, + /* 14 : SHRX reg64,rm64*,reg64 [rmv: vex.lz.f2.0f38.w1 f7 /r ] SM0,SM1,BMI2,FUTURE */ + /* 262(002 203) 001(f7) 110 : SM0,SM1,NOAPX,VEX,BMI2,FUTURE */ + {I_SHRX, 3, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55299, 60, 620}, + /* 15 : SHRX reg64,reg64 [r+mv: vex.lz.f2.0f38.w1 f7 /r ] ND,SM0,BMI2,FUTURE */ + /* 261(002 203) 001(f7) 100 : SM0,NOAPX,VEX,BMI2,FUTURE */ + {I_SHRX, 2, {REG_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55306, 61, 620}, + /* 16 : SHRX reg32,rm32*,reg8 [rmv: evex.lz.f2.0f38.w0 f7 /r ] SM0,ND,SM1,LONG,PROT,BMI2,APX,X86_64 */ + /* 242(f2 7f 08) 300 001(f7) 110 : SM0,SM1,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SHRX, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24124, 70, 856}, + /* 17 : SHRX reg32,reg8 [r+mv: evex.lz.f2.0f38.w0 f7 /r ] SM0,ND,LONG,PROT,BMI2,APX,X86_64 */ + /* 241(f2 7f 08) 300 001(f7) 100 : SM0,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SHRX, 2, {REG_GPR|BITS32,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+24133, 71, 856}, + /* 18 : SHRX reg32,rm32*,reg16 [rmv: evex.lz.f2.0f38.w0 f7 /r ] ND,SM0,SM1,LONG,PROT,BMI2,APX,X86_64 */ + /* 242(f2 7f 08) 300 001(f7) 110 : SM0,SM1,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SHRX, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+24124, 70, 860}, + /* 19 : SHRX reg32,reg16 [r+mv: evex.lz.f2.0f38.w0 f7 /r ] ND,SM0,LONG,PROT,BMI2,APX,X86_64 */ + /* 241(f2 7f 08) 300 001(f7) 100 : SM0,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SHRX, 2, {REG_GPR|BITS32,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+24133, 71, 860}, + /* 20 : SHRX reg32,rm32*,reg32 [rmv: evex.lz.f2.0f38.w0 f7 /r ] SM0,SM1,LONG,PROT,BMI2,APX,X86_64 */ + /* 242(f2 7f 08) 300 001(f7) 110 : SM0,SM1,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SHRX, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+24124, 70, 864}, + /* 21 : SHRX reg32,reg32 [r+mv: evex.lz.f2.0f38.w0 f7 /r ] ND,SM0,LONG,PROT,BMI2,APX,X86_64 */ + /* 241(f2 7f 08) 300 001(f7) 100 : SM0,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SHRX, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+24133, 71, 864}, + /* 22 : SHRX reg32,rm32*,reg64 [rmv: evex.lz.f2.0f38.w0 f7 /r ] SM0,ND,SM1,LONG,PROT,BMI2,APX,X86_64 */ + /* 242(f2 7f 08) 300 001(f7) 110 : SM0,SM1,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SHRX, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+24124, 70, 868}, + /* 23 : SHRX reg32,reg64 [r+mv: evex.lz.f2.0f38.w0 f7 /r ] ND,SM0,LONG,PROT,BMI2,APX,X86_64 */ + /* 241(f2 7f 08) 300 001(f7) 100 : SM0,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SHRX, 2, {REG_GPR|BITS32,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+24133, 71, 868}, + /* 24 : SHRX reg64,rm64*,reg8 [rmv: evex.lz.f2.0f38.w1 f7 /r ] SM0,ND,SM1,LONG,PROT,BMI2,APX,X86_64 */ + /* 242(f2 ff 08) 300 001(f7) 110 : SM0,SM1,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SHRX, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24178, 70, 874}, + /* 25 : SHRX reg64,reg8 [r+mv: evex.lz.f2.0f38.w1 f7 /r ] SM0,ND,LONG,PROT,BMI2,APX,X86_64 */ + /* 241(f2 ff 08) 300 001(f7) 100 : SM0,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SHRX, 2, {REG_GPR|BITS64,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+24187, 71, 874}, + /* 26 : SHRX reg64,rm64*,reg16 [rmv: evex.lz.f2.0f38.w1 f7 /r ] ND,SM0,SM1,LONG,PROT,BMI2,APX,X86_64 */ + /* 242(f2 ff 08) 300 001(f7) 110 : SM0,SM1,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SHRX, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+24178, 70, 878}, + /* 27 : SHRX reg64,reg16 [r+mv: evex.lz.f2.0f38.w1 f7 /r ] ND,SM0,LONG,PROT,BMI2,APX,X86_64 */ + /* 241(f2 ff 08) 300 001(f7) 100 : SM0,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SHRX, 2, {REG_GPR|BITS64,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+24187, 71, 878}, + /* 28 : SHRX reg64,rm64*,reg32 [rmv: evex.lz.f2.0f38.w1 f7 /r ] SM0,ND,SM1,LONG,PROT,BMI2,APX,X86_64 */ + /* 242(f2 ff 08) 300 001(f7) 110 : SM0,SM1,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SHRX, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+24178, 70, 882}, + /* 29 : SHRX reg64,reg32 [r+mv: evex.lz.f2.0f38.w1 f7 /r ] ND,SM0,LONG,PROT,BMI2,APX,X86_64 */ + /* 241(f2 ff 08) 300 001(f7) 100 : SM0,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SHRX, 2, {REG_GPR|BITS64,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+24187, 71, 882}, + /* 30 : SHRX reg64,rm64*,reg64 [rmv: evex.lz.f2.0f38.w1 f7 /r ] SM0,SM1,LONG,PROT,BMI2,APX,X86_64 */ + /* 242(f2 ff 08) 300 001(f7) 110 : SM0,SM1,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SHRX, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+24178, 70, 886}, + /* 31 : SHRX reg64,reg64 [r+mv: evex.lz.f2.0f38.w1 f7 /r ] ND,SM0,LONG,PROT,BMI2,APX,X86_64 */ + /* 241(f2 ff 08) 300 001(f7) 100 : SM0,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SHRX, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+24187, 71, 886}, +}; + +static const struct itemplate instrux_INC[18] = { + /* 0 : INC reg16 [r: o16 40+r ] NOREX,NOAPX,NOLONG,FL,8086 */ + /* 320 010 100 : NOREX,NOAPX,NOLONG,FL,8086 */ + {I_INC, 1, {REG_GPR|BITS16|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72640, 74, 925}, + /* 1 : INC reg32 [r: o32 40+r ] NOREX,NOAPX,NOLONG,FL,386 */ + /* 321 010 100 : NOREX,NOAPX,NOLONG,FL,386 */ + {I_INC, 1, {REG_GPR|BITS32|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72644, 75, 926}, + /* 2 : INC rm8 [m: hle o8 fe /0 ] LOCK,FL,8086 */ + /* 273 001(fe) 200 : LOCK,FL,8086 */ + {I_INC, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71614, 76, 927}, + /* 3 : INC rm16 [m: hle o16 ff /0 ] LOCK,FL,8086 */ + /* 273 320 001(ff) 200 : LOCK,FL,8086 */ + {I_INC, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+66657, 76, 928}, + /* 4 : INC rm32 [m: hle o32 ff /0 ] LOCK,FL,386 */ + /* 273 321 001(ff) 200 : LOCK,FL,386 */ + {I_INC, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+66663, 77, 929}, + /* 5 : INC rm64 [m: hle o64 ff /0 ] LOCK,LONG,FL,PROT,X86_64 */ + /* 273 324 001(ff) 200 : LOCK,LONG,FL,PROT,X86_64 */ + {I_INC, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+66669, 78, 930}, + /* 6 : INC reg8?,rm8 [vm: evex.nf.nd1.l0.m4.o8 fe /0 ] NF,ZU,LOCK,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(fe) 210 : NF,NF_E,ZU,WIG,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_INC, 2, {REG_GPR|BITS8,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+24196, 79, 931}, + /* 7 : INC rm8 [m: evex.nf.nd0.l0.m4.o8 fe /0 ] NF,LOCK,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(fe) 200 : NF,NF_E,WIG,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_INC, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+24205, 80, 931}, + /* 8 : INC reg8? [v+m: evex.nf.nd1.l0.m4.o8 fe /0 ] ND,NF,ZU,LOCK,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(fe) 200 : NF,NF_E,ZU,WIG,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_INC, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+24214, 79, 931}, + /* 9 : INC reg16?,rm16 [vm: evex.nf.nd1.l0.m4.o16 ff /0 ] NF,ZU,LOCK,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(ff) 210 : NF,NF_E,ZU,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_INC, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+12153, 81, 932}, + /* 10 : INC rm16 [m: evex.nf.nd0.l0.m4.o16 ff /0 ] NF,LOCK,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(ff) 200 : NF,NF_E,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_INC, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12163, 82, 932}, + /* 11 : INC reg16? [v+m: evex.nf.nd1.l0.m4.o16 ff /0 ] ND,NF,ZU,LOCK,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(ff) 200 : NF,NF_E,ZU,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_INC, 1, {REG_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12173, 81, 932}, + /* 12 : INC reg32?,rm32 [vm: evex.nf.nd1.l0.m4.o32 ff /0 ] NF,ZU,LOCK,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(ff) 210 : NF,NF_E,ZU,WW,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_INC, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+12183, 83, 933}, + /* 13 : INC rm32 [m: evex.nf.nd0.l0.m4.o32 ff /0 ] NF,LOCK,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(ff) 200 : NF,NF_E,WW,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_INC, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12193, 84, 933}, + /* 14 : INC reg32? [v+m: evex.nf.nd1.l0.m4.o32 ff /0 ] ND,NF,ZU,LOCK,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(ff) 200 : NF,NF_E,ZU,WW,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_INC, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12203, 83, 933}, + /* 15 : INC reg64?,rm64 [vm: evex.nf.nd1.l0.m4.o64 ff /0 ] NF,ZU,LOCK,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(ff) 210 : NF,NF_E,ZU,WW,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_INC, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+12213, 83, 934}, + /* 16 : INC rm64 [m: evex.nf.nd0.l0.m4.o64 ff /0 ] NF,LOCK,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(ff) 200 : NF,NF_E,WW,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_INC, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12223, 84, 934}, + /* 17 : INC reg64? [v+m: evex.nf.nd1.l0.m4.o64 ff /0 ] ND,NF,ZU,LOCK,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(ff) 200 : NF,NF_E,ZU,WW,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_INC, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12233, 83, 934}, +}; + +static const struct itemplate instrux_DEC[18] = { + /* 0 : DEC reg16 [r: o16 48+r ] NOREX,NOAPX,NOLONG,FL,8086 */ + /* 320 010 110 : NOREX,NOAPX,NOLONG,FL,8086 */ + {I_DEC, 1, {REG_GPR|BITS16|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72648, 74, 935}, + /* 1 : DEC reg32 [r: o32 48+r ] NOREX,NOAPX,NOLONG,FL,386 */ + /* 321 010 110 : NOREX,NOAPX,NOLONG,FL,386 */ + {I_DEC, 1, {REG_GPR|BITS32|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72652, 75, 936}, + /* 2 : DEC rm8 [m: hle o8 fe /1 ] LOCK,FL,8086 */ + /* 273 001(fe) 201 : LOCK,FL,8086 */ + {I_DEC, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71619, 76, 937}, + /* 3 : DEC rm16 [m: hle o16 ff /1 ] LOCK,FL,8086 */ + /* 273 320 001(ff) 201 : LOCK,FL,8086 */ + {I_DEC, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+66675, 76, 938}, + /* 4 : DEC rm32 [m: hle o32 ff /1 ] LOCK,FL,386 */ + /* 273 321 001(ff) 201 : LOCK,FL,386 */ + {I_DEC, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+66681, 77, 939}, + /* 5 : DEC rm64 [m: hle o64 ff /1 ] LOCK,LONG,FL,PROT,X86_64 */ + /* 273 324 001(ff) 201 : LOCK,LONG,FL,PROT,X86_64 */ + {I_DEC, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+66687, 78, 940}, + /* 6 : DEC reg8?,rm8 [vm: evex.nf.nd1.l0.m4.o8 fe /1 ] NF,ZU,LOCK,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(fe) 211 : NF,NF_E,ZU,WIG,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_DEC, 2, {REG_GPR|BITS8,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+24223, 79, 941}, + /* 7 : DEC rm8 [m: evex.nf.nd0.l0.m4.o8 fe /1 ] NF,LOCK,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(fe) 201 : NF,NF_E,WIG,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_DEC, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+24232, 80, 941}, + /* 8 : DEC reg8? [v+m: evex.nf.nd1.l0.m4.o8 fe /1 ] ND,NF,ZU,LOCK,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(fe) 201 : NF,NF_E,ZU,WIG,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_DEC, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+24241, 79, 941}, + /* 9 : DEC reg16?,rm16 [vm: evex.nf.nd1.l0.m4.o16 ff /1 ] NF,ZU,LOCK,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(ff) 211 : NF,NF_E,ZU,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_DEC, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+12243, 81, 942}, + /* 10 : DEC rm16 [m: evex.nf.nd0.l0.m4.o16 ff /1 ] NF,LOCK,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(ff) 201 : NF,NF_E,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_DEC, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12253, 82, 942}, + /* 11 : DEC reg16? [v+m: evex.nf.nd1.l0.m4.o16 ff /1 ] ND,NF,ZU,LOCK,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(ff) 201 : NF,NF_E,ZU,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_DEC, 1, {REG_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12263, 81, 942}, + /* 12 : DEC reg32?,rm32 [vm: evex.nf.nd1.l0.m4.o32 ff /1 ] NF,ZU,LOCK,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(ff) 211 : NF,NF_E,ZU,WW,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_DEC, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+12273, 83, 943}, + /* 13 : DEC rm32 [m: evex.nf.nd0.l0.m4.o32 ff /1 ] NF,LOCK,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(ff) 201 : NF,NF_E,WW,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_DEC, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12283, 84, 943}, + /* 14 : DEC reg32? [v+m: evex.nf.nd1.l0.m4.o32 ff /1 ] ND,NF,ZU,LOCK,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(ff) 201 : NF,NF_E,ZU,WW,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_DEC, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12293, 83, 943}, + /* 15 : DEC reg64?,rm64 [vm: evex.nf.nd1.l0.m4.o64 ff /1 ] NF,ZU,LOCK,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(ff) 211 : NF,NF_E,ZU,WW,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_DEC, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+12303, 83, 944}, + /* 16 : DEC rm64 [m: evex.nf.nd0.l0.m4.o64 ff /1 ] NF,LOCK,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(ff) 201 : NF,NF_E,WW,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_DEC, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12313, 84, 944}, + /* 17 : DEC reg64? [v+m: evex.nf.nd1.l0.m4.o64 ff /1 ] ND,NF,ZU,LOCK,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(ff) 201 : NF,NF_E,ZU,WW,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_DEC, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12323, 83, 944}, +}; + +static const struct itemplate instrux_IMUL[38] = { + /* 0 : IMUL rm8 [m: o8 f6 /5 ] FL,8086 */ + /* 001(f6) 205 : FL,8086 */ + {I_IMUL, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+24255, 56, 946}, + /* 1 : IMUL rm16 [m: o16 f7 /5 ] FL,8086 */ + /* 320 001(f7) 205 : FL,8086 */ + {I_IMUL, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12338, 56, 947}, + /* 2 : IMUL rm32 [m: o32 f7 /5 ] FL,386 */ + /* 321 001(f7) 205 : FL,386 */ + {I_IMUL, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12348, 57, 948}, + /* 3 : IMUL rm64 [m: o64 f7 /5 ] LONG,FL,PROT,X86_64 */ + /* 324 001(f7) 205 : LONG,FL,PROT,X86_64 */ + {I_IMUL, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12358, 58, 949}, + /* 4 : IMUL rm8 [m: evex.nf.nd0.l0.m4.o8 f6 /5 ] SM0,NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(f6) 205 : SM0,NF,NF_E,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_IMUL, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+24250, 85, 950}, + /* 5 : IMUL rm16 [m: evex.nf.nd0.l0.m4.o16 f7 /5 ] SM0,NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(f7) 205 : SM0,NF,NF_E,LONG,EVEX,PROT,APX,X86_64 */ + {I_IMUL, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12333, 86, 951}, + /* 6 : IMUL rm32 [m: evex.nf.nd0.l0.m4.o32 f7 /5 ] SM0,NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(f7) 205 : SM0,NF,NF_E,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_IMUL, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12343, 87, 952}, + /* 7 : IMUL rm64 [m: evex.nf.nd0.l0.m4.o64 f7 /5 ] SM0,NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(f7) 205 : SM0,NF,NF_E,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_IMUL, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12353, 87, 953}, + /* 8 : IMUL reg16,rm16 [rm: o16 0f af /r ] SM0-1,FL,386 */ + /* 320 355 001(af) 110 : SM0,SM1,FL,386 */ + {I_IMUL, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66693, 29, 954}, + /* 9 : IMUL reg32,rm32 [rm: o32 0f af /r ] SM0-1,FL,386 */ + /* 321 355 001(af) 110 : SM0,SM1,FL,386 */ + {I_IMUL, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+66699, 29, 955}, + /* 10 : IMUL reg64,rm64 [rm: o64 0f af /r ] SM0-1,LONG,FL,PROT,X86_64 */ + /* 324 355 001(af) 110 : SM0,SM1,LONG,FL,PROT,X86_64 */ + {I_IMUL, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+66705, 30, 956}, + /* 11 : IMUL reg16,rm16*,sbyteword16 [rmi: o16 6b /r ib,s ] SM0,SM1,SM2,FL,186 */ + /* 320 001(6b) 110 276 : SM0,SM1,SM2,FL,186 */ + {I_IMUL, 3, {REG_GPR|BITS16,RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2108, 88, 957}, + /* 12 : IMUL reg16,sbyteword16 [r+mi: o16 6b /r ib,s ] SM0,ND,SM1,FL,186 */ + /* 320 001(6b) 100 275 : SM0,SM1,FL,186 */ + {I_IMUL, 2, {REG_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+66711, 89, 957}, + /* 13 : IMUL reg32,rm32*,sbytedword32 [rmi: o32 6b /r ib,s ] SM0,SM1,SM2,FL,386 */ + /* 321 001(6b) 110 276 : SM0,SM1,SM2,FL,386 */ + {I_IMUL, 3, {REG_GPR|BITS32,RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2119, 90, 958}, + /* 14 : IMUL reg32,sbytedword32 [r+mi: o32 6b /r ib,s ] ND,SM0,SM1,FL,386 */ + /* 321 001(6b) 100 275 : SM0,SM1,FL,386 */ + {I_IMUL, 2, {REG_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+66717, 29, 958}, + /* 15 : IMUL reg64,rm64*,sbytedword64 [rmi: o64 6b /r ib,s ] SM0,SM1,SM2,LONG,FL,PROT,X86_64 */ + /* 324 001(6b) 110 276 : SM0,SM1,SM2,LONG,FL,PROT,X86_64 */ + {I_IMUL, 3, {REG_GPR|BITS64,RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2130, 91, 959}, + /* 16 : IMUL reg64,sbytedword64 [r+mi: o64 6b /r ib,s ] SM0,ND,SM1,LONG,FL,PROT,X86_64 */ + /* 324 001(6b) 100 275 : SM0,SM1,LONG,FL,PROT,X86_64 */ + {I_IMUL, 2, {REG_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+66723, 30, 959}, + /* 17 : IMUL reg16,rm16*,imm16 [rmi: o16 69 /r iw ] SM0,SM1,SM2,FL,186 */ + /* 320 001(69) 110 032 : SM0,SM1,SM2,FL,186 */ + {I_IMUL, 3, {REG_GPR|BITS16,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+2141, 88, 960}, + /* 18 : IMUL reg16,imm16 [r+mi: o16 69 /r iw ] ND,SM0,SM1,FL,186 */ + /* 320 001(69) 100 031 : SM0,SM1,FL,186 */ + {I_IMUL, 2, {REG_GPR|BITS16,IMM_NORMAL|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66729, 89, 960}, + /* 19 : IMUL reg32,rm32*,imm32 [rmi: o32 69 /r id ] SM0,SM1,SM2,FL,386 */ + /* 321 001(69) 110 042 : SM0,SM1,SM2,FL,386 */ + {I_IMUL, 3, {REG_GPR|BITS32,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+2152, 90, 961}, + /* 20 : IMUL reg32,imm32 [r+mi: o32 69 /r id ] ND,SM0,SM1,FL,386 */ + /* 321 001(69) 100 041 : SM0,SM1,FL,386 */ + {I_IMUL, 2, {REG_GPR|BITS32,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+66735, 29, 961}, + /* 21 : IMUL reg64,rm64*,sdword64 [rmi: o64 69 /r id,s ] SM0,SM1,SM2,LONG,FL,PROT,X86_64 */ + /* 324 001(69) 110 256 : SM0,SM1,SM2,LONG,FL,PROT,X86_64 */ + {I_IMUL, 3, {REG_GPR|BITS64,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2163, 91, 962}, + /* 22 : IMUL reg64,sdword64 [r+mi: o64 69 /r id,s ] SM0,ND,SM1,LONG,FL,PROT,X86_64 */ + /* 324 001(69) 100 255 : SM0,SM1,LONG,FL,PROT,X86_64 */ + {I_IMUL, 2, {REG_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+66741, 30, 962}, + /* 23 : IMUL reg16?,reg16,rm16 [vrm: evex.nf.nd1.l0.m4.o16 af /r ] SM0,SM1,SM2,NF,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(af) 121 : SM0,SM1,SM2,NF,NF_E,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_IMUL, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+12363, 92, 963}, + /* 24 : IMUL reg16,rm16 [rm: evex.nf.nd0.l0.m4.o16 af /r ] SM0,SM1,NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(af) 110 : SM0,SM1,NF,NF_E,LONG,EVEX,PROT,APX,X86_64 */ + {I_IMUL, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+12373, 93, 963}, + /* 25 : IMUL reg16?,rm16 [v+rm: evex.nf.nd1.l0.m4.o16 af /r ] SM0,ND,SM1,NF,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(af) 110 : SM0,SM1,NF,NF_E,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_IMUL, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+12383, 94, 963}, + /* 26 : IMUL reg32?,reg32,rm32 [vrm: evex.nf.nd1.l0.m4.o32 af /r ] SM0,SM1,SM2,NF,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(af) 121 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_IMUL, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+12393, 95, 964}, + /* 27 : IMUL reg32,rm32 [rm: evex.nf.nd0.l0.m4.o32 af /r ] SM0,SM1,NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(af) 110 : SM0,SM1,NF,NF_E,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_IMUL, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+12403, 96, 964}, + /* 28 : IMUL reg32?,rm32 [v+rm: evex.nf.nd1.l0.m4.o32 af /r ] SM0,ND,SM1,NF,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(af) 110 : SM0,SM1,NF,NF_E,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_IMUL, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+12413, 97, 964}, + /* 29 : IMUL reg64?,reg64,rm64 [vrm: evex.nf.nd1.l0.m4.o64 af /r ] SM0,SM1,SM2,NF,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(af) 121 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_IMUL, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+12423, 95, 965}, + /* 30 : IMUL reg64,rm64 [rm: evex.nf.nd0.l0.m4.o64 af /r ] SM0,SM1,NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(af) 110 : SM0,SM1,NF,NF_E,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_IMUL, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+12433, 96, 965}, + /* 31 : IMUL reg64?,rm64 [v+rm: evex.nf.nd1.l0.m4.o64 af /r ] ND,SM0,SM1,NF,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(af) 110 : SM0,SM1,NF,NF_E,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_IMUL, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+12443, 97, 965}, + /* 32 : IMUL reg16,rm16,sbyteword16 [rmi: evex.nf.zu.l0.m4.o16 6b /r ib,s ] SM0-2,NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(6b) 110 276 : SM0,SM1,SM2,NF,NF_E,ZU,ZU_E,LONG,EVEX,PROT,APX,X86_64 */ + {I_IMUL, 3, {REG_GPR|BITS16,RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2103, 98, 966}, + /* 33 : IMUL reg32,rm32,sbytedword32 [rmi: evex.nf.zu.l0.m4.o32 6b /r ib,s ] SM0-2,NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(6b) 110 276 : SM0,SM1,SM2,NF,NF_E,ZU,ZU_E,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_IMUL, 3, {REG_GPR|BITS32,RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2114, 99, 967}, + /* 34 : IMUL reg64,rm64,sbytedword64 [rmi: evex.nf.zu.l0.m4.o64 6b /r ib,s ] SM0-2,NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(6b) 110 276 : SM0,SM1,SM2,NF,NF_E,ZU,ZU_E,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_IMUL, 3, {REG_GPR|BITS64,RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2125, 99, 968}, + /* 35 : IMUL reg16,rm16,imm16 [rmi: evex.nf.zu.l0.m4.o16 69 /r iw ] SM0-2,NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(69) 110 032 : SM0,SM1,SM2,NF,NF_E,ZU,ZU_E,LONG,EVEX,PROT,APX,X86_64 */ + {I_IMUL, 3, {REG_GPR|BITS16,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+2136, 98, 969}, + /* 36 : IMUL reg32,rm32,imm32 [rmi: evex.nf.zu.l0.m4.o32 69 /r id ] SM0-2,NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(69) 110 042 : SM0,SM1,SM2,NF,NF_E,ZU,ZU_E,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_IMUL, 3, {REG_GPR|BITS32,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+2147, 99, 970}, + /* 37 : IMUL reg64,rm64,sdword64 [rmi: evex.nf.zu.l0.m4.o64 69 /r id,s ] SM0-2,NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(69) 110 256 : SM0,SM1,SM2,NF,NF_E,ZU,ZU_E,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_IMUL, 3, {REG_GPR|BITS64,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2158, 99, 971}, +}; + +static const struct itemplate instrux_MUL[42] = { + /* 0 : MUL rm8 [m: o8 f6 /4 ] FL,8086 */ + /* 001(f6) 204 : FL,8086 */ + {I_MUL, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+24300, 56, 973}, + /* 1 : MUL rm16 [m: o16 f7 /4 ] FL,8086 */ + /* 320 001(f7) 204 : FL,8086 */ + {I_MUL, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12458, 56, 974}, + /* 2 : MUL rm32 [m: o32 f7 /4 ] FL,386 */ + /* 321 001(f7) 204 : FL,386 */ + {I_MUL, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12468, 57, 975}, + /* 3 : MUL rm64 [m: o64 f7 /4 ] LONG,FL,PROT,X86_64 */ + /* 324 001(f7) 204 : LONG,FL,PROT,X86_64 */ + {I_MUL, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12478, 58, 976}, + /* 4 : MUL reg32,reg32*,rm32 [rvm: vex.ndd.lz.f2.0f38.w0 f6 /r ] ND,OPT,NF,NF_R,BMI2,FUTURE */ + /* 261(002 003) 001(f6) 120 : OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {I_MUL, 3, {REG_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55313, 104, 979}, + /* 5 : MUL reg32,rm32 [r+vm: vex.ndd.lz.f2.0f38.w0 f6 /r ] ND,OPT,NF,NF_R,BMI2,FUTURE */ + /* 260(002 003) 001(f6) 110 : OPT,NOAPX,NF,NF_R,VEX,BMI2,FUTURE */ + {I_MUL, 2, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55320, 104, 979}, + /* 6 : MUL reg64,reg64*,rm64 [rvm: vex.ndd.lz.f2.0f38.w1 f6 /r ] ND,OPT,NF,NF_R,LONG,PROT,BMI2,X86_64 */ + /* 261(002 203) 001(f6) 120 : OPT,NOAPX,NF,NF_R,LONG,VEX,PROT,BMI2,X86_64 */ + {I_MUL, 3, {REG_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55327, 105, 980}, + /* 7 : MUL reg64,rm64 [r+vm: vex.ndd.lz.f2.0f38.w1 f6 /r ] ND,OPT,NF,NF_R,LONG,PROT,BMI2,X86_64 */ + /* 260(002 203) 001(f6) 110 : OPT,NOAPX,NF,NF_R,LONG,VEX,PROT,BMI2,X86_64 */ + {I_MUL, 2, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55334, 105, 980}, + /* 8 : MUL rm8 [m: evex.nf.nd0.l0.m4.o8 f6 /4 ] SM0,NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(f6) 204 : SM0,NF,NF_E,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_MUL, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+24295, 85, 981}, + /* 9 : MUL rm16 [m: evex.nf.nd0.l0.m4.o16 f7 /4 ] SM0,NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(f7) 204 : SM0,NF,NF_E,LONG,EVEX,PROT,APX,X86_64 */ + {I_MUL, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12453, 86, 982}, + /* 10 : MUL rm32 [m: evex.nf.nd0.l0.m4.o32 f7 /4 ] SM0,NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(f7) 204 : SM0,NF,NF_E,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_MUL, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12463, 87, 983}, + /* 11 : MUL rm64 [m: evex.nf.nd0.l0.m4.o64 f7 /4 ] SM0,NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(f7) 204 : SM0,NF,NF_E,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_MUL, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12473, 87, 984}, + /* 12 : MUL reg16,rm16 [rm: o16 0f af /r ] ND,SM0-1,FL,386 */ + /* 320 355 001(af) 110 : SM0,SM1,FL,386 */ + {I_MUL, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66693, 29, 987}, + /* 13 : MUL reg32,rm32 [rm: o32 0f af /r ] ND,SM0-1,FL,386 */ + /* 321 355 001(af) 110 : SM0,SM1,FL,386 */ + {I_MUL, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+66699, 29, 988}, + /* 14 : MUL reg64,rm64 [rm: o64 0f af /r ] ND,SM0-1,LONG,FL,PROT,X86_64 */ + /* 324 355 001(af) 110 : SM0,SM1,LONG,FL,PROT,X86_64 */ + {I_MUL, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+66705, 30, 989}, + /* 15 : MUL reg16,rm16*,sbyteword16 [rmi: o16 6b /r ib,s ] ND,SM0,SM1,SM2,FL,186 */ + /* 320 001(6b) 110 276 : SM0,SM1,SM2,FL,186 */ + {I_MUL, 3, {REG_GPR|BITS16,RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2108, 88, 990}, + /* 16 : MUL reg16,sbyteword16 [r+mi: o16 6b /r ib,s ] SM0,ND,SM1,FL,186 */ + /* 320 001(6b) 100 275 : SM0,SM1,FL,186 */ + {I_MUL, 2, {REG_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+66711, 89, 990}, + /* 17 : MUL reg32,rm32*,sbytedword32 [rmi: o32 6b /r ib,s ] SM0,ND,SM1,SM2,FL,386 */ + /* 321 001(6b) 110 276 : SM0,SM1,SM2,FL,386 */ + {I_MUL, 3, {REG_GPR|BITS32,RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2119, 90, 991}, + /* 18 : MUL reg32,sbytedword32 [r+mi: o32 6b /r ib,s ] SM0,ND,SM1,FL,386 */ + /* 321 001(6b) 100 275 : SM0,SM1,FL,386 */ + {I_MUL, 2, {REG_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+66717, 29, 991}, + /* 19 : MUL reg64,rm64*,sbytedword64 [rmi: o64 6b /r ib,s ] ND,SM0,SM1,SM2,LONG,FL,PROT,X86_64 */ + /* 324 001(6b) 110 276 : SM0,SM1,SM2,LONG,FL,PROT,X86_64 */ + {I_MUL, 3, {REG_GPR|BITS64,RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2130, 91, 992}, + /* 20 : MUL reg64,sbytedword64 [r+mi: o64 6b /r ib,s ] ND,SM0,SM1,LONG,FL,PROT,X86_64 */ + /* 324 001(6b) 100 275 : SM0,SM1,LONG,FL,PROT,X86_64 */ + {I_MUL, 2, {REG_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+66723, 30, 992}, + /* 21 : MUL reg16,rm16*,imm16 [rmi: o16 69 /r iw ] SM0,ND,SM1,SM2,FL,186 */ + /* 320 001(69) 110 032 : SM0,SM1,SM2,FL,186 */ + {I_MUL, 3, {REG_GPR|BITS16,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+2141, 88, 993}, + /* 22 : MUL reg16,imm16 [r+mi: o16 69 /r iw ] ND,SM0,SM1,FL,186 */ + /* 320 001(69) 100 031 : SM0,SM1,FL,186 */ + {I_MUL, 2, {REG_GPR|BITS16,IMM_NORMAL|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66729, 89, 993}, + /* 23 : MUL reg32,rm32*,imm32 [rmi: o32 69 /r id ] SM0,ND,SM1,SM2,FL,386 */ + /* 321 001(69) 110 042 : SM0,SM1,SM2,FL,386 */ + {I_MUL, 3, {REG_GPR|BITS32,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+2152, 90, 994}, + /* 24 : MUL reg32,imm32 [r+mi: o32 69 /r id ] ND,SM0,SM1,FL,386 */ + /* 321 001(69) 100 041 : SM0,SM1,FL,386 */ + {I_MUL, 2, {REG_GPR|BITS32,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+66735, 29, 994}, + /* 25 : MUL reg64,rm64*,sdword64 [rmi: o64 69 /r id,s ] SM0,ND,SM1,SM2,LONG,FL,PROT,X86_64 */ + /* 324 001(69) 110 256 : SM0,SM1,SM2,LONG,FL,PROT,X86_64 */ + {I_MUL, 3, {REG_GPR|BITS64,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2163, 91, 995}, + /* 26 : MUL reg64,sdword64 [r+mi: o64 69 /r id,s ] SM0,ND,SM1,LONG,FL,PROT,X86_64 */ + /* 324 001(69) 100 255 : SM0,SM1,LONG,FL,PROT,X86_64 */ + {I_MUL, 2, {REG_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+66741, 30, 995}, + /* 27 : MUL reg16?,reg16,rm16 [vrm: evex.nf.nd1.l0.m4.o16 af /r ] SM0,ND,SM1,SM2,NF,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(af) 121 : SM0,SM1,SM2,NF,NF_E,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_MUL, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+12363, 92, 996}, + /* 28 : MUL reg16,rm16 [rm: evex.nf.nd0.l0.m4.o16 af /r ] ND,SM0,SM1,NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(af) 110 : SM0,SM1,NF,NF_E,LONG,EVEX,PROT,APX,X86_64 */ + {I_MUL, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+12373, 93, 996}, + /* 29 : MUL reg16?,rm16 [v+rm: evex.nf.nd1.l0.m4.o16 af /r ] ND,SM0,SM1,NF,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(af) 110 : SM0,SM1,NF,NF_E,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_MUL, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+12383, 94, 996}, + /* 30 : MUL reg32?,reg32,rm32 [vrm: evex.nf.nd1.l0.m4.o32 af /r ] SM0,ND,SM1,SM2,NF,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(af) 121 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_MUL, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+12393, 95, 997}, + /* 31 : MUL reg32,rm32 [rm: evex.nf.nd0.l0.m4.o32 af /r ] SM0,ND,SM1,NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(af) 110 : SM0,SM1,NF,NF_E,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_MUL, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+12403, 96, 997}, + /* 32 : MUL reg32?,rm32 [v+rm: evex.nf.nd1.l0.m4.o32 af /r ] SM0,ND,SM1,NF,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(af) 110 : SM0,SM1,NF,NF_E,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_MUL, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+12413, 97, 997}, + /* 33 : MUL reg64?,reg64,rm64 [vrm: evex.nf.nd1.l0.m4.o64 af /r ] SM0,ND,SM1,SM2,NF,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(af) 121 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_MUL, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+12423, 95, 998}, + /* 34 : MUL reg64,rm64 [rm: evex.nf.nd0.l0.m4.o64 af /r ] SM0,ND,SM1,NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(af) 110 : SM0,SM1,NF,NF_E,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_MUL, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+12433, 96, 998}, + /* 35 : MUL reg64?,rm64 [v+rm: evex.nf.nd1.l0.m4.o64 af /r ] ND,SM0,SM1,NF,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(af) 110 : SM0,SM1,NF,NF_E,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_MUL, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+12443, 97, 998}, + /* 36 : MUL reg16,rm16,sbyteword16 [rmi: evex.nf.zu.l0.m4.o16 6b /r ib,s ] ND,SM0-2,NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(6b) 110 276 : SM0,SM1,SM2,NF,NF_E,ZU,ZU_E,LONG,EVEX,PROT,APX,X86_64 */ + {I_MUL, 3, {REG_GPR|BITS16,RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2103, 98, 999}, + /* 37 : MUL reg32,rm32,sbytedword32 [rmi: evex.nf.zu.l0.m4.o32 6b /r ib,s ] SM0,ND,SM1-2,NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(6b) 110 276 : SM0,SM1,SM2,NF,NF_E,ZU,ZU_E,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_MUL, 3, {REG_GPR|BITS32,RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2114, 99, 1000}, + /* 38 : MUL reg64,rm64,sbytedword64 [rmi: evex.nf.zu.l0.m4.o64 6b /r ib,s ] SM0,ND,SM1-2,NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(6b) 110 276 : SM0,SM1,SM2,NF,NF_E,ZU,ZU_E,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_MUL, 3, {REG_GPR|BITS64,RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2125, 99, 1001}, + /* 39 : MUL reg16,rm16,imm16 [rmi: evex.nf.zu.l0.m4.o16 69 /r iw ] ND,SM0-2,NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(69) 110 032 : SM0,SM1,SM2,NF,NF_E,ZU,ZU_E,LONG,EVEX,PROT,APX,X86_64 */ + {I_MUL, 3, {REG_GPR|BITS16,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+2136, 98, 1002}, + /* 40 : MUL reg32,rm32,imm32 [rmi: evex.nf.zu.l0.m4.o32 69 /r id ] SM0,ND,SM1-2,NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(69) 110 042 : SM0,SM1,SM2,NF,NF_E,ZU,ZU_E,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_MUL, 3, {REG_GPR|BITS32,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+2147, 99, 1003}, + /* 41 : MUL reg64,rm64,sdword64 [rmi: evex.nf.zu.l0.m4.o64 69 /r id,s ] SM0,ND,SM1-2,NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(69) 110 256 : SM0,SM1,SM2,NF,NF_E,ZU,ZU_E,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_MUL, 3, {REG_GPR|BITS64,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2158, 99, 1004}, +}; + +static const struct itemplate instrux_MULX[8] = { + /* 0 : MULX reg32,reg32*,rm32 [rvm: vex.ndd.lz.f2.0f38.w0 f6 /r ] BMI2,FUTURE */ + /* 261(002 003) 001(f6) 120 : NOAPX,VEX,BMI2,FUTURE */ + {I_MULX, 3, {REG_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55313, 100, 977}, + /* 1 : MULX reg32,reg32*,rm32 [rvm: evex.ndd.lz.f2.0f38.w0 f6 /r ] BMI2,FUTURE,APX */ + /* 241(f2 7f 08) 300 001(f6) 120 : LONG,EVEX,PROT,BMI2,APX,FUTURE */ + {I_MULX, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+24259, 101, 977}, + /* 2 : MULX reg32,rm32 [r+vm: vex.ndd.lz.f2.0f38.w0 f6 /r ] ND,BMI2,FUTURE */ + /* 260(002 003) 001(f6) 110 : NOAPX,VEX,BMI2,FUTURE */ + {I_MULX, 2, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55320, 100, 977}, + /* 3 : MULX reg32,rm32 [r+vm: evex.ndd.lz.f2.0f38.w0 f6 /r ] ND,BMI2,FUTURE,APX */ + /* 240(f2 7f 08) 300 001(f6) 110 : LONG,EVEX,PROT,BMI2,APX,FUTURE */ + {I_MULX, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+24268, 101, 977}, + /* 4 : MULX reg64,reg64*,rm64 [rvm: vex.ndd.lz.f2.0f38.w1 f6 /r ] LONG,PROT,BMI2,X86_64 */ + /* 261(002 203) 001(f6) 120 : NOAPX,LONG,VEX,PROT,BMI2,X86_64 */ + {I_MULX, 3, {REG_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55327, 102, 978}, + /* 5 : MULX reg64,reg64*,rm64 [rvm: evex.ndd.lz.f2.0f38.w1 f6 /r ] LONG,PROT,BMI2,X86_64,APX */ + /* 241(f2 ff 08) 300 001(f6) 120 : LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_MULX, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+24277, 103, 978}, + /* 6 : MULX reg64,rm64 [r+vm: vex.ndd.lz.f2.0f38.w1 f6 /r ] ND,LONG,PROT,BMI2,X86_64 */ + /* 260(002 203) 001(f6) 110 : NOAPX,LONG,VEX,PROT,BMI2,X86_64 */ + {I_MULX, 2, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55334, 102, 978}, + /* 7 : MULX reg64,rm64 [r+vm: evex.ndd.lz.f2.0f38.w1 f6 /r ] ND,LONG,PROT,BMI2,X86_64,APX */ + /* 240(f2 ff 08) 300 001(f6) 110 : LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_MULX, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+24286, 103, 978}, +}; + +static const struct itemplate instrux_IDIV[8] = { + /* 0 : IDIV rm8 [m: o8 f6 /7 ] FL,8086 */ + /* 001(f6) 207 : FL,8086 */ + {I_IDIV, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+24309, 56, 1006}, + /* 1 : IDIV rm16 [m: o16 f7 /7 ] FL,8086 */ + /* 320 001(f7) 207 : FL,8086 */ + {I_IDIV, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12488, 56, 1007}, + /* 2 : IDIV rm32 [m: o32 f7 /7 ] FL,386 */ + /* 321 001(f7) 207 : FL,386 */ + {I_IDIV, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12498, 57, 1008}, + /* 3 : IDIV rm64 [m: o64 f7 /7 ] LONG,FL,PROT,X86_64 */ + /* 324 001(f7) 207 : LONG,FL,PROT,X86_64 */ + {I_IDIV, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12508, 58, 1009}, + /* 4 : IDIV rm8 [m: evex.nf.nd0.l0.m4.o8 f6 /7 ] NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(f6) 207 : NF,NF_E,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_IDIV, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+24304, 106, 1010}, + /* 5 : IDIV rm16 [m: evex.nf.nd0.l0.m4.o16 f7 /7 ] NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(f7) 207 : NF,NF_E,LONG,EVEX,PROT,APX,X86_64 */ + {I_IDIV, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12483, 107, 1011}, + /* 6 : IDIV rm32 [m: evex.nf.nd0.l0.m4.o32 f7 /7 ] NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(f7) 207 : NF,NF_E,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_IDIV, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12493, 108, 1012}, + /* 7 : IDIV rm64 [m: evex.nf.nd0.l0.m4.o64 f7 /7 ] NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(f7) 207 : NF,NF_E,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_IDIV, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12503, 108, 1013}, +}; + +static const struct itemplate instrux_DIV[8] = { + /* 0 : DIV rm8 [m: o8 f6 /6 ] FL,8086 */ + /* 001(f6) 206 : FL,8086 */ + {I_DIV, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+24318, 56, 1014}, + /* 1 : DIV rm16 [m: o16 f7 /6 ] FL,8086 */ + /* 320 001(f7) 206 : FL,8086 */ + {I_DIV, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12518, 56, 1015}, + /* 2 : DIV rm32 [m: o32 f7 /6 ] FL,386 */ + /* 321 001(f7) 206 : FL,386 */ + {I_DIV, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12528, 57, 1016}, + /* 3 : DIV rm64 [m: o64 f7 /6 ] LONG,FL,PROT,X86_64 */ + /* 324 001(f7) 206 : LONG,FL,PROT,X86_64 */ + {I_DIV, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12538, 58, 1017}, + /* 4 : DIV rm8 [m: evex.nf.nd0.l0.m4.o8 f6 /6 ] NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(f6) 206 : NF,NF_E,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_DIV, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+24313, 106, 1018}, + /* 5 : DIV rm16 [m: evex.nf.nd0.l0.m4.o16 f7 /6 ] NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(f7) 206 : NF,NF_E,LONG,EVEX,PROT,APX,X86_64 */ + {I_DIV, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12513, 107, 1019}, + /* 6 : DIV rm32 [m: evex.nf.nd0.l0.m4.o32 f7 /6 ] NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(f7) 206 : NF,NF_E,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_DIV, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12523, 108, 1020}, + /* 7 : DIV rm64 [m: evex.nf.nd0.l0.m4.o64 f7 /6 ] NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(f7) 206 : NF,NF_E,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_DIV, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12533, 108, 1021}, +}; + +static const struct itemplate instrux_NEG[16] = { + /* 0 : NEG rm8 [m: hle o8 f6 /3 ] LOCK,FL,8086 */ + /* 273 001(f6) 203 : LOCK,FL,8086 */ + {I_NEG, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71624, 76, 1023}, + /* 1 : NEG rm16 [m: hle o16 f7 /3 ] LOCK,FL,8086 */ + /* 273 320 001(f7) 203 : LOCK,FL,8086 */ + {I_NEG, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+66747, 76, 1024}, + /* 2 : NEG rm32 [m: hle o32 f7 /3 ] LOCK,FL,386 */ + /* 273 321 001(f7) 203 : LOCK,FL,386 */ + {I_NEG, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+66753, 77, 1025}, + /* 3 : NEG rm64 [m: hle o64 f7 /3 ] LOCK,LONG,FL,PROT,X86_64 */ + /* 273 324 001(f7) 203 : LOCK,LONG,FL,PROT,X86_64 */ + {I_NEG, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+66759, 78, 1026}, + /* 4 : NEG reg8?,rm8 [vm: evex.nf.nd1.l0.m4.o8 f6 /3 ] NF,ZU,LOCK,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(f6) 213 : NF,NF_E,ZU,WIG,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_NEG, 2, {REG_GPR|BITS8,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+24322, 79, 1027}, + /* 5 : NEG rm8 [m: evex.nf.nd0.l0.m4.o8 f6 /3 ] NF,LOCK,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(f6) 203 : NF,NF_E,WIG,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_NEG, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+24331, 80, 1027}, + /* 6 : NEG reg8? [v+m: evex.nf.nd1.l0.m4.o8 f6 /3 ] ND,NF,ZU,LOCK,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(f6) 203 : NF,NF_E,ZU,WIG,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_NEG, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+24340, 79, 1027}, + /* 7 : NEG reg16?,rm16 [vm: evex.nf.nd1.l0.m4.o16 f7 /3 ] NF,ZU,LOCK,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(f7) 213 : NF,NF_E,ZU,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_NEG, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+12543, 81, 1028}, + /* 8 : NEG rm16 [m: evex.nf.nd0.l0.m4.o16 f7 /3 ] NF,LOCK,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(f7) 203 : NF,NF_E,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_NEG, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12553, 82, 1028}, + /* 9 : NEG reg16? [v+m: evex.nf.nd1.l0.m4.o16 f7 /3 ] ND,NF,ZU,LOCK,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(f7) 203 : NF,NF_E,ZU,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_NEG, 1, {REG_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12563, 81, 1028}, + /* 10 : NEG reg32?,rm32 [vm: evex.nf.nd1.l0.m4.o32 f7 /3 ] NF,ZU,LOCK,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(f7) 213 : NF,NF_E,ZU,WW,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_NEG, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+12573, 83, 1029}, + /* 11 : NEG rm32 [m: evex.nf.nd0.l0.m4.o32 f7 /3 ] NF,LOCK,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(f7) 203 : NF,NF_E,WW,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_NEG, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12583, 84, 1029}, + /* 12 : NEG reg32? [v+m: evex.nf.nd1.l0.m4.o32 f7 /3 ] ND,NF,ZU,LOCK,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(f7) 203 : NF,NF_E,ZU,WW,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_NEG, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12593, 83, 1029}, + /* 13 : NEG reg64?,rm64 [vm: evex.nf.nd1.l0.m4.o64 f7 /3 ] NF,ZU,LOCK,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(f7) 213 : NF,NF_E,ZU,WW,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_NEG, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+12603, 83, 1030}, + /* 14 : NEG rm64 [m: evex.nf.nd0.l0.m4.o64 f7 /3 ] NF,LOCK,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(f7) 203 : NF,NF_E,WW,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_NEG, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12613, 84, 1030}, + /* 15 : NEG reg64? [v+m: evex.nf.nd1.l0.m4.o64 f7 /3 ] ND,NF,ZU,LOCK,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(f7) 203 : NF,NF_E,ZU,WW,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_NEG, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12623, 83, 1030}, +}; + +static const struct itemplate instrux_NOT[32] = { + /* 0 : NOT rm8 [m: hle o8 f6 /2 ] LOCK,8086 */ + /* 273 001(f6) 202 : LOCK,8086 */ + {I_NOT, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71629, 109, 1031}, + /* 1 : NOT rm16 [m: hle o16 f7 /2 ] LOCK,8086 */ + /* 273 320 001(f7) 202 : LOCK,8086 */ + {I_NOT, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+66765, 109, 1032}, + /* 2 : NOT rm32 [m: hle o32 f7 /2 ] LOCK,386 */ + /* 273 321 001(f7) 202 : LOCK,386 */ + {I_NOT, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+66771, 110, 1033}, + /* 3 : NOT rm64 [m: hle o64 f7 /2 ] LOCK,LONG,PROT,X86_64 */ + /* 273 324 001(f7) 202 : LOCK,LONG,PROT,X86_64 */ + {I_NOT, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+66777, 111, 1034}, + /* 4 : NOT reg8?,rm8 [vm: evex.nf0.nd1.l0.m4.o8 f6 /2 ] ZU,LOCK,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(f6) 212 : ZU,WIG,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_NOT, 2, {REG_GPR|BITS8,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+24349, 112, 1035}, + /* 5 : NOT rm8 [m: evex.nf0.nd0.l0.m4.o8 f6 /2 ] LOCK,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(f6) 202 : WIG,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_NOT, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+24358, 113, 1035}, + /* 6 : NOT reg8? [v+m: evex.nf0.nd1.l0.m4.o8 f6 /2 ] ND,ZU,LOCK,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(f6) 202 : ZU,WIG,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_NOT, 1, {REG_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+24367, 112, 1035}, + /* 7 : NOT reg16?,rm16 [vm: evex.nf0.nd1.l0.m4.o16 f7 /2 ] ZU,LOCK,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(f7) 212 : ZU,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_NOT, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+12633, 114, 1036}, + /* 8 : NOT rm16 [m: evex.nf0.nd0.l0.m4.o16 f7 /2 ] LOCK,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(f7) 202 : LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_NOT, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12643, 115, 1036}, + /* 9 : NOT reg16? [v+m: evex.nf0.nd1.l0.m4.o16 f7 /2 ] ND,ZU,LOCK,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(f7) 202 : ZU,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_NOT, 1, {REG_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12653, 114, 1036}, + /* 10 : NOT reg32?,rm32 [vm: evex.nf0.nd1.l0.m4.o32 f7 /2 ] ZU,LOCK,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(f7) 212 : ZU,WW,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_NOT, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+12663, 116, 1037}, + /* 11 : NOT rm32 [m: evex.nf0.nd0.l0.m4.o32 f7 /2 ] LOCK,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(f7) 202 : WW,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_NOT, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12673, 117, 1037}, + /* 12 : NOT reg32? [v+m: evex.nf0.nd1.l0.m4.o32 f7 /2 ] ND,ZU,LOCK,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(f7) 202 : ZU,WW,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_NOT, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12683, 116, 1037}, + /* 13 : NOT reg64?,rm64 [vm: evex.nf0.nd1.l0.m4.o64 f7 /2 ] ZU,LOCK,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(f7) 212 : ZU,WW,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_NOT, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+12693, 116, 1038}, + /* 14 : NOT rm64 [m: evex.nf0.nd0.l0.m4.o64 f7 /2 ] LOCK,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(f7) 202 : WW,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_NOT, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12703, 117, 1038}, + /* 15 : NOT reg64? [v+m: evex.nf0.nd1.l0.m4.o64 f7 /2 ] ND,ZU,LOCK,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(f7) 202 : ZU,WW,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_NOT, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12713, 116, 1038}, + /* 16 : NOT kreg8,kreg8* [rm: vex.l0.0f.ko8 44 /r ] ND,SM0,SM1,ZU,AVX512DQ,FUTURE */ + /* 270(001 001) 001(44) 110 : SM0,SM1,NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_NOT, 2, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65561, 509, 4551}, + /* 17 : NOT kreg8,kreg8* [rm: evex.l0.0f.ko8 44 /r ] ND,SM0,SM1,ZU,AVX512DQ,FUTURE,APX */ + /* 250(f1 7d 08) 300 001(44) 110 : SM0,SM1,ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_NOT, 2, {OPMASKREG|BITS8,OPMASKREG|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+29974, 510, 4551}, + /* 18 : NOT kreg8 [r+m: vex.l0.0f.ko8 44 /r ] SM0,ND,ZU,AVX512DQ,FUTURE */ + /* 270(001 001) 001(44) 100 : SM0,NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_NOT, 1, {OPMASKREG|BITS8|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+65568, 531, 4551}, + /* 19 : NOT kreg8 [r+m: evex.l0.0f.ko8 44 /r ] SM0,ND,ZU,AVX512DQ,FUTURE,APX */ + /* 250(f1 7d 08) 300 001(44) 100 : SM0,ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_NOT, 1, {OPMASKREG|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+29983, 532, 4551}, + /* 20 : NOT kreg16,kreg16* [rm: vex.l0.0f.ko16 44 /r ] SM0,ND,SM1,ZU,AVX512F,FUTURE */ + /* 270(001 000) 001(44) 110 : SM0,SM1,NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_NOT, 2, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65575, 525, 4552}, + /* 21 : NOT kreg16,kreg16* [rm: evex.l0.0f.ko16 44 /r ] SM0,ND,SM1,ZU,AVX512F,FUTURE,APX */ + /* 250(f1 7c 08) 300 001(44) 110 : SM0,SM1,ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_NOT, 2, {OPMASKREG|BITS16,OPMASKREG|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29992, 526, 4552}, + /* 22 : NOT kreg16 [r+m: vex.l0.0f.ko16 44 /r ] SM0,ND,ZU,AVX512F,FUTURE */ + /* 270(001 000) 001(44) 100 : SM0,NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_NOT, 1, {OPMASKREG|BITS16|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+65582, 533, 4552}, + /* 23 : NOT kreg16 [r+m: evex.l0.0f.ko16 44 /r ] SM0,ND,ZU,AVX512F,FUTURE,APX */ + /* 250(f1 7c 08) 300 001(44) 100 : SM0,ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_NOT, 1, {OPMASKREG|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+30001, 534, 4552}, + /* 24 : NOT kreg32,kreg32* [rm: vex.l0.0f.ko32 44 /r ] ND,SM0,SM1,ZU,AVX512BW,FUTURE */ + /* 270(001 201) 001(44) 110 : SM0,SM1,NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_NOT, 2, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65589, 513, 4553}, + /* 25 : NOT kreg32,kreg32* [rm: evex.l0.0f.ko32 44 /r ] ND,SM0,SM1,ZU,AVX512BW,FUTURE,APX */ + /* 250(f1 fd 08) 300 001(44) 110 : SM0,SM1,ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_NOT, 2, {OPMASKREG|BITS32,OPMASKREG|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+30010, 514, 4553}, + /* 26 : NOT kreg32 [r+m: vex.l0.0f.ko32 44 /r ] SM0,ND,ZU,AVX512BW,FUTURE */ + /* 270(001 201) 001(44) 100 : SM0,NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_NOT, 1, {OPMASKREG|BITS32|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+65596, 535, 4553}, + /* 27 : NOT kreg32 [r+m: evex.l0.0f.ko32 44 /r ] SM0,ND,ZU,AVX512BW,FUTURE,APX */ + /* 250(f1 fd 08) 300 001(44) 100 : SM0,ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_NOT, 1, {OPMASKREG|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+30019, 536, 4553}, + /* 28 : NOT kreg64,kreg64* [rm: vex.l0.0f.ko64 44 /r ] SM0,ND,SM1,ZU,AVX512BW,FUTURE */ + /* 270(001 200) 001(44) 110 : SM0,SM1,NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_NOT, 2, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65603, 513, 4554}, + /* 29 : NOT kreg64,kreg64* [rm: evex.l0.0f.ko64 44 /r ] SM0,ND,SM1,ZU,AVX512BW,FUTURE,APX */ + /* 250(f1 fc 08) 300 001(44) 110 : SM0,SM1,ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_NOT, 2, {OPMASKREG|BITS64,OPMASKREG|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+30028, 514, 4554}, + /* 30 : NOT kreg64 [r+m: vex.l0.0f.ko64 44 /r ] SM0,ND,ZU,AVX512BW,FUTURE */ + /* 270(001 200) 001(44) 100 : SM0,NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_NOT, 1, {OPMASKREG|BITS64|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+65610, 535, 4554}, + /* 31 : NOT kreg64 [r+m: evex.l0.0f.ko64 44 /r ] SM0,ND,ZU,AVX512BW,FUTURE,APX */ + /* 250(f1 fc 08) 300 001(44) 100 : SM0,ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_NOT, 1, {OPMASKREG|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+30037, 536, 4554}, +}; + +static const struct itemplate instrux_ADCX[6] = { + /* 0 : ADCX reg32,rm32 [rm: 66 w0 0f38 f6 /r ] ZU,FL,ADX,FUTURE */ + /* 361 317 356 001(f6) 110 : NOAPX,ZU,FL,ADX,FUTURE */ + {I_ADCX, 2, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55341, 118, 1041}, + /* 1 : ADCX reg64,rm64 [rm: 66 w1 0f38 f6 /r ] ZU,LONG,FL,PROT,ADX,X86_64 */ + /* 361 324 356 001(f6) 110 : NOAPX,ZU,LONG,FL,PROT,ADX,X86_64 */ + {I_ADCX, 2, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55348, 119, 1042}, + /* 2 : ADCX reg32?,reg32,rm32 [vrm: evex.nd1.l0.66.m4.w0 66 /r ] ZU,LONG,FL,PROT,APX,ADX,X86_64 */ + /* 240(f4 7d 18) 300 001(66) 121 : ZU,LONG,FL,EVEX,PROT,APX,ADX,X86_64 */ + {I_ADCX, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+24376, 120, 1043}, + /* 3 : ADCX reg32,rm32 [rm: evex.nd0.l0.66.m4.w0 66 /r ] ZU,LONG,FL,PROT,APX,ADX,X86_64 */ + /* 250(f4 7d 08) 300 001(66) 110 : ZU,LONG,FL,EVEX,PROT,APX,ADX,X86_64 */ + {I_ADCX, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+24385, 120, 1043}, + /* 4 : ADCX reg64?,reg64,rm64 [vrm: evex.nd1.l0.66.m4.w1 66 /r ] ZU,LONG,FL,PROT,APX,ADX,X86_64 */ + /* 240(f4 fd 18) 300 001(66) 121 : ZU,LONG,FL,EVEX,PROT,APX,ADX,X86_64 */ + {I_ADCX, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+24394, 120, 1044}, + /* 5 : ADCX reg64,rm64 [rm: evex.nd0.l0.66.m4.w1 66 /r ] ZU,LONG,FL,PROT,APX,ADX,X86_64 */ + /* 250(f4 fd 08) 300 001(66) 110 : ZU,LONG,FL,EVEX,PROT,APX,ADX,X86_64 */ + {I_ADCX, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+24403, 120, 1044}, +}; + +static const struct itemplate instrux_ADOX[6] = { + /* 0 : ADOX reg32,rm32 [rm: f3 !osp w0 0f38 f6 /r ] ZU,FL,ADX,FUTURE */ + /* 333 364 317 356 001(f6) 110 : NOAPX,ZU,FL,ADX,FUTURE */ + {I_ADOX, 2, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+51275, 118, 1045}, + /* 1 : ADOX reg64,rm64 [rm: f3 !osp w1 0f38 f6 /r ] ZU,LONG,FL,PROT,ADX,X86_64 */ + /* 333 364 324 356 001(f6) 110 : NOAPX,ZU,LONG,FL,PROT,ADX,X86_64 */ + {I_ADOX, 2, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+51283, 119, 1046}, + /* 2 : ADOX reg32?,reg32,rm32 [vrm: evex.nd1.l0.f3.m4.w0 66 /r ] ZU,LONG,FL,PROT,APX,ADX,X86_64 */ + /* 240(f4 7e 18) 300 001(66) 121 : ZU,LONG,FL,EVEX,PROT,APX,ADX,X86_64 */ + {I_ADOX, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+24412, 120, 1047}, + /* 3 : ADOX reg32,rm32 [rm: evex.nd0.l0.f3.m4.w0 66 /r ] ZU,LONG,FL,PROT,APX,ADX,X86_64 */ + /* 250(f4 7e 08) 300 001(66) 110 : ZU,LONG,FL,EVEX,PROT,APX,ADX,X86_64 */ + {I_ADOX, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+24421, 120, 1047}, + /* 4 : ADOX reg64?,reg64,rm64 [vrm: evex.nd1.l0.f3.m4.w1 66 /r ] ZU,LONG,FL,PROT,APX,ADX,X86_64 */ + /* 240(f4 fe 18) 300 001(66) 121 : ZU,LONG,FL,EVEX,PROT,APX,ADX,X86_64 */ + {I_ADOX, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+24430, 120, 1048}, + /* 5 : ADOX reg64,rm64 [rm: evex.nd0.l0.f3.m4.w1 66 /r ] ZU,LONG,FL,PROT,APX,ADX,X86_64 */ + /* 250(f4 fe 08) 300 001(66) 110 : ZU,LONG,FL,EVEX,PROT,APX,ADX,X86_64 */ + {I_ADOX, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+24439, 120, 1048}, +}; + +static const struct itemplate instrux_SHLD[26] = { + /* 0 : SHLD rm16,reg16,imm8 [mri: o16 0f a4 /r ib,u ] SM0-1,FL,386 */ + /* 320 355 001(a4) 101 026 : SM0,SM1,FL,386 */ + {I_SHLD, 3, {RM_GPR|BITS16,REG_GPR|BITS16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+55355, 29, 1051}, + /* 1 : SHLD rm32,reg32,imm8 [mri: o32 0f a4 /r ib,u ] SM0-1,FL,386 */ + /* 321 355 001(a4) 101 026 : SM0,SM1,FL,386 */ + {I_SHLD, 3, {RM_GPR|BITS32,REG_GPR|BITS32,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+55362, 29, 1052}, + /* 2 : SHLD rm64,reg64,imm8 [mri: o64 0f a4 /r ib,u ] SM0-1,LONG,FL,PROT,X86_64 */ + /* 324 355 001(a4) 101 026 : SM0,SM1,LONG,FL,PROT,X86_64 */ + {I_SHLD, 3, {RM_GPR|BITS64,REG_GPR|BITS64,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+55369, 30, 1053}, + /* 3 : SHLD rm16,reg16,reg_cl [mr-: o16 0f a5 /r ] SM0-1,FL,386 */ + /* 320 355 001(a5) 101 : SM0,SM1,FL,386 */ + {I_SHLD, 3, {RM_GPR|BITS16,REG_GPR|BITS16,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+66783, 29, 1054}, + /* 4 : SHLD rm32,reg32,reg_cl [mr-: o32 0f a5 /r ] SM0-1,FL,386 */ + /* 321 355 001(a5) 101 : SM0,SM1,FL,386 */ + {I_SHLD, 3, {RM_GPR|BITS32,REG_GPR|BITS32,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+66789, 29, 1055}, + /* 5 : SHLD rm64,reg64,reg_cl [mr-: o64 0f a5 /r ] SM0-1,LONG,FL,PROT,X86_64 */ + /* 324 355 001(a5) 101 : SM0,SM1,LONG,FL,PROT,X86_64 */ + {I_SHLD, 3, {RM_GPR|BITS64,REG_GPR|BITS64,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+66795, 30, 1056}, + /* 6 : SHLD reg16?,rm16,reg16,imm8 [vmri: evex.nd1.nf.l0.m4.o16 24 /r ib,u ] SM0,SM1,NF,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(24) 112 027 : SM0,SM1,NF,NF_E,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_SHLD, 4, {REG_GPR|BITS16,RM_GPR|BITS16,REG_GPR|BITS16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+2169, 94, 1057}, + /* 7 : SHLD rm16,reg16,imm8 [mri: evex.nd0.nf.l0.m4.o16 24 /r ib,u ] SM0,NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(24) 101 026 : SM0,NF,NF_E,LONG,EVEX,PROT,APX,X86_64 */ + {I_SHLD, 3, {RM_GPR|BITS16,REG_GPR|BITS16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+2180, 86, 1057}, + /* 8 : SHLD reg16?,reg16,imm8 [v+mri: evex.nd1.nf.l0.m4.o16 24 /r ib,u ] ND,SM0,NF,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(24) 101 026 : SM0,NF,NF_E,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_SHLD, 3, {REG_GPR|BITS16,REG_GPR|BITS16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+2191, 121, 1057}, + /* 9 : SHLD reg32?,rm32,reg32,imm8 [vmri: evex.nd1.nf.l0.m4.o32 24 /r ib,u ] SM0,SM1,NF,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(24) 112 027 : SM0,SM1,NF,NF_E,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_SHLD, 4, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS32,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+2202, 97, 1058}, + /* 10 : SHLD rm32,reg32,imm8 [mri: evex.nd0.nf.l0.m4.o32 24 /r ib,u ] SM0,NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(24) 101 026 : SM0,NF,NF_E,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_SHLD, 3, {RM_GPR|BITS32,REG_GPR|BITS32,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+2213, 87, 1058}, + /* 11 : SHLD reg32?,reg32,imm8 [v+mri: evex.nd1.nf.l0.m4.o32 24 /r ib,u ] ND,SM0,NF,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(24) 101 026 : SM0,NF,NF_E,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_SHLD, 3, {REG_GPR|BITS32,REG_GPR|BITS32,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+2224, 122, 1058}, + /* 12 : SHLD reg64?,rm64,reg64,imm8 [vmri: evex.nd1.nf.l0.m4.o64 24 /r ib,u ] SM0,SM1,NF,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(24) 112 027 : SM0,SM1,NF,NF_E,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_SHLD, 4, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS64,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+2235, 97, 1059}, + /* 13 : SHLD rm64,reg64,imm8 [mri: evex.nd0.nf.l0.m4.o64 24 /r ib,u ] SM0,NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(24) 101 026 : SM0,NF,NF_E,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_SHLD, 3, {RM_GPR|BITS64,REG_GPR|BITS64,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+2246, 87, 1059}, + /* 14 : SHLD reg64?,reg64,imm8 [v+mri: evex.nd1.nf.l0.m4.o64 24 /r ib,u ] SM0,ND,NF,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(24) 101 026 : SM0,NF,NF_E,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_SHLD, 3, {REG_GPR|BITS64,REG_GPR|BITS64,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+2257, 122, 1059}, + /* 15 : SHLD reg16?,rm16,reg16,reg_cl [vmr-: evex.nd1.nf.l0.m4.o16 a5 /r ] SM0,SM1,NF,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(a5) 112 : SM0,SM1,NF,NF_E,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_SHLD, 4, {REG_GPR|BITS16,RM_GPR|BITS16,REG_GPR|BITS16,REG_CL,0}, NO_DECORATOR, nasm_bytecodes+12723, 94, 1060}, + /* 16 : SHLD rm16,reg16,reg_cl [mr-: evex.nd0.nf.l0.m4.o16 a5 /r ] SM0,NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(a5) 101 : SM0,NF,NF_E,LONG,EVEX,PROT,APX,X86_64 */ + {I_SHLD, 3, {RM_GPR|BITS16,REG_GPR|BITS16,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+12733, 86, 1060}, + /* 17 : SHLD reg16?,reg16,reg_cl [v+mr-: evex.nd1.nf.l0.m4.o16 a5 /r ] SM0,ND,NF,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(a5) 101 : SM0,NF,NF_E,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_SHLD, 3, {REG_GPR|BITS16,REG_GPR|BITS16,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+12743, 121, 1060}, + /* 18 : SHLD reg32?,rm32,reg32,reg_cl [vmr-: evex.nd1.nf.l0.m4.o32 a5 /r ] SM0,SM1,NF,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(a5) 112 : SM0,SM1,NF,NF_E,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_SHLD, 4, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS32,REG_CL,0}, NO_DECORATOR, nasm_bytecodes+12753, 97, 1061}, + /* 19 : SHLD rm32,reg32,reg_cl [mr-: evex.nd0.nf.l0.m4.o32 a5 /r ] SM0,NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(a5) 101 : SM0,NF,NF_E,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_SHLD, 3, {RM_GPR|BITS32,REG_GPR|BITS32,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+12763, 87, 1061}, + /* 20 : SHLD reg32?,reg32,reg_cl [v+mr-: evex.nd1.nf.l0.m4.o32 a5 /r ] ND,SM0,NF,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(a5) 101 : SM0,NF,NF_E,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_SHLD, 3, {REG_GPR|BITS32,REG_GPR|BITS32,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+12773, 122, 1061}, + /* 21 : SHLD reg64?,rm64,reg64,reg_cl [vmr-: evex.nd1.nf.l0.m4.o64 a5 /r ] SM0,SM1,NF,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(a5) 112 : SM0,SM1,NF,NF_E,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_SHLD, 4, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS64,REG_CL,0}, NO_DECORATOR, nasm_bytecodes+12783, 97, 1062}, + /* 22 : SHLD rm64,reg64,reg_cl [mr-: evex.nd0.nf.l0.m4.o64 a5 /r ] SM0,NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(a5) 101 : SM0,NF,NF_E,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_SHLD, 3, {RM_GPR|BITS64,REG_GPR|BITS64,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+12793, 87, 1062}, + /* 23 : SHLD reg64?,reg64,reg_cl [v+mr-: evex.nd1.nf.l0.m4.o64 a5 /r ] SM0,ND,NF,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(a5) 101 : SM0,NF,NF_E,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_SHLD, 3, {REG_GPR|BITS64,REG_GPR|BITS64,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+12803, 122, 1062}, + /* 24 : SHLD kreg32,kreg32,imm8 [rmi: vex.l0.66.0f3a.w0 33 /r ib ] ND,ZU,FL,AVX512BW,FUTURE */ + /* 270(003 001) 001(33) 110 022 : NOAPX,ZU,FL,VEX,AVX512BW,FUTURE */ + {I_SHLD, 3, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54731, 541, 4613}, + /* 25 : SHLD kreg32,kreg32,imm8 [rmi: evex.l0.66.0f3a.w0 33 /r ib ] ND,ZU,FL,AVX512BW,FUTURE,APX */ + /* 250(f3 7d 08) 300 001(33) 110 022 : ZU,LONG,FL,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_SHLD, 3, {OPMASKREG|BITS32,OPMASKREG|BITS32,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18073, 542, 4613}, +}; + +static const struct itemplate instrux_SHRD[26] = { + /* 0 : SHRD rm16,reg16,imm8 [mri: o16 0f ac /r ib,u ] SM0-1,FL,386 */ + /* 320 355 001(ac) 101 026 : SM0,SM1,FL,386 */ + {I_SHRD, 3, {RM_GPR|BITS16,REG_GPR|BITS16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+55376, 29, 1063}, + /* 1 : SHRD rm32,reg32,imm8 [mri: o32 0f ac /r ib,u ] SM0-1,FL,386 */ + /* 321 355 001(ac) 101 026 : SM0,SM1,FL,386 */ + {I_SHRD, 3, {RM_GPR|BITS32,REG_GPR|BITS32,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+55383, 29, 1064}, + /* 2 : SHRD rm64,reg64,imm8 [mri: o64 0f ac /r ib,u ] SM0-1,LONG,FL,PROT,X86_64 */ + /* 324 355 001(ac) 101 026 : SM0,SM1,LONG,FL,PROT,X86_64 */ + {I_SHRD, 3, {RM_GPR|BITS64,REG_GPR|BITS64,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+55390, 30, 1065}, + /* 3 : SHRD rm16,reg16,reg_cl [mr-: o16 0f ad /r ] SM0-1,FL,386 */ + /* 320 355 001(ad) 101 : SM0,SM1,FL,386 */ + {I_SHRD, 3, {RM_GPR|BITS16,REG_GPR|BITS16,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+66801, 29, 1066}, + /* 4 : SHRD rm32,reg32,reg_cl [mr-: o32 0f ad /r ] SM0-1,FL,386 */ + /* 321 355 001(ad) 101 : SM0,SM1,FL,386 */ + {I_SHRD, 3, {RM_GPR|BITS32,REG_GPR|BITS32,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+66807, 29, 1067}, + /* 5 : SHRD rm64,reg64,reg_cl [mr-: o64 0f ad /r ] SM0-1,LONG,FL,PROT,X86_64 */ + /* 324 355 001(ad) 101 : SM0,SM1,LONG,FL,PROT,X86_64 */ + {I_SHRD, 3, {RM_GPR|BITS64,REG_GPR|BITS64,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+66813, 30, 1068}, + /* 6 : SHRD reg16?,rm16,reg16,imm8 [vmri: evex.nd1.nf.l0.m4.o16 2c /r ib,u ] SM0,SM1,NF,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(2c) 112 027 : SM0,SM1,NF,NF_E,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_SHRD, 4, {REG_GPR|BITS16,RM_GPR|BITS16,REG_GPR|BITS16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+2268, 94, 1069}, + /* 7 : SHRD rm16,reg16,imm8 [mri: evex.nd0.nf.l0.m4.o16 2c /r ib,u ] SM0,NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(2c) 101 026 : SM0,NF,NF_E,LONG,EVEX,PROT,APX,X86_64 */ + {I_SHRD, 3, {RM_GPR|BITS16,REG_GPR|BITS16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+2279, 86, 1069}, + /* 8 : SHRD reg16?,reg16,imm8 [v+mri: evex.nd1.nf.l0.m4.o16 2c /r ib,u ] ND,SM0,NF,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(2c) 101 026 : SM0,NF,NF_E,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_SHRD, 3, {REG_GPR|BITS16,REG_GPR|BITS16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+2290, 121, 1069}, + /* 9 : SHRD reg32?,rm32,reg32,imm8 [vmri: evex.nd1.nf.l0.m4.o32 2c /r ib,u ] SM0,SM1,NF,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(2c) 112 027 : SM0,SM1,NF,NF_E,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_SHRD, 4, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS32,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+2301, 97, 1070}, + /* 10 : SHRD rm32,reg32,imm8 [mri: evex.nd0.nf.l0.m4.o32 2c /r ib,u ] SM0,NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(2c) 101 026 : SM0,NF,NF_E,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_SHRD, 3, {RM_GPR|BITS32,REG_GPR|BITS32,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+2312, 87, 1070}, + /* 11 : SHRD reg32?,reg32,imm8 [v+mri: evex.nd1.nf.l0.m4.o32 2c /r ib,u ] SM0,ND,NF,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(2c) 101 026 : SM0,NF,NF_E,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_SHRD, 3, {REG_GPR|BITS32,REG_GPR|BITS32,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+2323, 122, 1070}, + /* 12 : SHRD reg64?,rm64,reg64,imm8 [vmri: evex.nd1.nf.l0.m4.o64 2c /r ib,u ] SM0,SM1,NF,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(2c) 112 027 : SM0,SM1,NF,NF_E,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_SHRD, 4, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS64,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+2334, 97, 1071}, + /* 13 : SHRD rm64,reg64,imm8 [mri: evex.nd0.nf.l0.m4.o64 2c /r ib,u ] SM0,NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(2c) 101 026 : SM0,NF,NF_E,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_SHRD, 3, {RM_GPR|BITS64,REG_GPR|BITS64,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+2345, 87, 1071}, + /* 14 : SHRD reg64?,reg64,imm8 [v+mri: evex.nd1.nf.l0.m4.o64 2c /r ib,u ] SM0,ND,NF,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(2c) 101 026 : SM0,NF,NF_E,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_SHRD, 3, {REG_GPR|BITS64,REG_GPR|BITS64,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+2356, 122, 1071}, + /* 15 : SHRD reg16?,rm16,reg16,reg_cl [vmr-: evex.nd1.nf.l0.m4.o16 ad /r ] SM0,SM1,NF,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(ad) 112 : SM0,SM1,NF,NF_E,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_SHRD, 4, {REG_GPR|BITS16,RM_GPR|BITS16,REG_GPR|BITS16,REG_CL,0}, NO_DECORATOR, nasm_bytecodes+12813, 94, 1072}, + /* 16 : SHRD rm16,reg16,reg_cl [mr-: evex.nd0.nf.l0.m4.o16 ad /r ] SM0,NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(ad) 101 : SM0,NF,NF_E,LONG,EVEX,PROT,APX,X86_64 */ + {I_SHRD, 3, {RM_GPR|BITS16,REG_GPR|BITS16,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+12823, 86, 1072}, + /* 17 : SHRD reg16?,reg16,reg_cl [v+mr-: evex.nd1.nf.l0.m4.o16 ad /r ] SM0,ND,NF,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(ad) 101 : SM0,NF,NF_E,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_SHRD, 3, {REG_GPR|BITS16,REG_GPR|BITS16,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+12833, 121, 1072}, + /* 18 : SHRD reg32?,rm32,reg32,reg_cl [vmr-: evex.nd1.nf.l0.m4.o32 ad /r ] SM0,SM1,NF,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(ad) 112 : SM0,SM1,NF,NF_E,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_SHRD, 4, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS32,REG_CL,0}, NO_DECORATOR, nasm_bytecodes+12843, 97, 1073}, + /* 19 : SHRD rm32,reg32,reg_cl [mr-: evex.nd0.nf.l0.m4.o32 ad /r ] SM0,NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(ad) 101 : SM0,NF,NF_E,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_SHRD, 3, {RM_GPR|BITS32,REG_GPR|BITS32,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+12853, 87, 1073}, + /* 20 : SHRD reg32?,reg32,reg_cl [v+mr-: evex.nd1.nf.l0.m4.o32 ad /r ] SM0,ND,NF,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(ad) 101 : SM0,NF,NF_E,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_SHRD, 3, {REG_GPR|BITS32,REG_GPR|BITS32,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+12863, 122, 1073}, + /* 21 : SHRD reg64?,rm64,reg64,reg_cl [vmr-: evex.nd1.nf.l0.m4.o64 ad /r ] SM0,SM1,NF,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(ad) 112 : SM0,SM1,NF,NF_E,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_SHRD, 4, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS64,REG_CL,0}, NO_DECORATOR, nasm_bytecodes+12873, 97, 1074}, + /* 22 : SHRD rm64,reg64,reg_cl [mr-: evex.nd0.nf.l0.m4.o64 ad /r ] SM0,NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(ad) 101 : SM0,NF,NF_E,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_SHRD, 3, {RM_GPR|BITS64,REG_GPR|BITS64,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+12883, 87, 1074}, + /* 23 : SHRD reg64?,reg64,reg_cl [v+mr-: evex.nd1.nf.l0.m4.o64 ad /r ] SM0,ND,NF,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(ad) 101 : SM0,NF,NF_E,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_SHRD, 3, {REG_GPR|BITS64,REG_GPR|BITS64,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+12893, 122, 1074}, + /* 24 : SHRD kreg32,kreg32,imm8 [rmi: vex.l0.66.0f3a.w0 31 /r ib ] ND,ZU,FL,AVX512BW,FUTURE */ + /* 270(003 001) 001(31) 110 022 : NOAPX,ZU,FL,VEX,AVX512BW,FUTURE */ + {I_SHRD, 3, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54763, 541, 4645}, + /* 25 : SHRD kreg32,kreg32,imm8 [rmi: evex.l0.66.0f3a.w0 31 /r ib ] ND,ZU,FL,AVX512BW,FUTURE,APX */ + /* 250(f3 7d 08) 300 001(31) 110 022 : ZU,LONG,FL,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_SHRD, 3, {OPMASKREG|BITS32,OPMASKREG|BITS32,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18113, 542, 4645}, +}; + +static const struct itemplate instrux_BT[6] = { + /* 0 : BT rm16,reg16 [mr: o16 0f a3 /r ] SM0-1,FL,386 */ + /* 320 355 001(a3) 101 : SM0,SM1,FL,386 */ + {I_BT, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66819, 29, 1077}, + /* 1 : BT rm32,reg32 [mr: o32 0f a3 /r ] SM0-1,FL,386 */ + /* 321 355 001(a3) 101 : SM0,SM1,FL,386 */ + {I_BT, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+66825, 29, 1078}, + /* 2 : BT rm64,reg64 [mr: o64 0f a3 /r ] SM0-1,LONG,FL,PROT,X86_64 */ + /* 324 355 001(a3) 101 : SM0,SM1,LONG,FL,PROT,X86_64 */ + {I_BT, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+66831, 30, 1079}, + /* 3 : BT rm16,imm8 [mi: o16 0f ba /4 ib,u ] FL,386 */ + /* 320 355 001(ba) 204 025 : FL,386 */ + {I_BT, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+55397, 57, 1080}, + /* 4 : BT rm32,imm8 [mi: o32 0f ba /4 ib,u ] FL,386 */ + /* 321 355 001(ba) 204 025 : FL,386 */ + {I_BT, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+55404, 57, 1081}, + /* 5 : BT rm64,imm8 [mi: o64 0f ba /4 ib,u ] LONG,FL,PROT,X86_64 */ + /* 324 355 001(ba) 204 025 : LONG,FL,PROT,X86_64 */ + {I_BT, 2, {RM_GPR|BITS64,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+55411, 58, 1082}, +}; + +static const struct itemplate instrux_BTC[6] = { + /* 0 : BTC rm16,reg16 [mr: o16 0f bb /r ] SM0-1,LOCK,FL,386 */ + /* 320 355 001(bb) 101 : SM0,SM1,LOCK,FL,386 */ + {I_BTC, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66837, 26, 1083}, + /* 1 : BTC rm32,reg32 [mr: o32 0f bb /r ] SM0-1,LOCK,FL,386 */ + /* 321 355 001(bb) 101 : SM0,SM1,LOCK,FL,386 */ + {I_BTC, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+66843, 26, 1084}, + /* 2 : BTC rm64,reg64 [mr: o64 0f bb /r ] SM0-1,LOCK,LONG,FL,PROT,X86_64 */ + /* 324 355 001(bb) 101 : SM0,SM1,LOCK,LONG,FL,PROT,X86_64 */ + {I_BTC, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+66849, 27, 1085}, + /* 3 : BTC rm16,imm8 [mi: o16 0f ba /7 ib,u ] LOCK,FL,386 */ + /* 320 355 001(ba) 207 025 : LOCK,FL,386 */ + {I_BTC, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+55418, 77, 1086}, + /* 4 : BTC rm32,imm8 [mi: o32 0f ba /7 ib,u ] LOCK,FL,386 */ + /* 321 355 001(ba) 207 025 : LOCK,FL,386 */ + {I_BTC, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+55425, 77, 1087}, + /* 5 : BTC rm64,imm8 [mi: o64 0f ba /7 ib,u ] LOCK,LONG,FL,PROT,X86_64 */ + /* 324 355 001(ba) 207 025 : LOCK,LONG,FL,PROT,X86_64 */ + {I_BTC, 2, {RM_GPR|BITS64,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+55432, 78, 1088}, +}; + +static const struct itemplate instrux_BTR[6] = { + /* 0 : BTR rm16,reg16 [mr: o16 0f b3 /r ] SM0-1,LOCK,FL,386 */ + /* 320 355 001(b3) 101 : SM0,SM1,LOCK,FL,386 */ + {I_BTR, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66855, 26, 1089}, + /* 1 : BTR rm32,reg32 [mr: o32 0f b3 /r ] SM0-1,LOCK,FL,386 */ + /* 321 355 001(b3) 101 : SM0,SM1,LOCK,FL,386 */ + {I_BTR, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+66861, 26, 1090}, + /* 2 : BTR rm64,reg64 [mr: o64 0f b3 /r ] SM0-1,LOCK,LONG,FL,PROT,X86_64 */ + /* 324 355 001(b3) 101 : SM0,SM1,LOCK,LONG,FL,PROT,X86_64 */ + {I_BTR, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+66867, 27, 1091}, + /* 3 : BTR rm16,imm8 [mi: o16 0f ba /6 ib,u ] LOCK,FL,386 */ + /* 320 355 001(ba) 206 025 : LOCK,FL,386 */ + {I_BTR, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+55439, 77, 1092}, + /* 4 : BTR rm32,imm8 [mi: o32 0f ba /6 ib,u ] LOCK,FL,386 */ + /* 321 355 001(ba) 206 025 : LOCK,FL,386 */ + {I_BTR, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+55446, 77, 1093}, + /* 5 : BTR rm64,imm8 [mi: o64 0f ba /6 ib,u ] LOCK,LONG,FL,PROT,X86_64 */ + /* 324 355 001(ba) 206 025 : LOCK,LONG,FL,PROT,X86_64 */ + {I_BTR, 2, {RM_GPR|BITS64,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+55453, 78, 1094}, +}; + +static const struct itemplate instrux_BTS[6] = { + /* 0 : BTS rm16,reg16 [mr: o16 0f ab /r ] SM0-1,LOCK,FL,386 */ + /* 320 355 001(ab) 101 : SM0,SM1,LOCK,FL,386 */ + {I_BTS, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66873, 26, 1095}, + /* 1 : BTS rm32,reg32 [mr: o32 0f ab /r ] SM0-1,LOCK,FL,386 */ + /* 321 355 001(ab) 101 : SM0,SM1,LOCK,FL,386 */ + {I_BTS, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+66879, 26, 1096}, + /* 2 : BTS rm64,reg64 [mr: o64 0f ab /r ] SM0-1,LOCK,LONG,FL,PROT,X86_64 */ + /* 324 355 001(ab) 101 : SM0,SM1,LOCK,LONG,FL,PROT,X86_64 */ + {I_BTS, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+66885, 27, 1097}, + /* 3 : BTS rm16,imm8 [mi: o16 0f ba /5 ib,u ] LOCK,FL,386 */ + /* 320 355 001(ba) 205 025 : LOCK,FL,386 */ + {I_BTS, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+55460, 77, 1098}, + /* 4 : BTS rm32,imm8 [mi: o32 0f ba /5 ib,u ] LOCK,FL,386 */ + /* 321 355 001(ba) 205 025 : LOCK,FL,386 */ + {I_BTS, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+55467, 77, 1099}, + /* 5 : BTS rm64,imm8 [mi: o64 0f ba /5 ib,u ] LOCK,LONG,FL,PROT,X86_64 */ + /* 324 355 001(ba) 205 025 : LOCK,LONG,FL,PROT,X86_64 */ + {I_BTS, 2, {RM_GPR|BITS64,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+55474, 78, 1100}, +}; + +static const struct itemplate instrux_BSF[3] = { + /* 0 : BSF reg16,rm16 [rm: o16 nof3 0f bc /r ] SM0-1,386 */ + /* 320 326 355 001(bc) 110 : SM0,SM1,386 */ + {I_BSF, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55481, 13, 1102}, + /* 1 : BSF reg32,rm32 [rm: o32 nof3 0f bc /r ] SM0-1,386 */ + /* 321 326 355 001(bc) 110 : SM0,SM1,386 */ + {I_BSF, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+55488, 13, 1103}, + /* 2 : BSF reg64,rm64 [rm: o64 nof3 0f bc /r ] SM0-1,LONG,PROT,X86_64 */ + /* 324 326 355 001(bc) 110 : SM0,SM1,LONG,PROT,X86_64 */ + {I_BSF, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+55495, 14, 1104}, +}; + +static const struct itemplate instrux_BSR[3] = { + /* 0 : BSR reg16,rm16 [rm: o16 nof3 0f bd /r ] SM0-1,386 */ + /* 320 326 355 001(bd) 110 : SM0,SM1,386 */ + {I_BSR, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55502, 13, 1105}, + /* 1 : BSR reg32,rm32 [rm: o32 nof3 0f bd /r ] SM0-1,386 */ + /* 321 326 355 001(bd) 110 : SM0,SM1,386 */ + {I_BSR, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+55509, 13, 1106}, + /* 2 : BSR reg64,rm64 [rm: o64 nof3 0f bd /r ] SM0-1,LONG,PROT,X86_64 */ + /* 324 326 355 001(bd) 110 : SM0,SM1,LONG,PROT,X86_64 */ + {I_BSR, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+55516, 14, 1107}, +}; + +static const struct itemplate instrux_IBTS[2] = { + /* 0 : IBTS rm16,reg16 [mr: o16 0f a7 /r ] ND,NOREX,NOAPX,NOLONG,UNDOC,OBSOLETE,386 */ + /* 320 355 001(a7) 101 : NOREX,NOAPX,NOLONG,UNDOC,OBSOLETE,386 */ + {I_IBTS, 2, {RM_GPR|BITS16|RN_L16,REG_GPR|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66891, 123, 1110}, + /* 1 : IBTS rm32,reg32 [mr: o32 0f a7 /r ] ND,NOREX,NOAPX,NOLONG,UNDOC,OBSOLETE,386 */ + /* 321 355 001(a7) 101 : NOREX,NOAPX,NOLONG,UNDOC,OBSOLETE,386 */ + {I_IBTS, 2, {RM_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66897, 123, 1111}, +}; + +static const struct itemplate instrux_XBTS[2] = { + /* 0 : XBTS rm16,reg16 [mr: o16 0f a6 /r ] ND,NOREX,NOAPX,NOLONG,UNDOC,OBSOLETE,386 */ + /* 320 355 001(a6) 101 : NOREX,NOAPX,NOLONG,UNDOC,OBSOLETE,386 */ + {I_XBTS, 2, {RM_GPR|BITS16|RN_L16,REG_GPR|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66903, 123, 1112}, + /* 1 : XBTS rm32,reg32 [mr: o32 0f a6 /r ] ND,NOREX,NOAPX,NOLONG,UNDOC,OBSOLETE,386 */ + /* 321 355 001(a6) 101 : NOREX,NOAPX,NOLONG,UNDOC,OBSOLETE,386 */ + {I_XBTS, 2, {RM_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66909, 123, 1113}, +}; + +static const struct itemplate instrux_LZCNT[6] = { + /* 0 : LZCNT reg16,rm16 [rm: o16 f3i 0f bd /r ] SM0-1,FL,LZCNT,FUTURE */ + /* 320 333 355 001(bd) 110 : SM0,SM1,FL,LZCNT,FUTURE */ + {I_LZCNT, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55523, 124, 1116}, + /* 1 : LZCNT reg32,rm32 [rm: o32 f3i 0f bd /r ] SM0-1,FL,LZCNT,FUTURE */ + /* 321 333 355 001(bd) 110 : SM0,SM1,FL,LZCNT,FUTURE */ + {I_LZCNT, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+55530, 124, 1117}, + /* 2 : LZCNT reg64,rm64 [rm: o64 f3i 0f bd /r ] SM0-1,LONG,FL,PROT,LZCNT,X86_64 */ + /* 324 333 355 001(bd) 110 : SM0,SM1,LONG,FL,PROT,LZCNT,X86_64 */ + {I_LZCNT, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+55537, 125, 1118}, + /* 3 : LZCNT reg16,rm16 [rm: evex.nd0.nf.l0.m4.o16 f5 /r ] SM0-1,NF,LONG,PROT,APX,LZCNT,X86_64 */ + /* 250(f4 7d 08) 300 320 001(f5) 110 : SM0,SM1,NF,NF_E,LONG,EVEX,PROT,APX,LZCNT,X86_64 */ + {I_LZCNT, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+12903, 126, 1119}, + /* 4 : LZCNT reg32,rm32 [rm: evex.nd0.nf.l0.m4.o32 f5 /r ] SM0-1,NF,LONG,PROT,APX,LZCNT,X86_64 */ + /* 250(f4 7c 08) 300 321 001(f5) 110 : SM0,SM1,NF,NF_E,WW,LONG,EVEX,PROT,APX,LZCNT,X86_64 */ + {I_LZCNT, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+12913, 127, 1120}, + /* 5 : LZCNT reg64,rm64 [rm: evex.nd0.nf.l0.m4.o64 f5 /r ] SM0-1,NF,LONG,PROT,APX,LZCNT,X86_64 */ + /* 250(f4 fc 08) 300 324 001(f5) 110 : SM0,SM1,NF,NF_E,WW,LONG,EVEX,PROT,APX,LZCNT,X86_64 */ + {I_LZCNT, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+12923, 127, 1121}, +}; + +static const struct itemplate instrux_TZCNT[6] = { + /* 0 : TZCNT reg16,rm16 [rm: o16 f3i 0f bc /r ] SM0-1,FL,BMI1,FUTURE */ + /* 320 333 355 001(bc) 110 : SM0,SM1,FL,BMI1,FUTURE */ + {I_TZCNT, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55544, 128, 1122}, + /* 1 : TZCNT reg32,rm32 [rm: o32 f3i 0f bc /r ] SM0-1,FL,BMI1,FUTURE */ + /* 321 333 355 001(bc) 110 : SM0,SM1,FL,BMI1,FUTURE */ + {I_TZCNT, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+55551, 128, 1123}, + /* 2 : TZCNT reg64,rm64 [rm: o64 f3i 0f bc /r ] SM0-1,LONG,FL,PROT,BMI1,X86_64 */ + /* 324 333 355 001(bc) 110 : SM0,SM1,LONG,FL,PROT,BMI1,X86_64 */ + {I_TZCNT, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+55558, 129, 1124}, + /* 3 : TZCNT reg16,rm16 [rm: evex.nd0.nf.l0.m4.o16 f4 /r ] SM0-1,NF,LONG,PROT,BMI1,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(f4) 110 : SM0,SM1,NF,NF_E,LONG,EVEX,PROT,BMI1,APX,X86_64 */ + {I_TZCNT, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+12933, 130, 1125}, + /* 4 : TZCNT reg32,rm32 [rm: evex.nd0.nf.l0.m4.o32 f4 /r ] SM0-1,NF,LONG,PROT,BMI1,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(f4) 110 : SM0,SM1,NF,NF_E,WW,LONG,EVEX,PROT,BMI1,APX,X86_64 */ + {I_TZCNT, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+12943, 131, 1126}, + /* 5 : TZCNT reg64,rm64 [rm: evex.nd0.nf.l0.m4.o64 f4 /r ] SM0-1,NF,LONG,PROT,BMI1,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(f4) 110 : SM0,SM1,NF,NF_E,WW,LONG,EVEX,PROT,BMI1,APX,X86_64 */ + {I_TZCNT, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+12953, 131, 1127}, +}; + +static const struct itemplate instrux_ANDN[24] = { + /* 0 : ANDN reg32,reg32*,rm32 [rvm: vex.nds.lz.0f38.w0 f2 /r ] SM0,SM1,SM2,FL,BMI1,FUTURE */ + /* 261(002 000) 001(f2) 120 : SM0,SM1,SM2,NOAPX,FL,VEX,BMI1,FUTURE */ + {I_ANDN, 3, {REG_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55565, 132, 1129}, + /* 1 : ANDN reg32,rm32 [r+vm: vex.nds.lz.0f38.w0 f2 /r ] SM0,ND,SM1,FL,BMI1,FUTURE */ + /* 260(002 000) 001(f2) 110 : SM0,SM1,NOAPX,FL,VEX,BMI1,FUTURE */ + {I_ANDN, 2, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55572, 133, 1129}, + /* 2 : ANDN reg64,reg64*,rm64 [rvm: vex.nds.lz.0f38.w1 f2 /r ] SM0,SM1,SM2,LONG,FL,PROT,BMI1,X86_64 */ + /* 261(002 200) 001(f2) 120 : SM0,SM1,SM2,NOAPX,LONG,FL,VEX,PROT,BMI1,X86_64 */ + {I_ANDN, 3, {REG_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55579, 134, 1130}, + /* 3 : ANDN reg64,rm64 [r+vm: vex.nds.lz.0f38.w1 f2 /r ] SM0,ND,SM1,LONG,FL,PROT,BMI1,X86_64 */ + /* 260(002 200) 001(f2) 110 : SM0,SM1,NOAPX,LONG,FL,VEX,PROT,BMI1,X86_64 */ + {I_ANDN, 2, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55586, 135, 1130}, + /* 4 : ANDN reg32,reg32*,rm32 [rvm: evex.np.nf.lz.0f38.w0 f2 /r ] SM0,SM1,SM2,NF,LONG,PROT,BMI1,APX,X86_64 */ + /* 241(f2 7c 08) 300 001(f2) 120 : SM0,SM1,SM2,NF,NF_E,LONG,EVEX,PROT,BMI1,APX,X86_64 */ + {I_ANDN, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+24448, 136, 1131}, + /* 5 : ANDN reg32,rm32 [r+vm: evex.np.nf.lz.0f38.w0 f2 /r ] ND,SM0,SM1,NF,LONG,PROT,BMI1,APX,X86_64 */ + /* 240(f2 7c 08) 300 001(f2) 110 : SM0,SM1,NF,NF_E,LONG,EVEX,PROT,BMI1,APX,X86_64 */ + {I_ANDN, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+24457, 130, 1131}, + /* 6 : ANDN reg64,reg64*,rm64 [rvm: evex.np.nf.lz.0f38.w1 f2 /r ] SM0,SM1,SM2,NF,LONG,PROT,BMI1,APX,X86_64 */ + /* 241(f2 fc 08) 300 001(f2) 120 : SM0,SM1,SM2,NF,NF_E,LONG,EVEX,PROT,BMI1,APX,X86_64 */ + {I_ANDN, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+24466, 136, 1132}, + /* 7 : ANDN reg64,rm64 [r+vm: evex.np.nf.lz.0f38.w1 f2 /r ] ND,SM0,SM1,NF,LONG,PROT,BMI1,APX,X86_64 */ + /* 240(f2 fc 08) 300 001(f2) 110 : SM0,SM1,NF,NF_E,LONG,EVEX,PROT,BMI1,APX,X86_64 */ + {I_ANDN, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+24475, 130, 1132}, + /* 8 : ANDN kreg8,kreg8*,kreg8 [rvm: vex.l1.0f.ko8 42 /r ] ND,SM0,SM1,SM2,ZU,FL,AVX512DQ,FUTURE */ + /* 261(001 005) 001(42) 120 : SM0,SM1,SM2,NOAPX,ZU,FL,VEX,AVX512DQ,FUTURE */ + {I_ANDN, 3, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65505, 515, 4535}, + /* 9 : ANDN kreg8,kreg8*,kreg8 [rvm: evex.l1.0f.ko8 42 /r ] ND,SM0,SM1,SM2,ZU,FL,AVX512DQ,FUTURE,APX */ + /* 241(f1 7d 28) 300 001(42) 120 : SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_ANDN, 3, {OPMASKREG|BITS8,OPMASKREG|BITS8,OPMASKREG|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+29902, 516, 4535}, + /* 10 : ANDN kreg8,kreg8 [r+vm: vex.l1.0f.ko8 42 /r ] SM0,ND,SM1,ZU,FL,AVX512DQ,FUTURE */ + /* 260(001 005) 001(42) 110 : SM0,SM1,NOAPX,ZU,FL,VEX,AVX512DQ,FUTURE */ + {I_ANDN, 2, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65512, 517, 4535}, + /* 11 : ANDN kreg8,kreg8 [r+vm: evex.l1.0f.ko8 42 /r ] SM0,ND,SM1,ZU,FL,AVX512DQ,FUTURE,APX */ + /* 240(f1 7d 28) 300 001(42) 110 : SM0,SM1,ZU,LONG,FL,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_ANDN, 2, {OPMASKREG|BITS8,OPMASKREG|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+29911, 518, 4535}, + /* 12 : ANDN kreg16,kreg16*,kreg16 [rvm: vex.l1.0f.ko16 42 /r ] SM0,ND,SM1,SM2,ZU,FL,AVX512F,FUTURE */ + /* 261(001 004) 001(42) 120 : SM0,SM1,SM2,NOAPX,ZU,FL,VEX,AVX512F,FUTURE */ + {I_ANDN, 3, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65519, 527, 4536}, + /* 13 : ANDN kreg16,kreg16*,kreg16 [rvm: evex.l1.0f.ko16 42 /r ] SM0,ND,SM1,SM2,ZU,FL,AVX512F,FUTURE,APX */ + /* 241(f1 7c 28) 300 001(42) 120 : SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_ANDN, 3, {OPMASKREG|BITS16,OPMASKREG|BITS16,OPMASKREG|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+29920, 528, 4536}, + /* 14 : ANDN kreg16,kreg16 [r+vm: vex.l1.0f.ko16 42 /r ] ND,SM0,SM1,ZU,FL,AVX512F,FUTURE */ + /* 260(001 004) 001(42) 110 : SM0,SM1,NOAPX,ZU,FL,VEX,AVX512F,FUTURE */ + {I_ANDN, 2, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65526, 529, 4536}, + /* 15 : ANDN kreg16,kreg16 [r+vm: evex.l1.0f.ko16 42 /r ] ND,SM0,SM1,ZU,FL,AVX512F,FUTURE,APX */ + /* 240(f1 7c 28) 300 001(42) 110 : SM0,SM1,ZU,LONG,FL,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_ANDN, 2, {OPMASKREG|BITS16,OPMASKREG|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29929, 530, 4536}, + /* 16 : ANDN kreg32,kreg32*,kreg32 [rvm: vex.l1.0f.ko32 42 /r ] SM0,ND,SM1,SM2,ZU,FL,AVX512BW,FUTURE */ + /* 261(001 205) 001(42) 120 : SM0,SM1,SM2,NOAPX,ZU,FL,VEX,AVX512BW,FUTURE */ + {I_ANDN, 3, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65533, 519, 4537}, + /* 17 : ANDN kreg32,kreg32*,kreg32 [rvm: evex.l1.0f.ko32 42 /r ] SM0,ND,SM1,SM2,ZU,FL,AVX512BW,FUTURE,APX */ + /* 241(f1 fd 28) 300 001(42) 120 : SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_ANDN, 3, {OPMASKREG|BITS32,OPMASKREG|BITS32,OPMASKREG|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+29938, 520, 4537}, + /* 18 : ANDN kreg32,kreg32 [r+vm: vex.l1.0f.ko32 42 /r ] SM0,ND,SM1,ZU,FL,AVX512BW,FUTURE */ + /* 260(001 205) 001(42) 110 : SM0,SM1,NOAPX,ZU,FL,VEX,AVX512BW,FUTURE */ + {I_ANDN, 2, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65540, 521, 4537}, + /* 19 : ANDN kreg32,kreg32 [r+vm: evex.l1.0f.ko32 42 /r ] SM0,ND,SM1,ZU,FL,AVX512BW,FUTURE,APX */ + /* 240(f1 fd 28) 300 001(42) 110 : SM0,SM1,ZU,LONG,FL,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_ANDN, 2, {OPMASKREG|BITS32,OPMASKREG|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+29947, 522, 4537}, + /* 20 : ANDN kreg64,kreg64*,kreg64 [rvm: vex.l1.0f.ko64 42 /r ] SM0,ND,SM1,SM2,ZU,FL,AVX512BW,FUTURE */ + /* 261(001 204) 001(42) 120 : SM0,SM1,SM2,NOAPX,ZU,FL,VEX,AVX512BW,FUTURE */ + {I_ANDN, 3, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65547, 519, 4538}, + /* 21 : ANDN kreg64,kreg64*,kreg64 [rvm: evex.l1.0f.ko64 42 /r ] SM0,ND,SM1,SM2,ZU,FL,AVX512BW,FUTURE,APX */ + /* 241(f1 fc 28) 300 001(42) 120 : SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_ANDN, 3, {OPMASKREG|BITS64,OPMASKREG|BITS64,OPMASKREG|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+29956, 520, 4538}, + /* 22 : ANDN kreg64,kreg64 [r+vm: vex.l1.0f.ko64 42 /r ] SM0,ND,SM1,ZU,FL,AVX512BW,FUTURE */ + /* 260(001 204) 001(42) 110 : SM0,SM1,NOAPX,ZU,FL,VEX,AVX512BW,FUTURE */ + {I_ANDN, 2, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65554, 521, 4538}, + /* 23 : ANDN kreg64,kreg64 [r+vm: evex.l1.0f.ko64 42 /r ] SM0,ND,SM1,ZU,FL,AVX512BW,FUTURE,APX */ + /* 240(f1 fc 28) 300 001(42) 110 : SM0,SM1,ZU,LONG,FL,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_ANDN, 2, {OPMASKREG|BITS64,OPMASKREG|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+29965, 522, 4538}, +}; + +static const struct itemplate instrux_BEXTR[12] = { + /* 0 : BEXTR reg32,rm32*,reg32 [rmv: vex.nds.lz.0f38.w0 f7 /r ] SM0,SM1,SM2,FL,BMI1,FUTURE */ + /* 262(002 000) 001(f7) 110 : SM0,SM1,SM2,NOAPX,FL,VEX,BMI1,FUTURE */ + {I_BEXTR, 3, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55593, 132, 1133}, + /* 1 : BEXTR reg32,reg32 [r+mv: vex.nds.lz.0f38.w0 f7 /r ] SM0,ND,SM1,FL,BMI1,FUTURE */ + /* 261(002 000) 001(f7) 100 : SM0,SM1,NOAPX,FL,VEX,BMI1,FUTURE */ + {I_BEXTR, 2, {REG_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55600, 133, 1133}, + /* 2 : BEXTR reg64,rm64*,reg64 [rmv: vex.nds.lz.0f38.w1 f7 /r ] SM0,SM1,SM2,LONG,FL,PROT,BMI1,X86_64 */ + /* 262(002 200) 001(f7) 110 : SM0,SM1,SM2,NOAPX,LONG,FL,VEX,PROT,BMI1,X86_64 */ + {I_BEXTR, 3, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55607, 134, 1134}, + /* 3 : BEXTR reg64,reg64 [r+mv: vex.nds.lz.0f38.w1 f7 /r ] ND,SM0,SM1,LONG,FL,PROT,BMI1,X86_64 */ + /* 261(002 200) 001(f7) 100 : SM0,SM1,NOAPX,LONG,FL,VEX,PROT,BMI1,X86_64 */ + {I_BEXTR, 2, {REG_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55614, 135, 1134}, + /* 4 : BEXTR reg32,rm32*,reg32 [rmv: evex.np.nf.lz.0f38.w0 f7 /r ] SM0,SM1,SM2,NF,LONG,PROT,BMI1,APX,X86_64 */ + /* 242(f2 7c 08) 300 001(f7) 110 : SM0,SM1,SM2,NF,NF_E,LONG,EVEX,PROT,BMI1,APX,X86_64 */ + {I_BEXTR, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+24484, 136, 1135}, + /* 5 : BEXTR reg32,reg32 [r+mv: evex.np.nf.lz.0f38.w0 f7 /r ] ND,SM0,SM1,NF,LONG,PROT,BMI1,APX,X86_64 */ + /* 241(f2 7c 08) 300 001(f7) 100 : SM0,SM1,NF,NF_E,LONG,EVEX,PROT,BMI1,APX,X86_64 */ + {I_BEXTR, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+24493, 130, 1135}, + /* 6 : BEXTR reg64,rm64*,reg64 [rmv: evex.np.nf.lz.0f38.w1 f7 /r ] SM0,SM1,SM2,NF,LONG,PROT,BMI1,APX,X86_64 */ + /* 242(f2 fc 08) 300 001(f7) 110 : SM0,SM1,SM2,NF,NF_E,LONG,EVEX,PROT,BMI1,APX,X86_64 */ + {I_BEXTR, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+24502, 136, 1136}, + /* 7 : BEXTR reg64,reg64 [r+mv: evex.np.nf.lz.0f38.w1 f7 /r ] ND,SM0,SM1,NF,LONG,PROT,BMI1,APX,X86_64 */ + /* 241(f2 fc 08) 300 001(f7) 100 : SM0,SM1,NF,NF_E,LONG,EVEX,PROT,BMI1,APX,X86_64 */ + {I_BEXTR, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+24511, 130, 1136}, + /* 8 : BEXTR reg32,rm32*,imm32 [rmi: xop.m10.lz.w0 10 /r id ] SM0,SM1,FL,TBM,OBSOLETE,FUTURE,AMD */ + /* 270(112 000) 001(10) 110 042 : SM0,SM1,NOAPX,FL,VEX,TBM,OBSOLETE,FUTURE,AMD */ + {I_BEXTR, 3, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+51291, 147, 1159}, + /* 9 : BEXTR reg32,imm32 [r+mi: xop.m10.lz.w0 10 /r id ] ND,SM0,FL,TBM,OBSOLETE,FUTURE,AMD */ + /* 270(112 000) 001(10) 100 041 : SM0,NOAPX,FL,VEX,TBM,OBSOLETE,FUTURE,AMD */ + {I_BEXTR, 2, {REG_GPR|BITS32|RN_L16,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+51299, 148, 1159}, + /* 10 : BEXTR reg64,rm64*,imm32 [rmi: xop.m10.lz.w1 10 /r id ] SM0,SM1,LONG,FL,PROT,TBM,OBSOLETE,X86_64,AMD */ + /* 270(112 200) 001(10) 110 042 : SM0,SM1,NOAPX,LONG,FL,VEX,PROT,TBM,OBSOLETE,X86_64,AMD */ + {I_BEXTR, 3, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+51307, 149, 1160}, + /* 11 : BEXTR reg64,imm32 [r+mi: xop.m10.lz.w1 10 /r id ] SM0,ND,LONG,FL,PROT,TBM,OBSOLETE,X86_64,AMD */ + /* 270(112 200) 001(10) 100 041 : SM0,NOAPX,LONG,FL,VEX,PROT,TBM,OBSOLETE,X86_64,AMD */ + {I_BEXTR, 2, {REG_GPR|BITS64|RN_L16,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+51315, 150, 1160}, +}; + +static const struct itemplate instrux_BLSMSK[4] = { + /* 0 : BLSMSK reg32,rm32 [vm: vex.ndd.lz.0f38.w0 f3 /2 ] SM0-1,FL,BMI1,FUTURE */ + /* 260(002 000) 001(f3) 212 : SM0,SM1,NOAPX,FL,VEX,BMI1,FUTURE */ + {I_BLSMSK, 2, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55621, 133, 1137}, + /* 1 : BLSMSK reg64,rm64 [vm: vex.ndd.lz.0f38.w1 f3 /2 ] SM0-1,LONG,FL,PROT,BMI1,X86_64 */ + /* 260(002 200) 001(f3) 212 : SM0,SM1,NOAPX,LONG,FL,VEX,PROT,BMI1,X86_64 */ + {I_BLSMSK, 2, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55628, 135, 1138}, + /* 2 : BLSMSK reg32,rm32 [vm: evex.np.nf.lz.0f38.w0 f3 /2 ] SM0-1,NF,LONG,PROT,BMI1,APX,X86_64 */ + /* 240(f2 7c 08) 300 001(f3) 212 : SM0,SM1,NF,NF_E,LONG,EVEX,PROT,BMI1,APX,X86_64 */ + {I_BLSMSK, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+24520, 130, 1139}, + /* 3 : BLSMSK reg64,rm64 [vm: evex.np.nf.lz.0f38.w1 f3 /2 ] SM0-1,NF,LONG,PROT,BMI1,APX,X86_64 */ + /* 240(f2 fc 08) 300 001(f3) 212 : SM0,SM1,NF,NF_E,LONG,EVEX,PROT,BMI1,APX,X86_64 */ + {I_BLSMSK, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+24529, 130, 1140}, +}; + +static const struct itemplate instrux_BLSR[4] = { + /* 0 : BLSR reg32,rm32 [vm: vex.ndd.lz.0f38.w0 f3 /1 ] SM0-1,FL,BMI1,FUTURE */ + /* 260(002 000) 001(f3) 211 : SM0,SM1,NOAPX,FL,VEX,BMI1,FUTURE */ + {I_BLSR, 2, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55635, 133, 1141}, + /* 1 : BLSR reg64,rm64 [vm: vex.ndd.lz.0f38.w1 f3 /1 ] SM0-1,LONG,FL,PROT,BMI1,X86_64 */ + /* 260(002 200) 001(f3) 211 : SM0,SM1,NOAPX,LONG,FL,VEX,PROT,BMI1,X86_64 */ + {I_BLSR, 2, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55642, 135, 1142}, + /* 2 : BLSR reg32,rm32 [vm: evex.np.nf.lz.0f38.w0 f3 /1 ] SM0-1,NF,LONG,PROT,BMI1,APX,X86_64 */ + /* 240(f2 7c 08) 300 001(f3) 211 : SM0,SM1,NF,NF_E,LONG,EVEX,PROT,BMI1,APX,X86_64 */ + {I_BLSR, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+24538, 130, 1143}, + /* 3 : BLSR reg64,rm64 [vm: evex.np.nf.lz.0f38.w1 f3 /1 ] SM0-1,NF,LONG,PROT,BMI1,APX,X86_64 */ + /* 240(f2 fc 08) 300 001(f3) 211 : SM0,SM1,NF,NF_E,LONG,EVEX,PROT,BMI1,APX,X86_64 */ + {I_BLSR, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+24547, 130, 1144}, +}; + +static const struct itemplate instrux_BLSI[4] = { + /* 0 : BLSI reg32,rm32 [vm: vex.ndd.lz.0f38.w0 f3 /3 ] SM0-1,FL,BMI1,FUTURE */ + /* 260(002 000) 001(f3) 213 : SM0,SM1,NOAPX,FL,VEX,BMI1,FUTURE */ + {I_BLSI, 2, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55649, 133, 1145}, + /* 1 : BLSI reg64,rm64 [vm: vex.ndd.lz.0f38.w1 f3 /3 ] SM0-1,LONG,FL,PROT,BMI1,X86_64 */ + /* 260(002 200) 001(f3) 213 : SM0,SM1,NOAPX,LONG,FL,VEX,PROT,BMI1,X86_64 */ + {I_BLSI, 2, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55656, 135, 1146}, + /* 2 : BLSI reg32,rm32 [vm: evex.np.nf.lz.0f38.w0 f3 /3 ] SM0-1,NF,LONG,PROT,BMI1,APX,X86_64 */ + /* 240(f2 7c 08) 300 001(f3) 213 : SM0,SM1,NF,NF_E,LONG,EVEX,PROT,BMI1,APX,X86_64 */ + {I_BLSI, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+24556, 130, 1147}, + /* 3 : BLSI reg64,rm64 [vm: evex.np.nf.lz.0f38.w1 f3 /3 ] SM0-1,NF,LONG,PROT,BMI1,APX,X86_64 */ + /* 240(f2 fc 08) 300 001(f3) 213 : SM0,SM1,NF,NF_E,LONG,EVEX,PROT,BMI1,APX,X86_64 */ + {I_BLSI, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+24565, 130, 1148}, +}; + +static const struct itemplate instrux_BZHI[8] = { + /* 0 : BZHI reg32,rm32*,reg32 [rmv: vex.nds.lz.0f38.w0 f5 /r ] SM0,SM1,SM2,FL,BMI2,FUTURE */ + /* 262(002 000) 001(f5) 110 : SM0,SM1,SM2,NOAPX,FL,VEX,BMI2,FUTURE */ + {I_BZHI, 3, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55663, 137, 1149}, + /* 1 : BZHI reg32,reg32 [r+mv: vex.nds.lz.0f38.w0 f5 /r ] ND,SM0,SM1,FL,BMI2,FUTURE */ + /* 261(002 000) 001(f5) 100 : SM0,SM1,NOAPX,FL,VEX,BMI2,FUTURE */ + {I_BZHI, 2, {REG_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55670, 138, 1149}, + /* 2 : BZHI reg64,rm64*,reg64 [rmv: vex.nds.lz.0f38.w1 f5 /r ] SM0,SM1,SM2,LONG,FL,PROT,BMI2,X86_64 */ + /* 262(002 200) 001(f5) 110 : SM0,SM1,SM2,NOAPX,LONG,FL,VEX,PROT,BMI2,X86_64 */ + {I_BZHI, 3, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55677, 139, 1150}, + /* 3 : BZHI reg64,reg64 [r+mv: vex.nds.lz.0f38.w1 f5 /r ] ND,SM0,SM1,LONG,FL,PROT,BMI2,X86_64 */ + /* 261(002 200) 001(f5) 100 : SM0,SM1,NOAPX,LONG,FL,VEX,PROT,BMI2,X86_64 */ + {I_BZHI, 2, {REG_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55684, 140, 1150}, + /* 4 : BZHI reg32,rm32*,reg32 [rmv: evex.np.nf.lz.0f38.w0 f5 /r ] SM0,SM1,SM2,NF,LONG,PROT,BMI1,APX,X86_64 */ + /* 242(f2 7c 08) 300 001(f5) 110 : SM0,SM1,SM2,NF,NF_E,LONG,EVEX,PROT,BMI1,APX,X86_64 */ + {I_BZHI, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+24574, 136, 1151}, + /* 5 : BZHI reg32,reg32 [r+mv: evex.np.nf.lz.0f38.w0 f5 /r ] SM0,ND,SM1,NF,LONG,PROT,BMI1,APX,X86_64 */ + /* 241(f2 7c 08) 300 001(f5) 100 : SM0,SM1,NF,NF_E,LONG,EVEX,PROT,BMI1,APX,X86_64 */ + {I_BZHI, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+24583, 130, 1151}, + /* 6 : BZHI reg64,rm64*,reg64 [rmv: evex.np.nf.lz.0f38.w1 f5 /r ] SM0,SM1,SM2,NF,LONG,PROT,BMI1,APX,X86_64 */ + /* 242(f2 fc 08) 300 001(f5) 110 : SM0,SM1,SM2,NF,NF_E,LONG,EVEX,PROT,BMI1,APX,X86_64 */ + {I_BZHI, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+24592, 136, 1152}, + /* 7 : BZHI reg64,reg64 [r+mv: evex.np.nf.lz.0f38.w1 f5 /r ] ND,SM0,SM1,NF,LONG,PROT,BMI1,APX,X86_64 */ + /* 241(f2 fc 08) 300 001(f5) 100 : SM0,SM1,NF,NF_E,LONG,EVEX,PROT,BMI1,APX,X86_64 */ + {I_BZHI, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+24601, 130, 1152}, +}; + +static const struct itemplate instrux_PDEP[8] = { + /* 0 : PDEP reg32,reg32*,rm32 [rvm: vex.nds.lz.f2.0f38.w0 f5 /r ] SM0,SM1,SM2,BMI2,FUTURE */ + /* 261(002 003) 001(f5) 120 : SM0,SM1,SM2,NOAPX,VEX,BMI2,FUTURE */ + {I_PDEP, 3, {REG_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55691, 141, 1153}, + /* 1 : PDEP reg32,reg32*,rm32 [rvm: evex.nds.lz.f2.0f38.w0 f5 /r ] SM0,SM1,SM2,BMI2,FUTURE,APX */ + /* 241(f2 7f 08) 300 001(f5) 120 : SM0,SM1,SM2,LONG,EVEX,PROT,BMI2,APX,FUTURE */ + {I_PDEP, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+24610, 142, 1153}, + /* 2 : PDEP reg32,rm32 [r+vm: vex.nds.lz.f2.0f38.w0 f5 /r ] SM0,ND,SM1,BMI2,FUTURE */ + /* 260(002 003) 001(f5) 110 : SM0,SM1,NOAPX,VEX,BMI2,FUTURE */ + {I_PDEP, 2, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55698, 60, 1153}, + /* 3 : PDEP reg32,rm32 [r+vm: evex.nds.lz.f2.0f38.w0 f5 /r ] SM0,ND,SM1,BMI2,FUTURE,APX */ + /* 240(f2 7f 08) 300 001(f5) 110 : SM0,SM1,LONG,EVEX,PROT,BMI2,APX,FUTURE */ + {I_PDEP, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+24619, 143, 1153}, + /* 4 : PDEP reg64,reg64*,rm64 [rvm: vex.nds.lz.f2.0f38.w1 f5 /r ] SM0,SM1,SM2,LONG,PROT,BMI2,X86_64 */ + /* 261(002 203) 001(f5) 120 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,BMI2,X86_64 */ + {I_PDEP, 3, {REG_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55705, 144, 1154}, + /* 5 : PDEP reg64,reg64*,rm64 [rvm: evex.nds.lz.f2.0f38.w1 f5 /r ] SM0,SM1,SM2,LONG,PROT,BMI2,X86_64,APX */ + /* 241(f2 ff 08) 300 001(f5) 120 : SM0,SM1,SM2,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_PDEP, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+24628, 145, 1154}, + /* 6 : PDEP reg64,rm64 [r+vm: vex.nds.lz.f2.0f38.w1 f5 /r ] SM0,ND,SM1,LONG,PROT,BMI2,X86_64 */ + /* 260(002 203) 001(f5) 110 : SM0,SM1,NOAPX,LONG,VEX,PROT,BMI2,X86_64 */ + {I_PDEP, 2, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55712, 146, 1154}, + /* 7 : PDEP reg64,rm64 [r+vm: evex.nds.lz.f2.0f38.w1 f5 /r ] SM0,ND,SM1,LONG,PROT,BMI2,X86_64,APX */ + /* 240(f2 ff 08) 300 001(f5) 110 : SM0,SM1,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_PDEP, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+24637, 70, 1154}, +}; + +static const struct itemplate instrux_PEXT[8] = { + /* 0 : PEXT reg32,reg32*,rm32 [rvm: vex.nds.lz.f3.0f38.w0 f5 /r ] SM0,SM1,SM2,BMI2,FUTURE */ + /* 261(002 002) 001(f5) 120 : SM0,SM1,SM2,NOAPX,VEX,BMI2,FUTURE */ + {I_PEXT, 3, {REG_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55719, 141, 1155}, + /* 1 : PEXT reg32,reg32*,rm32 [rvm: evex.nds.lz.f3.0f38.w0 f5 /r ] SM0,SM1,SM2,BMI2,FUTURE,APX */ + /* 241(f2 7e 08) 300 001(f5) 120 : SM0,SM1,SM2,LONG,EVEX,PROT,BMI2,APX,FUTURE */ + {I_PEXT, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+24646, 142, 1155}, + /* 2 : PEXT reg32,rm32 [r+vm: vex.nds.lz.f3.0f38.w0 f5 /r ] SM0,ND,SM1,BMI2,FUTURE */ + /* 260(002 002) 001(f5) 110 : SM0,SM1,NOAPX,VEX,BMI2,FUTURE */ + {I_PEXT, 2, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55726, 60, 1155}, + /* 3 : PEXT reg32,rm32 [r+vm: evex.nds.lz.f3.0f38.w0 f5 /r ] SM0,ND,SM1,BMI2,FUTURE,APX */ + /* 240(f2 7e 08) 300 001(f5) 110 : SM0,SM1,LONG,EVEX,PROT,BMI2,APX,FUTURE */ + {I_PEXT, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+24655, 143, 1155}, + /* 4 : PEXT reg64,reg64*,rm64 [rvm: vex.nds.lz.f3.0f38.w1 f5 /r ] SM0,SM1,SM2,LONG,PROT,BMI2,X86_64 */ + /* 261(002 202) 001(f5) 120 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,BMI2,X86_64 */ + {I_PEXT, 3, {REG_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55733, 144, 1156}, + /* 5 : PEXT reg64,reg64*,rm64 [rvm: evex.nds.lz.f3.0f38.w1 f5 /r ] SM0,SM1,SM2,LONG,PROT,BMI2,X86_64,APX */ + /* 241(f2 fe 08) 300 001(f5) 120 : SM0,SM1,SM2,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_PEXT, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+24664, 145, 1156}, + /* 6 : PEXT reg64,rm64 [r+vm: vex.nds.lz.f3.0f38.w1 f5 /r ] SM0,ND,SM1,LONG,PROT,BMI2,X86_64 */ + /* 260(002 202) 001(f5) 110 : SM0,SM1,NOAPX,LONG,VEX,PROT,BMI2,X86_64 */ + {I_PEXT, 2, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55740, 146, 1156}, + /* 7 : PEXT reg64,rm64 [r+vm: evex.nds.lz.f3.0f38.w1 f5 /r ] SM0,ND,SM1,LONG,PROT,BMI2,X86_64,APX */ + /* 240(f2 fe 08) 300 001(f5) 110 : SM0,SM1,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_PEXT, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+24673, 70, 1156}, +}; + +static const struct itemplate instrux_BLCI[2] = { + /* 0 : BLCI reg32,rm32 [vm: xop.ndd.lz.m9.w0 02 /6 ] SM0-1,FL,TBM,OBSOLETE,FUTURE,AMD */ + /* 260(111 000) 001(02) 216 : SM0,SM1,NOAPX,FL,VEX,TBM,OBSOLETE,FUTURE,AMD */ + {I_BLCI, 2, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55747, 147, 1161}, + /* 1 : BLCI reg64,rm64 [vm: xop.ndd.lz.m9.w1 02 /6 ] SM0-1,LONG,FL,PROT,TBM,OBSOLETE,X86_64,AMD */ + /* 260(111 200) 001(02) 216 : SM0,SM1,NOAPX,LONG,FL,VEX,PROT,TBM,OBSOLETE,X86_64,AMD */ + {I_BLCI, 2, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55754, 149, 1162}, +}; + +static const struct itemplate instrux_BLCIC[2] = { + /* 0 : BLCIC reg32,rm32 [vm: xop.ndd.lz.m9.w0 01 /5 ] SM0-1,FL,TBM,OBSOLETE,FUTURE,AMD */ + /* 260(111 000) 001(01) 215 : SM0,SM1,NOAPX,FL,VEX,TBM,OBSOLETE,FUTURE,AMD */ + {I_BLCIC, 2, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55761, 147, 1163}, + /* 1 : BLCIC reg64,rm64 [vm: xop.ndd.lz.m9.w1 01 /5 ] SM0-1,LONG,FL,PROT,TBM,OBSOLETE,X86_64,AMD */ + /* 260(111 200) 001(01) 215 : SM0,SM1,NOAPX,LONG,FL,VEX,PROT,TBM,OBSOLETE,X86_64,AMD */ + {I_BLCIC, 2, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55768, 149, 1164}, +}; + +static const struct itemplate instrux_BLSIC[2] = { + /* 0 : BLSIC reg32,rm32 [vm: xop.ndd.lz.m9.w0 01 /6 ] SM0-1,FL,TBM,OBSOLETE,FUTURE,AMD */ + /* 260(111 000) 001(01) 216 : SM0,SM1,NOAPX,FL,VEX,TBM,OBSOLETE,FUTURE,AMD */ + {I_BLSIC, 2, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55775, 147, 1165}, + /* 1 : BLSIC reg64,rm64 [vm: xop.ndd.lz.m9.w1 01 /6 ] SM0-1,LONG,FL,PROT,TBM,OBSOLETE,X86_64,AMD */ + /* 260(111 200) 001(01) 216 : SM0,SM1,NOAPX,LONG,FL,VEX,PROT,TBM,OBSOLETE,X86_64,AMD */ + {I_BLSIC, 2, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55782, 149, 1166}, +}; + +static const struct itemplate instrux_BLCFILL[2] = { + /* 0 : BLCFILL reg32,rm32 [vm: xop.ndd.lz.m9.w0 01 /1 ] SM0-1,TBM,OBSOLETE,FUTURE,AMD */ + /* 260(111 000) 001(01) 211 : SM0,SM1,NOAPX,VEX,TBM,OBSOLETE,FUTURE,AMD */ + {I_BLCFILL, 2, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55789, 151, 1167}, + /* 1 : BLCFILL reg64,rm64 [vm: xop.ndd.lz.m9.w1 01 /1 ] SM0-1,LONG,PROT,TBM,OBSOLETE,X86_64,AMD */ + /* 260(111 200) 001(01) 211 : SM0,SM1,NOAPX,LONG,VEX,PROT,TBM,OBSOLETE,X86_64,AMD */ + {I_BLCFILL, 2, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55796, 152, 1168}, +}; + +static const struct itemplate instrux_BLSFILL[2] = { + /* 0 : BLSFILL reg32,rm32 [vm: xop.ndd.lz.m9.w0 01 /2 ] TBM,OBSOLETE,FUTURE,AMD */ + /* 260(111 000) 001(01) 212 : NOAPX,VEX,TBM,OBSOLETE,FUTURE,AMD */ + {I_BLSFILL, 2, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55803, 153, 1169}, + /* 1 : BLSFILL reg64,rm64 [vm: xop.ndd.lz.m9.w1 01 /2 ] LONG,PROT,TBM,OBSOLETE,X86_64,AMD */ + /* 260(111 200) 001(01) 212 : NOAPX,LONG,VEX,PROT,TBM,OBSOLETE,X86_64,AMD */ + {I_BLSFILL, 2, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55810, 154, 1170}, +}; + +static const struct itemplate instrux_BLCMSK[2] = { + /* 0 : BLCMSK reg32,rm32 [vm: xop.ndd.lz.m9.w0 02 /1 ] FL,TBM,OBSOLETE,FUTURE,AMD */ + /* 260(111 000) 001(02) 211 : NOAPX,FL,VEX,TBM,OBSOLETE,FUTURE,AMD */ + {I_BLCMSK, 2, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55817, 155, 1171}, + /* 1 : BLCMSK reg64,rm64 [vm: xop.ndd.lz.m9.w1 02 /1 ] LONG,FL,PROT,TBM,OBSOLETE,X86_64,AMD */ + /* 260(111 200) 001(02) 211 : NOAPX,LONG,FL,VEX,PROT,TBM,OBSOLETE,X86_64,AMD */ + {I_BLCMSK, 2, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55824, 156, 1172}, +}; + +static const struct itemplate instrux_BLCS[2] = { + /* 0 : BLCS reg32,rm32 [vm: xop.ndd.lz.m9.w0 01 /3 ] TBM,OBSOLETE,FUTURE,AMD */ + /* 260(111 000) 001(01) 213 : NOAPX,VEX,TBM,OBSOLETE,FUTURE,AMD */ + {I_BLCS, 2, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55831, 153, 1173}, + /* 1 : BLCS reg64,rm64 [vm: xop.ndd.lz.m9.w1 01 /3 ] LONG,PROT,TBM,OBSOLETE,X86_64,AMD */ + /* 260(111 200) 001(01) 213 : NOAPX,LONG,VEX,PROT,TBM,OBSOLETE,X86_64,AMD */ + {I_BLCS, 2, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55838, 154, 1174}, +}; + +static const struct itemplate instrux_TZMSK[2] = { + /* 0 : TZMSK reg32,rm32 [vm: xop.ndd.lz.m9.w0 01 /4 ] TBM,OBSOLETE,FUTURE,AMD */ + /* 260(111 000) 001(01) 214 : NOAPX,VEX,TBM,OBSOLETE,FUTURE,AMD */ + {I_TZMSK, 2, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55845, 153, 1175}, + /* 1 : TZMSK reg64,rm64 [vm: xop.ndd.lz.m9.w1 01 /4 ] LONG,PROT,TBM,OBSOLETE,X86_64,AMD */ + /* 260(111 200) 001(01) 214 : NOAPX,LONG,VEX,PROT,TBM,OBSOLETE,X86_64,AMD */ + {I_TZMSK, 2, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55852, 154, 1176}, +}; + +static const struct itemplate instrux_T1MSKC[2] = { + /* 0 : T1MSKC reg32,rm32 [vm: xop.ndd.lz.m9.w0 01 /7 ] TBM,OBSOLETE,FUTURE,AMD */ + /* 260(111 000) 001(01) 217 : NOAPX,VEX,TBM,OBSOLETE,FUTURE,AMD */ + {I_T1MSKC, 2, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55859, 153, 1177}, + /* 1 : T1MSKC reg64,rm64 [vm: xop.ndd.lz.m9.w1 01 /7 ] LONG,PROT,TBM,OBSOLETE,X86_64,AMD */ + /* 260(111 200) 001(01) 217 : NOAPX,LONG,VEX,PROT,TBM,OBSOLETE,X86_64,AMD */ + {I_T1MSKC, 2, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55866, 154, 1178}, +}; + +static const struct itemplate instrux_AAA[1] = { + /* 0 : AAA void [ 37 ] NOREX,NOAPX,NOLONG,FL,8086 */ + /* 001(37) : NOREX,NOAPX,NOLONG,FL,8086 */ + {I_AAA, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73445, 74, 1181}, +}; + +static const struct itemplate instrux_AAD[2] = { + /* 0 : AAD void [ d5 0a ] NOREX,NOAPX,NOLONG,FL,8086 */ + /* 002(d5 0a) : NOREX,NOAPX,NOLONG,FL,8086 */ + {I_AAD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72656, 74, 1182}, + /* 1 : AAD imm8 [i: d5 ib,u ] AR0,SB,NOREX,NOAPX,NOLONG,FL,8086 */ + /* 001(d5) 024 : AR0,SB,NOREX,NOAPX,NOLONG,FL,8086 */ + {I_AAD, 1, {IMM_NORMAL|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72660, 157, 1183}, +}; + +static const struct itemplate instrux_AAM[2] = { + /* 0 : AAM void [ d4 0a ] NOREX,NOAPX,NOLONG,FL,8086 */ + /* 002(d4 0a) : NOREX,NOAPX,NOLONG,FL,8086 */ + {I_AAM, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72664, 74, 1184}, + /* 1 : AAM imm8 [i: d4 ib,u ] AR0,SB,NOREX,NOAPX,NOLONG,FL,8086 */ + /* 001(d4) 024 : AR0,SB,NOREX,NOAPX,NOLONG,FL,8086 */ + {I_AAM, 1, {IMM_NORMAL|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72668, 157, 1185}, +}; + +static const struct itemplate instrux_AAS[1] = { + /* 0 : AAS void [ 3f ] NOREX,NOAPX,NOLONG,FL,8086 */ + /* 001(3f) : NOREX,NOAPX,NOLONG,FL,8086 */ + {I_AAS, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73448, 74, 1186}, +}; + +static const struct itemplate instrux_DAA[1] = { + /* 0 : DAA void [ 27 ] NOREX,NOAPX,NOLONG,FL,8086 */ + /* 001(27) : NOREX,NOAPX,NOLONG,FL,8086 */ + {I_DAA, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73451, 74, 1187}, +}; + +static const struct itemplate instrux_DAS[1] = { + /* 0 : DAS void [ 2f ] NOREX,NOAPX,NOLONG,FL,8086 */ + /* 001(2f) : NOREX,NOAPX,NOLONG,FL,8086 */ + {I_DAS, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73454, 74, 1188}, +}; + +static const struct itemplate instrux_BSWAP[6] = { + /* 0 : BSWAP reg32 [r: o32 0f c8+r ] 486 */ + /* 321 355 010 310 : 486 */ + {I_BSWAP, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71634, 158, 1191}, + /* 1 : BSWAP reg64 [r: o64 0f c8+r ] LONG,PROT,X86_64 */ + /* 324 355 010 310 : LONG,PROT,X86_64 */ + {I_BSWAP, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71639, 24, 1192}, + /* 2 : BSWAP reg_ax [-: 86 c4 ] ND,OPT,NOREX,NOAPX,8086 */ + /* 002(86 c4) : OPT,NOREX,NOAPX,8086 */ + {I_BSWAP, 1, {REG_AX|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72672, 159, 1193}, + /* 3 : BSWAP reg_cx [-: 86 cd ] ND,OPT,NOREX,NOAPX,8086 */ + /* 002(86 cd) : OPT,NOREX,NOAPX,8086 */ + {I_BSWAP, 1, {REG_CX|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72676, 159, 1194}, + /* 4 : BSWAP reg_dx [-: 86 d6 ] ND,OPT,NOREX,NOAPX,8086 */ + /* 002(86 d6) : OPT,NOREX,NOAPX,8086 */ + {I_BSWAP, 1, {REG_DX|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72680, 159, 1195}, + /* 5 : BSWAP reg_bx [-: 86 df ] ND,OPT,NOREX,NOAPX,8086 */ + /* 002(86 df) : OPT,NOREX,NOAPX,8086 */ + {I_BSWAP, 1, {REG_BX|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72684, 159, 1196}, +}; + +static const struct itemplate instrux_MOVBE[12] = { + /* 0 : MOVBE reg16,mem16 [rm: o16 norep 0f38 f0 /r ] SM0-1,MOVBE,NEHALEM */ + /* 320 331 356 001(f0) 110 : SM0,SM1,NOAPX,MOVBE,NEHALEM */ + {I_MOVBE, 2, {REG_GPR|BITS16|RN_L16,MEMORY|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55873, 160, 1197}, + /* 1 : MOVBE reg32,mem32 [rm: o32 norep 0f38 f0 /r ] SM0-1,MOVBE,NEHALEM */ + /* 321 331 356 001(f0) 110 : SM0,SM1,NOAPX,MOVBE,NEHALEM */ + {I_MOVBE, 2, {REG_GPR|BITS32|RN_L16,MEMORY|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55880, 160, 1198}, + /* 2 : MOVBE reg64,mem64 [rm: o64 norep 0f38 f0 /r ] SM0-1,LONG,PROT,MOVBE,X86_64,NEHALEM */ + /* 324 331 356 001(f0) 110 : SM0,SM1,NOAPX,LONG,PROT,MOVBE,NEHALEM */ + {I_MOVBE, 2, {REG_GPR|BITS64|RN_L16,MEMORY|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55887, 161, 1199}, + /* 3 : MOVBE mem16,reg16 [mr: o16 norep 0f38 f1 /r ] SM0-1,MOVBE,NEHALEM */ + /* 320 331 356 001(f1) 101 : SM0,SM1,NOAPX,MOVBE,NEHALEM */ + {I_MOVBE, 2, {MEMORY|BITS16|RN_L16,REG_GPR|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55894, 160, 1200}, + /* 4 : MOVBE mem32,reg32 [mr: o32 norep 0f38 f1 /r ] SM0-1,MOVBE,NEHALEM */ + /* 321 331 356 001(f1) 101 : SM0,SM1,NOAPX,MOVBE,NEHALEM */ + {I_MOVBE, 2, {MEMORY|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55901, 160, 1201}, + /* 5 : MOVBE mem64,reg64 [mr: o64 norep 0f38 f1 /r ] SM0-1,LONG,PROT,MOVBE,X86_64,NEHALEM */ + /* 324 331 356 001(f1) 101 : SM0,SM1,NOAPX,LONG,PROT,MOVBE,NEHALEM */ + {I_MOVBE, 2, {MEMORY|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55908, 161, 1202}, + /* 6 : MOVBE reg16,mem16 [rm: evex.nd0.nf0.l0.m4.o16 60 /r ] SM0-1,LONG,PROT,APX,MOVBE,X86_64,NEHALEM */ + /* 250(f4 7d 08) 300 320 001(60) 110 : SM0,SM1,LONG,EVEX,PROT,APX,MOVBE,NEHALEM */ + {I_MOVBE, 2, {REG_GPR|BITS16,MEMORY|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+12963, 162, 1203}, + /* 7 : MOVBE reg32,mem32 [rm: evex.nd0.nf0.l0.m4.o32 60 /r ] SM0-1,LONG,PROT,APX,MOVBE,X86_64,NEHALEM */ + /* 250(f4 7c 08) 300 321 001(60) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,MOVBE,NEHALEM */ + {I_MOVBE, 2, {REG_GPR|BITS32,MEMORY|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+12973, 163, 1204}, + /* 8 : MOVBE reg64,mem64 [rm: evex.nd0.nf0.l0.m4.o64 60 /r ] SM0-1,LONG,PROT,APX,MOVBE,X86_64,NEHALEM */ + /* 250(f4 fc 08) 300 324 001(60) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,MOVBE,NEHALEM */ + {I_MOVBE, 2, {REG_GPR|BITS64,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+12983, 163, 1205}, + /* 9 : MOVBE mem16,reg16 [mr: evex.nd0.nf0.l0.m4.o16 61 /r ] SM0-1,LONG,PROT,APX,MOVBE,X86_64,NEHALEM */ + /* 250(f4 7d 08) 300 320 001(61) 101 : SM0,SM1,LONG,EVEX,PROT,APX,MOVBE,NEHALEM */ + {I_MOVBE, 2, {MEMORY|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+12993, 162, 1206}, + /* 10 : MOVBE mem32,reg32 [mr: evex.nd0.nf0.l0.m4.o32 61 /r ] SM0-1,LONG,PROT,APX,MOVBE,X86_64,NEHALEM */ + /* 250(f4 7c 08) 300 321 001(61) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,MOVBE,NEHALEM */ + {I_MOVBE, 2, {MEMORY|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+13003, 163, 1207}, + /* 11 : MOVBE mem64,reg64 [mr: evex.nd0.nf0.l0.m4.o64 61 /r ] SM0-1,LONG,PROT,APX,MOVBE,X86_64,NEHALEM */ + /* 250(f4 fc 08) 300 324 001(61) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,MOVBE,NEHALEM */ + {I_MOVBE, 2, {MEMORY|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+13013, 163, 1208}, +}; + +static const struct itemplate instrux_CBW[1] = { + /* 0 : CBW void [ o16 98 ] 8086 */ + /* 320 001(98) : 8086 */ + {I_CBW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72688, 23, 1211}, +}; + +static const struct itemplate instrux_CDQ[1] = { + /* 0 : CDQ void [ o32 99 ] 386 */ + /* 321 001(99) : 386 */ + {I_CDQ, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72692, 3, 1212}, +}; + +static const struct itemplate instrux_CDQE[1] = { + /* 0 : CDQE void [ o64 98 ] LONG,PROT,X86_64 */ + /* 324 001(98) : LONG,PROT,X86_64 */ + {I_CDQE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72696, 24, 1213}, +}; + +static const struct itemplate instrux_CQO[1] = { + /* 0 : CQO void [ o64 99 ] LONG,PROT,X86_64 */ + /* 324 001(99) : LONG,PROT,X86_64 */ + {I_CQO, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72700, 24, 1214}, +}; + +static const struct itemplate instrux_CWD[1] = { + /* 0 : CWD void [ o16 99 ] 8086 */ + /* 320 001(99) : 8086 */ + {I_CWD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72704, 23, 1215}, +}; + +static const struct itemplate instrux_CWDE[1] = { + /* 0 : CWDE void [ o32 98 ] 386 */ + /* 321 001(98) : 386 */ + {I_CWDE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72708, 3, 1216}, +}; + +static const struct itemplate instrux_MOVSX[12] = { + /* 0 : MOVSX reg_ax,reg_al [--: o16 98 ] ND,OPT,8086 */ + /* 320 001(98) : OPT,8086 */ + {I_MOVSX, 2, {REG_AX,REG_AL,0,0,0}, NO_DECORATOR, nasm_bytecodes+72688, 164, 1217}, + /* 1 : MOVSX reg_eax,reg_ax [--: o32 98 ] ND,OPT,ZU,386 */ + /* 321 001(98) : OPT,ZU,386 */ + {I_MOVSX, 2, {REG_EAX,REG_AX,0,0,0}, NO_DECORATOR, nasm_bytecodes+72708, 165, 1219}, + /* 2 : MOVSX reg_rax,reg_eax [--: o64 98 ] ND,OPT,ZU,LONG,PROT,X86_64 */ + /* 324 001(98) : OPT,ZU,LONG,PROT,X86_64 */ + {I_MOVSX, 2, {REG_RAX,REG_EAX,0,0,0}, NO_DECORATOR, nasm_bytecodes+72696, 166, 1221}, + /* 3 : MOVSX reg16,rm8 [rm: o16 0f be /r ] AR0-1,SX,386 */ + /* 320 355 001(be) 110 : AR0,AR1,SX,386 */ + {I_MOVSX, 2, {REG_GPR|BITS16,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+66915, 167, 1223}, + /* 4 : MOVSX reg32,rm8 [rm: o32 0f be /r ] AR0-1,SX,386 */ + /* 321 355 001(be) 110 : AR0,AR1,SX,386 */ + {I_MOVSX, 2, {REG_GPR|BITS32,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+66921, 167, 1224}, + /* 5 : MOVSX reg64,rm8 [rm: o64 0f be /r ] AR0-1,SX,LONG,PROT,X86_64 */ + /* 324 355 001(be) 110 : AR0,AR1,SX,LONG,PROT,X86_64 */ + {I_MOVSX, 2, {REG_GPR|BITS64,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+66927, 168, 1225}, + /* 6 : MOVSX reg16,rm16 [rm: o16 0f bf /r ] AR0-1,SX,386 */ + /* 320 355 001(bf) 110 : AR0,AR1,SX,386 */ + {I_MOVSX, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66933, 167, 1229}, + /* 7 : MOVSX reg32,rm16 [rm: o32 0f bf /r ] AR0-1,SX,386 */ + /* 321 355 001(bf) 110 : AR0,AR1,SX,386 */ + {I_MOVSX, 2, {REG_GPR|BITS32,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66939, 167, 1230}, + /* 8 : MOVSX reg64,rm16 [rm: o64 0f bf /r ] AR0-1,SX,LONG,PROT,X86_64 */ + /* 324 355 001(bf) 110 : AR0,AR1,SX,LONG,PROT,X86_64 */ + {I_MOVSX, 2, {REG_GPR|BITS64,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66945, 168, 1231}, + /* 9 : MOVSX reg16,rm32 [rm: o16 63 /r ] ND,AR0-1,SX,LONG,PROT,X86_64 */ + /* 320 001(63) 110 : AR0,AR1,SX,LONG,PROT,X86_64 */ + {I_MOVSX, 2, {REG_GPR|BITS16,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+71644, 168, 1235}, + /* 10 : MOVSX reg32,rm32 [rm: o32 63 /r ] ND,AR0-1,SX,LONG,PROT,X86_64 */ + /* 321 001(63) 110 : AR0,AR1,SX,LONG,PROT,X86_64 */ + {I_MOVSX, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+71649, 168, 1236}, + /* 11 : MOVSX reg64,rm32 [rm: o64 63 /r ] ND,AR0-1,SX,LONG,PROT,X86_64 */ + /* 324 001(63) 110 : AR0,AR1,SX,LONG,PROT,X86_64 */ + {I_MOVSX, 2, {REG_GPR|BITS64,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+71654, 168, 1237}, +}; + +static const struct itemplate instrux_MOVSXB[4] = { + /* 0 : MOVSXB reg_ax,reg_al [--: o16 98 ] ND,OPT,8086 */ + /* 320 001(98) : OPT,8086 */ + {I_MOVSXB, 2, {REG_AX,REG_AL,0,0,0}, NO_DECORATOR, nasm_bytecodes+72688, 164, 1218}, + /* 1 : MOVSXB reg16,rm8 [rm: o16 0f be /r ] ND,386 */ + /* 320 355 001(be) 110 : 386 */ + {I_MOVSXB, 2, {REG_GPR|BITS16,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+66915, 3, 1226}, + /* 2 : MOVSXB reg32,rm8 [rm: o32 0f be /r ] ND,386 */ + /* 321 355 001(be) 110 : 386 */ + {I_MOVSXB, 2, {REG_GPR|BITS32,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+66921, 3, 1227}, + /* 3 : MOVSXB reg64,rm8 [rm: o64 0f be /r ] ND,LONG,PROT,X86_64 */ + /* 324 355 001(be) 110 : LONG,PROT,X86_64 */ + {I_MOVSXB, 2, {REG_GPR|BITS64,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+66927, 24, 1228}, +}; + +static const struct itemplate instrux_MOVSXW[4] = { + /* 0 : MOVSXW reg_eax,reg_ax [--: o32 98 ] ND,OPT,ZU,386 */ + /* 321 001(98) : OPT,ZU,386 */ + {I_MOVSXW, 2, {REG_EAX,REG_AX,0,0,0}, NO_DECORATOR, nasm_bytecodes+72708, 165, 1220}, + /* 1 : MOVSXW reg16,rm16 [rm: o16 0f bf /r ] ND,386 */ + /* 320 355 001(bf) 110 : 386 */ + {I_MOVSXW, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66933, 3, 1232}, + /* 2 : MOVSXW reg32,rm16 [rm: o32 0f bf /r ] ND,386 */ + /* 321 355 001(bf) 110 : 386 */ + {I_MOVSXW, 2, {REG_GPR|BITS32,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66939, 3, 1233}, + /* 3 : MOVSXW reg64,rm16 [rm: o64 0f bf /r ] ND,LONG,PROT,X86_64 */ + /* 324 355 001(bf) 110 : LONG,PROT,X86_64 */ + {I_MOVSXW, 2, {REG_GPR|BITS64,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66945, 24, 1234}, +}; + +static const struct itemplate instrux_MOVSXD[4] = { + /* 0 : MOVSXD reg_rax,reg_eax [--: o64 98 ] ND,OPT,ZU,LONG,PROT,X86_64 */ + /* 324 001(98) : OPT,ZU,LONG,PROT,X86_64 */ + {I_MOVSXD, 2, {REG_RAX,REG_EAX,0,0,0}, NO_DECORATOR, nasm_bytecodes+72696, 166, 1222}, + /* 1 : MOVSXD reg16,rm32 [rm: o16 63 /r ] LONG,PROT,X86_64 */ + /* 320 001(63) 110 : LONG,PROT,X86_64 */ + {I_MOVSXD, 2, {REG_GPR|BITS16,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+71644, 24, 1238}, + /* 2 : MOVSXD reg32,rm32 [rm: o32 63 /r ] LONG,PROT,X86_64 */ + /* 321 001(63) 110 : LONG,PROT,X86_64 */ + {I_MOVSXD, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+71649, 24, 1239}, + /* 3 : MOVSXD reg64,rm32 [rm: o64 63 /r ] LONG,PROT,X86_64 */ + /* 324 001(63) 110 : LONG,PROT,X86_64 */ + {I_MOVSXD, 2, {REG_GPR|BITS64,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+71654, 24, 1240}, +}; + +static const struct itemplate instrux_MOVZX[9] = { + /* 0 : MOVZX reg16,rm8 [rm: o16 0f b6 /r ] AR0-1,SX,386 */ + /* 320 355 001(b6) 110 : AR0,AR1,SX,386 */ + {I_MOVZX, 2, {REG_GPR|BITS16,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+66951, 167, 1242}, + /* 1 : MOVZX reg32,rm8 [rm: o32 0f b6 /r ] AR0-1,SX,386 */ + /* 321 355 001(b6) 110 : AR0,AR1,SX,386 */ + {I_MOVZX, 2, {REG_GPR|BITS32,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+66957, 167, 1243}, + /* 2 : MOVZX reg64,rm8 [rm: o64 0f b6 /r ] AR0-1,SX,LONG,PROT,X86_64 */ + /* 324 355 001(b6) 110 : AR0,AR1,SX,LONG,PROT,X86_64 */ + {I_MOVZX, 2, {REG_GPR|BITS64,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+66963, 168, 1244}, + /* 3 : MOVZX reg16,rm16 [rm: o16 0f b7 /r ] AR0-1,SX,386 */ + /* 320 355 001(b7) 110 : AR0,AR1,SX,386 */ + {I_MOVZX, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66969, 167, 1248}, + /* 4 : MOVZX reg32,rm16 [rm: o32 0f b7 /r ] AR0-1,SX,386 */ + /* 321 355 001(b7) 110 : AR0,AR1,SX,386 */ + {I_MOVZX, 2, {REG_GPR|BITS32,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66975, 167, 1249}, + /* 5 : MOVZX reg64,rm16 [rm: o64 0f b7 /r ] AR0-1,SX,LONG,PROT,X86_64 */ + /* 324 355 001(b7) 110 : AR0,AR1,SX,LONG,PROT,X86_64 */ + {I_MOVZX, 2, {REG_GPR|BITS64,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66981, 168, 1250}, + /* 6 : MOVZX reg16,rm32 [rm: nw o16 8b /r ] ND,AR0-1,SX,OPT,8086 */ + /* 327 320 001(8b) 110 : AR0,AR1,NWSIZE,SX,OPT,8086 */ + {I_MOVZX, 2, {REG_GPR|BITS16,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+66987, 169, 1254}, + /* 7 : MOVZX reg32,rm32 [rm: nw o32 8b /r ] ND,AR0-1,SX,OPT,386 */ + /* 327 321 001(8b) 110 : AR0,AR1,NWSIZE,SX,OPT,386 */ + {I_MOVZX, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+66993, 170, 1255}, + /* 8 : MOVZX reg64,rm32 [rm: nw o64 8b /r ] ND,AR0-1,SX,OPT,LONG,PROT,X86_64 */ + /* 327 324 001(8b) 110 : AR0,AR1,NWSIZE,SX,OPT,LONG,PROT,X86_64 */ + {I_MOVZX, 2, {REG_GPR|BITS64,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+66999, 171, 1256}, +}; + +static const struct itemplate instrux_MOVZXB[3] = { + /* 0 : MOVZXB reg16,rm8 [rm: o16 0f b6 /r ] ND,386 */ + /* 320 355 001(b6) 110 : 386 */ + {I_MOVZXB, 2, {REG_GPR|BITS16,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+66951, 3, 1245}, + /* 1 : MOVZXB reg32,rm8 [rm: o32 0f b6 /r ] ND,386 */ + /* 321 355 001(b6) 110 : 386 */ + {I_MOVZXB, 2, {REG_GPR|BITS32,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+66957, 3, 1246}, + /* 2 : MOVZXB reg64,rm8 [rm: o64 0f b6 /r ] ND,LONG,PROT,X86_64 */ + /* 324 355 001(b6) 110 : LONG,PROT,X86_64 */ + {I_MOVZXB, 2, {REG_GPR|BITS64,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+66963, 24, 1247}, +}; + +static const struct itemplate instrux_MOVZXW[3] = { + /* 0 : MOVZXW reg16,rm16 [rm: o16 0f b7 /r ] ND,386 */ + /* 320 355 001(b7) 110 : 386 */ + {I_MOVZXW, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66969, 3, 1251}, + /* 1 : MOVZXW reg32,rm16 [rm: o32 0f b7 /r ] ND,386 */ + /* 321 355 001(b7) 110 : 386 */ + {I_MOVZXW, 2, {REG_GPR|BITS32,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66975, 3, 1252}, + /* 2 : MOVZXW reg64,rm16 [rm: o64 0f b7 /r ] ND,LONG,PROT,X86_64 */ + /* 324 355 001(b7) 110 : LONG,PROT,X86_64 */ + {I_MOVZXW, 2, {REG_GPR|BITS64,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66981, 24, 1253}, +}; + +static const struct itemplate instrux_MOVZXD[3] = { + /* 0 : MOVZXD reg16,rm32 [rm: nw o16 8b /r ] ND,OPT,8086 */ + /* 327 320 001(8b) 110 : NWSIZE,OPT,8086 */ + {I_MOVZXD, 2, {REG_GPR|BITS16,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+66987, 172, 1257}, + /* 1 : MOVZXD reg32,rm32 [rm: nw o32 8b /r ] ND,OPT,386 */ + /* 327 321 001(8b) 110 : NWSIZE,OPT,386 */ + {I_MOVZXD, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+66993, 173, 1258}, + /* 2 : MOVZXD reg64,rm32 [rm: nw o64 8b /r ] ND,OPT,LONG,PROT,X86_64 */ + /* 327 324 001(8b) 110 : NWSIZE,OPT,LONG,PROT,X86_64 */ + {I_MOVZXD, 2, {REG_GPR|BITS64,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+66999, 174, 1259}, +}; + +static const struct itemplate instrux_CMPXCHG[4] = { + /* 0 : CMPXCHG rm8,reg8 [mr: hle o8 0f b0 /r ] SM0-1,LOCK,FL,PENT */ + /* 273 355 001(b0) 101 : SM0,SM1,LOCK,FL,PENT */ + {I_CMPXCHG, 2, {RM_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+67005, 175, 1262}, + /* 1 : CMPXCHG rm16,reg16 [mr: hle o16 0f b1 /r ] SM0-1,LOCK,FL,PENT */ + /* 273 320 355 001(b1) 101 : SM0,SM1,LOCK,FL,PENT */ + {I_CMPXCHG, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55915, 175, 1263}, + /* 2 : CMPXCHG rm32,reg32 [mr: hle o32 0f b1 /r ] SM0-1,LOCK,FL,PENT */ + /* 273 321 355 001(b1) 101 : SM0,SM1,LOCK,FL,PENT */ + {I_CMPXCHG, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+55922, 175, 1264}, + /* 3 : CMPXCHG rm64,reg64 [mr: hle o64 0f b1 /r ] SM0-1,LOCK,LONG,FL,PROT,X86_64 */ + /* 273 324 355 001(b1) 101 : SM0,SM1,LOCK,LONG,FL,PROT,X86_64 */ + {I_CMPXCHG, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+55929, 27, 1265}, +}; + +static const struct itemplate instrux_CMPXCHG8B[1] = { + /* 0 : CMPXCHG8B mem64 [m: hle norexw 0f c7 /1 ] LOCK,FL,PENT */ + /* 273 317 355 001(c7) 201 : LOCK,FL,PENT */ + {I_CMPXCHG8B, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+55936, 176, 1266}, +}; + +static const struct itemplate instrux_CMPXCHG16B[1] = { + /* 0 : CMPXCHG16B mem128 [m: o64 0f c7 /1 ] LOCK,LONG,FL,PROT,X86_64 */ + /* 324 355 001(c7) 201 : LOCK,LONG,FL,PROT,X86_64 */ + {I_CMPXCHG16B, 1, {MEMORY|BITS128,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67011, 78, 1267}, +}; + +static const struct itemplate instrux_XADD[4] = { + /* 0 : XADD rm8,reg8 [mr: hle o8 0f c0 /r ] SM0-1,LOCK,FL,486 */ + /* 273 355 001(c0) 101 : SM0,SM1,LOCK,FL,486 */ + {I_XADD, 2, {RM_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+67017, 177, 1269}, + /* 1 : XADD rm16,reg16 [mr: hle o16 0f c1 /r ] SM0-1,LOCK,FL,486 */ + /* 273 320 355 001(c1) 101 : SM0,SM1,LOCK,FL,486 */ + {I_XADD, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55943, 177, 1270}, + /* 2 : XADD rm32,reg32 [mr: hle o32 0f c1 /r ] SM0-1,LOCK,FL,486 */ + /* 273 321 355 001(c1) 101 : SM0,SM1,LOCK,FL,486 */ + {I_XADD, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+55950, 177, 1271}, + /* 3 : XADD rm64,reg64 [mr: hle o64 0f c1 /r ] SM0-1,LOCK,LONG,FL,PROT,X86_64 */ + /* 273 324 355 001(c1) 101 : SM0,SM1,LOCK,LONG,FL,PROT,X86_64 */ + {I_XADD, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+55957, 27, 1272}, +}; + +static const struct itemplate instrux_XCHG[15] = { + /* 0 : XCHG reg_ax,reg16 [-r: o16 90+r ] 8086 */ + /* 320 011 220 : 8086 */ + {I_XCHG, 2, {REG_AX,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+72712, 23, 1274}, + /* 1 : XCHG reg_rax,reg64 [-r: o64 90+r ] ZU,LONG,PROT,X86_64 */ + /* 324 011 220 : ZU,LONG,PROT,X86_64 */ + {I_XCHG, 2, {REG_RAX,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+72716, 178, 1275}, + /* 2 : XCHG reg16,reg_ax [r-: o16 90+r ] ND,8086 */ + /* 320 010 220 : 8086 */ + {I_XCHG, 2, {REG_GPR|BITS16,REG_AX,0,0,0}, NO_DECORATOR, nasm_bytecodes+72720, 23, 1276}, + /* 3 : XCHG reg64,reg_rax [r-: o64 90+r ] ND,LONG,PROT,X86_64 */ + /* 324 010 220 : LONG,PROT,X86_64 */ + {I_XCHG, 2, {REG_GPR|BITS64,REG_RAX,0,0,0}, NO_DECORATOR, nasm_bytecodes+72724, 24, 1277}, + /* 4 : XCHG reg_eax,reg32na [-r: o32 90+r ] ZU,386 */ + /* 321 011 220 : ZU,386 */ + {I_XCHG, 2, {REG_EAX,REG_NA|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+72728, 179, 1279}, + /* 5 : XCHG reg32na,reg_eax [r-: o32 90+r ] ND,386 */ + /* 321 010 220 : 386 */ + {I_XCHG, 2, {REG_NA|BITS32,REG_EAX,0,0,0}, NO_DECORATOR, nasm_bytecodes+72732, 3, 1280}, + /* 6 : XCHG reg_eax,reg_eax [--: o32 90 ] ND,NOREX,NOAPX,ZU,NOLONG,386 */ + /* 321 001(90) : NOREX,NOAPX,ZU,NOLONG,386 */ + {I_XCHG, 2, {REG_EAX|RN_L16,REG_EAX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+72736, 180, 1281}, + /* 7 : XCHG reg8,rm8 [rm: hlenl o8 86 /r ] SM0-1,LOCK1,8086 */ + /* 272 001(86) 110 : SM0,SM1,LOCK1,8086 */ + {I_XCHG, 2, {REG_GPR|BITS8,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+71659, 181, 1282}, + /* 8 : XCHG reg16,rm16 [rm: hlenl o16 87 /r ] SM0-1,LOCK1,8086 */ + /* 272 320 001(87) 110 : SM0,SM1,LOCK1,8086 */ + {I_XCHG, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+67023, 181, 1283}, + /* 9 : XCHG reg32,rm32 [rm: hlenl o32 87 /r ] SM0-1,LOCK1,386 */ + /* 272 321 001(87) 110 : SM0,SM1,LOCK1,386 */ + {I_XCHG, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+67029, 182, 1284}, + /* 10 : XCHG reg64,rm64 [rm: hlenl o64 87 /r ] SM0-1,LOCK1,LONG,PROT,X86_64 */ + /* 272 324 001(87) 110 : SM0,SM1,LOCK1,LONG,PROT,X86_64 */ + {I_XCHG, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+67035, 183, 1285}, + /* 11 : XCHG rm8,reg8 [mr: hlenl o8 86 /r ] SM0,ND,SM1,LOCK,8086 */ + /* 272 001(86) 101 : SM0,SM1,LOCK,8086 */ + {I_XCHG, 2, {RM_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+71664, 184, 1286}, + /* 12 : XCHG rm16,reg16 [mr: hlenl o16 87 /r ] SM0,ND,SM1,LOCK,8086 */ + /* 272 320 001(87) 101 : SM0,SM1,LOCK,8086 */ + {I_XCHG, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+67041, 184, 1287}, + /* 13 : XCHG rm32,reg32 [mr: hlenl o32 87 /r ] SM0,ND,SM1,LOCK,386 */ + /* 272 321 001(87) 101 : SM0,SM1,LOCK,386 */ + {I_XCHG, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+67047, 185, 1288}, + /* 14 : XCHG rm64,reg64 [mr: hlenl o64 87 /r ] SM0,ND,SM1,LOCK,LONG,PROT,X86_64 */ + /* 272 324 001(87) 101 : SM0,SM1,LOCK,LONG,PROT,X86_64 */ + {I_XCHG, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+67053, 186, 1289}, +}; + +static const struct itemplate instrux_CMPXCHG486[3] = { + /* 0 : CMPXCHG486 rm8,reg8 [mr: o8 0f a6 /r ] SM0,ND,SM1,NOREX,NOAPX,LOCK,NOLONG,FL,UNDOC,OBSOLETE,486 */ + /* 355 001(a6) 101 : SM0,SM1,NOREX,NOAPX,LOCK,NOLONG,FL,UNDOC,OBSOLETE,486 */ + {I_CMPXCHG486, 2, {RM_GPR|BITS8|RN_L16,REG_GPR|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66910, 187, 1292}, + /* 1 : CMPXCHG486 rm16,reg16 [mr: o16 0f a7 /r ] SM0,ND,SM1,NOREX,NOAPX,LOCK,NOLONG,FL,UNDOC,OBSOLETE,486 */ + /* 320 355 001(a7) 101 : SM0,SM1,NOREX,NOAPX,LOCK,NOLONG,FL,UNDOC,OBSOLETE,486 */ + {I_CMPXCHG486, 2, {RM_GPR|BITS16|RN_L16,REG_GPR|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66891, 187, 1293}, + /* 2 : CMPXCHG486 rm32,reg32 [mr: o32 0f a7 /r ] SM0,ND,SM1,NOREX,NOAPX,LOCK,NOLONG,FL,UNDOC,OBSOLETE,486 */ + /* 321 355 001(a7) 101 : SM0,SM1,NOREX,NOAPX,LOCK,NOLONG,FL,UNDOC,OBSOLETE,486 */ + {I_CMPXCHG486, 2, {RM_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66897, 187, 1294}, +}; + +static const struct itemplate instrux_JMPABS[2] = { + /* 0 : JMPABS imm64|near [i: a64 np rex2 a1 iq ] LONG,PROT,APX,X86_64 */ + /* 313 360 350 001(a1) 054 : LONG,REX2,PROT,APX,X86_64 */ + {I_JMPABS, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+55964, 188, 1298}, + /* 1 : JMPABS imm64|abs|near [i: a64 np rex2 a1 iq ] ND,LONG,PROT,APX,X86_64 */ + /* 313 360 350 001(a1) 054 : LONG,REX2,PROT,APX,X86_64 */ + {I_JMPABS, 1, {IMM_NORMAL|BITS64|ABS|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+55964, 188, 1300}, +}; + +static const struct itemplate instrux_JMP[31] = { + /* 0 : JMP imm64|abs|near [i: a64 np rex2 a1 iq ] ND,LONG,PROT,APX,X86_64 */ + /* 313 360 350 001(a1) 054 : LONG,REX2,PROT,APX,X86_64 */ + {I_JMP, 1, {IMM_NORMAL|BITS64|ABS|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+55964, 188, 1299}, + /* 1 : JMP imm16|short [i: nw o16 eb rel8 ] ND,AR0,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + /* 327 320 001(eb) 050 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + {I_JMP, 1, {IMM_NORMAL|BITS16|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+55972, 189, 1303}, + /* 2 : JMP imm32|short [i: nw o32 eb rel8 ] ND,AR0,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + /* 327 321 001(eb) 050 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + {I_JMP, 1, {IMM_NORMAL|BITS32|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+55979, 189, 1304}, + /* 3 : JMP imm64|short [i: nw o64 eb rel8 ] ND,AR0,OSIZE,NOAPX,LONG,PROT,X86_64 */ + /* 327 324 001(eb) 050 : AR0,NWSIZE,OSIZE,NOAPX,LONG,PROT,X86_64 */ + {I_JMP, 1, {IMM_NORMAL|BITS64|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+55986, 190, 1305}, + /* 4 : JMP imm16|near [i: jmp8 nw o16 eb rel8 ] AR0,OSIZE,JMP_RELAX,NOREX,NOAPX,NOLONG,8086 */ + /* 371 327 320 001(eb) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,NOREX,NOAPX,NOLONG,8086 */ + {I_JMP, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+55971, 191, 1306}, + /* 5 : JMP imm32|near [i: jmp8 nw o32 eb rel8 ] AR0,OSIZE,JMP_RELAX,NOREX,NOAPX,NOLONG,8086 */ + /* 371 327 321 001(eb) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,NOREX,NOAPX,NOLONG,8086 */ + {I_JMP, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+55978, 191, 1307}, + /* 6 : JMP imm64|near [i: jmp8 nw o64 eb rel8 ] AR0,OSIZE,JMP_RELAX,NOAPX,LONG,PROT,X86_64 */ + /* 371 327 324 001(eb) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,NOAPX,LONG,PROT,X86_64 */ + {I_JMP, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+55985, 192, 1308}, + /* 7 : JMP imm32|near [i: jmp8 nw o64 eb rel8 ] ND,AR0,SX,JMP_RELAX,NOAPX,LONG,PROT,X86_64 */ + /* 371 327 324 001(eb) 050 : AR0,NWSIZE,SX,JMP_RELAX,NOAPX,LONG,PROT,X86_64 */ + {I_JMP, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+55985, 193, 1309}, + /* 8 : JMP imm16|near [i: nw o16 e9 rel ] AR0,OSIZE,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 320 001(e9) 064 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JMP, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67059, 194, 1310}, + /* 9 : JMP imm32|near [i: nw o32 e9 rel ] AR0,OSIZE,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 321 001(e9) 064 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JMP, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67065, 194, 1311}, + /* 10 : JMP imm64|near [i: nw o64 e9 rel ] AR0,OSIZE,LONG,BND,PROT,X86_64 */ + /* 327 324 001(e9) 064 : AR0,NWSIZE,OSIZE,LONG,BND,PROT,X86_64 */ + {I_JMP, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67071, 195, 1312}, + /* 11 : JMP imm32|near [i: nw o64 e9 rel ] ND,AR0,SX,LONG,BND,PROT,X86_64 */ + /* 327 324 001(e9) 064 : AR0,NWSIZE,SX,LONG,BND,PROT,X86_64 */ + {I_JMP, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67071, 196, 1313}, + /* 12 : JMP rm16|near [m: nw o16 ff /4 ] AR0,OSIZE,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 320 001(ff) 204 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JMP, 1, {RM_GPR|BITS16|RN_L16|NEAR|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67077, 194, 1314}, + /* 13 : JMP rm32|near [m: nw o32 ff /4 ] AR0,OSIZE,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 321 001(ff) 204 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JMP, 1, {RM_GPR|BITS32|RN_L16|NEAR|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67083, 197, 1315}, + /* 14 : JMP rm64|near [m: nw o64 ff /4 ] AR0,OSIZE,LONG,BND,PROT,X86_64 */ + /* 327 324 001(ff) 204 : AR0,NWSIZE,OSIZE,LONG,BND,PROT,X86_64 */ + {I_JMP, 1, {RM_GPR|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67089, 195, 1316}, + /* 15 : JMP imm16|far [i: o16 ea iwd seg ] ND,AR0,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + /* 320 001(ea) 034 074 : AR0,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + {I_JMP, 1, {IMM_NORMAL|BITS16|FAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67095, 198, 1318}, + /* 16 : JMP imm32|far [i: o32 ea iwd seg ] ND,AR0,OSIZE,NOREX,NOAPX,NOLONG,386 */ + /* 321 001(ea) 034 074 : AR0,OSIZE,NOREX,NOAPX,NOLONG,386 */ + {I_JMP, 1, {IMM_NORMAL|BITS32|FAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67101, 199, 1319}, + /* 17 : JMP imm16:imm16 [ji: o16 ea iw iw ] SM0,ND,SM1,AR0,SX,NOREX,NOAPX,NOLONG,8086 */ + /* 320 001(ea) 031 030 : SM0,SM1,AR0,SX,NOREX,NOAPX,NOLONG,8086 */ + {I_JMP, 2, {IMM_NORMAL|BITS16|COLON,IMM_NORMAL|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+67107, 200, 1321}, + /* 18 : JMP imm32:imm32 [ji: o32 ea id iw ] SM0,ND,SM1,AR0,SX,NOREX,NOAPX,NOLONG,386 */ + /* 321 001(ea) 041 030 : SM0,SM1,AR0,SX,NOREX,NOAPX,NOLONG,386 */ + {I_JMP, 2, {IMM_NORMAL|BITS32|COLON,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+67113, 201, 1322}, + /* 19 : JMP imm16:imm16|far [ji: o16 ea iw iw ] SM0,ND,SM1,AR0,SX,NOREX,NOAPX,NOLONG,8086 */ + /* 320 001(ea) 031 030 : SM0,SM1,AR0,SX,NOREX,NOAPX,NOLONG,8086 */ + {I_JMP, 2, {IMM_NORMAL|BITS16|COLON,IMM_NORMAL|BITS16|FAR,0,0,0}, NO_DECORATOR, nasm_bytecodes+67107, 200, 1323}, + /* 20 : JMP imm32:imm32|far [ji: o32 ea id iw ] SM0,ND,SM1,AR0,SX,NOREX,NOAPX,NOLONG,386 */ + /* 321 001(ea) 041 030 : SM0,SM1,AR0,SX,NOREX,NOAPX,NOLONG,386 */ + {I_JMP, 2, {IMM_NORMAL|BITS32|COLON,IMM_NORMAL|BITS32|FAR,0,0,0}, NO_DECORATOR, nasm_bytecodes+67113, 201, 1324}, + /* 21 : JMP imm16:imm16 [ji: o16 ea iw iw ] AR1,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + /* 320 001(ea) 031 030 : AR1,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + {I_JMP, 2, {IMM_NORMAL|BITS16|COLON,IMM_NORMAL|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+67107, 202, 1326}, + /* 22 : JMP imm16:imm32 [ji: o32 ea id iw ] AR1,OSIZE,NOREX,NOAPX,NOLONG,386 */ + /* 321 001(ea) 041 030 : AR1,OSIZE,NOREX,NOAPX,NOLONG,386 */ + {I_JMP, 2, {IMM_NORMAL|BITS16|COLON,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+67113, 203, 1327}, + /* 23 : JMP imm16:imm16|far [ji: o16 ea iw iw ] ND,AR1,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + /* 320 001(ea) 031 030 : AR1,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + {I_JMP, 2, {IMM_NORMAL|BITS16|COLON,IMM_NORMAL|BITS16|FAR,0,0,0}, NO_DECORATOR, nasm_bytecodes+67107, 202, 1328}, + /* 24 : JMP imm16:imm32|far [ji: o32 ea id iw ] ND,AR1,OSIZE,NOREX,NOAPX,NOLONG,386 */ + /* 321 001(ea) 041 030 : AR1,OSIZE,NOREX,NOAPX,NOLONG,386 */ + {I_JMP, 2, {IMM_NORMAL|BITS16|COLON,IMM_NORMAL|BITS32|FAR,0,0,0}, NO_DECORATOR, nasm_bytecodes+67113, 203, 1329}, + /* 25 : JMP mem16|far [m: o16 ff /5 ] AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + /* 320 001(ff) 205 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + {I_JMP, 1, {MEMORY|BITS16|RN_L16|FAR|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71669, 189, 1332}, + /* 26 : JMP mem32|far [m: o32 ff /5 ] AR0,NWSIZE,OSIZE,386 */ + /* 321 001(ff) 205 : AR0,NWSIZE,OSIZE,386 */ + {I_JMP, 1, {MEMORY|BITS32|FAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71674, 204, 1333}, + /* 27 : JMP mem64|far [m: o64 ff /5 ] AR0,NWSIZE,OSIZE,LONG,386,X86_64 */ + /* 324 001(ff) 205 : AR0,NWSIZE,OSIZE,LONG,PROT,X86_64 */ + {I_JMP, 1, {MEMORY|BITS64|FAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71679, 205, 1334}, + /* 28 : JMP rm16 [m: nw o16 ff /4 ] AR0,OSIZE,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 320 001(ff) 204 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JMP, 1, {RM_GPR|BITS16|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67077, 194, 1337}, + /* 29 : JMP rm32 [m: nw o32 ff /4 ] AR0,OSIZE,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 321 001(ff) 204 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JMP, 1, {RM_GPR|BITS32|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67083, 197, 1338}, + /* 30 : JMP rm64 [m: nw o64 ff /4 ] AR0,OSIZE,LONG,BND,PROT,X86_64 */ + /* 327 324 001(ff) 204 : AR0,NWSIZE,OSIZE,LONG,BND,PROT,X86_64 */ + {I_JMP, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67089, 195, 1339}, +}; + +static const struct itemplate instrux_JA[12] = { + /* 0 : JA imm16|short [i: nw o16 77 rel8 ] ND,AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 320 001(77) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JA, 1, {IMM_NORMAL|BITS16|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+55993, 206, 1341}, + /* 1 : JA imm32|short [i: nw o32 77 rel8 ] ND,AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 321 001(77) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JA, 1, {IMM_NORMAL|BITS32|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56105, 206, 1342}, + /* 2 : JA imm64|short [i: nw o64 77 rel8 ] ND,AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 001(77) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JA, 1, {IMM_NORMAL|BITS64|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56217, 207, 1343}, + /* 3 : JA imm16|near [i: jcc8 nw o16 77 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 370 327 320 001(77) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JA, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+55992, 208, 1344}, + /* 4 : JA imm32|near [i: jcc8 nw o32 77 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 370 327 321 001(77) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JA, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56104, 208, 1345}, + /* 5 : JA imm64|near [i: jcc8 nw o64 77 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 370 327 324 001(77) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JA, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56216, 209, 1346}, + /* 6 : JA imm32|near [i: jcc8 nw o64 77 rel8 ] ND,AR0,SX,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 370 327 324 001(77) 050 : AR0,NWSIZE,SX,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JA, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56216, 210, 1347}, + /* 7 : JA imm16|near [i: nw o16 0f 87 rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 320 355 001(87) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JA, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56328, 211, 1348}, + /* 8 : JA imm32|near [i: nw o32 0f 87 rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 321 355 001(87) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JA, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56440, 211, 1349}, + /* 9 : JA imm64|near [i: nw o64 0f 87 rel ] AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 355 001(87) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JA, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56552, 207, 1350}, + /* 10 : JA imm32|near [i: nw o64 0f 87 rel ] ND,AR0,SX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 355 001(87) 064 : AR0,NWSIZE,SX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JA, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56552, 212, 1351}, + /* 11 : JA imm [i: 76 jlen e9 rel ] ND,AR0,OSIZE,NOAPX,8086 */ + /* 001(76) 373 001(e9) 064 : AR0,OSIZE,NOAPX,8086 */ + {I_JA, 1, {IMM_NORMAL,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56664, 213, 1354}, +}; + +static const struct itemplate instrux_JAE[12] = { + /* 0 : JAE imm16|short [i: nw o16 73 rel8 ] ND,AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 320 001(73) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JAE, 1, {IMM_NORMAL|BITS16|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56000, 206, 1341}, + /* 1 : JAE imm32|short [i: nw o32 73 rel8 ] ND,AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 321 001(73) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JAE, 1, {IMM_NORMAL|BITS32|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56112, 206, 1342}, + /* 2 : JAE imm64|short [i: nw o64 73 rel8 ] ND,AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 001(73) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JAE, 1, {IMM_NORMAL|BITS64|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56224, 207, 1343}, + /* 3 : JAE imm16|near [i: jcc8 nw o16 73 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086,ND */ + /* 370 327 320 001(73) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JAE, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+55999, 208, 1344}, + /* 4 : JAE imm32|near [i: jcc8 nw o32 73 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086,ND */ + /* 370 327 321 001(73) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JAE, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56111, 208, 1345}, + /* 5 : JAE imm64|near [i: jcc8 nw o64 73 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64,ND */ + /* 370 327 324 001(73) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JAE, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56223, 209, 1346}, + /* 6 : JAE imm32|near [i: jcc8 nw o64 73 rel8 ] ND,AR0,SX,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 370 327 324 001(73) 050 : AR0,NWSIZE,SX,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JAE, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56223, 210, 1347}, + /* 7 : JAE imm16|near [i: nw o16 0f 83 rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386,ND */ + /* 327 320 355 001(83) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JAE, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56335, 211, 1348}, + /* 8 : JAE imm32|near [i: nw o32 0f 83 rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386,ND */ + /* 327 321 355 001(83) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JAE, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56447, 211, 1349}, + /* 9 : JAE imm64|near [i: nw o64 0f 83 rel ] AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64,ND */ + /* 327 324 355 001(83) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JAE, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56559, 207, 1350}, + /* 10 : JAE imm32|near [i: nw o64 0f 83 rel ] ND,AR0,SX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 355 001(83) 064 : AR0,NWSIZE,SX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JAE, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56559, 212, 1351}, + /* 11 : JAE imm [i: 72 jlen e9 rel ] ND,AR0,OSIZE,NOAPX,8086 */ + /* 001(72) 373 001(e9) 064 : AR0,OSIZE,NOAPX,8086 */ + {I_JAE, 1, {IMM_NORMAL,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56671, 213, 1354}, +}; + +static const struct itemplate instrux_JB[12] = { + /* 0 : JB imm16|short [i: nw o16 72 rel8 ] ND,AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 320 001(72) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JB, 1, {IMM_NORMAL|BITS16|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56007, 206, 1341}, + /* 1 : JB imm32|short [i: nw o32 72 rel8 ] ND,AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 321 001(72) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JB, 1, {IMM_NORMAL|BITS32|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56119, 206, 1342}, + /* 2 : JB imm64|short [i: nw o64 72 rel8 ] ND,AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 001(72) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JB, 1, {IMM_NORMAL|BITS64|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56231, 207, 1343}, + /* 3 : JB imm16|near [i: jcc8 nw o16 72 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086,ND */ + /* 370 327 320 001(72) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JB, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56006, 208, 1344}, + /* 4 : JB imm32|near [i: jcc8 nw o32 72 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086,ND */ + /* 370 327 321 001(72) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JB, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56118, 208, 1345}, + /* 5 : JB imm64|near [i: jcc8 nw o64 72 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64,ND */ + /* 370 327 324 001(72) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JB, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56230, 209, 1346}, + /* 6 : JB imm32|near [i: jcc8 nw o64 72 rel8 ] ND,AR0,SX,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 370 327 324 001(72) 050 : AR0,NWSIZE,SX,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JB, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56230, 210, 1347}, + /* 7 : JB imm16|near [i: nw o16 0f 82 rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386,ND */ + /* 327 320 355 001(82) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JB, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56342, 211, 1348}, + /* 8 : JB imm32|near [i: nw o32 0f 82 rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386,ND */ + /* 327 321 355 001(82) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JB, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56454, 211, 1349}, + /* 9 : JB imm64|near [i: nw o64 0f 82 rel ] AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64,ND */ + /* 327 324 355 001(82) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JB, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56566, 207, 1350}, + /* 10 : JB imm32|near [i: nw o64 0f 82 rel ] ND,AR0,SX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 355 001(82) 064 : AR0,NWSIZE,SX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JB, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56566, 212, 1351}, + /* 11 : JB imm [i: 73 jlen e9 rel ] ND,AR0,OSIZE,NOAPX,8086 */ + /* 001(73) 373 001(e9) 064 : AR0,OSIZE,NOAPX,8086 */ + {I_JB, 1, {IMM_NORMAL,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56678, 213, 1354}, +}; + +static const struct itemplate instrux_JBE[12] = { + /* 0 : JBE imm16|short [i: nw o16 76 rel8 ] ND,AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 320 001(76) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JBE, 1, {IMM_NORMAL|BITS16|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56014, 206, 1341}, + /* 1 : JBE imm32|short [i: nw o32 76 rel8 ] ND,AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 321 001(76) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JBE, 1, {IMM_NORMAL|BITS32|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56126, 206, 1342}, + /* 2 : JBE imm64|short [i: nw o64 76 rel8 ] ND,AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 001(76) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JBE, 1, {IMM_NORMAL|BITS64|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56238, 207, 1343}, + /* 3 : JBE imm16|near [i: jcc8 nw o16 76 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086,ND */ + /* 370 327 320 001(76) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JBE, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56013, 208, 1344}, + /* 4 : JBE imm32|near [i: jcc8 nw o32 76 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086,ND */ + /* 370 327 321 001(76) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JBE, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56125, 208, 1345}, + /* 5 : JBE imm64|near [i: jcc8 nw o64 76 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64,ND */ + /* 370 327 324 001(76) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JBE, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56237, 209, 1346}, + /* 6 : JBE imm32|near [i: jcc8 nw o64 76 rel8 ] ND,AR0,SX,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 370 327 324 001(76) 050 : AR0,NWSIZE,SX,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JBE, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56237, 210, 1347}, + /* 7 : JBE imm16|near [i: nw o16 0f 86 rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386,ND */ + /* 327 320 355 001(86) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JBE, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56349, 211, 1348}, + /* 8 : JBE imm32|near [i: nw o32 0f 86 rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386,ND */ + /* 327 321 355 001(86) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JBE, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56461, 211, 1349}, + /* 9 : JBE imm64|near [i: nw o64 0f 86 rel ] AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64,ND */ + /* 327 324 355 001(86) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JBE, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56573, 207, 1350}, + /* 10 : JBE imm32|near [i: nw o64 0f 86 rel ] ND,AR0,SX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 355 001(86) 064 : AR0,NWSIZE,SX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JBE, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56573, 212, 1351}, + /* 11 : JBE imm [i: 77 jlen e9 rel ] ND,AR0,OSIZE,NOAPX,8086 */ + /* 001(77) 373 001(e9) 064 : AR0,OSIZE,NOAPX,8086 */ + {I_JBE, 1, {IMM_NORMAL,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56685, 213, 1354}, +}; + +static const struct itemplate instrux_JC[12] = { + /* 0 : JC imm16|short [i: nw o16 72 rel8 ] ND,AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 320 001(72) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JC, 1, {IMM_NORMAL|BITS16|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56007, 206, 1341}, + /* 1 : JC imm32|short [i: nw o32 72 rel8 ] ND,AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 321 001(72) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JC, 1, {IMM_NORMAL|BITS32|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56119, 206, 1342}, + /* 2 : JC imm64|short [i: nw o64 72 rel8 ] ND,AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 001(72) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JC, 1, {IMM_NORMAL|BITS64|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56231, 207, 1343}, + /* 3 : JC imm16|near [i: jcc8 nw o16 72 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 370 327 320 001(72) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JC, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56006, 208, 1344}, + /* 4 : JC imm32|near [i: jcc8 nw o32 72 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 370 327 321 001(72) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JC, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56118, 208, 1345}, + /* 5 : JC imm64|near [i: jcc8 nw o64 72 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 370 327 324 001(72) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JC, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56230, 209, 1346}, + /* 6 : JC imm32|near [i: jcc8 nw o64 72 rel8 ] ND,AR0,SX,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 370 327 324 001(72) 050 : AR0,NWSIZE,SX,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JC, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56230, 210, 1347}, + /* 7 : JC imm16|near [i: nw o16 0f 82 rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 320 355 001(82) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JC, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56342, 211, 1348}, + /* 8 : JC imm32|near [i: nw o32 0f 82 rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 321 355 001(82) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JC, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56454, 211, 1349}, + /* 9 : JC imm64|near [i: nw o64 0f 82 rel ] AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 355 001(82) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JC, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56566, 207, 1350}, + /* 10 : JC imm32|near [i: nw o64 0f 82 rel ] ND,AR0,SX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 355 001(82) 064 : AR0,NWSIZE,SX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JC, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56566, 212, 1351}, + /* 11 : JC imm [i: 73 jlen e9 rel ] ND,AR0,OSIZE,NOAPX,8086 */ + /* 001(73) 373 001(e9) 064 : AR0,OSIZE,NOAPX,8086 */ + {I_JC, 1, {IMM_NORMAL,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56678, 213, 1354}, +}; + +static const struct itemplate instrux_JE[12] = { + /* 0 : JE imm16|short [i: nw o16 74 rel8 ] ND,AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 320 001(74) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JE, 1, {IMM_NORMAL|BITS16|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56021, 206, 1341}, + /* 1 : JE imm32|short [i: nw o32 74 rel8 ] ND,AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 321 001(74) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JE, 1, {IMM_NORMAL|BITS32|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56133, 206, 1342}, + /* 2 : JE imm64|short [i: nw o64 74 rel8 ] ND,AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 001(74) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JE, 1, {IMM_NORMAL|BITS64|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56245, 207, 1343}, + /* 3 : JE imm16|near [i: jcc8 nw o16 74 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086,ND */ + /* 370 327 320 001(74) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JE, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56020, 208, 1344}, + /* 4 : JE imm32|near [i: jcc8 nw o32 74 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086,ND */ + /* 370 327 321 001(74) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JE, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56132, 208, 1345}, + /* 5 : JE imm64|near [i: jcc8 nw o64 74 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64,ND */ + /* 370 327 324 001(74) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JE, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56244, 209, 1346}, + /* 6 : JE imm32|near [i: jcc8 nw o64 74 rel8 ] ND,AR0,SX,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 370 327 324 001(74) 050 : AR0,NWSIZE,SX,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JE, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56244, 210, 1347}, + /* 7 : JE imm16|near [i: nw o16 0f 84 rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386,ND */ + /* 327 320 355 001(84) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JE, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56356, 211, 1348}, + /* 8 : JE imm32|near [i: nw o32 0f 84 rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386,ND */ + /* 327 321 355 001(84) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JE, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56468, 211, 1349}, + /* 9 : JE imm64|near [i: nw o64 0f 84 rel ] AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64,ND */ + /* 327 324 355 001(84) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JE, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56580, 207, 1350}, + /* 10 : JE imm32|near [i: nw o64 0f 84 rel ] ND,AR0,SX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 355 001(84) 064 : AR0,NWSIZE,SX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JE, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56580, 212, 1351}, + /* 11 : JE imm [i: 75 jlen e9 rel ] ND,AR0,OSIZE,NOAPX,8086 */ + /* 001(75) 373 001(e9) 064 : AR0,OSIZE,NOAPX,8086 */ + {I_JE, 1, {IMM_NORMAL,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56692, 213, 1354}, +}; + +static const struct itemplate instrux_JG[12] = { + /* 0 : JG imm16|short [i: nw o16 7f rel8 ] ND,AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 320 001(7f) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JG, 1, {IMM_NORMAL|BITS16|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56028, 206, 1341}, + /* 1 : JG imm32|short [i: nw o32 7f rel8 ] ND,AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 321 001(7f) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JG, 1, {IMM_NORMAL|BITS32|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56140, 206, 1342}, + /* 2 : JG imm64|short [i: nw o64 7f rel8 ] ND,AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 001(7f) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JG, 1, {IMM_NORMAL|BITS64|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56252, 207, 1343}, + /* 3 : JG imm16|near [i: jcc8 nw o16 7f rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 370 327 320 001(7f) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JG, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56027, 208, 1344}, + /* 4 : JG imm32|near [i: jcc8 nw o32 7f rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 370 327 321 001(7f) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JG, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56139, 208, 1345}, + /* 5 : JG imm64|near [i: jcc8 nw o64 7f rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 370 327 324 001(7f) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JG, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56251, 209, 1346}, + /* 6 : JG imm32|near [i: jcc8 nw o64 7f rel8 ] ND,AR0,SX,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 370 327 324 001(7f) 050 : AR0,NWSIZE,SX,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JG, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56251, 210, 1347}, + /* 7 : JG imm16|near [i: nw o16 0f 8f rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 320 355 001(8f) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JG, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56363, 211, 1348}, + /* 8 : JG imm32|near [i: nw o32 0f 8f rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 321 355 001(8f) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JG, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56475, 211, 1349}, + /* 9 : JG imm64|near [i: nw o64 0f 8f rel ] AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 355 001(8f) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JG, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56587, 207, 1350}, + /* 10 : JG imm32|near [i: nw o64 0f 8f rel ] ND,AR0,SX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 355 001(8f) 064 : AR0,NWSIZE,SX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JG, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56587, 212, 1351}, + /* 11 : JG imm [i: 7e jlen e9 rel ] ND,AR0,OSIZE,NOAPX,8086 */ + /* 001(7e) 373 001(e9) 064 : AR0,OSIZE,NOAPX,8086 */ + {I_JG, 1, {IMM_NORMAL,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56699, 213, 1354}, +}; + +static const struct itemplate instrux_JGE[12] = { + /* 0 : JGE imm16|short [i: nw o16 7d rel8 ] ND,AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 320 001(7d) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JGE, 1, {IMM_NORMAL|BITS16|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56035, 206, 1341}, + /* 1 : JGE imm32|short [i: nw o32 7d rel8 ] ND,AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 321 001(7d) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JGE, 1, {IMM_NORMAL|BITS32|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56147, 206, 1342}, + /* 2 : JGE imm64|short [i: nw o64 7d rel8 ] ND,AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 001(7d) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JGE, 1, {IMM_NORMAL|BITS64|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56259, 207, 1343}, + /* 3 : JGE imm16|near [i: jcc8 nw o16 7d rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086,ND */ + /* 370 327 320 001(7d) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JGE, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56034, 208, 1344}, + /* 4 : JGE imm32|near [i: jcc8 nw o32 7d rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086,ND */ + /* 370 327 321 001(7d) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JGE, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56146, 208, 1345}, + /* 5 : JGE imm64|near [i: jcc8 nw o64 7d rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64,ND */ + /* 370 327 324 001(7d) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JGE, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56258, 209, 1346}, + /* 6 : JGE imm32|near [i: jcc8 nw o64 7d rel8 ] ND,AR0,SX,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 370 327 324 001(7d) 050 : AR0,NWSIZE,SX,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JGE, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56258, 210, 1347}, + /* 7 : JGE imm16|near [i: nw o16 0f 8d rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386,ND */ + /* 327 320 355 001(8d) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JGE, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56370, 211, 1348}, + /* 8 : JGE imm32|near [i: nw o32 0f 8d rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386,ND */ + /* 327 321 355 001(8d) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JGE, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56482, 211, 1349}, + /* 9 : JGE imm64|near [i: nw o64 0f 8d rel ] AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64,ND */ + /* 327 324 355 001(8d) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JGE, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56594, 207, 1350}, + /* 10 : JGE imm32|near [i: nw o64 0f 8d rel ] ND,AR0,SX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 355 001(8d) 064 : AR0,NWSIZE,SX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JGE, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56594, 212, 1351}, + /* 11 : JGE imm [i: 7c jlen e9 rel ] ND,AR0,OSIZE,NOAPX,8086 */ + /* 001(7c) 373 001(e9) 064 : AR0,OSIZE,NOAPX,8086 */ + {I_JGE, 1, {IMM_NORMAL,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56706, 213, 1354}, +}; + +static const struct itemplate instrux_JL[12] = { + /* 0 : JL imm16|short [i: nw o16 7c rel8 ] ND,AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 320 001(7c) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JL, 1, {IMM_NORMAL|BITS16|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56042, 206, 1341}, + /* 1 : JL imm32|short [i: nw o32 7c rel8 ] ND,AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 321 001(7c) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JL, 1, {IMM_NORMAL|BITS32|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56154, 206, 1342}, + /* 2 : JL imm64|short [i: nw o64 7c rel8 ] ND,AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 001(7c) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JL, 1, {IMM_NORMAL|BITS64|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56266, 207, 1343}, + /* 3 : JL imm16|near [i: jcc8 nw o16 7c rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 370 327 320 001(7c) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JL, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56041, 208, 1344}, + /* 4 : JL imm32|near [i: jcc8 nw o32 7c rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 370 327 321 001(7c) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JL, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56153, 208, 1345}, + /* 5 : JL imm64|near [i: jcc8 nw o64 7c rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 370 327 324 001(7c) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JL, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56265, 209, 1346}, + /* 6 : JL imm32|near [i: jcc8 nw o64 7c rel8 ] ND,AR0,SX,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 370 327 324 001(7c) 050 : AR0,NWSIZE,SX,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JL, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56265, 210, 1347}, + /* 7 : JL imm16|near [i: nw o16 0f 8c rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 320 355 001(8c) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JL, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56377, 211, 1348}, + /* 8 : JL imm32|near [i: nw o32 0f 8c rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 321 355 001(8c) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JL, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56489, 211, 1349}, + /* 9 : JL imm64|near [i: nw o64 0f 8c rel ] AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 355 001(8c) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JL, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56601, 207, 1350}, + /* 10 : JL imm32|near [i: nw o64 0f 8c rel ] ND,AR0,SX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 355 001(8c) 064 : AR0,NWSIZE,SX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JL, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56601, 212, 1351}, + /* 11 : JL imm [i: 7d jlen e9 rel ] ND,AR0,OSIZE,NOAPX,8086 */ + /* 001(7d) 373 001(e9) 064 : AR0,OSIZE,NOAPX,8086 */ + {I_JL, 1, {IMM_NORMAL,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56713, 213, 1354}, +}; + +static const struct itemplate instrux_JLE[12] = { + /* 0 : JLE imm16|short [i: nw o16 7e rel8 ] ND,AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 320 001(7e) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JLE, 1, {IMM_NORMAL|BITS16|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56049, 206, 1341}, + /* 1 : JLE imm32|short [i: nw o32 7e rel8 ] ND,AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 321 001(7e) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JLE, 1, {IMM_NORMAL|BITS32|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56161, 206, 1342}, + /* 2 : JLE imm64|short [i: nw o64 7e rel8 ] ND,AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 001(7e) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JLE, 1, {IMM_NORMAL|BITS64|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56273, 207, 1343}, + /* 3 : JLE imm16|near [i: jcc8 nw o16 7e rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086,ND */ + /* 370 327 320 001(7e) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JLE, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56048, 208, 1344}, + /* 4 : JLE imm32|near [i: jcc8 nw o32 7e rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086,ND */ + /* 370 327 321 001(7e) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JLE, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56160, 208, 1345}, + /* 5 : JLE imm64|near [i: jcc8 nw o64 7e rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64,ND */ + /* 370 327 324 001(7e) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JLE, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56272, 209, 1346}, + /* 6 : JLE imm32|near [i: jcc8 nw o64 7e rel8 ] ND,AR0,SX,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 370 327 324 001(7e) 050 : AR0,NWSIZE,SX,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JLE, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56272, 210, 1347}, + /* 7 : JLE imm16|near [i: nw o16 0f 8e rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386,ND */ + /* 327 320 355 001(8e) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JLE, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56384, 211, 1348}, + /* 8 : JLE imm32|near [i: nw o32 0f 8e rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386,ND */ + /* 327 321 355 001(8e) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JLE, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56496, 211, 1349}, + /* 9 : JLE imm64|near [i: nw o64 0f 8e rel ] AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64,ND */ + /* 327 324 355 001(8e) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JLE, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56608, 207, 1350}, + /* 10 : JLE imm32|near [i: nw o64 0f 8e rel ] ND,AR0,SX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 355 001(8e) 064 : AR0,NWSIZE,SX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JLE, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56608, 212, 1351}, + /* 11 : JLE imm [i: 7f jlen e9 rel ] ND,AR0,OSIZE,NOAPX,8086 */ + /* 001(7f) 373 001(e9) 064 : AR0,OSIZE,NOAPX,8086 */ + {I_JLE, 1, {IMM_NORMAL,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56720, 213, 1354}, +}; + +static const struct itemplate instrux_JNA[12] = { + /* 0 : JNA imm16|short [i: nw o16 76 rel8 ] ND,AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 320 001(76) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JNA, 1, {IMM_NORMAL|BITS16|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56014, 206, 1341}, + /* 1 : JNA imm32|short [i: nw o32 76 rel8 ] ND,AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 321 001(76) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JNA, 1, {IMM_NORMAL|BITS32|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56126, 206, 1342}, + /* 2 : JNA imm64|short [i: nw o64 76 rel8 ] ND,AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 001(76) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNA, 1, {IMM_NORMAL|BITS64|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56238, 207, 1343}, + /* 3 : JNA imm16|near [i: jcc8 nw o16 76 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 370 327 320 001(76) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JNA, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56013, 208, 1344}, + /* 4 : JNA imm32|near [i: jcc8 nw o32 76 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 370 327 321 001(76) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JNA, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56125, 208, 1345}, + /* 5 : JNA imm64|near [i: jcc8 nw o64 76 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 370 327 324 001(76) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNA, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56237, 209, 1346}, + /* 6 : JNA imm32|near [i: jcc8 nw o64 76 rel8 ] ND,AR0,SX,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 370 327 324 001(76) 050 : AR0,NWSIZE,SX,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNA, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56237, 210, 1347}, + /* 7 : JNA imm16|near [i: nw o16 0f 86 rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 320 355 001(86) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JNA, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56349, 211, 1348}, + /* 8 : JNA imm32|near [i: nw o32 0f 86 rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 321 355 001(86) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JNA, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56461, 211, 1349}, + /* 9 : JNA imm64|near [i: nw o64 0f 86 rel ] AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 355 001(86) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNA, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56573, 207, 1350}, + /* 10 : JNA imm32|near [i: nw o64 0f 86 rel ] ND,AR0,SX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 355 001(86) 064 : AR0,NWSIZE,SX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNA, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56573, 212, 1351}, + /* 11 : JNA imm [i: 77 jlen e9 rel ] ND,AR0,OSIZE,NOAPX,8086 */ + /* 001(77) 373 001(e9) 064 : AR0,OSIZE,NOAPX,8086 */ + {I_JNA, 1, {IMM_NORMAL,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56685, 213, 1354}, +}; + +static const struct itemplate instrux_JNAE[12] = { + /* 0 : JNAE imm16|short [i: nw o16 72 rel8 ] ND,AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 320 001(72) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JNAE, 1, {IMM_NORMAL|BITS16|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56007, 206, 1341}, + /* 1 : JNAE imm32|short [i: nw o32 72 rel8 ] ND,AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 321 001(72) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JNAE, 1, {IMM_NORMAL|BITS32|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56119, 206, 1342}, + /* 2 : JNAE imm64|short [i: nw o64 72 rel8 ] ND,AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 001(72) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNAE, 1, {IMM_NORMAL|BITS64|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56231, 207, 1343}, + /* 3 : JNAE imm16|near [i: jcc8 nw o16 72 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086,ND */ + /* 370 327 320 001(72) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JNAE, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56006, 208, 1344}, + /* 4 : JNAE imm32|near [i: jcc8 nw o32 72 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086,ND */ + /* 370 327 321 001(72) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JNAE, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56118, 208, 1345}, + /* 5 : JNAE imm64|near [i: jcc8 nw o64 72 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64,ND */ + /* 370 327 324 001(72) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNAE, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56230, 209, 1346}, + /* 6 : JNAE imm32|near [i: jcc8 nw o64 72 rel8 ] ND,AR0,SX,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 370 327 324 001(72) 050 : AR0,NWSIZE,SX,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNAE, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56230, 210, 1347}, + /* 7 : JNAE imm16|near [i: nw o16 0f 82 rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386,ND */ + /* 327 320 355 001(82) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JNAE, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56342, 211, 1348}, + /* 8 : JNAE imm32|near [i: nw o32 0f 82 rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386,ND */ + /* 327 321 355 001(82) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JNAE, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56454, 211, 1349}, + /* 9 : JNAE imm64|near [i: nw o64 0f 82 rel ] AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64,ND */ + /* 327 324 355 001(82) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNAE, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56566, 207, 1350}, + /* 10 : JNAE imm32|near [i: nw o64 0f 82 rel ] ND,AR0,SX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 355 001(82) 064 : AR0,NWSIZE,SX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNAE, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56566, 212, 1351}, + /* 11 : JNAE imm [i: 73 jlen e9 rel ] ND,AR0,OSIZE,NOAPX,8086 */ + /* 001(73) 373 001(e9) 064 : AR0,OSIZE,NOAPX,8086 */ + {I_JNAE, 1, {IMM_NORMAL,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56678, 213, 1354}, +}; + +static const struct itemplate instrux_JNB[12] = { + /* 0 : JNB imm16|short [i: nw o16 73 rel8 ] ND,AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 320 001(73) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JNB, 1, {IMM_NORMAL|BITS16|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56000, 206, 1341}, + /* 1 : JNB imm32|short [i: nw o32 73 rel8 ] ND,AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 321 001(73) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JNB, 1, {IMM_NORMAL|BITS32|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56112, 206, 1342}, + /* 2 : JNB imm64|short [i: nw o64 73 rel8 ] ND,AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 001(73) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNB, 1, {IMM_NORMAL|BITS64|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56224, 207, 1343}, + /* 3 : JNB imm16|near [i: jcc8 nw o16 73 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086,ND */ + /* 370 327 320 001(73) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JNB, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+55999, 208, 1344}, + /* 4 : JNB imm32|near [i: jcc8 nw o32 73 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086,ND */ + /* 370 327 321 001(73) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JNB, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56111, 208, 1345}, + /* 5 : JNB imm64|near [i: jcc8 nw o64 73 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64,ND */ + /* 370 327 324 001(73) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNB, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56223, 209, 1346}, + /* 6 : JNB imm32|near [i: jcc8 nw o64 73 rel8 ] ND,AR0,SX,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 370 327 324 001(73) 050 : AR0,NWSIZE,SX,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNB, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56223, 210, 1347}, + /* 7 : JNB imm16|near [i: nw o16 0f 83 rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386,ND */ + /* 327 320 355 001(83) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JNB, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56335, 211, 1348}, + /* 8 : JNB imm32|near [i: nw o32 0f 83 rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386,ND */ + /* 327 321 355 001(83) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JNB, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56447, 211, 1349}, + /* 9 : JNB imm64|near [i: nw o64 0f 83 rel ] AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64,ND */ + /* 327 324 355 001(83) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNB, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56559, 207, 1350}, + /* 10 : JNB imm32|near [i: nw o64 0f 83 rel ] ND,AR0,SX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 355 001(83) 064 : AR0,NWSIZE,SX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNB, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56559, 212, 1351}, + /* 11 : JNB imm [i: 72 jlen e9 rel ] ND,AR0,OSIZE,NOAPX,8086 */ + /* 001(72) 373 001(e9) 064 : AR0,OSIZE,NOAPX,8086 */ + {I_JNB, 1, {IMM_NORMAL,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56671, 213, 1354}, +}; + +static const struct itemplate instrux_JNBE[12] = { + /* 0 : JNBE imm16|short [i: nw o16 77 rel8 ] ND,AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 320 001(77) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JNBE, 1, {IMM_NORMAL|BITS16|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+55993, 206, 1341}, + /* 1 : JNBE imm32|short [i: nw o32 77 rel8 ] ND,AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 321 001(77) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JNBE, 1, {IMM_NORMAL|BITS32|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56105, 206, 1342}, + /* 2 : JNBE imm64|short [i: nw o64 77 rel8 ] ND,AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 001(77) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNBE, 1, {IMM_NORMAL|BITS64|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56217, 207, 1343}, + /* 3 : JNBE imm16|near [i: jcc8 nw o16 77 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086,ND */ + /* 370 327 320 001(77) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JNBE, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+55992, 208, 1344}, + /* 4 : JNBE imm32|near [i: jcc8 nw o32 77 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086,ND */ + /* 370 327 321 001(77) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JNBE, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56104, 208, 1345}, + /* 5 : JNBE imm64|near [i: jcc8 nw o64 77 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64,ND */ + /* 370 327 324 001(77) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNBE, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56216, 209, 1346}, + /* 6 : JNBE imm32|near [i: jcc8 nw o64 77 rel8 ] ND,AR0,SX,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 370 327 324 001(77) 050 : AR0,NWSIZE,SX,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNBE, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56216, 210, 1347}, + /* 7 : JNBE imm16|near [i: nw o16 0f 87 rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386,ND */ + /* 327 320 355 001(87) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JNBE, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56328, 211, 1348}, + /* 8 : JNBE imm32|near [i: nw o32 0f 87 rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386,ND */ + /* 327 321 355 001(87) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JNBE, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56440, 211, 1349}, + /* 9 : JNBE imm64|near [i: nw o64 0f 87 rel ] AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64,ND */ + /* 327 324 355 001(87) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNBE, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56552, 207, 1350}, + /* 10 : JNBE imm32|near [i: nw o64 0f 87 rel ] ND,AR0,SX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 355 001(87) 064 : AR0,NWSIZE,SX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNBE, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56552, 212, 1351}, + /* 11 : JNBE imm [i: 76 jlen e9 rel ] ND,AR0,OSIZE,NOAPX,8086 */ + /* 001(76) 373 001(e9) 064 : AR0,OSIZE,NOAPX,8086 */ + {I_JNBE, 1, {IMM_NORMAL,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56664, 213, 1354}, +}; + +static const struct itemplate instrux_JNC[12] = { + /* 0 : JNC imm16|short [i: nw o16 73 rel8 ] ND,AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 320 001(73) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JNC, 1, {IMM_NORMAL|BITS16|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56000, 206, 1341}, + /* 1 : JNC imm32|short [i: nw o32 73 rel8 ] ND,AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 321 001(73) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JNC, 1, {IMM_NORMAL|BITS32|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56112, 206, 1342}, + /* 2 : JNC imm64|short [i: nw o64 73 rel8 ] ND,AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 001(73) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNC, 1, {IMM_NORMAL|BITS64|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56224, 207, 1343}, + /* 3 : JNC imm16|near [i: jcc8 nw o16 73 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 370 327 320 001(73) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JNC, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+55999, 208, 1344}, + /* 4 : JNC imm32|near [i: jcc8 nw o32 73 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 370 327 321 001(73) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JNC, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56111, 208, 1345}, + /* 5 : JNC imm64|near [i: jcc8 nw o64 73 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 370 327 324 001(73) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNC, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56223, 209, 1346}, + /* 6 : JNC imm32|near [i: jcc8 nw o64 73 rel8 ] ND,AR0,SX,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 370 327 324 001(73) 050 : AR0,NWSIZE,SX,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNC, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56223, 210, 1347}, + /* 7 : JNC imm16|near [i: nw o16 0f 83 rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 320 355 001(83) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JNC, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56335, 211, 1348}, + /* 8 : JNC imm32|near [i: nw o32 0f 83 rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 321 355 001(83) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JNC, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56447, 211, 1349}, + /* 9 : JNC imm64|near [i: nw o64 0f 83 rel ] AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 355 001(83) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNC, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56559, 207, 1350}, + /* 10 : JNC imm32|near [i: nw o64 0f 83 rel ] ND,AR0,SX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 355 001(83) 064 : AR0,NWSIZE,SX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNC, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56559, 212, 1351}, + /* 11 : JNC imm [i: 72 jlen e9 rel ] ND,AR0,OSIZE,NOAPX,8086 */ + /* 001(72) 373 001(e9) 064 : AR0,OSIZE,NOAPX,8086 */ + {I_JNC, 1, {IMM_NORMAL,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56671, 213, 1354}, +}; + +static const struct itemplate instrux_JNE[12] = { + /* 0 : JNE imm16|short [i: nw o16 75 rel8 ] ND,AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 320 001(75) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JNE, 1, {IMM_NORMAL|BITS16|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56056, 206, 1341}, + /* 1 : JNE imm32|short [i: nw o32 75 rel8 ] ND,AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 321 001(75) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JNE, 1, {IMM_NORMAL|BITS32|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56168, 206, 1342}, + /* 2 : JNE imm64|short [i: nw o64 75 rel8 ] ND,AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 001(75) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNE, 1, {IMM_NORMAL|BITS64|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56280, 207, 1343}, + /* 3 : JNE imm16|near [i: jcc8 nw o16 75 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086,ND */ + /* 370 327 320 001(75) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JNE, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56055, 208, 1344}, + /* 4 : JNE imm32|near [i: jcc8 nw o32 75 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086,ND */ + /* 370 327 321 001(75) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JNE, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56167, 208, 1345}, + /* 5 : JNE imm64|near [i: jcc8 nw o64 75 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64,ND */ + /* 370 327 324 001(75) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNE, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56279, 209, 1346}, + /* 6 : JNE imm32|near [i: jcc8 nw o64 75 rel8 ] ND,AR0,SX,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 370 327 324 001(75) 050 : AR0,NWSIZE,SX,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNE, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56279, 210, 1347}, + /* 7 : JNE imm16|near [i: nw o16 0f 85 rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386,ND */ + /* 327 320 355 001(85) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JNE, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56391, 211, 1348}, + /* 8 : JNE imm32|near [i: nw o32 0f 85 rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386,ND */ + /* 327 321 355 001(85) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JNE, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56503, 211, 1349}, + /* 9 : JNE imm64|near [i: nw o64 0f 85 rel ] AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64,ND */ + /* 327 324 355 001(85) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNE, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56615, 207, 1350}, + /* 10 : JNE imm32|near [i: nw o64 0f 85 rel ] ND,AR0,SX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 355 001(85) 064 : AR0,NWSIZE,SX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNE, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56615, 212, 1351}, + /* 11 : JNE imm [i: 74 jlen e9 rel ] ND,AR0,OSIZE,NOAPX,8086 */ + /* 001(74) 373 001(e9) 064 : AR0,OSIZE,NOAPX,8086 */ + {I_JNE, 1, {IMM_NORMAL,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56727, 213, 1354}, +}; + +static const struct itemplate instrux_JNG[12] = { + /* 0 : JNG imm16|short [i: nw o16 7e rel8 ] ND,AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 320 001(7e) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JNG, 1, {IMM_NORMAL|BITS16|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56049, 206, 1341}, + /* 1 : JNG imm32|short [i: nw o32 7e rel8 ] ND,AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 321 001(7e) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JNG, 1, {IMM_NORMAL|BITS32|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56161, 206, 1342}, + /* 2 : JNG imm64|short [i: nw o64 7e rel8 ] ND,AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 001(7e) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNG, 1, {IMM_NORMAL|BITS64|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56273, 207, 1343}, + /* 3 : JNG imm16|near [i: jcc8 nw o16 7e rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 370 327 320 001(7e) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JNG, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56048, 208, 1344}, + /* 4 : JNG imm32|near [i: jcc8 nw o32 7e rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 370 327 321 001(7e) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JNG, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56160, 208, 1345}, + /* 5 : JNG imm64|near [i: jcc8 nw o64 7e rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 370 327 324 001(7e) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNG, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56272, 209, 1346}, + /* 6 : JNG imm32|near [i: jcc8 nw o64 7e rel8 ] ND,AR0,SX,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 370 327 324 001(7e) 050 : AR0,NWSIZE,SX,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNG, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56272, 210, 1347}, + /* 7 : JNG imm16|near [i: nw o16 0f 8e rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 320 355 001(8e) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JNG, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56384, 211, 1348}, + /* 8 : JNG imm32|near [i: nw o32 0f 8e rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 321 355 001(8e) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JNG, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56496, 211, 1349}, + /* 9 : JNG imm64|near [i: nw o64 0f 8e rel ] AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 355 001(8e) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNG, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56608, 207, 1350}, + /* 10 : JNG imm32|near [i: nw o64 0f 8e rel ] ND,AR0,SX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 355 001(8e) 064 : AR0,NWSIZE,SX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNG, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56608, 212, 1351}, + /* 11 : JNG imm [i: 7f jlen e9 rel ] ND,AR0,OSIZE,NOAPX,8086 */ + /* 001(7f) 373 001(e9) 064 : AR0,OSIZE,NOAPX,8086 */ + {I_JNG, 1, {IMM_NORMAL,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56720, 213, 1354}, +}; + +static const struct itemplate instrux_JNGE[12] = { + /* 0 : JNGE imm16|short [i: nw o16 7c rel8 ] ND,AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 320 001(7c) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JNGE, 1, {IMM_NORMAL|BITS16|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56042, 206, 1341}, + /* 1 : JNGE imm32|short [i: nw o32 7c rel8 ] ND,AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 321 001(7c) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JNGE, 1, {IMM_NORMAL|BITS32|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56154, 206, 1342}, + /* 2 : JNGE imm64|short [i: nw o64 7c rel8 ] ND,AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 001(7c) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNGE, 1, {IMM_NORMAL|BITS64|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56266, 207, 1343}, + /* 3 : JNGE imm16|near [i: jcc8 nw o16 7c rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086,ND */ + /* 370 327 320 001(7c) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JNGE, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56041, 208, 1344}, + /* 4 : JNGE imm32|near [i: jcc8 nw o32 7c rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086,ND */ + /* 370 327 321 001(7c) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JNGE, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56153, 208, 1345}, + /* 5 : JNGE imm64|near [i: jcc8 nw o64 7c rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64,ND */ + /* 370 327 324 001(7c) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNGE, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56265, 209, 1346}, + /* 6 : JNGE imm32|near [i: jcc8 nw o64 7c rel8 ] ND,AR0,SX,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 370 327 324 001(7c) 050 : AR0,NWSIZE,SX,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNGE, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56265, 210, 1347}, + /* 7 : JNGE imm16|near [i: nw o16 0f 8c rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386,ND */ + /* 327 320 355 001(8c) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JNGE, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56377, 211, 1348}, + /* 8 : JNGE imm32|near [i: nw o32 0f 8c rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386,ND */ + /* 327 321 355 001(8c) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JNGE, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56489, 211, 1349}, + /* 9 : JNGE imm64|near [i: nw o64 0f 8c rel ] AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64,ND */ + /* 327 324 355 001(8c) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNGE, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56601, 207, 1350}, + /* 10 : JNGE imm32|near [i: nw o64 0f 8c rel ] ND,AR0,SX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 355 001(8c) 064 : AR0,NWSIZE,SX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNGE, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56601, 212, 1351}, + /* 11 : JNGE imm [i: 7d jlen e9 rel ] ND,AR0,OSIZE,NOAPX,8086 */ + /* 001(7d) 373 001(e9) 064 : AR0,OSIZE,NOAPX,8086 */ + {I_JNGE, 1, {IMM_NORMAL,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56713, 213, 1354}, +}; + +static const struct itemplate instrux_JNL[12] = { + /* 0 : JNL imm16|short [i: nw o16 7d rel8 ] ND,AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 320 001(7d) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JNL, 1, {IMM_NORMAL|BITS16|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56035, 206, 1341}, + /* 1 : JNL imm32|short [i: nw o32 7d rel8 ] ND,AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 321 001(7d) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JNL, 1, {IMM_NORMAL|BITS32|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56147, 206, 1342}, + /* 2 : JNL imm64|short [i: nw o64 7d rel8 ] ND,AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 001(7d) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNL, 1, {IMM_NORMAL|BITS64|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56259, 207, 1343}, + /* 3 : JNL imm16|near [i: jcc8 nw o16 7d rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 370 327 320 001(7d) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JNL, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56034, 208, 1344}, + /* 4 : JNL imm32|near [i: jcc8 nw o32 7d rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 370 327 321 001(7d) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JNL, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56146, 208, 1345}, + /* 5 : JNL imm64|near [i: jcc8 nw o64 7d rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 370 327 324 001(7d) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNL, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56258, 209, 1346}, + /* 6 : JNL imm32|near [i: jcc8 nw o64 7d rel8 ] ND,AR0,SX,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 370 327 324 001(7d) 050 : AR0,NWSIZE,SX,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNL, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56258, 210, 1347}, + /* 7 : JNL imm16|near [i: nw o16 0f 8d rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 320 355 001(8d) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JNL, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56370, 211, 1348}, + /* 8 : JNL imm32|near [i: nw o32 0f 8d rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 321 355 001(8d) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JNL, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56482, 211, 1349}, + /* 9 : JNL imm64|near [i: nw o64 0f 8d rel ] AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 355 001(8d) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNL, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56594, 207, 1350}, + /* 10 : JNL imm32|near [i: nw o64 0f 8d rel ] ND,AR0,SX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 355 001(8d) 064 : AR0,NWSIZE,SX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNL, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56594, 212, 1351}, + /* 11 : JNL imm [i: 7c jlen e9 rel ] ND,AR0,OSIZE,NOAPX,8086 */ + /* 001(7c) 373 001(e9) 064 : AR0,OSIZE,NOAPX,8086 */ + {I_JNL, 1, {IMM_NORMAL,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56706, 213, 1354}, +}; + +static const struct itemplate instrux_JNLE[12] = { + /* 0 : JNLE imm16|short [i: nw o16 7f rel8 ] ND,AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 320 001(7f) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JNLE, 1, {IMM_NORMAL|BITS16|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56028, 206, 1341}, + /* 1 : JNLE imm32|short [i: nw o32 7f rel8 ] ND,AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 321 001(7f) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JNLE, 1, {IMM_NORMAL|BITS32|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56140, 206, 1342}, + /* 2 : JNLE imm64|short [i: nw o64 7f rel8 ] ND,AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 001(7f) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNLE, 1, {IMM_NORMAL|BITS64|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56252, 207, 1343}, + /* 3 : JNLE imm16|near [i: jcc8 nw o16 7f rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086,ND */ + /* 370 327 320 001(7f) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JNLE, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56027, 208, 1344}, + /* 4 : JNLE imm32|near [i: jcc8 nw o32 7f rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086,ND */ + /* 370 327 321 001(7f) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JNLE, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56139, 208, 1345}, + /* 5 : JNLE imm64|near [i: jcc8 nw o64 7f rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64,ND */ + /* 370 327 324 001(7f) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNLE, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56251, 209, 1346}, + /* 6 : JNLE imm32|near [i: jcc8 nw o64 7f rel8 ] ND,AR0,SX,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 370 327 324 001(7f) 050 : AR0,NWSIZE,SX,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNLE, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56251, 210, 1347}, + /* 7 : JNLE imm16|near [i: nw o16 0f 8f rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386,ND */ + /* 327 320 355 001(8f) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JNLE, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56363, 211, 1348}, + /* 8 : JNLE imm32|near [i: nw o32 0f 8f rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386,ND */ + /* 327 321 355 001(8f) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JNLE, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56475, 211, 1349}, + /* 9 : JNLE imm64|near [i: nw o64 0f 8f rel ] AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64,ND */ + /* 327 324 355 001(8f) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNLE, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56587, 207, 1350}, + /* 10 : JNLE imm32|near [i: nw o64 0f 8f rel ] ND,AR0,SX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 355 001(8f) 064 : AR0,NWSIZE,SX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNLE, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56587, 212, 1351}, + /* 11 : JNLE imm [i: 7e jlen e9 rel ] ND,AR0,OSIZE,NOAPX,8086 */ + /* 001(7e) 373 001(e9) 064 : AR0,OSIZE,NOAPX,8086 */ + {I_JNLE, 1, {IMM_NORMAL,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56699, 213, 1354}, +}; + +static const struct itemplate instrux_JNO[12] = { + /* 0 : JNO imm16|short [i: nw o16 71 rel8 ] ND,AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 320 001(71) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JNO, 1, {IMM_NORMAL|BITS16|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56063, 206, 1341}, + /* 1 : JNO imm32|short [i: nw o32 71 rel8 ] ND,AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 321 001(71) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JNO, 1, {IMM_NORMAL|BITS32|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56175, 206, 1342}, + /* 2 : JNO imm64|short [i: nw o64 71 rel8 ] ND,AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 001(71) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNO, 1, {IMM_NORMAL|BITS64|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56287, 207, 1343}, + /* 3 : JNO imm16|near [i: jcc8 nw o16 71 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 370 327 320 001(71) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JNO, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56062, 208, 1344}, + /* 4 : JNO imm32|near [i: jcc8 nw o32 71 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 370 327 321 001(71) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JNO, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56174, 208, 1345}, + /* 5 : JNO imm64|near [i: jcc8 nw o64 71 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 370 327 324 001(71) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNO, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56286, 209, 1346}, + /* 6 : JNO imm32|near [i: jcc8 nw o64 71 rel8 ] ND,AR0,SX,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 370 327 324 001(71) 050 : AR0,NWSIZE,SX,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNO, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56286, 210, 1347}, + /* 7 : JNO imm16|near [i: nw o16 0f 81 rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 320 355 001(81) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JNO, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56398, 211, 1348}, + /* 8 : JNO imm32|near [i: nw o32 0f 81 rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 321 355 001(81) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JNO, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56510, 211, 1349}, + /* 9 : JNO imm64|near [i: nw o64 0f 81 rel ] AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 355 001(81) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNO, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56622, 207, 1350}, + /* 10 : JNO imm32|near [i: nw o64 0f 81 rel ] ND,AR0,SX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 355 001(81) 064 : AR0,NWSIZE,SX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNO, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56622, 212, 1351}, + /* 11 : JNO imm [i: 70 jlen e9 rel ] ND,AR0,OSIZE,NOAPX,8086 */ + /* 001(70) 373 001(e9) 064 : AR0,OSIZE,NOAPX,8086 */ + {I_JNO, 1, {IMM_NORMAL,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56734, 213, 1354}, +}; + +static const struct itemplate instrux_JNP[12] = { + /* 0 : JNP imm16|short [i: nw o16 7b rel8 ] ND,AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 320 001(7b) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JNP, 1, {IMM_NORMAL|BITS16|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56070, 206, 1341}, + /* 1 : JNP imm32|short [i: nw o32 7b rel8 ] ND,AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 321 001(7b) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JNP, 1, {IMM_NORMAL|BITS32|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56182, 206, 1342}, + /* 2 : JNP imm64|short [i: nw o64 7b rel8 ] ND,AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 001(7b) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNP, 1, {IMM_NORMAL|BITS64|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56294, 207, 1343}, + /* 3 : JNP imm16|near [i: jcc8 nw o16 7b rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086,ND */ + /* 370 327 320 001(7b) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JNP, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56069, 208, 1344}, + /* 4 : JNP imm32|near [i: jcc8 nw o32 7b rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086,ND */ + /* 370 327 321 001(7b) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JNP, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56181, 208, 1345}, + /* 5 : JNP imm64|near [i: jcc8 nw o64 7b rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64,ND */ + /* 370 327 324 001(7b) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNP, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56293, 209, 1346}, + /* 6 : JNP imm32|near [i: jcc8 nw o64 7b rel8 ] ND,AR0,SX,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 370 327 324 001(7b) 050 : AR0,NWSIZE,SX,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNP, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56293, 210, 1347}, + /* 7 : JNP imm16|near [i: nw o16 0f 8b rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386,ND */ + /* 327 320 355 001(8b) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JNP, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56405, 211, 1348}, + /* 8 : JNP imm32|near [i: nw o32 0f 8b rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386,ND */ + /* 327 321 355 001(8b) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JNP, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56517, 211, 1349}, + /* 9 : JNP imm64|near [i: nw o64 0f 8b rel ] AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64,ND */ + /* 327 324 355 001(8b) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNP, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56629, 207, 1350}, + /* 10 : JNP imm32|near [i: nw o64 0f 8b rel ] ND,AR0,SX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 355 001(8b) 064 : AR0,NWSIZE,SX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNP, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56629, 212, 1351}, + /* 11 : JNP imm [i: 7a jlen e9 rel ] ND,AR0,OSIZE,NOAPX,8086 */ + /* 001(7a) 373 001(e9) 064 : AR0,OSIZE,NOAPX,8086 */ + {I_JNP, 1, {IMM_NORMAL,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56741, 213, 1354}, +}; + +static const struct itemplate instrux_JNS[12] = { + /* 0 : JNS imm16|short [i: nw o16 79 rel8 ] ND,AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 320 001(79) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JNS, 1, {IMM_NORMAL|BITS16|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56077, 206, 1341}, + /* 1 : JNS imm32|short [i: nw o32 79 rel8 ] ND,AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 321 001(79) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JNS, 1, {IMM_NORMAL|BITS32|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56189, 206, 1342}, + /* 2 : JNS imm64|short [i: nw o64 79 rel8 ] ND,AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 001(79) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNS, 1, {IMM_NORMAL|BITS64|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56301, 207, 1343}, + /* 3 : JNS imm16|near [i: jcc8 nw o16 79 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 370 327 320 001(79) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JNS, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56076, 208, 1344}, + /* 4 : JNS imm32|near [i: jcc8 nw o32 79 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 370 327 321 001(79) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JNS, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56188, 208, 1345}, + /* 5 : JNS imm64|near [i: jcc8 nw o64 79 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 370 327 324 001(79) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNS, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56300, 209, 1346}, + /* 6 : JNS imm32|near [i: jcc8 nw o64 79 rel8 ] ND,AR0,SX,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 370 327 324 001(79) 050 : AR0,NWSIZE,SX,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNS, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56300, 210, 1347}, + /* 7 : JNS imm16|near [i: nw o16 0f 89 rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 320 355 001(89) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JNS, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56412, 211, 1348}, + /* 8 : JNS imm32|near [i: nw o32 0f 89 rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 321 355 001(89) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JNS, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56524, 211, 1349}, + /* 9 : JNS imm64|near [i: nw o64 0f 89 rel ] AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 355 001(89) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNS, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56636, 207, 1350}, + /* 10 : JNS imm32|near [i: nw o64 0f 89 rel ] ND,AR0,SX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 355 001(89) 064 : AR0,NWSIZE,SX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNS, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56636, 212, 1351}, + /* 11 : JNS imm [i: 78 jlen e9 rel ] ND,AR0,OSIZE,NOAPX,8086 */ + /* 001(78) 373 001(e9) 064 : AR0,OSIZE,NOAPX,8086 */ + {I_JNS, 1, {IMM_NORMAL,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56748, 213, 1354}, +}; + +static const struct itemplate instrux_JNZ[12] = { + /* 0 : JNZ imm16|short [i: nw o16 75 rel8 ] ND,AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 320 001(75) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JNZ, 1, {IMM_NORMAL|BITS16|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56056, 206, 1341}, + /* 1 : JNZ imm32|short [i: nw o32 75 rel8 ] ND,AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 321 001(75) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JNZ, 1, {IMM_NORMAL|BITS32|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56168, 206, 1342}, + /* 2 : JNZ imm64|short [i: nw o64 75 rel8 ] ND,AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 001(75) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNZ, 1, {IMM_NORMAL|BITS64|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56280, 207, 1343}, + /* 3 : JNZ imm16|near [i: jcc8 nw o16 75 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 370 327 320 001(75) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JNZ, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56055, 208, 1344}, + /* 4 : JNZ imm32|near [i: jcc8 nw o32 75 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 370 327 321 001(75) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JNZ, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56167, 208, 1345}, + /* 5 : JNZ imm64|near [i: jcc8 nw o64 75 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 370 327 324 001(75) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNZ, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56279, 209, 1346}, + /* 6 : JNZ imm32|near [i: jcc8 nw o64 75 rel8 ] ND,AR0,SX,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 370 327 324 001(75) 050 : AR0,NWSIZE,SX,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNZ, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56279, 210, 1347}, + /* 7 : JNZ imm16|near [i: nw o16 0f 85 rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 320 355 001(85) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JNZ, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56391, 211, 1348}, + /* 8 : JNZ imm32|near [i: nw o32 0f 85 rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 321 355 001(85) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JNZ, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56503, 211, 1349}, + /* 9 : JNZ imm64|near [i: nw o64 0f 85 rel ] AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 355 001(85) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNZ, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56615, 207, 1350}, + /* 10 : JNZ imm32|near [i: nw o64 0f 85 rel ] ND,AR0,SX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 355 001(85) 064 : AR0,NWSIZE,SX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNZ, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56615, 212, 1351}, + /* 11 : JNZ imm [i: 74 jlen e9 rel ] ND,AR0,OSIZE,NOAPX,8086 */ + /* 001(74) 373 001(e9) 064 : AR0,OSIZE,NOAPX,8086 */ + {I_JNZ, 1, {IMM_NORMAL,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56727, 213, 1354}, +}; + +static const struct itemplate instrux_JO[12] = { + /* 0 : JO imm16|short [i: nw o16 70 rel8 ] ND,AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 320 001(70) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JO, 1, {IMM_NORMAL|BITS16|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56084, 206, 1341}, + /* 1 : JO imm32|short [i: nw o32 70 rel8 ] ND,AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 321 001(70) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JO, 1, {IMM_NORMAL|BITS32|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56196, 206, 1342}, + /* 2 : JO imm64|short [i: nw o64 70 rel8 ] ND,AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 001(70) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JO, 1, {IMM_NORMAL|BITS64|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56308, 207, 1343}, + /* 3 : JO imm16|near [i: jcc8 nw o16 70 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 370 327 320 001(70) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JO, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56083, 208, 1344}, + /* 4 : JO imm32|near [i: jcc8 nw o32 70 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 370 327 321 001(70) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JO, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56195, 208, 1345}, + /* 5 : JO imm64|near [i: jcc8 nw o64 70 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 370 327 324 001(70) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JO, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56307, 209, 1346}, + /* 6 : JO imm32|near [i: jcc8 nw o64 70 rel8 ] ND,AR0,SX,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 370 327 324 001(70) 050 : AR0,NWSIZE,SX,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JO, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56307, 210, 1347}, + /* 7 : JO imm16|near [i: nw o16 0f 80 rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 320 355 001(80) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JO, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56419, 211, 1348}, + /* 8 : JO imm32|near [i: nw o32 0f 80 rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 321 355 001(80) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JO, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56531, 211, 1349}, + /* 9 : JO imm64|near [i: nw o64 0f 80 rel ] AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 355 001(80) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JO, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56643, 207, 1350}, + /* 10 : JO imm32|near [i: nw o64 0f 80 rel ] ND,AR0,SX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 355 001(80) 064 : AR0,NWSIZE,SX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JO, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56643, 212, 1351}, + /* 11 : JO imm [i: 71 jlen e9 rel ] ND,AR0,OSIZE,NOAPX,8086 */ + /* 001(71) 373 001(e9) 064 : AR0,OSIZE,NOAPX,8086 */ + {I_JO, 1, {IMM_NORMAL,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56755, 213, 1354}, +}; + +static const struct itemplate instrux_JP[12] = { + /* 0 : JP imm16|short [i: nw o16 7a rel8 ] ND,AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 320 001(7a) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JP, 1, {IMM_NORMAL|BITS16|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56091, 206, 1341}, + /* 1 : JP imm32|short [i: nw o32 7a rel8 ] ND,AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 321 001(7a) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JP, 1, {IMM_NORMAL|BITS32|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56203, 206, 1342}, + /* 2 : JP imm64|short [i: nw o64 7a rel8 ] ND,AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 001(7a) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JP, 1, {IMM_NORMAL|BITS64|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56315, 207, 1343}, + /* 3 : JP imm16|near [i: jcc8 nw o16 7a rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086,ND */ + /* 370 327 320 001(7a) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JP, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56090, 208, 1344}, + /* 4 : JP imm32|near [i: jcc8 nw o32 7a rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086,ND */ + /* 370 327 321 001(7a) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JP, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56202, 208, 1345}, + /* 5 : JP imm64|near [i: jcc8 nw o64 7a rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64,ND */ + /* 370 327 324 001(7a) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JP, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56314, 209, 1346}, + /* 6 : JP imm32|near [i: jcc8 nw o64 7a rel8 ] ND,AR0,SX,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 370 327 324 001(7a) 050 : AR0,NWSIZE,SX,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JP, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56314, 210, 1347}, + /* 7 : JP imm16|near [i: nw o16 0f 8a rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386,ND */ + /* 327 320 355 001(8a) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JP, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56426, 211, 1348}, + /* 8 : JP imm32|near [i: nw o32 0f 8a rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386,ND */ + /* 327 321 355 001(8a) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JP, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56538, 211, 1349}, + /* 9 : JP imm64|near [i: nw o64 0f 8a rel ] AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64,ND */ + /* 327 324 355 001(8a) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JP, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56650, 207, 1350}, + /* 10 : JP imm32|near [i: nw o64 0f 8a rel ] ND,AR0,SX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 355 001(8a) 064 : AR0,NWSIZE,SX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JP, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56650, 212, 1351}, + /* 11 : JP imm [i: 7b jlen e9 rel ] ND,AR0,OSIZE,NOAPX,8086 */ + /* 001(7b) 373 001(e9) 064 : AR0,OSIZE,NOAPX,8086 */ + {I_JP, 1, {IMM_NORMAL,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56762, 213, 1354}, +}; + +static const struct itemplate instrux_JPE[12] = { + /* 0 : JPE imm16|short [i: nw o16 7a rel8 ] ND,AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 320 001(7a) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JPE, 1, {IMM_NORMAL|BITS16|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56091, 206, 1341}, + /* 1 : JPE imm32|short [i: nw o32 7a rel8 ] ND,AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 321 001(7a) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JPE, 1, {IMM_NORMAL|BITS32|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56203, 206, 1342}, + /* 2 : JPE imm64|short [i: nw o64 7a rel8 ] ND,AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 001(7a) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JPE, 1, {IMM_NORMAL|BITS64|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56315, 207, 1343}, + /* 3 : JPE imm16|near [i: jcc8 nw o16 7a rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 370 327 320 001(7a) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JPE, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56090, 208, 1344}, + /* 4 : JPE imm32|near [i: jcc8 nw o32 7a rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 370 327 321 001(7a) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JPE, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56202, 208, 1345}, + /* 5 : JPE imm64|near [i: jcc8 nw o64 7a rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 370 327 324 001(7a) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JPE, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56314, 209, 1346}, + /* 6 : JPE imm32|near [i: jcc8 nw o64 7a rel8 ] ND,AR0,SX,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 370 327 324 001(7a) 050 : AR0,NWSIZE,SX,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JPE, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56314, 210, 1347}, + /* 7 : JPE imm16|near [i: nw o16 0f 8a rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 320 355 001(8a) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JPE, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56426, 211, 1348}, + /* 8 : JPE imm32|near [i: nw o32 0f 8a rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 321 355 001(8a) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JPE, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56538, 211, 1349}, + /* 9 : JPE imm64|near [i: nw o64 0f 8a rel ] AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 355 001(8a) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JPE, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56650, 207, 1350}, + /* 10 : JPE imm32|near [i: nw o64 0f 8a rel ] ND,AR0,SX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 355 001(8a) 064 : AR0,NWSIZE,SX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JPE, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56650, 212, 1351}, + /* 11 : JPE imm [i: 7b jlen e9 rel ] ND,AR0,OSIZE,NOAPX,8086 */ + /* 001(7b) 373 001(e9) 064 : AR0,OSIZE,NOAPX,8086 */ + {I_JPE, 1, {IMM_NORMAL,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56762, 213, 1354}, +}; + +static const struct itemplate instrux_JPO[12] = { + /* 0 : JPO imm16|short [i: nw o16 7b rel8 ] ND,AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 320 001(7b) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JPO, 1, {IMM_NORMAL|BITS16|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56070, 206, 1341}, + /* 1 : JPO imm32|short [i: nw o32 7b rel8 ] ND,AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 321 001(7b) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JPO, 1, {IMM_NORMAL|BITS32|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56182, 206, 1342}, + /* 2 : JPO imm64|short [i: nw o64 7b rel8 ] ND,AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 001(7b) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JPO, 1, {IMM_NORMAL|BITS64|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56294, 207, 1343}, + /* 3 : JPO imm16|near [i: jcc8 nw o16 7b rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 370 327 320 001(7b) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JPO, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56069, 208, 1344}, + /* 4 : JPO imm32|near [i: jcc8 nw o32 7b rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 370 327 321 001(7b) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JPO, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56181, 208, 1345}, + /* 5 : JPO imm64|near [i: jcc8 nw o64 7b rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 370 327 324 001(7b) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JPO, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56293, 209, 1346}, + /* 6 : JPO imm32|near [i: jcc8 nw o64 7b rel8 ] ND,AR0,SX,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 370 327 324 001(7b) 050 : AR0,NWSIZE,SX,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JPO, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56293, 210, 1347}, + /* 7 : JPO imm16|near [i: nw o16 0f 8b rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 320 355 001(8b) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JPO, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56405, 211, 1348}, + /* 8 : JPO imm32|near [i: nw o32 0f 8b rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 321 355 001(8b) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JPO, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56517, 211, 1349}, + /* 9 : JPO imm64|near [i: nw o64 0f 8b rel ] AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 355 001(8b) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JPO, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56629, 207, 1350}, + /* 10 : JPO imm32|near [i: nw o64 0f 8b rel ] ND,AR0,SX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 355 001(8b) 064 : AR0,NWSIZE,SX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JPO, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56629, 212, 1351}, + /* 11 : JPO imm [i: 7a jlen e9 rel ] ND,AR0,OSIZE,NOAPX,8086 */ + /* 001(7a) 373 001(e9) 064 : AR0,OSIZE,NOAPX,8086 */ + {I_JPO, 1, {IMM_NORMAL,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56741, 213, 1354}, +}; + +static const struct itemplate instrux_JS[12] = { + /* 0 : JS imm16|short [i: nw o16 78 rel8 ] ND,AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 320 001(78) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JS, 1, {IMM_NORMAL|BITS16|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56098, 206, 1341}, + /* 1 : JS imm32|short [i: nw o32 78 rel8 ] ND,AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 321 001(78) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JS, 1, {IMM_NORMAL|BITS32|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56210, 206, 1342}, + /* 2 : JS imm64|short [i: nw o64 78 rel8 ] ND,AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 001(78) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JS, 1, {IMM_NORMAL|BITS64|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56322, 207, 1343}, + /* 3 : JS imm16|near [i: jcc8 nw o16 78 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 370 327 320 001(78) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JS, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56097, 208, 1344}, + /* 4 : JS imm32|near [i: jcc8 nw o32 78 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 370 327 321 001(78) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JS, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56209, 208, 1345}, + /* 5 : JS imm64|near [i: jcc8 nw o64 78 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 370 327 324 001(78) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JS, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56321, 209, 1346}, + /* 6 : JS imm32|near [i: jcc8 nw o64 78 rel8 ] ND,AR0,SX,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 370 327 324 001(78) 050 : AR0,NWSIZE,SX,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JS, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56321, 210, 1347}, + /* 7 : JS imm16|near [i: nw o16 0f 88 rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 320 355 001(88) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JS, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56433, 211, 1348}, + /* 8 : JS imm32|near [i: nw o32 0f 88 rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 321 355 001(88) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JS, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56545, 211, 1349}, + /* 9 : JS imm64|near [i: nw o64 0f 88 rel ] AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 355 001(88) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JS, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56657, 207, 1350}, + /* 10 : JS imm32|near [i: nw o64 0f 88 rel ] ND,AR0,SX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 355 001(88) 064 : AR0,NWSIZE,SX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JS, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56657, 212, 1351}, + /* 11 : JS imm [i: 79 jlen e9 rel ] ND,AR0,OSIZE,NOAPX,8086 */ + /* 001(79) 373 001(e9) 064 : AR0,OSIZE,NOAPX,8086 */ + {I_JS, 1, {IMM_NORMAL,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56769, 213, 1354}, +}; + +static const struct itemplate instrux_JZ[12] = { + /* 0 : JZ imm16|short [i: nw o16 74 rel8 ] ND,AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 320 001(74) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JZ, 1, {IMM_NORMAL|BITS16|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56021, 206, 1341}, + /* 1 : JZ imm32|short [i: nw o32 74 rel8 ] ND,AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 321 001(74) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JZ, 1, {IMM_NORMAL|BITS32|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56133, 206, 1342}, + /* 2 : JZ imm64|short [i: nw o64 74 rel8 ] ND,AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 001(74) 050 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JZ, 1, {IMM_NORMAL|BITS64|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56245, 207, 1343}, + /* 3 : JZ imm16|near [i: jcc8 nw o16 74 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 370 327 320 001(74) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JZ, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56020, 208, 1344}, + /* 4 : JZ imm32|near [i: jcc8 nw o32 74 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 370 327 321 001(74) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JZ, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56132, 208, 1345}, + /* 5 : JZ imm64|near [i: jcc8 nw o64 74 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 370 327 324 001(74) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JZ, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56244, 209, 1346}, + /* 6 : JZ imm32|near [i: jcc8 nw o64 74 rel8 ] ND,AR0,SX,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 370 327 324 001(74) 050 : AR0,NWSIZE,SX,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JZ, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56244, 210, 1347}, + /* 7 : JZ imm16|near [i: nw o16 0f 84 rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 320 355 001(84) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JZ, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56356, 211, 1348}, + /* 8 : JZ imm32|near [i: nw o32 0f 84 rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 321 355 001(84) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JZ, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56468, 211, 1349}, + /* 9 : JZ imm64|near [i: nw o64 0f 84 rel ] AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 355 001(84) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JZ, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56580, 207, 1350}, + /* 10 : JZ imm32|near [i: nw o64 0f 84 rel ] ND,AR0,SX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 355 001(84) 064 : AR0,NWSIZE,SX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JZ, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56580, 212, 1351}, + /* 11 : JZ imm [i: 75 jlen e9 rel ] ND,AR0,OSIZE,NOAPX,8086 */ + /* 001(75) 373 001(e9) 064 : AR0,OSIZE,NOAPX,8086 */ + {I_JZ, 1, {IMM_NORMAL,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56692, 213, 1354}, +}; + +static const struct itemplate instrux_JCXZ[8] = { + /* 0 : JCXZ imm16|near|short [i: a16 nw o16 e3 rel8 ] AR0,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + /* 310 327 320 001(e3) 050 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + {I_JCXZ, 1, {IMM_NORMAL|BITS16|NEAR|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56776, 189, 1358}, + /* 1 : JCXZ imm32|near|short [i: a16 nw o32 e3 rel8 ] AR0,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + /* 310 327 321 001(e3) 050 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + {I_JCXZ, 1, {IMM_NORMAL|BITS32|NEAR|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56790, 189, 1360}, + /* 2 : JCXZ imm16|near|short,reg_cx [i: a16 nw o16 e3 rel8 ] ND,AR0-1,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + /* 310 327 320 001(e3) 050 : AR0,AR1,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + {I_JCXZ, 2, {IMM_NORMAL|BITS16|NEAR|SHORT,REG_CX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+56776, 215, 1364}, + /* 3 : JCXZ imm16|near|short,reg_ecx [i: a32 nw o16 e3 rel8 ] ND,AR0-1,OSIZE,NOREX,NOAPX,NOLONG,386 */ + /* 311 327 320 001(e3) 050 : AR0,AR1,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,386 */ + {I_JCXZ, 2, {IMM_NORMAL|BITS16|NEAR|SHORT,REG_ECX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+56783, 216, 1365}, + /* 4 : JCXZ imm32|near|short,reg_cx [i: a16 nw o32 e3 rel8 ] ND,AR0-1,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + /* 310 327 321 001(e3) 050 : AR0,AR1,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + {I_JCXZ, 2, {IMM_NORMAL|BITS32|NEAR|SHORT,REG_CX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+56790, 215, 1366}, + /* 5 : JCXZ imm32|near|short,reg_ecx [i: a32 nw o32 e3 rel8 ] ND,AR0-1,OSIZE,NOREX,NOAPX,NOLONG,386 */ + /* 311 327 321 001(e3) 050 : AR0,AR1,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,386 */ + {I_JCXZ, 2, {IMM_NORMAL|BITS32|NEAR|SHORT,REG_ECX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+56797, 216, 1367}, + /* 6 : JCXZ imm64|near|short,reg_ecx [i: a32 nw o64 e3 rel8 ] ND,AR0-1,OSIZE,NOAPX,LONG,PROT,X86_64 */ + /* 311 327 324 001(e3) 050 : AR0,AR1,NWSIZE,OSIZE,NOAPX,LONG,PROT,X86_64 */ + {I_JCXZ, 2, {IMM_NORMAL|BITS64|NEAR|SHORT,REG_ECX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+56804, 217, 1368}, + /* 7 : JCXZ imm64|near|short,reg_rcx [i: a64 nw o64 e3 rel8 ] ND,AR0-1,OSIZE,NOAPX,LONG,PROT,X86_64 */ + /* 313 327 324 001(e3) 050 : AR0,AR1,NWSIZE,OSIZE,NOAPX,LONG,PROT,X86_64 */ + {I_JCXZ, 2, {IMM_NORMAL|BITS64|NEAR|SHORT,REG_RCX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+56811, 217, 1369}, +}; + +static const struct itemplate instrux_JECXZ[3] = { + /* 0 : JECXZ imm16|near|short [i: a32 nw o16 e3 rel8 ] AR0,OSIZE,NOREX,NOAPX,NOLONG,386 */ + /* 311 327 320 001(e3) 050 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,386 */ + {I_JECXZ, 1, {IMM_NORMAL|BITS16|NEAR|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56783, 214, 1359}, + /* 1 : JECXZ imm32|near|short [i: a32 nw o32 e3 rel8 ] AR0,OSIZE,NOREX,NOAPX,NOLONG,386 */ + /* 311 327 321 001(e3) 050 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,386 */ + {I_JECXZ, 1, {IMM_NORMAL|BITS32|NEAR|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56797, 214, 1361}, + /* 2 : JECXZ imm64|near|short [i: a32 nw o64 e3 rel8 ] AR0,OSIZE,NOAPX,LONG,PROT,X86_64 */ + /* 311 327 324 001(e3) 050 : AR0,NWSIZE,OSIZE,NOAPX,LONG,PROT,X86_64 */ + {I_JECXZ, 1, {IMM_NORMAL|BITS64|NEAR|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56804, 190, 1362}, +}; + +static const struct itemplate instrux_JRCXZ[1] = { + /* 0 : JRCXZ imm64|near|short [i: a64 nw o64 e3 rel8 ] AR0,OSIZE,NOAPX,LONG,PROT,X86_64 */ + /* 313 327 324 001(e3) 050 : AR0,NWSIZE,OSIZE,NOAPX,LONG,PROT,X86_64 */ + {I_JRCXZ, 1, {IMM_NORMAL|BITS64|NEAR|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56811, 190, 1363}, +}; + +static const struct itemplate instrux_LOOP[9] = { + /* 0 : LOOP imm16|near|short [i: asm nw o16 e2 rel8 ] AR0,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + /* 312 327 320 001(e2) 050 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + {I_LOOP, 1, {IMM_NORMAL|BITS16|NEAR|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56818, 189, 1371}, + /* 1 : LOOP imm32|near|short [i: asm nw o32 e2 rel8 ] AR0,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + /* 312 327 321 001(e2) 050 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + {I_LOOP, 1, {IMM_NORMAL|BITS32|NEAR|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56839, 189, 1374}, + /* 2 : LOOP imm64|near|short [i: asm nw o64 e2 rel8 ] AR0,OSIZE,NOAPX,LONG,PROT,X86_64 */ + /* 312 327 324 001(e2) 050 : AR0,NWSIZE,OSIZE,NOAPX,LONG,PROT,X86_64 */ + {I_LOOP, 1, {IMM_NORMAL|BITS64|NEAR|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56860, 190, 1377}, + /* 3 : LOOP imm16|near|short,reg_cx [i-: a16 nw o16 e2 rel8 ] AR0-1,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + /* 310 327 320 001(e2) 050 : AR0,AR1,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + {I_LOOP, 2, {IMM_NORMAL|BITS16|NEAR|SHORT,REG_CX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+56825, 215, 1416}, + /* 4 : LOOP imm16|near|short,reg_ecx [i-: a32 nw o16 e2 rel8 ] AR0-1,OSIZE,NOREX,NOAPX,NOLONG,386 */ + /* 311 327 320 001(e2) 050 : AR0,AR1,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,386 */ + {I_LOOP, 2, {IMM_NORMAL|BITS16|NEAR|SHORT,REG_ECX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+56832, 216, 1417}, + /* 5 : LOOP imm32|near|short,reg_cx [i-: a16 nw o32 e2 rel8 ] AR0-1,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + /* 310 327 321 001(e2) 050 : AR0,AR1,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + {I_LOOP, 2, {IMM_NORMAL|BITS32|NEAR|SHORT,REG_CX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+56846, 215, 1418}, + /* 6 : LOOP imm32|near|short,reg_ecx [i-: a32 nw o32 e2 rel8 ] AR0-1,OSIZE,NOREX,NOAPX,NOLONG,386 */ + /* 311 327 321 001(e2) 050 : AR0,AR1,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,386 */ + {I_LOOP, 2, {IMM_NORMAL|BITS32|NEAR|SHORT,REG_ECX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+56853, 216, 1419}, + /* 7 : LOOP imm64|near|short,reg_ecx [i-: a32 nw o64 e2 rel8 ] AR0-1,OSIZE,NOAPX,LONG,PROT,X86_64 */ + /* 311 327 324 001(e2) 050 : AR0,AR1,NWSIZE,OSIZE,NOAPX,LONG,PROT,X86_64 */ + {I_LOOP, 2, {IMM_NORMAL|BITS64|NEAR|SHORT,REG_ECX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+56867, 217, 1420}, + /* 8 : LOOP imm64|near|short,reg_rcx [i-: a64 nw o64 e2 rel8 ] AR0-1,OSIZE,NOAPX,LONG,PROT,X86_64 */ + /* 313 327 324 001(e2) 050 : AR0,AR1,NWSIZE,OSIZE,NOAPX,LONG,PROT,X86_64 */ + {I_LOOP, 2, {IMM_NORMAL|BITS64|NEAR|SHORT,REG_RCX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+56874, 217, 1421}, +}; + +static const struct itemplate instrux_LOOPW[2] = { + /* 0 : LOOPW imm16|near|short [i: a16 nw o16 e2 rel8 ] ND,AR0,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + /* 310 327 320 001(e2) 050 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + {I_LOOPW, 1, {IMM_NORMAL|BITS16|NEAR|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56825, 189, 1372}, + /* 1 : LOOPW imm32|near|short [i: a16 nw o32 e2 rel8 ] ND,AR0,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + /* 310 327 321 001(e2) 050 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + {I_LOOPW, 1, {IMM_NORMAL|BITS32|NEAR|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56846, 189, 1375}, +}; + +static const struct itemplate instrux_LOOPD[3] = { + /* 0 : LOOPD imm16|near|short [i: a32 nw o16 e2 rel8 ] ND,AR0,OSIZE,NOREX,NOAPX,NOLONG,386 */ + /* 311 327 320 001(e2) 050 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,386 */ + {I_LOOPD, 1, {IMM_NORMAL|BITS16|NEAR|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56832, 214, 1373}, + /* 1 : LOOPD imm32|near|short [i: a32 nw o32 e2 rel8 ] ND,AR0,OSIZE,NOREX,NOAPX,NOLONG,386 */ + /* 311 327 321 001(e2) 050 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,386 */ + {I_LOOPD, 1, {IMM_NORMAL|BITS32|NEAR|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56853, 214, 1376}, + /* 2 : LOOPD imm64|near|short [i: a32 nw o64 e2 rel8 ] ND,AR0,OSIZE,NOAPX,LONG,PROT,X86_64 */ + /* 311 327 324 001(e2) 050 : AR0,NWSIZE,OSIZE,NOAPX,LONG,PROT,X86_64 */ + {I_LOOPD, 1, {IMM_NORMAL|BITS64|NEAR|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56867, 190, 1378}, +}; + +static const struct itemplate instrux_LOOPQ[1] = { + /* 0 : LOOPQ imm64|near|short [i: a64 nw o64 e2 rel8 ] ND,AR0,OSIZE,NOAPX,LONG,PROT,X86_64 */ + /* 313 327 324 001(e2) 050 : AR0,NWSIZE,OSIZE,NOAPX,LONG,PROT,X86_64 */ + {I_LOOPQ, 1, {IMM_NORMAL|BITS64|NEAR|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56874, 190, 1379}, +}; + +static const struct itemplate instrux_LOOPE[9] = { + /* 0 : LOOPE imm16|near|short [i: asm nw o16 e1 rel8 ] AR0,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + /* 312 327 320 001(e1) 050 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + {I_LOOPE, 1, {IMM_NORMAL|BITS16|NEAR|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56881, 189, 1380}, + /* 1 : LOOPE imm32|near|short [i: asm nw o32 e1 rel8 ] AR0,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + /* 312 327 321 001(e1) 050 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + {I_LOOPE, 1, {IMM_NORMAL|BITS32|NEAR|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56902, 189, 1383}, + /* 2 : LOOPE imm64|near|short [i: asm nw o64 e1 rel8 ] AR0,OSIZE,NOAPX,LONG,PROT,X86_64 */ + /* 312 327 324 001(e1) 050 : AR0,NWSIZE,OSIZE,NOAPX,LONG,PROT,X86_64 */ + {I_LOOPE, 1, {IMM_NORMAL|BITS64|NEAR|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56923, 190, 1386}, + /* 3 : LOOPE imm16|near|short,reg_cx [i-: a16 nw o16 e1 rel8 ] AR0-1,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + /* 310 327 320 001(e1) 050 : AR0,AR1,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + {I_LOOPE, 2, {IMM_NORMAL|BITS16|NEAR|SHORT,REG_CX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+56888, 215, 1422}, + /* 4 : LOOPE imm16|near|short,reg_ecx [i-: a32 nw o16 e1 rel8 ] AR0-1,OSIZE,NOREX,NOAPX,NOLONG,386 */ + /* 311 327 320 001(e1) 050 : AR0,AR1,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,386 */ + {I_LOOPE, 2, {IMM_NORMAL|BITS16|NEAR|SHORT,REG_ECX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+56895, 216, 1423}, + /* 5 : LOOPE imm32|near|short,reg_cx [i-: a16 nw o32 e1 rel8 ] AR0-1,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + /* 310 327 321 001(e1) 050 : AR0,AR1,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + {I_LOOPE, 2, {IMM_NORMAL|BITS32|NEAR|SHORT,REG_CX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+56909, 215, 1424}, + /* 6 : LOOPE imm32|near|short,reg_ecx [i-: a32 nw o32 e1 rel8 ] AR0-1,OSIZE,NOREX,NOAPX,NOLONG,386 */ + /* 311 327 321 001(e1) 050 : AR0,AR1,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,386 */ + {I_LOOPE, 2, {IMM_NORMAL|BITS32|NEAR|SHORT,REG_ECX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+56916, 216, 1425}, + /* 7 : LOOPE imm64|near|short,reg_ecx [i-: a32 nw o64 e1 rel8 ] AR0-1,OSIZE,NOAPX,LONG,PROT,X86_64 */ + /* 311 327 324 001(e1) 050 : AR0,AR1,NWSIZE,OSIZE,NOAPX,LONG,PROT,X86_64 */ + {I_LOOPE, 2, {IMM_NORMAL|BITS64|NEAR|SHORT,REG_ECX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+56930, 217, 1426}, + /* 8 : LOOPE imm64|near|short,reg_rcx [i-: a64 nw o64 e1 rel8 ] AR0-1,OSIZE,NOAPX,LONG,PROT,X86_64 */ + /* 313 327 324 001(e1) 050 : AR0,AR1,NWSIZE,OSIZE,NOAPX,LONG,PROT,X86_64 */ + {I_LOOPE, 2, {IMM_NORMAL|BITS64|NEAR|SHORT,REG_RCX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+56937, 217, 1427}, +}; + +static const struct itemplate instrux_LOOPEW[2] = { + /* 0 : LOOPEW imm16|near|short [i: a16 nw o16 e1 rel8 ] ND,AR0,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + /* 310 327 320 001(e1) 050 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + {I_LOOPEW, 1, {IMM_NORMAL|BITS16|NEAR|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56888, 189, 1381}, + /* 1 : LOOPEW imm32|near|short [i: a16 nw o32 e1 rel8 ] ND,AR0,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + /* 310 327 321 001(e1) 050 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + {I_LOOPEW, 1, {IMM_NORMAL|BITS32|NEAR|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56909, 189, 1384}, +}; + +static const struct itemplate instrux_LOOPED[3] = { + /* 0 : LOOPED imm16|near|short [i: a32 nw o16 e1 rel8 ] ND,AR0,OSIZE,NOREX,NOAPX,NOLONG,386 */ + /* 311 327 320 001(e1) 050 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,386 */ + {I_LOOPED, 1, {IMM_NORMAL|BITS16|NEAR|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56895, 214, 1382}, + /* 1 : LOOPED imm32|near|short [i: a32 nw o32 e1 rel8 ] ND,AR0,OSIZE,NOREX,NOAPX,NOLONG,386 */ + /* 311 327 321 001(e1) 050 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,386 */ + {I_LOOPED, 1, {IMM_NORMAL|BITS32|NEAR|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56916, 214, 1385}, + /* 2 : LOOPED imm64|near|short [i: a32 nw o64 e1 rel8 ] ND,AR0,OSIZE,NOAPX,LONG,PROT,X86_64 */ + /* 311 327 324 001(e1) 050 : AR0,NWSIZE,OSIZE,NOAPX,LONG,PROT,X86_64 */ + {I_LOOPED, 1, {IMM_NORMAL|BITS64|NEAR|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56930, 190, 1387}, +}; + +static const struct itemplate instrux_LOOPEQ[1] = { + /* 0 : LOOPEQ imm64|near|short [i: a64 nw o64 e1 rel8 ] ND,AR0,OSIZE,NOAPX,LONG,PROT,X86_64 */ + /* 313 327 324 001(e1) 050 : AR0,NWSIZE,OSIZE,NOAPX,LONG,PROT,X86_64 */ + {I_LOOPEQ, 1, {IMM_NORMAL|BITS64|NEAR|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56937, 190, 1388}, +}; + +static const struct itemplate instrux_LOOPNE[9] = { + /* 0 : LOOPNE imm16|near|short [i: asm nw o16 e0 rel8 ] AR0,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + /* 312 327 320 001(e0) 050 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + {I_LOOPNE, 1, {IMM_NORMAL|BITS16|NEAR|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56944, 189, 1389}, + /* 1 : LOOPNE imm32|near|short [i: asm nw o32 e0 rel8 ] AR0,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + /* 312 327 321 001(e0) 050 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + {I_LOOPNE, 1, {IMM_NORMAL|BITS32|NEAR|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56965, 189, 1392}, + /* 2 : LOOPNE imm64|near|short [i: asm nw o64 e0 rel8 ] AR0,OSIZE,NOAPX,LONG,PROT,X86_64 */ + /* 312 327 324 001(e0) 050 : AR0,NWSIZE,OSIZE,NOAPX,LONG,PROT,X86_64 */ + {I_LOOPNE, 1, {IMM_NORMAL|BITS64|NEAR|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56986, 190, 1395}, + /* 3 : LOOPNE imm16|near|short,reg_cx [i-: a16 nw o16 e0 rel8 ] AR0-1,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + /* 310 327 320 001(e0) 050 : AR0,AR1,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + {I_LOOPNE, 2, {IMM_NORMAL|BITS16|NEAR|SHORT,REG_CX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+56951, 215, 1428}, + /* 4 : LOOPNE imm16|near|short,reg_ecx [i-: a32 nw o16 e0 rel8 ] AR0-1,OSIZE,NOREX,NOAPX,NOLONG,386 */ + /* 311 327 320 001(e0) 050 : AR0,AR1,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,386 */ + {I_LOOPNE, 2, {IMM_NORMAL|BITS16|NEAR|SHORT,REG_ECX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+56958, 216, 1429}, + /* 5 : LOOPNE imm32|near|short,reg_cx [i-: a16 nw o32 e0 rel8 ] AR0-1,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + /* 310 327 321 001(e0) 050 : AR0,AR1,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + {I_LOOPNE, 2, {IMM_NORMAL|BITS32|NEAR|SHORT,REG_CX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+56972, 215, 1430}, + /* 6 : LOOPNE imm32|near|short,reg_ecx [i-: a32 nw o32 e0 rel8 ] AR0-1,OSIZE,NOREX,NOAPX,NOLONG,386 */ + /* 311 327 321 001(e0) 050 : AR0,AR1,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,386 */ + {I_LOOPNE, 2, {IMM_NORMAL|BITS32|NEAR|SHORT,REG_ECX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+56979, 216, 1431}, + /* 7 : LOOPNE imm64|near|short,reg_ecx [i-: a32 nw o64 e0 rel8 ] AR0-1,OSIZE,NOAPX,LONG,PROT,X86_64 */ + /* 311 327 324 001(e0) 050 : AR0,AR1,NWSIZE,OSIZE,NOAPX,LONG,PROT,X86_64 */ + {I_LOOPNE, 2, {IMM_NORMAL|BITS64|NEAR|SHORT,REG_ECX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+56993, 217, 1432}, + /* 8 : LOOPNE imm64|near|short,reg_rcx [i-: a64 nw o64 e0 rel8 ] AR0-1,OSIZE,NOAPX,LONG,PROT,X86_64 */ + /* 313 327 324 001(e0) 050 : AR0,AR1,NWSIZE,OSIZE,NOAPX,LONG,PROT,X86_64 */ + {I_LOOPNE, 2, {IMM_NORMAL|BITS64|NEAR|SHORT,REG_RCX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+57000, 217, 1433}, +}; + +static const struct itemplate instrux_LOOPNEW[2] = { + /* 0 : LOOPNEW imm16|near|short [i: a16 nw o16 e0 rel8 ] ND,AR0,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + /* 310 327 320 001(e0) 050 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + {I_LOOPNEW, 1, {IMM_NORMAL|BITS16|NEAR|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56951, 189, 1390}, + /* 1 : LOOPNEW imm32|near|short [i: a16 nw o32 e0 rel8 ] ND,AR0,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + /* 310 327 321 001(e0) 050 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + {I_LOOPNEW, 1, {IMM_NORMAL|BITS32|NEAR|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56972, 189, 1393}, +}; + +static const struct itemplate instrux_LOOPNED[3] = { + /* 0 : LOOPNED imm16|near|short [i: a32 nw o16 e0 rel8 ] ND,AR0,OSIZE,NOREX,NOAPX,NOLONG,386 */ + /* 311 327 320 001(e0) 050 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,386 */ + {I_LOOPNED, 1, {IMM_NORMAL|BITS16|NEAR|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56958, 214, 1391}, + /* 1 : LOOPNED imm32|near|short [i: a32 nw o32 e0 rel8 ] ND,AR0,OSIZE,NOREX,NOAPX,NOLONG,386 */ + /* 311 327 321 001(e0) 050 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,386 */ + {I_LOOPNED, 1, {IMM_NORMAL|BITS32|NEAR|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56979, 214, 1394}, + /* 2 : LOOPNED imm64|near|short [i: a32 nw o64 e0 rel8 ] ND,AR0,OSIZE,NOAPX,LONG,PROT,X86_64 */ + /* 311 327 324 001(e0) 050 : AR0,NWSIZE,OSIZE,NOAPX,LONG,PROT,X86_64 */ + {I_LOOPNED, 1, {IMM_NORMAL|BITS64|NEAR|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56993, 190, 1396}, +}; + +static const struct itemplate instrux_LOOPNEQ[1] = { + /* 0 : LOOPNEQ imm64|near|short [i: a64 nw o64 e0 rel8 ] ND,AR0,OSIZE,NOAPX,LONG,PROT,X86_64 */ + /* 313 327 324 001(e0) 050 : AR0,NWSIZE,OSIZE,NOAPX,LONG,PROT,X86_64 */ + {I_LOOPNEQ, 1, {IMM_NORMAL|BITS64|NEAR|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57000, 190, 1397}, +}; + +static const struct itemplate instrux_LOOPZ[9] = { + /* 0 : LOOPZ imm16|near|short [i: asm nw o16 e1 rel8 ] ND,AR0,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + /* 312 327 320 001(e1) 050 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + {I_LOOPZ, 1, {IMM_NORMAL|BITS16|NEAR|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56881, 189, 1398}, + /* 1 : LOOPZ imm32|near|short [i: asm nw o32 e1 rel8 ] ND,AR0,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + /* 312 327 321 001(e1) 050 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + {I_LOOPZ, 1, {IMM_NORMAL|BITS32|NEAR|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56902, 189, 1401}, + /* 2 : LOOPZ imm64|near|short [i: asm nw o64 e1 rel8 ] ND,AR0,OSIZE,NOAPX,LONG,PROT,X86_64 */ + /* 312 327 324 001(e1) 050 : AR0,NWSIZE,OSIZE,NOAPX,LONG,PROT,X86_64 */ + {I_LOOPZ, 1, {IMM_NORMAL|BITS64|NEAR|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56923, 190, 1404}, + /* 3 : LOOPZ imm16|near|short,reg_cx [i-: a16 nw o16 e1 rel8 ] AR0-1,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + /* 310 327 320 001(e1) 050 : AR0,AR1,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + {I_LOOPZ, 2, {IMM_NORMAL|BITS16|NEAR|SHORT,REG_CX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+56888, 215, 1434}, + /* 4 : LOOPZ imm16|near|short,reg_ecx [i-: a32 nw o16 e1 rel8 ] AR0-1,OSIZE,NOREX,NOAPX,NOLONG,386 */ + /* 311 327 320 001(e1) 050 : AR0,AR1,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,386 */ + {I_LOOPZ, 2, {IMM_NORMAL|BITS16|NEAR|SHORT,REG_ECX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+56895, 216, 1435}, + /* 5 : LOOPZ imm32|near|short,reg_cx [i-: a16 nw o32 e1 rel8 ] AR0-1,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + /* 310 327 321 001(e1) 050 : AR0,AR1,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + {I_LOOPZ, 2, {IMM_NORMAL|BITS32|NEAR|SHORT,REG_CX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+56909, 215, 1436}, + /* 6 : LOOPZ imm32|near|short,reg_ecx [i-: a32 nw o32 e1 rel8 ] AR0-1,OSIZE,NOREX,NOAPX,NOLONG,386 */ + /* 311 327 321 001(e1) 050 : AR0,AR1,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,386 */ + {I_LOOPZ, 2, {IMM_NORMAL|BITS32|NEAR|SHORT,REG_ECX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+56916, 216, 1437}, + /* 7 : LOOPZ imm64|near|short,reg_ecx [i-: a32 nw o64 e1 rel8 ] AR0-1,OSIZE,NOAPX,LONG,PROT,X86_64 */ + /* 311 327 324 001(e1) 050 : AR0,AR1,NWSIZE,OSIZE,NOAPX,LONG,PROT,X86_64 */ + {I_LOOPZ, 2, {IMM_NORMAL|BITS64|NEAR|SHORT,REG_ECX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+56930, 217, 1438}, + /* 8 : LOOPZ imm64|near|short,reg_rcx [i-: a64 nw o64 e1 rel8 ] AR0-1,OSIZE,NOAPX,LONG,PROT,X86_64 */ + /* 313 327 324 001(e1) 050 : AR0,AR1,NWSIZE,OSIZE,NOAPX,LONG,PROT,X86_64 */ + {I_LOOPZ, 2, {IMM_NORMAL|BITS64|NEAR|SHORT,REG_RCX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+56937, 217, 1439}, +}; + +static const struct itemplate instrux_LOOPZW[2] = { + /* 0 : LOOPZW imm16|near|short [i: a16 nw o16 e1 rel8 ] ND,AR0,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + /* 310 327 320 001(e1) 050 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + {I_LOOPZW, 1, {IMM_NORMAL|BITS16|NEAR|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56888, 189, 1399}, + /* 1 : LOOPZW imm32|near|short [i: a16 nw o32 e1 rel8 ] ND,AR0,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + /* 310 327 321 001(e1) 050 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + {I_LOOPZW, 1, {IMM_NORMAL|BITS32|NEAR|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56909, 189, 1402}, +}; + +static const struct itemplate instrux_LOOPZD[3] = { + /* 0 : LOOPZD imm16|near|short [i: a32 nw o16 e1 rel8 ] ND,AR0,OSIZE,NOREX,NOAPX,NOLONG,386 */ + /* 311 327 320 001(e1) 050 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,386 */ + {I_LOOPZD, 1, {IMM_NORMAL|BITS16|NEAR|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56895, 214, 1400}, + /* 1 : LOOPZD imm32|near|short [i: a32 nw o32 e1 rel8 ] ND,AR0,OSIZE,NOREX,NOAPX,NOLONG,386 */ + /* 311 327 321 001(e1) 050 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,386 */ + {I_LOOPZD, 1, {IMM_NORMAL|BITS32|NEAR|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56916, 214, 1403}, + /* 2 : LOOPZD imm64|near|short [i: a32 nw o64 e1 rel8 ] ND,AR0,OSIZE,NOAPX,LONG,PROT,X86_64 */ + /* 311 327 324 001(e1) 050 : AR0,NWSIZE,OSIZE,NOAPX,LONG,PROT,X86_64 */ + {I_LOOPZD, 1, {IMM_NORMAL|BITS64|NEAR|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56930, 190, 1405}, +}; + +static const struct itemplate instrux_LOOPZQ[1] = { + /* 0 : LOOPZQ imm64|near|short [i: a64 nw o64 e1 rel8 ] ND,AR0,OSIZE,NOAPX,LONG,PROT,X86_64 */ + /* 313 327 324 001(e1) 050 : AR0,NWSIZE,OSIZE,NOAPX,LONG,PROT,X86_64 */ + {I_LOOPZQ, 1, {IMM_NORMAL|BITS64|NEAR|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56937, 190, 1406}, +}; + +static const struct itemplate instrux_LOOPNZ[9] = { + /* 0 : LOOPNZ imm16|near|short [i: asm nw o16 e0 rel8 ] ND,AR0,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + /* 312 327 320 001(e0) 050 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + {I_LOOPNZ, 1, {IMM_NORMAL|BITS16|NEAR|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56944, 189, 1407}, + /* 1 : LOOPNZ imm32|near|short [i: asm nw o32 e0 rel8 ] ND,AR0,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + /* 312 327 321 001(e0) 050 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + {I_LOOPNZ, 1, {IMM_NORMAL|BITS32|NEAR|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56965, 189, 1410}, + /* 2 : LOOPNZ imm64|near|short [i: asm nw o64 e0 rel8 ] ND,AR0,OSIZE,NOAPX,LONG,PROT,X86_64 */ + /* 312 327 324 001(e0) 050 : AR0,NWSIZE,OSIZE,NOAPX,LONG,PROT,X86_64 */ + {I_LOOPNZ, 1, {IMM_NORMAL|BITS64|NEAR|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56986, 190, 1413}, + /* 3 : LOOPNZ imm16|near|short,reg_cx [i-: a16 nw o16 e0 rel8 ] AR0-1,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + /* 310 327 320 001(e0) 050 : AR0,AR1,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + {I_LOOPNZ, 2, {IMM_NORMAL|BITS16|NEAR|SHORT,REG_CX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+56951, 215, 1440}, + /* 4 : LOOPNZ imm16|near|short,reg_ecx [i-: a32 nw o16 e0 rel8 ] AR0-1,OSIZE,NOREX,NOAPX,NOLONG,386 */ + /* 311 327 320 001(e0) 050 : AR0,AR1,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,386 */ + {I_LOOPNZ, 2, {IMM_NORMAL|BITS16|NEAR|SHORT,REG_ECX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+56958, 216, 1441}, + /* 5 : LOOPNZ imm32|near|short,reg_cx [i-: a16 nw o32 e0 rel8 ] AR0-1,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + /* 310 327 321 001(e0) 050 : AR0,AR1,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + {I_LOOPNZ, 2, {IMM_NORMAL|BITS32|NEAR|SHORT,REG_CX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+56972, 215, 1442}, + /* 6 : LOOPNZ imm32|near|short,reg_ecx [i-: a32 nw o32 e0 rel8 ] AR0-1,OSIZE,NOREX,NOAPX,NOLONG,386 */ + /* 311 327 321 001(e0) 050 : AR0,AR1,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,386 */ + {I_LOOPNZ, 2, {IMM_NORMAL|BITS32|NEAR|SHORT,REG_ECX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+56979, 216, 1443}, + /* 7 : LOOPNZ imm64|near|short,reg_ecx [i-: a32 nw o64 e0 rel8 ] AR0-1,OSIZE,NOAPX,LONG,PROT,X86_64 */ + /* 311 327 324 001(e0) 050 : AR0,AR1,NWSIZE,OSIZE,NOAPX,LONG,PROT,X86_64 */ + {I_LOOPNZ, 2, {IMM_NORMAL|BITS64|NEAR|SHORT,REG_ECX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+56993, 217, 1444}, + /* 8 : LOOPNZ imm64|near|short,reg_rcx [i-: a64 nw o64 e0 rel8 ] AR0-1,OSIZE,NOAPX,LONG,PROT,X86_64 */ + /* 313 327 324 001(e0) 050 : AR0,AR1,NWSIZE,OSIZE,NOAPX,LONG,PROT,X86_64 */ + {I_LOOPNZ, 2, {IMM_NORMAL|BITS64|NEAR|SHORT,REG_RCX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+57000, 217, 1445}, +}; + +static const struct itemplate instrux_LOOPNZW[2] = { + /* 0 : LOOPNZW imm16|near|short [i: a16 nw o16 e0 rel8 ] ND,AR0,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + /* 310 327 320 001(e0) 050 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + {I_LOOPNZW, 1, {IMM_NORMAL|BITS16|NEAR|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56951, 189, 1408}, + /* 1 : LOOPNZW imm32|near|short [i: a16 nw o32 e0 rel8 ] ND,AR0,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + /* 310 327 321 001(e0) 050 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + {I_LOOPNZW, 1, {IMM_NORMAL|BITS32|NEAR|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56972, 189, 1411}, +}; + +static const struct itemplate instrux_LOOPNZD[3] = { + /* 0 : LOOPNZD imm16|near|short [i: a32 nw o16 e0 rel8 ] ND,AR0,OSIZE,NOREX,NOAPX,NOLONG,386 */ + /* 311 327 320 001(e0) 050 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,386 */ + {I_LOOPNZD, 1, {IMM_NORMAL|BITS16|NEAR|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56958, 214, 1409}, + /* 1 : LOOPNZD imm32|near|short [i: a32 nw o32 e0 rel8 ] ND,AR0,OSIZE,NOREX,NOAPX,NOLONG,386 */ + /* 311 327 321 001(e0) 050 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,386 */ + {I_LOOPNZD, 1, {IMM_NORMAL|BITS32|NEAR|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56979, 214, 1412}, + /* 2 : LOOPNZD imm64|near|short [i: a32 nw o64 e0 rel8 ] ND,AR0,OSIZE,NOAPX,LONG,PROT,X86_64 */ + /* 311 327 324 001(e0) 050 : AR0,NWSIZE,OSIZE,NOAPX,LONG,PROT,X86_64 */ + {I_LOOPNZD, 1, {IMM_NORMAL|BITS64|NEAR|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56993, 190, 1414}, +}; + +static const struct itemplate instrux_LOOPNZQ[1] = { + /* 0 : LOOPNZQ imm64|near|short [i: a64 nw o64 e0 rel8 ] ND,AR0,OSIZE,NOAPX,LONG,PROT,X86_64 */ + /* 313 327 324 001(e0) 050 : AR0,NWSIZE,OSIZE,NOAPX,LONG,PROT,X86_64 */ + {I_LOOPNZQ, 1, {IMM_NORMAL|BITS64|NEAR|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57000, 190, 1415}, +}; + +static const struct itemplate instrux_JMPE[9] = { + /* 0 : JMPE imm16|near [i: norep o16 0f b8 iw ] AR0,OSIZE,IA64 */ + /* 331 320 355 001(b8) 030 : AR0,OSIZE,IA64 */ + {I_JMPE, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57007, 218, 1456}, + /* 1 : JMPE imm32|near [i: norep o32 0f b8 id ] AR0,OSIZE,IA64 */ + /* 331 321 355 001(b8) 040 : AR0,OSIZE,IA64 */ + {I_JMPE, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57014, 218, 1457}, + /* 2 : JMPE sdword64|near [i: norep o64 0f b8 iq ] AR0,OSIZE,LONG,IA64,X86_64 */ + /* 331 324 355 001(b8) 054 : AR0,OSIZE,LONG,PROT,X86_64 */ + {I_JMPE, 1, {SDWORD|BITS64|IMM_NORMAL|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57021, 219, 1458}, + /* 3 : JMPE rm16|near [m: norep o16 0f 00 /6 ] AR0,OSIZE,IA64 */ + /* 331 320 355 001(00) 206 : AR0,OSIZE,IA64 */ + {I_JMPE, 1, {RM_GPR|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57028, 218, 1459}, + /* 4 : JMPE rm32|near [m: norep o32 0f 00 /6 ] AR0,OSIZE,IA64 */ + /* 331 321 355 001(00) 206 : AR0,OSIZE,IA64 */ + {I_JMPE, 1, {RM_GPR|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57035, 218, 1460}, + /* 5 : JMPE rm64|near [m: norep o64 0f 00 /6 ] AR0,OSIZE,LONG,PROT,X86_64 */ + /* 331 324 355 001(00) 206 : AR0,OSIZE,LONG,PROT,X86_64 */ + {I_JMPE, 1, {RM_GPR|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57042, 219, 1461}, + /* 6 : JMPE rm16 [m: norep o16 0f 00 /6 ] AR0,OSIZE,IA64 */ + /* 331 320 355 001(00) 206 : AR0,OSIZE,IA64 */ + {I_JMPE, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57028, 218, 1462}, + /* 7 : JMPE rm32 [m: norep o32 0f 00 /6 ] AR0,OSIZE,IA64 */ + /* 331 321 355 001(00) 206 : AR0,OSIZE,IA64 */ + {I_JMPE, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57035, 218, 1463}, + /* 8 : JMPE rm64 [m: norep o64 0f 00 /6 ] AR0,OSIZE,LONG,PROT,X86_64 */ + /* 331 324 355 001(00) 206 : AR0,OSIZE,LONG,PROT,X86_64 */ + {I_JMPE, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57042, 219, 1464}, +}; + +static const struct itemplate instrux_CALL[23] = { + /* 0 : CALL imm16|near [i: nw o16 e8 rel ] AR0,OSIZE,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 320 001(e8) 064 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_CALL, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67119, 194, 1467}, + /* 1 : CALL imm32|near [i: nw o32 e8 rel ] AR0,OSIZE,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 321 001(e8) 064 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_CALL, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67125, 194, 1468}, + /* 2 : CALL imm64|near [i: nw o64 e8 rel ] AR0,OSIZE,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 001(e8) 064 : AR0,NWSIZE,OSIZE,NOAPX,LONG,BND,PROT,X86_64 */ + {I_CALL, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67131, 220, 1469}, + /* 3 : CALL imm32|near [i: nw o64 e8 rel ] ND,AR0,SX,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 001(e8) 064 : AR0,NWSIZE,SX,NOAPX,LONG,BND,PROT,X86_64 */ + {I_CALL, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67131, 221, 1470}, + /* 4 : CALL rm16|near [m: nw o16 ff /2 ] AR0,OSIZE,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 320 001(ff) 202 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_CALL, 1, {RM_GPR|BITS16|RN_L16|NEAR|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67137, 194, 1471}, + /* 5 : CALL rm32|near [m: nw o32 ff /2 ] AR0,OSIZE,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 321 001(ff) 202 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,BND,386 */ + {I_CALL, 1, {RM_GPR|BITS32|RN_L16|NEAR|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67143, 197, 1472}, + /* 6 : CALL rm64|near [m: nw o64 ff /2 ] LONG,BND,PROT,X86_64 */ + /* 327 324 001(ff) 202 : NWSIZE,LONG,BND,PROT,X86_64 */ + {I_CALL, 1, {RM_GPR|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67149, 222, 1473}, + /* 7 : CALL imm16|far [i: o16 9a iwd seg ] ND,AR0,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + /* 320 001(9a) 034 074 : AR0,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + {I_CALL, 1, {IMM_NORMAL|BITS16|FAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67155, 198, 1475}, + /* 8 : CALL imm32|far [i: o32 9a iwd seg ] ND,AR0,OSIZE,NOREX,NOAPX,NOLONG,386 */ + /* 321 001(9a) 034 074 : AR0,OSIZE,NOREX,NOAPX,NOLONG,386 */ + {I_CALL, 1, {IMM_NORMAL|BITS32|FAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67161, 199, 1476}, + /* 9 : CALL imm16:imm16 [ji: o16 9a iw iw ] SM0,ND,SM1,AR0,SX,NOREX,NOAPX,NOLONG,8086 */ + /* 320 001(9a) 031 030 : SM0,SM1,AR0,SX,NOREX,NOAPX,NOLONG,8086 */ + {I_CALL, 2, {IMM_NORMAL|BITS16|COLON,IMM_NORMAL|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+67167, 200, 1478}, + /* 10 : CALL imm32:imm32 [ji: o32 9a id iw ] SM0,ND,SM1,AR0,SX,NOREX,NOAPX,NOLONG,386 */ + /* 321 001(9a) 041 030 : SM0,SM1,AR0,SX,NOREX,NOAPX,NOLONG,386 */ + {I_CALL, 2, {IMM_NORMAL|BITS32|COLON,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+67173, 201, 1479}, + /* 11 : CALL imm16:imm16|far [ji: o16 9a iw iw ] SM0,ND,SM1,AR0,SX,NOREX,NOAPX,NOLONG,8086 */ + /* 320 001(9a) 031 030 : SM0,SM1,AR0,SX,NOREX,NOAPX,NOLONG,8086 */ + {I_CALL, 2, {IMM_NORMAL|BITS16|COLON,IMM_NORMAL|BITS16|FAR,0,0,0}, NO_DECORATOR, nasm_bytecodes+67167, 200, 1480}, + /* 12 : CALL imm32:imm32|far [ji: o32 9a id iw ] ND,SM0-1,AR0,SX,NOREX,NOAPX,NOLONG,386 */ + /* 321 001(9a) 041 030 : SM0,SM1,AR0,SX,NOREX,NOAPX,NOLONG,386 */ + {I_CALL, 2, {IMM_NORMAL|BITS32|COLON,IMM_NORMAL|BITS32|FAR,0,0,0}, NO_DECORATOR, nasm_bytecodes+67173, 201, 1481}, + /* 13 : CALL imm16:imm16 [ji: o16 9a iw iw ] AR1,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + /* 320 001(9a) 031 030 : AR1,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + {I_CALL, 2, {IMM_NORMAL|BITS16|COLON,IMM_NORMAL|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+67167, 202, 1483}, + /* 14 : CALL imm16:imm32 [ji: o32 9a id iw ] AR1,OSIZE,NOREX,NOAPX,NOLONG,386 */ + /* 321 001(9a) 041 030 : AR1,OSIZE,NOREX,NOAPX,NOLONG,386 */ + {I_CALL, 2, {IMM_NORMAL|BITS16|COLON,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+67173, 203, 1484}, + /* 15 : CALL imm16:imm16|far [ji: o16 9a iw iw ] ND,AR1,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + /* 320 001(9a) 031 030 : AR1,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + {I_CALL, 2, {IMM_NORMAL|BITS16|COLON,IMM_NORMAL|BITS16|FAR,0,0,0}, NO_DECORATOR, nasm_bytecodes+67167, 202, 1485}, + /* 16 : CALL imm16:imm32|far [ji: o32 9a id iw ] ND,AR1,OSIZE,NOREX,NOAPX,NOLONG,386 */ + /* 321 001(9a) 041 030 : AR1,OSIZE,NOREX,NOAPX,NOLONG,386 */ + {I_CALL, 2, {IMM_NORMAL|BITS16|COLON,IMM_NORMAL|BITS32|FAR,0,0,0}, NO_DECORATOR, nasm_bytecodes+67173, 203, 1486}, + /* 17 : CALL mem16|far [m: o16 ff /3 ] AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + /* 320 001(ff) 203 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + {I_CALL, 1, {MEMORY|BITS16|RN_L16|FAR|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71684, 189, 1489}, + /* 18 : CALL mem32|far [m: o32 ff /3 ] AR0,NWSIZE,OSIZE,386 */ + /* 321 001(ff) 203 : AR0,NWSIZE,OSIZE,386 */ + {I_CALL, 1, {MEMORY|BITS32|FAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71689, 204, 1490}, + /* 19 : CALL mem64|far [m: o64 ff /3 ] AR0,NWSIZE,OSIZE,LONG,386,X86_64 */ + /* 324 001(ff) 203 : AR0,NWSIZE,OSIZE,LONG,PROT,X86_64 */ + {I_CALL, 1, {MEMORY|BITS64|FAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71694, 205, 1491}, + /* 20 : CALL rm16 [m: nw o16 ff /2 ] AR0,OSIZE,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 320 001(ff) 202 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_CALL, 1, {RM_GPR|BITS16|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67137, 194, 1494}, + /* 21 : CALL rm32 [m: nw o32 ff /2 ] AR0,OSIZE,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 321 001(ff) 202 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,BND,386 */ + {I_CALL, 1, {RM_GPR|BITS32|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67143, 197, 1495}, + /* 22 : CALL rm64 [m: nw o64 ff /2 ] LONG,BND,PROT,X86_64 */ + /* 327 324 001(ff) 202 : NWSIZE,LONG,BND,PROT,X86_64 */ + {I_CALL, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67149, 222, 1496}, +}; + +static const struct itemplate instrux_RET[2] = { + /* 0 : RET void [ nw odf c3 ] BND,8086 */ + /* 327 322 001(c3) : NWSIZE,BND,8086 */ + {I_RET, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71699, 223, 1498}, + /* 1 : RET imm16 [i: nw odf c2 iw ] BND,8086 */ + /* 327 322 001(c2) 030 : NWSIZE,BND,8086 */ + {I_RET, 1, {IMM_NORMAL|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67179, 223, 1502}, +}; + +static const struct itemplate instrux_RETW[2] = { + /* 0 : RETW void [ nw o16 c3 ] BND,8086 */ + /* 327 320 001(c3) : NWSIZE,BND,8086 */ + {I_RETW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71704, 223, 1499}, + /* 1 : RETW imm16 [i: nw o16 c2 iw ] BND,8086 */ + /* 327 320 001(c2) 030 : NWSIZE,BND,8086 */ + {I_RETW, 1, {IMM_NORMAL|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67185, 223, 1503}, +}; + +static const struct itemplate instrux_RETD[2] = { + /* 0 : RETD void [ nw o32 c3 ] NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 321 001(c3) : NWSIZE,NOREX,NOAPX,NOLONG,BND,386 */ + {I_RETD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71709, 224, 1500}, + /* 1 : RETD imm16 [i: nw o32 c2 iw ] NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 321 001(c2) 030 : NWSIZE,NOREX,NOAPX,NOLONG,BND,386 */ + {I_RETD, 1, {IMM_NORMAL|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67191, 224, 1504}, +}; + +static const struct itemplate instrux_RETQ[2] = { + /* 0 : RETQ void [ nw o64 c3 ] LONG,BND,386,X86_64 */ + /* 327 324 001(c3) : NWSIZE,LONG,BND,PROT,X86_64 */ + {I_RETQ, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71714, 222, 1501}, + /* 1 : RETQ imm16 [i: nw o64 c2 iw ] LONG,BND,386,X86_64 */ + /* 327 324 001(c2) 030 : NWSIZE,LONG,BND,PROT,X86_64 */ + {I_RETQ, 1, {IMM_NORMAL|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67197, 222, 1505}, +}; + +static const struct itemplate instrux_RETF[2] = { + /* 0 : RETF void [ odf cb ] 8086 */ + /* 322 001(cb) : 8086 */ + {I_RETF, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72740, 23, 1506}, + /* 1 : RETF imm16 [i: odf ca iw ] 8086 */ + /* 322 001(ca) 030 : 8086 */ + {I_RETF, 1, {IMM_NORMAL|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71719, 23, 1510}, +}; + +static const struct itemplate instrux_RETFW[2] = { + /* 0 : RETFW void [ o16 cb ] 8086 */ + /* 320 001(cb) : 8086 */ + {I_RETFW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72744, 23, 1507}, + /* 1 : RETFW imm16 [i: o16 ca iw ] 8086 */ + /* 320 001(ca) 030 : 8086 */ + {I_RETFW, 1, {IMM_NORMAL|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71724, 23, 1511}, +}; + +static const struct itemplate instrux_RETFD[2] = { + /* 0 : RETFD void [ o32 cb ] 386 */ + /* 321 001(cb) : 386 */ + {I_RETFD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72748, 3, 1508}, + /* 1 : RETFD imm16 [i: o32 ca iw ] 386 */ + /* 321 001(ca) 030 : 386 */ + {I_RETFD, 1, {IMM_NORMAL|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71729, 3, 1512}, +}; + +static const struct itemplate instrux_RETFQ[2] = { + /* 0 : RETFQ void [ o64 cb ] LONG,386,X86_64 */ + /* 324 001(cb) : LONG,PROT,X86_64 */ + {I_RETFQ, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72752, 24, 1509}, + /* 1 : RETFQ imm16 [i: o64 ca iw ] LONG,386,X86_64 */ + /* 324 001(ca) 030 : LONG,PROT,X86_64 */ + {I_RETFQ, 1, {IMM_NORMAL|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71734, 24, 1513}, +}; + +static const struct itemplate instrux_RETN[2] = { + /* 0 : RETN void [ nw odf c3 ] ND,BND,8086 */ + /* 327 322 001(c3) : NWSIZE,BND,8086 */ + {I_RETN, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71699, 223, 1514}, + /* 1 : RETN imm16 [i: nw odf c2 iw ] ND,BND,8086 */ + /* 327 322 001(c2) 030 : NWSIZE,BND,8086 */ + {I_RETN, 1, {IMM_NORMAL|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67179, 223, 1518}, +}; + +static const struct itemplate instrux_RETNW[2] = { + /* 0 : RETNW void [ nw o16 c3 ] ND,BND,8086 */ + /* 327 320 001(c3) : NWSIZE,BND,8086 */ + {I_RETNW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71704, 223, 1515}, + /* 1 : RETNW imm16 [i: nw o16 c2 iw ] ND,BND,8086 */ + /* 327 320 001(c2) 030 : NWSIZE,BND,8086 */ + {I_RETNW, 1, {IMM_NORMAL|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67185, 223, 1519}, +}; + +static const struct itemplate instrux_RETND[2] = { + /* 0 : RETND void [ nw o32 c3 ] ND,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 321 001(c3) : NWSIZE,NOREX,NOAPX,NOLONG,BND,386 */ + {I_RETND, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71709, 224, 1516}, + /* 1 : RETND imm16 [i: nw o32 c2 iw ] ND,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 321 001(c2) 030 : NWSIZE,NOREX,NOAPX,NOLONG,BND,386 */ + {I_RETND, 1, {IMM_NORMAL|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67191, 224, 1520}, +}; + +static const struct itemplate instrux_RETNQ[2] = { + /* 0 : RETNQ void [ nw o64 c3 ] ND,LONG,BND,386,X86_64 */ + /* 327 324 001(c3) : NWSIZE,LONG,BND,PROT,X86_64 */ + {I_RETNQ, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71714, 222, 1517}, + /* 1 : RETNQ imm16 [i: nw o64 c2 iw ] ND,LONG,BND,386,X86_64 */ + /* 327 324 001(c2) 030 : NWSIZE,LONG,BND,PROT,X86_64 */ + {I_RETNQ, 1, {IMM_NORMAL|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67197, 222, 1521}, +}; + +static const struct itemplate instrux_INT[1] = { + /* 0 : INT imm8 [i: cd ib,u ] 8086 */ + /* 001(cd) 024 : 8086 */ + {I_INT, 1, {IMM_NORMAL|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72756, 23, 1524}, +}; + +static const struct itemplate instrux_INT1[1] = { + /* 0 : INT1 void [ f1 ] 386 */ + /* 001(f1) : 386 */ + {I_INT1, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73457, 3, 1525}, +}; + +static const struct itemplate instrux_INT01[1] = { + /* 0 : INT01 void [ f1 ] ND,386 */ + /* 001(f1) : 386 */ + {I_INT01, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73457, 3, 1526}, +}; + +static const struct itemplate instrux_ICEBP[1] = { + /* 0 : ICEBP void [ f1 ] ND,386 */ + /* 001(f1) : 386 */ + {I_ICEBP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73457, 3, 1527}, +}; + +static const struct itemplate instrux_INT3[1] = { + /* 0 : INT3 void [ cc ] 8086 */ + /* 001(cc) : 8086 */ + {I_INT3, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73460, 23, 1528}, +}; + +static const struct itemplate instrux_INT03[1] = { + /* 0 : INT03 void [ cc ] ND,8086 */ + /* 001(cc) : 8086 */ + {I_INT03, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73460, 23, 1529}, +}; + +static const struct itemplate instrux_BRKPT[1] = { + /* 0 : BRKPT void [ cc ] ND,8086 */ + /* 001(cc) : 8086 */ + {I_BRKPT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73460, 23, 1530}, +}; + +static const struct itemplate instrux_INTO[1] = { + /* 0 : INTO void [ ce ] NOREX,NOAPX,NOLONG,8086 */ + /* 001(ce) : NOREX,NOAPX,NOLONG,8086 */ + {I_INTO, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73463, 225, 1531}, +}; + +static const struct itemplate instrux_SYSCALL[1] = { + /* 0 : SYSCALL void [ 0f 05 ] P6,AMD */ + /* 355 001(05) : P6,AMD */ + {I_SYSCALL, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72760, 226, 1533}, +}; + +static const struct itemplate instrux_SYSENTER[1] = { + /* 0 : SYSENTER void [ 0f 34 ] NOAPX,P6 */ + /* 355 001(34) : NOAPX,P6 */ + {I_SYSENTER, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72764, 227, 1534}, +}; + +static const struct itemplate instrux_SYSEXIT[1] = { + /* 0 : SYSEXIT void [ 0f 35 ] NOAPX,PRIV,P6 */ + /* 355 001(35) : NOAPX,PRIV,P6 */ + {I_SYSEXIT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72768, 228, 1536}, +}; + +static const struct itemplate instrux_SYSRET[1] = { + /* 0 : SYSRET void [ 0f 07 ] PRIV,P6,AMD */ + /* 355 001(07) : PRIV,P6,AMD */ + {I_SYSRET, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72772, 229, 1537}, +}; + +static const struct itemplate instrux_IRET[1] = { + /* 0 : IRET void [ odf cf ] FL,8086 */ + /* 322 001(cf) : FL,8086 */ + {I_IRET, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72776, 56, 1539}, +}; + +static const struct itemplate instrux_IRETW[1] = { + /* 0 : IRETW void [ o16 cf ] FL,8086 */ + /* 320 001(cf) : FL,8086 */ + {I_IRETW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72780, 56, 1540}, +}; + +static const struct itemplate instrux_IRETD[1] = { + /* 0 : IRETD void [ o32 cf ] FL,386 */ + /* 321 001(cf) : FL,386 */ + {I_IRETD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72784, 57, 1541}, +}; + +static const struct itemplate instrux_IRETQ[1] = { + /* 0 : IRETQ void [ o64 cf ] LONG,FL,386,X86_64 */ + /* 324 001(cf) : LONG,FL,PROT,X86_64 */ + {I_IRETQ, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72788, 58, 1542}, +}; + +static const struct itemplate instrux_ERETS[1] = { + /* 0 : ERETS void [ f2 0f 01 ca ] LONG,PRIV,PROT,FRED,X86_64 */ + /* 332 355 002(01 ca) : LONG,PRIV,PROT,FRED,X86_64 */ + {I_ERETS, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67203, 230, 1544}, +}; + +static const struct itemplate instrux_ERETU[1] = { + /* 0 : ERETU void [ f3 0f 01 ca ] LONG,PRIV,PROT,FRED,X86_64 */ + /* 333 355 002(01 ca) : LONG,PRIV,PROT,FRED,X86_64 */ + {I_ERETU, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67209, 230, 1545}, +}; + +static const struct itemplate instrux_CLC[1] = { + /* 0 : CLC void [ f8 ] FL,8086 */ + /* 001(f8) : FL,8086 */ + {I_CLC, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71936, 56, 1548}, +}; + +static const struct itemplate instrux_CLD[1] = { + /* 0 : CLD void [ fc ] FL,8086 */ + /* 001(fc) : FL,8086 */ + {I_CLD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67290, 56, 1549}, +}; + +static const struct itemplate instrux_CLI[1] = { + /* 0 : CLI void [ fa ] FL,8086 */ + /* 001(fa) : FL,8086 */ + {I_CLI, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67500, 56, 1550}, +}; + +static const struct itemplate instrux_CLAC[1] = { + /* 0 : CLAC void [ np 0f 01 ca ] FL,PRIV,SMAP,FUTURE */ + /* 360 355 002(01 ca) : FL,PRIV,SMAP,FUTURE */ + {I_CLAC, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67215, 231, 1551}, +}; + +static const struct itemplate instrux_STC[1] = { + /* 0 : STC void [ f9 ] FL,8086 */ + /* 001(f9) : FL,8086 */ + {I_STC, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71826, 56, 1553}, +}; + +static const struct itemplate instrux_STD[1] = { + /* 0 : STD void [ fd ] FL,8086 */ + /* 001(fd) : FL,8086 */ + {I_STD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73466, 56, 1554}, +}; + +static const struct itemplate instrux_STI[1] = { + /* 0 : STI void [ fb ] FL,8086 */ + /* 001(fb) : FL,8086 */ + {I_STI, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71876, 56, 1555}, +}; + +static const struct itemplate instrux_STAC[1] = { + /* 0 : STAC void [ np 0f 01 cb ] FL,PRIV,SMAP,FUTURE */ + /* 360 355 002(01 cb) : FL,PRIV,SMAP,FUTURE */ + {I_STAC, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67221, 231, 1556}, +}; + +static const struct itemplate instrux_CMC[1] = { + /* 0 : CMC void [ f5 ] FL,8086 */ + /* 001(f5) : FL,8086 */ + {I_CMC, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73469, 56, 1558}, +}; + +static const struct itemplate instrux_LAHF[1] = { + /* 0 : LAHF void [ 9f ] 8086 */ + /* 001(9f) : 8086 */ + {I_LAHF, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73472, 23, 1560}, +}; + +static const struct itemplate instrux_SAHF[1] = { + /* 0 : SAHF void [ 9e ] FL,8086 */ + /* 001(9e) : FL,8086 */ + {I_SAHF, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57389, 56, 1561}, +}; + +static const struct itemplate instrux_SALC[1] = { + /* 0 : SALC void [ d6 ] NOREX,NOAPX,NOLONG,UNDOC,8086 */ + /* 001(d6) : NOREX,NOAPX,NOLONG,UNDOC,8086 */ + {I_SALC, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72531, 232, 1562}, +}; + +static const struct itemplate instrux_PUSHF[1] = { + /* 0 : PUSHF void [ nw odf 9c ] 8086 */ + /* 327 322 001(9c) : NWSIZE,8086 */ + {I_PUSHF, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71739, 233, 1564}, +}; + +static const struct itemplate instrux_PUSHFW[1] = { + /* 0 : PUSHFW void [ nw o16 9c ] 8086 */ + /* 327 320 001(9c) : NWSIZE,8086 */ + {I_PUSHFW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71744, 233, 1565}, +}; + +static const struct itemplate instrux_PUSHFD[1] = { + /* 0 : PUSHFD void [ nw o32 9c ] 386 */ + /* 327 321 001(9c) : NWSIZE,386 */ + {I_PUSHFD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71749, 234, 1566}, +}; + +static const struct itemplate instrux_PUSHFQ[1] = { + /* 0 : PUSHFQ void [ nw o64 9c ] LONG,386,X86_64 */ + /* 327 324 001(9c) : NWSIZE,LONG,PROT,X86_64 */ + {I_PUSHFQ, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71754, 235, 1567}, +}; + +static const struct itemplate instrux_POPF[1] = { + /* 0 : POPF void [ nw odf 9d ] FL,8086 */ + /* 327 322 001(9d) : NWSIZE,FL,8086 */ + {I_POPF, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71759, 236, 1568}, +}; + +static const struct itemplate instrux_POPFW[1] = { + /* 0 : POPFW void [ nw o16 9d ] FL,8086 */ + /* 327 320 001(9d) : NWSIZE,FL,8086 */ + {I_POPFW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71764, 236, 1569}, +}; + +static const struct itemplate instrux_POPFD[1] = { + /* 0 : POPFD void [ nw o32 9d ] FL,386 */ + /* 327 321 001(9d) : NWSIZE,FL,386 */ + {I_POPFD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71769, 237, 1570}, +}; + +static const struct itemplate instrux_POPFQ[1] = { + /* 0 : POPFQ void [ nw o64 9d ] LONG,FL,386,X86_64 */ + /* 327 324 001(9d) : NWSIZE,LONG,FL,PROT,X86_64 */ + {I_POPFQ, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71774, 238, 1571}, +}; + +static const struct itemplate instrux_CMPSB[1] = { + /* 0 : CMPSB void [ repe o8 a6 ] NOAPX,FL,8086 */ + /* 335 001(a6) : NOAPX,FL,8086 */ + {I_CMPSB, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72792, 239, 1574}, +}; + +static const struct itemplate instrux_CMPSW[1] = { + /* 0 : CMPSW void [ repe o16 a7 ] NOAPX,FL,8086 */ + /* 335 320 001(a7) : NOAPX,FL,8086 */ + {I_CMPSW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71779, 239, 1575}, +}; + +static const struct itemplate instrux_CMPSD[2] = { + /* 0 : CMPSD void [ repe o32 a7 ] NOAPX,FL,386 */ + /* 335 321 001(a7) : NOAPX,FL,386 */ + {I_CMPSD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71784, 240, 1576}, + /* 1 : CMPSD xmmreg,xmmrm64,imm8 [rmi: f2 0f c2 /r ib,u ] FL,SSE2,WILLAMETTE */ + /* 332 355 001(c2) 110 026 : FL,SSE2,WILLAMETTE */ + {I_CMPSD, 3, {XMMREG,RM_XMM|BITS64,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+58113, 391, 2609}, +}; + +static const struct itemplate instrux_CMPSQ[1] = { + /* 0 : CMPSQ void [ repe o64 a7 ] NOAPX,LONG,FL,386,X86_64 */ + /* 335 324 001(a7) : NOAPX,LONG,FL,PROT,X86_64 */ + {I_CMPSQ, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71789, 241, 1577}, +}; + +static const struct itemplate instrux_LODSB[1] = { + /* 0 : LODSB void [ o8 ac ] NOAPX,8086 */ + /* 001(ac) : NOAPX,8086 */ + {I_LODSB, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73475, 242, 1578}, +}; + +static const struct itemplate instrux_LODSW[1] = { + /* 0 : LODSW void [ o16 ad ] NOAPX,8086 */ + /* 320 001(ad) : NOAPX,8086 */ + {I_LODSW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72796, 242, 1579}, +}; + +static const struct itemplate instrux_LODSD[1] = { + /* 0 : LODSD void [ o32 ad ] NOAPX,386 */ + /* 321 001(ad) : NOAPX,386 */ + {I_LODSD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72800, 243, 1580}, +}; + +static const struct itemplate instrux_LODSQ[1] = { + /* 0 : LODSQ void [ o64 ad ] NOAPX,LONG,386,X86_64 */ + /* 324 001(ad) : NOAPX,LONG,PROT,X86_64 */ + {I_LODSQ, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72804, 244, 1581}, +}; + +static const struct itemplate instrux_MOVSB[1] = { + /* 0 : MOVSB void [ o8 a4 ] NOAPX,8086 */ + /* 001(a4) : NOAPX,8086 */ + {I_MOVSB, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57417, 242, 1582}, +}; + +static const struct itemplate instrux_MOVSW[1] = { + /* 0 : MOVSW void [ o16 a5 ] NOAPX,8086 */ + /* 320 001(a5) : NOAPX,8086 */ + {I_MOVSW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72808, 242, 1583}, +}; + +static const struct itemplate instrux_MOVSD[3] = { + /* 0 : MOVSD void [ o32 a5 ] NOAPX,386 */ + /* 321 001(a5) : NOAPX,386 */ + {I_MOVSD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72812, 243, 1584}, + /* 1 : MOVSD xmmreg,xmmrm64 [rm: f2 0f 10 /r ] SSE2,WILLAMETTE */ + /* 332 355 001(10) 110 : SSE2,WILLAMETTE */ + {I_MOVSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+69291, 248, 2644}, + /* 2 : MOVSD xmmrm64,xmmreg [mr: f2 0f 11 /r ] SSE2,WILLAMETTE */ + /* 332 355 001(11) 101 : SSE2,WILLAMETTE */ + {I_MOVSD, 2, {RM_XMM|BITS64,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+69297, 248, 2645}, +}; + +static const struct itemplate instrux_MOVSQ[1] = { + /* 0 : MOVSQ void [ o64 a5 ] NOAPX,LONG,386,X86_64 */ + /* 324 001(a5) : NOAPX,LONG,PROT,X86_64 */ + {I_MOVSQ, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72816, 244, 1585}, +}; + +static const struct itemplate instrux_STOSB[1] = { + /* 0 : STOSB void [ o8 aa ] NOAPX,8086 */ + /* 001(aa) : NOAPX,8086 */ + {I_STOSB, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72909, 242, 1586}, +}; + +static const struct itemplate instrux_STOSW[1] = { + /* 0 : STOSW void [ o16 ab ] NOAPX,8086 */ + /* 320 001(ab) : NOAPX,8086 */ + {I_STOSW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72820, 242, 1587}, +}; + +static const struct itemplate instrux_STOSD[1] = { + /* 0 : STOSD void [ o32 ab ] NOAPX,386 */ + /* 321 001(ab) : NOAPX,386 */ + {I_STOSD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72824, 243, 1588}, +}; + +static const struct itemplate instrux_STOSQ[1] = { + /* 0 : STOSQ void [ o64 ab ] NOAPX,LONG,386,X86_64 */ + /* 324 001(ab) : NOAPX,LONG,PROT,X86_64 */ + {I_STOSQ, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72828, 244, 1589}, +}; + +static const struct itemplate instrux_SCASB[1] = { + /* 0 : SCASB void [ repe o8 ae ] NOAPX,FL,8086 */ + /* 335 001(ae) : NOAPX,FL,8086 */ + {I_SCASB, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72832, 239, 1590}, +}; + +static const struct itemplate instrux_SCASW[1] = { + /* 0 : SCASW void [ repe o16 af ] NOAPX,FL,8086 */ + /* 335 320 001(af) : NOAPX,FL,8086 */ + {I_SCASW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71794, 239, 1591}, +}; + +static const struct itemplate instrux_SCASD[1] = { + /* 0 : SCASD void [ repe o32 af ] NOAPX,FL,386 */ + /* 335 321 001(af) : NOAPX,FL,386 */ + {I_SCASD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71799, 240, 1592}, +}; + +static const struct itemplate instrux_SCASQ[1] = { + /* 0 : SCASQ void [ repe o64 af ] NOAPX,LONG,FL,386,X86_64 */ + /* 335 324 001(af) : NOAPX,LONG,FL,PROT,X86_64 */ + {I_SCASQ, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71804, 241, 1593}, +}; + +static const struct itemplate instrux_INSB[1] = { + /* 0 : INSB void [ o8 6c ] 186 */ + /* 001(6c) : 186 */ + {I_INSB, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73478, 245, 1594}, +}; + +static const struct itemplate instrux_INSW[1] = { + /* 0 : INSW void [ o16 6d ] 186 */ + /* 320 001(6d) : 186 */ + {I_INSW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72836, 245, 1595}, +}; + +static const struct itemplate instrux_INSD[1] = { + /* 0 : INSD void [ o32 6d ] 386 */ + /* 321 001(6d) : 386 */ + {I_INSD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72840, 3, 1596}, +}; + +static const struct itemplate instrux_OUTSB[1] = { + /* 0 : OUTSB void [ o8 6e ] 186 */ + /* 001(6e) : 186 */ + {I_OUTSB, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73481, 245, 1597}, +}; + +static const struct itemplate instrux_OUTSW[1] = { + /* 0 : OUTSW void [ o16 6f ] 186 */ + /* 320 001(6f) : 186 */ + {I_OUTSW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72844, 245, 1598}, +}; + +static const struct itemplate instrux_OUTSD[1] = { + /* 0 : OUTSD void [ o32 6f ] 386 */ + /* 321 001(6f) : 386 */ + {I_OUTSD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72848, 3, 1599}, +}; + +static const struct itemplate instrux_LFENCE[2] = { + /* 0 : LFENCE void [ np 0f ae e8 ] LONG,PROT,X86_64,AMD */ + /* 360 355 002(ae e8) : LONG,PROT,X86_64,AMD */ + {I_LFENCE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67227, 246, 1602}, + /* 1 : LFENCE void [ np 0f ae e8 ] SSE2,WILLAMETTE */ + /* 360 355 002(ae e8) : SSE2,WILLAMETTE */ + {I_LFENCE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67227, 248, 2480}, +}; + +static const struct itemplate instrux_MFENCE[2] = { + /* 0 : MFENCE void [ np 0f ae f0 ] LONG,PROT,X86_64,AMD */ + /* 360 355 002(ae f0) : LONG,PROT,X86_64,AMD */ + {I_MFENCE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67233, 246, 1603}, + /* 1 : MFENCE void [ np 0f ae f0 ] SSE2,WILLAMETTE */ + /* 360 355 002(ae f0) : SSE2,WILLAMETTE */ + {I_MFENCE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67233, 248, 2481}, +}; + +static const struct itemplate instrux_SFENCE[2] = { + /* 0 : SFENCE void [ np 0f ae f8 ] LONG,PROT,X86_64,AMD */ + /* 360 355 002(ae f8) : LONG,PROT,X86_64,AMD */ + {I_SFENCE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67239, 246, 1604}, + /* 1 : SFENCE void [ np 0f ae f8 ] KATMAI */ + /* 360 355 002(ae f8) : KATMAI */ + {I_SFENCE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67239, 377, 2445}, +}; + +static const struct itemplate instrux_SERIALIZE[1] = { + /* 0 : SERIALIZE void [ np 0f 01 e8 ] SERIALIZE,FUTURE */ + /* 360 355 002(01 e8) : SERIALIZE,FUTURE */ + {I_SERIALIZE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67245, 247, 1605}, +}; + +static const struct itemplate instrux_CLFLUSH[1] = { + /* 0 : CLFLUSH mem [m: np 0f ae /7 ] SSE2,WILLAMETTE */ + /* 360 355 001(ae) 207 : SSE2,WILLAMETTE */ + {I_CLFLUSH, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67251, 248, 1608}, +}; + +static const struct itemplate instrux_CLFLUSHOPT[1] = { + /* 0 : CLFLUSHOPT mem [m: 66 0f ae /7 ] CLFLUSHOPT,FUTURE */ + /* 361 355 001(ae) 207 : CLFLUSHOPT,FUTURE */ + {I_CLFLUSHOPT, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67257, 249, 1609}, +}; + +static const struct itemplate instrux_CLWB[1] = { + /* 0 : CLWB mem [m: 66 0f ae /6 ] CLWB,FUTURE */ + /* 361 355 001(ae) 206 : CLWB,FUTURE */ + {I_CLWB, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67263, 250, 1610}, +}; + +static const struct itemplate instrux_PCOMMIT[1] = { + /* 0 : PCOMMIT void [ 66 0f ae f8 ] OBSOLETE,NEVER,NOP,FUTURE */ + /* 361 355 002(ae f8) : OBSOLETE,NEVER,NOP,FUTURE */ + {I_PCOMMIT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67269, 251, 1613}, +}; + +static const struct itemplate instrux_CLZERO[4] = { + /* 0 : CLZERO reg_ax [-: a16 0f 01 fc ] NOLONG,CLZERO,FUTURE,AMD */ + /* 310 355 002(01 fc) : NOREX,NOAPX,NOLONG,CLZERO,FUTURE,AMD */ + {I_CLZERO, 1, {REG_AX|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67275, 252, 1616}, + /* 1 : CLZERO reg_eax [-: a32 0f 01 fc ] CLZERO,FUTURE,AMD */ + /* 311 355 002(01 fc) : CLZERO,FUTURE,AMD */ + {I_CLZERO, 1, {REG_EAX,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67281, 253, 1617}, + /* 2 : CLZERO reg_rax [-: a64 0f 01 fc ] LONG,PROT,CLZERO,X86_64,AMD */ + /* 313 355 002(01 fc) : LONG,PROT,CLZERO,X86_64,AMD */ + {I_CLZERO, 1, {REG_RAX,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67287, 254, 1618}, + /* 3 : CLZERO void [ 0f 01 fc ] ND,CLZERO,FUTURE,AMD */ + /* 355 002(01 fc) : CLZERO,FUTURE,AMD */ + {I_CLZERO, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67288, 253, 1619}, +}; + +static const struct itemplate instrux_INVD[1] = { + /* 0 : INVD void [ 0f 08 ] PRIV,486 */ + /* 355 001(08) : PRIV,486 */ + {I_INVD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72852, 255, 1621}, +}; + +static const struct itemplate instrux_WBINVD[1] = { + /* 0 : WBINVD void [ np 0f 09 ] PRIV,486 */ + /* 360 355 001(09) : PRIV,486 */ + {I_WBINVD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71809, 255, 1622}, +}; + +static const struct itemplate instrux_WBNOINVD[1] = { + /* 0 : WBNOINVD void [ f3 0f 09 ] PRIV,WBNOINVD,FUTURE */ + /* 333 355 001(09) : PRIV,WBNOINVD,FUTURE */ + {I_WBNOINVD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71814, 256, 1623}, +}; + +static const struct itemplate instrux_INVPCID[3] = { + /* 0 : INVPCID reg32,mem128 [rm: 66 0f38 82 /r ] NOREX,NOAPX,NOLONG,PRIV,INVPCID,FUTURE */ + /* 361 356 001(82) 110 : NOREX,NOAPX,NOLONG,PRIV,INVPCID,FUTURE */ + {I_INVPCID, 2, {REG_GPR|BITS32|RN_L16,MEMORY|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+67293, 257, 1625}, + /* 1 : INVPCID reg64,mem128 [rm: 66 0f38 82 /r ] LONG,PRIV,PROT,INVPCID,X86_64 */ + /* 361 356 001(82) 110 : NOAPX,LONG,PRIV,PROT,INVPCID,X86_64 */ + {I_INVPCID, 2, {REG_GPR|BITS64|RN_L16,MEMORY|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+67293, 258, 1626}, + /* 2 : INVPCID reg64,mem128 [rm: evex.nf0.nd0.l0.f3.m4.w1 f2 /r ] LONG,PRIV,PROT,APX,INVPCID,X86_64 */ + /* 250(f4 fe 08) 300 001(f2) 110 : LONG,EVEX,PRIV,PROT,APX,INVPCID,X86_64 */ + {I_INVPCID, 2, {REG_GPR|BITS64,MEMORY|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+24682, 259, 1627}, +}; + +static const struct itemplate instrux_INVLPG[1] = { + /* 0 : INVLPG mem [m: 0f 01 /7 ] PRIV,486 */ + /* 355 001(01) 207 : PRIV,486 */ + {I_INVLPG, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71819, 255, 1628}, +}; + +static const struct itemplate instrux_INVLPGA[4] = { + /* 0 : INVLPGA reg_ax,reg_ecx [--: a16 0f 01 df ] NOLONG,X86_64,AMD */ + /* 310 355 002(01 df) : NOREX,NOAPX,NOLONG,X86_64,AMD */ + {I_INVLPGA, 2, {REG_AX|RN_L16,REG_ECX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+67299, 260, 1629}, + /* 1 : INVLPGA reg_eax,reg_ecx [--: a32 0f 01 df ] X86_64,AMD */ + /* 311 355 002(01 df) : X86_64,AMD */ + {I_INVLPGA, 2, {REG_EAX,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67305, 261, 1630}, + /* 2 : INVLPGA reg_rax,reg_ecx [--: a64 0f 01 df ] LONG,PROT,X86_64,AMD */ + /* 313 355 002(01 df) : LONG,PROT,X86_64,AMD */ + {I_INVLPGA, 2, {REG_RAX,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67311, 246, 1631}, + /* 3 : INVLPGA void [ adf 0f 01 df ] ND,X86_64,AMD */ + /* 312 355 002(01 df) : X86_64,AMD */ + {I_INVLPGA, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67317, 261, 1632}, +}; + +static const struct itemplate instrux_RDPMC[1] = { + /* 0 : RDPMC void [ 0f 33 ] NOAPX,P6 */ + /* 355 001(33) : NOAPX,P6 */ + {I_RDPMC, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72856, 227, 1635}, +}; + +static const struct itemplate instrux_RDTSC[1] = { + /* 0 : RDTSC void [ 0f 31 ] NOAPX,PENT */ + /* 355 001(31) : NOAPX,PENT */ + {I_RDTSC, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72860, 262, 1636}, +}; + +static const struct itemplate instrux_RDTSCP[1] = { + /* 0 : RDTSCP void [ 0f 01 f9 ] X86_64 */ + /* 355 002(01 f9) : X86_64 */ + {I_RDTSCP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71824, 263, 1637}, +}; + +static const struct itemplate instrux_RDRAND[3] = { + /* 0 : RDRAND reg16 [m: o16 0f c7 /6 ] FL,RDRAND,FUTURE */ + /* 320 355 001(c7) 206 : FL,RDRAND,FUTURE */ + {I_RDRAND, 1, {REG_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67323, 264, 1638}, + /* 1 : RDRAND reg32 [m: o32 0f c7 /6 ] FL,RDRAND,FUTURE */ + /* 321 355 001(c7) 206 : FL,RDRAND,FUTURE */ + {I_RDRAND, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67329, 264, 1639}, + /* 2 : RDRAND reg64 [m: o64 0f c7 /6 ] LONG,FL,PROT,RDRAND,X86_64 */ + /* 324 355 001(c7) 206 : LONG,FL,PROT,RDRAND,X86_64 */ + {I_RDRAND, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67335, 265, 1640}, +}; + +static const struct itemplate instrux_RDSEED[3] = { + /* 0 : RDSEED reg16 [m: o16 0f c7 /7 ] FL,RDSEED,FUTURE */ + /* 320 355 001(c7) 207 : FL,RDSEED,FUTURE */ + {I_RDSEED, 1, {REG_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67341, 266, 1641}, + /* 1 : RDSEED reg32 [m: o32 0f c7 /7 ] FL,RDSEED,FUTURE */ + /* 321 355 001(c7) 207 : FL,RDSEED,FUTURE */ + {I_RDSEED, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+51325, 266, 1642}, + /* 2 : RDSEED reg64 [m: o64 0f c7 /7 ] LONG,FL,PROT,RDSEED,X86_64 */ + /* 324 355 001(c7) 207 : LONG,FL,PROT,RDSEED,X86_64 */ + {I_RDSEED, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+51333, 267, 1643}, +}; + +static const struct itemplate instrux_RDPID[3] = { + /* 0 : RDPID reg64 [m: f3 0f c7 /7 ] ND,OPT,LONG,PROT,RDPID,X86_64 */ + /* 333 355 001(c7) 207 : OPT,LONG,PROT,RDPID,X86_64 */ + {I_RDPID, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67347, 268, 1644}, + /* 1 : RDPID reg32 [m: f3 !osp o32 0f c7 /7 ] RDPID,FUTURE */ + /* 333 364 321 355 001(c7) 207 : RDPID,FUTURE */ + {I_RDPID, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+51323, 269, 1645}, + /* 2 : RDPID reg64 [m: f3 !osp o64 0f c7 /7 ] LONG,PROT,RDPID,X86_64 */ + /* 333 364 324 355 001(c7) 207 : LONG,PROT,RDPID,X86_64 */ + {I_RDPID, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+51331, 270, 1646}, +}; + +static const struct itemplate instrux_CLTS[1] = { + /* 0 : CLTS void [ 0f 06 ] PRIV,286 */ + /* 355 001(06) : PRIV,286 */ + {I_CLTS, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72864, 271, 1649}, +}; + +static const struct itemplate instrux_CPUID[1] = { + /* 0 : CPUID void [ 0f a2 ] PENT */ + /* 355 001(a2) : PENT */ + {I_CPUID, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72868, 272, 1650}, +}; + +static const struct itemplate instrux_LMSW[1] = { + /* 0 : LMSW rm16 [m: 0f 01 /6 ] PRIV,286 */ + /* 355 001(01) 206 : PRIV,286 */ + {I_LMSW, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71829, 271, 1651}, +}; + +static const struct itemplate instrux_SMSW[5] = { + /* 0 : SMSW rm16 [m: 0f 01 /4 ] 286 */ + /* 355 001(01) 204 : 286 */ + {I_SMSW, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67372, 273, 1652}, + /* 1 : SMSW reg64 [m: o64nw 0f 01 /4 ] ND,LONG,PROT,X86_64 */ + /* 323 355 001(01) 204 : NWSIZE,LONG,PROT,X86_64 */ + {I_SMSW, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67353, 235, 1653}, + /* 2 : SMSW reg16 [m: o16 0f 01 /4 ] 286 */ + /* 320 355 001(01) 204 : 286 */ + {I_SMSW, 1, {REG_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67359, 273, 1654}, + /* 3 : SMSW reg32 [m: o32 0f 01 /4 ] 386 */ + /* 321 355 001(01) 204 : 386 */ + {I_SMSW, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67365, 3, 1655}, + /* 4 : SMSW reg64 [m: o64 0f 01 /4 ] LONG,PROT,X86_64 */ + /* 324 355 001(01) 204 : LONG,PROT,X86_64 */ + {I_SMSW, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67371, 24, 1656}, +}; + +static const struct itemplate instrux_WRMSR[1] = { + /* 0 : WRMSR void [ 0f 30 ] NOAPX,PRIV,PENT */ + /* 355 001(30) : NOAPX,PRIV,PENT */ + {I_WRMSR, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72872, 277, 1669}, +}; + +static const struct itemplate instrux_RDMSR[3] = { + /* 0 : RDMSR void [ 0f 32 ] NOAPX,PRIV,PENT */ + /* 355 001(32) : NOAPX,PRIV,PENT */ + {I_RDMSR, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72876, 277, 1670}, + /* 1 : RDMSR reg64,imm32 [mi: vex.128.f2.m7.w0 f6 /0 id ] LONG,PRIV,PROT,MSR_IMM,X86_64,FUTURE */ + /* 270(007 003) 001(f6) 200 041 : NOAPX,LONG,VEX,PRIV,PROT,MSR_IMM,FUTURE */ + {I_RDMSR, 2, {REG_GPR|BITS64|RN_L16,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+51339, 278, 1671}, + /* 2 : RDMSR reg64,imm32 [mi: evex.128.f2.m7.w0 f6 /0 id ] LONG,PRIV,PROT,MSR_IMM,X86_64,FUTURE,APX */ + /* 250(f7 7f 08) 300 001(f6) 200 041 : LONG,EVEX,PRIV,PROT,APX,MSR_IMM,FUTURE */ + {I_RDMSR, 2, {REG_GPR|BITS64,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+13023, 279, 1671}, +}; + +static const struct itemplate instrux_WRMSRNS[3] = { + /* 0 : WRMSRNS void [ np 0f 01 c6 ] PRIV,WRMSRNS,FUTURE */ + /* 360 355 002(01 c6) : PRIV,WRMSRNS,FUTURE */ + {I_WRMSRNS, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67413, 280, 1672}, + /* 1 : WRMSRNS imm32,reg64 [im: vex.128.f3.m7.w0 f6 /0 id ] LONG,PRIV,PROT,MSR_IMM,X86_64,FUTURE */ + /* 270(007 002) 001(f6) 210 040 : NOAPX,LONG,VEX,PRIV,PROT,MSR_IMM,FUTURE */ + {I_WRMSRNS, 2, {IMM_NORMAL|BITS32,REG_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+51347, 278, 1673}, + /* 2 : WRMSRNS imm32,reg64 [im: evex.128.f3.m7.w0 f6 /0 id ] LONG,PRIV,PROT,MSR_IMM,X86_64,FUTURE,APX */ + /* 250(f7 7e 08) 300 001(f6) 210 040 : LONG,EVEX,PRIV,PROT,APX,MSR_IMM,FUTURE */ + {I_WRMSRNS, 2, {IMM_NORMAL|BITS32,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+13033, 279, 1673}, +}; + +static const struct itemplate instrux_RDMSRLIST[1] = { + /* 0 : RDMSRLIST void [ f2 0f 01 c6 ] LONG,PRIV,PROT,MSRLIST,X86_64 */ + /* 332 355 002(01 c6) : LONG,PRIV,PROT,MSRLIST,X86_64 */ + {I_RDMSRLIST, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67419, 281, 1674}, +}; + +static const struct itemplate instrux_WRMSRLIST[1] = { + /* 0 : WRMSRLIST void [ f3 0f 01 c6 ] LONG,PRIV,PROT,MSRLIST,X86_64 */ + /* 333 355 002(01 c6) : LONG,PRIV,PROT,MSRLIST,X86_64 */ + {I_WRMSRLIST, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67425, 281, 1675}, +}; + +static const struct itemplate instrux_URDMSR[4] = { + /* 0 : URDMSR reg64,reg64 [mr: f2 0f 38 f8 /r ] NOAPX,FUTURE */ + /* 332 355 002(38 f8) 101 : NOAPX,FUTURE */ + {I_URDMSR, 2, {REG_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+57049, 282, 1677}, + /* 1 : URDMSR reg64,reg64 [mr: evex.nf0.nd0.l0.f2.m4.w0 f8 /r ] LONG,PROT,APX,X86_64,FUTURE */ + /* 250(f4 7f 08) 300 001(f8) 101 : LONG,EVEX,PROT,APX,FUTURE */ + {I_URDMSR, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+24691, 283, 1678}, + /* 2 : URDMSR reg64,imm32 [mi: vex.128.f2.m7.w0 f8 /0 id ] FUTURE */ + /* 270(007 003) 001(f8) 200 041 : NOAPX,VEX,FUTURE */ + {I_URDMSR, 2, {REG_GPR|BITS64|RN_L16,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+51355, 284, 1679}, + /* 3 : URDMSR reg64,imm32 [mi: evex.128.f2.m7.w0 f8 /0 id ] FUTURE,APX */ + /* 250(f7 7f 08) 300 001(f8) 200 041 : LONG,EVEX,PROT,APX,FUTURE */ + {I_URDMSR, 2, {REG_GPR|BITS64,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+13043, 283, 1679}, +}; + +static const struct itemplate instrux_UWRMSR[4] = { + /* 0 : UWRMSR reg64,reg64 [rm: f3 0f 38 f8 /r ] NOAPX,FUTURE */ + /* 333 355 002(38 f8) 110 : NOAPX,FUTURE */ + {I_UWRMSR, 2, {REG_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+57056, 282, 1680}, + /* 1 : UWRMSR reg64,reg64 [rm: evex.nf0.nd0.l0.f3.m4.w0 f8 /r ] LONG,PROT,APX,X86_64,FUTURE */ + /* 250(f4 7e 08) 300 001(f8) 110 : LONG,EVEX,PROT,APX,FUTURE */ + {I_UWRMSR, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+24700, 283, 1681}, + /* 2 : UWRMSR imm32,reg64 [im: vex.128.f3.m7.w0 f8 /0 id ] FUTURE */ + /* 270(007 002) 001(f8) 210 040 : NOAPX,VEX,FUTURE */ + {I_UWRMSR, 2, {IMM_NORMAL|BITS32,REG_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+51363, 284, 1682}, + /* 3 : UWRMSR imm32,reg64 [im: evex.128.f3.m7.w0 f8 /0 id ] FUTURE,APX */ + /* 250(f7 7e 08) 300 001(f8) 210 040 : LONG,EVEX,PROT,APX,FUTURE */ + {I_UWRMSR, 2, {IMM_NORMAL|BITS32,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+13053, 283, 1682}, +}; + +static const struct itemplate instrux_UMOV[6] = { + /* 0 : UMOV rm8,reg8 [mr: np o8 0f 10 /r ] SM0,ND,SM1,NOREX,NOAPX,NOLONG,UNDOC,OBSOLETE,386 */ + /* 360 355 001(10) 101 : SM0,SM1,NOREX,NOAPX,NOLONG,UNDOC,OBSOLETE,386 */ + {I_UMOV, 2, {RM_GPR|BITS8|RN_L16,REG_GPR|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+67431, 285, 1684}, + /* 1 : UMOV rm16,reg16 [mr: np o16 0f 11 /r ] SM0,ND,SM1,NOREX,NOAPX,NOLONG,UNDOC,OBSOLETE,386 */ + /* 360 320 355 001(11) 101 : SM0,SM1,NOREX,NOAPX,NOLONG,UNDOC,OBSOLETE,386 */ + {I_UMOV, 2, {RM_GPR|BITS16|RN_L16,REG_GPR|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+57063, 285, 1685}, + /* 2 : UMOV rm32,reg32 [mr: np o32 0f 11 /r ] ND,SM0-1,NOREX,NOAPX,NOLONG,UNDOC,OBSOLETE,386 */ + /* 360 321 355 001(11) 101 : SM0,SM1,NOREX,NOAPX,NOLONG,UNDOC,OBSOLETE,386 */ + {I_UMOV, 2, {RM_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+57070, 285, 1686}, + /* 3 : UMOV reg8,rm8 [rm: np o8 0f 12 /r ] SM0,ND,SM1,NOREX,NOAPX,NOLONG,UNDOC,OBSOLETE,386 */ + /* 360 355 001(12) 110 : SM0,SM1,NOREX,NOAPX,NOLONG,UNDOC,OBSOLETE,386 */ + {I_UMOV, 2, {REG_GPR|BITS8|RN_L16,RM_GPR|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+67437, 285, 1687}, + /* 4 : UMOV reg16,rm16 [rm: np o16 0f 13 /r ] ND,SM0-1,NOREX,NOAPX,NOLONG,UNDOC,OBSOLETE,386 */ + /* 360 320 355 001(13) 110 : SM0,SM1,NOREX,NOAPX,NOLONG,UNDOC,OBSOLETE,386 */ + {I_UMOV, 2, {REG_GPR|BITS16|RN_L16,RM_GPR|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+57077, 285, 1688}, + /* 5 : UMOV reg32,rm32 [rm: np o32 0f 13 /r ] ND,SM0-1,NOREX,NOAPX,NOLONG,UNDOC,OBSOLETE,386 */ + /* 360 321 355 001(13) 110 : SM0,SM1,NOREX,NOAPX,NOLONG,UNDOC,OBSOLETE,386 */ + {I_UMOV, 2, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+57084, 285, 1689}, +}; + +static const struct itemplate instrux_BB0_RESET[1] = { + /* 0 : BB0_RESET void [ m1 3a ] ND,NOREX,NOAPX,NOLONG,OBSOLETE,PENT,CYRIX */ + /* 355 001(3a) : NOREX,NOAPX,NOLONG,OBSOLETE,PENT,CYRIX */ + {I_BB0_RESET, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72880, 286, 1692}, +}; + +static const struct itemplate instrux_BB1_RESET[1] = { + /* 0 : BB1_RESET void [ m1 3b ] ND,NOREX,NOAPX,NOLONG,OBSOLETE,PENT,CYRIX */ + /* 355 001(3b) : NOREX,NOAPX,NOLONG,OBSOLETE,PENT,CYRIX */ + {I_BB1_RESET, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72884, 286, 1693}, +}; + +static const struct itemplate instrux_CPU_READ[1] = { + /* 0 : CPU_READ void [ m1 3d ] ND,NOREX,NOAPX,NOLONG,OBSOLETE,PENT,CYRIX */ + /* 355 001(3d) : NOREX,NOAPX,NOLONG,OBSOLETE,PENT,CYRIX */ + {I_CPU_READ, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72888, 286, 1694}, +}; + +static const struct itemplate instrux_CPU_WRITE[1] = { + /* 0 : CPU_WRITE void [ m1 3c ] ND,NOREX,NOAPX,NOLONG,OBSOLETE,PENT,CYRIX */ + /* 355 001(3c) : NOREX,NOAPX,NOLONG,OBSOLETE,PENT,CYRIX */ + {I_CPU_WRITE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72892, 286, 1695}, +}; + +static const struct itemplate instrux_DMINT[1] = { + /* 0 : DMINT void [ m1 39 ] ND,NOREX,NOAPX,NOLONG,OBSOLETE,P6,CYRIX */ + /* 355 001(39) : NOREX,NOAPX,NOLONG,OBSOLETE,P6,CYRIX */ + {I_DMINT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72896, 287, 1696}, +}; + +static const struct itemplate instrux_RDM[1] = { + /* 0 : RDM void [ 0f 3a ] ND,NOREX,NOAPX,NOLONG,OBSOLETE,P6,CYRIX */ + /* 355 001(3a) : NOREX,NOAPX,NOLONG,OBSOLETE,P6,CYRIX */ + {I_RDM, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72880, 287, 1697}, +}; + +static const struct itemplate instrux_SMINT[1] = { + /* 0 : SMINT void [ m1 38 ] ND,NOREX,NOAPX,NOLONG,OBSOLETE,P6,CYRIX */ + /* 355 001(38) : NOREX,NOAPX,NOLONG,OBSOLETE,P6,CYRIX */ + {I_SMINT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72900, 287, 1698}, +}; + +static const struct itemplate instrux_SMINTOLD[1] = { + /* 0 : SMINTOLD void [ m1 7e ] ND,NOREX,NOAPX,NOLONG,OBSOLETE,486,CYRIX */ + /* 355 001(7e) : NOREX,NOAPX,NOLONG,OBSOLETE,486,CYRIX */ + {I_SMINTOLD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72904, 288, 1699}, +}; + +static const struct itemplate instrux_RSM[1] = { + /* 0 : RSM void [ 0f aa ] FL,SMM,PENT */ + /* 355 001(aa) : FL,SMM,PENT */ + {I_RSM, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72908, 289, 1702}, +}; + +static const struct itemplate instrux_WRSHR[1] = { + /* 0 : WRSHR rm32 [m: o32 0f 37 /0 ] ND,NOREX,NOAPX,NOLONG,SMM,OBSOLETE,P6,CYRIX */ + /* 321 355 001(37) 200 : NOREX,NOAPX,NOLONG,SMM,OBSOLETE,P6,CYRIX */ + {I_WRSHR, 1, {RM_GPR|BITS32|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67443, 290, 1705}, +}; + +static const struct itemplate instrux_RDSHR[1] = { + /* 0 : RDSHR rm32 [m: o32 0f 36 /0 ] ND,NOREX,NOAPX,NOLONG,SMM,OBSOLETE,P6,CYRIX */ + /* 321 355 001(36) 200 : NOREX,NOAPX,NOLONG,SMM,OBSOLETE,P6,CYRIX */ + {I_RDSHR, 1, {RM_GPR|BITS32|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67449, 290, 1706}, +}; + +static const struct itemplate instrux_RSDC[1] = { + /* 0 : RSDC reg_sreg,mem80 [rm: 0f 79 /r ] ND,NOREX,NOAPX,NOLONG,SMM,OBSOLETE,486,CYRIX */ + /* 355 001(79) 110 : NOREX,NOAPX,NOLONG,SMM,OBSOLETE,486,CYRIX */ + {I_RSDC, 2, {REG_SREG|RN_L16,MEMORY|BITS80|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69670, 291, 1707}, +}; + +static const struct itemplate instrux_RSLDT[1] = { + /* 0 : RSLDT mem80 [m: 0f 7b /0 ] ND,NOREX,NOAPX,NOLONG,SMM,OBSOLETE,486,CYRIX */ + /* 355 001(7b) 200 : NOREX,NOAPX,NOLONG,SMM,OBSOLETE,486,CYRIX */ + {I_RSLDT, 1, {MEMORY|BITS80|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71844, 291, 1708}, +}; + +static const struct itemplate instrux_RSTS[1] = { + /* 0 : RSTS mem80 [m: 0f 7d /0 ] ND,NOREX,NOAPX,NOLONG,SMM,OBSOLETE,486,CYRIX */ + /* 355 001(7d) 200 : NOREX,NOAPX,NOLONG,SMM,OBSOLETE,486,CYRIX */ + {I_RSTS, 1, {MEMORY|BITS80|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71849, 291, 1709}, +}; + +static const struct itemplate instrux_SVDC[1] = { + /* 0 : SVDC mem80,reg_sreg [mr: m1 78 /r ] ND,NOREX,NOAPX,NOLONG,SMM,OBSOLETE,486,CYRIX */ + /* 355 001(78) 101 : NOREX,NOAPX,NOLONG,SMM,OBSOLETE,486,CYRIX */ + {I_SVDC, 2, {MEMORY|BITS80|RN_L16,REG_SREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58178, 291, 1710}, +}; + +static const struct itemplate instrux_SVLDT[1] = { + /* 0 : SVLDT mem80 [m: m1 7a /0 ] ND,NOREX,NOAPX,NOLONG,SMM,OBSOLETE,486,CYRIX */ + /* 355 001(7a) 200 : NOREX,NOAPX,NOLONG,SMM,OBSOLETE,486,CYRIX */ + {I_SVLDT, 1, {MEMORY|BITS80|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71854, 291, 1711}, +}; + +static const struct itemplate instrux_SVTS[1] = { + /* 0 : SVTS mem80 [m: m1 7c /0 ] ND,NOREX,NOAPX,NOLONG,SMM,OBSOLETE,486,CYRIX */ + /* 355 001(7c) 200 : NOREX,NOAPX,NOLONG,SMM,OBSOLETE,486,CYRIX */ + {I_SVTS, 1, {MEMORY|BITS80|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71859, 291, 1712}, +}; + +static const struct itemplate instrux_HLT[1] = { + /* 0 : HLT void [ f4 ] PRIV,8086 */ + /* 001(f4) : PRIV,8086 */ + {I_HLT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73484, 292, 1715}, +}; + +static const struct itemplate instrux_PAUSE[1] = { + /* 0 : PAUSE void [ osz f3i 90 ] 8086 */ + /* 330 333 001(90) : 8086 */ + {I_PAUSE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71864, 23, 1717}, +}; + +static const struct itemplate instrux_MONITOR[4] = { + /* 0 : MONITOR void [ asm 0f 01 c8 ] MONITOR,PRESCOTT */ + /* 312 355 002(01 c8) : MONITOR,PRESCOTT */ + {I_MONITOR, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67455, 293, 1719}, + /* 1 : MONITOR reg_ax,reg_ecx,reg_edx [---: a16 0f 01 c8 ] ND,NOLONG,MONITOR,PRESCOTT */ + /* 310 355 002(01 c8) : NOREX,NOAPX,NOLONG,MONITOR,PRESCOTT */ + {I_MONITOR, 3, {REG_AX|RN_L16,REG_ECX|RN_L16,REG_EDX|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+67461, 294, 1723}, + /* 2 : MONITOR reg_eax,reg_ecx,reg_edx [---: a32 0f 01 c8 ] ND,MONITOR,PRESCOTT */ + /* 311 355 002(01 c8) : MONITOR,PRESCOTT */ + {I_MONITOR, 3, {REG_EAX,REG_ECX,REG_EDX,0,0}, NO_DECORATOR, nasm_bytecodes+67467, 293, 1724}, + /* 3 : MONITOR reg_rax,reg_ecx,reg_edx [---: a64 0f 01 c8 ] ND,LONG,PROT,MONITOR,X86_64 */ + /* 313 355 002(01 c8) : LONG,PROT,MONITOR,X86_64 */ + {I_MONITOR, 3, {REG_RAX,REG_ECX,REG_EDX,0,0}, NO_DECORATOR, nasm_bytecodes+67473, 295, 1725}, +}; + +static const struct itemplate instrux_MONITORW[1] = { + /* 0 : MONITORW void [ a16 0f 01 c8 ] NOLONG,MONITOR,PRESCOTT */ + /* 310 355 002(01 c8) : NOREX,NOAPX,NOLONG,MONITOR,PRESCOTT */ + {I_MONITORW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67461, 294, 1720}, +}; + +static const struct itemplate instrux_MONITORD[1] = { + /* 0 : MONITORD void [ a32 0f 01 c8 ] MONITOR,PRESCOTT */ + /* 311 355 002(01 c8) : MONITOR,PRESCOTT */ + {I_MONITORD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67467, 293, 1721}, +}; + +static const struct itemplate instrux_MONITORQ[1] = { + /* 0 : MONITORQ void [ a64 0f 01 c8 ] LONG,MONITOR,PRESCOTT,X86_64 */ + /* 313 355 002(01 c8) : LONG,PROT,MONITOR,X86_64 */ + {I_MONITORQ, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67473, 295, 1722}, +}; + +static const struct itemplate instrux_MWAIT[2] = { + /* 0 : MWAIT void [ 0f 01 c9 ] MONITOR,PRESCOTT */ + /* 355 002(01 c9) : MONITOR,PRESCOTT */ + {I_MWAIT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71869, 293, 1726}, + /* 1 : MWAIT reg_eax,reg_ecx [--: 0f 01 c9 ] ND,MONITOR,PRESCOTT */ + /* 355 002(01 c9) : MONITOR,PRESCOTT */ + {I_MWAIT, 2, {REG_EAX,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+71869, 293, 1727}, +}; + +static const struct itemplate instrux_MONITORX[7] = { + /* 0 : MONITORX void [ asm 0f 01 fa ] MONITORX,FUTURE,AMD */ + /* 312 355 002(01 fa) : MONITORX,FUTURE,AMD */ + {I_MONITORX, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67479, 296, 1729}, + /* 1 : MONITORX void [ a16 0f 01 fa ] NOLONG,MONITORX,FUTURE,AMD */ + /* 310 355 002(01 fa) : NOREX,NOAPX,NOLONG,MONITORX,FUTURE,AMD */ + {I_MONITORX, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67485, 297, 1730}, + /* 2 : MONITORX void [ a32 0f 01 fa ] MONITORX,FUTURE,AMD */ + /* 311 355 002(01 fa) : MONITORX,FUTURE,AMD */ + {I_MONITORX, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67491, 296, 1731}, + /* 3 : MONITORX void [ a64 0f 01 fa ] LONG,MONITORX,X86_64,FUTURE,AMD */ + /* 313 355 002(01 fa) : LONG,PROT,MONITORX,FUTURE,AMD */ + {I_MONITORX, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67497, 298, 1732}, + /* 4 : MONITORX reg_ax,reg_ecx,reg_edx [---: a16 0f 01 fa ] ND,NOLONG,MONITORX,FUTURE,AMD */ + /* 310 355 002(01 fa) : NOREX,NOAPX,NOLONG,MONITORX,FUTURE,AMD */ + {I_MONITORX, 3, {REG_AX|RN_L16,REG_ECX|RN_L16,REG_EDX|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+67485, 297, 1733}, + /* 5 : MONITORX reg_eax,reg_ecx,reg_edx [---: a32 0f 01 fa ] ND,MONITORX,FUTURE,AMD */ + /* 311 355 002(01 fa) : MONITORX,FUTURE,AMD */ + {I_MONITORX, 3, {REG_EAX,REG_ECX,REG_EDX,0,0}, NO_DECORATOR, nasm_bytecodes+67491, 296, 1734}, + /* 6 : MONITORX reg_rax,reg_ecx,reg_edx [---: a64 0f 01 fa ] ND,LONG,PROT,MONITORX,X86_64,AMD */ + /* 313 355 002(01 fa) : LONG,PROT,MONITORX,X86_64,AMD */ + {I_MONITORX, 3, {REG_RAX,REG_ECX,REG_EDX,0,0}, NO_DECORATOR, nasm_bytecodes+67497, 299, 1735}, +}; + +static const struct itemplate instrux_MWAITX[2] = { + /* 0 : MWAITX void [ 0f 01 fb ] MONITORX,FUTURE,AMD */ + /* 355 002(01 fb) : MONITORX,FUTURE,AMD */ + {I_MWAITX, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71874, 296, 1736}, + /* 1 : MWAITX reg_eax,reg_ecx [--: 0f 01 fb ] ND,MONITORX,FUTURE,AMD */ + /* 355 002(01 fb) : MONITORX,FUTURE,AMD */ + {I_MWAITX, 2, {REG_EAX,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+71874, 296, 1737}, +}; + +static const struct itemplate instrux_TPAUSE[2] = { + /* 0 : TPAUSE reg32 [m: 66 0f ae /6 ] FL,WAITPKG,FUTURE */ + /* 361 355 001(ae) 206 : FL,WAITPKG,FUTURE */ + {I_TPAUSE, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67263, 300, 1739}, + /* 1 : TPAUSE reg32,reg_edx,reg_eax [m--: 66 0f ae /6 ] ND,FL,WAITPKG,FUTURE */ + /* 361 355 001(ae) 206 : FL,WAITPKG,FUTURE */ + {I_TPAUSE, 3, {REG_GPR|BITS32,REG_EDX,REG_EAX,0,0}, NO_DECORATOR, nasm_bytecodes+67263, 300, 1740}, +}; + +static const struct itemplate instrux_UMONITOR[3] = { + /* 0 : UMONITOR reg16 [m: a16 f3 0f ae /6 ] NOLONG,WAITPKG,FUTURE */ + /* 310 333 355 001(ae) 206 : NOREX,NOAPX,NOLONG,WAITPKG,FUTURE */ + {I_UMONITOR, 1, {REG_GPR|BITS16|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57091, 301, 1741}, + /* 1 : UMONITOR reg32 [m: a32 f3 0f ae /6 ] WAITPKG,FUTURE */ + /* 311 333 355 001(ae) 206 : WAITPKG,FUTURE */ + {I_UMONITOR, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57098, 302, 1742}, + /* 2 : UMONITOR reg64 [m: a64 f3 0f ae /6 ] LONG,PROT,WAITPKG,X86_64 */ + /* 313 333 355 001(ae) 206 : LONG,PROT,WAITPKG,X86_64 */ + {I_UMONITOR, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57105, 303, 1743}, +}; + +static const struct itemplate instrux_UMWAIT[2] = { + /* 0 : UMWAIT reg32 [m: f2 0f ae /6 ] WAITPKG,FUTURE */ + /* 332 355 001(ae) 206 : WAITPKG,FUTURE */ + {I_UMWAIT, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67503, 302, 1744}, + /* 1 : UMWAIT reg32,reg_edx,reg_eax [m--: f2 0f ae /6 ] ND,WAITPKG,FUTURE */ + /* 332 355 001(ae) 206 : WAITPKG,FUTURE */ + {I_UMWAIT, 3, {REG_GPR|BITS32,REG_EDX,REG_EAX,0,0}, NO_DECORATOR, nasm_bytecodes+67503, 302, 1745}, +}; + +static const struct itemplate instrux_IN[6] = { + /* 0 : IN reg_al,imm8 [-i: o8 e4 ib,u ] NOAPX,8086 */ + /* 001(e4) 025 : NOAPX,8086 */ + {I_IN, 2, {REG_AL|RN_L16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+72912, 242, 1748}, + /* 1 : IN reg_ax,imm8 [-i: o16 e5 ib,u ] NOAPX,8086 */ + /* 320 001(e5) 025 : NOAPX,8086 */ + {I_IN, 2, {REG_AX|RN_L16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+71879, 242, 1749}, + /* 2 : IN reg_eax,imm8 [-i: o32 e5 ib,u ] NOAPX,ZU,386 */ + /* 321 001(e5) 025 : NOAPX,ZU,386 */ + {I_IN, 2, {REG_EAX|RN_L16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+71884, 304, 1750}, + /* 3 : IN reg_al,reg_dx [--: o8 ec ] NOAPX,8086 */ + /* 001(ec) : NOAPX,8086 */ + {I_IN, 2, {REG_AL|RN_L16,REG_DX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+70182, 242, 1751}, + /* 4 : IN reg_ax,reg_dx [--: o16 ed ] NOAPX,8086 */ + /* 320 001(ed) : NOAPX,8086 */ + {I_IN, 2, {REG_AX|RN_L16,REG_DX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+72916, 242, 1752}, + /* 5 : IN reg_eax,reg_dx [--: o32 ed ] NOAPX,ZU,386 */ + /* 321 001(ed) : NOAPX,ZU,386 */ + {I_IN, 2, {REG_EAX|RN_L16,REG_DX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+72920, 304, 1753}, +}; + +static const struct itemplate instrux_OUT[6] = { + /* 0 : OUT imm8,reg_al [i-: o8 e6 ib,u ] NOAPX,8086 */ + /* 001(e6) 024 : NOAPX,8086 */ + {I_OUT, 2, {IMM_NORMAL|BITS8,REG_AL|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+72924, 242, 1754}, + /* 1 : OUT imm8,reg_ax [i-: o16 e7 ib,u ] NOAPX,8086 */ + /* 320 001(e7) 024 : NOAPX,8086 */ + {I_OUT, 2, {IMM_NORMAL|BITS8,REG_AX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+71889, 242, 1755}, + /* 2 : OUT imm8,reg_eax [i-: o32 e7 ib,u ] NOAPX,386 */ + /* 321 001(e7) 024 : NOAPX,386 */ + {I_OUT, 2, {IMM_NORMAL|BITS8,REG_EAX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+71894, 243, 1756}, + /* 3 : OUT reg_dx,reg_al [--: o8 ee ] NOAPX,8086 */ + /* 001(ee) : NOAPX,8086 */ + {I_OUT, 2, {REG_DX|RN_L16,REG_AL|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+70164, 242, 1757}, + /* 4 : OUT reg_dx,reg_ax [--: o16 ef ] NOAPX,8086 */ + /* 320 001(ef) : NOAPX,8086 */ + {I_OUT, 2, {REG_DX|RN_L16,REG_AX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+72928, 242, 1758}, + /* 5 : OUT reg_dx,reg_eax [--: o32 ef ] NOAPX,386 */ + /* 321 001(ef) : NOAPX,386 */ + {I_OUT, 2, {REG_DX|RN_L16,REG_EAX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+72932, 243, 1759}, +}; + +static const struct itemplate instrux_LDS[2] = { + /* 0 : LDS reg16,mem16 [rm: o16 c5 /r ] NOREX,NOAPX,NOLONG,8086 */ + /* 320 001(c5) 110 : NOREX,NOAPX,NOLONG,8086 */ + {I_LDS, 2, {REG_GPR|BITS16|RN_L16,MEMORY|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+71904, 225, 1771}, + /* 1 : LDS reg32,mem32 [rm: o32 c5 /r ] NOREX,NOAPX,NOLONG,386 */ + /* 321 001(c5) 110 : NOREX,NOAPX,NOLONG,386 */ + {I_LDS, 2, {REG_GPR|BITS32|RN_L16,MEMORY|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+71909, 305, 1772}, +}; + +static const struct itemplate instrux_LES[2] = { + /* 0 : LES reg16,mem16 [rm: o16 c4 /r ] NOREX,NOAPX,NOLONG,8086 */ + /* 320 001(c4) 110 : NOREX,NOAPX,NOLONG,8086 */ + {I_LES, 2, {REG_GPR|BITS16|RN_L16,MEMORY|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+71914, 225, 1773}, + /* 1 : LES reg32,mem32 [rm: o32 c4 /r ] NOREX,NOAPX,NOLONG,386 */ + /* 321 001(c4) 110 : NOREX,NOAPX,NOLONG,386 */ + {I_LES, 2, {REG_GPR|BITS32|RN_L16,MEMORY|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+71919, 305, 1774}, +}; + +static const struct itemplate instrux_LFS[3] = { + /* 0 : LFS reg16,mem16 [rm: o16 0f b4 /r ] SM0-1,386 */ + /* 320 355 001(b4) 110 : SM0,SM1,386 */ + {I_LFS, 2, {REG_GPR|BITS16,MEMORY|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+67539, 13, 1775}, + /* 1 : LFS reg32,mem32 [rm: o32 0f b4 /r ] SM0-1,386 */ + /* 321 355 001(b4) 110 : SM0,SM1,386 */ + {I_LFS, 2, {REG_GPR|BITS32,MEMORY|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+67545, 13, 1776}, + /* 2 : LFS reg64,mem64 [rm: o64 0f b4 /r ] SM0-1,LONG,PROT,X86_64 */ + /* 324 355 001(b4) 110 : SM0,SM1,LONG,PROT,X86_64 */ + {I_LFS, 2, {REG_GPR|BITS64,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+67551, 14, 1777}, +}; + +static const struct itemplate instrux_LGS[3] = { + /* 0 : LGS reg16,mem16 [rm: o16 0f b5 /r ] SM0-1,386 */ + /* 320 355 001(b5) 110 : SM0,SM1,386 */ + {I_LGS, 2, {REG_GPR|BITS16,MEMORY|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+67557, 13, 1778}, + /* 1 : LGS reg32,mem32 [rm: o32 0f b5 /r ] SM0-1,386 */ + /* 321 355 001(b5) 110 : SM0,SM1,386 */ + {I_LGS, 2, {REG_GPR|BITS32,MEMORY|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+67563, 13, 1779}, + /* 2 : LGS reg64,mem64 [rm: o64 0f b5 /r ] SM0-1,LONG,PROT,X86_64 */ + /* 324 355 001(b5) 110 : SM0,SM1,LONG,PROT,X86_64 */ + {I_LGS, 2, {REG_GPR|BITS64,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+67569, 14, 1780}, +}; + +static const struct itemplate instrux_LSS[3] = { + /* 0 : LSS reg16,mem16 [rm: o16 0f b2 /r ] SM0-1,386 */ + /* 320 355 001(b2) 110 : SM0,SM1,386 */ + {I_LSS, 2, {REG_GPR|BITS16,MEMORY|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+67575, 13, 1781}, + /* 1 : LSS reg32,mem32 [rm: o32 0f b2 /r ] SM0-1,386 */ + /* 321 355 001(b2) 110 : SM0,SM1,386 */ + {I_LSS, 2, {REG_GPR|BITS32,MEMORY|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+67581, 13, 1782}, + /* 2 : LSS reg64,mem64 [rm: o64 0f b2 /r ] SM0-1,LONG,PROT,X86_64 */ + /* 324 355 001(b2) 110 : SM0,SM1,LONG,PROT,X86_64 */ + {I_LSS, 2, {REG_GPR|BITS64,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+67587, 14, 1783}, +}; + +static const struct itemplate instrux_PUSH[21] = { + /* 0 : PUSH reg_es [-: 06 ] NOREX,NOAPX,NOLONG,8086 */ + /* 001(06) : NOREX,NOAPX,NOLONG,8086 */ + {I_PUSH, 1, {REG_ES|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72865, 225, 1785}, + /* 1 : PUSH reg_cs [-: 0e ] NOREX,NOAPX,NOLONG,8086 */ + /* 001(0e) : NOREX,NOAPX,NOLONG,8086 */ + {I_PUSH, 1, {REG_CS|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73073, 225, 1786}, + /* 2 : PUSH reg_ss [-: 16 ] NOREX,NOAPX,NOLONG,8086 */ + /* 001(16) : NOREX,NOAPX,NOLONG,8086 */ + {I_PUSH, 1, {REG_SS|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+29251, 225, 1787}, + /* 3 : PUSH reg_ds [-: 1e ] NOREX,NOAPX,NOLONG,8086 */ + /* 001(1e) : NOREX,NOAPX,NOLONG,8086 */ + {I_PUSH, 1, {REG_DS|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+29395, 225, 1788}, + /* 4 : PUSH reg_fs [-: 0f a0 ] 386 */ + /* 355 001(a0) : 386 */ + {I_PUSH, 1, {REG_FS,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72936, 3, 1789}, + /* 5 : PUSH reg_gs [-: 0f a8 ] 386 */ + /* 355 001(a8) : 386 */ + {I_PUSH, 1, {REG_GS,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72940, 3, 1790}, + /* 6 : PUSH reg16 [r: nw o16 50+r ] 8086 */ + /* 327 320 010 120 : NWSIZE,8086 */ + {I_PUSH, 1, {REG_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72309, 233, 2173}, + /* 7 : PUSH reg32 [r: nw o32 50+r ] 386 */ + /* 327 321 010 120 : NWSIZE,386 */ + {I_PUSH, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72314, 234, 2174}, + /* 8 : PUSH reg64 [r: nw o64 50+r ] LONG,PROT,X86_64 */ + /* 327 324 010 120 : NWSIZE,LONG,PROT,X86_64 */ + {I_PUSH, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72319, 235, 2175}, + /* 9 : PUSH rm16 [m: nw o16 ff /6 ] AR0,OSIZE,8086 */ + /* 327 320 001(ff) 206 : AR0,NWSIZE,OSIZE,8086 */ + {I_PUSH, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67917, 338, 2176}, + /* 10 : PUSH rm32 [m: nw o32 ff /6 ] AR0,OSIZE,386 */ + /* 327 321 001(ff) 206 : AR0,NWSIZE,OSIZE,386 */ + {I_PUSH, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67923, 204, 2177}, + /* 11 : PUSH rm64 [m: nw o64 ff /6 ] AR0,OSIZE,LONG,PROT,X86_64 */ + /* 327 324 001(ff) 206 : AR0,NWSIZE,OSIZE,LONG,PROT,X86_64 */ + {I_PUSH, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67929, 205, 2178}, + /* 12 : PUSH imm8 [i: nw osz 6a ib,s ] ND,AR0,SX,186 */ + /* 327 330 001(6a) 274 : AR0,NWSIZE,SX,186 */ + {I_PUSH, 1, {IMM_NORMAL|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67935, 339, 2179}, + /* 13 : PUSH sbyteword16 [i: nw o16 6a ib,s ] AR0,OSIZE,186 */ + /* 327 320 001(6a) 274 : AR0,NWSIZE,OSIZE,186 */ + {I_PUSH, 1, {SBYTEWORD|BITS16|IMM_NORMAL,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67941, 340, 2180}, + /* 14 : PUSH sbytedword32 [i: nw o32 6a ib,s ] AR0,OSIZE,386 */ + /* 327 321 001(6a) 274 : AR0,NWSIZE,OSIZE,386 */ + {I_PUSH, 1, {SBYTEDWORD|BITS32|IMM_NORMAL,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67947, 204, 2181}, + /* 15 : PUSH sbytedword64 [i: nw o64 6a ib,s ] AR0,OSIZE,LONG,386,X86_64 */ + /* 327 324 001(6a) 274 : AR0,NWSIZE,OSIZE,LONG,PROT,X86_64 */ + {I_PUSH, 1, {SBYTEDWORD|BITS64|IMM_NORMAL,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67953, 205, 2182}, + /* 16 : PUSH imm16 [i: nw o16 68 iw ] AR0,OSIZE,186 */ + /* 327 320 001(68) 030 : AR0,NWSIZE,OSIZE,186 */ + {I_PUSH, 1, {IMM_NORMAL|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67959, 340, 2183}, + /* 17 : PUSH imm32 [i: nw o32 68 id ] AR0,OSIZE,NOREX,NOAPX,NOLONG,386 */ + /* 327 321 001(68) 040 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,386 */ + {I_PUSH, 1, {IMM_NORMAL|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67965, 214, 2184}, + /* 18 : PUSH sdword64 [i: nw o64 68 id,s ] AR0,OSIZE,LONG,386,X86_64 */ + /* 327 324 001(68) 254 : AR0,NWSIZE,OSIZE,LONG,PROT,X86_64 */ + {I_PUSH, 1, {SDWORD|BITS64|IMM_NORMAL,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67971, 205, 2185}, + /* 19 : PUSH reg64,reg64 [vm: o64nw evex.nd1.l0.np.m4.w0 ff /6 ] ND,LONG,PROT,APX,X86_64 */ + /* 323 240(f4 7c 18) 300 001(ff) 216 : NWSIZE,LONG,EVEX,PROT,APX,X86_64 */ + {I_PUSH, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+13063, 344, 2221}, + /* 20 : PUSH reg64:reg64 [vm: o64nw evex.nd1.l0.np.m4.w0 ff /6 ] ND,LONG,PROT,APX,X86_64 */ + /* 323 240(f4 7c 18) 300 001(ff) 216 : NWSIZE,LONG,EVEX,PROT,APX,X86_64 */ + {I_PUSH, 2, {REG_GPR|BITS64|COLON,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+13063, 344, 2222}, +}; + +static const struct itemplate instrux_POP[14] = { + /* 0 : POP reg_es [-: 07 ] NOREX,NOAPX,NOLONG,8086 */ + /* 001(07) : NOREX,NOAPX,NOLONG,8086 */ + {I_POP, 1, {REG_ES|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72773, 225, 1792}, + /* 1 : POP reg_cs [-: m0 0f ] ND,NOREX,NOAPX,NOLONG,UNDOC,OBSOLETE,8086 */ + /* 001(0f) : NOREX,NOAPX,NOLONG,UNDOC,OBSOLETE,8086 */ + {I_POP, 1, {REG_CS|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+29143, 306, 1793}, + /* 2 : POP reg_ss [-: 17 ] NOREX,NOAPX,NOLONG,8086 */ + /* 001(17) : NOREX,NOAPX,NOLONG,8086 */ + {I_POP, 1, {REG_SS|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+29269, 225, 1794}, + /* 3 : POP reg_ds [-: 1f ] NOREX,NOAPX,NOLONG,8086 */ + /* 001(1f) : NOREX,NOAPX,NOLONG,8086 */ + {I_POP, 1, {REG_DS|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+29413, 225, 1795}, + /* 4 : POP reg_fs [-: 0f a1 ] 386 */ + /* 355 001(a1) : 386 */ + {I_POP, 1, {REG_FS,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72944, 3, 1796}, + /* 5 : POP reg_gs [-: 0f a9 ] 386 */ + /* 355 001(a9) : 386 */ + {I_POP, 1, {REG_GS,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72948, 3, 1797}, + /* 6 : POP reg16 [r: nw o16 58+r ] 8086 */ + /* 327 320 010 130 : NWSIZE,8086 */ + {I_POP, 1, {REG_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72324, 233, 2187}, + /* 7 : POP reg32 [r: nw o32 58+r ] 386 */ + /* 327 321 010 130 : NWSIZE,386 */ + {I_POP, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72329, 234, 2188}, + /* 8 : POP reg64 [r: nw o64 58+r ] LONG,PROT,X86_64 */ + /* 327 324 010 130 : NWSIZE,LONG,PROT,X86_64 */ + {I_POP, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72334, 235, 2189}, + /* 9 : POP rm16 [m: nw o16 8f /0 ] AR0,OSIZE,8086 */ + /* 327 320 001(8f) 200 : AR0,NWSIZE,OSIZE,8086 */ + {I_POP, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67977, 338, 2190}, + /* 10 : POP rm32 [m: nw o32 8f /0 ] AR0,OSIZE,386 */ + /* 327 321 001(8f) 200 : AR0,NWSIZE,OSIZE,386 */ + {I_POP, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67983, 204, 2191}, + /* 11 : POP rm64 [m: nw o64 8f /0 ] AR0,OSIZE,LONG,PROT,X86_64 */ + /* 327 324 001(8f) 200 : AR0,NWSIZE,OSIZE,LONG,PROT,X86_64 */ + {I_POP, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67989, 205, 2192}, + /* 12 : POP reg64,reg64 [vm: o64nw evex.nd1.l0.np.m4.w0 8f /0 ] ND,LONG,PROT,APX,X86_64 */ + /* 323 240(f4 7c 18) 300 001(8f) 210 : NWSIZE,LONG,EVEX,PROT,APX,X86_64 */ + {I_POP, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+13083, 344, 2230}, + /* 13 : POP reg64:reg64 [mv: o64nw evex.nd1.l0.np.m4.w0 8f /0 ] ND,LONG,PROT,APX,X86_64 */ + /* 323 241(f4 7c 18) 300 001(8f) 200 : NWSIZE,LONG,EVEX,PROT,APX,X86_64 */ + {I_POP, 2, {REG_GPR|BITS64|COLON,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+13093, 344, 2231}, +}; + +static const struct itemplate instrux_RDFSBASE[2] = { + /* 0 : RDFSBASE reg32 [m: w0 f3 0f ae /0 ] LONG,PROT,X86_64 */ + /* 317 333 355 001(ae) 200 : LONG,PROT,X86_64 */ + {I_RDFSBASE, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57112, 24, 1799}, + /* 1 : RDFSBASE reg64 [m: w1 f3 0f ae /0 ] LONG,PROT,X86_64 */ + /* 324 333 355 001(ae) 200 : LONG,PROT,X86_64 */ + {I_RDFSBASE, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57119, 24, 1800}, +}; + +static const struct itemplate instrux_RDGSBASE[2] = { + /* 0 : RDGSBASE reg32 [m: w0 f3 0f ae /1 ] LONG,PROT,X86_64 */ + /* 317 333 355 001(ae) 201 : LONG,PROT,X86_64 */ + {I_RDGSBASE, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57126, 24, 1801}, + /* 1 : RDGSBASE reg64 [m: w1 f3 0f ae /1 ] LONG,PROT,X86_64 */ + /* 324 333 355 001(ae) 201 : LONG,PROT,X86_64 */ + {I_RDGSBASE, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57133, 24, 1802}, +}; + +static const struct itemplate instrux_WRFSBASE[2] = { + /* 0 : WRFSBASE reg32 [m: w0 f3 0f ae /2 ] LONG,PROT,X86_64 */ + /* 317 333 355 001(ae) 202 : LONG,PROT,X86_64 */ + {I_WRFSBASE, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57140, 24, 1803}, + /* 1 : WRFSBASE reg64 [m: w1 f3 0f ae /2 ] LONG,PROT,X86_64 */ + /* 324 333 355 001(ae) 202 : LONG,PROT,X86_64 */ + {I_WRFSBASE, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57147, 24, 1804}, +}; + +static const struct itemplate instrux_WRGSBASE[2] = { + /* 0 : WRGSBASE reg32 [m: w0 f3 0f ae /3 ] LONG,PROT,X86_64 */ + /* 317 333 355 001(ae) 203 : LONG,PROT,X86_64 */ + {I_WRGSBASE, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57154, 24, 1805}, + /* 1 : WRGSBASE reg64 [m: w1 f3 0f ae /3 ] LONG,PROT,X86_64 */ + /* 324 333 355 001(ae) 203 : LONG,PROT,X86_64 */ + {I_WRGSBASE, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57161, 24, 1806}, +}; + +static const struct itemplate instrux_ARPL[2] = { + /* 0 : ARPL rm16,reg16 [mr: optw o16 63 /r ] SM0-1,NOREX,NOAPX,NOLONG,FL,PROT,286 */ + /* 336 320 001(63) 101 : SM0,SM1,NOREX,NOAPX,NOLONG,FL,PROT,286 */ + {I_ARPL, 2, {RM_GPR|BITS16|RN_L16,REG_GPR|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+67593, 307, 1808}, + /* 1 : ARPL rm16,reg32 [mr: optw o32 63 /r ] SM0-1,NOREX,NOAPX,NOLONG,FL,PROT,386 */ + /* 336 321 001(63) 101 : SM0,SM1,NOREX,NOAPX,NOLONG,FL,PROT,386 */ + {I_ARPL, 2, {RM_GPR|BITS16|RN_L16,REG_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+67599, 308, 1809}, +}; + +static const struct itemplate instrux_LAR[3] = { + /* 0 : LAR reg16,rm_sel [rm: o16 0f 02 /r ] FL,PROT,286 */ + /* 320 355 001(02) 110 : FL,PROT,286 */ + {I_LAR, 2, {REG_GPR|BITS16,RM_SEL,0,0,0}, NO_DECORATOR, nasm_bytecodes+67605, 309, 1810}, + /* 1 : LAR reg32,rm_sel [rm: optd o32 0f 02 /r ] FL,PROT,386 */ + /* 337 321 355 001(02) 110 : FL,PROT,386 */ + {I_LAR, 2, {REG_GPR|BITS32,RM_SEL,0,0,0}, NO_DECORATOR, nasm_bytecodes+57168, 310, 1811}, + /* 2 : LAR reg64,rm_sel [rm: optd o64 0f 02 /r ] LONG,FL,PROT,X86_64 */ + /* 337 324 355 001(02) 110 : LONG,FL,PROT,X86_64 */ + {I_LAR, 2, {REG_GPR|BITS64,RM_SEL,0,0,0}, NO_DECORATOR, nasm_bytecodes+57175, 58, 1812}, +}; + +static const struct itemplate instrux_LSL[3] = { + /* 0 : LSL reg16,rm_sel [rm: o16 0f 03 /r ] PROT,286 */ + /* 320 355 001(03) 110 : PROT,286 */ + {I_LSL, 2, {REG_GPR|BITS16,RM_SEL,0,0,0}, NO_DECORATOR, nasm_bytecodes+67611, 311, 1813}, + /* 1 : LSL reg32,rm_sel [rm: optd o32 0f 03 /r ] PROT,386 */ + /* 337 321 355 001(03) 110 : PROT,386 */ + {I_LSL, 2, {REG_GPR|BITS32,RM_SEL,0,0,0}, NO_DECORATOR, nasm_bytecodes+57182, 312, 1814}, + /* 2 : LSL reg64,rm_sel [rm: optd o64 0f 03 /r ] LONG,PROT,X86_64 */ + /* 337 324 355 001(03) 110 : LONG,PROT,X86_64 */ + {I_LSL, 2, {REG_GPR|BITS64,RM_SEL,0,0,0}, NO_DECORATOR, nasm_bytecodes+57189, 24, 1815}, +}; + +static const struct itemplate instrux_VERR[1] = { + /* 0 : VERR rm_sel [m: 0f 00 /4 ] FL,PROT,286 */ + /* 355 001(00) 204 : FL,PROT,286 */ + {I_VERR, 1, {RM_SEL,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71924, 309, 1817}, +}; + +static const struct itemplate instrux_VERW[1] = { + /* 0 : VERW rm_sel [m: 0f 00 /5 ] FL,PROT,286 */ + /* 355 001(00) 205 : FL,PROT,286 */ + {I_VERW, 1, {RM_SEL,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71929, 309, 1818}, +}; + +static const struct itemplate instrux_SWAPGS[1] = { + /* 0 : SWAPGS void [ 0f 01 f8 ] LONG,PROT,X86_64 */ + /* 355 002(01 f8) : LONG,PROT,X86_64 */ + {I_SWAPGS, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71934, 24, 1821}, +}; + +static const struct itemplate instrux_LKGS[1] = { + /* 0 : LKGS rm_sel [m: f2 0f 00 /6 ] LONG,PRIV,PROT,LKGS,X86_64 */ + /* 332 355 001(00) 206 : LONG,PRIV,PROT,LKGS,X86_64 */ + {I_LKGS, 1, {RM_SEL,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67617, 313, 1822}, +}; + +static const struct itemplate instrux_LGDT[3] = { + /* 0 : LGDT mem16 [m: nw o16 0f 01 /2 ] AR0,OSIZE,PRIV,286 */ + /* 327 320 355 001(01) 202 : AR0,NWSIZE,OSIZE,PRIV,286 */ + {I_LGDT, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57196, 314, 1824}, + /* 1 : LGDT mem32 [m: nw o32 0f 01 /2 ] AR0,OSIZE,PRIV,386 */ + /* 327 321 355 001(01) 202 : AR0,NWSIZE,OSIZE,PRIV,386 */ + {I_LGDT, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57203, 315, 1825}, + /* 2 : LGDT mem64 [m: nw o64 0f 01 /2 ] AR0,OSIZE,LONG,PRIV,386,X86_64 */ + /* 327 324 355 001(01) 202 : AR0,NWSIZE,OSIZE,LONG,PRIV,PROT,X86_64 */ + {I_LGDT, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57210, 316, 1826}, +}; + +static const struct itemplate instrux_LIDT[3] = { + /* 0 : LIDT mem16 [m: nw o16 0f 01 /3 ] AR0,OSIZE,PRIV,286 */ + /* 327 320 355 001(01) 203 : AR0,NWSIZE,OSIZE,PRIV,286 */ + {I_LIDT, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57217, 314, 1827}, + /* 1 : LIDT mem32 [m: nw o32 0f 01 /3 ] AR0,OSIZE,PRIV,386 */ + /* 327 321 355 001(01) 203 : AR0,NWSIZE,OSIZE,PRIV,386 */ + {I_LIDT, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57224, 315, 1828}, + /* 2 : LIDT mem64 [m: nw o64 0f 01 /3 ] AR0,OSIZE,LONG,PRIV,386,X86_64 */ + /* 327 324 355 001(01) 203 : AR0,NWSIZE,OSIZE,LONG,PRIV,PROT,X86_64 */ + {I_LIDT, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57231, 316, 1829}, +}; + +static const struct itemplate instrux_LLDT[4] = { + /* 0 : LLDT mem16 [m: 0f 00 /2 ] PRIV,PROT,286 */ + /* 355 001(00) 202 : PRIV,PROT,286 */ + {I_LLDT, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57254, 317, 1830}, + /* 1 : LLDT reg16 [m: optw o16 0f 00 /2 ] PRIV,PROT,286 */ + /* 336 320 355 001(00) 202 : PRIV,PROT,286 */ + {I_LLDT, 1, {REG_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57238, 317, 1831}, + /* 2 : LLDT reg32 [m: optw o32 0f 00 /2 ] PRIV,PROT,386 */ + /* 336 321 355 001(00) 202 : PRIV,PROT,386 */ + {I_LLDT, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57245, 318, 1832}, + /* 3 : LLDT reg64 [m: optw o64 0f 00 /2 ] LONG,PRIV,PROT,386,X86_64 */ + /* 336 324 355 001(00) 202 : LONG,PRIV,PROT,X86_64 */ + {I_LLDT, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57252, 319, 1833}, +}; + +static const struct itemplate instrux_LTR[4] = { + /* 0 : LTR mem16 [m: 0f 00 /3 ] PRIV,PROT,286 */ + /* 355 001(00) 203 : PRIV,PROT,286 */ + {I_LTR, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57275, 317, 1834}, + /* 1 : LTR reg16 [m: optw o16 0f 00 /3 ] PRIV,PROT,286 */ + /* 336 320 355 001(00) 203 : PRIV,PROT,286 */ + {I_LTR, 1, {REG_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57259, 317, 1835}, + /* 2 : LTR reg32 [m: optw o32 0f 00 /3 ] PRIV,PROT,386 */ + /* 336 321 355 001(00) 203 : PRIV,PROT,386 */ + {I_LTR, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57266, 318, 1836}, + /* 3 : LTR reg64 [m: optw o64 0f 00 /3 ] LONG,PRIV,PROT,386,X86_64 */ + /* 336 324 355 001(00) 203 : LONG,PRIV,PROT,X86_64 */ + {I_LTR, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57273, 319, 1837}, +}; + +static const struct itemplate instrux_SGDT[3] = { + /* 0 : SGDT mem16 [m: nw o16 0f 01 /0 ] AR0,OSIZE,286 */ + /* 327 320 355 001(01) 200 : AR0,NWSIZE,OSIZE,286 */ + {I_SGDT, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57280, 320, 1839}, + /* 1 : SGDT mem32 [m: nw o32 0f 01 /0 ] AR0,OSIZE,386 */ + /* 327 321 355 001(01) 200 : AR0,NWSIZE,OSIZE,386 */ + {I_SGDT, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57287, 204, 1840}, + /* 2 : SGDT mem64 [m: nw o64 0f 01 /0 ] AR0,OSIZE,LONG,386,X86_64 */ + /* 327 324 355 001(01) 200 : AR0,NWSIZE,OSIZE,LONG,PROT,X86_64 */ + {I_SGDT, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57294, 205, 1841}, +}; + +static const struct itemplate instrux_SIDT[3] = { + /* 0 : SIDT mem16 [m: nw o16 0f 01 /1 ] AR0,OSIZE,286 */ + /* 327 320 355 001(01) 201 : AR0,NWSIZE,OSIZE,286 */ + {I_SIDT, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57301, 320, 1842}, + /* 1 : SIDT mem32 [m: nw o32 0f 01 /1 ] AR0,OSIZE,386 */ + /* 327 321 355 001(01) 201 : AR0,NWSIZE,OSIZE,386 */ + {I_SIDT, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57308, 204, 1843}, + /* 2 : SIDT mem64 [m: nw o64 0f 01 /1 ] AR0,OSIZE,LONG,386,X86_64 */ + /* 327 324 355 001(01) 201 : AR0,NWSIZE,OSIZE,LONG,PROT,X86_64 */ + {I_SIDT, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57315, 205, 1844}, +}; + +static const struct itemplate instrux_SLDT[4] = { + /* 0 : SLDT mem16 [m: 0f 00 /0 ] PROT,286 */ + /* 355 001(00) 200 : PROT,286 */ + {I_SLDT, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67624, 311, 1845}, + /* 1 : SLDT reg16 [m: o16 0f 00 /0 ] PROT,286 */ + /* 320 355 001(00) 200 : PROT,286 */ + {I_SLDT, 1, {REG_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67623, 311, 1846}, + /* 2 : SLDT reg32 [m: optd o32 0f 00 /0 ] PROT,386 */ + /* 337 321 355 001(00) 200 : PROT,386 */ + {I_SLDT, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57322, 312, 1847}, + /* 3 : SLDT reg64 [m: optd o64 0f 00 /0 ] LONG,PROT,386,X86_64 */ + /* 337 324 355 001(00) 200 : LONG,PROT,X86_64 */ + {I_SLDT, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57329, 24, 1848}, +}; + +static const struct itemplate instrux_STR[4] = { + /* 0 : STR mem16 [m: 0f 00 /1 ] PROT,286 */ + /* 355 001(00) 201 : PROT,286 */ + {I_STR, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67630, 311, 1849}, + /* 1 : STR reg16 [m: o16 0f 00 /1 ] PROT,286 */ + /* 320 355 001(00) 201 : PROT,286 */ + {I_STR, 1, {REG_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67629, 311, 1850}, + /* 2 : STR reg32 [m: optd o32 0f 00 /1 ] PROT,386 */ + /* 337 321 355 001(00) 201 : PROT,386 */ + {I_STR, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57336, 312, 1851}, + /* 3 : STR reg64 [m: optd o64 0f 00 /1 ] LONG,PROT,386,X86_64 */ + /* 337 324 355 001(00) 201 : LONG,PROT,X86_64 */ + {I_STR, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57343, 24, 1852}, +}; + +static const struct itemplate instrux_LOADALL[1] = { + /* 0 : LOADALL void [ 0f 07 ] ND,UNDOC,OBSOLETE,386 */ + /* 355 001(07) : UNDOC,OBSOLETE,386 */ + {I_LOADALL, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72772, 321, 1854}, +}; + +static const struct itemplate instrux_LOADALL286[1] = { + /* 0 : LOADALL286 void [ 0f 05 ] ND,UNDOC,OBSOLETE,286 */ + /* 355 001(05) : UNDOC,OBSOLETE,286 */ + {I_LOADALL286, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72760, 322, 1855}, +}; + +static const struct itemplate instrux_F2XM1[1] = { + /* 0 : F2XM1 void [ d9 f0 ] FPU,8086 */ + /* 002(d9 f0) : FPU,8086 */ + {I_F2XM1, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72952, 323, 1858}, +}; + +static const struct itemplate instrux_FABS[1] = { + /* 0 : FABS void [ d9 e1 ] FPU,8086 */ + /* 002(d9 e1) : FPU,8086 */ + {I_FABS, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72956, 323, 1859}, +}; + +static const struct itemplate instrux_FADD[7] = { + /* 0 : FADD mem32 [m: d8 /0 ] FPU,8086 */ + /* 001(d8) 200 : FPU,8086 */ + {I_FADD, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+69953, 323, 1860}, + /* 1 : FADD mem64 [m: dc /0 ] FPU,8086 */ + /* 001(dc) 200 : FPU,8086 */ + {I_FADD, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72960, 323, 1861}, + /* 2 : FADD fpureg|to [r: dc c0+r ] FPU,8086 */ + /* 001(dc) 010 300 : FPU,8086 */ + {I_FADD, 1, {FPUREG|TO,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71939, 323, 1862}, + /* 3 : FADD fpureg [r: d8 c0+r ] FPU,8086 */ + /* 001(d8) 010 300 : FPU,8086 */ + {I_FADD, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71944, 323, 1863}, + /* 4 : FADD fpureg,fpu0 [r-: dc c0+r ] FPU,8086 */ + /* 001(dc) 010 300 : FPU,8086 */ + {I_FADD, 2, {FPUREG,FPUREG|RN_ZERO,0,0,0}, NO_DECORATOR, nasm_bytecodes+71939, 323, 1864}, + /* 5 : FADD fpu0,fpureg [-r: d8 c0+r ] FPU,8086 */ + /* 001(d8) 011 300 : FPU,8086 */ + {I_FADD, 2, {FPUREG|RN_ZERO,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+71949, 323, 1865}, + /* 6 : FADD void [ de c1 ] ND,FPU,8086 */ + /* 002(de c1) : FPU,8086 */ + {I_FADD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72964, 323, 1866}, +}; + +static const struct itemplate instrux_FADDP[3] = { + /* 0 : FADDP fpureg [r: de c0+r ] FPU,8086 */ + /* 001(de) 010 300 : FPU,8086 */ + {I_FADDP, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71954, 323, 1867}, + /* 1 : FADDP fpureg,fpu0 [r-: de c0+r ] FPU,8086 */ + /* 001(de) 010 300 : FPU,8086 */ + {I_FADDP, 2, {FPUREG,FPUREG|RN_ZERO,0,0,0}, NO_DECORATOR, nasm_bytecodes+71954, 323, 1868}, + /* 2 : FADDP void [ de c1 ] ND,FPU,8086 */ + /* 002(de c1) : FPU,8086 */ + {I_FADDP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72964, 323, 1869}, +}; + +static const struct itemplate instrux_FBLD[2] = { + /* 0 : FBLD mem80 [m: df /4 ] FPU,8086 */ + /* 001(df) 204 : FPU,8086 */ + {I_FBLD, 1, {MEMORY|BITS80,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72968, 323, 1870}, + /* 1 : FBLD mem [m: df /4 ] FPU,8086 */ + /* 001(df) 204 : FPU,8086 */ + {I_FBLD, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72968, 323, 1871}, +}; + +static const struct itemplate instrux_FBSTP[2] = { + /* 0 : FBSTP mem80 [m: df /6 ] FPU,8086 */ + /* 001(df) 206 : FPU,8086 */ + {I_FBSTP, 1, {MEMORY|BITS80,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72972, 323, 1872}, + /* 1 : FBSTP mem [m: df /6 ] FPU,8086 */ + /* 001(df) 206 : FPU,8086 */ + {I_FBSTP, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72972, 323, 1873}, +}; + +static const struct itemplate instrux_FCHS[1] = { + /* 0 : FCHS void [ d9 e0 ] FPU,8086 */ + /* 002(d9 e0) : FPU,8086 */ + {I_FCHS, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72976, 323, 1874}, +}; + +static const struct itemplate instrux_FCLEX[1] = { + /* 0 : FCLEX void [ wait db e2 ] FPU,8086 */ + /* 341 002(db e2) : FPU,8086 */ + {I_FCLEX, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71959, 323, 1875}, +}; + +static const struct itemplate instrux_FCMOVB[3] = { + /* 0 : FCMOVB fpureg [r: da c0+r ] FPU,P6 */ + /* 001(da) 010 300 : FPU,P6 */ + {I_FCMOVB, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71964, 324, 1876}, + /* 1 : FCMOVB fpu0,fpureg [-r: da c0+r ] FPU,P6 */ + /* 001(da) 011 300 : FPU,P6 */ + {I_FCMOVB, 2, {FPUREG|RN_ZERO,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+71969, 324, 1877}, + /* 2 : FCMOVB void [ da c1 ] ND,FPU,P6 */ + /* 002(da c1) : FPU,P6 */ + {I_FCMOVB, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72980, 324, 1878}, +}; + +static const struct itemplate instrux_FCMOVBE[3] = { + /* 0 : FCMOVBE fpureg [r: da d0+r ] FPU,P6 */ + /* 001(da) 010 320 : FPU,P6 */ + {I_FCMOVBE, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71974, 324, 1879}, + /* 1 : FCMOVBE fpu0,fpureg [-r: da d0+r ] FPU,P6 */ + /* 001(da) 011 320 : FPU,P6 */ + {I_FCMOVBE, 2, {FPUREG|RN_ZERO,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+71979, 324, 1880}, + /* 2 : FCMOVBE void [ da d1 ] ND,FPU,P6 */ + /* 002(da d1) : FPU,P6 */ + {I_FCMOVBE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72984, 324, 1881}, +}; + +static const struct itemplate instrux_FCMOVE[3] = { + /* 0 : FCMOVE fpureg [r: da c8+r ] FPU,P6 */ + /* 001(da) 010 310 : FPU,P6 */ + {I_FCMOVE, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71984, 324, 1882}, + /* 1 : FCMOVE fpu0,fpureg [-r: da c8+r ] FPU,P6 */ + /* 001(da) 011 310 : FPU,P6 */ + {I_FCMOVE, 2, {FPUREG|RN_ZERO,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+71989, 324, 1883}, + /* 2 : FCMOVE void [ da c9 ] ND,FPU,P6 */ + /* 002(da c9) : FPU,P6 */ + {I_FCMOVE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72988, 324, 1884}, +}; + +static const struct itemplate instrux_FCMOVNB[3] = { + /* 0 : FCMOVNB fpureg [r: db c0+r ] FPU,P6 */ + /* 001(db) 010 300 : FPU,P6 */ + {I_FCMOVNB, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71994, 324, 1885}, + /* 1 : FCMOVNB fpu0,fpureg [-r: db c0+r ] FPU,P6 */ + /* 001(db) 011 300 : FPU,P6 */ + {I_FCMOVNB, 2, {FPUREG|RN_ZERO,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+71999, 324, 1886}, + /* 2 : FCMOVNB void [ db c1 ] ND,FPU,P6 */ + /* 002(db c1) : FPU,P6 */ + {I_FCMOVNB, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72992, 324, 1887}, +}; + +static const struct itemplate instrux_FCMOVNBE[3] = { + /* 0 : FCMOVNBE fpureg [r: db d0+r ] FPU,P6 */ + /* 001(db) 010 320 : FPU,P6 */ + {I_FCMOVNBE, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72004, 324, 1888}, + /* 1 : FCMOVNBE fpu0,fpureg [-r: db d0+r ] FPU,P6 */ + /* 001(db) 011 320 : FPU,P6 */ + {I_FCMOVNBE, 2, {FPUREG|RN_ZERO,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+72009, 324, 1889}, + /* 2 : FCMOVNBE void [ db d1 ] ND,FPU,P6 */ + /* 002(db d1) : FPU,P6 */ + {I_FCMOVNBE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72996, 324, 1890}, +}; + +static const struct itemplate instrux_FCMOVNE[3] = { + /* 0 : FCMOVNE fpureg [r: db c8+r ] FPU,P6 */ + /* 001(db) 010 310 : FPU,P6 */ + {I_FCMOVNE, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72014, 324, 1891}, + /* 1 : FCMOVNE fpu0,fpureg [-r: db c8+r ] FPU,P6 */ + /* 001(db) 011 310 : FPU,P6 */ + {I_FCMOVNE, 2, {FPUREG|RN_ZERO,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+72019, 324, 1892}, + /* 2 : FCMOVNE void [ db c9 ] ND,FPU,P6 */ + /* 002(db c9) : FPU,P6 */ + {I_FCMOVNE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73000, 324, 1893}, +}; + +static const struct itemplate instrux_FCMOVNU[3] = { + /* 0 : FCMOVNU fpureg [r: db d8+r ] FPU,P6 */ + /* 001(db) 010 330 : FPU,P6 */ + {I_FCMOVNU, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72024, 324, 1894}, + /* 1 : FCMOVNU fpu0,fpureg [-r: db d8+r ] FPU,P6 */ + /* 001(db) 011 330 : FPU,P6 */ + {I_FCMOVNU, 2, {FPUREG|RN_ZERO,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+72029, 324, 1895}, + /* 2 : FCMOVNU void [ db d9 ] ND,FPU,P6 */ + /* 002(db d9) : FPU,P6 */ + {I_FCMOVNU, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73004, 324, 1896}, +}; + +static const struct itemplate instrux_FCMOVU[3] = { + /* 0 : FCMOVU fpureg [r: da d8+r ] FPU,P6 */ + /* 001(da) 010 330 : FPU,P6 */ + {I_FCMOVU, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72034, 324, 1897}, + /* 1 : FCMOVU fpu0,fpureg [-r: da d8+r ] FPU,P6 */ + /* 001(da) 011 330 : FPU,P6 */ + {I_FCMOVU, 2, {FPUREG|RN_ZERO,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+72039, 324, 1898}, + /* 2 : FCMOVU void [ da d9 ] ND,FPU,P6 */ + /* 002(da d9) : FPU,P6 */ + {I_FCMOVU, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73008, 324, 1899}, +}; + +static const struct itemplate instrux_FCOM[5] = { + /* 0 : FCOM mem32 [m: d8 /2 ] FPU,8086 */ + /* 001(d8) 202 : FPU,8086 */ + {I_FCOM, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+69959, 323, 1900}, + /* 1 : FCOM mem64 [m: dc /2 ] FPU,8086 */ + /* 001(dc) 202 : FPU,8086 */ + {I_FCOM, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73012, 323, 1901}, + /* 2 : FCOM fpureg [r: d8 d0+r ] FPU,8086 */ + /* 001(d8) 010 320 : FPU,8086 */ + {I_FCOM, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72044, 323, 1902}, + /* 3 : FCOM fpu0,fpureg [-r: d8 d0+r ] FPU,8086 */ + /* 001(d8) 011 320 : FPU,8086 */ + {I_FCOM, 2, {FPUREG|RN_ZERO,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+72049, 323, 1903}, + /* 4 : FCOM void [ d8 d1 ] ND,FPU,8086 */ + /* 002(d8 d1) : FPU,8086 */ + {I_FCOM, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73016, 323, 1904}, +}; + +static const struct itemplate instrux_FCOMI[3] = { + /* 0 : FCOMI fpureg [r: db f0+r ] FL,FPU,P6 */ + /* 001(db) 010 360 : FL,FPU,P6 */ + {I_FCOMI, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72054, 325, 1905}, + /* 1 : FCOMI fpu0,fpureg [-r: db f0+r ] FL,FPU,P6 */ + /* 001(db) 011 360 : FL,FPU,P6 */ + {I_FCOMI, 2, {FPUREG|RN_ZERO,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+72059, 325, 1906}, + /* 2 : FCOMI void [ db f1 ] ND,FL,FPU,P6 */ + /* 002(db f1) : FL,FPU,P6 */ + {I_FCOMI, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73020, 325, 1907}, +}; + +static const struct itemplate instrux_FCOMIP[3] = { + /* 0 : FCOMIP fpureg [r: df f0+r ] FL,FPU,P6 */ + /* 001(df) 010 360 : FL,FPU,P6 */ + {I_FCOMIP, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72064, 325, 1908}, + /* 1 : FCOMIP fpu0,fpureg [-r: df f0+r ] FL,FPU,P6 */ + /* 001(df) 011 360 : FL,FPU,P6 */ + {I_FCOMIP, 2, {FPUREG|RN_ZERO,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+72069, 325, 1909}, + /* 2 : FCOMIP void [ df f1 ] ND,FL,FPU,P6 */ + /* 002(df f1) : FL,FPU,P6 */ + {I_FCOMIP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73024, 325, 1910}, +}; + +static const struct itemplate instrux_FCOMP[5] = { + /* 0 : FCOMP mem32 [m: d8 /3 ] FPU,8086 */ + /* 001(d8) 203 : FPU,8086 */ + {I_FCOMP, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+69947, 323, 1911}, + /* 1 : FCOMP mem64 [m: dc /3 ] FPU,8086 */ + /* 001(dc) 203 : FPU,8086 */ + {I_FCOMP, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73028, 323, 1912}, + /* 2 : FCOMP fpureg [r: d8 d8+r ] FPU,8086 */ + /* 001(d8) 010 330 : FPU,8086 */ + {I_FCOMP, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72074, 323, 1913}, + /* 3 : FCOMP fpu0,fpureg [-r: d8 d8+r ] FPU,8086 */ + /* 001(d8) 011 330 : FPU,8086 */ + {I_FCOMP, 2, {FPUREG|RN_ZERO,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+72079, 323, 1914}, + /* 4 : FCOMP void [ d8 d9 ] ND,FPU,8086 */ + /* 002(d8 d9) : FPU,8086 */ + {I_FCOMP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73032, 323, 1915}, +}; + +static const struct itemplate instrux_FCOMPP[1] = { + /* 0 : FCOMPP void [ de d9 ] FPU,8086 */ + /* 002(de d9) : FPU,8086 */ + {I_FCOMPP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73036, 323, 1916}, +}; + +static const struct itemplate instrux_FCOS[1] = { + /* 0 : FCOS void [ d9 ff ] FPU,386 */ + /* 002(d9 ff) : FPU,386 */ + {I_FCOS, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73040, 326, 1917}, +}; + +static const struct itemplate instrux_FDECSTP[1] = { + /* 0 : FDECSTP void [ d9 f6 ] FPU,8086 */ + /* 002(d9 f6) : FPU,8086 */ + {I_FDECSTP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73044, 323, 1918}, +}; + +static const struct itemplate instrux_FDISI[1] = { + /* 0 : FDISI void [ wait db e1 ] FPU,8086 */ + /* 341 002(db e1) : FPU,8086 */ + {I_FDISI, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72084, 323, 1919}, +}; + +static const struct itemplate instrux_FDIV[7] = { + /* 0 : FDIV mem32 [m: d8 /6 ] FPU,8086 */ + /* 001(d8) 206 : FPU,8086 */ + {I_FDIV, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73048, 323, 1920}, + /* 1 : FDIV mem64 [m: dc /6 ] FPU,8086 */ + /* 001(dc) 206 : FPU,8086 */ + {I_FDIV, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73052, 323, 1921}, + /* 2 : FDIV fpureg|to [r: dc f8+r ] FPU,8086 */ + /* 001(dc) 010 370 : FPU,8086 */ + {I_FDIV, 1, {FPUREG|TO,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72089, 323, 1922}, + /* 3 : FDIV fpureg [r: d8 f0+r ] FPU,8086 */ + /* 001(d8) 010 360 : FPU,8086 */ + {I_FDIV, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72094, 323, 1923}, + /* 4 : FDIV fpureg,fpu0 [r-: dc f8+r ] FPU,8086 */ + /* 001(dc) 010 370 : FPU,8086 */ + {I_FDIV, 2, {FPUREG,FPUREG|RN_ZERO,0,0,0}, NO_DECORATOR, nasm_bytecodes+72089, 323, 1924}, + /* 5 : FDIV fpu0,fpureg [-r: d8 f0+r ] FPU,8086 */ + /* 001(d8) 011 360 : FPU,8086 */ + {I_FDIV, 2, {FPUREG|RN_ZERO,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+72099, 323, 1925}, + /* 6 : FDIV void [ de f9 ] ND,FPU,8086 */ + /* 002(de f9) : FPU,8086 */ + {I_FDIV, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73056, 323, 1926}, +}; + +static const struct itemplate instrux_FDIVP[3] = { + /* 0 : FDIVP fpureg [r: de f8+r ] FPU,8086 */ + /* 001(de) 010 370 : FPU,8086 */ + {I_FDIVP, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72104, 323, 1927}, + /* 1 : FDIVP fpureg,fpu0 [r-: de f8+r ] FPU,8086 */ + /* 001(de) 010 370 : FPU,8086 */ + {I_FDIVP, 2, {FPUREG,FPUREG|RN_ZERO,0,0,0}, NO_DECORATOR, nasm_bytecodes+72104, 323, 1928}, + /* 2 : FDIVP void [ de f9 ] ND,FPU,8086 */ + /* 002(de f9) : FPU,8086 */ + {I_FDIVP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73056, 323, 1929}, +}; + +static const struct itemplate instrux_FDIVR[7] = { + /* 0 : FDIVR mem32 [m: d8 /7 ] FPU,8086 */ + /* 001(d8) 207 : FPU,8086 */ + {I_FDIVR, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73060, 323, 1930}, + /* 1 : FDIVR mem64 [m: dc /7 ] FPU,8086 */ + /* 001(dc) 207 : FPU,8086 */ + {I_FDIVR, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73064, 323, 1931}, + /* 2 : FDIVR fpureg|to [r: dc f0+r ] FPU,8086 */ + /* 001(dc) 010 360 : FPU,8086 */ + {I_FDIVR, 1, {FPUREG|TO,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72109, 323, 1932}, + /* 3 : FDIVR fpureg,fpu0 [r-: dc f0+r ] FPU,8086 */ + /* 001(dc) 010 360 : FPU,8086 */ + {I_FDIVR, 2, {FPUREG,FPUREG|RN_ZERO,0,0,0}, NO_DECORATOR, nasm_bytecodes+72109, 323, 1933}, + /* 4 : FDIVR fpureg [r: d8 f8+r ] FPU,8086 */ + /* 001(d8) 010 370 : FPU,8086 */ + {I_FDIVR, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72114, 323, 1934}, + /* 5 : FDIVR fpu0,fpureg [-r: d8 f8+r ] FPU,8086 */ + /* 001(d8) 011 370 : FPU,8086 */ + {I_FDIVR, 2, {FPUREG|RN_ZERO,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+72119, 323, 1935}, + /* 6 : FDIVR void [ de f1 ] ND,FPU,8086 */ + /* 002(de f1) : FPU,8086 */ + {I_FDIVR, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73068, 323, 1936}, +}; + +static const struct itemplate instrux_FDIVRP[3] = { + /* 0 : FDIVRP fpureg [r: de f0+r ] FPU,8086 */ + /* 001(de) 010 360 : FPU,8086 */ + {I_FDIVRP, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72124, 323, 1937}, + /* 1 : FDIVRP fpureg,fpu0 [r-: de f0+r ] FPU,8086 */ + /* 001(de) 010 360 : FPU,8086 */ + {I_FDIVRP, 2, {FPUREG,FPUREG|RN_ZERO,0,0,0}, NO_DECORATOR, nasm_bytecodes+72124, 323, 1938}, + /* 2 : FDIVRP void [ de f1 ] ND,FPU,8086 */ + /* 002(de f1) : FPU,8086 */ + {I_FDIVRP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73068, 323, 1939}, +}; + +static const struct itemplate instrux_FEMMS[1] = { + /* 0 : FEMMS void [ 0f 0e ] 3DNOW,PENT */ + /* 355 001(0e) : 3DNOW,PENT */ + {I_FEMMS, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73072, 327, 1940}, +}; + +static const struct itemplate instrux_FENI[1] = { + /* 0 : FENI void [ wait db e0 ] FPU,8086 */ + /* 341 002(db e0) : FPU,8086 */ + {I_FENI, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72129, 323, 1941}, +}; + +static const struct itemplate instrux_FFREE[2] = { + /* 0 : FFREE fpureg [r: dd c0+r ] FPU,8086 */ + /* 001(dd) 010 300 : FPU,8086 */ + {I_FFREE, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72134, 323, 1942}, + /* 1 : FFREE void [ dd c1 ] FPU,8086 */ + /* 002(dd c1) : FPU,8086 */ + {I_FFREE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73076, 323, 1943}, +}; + +static const struct itemplate instrux_FFREEP[2] = { + /* 0 : FFREEP fpureg [r: df c0+r ] UNDOC,FPU,286 */ + /* 001(df) 010 300 : UNDOC,FPU,286 */ + {I_FFREEP, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72139, 328, 1944}, + /* 1 : FFREEP void [ df c1 ] UNDOC,FPU,286 */ + /* 002(df c1) : UNDOC,FPU,286 */ + {I_FFREEP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73080, 328, 1945}, +}; + +static const struct itemplate instrux_FIADD[2] = { + /* 0 : FIADD mem32 [m: da /0 ] FPU,8086 */ + /* 001(da) 200 : FPU,8086 */ + {I_FIADD, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73084, 323, 1946}, + /* 1 : FIADD mem16 [m: de /0 ] FPU,8086 */ + /* 001(de) 200 : FPU,8086 */ + {I_FIADD, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73088, 323, 1947}, +}; + +static const struct itemplate instrux_FICOM[2] = { + /* 0 : FICOM mem32 [m: da /2 ] FPU,8086 */ + /* 001(da) 202 : FPU,8086 */ + {I_FICOM, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73092, 323, 1948}, + /* 1 : FICOM mem16 [m: de /2 ] FPU,8086 */ + /* 001(de) 202 : FPU,8086 */ + {I_FICOM, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73096, 323, 1949}, +}; + +static const struct itemplate instrux_FICOMP[2] = { + /* 0 : FICOMP mem32 [m: da /3 ] FPU,8086 */ + /* 001(da) 203 : FPU,8086 */ + {I_FICOMP, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73100, 323, 1950}, + /* 1 : FICOMP mem16 [m: de /3 ] FPU,8086 */ + /* 001(de) 203 : FPU,8086 */ + {I_FICOMP, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73104, 323, 1951}, +}; + +static const struct itemplate instrux_FIDIV[2] = { + /* 0 : FIDIV mem32 [m: da /6 ] FPU,8086 */ + /* 001(da) 206 : FPU,8086 */ + {I_FIDIV, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73108, 323, 1952}, + /* 1 : FIDIV mem16 [m: de /6 ] FPU,8086 */ + /* 001(de) 206 : FPU,8086 */ + {I_FIDIV, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73112, 323, 1953}, +}; + +static const struct itemplate instrux_FIDIVR[2] = { + /* 0 : FIDIVR mem32 [m: da /7 ] FPU,8086 */ + /* 001(da) 207 : FPU,8086 */ + {I_FIDIVR, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73116, 323, 1954}, + /* 1 : FIDIVR mem16 [m: de /7 ] FPU,8086 */ + /* 001(de) 207 : FPU,8086 */ + {I_FIDIVR, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73120, 323, 1955}, +}; + +static const struct itemplate instrux_FILD[3] = { + /* 0 : FILD mem32 [m: db /0 ] FPU,8086 */ + /* 001(db) 200 : FPU,8086 */ + {I_FILD, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73124, 323, 1956}, + /* 1 : FILD mem16 [m: df /0 ] FPU,8086 */ + /* 001(df) 200 : FPU,8086 */ + {I_FILD, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73128, 323, 1957}, + /* 2 : FILD mem64 [m: df /5 ] FPU,8086 */ + /* 001(df) 205 : FPU,8086 */ + {I_FILD, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73132, 323, 1958}, +}; + +static const struct itemplate instrux_FIMUL[2] = { + /* 0 : FIMUL mem32 [m: da /1 ] FPU,8086 */ + /* 001(da) 201 : FPU,8086 */ + {I_FIMUL, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73136, 323, 1959}, + /* 1 : FIMUL mem16 [m: de /1 ] FPU,8086 */ + /* 001(de) 201 : FPU,8086 */ + {I_FIMUL, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73140, 323, 1960}, +}; + +static const struct itemplate instrux_FINCSTP[1] = { + /* 0 : FINCSTP void [ d9 f7 ] FPU,8086 */ + /* 002(d9 f7) : FPU,8086 */ + {I_FINCSTP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73144, 323, 1961}, +}; + +static const struct itemplate instrux_FINIT[1] = { + /* 0 : FINIT void [ wait db e3 ] FPU,8086 */ + /* 341 002(db e3) : FPU,8086 */ + {I_FINIT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72144, 323, 1962}, +}; + +static const struct itemplate instrux_FIST[2] = { + /* 0 : FIST mem32 [m: db /2 ] FPU,8086 */ + /* 001(db) 202 : FPU,8086 */ + {I_FIST, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73148, 323, 1963}, + /* 1 : FIST mem16 [m: df /2 ] FPU,8086 */ + /* 001(df) 202 : FPU,8086 */ + {I_FIST, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73152, 323, 1964}, +}; + +static const struct itemplate instrux_FISTP[3] = { + /* 0 : FISTP mem32 [m: db /3 ] FPU,8086 */ + /* 001(db) 203 : FPU,8086 */ + {I_FISTP, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73156, 323, 1965}, + /* 1 : FISTP mem16 [m: df /3 ] FPU,8086 */ + /* 001(df) 203 : FPU,8086 */ + {I_FISTP, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73160, 323, 1966}, + /* 2 : FISTP mem64 [m: df /7 ] FPU,8086 */ + /* 001(df) 207 : FPU,8086 */ + {I_FISTP, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73164, 323, 1967}, +}; + +static const struct itemplate instrux_FISTTP[3] = { + /* 0 : FISTTP mem16 [m: df /1 ] FPU,PRESCOTT */ + /* 001(df) 201 : FPU,PRESCOTT */ + {I_FISTTP, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73168, 329, 1968}, + /* 1 : FISTTP mem32 [m: db /1 ] FPU,PRESCOTT */ + /* 001(db) 201 : FPU,PRESCOTT */ + {I_FISTTP, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73172, 329, 1969}, + /* 2 : FISTTP mem64 [m: dd /1 ] FPU,PRESCOTT */ + /* 001(dd) 201 : FPU,PRESCOTT */ + {I_FISTTP, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73176, 329, 1970}, +}; + +static const struct itemplate instrux_FISUB[2] = { + /* 0 : FISUB mem32 [m: da /4 ] FPU,8086 */ + /* 001(da) 204 : FPU,8086 */ + {I_FISUB, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73180, 323, 1971}, + /* 1 : FISUB mem16 [m: de /4 ] FPU,8086 */ + /* 001(de) 204 : FPU,8086 */ + {I_FISUB, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73184, 323, 1972}, +}; + +static const struct itemplate instrux_FISUBR[2] = { + /* 0 : FISUBR mem32 [m: da /5 ] FPU,8086 */ + /* 001(da) 205 : FPU,8086 */ + {I_FISUBR, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73188, 323, 1973}, + /* 1 : FISUBR mem16 [m: de /5 ] FPU,8086 */ + /* 001(de) 205 : FPU,8086 */ + {I_FISUBR, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73192, 323, 1974}, +}; + +static const struct itemplate instrux_FLD[5] = { + /* 0 : FLD mem32 [m: d9 /0 ] FPU,8086 */ + /* 001(d9) 200 : FPU,8086 */ + {I_FLD, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73196, 323, 1975}, + /* 1 : FLD mem64 [m: dd /0 ] FPU,8086 */ + /* 001(dd) 200 : FPU,8086 */ + {I_FLD, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73200, 323, 1976}, + /* 2 : FLD mem80 [m: db /5 ] FPU,8086 */ + /* 001(db) 205 : FPU,8086 */ + {I_FLD, 1, {MEMORY|BITS80,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73204, 323, 1977}, + /* 3 : FLD fpureg [r: d9 c0+r ] FPU,8086 */ + /* 001(d9) 010 300 : FPU,8086 */ + {I_FLD, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72149, 323, 1978}, + /* 4 : FLD void [ d9 c1 ] ND,FPU,8086 */ + /* 002(d9 c1) : FPU,8086 */ + {I_FLD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73208, 323, 1979}, +}; + +static const struct itemplate instrux_FLD1[1] = { + /* 0 : FLD1 void [ d9 e8 ] FPU,8086 */ + /* 002(d9 e8) : FPU,8086 */ + {I_FLD1, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73212, 323, 1980}, +}; + +static const struct itemplate instrux_FLDCW[1] = { + /* 0 : FLDCW mem [m: d9 /5 ] AR0,SW,FPU,8086 */ + /* 001(d9) 205 : AR0,SW,FPU,8086 */ + {I_FLDCW, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73216, 330, 1981}, +}; + +static const struct itemplate instrux_FLDENV[1] = { + /* 0 : FLDENV mem [m: d9 /4 ] FPU,8086 */ + /* 001(d9) 204 : FPU,8086 */ + {I_FLDENV, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73220, 323, 1982}, +}; + +static const struct itemplate instrux_FLDL2E[1] = { + /* 0 : FLDL2E void [ d9 ea ] FPU,8086 */ + /* 002(d9 ea) : FPU,8086 */ + {I_FLDL2E, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73224, 323, 1983}, +}; + +static const struct itemplate instrux_FLDL2T[1] = { + /* 0 : FLDL2T void [ d9 e9 ] FPU,8086 */ + /* 002(d9 e9) : FPU,8086 */ + {I_FLDL2T, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73228, 323, 1984}, +}; + +static const struct itemplate instrux_FLDLG2[1] = { + /* 0 : FLDLG2 void [ d9 ec ] FPU,8086 */ + /* 002(d9 ec) : FPU,8086 */ + {I_FLDLG2, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73232, 323, 1985}, +}; + +static const struct itemplate instrux_FLDLN2[1] = { + /* 0 : FLDLN2 void [ d9 ed ] FPU,8086 */ + /* 002(d9 ed) : FPU,8086 */ + {I_FLDLN2, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73236, 323, 1986}, +}; + +static const struct itemplate instrux_FLDPI[1] = { + /* 0 : FLDPI void [ d9 eb ] FPU,8086 */ + /* 002(d9 eb) : FPU,8086 */ + {I_FLDPI, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73240, 323, 1987}, +}; + +static const struct itemplate instrux_FLDZ[1] = { + /* 0 : FLDZ void [ d9 ee ] FPU,8086 */ + /* 002(d9 ee) : FPU,8086 */ + {I_FLDZ, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73244, 323, 1988}, +}; + +static const struct itemplate instrux_FMUL[7] = { + /* 0 : FMUL mem32 [m: d8 /1 ] FPU,8086 */ + /* 001(d8) 201 : FPU,8086 */ + {I_FMUL, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+69941, 323, 1989}, + /* 1 : FMUL mem64 [m: dc /1 ] FPU,8086 */ + /* 001(dc) 201 : FPU,8086 */ + {I_FMUL, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73248, 323, 1990}, + /* 2 : FMUL fpureg|to [r: dc c8+r ] FPU,8086 */ + /* 001(dc) 010 310 : FPU,8086 */ + {I_FMUL, 1, {FPUREG|TO,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72154, 323, 1991}, + /* 3 : FMUL fpureg,fpu0 [r-: dc c8+r ] FPU,8086 */ + /* 001(dc) 010 310 : FPU,8086 */ + {I_FMUL, 2, {FPUREG,FPUREG|RN_ZERO,0,0,0}, NO_DECORATOR, nasm_bytecodes+72154, 323, 1992}, + /* 4 : FMUL fpureg [r: d8 c8+r ] FPU,8086 */ + /* 001(d8) 010 310 : FPU,8086 */ + {I_FMUL, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72159, 323, 1993}, + /* 5 : FMUL fpu0,fpureg [-r: d8 c8+r ] FPU,8086 */ + /* 001(d8) 011 310 : FPU,8086 */ + {I_FMUL, 2, {FPUREG|RN_ZERO,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+72164, 323, 1994}, + /* 6 : FMUL void [ de c9 ] ND,FPU,8086 */ + /* 002(de c9) : FPU,8086 */ + {I_FMUL, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73252, 323, 1995}, +}; + +static const struct itemplate instrux_FMULP[3] = { + /* 0 : FMULP fpureg [r: de c8+r ] FPU,8086 */ + /* 001(de) 010 310 : FPU,8086 */ + {I_FMULP, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72169, 323, 1996}, + /* 1 : FMULP fpureg,fpu0 [r-: de c8+r ] FPU,8086 */ + /* 001(de) 010 310 : FPU,8086 */ + {I_FMULP, 2, {FPUREG,FPUREG|RN_ZERO,0,0,0}, NO_DECORATOR, nasm_bytecodes+72169, 323, 1997}, + /* 2 : FMULP void [ de c9 ] ND,FPU,8086 */ + /* 002(de c9) : FPU,8086 */ + {I_FMULP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73252, 323, 1998}, +}; + +static const struct itemplate instrux_FNCLEX[1] = { + /* 0 : FNCLEX void [ db e2 ] FPU,8086 */ + /* 002(db e2) : FPU,8086 */ + {I_FNCLEX, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71960, 323, 1999}, +}; + +static const struct itemplate instrux_FNDISI[1] = { + /* 0 : FNDISI void [ db e1 ] FPU,8086 */ + /* 002(db e1) : FPU,8086 */ + {I_FNDISI, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72085, 323, 2000}, +}; + +static const struct itemplate instrux_FNENI[1] = { + /* 0 : FNENI void [ db e0 ] FPU,8086 */ + /* 002(db e0) : FPU,8086 */ + {I_FNENI, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72130, 323, 2001}, +}; + +static const struct itemplate instrux_FNINIT[1] = { + /* 0 : FNINIT void [ db e3 ] FPU,8086 */ + /* 002(db e3) : FPU,8086 */ + {I_FNINIT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72145, 323, 2002}, +}; + +static const struct itemplate instrux_FNOP[1] = { + /* 0 : FNOP void [ d9 d0 ] FPU,8086 */ + /* 002(d9 d0) : FPU,8086 */ + {I_FNOP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73256, 323, 2003}, +}; + +static const struct itemplate instrux_FNSAVE[1] = { + /* 0 : FNSAVE mem [m: dd /6 ] FPU,8086 */ + /* 001(dd) 206 : FPU,8086 */ + {I_FNSAVE, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72175, 323, 2004}, +}; + +static const struct itemplate instrux_FNSTCW[1] = { + /* 0 : FNSTCW mem [m: d9 /7 ] AR0,SW,FPU,8086 */ + /* 001(d9) 207 : AR0,SW,FPU,8086 */ + {I_FNSTCW, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72185, 330, 2005}, +}; + +static const struct itemplate instrux_FNSTENV[1] = { + /* 0 : FNSTENV mem [m: d9 /6 ] FPU,8086 */ + /* 001(d9) 206 : FPU,8086 */ + {I_FNSTENV, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72190, 323, 2006}, +}; + +static const struct itemplate instrux_FNSTSW[2] = { + /* 0 : FNSTSW mem [m: dd /7 ] AR0,SW,FPU,8086 */ + /* 001(dd) 207 : AR0,SW,FPU,8086 */ + {I_FNSTSW, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72200, 330, 2007}, + /* 1 : FNSTSW reg_ax [-: df e0 ] FPU,286 */ + /* 002(df e0) : FPU,286 */ + {I_FNSTSW, 1, {REG_AX,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72205, 331, 2008}, +}; + +static const struct itemplate instrux_FPATAN[1] = { + /* 0 : FPATAN void [ d9 f3 ] FPU,8086 */ + /* 002(d9 f3) : FPU,8086 */ + {I_FPATAN, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73260, 323, 2009}, +}; + +static const struct itemplate instrux_FPREM[1] = { + /* 0 : FPREM void [ d9 f8 ] FPU,8086 */ + /* 002(d9 f8) : FPU,8086 */ + {I_FPREM, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73264, 323, 2010}, +}; + +static const struct itemplate instrux_FPREM1[1] = { + /* 0 : FPREM1 void [ d9 f5 ] FPU,386 */ + /* 002(d9 f5) : FPU,386 */ + {I_FPREM1, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73268, 326, 2011}, +}; + +static const struct itemplate instrux_FPTAN[1] = { + /* 0 : FPTAN void [ d9 f2 ] FPU,8086 */ + /* 002(d9 f2) : FPU,8086 */ + {I_FPTAN, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73272, 323, 2012}, +}; + +static const struct itemplate instrux_FRNDINT[1] = { + /* 0 : FRNDINT void [ d9 fc ] FPU,8086 */ + /* 002(d9 fc) : FPU,8086 */ + {I_FRNDINT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73276, 323, 2013}, +}; + +static const struct itemplate instrux_FRSTOR[1] = { + /* 0 : FRSTOR mem [m: dd /4 ] FPU,8086 */ + /* 001(dd) 204 : FPU,8086 */ + {I_FRSTOR, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73280, 323, 2014}, +}; + +static const struct itemplate instrux_FSAVE[1] = { + /* 0 : FSAVE mem [m: wait dd /6 ] FPU,8086 */ + /* 341 001(dd) 206 : FPU,8086 */ + {I_FSAVE, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72174, 323, 2015}, +}; + +static const struct itemplate instrux_FSCALE[1] = { + /* 0 : FSCALE void [ d9 fd ] FPU,8086 */ + /* 002(d9 fd) : FPU,8086 */ + {I_FSCALE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73284, 323, 2016}, +}; + +static const struct itemplate instrux_FSETPM[1] = { + /* 0 : FSETPM void [ db e4 ] FPU,286 */ + /* 002(db e4) : FPU,286 */ + {I_FSETPM, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73288, 331, 2017}, +}; + +static const struct itemplate instrux_FSIN[1] = { + /* 0 : FSIN void [ d9 fe ] FPU,386 */ + /* 002(d9 fe) : FPU,386 */ + {I_FSIN, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73292, 326, 2018}, +}; + +static const struct itemplate instrux_FSINCOS[1] = { + /* 0 : FSINCOS void [ d9 fb ] FPU,386 */ + /* 002(d9 fb) : FPU,386 */ + {I_FSINCOS, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73296, 326, 2019}, +}; + +static const struct itemplate instrux_FSQRT[1] = { + /* 0 : FSQRT void [ d9 fa ] FPU,8086 */ + /* 002(d9 fa) : FPU,8086 */ + {I_FSQRT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73300, 323, 2020}, +}; + +static const struct itemplate instrux_FST[4] = { + /* 0 : FST mem32 [m: d9 /2 ] FPU,8086 */ + /* 001(d9) 202 : FPU,8086 */ + {I_FST, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73304, 323, 2021}, + /* 1 : FST mem64 [m: dd /2 ] FPU,8086 */ + /* 001(dd) 202 : FPU,8086 */ + {I_FST, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73308, 323, 2022}, + /* 2 : FST fpureg [r: dd d0+r ] FPU,8086 */ + /* 001(dd) 010 320 : FPU,8086 */ + {I_FST, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72179, 323, 2023}, + /* 3 : FST void [ dd d1 ] ND,FPU,8086 */ + /* 002(dd d1) : FPU,8086 */ + {I_FST, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73312, 323, 2024}, +}; + +static const struct itemplate instrux_FSTCW[1] = { + /* 0 : FSTCW mem [m: wait d9 /7 ] AR0,SW,FPU,8086 */ + /* 341 001(d9) 207 : AR0,SW,FPU,8086 */ + {I_FSTCW, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72184, 330, 2025}, +}; + +static const struct itemplate instrux_FSTENV[1] = { + /* 0 : FSTENV mem [m: wait d9 /6 ] FPU,8086 */ + /* 341 001(d9) 206 : FPU,8086 */ + {I_FSTENV, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72189, 323, 2026}, +}; + +static const struct itemplate instrux_FSTP[5] = { + /* 0 : FSTP mem32 [m: d9 /3 ] FPU,8086 */ + /* 001(d9) 203 : FPU,8086 */ + {I_FSTP, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73316, 323, 2027}, + /* 1 : FSTP mem64 [m: dd /3 ] FPU,8086 */ + /* 001(dd) 203 : FPU,8086 */ + {I_FSTP, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73320, 323, 2028}, + /* 2 : FSTP mem80 [m: db /7 ] FPU,8086 */ + /* 001(db) 207 : FPU,8086 */ + {I_FSTP, 1, {MEMORY|BITS80,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73324, 323, 2029}, + /* 3 : FSTP fpureg [r: dd d8+r ] FPU,8086 */ + /* 001(dd) 010 330 : FPU,8086 */ + {I_FSTP, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72194, 323, 2030}, + /* 4 : FSTP void [ dd d9 ] ND,FPU,8086 */ + /* 002(dd d9) : FPU,8086 */ + {I_FSTP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73328, 323, 2031}, +}; + +static const struct itemplate instrux_FSTSW[2] = { + /* 0 : FSTSW mem [m: wait dd /7 ] AR0,SW,FPU,8086 */ + /* 341 001(dd) 207 : AR0,SW,FPU,8086 */ + {I_FSTSW, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72199, 330, 2032}, + /* 1 : FSTSW reg_ax [-: wait df e0 ] FPU,286 */ + /* 341 002(df e0) : FPU,286 */ + {I_FSTSW, 1, {REG_AX,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72204, 331, 2033}, +}; + +static const struct itemplate instrux_FSUB[7] = { + /* 0 : FSUB mem32 [m: d8 /4 ] FPU,8086 */ + /* 001(d8) 204 : FPU,8086 */ + {I_FSUB, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73332, 323, 2034}, + /* 1 : FSUB mem64 [m: dc /4 ] FPU,8086 */ + /* 001(dc) 204 : FPU,8086 */ + {I_FSUB, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73336, 323, 2035}, + /* 2 : FSUB fpureg|to [r: dc e8+r ] FPU,8086 */ + /* 001(dc) 010 350 : FPU,8086 */ + {I_FSUB, 1, {FPUREG|TO,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72209, 323, 2036}, + /* 3 : FSUB fpureg,fpu0 [r-: dc e8+r ] FPU,8086 */ + /* 001(dc) 010 350 : FPU,8086 */ + {I_FSUB, 2, {FPUREG,FPUREG|RN_ZERO,0,0,0}, NO_DECORATOR, nasm_bytecodes+72209, 323, 2037}, + /* 4 : FSUB fpureg [r: d8 e0+r ] FPU,8086 */ + /* 001(d8) 010 340 : FPU,8086 */ + {I_FSUB, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72214, 323, 2038}, + /* 5 : FSUB fpu0,fpureg [-r: d8 e0+r ] FPU,8086 */ + /* 001(d8) 011 340 : FPU,8086 */ + {I_FSUB, 2, {FPUREG|RN_ZERO,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+72219, 323, 2039}, + /* 6 : FSUB void [ de e9 ] ND,FPU,8086 */ + /* 002(de e9) : FPU,8086 */ + {I_FSUB, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73340, 323, 2040}, +}; + +static const struct itemplate instrux_FSUBP[3] = { + /* 0 : FSUBP fpureg [r: de e8+r ] FPU,8086 */ + /* 001(de) 010 350 : FPU,8086 */ + {I_FSUBP, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72224, 323, 2041}, + /* 1 : FSUBP fpureg,fpu0 [r-: de e8+r ] FPU,8086 */ + /* 001(de) 010 350 : FPU,8086 */ + {I_FSUBP, 2, {FPUREG,FPUREG|RN_ZERO,0,0,0}, NO_DECORATOR, nasm_bytecodes+72224, 323, 2042}, + /* 2 : FSUBP void [ de e9 ] ND,FPU,8086 */ + /* 002(de e9) : FPU,8086 */ + {I_FSUBP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73340, 323, 2043}, +}; + +static const struct itemplate instrux_FSUBR[7] = { + /* 0 : FSUBR mem32 [m: d8 /5 ] FPU,8086 */ + /* 001(d8) 205 : FPU,8086 */ + {I_FSUBR, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73344, 323, 2044}, + /* 1 : FSUBR mem64 [m: dc /5 ] FPU,8086 */ + /* 001(dc) 205 : FPU,8086 */ + {I_FSUBR, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73348, 323, 2045}, + /* 2 : FSUBR fpureg|to [r: dc e0+r ] FPU,8086 */ + /* 001(dc) 010 340 : FPU,8086 */ + {I_FSUBR, 1, {FPUREG|TO,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72229, 323, 2046}, + /* 3 : FSUBR fpureg,fpu0 [r-: dc e0+r ] FPU,8086 */ + /* 001(dc) 010 340 : FPU,8086 */ + {I_FSUBR, 2, {FPUREG,FPUREG|RN_ZERO,0,0,0}, NO_DECORATOR, nasm_bytecodes+72229, 323, 2047}, + /* 4 : FSUBR fpureg [r: d8 e8+r ] FPU,8086 */ + /* 001(d8) 010 350 : FPU,8086 */ + {I_FSUBR, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72234, 323, 2048}, + /* 5 : FSUBR fpu0,fpureg [-r: d8 e8+r ] FPU,8086 */ + /* 001(d8) 011 350 : FPU,8086 */ + {I_FSUBR, 2, {FPUREG|RN_ZERO,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+72239, 323, 2049}, + /* 6 : FSUBR void [ de e1 ] ND,FPU,8086 */ + /* 002(de e1) : FPU,8086 */ + {I_FSUBR, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73352, 323, 2050}, +}; + +static const struct itemplate instrux_FSUBRP[3] = { + /* 0 : FSUBRP fpureg [r: de e0+r ] FPU,8086 */ + /* 001(de) 010 340 : FPU,8086 */ + {I_FSUBRP, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72244, 323, 2051}, + /* 1 : FSUBRP fpureg,fpu0 [r-: de e0+r ] FPU,8086 */ + /* 001(de) 010 340 : FPU,8086 */ + {I_FSUBRP, 2, {FPUREG,FPUREG|RN_ZERO,0,0,0}, NO_DECORATOR, nasm_bytecodes+72244, 323, 2052}, + /* 2 : FSUBRP void [ de e1 ] ND,FPU,8086 */ + /* 002(de e1) : FPU,8086 */ + {I_FSUBRP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73352, 323, 2053}, +}; + +static const struct itemplate instrux_FTST[1] = { + /* 0 : FTST void [ d9 e4 ] FPU,8086 */ + /* 002(d9 e4) : FPU,8086 */ + {I_FTST, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73356, 323, 2054}, +}; + +static const struct itemplate instrux_FUCOM[3] = { + /* 0 : FUCOM fpureg [r: dd e0+r ] FPU,386 */ + /* 001(dd) 010 340 : FPU,386 */ + {I_FUCOM, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72249, 326, 2055}, + /* 1 : FUCOM fpu0,fpureg [-r: dd e0+r ] FPU,386 */ + /* 001(dd) 011 340 : FPU,386 */ + {I_FUCOM, 2, {FPUREG|RN_ZERO,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+72254, 326, 2056}, + /* 2 : FUCOM void [ dd e1 ] ND,FPU,386 */ + /* 002(dd e1) : FPU,386 */ + {I_FUCOM, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73360, 326, 2057}, +}; + +static const struct itemplate instrux_FUCOMI[3] = { + /* 0 : FUCOMI fpureg [r: db e8+r ] FL,FPU,P6 */ + /* 001(db) 010 350 : FL,FPU,P6 */ + {I_FUCOMI, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72259, 325, 2058}, + /* 1 : FUCOMI fpu0,fpureg [-r: db e8+r ] FL,FPU,P6 */ + /* 001(db) 011 350 : FL,FPU,P6 */ + {I_FUCOMI, 2, {FPUREG|RN_ZERO,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+72264, 325, 2059}, + /* 2 : FUCOMI void [ db e9 ] ND,FL,FPU,P6 */ + /* 002(db e9) : FL,FPU,P6 */ + {I_FUCOMI, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73364, 325, 2060}, +}; + +static const struct itemplate instrux_FUCOMIP[3] = { + /* 0 : FUCOMIP fpureg [r: df e8+r ] FL,FPU,P6 */ + /* 001(df) 010 350 : FL,FPU,P6 */ + {I_FUCOMIP, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72269, 325, 2061}, + /* 1 : FUCOMIP fpu0,fpureg [-r: df e8+r ] FL,FPU,P6 */ + /* 001(df) 011 350 : FL,FPU,P6 */ + {I_FUCOMIP, 2, {FPUREG|RN_ZERO,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+72274, 325, 2062}, + /* 2 : FUCOMIP void [ df e9 ] ND,FL,FPU,P6 */ + /* 002(df e9) : FL,FPU,P6 */ + {I_FUCOMIP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73368, 325, 2063}, +}; + +static const struct itemplate instrux_FUCOMP[3] = { + /* 0 : FUCOMP fpureg [r: dd e8+r ] FPU,386 */ + /* 001(dd) 010 350 : FPU,386 */ + {I_FUCOMP, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72279, 326, 2064}, + /* 1 : FUCOMP fpu0,fpureg [-r: dd e8+r ] FPU,386 */ + /* 001(dd) 011 350 : FPU,386 */ + {I_FUCOMP, 2, {FPUREG|RN_ZERO,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+72284, 326, 2065}, + /* 2 : FUCOMP void [ dd e9 ] ND,FPU,386 */ + /* 002(dd e9) : FPU,386 */ + {I_FUCOMP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73372, 326, 2066}, +}; + +static const struct itemplate instrux_FUCOMPP[1] = { + /* 0 : FUCOMPP void [ da e9 ] FPU,386 */ + /* 002(da e9) : FPU,386 */ + {I_FUCOMPP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73376, 326, 2067}, +}; + +static const struct itemplate instrux_FXAM[1] = { + /* 0 : FXAM void [ d9 e5 ] FPU,8086 */ + /* 002(d9 e5) : FPU,8086 */ + {I_FXAM, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73380, 323, 2068}, +}; + +static const struct itemplate instrux_FXCH[4] = { + /* 0 : FXCH fpureg [r: d9 c8+r ] FPU,8086 */ + /* 001(d9) 010 310 : FPU,8086 */ + {I_FXCH, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72289, 323, 2069}, + /* 1 : FXCH fpureg,fpu0 [r-: d9 c8+r ] FPU,8086 */ + /* 001(d9) 010 310 : FPU,8086 */ + {I_FXCH, 2, {FPUREG,FPUREG|RN_ZERO,0,0,0}, NO_DECORATOR, nasm_bytecodes+72289, 323, 2070}, + /* 2 : FXCH fpu0,fpureg [-r: d9 c8+r ] FPU,8086 */ + /* 001(d9) 011 310 : FPU,8086 */ + {I_FXCH, 2, {FPUREG|RN_ZERO,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+72294, 323, 2071}, + /* 3 : FXCH void [ d9 c9 ] ND,FPU,8086 */ + /* 002(d9 c9) : FPU,8086 */ + {I_FXCH, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73384, 323, 2072}, +}; + +static const struct itemplate instrux_FXTRACT[1] = { + /* 0 : FXTRACT void [ d9 f4 ] FPU,8086 */ + /* 002(d9 f4) : FPU,8086 */ + {I_FXTRACT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73388, 323, 2073}, +}; + +static const struct itemplate instrux_FYL2X[1] = { + /* 0 : FYL2X void [ d9 f1 ] FPU,8086 */ + /* 002(d9 f1) : FPU,8086 */ + {I_FYL2X, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73392, 323, 2074}, +}; + +static const struct itemplate instrux_FYL2XP1[1] = { + /* 0 : FYL2XP1 void [ d9 f9 ] FPU,8086 */ + /* 002(d9 f9) : FPU,8086 */ + {I_FYL2XP1, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73396, 323, 2075}, +}; + +static const struct itemplate instrux_EMMS[1] = { + /* 0 : EMMS void [ 0f 77 ] MMX,PENT */ + /* 355 001(77) : MMX,PENT */ + {I_EMMS, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73400, 332, 2078}, +}; + +static const struct itemplate instrux_MOVD[16] = { + /* 0 : MOVD mmxreg,rm32 [rm: np 0f 6e /r ] MMX,PENT */ + /* 360 355 001(6e) 110 : MMX,PENT */ + {I_MOVD, 2, {MMXREG,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+67635, 332, 2079}, + /* 1 : MOVD rm32,mmxreg [mr: np 0f 7e /r ] MMX,PENT */ + /* 360 355 001(7e) 101 : MMX,PENT */ + {I_MOVD, 2, {RM_GPR|BITS32,MMXREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+67641, 332, 2080}, + /* 2 : MOVD mmxreg,rm64 [rm: np o64 0f 6e /r ] ND,LONG,PROT,MMX,X86_64 */ + /* 360 324 355 001(6e) 110 : LONG,PROT,MMX,X86_64 */ + {I_MOVD, 2, {MMXREG,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+57350, 333, 2081}, + /* 3 : MOVD rm64,mmxreg [mr: np o64 0f 7e /r ] ND,LONG,PROT,MMX,X86_64 */ + /* 360 324 355 001(7e) 101 : LONG,PROT,MMX,X86_64 */ + {I_MOVD, 2, {RM_GPR|BITS64,MMXREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+57357, 333, 2082}, + /* 4 : MOVD mem,xmmreg [mr: 66 norexw 0f 7e /r ] AR0-1,SD,SSE2,WILLAMETTE */ + /* 361 317 355 001(7e) 101 : AR0,AR1,SD,SSE2,WILLAMETTE */ + {I_MOVD, 2, {MEMORY,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+57973, 384, 2484}, + /* 5 : MOVD xmmreg,mem [rm: 66 norexw 0f 6e /r ] AR0-1,SD,SSE2,WILLAMETTE */ + /* 361 317 355 001(6e) 110 : AR0,AR1,SD,SSE2,WILLAMETTE */ + {I_MOVD, 2, {XMMREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+57980, 384, 2485}, + /* 6 : MOVD xmmreg,rm32 [rm: 66 norexw 0f 6e /r ] SSE2,WILLAMETTE */ + /* 361 317 355 001(6e) 110 : SSE2,WILLAMETTE */ + {I_MOVD, 2, {XMMREG,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+57980, 248, 2486}, + /* 7 : MOVD rm32,xmmreg [mr: 66 norexw 0f 7e /r ] SSE2,WILLAMETTE */ + /* 361 317 355 001(7e) 101 : SSE2,WILLAMETTE */ + {I_MOVD, 2, {RM_GPR|BITS32,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+57973, 248, 2487}, + /* 8 : MOVD kreg32,krm32 [rm: vex.l0.0f.ko32 90 /r ] ND,ZU,AVX512BW,FUTURE */ + /* 270(001 201) 001(90) 110 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_MOVD, 2, {OPMASKREG|BITS32|RN_L16,RM_OPMASK|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65295, 503, 4428}, + /* 9 : MOVD kreg32,krm32 [rm: evex.l0.0f.ko32 90 /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 250(f1 fd 08) 300 001(90) 110 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_MOVD, 2, {OPMASKREG|BITS32,RM_OPMASK|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+29632, 504, 4428}, + /* 10 : MOVD mem32,kreg32 [mr: vex.l0.0f.ko32 91 /r ] ND,ZU,AVX512BW,FUTURE */ + /* 270(001 201) 001(91) 101 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_MOVD, 2, {MEMORY|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65323, 503, 4444}, + /* 11 : MOVD mem32,kreg32 [mr: evex.l0.0f.ko32 91 /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 250(f1 fd 08) 300 001(91) 101 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_MOVD, 2, {MEMORY|BITS32,OPMASKREG|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+29668, 504, 4444}, + /* 12 : MOVD kreg32,reg32 [rm: vex.l0.0f.f2.w0 92 /r ] ND,ZU,AVX512BW,FUTURE */ + /* 270(001 003) 001(92) 110 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_MOVD, 2, {OPMASKREG|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65337, 503, 4454}, + /* 13 : MOVD kreg32,reg32 [rm: evex.l0.0f.f2.w0 92 /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 250(f1 7f 08) 300 001(92) 110 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_MOVD, 2, {OPMASKREG|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+29686, 504, 4454}, + /* 14 : MOVD reg32,kreg32 [rm: vex.l0.0f.f2.w0 93 /r ] ND,ZU,AVX512BW,FUTURE */ + /* 270(001 003) 001(93) 110 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_MOVD, 2, {REG_GPR|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65351, 503, 4462}, + /* 15 : MOVD reg32,kreg32 [rm: evex.l0.0f.f2.w0 93 /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 250(f1 7f 08) 300 001(93) 110 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_MOVD, 2, {REG_GPR|BITS32,OPMASKREG|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+29704, 504, 4462}, +}; + +static const struct itemplate instrux_MOVQ[18] = { + /* 0 : MOVQ mmxreg,mmxrm64 [rm: np 0f 6f /r ] MMX,PENT */ + /* 360 355 001(6f) 110 : MMX,PENT */ + {I_MOVQ, 2, {MMXREG,RM_MMX|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+67647, 332, 2083}, + /* 1 : MOVQ mmxrm64,mmxreg [mr: np 0f 7f /r ] MMX,PENT */ + /* 360 355 001(7f) 101 : MMX,PENT */ + {I_MOVQ, 2, {RM_MMX|BITS64,MMXREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+67653, 332, 2084}, + /* 2 : MOVQ mmxreg,rm64 [rm: np o64 0f 6e /r ] LONG,PROT,MMX,X86_64 */ + /* 360 324 355 001(6e) 110 : LONG,PROT,MMX,X86_64 */ + {I_MOVQ, 2, {MMXREG,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+57350, 333, 2085}, + /* 3 : MOVQ rm64,mmxreg [mr: np o64 0f 7e /r ] LONG,PROT,MMX,X86_64 */ + /* 360 324 355 001(7e) 101 : LONG,PROT,MMX,X86_64 */ + {I_MOVQ, 2, {RM_GPR|BITS64,MMXREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+57357, 333, 2086}, + /* 4 : MOVQ xmmreg,xmmreg [rm: f3 0f 7e /r ] SSE2,WILLAMETTE */ + /* 333 355 001(7e) 110 : SSE2,WILLAMETTE */ + {I_MOVQ, 2, {XMMREG,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+68721, 248, 2493}, + /* 5 : MOVQ xmmreg,xmmreg [mr: 66 0f d6 /r ] SSE2,WILLAMETTE */ + /* 361 355 001(d6) 101 : SSE2,WILLAMETTE */ + {I_MOVQ, 2, {XMMREG,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+68727, 248, 2494}, + /* 6 : MOVQ mem,xmmreg [mr: 66 0f d6 /r ] AR0-1,SQ,SSE2,WILLAMETTE */ + /* 361 355 001(d6) 101 : AR0,AR1,SQ,SSE2,WILLAMETTE */ + {I_MOVQ, 2, {MEMORY,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+68727, 385, 2495}, + /* 7 : MOVQ xmmreg,mem [rm: f3 0f 7e /r ] AR0-1,SQ,SSE2,WILLAMETTE */ + /* 333 355 001(7e) 110 : AR0,AR1,SQ,SSE2,WILLAMETTE */ + {I_MOVQ, 2, {XMMREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+68721, 385, 2496}, + /* 8 : MOVQ xmmreg,rm64 [rm: 66 o64 0f 6e /r ] LONG,PROT,SSE2,X86_64 */ + /* 361 324 355 001(6e) 110 : LONG,PROT,SSE2,X86_64 */ + {I_MOVQ, 2, {XMMREG,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+57987, 386, 2497}, + /* 9 : MOVQ rm64,xmmreg [mr: 66 o64 0f 7e /r ] LONG,PROT,SSE2,X86_64 */ + /* 361 324 355 001(7e) 101 : LONG,PROT,SSE2,X86_64 */ + {I_MOVQ, 2, {RM_GPR|BITS64,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+57994, 386, 2498}, + /* 10 : MOVQ kreg64,krm64 [rm: vex.l0.0f.ko64 90 /r ] ND,ZU,AVX512BW,FUTURE */ + /* 270(001 200) 001(90) 110 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_MOVQ, 2, {OPMASKREG|BITS64|RN_L16,RM_OPMASK|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65302, 503, 4429}, + /* 11 : MOVQ kreg64,krm64 [rm: evex.l0.0f.ko64 90 /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 250(f1 fc 08) 300 001(90) 110 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_MOVQ, 2, {OPMASKREG|BITS64,RM_OPMASK|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+29641, 504, 4429}, + /* 12 : MOVQ mem64,kreg64 [mr: vex.l0.0f.ko64 91 /r ] ND,ZU,AVX512BW,FUTURE */ + /* 270(001 200) 001(91) 101 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_MOVQ, 2, {MEMORY|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65330, 503, 4445}, + /* 13 : MOVQ mem64,kreg64 [mr: evex.l0.0f.ko64 91 /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 250(f1 fc 08) 300 001(91) 101 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_MOVQ, 2, {MEMORY|BITS64,OPMASKREG|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+29677, 504, 4445}, + /* 14 : MOVQ kreg64,reg64 [rm: vex.l0.0f.f2.w1 92 /r ] ND,ZU,LONG,PROT,AVX512BW,X86_64 */ + /* 270(001 203) 001(92) 110 : NOAPX,ZU,LONG,VEX,PROT,AVX512BW,X86_64 */ + {I_MOVQ, 2, {OPMASKREG|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65344, 505, 4455}, + /* 15 : MOVQ kreg64,reg64 [rm: evex.l0.0f.f2.w1 92 /r ] ND,ZU,LONG,PROT,AVX512BW,X86_64,APX */ + /* 250(f1 ff 08) 300 001(92) 110 : ZU,LONG,EVEX,PROT,AVX512BW,APX,X86_64 */ + {I_MOVQ, 2, {OPMASKREG|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+29695, 506, 4455}, + /* 16 : MOVQ reg64,kreg64 [rm: vex.l0.0f.f2.w1 93 /r ] ND,ZU,LONG,PROT,AVX512BW,X86_64 */ + /* 270(001 203) 001(93) 110 : NOAPX,ZU,LONG,VEX,PROT,AVX512BW,X86_64 */ + {I_MOVQ, 2, {REG_GPR|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65358, 505, 4463}, + /* 17 : MOVQ reg64,kreg64 [rm: evex.l0.0f.f2.w1 93 /r ] ND,ZU,LONG,PROT,AVX512BW,X86_64,APX */ + /* 250(f1 ff 08) 300 001(93) 110 : ZU,LONG,EVEX,PROT,AVX512BW,APX,X86_64 */ + {I_MOVQ, 2, {REG_GPR|BITS64,OPMASKREG|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+29713, 506, 4463}, +}; + +static const struct itemplate instrux_PACKSSDW[2] = { + /* 0 : PACKSSDW mmxreg,mmxrm [rm: np 0f 6b /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(6b) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PACKSSDW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67659, 334, 2087}, + /* 1 : PACKSSDW xmmreg,xmmrm [rm: 66 0f 6b /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(6b) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PACKSSDW, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68745, 381, 2501}, +}; + +static const struct itemplate instrux_PACKSSWB[2] = { + /* 0 : PACKSSWB mmxreg,mmxrm [rm: np 0f 63 /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(63) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PACKSSWB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67665, 334, 2088}, + /* 1 : PACKSSWB xmmreg,xmmrm [rm: 66 0f 63 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(63) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PACKSSWB, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68739, 381, 2500}, +}; + +static const struct itemplate instrux_PACKUSWB[2] = { + /* 0 : PACKUSWB mmxreg,mmxrm [rm: np 0f 67 /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(67) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PACKUSWB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67671, 334, 2089}, + /* 1 : PACKUSWB xmmreg,xmmrm [rm: 66 0f 67 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(67) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PACKUSWB, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68751, 381, 2502}, +}; + +static const struct itemplate instrux_PADDB[2] = { + /* 0 : PADDB mmxreg,mmxrm [rm: np 0f fc /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(fc) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PADDB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67677, 334, 2090}, + /* 1 : PADDB xmmreg,xmmrm [rm: 66 0f fc /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(fc) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PADDB, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68757, 381, 2503}, +}; + +static const struct itemplate instrux_PADDD[2] = { + /* 0 : PADDD mmxreg,mmxrm [rm: np 0f fe /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(fe) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PADDD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67683, 334, 2091}, + /* 1 : PADDD xmmreg,xmmrm [rm: 66 0f fe /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(fe) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PADDD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68769, 381, 2505}, +}; + +static const struct itemplate instrux_PADDSB[2] = { + /* 0 : PADDSB mmxreg,mmxrm [rm: np 0f ec /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(ec) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PADDSB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67689, 334, 2092}, + /* 1 : PADDSB xmmreg,xmmrm [rm: 66 0f ec /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(ec) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PADDSB, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68787, 381, 2508}, +}; + +static const struct itemplate instrux_PADDSIW[1] = { + /* 0 : PADDSIW mmxreg,mmxrm [rm: 0f 51 /r ] AR0-1,SQ,MMX,PENT,CYRIX */ + /* 355 001(51) 110 : AR0,AR1,SQ,MMX,PENT,CYRIX */ + {I_PADDSIW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+69340, 335, 2093}, +}; + +static const struct itemplate instrux_PADDSW[2] = { + /* 0 : PADDSW mmxreg,mmxrm [rm: np 0f ed /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(ed) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PADDSW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67695, 334, 2094}, + /* 1 : PADDSW xmmreg,xmmrm [rm: 66 0f ed /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(ed) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PADDSW, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68793, 381, 2509}, +}; + +static const struct itemplate instrux_PADDUSB[2] = { + /* 0 : PADDUSB mmxreg,mmxrm [rm: np 0f dc /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(dc) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PADDUSB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67701, 334, 2095}, + /* 1 : PADDUSB xmmreg,xmmrm [rm: 66 0f dc /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(dc) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PADDUSB, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68799, 381, 2510}, +}; + +static const struct itemplate instrux_PADDUSW[2] = { + /* 0 : PADDUSW mmxreg,mmxrm [rm: np 0f dd /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(dd) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PADDUSW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67707, 334, 2096}, + /* 1 : PADDUSW xmmreg,xmmrm [rm: 66 0f dd /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(dd) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PADDUSW, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68805, 381, 2511}, +}; + +static const struct itemplate instrux_PADDW[2] = { + /* 0 : PADDW mmxreg,mmxrm [rm: np 0f fd /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(fd) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PADDW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67713, 334, 2097}, + /* 1 : PADDW xmmreg,xmmrm [rm: 66 0f fd /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(fd) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PADDW, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68763, 381, 2504}, +}; + +static const struct itemplate instrux_PAND[2] = { + /* 0 : PAND mmxreg,mmxrm [rm: np 0f db /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(db) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PAND, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67719, 334, 2098}, + /* 1 : PAND xmmreg,xmmrm [rm: 66 0f db /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(db) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PAND, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68811, 381, 2512}, +}; + +static const struct itemplate instrux_PANDN[2] = { + /* 0 : PANDN mmxreg,mmxrm [rm: np 0f df /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(df) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PANDN, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67725, 334, 2099}, + /* 1 : PANDN xmmreg,xmmrm [rm: 66 0f df /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(df) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PANDN, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68817, 381, 2513}, +}; + +static const struct itemplate instrux_PAVEB[1] = { + /* 0 : PAVEB mmxreg,mmxrm [rm: 0f 50 /r ] AR0-1,SQ,MMX,PENT,CYRIX */ + /* 355 001(50) 110 : AR0,AR1,SQ,MMX,PENT,CYRIX */ + {I_PAVEB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+69286, 335, 2100}, +}; + +static const struct itemplate instrux_PAVGUSB[1] = { + /* 0 : PAVGUSB mmxreg,mmxrm [rm: 0f 0f /r bf ] AR0-1,SQ,3DNOW,PENT */ + /* 355 001(0f) 110 001(bf) : AR0,AR1,SQ,3DNOW,PENT */ + {I_PAVGUSB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+57364, 336, 2101}, +}; + +static const struct itemplate instrux_PCMPEQB[2] = { + /* 0 : PCMPEQB mmxreg,mmxrm [rm: np 0f 74 /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(74) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PCMPEQB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67731, 334, 2102}, + /* 1 : PCMPEQB xmmreg,xmmrm [rm: 66 0f 74 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(74) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PCMPEQB, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68835, 381, 2516}, +}; + +static const struct itemplate instrux_PCMPEQD[2] = { + /* 0 : PCMPEQD mmxreg,mmxrm [rm: np 0f 76 /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(76) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PCMPEQD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67737, 334, 2103}, + /* 1 : PCMPEQD xmmreg,xmmrm [rm: 66 0f 76 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(76) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PCMPEQD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68847, 381, 2518}, +}; + +static const struct itemplate instrux_PCMPEQW[2] = { + /* 0 : PCMPEQW mmxreg,mmxrm [rm: np 0f 75 /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(75) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PCMPEQW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67743, 334, 2104}, + /* 1 : PCMPEQW xmmreg,xmmrm [rm: 66 0f 75 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(75) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PCMPEQW, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68841, 381, 2517}, +}; + +static const struct itemplate instrux_PCMPGTB[2] = { + /* 0 : PCMPGTB mmxreg,mmxrm [rm: np 0f 64 /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(64) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PCMPGTB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67749, 334, 2105}, + /* 1 : PCMPGTB xmmreg,xmmrm [rm: 66 0f 64 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(64) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PCMPGTB, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68853, 381, 2519}, +}; + +static const struct itemplate instrux_PCMPGTD[2] = { + /* 0 : PCMPGTD mmxreg,mmxrm [rm: np 0f 66 /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(66) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PCMPGTD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67755, 334, 2106}, + /* 1 : PCMPGTD xmmreg,xmmrm [rm: 66 0f 66 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(66) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PCMPGTD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68865, 381, 2521}, +}; + +static const struct itemplate instrux_PCMPGTW[2] = { + /* 0 : PCMPGTW mmxreg,mmxrm [rm: np 0f 65 /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(65) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PCMPGTW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67761, 334, 2107}, + /* 1 : PCMPGTW xmmreg,xmmrm [rm: 66 0f 65 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(65) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PCMPGTW, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68859, 381, 2520}, +}; + +static const struct itemplate instrux_PDISTIB[1] = { + /* 0 : PDISTIB mmxreg,mem [rm: 0f 54 /r ] AR0-1,SQ,MMX,PENT,CYRIX */ + /* 355 001(54) 110 : AR0,AR1,SQ,MMX,PENT,CYRIX */ + {I_PDISTIB, 2, {MMXREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+69124, 335, 2108}, +}; + +static const struct itemplate instrux_PF2ID[1] = { + /* 0 : PF2ID mmxreg,mmxrm [rm: 0f 0f /r 1d ] AR0-1,SQ,3DNOW,PENT */ + /* 355 001(0f) 110 001(1d) : AR0,AR1,SQ,3DNOW,PENT */ + {I_PF2ID, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+57371, 336, 2109}, +}; + +static const struct itemplate instrux_PFACC[1] = { + /* 0 : PFACC mmxreg,mmxrm [rm: 0f 0f /r ae ] AR0-1,SQ,3DNOW,PENT */ + /* 355 001(0f) 110 001(ae) : AR0,AR1,SQ,3DNOW,PENT */ + {I_PFACC, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+57378, 336, 2110}, +}; + +static const struct itemplate instrux_PFADD[1] = { + /* 0 : PFADD mmxreg,mmxrm [rm: 0f 0f /r 9e ] AR0-1,SQ,3DNOW,PENT */ + /* 355 001(0f) 110 001(9e) : AR0,AR1,SQ,3DNOW,PENT */ + {I_PFADD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+57385, 336, 2111}, +}; + +static const struct itemplate instrux_PFCMPEQ[1] = { + /* 0 : PFCMPEQ mmxreg,mmxrm [rm: 0f 0f /r b0 ] AR0-1,SQ,3DNOW,PENT */ + /* 355 001(0f) 110 001(b0) : AR0,AR1,SQ,3DNOW,PENT */ + {I_PFCMPEQ, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+57392, 336, 2112}, +}; + +static const struct itemplate instrux_PFCMPGE[1] = { + /* 0 : PFCMPGE mmxreg,mmxrm [rm: 0f 0f /r 90 ] AR0-1,SQ,3DNOW,PENT */ + /* 355 001(0f) 110 001(90) : AR0,AR1,SQ,3DNOW,PENT */ + {I_PFCMPGE, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+57399, 336, 2113}, +}; + +static const struct itemplate instrux_PFCMPGT[1] = { + /* 0 : PFCMPGT mmxreg,mmxrm [rm: 0f 0f /r a0 ] AR0-1,SQ,3DNOW,PENT */ + /* 355 001(0f) 110 001(a0) : AR0,AR1,SQ,3DNOW,PENT */ + {I_PFCMPGT, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+57406, 336, 2114}, +}; + +static const struct itemplate instrux_PFMAX[1] = { + /* 0 : PFMAX mmxreg,mmxrm [rm: 0f 0f /r a4 ] AR0-1,SQ,3DNOW,PENT */ + /* 355 001(0f) 110 001(a4) : AR0,AR1,SQ,3DNOW,PENT */ + {I_PFMAX, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+57413, 336, 2115}, +}; + +static const struct itemplate instrux_PFMIN[1] = { + /* 0 : PFMIN mmxreg,mmxrm [rm: 0f 0f /r 94 ] AR0-1,SQ,3DNOW,PENT */ + /* 355 001(0f) 110 001(94) : AR0,AR1,SQ,3DNOW,PENT */ + {I_PFMIN, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+57420, 336, 2116}, +}; + +static const struct itemplate instrux_PFMUL[1] = { + /* 0 : PFMUL mmxreg,mmxrm [rm: 0f 0f /r b4 ] AR0-1,SQ,3DNOW,PENT */ + /* 355 001(0f) 110 001(b4) : AR0,AR1,SQ,3DNOW,PENT */ + {I_PFMUL, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+57427, 336, 2117}, +}; + +static const struct itemplate instrux_PFRCP[1] = { + /* 0 : PFRCP mmxreg,mmxrm [rm: 0f 0f /r 96 ] AR0-1,SQ,3DNOW,PENT */ + /* 355 001(0f) 110 001(96) : AR0,AR1,SQ,3DNOW,PENT */ + {I_PFRCP, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+57434, 336, 2118}, +}; + +static const struct itemplate instrux_PFRCPIT1[1] = { + /* 0 : PFRCPIT1 mmxreg,mmxrm [rm: 0f 0f /r a6 ] AR0-1,SQ,3DNOW,PENT */ + /* 355 001(0f) 110 001(a6) : AR0,AR1,SQ,3DNOW,PENT */ + {I_PFRCPIT1, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+57441, 336, 2119}, +}; + +static const struct itemplate instrux_PFRCPIT2[1] = { + /* 0 : PFRCPIT2 mmxreg,mmxrm [rm: 0f 0f /r b6 ] AR0-1,SQ,3DNOW,PENT */ + /* 355 001(0f) 110 001(b6) : AR0,AR1,SQ,3DNOW,PENT */ + {I_PFRCPIT2, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+57448, 336, 2120}, +}; + +static const struct itemplate instrux_PFRSQIT1[1] = { + /* 0 : PFRSQIT1 mmxreg,mmxrm [rm: 0f 0f /r a7 ] AR0-1,SQ,3DNOW,PENT */ + /* 355 001(0f) 110 001(a7) : AR0,AR1,SQ,3DNOW,PENT */ + {I_PFRSQIT1, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+57455, 336, 2121}, +}; + +static const struct itemplate instrux_PFRSQRT[1] = { + /* 0 : PFRSQRT mmxreg,mmxrm [rm: 0f 0f /r 97 ] AR0-1,SQ,3DNOW,PENT */ + /* 355 001(0f) 110 001(97) : AR0,AR1,SQ,3DNOW,PENT */ + {I_PFRSQRT, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+57462, 336, 2122}, +}; + +static const struct itemplate instrux_PFSUB[1] = { + /* 0 : PFSUB mmxreg,mmxrm [rm: 0f 0f /r 9a ] AR0-1,SQ,3DNOW,PENT */ + /* 355 001(0f) 110 001(9a) : AR0,AR1,SQ,3DNOW,PENT */ + {I_PFSUB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+57469, 336, 2123}, +}; + +static const struct itemplate instrux_PFSUBR[1] = { + /* 0 : PFSUBR mmxreg,mmxrm [rm: 0f 0f /r aa ] AR0-1,SQ,3DNOW,PENT */ + /* 355 001(0f) 110 001(aa) : AR0,AR1,SQ,3DNOW,PENT */ + {I_PFSUBR, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+57476, 336, 2124}, +}; + +static const struct itemplate instrux_PI2FD[1] = { + /* 0 : PI2FD mmxreg,mmxrm [rm: 0f 0f /r 0d ] AR0-1,SQ,3DNOW,PENT */ + /* 355 001(0f) 110 001(0d) : AR0,AR1,SQ,3DNOW,PENT */ + {I_PI2FD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+57483, 336, 2125}, +}; + +static const struct itemplate instrux_PMACHRIW[1] = { + /* 0 : PMACHRIW mmxreg,mem [rm: 0f 5e /r ] AR0-1,SQ,MMX,PENT,CYRIX */ + /* 355 001(5e) 110 : AR0,AR1,SQ,MMX,PENT,CYRIX */ + {I_PMACHRIW, 2, {MMXREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+69220, 335, 2126}, +}; + +static const struct itemplate instrux_PMADDWD[2] = { + /* 0 : PMADDWD mmxreg,mmxrm [rm: np 0f f5 /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(f5) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PMADDWD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67767, 334, 2127}, + /* 1 : PMADDWD xmmreg,xmmrm [rm: 66 0f f5 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(f5) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PMADDWD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68871, 381, 2529}, +}; + +static const struct itemplate instrux_PMAGW[1] = { + /* 0 : PMAGW mmxreg,mmxrm [rm: 0f 52 /r ] AR0-1,SQ,MMX,PENT,CYRIX */ + /* 355 001(52) 110 : AR0,AR1,SQ,MMX,PENT,CYRIX */ + {I_PMAGW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+68548, 335, 2128}, +}; + +static const struct itemplate instrux_PMULHRIW[1] = { + /* 0 : PMULHRIW mmxreg,mmxrm [rm: 0f 5d /r ] AR0-1,SQ,MMX,PENT,CYRIX */ + /* 355 001(5d) 110 : AR0,AR1,SQ,MMX,PENT,CYRIX */ + {I_PMULHRIW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+69244, 335, 2129}, +}; + +static const struct itemplate instrux_PMULHRWA[1] = { + /* 0 : PMULHRWA mmxreg,mmxrm [rm: 0f 0f /r b7 ] AR0-1,SQ,3DNOW,PENT */ + /* 355 001(0f) 110 001(b7) : AR0,AR1,SQ,3DNOW,PENT */ + {I_PMULHRWA, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+57490, 336, 2130}, +}; + +static const struct itemplate instrux_PMULHRWC[1] = { + /* 0 : PMULHRWC mmxreg,mmxrm [rm: 0f 59 /r ] AR0-1,SQ,MMX,PENT,CYRIX */ + /* 355 001(59) 110 : AR0,AR1,SQ,MMX,PENT,CYRIX */ + {I_PMULHRWC, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+69322, 335, 2131}, +}; + +static const struct itemplate instrux_PMULHW[2] = { + /* 0 : PMULHW mmxreg,mmxrm [rm: np 0f e5 /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(e5) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PMULHW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67773, 334, 2132}, + /* 1 : PMULHW xmmreg,xmmrm [rm: 66 0f e5 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(e5) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PMULHW, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68913, 381, 2536}, +}; + +static const struct itemplate instrux_PMULLW[2] = { + /* 0 : PMULLW mmxreg,mmxrm [rm: np 0f d5 /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(d5) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PMULLW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67779, 334, 2133}, + /* 1 : PMULLW xmmreg,xmmrm [rm: 66 0f d5 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(d5) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PMULLW, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68919, 381, 2537}, +}; + +static const struct itemplate instrux_PMVGEZB[1] = { + /* 0 : PMVGEZB mmxreg,mem [rm: 0f 5c /r ] AR0-1,SQ,MMX,PENT,CYRIX */ + /* 355 001(5c) 110 : AR0,AR1,SQ,MMX,PENT,CYRIX */ + {I_PMVGEZB, 2, {MMXREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+69352, 335, 2134}, +}; + +static const struct itemplate instrux_PMVLZB[1] = { + /* 0 : PMVLZB mmxreg,mem [rm: 0f 5b /r ] AR0-1,SQ,MMX,PENT,CYRIX */ + /* 355 001(5b) 110 : AR0,AR1,SQ,MMX,PENT,CYRIX */ + {I_PMVLZB, 2, {MMXREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+69208, 335, 2135}, +}; + +static const struct itemplate instrux_PMVNZB[1] = { + /* 0 : PMVNZB mmxreg,mem [rm: 0f 5a /r ] AR0-1,SQ,MMX,PENT,CYRIX */ + /* 355 001(5a) 110 : AR0,AR1,SQ,MMX,PENT,CYRIX */ + {I_PMVNZB, 2, {MMXREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+69190, 335, 2136}, +}; + +static const struct itemplate instrux_PMVZB[1] = { + /* 0 : PMVZB mmxreg,mem [rm: 0f 58 /r ] AR0-1,SQ,MMX,PENT,CYRIX */ + /* 355 001(58) 110 : AR0,AR1,SQ,MMX,PENT,CYRIX */ + {I_PMVZB, 2, {MMXREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+69112, 335, 2137}, +}; + +static const struct itemplate instrux_POR[2] = { + /* 0 : POR mmxreg,mmxrm [rm: np 0f eb /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(eb) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_POR, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67785, 334, 2138}, + /* 1 : POR xmmreg,xmmrm [rm: 66 0f eb /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(eb) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_POR, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68937, 381, 2540}, +}; + +static const struct itemplate instrux_PREFETCH[1] = { + /* 0 : PREFETCH mem [m: 0f 0d /0 ] AR0,SQ,3DNOW,PENT */ + /* 355 001(0d) 200 : AR0,SQ,3DNOW,PENT */ + {I_PREFETCH, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72299, 337, 2139}, +}; + +static const struct itemplate instrux_PREFETCHW[1] = { + /* 0 : PREFETCHW mem [m: 0f 0d /1 ] AR0,SQ,3DNOW,PENT */ + /* 355 001(0d) 201 : AR0,SQ,3DNOW,PENT */ + {I_PREFETCHW, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72304, 337, 2140}, +}; + +static const struct itemplate instrux_PSLLD[4] = { + /* 0 : PSLLD mmxreg,mmxrm [rm: np 0f f2 /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(f2) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PSLLD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67791, 334, 2141}, + /* 1 : PSLLD mmxreg,imm [mi: np 0f 72 /6 ib,u ] MMX,PENT */ + /* 360 355 001(72) 206 025 : MMX,PENT */ + {I_PSLLD, 2, {MMXREG,IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+57497, 332, 2142}, + /* 2 : PSLLD xmmreg,xmmrm [rm: 66 0f f2 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(f2) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PSLLD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68955, 381, 2551}, + /* 3 : PSLLD xmmreg,imm [mi: 66 0f 72 /6 ib,u ] AR1,SB,SSE2,WILLAMETTE */ + /* 361 355 001(72) 206 025 : AR1,SB,SSE2,WILLAMETTE */ + {I_PSLLD, 2, {XMMREG,IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+58050, 390, 2552}, +}; + +static const struct itemplate instrux_PSLLQ[4] = { + /* 0 : PSLLQ mmxreg,mmxrm [rm: np 0f f3 /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(f3) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PSLLQ, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67797, 334, 2143}, + /* 1 : PSLLQ mmxreg,imm [mi: np 0f 73 /6 ib,u ] MMX,PENT */ + /* 360 355 001(73) 206 025 : MMX,PENT */ + {I_PSLLQ, 2, {MMXREG,IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+57504, 332, 2144}, + /* 2 : PSLLQ xmmreg,xmmrm [rm: 66 0f f3 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(f3) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PSLLQ, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68961, 381, 2553}, + /* 3 : PSLLQ xmmreg,imm [mi: 66 0f 73 /6 ib,u ] AR1,SB,SSE2,WILLAMETTE */ + /* 361 355 001(73) 206 025 : AR1,SB,SSE2,WILLAMETTE */ + {I_PSLLQ, 2, {XMMREG,IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+58057, 390, 2554}, +}; + +static const struct itemplate instrux_PSLLW[4] = { + /* 0 : PSLLW mmxreg,mmxrm [rm: np 0f f1 /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(f1) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PSLLW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67803, 334, 2145}, + /* 1 : PSLLW mmxreg,imm [mi: np 0f 71 /6 ib,u ] MMX,PENT */ + /* 360 355 001(71) 206 025 : MMX,PENT */ + {I_PSLLW, 2, {MMXREG,IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+57511, 332, 2146}, + /* 2 : PSLLW xmmreg,xmmrm [rm: 66 0f f1 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(f1) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PSLLW, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68949, 381, 2549}, + /* 3 : PSLLW xmmreg,imm [mi: 66 0f 71 /6 ib,u ] AR1,SB,SSE2,WILLAMETTE */ + /* 361 355 001(71) 206 025 : AR1,SB,SSE2,WILLAMETTE */ + {I_PSLLW, 2, {XMMREG,IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+58043, 390, 2550}, +}; + +static const struct itemplate instrux_PSRAD[4] = { + /* 0 : PSRAD mmxreg,mmxrm [rm: np 0f e2 /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(e2) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PSRAD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67809, 334, 2147}, + /* 1 : PSRAD mmxreg,imm [mi: np 0f 72 /4 ib,u ] MMX,PENT */ + /* 360 355 001(72) 204 025 : MMX,PENT */ + {I_PSRAD, 2, {MMXREG,IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+57518, 332, 2148}, + /* 2 : PSRAD xmmreg,xmmrm [rm: 66 0f e2 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(e2) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PSRAD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68973, 381, 2557}, + /* 3 : PSRAD xmmreg,imm [mi: 66 0f 72 /4 ib,u ] AR1,SB,SSE2,WILLAMETTE */ + /* 361 355 001(72) 204 025 : AR1,SB,SSE2,WILLAMETTE */ + {I_PSRAD, 2, {XMMREG,IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+58071, 390, 2558}, +}; + +static const struct itemplate instrux_PSRAW[4] = { + /* 0 : PSRAW mmxreg,mmxrm [rm: np 0f e1 /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(e1) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PSRAW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67815, 334, 2149}, + /* 1 : PSRAW mmxreg,imm [mi: np 0f 71 /4 ib,u ] MMX,PENT */ + /* 360 355 001(71) 204 025 : MMX,PENT */ + {I_PSRAW, 2, {MMXREG,IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+57525, 332, 2150}, + /* 2 : PSRAW xmmreg,xmmrm [rm: 66 0f e1 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(e1) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PSRAW, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68967, 381, 2555}, + /* 3 : PSRAW xmmreg,imm [mi: 66 0f 71 /4 ib,u ] AR1,SB,SSE2,WILLAMETTE */ + /* 361 355 001(71) 204 025 : AR1,SB,SSE2,WILLAMETTE */ + {I_PSRAW, 2, {XMMREG,IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+58064, 390, 2556}, +}; + +static const struct itemplate instrux_PSRLD[4] = { + /* 0 : PSRLD mmxreg,mmxrm [rm: np 0f d2 /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(d2) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PSRLD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67821, 334, 2151}, + /* 1 : PSRLD mmxreg,imm [mi: np 0f 72 /2 ib,u ] MMX,PENT */ + /* 360 355 001(72) 202 025 : MMX,PENT */ + {I_PSRLD, 2, {MMXREG,IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+57532, 332, 2152}, + /* 2 : PSRLD xmmreg,xmmrm [rm: 66 0f d2 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(d2) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PSRLD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68985, 381, 2562}, + /* 3 : PSRLD xmmreg,imm [mi: 66 0f 72 /2 ib,u ] AR1,SB,SSE2,WILLAMETTE */ + /* 361 355 001(72) 202 025 : AR1,SB,SSE2,WILLAMETTE */ + {I_PSRLD, 2, {XMMREG,IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+58092, 390, 2563}, +}; + +static const struct itemplate instrux_PSRLQ[4] = { + /* 0 : PSRLQ mmxreg,mmxrm [rm: np 0f d3 /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(d3) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PSRLQ, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67827, 334, 2153}, + /* 1 : PSRLQ mmxreg,imm [mi: np 0f 73 /2 ib,u ] MMX,PENT */ + /* 360 355 001(73) 202 025 : MMX,PENT */ + {I_PSRLQ, 2, {MMXREG,IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+57539, 332, 2154}, + /* 2 : PSRLQ xmmreg,xmmrm [rm: 66 0f d3 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(d3) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PSRLQ, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68991, 381, 2564}, + /* 3 : PSRLQ xmmreg,imm [mi: 66 0f 73 /2 ib,u ] AR1,SB,SSE2,WILLAMETTE */ + /* 361 355 001(73) 202 025 : AR1,SB,SSE2,WILLAMETTE */ + {I_PSRLQ, 2, {XMMREG,IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+58099, 390, 2565}, +}; + +static const struct itemplate instrux_PSRLW[4] = { + /* 0 : PSRLW mmxreg,mmxrm [rm: np 0f d1 /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(d1) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PSRLW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67833, 334, 2155}, + /* 1 : PSRLW mmxreg,imm [mi: np 0f 71 /2 ib,u ] MMX,PENT */ + /* 360 355 001(71) 202 025 : MMX,PENT */ + {I_PSRLW, 2, {MMXREG,IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+57546, 332, 2156}, + /* 2 : PSRLW xmmreg,xmmrm [rm: 66 0f d1 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(d1) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PSRLW, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68979, 381, 2560}, + /* 3 : PSRLW xmmreg,imm [mi: 66 0f 71 /2 ib,u ] AR1,SB,SSE2,WILLAMETTE */ + /* 361 355 001(71) 202 025 : AR1,SB,SSE2,WILLAMETTE */ + {I_PSRLW, 2, {XMMREG,IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+58085, 390, 2561}, +}; + +static const struct itemplate instrux_PSUBB[2] = { + /* 0 : PSUBB mmxreg,mmxrm [rm: np 0f f8 /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(f8) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PSUBB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67839, 334, 2157}, + /* 1 : PSUBB xmmreg,xmmrm [rm: 66 0f f8 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(f8) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PSUBB, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68997, 381, 2566}, +}; + +static const struct itemplate instrux_PSUBD[2] = { + /* 0 : PSUBD mmxreg,mmxrm [rm: np 0f fa /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(fa) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PSUBD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67845, 334, 2158}, + /* 1 : PSUBD xmmreg,xmmrm [rm: 66 0f fa /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(fa) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PSUBD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69009, 381, 2568}, +}; + +static const struct itemplate instrux_PSUBSB[2] = { + /* 0 : PSUBSB mmxreg,mmxrm [rm: np 0f e8 /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(e8) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PSUBSB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67851, 334, 2159}, + /* 1 : PSUBSB xmmreg,xmmrm [rm: 66 0f e8 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(e8) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PSUBSB, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69027, 381, 2571}, +}; + +static const struct itemplate instrux_PSUBSIW[1] = { + /* 0 : PSUBSIW mmxreg,mmxrm [rm: 0f 55 /r ] AR0-1,SQ,MMX,PENT,CYRIX */ + /* 355 001(55) 110 : AR0,AR1,SQ,MMX,PENT,CYRIX */ + {I_PSUBSIW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+69118, 335, 2160}, +}; + +static const struct itemplate instrux_PSUBSW[2] = { + /* 0 : PSUBSW mmxreg,mmxrm [rm: np 0f e9 /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(e9) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PSUBSW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67857, 334, 2161}, + /* 1 : PSUBSW xmmreg,xmmrm [rm: 66 0f e9 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(e9) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PSUBSW, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69033, 381, 2572}, +}; + +static const struct itemplate instrux_PSUBUSB[2] = { + /* 0 : PSUBUSB mmxreg,mmxrm [rm: np 0f d8 /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(d8) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PSUBUSB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67863, 334, 2162}, + /* 1 : PSUBUSB xmmreg,xmmrm [rm: 66 0f d8 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(d8) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PSUBUSB, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69039, 381, 2573}, +}; + +static const struct itemplate instrux_PSUBUSW[2] = { + /* 0 : PSUBUSW mmxreg,mmxrm [rm: np 0f d9 /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(d9) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PSUBUSW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67869, 334, 2163}, + /* 1 : PSUBUSW xmmreg,xmmrm [rm: 66 0f d9 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(d9) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PSUBUSW, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69045, 381, 2574}, +}; + +static const struct itemplate instrux_PSUBW[2] = { + /* 0 : PSUBW mmxreg,mmxrm [rm: np 0f f9 /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(f9) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PSUBW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67875, 334, 2164}, + /* 1 : PSUBW xmmreg,xmmrm [rm: 66 0f f9 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(f9) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PSUBW, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69003, 381, 2567}, +}; + +static const struct itemplate instrux_PUNPCKHBW[2] = { + /* 0 : PUNPCKHBW mmxreg,mmxrm [rm: np 0f 68 /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(68) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PUNPCKHBW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67881, 334, 2165}, + /* 1 : PUNPCKHBW xmmreg,xmmrm [rm: 66 0f 68 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(68) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PUNPCKHBW, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69051, 381, 2575}, +}; + +static const struct itemplate instrux_PUNPCKHDQ[2] = { + /* 0 : PUNPCKHDQ mmxreg,mmxrm [rm: np 0f 6a /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(6a) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PUNPCKHDQ, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67887, 334, 2166}, + /* 1 : PUNPCKHDQ xmmreg,xmmrm [rm: 66 0f 6a /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(6a) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PUNPCKHDQ, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69063, 381, 2577}, +}; + +static const struct itemplate instrux_PUNPCKHWD[2] = { + /* 0 : PUNPCKHWD mmxreg,mmxrm [rm: np 0f 69 /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(69) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PUNPCKHWD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67893, 334, 2167}, + /* 1 : PUNPCKHWD xmmreg,xmmrm [rm: 66 0f 69 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(69) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PUNPCKHWD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69057, 381, 2576}, +}; + +static const struct itemplate instrux_PUNPCKLBW[2] = { + /* 0 : PUNPCKLBW mmxreg,mmxrm [rm: np 0f 60 /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(60) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PUNPCKLBW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67899, 334, 2168}, + /* 1 : PUNPCKLBW xmmreg,xmmrm [rm: 66 0f 60 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(60) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PUNPCKLBW, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69075, 381, 2579}, +}; + +static const struct itemplate instrux_PUNPCKLDQ[2] = { + /* 0 : PUNPCKLDQ mmxreg,mmxrm [rm: np 0f 62 /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(62) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PUNPCKLDQ, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67905, 334, 2169}, + /* 1 : PUNPCKLDQ xmmreg,xmmrm [rm: 66 0f 62 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(62) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PUNPCKLDQ, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69087, 381, 2581}, +}; + +static const struct itemplate instrux_PUNPCKLWD[2] = { + /* 0 : PUNPCKLWD mmxreg,mmxrm [rm: np 0f 61 /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(61) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PUNPCKLWD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67911, 334, 2170}, + /* 1 : PUNPCKLWD xmmreg,xmmrm [rm: 66 0f 61 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(61) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PUNPCKLWD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69081, 381, 2580}, +}; + +static const struct itemplate instrux_PUSHA[1] = { + /* 0 : PUSHA void [ osm 60 ] NOREX,NOAPX,NOLONG,186 */ + /* 342 001(60) : NOREX,NOAPX,NOLONG,186 */ + {I_PUSHA, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73404, 341, 2194}, +}; + +static const struct itemplate instrux_PUSHAW[1] = { + /* 0 : PUSHAW void [ o16 60 ] NOREX,NOAPX,NOLONG,186 */ + /* 320 001(60) : NOREX,NOAPX,NOLONG,186 */ + {I_PUSHAW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73408, 341, 2195}, +}; + +static const struct itemplate instrux_PUSHAD[1] = { + /* 0 : PUSHAD void [ o32 60 ] NOREX,NOAPX,NOLONG,386 */ + /* 321 001(60) : NOREX,NOAPX,NOLONG,386 */ + {I_PUSHAD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73412, 305, 2196}, +}; + +static const struct itemplate instrux_POPA[1] = { + /* 0 : POPA void [ osm 61 ] NOREX,NOAPX,NOLONG,186 */ + /* 342 001(61) : NOREX,NOAPX,NOLONG,186 */ + {I_POPA, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73416, 341, 2197}, +}; + +static const struct itemplate instrux_POPAW[1] = { + /* 0 : POPAW void [ o16 61 ] NOREX,NOAPX,NOLONG,186 */ + /* 320 001(61) : NOREX,NOAPX,NOLONG,186 */ + {I_POPAW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73420, 341, 2198}, +}; + +static const struct itemplate instrux_POPAD[1] = { + /* 0 : POPAD void [ o32 61 ] NOREX,NOAPX,NOLONG,386 */ + /* 321 001(61) : NOREX,NOAPX,NOLONG,386 */ + {I_POPAD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73424, 305, 2199}, +}; + +static const struct itemplate instrux_ENTER[2] = { + /* 0 : ENTER imm16,imm8 [ij: nw osm c8 iw ib,u ] 186 */ + /* 327 342 001(c8) 030 025 : NWSIZE,186 */ + {I_ENTER, 2, {IMM_NORMAL|BITS16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+57553, 342, 2201}, + /* 1 : ENTER imm16 [i: nw osm c8 iw 00 ] ND,186 */ + /* 327 342 001(c8) 030 001(00) : NWSIZE,186 */ + {I_ENTER, 1, {IMM_NORMAL|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+51371, 342, 2205}, +}; + +static const struct itemplate instrux_ENTERW[2] = { + /* 0 : ENTERW imm16,imm8 [ij: nw o16 c8 iw ib,u ] 186 */ + /* 327 320 001(c8) 030 025 : NWSIZE,186 */ + {I_ENTERW, 2, {IMM_NORMAL|BITS16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+57560, 342, 2202}, + /* 1 : ENTERW imm16 [i: nw o16 c8 iw 00 ] ND,186 */ + /* 327 320 001(c8) 030 001(00) : NWSIZE,186 */ + {I_ENTERW, 1, {IMM_NORMAL|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+51379, 342, 2206}, +}; + +static const struct itemplate instrux_ENTERD[2] = { + /* 0 : ENTERD imm16,imm8 [ij: nw o32 c8 iw ib,u ] 386 */ + /* 327 321 001(c8) 030 025 : NWSIZE,386 */ + {I_ENTERD, 2, {IMM_NORMAL|BITS16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+57567, 234, 2203}, + /* 1 : ENTERD imm16 [i: nw o32 c8 iw 00 ] ND,386 */ + /* 327 321 001(c8) 030 001(00) : NWSIZE,386 */ + {I_ENTERD, 1, {IMM_NORMAL|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+51387, 234, 2207}, +}; + +static const struct itemplate instrux_ENTERQ[2] = { + /* 0 : ENTERQ imm16,imm8 [ij: nw o64 c8 iw ib,u ] LONG,386,X86_64 */ + /* 327 324 001(c8) 030 025 : NWSIZE,LONG,PROT,X86_64 */ + {I_ENTERQ, 2, {IMM_NORMAL|BITS16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+57574, 235, 2204}, + /* 1 : ENTERQ imm16 [i: nw o64 c8 iw 00 ] ND,LONG,386,X86_64 */ + /* 327 324 001(c8) 030 001(00) : NWSIZE,LONG,PROT,X86_64 */ + {I_ENTERQ, 1, {IMM_NORMAL|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+51395, 235, 2208}, +}; + +static const struct itemplate instrux_LEAVE[1] = { + /* 0 : LEAVE void [ nw osm c9 ] 186 */ + /* 327 342 001(c9) : NWSIZE,186 */ + {I_LEAVE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72339, 342, 2209}, +}; + +static const struct itemplate instrux_LEAVEW[1] = { + /* 0 : LEAVEW void [ nw o16 c9 ] 186 */ + /* 327 320 001(c9) : NWSIZE,186 */ + {I_LEAVEW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72344, 342, 2210}, +}; + +static const struct itemplate instrux_LEAVED[1] = { + /* 0 : LEAVED void [ nw o32 c9 ] 386 */ + /* 327 321 001(c9) : NWSIZE,386 */ + {I_LEAVED, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72349, 234, 2211}, +}; + +static const struct itemplate instrux_LEAVEQ[1] = { + /* 0 : LEAVEQ void [ nw o64 c9 ] LONG,386,X86_64 */ + /* 327 324 001(c9) : NWSIZE,LONG,PROT,X86_64 */ + {I_LEAVEQ, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72354, 235, 2212}, +}; + +static const struct itemplate instrux_BOUND[2] = { + /* 0 : BOUND reg16,mem [rm: o16 62 /r ] NOREX,NOAPX,NOLONG,186 */ + /* 320 001(62) 110 : NOREX,NOAPX,NOLONG,186 */ + {I_BOUND, 2, {REG_GPR|BITS16|RN_L16,MEMORY|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+72359, 341, 2214}, + /* 1 : BOUND reg32,mem [rm: o32 62 /r ] NOREX,NOAPX,NOLONG,386 */ + /* 321 001(62) 110 : NOREX,NOAPX,NOLONG,386 */ + {I_BOUND, 2, {REG_GPR|BITS32|RN_L16,MEMORY|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+72364, 305, 2215}, +}; + +static const struct itemplate instrux_PUSHP[3] = { + /* 0 : PUSHP reg64 [r: o64nw rex.w rex2 50+r ] LONG,PROT,APX,X86_64 */ + /* 323 347 350 010 120 : NWSIZE,LONG,REX2,PROT,APX,X86_64 */ + {I_PUSHP, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67995, 343, 2218}, + /* 1 : PUSHP reg64,reg64 [vm: o64nw evex.nd1.l0.np.m4.w1 ff /6 ] ND,LONG,PROT,APX,X86_64 */ + /* 323 240(f4 fc 18) 300 001(ff) 216 : NWSIZE,LONG,EVEX,PROT,APX,X86_64 */ + {I_PUSHP, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+13073, 344, 2223}, + /* 2 : PUSHP reg64:reg64 [vm: o64nw evex.nd1.l0.np.m4.w1 ff /6 ] ND,LONG,PROT,APX,X86_64 */ + /* 323 240(f4 fc 18) 300 001(ff) 216 : NWSIZE,LONG,EVEX,PROT,APX,X86_64 */ + {I_PUSHP, 2, {REG_GPR|BITS64|COLON,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+13073, 344, 2224}, +}; + +static const struct itemplate instrux_POPP[3] = { + /* 0 : POPP reg64 [r: o64nw rex.w rex2 58+r ] LONG,PROT,APX,X86_64 */ + /* 323 347 350 010 130 : NWSIZE,LONG,REX2,PROT,APX,X86_64 */ + {I_POPP, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+68001, 343, 2219}, + /* 1 : POPP reg64,reg64 [vm: o64nw evex.nd1.l0.np.m4.w1 8f /0 ] ND,LONG,PROT,APX,X86_64 */ + /* 323 240(f4 fc 18) 300 001(8f) 210 : NWSIZE,LONG,EVEX,PROT,APX,X86_64 */ + {I_POPP, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+13103, 344, 2232}, + /* 2 : POPP reg64:reg64 [mv: o64nw evex.nd1.l0.np.m4.w1 8f /0 ] ND,LONG,PROT,APX,X86_64 */ + /* 323 241(f4 fc 18) 300 001(8f) 200 : NWSIZE,LONG,EVEX,PROT,APX,X86_64 */ + {I_POPP, 2, {REG_GPR|BITS64|COLON,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+13113, 344, 2233}, +}; + +static const struct itemplate instrux_PUSH2[2] = { + /* 0 : PUSH2 reg64,reg64 [vm: o64nw evex.nd1.l0.np.m4.w0 ff /6 ] LONG,PROT,APX,X86_64 */ + /* 323 240(f4 7c 18) 300 001(ff) 216 : NWSIZE,LONG,EVEX,PROT,APX,X86_64 */ + {I_PUSH2, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+13063, 344, 2225}, + /* 1 : PUSH2 reg64:reg64 [vm: o64nw evex.nd1.l0.np.m4.w0 ff /6 ] ND,LONG,PROT,APX,X86_64 */ + /* 323 240(f4 7c 18) 300 001(ff) 216 : NWSIZE,LONG,EVEX,PROT,APX,X86_64 */ + {I_PUSH2, 2, {REG_GPR|BITS64|COLON,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+13063, 344, 2226}, +}; + +static const struct itemplate instrux_PUSH2P[2] = { + /* 0 : PUSH2P reg64,reg64 [vm: o64nw evex.nd1.l0.np.m4.w1 ff /6 ] LONG,PROT,APX,X86_64 */ + /* 323 240(f4 fc 18) 300 001(ff) 216 : NWSIZE,LONG,EVEX,PROT,APX,X86_64 */ + {I_PUSH2P, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+13073, 344, 2227}, + /* 1 : PUSH2P reg64:reg64 [vm: o64nw evex.nd1.l0.np.m4.w1 ff /6 ] ND,LONG,PROT,APX,X86_64 */ + /* 323 240(f4 fc 18) 300 001(ff) 216 : NWSIZE,LONG,EVEX,PROT,APX,X86_64 */ + {I_PUSH2P, 2, {REG_GPR|BITS64|COLON,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+13073, 344, 2228}, +}; + +static const struct itemplate instrux_POP2[2] = { + /* 0 : POP2 reg64,reg64 [vm: o64nw evex.nd1.l0.np.m4.w0 8f /0 ] LONG,PROT,APX,X86_64 */ + /* 323 240(f4 7c 18) 300 001(8f) 210 : NWSIZE,LONG,EVEX,PROT,APX,X86_64 */ + {I_POP2, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+13083, 344, 2234}, + /* 1 : POP2 reg64:reg64 [mv: o64nw evex.nd1.l0.np.m4.w0 8f /0 ] ND,LONG,PROT,APX,X86_64 */ + /* 323 241(f4 7c 18) 300 001(8f) 200 : NWSIZE,LONG,EVEX,PROT,APX,X86_64 */ + {I_POP2, 2, {REG_GPR|BITS64|COLON,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+13093, 344, 2235}, +}; + +static const struct itemplate instrux_POP2P[2] = { + /* 0 : POP2P reg64,reg64 [vm: o64nw evex.nd1.l0.np.m4.w1 8f /0 ] LONG,PROT,APX,X86_64 */ + /* 323 240(f4 fc 18) 300 001(8f) 210 : NWSIZE,LONG,EVEX,PROT,APX,X86_64 */ + {I_POP2P, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+13103, 344, 2236}, + /* 1 : POP2P reg64:reg64 [mv: o64nw evex.nd1.l0.np.m4.w1 8f /0 ] ND,LONG,PROT,APX,X86_64 */ + /* 323 241(f4 fc 18) 300 001(8f) 200 : NWSIZE,LONG,EVEX,PROT,APX,X86_64 */ + {I_POP2P, 2, {REG_GPR|BITS64|COLON,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+13113, 344, 2237}, +}; + +static const struct itemplate instrux_PXOR[2] = { + /* 0 : PXOR mmxreg,mmxrm [rm: np 0f ef /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(ef) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PXOR, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+68007, 334, 2241}, + /* 1 : PXOR xmmreg,xmmrm [rm: 66 0f ef /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(ef) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PXOR, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69099, 381, 2583}, +}; + +static const struct itemplate instrux_SKINIT[1] = { + /* 0 : SKINIT void [ 0f 01 de ] LONG,PROT,X86_64 */ + /* 355 002(01 de) : LONG,PROT,X86_64 */ + {I_SKINIT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72369, 24, 2242}, +}; + +static const struct itemplate instrux_UD0[4] = { + /* 0 : UD0 reg16,rm16 [rm: o16 0f ff /r ] SM0-1,186 */ + /* 320 355 001(ff) 110 : SM0,SM1,186 */ + {I_UD0, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+68013, 345, 2246}, + /* 1 : UD0 reg32,rm32 [rm: o32 0f ff /r ] SM0-1,386 */ + /* 321 355 001(ff) 110 : SM0,SM1,386 */ + {I_UD0, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68019, 13, 2247}, + /* 2 : UD0 reg64,rm64 [rm: o64 0f ff /r ] SM0-1,LONG,PROT,X86_64 */ + /* 324 355 001(ff) 110 : SM0,SM1,LONG,PROT,X86_64 */ + {I_UD0, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+68025, 14, 2248}, + /* 3 : UD0 void [ 0f ff ] 186 */ + /* 355 001(ff) : 186 */ + {I_UD0, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73428, 245, 2249}, +}; + +static const struct itemplate instrux_UD1[4] = { + /* 0 : UD1 reg16,rm16 [rm: o16 0f b9 /r ] SM0-1,186 */ + /* 320 355 001(b9) 110 : SM0,SM1,186 */ + {I_UD1, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+68031, 345, 2250}, + /* 1 : UD1 reg32,rm32 [rm: o32 0f b9 /r ] SM0-1,386 */ + /* 321 355 001(b9) 110 : SM0,SM1,386 */ + {I_UD1, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68037, 13, 2251}, + /* 2 : UD1 reg64,rm64 [rm: o64 0f b9 /r ] SM0-1,LONG,PROT,X86_64 */ + /* 324 355 001(b9) 110 : SM0,SM1,LONG,PROT,X86_64 */ + {I_UD1, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+68043, 14, 2252}, + /* 3 : UD1 void [ 0f b9 ] 186 */ + /* 355 001(b9) : 186 */ + {I_UD1, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73432, 245, 2253}, +}; + +static const struct itemplate instrux_UD2B[4] = { + /* 0 : UD2B reg16,rm16 [rm: o16 0f b9 /r ] ND,SM0-1,186 */ + /* 320 355 001(b9) 110 : SM0,SM1,186 */ + {I_UD2B, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+68031, 345, 2254}, + /* 1 : UD2B reg32,rm32 [rm: o32 0f b9 /r ] ND,SM0-1,386 */ + /* 321 355 001(b9) 110 : SM0,SM1,386 */ + {I_UD2B, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68037, 13, 2255}, + /* 2 : UD2B reg64,rm64 [rm: o64 0f b9 /r ] ND,SM0-1,LONG,PROT,X86_64 */ + /* 324 355 001(b9) 110 : SM0,SM1,LONG,PROT,X86_64 */ + {I_UD2B, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+68043, 14, 2256}, + /* 3 : UD2B void [ 0f b9 ] ND,186 */ + /* 355 001(b9) : 186 */ + {I_UD2B, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73432, 245, 2257}, +}; + +static const struct itemplate instrux_UD2[4] = { + /* 0 : UD2 void [ 0f 0b ] 186 */ + /* 355 001(0b) : 186 */ + {I_UD2, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73436, 245, 2259}, + /* 1 : UD2 reg16,rm16 [rm: o16 0f 0b /r ] SM0,ND,SM1,186 */ + /* 320 355 001(0b) 110 : SM0,SM1,186 */ + {I_UD2, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+68049, 345, 2260}, + /* 2 : UD2 reg32,rm32 [rm: o32 0f 0b /r ] ND,SM0-1,386 */ + /* 321 355 001(0b) 110 : SM0,SM1,386 */ + {I_UD2, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68055, 13, 2261}, + /* 3 : UD2 reg64,rm64 [rm: o64 0f 0b /r ] SM0,ND,SM1,LONG,PROT,X86_64 */ + /* 324 355 001(0b) 110 : SM0,SM1,LONG,PROT,X86_64 */ + {I_UD2, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+68061, 14, 2262}, +}; + +static const struct itemplate instrux_UD2A[4] = { + /* 0 : UD2A void [ 0f 0b ] ND,186 */ + /* 355 001(0b) : 186 */ + {I_UD2A, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73436, 245, 2263}, + /* 1 : UD2A reg16,rm16 [rm: o16 0f 0b /r ] ND,186 */ + /* 320 355 001(0b) 110 : 186 */ + {I_UD2A, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+68049, 245, 2264}, + /* 2 : UD2A reg32,rm32 [rm: o32 0f 0b /r ] ND,386 */ + /* 321 355 001(0b) 110 : 386 */ + {I_UD2A, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68055, 3, 2265}, + /* 3 : UD2A reg64,rm64 [rm: o64 0f 0b /r ] ND,LONG,PROT,X86_64 */ + /* 324 355 001(0b) 110 : LONG,PROT,X86_64 */ + {I_UD2A, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+68061, 24, 2266}, +}; + +static const struct itemplate instrux_UDB[1] = { + /* 0 : UDB void [ d6 ] LONG,PROT,X86_64 */ + /* 001(d6) : LONG,PROT,X86_64 */ + {I_UDB, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72531, 24, 2268}, +}; + +static const struct itemplate instrux_UDW[1] = { + /* 0 : UDW void [ ff ff ] UNDOC,186 */ + /* 002(ff ff) : UNDOC,186 */ + {I_UDW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73440, 346, 2271}, +}; + +static const struct itemplate instrux_FWAIT[1] = { + /* 0 : FWAIT void [ wait ] 8086 */ + /* 341 : 8086 */ + {I_FWAIT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73362, 23, 2273}, +}; + +static const struct itemplate instrux_XLATB[1] = { + /* 0 : XLATB void [ d7 ] 8086 */ + /* 001(d7) : 8086 */ + {I_XLATB, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70098, 23, 2275}, +}; + +static const struct itemplate instrux_XLAT[1] = { + /* 0 : XLAT void [ d7 ] ND,8086 */ + /* 001(d7) : 8086 */ + {I_XLAT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70098, 23, 2276}, +}; + +static const struct itemplate instrux_CCMP[15] = { + /* 0 : CCMP spec4,rm8,reg8 [wmr: evex.scc11.dfv.l0.m4.o8 38 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 0b) 300 001(38) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMP, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24709, 347, 2278}, + /* 1 : CCMP spec4,rm16,reg16 [wmr: evex.scc11.dfv.l0.m4.o16 39 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 0b) 300 320 001(39) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMP, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13123, 348, 2279}, + /* 2 : CCMP spec4,rm32,reg32 [wmr: evex.scc11.dfv.l0.m4.o32 39 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 0b) 300 321 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMP, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13283, 349, 2280}, + /* 3 : CCMP spec4,rm64,reg64 [wmr: evex.scc11.dfv.l0.m4.o64 39 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 0b) 300 324 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMP, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+13443, 349, 2281}, + /* 4 : CCMP spec4,reg8,rm8 [wrm: evex.scc11.dfv.l0.m4.o8 3a /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 0b) 300 001(3a) 121 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMP, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS8,RM_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24853, 347, 2282}, + /* 5 : CCMP spec4,reg16,rm16 [wrm: evex.scc11.dfv.l0.m4.o16 3b /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 0b) 300 320 001(3b) 121 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMP, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13603, 348, 2283}, + /* 6 : CCMP spec4,reg32,rm32 [wrm: evex.scc11.dfv.l0.m4.o32 3b /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 0b) 300 321 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMP, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13763, 349, 2284}, + /* 7 : CCMP spec4,reg64,rm64 [wrm: evex.scc11.dfv.l0.m4.o64 3b /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 0b) 300 324 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMP, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+13923, 349, 2285}, + /* 8 : CCMP spec4,rm16,sbyteword16 [wmi: evex.scc11.dfv.l0.m4.o16 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 0b) 300 320 001(83) 217 276 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMP, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2367, 348, 2286}, + /* 9 : CCMP spec4,rm32,sbytedword32 [wmi: evex.scc11.dfv.l0.m4.o32 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 0b) 300 321 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMP, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2543, 349, 2287}, + /* 10 : CCMP spec4,rm64,sbytedword64 [wmi: evex.scc11.dfv.l0.m4.o64 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 0b) 300 324 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMP, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2719, 349, 2288}, + /* 11 : CCMP spec4,rm8,imm8 [wmi: evex.scc11.dfv.l0.m4.o8 80 /7 ib ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 0b) 300 001(80) 217 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMP, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14083, 347, 2289}, + /* 12 : CCMP spec4,rm16,imm16 [wmi: evex.scc11.dfv.l0.m4.o16 81 /7 iw ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 0b) 300 320 001(81) 217 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMP, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+2895, 348, 2290}, + /* 13 : CCMP spec4,rm32,imm32 [wmi: evex.scc11.dfv.l0.m4.o32 81 /7 id ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 0b) 300 321 001(81) 217 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMP, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3071, 349, 2291}, + /* 14 : CCMP spec4,rm64,sdword64 [wmi: evex.scc11.dfv.l0.m4.o64 81 /7 id,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 0b) 300 324 001(81) 217 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMP, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3247, 349, 2292}, +}; + +static const struct itemplate instrux_CCMPA[15] = { + /* 0 : CCMPA spec4,rm8,reg8 [wmr: evex.scc7.dfv.l0.m4.o8 38 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 07) 300 001(38) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24718, 347, 2278}, + /* 1 : CCMPA spec4,rm16,reg16 [wmr: evex.scc7.dfv.l0.m4.o16 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 07) 300 320 001(39) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13133, 348, 2279}, + /* 2 : CCMPA spec4,rm32,reg32 [wmr: evex.scc7.dfv.l0.m4.o32 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 07) 300 321 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13293, 349, 2280}, + /* 3 : CCMPA spec4,rm64,reg64 [wmr: evex.scc7.dfv.l0.m4.o64 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 07) 300 324 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+13453, 349, 2281}, + /* 4 : CCMPA spec4,reg8,rm8 [wrm: evex.scc7.dfv.l0.m4.o8 3a /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 07) 300 001(3a) 121 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPA, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS8,RM_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24862, 347, 2282}, + /* 5 : CCMPA spec4,reg16,rm16 [wrm: evex.scc7.dfv.l0.m4.o16 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 07) 300 320 001(3b) 121 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPA, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13613, 348, 2283}, + /* 6 : CCMPA spec4,reg32,rm32 [wrm: evex.scc7.dfv.l0.m4.o32 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 07) 300 321 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPA, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13773, 349, 2284}, + /* 7 : CCMPA spec4,reg64,rm64 [wrm: evex.scc7.dfv.l0.m4.o64 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 07) 300 324 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPA, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+13933, 349, 2285}, + /* 8 : CCMPA spec4,rm16,sbyteword16 [wmi: evex.scc7.dfv.l0.m4.o16 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 07) 300 320 001(83) 217 276 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2378, 348, 2286}, + /* 9 : CCMPA spec4,rm32,sbytedword32 [wmi: evex.scc7.dfv.l0.m4.o32 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 07) 300 321 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2554, 349, 2287}, + /* 10 : CCMPA spec4,rm64,sbytedword64 [wmi: evex.scc7.dfv.l0.m4.o64 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 07) 300 324 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2730, 349, 2288}, + /* 11 : CCMPA spec4,rm8,imm8 [wmi: evex.scc7.dfv.l0.m4.o8 80 /7 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 07) 300 001(80) 217 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14093, 347, 2289}, + /* 12 : CCMPA spec4,rm16,imm16 [wmi: evex.scc7.dfv.l0.m4.o16 81 /7 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 07) 300 320 001(81) 217 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+2906, 348, 2290}, + /* 13 : CCMPA spec4,rm32,imm32 [wmi: evex.scc7.dfv.l0.m4.o32 81 /7 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 07) 300 321 001(81) 217 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3082, 349, 2291}, + /* 14 : CCMPA spec4,rm64,sdword64 [wmi: evex.scc7.dfv.l0.m4.o64 81 /7 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 07) 300 324 001(81) 217 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3258, 349, 2292}, +}; + +static const struct itemplate instrux_CCMPAE[15] = { + /* 0 : CCMPAE spec4,rm8,reg8 [wmr: evex.scc3.dfv.l0.m4.o8 38 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 03) 300 001(38) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPAE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24727, 347, 2278}, + /* 1 : CCMPAE spec4,rm16,reg16 [wmr: evex.scc3.dfv.l0.m4.o16 39 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 03) 300 320 001(39) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPAE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13143, 348, 2279}, + /* 2 : CCMPAE spec4,rm32,reg32 [wmr: evex.scc3.dfv.l0.m4.o32 39 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 03) 300 321 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPAE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13303, 349, 2280}, + /* 3 : CCMPAE spec4,rm64,reg64 [wmr: evex.scc3.dfv.l0.m4.o64 39 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 03) 300 324 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPAE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+13463, 349, 2281}, + /* 4 : CCMPAE spec4,reg8,rm8 [wrm: evex.scc3.dfv.l0.m4.o8 3a /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 03) 300 001(3a) 121 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPAE, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS8,RM_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24871, 347, 2282}, + /* 5 : CCMPAE spec4,reg16,rm16 [wrm: evex.scc3.dfv.l0.m4.o16 3b /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 03) 300 320 001(3b) 121 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPAE, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13623, 348, 2283}, + /* 6 : CCMPAE spec4,reg32,rm32 [wrm: evex.scc3.dfv.l0.m4.o32 3b /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 03) 300 321 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPAE, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13783, 349, 2284}, + /* 7 : CCMPAE spec4,reg64,rm64 [wrm: evex.scc3.dfv.l0.m4.o64 3b /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 03) 300 324 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPAE, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+13943, 349, 2285}, + /* 8 : CCMPAE spec4,rm16,sbyteword16 [wmi: evex.scc3.dfv.l0.m4.o16 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 03) 300 320 001(83) 217 276 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPAE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2389, 348, 2286}, + /* 9 : CCMPAE spec4,rm32,sbytedword32 [wmi: evex.scc3.dfv.l0.m4.o32 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 03) 300 321 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPAE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2565, 349, 2287}, + /* 10 : CCMPAE spec4,rm64,sbytedword64 [wmi: evex.scc3.dfv.l0.m4.o64 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 03) 300 324 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPAE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2741, 349, 2288}, + /* 11 : CCMPAE spec4,rm8,imm8 [wmi: evex.scc3.dfv.l0.m4.o8 80 /7 ib ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 03) 300 001(80) 217 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPAE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14103, 347, 2289}, + /* 12 : CCMPAE spec4,rm16,imm16 [wmi: evex.scc3.dfv.l0.m4.o16 81 /7 iw ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 03) 300 320 001(81) 217 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPAE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+2917, 348, 2290}, + /* 13 : CCMPAE spec4,rm32,imm32 [wmi: evex.scc3.dfv.l0.m4.o32 81 /7 id ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 03) 300 321 001(81) 217 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPAE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3093, 349, 2291}, + /* 14 : CCMPAE spec4,rm64,sdword64 [wmi: evex.scc3.dfv.l0.m4.o64 81 /7 id,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 03) 300 324 001(81) 217 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPAE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3269, 349, 2292}, +}; + +static const struct itemplate instrux_CCMPB[15] = { + /* 0 : CCMPB spec4,rm8,reg8 [wmr: evex.scc2.dfv.l0.m4.o8 38 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 02) 300 001(38) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPB, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24736, 347, 2278}, + /* 1 : CCMPB spec4,rm16,reg16 [wmr: evex.scc2.dfv.l0.m4.o16 39 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 02) 300 320 001(39) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPB, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13153, 348, 2279}, + /* 2 : CCMPB spec4,rm32,reg32 [wmr: evex.scc2.dfv.l0.m4.o32 39 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 02) 300 321 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPB, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13313, 349, 2280}, + /* 3 : CCMPB spec4,rm64,reg64 [wmr: evex.scc2.dfv.l0.m4.o64 39 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 02) 300 324 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPB, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+13473, 349, 2281}, + /* 4 : CCMPB spec4,reg8,rm8 [wrm: evex.scc2.dfv.l0.m4.o8 3a /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 02) 300 001(3a) 121 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPB, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS8,RM_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24880, 347, 2282}, + /* 5 : CCMPB spec4,reg16,rm16 [wrm: evex.scc2.dfv.l0.m4.o16 3b /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 02) 300 320 001(3b) 121 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPB, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13633, 348, 2283}, + /* 6 : CCMPB spec4,reg32,rm32 [wrm: evex.scc2.dfv.l0.m4.o32 3b /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 02) 300 321 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPB, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13793, 349, 2284}, + /* 7 : CCMPB spec4,reg64,rm64 [wrm: evex.scc2.dfv.l0.m4.o64 3b /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 02) 300 324 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPB, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+13953, 349, 2285}, + /* 8 : CCMPB spec4,rm16,sbyteword16 [wmi: evex.scc2.dfv.l0.m4.o16 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 02) 300 320 001(83) 217 276 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPB, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2400, 348, 2286}, + /* 9 : CCMPB spec4,rm32,sbytedword32 [wmi: evex.scc2.dfv.l0.m4.o32 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 02) 300 321 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPB, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2576, 349, 2287}, + /* 10 : CCMPB spec4,rm64,sbytedword64 [wmi: evex.scc2.dfv.l0.m4.o64 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 02) 300 324 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPB, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2752, 349, 2288}, + /* 11 : CCMPB spec4,rm8,imm8 [wmi: evex.scc2.dfv.l0.m4.o8 80 /7 ib ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 02) 300 001(80) 217 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPB, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14113, 347, 2289}, + /* 12 : CCMPB spec4,rm16,imm16 [wmi: evex.scc2.dfv.l0.m4.o16 81 /7 iw ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 02) 300 320 001(81) 217 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPB, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+2928, 348, 2290}, + /* 13 : CCMPB spec4,rm32,imm32 [wmi: evex.scc2.dfv.l0.m4.o32 81 /7 id ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 02) 300 321 001(81) 217 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPB, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3104, 349, 2291}, + /* 14 : CCMPB spec4,rm64,sdword64 [wmi: evex.scc2.dfv.l0.m4.o64 81 /7 id,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 02) 300 324 001(81) 217 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPB, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3280, 349, 2292}, +}; + +static const struct itemplate instrux_CCMPBE[15] = { + /* 0 : CCMPBE spec4,rm8,reg8 [wmr: evex.scc6.dfv.l0.m4.o8 38 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 06) 300 001(38) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPBE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24745, 347, 2278}, + /* 1 : CCMPBE spec4,rm16,reg16 [wmr: evex.scc6.dfv.l0.m4.o16 39 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 06) 300 320 001(39) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPBE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13163, 348, 2279}, + /* 2 : CCMPBE spec4,rm32,reg32 [wmr: evex.scc6.dfv.l0.m4.o32 39 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 06) 300 321 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPBE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13323, 349, 2280}, + /* 3 : CCMPBE spec4,rm64,reg64 [wmr: evex.scc6.dfv.l0.m4.o64 39 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 06) 300 324 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPBE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+13483, 349, 2281}, + /* 4 : CCMPBE spec4,reg8,rm8 [wrm: evex.scc6.dfv.l0.m4.o8 3a /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 06) 300 001(3a) 121 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPBE, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS8,RM_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24889, 347, 2282}, + /* 5 : CCMPBE spec4,reg16,rm16 [wrm: evex.scc6.dfv.l0.m4.o16 3b /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 06) 300 320 001(3b) 121 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPBE, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13643, 348, 2283}, + /* 6 : CCMPBE spec4,reg32,rm32 [wrm: evex.scc6.dfv.l0.m4.o32 3b /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 06) 300 321 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPBE, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13803, 349, 2284}, + /* 7 : CCMPBE spec4,reg64,rm64 [wrm: evex.scc6.dfv.l0.m4.o64 3b /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 06) 300 324 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPBE, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+13963, 349, 2285}, + /* 8 : CCMPBE spec4,rm16,sbyteword16 [wmi: evex.scc6.dfv.l0.m4.o16 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 06) 300 320 001(83) 217 276 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPBE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2411, 348, 2286}, + /* 9 : CCMPBE spec4,rm32,sbytedword32 [wmi: evex.scc6.dfv.l0.m4.o32 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 06) 300 321 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPBE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2587, 349, 2287}, + /* 10 : CCMPBE spec4,rm64,sbytedword64 [wmi: evex.scc6.dfv.l0.m4.o64 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 06) 300 324 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPBE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2763, 349, 2288}, + /* 11 : CCMPBE spec4,rm8,imm8 [wmi: evex.scc6.dfv.l0.m4.o8 80 /7 ib ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 06) 300 001(80) 217 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPBE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14123, 347, 2289}, + /* 12 : CCMPBE spec4,rm16,imm16 [wmi: evex.scc6.dfv.l0.m4.o16 81 /7 iw ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 06) 300 320 001(81) 217 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPBE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+2939, 348, 2290}, + /* 13 : CCMPBE spec4,rm32,imm32 [wmi: evex.scc6.dfv.l0.m4.o32 81 /7 id ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 06) 300 321 001(81) 217 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPBE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3115, 349, 2291}, + /* 14 : CCMPBE spec4,rm64,sdword64 [wmi: evex.scc6.dfv.l0.m4.o64 81 /7 id,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 06) 300 324 001(81) 217 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPBE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3291, 349, 2292}, +}; + +static const struct itemplate instrux_CCMPC[15] = { + /* 0 : CCMPC spec4,rm8,reg8 [wmr: evex.scc2.dfv.l0.m4.o8 38 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 02) 300 001(38) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24736, 347, 2278}, + /* 1 : CCMPC spec4,rm16,reg16 [wmr: evex.scc2.dfv.l0.m4.o16 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 02) 300 320 001(39) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13153, 348, 2279}, + /* 2 : CCMPC spec4,rm32,reg32 [wmr: evex.scc2.dfv.l0.m4.o32 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 02) 300 321 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13313, 349, 2280}, + /* 3 : CCMPC spec4,rm64,reg64 [wmr: evex.scc2.dfv.l0.m4.o64 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 02) 300 324 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+13473, 349, 2281}, + /* 4 : CCMPC spec4,reg8,rm8 [wrm: evex.scc2.dfv.l0.m4.o8 3a /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 02) 300 001(3a) 121 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPC, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS8,RM_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24880, 347, 2282}, + /* 5 : CCMPC spec4,reg16,rm16 [wrm: evex.scc2.dfv.l0.m4.o16 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 02) 300 320 001(3b) 121 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPC, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13633, 348, 2283}, + /* 6 : CCMPC spec4,reg32,rm32 [wrm: evex.scc2.dfv.l0.m4.o32 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 02) 300 321 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPC, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13793, 349, 2284}, + /* 7 : CCMPC spec4,reg64,rm64 [wrm: evex.scc2.dfv.l0.m4.o64 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 02) 300 324 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPC, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+13953, 349, 2285}, + /* 8 : CCMPC spec4,rm16,sbyteword16 [wmi: evex.scc2.dfv.l0.m4.o16 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 02) 300 320 001(83) 217 276 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2400, 348, 2286}, + /* 9 : CCMPC spec4,rm32,sbytedword32 [wmi: evex.scc2.dfv.l0.m4.o32 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 02) 300 321 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2576, 349, 2287}, + /* 10 : CCMPC spec4,rm64,sbytedword64 [wmi: evex.scc2.dfv.l0.m4.o64 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 02) 300 324 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2752, 349, 2288}, + /* 11 : CCMPC spec4,rm8,imm8 [wmi: evex.scc2.dfv.l0.m4.o8 80 /7 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 02) 300 001(80) 217 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14113, 347, 2289}, + /* 12 : CCMPC spec4,rm16,imm16 [wmi: evex.scc2.dfv.l0.m4.o16 81 /7 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 02) 300 320 001(81) 217 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+2928, 348, 2290}, + /* 13 : CCMPC spec4,rm32,imm32 [wmi: evex.scc2.dfv.l0.m4.o32 81 /7 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 02) 300 321 001(81) 217 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3104, 349, 2291}, + /* 14 : CCMPC spec4,rm64,sdword64 [wmi: evex.scc2.dfv.l0.m4.o64 81 /7 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 02) 300 324 001(81) 217 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3280, 349, 2292}, +}; + +static const struct itemplate instrux_CCMPE[15] = { + /* 0 : CCMPE spec4,rm8,reg8 [wmr: evex.scc4.dfv.l0.m4.o8 38 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 04) 300 001(38) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24754, 347, 2278}, + /* 1 : CCMPE spec4,rm16,reg16 [wmr: evex.scc4.dfv.l0.m4.o16 39 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 04) 300 320 001(39) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13173, 348, 2279}, + /* 2 : CCMPE spec4,rm32,reg32 [wmr: evex.scc4.dfv.l0.m4.o32 39 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 04) 300 321 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13333, 349, 2280}, + /* 3 : CCMPE spec4,rm64,reg64 [wmr: evex.scc4.dfv.l0.m4.o64 39 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 04) 300 324 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+13493, 349, 2281}, + /* 4 : CCMPE spec4,reg8,rm8 [wrm: evex.scc4.dfv.l0.m4.o8 3a /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 04) 300 001(3a) 121 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPE, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS8,RM_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24898, 347, 2282}, + /* 5 : CCMPE spec4,reg16,rm16 [wrm: evex.scc4.dfv.l0.m4.o16 3b /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 04) 300 320 001(3b) 121 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPE, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13653, 348, 2283}, + /* 6 : CCMPE spec4,reg32,rm32 [wrm: evex.scc4.dfv.l0.m4.o32 3b /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 04) 300 321 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPE, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13813, 349, 2284}, + /* 7 : CCMPE spec4,reg64,rm64 [wrm: evex.scc4.dfv.l0.m4.o64 3b /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 04) 300 324 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPE, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+13973, 349, 2285}, + /* 8 : CCMPE spec4,rm16,sbyteword16 [wmi: evex.scc4.dfv.l0.m4.o16 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 04) 300 320 001(83) 217 276 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2422, 348, 2286}, + /* 9 : CCMPE spec4,rm32,sbytedword32 [wmi: evex.scc4.dfv.l0.m4.o32 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 04) 300 321 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2598, 349, 2287}, + /* 10 : CCMPE spec4,rm64,sbytedword64 [wmi: evex.scc4.dfv.l0.m4.o64 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 04) 300 324 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2774, 349, 2288}, + /* 11 : CCMPE spec4,rm8,imm8 [wmi: evex.scc4.dfv.l0.m4.o8 80 /7 ib ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 04) 300 001(80) 217 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14133, 347, 2289}, + /* 12 : CCMPE spec4,rm16,imm16 [wmi: evex.scc4.dfv.l0.m4.o16 81 /7 iw ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 04) 300 320 001(81) 217 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+2950, 348, 2290}, + /* 13 : CCMPE spec4,rm32,imm32 [wmi: evex.scc4.dfv.l0.m4.o32 81 /7 id ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 04) 300 321 001(81) 217 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3126, 349, 2291}, + /* 14 : CCMPE spec4,rm64,sdword64 [wmi: evex.scc4.dfv.l0.m4.o64 81 /7 id,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 04) 300 324 001(81) 217 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3302, 349, 2292}, +}; + +static const struct itemplate instrux_CCMPF[15] = { + /* 0 : CCMPF spec4,rm8,reg8 [wmr: evex.scc11.dfv.l0.m4.o8 38 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0b) 300 001(38) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPF, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24709, 347, 2278}, + /* 1 : CCMPF spec4,rm16,reg16 [wmr: evex.scc11.dfv.l0.m4.o16 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0b) 300 320 001(39) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPF, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13123, 348, 2279}, + /* 2 : CCMPF spec4,rm32,reg32 [wmr: evex.scc11.dfv.l0.m4.o32 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0b) 300 321 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPF, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13283, 349, 2280}, + /* 3 : CCMPF spec4,rm64,reg64 [wmr: evex.scc11.dfv.l0.m4.o64 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0b) 300 324 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPF, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+13443, 349, 2281}, + /* 4 : CCMPF spec4,reg8,rm8 [wrm: evex.scc11.dfv.l0.m4.o8 3a /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0b) 300 001(3a) 121 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPF, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS8,RM_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24853, 347, 2282}, + /* 5 : CCMPF spec4,reg16,rm16 [wrm: evex.scc11.dfv.l0.m4.o16 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0b) 300 320 001(3b) 121 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPF, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13603, 348, 2283}, + /* 6 : CCMPF spec4,reg32,rm32 [wrm: evex.scc11.dfv.l0.m4.o32 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0b) 300 321 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPF, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13763, 349, 2284}, + /* 7 : CCMPF spec4,reg64,rm64 [wrm: evex.scc11.dfv.l0.m4.o64 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0b) 300 324 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPF, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+13923, 349, 2285}, + /* 8 : CCMPF spec4,rm16,sbyteword16 [wmi: evex.scc11.dfv.l0.m4.o16 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0b) 300 320 001(83) 217 276 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPF, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2367, 348, 2286}, + /* 9 : CCMPF spec4,rm32,sbytedword32 [wmi: evex.scc11.dfv.l0.m4.o32 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0b) 300 321 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPF, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2543, 349, 2287}, + /* 10 : CCMPF spec4,rm64,sbytedword64 [wmi: evex.scc11.dfv.l0.m4.o64 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0b) 300 324 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPF, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2719, 349, 2288}, + /* 11 : CCMPF spec4,rm8,imm8 [wmi: evex.scc11.dfv.l0.m4.o8 80 /7 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0b) 300 001(80) 217 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPF, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14083, 347, 2289}, + /* 12 : CCMPF spec4,rm16,imm16 [wmi: evex.scc11.dfv.l0.m4.o16 81 /7 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0b) 300 320 001(81) 217 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPF, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+2895, 348, 2290}, + /* 13 : CCMPF spec4,rm32,imm32 [wmi: evex.scc11.dfv.l0.m4.o32 81 /7 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0b) 300 321 001(81) 217 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPF, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3071, 349, 2291}, + /* 14 : CCMPF spec4,rm64,sdword64 [wmi: evex.scc11.dfv.l0.m4.o64 81 /7 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0b) 300 324 001(81) 217 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPF, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3247, 349, 2292}, +}; + +static const struct itemplate instrux_CCMPG[15] = { + /* 0 : CCMPG spec4,rm8,reg8 [wmr: evex.scc15.dfv.l0.m4.o8 38 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0f) 300 001(38) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24763, 347, 2278}, + /* 1 : CCMPG spec4,rm16,reg16 [wmr: evex.scc15.dfv.l0.m4.o16 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0f) 300 320 001(39) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13183, 348, 2279}, + /* 2 : CCMPG spec4,rm32,reg32 [wmr: evex.scc15.dfv.l0.m4.o32 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0f) 300 321 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13343, 349, 2280}, + /* 3 : CCMPG spec4,rm64,reg64 [wmr: evex.scc15.dfv.l0.m4.o64 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0f) 300 324 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+13503, 349, 2281}, + /* 4 : CCMPG spec4,reg8,rm8 [wrm: evex.scc15.dfv.l0.m4.o8 3a /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0f) 300 001(3a) 121 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPG, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS8,RM_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24907, 347, 2282}, + /* 5 : CCMPG spec4,reg16,rm16 [wrm: evex.scc15.dfv.l0.m4.o16 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0f) 300 320 001(3b) 121 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPG, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13663, 348, 2283}, + /* 6 : CCMPG spec4,reg32,rm32 [wrm: evex.scc15.dfv.l0.m4.o32 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0f) 300 321 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPG, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13823, 349, 2284}, + /* 7 : CCMPG spec4,reg64,rm64 [wrm: evex.scc15.dfv.l0.m4.o64 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0f) 300 324 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPG, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+13983, 349, 2285}, + /* 8 : CCMPG spec4,rm16,sbyteword16 [wmi: evex.scc15.dfv.l0.m4.o16 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0f) 300 320 001(83) 217 276 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2433, 348, 2286}, + /* 9 : CCMPG spec4,rm32,sbytedword32 [wmi: evex.scc15.dfv.l0.m4.o32 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0f) 300 321 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2609, 349, 2287}, + /* 10 : CCMPG spec4,rm64,sbytedword64 [wmi: evex.scc15.dfv.l0.m4.o64 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0f) 300 324 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2785, 349, 2288}, + /* 11 : CCMPG spec4,rm8,imm8 [wmi: evex.scc15.dfv.l0.m4.o8 80 /7 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0f) 300 001(80) 217 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14143, 347, 2289}, + /* 12 : CCMPG spec4,rm16,imm16 [wmi: evex.scc15.dfv.l0.m4.o16 81 /7 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0f) 300 320 001(81) 217 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+2961, 348, 2290}, + /* 13 : CCMPG spec4,rm32,imm32 [wmi: evex.scc15.dfv.l0.m4.o32 81 /7 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0f) 300 321 001(81) 217 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3137, 349, 2291}, + /* 14 : CCMPG spec4,rm64,sdword64 [wmi: evex.scc15.dfv.l0.m4.o64 81 /7 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0f) 300 324 001(81) 217 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3313, 349, 2292}, +}; + +static const struct itemplate instrux_CCMPGE[15] = { + /* 0 : CCMPGE spec4,rm8,reg8 [wmr: evex.scc13.dfv.l0.m4.o8 38 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 0d) 300 001(38) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPGE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24772, 347, 2278}, + /* 1 : CCMPGE spec4,rm16,reg16 [wmr: evex.scc13.dfv.l0.m4.o16 39 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 0d) 300 320 001(39) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPGE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13193, 348, 2279}, + /* 2 : CCMPGE spec4,rm32,reg32 [wmr: evex.scc13.dfv.l0.m4.o32 39 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 0d) 300 321 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPGE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13353, 349, 2280}, + /* 3 : CCMPGE spec4,rm64,reg64 [wmr: evex.scc13.dfv.l0.m4.o64 39 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 0d) 300 324 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPGE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+13513, 349, 2281}, + /* 4 : CCMPGE spec4,reg8,rm8 [wrm: evex.scc13.dfv.l0.m4.o8 3a /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 0d) 300 001(3a) 121 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPGE, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS8,RM_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24916, 347, 2282}, + /* 5 : CCMPGE spec4,reg16,rm16 [wrm: evex.scc13.dfv.l0.m4.o16 3b /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 0d) 300 320 001(3b) 121 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPGE, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13673, 348, 2283}, + /* 6 : CCMPGE spec4,reg32,rm32 [wrm: evex.scc13.dfv.l0.m4.o32 3b /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 0d) 300 321 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPGE, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13833, 349, 2284}, + /* 7 : CCMPGE spec4,reg64,rm64 [wrm: evex.scc13.dfv.l0.m4.o64 3b /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 0d) 300 324 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPGE, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+13993, 349, 2285}, + /* 8 : CCMPGE spec4,rm16,sbyteword16 [wmi: evex.scc13.dfv.l0.m4.o16 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 0d) 300 320 001(83) 217 276 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPGE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2444, 348, 2286}, + /* 9 : CCMPGE spec4,rm32,sbytedword32 [wmi: evex.scc13.dfv.l0.m4.o32 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 0d) 300 321 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPGE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2620, 349, 2287}, + /* 10 : CCMPGE spec4,rm64,sbytedword64 [wmi: evex.scc13.dfv.l0.m4.o64 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 0d) 300 324 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPGE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2796, 349, 2288}, + /* 11 : CCMPGE spec4,rm8,imm8 [wmi: evex.scc13.dfv.l0.m4.o8 80 /7 ib ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 0d) 300 001(80) 217 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPGE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14153, 347, 2289}, + /* 12 : CCMPGE spec4,rm16,imm16 [wmi: evex.scc13.dfv.l0.m4.o16 81 /7 iw ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 0d) 300 320 001(81) 217 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPGE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+2972, 348, 2290}, + /* 13 : CCMPGE spec4,rm32,imm32 [wmi: evex.scc13.dfv.l0.m4.o32 81 /7 id ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 0d) 300 321 001(81) 217 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPGE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3148, 349, 2291}, + /* 14 : CCMPGE spec4,rm64,sdword64 [wmi: evex.scc13.dfv.l0.m4.o64 81 /7 id,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 0d) 300 324 001(81) 217 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPGE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3324, 349, 2292}, +}; + +static const struct itemplate instrux_CCMPL[15] = { + /* 0 : CCMPL spec4,rm8,reg8 [wmr: evex.scc12.dfv.l0.m4.o8 38 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0c) 300 001(38) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24781, 347, 2278}, + /* 1 : CCMPL spec4,rm16,reg16 [wmr: evex.scc12.dfv.l0.m4.o16 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0c) 300 320 001(39) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13203, 348, 2279}, + /* 2 : CCMPL spec4,rm32,reg32 [wmr: evex.scc12.dfv.l0.m4.o32 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0c) 300 321 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13363, 349, 2280}, + /* 3 : CCMPL spec4,rm64,reg64 [wmr: evex.scc12.dfv.l0.m4.o64 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0c) 300 324 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+13523, 349, 2281}, + /* 4 : CCMPL spec4,reg8,rm8 [wrm: evex.scc12.dfv.l0.m4.o8 3a /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0c) 300 001(3a) 121 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPL, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS8,RM_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24925, 347, 2282}, + /* 5 : CCMPL spec4,reg16,rm16 [wrm: evex.scc12.dfv.l0.m4.o16 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0c) 300 320 001(3b) 121 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPL, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13683, 348, 2283}, + /* 6 : CCMPL spec4,reg32,rm32 [wrm: evex.scc12.dfv.l0.m4.o32 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0c) 300 321 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPL, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13843, 349, 2284}, + /* 7 : CCMPL spec4,reg64,rm64 [wrm: evex.scc12.dfv.l0.m4.o64 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0c) 300 324 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPL, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+14003, 349, 2285}, + /* 8 : CCMPL spec4,rm16,sbyteword16 [wmi: evex.scc12.dfv.l0.m4.o16 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0c) 300 320 001(83) 217 276 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2455, 348, 2286}, + /* 9 : CCMPL spec4,rm32,sbytedword32 [wmi: evex.scc12.dfv.l0.m4.o32 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0c) 300 321 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2631, 349, 2287}, + /* 10 : CCMPL spec4,rm64,sbytedword64 [wmi: evex.scc12.dfv.l0.m4.o64 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0c) 300 324 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2807, 349, 2288}, + /* 11 : CCMPL spec4,rm8,imm8 [wmi: evex.scc12.dfv.l0.m4.o8 80 /7 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0c) 300 001(80) 217 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14163, 347, 2289}, + /* 12 : CCMPL spec4,rm16,imm16 [wmi: evex.scc12.dfv.l0.m4.o16 81 /7 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0c) 300 320 001(81) 217 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+2983, 348, 2290}, + /* 13 : CCMPL spec4,rm32,imm32 [wmi: evex.scc12.dfv.l0.m4.o32 81 /7 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0c) 300 321 001(81) 217 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3159, 349, 2291}, + /* 14 : CCMPL spec4,rm64,sdword64 [wmi: evex.scc12.dfv.l0.m4.o64 81 /7 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0c) 300 324 001(81) 217 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3335, 349, 2292}, +}; + +static const struct itemplate instrux_CCMPLE[15] = { + /* 0 : CCMPLE spec4,rm8,reg8 [wmr: evex.scc14.dfv.l0.m4.o8 38 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 0e) 300 001(38) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPLE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24790, 347, 2278}, + /* 1 : CCMPLE spec4,rm16,reg16 [wmr: evex.scc14.dfv.l0.m4.o16 39 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 0e) 300 320 001(39) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPLE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13213, 348, 2279}, + /* 2 : CCMPLE spec4,rm32,reg32 [wmr: evex.scc14.dfv.l0.m4.o32 39 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 0e) 300 321 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPLE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13373, 349, 2280}, + /* 3 : CCMPLE spec4,rm64,reg64 [wmr: evex.scc14.dfv.l0.m4.o64 39 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 0e) 300 324 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPLE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+13533, 349, 2281}, + /* 4 : CCMPLE spec4,reg8,rm8 [wrm: evex.scc14.dfv.l0.m4.o8 3a /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 0e) 300 001(3a) 121 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPLE, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS8,RM_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24934, 347, 2282}, + /* 5 : CCMPLE spec4,reg16,rm16 [wrm: evex.scc14.dfv.l0.m4.o16 3b /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 0e) 300 320 001(3b) 121 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPLE, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13693, 348, 2283}, + /* 6 : CCMPLE spec4,reg32,rm32 [wrm: evex.scc14.dfv.l0.m4.o32 3b /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 0e) 300 321 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPLE, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13853, 349, 2284}, + /* 7 : CCMPLE spec4,reg64,rm64 [wrm: evex.scc14.dfv.l0.m4.o64 3b /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 0e) 300 324 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPLE, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+14013, 349, 2285}, + /* 8 : CCMPLE spec4,rm16,sbyteword16 [wmi: evex.scc14.dfv.l0.m4.o16 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 0e) 300 320 001(83) 217 276 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPLE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2466, 348, 2286}, + /* 9 : CCMPLE spec4,rm32,sbytedword32 [wmi: evex.scc14.dfv.l0.m4.o32 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 0e) 300 321 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPLE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2642, 349, 2287}, + /* 10 : CCMPLE spec4,rm64,sbytedword64 [wmi: evex.scc14.dfv.l0.m4.o64 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 0e) 300 324 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPLE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2818, 349, 2288}, + /* 11 : CCMPLE spec4,rm8,imm8 [wmi: evex.scc14.dfv.l0.m4.o8 80 /7 ib ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 0e) 300 001(80) 217 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPLE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14173, 347, 2289}, + /* 12 : CCMPLE spec4,rm16,imm16 [wmi: evex.scc14.dfv.l0.m4.o16 81 /7 iw ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 0e) 300 320 001(81) 217 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPLE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+2994, 348, 2290}, + /* 13 : CCMPLE spec4,rm32,imm32 [wmi: evex.scc14.dfv.l0.m4.o32 81 /7 id ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 0e) 300 321 001(81) 217 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPLE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3170, 349, 2291}, + /* 14 : CCMPLE spec4,rm64,sdword64 [wmi: evex.scc14.dfv.l0.m4.o64 81 /7 id,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 0e) 300 324 001(81) 217 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPLE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3346, 349, 2292}, +}; + +static const struct itemplate instrux_CCMPNA[15] = { + /* 0 : CCMPNA spec4,rm8,reg8 [wmr: evex.scc6.dfv.l0.m4.o8 38 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 06) 300 001(38) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24745, 347, 2278}, + /* 1 : CCMPNA spec4,rm16,reg16 [wmr: evex.scc6.dfv.l0.m4.o16 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 06) 300 320 001(39) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13163, 348, 2279}, + /* 2 : CCMPNA spec4,rm32,reg32 [wmr: evex.scc6.dfv.l0.m4.o32 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 06) 300 321 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13323, 349, 2280}, + /* 3 : CCMPNA spec4,rm64,reg64 [wmr: evex.scc6.dfv.l0.m4.o64 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 06) 300 324 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+13483, 349, 2281}, + /* 4 : CCMPNA spec4,reg8,rm8 [wrm: evex.scc6.dfv.l0.m4.o8 3a /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 06) 300 001(3a) 121 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNA, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS8,RM_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24889, 347, 2282}, + /* 5 : CCMPNA spec4,reg16,rm16 [wrm: evex.scc6.dfv.l0.m4.o16 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 06) 300 320 001(3b) 121 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNA, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13643, 348, 2283}, + /* 6 : CCMPNA spec4,reg32,rm32 [wrm: evex.scc6.dfv.l0.m4.o32 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 06) 300 321 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNA, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13803, 349, 2284}, + /* 7 : CCMPNA spec4,reg64,rm64 [wrm: evex.scc6.dfv.l0.m4.o64 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 06) 300 324 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNA, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+13963, 349, 2285}, + /* 8 : CCMPNA spec4,rm16,sbyteword16 [wmi: evex.scc6.dfv.l0.m4.o16 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 06) 300 320 001(83) 217 276 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2411, 348, 2286}, + /* 9 : CCMPNA spec4,rm32,sbytedword32 [wmi: evex.scc6.dfv.l0.m4.o32 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 06) 300 321 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2587, 349, 2287}, + /* 10 : CCMPNA spec4,rm64,sbytedword64 [wmi: evex.scc6.dfv.l0.m4.o64 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 06) 300 324 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2763, 349, 2288}, + /* 11 : CCMPNA spec4,rm8,imm8 [wmi: evex.scc6.dfv.l0.m4.o8 80 /7 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 06) 300 001(80) 217 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14123, 347, 2289}, + /* 12 : CCMPNA spec4,rm16,imm16 [wmi: evex.scc6.dfv.l0.m4.o16 81 /7 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 06) 300 320 001(81) 217 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+2939, 348, 2290}, + /* 13 : CCMPNA spec4,rm32,imm32 [wmi: evex.scc6.dfv.l0.m4.o32 81 /7 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 06) 300 321 001(81) 217 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3115, 349, 2291}, + /* 14 : CCMPNA spec4,rm64,sdword64 [wmi: evex.scc6.dfv.l0.m4.o64 81 /7 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 06) 300 324 001(81) 217 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3291, 349, 2292}, +}; + +static const struct itemplate instrux_CCMPNAE[15] = { + /* 0 : CCMPNAE spec4,rm8,reg8 [wmr: evex.scc2.dfv.l0.m4.o8 38 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 02) 300 001(38) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNAE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24736, 347, 2278}, + /* 1 : CCMPNAE spec4,rm16,reg16 [wmr: evex.scc2.dfv.l0.m4.o16 39 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 02) 300 320 001(39) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNAE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13153, 348, 2279}, + /* 2 : CCMPNAE spec4,rm32,reg32 [wmr: evex.scc2.dfv.l0.m4.o32 39 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 02) 300 321 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNAE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13313, 349, 2280}, + /* 3 : CCMPNAE spec4,rm64,reg64 [wmr: evex.scc2.dfv.l0.m4.o64 39 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 02) 300 324 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNAE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+13473, 349, 2281}, + /* 4 : CCMPNAE spec4,reg8,rm8 [wrm: evex.scc2.dfv.l0.m4.o8 3a /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 02) 300 001(3a) 121 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNAE, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS8,RM_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24880, 347, 2282}, + /* 5 : CCMPNAE spec4,reg16,rm16 [wrm: evex.scc2.dfv.l0.m4.o16 3b /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 02) 300 320 001(3b) 121 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNAE, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13633, 348, 2283}, + /* 6 : CCMPNAE spec4,reg32,rm32 [wrm: evex.scc2.dfv.l0.m4.o32 3b /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 02) 300 321 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNAE, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13793, 349, 2284}, + /* 7 : CCMPNAE spec4,reg64,rm64 [wrm: evex.scc2.dfv.l0.m4.o64 3b /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 02) 300 324 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNAE, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+13953, 349, 2285}, + /* 8 : CCMPNAE spec4,rm16,sbyteword16 [wmi: evex.scc2.dfv.l0.m4.o16 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 02) 300 320 001(83) 217 276 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNAE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2400, 348, 2286}, + /* 9 : CCMPNAE spec4,rm32,sbytedword32 [wmi: evex.scc2.dfv.l0.m4.o32 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 02) 300 321 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNAE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2576, 349, 2287}, + /* 10 : CCMPNAE spec4,rm64,sbytedword64 [wmi: evex.scc2.dfv.l0.m4.o64 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 02) 300 324 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNAE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2752, 349, 2288}, + /* 11 : CCMPNAE spec4,rm8,imm8 [wmi: evex.scc2.dfv.l0.m4.o8 80 /7 ib ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 02) 300 001(80) 217 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNAE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14113, 347, 2289}, + /* 12 : CCMPNAE spec4,rm16,imm16 [wmi: evex.scc2.dfv.l0.m4.o16 81 /7 iw ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 02) 300 320 001(81) 217 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNAE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+2928, 348, 2290}, + /* 13 : CCMPNAE spec4,rm32,imm32 [wmi: evex.scc2.dfv.l0.m4.o32 81 /7 id ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 02) 300 321 001(81) 217 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNAE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3104, 349, 2291}, + /* 14 : CCMPNAE spec4,rm64,sdword64 [wmi: evex.scc2.dfv.l0.m4.o64 81 /7 id,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 02) 300 324 001(81) 217 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNAE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3280, 349, 2292}, +}; + +static const struct itemplate instrux_CCMPNB[15] = { + /* 0 : CCMPNB spec4,rm8,reg8 [wmr: evex.scc3.dfv.l0.m4.o8 38 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 03) 300 001(38) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNB, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24727, 347, 2278}, + /* 1 : CCMPNB spec4,rm16,reg16 [wmr: evex.scc3.dfv.l0.m4.o16 39 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 03) 300 320 001(39) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNB, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13143, 348, 2279}, + /* 2 : CCMPNB spec4,rm32,reg32 [wmr: evex.scc3.dfv.l0.m4.o32 39 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 03) 300 321 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNB, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13303, 349, 2280}, + /* 3 : CCMPNB spec4,rm64,reg64 [wmr: evex.scc3.dfv.l0.m4.o64 39 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 03) 300 324 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNB, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+13463, 349, 2281}, + /* 4 : CCMPNB spec4,reg8,rm8 [wrm: evex.scc3.dfv.l0.m4.o8 3a /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 03) 300 001(3a) 121 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNB, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS8,RM_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24871, 347, 2282}, + /* 5 : CCMPNB spec4,reg16,rm16 [wrm: evex.scc3.dfv.l0.m4.o16 3b /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 03) 300 320 001(3b) 121 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNB, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13623, 348, 2283}, + /* 6 : CCMPNB spec4,reg32,rm32 [wrm: evex.scc3.dfv.l0.m4.o32 3b /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 03) 300 321 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNB, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13783, 349, 2284}, + /* 7 : CCMPNB spec4,reg64,rm64 [wrm: evex.scc3.dfv.l0.m4.o64 3b /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 03) 300 324 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNB, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+13943, 349, 2285}, + /* 8 : CCMPNB spec4,rm16,sbyteword16 [wmi: evex.scc3.dfv.l0.m4.o16 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 03) 300 320 001(83) 217 276 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNB, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2389, 348, 2286}, + /* 9 : CCMPNB spec4,rm32,sbytedword32 [wmi: evex.scc3.dfv.l0.m4.o32 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 03) 300 321 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNB, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2565, 349, 2287}, + /* 10 : CCMPNB spec4,rm64,sbytedword64 [wmi: evex.scc3.dfv.l0.m4.o64 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 03) 300 324 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNB, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2741, 349, 2288}, + /* 11 : CCMPNB spec4,rm8,imm8 [wmi: evex.scc3.dfv.l0.m4.o8 80 /7 ib ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 03) 300 001(80) 217 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNB, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14103, 347, 2289}, + /* 12 : CCMPNB spec4,rm16,imm16 [wmi: evex.scc3.dfv.l0.m4.o16 81 /7 iw ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 03) 300 320 001(81) 217 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNB, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+2917, 348, 2290}, + /* 13 : CCMPNB spec4,rm32,imm32 [wmi: evex.scc3.dfv.l0.m4.o32 81 /7 id ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 03) 300 321 001(81) 217 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNB, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3093, 349, 2291}, + /* 14 : CCMPNB spec4,rm64,sdword64 [wmi: evex.scc3.dfv.l0.m4.o64 81 /7 id,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 03) 300 324 001(81) 217 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNB, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3269, 349, 2292}, +}; + +static const struct itemplate instrux_CCMPNBE[15] = { + /* 0 : CCMPNBE spec4,rm8,reg8 [wmr: evex.scc7.dfv.l0.m4.o8 38 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 07) 300 001(38) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNBE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24718, 347, 2278}, + /* 1 : CCMPNBE spec4,rm16,reg16 [wmr: evex.scc7.dfv.l0.m4.o16 39 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 07) 300 320 001(39) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNBE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13133, 348, 2279}, + /* 2 : CCMPNBE spec4,rm32,reg32 [wmr: evex.scc7.dfv.l0.m4.o32 39 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 07) 300 321 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNBE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13293, 349, 2280}, + /* 3 : CCMPNBE spec4,rm64,reg64 [wmr: evex.scc7.dfv.l0.m4.o64 39 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 07) 300 324 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNBE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+13453, 349, 2281}, + /* 4 : CCMPNBE spec4,reg8,rm8 [wrm: evex.scc7.dfv.l0.m4.o8 3a /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 07) 300 001(3a) 121 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNBE, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS8,RM_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24862, 347, 2282}, + /* 5 : CCMPNBE spec4,reg16,rm16 [wrm: evex.scc7.dfv.l0.m4.o16 3b /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 07) 300 320 001(3b) 121 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNBE, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13613, 348, 2283}, + /* 6 : CCMPNBE spec4,reg32,rm32 [wrm: evex.scc7.dfv.l0.m4.o32 3b /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 07) 300 321 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNBE, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13773, 349, 2284}, + /* 7 : CCMPNBE spec4,reg64,rm64 [wrm: evex.scc7.dfv.l0.m4.o64 3b /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 07) 300 324 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNBE, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+13933, 349, 2285}, + /* 8 : CCMPNBE spec4,rm16,sbyteword16 [wmi: evex.scc7.dfv.l0.m4.o16 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 07) 300 320 001(83) 217 276 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNBE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2378, 348, 2286}, + /* 9 : CCMPNBE spec4,rm32,sbytedword32 [wmi: evex.scc7.dfv.l0.m4.o32 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 07) 300 321 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNBE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2554, 349, 2287}, + /* 10 : CCMPNBE spec4,rm64,sbytedword64 [wmi: evex.scc7.dfv.l0.m4.o64 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 07) 300 324 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNBE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2730, 349, 2288}, + /* 11 : CCMPNBE spec4,rm8,imm8 [wmi: evex.scc7.dfv.l0.m4.o8 80 /7 ib ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 07) 300 001(80) 217 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNBE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14093, 347, 2289}, + /* 12 : CCMPNBE spec4,rm16,imm16 [wmi: evex.scc7.dfv.l0.m4.o16 81 /7 iw ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 07) 300 320 001(81) 217 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNBE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+2906, 348, 2290}, + /* 13 : CCMPNBE spec4,rm32,imm32 [wmi: evex.scc7.dfv.l0.m4.o32 81 /7 id ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 07) 300 321 001(81) 217 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNBE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3082, 349, 2291}, + /* 14 : CCMPNBE spec4,rm64,sdword64 [wmi: evex.scc7.dfv.l0.m4.o64 81 /7 id,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 07) 300 324 001(81) 217 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNBE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3258, 349, 2292}, +}; + +static const struct itemplate instrux_CCMPNC[15] = { + /* 0 : CCMPNC spec4,rm8,reg8 [wmr: evex.scc3.dfv.l0.m4.o8 38 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 03) 300 001(38) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24727, 347, 2278}, + /* 1 : CCMPNC spec4,rm16,reg16 [wmr: evex.scc3.dfv.l0.m4.o16 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 03) 300 320 001(39) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13143, 348, 2279}, + /* 2 : CCMPNC spec4,rm32,reg32 [wmr: evex.scc3.dfv.l0.m4.o32 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 03) 300 321 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13303, 349, 2280}, + /* 3 : CCMPNC spec4,rm64,reg64 [wmr: evex.scc3.dfv.l0.m4.o64 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 03) 300 324 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+13463, 349, 2281}, + /* 4 : CCMPNC spec4,reg8,rm8 [wrm: evex.scc3.dfv.l0.m4.o8 3a /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 03) 300 001(3a) 121 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNC, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS8,RM_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24871, 347, 2282}, + /* 5 : CCMPNC spec4,reg16,rm16 [wrm: evex.scc3.dfv.l0.m4.o16 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 03) 300 320 001(3b) 121 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNC, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13623, 348, 2283}, + /* 6 : CCMPNC spec4,reg32,rm32 [wrm: evex.scc3.dfv.l0.m4.o32 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 03) 300 321 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNC, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13783, 349, 2284}, + /* 7 : CCMPNC spec4,reg64,rm64 [wrm: evex.scc3.dfv.l0.m4.o64 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 03) 300 324 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNC, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+13943, 349, 2285}, + /* 8 : CCMPNC spec4,rm16,sbyteword16 [wmi: evex.scc3.dfv.l0.m4.o16 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 03) 300 320 001(83) 217 276 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2389, 348, 2286}, + /* 9 : CCMPNC spec4,rm32,sbytedword32 [wmi: evex.scc3.dfv.l0.m4.o32 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 03) 300 321 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2565, 349, 2287}, + /* 10 : CCMPNC spec4,rm64,sbytedword64 [wmi: evex.scc3.dfv.l0.m4.o64 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 03) 300 324 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2741, 349, 2288}, + /* 11 : CCMPNC spec4,rm8,imm8 [wmi: evex.scc3.dfv.l0.m4.o8 80 /7 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 03) 300 001(80) 217 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14103, 347, 2289}, + /* 12 : CCMPNC spec4,rm16,imm16 [wmi: evex.scc3.dfv.l0.m4.o16 81 /7 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 03) 300 320 001(81) 217 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+2917, 348, 2290}, + /* 13 : CCMPNC spec4,rm32,imm32 [wmi: evex.scc3.dfv.l0.m4.o32 81 /7 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 03) 300 321 001(81) 217 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3093, 349, 2291}, + /* 14 : CCMPNC spec4,rm64,sdword64 [wmi: evex.scc3.dfv.l0.m4.o64 81 /7 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 03) 300 324 001(81) 217 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3269, 349, 2292}, +}; + +static const struct itemplate instrux_CCMPNE[15] = { + /* 0 : CCMPNE spec4,rm8,reg8 [wmr: evex.scc5.dfv.l0.m4.o8 38 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 05) 300 001(38) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24799, 347, 2278}, + /* 1 : CCMPNE spec4,rm16,reg16 [wmr: evex.scc5.dfv.l0.m4.o16 39 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 05) 300 320 001(39) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13223, 348, 2279}, + /* 2 : CCMPNE spec4,rm32,reg32 [wmr: evex.scc5.dfv.l0.m4.o32 39 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 05) 300 321 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13383, 349, 2280}, + /* 3 : CCMPNE spec4,rm64,reg64 [wmr: evex.scc5.dfv.l0.m4.o64 39 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 05) 300 324 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+13543, 349, 2281}, + /* 4 : CCMPNE spec4,reg8,rm8 [wrm: evex.scc5.dfv.l0.m4.o8 3a /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 05) 300 001(3a) 121 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNE, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS8,RM_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24943, 347, 2282}, + /* 5 : CCMPNE spec4,reg16,rm16 [wrm: evex.scc5.dfv.l0.m4.o16 3b /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 05) 300 320 001(3b) 121 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNE, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13703, 348, 2283}, + /* 6 : CCMPNE spec4,reg32,rm32 [wrm: evex.scc5.dfv.l0.m4.o32 3b /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 05) 300 321 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNE, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13863, 349, 2284}, + /* 7 : CCMPNE spec4,reg64,rm64 [wrm: evex.scc5.dfv.l0.m4.o64 3b /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 05) 300 324 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNE, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+14023, 349, 2285}, + /* 8 : CCMPNE spec4,rm16,sbyteword16 [wmi: evex.scc5.dfv.l0.m4.o16 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 05) 300 320 001(83) 217 276 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2477, 348, 2286}, + /* 9 : CCMPNE spec4,rm32,sbytedword32 [wmi: evex.scc5.dfv.l0.m4.o32 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 05) 300 321 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2653, 349, 2287}, + /* 10 : CCMPNE spec4,rm64,sbytedword64 [wmi: evex.scc5.dfv.l0.m4.o64 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 05) 300 324 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2829, 349, 2288}, + /* 11 : CCMPNE spec4,rm8,imm8 [wmi: evex.scc5.dfv.l0.m4.o8 80 /7 ib ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 05) 300 001(80) 217 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14183, 347, 2289}, + /* 12 : CCMPNE spec4,rm16,imm16 [wmi: evex.scc5.dfv.l0.m4.o16 81 /7 iw ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 05) 300 320 001(81) 217 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3005, 348, 2290}, + /* 13 : CCMPNE spec4,rm32,imm32 [wmi: evex.scc5.dfv.l0.m4.o32 81 /7 id ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 05) 300 321 001(81) 217 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3181, 349, 2291}, + /* 14 : CCMPNE spec4,rm64,sdword64 [wmi: evex.scc5.dfv.l0.m4.o64 81 /7 id,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 05) 300 324 001(81) 217 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3357, 349, 2292}, +}; + +static const struct itemplate instrux_CCMPNG[15] = { + /* 0 : CCMPNG spec4,rm8,reg8 [wmr: evex.scc14.dfv.l0.m4.o8 38 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0e) 300 001(38) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24790, 347, 2278}, + /* 1 : CCMPNG spec4,rm16,reg16 [wmr: evex.scc14.dfv.l0.m4.o16 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0e) 300 320 001(39) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13213, 348, 2279}, + /* 2 : CCMPNG spec4,rm32,reg32 [wmr: evex.scc14.dfv.l0.m4.o32 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0e) 300 321 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13373, 349, 2280}, + /* 3 : CCMPNG spec4,rm64,reg64 [wmr: evex.scc14.dfv.l0.m4.o64 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0e) 300 324 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+13533, 349, 2281}, + /* 4 : CCMPNG spec4,reg8,rm8 [wrm: evex.scc14.dfv.l0.m4.o8 3a /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0e) 300 001(3a) 121 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNG, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS8,RM_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24934, 347, 2282}, + /* 5 : CCMPNG spec4,reg16,rm16 [wrm: evex.scc14.dfv.l0.m4.o16 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0e) 300 320 001(3b) 121 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNG, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13693, 348, 2283}, + /* 6 : CCMPNG spec4,reg32,rm32 [wrm: evex.scc14.dfv.l0.m4.o32 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0e) 300 321 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNG, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13853, 349, 2284}, + /* 7 : CCMPNG spec4,reg64,rm64 [wrm: evex.scc14.dfv.l0.m4.o64 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0e) 300 324 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNG, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+14013, 349, 2285}, + /* 8 : CCMPNG spec4,rm16,sbyteword16 [wmi: evex.scc14.dfv.l0.m4.o16 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0e) 300 320 001(83) 217 276 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2466, 348, 2286}, + /* 9 : CCMPNG spec4,rm32,sbytedword32 [wmi: evex.scc14.dfv.l0.m4.o32 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0e) 300 321 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2642, 349, 2287}, + /* 10 : CCMPNG spec4,rm64,sbytedword64 [wmi: evex.scc14.dfv.l0.m4.o64 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0e) 300 324 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2818, 349, 2288}, + /* 11 : CCMPNG spec4,rm8,imm8 [wmi: evex.scc14.dfv.l0.m4.o8 80 /7 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0e) 300 001(80) 217 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14173, 347, 2289}, + /* 12 : CCMPNG spec4,rm16,imm16 [wmi: evex.scc14.dfv.l0.m4.o16 81 /7 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0e) 300 320 001(81) 217 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+2994, 348, 2290}, + /* 13 : CCMPNG spec4,rm32,imm32 [wmi: evex.scc14.dfv.l0.m4.o32 81 /7 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0e) 300 321 001(81) 217 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3170, 349, 2291}, + /* 14 : CCMPNG spec4,rm64,sdword64 [wmi: evex.scc14.dfv.l0.m4.o64 81 /7 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0e) 300 324 001(81) 217 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3346, 349, 2292}, +}; + +static const struct itemplate instrux_CCMPNGE[15] = { + /* 0 : CCMPNGE spec4,rm8,reg8 [wmr: evex.scc12.dfv.l0.m4.o8 38 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 0c) 300 001(38) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNGE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24781, 347, 2278}, + /* 1 : CCMPNGE spec4,rm16,reg16 [wmr: evex.scc12.dfv.l0.m4.o16 39 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 0c) 300 320 001(39) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNGE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13203, 348, 2279}, + /* 2 : CCMPNGE spec4,rm32,reg32 [wmr: evex.scc12.dfv.l0.m4.o32 39 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 0c) 300 321 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNGE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13363, 349, 2280}, + /* 3 : CCMPNGE spec4,rm64,reg64 [wmr: evex.scc12.dfv.l0.m4.o64 39 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 0c) 300 324 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNGE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+13523, 349, 2281}, + /* 4 : CCMPNGE spec4,reg8,rm8 [wrm: evex.scc12.dfv.l0.m4.o8 3a /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 0c) 300 001(3a) 121 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNGE, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS8,RM_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24925, 347, 2282}, + /* 5 : CCMPNGE spec4,reg16,rm16 [wrm: evex.scc12.dfv.l0.m4.o16 3b /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 0c) 300 320 001(3b) 121 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNGE, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13683, 348, 2283}, + /* 6 : CCMPNGE spec4,reg32,rm32 [wrm: evex.scc12.dfv.l0.m4.o32 3b /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 0c) 300 321 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNGE, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13843, 349, 2284}, + /* 7 : CCMPNGE spec4,reg64,rm64 [wrm: evex.scc12.dfv.l0.m4.o64 3b /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 0c) 300 324 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNGE, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+14003, 349, 2285}, + /* 8 : CCMPNGE spec4,rm16,sbyteword16 [wmi: evex.scc12.dfv.l0.m4.o16 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 0c) 300 320 001(83) 217 276 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNGE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2455, 348, 2286}, + /* 9 : CCMPNGE spec4,rm32,sbytedword32 [wmi: evex.scc12.dfv.l0.m4.o32 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 0c) 300 321 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNGE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2631, 349, 2287}, + /* 10 : CCMPNGE spec4,rm64,sbytedword64 [wmi: evex.scc12.dfv.l0.m4.o64 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 0c) 300 324 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNGE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2807, 349, 2288}, + /* 11 : CCMPNGE spec4,rm8,imm8 [wmi: evex.scc12.dfv.l0.m4.o8 80 /7 ib ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 0c) 300 001(80) 217 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNGE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14163, 347, 2289}, + /* 12 : CCMPNGE spec4,rm16,imm16 [wmi: evex.scc12.dfv.l0.m4.o16 81 /7 iw ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 0c) 300 320 001(81) 217 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNGE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+2983, 348, 2290}, + /* 13 : CCMPNGE spec4,rm32,imm32 [wmi: evex.scc12.dfv.l0.m4.o32 81 /7 id ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 0c) 300 321 001(81) 217 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNGE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3159, 349, 2291}, + /* 14 : CCMPNGE spec4,rm64,sdword64 [wmi: evex.scc12.dfv.l0.m4.o64 81 /7 id,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 0c) 300 324 001(81) 217 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNGE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3335, 349, 2292}, +}; + +static const struct itemplate instrux_CCMPNL[15] = { + /* 0 : CCMPNL spec4,rm8,reg8 [wmr: evex.scc13.dfv.l0.m4.o8 38 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0d) 300 001(38) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24772, 347, 2278}, + /* 1 : CCMPNL spec4,rm16,reg16 [wmr: evex.scc13.dfv.l0.m4.o16 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0d) 300 320 001(39) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13193, 348, 2279}, + /* 2 : CCMPNL spec4,rm32,reg32 [wmr: evex.scc13.dfv.l0.m4.o32 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0d) 300 321 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13353, 349, 2280}, + /* 3 : CCMPNL spec4,rm64,reg64 [wmr: evex.scc13.dfv.l0.m4.o64 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0d) 300 324 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+13513, 349, 2281}, + /* 4 : CCMPNL spec4,reg8,rm8 [wrm: evex.scc13.dfv.l0.m4.o8 3a /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0d) 300 001(3a) 121 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNL, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS8,RM_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24916, 347, 2282}, + /* 5 : CCMPNL spec4,reg16,rm16 [wrm: evex.scc13.dfv.l0.m4.o16 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0d) 300 320 001(3b) 121 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNL, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13673, 348, 2283}, + /* 6 : CCMPNL spec4,reg32,rm32 [wrm: evex.scc13.dfv.l0.m4.o32 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0d) 300 321 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNL, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13833, 349, 2284}, + /* 7 : CCMPNL spec4,reg64,rm64 [wrm: evex.scc13.dfv.l0.m4.o64 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0d) 300 324 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNL, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+13993, 349, 2285}, + /* 8 : CCMPNL spec4,rm16,sbyteword16 [wmi: evex.scc13.dfv.l0.m4.o16 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0d) 300 320 001(83) 217 276 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2444, 348, 2286}, + /* 9 : CCMPNL spec4,rm32,sbytedword32 [wmi: evex.scc13.dfv.l0.m4.o32 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0d) 300 321 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2620, 349, 2287}, + /* 10 : CCMPNL spec4,rm64,sbytedword64 [wmi: evex.scc13.dfv.l0.m4.o64 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0d) 300 324 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2796, 349, 2288}, + /* 11 : CCMPNL spec4,rm8,imm8 [wmi: evex.scc13.dfv.l0.m4.o8 80 /7 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0d) 300 001(80) 217 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14153, 347, 2289}, + /* 12 : CCMPNL spec4,rm16,imm16 [wmi: evex.scc13.dfv.l0.m4.o16 81 /7 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0d) 300 320 001(81) 217 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+2972, 348, 2290}, + /* 13 : CCMPNL spec4,rm32,imm32 [wmi: evex.scc13.dfv.l0.m4.o32 81 /7 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0d) 300 321 001(81) 217 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3148, 349, 2291}, + /* 14 : CCMPNL spec4,rm64,sdword64 [wmi: evex.scc13.dfv.l0.m4.o64 81 /7 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0d) 300 324 001(81) 217 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3324, 349, 2292}, +}; + +static const struct itemplate instrux_CCMPNLE[15] = { + /* 0 : CCMPNLE spec4,rm8,reg8 [wmr: evex.scc15.dfv.l0.m4.o8 38 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 0f) 300 001(38) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNLE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24763, 347, 2278}, + /* 1 : CCMPNLE spec4,rm16,reg16 [wmr: evex.scc15.dfv.l0.m4.o16 39 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 0f) 300 320 001(39) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNLE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13183, 348, 2279}, + /* 2 : CCMPNLE spec4,rm32,reg32 [wmr: evex.scc15.dfv.l0.m4.o32 39 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 0f) 300 321 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNLE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13343, 349, 2280}, + /* 3 : CCMPNLE spec4,rm64,reg64 [wmr: evex.scc15.dfv.l0.m4.o64 39 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 0f) 300 324 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNLE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+13503, 349, 2281}, + /* 4 : CCMPNLE spec4,reg8,rm8 [wrm: evex.scc15.dfv.l0.m4.o8 3a /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 0f) 300 001(3a) 121 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNLE, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS8,RM_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24907, 347, 2282}, + /* 5 : CCMPNLE spec4,reg16,rm16 [wrm: evex.scc15.dfv.l0.m4.o16 3b /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 0f) 300 320 001(3b) 121 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNLE, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13663, 348, 2283}, + /* 6 : CCMPNLE spec4,reg32,rm32 [wrm: evex.scc15.dfv.l0.m4.o32 3b /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 0f) 300 321 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNLE, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13823, 349, 2284}, + /* 7 : CCMPNLE spec4,reg64,rm64 [wrm: evex.scc15.dfv.l0.m4.o64 3b /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 0f) 300 324 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNLE, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+13983, 349, 2285}, + /* 8 : CCMPNLE spec4,rm16,sbyteword16 [wmi: evex.scc15.dfv.l0.m4.o16 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 0f) 300 320 001(83) 217 276 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNLE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2433, 348, 2286}, + /* 9 : CCMPNLE spec4,rm32,sbytedword32 [wmi: evex.scc15.dfv.l0.m4.o32 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 0f) 300 321 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNLE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2609, 349, 2287}, + /* 10 : CCMPNLE spec4,rm64,sbytedword64 [wmi: evex.scc15.dfv.l0.m4.o64 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 0f) 300 324 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNLE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2785, 349, 2288}, + /* 11 : CCMPNLE spec4,rm8,imm8 [wmi: evex.scc15.dfv.l0.m4.o8 80 /7 ib ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 0f) 300 001(80) 217 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNLE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14143, 347, 2289}, + /* 12 : CCMPNLE spec4,rm16,imm16 [wmi: evex.scc15.dfv.l0.m4.o16 81 /7 iw ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 0f) 300 320 001(81) 217 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNLE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+2961, 348, 2290}, + /* 13 : CCMPNLE spec4,rm32,imm32 [wmi: evex.scc15.dfv.l0.m4.o32 81 /7 id ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 0f) 300 321 001(81) 217 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNLE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3137, 349, 2291}, + /* 14 : CCMPNLE spec4,rm64,sdword64 [wmi: evex.scc15.dfv.l0.m4.o64 81 /7 id,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 0f) 300 324 001(81) 217 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNLE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3313, 349, 2292}, +}; + +static const struct itemplate instrux_CCMPNO[15] = { + /* 0 : CCMPNO spec4,rm8,reg8 [wmr: evex.scc1.dfv.l0.m4.o8 38 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 01) 300 001(38) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24808, 347, 2278}, + /* 1 : CCMPNO spec4,rm16,reg16 [wmr: evex.scc1.dfv.l0.m4.o16 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 01) 300 320 001(39) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13233, 348, 2279}, + /* 2 : CCMPNO spec4,rm32,reg32 [wmr: evex.scc1.dfv.l0.m4.o32 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 01) 300 321 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13393, 349, 2280}, + /* 3 : CCMPNO spec4,rm64,reg64 [wmr: evex.scc1.dfv.l0.m4.o64 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 01) 300 324 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+13553, 349, 2281}, + /* 4 : CCMPNO spec4,reg8,rm8 [wrm: evex.scc1.dfv.l0.m4.o8 3a /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 01) 300 001(3a) 121 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNO, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS8,RM_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24952, 347, 2282}, + /* 5 : CCMPNO spec4,reg16,rm16 [wrm: evex.scc1.dfv.l0.m4.o16 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 01) 300 320 001(3b) 121 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNO, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13713, 348, 2283}, + /* 6 : CCMPNO spec4,reg32,rm32 [wrm: evex.scc1.dfv.l0.m4.o32 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 01) 300 321 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNO, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13873, 349, 2284}, + /* 7 : CCMPNO spec4,reg64,rm64 [wrm: evex.scc1.dfv.l0.m4.o64 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 01) 300 324 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNO, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+14033, 349, 2285}, + /* 8 : CCMPNO spec4,rm16,sbyteword16 [wmi: evex.scc1.dfv.l0.m4.o16 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 01) 300 320 001(83) 217 276 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2488, 348, 2286}, + /* 9 : CCMPNO spec4,rm32,sbytedword32 [wmi: evex.scc1.dfv.l0.m4.o32 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 01) 300 321 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2664, 349, 2287}, + /* 10 : CCMPNO spec4,rm64,sbytedword64 [wmi: evex.scc1.dfv.l0.m4.o64 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 01) 300 324 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2840, 349, 2288}, + /* 11 : CCMPNO spec4,rm8,imm8 [wmi: evex.scc1.dfv.l0.m4.o8 80 /7 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 01) 300 001(80) 217 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14193, 347, 2289}, + /* 12 : CCMPNO spec4,rm16,imm16 [wmi: evex.scc1.dfv.l0.m4.o16 81 /7 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 01) 300 320 001(81) 217 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3016, 348, 2290}, + /* 13 : CCMPNO spec4,rm32,imm32 [wmi: evex.scc1.dfv.l0.m4.o32 81 /7 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 01) 300 321 001(81) 217 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3192, 349, 2291}, + /* 14 : CCMPNO spec4,rm64,sdword64 [wmi: evex.scc1.dfv.l0.m4.o64 81 /7 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 01) 300 324 001(81) 217 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3368, 349, 2292}, +}; + +static const struct itemplate instrux_CCMPNS[15] = { + /* 0 : CCMPNS spec4,rm8,reg8 [wmr: evex.scc9.dfv.l0.m4.o8 38 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 09) 300 001(38) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24817, 347, 2278}, + /* 1 : CCMPNS spec4,rm16,reg16 [wmr: evex.scc9.dfv.l0.m4.o16 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 09) 300 320 001(39) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13243, 348, 2279}, + /* 2 : CCMPNS spec4,rm32,reg32 [wmr: evex.scc9.dfv.l0.m4.o32 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 09) 300 321 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13403, 349, 2280}, + /* 3 : CCMPNS spec4,rm64,reg64 [wmr: evex.scc9.dfv.l0.m4.o64 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 09) 300 324 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+13563, 349, 2281}, + /* 4 : CCMPNS spec4,reg8,rm8 [wrm: evex.scc9.dfv.l0.m4.o8 3a /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 09) 300 001(3a) 121 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNS, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS8,RM_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24961, 347, 2282}, + /* 5 : CCMPNS spec4,reg16,rm16 [wrm: evex.scc9.dfv.l0.m4.o16 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 09) 300 320 001(3b) 121 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNS, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13723, 348, 2283}, + /* 6 : CCMPNS spec4,reg32,rm32 [wrm: evex.scc9.dfv.l0.m4.o32 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 09) 300 321 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNS, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13883, 349, 2284}, + /* 7 : CCMPNS spec4,reg64,rm64 [wrm: evex.scc9.dfv.l0.m4.o64 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 09) 300 324 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNS, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+14043, 349, 2285}, + /* 8 : CCMPNS spec4,rm16,sbyteword16 [wmi: evex.scc9.dfv.l0.m4.o16 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 09) 300 320 001(83) 217 276 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2499, 348, 2286}, + /* 9 : CCMPNS spec4,rm32,sbytedword32 [wmi: evex.scc9.dfv.l0.m4.o32 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 09) 300 321 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2675, 349, 2287}, + /* 10 : CCMPNS spec4,rm64,sbytedword64 [wmi: evex.scc9.dfv.l0.m4.o64 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 09) 300 324 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2851, 349, 2288}, + /* 11 : CCMPNS spec4,rm8,imm8 [wmi: evex.scc9.dfv.l0.m4.o8 80 /7 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 09) 300 001(80) 217 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14203, 347, 2289}, + /* 12 : CCMPNS spec4,rm16,imm16 [wmi: evex.scc9.dfv.l0.m4.o16 81 /7 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 09) 300 320 001(81) 217 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3027, 348, 2290}, + /* 13 : CCMPNS spec4,rm32,imm32 [wmi: evex.scc9.dfv.l0.m4.o32 81 /7 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 09) 300 321 001(81) 217 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3203, 349, 2291}, + /* 14 : CCMPNS spec4,rm64,sdword64 [wmi: evex.scc9.dfv.l0.m4.o64 81 /7 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 09) 300 324 001(81) 217 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3379, 349, 2292}, +}; + +static const struct itemplate instrux_CCMPNZ[15] = { + /* 0 : CCMPNZ spec4,rm8,reg8 [wmr: evex.scc5.dfv.l0.m4.o8 38 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 05) 300 001(38) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24799, 347, 2278}, + /* 1 : CCMPNZ spec4,rm16,reg16 [wmr: evex.scc5.dfv.l0.m4.o16 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 05) 300 320 001(39) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13223, 348, 2279}, + /* 2 : CCMPNZ spec4,rm32,reg32 [wmr: evex.scc5.dfv.l0.m4.o32 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 05) 300 321 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13383, 349, 2280}, + /* 3 : CCMPNZ spec4,rm64,reg64 [wmr: evex.scc5.dfv.l0.m4.o64 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 05) 300 324 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+13543, 349, 2281}, + /* 4 : CCMPNZ spec4,reg8,rm8 [wrm: evex.scc5.dfv.l0.m4.o8 3a /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 05) 300 001(3a) 121 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNZ, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS8,RM_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24943, 347, 2282}, + /* 5 : CCMPNZ spec4,reg16,rm16 [wrm: evex.scc5.dfv.l0.m4.o16 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 05) 300 320 001(3b) 121 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNZ, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13703, 348, 2283}, + /* 6 : CCMPNZ spec4,reg32,rm32 [wrm: evex.scc5.dfv.l0.m4.o32 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 05) 300 321 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNZ, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13863, 349, 2284}, + /* 7 : CCMPNZ spec4,reg64,rm64 [wrm: evex.scc5.dfv.l0.m4.o64 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 05) 300 324 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNZ, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+14023, 349, 2285}, + /* 8 : CCMPNZ spec4,rm16,sbyteword16 [wmi: evex.scc5.dfv.l0.m4.o16 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 05) 300 320 001(83) 217 276 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2477, 348, 2286}, + /* 9 : CCMPNZ spec4,rm32,sbytedword32 [wmi: evex.scc5.dfv.l0.m4.o32 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 05) 300 321 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2653, 349, 2287}, + /* 10 : CCMPNZ spec4,rm64,sbytedword64 [wmi: evex.scc5.dfv.l0.m4.o64 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 05) 300 324 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2829, 349, 2288}, + /* 11 : CCMPNZ spec4,rm8,imm8 [wmi: evex.scc5.dfv.l0.m4.o8 80 /7 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 05) 300 001(80) 217 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14183, 347, 2289}, + /* 12 : CCMPNZ spec4,rm16,imm16 [wmi: evex.scc5.dfv.l0.m4.o16 81 /7 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 05) 300 320 001(81) 217 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3005, 348, 2290}, + /* 13 : CCMPNZ spec4,rm32,imm32 [wmi: evex.scc5.dfv.l0.m4.o32 81 /7 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 05) 300 321 001(81) 217 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3181, 349, 2291}, + /* 14 : CCMPNZ spec4,rm64,sdword64 [wmi: evex.scc5.dfv.l0.m4.o64 81 /7 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 05) 300 324 001(81) 217 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3357, 349, 2292}, +}; + +static const struct itemplate instrux_CCMPO[15] = { + /* 0 : CCMPO spec4,rm8,reg8 [wmr: evex.scc0.dfv.l0.m4.o8 38 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 00) 300 001(38) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24826, 347, 2278}, + /* 1 : CCMPO spec4,rm16,reg16 [wmr: evex.scc0.dfv.l0.m4.o16 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 00) 300 320 001(39) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13253, 348, 2279}, + /* 2 : CCMPO spec4,rm32,reg32 [wmr: evex.scc0.dfv.l0.m4.o32 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 00) 300 321 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13413, 349, 2280}, + /* 3 : CCMPO spec4,rm64,reg64 [wmr: evex.scc0.dfv.l0.m4.o64 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 00) 300 324 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+13573, 349, 2281}, + /* 4 : CCMPO spec4,reg8,rm8 [wrm: evex.scc0.dfv.l0.m4.o8 3a /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 00) 300 001(3a) 121 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPO, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS8,RM_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24970, 347, 2282}, + /* 5 : CCMPO spec4,reg16,rm16 [wrm: evex.scc0.dfv.l0.m4.o16 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 00) 300 320 001(3b) 121 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPO, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13733, 348, 2283}, + /* 6 : CCMPO spec4,reg32,rm32 [wrm: evex.scc0.dfv.l0.m4.o32 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 00) 300 321 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPO, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13893, 349, 2284}, + /* 7 : CCMPO spec4,reg64,rm64 [wrm: evex.scc0.dfv.l0.m4.o64 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 00) 300 324 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPO, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+14053, 349, 2285}, + /* 8 : CCMPO spec4,rm16,sbyteword16 [wmi: evex.scc0.dfv.l0.m4.o16 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 00) 300 320 001(83) 217 276 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2510, 348, 2286}, + /* 9 : CCMPO spec4,rm32,sbytedword32 [wmi: evex.scc0.dfv.l0.m4.o32 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 00) 300 321 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2686, 349, 2287}, + /* 10 : CCMPO spec4,rm64,sbytedword64 [wmi: evex.scc0.dfv.l0.m4.o64 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 00) 300 324 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2862, 349, 2288}, + /* 11 : CCMPO spec4,rm8,imm8 [wmi: evex.scc0.dfv.l0.m4.o8 80 /7 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 00) 300 001(80) 217 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14213, 347, 2289}, + /* 12 : CCMPO spec4,rm16,imm16 [wmi: evex.scc0.dfv.l0.m4.o16 81 /7 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 00) 300 320 001(81) 217 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3038, 348, 2290}, + /* 13 : CCMPO spec4,rm32,imm32 [wmi: evex.scc0.dfv.l0.m4.o32 81 /7 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 00) 300 321 001(81) 217 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3214, 349, 2291}, + /* 14 : CCMPO spec4,rm64,sdword64 [wmi: evex.scc0.dfv.l0.m4.o64 81 /7 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 00) 300 324 001(81) 217 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3390, 349, 2292}, +}; + +static const struct itemplate instrux_CCMPS[15] = { + /* 0 : CCMPS spec4,rm8,reg8 [wmr: evex.scc8.dfv.l0.m4.o8 38 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 08) 300 001(38) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24835, 347, 2278}, + /* 1 : CCMPS spec4,rm16,reg16 [wmr: evex.scc8.dfv.l0.m4.o16 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 08) 300 320 001(39) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13263, 348, 2279}, + /* 2 : CCMPS spec4,rm32,reg32 [wmr: evex.scc8.dfv.l0.m4.o32 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 08) 300 321 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13423, 349, 2280}, + /* 3 : CCMPS spec4,rm64,reg64 [wmr: evex.scc8.dfv.l0.m4.o64 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 08) 300 324 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+13583, 349, 2281}, + /* 4 : CCMPS spec4,reg8,rm8 [wrm: evex.scc8.dfv.l0.m4.o8 3a /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 08) 300 001(3a) 121 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPS, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS8,RM_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24979, 347, 2282}, + /* 5 : CCMPS spec4,reg16,rm16 [wrm: evex.scc8.dfv.l0.m4.o16 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 08) 300 320 001(3b) 121 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPS, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13743, 348, 2283}, + /* 6 : CCMPS spec4,reg32,rm32 [wrm: evex.scc8.dfv.l0.m4.o32 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 08) 300 321 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPS, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13903, 349, 2284}, + /* 7 : CCMPS spec4,reg64,rm64 [wrm: evex.scc8.dfv.l0.m4.o64 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 08) 300 324 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPS, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+14063, 349, 2285}, + /* 8 : CCMPS spec4,rm16,sbyteword16 [wmi: evex.scc8.dfv.l0.m4.o16 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 08) 300 320 001(83) 217 276 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2521, 348, 2286}, + /* 9 : CCMPS spec4,rm32,sbytedword32 [wmi: evex.scc8.dfv.l0.m4.o32 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 08) 300 321 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2697, 349, 2287}, + /* 10 : CCMPS spec4,rm64,sbytedword64 [wmi: evex.scc8.dfv.l0.m4.o64 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 08) 300 324 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2873, 349, 2288}, + /* 11 : CCMPS spec4,rm8,imm8 [wmi: evex.scc8.dfv.l0.m4.o8 80 /7 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 08) 300 001(80) 217 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14223, 347, 2289}, + /* 12 : CCMPS spec4,rm16,imm16 [wmi: evex.scc8.dfv.l0.m4.o16 81 /7 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 08) 300 320 001(81) 217 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3049, 348, 2290}, + /* 13 : CCMPS spec4,rm32,imm32 [wmi: evex.scc8.dfv.l0.m4.o32 81 /7 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 08) 300 321 001(81) 217 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3225, 349, 2291}, + /* 14 : CCMPS spec4,rm64,sdword64 [wmi: evex.scc8.dfv.l0.m4.o64 81 /7 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 08) 300 324 001(81) 217 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3401, 349, 2292}, +}; + +static const struct itemplate instrux_CCMPT[15] = { + /* 0 : CCMPT spec4,rm8,reg8 [wmr: evex.scc10.dfv.l0.m4.o8 38 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0a) 300 001(38) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPT, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24844, 347, 2278}, + /* 1 : CCMPT spec4,rm16,reg16 [wmr: evex.scc10.dfv.l0.m4.o16 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0a) 300 320 001(39) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPT, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13273, 348, 2279}, + /* 2 : CCMPT spec4,rm32,reg32 [wmr: evex.scc10.dfv.l0.m4.o32 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0a) 300 321 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPT, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13433, 349, 2280}, + /* 3 : CCMPT spec4,rm64,reg64 [wmr: evex.scc10.dfv.l0.m4.o64 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0a) 300 324 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPT, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+13593, 349, 2281}, + /* 4 : CCMPT spec4,reg8,rm8 [wrm: evex.scc10.dfv.l0.m4.o8 3a /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0a) 300 001(3a) 121 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPT, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS8,RM_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24988, 347, 2282}, + /* 5 : CCMPT spec4,reg16,rm16 [wrm: evex.scc10.dfv.l0.m4.o16 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0a) 300 320 001(3b) 121 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPT, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13753, 348, 2283}, + /* 6 : CCMPT spec4,reg32,rm32 [wrm: evex.scc10.dfv.l0.m4.o32 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0a) 300 321 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPT, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13913, 349, 2284}, + /* 7 : CCMPT spec4,reg64,rm64 [wrm: evex.scc10.dfv.l0.m4.o64 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0a) 300 324 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPT, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+14073, 349, 2285}, + /* 8 : CCMPT spec4,rm16,sbyteword16 [wmi: evex.scc10.dfv.l0.m4.o16 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0a) 300 320 001(83) 217 276 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPT, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2532, 348, 2286}, + /* 9 : CCMPT spec4,rm32,sbytedword32 [wmi: evex.scc10.dfv.l0.m4.o32 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0a) 300 321 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPT, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2708, 349, 2287}, + /* 10 : CCMPT spec4,rm64,sbytedword64 [wmi: evex.scc10.dfv.l0.m4.o64 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0a) 300 324 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPT, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2884, 349, 2288}, + /* 11 : CCMPT spec4,rm8,imm8 [wmi: evex.scc10.dfv.l0.m4.o8 80 /7 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0a) 300 001(80) 217 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPT, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14233, 347, 2289}, + /* 12 : CCMPT spec4,rm16,imm16 [wmi: evex.scc10.dfv.l0.m4.o16 81 /7 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0a) 300 320 001(81) 217 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPT, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3060, 348, 2290}, + /* 13 : CCMPT spec4,rm32,imm32 [wmi: evex.scc10.dfv.l0.m4.o32 81 /7 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0a) 300 321 001(81) 217 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPT, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3236, 349, 2291}, + /* 14 : CCMPT spec4,rm64,sdword64 [wmi: evex.scc10.dfv.l0.m4.o64 81 /7 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0a) 300 324 001(81) 217 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPT, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3412, 349, 2292}, +}; + +static const struct itemplate instrux_CCMPZ[15] = { + /* 0 : CCMPZ spec4,rm8,reg8 [wmr: evex.scc4.dfv.l0.m4.o8 38 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 04) 300 001(38) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24754, 347, 2278}, + /* 1 : CCMPZ spec4,rm16,reg16 [wmr: evex.scc4.dfv.l0.m4.o16 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 04) 300 320 001(39) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13173, 348, 2279}, + /* 2 : CCMPZ spec4,rm32,reg32 [wmr: evex.scc4.dfv.l0.m4.o32 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 04) 300 321 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13333, 349, 2280}, + /* 3 : CCMPZ spec4,rm64,reg64 [wmr: evex.scc4.dfv.l0.m4.o64 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 04) 300 324 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+13493, 349, 2281}, + /* 4 : CCMPZ spec4,reg8,rm8 [wrm: evex.scc4.dfv.l0.m4.o8 3a /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 04) 300 001(3a) 121 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPZ, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS8,RM_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24898, 347, 2282}, + /* 5 : CCMPZ spec4,reg16,rm16 [wrm: evex.scc4.dfv.l0.m4.o16 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 04) 300 320 001(3b) 121 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPZ, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13653, 348, 2283}, + /* 6 : CCMPZ spec4,reg32,rm32 [wrm: evex.scc4.dfv.l0.m4.o32 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 04) 300 321 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPZ, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13813, 349, 2284}, + /* 7 : CCMPZ spec4,reg64,rm64 [wrm: evex.scc4.dfv.l0.m4.o64 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 04) 300 324 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPZ, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+13973, 349, 2285}, + /* 8 : CCMPZ spec4,rm16,sbyteword16 [wmi: evex.scc4.dfv.l0.m4.o16 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 04) 300 320 001(83) 217 276 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2422, 348, 2286}, + /* 9 : CCMPZ spec4,rm32,sbytedword32 [wmi: evex.scc4.dfv.l0.m4.o32 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 04) 300 321 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2598, 349, 2287}, + /* 10 : CCMPZ spec4,rm64,sbytedword64 [wmi: evex.scc4.dfv.l0.m4.o64 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 04) 300 324 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2774, 349, 2288}, + /* 11 : CCMPZ spec4,rm8,imm8 [wmi: evex.scc4.dfv.l0.m4.o8 80 /7 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 04) 300 001(80) 217 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14133, 347, 2289}, + /* 12 : CCMPZ spec4,rm16,imm16 [wmi: evex.scc4.dfv.l0.m4.o16 81 /7 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 04) 300 320 001(81) 217 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+2950, 348, 2290}, + /* 13 : CCMPZ spec4,rm32,imm32 [wmi: evex.scc4.dfv.l0.m4.o32 81 /7 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 04) 300 321 001(81) 217 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3126, 349, 2291}, + /* 14 : CCMPZ spec4,rm64,sdword64 [wmi: evex.scc4.dfv.l0.m4.o64 81 /7 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 04) 300 324 001(81) 217 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3302, 349, 2292}, +}; + +static const struct itemplate instrux_CTEST[12] = { + /* 0 : CTEST spec4,rm8,reg8 [wmr: evex.scc11.dfv.l0.m4.o8 84 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 0b) 300 001(84) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTEST, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24997, 347, 2294}, + /* 1 : CTEST spec4,rm16,reg16 [wmr: evex.scc11.dfv.l0.m4.o16 85 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 0b) 300 320 001(85) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTEST, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+14243, 348, 2295}, + /* 2 : CTEST spec4,rm32,reg32 [wmr: evex.scc11.dfv.l0.m4.o32 85 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 0b) 300 321 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTEST, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+14403, 349, 2296}, + /* 3 : CTEST spec4,rm64,reg64 [wmr: evex.scc11.dfv.l0.m4.o64 85 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 0b) 300 324 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTEST, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+14563, 349, 2297}, + /* 4 : CTEST spec4,rm8,imm8 [wmi: evex.scc11.dfv.l0.m4.o8 f6 /0 ib ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 0b) 300 001(f6) 210 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTEST, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14723, 347, 2298}, + /* 5 : CTEST spec4,rm16,imm16 [wmi: evex.scc11.dfv.l0.m4.o16 f7 /0 iw ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 0b) 300 320 001(f7) 210 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTEST, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3423, 348, 2299}, + /* 6 : CTEST spec4,rm32,imm32 [wmi: evex.scc11.dfv.l0.m4.o32 f7 /0 id ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 0b) 300 321 001(f7) 210 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTEST, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3599, 349, 2300}, + /* 7 : CTEST spec4,rm64,sdword64 [wmi: evex.scc11.dfv.l0.m4.o64 f7 /0 id,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 0b) 300 324 001(f7) 210 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTEST, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3775, 349, 2301}, + /* 8 : CTEST spec4,rm8,imm8 [wmi: evex.scc11.dfv.l0.m4.o8 f6 /1 ib ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 0b) 300 001(f6) 211 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTEST, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14883, 347, 2302}, + /* 9 : CTEST spec4,rm16,imm16 [wmi: evex.scc11.dfv.l0.m4.o16 f7 /1 iw ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 0b) 300 320 001(f7) 211 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTEST, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3951, 348, 2303}, + /* 10 : CTEST spec4,rm32,imm32 [wmi: evex.scc11.dfv.l0.m4.o32 f7 /1 id ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 0b) 300 321 001(f7) 211 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTEST, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+4127, 349, 2304}, + /* 11 : CTEST spec4,rm64,sdword64 [wmi: evex.scc11.dfv.l0.m4.o64 f7 /1 id,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 0b) 300 324 001(f7) 211 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTEST, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+4303, 349, 2305}, +}; + +static const struct itemplate instrux_CTESTA[12] = { + /* 0 : CTESTA spec4,rm8,reg8 [wmr: evex.scc7.dfv.l0.m4.o8 84 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 07) 300 001(84) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+25006, 347, 2294}, + /* 1 : CTESTA spec4,rm16,reg16 [wmr: evex.scc7.dfv.l0.m4.o16 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 07) 300 320 001(85) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+14253, 348, 2295}, + /* 2 : CTESTA spec4,rm32,reg32 [wmr: evex.scc7.dfv.l0.m4.o32 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 07) 300 321 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+14413, 349, 2296}, + /* 3 : CTESTA spec4,rm64,reg64 [wmr: evex.scc7.dfv.l0.m4.o64 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 07) 300 324 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+14573, 349, 2297}, + /* 4 : CTESTA spec4,rm8,imm8 [wmi: evex.scc7.dfv.l0.m4.o8 f6 /0 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 07) 300 001(f6) 210 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14733, 347, 2298}, + /* 5 : CTESTA spec4,rm16,imm16 [wmi: evex.scc7.dfv.l0.m4.o16 f7 /0 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 07) 300 320 001(f7) 210 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3434, 348, 2299}, + /* 6 : CTESTA spec4,rm32,imm32 [wmi: evex.scc7.dfv.l0.m4.o32 f7 /0 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 07) 300 321 001(f7) 210 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3610, 349, 2300}, + /* 7 : CTESTA spec4,rm64,sdword64 [wmi: evex.scc7.dfv.l0.m4.o64 f7 /0 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 07) 300 324 001(f7) 210 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3786, 349, 2301}, + /* 8 : CTESTA spec4,rm8,imm8 [wmi: evex.scc7.dfv.l0.m4.o8 f6 /1 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 07) 300 001(f6) 211 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14893, 347, 2302}, + /* 9 : CTESTA spec4,rm16,imm16 [wmi: evex.scc7.dfv.l0.m4.o16 f7 /1 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 07) 300 320 001(f7) 211 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3962, 348, 2303}, + /* 10 : CTESTA spec4,rm32,imm32 [wmi: evex.scc7.dfv.l0.m4.o32 f7 /1 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 07) 300 321 001(f7) 211 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+4138, 349, 2304}, + /* 11 : CTESTA spec4,rm64,sdword64 [wmi: evex.scc7.dfv.l0.m4.o64 f7 /1 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 07) 300 324 001(f7) 211 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+4314, 349, 2305}, +}; + +static const struct itemplate instrux_CTESTAE[12] = { + /* 0 : CTESTAE spec4,rm8,reg8 [wmr: evex.scc3.dfv.l0.m4.o8 84 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 03) 300 001(84) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTAE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+25015, 347, 2294}, + /* 1 : CTESTAE spec4,rm16,reg16 [wmr: evex.scc3.dfv.l0.m4.o16 85 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 03) 300 320 001(85) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTAE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+14263, 348, 2295}, + /* 2 : CTESTAE spec4,rm32,reg32 [wmr: evex.scc3.dfv.l0.m4.o32 85 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 03) 300 321 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTAE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+14423, 349, 2296}, + /* 3 : CTESTAE spec4,rm64,reg64 [wmr: evex.scc3.dfv.l0.m4.o64 85 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 03) 300 324 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTAE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+14583, 349, 2297}, + /* 4 : CTESTAE spec4,rm8,imm8 [wmi: evex.scc3.dfv.l0.m4.o8 f6 /0 ib ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 03) 300 001(f6) 210 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTAE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14743, 347, 2298}, + /* 5 : CTESTAE spec4,rm16,imm16 [wmi: evex.scc3.dfv.l0.m4.o16 f7 /0 iw ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 03) 300 320 001(f7) 210 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTAE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3445, 348, 2299}, + /* 6 : CTESTAE spec4,rm32,imm32 [wmi: evex.scc3.dfv.l0.m4.o32 f7 /0 id ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 03) 300 321 001(f7) 210 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTAE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3621, 349, 2300}, + /* 7 : CTESTAE spec4,rm64,sdword64 [wmi: evex.scc3.dfv.l0.m4.o64 f7 /0 id,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 03) 300 324 001(f7) 210 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTAE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3797, 349, 2301}, + /* 8 : CTESTAE spec4,rm8,imm8 [wmi: evex.scc3.dfv.l0.m4.o8 f6 /1 ib ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 03) 300 001(f6) 211 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTAE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14903, 347, 2302}, + /* 9 : CTESTAE spec4,rm16,imm16 [wmi: evex.scc3.dfv.l0.m4.o16 f7 /1 iw ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 03) 300 320 001(f7) 211 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTAE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3973, 348, 2303}, + /* 10 : CTESTAE spec4,rm32,imm32 [wmi: evex.scc3.dfv.l0.m4.o32 f7 /1 id ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 03) 300 321 001(f7) 211 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTAE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+4149, 349, 2304}, + /* 11 : CTESTAE spec4,rm64,sdword64 [wmi: evex.scc3.dfv.l0.m4.o64 f7 /1 id,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 03) 300 324 001(f7) 211 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTAE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+4325, 349, 2305}, +}; + +static const struct itemplate instrux_CTESTB[12] = { + /* 0 : CTESTB spec4,rm8,reg8 [wmr: evex.scc2.dfv.l0.m4.o8 84 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 02) 300 001(84) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTB, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+25024, 347, 2294}, + /* 1 : CTESTB spec4,rm16,reg16 [wmr: evex.scc2.dfv.l0.m4.o16 85 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 02) 300 320 001(85) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTB, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+14273, 348, 2295}, + /* 2 : CTESTB spec4,rm32,reg32 [wmr: evex.scc2.dfv.l0.m4.o32 85 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 02) 300 321 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTB, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+14433, 349, 2296}, + /* 3 : CTESTB spec4,rm64,reg64 [wmr: evex.scc2.dfv.l0.m4.o64 85 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 02) 300 324 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTB, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+14593, 349, 2297}, + /* 4 : CTESTB spec4,rm8,imm8 [wmi: evex.scc2.dfv.l0.m4.o8 f6 /0 ib ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 02) 300 001(f6) 210 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTB, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14753, 347, 2298}, + /* 5 : CTESTB spec4,rm16,imm16 [wmi: evex.scc2.dfv.l0.m4.o16 f7 /0 iw ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 02) 300 320 001(f7) 210 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTB, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3456, 348, 2299}, + /* 6 : CTESTB spec4,rm32,imm32 [wmi: evex.scc2.dfv.l0.m4.o32 f7 /0 id ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 02) 300 321 001(f7) 210 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTB, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3632, 349, 2300}, + /* 7 : CTESTB spec4,rm64,sdword64 [wmi: evex.scc2.dfv.l0.m4.o64 f7 /0 id,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 02) 300 324 001(f7) 210 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTB, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3808, 349, 2301}, + /* 8 : CTESTB spec4,rm8,imm8 [wmi: evex.scc2.dfv.l0.m4.o8 f6 /1 ib ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 02) 300 001(f6) 211 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTB, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14913, 347, 2302}, + /* 9 : CTESTB spec4,rm16,imm16 [wmi: evex.scc2.dfv.l0.m4.o16 f7 /1 iw ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 02) 300 320 001(f7) 211 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTB, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3984, 348, 2303}, + /* 10 : CTESTB spec4,rm32,imm32 [wmi: evex.scc2.dfv.l0.m4.o32 f7 /1 id ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 02) 300 321 001(f7) 211 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTB, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+4160, 349, 2304}, + /* 11 : CTESTB spec4,rm64,sdword64 [wmi: evex.scc2.dfv.l0.m4.o64 f7 /1 id,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 02) 300 324 001(f7) 211 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTB, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+4336, 349, 2305}, +}; + +static const struct itemplate instrux_CTESTBE[12] = { + /* 0 : CTESTBE spec4,rm8,reg8 [wmr: evex.scc6.dfv.l0.m4.o8 84 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 06) 300 001(84) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTBE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+25033, 347, 2294}, + /* 1 : CTESTBE spec4,rm16,reg16 [wmr: evex.scc6.dfv.l0.m4.o16 85 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 06) 300 320 001(85) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTBE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+14283, 348, 2295}, + /* 2 : CTESTBE spec4,rm32,reg32 [wmr: evex.scc6.dfv.l0.m4.o32 85 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 06) 300 321 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTBE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+14443, 349, 2296}, + /* 3 : CTESTBE spec4,rm64,reg64 [wmr: evex.scc6.dfv.l0.m4.o64 85 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 06) 300 324 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTBE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+14603, 349, 2297}, + /* 4 : CTESTBE spec4,rm8,imm8 [wmi: evex.scc6.dfv.l0.m4.o8 f6 /0 ib ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 06) 300 001(f6) 210 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTBE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14763, 347, 2298}, + /* 5 : CTESTBE spec4,rm16,imm16 [wmi: evex.scc6.dfv.l0.m4.o16 f7 /0 iw ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 06) 300 320 001(f7) 210 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTBE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3467, 348, 2299}, + /* 6 : CTESTBE spec4,rm32,imm32 [wmi: evex.scc6.dfv.l0.m4.o32 f7 /0 id ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 06) 300 321 001(f7) 210 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTBE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3643, 349, 2300}, + /* 7 : CTESTBE spec4,rm64,sdword64 [wmi: evex.scc6.dfv.l0.m4.o64 f7 /0 id,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 06) 300 324 001(f7) 210 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTBE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3819, 349, 2301}, + /* 8 : CTESTBE spec4,rm8,imm8 [wmi: evex.scc6.dfv.l0.m4.o8 f6 /1 ib ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 06) 300 001(f6) 211 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTBE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14923, 347, 2302}, + /* 9 : CTESTBE spec4,rm16,imm16 [wmi: evex.scc6.dfv.l0.m4.o16 f7 /1 iw ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 06) 300 320 001(f7) 211 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTBE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3995, 348, 2303}, + /* 10 : CTESTBE spec4,rm32,imm32 [wmi: evex.scc6.dfv.l0.m4.o32 f7 /1 id ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 06) 300 321 001(f7) 211 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTBE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+4171, 349, 2304}, + /* 11 : CTESTBE spec4,rm64,sdword64 [wmi: evex.scc6.dfv.l0.m4.o64 f7 /1 id,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 06) 300 324 001(f7) 211 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTBE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+4347, 349, 2305}, +}; + +static const struct itemplate instrux_CTESTC[12] = { + /* 0 : CTESTC spec4,rm8,reg8 [wmr: evex.scc2.dfv.l0.m4.o8 84 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 02) 300 001(84) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+25024, 347, 2294}, + /* 1 : CTESTC spec4,rm16,reg16 [wmr: evex.scc2.dfv.l0.m4.o16 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 02) 300 320 001(85) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+14273, 348, 2295}, + /* 2 : CTESTC spec4,rm32,reg32 [wmr: evex.scc2.dfv.l0.m4.o32 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 02) 300 321 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+14433, 349, 2296}, + /* 3 : CTESTC spec4,rm64,reg64 [wmr: evex.scc2.dfv.l0.m4.o64 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 02) 300 324 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+14593, 349, 2297}, + /* 4 : CTESTC spec4,rm8,imm8 [wmi: evex.scc2.dfv.l0.m4.o8 f6 /0 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 02) 300 001(f6) 210 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14753, 347, 2298}, + /* 5 : CTESTC spec4,rm16,imm16 [wmi: evex.scc2.dfv.l0.m4.o16 f7 /0 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 02) 300 320 001(f7) 210 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3456, 348, 2299}, + /* 6 : CTESTC spec4,rm32,imm32 [wmi: evex.scc2.dfv.l0.m4.o32 f7 /0 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 02) 300 321 001(f7) 210 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3632, 349, 2300}, + /* 7 : CTESTC spec4,rm64,sdword64 [wmi: evex.scc2.dfv.l0.m4.o64 f7 /0 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 02) 300 324 001(f7) 210 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3808, 349, 2301}, + /* 8 : CTESTC spec4,rm8,imm8 [wmi: evex.scc2.dfv.l0.m4.o8 f6 /1 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 02) 300 001(f6) 211 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14913, 347, 2302}, + /* 9 : CTESTC spec4,rm16,imm16 [wmi: evex.scc2.dfv.l0.m4.o16 f7 /1 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 02) 300 320 001(f7) 211 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3984, 348, 2303}, + /* 10 : CTESTC spec4,rm32,imm32 [wmi: evex.scc2.dfv.l0.m4.o32 f7 /1 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 02) 300 321 001(f7) 211 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+4160, 349, 2304}, + /* 11 : CTESTC spec4,rm64,sdword64 [wmi: evex.scc2.dfv.l0.m4.o64 f7 /1 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 02) 300 324 001(f7) 211 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+4336, 349, 2305}, +}; + +static const struct itemplate instrux_CTESTE[12] = { + /* 0 : CTESTE spec4,rm8,reg8 [wmr: evex.scc4.dfv.l0.m4.o8 84 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 04) 300 001(84) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+25042, 347, 2294}, + /* 1 : CTESTE spec4,rm16,reg16 [wmr: evex.scc4.dfv.l0.m4.o16 85 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 04) 300 320 001(85) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+14293, 348, 2295}, + /* 2 : CTESTE spec4,rm32,reg32 [wmr: evex.scc4.dfv.l0.m4.o32 85 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 04) 300 321 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+14453, 349, 2296}, + /* 3 : CTESTE spec4,rm64,reg64 [wmr: evex.scc4.dfv.l0.m4.o64 85 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 04) 300 324 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+14613, 349, 2297}, + /* 4 : CTESTE spec4,rm8,imm8 [wmi: evex.scc4.dfv.l0.m4.o8 f6 /0 ib ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 04) 300 001(f6) 210 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14773, 347, 2298}, + /* 5 : CTESTE spec4,rm16,imm16 [wmi: evex.scc4.dfv.l0.m4.o16 f7 /0 iw ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 04) 300 320 001(f7) 210 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3478, 348, 2299}, + /* 6 : CTESTE spec4,rm32,imm32 [wmi: evex.scc4.dfv.l0.m4.o32 f7 /0 id ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 04) 300 321 001(f7) 210 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3654, 349, 2300}, + /* 7 : CTESTE spec4,rm64,sdword64 [wmi: evex.scc4.dfv.l0.m4.o64 f7 /0 id,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 04) 300 324 001(f7) 210 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3830, 349, 2301}, + /* 8 : CTESTE spec4,rm8,imm8 [wmi: evex.scc4.dfv.l0.m4.o8 f6 /1 ib ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 04) 300 001(f6) 211 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14933, 347, 2302}, + /* 9 : CTESTE spec4,rm16,imm16 [wmi: evex.scc4.dfv.l0.m4.o16 f7 /1 iw ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 04) 300 320 001(f7) 211 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+4006, 348, 2303}, + /* 10 : CTESTE spec4,rm32,imm32 [wmi: evex.scc4.dfv.l0.m4.o32 f7 /1 id ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 04) 300 321 001(f7) 211 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+4182, 349, 2304}, + /* 11 : CTESTE spec4,rm64,sdword64 [wmi: evex.scc4.dfv.l0.m4.o64 f7 /1 id,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 04) 300 324 001(f7) 211 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+4358, 349, 2305}, +}; + +static const struct itemplate instrux_CTESTF[12] = { + /* 0 : CTESTF spec4,rm8,reg8 [wmr: evex.scc11.dfv.l0.m4.o8 84 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0b) 300 001(84) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTF, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24997, 347, 2294}, + /* 1 : CTESTF spec4,rm16,reg16 [wmr: evex.scc11.dfv.l0.m4.o16 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0b) 300 320 001(85) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTF, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+14243, 348, 2295}, + /* 2 : CTESTF spec4,rm32,reg32 [wmr: evex.scc11.dfv.l0.m4.o32 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0b) 300 321 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTF, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+14403, 349, 2296}, + /* 3 : CTESTF spec4,rm64,reg64 [wmr: evex.scc11.dfv.l0.m4.o64 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0b) 300 324 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTF, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+14563, 349, 2297}, + /* 4 : CTESTF spec4,rm8,imm8 [wmi: evex.scc11.dfv.l0.m4.o8 f6 /0 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0b) 300 001(f6) 210 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTF, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14723, 347, 2298}, + /* 5 : CTESTF spec4,rm16,imm16 [wmi: evex.scc11.dfv.l0.m4.o16 f7 /0 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0b) 300 320 001(f7) 210 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTF, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3423, 348, 2299}, + /* 6 : CTESTF spec4,rm32,imm32 [wmi: evex.scc11.dfv.l0.m4.o32 f7 /0 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0b) 300 321 001(f7) 210 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTF, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3599, 349, 2300}, + /* 7 : CTESTF spec4,rm64,sdword64 [wmi: evex.scc11.dfv.l0.m4.o64 f7 /0 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0b) 300 324 001(f7) 210 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTF, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3775, 349, 2301}, + /* 8 : CTESTF spec4,rm8,imm8 [wmi: evex.scc11.dfv.l0.m4.o8 f6 /1 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0b) 300 001(f6) 211 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTF, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14883, 347, 2302}, + /* 9 : CTESTF spec4,rm16,imm16 [wmi: evex.scc11.dfv.l0.m4.o16 f7 /1 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0b) 300 320 001(f7) 211 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTF, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3951, 348, 2303}, + /* 10 : CTESTF spec4,rm32,imm32 [wmi: evex.scc11.dfv.l0.m4.o32 f7 /1 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0b) 300 321 001(f7) 211 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTF, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+4127, 349, 2304}, + /* 11 : CTESTF spec4,rm64,sdword64 [wmi: evex.scc11.dfv.l0.m4.o64 f7 /1 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0b) 300 324 001(f7) 211 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTF, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+4303, 349, 2305}, +}; + +static const struct itemplate instrux_CTESTG[12] = { + /* 0 : CTESTG spec4,rm8,reg8 [wmr: evex.scc15.dfv.l0.m4.o8 84 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0f) 300 001(84) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+25051, 347, 2294}, + /* 1 : CTESTG spec4,rm16,reg16 [wmr: evex.scc15.dfv.l0.m4.o16 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0f) 300 320 001(85) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+14303, 348, 2295}, + /* 2 : CTESTG spec4,rm32,reg32 [wmr: evex.scc15.dfv.l0.m4.o32 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0f) 300 321 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+14463, 349, 2296}, + /* 3 : CTESTG spec4,rm64,reg64 [wmr: evex.scc15.dfv.l0.m4.o64 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0f) 300 324 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+14623, 349, 2297}, + /* 4 : CTESTG spec4,rm8,imm8 [wmi: evex.scc15.dfv.l0.m4.o8 f6 /0 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0f) 300 001(f6) 210 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14783, 347, 2298}, + /* 5 : CTESTG spec4,rm16,imm16 [wmi: evex.scc15.dfv.l0.m4.o16 f7 /0 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0f) 300 320 001(f7) 210 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3489, 348, 2299}, + /* 6 : CTESTG spec4,rm32,imm32 [wmi: evex.scc15.dfv.l0.m4.o32 f7 /0 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0f) 300 321 001(f7) 210 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3665, 349, 2300}, + /* 7 : CTESTG spec4,rm64,sdword64 [wmi: evex.scc15.dfv.l0.m4.o64 f7 /0 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0f) 300 324 001(f7) 210 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3841, 349, 2301}, + /* 8 : CTESTG spec4,rm8,imm8 [wmi: evex.scc15.dfv.l0.m4.o8 f6 /1 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0f) 300 001(f6) 211 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14943, 347, 2302}, + /* 9 : CTESTG spec4,rm16,imm16 [wmi: evex.scc15.dfv.l0.m4.o16 f7 /1 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0f) 300 320 001(f7) 211 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+4017, 348, 2303}, + /* 10 : CTESTG spec4,rm32,imm32 [wmi: evex.scc15.dfv.l0.m4.o32 f7 /1 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0f) 300 321 001(f7) 211 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+4193, 349, 2304}, + /* 11 : CTESTG spec4,rm64,sdword64 [wmi: evex.scc15.dfv.l0.m4.o64 f7 /1 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0f) 300 324 001(f7) 211 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+4369, 349, 2305}, +}; + +static const struct itemplate instrux_CTESTGE[12] = { + /* 0 : CTESTGE spec4,rm8,reg8 [wmr: evex.scc13.dfv.l0.m4.o8 84 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 0d) 300 001(84) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTGE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+25060, 347, 2294}, + /* 1 : CTESTGE spec4,rm16,reg16 [wmr: evex.scc13.dfv.l0.m4.o16 85 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 0d) 300 320 001(85) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTGE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+14313, 348, 2295}, + /* 2 : CTESTGE spec4,rm32,reg32 [wmr: evex.scc13.dfv.l0.m4.o32 85 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 0d) 300 321 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTGE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+14473, 349, 2296}, + /* 3 : CTESTGE spec4,rm64,reg64 [wmr: evex.scc13.dfv.l0.m4.o64 85 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 0d) 300 324 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTGE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+14633, 349, 2297}, + /* 4 : CTESTGE spec4,rm8,imm8 [wmi: evex.scc13.dfv.l0.m4.o8 f6 /0 ib ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 0d) 300 001(f6) 210 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTGE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14793, 347, 2298}, + /* 5 : CTESTGE spec4,rm16,imm16 [wmi: evex.scc13.dfv.l0.m4.o16 f7 /0 iw ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 0d) 300 320 001(f7) 210 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTGE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3500, 348, 2299}, + /* 6 : CTESTGE spec4,rm32,imm32 [wmi: evex.scc13.dfv.l0.m4.o32 f7 /0 id ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 0d) 300 321 001(f7) 210 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTGE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3676, 349, 2300}, + /* 7 : CTESTGE spec4,rm64,sdword64 [wmi: evex.scc13.dfv.l0.m4.o64 f7 /0 id,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 0d) 300 324 001(f7) 210 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTGE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3852, 349, 2301}, + /* 8 : CTESTGE spec4,rm8,imm8 [wmi: evex.scc13.dfv.l0.m4.o8 f6 /1 ib ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 0d) 300 001(f6) 211 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTGE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14953, 347, 2302}, + /* 9 : CTESTGE spec4,rm16,imm16 [wmi: evex.scc13.dfv.l0.m4.o16 f7 /1 iw ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 0d) 300 320 001(f7) 211 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTGE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+4028, 348, 2303}, + /* 10 : CTESTGE spec4,rm32,imm32 [wmi: evex.scc13.dfv.l0.m4.o32 f7 /1 id ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 0d) 300 321 001(f7) 211 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTGE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+4204, 349, 2304}, + /* 11 : CTESTGE spec4,rm64,sdword64 [wmi: evex.scc13.dfv.l0.m4.o64 f7 /1 id,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 0d) 300 324 001(f7) 211 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTGE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+4380, 349, 2305}, +}; + +static const struct itemplate instrux_CTESTL[12] = { + /* 0 : CTESTL spec4,rm8,reg8 [wmr: evex.scc12.dfv.l0.m4.o8 84 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0c) 300 001(84) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+25069, 347, 2294}, + /* 1 : CTESTL spec4,rm16,reg16 [wmr: evex.scc12.dfv.l0.m4.o16 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0c) 300 320 001(85) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+14323, 348, 2295}, + /* 2 : CTESTL spec4,rm32,reg32 [wmr: evex.scc12.dfv.l0.m4.o32 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0c) 300 321 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+14483, 349, 2296}, + /* 3 : CTESTL spec4,rm64,reg64 [wmr: evex.scc12.dfv.l0.m4.o64 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0c) 300 324 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+14643, 349, 2297}, + /* 4 : CTESTL spec4,rm8,imm8 [wmi: evex.scc12.dfv.l0.m4.o8 f6 /0 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0c) 300 001(f6) 210 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14803, 347, 2298}, + /* 5 : CTESTL spec4,rm16,imm16 [wmi: evex.scc12.dfv.l0.m4.o16 f7 /0 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0c) 300 320 001(f7) 210 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3511, 348, 2299}, + /* 6 : CTESTL spec4,rm32,imm32 [wmi: evex.scc12.dfv.l0.m4.o32 f7 /0 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0c) 300 321 001(f7) 210 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3687, 349, 2300}, + /* 7 : CTESTL spec4,rm64,sdword64 [wmi: evex.scc12.dfv.l0.m4.o64 f7 /0 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0c) 300 324 001(f7) 210 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3863, 349, 2301}, + /* 8 : CTESTL spec4,rm8,imm8 [wmi: evex.scc12.dfv.l0.m4.o8 f6 /1 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0c) 300 001(f6) 211 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14963, 347, 2302}, + /* 9 : CTESTL spec4,rm16,imm16 [wmi: evex.scc12.dfv.l0.m4.o16 f7 /1 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0c) 300 320 001(f7) 211 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+4039, 348, 2303}, + /* 10 : CTESTL spec4,rm32,imm32 [wmi: evex.scc12.dfv.l0.m4.o32 f7 /1 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0c) 300 321 001(f7) 211 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+4215, 349, 2304}, + /* 11 : CTESTL spec4,rm64,sdword64 [wmi: evex.scc12.dfv.l0.m4.o64 f7 /1 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0c) 300 324 001(f7) 211 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+4391, 349, 2305}, +}; + +static const struct itemplate instrux_CTESTLE[12] = { + /* 0 : CTESTLE spec4,rm8,reg8 [wmr: evex.scc14.dfv.l0.m4.o8 84 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 0e) 300 001(84) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTLE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+25078, 347, 2294}, + /* 1 : CTESTLE spec4,rm16,reg16 [wmr: evex.scc14.dfv.l0.m4.o16 85 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 0e) 300 320 001(85) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTLE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+14333, 348, 2295}, + /* 2 : CTESTLE spec4,rm32,reg32 [wmr: evex.scc14.dfv.l0.m4.o32 85 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 0e) 300 321 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTLE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+14493, 349, 2296}, + /* 3 : CTESTLE spec4,rm64,reg64 [wmr: evex.scc14.dfv.l0.m4.o64 85 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 0e) 300 324 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTLE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+14653, 349, 2297}, + /* 4 : CTESTLE spec4,rm8,imm8 [wmi: evex.scc14.dfv.l0.m4.o8 f6 /0 ib ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 0e) 300 001(f6) 210 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTLE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14813, 347, 2298}, + /* 5 : CTESTLE spec4,rm16,imm16 [wmi: evex.scc14.dfv.l0.m4.o16 f7 /0 iw ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 0e) 300 320 001(f7) 210 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTLE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3522, 348, 2299}, + /* 6 : CTESTLE spec4,rm32,imm32 [wmi: evex.scc14.dfv.l0.m4.o32 f7 /0 id ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 0e) 300 321 001(f7) 210 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTLE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3698, 349, 2300}, + /* 7 : CTESTLE spec4,rm64,sdword64 [wmi: evex.scc14.dfv.l0.m4.o64 f7 /0 id,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 0e) 300 324 001(f7) 210 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTLE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3874, 349, 2301}, + /* 8 : CTESTLE spec4,rm8,imm8 [wmi: evex.scc14.dfv.l0.m4.o8 f6 /1 ib ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 0e) 300 001(f6) 211 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTLE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14973, 347, 2302}, + /* 9 : CTESTLE spec4,rm16,imm16 [wmi: evex.scc14.dfv.l0.m4.o16 f7 /1 iw ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 0e) 300 320 001(f7) 211 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTLE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+4050, 348, 2303}, + /* 10 : CTESTLE spec4,rm32,imm32 [wmi: evex.scc14.dfv.l0.m4.o32 f7 /1 id ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 0e) 300 321 001(f7) 211 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTLE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+4226, 349, 2304}, + /* 11 : CTESTLE spec4,rm64,sdword64 [wmi: evex.scc14.dfv.l0.m4.o64 f7 /1 id,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 0e) 300 324 001(f7) 211 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTLE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+4402, 349, 2305}, +}; + +static const struct itemplate instrux_CTESTNA[12] = { + /* 0 : CTESTNA spec4,rm8,reg8 [wmr: evex.scc6.dfv.l0.m4.o8 84 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 06) 300 001(84) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+25033, 347, 2294}, + /* 1 : CTESTNA spec4,rm16,reg16 [wmr: evex.scc6.dfv.l0.m4.o16 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 06) 300 320 001(85) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+14283, 348, 2295}, + /* 2 : CTESTNA spec4,rm32,reg32 [wmr: evex.scc6.dfv.l0.m4.o32 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 06) 300 321 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+14443, 349, 2296}, + /* 3 : CTESTNA spec4,rm64,reg64 [wmr: evex.scc6.dfv.l0.m4.o64 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 06) 300 324 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+14603, 349, 2297}, + /* 4 : CTESTNA spec4,rm8,imm8 [wmi: evex.scc6.dfv.l0.m4.o8 f6 /0 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 06) 300 001(f6) 210 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14763, 347, 2298}, + /* 5 : CTESTNA spec4,rm16,imm16 [wmi: evex.scc6.dfv.l0.m4.o16 f7 /0 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 06) 300 320 001(f7) 210 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3467, 348, 2299}, + /* 6 : CTESTNA spec4,rm32,imm32 [wmi: evex.scc6.dfv.l0.m4.o32 f7 /0 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 06) 300 321 001(f7) 210 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3643, 349, 2300}, + /* 7 : CTESTNA spec4,rm64,sdword64 [wmi: evex.scc6.dfv.l0.m4.o64 f7 /0 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 06) 300 324 001(f7) 210 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3819, 349, 2301}, + /* 8 : CTESTNA spec4,rm8,imm8 [wmi: evex.scc6.dfv.l0.m4.o8 f6 /1 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 06) 300 001(f6) 211 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14923, 347, 2302}, + /* 9 : CTESTNA spec4,rm16,imm16 [wmi: evex.scc6.dfv.l0.m4.o16 f7 /1 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 06) 300 320 001(f7) 211 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3995, 348, 2303}, + /* 10 : CTESTNA spec4,rm32,imm32 [wmi: evex.scc6.dfv.l0.m4.o32 f7 /1 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 06) 300 321 001(f7) 211 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+4171, 349, 2304}, + /* 11 : CTESTNA spec4,rm64,sdword64 [wmi: evex.scc6.dfv.l0.m4.o64 f7 /1 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 06) 300 324 001(f7) 211 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+4347, 349, 2305}, +}; + +static const struct itemplate instrux_CTESTNAE[12] = { + /* 0 : CTESTNAE spec4,rm8,reg8 [wmr: evex.scc2.dfv.l0.m4.o8 84 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 02) 300 001(84) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNAE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+25024, 347, 2294}, + /* 1 : CTESTNAE spec4,rm16,reg16 [wmr: evex.scc2.dfv.l0.m4.o16 85 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 02) 300 320 001(85) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNAE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+14273, 348, 2295}, + /* 2 : CTESTNAE spec4,rm32,reg32 [wmr: evex.scc2.dfv.l0.m4.o32 85 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 02) 300 321 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNAE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+14433, 349, 2296}, + /* 3 : CTESTNAE spec4,rm64,reg64 [wmr: evex.scc2.dfv.l0.m4.o64 85 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 02) 300 324 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNAE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+14593, 349, 2297}, + /* 4 : CTESTNAE spec4,rm8,imm8 [wmi: evex.scc2.dfv.l0.m4.o8 f6 /0 ib ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 02) 300 001(f6) 210 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNAE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14753, 347, 2298}, + /* 5 : CTESTNAE spec4,rm16,imm16 [wmi: evex.scc2.dfv.l0.m4.o16 f7 /0 iw ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 02) 300 320 001(f7) 210 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNAE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3456, 348, 2299}, + /* 6 : CTESTNAE spec4,rm32,imm32 [wmi: evex.scc2.dfv.l0.m4.o32 f7 /0 id ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 02) 300 321 001(f7) 210 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNAE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3632, 349, 2300}, + /* 7 : CTESTNAE spec4,rm64,sdword64 [wmi: evex.scc2.dfv.l0.m4.o64 f7 /0 id,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 02) 300 324 001(f7) 210 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNAE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3808, 349, 2301}, + /* 8 : CTESTNAE spec4,rm8,imm8 [wmi: evex.scc2.dfv.l0.m4.o8 f6 /1 ib ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 02) 300 001(f6) 211 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNAE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14913, 347, 2302}, + /* 9 : CTESTNAE spec4,rm16,imm16 [wmi: evex.scc2.dfv.l0.m4.o16 f7 /1 iw ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 02) 300 320 001(f7) 211 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNAE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3984, 348, 2303}, + /* 10 : CTESTNAE spec4,rm32,imm32 [wmi: evex.scc2.dfv.l0.m4.o32 f7 /1 id ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 02) 300 321 001(f7) 211 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNAE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+4160, 349, 2304}, + /* 11 : CTESTNAE spec4,rm64,sdword64 [wmi: evex.scc2.dfv.l0.m4.o64 f7 /1 id,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 02) 300 324 001(f7) 211 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNAE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+4336, 349, 2305}, +}; + +static const struct itemplate instrux_CTESTNB[12] = { + /* 0 : CTESTNB spec4,rm8,reg8 [wmr: evex.scc3.dfv.l0.m4.o8 84 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 03) 300 001(84) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNB, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+25015, 347, 2294}, + /* 1 : CTESTNB spec4,rm16,reg16 [wmr: evex.scc3.dfv.l0.m4.o16 85 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 03) 300 320 001(85) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNB, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+14263, 348, 2295}, + /* 2 : CTESTNB spec4,rm32,reg32 [wmr: evex.scc3.dfv.l0.m4.o32 85 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 03) 300 321 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNB, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+14423, 349, 2296}, + /* 3 : CTESTNB spec4,rm64,reg64 [wmr: evex.scc3.dfv.l0.m4.o64 85 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 03) 300 324 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNB, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+14583, 349, 2297}, + /* 4 : CTESTNB spec4,rm8,imm8 [wmi: evex.scc3.dfv.l0.m4.o8 f6 /0 ib ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 03) 300 001(f6) 210 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNB, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14743, 347, 2298}, + /* 5 : CTESTNB spec4,rm16,imm16 [wmi: evex.scc3.dfv.l0.m4.o16 f7 /0 iw ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 03) 300 320 001(f7) 210 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNB, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3445, 348, 2299}, + /* 6 : CTESTNB spec4,rm32,imm32 [wmi: evex.scc3.dfv.l0.m4.o32 f7 /0 id ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 03) 300 321 001(f7) 210 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNB, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3621, 349, 2300}, + /* 7 : CTESTNB spec4,rm64,sdword64 [wmi: evex.scc3.dfv.l0.m4.o64 f7 /0 id,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 03) 300 324 001(f7) 210 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNB, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3797, 349, 2301}, + /* 8 : CTESTNB spec4,rm8,imm8 [wmi: evex.scc3.dfv.l0.m4.o8 f6 /1 ib ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 03) 300 001(f6) 211 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNB, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14903, 347, 2302}, + /* 9 : CTESTNB spec4,rm16,imm16 [wmi: evex.scc3.dfv.l0.m4.o16 f7 /1 iw ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 03) 300 320 001(f7) 211 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNB, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3973, 348, 2303}, + /* 10 : CTESTNB spec4,rm32,imm32 [wmi: evex.scc3.dfv.l0.m4.o32 f7 /1 id ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 03) 300 321 001(f7) 211 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNB, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+4149, 349, 2304}, + /* 11 : CTESTNB spec4,rm64,sdword64 [wmi: evex.scc3.dfv.l0.m4.o64 f7 /1 id,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 03) 300 324 001(f7) 211 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNB, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+4325, 349, 2305}, +}; + +static const struct itemplate instrux_CTESTNBE[12] = { + /* 0 : CTESTNBE spec4,rm8,reg8 [wmr: evex.scc7.dfv.l0.m4.o8 84 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 07) 300 001(84) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNBE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+25006, 347, 2294}, + /* 1 : CTESTNBE spec4,rm16,reg16 [wmr: evex.scc7.dfv.l0.m4.o16 85 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 07) 300 320 001(85) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNBE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+14253, 348, 2295}, + /* 2 : CTESTNBE spec4,rm32,reg32 [wmr: evex.scc7.dfv.l0.m4.o32 85 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 07) 300 321 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNBE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+14413, 349, 2296}, + /* 3 : CTESTNBE spec4,rm64,reg64 [wmr: evex.scc7.dfv.l0.m4.o64 85 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 07) 300 324 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNBE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+14573, 349, 2297}, + /* 4 : CTESTNBE spec4,rm8,imm8 [wmi: evex.scc7.dfv.l0.m4.o8 f6 /0 ib ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 07) 300 001(f6) 210 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNBE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14733, 347, 2298}, + /* 5 : CTESTNBE spec4,rm16,imm16 [wmi: evex.scc7.dfv.l0.m4.o16 f7 /0 iw ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 07) 300 320 001(f7) 210 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNBE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3434, 348, 2299}, + /* 6 : CTESTNBE spec4,rm32,imm32 [wmi: evex.scc7.dfv.l0.m4.o32 f7 /0 id ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 07) 300 321 001(f7) 210 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNBE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3610, 349, 2300}, + /* 7 : CTESTNBE spec4,rm64,sdword64 [wmi: evex.scc7.dfv.l0.m4.o64 f7 /0 id,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 07) 300 324 001(f7) 210 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNBE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3786, 349, 2301}, + /* 8 : CTESTNBE spec4,rm8,imm8 [wmi: evex.scc7.dfv.l0.m4.o8 f6 /1 ib ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 07) 300 001(f6) 211 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNBE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14893, 347, 2302}, + /* 9 : CTESTNBE spec4,rm16,imm16 [wmi: evex.scc7.dfv.l0.m4.o16 f7 /1 iw ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 07) 300 320 001(f7) 211 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNBE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3962, 348, 2303}, + /* 10 : CTESTNBE spec4,rm32,imm32 [wmi: evex.scc7.dfv.l0.m4.o32 f7 /1 id ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 07) 300 321 001(f7) 211 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNBE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+4138, 349, 2304}, + /* 11 : CTESTNBE spec4,rm64,sdword64 [wmi: evex.scc7.dfv.l0.m4.o64 f7 /1 id,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 07) 300 324 001(f7) 211 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNBE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+4314, 349, 2305}, +}; + +static const struct itemplate instrux_CTESTNC[12] = { + /* 0 : CTESTNC spec4,rm8,reg8 [wmr: evex.scc3.dfv.l0.m4.o8 84 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 03) 300 001(84) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+25015, 347, 2294}, + /* 1 : CTESTNC spec4,rm16,reg16 [wmr: evex.scc3.dfv.l0.m4.o16 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 03) 300 320 001(85) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+14263, 348, 2295}, + /* 2 : CTESTNC spec4,rm32,reg32 [wmr: evex.scc3.dfv.l0.m4.o32 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 03) 300 321 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+14423, 349, 2296}, + /* 3 : CTESTNC spec4,rm64,reg64 [wmr: evex.scc3.dfv.l0.m4.o64 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 03) 300 324 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+14583, 349, 2297}, + /* 4 : CTESTNC spec4,rm8,imm8 [wmi: evex.scc3.dfv.l0.m4.o8 f6 /0 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 03) 300 001(f6) 210 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14743, 347, 2298}, + /* 5 : CTESTNC spec4,rm16,imm16 [wmi: evex.scc3.dfv.l0.m4.o16 f7 /0 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 03) 300 320 001(f7) 210 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3445, 348, 2299}, + /* 6 : CTESTNC spec4,rm32,imm32 [wmi: evex.scc3.dfv.l0.m4.o32 f7 /0 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 03) 300 321 001(f7) 210 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3621, 349, 2300}, + /* 7 : CTESTNC spec4,rm64,sdword64 [wmi: evex.scc3.dfv.l0.m4.o64 f7 /0 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 03) 300 324 001(f7) 210 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3797, 349, 2301}, + /* 8 : CTESTNC spec4,rm8,imm8 [wmi: evex.scc3.dfv.l0.m4.o8 f6 /1 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 03) 300 001(f6) 211 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14903, 347, 2302}, + /* 9 : CTESTNC spec4,rm16,imm16 [wmi: evex.scc3.dfv.l0.m4.o16 f7 /1 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 03) 300 320 001(f7) 211 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3973, 348, 2303}, + /* 10 : CTESTNC spec4,rm32,imm32 [wmi: evex.scc3.dfv.l0.m4.o32 f7 /1 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 03) 300 321 001(f7) 211 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+4149, 349, 2304}, + /* 11 : CTESTNC spec4,rm64,sdword64 [wmi: evex.scc3.dfv.l0.m4.o64 f7 /1 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 03) 300 324 001(f7) 211 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+4325, 349, 2305}, +}; + +static const struct itemplate instrux_CTESTNE[12] = { + /* 0 : CTESTNE spec4,rm8,reg8 [wmr: evex.scc5.dfv.l0.m4.o8 84 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 05) 300 001(84) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+25087, 347, 2294}, + /* 1 : CTESTNE spec4,rm16,reg16 [wmr: evex.scc5.dfv.l0.m4.o16 85 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 05) 300 320 001(85) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+14343, 348, 2295}, + /* 2 : CTESTNE spec4,rm32,reg32 [wmr: evex.scc5.dfv.l0.m4.o32 85 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 05) 300 321 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+14503, 349, 2296}, + /* 3 : CTESTNE spec4,rm64,reg64 [wmr: evex.scc5.dfv.l0.m4.o64 85 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 05) 300 324 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+14663, 349, 2297}, + /* 4 : CTESTNE spec4,rm8,imm8 [wmi: evex.scc5.dfv.l0.m4.o8 f6 /0 ib ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 05) 300 001(f6) 210 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14823, 347, 2298}, + /* 5 : CTESTNE spec4,rm16,imm16 [wmi: evex.scc5.dfv.l0.m4.o16 f7 /0 iw ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 05) 300 320 001(f7) 210 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3533, 348, 2299}, + /* 6 : CTESTNE spec4,rm32,imm32 [wmi: evex.scc5.dfv.l0.m4.o32 f7 /0 id ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 05) 300 321 001(f7) 210 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3709, 349, 2300}, + /* 7 : CTESTNE spec4,rm64,sdword64 [wmi: evex.scc5.dfv.l0.m4.o64 f7 /0 id,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 05) 300 324 001(f7) 210 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3885, 349, 2301}, + /* 8 : CTESTNE spec4,rm8,imm8 [wmi: evex.scc5.dfv.l0.m4.o8 f6 /1 ib ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 05) 300 001(f6) 211 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14983, 347, 2302}, + /* 9 : CTESTNE spec4,rm16,imm16 [wmi: evex.scc5.dfv.l0.m4.o16 f7 /1 iw ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 05) 300 320 001(f7) 211 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+4061, 348, 2303}, + /* 10 : CTESTNE spec4,rm32,imm32 [wmi: evex.scc5.dfv.l0.m4.o32 f7 /1 id ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 05) 300 321 001(f7) 211 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+4237, 349, 2304}, + /* 11 : CTESTNE spec4,rm64,sdword64 [wmi: evex.scc5.dfv.l0.m4.o64 f7 /1 id,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 05) 300 324 001(f7) 211 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+4413, 349, 2305}, +}; + +static const struct itemplate instrux_CTESTNG[12] = { + /* 0 : CTESTNG spec4,rm8,reg8 [wmr: evex.scc14.dfv.l0.m4.o8 84 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0e) 300 001(84) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+25078, 347, 2294}, + /* 1 : CTESTNG spec4,rm16,reg16 [wmr: evex.scc14.dfv.l0.m4.o16 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0e) 300 320 001(85) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+14333, 348, 2295}, + /* 2 : CTESTNG spec4,rm32,reg32 [wmr: evex.scc14.dfv.l0.m4.o32 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0e) 300 321 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+14493, 349, 2296}, + /* 3 : CTESTNG spec4,rm64,reg64 [wmr: evex.scc14.dfv.l0.m4.o64 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0e) 300 324 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+14653, 349, 2297}, + /* 4 : CTESTNG spec4,rm8,imm8 [wmi: evex.scc14.dfv.l0.m4.o8 f6 /0 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0e) 300 001(f6) 210 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14813, 347, 2298}, + /* 5 : CTESTNG spec4,rm16,imm16 [wmi: evex.scc14.dfv.l0.m4.o16 f7 /0 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0e) 300 320 001(f7) 210 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3522, 348, 2299}, + /* 6 : CTESTNG spec4,rm32,imm32 [wmi: evex.scc14.dfv.l0.m4.o32 f7 /0 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0e) 300 321 001(f7) 210 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3698, 349, 2300}, + /* 7 : CTESTNG spec4,rm64,sdword64 [wmi: evex.scc14.dfv.l0.m4.o64 f7 /0 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0e) 300 324 001(f7) 210 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3874, 349, 2301}, + /* 8 : CTESTNG spec4,rm8,imm8 [wmi: evex.scc14.dfv.l0.m4.o8 f6 /1 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0e) 300 001(f6) 211 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14973, 347, 2302}, + /* 9 : CTESTNG spec4,rm16,imm16 [wmi: evex.scc14.dfv.l0.m4.o16 f7 /1 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0e) 300 320 001(f7) 211 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+4050, 348, 2303}, + /* 10 : CTESTNG spec4,rm32,imm32 [wmi: evex.scc14.dfv.l0.m4.o32 f7 /1 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0e) 300 321 001(f7) 211 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+4226, 349, 2304}, + /* 11 : CTESTNG spec4,rm64,sdword64 [wmi: evex.scc14.dfv.l0.m4.o64 f7 /1 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0e) 300 324 001(f7) 211 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+4402, 349, 2305}, +}; + +static const struct itemplate instrux_CTESTNGE[12] = { + /* 0 : CTESTNGE spec4,rm8,reg8 [wmr: evex.scc12.dfv.l0.m4.o8 84 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 0c) 300 001(84) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNGE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+25069, 347, 2294}, + /* 1 : CTESTNGE spec4,rm16,reg16 [wmr: evex.scc12.dfv.l0.m4.o16 85 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 0c) 300 320 001(85) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNGE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+14323, 348, 2295}, + /* 2 : CTESTNGE spec4,rm32,reg32 [wmr: evex.scc12.dfv.l0.m4.o32 85 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 0c) 300 321 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNGE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+14483, 349, 2296}, + /* 3 : CTESTNGE spec4,rm64,reg64 [wmr: evex.scc12.dfv.l0.m4.o64 85 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 0c) 300 324 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNGE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+14643, 349, 2297}, + /* 4 : CTESTNGE spec4,rm8,imm8 [wmi: evex.scc12.dfv.l0.m4.o8 f6 /0 ib ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 0c) 300 001(f6) 210 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNGE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14803, 347, 2298}, + /* 5 : CTESTNGE spec4,rm16,imm16 [wmi: evex.scc12.dfv.l0.m4.o16 f7 /0 iw ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 0c) 300 320 001(f7) 210 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNGE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3511, 348, 2299}, + /* 6 : CTESTNGE spec4,rm32,imm32 [wmi: evex.scc12.dfv.l0.m4.o32 f7 /0 id ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 0c) 300 321 001(f7) 210 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNGE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3687, 349, 2300}, + /* 7 : CTESTNGE spec4,rm64,sdword64 [wmi: evex.scc12.dfv.l0.m4.o64 f7 /0 id,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 0c) 300 324 001(f7) 210 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNGE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3863, 349, 2301}, + /* 8 : CTESTNGE spec4,rm8,imm8 [wmi: evex.scc12.dfv.l0.m4.o8 f6 /1 ib ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 0c) 300 001(f6) 211 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNGE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14963, 347, 2302}, + /* 9 : CTESTNGE spec4,rm16,imm16 [wmi: evex.scc12.dfv.l0.m4.o16 f7 /1 iw ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 0c) 300 320 001(f7) 211 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNGE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+4039, 348, 2303}, + /* 10 : CTESTNGE spec4,rm32,imm32 [wmi: evex.scc12.dfv.l0.m4.o32 f7 /1 id ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 0c) 300 321 001(f7) 211 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNGE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+4215, 349, 2304}, + /* 11 : CTESTNGE spec4,rm64,sdword64 [wmi: evex.scc12.dfv.l0.m4.o64 f7 /1 id,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 0c) 300 324 001(f7) 211 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNGE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+4391, 349, 2305}, +}; + +static const struct itemplate instrux_CTESTNL[12] = { + /* 0 : CTESTNL spec4,rm8,reg8 [wmr: evex.scc13.dfv.l0.m4.o8 84 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0d) 300 001(84) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+25060, 347, 2294}, + /* 1 : CTESTNL spec4,rm16,reg16 [wmr: evex.scc13.dfv.l0.m4.o16 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0d) 300 320 001(85) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+14313, 348, 2295}, + /* 2 : CTESTNL spec4,rm32,reg32 [wmr: evex.scc13.dfv.l0.m4.o32 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0d) 300 321 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+14473, 349, 2296}, + /* 3 : CTESTNL spec4,rm64,reg64 [wmr: evex.scc13.dfv.l0.m4.o64 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0d) 300 324 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+14633, 349, 2297}, + /* 4 : CTESTNL spec4,rm8,imm8 [wmi: evex.scc13.dfv.l0.m4.o8 f6 /0 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0d) 300 001(f6) 210 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14793, 347, 2298}, + /* 5 : CTESTNL spec4,rm16,imm16 [wmi: evex.scc13.dfv.l0.m4.o16 f7 /0 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0d) 300 320 001(f7) 210 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3500, 348, 2299}, + /* 6 : CTESTNL spec4,rm32,imm32 [wmi: evex.scc13.dfv.l0.m4.o32 f7 /0 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0d) 300 321 001(f7) 210 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3676, 349, 2300}, + /* 7 : CTESTNL spec4,rm64,sdword64 [wmi: evex.scc13.dfv.l0.m4.o64 f7 /0 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0d) 300 324 001(f7) 210 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3852, 349, 2301}, + /* 8 : CTESTNL spec4,rm8,imm8 [wmi: evex.scc13.dfv.l0.m4.o8 f6 /1 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0d) 300 001(f6) 211 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14953, 347, 2302}, + /* 9 : CTESTNL spec4,rm16,imm16 [wmi: evex.scc13.dfv.l0.m4.o16 f7 /1 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0d) 300 320 001(f7) 211 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+4028, 348, 2303}, + /* 10 : CTESTNL spec4,rm32,imm32 [wmi: evex.scc13.dfv.l0.m4.o32 f7 /1 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0d) 300 321 001(f7) 211 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+4204, 349, 2304}, + /* 11 : CTESTNL spec4,rm64,sdword64 [wmi: evex.scc13.dfv.l0.m4.o64 f7 /1 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0d) 300 324 001(f7) 211 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+4380, 349, 2305}, +}; + +static const struct itemplate instrux_CTESTNLE[12] = { + /* 0 : CTESTNLE spec4,rm8,reg8 [wmr: evex.scc15.dfv.l0.m4.o8 84 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 0f) 300 001(84) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNLE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+25051, 347, 2294}, + /* 1 : CTESTNLE spec4,rm16,reg16 [wmr: evex.scc15.dfv.l0.m4.o16 85 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 0f) 300 320 001(85) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNLE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+14303, 348, 2295}, + /* 2 : CTESTNLE spec4,rm32,reg32 [wmr: evex.scc15.dfv.l0.m4.o32 85 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 0f) 300 321 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNLE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+14463, 349, 2296}, + /* 3 : CTESTNLE spec4,rm64,reg64 [wmr: evex.scc15.dfv.l0.m4.o64 85 /r ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 0f) 300 324 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNLE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+14623, 349, 2297}, + /* 4 : CTESTNLE spec4,rm8,imm8 [wmi: evex.scc15.dfv.l0.m4.o8 f6 /0 ib ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 0f) 300 001(f6) 210 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNLE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14783, 347, 2298}, + /* 5 : CTESTNLE spec4,rm16,imm16 [wmi: evex.scc15.dfv.l0.m4.o16 f7 /0 iw ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 0f) 300 320 001(f7) 210 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNLE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3489, 348, 2299}, + /* 6 : CTESTNLE spec4,rm32,imm32 [wmi: evex.scc15.dfv.l0.m4.o32 f7 /0 id ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 0f) 300 321 001(f7) 210 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNLE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3665, 349, 2300}, + /* 7 : CTESTNLE spec4,rm64,sdword64 [wmi: evex.scc15.dfv.l0.m4.o64 f7 /0 id,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 0f) 300 324 001(f7) 210 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNLE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3841, 349, 2301}, + /* 8 : CTESTNLE spec4,rm8,imm8 [wmi: evex.scc15.dfv.l0.m4.o8 f6 /1 ib ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 0f) 300 001(f6) 211 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNLE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14943, 347, 2302}, + /* 9 : CTESTNLE spec4,rm16,imm16 [wmi: evex.scc15.dfv.l0.m4.o16 f7 /1 iw ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 05 0f) 300 320 001(f7) 211 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNLE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+4017, 348, 2303}, + /* 10 : CTESTNLE spec4,rm32,imm32 [wmi: evex.scc15.dfv.l0.m4.o32 f7 /1 id ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 04 0f) 300 321 001(f7) 211 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNLE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+4193, 349, 2304}, + /* 11 : CTESTNLE spec4,rm64,sdword64 [wmi: evex.scc15.dfv.l0.m4.o64 f7 /1 id,s ] SM1-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 84 0f) 300 324 001(f7) 211 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNLE, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+4369, 349, 2305}, +}; + +static const struct itemplate instrux_CTESTNO[12] = { + /* 0 : CTESTNO spec4,rm8,reg8 [wmr: evex.scc1.dfv.l0.m4.o8 84 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 01) 300 001(84) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+25096, 347, 2294}, + /* 1 : CTESTNO spec4,rm16,reg16 [wmr: evex.scc1.dfv.l0.m4.o16 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 01) 300 320 001(85) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+14353, 348, 2295}, + /* 2 : CTESTNO spec4,rm32,reg32 [wmr: evex.scc1.dfv.l0.m4.o32 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 01) 300 321 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+14513, 349, 2296}, + /* 3 : CTESTNO spec4,rm64,reg64 [wmr: evex.scc1.dfv.l0.m4.o64 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 01) 300 324 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+14673, 349, 2297}, + /* 4 : CTESTNO spec4,rm8,imm8 [wmi: evex.scc1.dfv.l0.m4.o8 f6 /0 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 01) 300 001(f6) 210 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14833, 347, 2298}, + /* 5 : CTESTNO spec4,rm16,imm16 [wmi: evex.scc1.dfv.l0.m4.o16 f7 /0 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 01) 300 320 001(f7) 210 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3544, 348, 2299}, + /* 6 : CTESTNO spec4,rm32,imm32 [wmi: evex.scc1.dfv.l0.m4.o32 f7 /0 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 01) 300 321 001(f7) 210 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3720, 349, 2300}, + /* 7 : CTESTNO spec4,rm64,sdword64 [wmi: evex.scc1.dfv.l0.m4.o64 f7 /0 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 01) 300 324 001(f7) 210 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3896, 349, 2301}, + /* 8 : CTESTNO spec4,rm8,imm8 [wmi: evex.scc1.dfv.l0.m4.o8 f6 /1 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 01) 300 001(f6) 211 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14993, 347, 2302}, + /* 9 : CTESTNO spec4,rm16,imm16 [wmi: evex.scc1.dfv.l0.m4.o16 f7 /1 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 01) 300 320 001(f7) 211 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+4072, 348, 2303}, + /* 10 : CTESTNO spec4,rm32,imm32 [wmi: evex.scc1.dfv.l0.m4.o32 f7 /1 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 01) 300 321 001(f7) 211 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+4248, 349, 2304}, + /* 11 : CTESTNO spec4,rm64,sdword64 [wmi: evex.scc1.dfv.l0.m4.o64 f7 /1 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 01) 300 324 001(f7) 211 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+4424, 349, 2305}, +}; + +static const struct itemplate instrux_CTESTNS[12] = { + /* 0 : CTESTNS spec4,rm8,reg8 [wmr: evex.scc9.dfv.l0.m4.o8 84 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 09) 300 001(84) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+25105, 347, 2294}, + /* 1 : CTESTNS spec4,rm16,reg16 [wmr: evex.scc9.dfv.l0.m4.o16 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 09) 300 320 001(85) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+14363, 348, 2295}, + /* 2 : CTESTNS spec4,rm32,reg32 [wmr: evex.scc9.dfv.l0.m4.o32 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 09) 300 321 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+14523, 349, 2296}, + /* 3 : CTESTNS spec4,rm64,reg64 [wmr: evex.scc9.dfv.l0.m4.o64 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 09) 300 324 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+14683, 349, 2297}, + /* 4 : CTESTNS spec4,rm8,imm8 [wmi: evex.scc9.dfv.l0.m4.o8 f6 /0 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 09) 300 001(f6) 210 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14843, 347, 2298}, + /* 5 : CTESTNS spec4,rm16,imm16 [wmi: evex.scc9.dfv.l0.m4.o16 f7 /0 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 09) 300 320 001(f7) 210 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3555, 348, 2299}, + /* 6 : CTESTNS spec4,rm32,imm32 [wmi: evex.scc9.dfv.l0.m4.o32 f7 /0 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 09) 300 321 001(f7) 210 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3731, 349, 2300}, + /* 7 : CTESTNS spec4,rm64,sdword64 [wmi: evex.scc9.dfv.l0.m4.o64 f7 /0 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 09) 300 324 001(f7) 210 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3907, 349, 2301}, + /* 8 : CTESTNS spec4,rm8,imm8 [wmi: evex.scc9.dfv.l0.m4.o8 f6 /1 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 09) 300 001(f6) 211 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15003, 347, 2302}, + /* 9 : CTESTNS spec4,rm16,imm16 [wmi: evex.scc9.dfv.l0.m4.o16 f7 /1 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 09) 300 320 001(f7) 211 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+4083, 348, 2303}, + /* 10 : CTESTNS spec4,rm32,imm32 [wmi: evex.scc9.dfv.l0.m4.o32 f7 /1 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 09) 300 321 001(f7) 211 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+4259, 349, 2304}, + /* 11 : CTESTNS spec4,rm64,sdword64 [wmi: evex.scc9.dfv.l0.m4.o64 f7 /1 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 09) 300 324 001(f7) 211 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+4435, 349, 2305}, +}; + +static const struct itemplate instrux_CTESTNZ[12] = { + /* 0 : CTESTNZ spec4,rm8,reg8 [wmr: evex.scc5.dfv.l0.m4.o8 84 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 05) 300 001(84) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+25087, 347, 2294}, + /* 1 : CTESTNZ spec4,rm16,reg16 [wmr: evex.scc5.dfv.l0.m4.o16 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 05) 300 320 001(85) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+14343, 348, 2295}, + /* 2 : CTESTNZ spec4,rm32,reg32 [wmr: evex.scc5.dfv.l0.m4.o32 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 05) 300 321 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+14503, 349, 2296}, + /* 3 : CTESTNZ spec4,rm64,reg64 [wmr: evex.scc5.dfv.l0.m4.o64 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 05) 300 324 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+14663, 349, 2297}, + /* 4 : CTESTNZ spec4,rm8,imm8 [wmi: evex.scc5.dfv.l0.m4.o8 f6 /0 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 05) 300 001(f6) 210 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14823, 347, 2298}, + /* 5 : CTESTNZ spec4,rm16,imm16 [wmi: evex.scc5.dfv.l0.m4.o16 f7 /0 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 05) 300 320 001(f7) 210 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3533, 348, 2299}, + /* 6 : CTESTNZ spec4,rm32,imm32 [wmi: evex.scc5.dfv.l0.m4.o32 f7 /0 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 05) 300 321 001(f7) 210 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3709, 349, 2300}, + /* 7 : CTESTNZ spec4,rm64,sdword64 [wmi: evex.scc5.dfv.l0.m4.o64 f7 /0 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 05) 300 324 001(f7) 210 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3885, 349, 2301}, + /* 8 : CTESTNZ spec4,rm8,imm8 [wmi: evex.scc5.dfv.l0.m4.o8 f6 /1 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 05) 300 001(f6) 211 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14983, 347, 2302}, + /* 9 : CTESTNZ spec4,rm16,imm16 [wmi: evex.scc5.dfv.l0.m4.o16 f7 /1 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 05) 300 320 001(f7) 211 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+4061, 348, 2303}, + /* 10 : CTESTNZ spec4,rm32,imm32 [wmi: evex.scc5.dfv.l0.m4.o32 f7 /1 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 05) 300 321 001(f7) 211 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+4237, 349, 2304}, + /* 11 : CTESTNZ spec4,rm64,sdword64 [wmi: evex.scc5.dfv.l0.m4.o64 f7 /1 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 05) 300 324 001(f7) 211 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+4413, 349, 2305}, +}; + +static const struct itemplate instrux_CTESTO[12] = { + /* 0 : CTESTO spec4,rm8,reg8 [wmr: evex.scc0.dfv.l0.m4.o8 84 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 00) 300 001(84) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+25114, 347, 2294}, + /* 1 : CTESTO spec4,rm16,reg16 [wmr: evex.scc0.dfv.l0.m4.o16 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 00) 300 320 001(85) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+14373, 348, 2295}, + /* 2 : CTESTO spec4,rm32,reg32 [wmr: evex.scc0.dfv.l0.m4.o32 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 00) 300 321 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+14533, 349, 2296}, + /* 3 : CTESTO spec4,rm64,reg64 [wmr: evex.scc0.dfv.l0.m4.o64 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 00) 300 324 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+14693, 349, 2297}, + /* 4 : CTESTO spec4,rm8,imm8 [wmi: evex.scc0.dfv.l0.m4.o8 f6 /0 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 00) 300 001(f6) 210 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14853, 347, 2298}, + /* 5 : CTESTO spec4,rm16,imm16 [wmi: evex.scc0.dfv.l0.m4.o16 f7 /0 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 00) 300 320 001(f7) 210 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3566, 348, 2299}, + /* 6 : CTESTO spec4,rm32,imm32 [wmi: evex.scc0.dfv.l0.m4.o32 f7 /0 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 00) 300 321 001(f7) 210 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3742, 349, 2300}, + /* 7 : CTESTO spec4,rm64,sdword64 [wmi: evex.scc0.dfv.l0.m4.o64 f7 /0 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 00) 300 324 001(f7) 210 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3918, 349, 2301}, + /* 8 : CTESTO spec4,rm8,imm8 [wmi: evex.scc0.dfv.l0.m4.o8 f6 /1 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 00) 300 001(f6) 211 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15013, 347, 2302}, + /* 9 : CTESTO spec4,rm16,imm16 [wmi: evex.scc0.dfv.l0.m4.o16 f7 /1 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 00) 300 320 001(f7) 211 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+4094, 348, 2303}, + /* 10 : CTESTO spec4,rm32,imm32 [wmi: evex.scc0.dfv.l0.m4.o32 f7 /1 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 00) 300 321 001(f7) 211 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+4270, 349, 2304}, + /* 11 : CTESTO spec4,rm64,sdword64 [wmi: evex.scc0.dfv.l0.m4.o64 f7 /1 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 00) 300 324 001(f7) 211 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+4446, 349, 2305}, +}; + +static const struct itemplate instrux_CTESTS[12] = { + /* 0 : CTESTS spec4,rm8,reg8 [wmr: evex.scc8.dfv.l0.m4.o8 84 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 08) 300 001(84) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+25123, 347, 2294}, + /* 1 : CTESTS spec4,rm16,reg16 [wmr: evex.scc8.dfv.l0.m4.o16 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 08) 300 320 001(85) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+14383, 348, 2295}, + /* 2 : CTESTS spec4,rm32,reg32 [wmr: evex.scc8.dfv.l0.m4.o32 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 08) 300 321 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+14543, 349, 2296}, + /* 3 : CTESTS spec4,rm64,reg64 [wmr: evex.scc8.dfv.l0.m4.o64 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 08) 300 324 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+14703, 349, 2297}, + /* 4 : CTESTS spec4,rm8,imm8 [wmi: evex.scc8.dfv.l0.m4.o8 f6 /0 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 08) 300 001(f6) 210 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14863, 347, 2298}, + /* 5 : CTESTS spec4,rm16,imm16 [wmi: evex.scc8.dfv.l0.m4.o16 f7 /0 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 08) 300 320 001(f7) 210 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3577, 348, 2299}, + /* 6 : CTESTS spec4,rm32,imm32 [wmi: evex.scc8.dfv.l0.m4.o32 f7 /0 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 08) 300 321 001(f7) 210 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3753, 349, 2300}, + /* 7 : CTESTS spec4,rm64,sdword64 [wmi: evex.scc8.dfv.l0.m4.o64 f7 /0 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 08) 300 324 001(f7) 210 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3929, 349, 2301}, + /* 8 : CTESTS spec4,rm8,imm8 [wmi: evex.scc8.dfv.l0.m4.o8 f6 /1 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 08) 300 001(f6) 211 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15023, 347, 2302}, + /* 9 : CTESTS spec4,rm16,imm16 [wmi: evex.scc8.dfv.l0.m4.o16 f7 /1 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 08) 300 320 001(f7) 211 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+4105, 348, 2303}, + /* 10 : CTESTS spec4,rm32,imm32 [wmi: evex.scc8.dfv.l0.m4.o32 f7 /1 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 08) 300 321 001(f7) 211 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+4281, 349, 2304}, + /* 11 : CTESTS spec4,rm64,sdword64 [wmi: evex.scc8.dfv.l0.m4.o64 f7 /1 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 08) 300 324 001(f7) 211 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+4457, 349, 2305}, +}; + +static const struct itemplate instrux_CTESTT[12] = { + /* 0 : CTESTT spec4,rm8,reg8 [wmr: evex.scc10.dfv.l0.m4.o8 84 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0a) 300 001(84) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTT, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+25132, 347, 2294}, + /* 1 : CTESTT spec4,rm16,reg16 [wmr: evex.scc10.dfv.l0.m4.o16 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0a) 300 320 001(85) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTT, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+14393, 348, 2295}, + /* 2 : CTESTT spec4,rm32,reg32 [wmr: evex.scc10.dfv.l0.m4.o32 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0a) 300 321 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTT, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+14553, 349, 2296}, + /* 3 : CTESTT spec4,rm64,reg64 [wmr: evex.scc10.dfv.l0.m4.o64 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0a) 300 324 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTT, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+14713, 349, 2297}, + /* 4 : CTESTT spec4,rm8,imm8 [wmi: evex.scc10.dfv.l0.m4.o8 f6 /0 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0a) 300 001(f6) 210 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTT, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14873, 347, 2298}, + /* 5 : CTESTT spec4,rm16,imm16 [wmi: evex.scc10.dfv.l0.m4.o16 f7 /0 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0a) 300 320 001(f7) 210 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTT, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3588, 348, 2299}, + /* 6 : CTESTT spec4,rm32,imm32 [wmi: evex.scc10.dfv.l0.m4.o32 f7 /0 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0a) 300 321 001(f7) 210 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTT, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3764, 349, 2300}, + /* 7 : CTESTT spec4,rm64,sdword64 [wmi: evex.scc10.dfv.l0.m4.o64 f7 /0 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0a) 300 324 001(f7) 210 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTT, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3940, 349, 2301}, + /* 8 : CTESTT spec4,rm8,imm8 [wmi: evex.scc10.dfv.l0.m4.o8 f6 /1 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0a) 300 001(f6) 211 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTT, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15033, 347, 2302}, + /* 9 : CTESTT spec4,rm16,imm16 [wmi: evex.scc10.dfv.l0.m4.o16 f7 /1 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0a) 300 320 001(f7) 211 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTT, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+4116, 348, 2303}, + /* 10 : CTESTT spec4,rm32,imm32 [wmi: evex.scc10.dfv.l0.m4.o32 f7 /1 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0a) 300 321 001(f7) 211 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTT, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+4292, 349, 2304}, + /* 11 : CTESTT spec4,rm64,sdword64 [wmi: evex.scc10.dfv.l0.m4.o64 f7 /1 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0a) 300 324 001(f7) 211 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTT, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+4468, 349, 2305}, +}; + +static const struct itemplate instrux_CTESTZ[12] = { + /* 0 : CTESTZ spec4,rm8,reg8 [wmr: evex.scc4.dfv.l0.m4.o8 84 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 04) 300 001(84) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+25042, 347, 2294}, + /* 1 : CTESTZ spec4,rm16,reg16 [wmr: evex.scc4.dfv.l0.m4.o16 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 04) 300 320 001(85) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+14293, 348, 2295}, + /* 2 : CTESTZ spec4,rm32,reg32 [wmr: evex.scc4.dfv.l0.m4.o32 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 04) 300 321 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+14453, 349, 2296}, + /* 3 : CTESTZ spec4,rm64,reg64 [wmr: evex.scc4.dfv.l0.m4.o64 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 04) 300 324 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+14613, 349, 2297}, + /* 4 : CTESTZ spec4,rm8,imm8 [wmi: evex.scc4.dfv.l0.m4.o8 f6 /0 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 04) 300 001(f6) 210 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14773, 347, 2298}, + /* 5 : CTESTZ spec4,rm16,imm16 [wmi: evex.scc4.dfv.l0.m4.o16 f7 /0 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 04) 300 320 001(f7) 210 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3478, 348, 2299}, + /* 6 : CTESTZ spec4,rm32,imm32 [wmi: evex.scc4.dfv.l0.m4.o32 f7 /0 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 04) 300 321 001(f7) 210 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3654, 349, 2300}, + /* 7 : CTESTZ spec4,rm64,sdword64 [wmi: evex.scc4.dfv.l0.m4.o64 f7 /0 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 04) 300 324 001(f7) 210 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3830, 349, 2301}, + /* 8 : CTESTZ spec4,rm8,imm8 [wmi: evex.scc4.dfv.l0.m4.o8 f6 /1 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 04) 300 001(f6) 211 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14933, 347, 2302}, + /* 9 : CTESTZ spec4,rm16,imm16 [wmi: evex.scc4.dfv.l0.m4.o16 f7 /1 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 04) 300 320 001(f7) 211 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+4006, 348, 2303}, + /* 10 : CTESTZ spec4,rm32,imm32 [wmi: evex.scc4.dfv.l0.m4.o32 f7 /1 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 04) 300 321 001(f7) 211 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+4182, 349, 2304}, + /* 11 : CTESTZ spec4,rm64,sdword64 [wmi: evex.scc4.dfv.l0.m4.o64 f7 /1 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 04) 300 324 001(f7) 211 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+4358, 349, 2305}, +}; + +static const struct itemplate instrux_CMOVA[6] = { + /* 0 : CMOVA reg16,rm16 [rm: o16 0f 47 /r ] SM0-1,P6 */ + /* 320 355 001(47) 110 : SM0,SM1,P6 */ + {I_CMOVA, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+68067, 350, 2308}, + /* 1 : CMOVA reg32,rm32 [rm: o32 0f 47 /r ] SM0-1,P6 */ + /* 321 355 001(47) 110 : SM0,SM1,P6 */ + {I_CMOVA, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68163, 350, 2309}, + /* 2 : CMOVA reg64,rm64 [rm: o64 0f 47 /r ] SM0-1,LONG,PROT,X86_64 */ + /* 324 355 001(47) 110 : SM0,SM1,LONG,PROT,X86_64 */ + {I_CMOVA, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+68259, 14, 2310}, + /* 3 : CMOVA reg16,reg16,rm16 [vrm: evex.nf0.nd1.l0.m4.o16 47 /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(47) 121 : SM0,SM1,SM2,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVA, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+15043, 351, 2311}, + /* 4 : CMOVA reg32,reg32,rm32 [vrm: evex.nf0.nd1.l0.m4.o32 47 /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(47) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVA, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+15203, 352, 2312}, + /* 5 : CMOVA reg64,reg64,rm64 [vrm: evex.nf0.nd1.l0.m4.o64 47 /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(47) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVA, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+15363, 352, 2313}, +}; + +static const struct itemplate instrux_CMOVAE[6] = { + /* 0 : CMOVAE reg16,rm16 [rm: o16 0f 43 /r ] SM0-1,P6,ND */ + /* 320 355 001(43) 110 : SM0,SM1,P6 */ + {I_CMOVAE, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+68073, 350, 2308}, + /* 1 : CMOVAE reg32,rm32 [rm: o32 0f 43 /r ] SM0-1,P6,ND */ + /* 321 355 001(43) 110 : SM0,SM1,P6 */ + {I_CMOVAE, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68169, 350, 2309}, + /* 2 : CMOVAE reg64,rm64 [rm: o64 0f 43 /r ] SM0-1,LONG,PROT,X86_64,ND */ + /* 324 355 001(43) 110 : SM0,SM1,LONG,PROT,X86_64 */ + {I_CMOVAE, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+68265, 14, 2310}, + /* 3 : CMOVAE reg16,reg16,rm16 [vrm: evex.nf0.nd1.l0.m4.o16 43 /r ] SM0-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 7d 18) 300 320 001(43) 121 : SM0,SM1,SM2,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVAE, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+15053, 351, 2311}, + /* 4 : CMOVAE reg32,reg32,rm32 [vrm: evex.nf0.nd1.l0.m4.o32 43 /r ] SM0-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 7c 18) 300 321 001(43) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVAE, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+15213, 352, 2312}, + /* 5 : CMOVAE reg64,reg64,rm64 [vrm: evex.nf0.nd1.l0.m4.o64 43 /r ] SM0-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 fc 18) 300 324 001(43) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVAE, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+15373, 352, 2313}, +}; + +static const struct itemplate instrux_CMOVB[6] = { + /* 0 : CMOVB reg16,rm16 [rm: o16 0f 42 /r ] SM0-1,P6,ND */ + /* 320 355 001(42) 110 : SM0,SM1,P6 */ + {I_CMOVB, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+68079, 350, 2308}, + /* 1 : CMOVB reg32,rm32 [rm: o32 0f 42 /r ] SM0-1,P6,ND */ + /* 321 355 001(42) 110 : SM0,SM1,P6 */ + {I_CMOVB, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68175, 350, 2309}, + /* 2 : CMOVB reg64,rm64 [rm: o64 0f 42 /r ] SM0-1,LONG,PROT,X86_64,ND */ + /* 324 355 001(42) 110 : SM0,SM1,LONG,PROT,X86_64 */ + {I_CMOVB, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+68271, 14, 2310}, + /* 3 : CMOVB reg16,reg16,rm16 [vrm: evex.nf0.nd1.l0.m4.o16 42 /r ] SM0-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 7d 18) 300 320 001(42) 121 : SM0,SM1,SM2,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVB, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+15063, 351, 2311}, + /* 4 : CMOVB reg32,reg32,rm32 [vrm: evex.nf0.nd1.l0.m4.o32 42 /r ] SM0-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 7c 18) 300 321 001(42) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVB, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+15223, 352, 2312}, + /* 5 : CMOVB reg64,reg64,rm64 [vrm: evex.nf0.nd1.l0.m4.o64 42 /r ] SM0-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 fc 18) 300 324 001(42) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVB, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+15383, 352, 2313}, +}; + +static const struct itemplate instrux_CMOVBE[6] = { + /* 0 : CMOVBE reg16,rm16 [rm: o16 0f 46 /r ] SM0-1,P6,ND */ + /* 320 355 001(46) 110 : SM0,SM1,P6 */ + {I_CMOVBE, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+68085, 350, 2308}, + /* 1 : CMOVBE reg32,rm32 [rm: o32 0f 46 /r ] SM0-1,P6,ND */ + /* 321 355 001(46) 110 : SM0,SM1,P6 */ + {I_CMOVBE, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68181, 350, 2309}, + /* 2 : CMOVBE reg64,rm64 [rm: o64 0f 46 /r ] SM0-1,LONG,PROT,X86_64,ND */ + /* 324 355 001(46) 110 : SM0,SM1,LONG,PROT,X86_64 */ + {I_CMOVBE, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+68277, 14, 2310}, + /* 3 : CMOVBE reg16,reg16,rm16 [vrm: evex.nf0.nd1.l0.m4.o16 46 /r ] SM0-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 7d 18) 300 320 001(46) 121 : SM0,SM1,SM2,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVBE, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+15073, 351, 2311}, + /* 4 : CMOVBE reg32,reg32,rm32 [vrm: evex.nf0.nd1.l0.m4.o32 46 /r ] SM0-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 7c 18) 300 321 001(46) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVBE, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+15233, 352, 2312}, + /* 5 : CMOVBE reg64,reg64,rm64 [vrm: evex.nf0.nd1.l0.m4.o64 46 /r ] SM0-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 fc 18) 300 324 001(46) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVBE, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+15393, 352, 2313}, +}; + +static const struct itemplate instrux_CMOVC[6] = { + /* 0 : CMOVC reg16,rm16 [rm: o16 0f 42 /r ] SM0-1,P6 */ + /* 320 355 001(42) 110 : SM0,SM1,P6 */ + {I_CMOVC, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+68079, 350, 2308}, + /* 1 : CMOVC reg32,rm32 [rm: o32 0f 42 /r ] SM0-1,P6 */ + /* 321 355 001(42) 110 : SM0,SM1,P6 */ + {I_CMOVC, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68175, 350, 2309}, + /* 2 : CMOVC reg64,rm64 [rm: o64 0f 42 /r ] SM0-1,LONG,PROT,X86_64 */ + /* 324 355 001(42) 110 : SM0,SM1,LONG,PROT,X86_64 */ + {I_CMOVC, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+68271, 14, 2310}, + /* 3 : CMOVC reg16,reg16,rm16 [vrm: evex.nf0.nd1.l0.m4.o16 42 /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(42) 121 : SM0,SM1,SM2,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVC, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+15063, 351, 2311}, + /* 4 : CMOVC reg32,reg32,rm32 [vrm: evex.nf0.nd1.l0.m4.o32 42 /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(42) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVC, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+15223, 352, 2312}, + /* 5 : CMOVC reg64,reg64,rm64 [vrm: evex.nf0.nd1.l0.m4.o64 42 /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(42) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVC, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+15383, 352, 2313}, +}; + +static const struct itemplate instrux_CMOVE[6] = { + /* 0 : CMOVE reg16,rm16 [rm: o16 0f 44 /r ] SM0-1,P6,ND */ + /* 320 355 001(44) 110 : SM0,SM1,P6 */ + {I_CMOVE, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+68091, 350, 2308}, + /* 1 : CMOVE reg32,rm32 [rm: o32 0f 44 /r ] SM0-1,P6,ND */ + /* 321 355 001(44) 110 : SM0,SM1,P6 */ + {I_CMOVE, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68187, 350, 2309}, + /* 2 : CMOVE reg64,rm64 [rm: o64 0f 44 /r ] SM0-1,LONG,PROT,X86_64,ND */ + /* 324 355 001(44) 110 : SM0,SM1,LONG,PROT,X86_64 */ + {I_CMOVE, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+68283, 14, 2310}, + /* 3 : CMOVE reg16,reg16,rm16 [vrm: evex.nf0.nd1.l0.m4.o16 44 /r ] SM0-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 7d 18) 300 320 001(44) 121 : SM0,SM1,SM2,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVE, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+15083, 351, 2311}, + /* 4 : CMOVE reg32,reg32,rm32 [vrm: evex.nf0.nd1.l0.m4.o32 44 /r ] SM0-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 7c 18) 300 321 001(44) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVE, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+15243, 352, 2312}, + /* 5 : CMOVE reg64,reg64,rm64 [vrm: evex.nf0.nd1.l0.m4.o64 44 /r ] SM0-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 fc 18) 300 324 001(44) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVE, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+15403, 352, 2313}, +}; + +static const struct itemplate instrux_CMOVG[6] = { + /* 0 : CMOVG reg16,rm16 [rm: o16 0f 4f /r ] SM0-1,P6 */ + /* 320 355 001(4f) 110 : SM0,SM1,P6 */ + {I_CMOVG, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+68097, 350, 2308}, + /* 1 : CMOVG reg32,rm32 [rm: o32 0f 4f /r ] SM0-1,P6 */ + /* 321 355 001(4f) 110 : SM0,SM1,P6 */ + {I_CMOVG, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68193, 350, 2309}, + /* 2 : CMOVG reg64,rm64 [rm: o64 0f 4f /r ] SM0-1,LONG,PROT,X86_64 */ + /* 324 355 001(4f) 110 : SM0,SM1,LONG,PROT,X86_64 */ + {I_CMOVG, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+68289, 14, 2310}, + /* 3 : CMOVG reg16,reg16,rm16 [vrm: evex.nf0.nd1.l0.m4.o16 4f /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(4f) 121 : SM0,SM1,SM2,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVG, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+15093, 351, 2311}, + /* 4 : CMOVG reg32,reg32,rm32 [vrm: evex.nf0.nd1.l0.m4.o32 4f /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(4f) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVG, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+15253, 352, 2312}, + /* 5 : CMOVG reg64,reg64,rm64 [vrm: evex.nf0.nd1.l0.m4.o64 4f /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(4f) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVG, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+15413, 352, 2313}, +}; + +static const struct itemplate instrux_CMOVGE[6] = { + /* 0 : CMOVGE reg16,rm16 [rm: o16 0f 4d /r ] SM0-1,P6,ND */ + /* 320 355 001(4d) 110 : SM0,SM1,P6 */ + {I_CMOVGE, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+68103, 350, 2308}, + /* 1 : CMOVGE reg32,rm32 [rm: o32 0f 4d /r ] SM0-1,P6,ND */ + /* 321 355 001(4d) 110 : SM0,SM1,P6 */ + {I_CMOVGE, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68199, 350, 2309}, + /* 2 : CMOVGE reg64,rm64 [rm: o64 0f 4d /r ] SM0-1,LONG,PROT,X86_64,ND */ + /* 324 355 001(4d) 110 : SM0,SM1,LONG,PROT,X86_64 */ + {I_CMOVGE, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+68295, 14, 2310}, + /* 3 : CMOVGE reg16,reg16,rm16 [vrm: evex.nf0.nd1.l0.m4.o16 4d /r ] SM0-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 7d 18) 300 320 001(4d) 121 : SM0,SM1,SM2,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVGE, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+15103, 351, 2311}, + /* 4 : CMOVGE reg32,reg32,rm32 [vrm: evex.nf0.nd1.l0.m4.o32 4d /r ] SM0-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 7c 18) 300 321 001(4d) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVGE, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+15263, 352, 2312}, + /* 5 : CMOVGE reg64,reg64,rm64 [vrm: evex.nf0.nd1.l0.m4.o64 4d /r ] SM0-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 fc 18) 300 324 001(4d) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVGE, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+15423, 352, 2313}, +}; + +static const struct itemplate instrux_CMOVL[6] = { + /* 0 : CMOVL reg16,rm16 [rm: o16 0f 4c /r ] SM0-1,P6 */ + /* 320 355 001(4c) 110 : SM0,SM1,P6 */ + {I_CMOVL, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+68109, 350, 2308}, + /* 1 : CMOVL reg32,rm32 [rm: o32 0f 4c /r ] SM0-1,P6 */ + /* 321 355 001(4c) 110 : SM0,SM1,P6 */ + {I_CMOVL, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68205, 350, 2309}, + /* 2 : CMOVL reg64,rm64 [rm: o64 0f 4c /r ] SM0-1,LONG,PROT,X86_64 */ + /* 324 355 001(4c) 110 : SM0,SM1,LONG,PROT,X86_64 */ + {I_CMOVL, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+68301, 14, 2310}, + /* 3 : CMOVL reg16,reg16,rm16 [vrm: evex.nf0.nd1.l0.m4.o16 4c /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(4c) 121 : SM0,SM1,SM2,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVL, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+15113, 351, 2311}, + /* 4 : CMOVL reg32,reg32,rm32 [vrm: evex.nf0.nd1.l0.m4.o32 4c /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(4c) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVL, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+15273, 352, 2312}, + /* 5 : CMOVL reg64,reg64,rm64 [vrm: evex.nf0.nd1.l0.m4.o64 4c /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(4c) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVL, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+15433, 352, 2313}, +}; + +static const struct itemplate instrux_CMOVLE[6] = { + /* 0 : CMOVLE reg16,rm16 [rm: o16 0f 4e /r ] SM0-1,P6,ND */ + /* 320 355 001(4e) 110 : SM0,SM1,P6 */ + {I_CMOVLE, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+68115, 350, 2308}, + /* 1 : CMOVLE reg32,rm32 [rm: o32 0f 4e /r ] SM0-1,P6,ND */ + /* 321 355 001(4e) 110 : SM0,SM1,P6 */ + {I_CMOVLE, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68211, 350, 2309}, + /* 2 : CMOVLE reg64,rm64 [rm: o64 0f 4e /r ] SM0-1,LONG,PROT,X86_64,ND */ + /* 324 355 001(4e) 110 : SM0,SM1,LONG,PROT,X86_64 */ + {I_CMOVLE, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+68307, 14, 2310}, + /* 3 : CMOVLE reg16,reg16,rm16 [vrm: evex.nf0.nd1.l0.m4.o16 4e /r ] SM0-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 7d 18) 300 320 001(4e) 121 : SM0,SM1,SM2,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVLE, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+15123, 351, 2311}, + /* 4 : CMOVLE reg32,reg32,rm32 [vrm: evex.nf0.nd1.l0.m4.o32 4e /r ] SM0-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 7c 18) 300 321 001(4e) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVLE, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+15283, 352, 2312}, + /* 5 : CMOVLE reg64,reg64,rm64 [vrm: evex.nf0.nd1.l0.m4.o64 4e /r ] SM0-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 fc 18) 300 324 001(4e) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVLE, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+15443, 352, 2313}, +}; + +static const struct itemplate instrux_CMOVNA[6] = { + /* 0 : CMOVNA reg16,rm16 [rm: o16 0f 46 /r ] SM0-1,P6 */ + /* 320 355 001(46) 110 : SM0,SM1,P6 */ + {I_CMOVNA, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+68085, 350, 2308}, + /* 1 : CMOVNA reg32,rm32 [rm: o32 0f 46 /r ] SM0-1,P6 */ + /* 321 355 001(46) 110 : SM0,SM1,P6 */ + {I_CMOVNA, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68181, 350, 2309}, + /* 2 : CMOVNA reg64,rm64 [rm: o64 0f 46 /r ] SM0-1,LONG,PROT,X86_64 */ + /* 324 355 001(46) 110 : SM0,SM1,LONG,PROT,X86_64 */ + {I_CMOVNA, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+68277, 14, 2310}, + /* 3 : CMOVNA reg16,reg16,rm16 [vrm: evex.nf0.nd1.l0.m4.o16 46 /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(46) 121 : SM0,SM1,SM2,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVNA, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+15073, 351, 2311}, + /* 4 : CMOVNA reg32,reg32,rm32 [vrm: evex.nf0.nd1.l0.m4.o32 46 /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(46) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVNA, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+15233, 352, 2312}, + /* 5 : CMOVNA reg64,reg64,rm64 [vrm: evex.nf0.nd1.l0.m4.o64 46 /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(46) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVNA, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+15393, 352, 2313}, +}; + +static const struct itemplate instrux_CMOVNAE[6] = { + /* 0 : CMOVNAE reg16,rm16 [rm: o16 0f 42 /r ] SM0-1,P6,ND */ + /* 320 355 001(42) 110 : SM0,SM1,P6 */ + {I_CMOVNAE, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+68079, 350, 2308}, + /* 1 : CMOVNAE reg32,rm32 [rm: o32 0f 42 /r ] SM0-1,P6,ND */ + /* 321 355 001(42) 110 : SM0,SM1,P6 */ + {I_CMOVNAE, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68175, 350, 2309}, + /* 2 : CMOVNAE reg64,rm64 [rm: o64 0f 42 /r ] SM0-1,LONG,PROT,X86_64,ND */ + /* 324 355 001(42) 110 : SM0,SM1,LONG,PROT,X86_64 */ + {I_CMOVNAE, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+68271, 14, 2310}, + /* 3 : CMOVNAE reg16,reg16,rm16 [vrm: evex.nf0.nd1.l0.m4.o16 42 /r ] SM0-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 7d 18) 300 320 001(42) 121 : SM0,SM1,SM2,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVNAE, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+15063, 351, 2311}, + /* 4 : CMOVNAE reg32,reg32,rm32 [vrm: evex.nf0.nd1.l0.m4.o32 42 /r ] SM0-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 7c 18) 300 321 001(42) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVNAE, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+15223, 352, 2312}, + /* 5 : CMOVNAE reg64,reg64,rm64 [vrm: evex.nf0.nd1.l0.m4.o64 42 /r ] SM0-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 fc 18) 300 324 001(42) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVNAE, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+15383, 352, 2313}, +}; + +static const struct itemplate instrux_CMOVNB[6] = { + /* 0 : CMOVNB reg16,rm16 [rm: o16 0f 43 /r ] SM0-1,P6,ND */ + /* 320 355 001(43) 110 : SM0,SM1,P6 */ + {I_CMOVNB, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+68073, 350, 2308}, + /* 1 : CMOVNB reg32,rm32 [rm: o32 0f 43 /r ] SM0-1,P6,ND */ + /* 321 355 001(43) 110 : SM0,SM1,P6 */ + {I_CMOVNB, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68169, 350, 2309}, + /* 2 : CMOVNB reg64,rm64 [rm: o64 0f 43 /r ] SM0-1,LONG,PROT,X86_64,ND */ + /* 324 355 001(43) 110 : SM0,SM1,LONG,PROT,X86_64 */ + {I_CMOVNB, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+68265, 14, 2310}, + /* 3 : CMOVNB reg16,reg16,rm16 [vrm: evex.nf0.nd1.l0.m4.o16 43 /r ] SM0-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 7d 18) 300 320 001(43) 121 : SM0,SM1,SM2,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVNB, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+15053, 351, 2311}, + /* 4 : CMOVNB reg32,reg32,rm32 [vrm: evex.nf0.nd1.l0.m4.o32 43 /r ] SM0-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 7c 18) 300 321 001(43) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVNB, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+15213, 352, 2312}, + /* 5 : CMOVNB reg64,reg64,rm64 [vrm: evex.nf0.nd1.l0.m4.o64 43 /r ] SM0-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 fc 18) 300 324 001(43) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVNB, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+15373, 352, 2313}, +}; + +static const struct itemplate instrux_CMOVNBE[6] = { + /* 0 : CMOVNBE reg16,rm16 [rm: o16 0f 47 /r ] SM0-1,P6,ND */ + /* 320 355 001(47) 110 : SM0,SM1,P6 */ + {I_CMOVNBE, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+68067, 350, 2308}, + /* 1 : CMOVNBE reg32,rm32 [rm: o32 0f 47 /r ] SM0-1,P6,ND */ + /* 321 355 001(47) 110 : SM0,SM1,P6 */ + {I_CMOVNBE, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68163, 350, 2309}, + /* 2 : CMOVNBE reg64,rm64 [rm: o64 0f 47 /r ] SM0-1,LONG,PROT,X86_64,ND */ + /* 324 355 001(47) 110 : SM0,SM1,LONG,PROT,X86_64 */ + {I_CMOVNBE, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+68259, 14, 2310}, + /* 3 : CMOVNBE reg16,reg16,rm16 [vrm: evex.nf0.nd1.l0.m4.o16 47 /r ] SM0-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 7d 18) 300 320 001(47) 121 : SM0,SM1,SM2,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVNBE, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+15043, 351, 2311}, + /* 4 : CMOVNBE reg32,reg32,rm32 [vrm: evex.nf0.nd1.l0.m4.o32 47 /r ] SM0-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 7c 18) 300 321 001(47) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVNBE, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+15203, 352, 2312}, + /* 5 : CMOVNBE reg64,reg64,rm64 [vrm: evex.nf0.nd1.l0.m4.o64 47 /r ] SM0-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 fc 18) 300 324 001(47) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVNBE, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+15363, 352, 2313}, +}; + +static const struct itemplate instrux_CMOVNC[6] = { + /* 0 : CMOVNC reg16,rm16 [rm: o16 0f 43 /r ] SM0-1,P6 */ + /* 320 355 001(43) 110 : SM0,SM1,P6 */ + {I_CMOVNC, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+68073, 350, 2308}, + /* 1 : CMOVNC reg32,rm32 [rm: o32 0f 43 /r ] SM0-1,P6 */ + /* 321 355 001(43) 110 : SM0,SM1,P6 */ + {I_CMOVNC, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68169, 350, 2309}, + /* 2 : CMOVNC reg64,rm64 [rm: o64 0f 43 /r ] SM0-1,LONG,PROT,X86_64 */ + /* 324 355 001(43) 110 : SM0,SM1,LONG,PROT,X86_64 */ + {I_CMOVNC, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+68265, 14, 2310}, + /* 3 : CMOVNC reg16,reg16,rm16 [vrm: evex.nf0.nd1.l0.m4.o16 43 /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(43) 121 : SM0,SM1,SM2,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVNC, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+15053, 351, 2311}, + /* 4 : CMOVNC reg32,reg32,rm32 [vrm: evex.nf0.nd1.l0.m4.o32 43 /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(43) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVNC, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+15213, 352, 2312}, + /* 5 : CMOVNC reg64,reg64,rm64 [vrm: evex.nf0.nd1.l0.m4.o64 43 /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(43) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVNC, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+15373, 352, 2313}, +}; + +static const struct itemplate instrux_CMOVNE[6] = { + /* 0 : CMOVNE reg16,rm16 [rm: o16 0f 45 /r ] SM0-1,P6,ND */ + /* 320 355 001(45) 110 : SM0,SM1,P6 */ + {I_CMOVNE, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+68121, 350, 2308}, + /* 1 : CMOVNE reg32,rm32 [rm: o32 0f 45 /r ] SM0-1,P6,ND */ + /* 321 355 001(45) 110 : SM0,SM1,P6 */ + {I_CMOVNE, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68217, 350, 2309}, + /* 2 : CMOVNE reg64,rm64 [rm: o64 0f 45 /r ] SM0-1,LONG,PROT,X86_64,ND */ + /* 324 355 001(45) 110 : SM0,SM1,LONG,PROT,X86_64 */ + {I_CMOVNE, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+68313, 14, 2310}, + /* 3 : CMOVNE reg16,reg16,rm16 [vrm: evex.nf0.nd1.l0.m4.o16 45 /r ] SM0-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 7d 18) 300 320 001(45) 121 : SM0,SM1,SM2,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVNE, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+15133, 351, 2311}, + /* 4 : CMOVNE reg32,reg32,rm32 [vrm: evex.nf0.nd1.l0.m4.o32 45 /r ] SM0-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 7c 18) 300 321 001(45) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVNE, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+15293, 352, 2312}, + /* 5 : CMOVNE reg64,reg64,rm64 [vrm: evex.nf0.nd1.l0.m4.o64 45 /r ] SM0-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 fc 18) 300 324 001(45) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVNE, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+15453, 352, 2313}, +}; + +static const struct itemplate instrux_CMOVNG[6] = { + /* 0 : CMOVNG reg16,rm16 [rm: o16 0f 4e /r ] SM0-1,P6 */ + /* 320 355 001(4e) 110 : SM0,SM1,P6 */ + {I_CMOVNG, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+68115, 350, 2308}, + /* 1 : CMOVNG reg32,rm32 [rm: o32 0f 4e /r ] SM0-1,P6 */ + /* 321 355 001(4e) 110 : SM0,SM1,P6 */ + {I_CMOVNG, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68211, 350, 2309}, + /* 2 : CMOVNG reg64,rm64 [rm: o64 0f 4e /r ] SM0-1,LONG,PROT,X86_64 */ + /* 324 355 001(4e) 110 : SM0,SM1,LONG,PROT,X86_64 */ + {I_CMOVNG, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+68307, 14, 2310}, + /* 3 : CMOVNG reg16,reg16,rm16 [vrm: evex.nf0.nd1.l0.m4.o16 4e /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(4e) 121 : SM0,SM1,SM2,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVNG, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+15123, 351, 2311}, + /* 4 : CMOVNG reg32,reg32,rm32 [vrm: evex.nf0.nd1.l0.m4.o32 4e /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(4e) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVNG, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+15283, 352, 2312}, + /* 5 : CMOVNG reg64,reg64,rm64 [vrm: evex.nf0.nd1.l0.m4.o64 4e /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(4e) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVNG, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+15443, 352, 2313}, +}; + +static const struct itemplate instrux_CMOVNGE[6] = { + /* 0 : CMOVNGE reg16,rm16 [rm: o16 0f 4c /r ] SM0-1,P6,ND */ + /* 320 355 001(4c) 110 : SM0,SM1,P6 */ + {I_CMOVNGE, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+68109, 350, 2308}, + /* 1 : CMOVNGE reg32,rm32 [rm: o32 0f 4c /r ] SM0-1,P6,ND */ + /* 321 355 001(4c) 110 : SM0,SM1,P6 */ + {I_CMOVNGE, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68205, 350, 2309}, + /* 2 : CMOVNGE reg64,rm64 [rm: o64 0f 4c /r ] SM0-1,LONG,PROT,X86_64,ND */ + /* 324 355 001(4c) 110 : SM0,SM1,LONG,PROT,X86_64 */ + {I_CMOVNGE, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+68301, 14, 2310}, + /* 3 : CMOVNGE reg16,reg16,rm16 [vrm: evex.nf0.nd1.l0.m4.o16 4c /r ] SM0-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 7d 18) 300 320 001(4c) 121 : SM0,SM1,SM2,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVNGE, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+15113, 351, 2311}, + /* 4 : CMOVNGE reg32,reg32,rm32 [vrm: evex.nf0.nd1.l0.m4.o32 4c /r ] SM0-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 7c 18) 300 321 001(4c) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVNGE, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+15273, 352, 2312}, + /* 5 : CMOVNGE reg64,reg64,rm64 [vrm: evex.nf0.nd1.l0.m4.o64 4c /r ] SM0-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 fc 18) 300 324 001(4c) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVNGE, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+15433, 352, 2313}, +}; + +static const struct itemplate instrux_CMOVNL[6] = { + /* 0 : CMOVNL reg16,rm16 [rm: o16 0f 4d /r ] SM0-1,P6 */ + /* 320 355 001(4d) 110 : SM0,SM1,P6 */ + {I_CMOVNL, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+68103, 350, 2308}, + /* 1 : CMOVNL reg32,rm32 [rm: o32 0f 4d /r ] SM0-1,P6 */ + /* 321 355 001(4d) 110 : SM0,SM1,P6 */ + {I_CMOVNL, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68199, 350, 2309}, + /* 2 : CMOVNL reg64,rm64 [rm: o64 0f 4d /r ] SM0-1,LONG,PROT,X86_64 */ + /* 324 355 001(4d) 110 : SM0,SM1,LONG,PROT,X86_64 */ + {I_CMOVNL, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+68295, 14, 2310}, + /* 3 : CMOVNL reg16,reg16,rm16 [vrm: evex.nf0.nd1.l0.m4.o16 4d /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(4d) 121 : SM0,SM1,SM2,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVNL, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+15103, 351, 2311}, + /* 4 : CMOVNL reg32,reg32,rm32 [vrm: evex.nf0.nd1.l0.m4.o32 4d /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(4d) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVNL, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+15263, 352, 2312}, + /* 5 : CMOVNL reg64,reg64,rm64 [vrm: evex.nf0.nd1.l0.m4.o64 4d /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(4d) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVNL, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+15423, 352, 2313}, +}; + +static const struct itemplate instrux_CMOVNLE[6] = { + /* 0 : CMOVNLE reg16,rm16 [rm: o16 0f 4f /r ] SM0-1,P6,ND */ + /* 320 355 001(4f) 110 : SM0,SM1,P6 */ + {I_CMOVNLE, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+68097, 350, 2308}, + /* 1 : CMOVNLE reg32,rm32 [rm: o32 0f 4f /r ] SM0-1,P6,ND */ + /* 321 355 001(4f) 110 : SM0,SM1,P6 */ + {I_CMOVNLE, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68193, 350, 2309}, + /* 2 : CMOVNLE reg64,rm64 [rm: o64 0f 4f /r ] SM0-1,LONG,PROT,X86_64,ND */ + /* 324 355 001(4f) 110 : SM0,SM1,LONG,PROT,X86_64 */ + {I_CMOVNLE, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+68289, 14, 2310}, + /* 3 : CMOVNLE reg16,reg16,rm16 [vrm: evex.nf0.nd1.l0.m4.o16 4f /r ] SM0-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 7d 18) 300 320 001(4f) 121 : SM0,SM1,SM2,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVNLE, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+15093, 351, 2311}, + /* 4 : CMOVNLE reg32,reg32,rm32 [vrm: evex.nf0.nd1.l0.m4.o32 4f /r ] SM0-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 7c 18) 300 321 001(4f) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVNLE, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+15253, 352, 2312}, + /* 5 : CMOVNLE reg64,reg64,rm64 [vrm: evex.nf0.nd1.l0.m4.o64 4f /r ] SM0-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 fc 18) 300 324 001(4f) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVNLE, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+15413, 352, 2313}, +}; + +static const struct itemplate instrux_CMOVNO[6] = { + /* 0 : CMOVNO reg16,rm16 [rm: o16 0f 41 /r ] SM0-1,P6 */ + /* 320 355 001(41) 110 : SM0,SM1,P6 */ + {I_CMOVNO, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+68127, 350, 2308}, + /* 1 : CMOVNO reg32,rm32 [rm: o32 0f 41 /r ] SM0-1,P6 */ + /* 321 355 001(41) 110 : SM0,SM1,P6 */ + {I_CMOVNO, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68223, 350, 2309}, + /* 2 : CMOVNO reg64,rm64 [rm: o64 0f 41 /r ] SM0-1,LONG,PROT,X86_64 */ + /* 324 355 001(41) 110 : SM0,SM1,LONG,PROT,X86_64 */ + {I_CMOVNO, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+68319, 14, 2310}, + /* 3 : CMOVNO reg16,reg16,rm16 [vrm: evex.nf0.nd1.l0.m4.o16 41 /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(41) 121 : SM0,SM1,SM2,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVNO, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+15143, 351, 2311}, + /* 4 : CMOVNO reg32,reg32,rm32 [vrm: evex.nf0.nd1.l0.m4.o32 41 /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(41) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVNO, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+15303, 352, 2312}, + /* 5 : CMOVNO reg64,reg64,rm64 [vrm: evex.nf0.nd1.l0.m4.o64 41 /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(41) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVNO, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+15463, 352, 2313}, +}; + +static const struct itemplate instrux_CMOVNP[6] = { + /* 0 : CMOVNP reg16,rm16 [rm: o16 0f 4b /r ] SM0-1,P6,ND */ + /* 320 355 001(4b) 110 : SM0,SM1,P6 */ + {I_CMOVNP, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+68133, 350, 2308}, + /* 1 : CMOVNP reg32,rm32 [rm: o32 0f 4b /r ] SM0-1,P6,ND */ + /* 321 355 001(4b) 110 : SM0,SM1,P6 */ + {I_CMOVNP, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68229, 350, 2309}, + /* 2 : CMOVNP reg64,rm64 [rm: o64 0f 4b /r ] SM0-1,LONG,PROT,X86_64,ND */ + /* 324 355 001(4b) 110 : SM0,SM1,LONG,PROT,X86_64 */ + {I_CMOVNP, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+68325, 14, 2310}, + /* 3 : CMOVNP reg16,reg16,rm16 [vrm: evex.nf0.nd1.l0.m4.o16 4b /r ] SM0-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 7d 18) 300 320 001(4b) 121 : SM0,SM1,SM2,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVNP, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+15153, 351, 2311}, + /* 4 : CMOVNP reg32,reg32,rm32 [vrm: evex.nf0.nd1.l0.m4.o32 4b /r ] SM0-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 7c 18) 300 321 001(4b) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVNP, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+15313, 352, 2312}, + /* 5 : CMOVNP reg64,reg64,rm64 [vrm: evex.nf0.nd1.l0.m4.o64 4b /r ] SM0-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 fc 18) 300 324 001(4b) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVNP, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+15473, 352, 2313}, +}; + +static const struct itemplate instrux_CMOVNS[6] = { + /* 0 : CMOVNS reg16,rm16 [rm: o16 0f 49 /r ] SM0-1,P6 */ + /* 320 355 001(49) 110 : SM0,SM1,P6 */ + {I_CMOVNS, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+68139, 350, 2308}, + /* 1 : CMOVNS reg32,rm32 [rm: o32 0f 49 /r ] SM0-1,P6 */ + /* 321 355 001(49) 110 : SM0,SM1,P6 */ + {I_CMOVNS, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68235, 350, 2309}, + /* 2 : CMOVNS reg64,rm64 [rm: o64 0f 49 /r ] SM0-1,LONG,PROT,X86_64 */ + /* 324 355 001(49) 110 : SM0,SM1,LONG,PROT,X86_64 */ + {I_CMOVNS, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+68331, 14, 2310}, + /* 3 : CMOVNS reg16,reg16,rm16 [vrm: evex.nf0.nd1.l0.m4.o16 49 /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(49) 121 : SM0,SM1,SM2,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVNS, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+15163, 351, 2311}, + /* 4 : CMOVNS reg32,reg32,rm32 [vrm: evex.nf0.nd1.l0.m4.o32 49 /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(49) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVNS, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+15323, 352, 2312}, + /* 5 : CMOVNS reg64,reg64,rm64 [vrm: evex.nf0.nd1.l0.m4.o64 49 /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(49) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVNS, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+15483, 352, 2313}, +}; + +static const struct itemplate instrux_CMOVNZ[6] = { + /* 0 : CMOVNZ reg16,rm16 [rm: o16 0f 45 /r ] SM0-1,P6 */ + /* 320 355 001(45) 110 : SM0,SM1,P6 */ + {I_CMOVNZ, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+68121, 350, 2308}, + /* 1 : CMOVNZ reg32,rm32 [rm: o32 0f 45 /r ] SM0-1,P6 */ + /* 321 355 001(45) 110 : SM0,SM1,P6 */ + {I_CMOVNZ, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68217, 350, 2309}, + /* 2 : CMOVNZ reg64,rm64 [rm: o64 0f 45 /r ] SM0-1,LONG,PROT,X86_64 */ + /* 324 355 001(45) 110 : SM0,SM1,LONG,PROT,X86_64 */ + {I_CMOVNZ, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+68313, 14, 2310}, + /* 3 : CMOVNZ reg16,reg16,rm16 [vrm: evex.nf0.nd1.l0.m4.o16 45 /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(45) 121 : SM0,SM1,SM2,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVNZ, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+15133, 351, 2311}, + /* 4 : CMOVNZ reg32,reg32,rm32 [vrm: evex.nf0.nd1.l0.m4.o32 45 /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(45) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVNZ, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+15293, 352, 2312}, + /* 5 : CMOVNZ reg64,reg64,rm64 [vrm: evex.nf0.nd1.l0.m4.o64 45 /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(45) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVNZ, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+15453, 352, 2313}, +}; + +static const struct itemplate instrux_CMOVO[6] = { + /* 0 : CMOVO reg16,rm16 [rm: o16 0f 40 /r ] SM0-1,P6 */ + /* 320 355 001(40) 110 : SM0,SM1,P6 */ + {I_CMOVO, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+68145, 350, 2308}, + /* 1 : CMOVO reg32,rm32 [rm: o32 0f 40 /r ] SM0-1,P6 */ + /* 321 355 001(40) 110 : SM0,SM1,P6 */ + {I_CMOVO, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68241, 350, 2309}, + /* 2 : CMOVO reg64,rm64 [rm: o64 0f 40 /r ] SM0-1,LONG,PROT,X86_64 */ + /* 324 355 001(40) 110 : SM0,SM1,LONG,PROT,X86_64 */ + {I_CMOVO, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+68337, 14, 2310}, + /* 3 : CMOVO reg16,reg16,rm16 [vrm: evex.nf0.nd1.l0.m4.o16 40 /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(40) 121 : SM0,SM1,SM2,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVO, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+15173, 351, 2311}, + /* 4 : CMOVO reg32,reg32,rm32 [vrm: evex.nf0.nd1.l0.m4.o32 40 /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(40) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVO, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+15333, 352, 2312}, + /* 5 : CMOVO reg64,reg64,rm64 [vrm: evex.nf0.nd1.l0.m4.o64 40 /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(40) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVO, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+15493, 352, 2313}, +}; + +static const struct itemplate instrux_CMOVP[6] = { + /* 0 : CMOVP reg16,rm16 [rm: o16 0f 4a /r ] SM0-1,P6,ND */ + /* 320 355 001(4a) 110 : SM0,SM1,P6 */ + {I_CMOVP, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+68151, 350, 2308}, + /* 1 : CMOVP reg32,rm32 [rm: o32 0f 4a /r ] SM0-1,P6,ND */ + /* 321 355 001(4a) 110 : SM0,SM1,P6 */ + {I_CMOVP, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68247, 350, 2309}, + /* 2 : CMOVP reg64,rm64 [rm: o64 0f 4a /r ] SM0-1,LONG,PROT,X86_64,ND */ + /* 324 355 001(4a) 110 : SM0,SM1,LONG,PROT,X86_64 */ + {I_CMOVP, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+68343, 14, 2310}, + /* 3 : CMOVP reg16,reg16,rm16 [vrm: evex.nf0.nd1.l0.m4.o16 4a /r ] SM0-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 7d 18) 300 320 001(4a) 121 : SM0,SM1,SM2,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVP, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+15183, 351, 2311}, + /* 4 : CMOVP reg32,reg32,rm32 [vrm: evex.nf0.nd1.l0.m4.o32 4a /r ] SM0-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 7c 18) 300 321 001(4a) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVP, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+15343, 352, 2312}, + /* 5 : CMOVP reg64,reg64,rm64 [vrm: evex.nf0.nd1.l0.m4.o64 4a /r ] SM0-2,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 fc 18) 300 324 001(4a) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVP, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+15503, 352, 2313}, +}; + +static const struct itemplate instrux_CMOVPE[6] = { + /* 0 : CMOVPE reg16,rm16 [rm: o16 0f 4a /r ] SM0-1,P6 */ + /* 320 355 001(4a) 110 : SM0,SM1,P6 */ + {I_CMOVPE, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+68151, 350, 2308}, + /* 1 : CMOVPE reg32,rm32 [rm: o32 0f 4a /r ] SM0-1,P6 */ + /* 321 355 001(4a) 110 : SM0,SM1,P6 */ + {I_CMOVPE, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68247, 350, 2309}, + /* 2 : CMOVPE reg64,rm64 [rm: o64 0f 4a /r ] SM0-1,LONG,PROT,X86_64 */ + /* 324 355 001(4a) 110 : SM0,SM1,LONG,PROT,X86_64 */ + {I_CMOVPE, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+68343, 14, 2310}, + /* 3 : CMOVPE reg16,reg16,rm16 [vrm: evex.nf0.nd1.l0.m4.o16 4a /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(4a) 121 : SM0,SM1,SM2,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVPE, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+15183, 351, 2311}, + /* 4 : CMOVPE reg32,reg32,rm32 [vrm: evex.nf0.nd1.l0.m4.o32 4a /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(4a) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVPE, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+15343, 352, 2312}, + /* 5 : CMOVPE reg64,reg64,rm64 [vrm: evex.nf0.nd1.l0.m4.o64 4a /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(4a) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVPE, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+15503, 352, 2313}, +}; + +static const struct itemplate instrux_CMOVPO[6] = { + /* 0 : CMOVPO reg16,rm16 [rm: o16 0f 4b /r ] SM0-1,P6 */ + /* 320 355 001(4b) 110 : SM0,SM1,P6 */ + {I_CMOVPO, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+68133, 350, 2308}, + /* 1 : CMOVPO reg32,rm32 [rm: o32 0f 4b /r ] SM0-1,P6 */ + /* 321 355 001(4b) 110 : SM0,SM1,P6 */ + {I_CMOVPO, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68229, 350, 2309}, + /* 2 : CMOVPO reg64,rm64 [rm: o64 0f 4b /r ] SM0-1,LONG,PROT,X86_64 */ + /* 324 355 001(4b) 110 : SM0,SM1,LONG,PROT,X86_64 */ + {I_CMOVPO, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+68325, 14, 2310}, + /* 3 : CMOVPO reg16,reg16,rm16 [vrm: evex.nf0.nd1.l0.m4.o16 4b /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(4b) 121 : SM0,SM1,SM2,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVPO, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+15153, 351, 2311}, + /* 4 : CMOVPO reg32,reg32,rm32 [vrm: evex.nf0.nd1.l0.m4.o32 4b /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(4b) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVPO, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+15313, 352, 2312}, + /* 5 : CMOVPO reg64,reg64,rm64 [vrm: evex.nf0.nd1.l0.m4.o64 4b /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(4b) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVPO, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+15473, 352, 2313}, +}; + +static const struct itemplate instrux_CMOVS[6] = { + /* 0 : CMOVS reg16,rm16 [rm: o16 0f 48 /r ] SM0-1,P6 */ + /* 320 355 001(48) 110 : SM0,SM1,P6 */ + {I_CMOVS, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+68157, 350, 2308}, + /* 1 : CMOVS reg32,rm32 [rm: o32 0f 48 /r ] SM0-1,P6 */ + /* 321 355 001(48) 110 : SM0,SM1,P6 */ + {I_CMOVS, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68253, 350, 2309}, + /* 2 : CMOVS reg64,rm64 [rm: o64 0f 48 /r ] SM0-1,LONG,PROT,X86_64 */ + /* 324 355 001(48) 110 : SM0,SM1,LONG,PROT,X86_64 */ + {I_CMOVS, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+68349, 14, 2310}, + /* 3 : CMOVS reg16,reg16,rm16 [vrm: evex.nf0.nd1.l0.m4.o16 48 /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(48) 121 : SM0,SM1,SM2,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVS, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+15193, 351, 2311}, + /* 4 : CMOVS reg32,reg32,rm32 [vrm: evex.nf0.nd1.l0.m4.o32 48 /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(48) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVS, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+15353, 352, 2312}, + /* 5 : CMOVS reg64,reg64,rm64 [vrm: evex.nf0.nd1.l0.m4.o64 48 /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(48) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVS, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+15513, 352, 2313}, +}; + +static const struct itemplate instrux_CMOVZ[6] = { + /* 0 : CMOVZ reg16,rm16 [rm: o16 0f 44 /r ] SM0-1,P6 */ + /* 320 355 001(44) 110 : SM0,SM1,P6 */ + {I_CMOVZ, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+68091, 350, 2308}, + /* 1 : CMOVZ reg32,rm32 [rm: o32 0f 44 /r ] SM0-1,P6 */ + /* 321 355 001(44) 110 : SM0,SM1,P6 */ + {I_CMOVZ, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68187, 350, 2309}, + /* 2 : CMOVZ reg64,rm64 [rm: o64 0f 44 /r ] SM0-1,LONG,PROT,X86_64 */ + /* 324 355 001(44) 110 : SM0,SM1,LONG,PROT,X86_64 */ + {I_CMOVZ, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+68283, 14, 2310}, + /* 3 : CMOVZ reg16,reg16,rm16 [vrm: evex.nf0.nd1.l0.m4.o16 44 /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(44) 121 : SM0,SM1,SM2,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVZ, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+15083, 351, 2311}, + /* 4 : CMOVZ reg32,reg32,rm32 [vrm: evex.nf0.nd1.l0.m4.o32 44 /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(44) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVZ, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+15243, 352, 2312}, + /* 5 : CMOVZ reg64,reg64,rm64 [vrm: evex.nf0.nd1.l0.m4.o64 44 /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(44) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVZ, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+15403, 352, 2313}, +}; + +static const struct itemplate instrux_CFCMOVA[15] = { + /* 0 : CFCMOVA rm16,reg16 [mr: evex.nf1.nd0.l0.m4.o16 47 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 0c) 300 320 001(47) 101 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVA, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+15523, 353, 2314}, + /* 1 : CFCMOVA rm32,reg32 [mr: evex.nf1.nd0.l0.m4.o32 47 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 0c) 300 321 001(47) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVA, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+15683, 354, 2315}, + /* 2 : CFCMOVA rm64,reg64 [mr: evex.nf1.nd0.l0.m4.o64 47 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 0c) 300 324 001(47) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVA, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+15843, 354, 2316}, + /* 3 : CFCMOVA reg16,rm16 [rm: evex.nf0.nd0.l0.m4.o16 47 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(47) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVA, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16003, 353, 2317}, + /* 4 : CFCMOVA reg32,rm32 [rm: evex.nf0.nd0.l0.m4.o32 47 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(47) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVA, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+16163, 354, 2318}, + /* 5 : CFCMOVA reg64,rm64 [rm: evex.nf0.nd0.l0.m4.o64 47 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(47) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVA, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+16323, 354, 2319}, + /* 6 : CFCMOVA reg16?,reg16,rm16 [vrm: evex.nf1.nd1.l0.m4.o16 47 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 1c) 300 320 001(47) 121 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVA, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+16483, 355, 2320}, + /* 7 : CFCMOVA reg16,rm16 [rm: evex.nf1.nd0.l0.m4.o16 47 /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 0c) 300 320 001(47) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVA, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16643, 353, 2320}, + /* 8 : CFCMOVA reg16?,rm16 [v+rm: evex.nf1.nd1.l0.m4.o16 47 /r ] SM0,ND,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 1c) 300 320 001(47) 110 : SM0,SM1,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVA, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16803, 356, 2320}, + /* 9 : CFCMOVA reg32?,reg32,rm32 [vrm: evex.nf1.nd1.l0.m4.o32 47 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 1c) 300 321 001(47) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVA, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+16963, 357, 2321}, + /* 10 : CFCMOVA reg32,rm32 [rm: evex.nf1.nd0.l0.m4.o32 47 /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 0c) 300 321 001(47) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVA, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17123, 354, 2321}, + /* 11 : CFCMOVA reg32?,rm32 [v+rm: evex.nf1.nd1.l0.m4.o32 47 /r ] SM0,ND,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 1c) 300 321 001(47) 110 : SM0,SM1,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVA, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17283, 358, 2321}, + /* 12 : CFCMOVA reg64?,reg64,rm64 [vrm: evex.nf1.nd1.l0.m4.o64 47 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 1c) 300 324 001(47) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVA, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+17443, 357, 2322}, + /* 13 : CFCMOVA reg64,rm64 [rm: evex.nf1.nd0.l0.m4.o64 47 /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 0c) 300 324 001(47) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVA, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17603, 354, 2322}, + /* 14 : CFCMOVA reg64?,rm64 [v+rm: evex.nf1.nd1.l0.m4.o64 47 /r ] ND,SM0,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 1c) 300 324 001(47) 110 : SM0,SM1,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVA, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17763, 358, 2322}, +}; + +static const struct itemplate instrux_CFCMOVAE[15] = { + /* 0 : CFCMOVAE rm16,reg16 [mr: evex.nf1.nd0.l0.m4.o16 43 /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7d 0c) 300 320 001(43) 101 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVAE, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+15533, 353, 2314}, + /* 1 : CFCMOVAE rm32,reg32 [mr: evex.nf1.nd0.l0.m4.o32 43 /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7c 0c) 300 321 001(43) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVAE, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+15693, 354, 2315}, + /* 2 : CFCMOVAE rm64,reg64 [mr: evex.nf1.nd0.l0.m4.o64 43 /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 fc 0c) 300 324 001(43) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVAE, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+15853, 354, 2316}, + /* 3 : CFCMOVAE reg16,rm16 [rm: evex.nf0.nd0.l0.m4.o16 43 /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7d 08) 300 320 001(43) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVAE, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16013, 353, 2317}, + /* 4 : CFCMOVAE reg32,rm32 [rm: evex.nf0.nd0.l0.m4.o32 43 /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7c 08) 300 321 001(43) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVAE, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+16173, 354, 2318}, + /* 5 : CFCMOVAE reg64,rm64 [rm: evex.nf0.nd0.l0.m4.o64 43 /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 fc 08) 300 324 001(43) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVAE, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+16333, 354, 2319}, + /* 6 : CFCMOVAE reg16?,reg16,rm16 [vrm: evex.nf1.nd1.l0.m4.o16 43 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 7d 1c) 300 320 001(43) 121 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVAE, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+16493, 355, 2320}, + /* 7 : CFCMOVAE reg16,rm16 [rm: evex.nf1.nd0.l0.m4.o16 43 /r ] SM0,SM1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7d 0c) 300 320 001(43) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVAE, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16653, 353, 2320}, + /* 8 : CFCMOVAE reg16?,rm16 [v+rm: evex.nf1.nd1.l0.m4.o16 43 /r ] SM0,ND,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 1c) 300 320 001(43) 110 : SM0,SM1,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVAE, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16813, 356, 2320}, + /* 9 : CFCMOVAE reg32?,reg32,rm32 [vrm: evex.nf1.nd1.l0.m4.o32 43 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 7c 1c) 300 321 001(43) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVAE, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+16973, 357, 2321}, + /* 10 : CFCMOVAE reg32,rm32 [rm: evex.nf1.nd0.l0.m4.o32 43 /r ] SM0,SM1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7c 0c) 300 321 001(43) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVAE, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17133, 354, 2321}, + /* 11 : CFCMOVAE reg32?,rm32 [v+rm: evex.nf1.nd1.l0.m4.o32 43 /r ] SM0,ND,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 1c) 300 321 001(43) 110 : SM0,SM1,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVAE, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17293, 358, 2321}, + /* 12 : CFCMOVAE reg64?,reg64,rm64 [vrm: evex.nf1.nd1.l0.m4.o64 43 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 fc 1c) 300 324 001(43) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVAE, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+17453, 357, 2322}, + /* 13 : CFCMOVAE reg64,rm64 [rm: evex.nf1.nd0.l0.m4.o64 43 /r ] SM0,SM1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 fc 0c) 300 324 001(43) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVAE, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17613, 354, 2322}, + /* 14 : CFCMOVAE reg64?,rm64 [v+rm: evex.nf1.nd1.l0.m4.o64 43 /r ] ND,SM0,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 1c) 300 324 001(43) 110 : SM0,SM1,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVAE, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17773, 358, 2322}, +}; + +static const struct itemplate instrux_CFCMOVB[15] = { + /* 0 : CFCMOVB rm16,reg16 [mr: evex.nf1.nd0.l0.m4.o16 42 /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7d 0c) 300 320 001(42) 101 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVB, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+15543, 353, 2314}, + /* 1 : CFCMOVB rm32,reg32 [mr: evex.nf1.nd0.l0.m4.o32 42 /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7c 0c) 300 321 001(42) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVB, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+15703, 354, 2315}, + /* 2 : CFCMOVB rm64,reg64 [mr: evex.nf1.nd0.l0.m4.o64 42 /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 fc 0c) 300 324 001(42) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVB, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+15863, 354, 2316}, + /* 3 : CFCMOVB reg16,rm16 [rm: evex.nf0.nd0.l0.m4.o16 42 /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7d 08) 300 320 001(42) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVB, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16023, 353, 2317}, + /* 4 : CFCMOVB reg32,rm32 [rm: evex.nf0.nd0.l0.m4.o32 42 /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7c 08) 300 321 001(42) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVB, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+16183, 354, 2318}, + /* 5 : CFCMOVB reg64,rm64 [rm: evex.nf0.nd0.l0.m4.o64 42 /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 fc 08) 300 324 001(42) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVB, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+16343, 354, 2319}, + /* 6 : CFCMOVB reg16?,reg16,rm16 [vrm: evex.nf1.nd1.l0.m4.o16 42 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 7d 1c) 300 320 001(42) 121 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVB, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+16503, 355, 2320}, + /* 7 : CFCMOVB reg16,rm16 [rm: evex.nf1.nd0.l0.m4.o16 42 /r ] SM0,SM1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7d 0c) 300 320 001(42) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVB, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16663, 353, 2320}, + /* 8 : CFCMOVB reg16?,rm16 [v+rm: evex.nf1.nd1.l0.m4.o16 42 /r ] SM0,ND,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 1c) 300 320 001(42) 110 : SM0,SM1,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVB, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16823, 356, 2320}, + /* 9 : CFCMOVB reg32?,reg32,rm32 [vrm: evex.nf1.nd1.l0.m4.o32 42 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 7c 1c) 300 321 001(42) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVB, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+16983, 357, 2321}, + /* 10 : CFCMOVB reg32,rm32 [rm: evex.nf1.nd0.l0.m4.o32 42 /r ] SM0,SM1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7c 0c) 300 321 001(42) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVB, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17143, 354, 2321}, + /* 11 : CFCMOVB reg32?,rm32 [v+rm: evex.nf1.nd1.l0.m4.o32 42 /r ] SM0,ND,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 1c) 300 321 001(42) 110 : SM0,SM1,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVB, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17303, 358, 2321}, + /* 12 : CFCMOVB reg64?,reg64,rm64 [vrm: evex.nf1.nd1.l0.m4.o64 42 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 fc 1c) 300 324 001(42) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVB, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+17463, 357, 2322}, + /* 13 : CFCMOVB reg64,rm64 [rm: evex.nf1.nd0.l0.m4.o64 42 /r ] SM0,SM1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 fc 0c) 300 324 001(42) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVB, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17623, 354, 2322}, + /* 14 : CFCMOVB reg64?,rm64 [v+rm: evex.nf1.nd1.l0.m4.o64 42 /r ] ND,SM0,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 1c) 300 324 001(42) 110 : SM0,SM1,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVB, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17783, 358, 2322}, +}; + +static const struct itemplate instrux_CFCMOVBE[15] = { + /* 0 : CFCMOVBE rm16,reg16 [mr: evex.nf1.nd0.l0.m4.o16 46 /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7d 0c) 300 320 001(46) 101 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVBE, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+15553, 353, 2314}, + /* 1 : CFCMOVBE rm32,reg32 [mr: evex.nf1.nd0.l0.m4.o32 46 /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7c 0c) 300 321 001(46) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVBE, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+15713, 354, 2315}, + /* 2 : CFCMOVBE rm64,reg64 [mr: evex.nf1.nd0.l0.m4.o64 46 /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 fc 0c) 300 324 001(46) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVBE, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+15873, 354, 2316}, + /* 3 : CFCMOVBE reg16,rm16 [rm: evex.nf0.nd0.l0.m4.o16 46 /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7d 08) 300 320 001(46) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVBE, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16033, 353, 2317}, + /* 4 : CFCMOVBE reg32,rm32 [rm: evex.nf0.nd0.l0.m4.o32 46 /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7c 08) 300 321 001(46) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVBE, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+16193, 354, 2318}, + /* 5 : CFCMOVBE reg64,rm64 [rm: evex.nf0.nd0.l0.m4.o64 46 /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 fc 08) 300 324 001(46) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVBE, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+16353, 354, 2319}, + /* 6 : CFCMOVBE reg16?,reg16,rm16 [vrm: evex.nf1.nd1.l0.m4.o16 46 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 7d 1c) 300 320 001(46) 121 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVBE, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+16513, 355, 2320}, + /* 7 : CFCMOVBE reg16,rm16 [rm: evex.nf1.nd0.l0.m4.o16 46 /r ] SM0,SM1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7d 0c) 300 320 001(46) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVBE, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16673, 353, 2320}, + /* 8 : CFCMOVBE reg16?,rm16 [v+rm: evex.nf1.nd1.l0.m4.o16 46 /r ] SM0,ND,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 1c) 300 320 001(46) 110 : SM0,SM1,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVBE, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16833, 356, 2320}, + /* 9 : CFCMOVBE reg32?,reg32,rm32 [vrm: evex.nf1.nd1.l0.m4.o32 46 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 7c 1c) 300 321 001(46) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVBE, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+16993, 357, 2321}, + /* 10 : CFCMOVBE reg32,rm32 [rm: evex.nf1.nd0.l0.m4.o32 46 /r ] SM0,SM1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7c 0c) 300 321 001(46) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVBE, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17153, 354, 2321}, + /* 11 : CFCMOVBE reg32?,rm32 [v+rm: evex.nf1.nd1.l0.m4.o32 46 /r ] SM0,ND,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 1c) 300 321 001(46) 110 : SM0,SM1,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVBE, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17313, 358, 2321}, + /* 12 : CFCMOVBE reg64?,reg64,rm64 [vrm: evex.nf1.nd1.l0.m4.o64 46 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 fc 1c) 300 324 001(46) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVBE, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+17473, 357, 2322}, + /* 13 : CFCMOVBE reg64,rm64 [rm: evex.nf1.nd0.l0.m4.o64 46 /r ] SM0,SM1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 fc 0c) 300 324 001(46) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVBE, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17633, 354, 2322}, + /* 14 : CFCMOVBE reg64?,rm64 [v+rm: evex.nf1.nd1.l0.m4.o64 46 /r ] ND,SM0,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 1c) 300 324 001(46) 110 : SM0,SM1,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVBE, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17793, 358, 2322}, +}; + +static const struct itemplate instrux_CFCMOVC[15] = { + /* 0 : CFCMOVC rm16,reg16 [mr: evex.nf1.nd0.l0.m4.o16 42 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 0c) 300 320 001(42) 101 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVC, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+15543, 353, 2314}, + /* 1 : CFCMOVC rm32,reg32 [mr: evex.nf1.nd0.l0.m4.o32 42 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 0c) 300 321 001(42) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVC, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+15703, 354, 2315}, + /* 2 : CFCMOVC rm64,reg64 [mr: evex.nf1.nd0.l0.m4.o64 42 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 0c) 300 324 001(42) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVC, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+15863, 354, 2316}, + /* 3 : CFCMOVC reg16,rm16 [rm: evex.nf0.nd0.l0.m4.o16 42 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(42) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVC, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16023, 353, 2317}, + /* 4 : CFCMOVC reg32,rm32 [rm: evex.nf0.nd0.l0.m4.o32 42 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(42) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVC, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+16183, 354, 2318}, + /* 5 : CFCMOVC reg64,rm64 [rm: evex.nf0.nd0.l0.m4.o64 42 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(42) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVC, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+16343, 354, 2319}, + /* 6 : CFCMOVC reg16?,reg16,rm16 [vrm: evex.nf1.nd1.l0.m4.o16 42 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 1c) 300 320 001(42) 121 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVC, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+16503, 355, 2320}, + /* 7 : CFCMOVC reg16,rm16 [rm: evex.nf1.nd0.l0.m4.o16 42 /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 0c) 300 320 001(42) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVC, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16663, 353, 2320}, + /* 8 : CFCMOVC reg16?,rm16 [v+rm: evex.nf1.nd1.l0.m4.o16 42 /r ] SM0,ND,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 1c) 300 320 001(42) 110 : SM0,SM1,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVC, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16823, 356, 2320}, + /* 9 : CFCMOVC reg32?,reg32,rm32 [vrm: evex.nf1.nd1.l0.m4.o32 42 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 1c) 300 321 001(42) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVC, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+16983, 357, 2321}, + /* 10 : CFCMOVC reg32,rm32 [rm: evex.nf1.nd0.l0.m4.o32 42 /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 0c) 300 321 001(42) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVC, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17143, 354, 2321}, + /* 11 : CFCMOVC reg32?,rm32 [v+rm: evex.nf1.nd1.l0.m4.o32 42 /r ] SM0,ND,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 1c) 300 321 001(42) 110 : SM0,SM1,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVC, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17303, 358, 2321}, + /* 12 : CFCMOVC reg64?,reg64,rm64 [vrm: evex.nf1.nd1.l0.m4.o64 42 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 1c) 300 324 001(42) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVC, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+17463, 357, 2322}, + /* 13 : CFCMOVC reg64,rm64 [rm: evex.nf1.nd0.l0.m4.o64 42 /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 0c) 300 324 001(42) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVC, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17623, 354, 2322}, + /* 14 : CFCMOVC reg64?,rm64 [v+rm: evex.nf1.nd1.l0.m4.o64 42 /r ] ND,SM0,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 1c) 300 324 001(42) 110 : SM0,SM1,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVC, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17783, 358, 2322}, +}; + +static const struct itemplate instrux_CFCMOVE[15] = { + /* 0 : CFCMOVE rm16,reg16 [mr: evex.nf1.nd0.l0.m4.o16 44 /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7d 0c) 300 320 001(44) 101 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVE, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+15563, 353, 2314}, + /* 1 : CFCMOVE rm32,reg32 [mr: evex.nf1.nd0.l0.m4.o32 44 /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7c 0c) 300 321 001(44) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVE, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+15723, 354, 2315}, + /* 2 : CFCMOVE rm64,reg64 [mr: evex.nf1.nd0.l0.m4.o64 44 /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 fc 0c) 300 324 001(44) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVE, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+15883, 354, 2316}, + /* 3 : CFCMOVE reg16,rm16 [rm: evex.nf0.nd0.l0.m4.o16 44 /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7d 08) 300 320 001(44) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVE, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16043, 353, 2317}, + /* 4 : CFCMOVE reg32,rm32 [rm: evex.nf0.nd0.l0.m4.o32 44 /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7c 08) 300 321 001(44) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVE, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+16203, 354, 2318}, + /* 5 : CFCMOVE reg64,rm64 [rm: evex.nf0.nd0.l0.m4.o64 44 /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 fc 08) 300 324 001(44) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVE, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+16363, 354, 2319}, + /* 6 : CFCMOVE reg16?,reg16,rm16 [vrm: evex.nf1.nd1.l0.m4.o16 44 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 7d 1c) 300 320 001(44) 121 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVE, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+16523, 355, 2320}, + /* 7 : CFCMOVE reg16,rm16 [rm: evex.nf1.nd0.l0.m4.o16 44 /r ] SM0,SM1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7d 0c) 300 320 001(44) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVE, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16683, 353, 2320}, + /* 8 : CFCMOVE reg16?,rm16 [v+rm: evex.nf1.nd1.l0.m4.o16 44 /r ] SM0,ND,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 1c) 300 320 001(44) 110 : SM0,SM1,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVE, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16843, 356, 2320}, + /* 9 : CFCMOVE reg32?,reg32,rm32 [vrm: evex.nf1.nd1.l0.m4.o32 44 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 7c 1c) 300 321 001(44) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVE, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+17003, 357, 2321}, + /* 10 : CFCMOVE reg32,rm32 [rm: evex.nf1.nd0.l0.m4.o32 44 /r ] SM0,SM1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7c 0c) 300 321 001(44) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVE, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17163, 354, 2321}, + /* 11 : CFCMOVE reg32?,rm32 [v+rm: evex.nf1.nd1.l0.m4.o32 44 /r ] SM0,ND,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 1c) 300 321 001(44) 110 : SM0,SM1,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVE, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17323, 358, 2321}, + /* 12 : CFCMOVE reg64?,reg64,rm64 [vrm: evex.nf1.nd1.l0.m4.o64 44 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 fc 1c) 300 324 001(44) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVE, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+17483, 357, 2322}, + /* 13 : CFCMOVE reg64,rm64 [rm: evex.nf1.nd0.l0.m4.o64 44 /r ] SM0,SM1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 fc 0c) 300 324 001(44) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVE, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17643, 354, 2322}, + /* 14 : CFCMOVE reg64?,rm64 [v+rm: evex.nf1.nd1.l0.m4.o64 44 /r ] ND,SM0,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 1c) 300 324 001(44) 110 : SM0,SM1,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVE, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17803, 358, 2322}, +}; + +static const struct itemplate instrux_CFCMOVG[15] = { + /* 0 : CFCMOVG rm16,reg16 [mr: evex.nf1.nd0.l0.m4.o16 4f /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 0c) 300 320 001(4f) 101 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVG, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+15573, 353, 2314}, + /* 1 : CFCMOVG rm32,reg32 [mr: evex.nf1.nd0.l0.m4.o32 4f /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 0c) 300 321 001(4f) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVG, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+15733, 354, 2315}, + /* 2 : CFCMOVG rm64,reg64 [mr: evex.nf1.nd0.l0.m4.o64 4f /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 0c) 300 324 001(4f) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVG, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+15893, 354, 2316}, + /* 3 : CFCMOVG reg16,rm16 [rm: evex.nf0.nd0.l0.m4.o16 4f /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(4f) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVG, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16053, 353, 2317}, + /* 4 : CFCMOVG reg32,rm32 [rm: evex.nf0.nd0.l0.m4.o32 4f /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(4f) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVG, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+16213, 354, 2318}, + /* 5 : CFCMOVG reg64,rm64 [rm: evex.nf0.nd0.l0.m4.o64 4f /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(4f) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVG, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+16373, 354, 2319}, + /* 6 : CFCMOVG reg16?,reg16,rm16 [vrm: evex.nf1.nd1.l0.m4.o16 4f /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 1c) 300 320 001(4f) 121 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVG, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+16533, 355, 2320}, + /* 7 : CFCMOVG reg16,rm16 [rm: evex.nf1.nd0.l0.m4.o16 4f /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 0c) 300 320 001(4f) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVG, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16693, 353, 2320}, + /* 8 : CFCMOVG reg16?,rm16 [v+rm: evex.nf1.nd1.l0.m4.o16 4f /r ] SM0,ND,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 1c) 300 320 001(4f) 110 : SM0,SM1,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVG, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16853, 356, 2320}, + /* 9 : CFCMOVG reg32?,reg32,rm32 [vrm: evex.nf1.nd1.l0.m4.o32 4f /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 1c) 300 321 001(4f) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVG, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+17013, 357, 2321}, + /* 10 : CFCMOVG reg32,rm32 [rm: evex.nf1.nd0.l0.m4.o32 4f /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 0c) 300 321 001(4f) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVG, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17173, 354, 2321}, + /* 11 : CFCMOVG reg32?,rm32 [v+rm: evex.nf1.nd1.l0.m4.o32 4f /r ] SM0,ND,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 1c) 300 321 001(4f) 110 : SM0,SM1,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVG, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17333, 358, 2321}, + /* 12 : CFCMOVG reg64?,reg64,rm64 [vrm: evex.nf1.nd1.l0.m4.o64 4f /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 1c) 300 324 001(4f) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVG, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+17493, 357, 2322}, + /* 13 : CFCMOVG reg64,rm64 [rm: evex.nf1.nd0.l0.m4.o64 4f /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 0c) 300 324 001(4f) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVG, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17653, 354, 2322}, + /* 14 : CFCMOVG reg64?,rm64 [v+rm: evex.nf1.nd1.l0.m4.o64 4f /r ] ND,SM0,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 1c) 300 324 001(4f) 110 : SM0,SM1,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVG, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17813, 358, 2322}, +}; + +static const struct itemplate instrux_CFCMOVGE[15] = { + /* 0 : CFCMOVGE rm16,reg16 [mr: evex.nf1.nd0.l0.m4.o16 4d /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7d 0c) 300 320 001(4d) 101 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVGE, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+15583, 353, 2314}, + /* 1 : CFCMOVGE rm32,reg32 [mr: evex.nf1.nd0.l0.m4.o32 4d /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7c 0c) 300 321 001(4d) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVGE, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+15743, 354, 2315}, + /* 2 : CFCMOVGE rm64,reg64 [mr: evex.nf1.nd0.l0.m4.o64 4d /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 fc 0c) 300 324 001(4d) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVGE, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+15903, 354, 2316}, + /* 3 : CFCMOVGE reg16,rm16 [rm: evex.nf0.nd0.l0.m4.o16 4d /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7d 08) 300 320 001(4d) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVGE, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16063, 353, 2317}, + /* 4 : CFCMOVGE reg32,rm32 [rm: evex.nf0.nd0.l0.m4.o32 4d /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7c 08) 300 321 001(4d) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVGE, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+16223, 354, 2318}, + /* 5 : CFCMOVGE reg64,rm64 [rm: evex.nf0.nd0.l0.m4.o64 4d /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 fc 08) 300 324 001(4d) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVGE, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+16383, 354, 2319}, + /* 6 : CFCMOVGE reg16?,reg16,rm16 [vrm: evex.nf1.nd1.l0.m4.o16 4d /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 7d 1c) 300 320 001(4d) 121 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVGE, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+16543, 355, 2320}, + /* 7 : CFCMOVGE reg16,rm16 [rm: evex.nf1.nd0.l0.m4.o16 4d /r ] SM0,SM1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7d 0c) 300 320 001(4d) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVGE, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16703, 353, 2320}, + /* 8 : CFCMOVGE reg16?,rm16 [v+rm: evex.nf1.nd1.l0.m4.o16 4d /r ] SM0,ND,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 1c) 300 320 001(4d) 110 : SM0,SM1,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVGE, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16863, 356, 2320}, + /* 9 : CFCMOVGE reg32?,reg32,rm32 [vrm: evex.nf1.nd1.l0.m4.o32 4d /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 7c 1c) 300 321 001(4d) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVGE, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+17023, 357, 2321}, + /* 10 : CFCMOVGE reg32,rm32 [rm: evex.nf1.nd0.l0.m4.o32 4d /r ] SM0,SM1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7c 0c) 300 321 001(4d) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVGE, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17183, 354, 2321}, + /* 11 : CFCMOVGE reg32?,rm32 [v+rm: evex.nf1.nd1.l0.m4.o32 4d /r ] SM0,ND,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 1c) 300 321 001(4d) 110 : SM0,SM1,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVGE, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17343, 358, 2321}, + /* 12 : CFCMOVGE reg64?,reg64,rm64 [vrm: evex.nf1.nd1.l0.m4.o64 4d /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 fc 1c) 300 324 001(4d) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVGE, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+17503, 357, 2322}, + /* 13 : CFCMOVGE reg64,rm64 [rm: evex.nf1.nd0.l0.m4.o64 4d /r ] SM0,SM1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 fc 0c) 300 324 001(4d) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVGE, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17663, 354, 2322}, + /* 14 : CFCMOVGE reg64?,rm64 [v+rm: evex.nf1.nd1.l0.m4.o64 4d /r ] ND,SM0,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 1c) 300 324 001(4d) 110 : SM0,SM1,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVGE, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17823, 358, 2322}, +}; + +static const struct itemplate instrux_CFCMOVL[15] = { + /* 0 : CFCMOVL rm16,reg16 [mr: evex.nf1.nd0.l0.m4.o16 4c /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 0c) 300 320 001(4c) 101 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVL, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+15593, 353, 2314}, + /* 1 : CFCMOVL rm32,reg32 [mr: evex.nf1.nd0.l0.m4.o32 4c /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 0c) 300 321 001(4c) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVL, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+15753, 354, 2315}, + /* 2 : CFCMOVL rm64,reg64 [mr: evex.nf1.nd0.l0.m4.o64 4c /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 0c) 300 324 001(4c) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVL, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+15913, 354, 2316}, + /* 3 : CFCMOVL reg16,rm16 [rm: evex.nf0.nd0.l0.m4.o16 4c /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(4c) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVL, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16073, 353, 2317}, + /* 4 : CFCMOVL reg32,rm32 [rm: evex.nf0.nd0.l0.m4.o32 4c /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(4c) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVL, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+16233, 354, 2318}, + /* 5 : CFCMOVL reg64,rm64 [rm: evex.nf0.nd0.l0.m4.o64 4c /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(4c) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVL, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+16393, 354, 2319}, + /* 6 : CFCMOVL reg16?,reg16,rm16 [vrm: evex.nf1.nd1.l0.m4.o16 4c /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 1c) 300 320 001(4c) 121 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVL, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+16553, 355, 2320}, + /* 7 : CFCMOVL reg16,rm16 [rm: evex.nf1.nd0.l0.m4.o16 4c /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 0c) 300 320 001(4c) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVL, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16713, 353, 2320}, + /* 8 : CFCMOVL reg16?,rm16 [v+rm: evex.nf1.nd1.l0.m4.o16 4c /r ] SM0,ND,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 1c) 300 320 001(4c) 110 : SM0,SM1,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVL, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16873, 356, 2320}, + /* 9 : CFCMOVL reg32?,reg32,rm32 [vrm: evex.nf1.nd1.l0.m4.o32 4c /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 1c) 300 321 001(4c) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVL, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+17033, 357, 2321}, + /* 10 : CFCMOVL reg32,rm32 [rm: evex.nf1.nd0.l0.m4.o32 4c /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 0c) 300 321 001(4c) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVL, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17193, 354, 2321}, + /* 11 : CFCMOVL reg32?,rm32 [v+rm: evex.nf1.nd1.l0.m4.o32 4c /r ] SM0,ND,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 1c) 300 321 001(4c) 110 : SM0,SM1,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVL, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17353, 358, 2321}, + /* 12 : CFCMOVL reg64?,reg64,rm64 [vrm: evex.nf1.nd1.l0.m4.o64 4c /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 1c) 300 324 001(4c) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVL, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+17513, 357, 2322}, + /* 13 : CFCMOVL reg64,rm64 [rm: evex.nf1.nd0.l0.m4.o64 4c /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 0c) 300 324 001(4c) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVL, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17673, 354, 2322}, + /* 14 : CFCMOVL reg64?,rm64 [v+rm: evex.nf1.nd1.l0.m4.o64 4c /r ] ND,SM0,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 1c) 300 324 001(4c) 110 : SM0,SM1,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVL, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17833, 358, 2322}, +}; + +static const struct itemplate instrux_CFCMOVLE[15] = { + /* 0 : CFCMOVLE rm16,reg16 [mr: evex.nf1.nd0.l0.m4.o16 4e /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7d 0c) 300 320 001(4e) 101 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVLE, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+15603, 353, 2314}, + /* 1 : CFCMOVLE rm32,reg32 [mr: evex.nf1.nd0.l0.m4.o32 4e /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7c 0c) 300 321 001(4e) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVLE, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+15763, 354, 2315}, + /* 2 : CFCMOVLE rm64,reg64 [mr: evex.nf1.nd0.l0.m4.o64 4e /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 fc 0c) 300 324 001(4e) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVLE, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+15923, 354, 2316}, + /* 3 : CFCMOVLE reg16,rm16 [rm: evex.nf0.nd0.l0.m4.o16 4e /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7d 08) 300 320 001(4e) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVLE, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16083, 353, 2317}, + /* 4 : CFCMOVLE reg32,rm32 [rm: evex.nf0.nd0.l0.m4.o32 4e /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7c 08) 300 321 001(4e) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVLE, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+16243, 354, 2318}, + /* 5 : CFCMOVLE reg64,rm64 [rm: evex.nf0.nd0.l0.m4.o64 4e /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 fc 08) 300 324 001(4e) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVLE, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+16403, 354, 2319}, + /* 6 : CFCMOVLE reg16?,reg16,rm16 [vrm: evex.nf1.nd1.l0.m4.o16 4e /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 7d 1c) 300 320 001(4e) 121 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVLE, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+16563, 355, 2320}, + /* 7 : CFCMOVLE reg16,rm16 [rm: evex.nf1.nd0.l0.m4.o16 4e /r ] SM0,SM1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7d 0c) 300 320 001(4e) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVLE, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16723, 353, 2320}, + /* 8 : CFCMOVLE reg16?,rm16 [v+rm: evex.nf1.nd1.l0.m4.o16 4e /r ] SM0,ND,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 1c) 300 320 001(4e) 110 : SM0,SM1,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVLE, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16883, 356, 2320}, + /* 9 : CFCMOVLE reg32?,reg32,rm32 [vrm: evex.nf1.nd1.l0.m4.o32 4e /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 7c 1c) 300 321 001(4e) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVLE, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+17043, 357, 2321}, + /* 10 : CFCMOVLE reg32,rm32 [rm: evex.nf1.nd0.l0.m4.o32 4e /r ] SM0,SM1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7c 0c) 300 321 001(4e) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVLE, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17203, 354, 2321}, + /* 11 : CFCMOVLE reg32?,rm32 [v+rm: evex.nf1.nd1.l0.m4.o32 4e /r ] SM0,ND,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 1c) 300 321 001(4e) 110 : SM0,SM1,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVLE, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17363, 358, 2321}, + /* 12 : CFCMOVLE reg64?,reg64,rm64 [vrm: evex.nf1.nd1.l0.m4.o64 4e /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 fc 1c) 300 324 001(4e) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVLE, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+17523, 357, 2322}, + /* 13 : CFCMOVLE reg64,rm64 [rm: evex.nf1.nd0.l0.m4.o64 4e /r ] SM0,SM1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 fc 0c) 300 324 001(4e) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVLE, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17683, 354, 2322}, + /* 14 : CFCMOVLE reg64?,rm64 [v+rm: evex.nf1.nd1.l0.m4.o64 4e /r ] ND,SM0,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 1c) 300 324 001(4e) 110 : SM0,SM1,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVLE, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17843, 358, 2322}, +}; + +static const struct itemplate instrux_CFCMOVNA[15] = { + /* 0 : CFCMOVNA rm16,reg16 [mr: evex.nf1.nd0.l0.m4.o16 46 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 0c) 300 320 001(46) 101 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNA, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+15553, 353, 2314}, + /* 1 : CFCMOVNA rm32,reg32 [mr: evex.nf1.nd0.l0.m4.o32 46 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 0c) 300 321 001(46) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNA, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+15713, 354, 2315}, + /* 2 : CFCMOVNA rm64,reg64 [mr: evex.nf1.nd0.l0.m4.o64 46 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 0c) 300 324 001(46) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNA, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+15873, 354, 2316}, + /* 3 : CFCMOVNA reg16,rm16 [rm: evex.nf0.nd0.l0.m4.o16 46 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(46) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNA, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16033, 353, 2317}, + /* 4 : CFCMOVNA reg32,rm32 [rm: evex.nf0.nd0.l0.m4.o32 46 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(46) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNA, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+16193, 354, 2318}, + /* 5 : CFCMOVNA reg64,rm64 [rm: evex.nf0.nd0.l0.m4.o64 46 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(46) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNA, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+16353, 354, 2319}, + /* 6 : CFCMOVNA reg16?,reg16,rm16 [vrm: evex.nf1.nd1.l0.m4.o16 46 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 1c) 300 320 001(46) 121 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNA, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+16513, 355, 2320}, + /* 7 : CFCMOVNA reg16,rm16 [rm: evex.nf1.nd0.l0.m4.o16 46 /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 0c) 300 320 001(46) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNA, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16673, 353, 2320}, + /* 8 : CFCMOVNA reg16?,rm16 [v+rm: evex.nf1.nd1.l0.m4.o16 46 /r ] SM0,ND,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 1c) 300 320 001(46) 110 : SM0,SM1,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNA, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16833, 356, 2320}, + /* 9 : CFCMOVNA reg32?,reg32,rm32 [vrm: evex.nf1.nd1.l0.m4.o32 46 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 1c) 300 321 001(46) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNA, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+16993, 357, 2321}, + /* 10 : CFCMOVNA reg32,rm32 [rm: evex.nf1.nd0.l0.m4.o32 46 /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 0c) 300 321 001(46) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNA, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17153, 354, 2321}, + /* 11 : CFCMOVNA reg32?,rm32 [v+rm: evex.nf1.nd1.l0.m4.o32 46 /r ] SM0,ND,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 1c) 300 321 001(46) 110 : SM0,SM1,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNA, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17313, 358, 2321}, + /* 12 : CFCMOVNA reg64?,reg64,rm64 [vrm: evex.nf1.nd1.l0.m4.o64 46 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 1c) 300 324 001(46) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNA, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+17473, 357, 2322}, + /* 13 : CFCMOVNA reg64,rm64 [rm: evex.nf1.nd0.l0.m4.o64 46 /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 0c) 300 324 001(46) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNA, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17633, 354, 2322}, + /* 14 : CFCMOVNA reg64?,rm64 [v+rm: evex.nf1.nd1.l0.m4.o64 46 /r ] ND,SM0,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 1c) 300 324 001(46) 110 : SM0,SM1,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNA, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17793, 358, 2322}, +}; + +static const struct itemplate instrux_CFCMOVNAE[15] = { + /* 0 : CFCMOVNAE rm16,reg16 [mr: evex.nf1.nd0.l0.m4.o16 42 /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7d 0c) 300 320 001(42) 101 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNAE, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+15543, 353, 2314}, + /* 1 : CFCMOVNAE rm32,reg32 [mr: evex.nf1.nd0.l0.m4.o32 42 /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7c 0c) 300 321 001(42) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNAE, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+15703, 354, 2315}, + /* 2 : CFCMOVNAE rm64,reg64 [mr: evex.nf1.nd0.l0.m4.o64 42 /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 fc 0c) 300 324 001(42) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNAE, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+15863, 354, 2316}, + /* 3 : CFCMOVNAE reg16,rm16 [rm: evex.nf0.nd0.l0.m4.o16 42 /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7d 08) 300 320 001(42) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNAE, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16023, 353, 2317}, + /* 4 : CFCMOVNAE reg32,rm32 [rm: evex.nf0.nd0.l0.m4.o32 42 /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7c 08) 300 321 001(42) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNAE, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+16183, 354, 2318}, + /* 5 : CFCMOVNAE reg64,rm64 [rm: evex.nf0.nd0.l0.m4.o64 42 /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 fc 08) 300 324 001(42) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNAE, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+16343, 354, 2319}, + /* 6 : CFCMOVNAE reg16?,reg16,rm16 [vrm: evex.nf1.nd1.l0.m4.o16 42 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 7d 1c) 300 320 001(42) 121 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNAE, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+16503, 355, 2320}, + /* 7 : CFCMOVNAE reg16,rm16 [rm: evex.nf1.nd0.l0.m4.o16 42 /r ] SM0,SM1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7d 0c) 300 320 001(42) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNAE, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16663, 353, 2320}, + /* 8 : CFCMOVNAE reg16?,rm16 [v+rm: evex.nf1.nd1.l0.m4.o16 42 /r ] SM0,ND,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 1c) 300 320 001(42) 110 : SM0,SM1,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNAE, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16823, 356, 2320}, + /* 9 : CFCMOVNAE reg32?,reg32,rm32 [vrm: evex.nf1.nd1.l0.m4.o32 42 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 7c 1c) 300 321 001(42) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNAE, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+16983, 357, 2321}, + /* 10 : CFCMOVNAE reg32,rm32 [rm: evex.nf1.nd0.l0.m4.o32 42 /r ] SM0,SM1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7c 0c) 300 321 001(42) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNAE, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17143, 354, 2321}, + /* 11 : CFCMOVNAE reg32?,rm32 [v+rm: evex.nf1.nd1.l0.m4.o32 42 /r ] SM0,ND,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 1c) 300 321 001(42) 110 : SM0,SM1,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNAE, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17303, 358, 2321}, + /* 12 : CFCMOVNAE reg64?,reg64,rm64 [vrm: evex.nf1.nd1.l0.m4.o64 42 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 fc 1c) 300 324 001(42) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNAE, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+17463, 357, 2322}, + /* 13 : CFCMOVNAE reg64,rm64 [rm: evex.nf1.nd0.l0.m4.o64 42 /r ] SM0,SM1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 fc 0c) 300 324 001(42) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNAE, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17623, 354, 2322}, + /* 14 : CFCMOVNAE reg64?,rm64 [v+rm: evex.nf1.nd1.l0.m4.o64 42 /r ] ND,SM0,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 1c) 300 324 001(42) 110 : SM0,SM1,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNAE, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17783, 358, 2322}, +}; + +static const struct itemplate instrux_CFCMOVNB[15] = { + /* 0 : CFCMOVNB rm16,reg16 [mr: evex.nf1.nd0.l0.m4.o16 43 /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7d 0c) 300 320 001(43) 101 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNB, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+15533, 353, 2314}, + /* 1 : CFCMOVNB rm32,reg32 [mr: evex.nf1.nd0.l0.m4.o32 43 /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7c 0c) 300 321 001(43) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNB, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+15693, 354, 2315}, + /* 2 : CFCMOVNB rm64,reg64 [mr: evex.nf1.nd0.l0.m4.o64 43 /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 fc 0c) 300 324 001(43) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNB, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+15853, 354, 2316}, + /* 3 : CFCMOVNB reg16,rm16 [rm: evex.nf0.nd0.l0.m4.o16 43 /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7d 08) 300 320 001(43) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNB, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16013, 353, 2317}, + /* 4 : CFCMOVNB reg32,rm32 [rm: evex.nf0.nd0.l0.m4.o32 43 /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7c 08) 300 321 001(43) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNB, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+16173, 354, 2318}, + /* 5 : CFCMOVNB reg64,rm64 [rm: evex.nf0.nd0.l0.m4.o64 43 /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 fc 08) 300 324 001(43) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNB, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+16333, 354, 2319}, + /* 6 : CFCMOVNB reg16?,reg16,rm16 [vrm: evex.nf1.nd1.l0.m4.o16 43 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 7d 1c) 300 320 001(43) 121 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNB, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+16493, 355, 2320}, + /* 7 : CFCMOVNB reg16,rm16 [rm: evex.nf1.nd0.l0.m4.o16 43 /r ] SM0,SM1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7d 0c) 300 320 001(43) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNB, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16653, 353, 2320}, + /* 8 : CFCMOVNB reg16?,rm16 [v+rm: evex.nf1.nd1.l0.m4.o16 43 /r ] SM0,ND,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 1c) 300 320 001(43) 110 : SM0,SM1,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNB, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16813, 356, 2320}, + /* 9 : CFCMOVNB reg32?,reg32,rm32 [vrm: evex.nf1.nd1.l0.m4.o32 43 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 7c 1c) 300 321 001(43) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNB, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+16973, 357, 2321}, + /* 10 : CFCMOVNB reg32,rm32 [rm: evex.nf1.nd0.l0.m4.o32 43 /r ] SM0,SM1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7c 0c) 300 321 001(43) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNB, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17133, 354, 2321}, + /* 11 : CFCMOVNB reg32?,rm32 [v+rm: evex.nf1.nd1.l0.m4.o32 43 /r ] SM0,ND,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 1c) 300 321 001(43) 110 : SM0,SM1,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNB, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17293, 358, 2321}, + /* 12 : CFCMOVNB reg64?,reg64,rm64 [vrm: evex.nf1.nd1.l0.m4.o64 43 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 fc 1c) 300 324 001(43) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNB, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+17453, 357, 2322}, + /* 13 : CFCMOVNB reg64,rm64 [rm: evex.nf1.nd0.l0.m4.o64 43 /r ] SM0,SM1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 fc 0c) 300 324 001(43) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNB, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17613, 354, 2322}, + /* 14 : CFCMOVNB reg64?,rm64 [v+rm: evex.nf1.nd1.l0.m4.o64 43 /r ] ND,SM0,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 1c) 300 324 001(43) 110 : SM0,SM1,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNB, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17773, 358, 2322}, +}; + +static const struct itemplate instrux_CFCMOVNBE[15] = { + /* 0 : CFCMOVNBE rm16,reg16 [mr: evex.nf1.nd0.l0.m4.o16 47 /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7d 0c) 300 320 001(47) 101 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNBE, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+15523, 353, 2314}, + /* 1 : CFCMOVNBE rm32,reg32 [mr: evex.nf1.nd0.l0.m4.o32 47 /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7c 0c) 300 321 001(47) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNBE, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+15683, 354, 2315}, + /* 2 : CFCMOVNBE rm64,reg64 [mr: evex.nf1.nd0.l0.m4.o64 47 /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 fc 0c) 300 324 001(47) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNBE, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+15843, 354, 2316}, + /* 3 : CFCMOVNBE reg16,rm16 [rm: evex.nf0.nd0.l0.m4.o16 47 /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7d 08) 300 320 001(47) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNBE, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16003, 353, 2317}, + /* 4 : CFCMOVNBE reg32,rm32 [rm: evex.nf0.nd0.l0.m4.o32 47 /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7c 08) 300 321 001(47) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNBE, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+16163, 354, 2318}, + /* 5 : CFCMOVNBE reg64,rm64 [rm: evex.nf0.nd0.l0.m4.o64 47 /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 fc 08) 300 324 001(47) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNBE, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+16323, 354, 2319}, + /* 6 : CFCMOVNBE reg16?,reg16,rm16 [vrm: evex.nf1.nd1.l0.m4.o16 47 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 7d 1c) 300 320 001(47) 121 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNBE, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+16483, 355, 2320}, + /* 7 : CFCMOVNBE reg16,rm16 [rm: evex.nf1.nd0.l0.m4.o16 47 /r ] SM0,SM1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7d 0c) 300 320 001(47) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNBE, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16643, 353, 2320}, + /* 8 : CFCMOVNBE reg16?,rm16 [v+rm: evex.nf1.nd1.l0.m4.o16 47 /r ] SM0,ND,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 1c) 300 320 001(47) 110 : SM0,SM1,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNBE, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16803, 356, 2320}, + /* 9 : CFCMOVNBE reg32?,reg32,rm32 [vrm: evex.nf1.nd1.l0.m4.o32 47 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 7c 1c) 300 321 001(47) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNBE, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+16963, 357, 2321}, + /* 10 : CFCMOVNBE reg32,rm32 [rm: evex.nf1.nd0.l0.m4.o32 47 /r ] SM0,SM1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7c 0c) 300 321 001(47) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNBE, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17123, 354, 2321}, + /* 11 : CFCMOVNBE reg32?,rm32 [v+rm: evex.nf1.nd1.l0.m4.o32 47 /r ] SM0,ND,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 1c) 300 321 001(47) 110 : SM0,SM1,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNBE, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17283, 358, 2321}, + /* 12 : CFCMOVNBE reg64?,reg64,rm64 [vrm: evex.nf1.nd1.l0.m4.o64 47 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 fc 1c) 300 324 001(47) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNBE, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+17443, 357, 2322}, + /* 13 : CFCMOVNBE reg64,rm64 [rm: evex.nf1.nd0.l0.m4.o64 47 /r ] SM0,SM1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 fc 0c) 300 324 001(47) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNBE, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17603, 354, 2322}, + /* 14 : CFCMOVNBE reg64?,rm64 [v+rm: evex.nf1.nd1.l0.m4.o64 47 /r ] ND,SM0,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 1c) 300 324 001(47) 110 : SM0,SM1,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNBE, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17763, 358, 2322}, +}; + +static const struct itemplate instrux_CFCMOVNC[15] = { + /* 0 : CFCMOVNC rm16,reg16 [mr: evex.nf1.nd0.l0.m4.o16 43 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 0c) 300 320 001(43) 101 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNC, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+15533, 353, 2314}, + /* 1 : CFCMOVNC rm32,reg32 [mr: evex.nf1.nd0.l0.m4.o32 43 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 0c) 300 321 001(43) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNC, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+15693, 354, 2315}, + /* 2 : CFCMOVNC rm64,reg64 [mr: evex.nf1.nd0.l0.m4.o64 43 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 0c) 300 324 001(43) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNC, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+15853, 354, 2316}, + /* 3 : CFCMOVNC reg16,rm16 [rm: evex.nf0.nd0.l0.m4.o16 43 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(43) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNC, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16013, 353, 2317}, + /* 4 : CFCMOVNC reg32,rm32 [rm: evex.nf0.nd0.l0.m4.o32 43 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(43) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNC, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+16173, 354, 2318}, + /* 5 : CFCMOVNC reg64,rm64 [rm: evex.nf0.nd0.l0.m4.o64 43 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(43) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNC, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+16333, 354, 2319}, + /* 6 : CFCMOVNC reg16?,reg16,rm16 [vrm: evex.nf1.nd1.l0.m4.o16 43 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 1c) 300 320 001(43) 121 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNC, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+16493, 355, 2320}, + /* 7 : CFCMOVNC reg16,rm16 [rm: evex.nf1.nd0.l0.m4.o16 43 /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 0c) 300 320 001(43) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNC, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16653, 353, 2320}, + /* 8 : CFCMOVNC reg16?,rm16 [v+rm: evex.nf1.nd1.l0.m4.o16 43 /r ] SM0,ND,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 1c) 300 320 001(43) 110 : SM0,SM1,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNC, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16813, 356, 2320}, + /* 9 : CFCMOVNC reg32?,reg32,rm32 [vrm: evex.nf1.nd1.l0.m4.o32 43 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 1c) 300 321 001(43) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNC, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+16973, 357, 2321}, + /* 10 : CFCMOVNC reg32,rm32 [rm: evex.nf1.nd0.l0.m4.o32 43 /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 0c) 300 321 001(43) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNC, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17133, 354, 2321}, + /* 11 : CFCMOVNC reg32?,rm32 [v+rm: evex.nf1.nd1.l0.m4.o32 43 /r ] SM0,ND,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 1c) 300 321 001(43) 110 : SM0,SM1,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNC, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17293, 358, 2321}, + /* 12 : CFCMOVNC reg64?,reg64,rm64 [vrm: evex.nf1.nd1.l0.m4.o64 43 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 1c) 300 324 001(43) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNC, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+17453, 357, 2322}, + /* 13 : CFCMOVNC reg64,rm64 [rm: evex.nf1.nd0.l0.m4.o64 43 /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 0c) 300 324 001(43) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNC, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17613, 354, 2322}, + /* 14 : CFCMOVNC reg64?,rm64 [v+rm: evex.nf1.nd1.l0.m4.o64 43 /r ] ND,SM0,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 1c) 300 324 001(43) 110 : SM0,SM1,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNC, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17773, 358, 2322}, +}; + +static const struct itemplate instrux_CFCMOVNE[15] = { + /* 0 : CFCMOVNE rm16,reg16 [mr: evex.nf1.nd0.l0.m4.o16 45 /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7d 0c) 300 320 001(45) 101 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNE, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+15613, 353, 2314}, + /* 1 : CFCMOVNE rm32,reg32 [mr: evex.nf1.nd0.l0.m4.o32 45 /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7c 0c) 300 321 001(45) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNE, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+15773, 354, 2315}, + /* 2 : CFCMOVNE rm64,reg64 [mr: evex.nf1.nd0.l0.m4.o64 45 /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 fc 0c) 300 324 001(45) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNE, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+15933, 354, 2316}, + /* 3 : CFCMOVNE reg16,rm16 [rm: evex.nf0.nd0.l0.m4.o16 45 /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7d 08) 300 320 001(45) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNE, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16093, 353, 2317}, + /* 4 : CFCMOVNE reg32,rm32 [rm: evex.nf0.nd0.l0.m4.o32 45 /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7c 08) 300 321 001(45) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNE, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+16253, 354, 2318}, + /* 5 : CFCMOVNE reg64,rm64 [rm: evex.nf0.nd0.l0.m4.o64 45 /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 fc 08) 300 324 001(45) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNE, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+16413, 354, 2319}, + /* 6 : CFCMOVNE reg16?,reg16,rm16 [vrm: evex.nf1.nd1.l0.m4.o16 45 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 7d 1c) 300 320 001(45) 121 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNE, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+16573, 355, 2320}, + /* 7 : CFCMOVNE reg16,rm16 [rm: evex.nf1.nd0.l0.m4.o16 45 /r ] SM0,SM1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7d 0c) 300 320 001(45) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNE, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16733, 353, 2320}, + /* 8 : CFCMOVNE reg16?,rm16 [v+rm: evex.nf1.nd1.l0.m4.o16 45 /r ] SM0,ND,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 1c) 300 320 001(45) 110 : SM0,SM1,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNE, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16893, 356, 2320}, + /* 9 : CFCMOVNE reg32?,reg32,rm32 [vrm: evex.nf1.nd1.l0.m4.o32 45 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 7c 1c) 300 321 001(45) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNE, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+17053, 357, 2321}, + /* 10 : CFCMOVNE reg32,rm32 [rm: evex.nf1.nd0.l0.m4.o32 45 /r ] SM0,SM1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7c 0c) 300 321 001(45) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNE, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17213, 354, 2321}, + /* 11 : CFCMOVNE reg32?,rm32 [v+rm: evex.nf1.nd1.l0.m4.o32 45 /r ] SM0,ND,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 1c) 300 321 001(45) 110 : SM0,SM1,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNE, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17373, 358, 2321}, + /* 12 : CFCMOVNE reg64?,reg64,rm64 [vrm: evex.nf1.nd1.l0.m4.o64 45 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 fc 1c) 300 324 001(45) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNE, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+17533, 357, 2322}, + /* 13 : CFCMOVNE reg64,rm64 [rm: evex.nf1.nd0.l0.m4.o64 45 /r ] SM0,SM1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 fc 0c) 300 324 001(45) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNE, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17693, 354, 2322}, + /* 14 : CFCMOVNE reg64?,rm64 [v+rm: evex.nf1.nd1.l0.m4.o64 45 /r ] ND,SM0,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 1c) 300 324 001(45) 110 : SM0,SM1,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNE, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17853, 358, 2322}, +}; + +static const struct itemplate instrux_CFCMOVNG[15] = { + /* 0 : CFCMOVNG rm16,reg16 [mr: evex.nf1.nd0.l0.m4.o16 4e /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 0c) 300 320 001(4e) 101 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNG, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+15603, 353, 2314}, + /* 1 : CFCMOVNG rm32,reg32 [mr: evex.nf1.nd0.l0.m4.o32 4e /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 0c) 300 321 001(4e) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNG, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+15763, 354, 2315}, + /* 2 : CFCMOVNG rm64,reg64 [mr: evex.nf1.nd0.l0.m4.o64 4e /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 0c) 300 324 001(4e) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNG, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+15923, 354, 2316}, + /* 3 : CFCMOVNG reg16,rm16 [rm: evex.nf0.nd0.l0.m4.o16 4e /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(4e) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNG, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16083, 353, 2317}, + /* 4 : CFCMOVNG reg32,rm32 [rm: evex.nf0.nd0.l0.m4.o32 4e /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(4e) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNG, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+16243, 354, 2318}, + /* 5 : CFCMOVNG reg64,rm64 [rm: evex.nf0.nd0.l0.m4.o64 4e /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(4e) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNG, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+16403, 354, 2319}, + /* 6 : CFCMOVNG reg16?,reg16,rm16 [vrm: evex.nf1.nd1.l0.m4.o16 4e /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 1c) 300 320 001(4e) 121 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNG, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+16563, 355, 2320}, + /* 7 : CFCMOVNG reg16,rm16 [rm: evex.nf1.nd0.l0.m4.o16 4e /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 0c) 300 320 001(4e) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNG, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16723, 353, 2320}, + /* 8 : CFCMOVNG reg16?,rm16 [v+rm: evex.nf1.nd1.l0.m4.o16 4e /r ] SM0,ND,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 1c) 300 320 001(4e) 110 : SM0,SM1,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNG, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16883, 356, 2320}, + /* 9 : CFCMOVNG reg32?,reg32,rm32 [vrm: evex.nf1.nd1.l0.m4.o32 4e /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 1c) 300 321 001(4e) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNG, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+17043, 357, 2321}, + /* 10 : CFCMOVNG reg32,rm32 [rm: evex.nf1.nd0.l0.m4.o32 4e /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 0c) 300 321 001(4e) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNG, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17203, 354, 2321}, + /* 11 : CFCMOVNG reg32?,rm32 [v+rm: evex.nf1.nd1.l0.m4.o32 4e /r ] SM0,ND,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 1c) 300 321 001(4e) 110 : SM0,SM1,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNG, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17363, 358, 2321}, + /* 12 : CFCMOVNG reg64?,reg64,rm64 [vrm: evex.nf1.nd1.l0.m4.o64 4e /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 1c) 300 324 001(4e) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNG, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+17523, 357, 2322}, + /* 13 : CFCMOVNG reg64,rm64 [rm: evex.nf1.nd0.l0.m4.o64 4e /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 0c) 300 324 001(4e) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNG, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17683, 354, 2322}, + /* 14 : CFCMOVNG reg64?,rm64 [v+rm: evex.nf1.nd1.l0.m4.o64 4e /r ] ND,SM0,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 1c) 300 324 001(4e) 110 : SM0,SM1,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNG, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17843, 358, 2322}, +}; + +static const struct itemplate instrux_CFCMOVNGE[15] = { + /* 0 : CFCMOVNGE rm16,reg16 [mr: evex.nf1.nd0.l0.m4.o16 4c /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7d 0c) 300 320 001(4c) 101 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNGE, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+15593, 353, 2314}, + /* 1 : CFCMOVNGE rm32,reg32 [mr: evex.nf1.nd0.l0.m4.o32 4c /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7c 0c) 300 321 001(4c) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNGE, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+15753, 354, 2315}, + /* 2 : CFCMOVNGE rm64,reg64 [mr: evex.nf1.nd0.l0.m4.o64 4c /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 fc 0c) 300 324 001(4c) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNGE, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+15913, 354, 2316}, + /* 3 : CFCMOVNGE reg16,rm16 [rm: evex.nf0.nd0.l0.m4.o16 4c /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7d 08) 300 320 001(4c) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNGE, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16073, 353, 2317}, + /* 4 : CFCMOVNGE reg32,rm32 [rm: evex.nf0.nd0.l0.m4.o32 4c /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7c 08) 300 321 001(4c) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNGE, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+16233, 354, 2318}, + /* 5 : CFCMOVNGE reg64,rm64 [rm: evex.nf0.nd0.l0.m4.o64 4c /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 fc 08) 300 324 001(4c) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNGE, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+16393, 354, 2319}, + /* 6 : CFCMOVNGE reg16?,reg16,rm16 [vrm: evex.nf1.nd1.l0.m4.o16 4c /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 7d 1c) 300 320 001(4c) 121 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNGE, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+16553, 355, 2320}, + /* 7 : CFCMOVNGE reg16,rm16 [rm: evex.nf1.nd0.l0.m4.o16 4c /r ] SM0,SM1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7d 0c) 300 320 001(4c) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNGE, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16713, 353, 2320}, + /* 8 : CFCMOVNGE reg16?,rm16 [v+rm: evex.nf1.nd1.l0.m4.o16 4c /r ] SM0,ND,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 1c) 300 320 001(4c) 110 : SM0,SM1,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNGE, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16873, 356, 2320}, + /* 9 : CFCMOVNGE reg32?,reg32,rm32 [vrm: evex.nf1.nd1.l0.m4.o32 4c /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 7c 1c) 300 321 001(4c) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNGE, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+17033, 357, 2321}, + /* 10 : CFCMOVNGE reg32,rm32 [rm: evex.nf1.nd0.l0.m4.o32 4c /r ] SM0,SM1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7c 0c) 300 321 001(4c) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNGE, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17193, 354, 2321}, + /* 11 : CFCMOVNGE reg32?,rm32 [v+rm: evex.nf1.nd1.l0.m4.o32 4c /r ] SM0,ND,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 1c) 300 321 001(4c) 110 : SM0,SM1,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNGE, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17353, 358, 2321}, + /* 12 : CFCMOVNGE reg64?,reg64,rm64 [vrm: evex.nf1.nd1.l0.m4.o64 4c /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 fc 1c) 300 324 001(4c) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNGE, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+17513, 357, 2322}, + /* 13 : CFCMOVNGE reg64,rm64 [rm: evex.nf1.nd0.l0.m4.o64 4c /r ] SM0,SM1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 fc 0c) 300 324 001(4c) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNGE, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17673, 354, 2322}, + /* 14 : CFCMOVNGE reg64?,rm64 [v+rm: evex.nf1.nd1.l0.m4.o64 4c /r ] ND,SM0,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 1c) 300 324 001(4c) 110 : SM0,SM1,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNGE, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17833, 358, 2322}, +}; + +static const struct itemplate instrux_CFCMOVNL[15] = { + /* 0 : CFCMOVNL rm16,reg16 [mr: evex.nf1.nd0.l0.m4.o16 4d /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 0c) 300 320 001(4d) 101 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNL, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+15583, 353, 2314}, + /* 1 : CFCMOVNL rm32,reg32 [mr: evex.nf1.nd0.l0.m4.o32 4d /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 0c) 300 321 001(4d) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNL, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+15743, 354, 2315}, + /* 2 : CFCMOVNL rm64,reg64 [mr: evex.nf1.nd0.l0.m4.o64 4d /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 0c) 300 324 001(4d) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNL, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+15903, 354, 2316}, + /* 3 : CFCMOVNL reg16,rm16 [rm: evex.nf0.nd0.l0.m4.o16 4d /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(4d) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNL, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16063, 353, 2317}, + /* 4 : CFCMOVNL reg32,rm32 [rm: evex.nf0.nd0.l0.m4.o32 4d /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(4d) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNL, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+16223, 354, 2318}, + /* 5 : CFCMOVNL reg64,rm64 [rm: evex.nf0.nd0.l0.m4.o64 4d /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(4d) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNL, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+16383, 354, 2319}, + /* 6 : CFCMOVNL reg16?,reg16,rm16 [vrm: evex.nf1.nd1.l0.m4.o16 4d /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 1c) 300 320 001(4d) 121 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNL, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+16543, 355, 2320}, + /* 7 : CFCMOVNL reg16,rm16 [rm: evex.nf1.nd0.l0.m4.o16 4d /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 0c) 300 320 001(4d) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNL, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16703, 353, 2320}, + /* 8 : CFCMOVNL reg16?,rm16 [v+rm: evex.nf1.nd1.l0.m4.o16 4d /r ] SM0,ND,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 1c) 300 320 001(4d) 110 : SM0,SM1,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNL, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16863, 356, 2320}, + /* 9 : CFCMOVNL reg32?,reg32,rm32 [vrm: evex.nf1.nd1.l0.m4.o32 4d /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 1c) 300 321 001(4d) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNL, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+17023, 357, 2321}, + /* 10 : CFCMOVNL reg32,rm32 [rm: evex.nf1.nd0.l0.m4.o32 4d /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 0c) 300 321 001(4d) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNL, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17183, 354, 2321}, + /* 11 : CFCMOVNL reg32?,rm32 [v+rm: evex.nf1.nd1.l0.m4.o32 4d /r ] SM0,ND,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 1c) 300 321 001(4d) 110 : SM0,SM1,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNL, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17343, 358, 2321}, + /* 12 : CFCMOVNL reg64?,reg64,rm64 [vrm: evex.nf1.nd1.l0.m4.o64 4d /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 1c) 300 324 001(4d) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNL, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+17503, 357, 2322}, + /* 13 : CFCMOVNL reg64,rm64 [rm: evex.nf1.nd0.l0.m4.o64 4d /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 0c) 300 324 001(4d) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNL, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17663, 354, 2322}, + /* 14 : CFCMOVNL reg64?,rm64 [v+rm: evex.nf1.nd1.l0.m4.o64 4d /r ] ND,SM0,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 1c) 300 324 001(4d) 110 : SM0,SM1,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNL, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17823, 358, 2322}, +}; + +static const struct itemplate instrux_CFCMOVNLE[15] = { + /* 0 : CFCMOVNLE rm16,reg16 [mr: evex.nf1.nd0.l0.m4.o16 4f /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7d 0c) 300 320 001(4f) 101 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNLE, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+15573, 353, 2314}, + /* 1 : CFCMOVNLE rm32,reg32 [mr: evex.nf1.nd0.l0.m4.o32 4f /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7c 0c) 300 321 001(4f) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNLE, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+15733, 354, 2315}, + /* 2 : CFCMOVNLE rm64,reg64 [mr: evex.nf1.nd0.l0.m4.o64 4f /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 fc 0c) 300 324 001(4f) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNLE, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+15893, 354, 2316}, + /* 3 : CFCMOVNLE reg16,rm16 [rm: evex.nf0.nd0.l0.m4.o16 4f /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7d 08) 300 320 001(4f) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNLE, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16053, 353, 2317}, + /* 4 : CFCMOVNLE reg32,rm32 [rm: evex.nf0.nd0.l0.m4.o32 4f /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7c 08) 300 321 001(4f) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNLE, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+16213, 354, 2318}, + /* 5 : CFCMOVNLE reg64,rm64 [rm: evex.nf0.nd0.l0.m4.o64 4f /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 fc 08) 300 324 001(4f) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNLE, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+16373, 354, 2319}, + /* 6 : CFCMOVNLE reg16?,reg16,rm16 [vrm: evex.nf1.nd1.l0.m4.o16 4f /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 7d 1c) 300 320 001(4f) 121 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNLE, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+16533, 355, 2320}, + /* 7 : CFCMOVNLE reg16,rm16 [rm: evex.nf1.nd0.l0.m4.o16 4f /r ] SM0,SM1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7d 0c) 300 320 001(4f) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNLE, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16693, 353, 2320}, + /* 8 : CFCMOVNLE reg16?,rm16 [v+rm: evex.nf1.nd1.l0.m4.o16 4f /r ] SM0,ND,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 1c) 300 320 001(4f) 110 : SM0,SM1,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNLE, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16853, 356, 2320}, + /* 9 : CFCMOVNLE reg32?,reg32,rm32 [vrm: evex.nf1.nd1.l0.m4.o32 4f /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 7c 1c) 300 321 001(4f) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNLE, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+17013, 357, 2321}, + /* 10 : CFCMOVNLE reg32,rm32 [rm: evex.nf1.nd0.l0.m4.o32 4f /r ] SM0,SM1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7c 0c) 300 321 001(4f) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNLE, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17173, 354, 2321}, + /* 11 : CFCMOVNLE reg32?,rm32 [v+rm: evex.nf1.nd1.l0.m4.o32 4f /r ] SM0,ND,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 1c) 300 321 001(4f) 110 : SM0,SM1,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNLE, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17333, 358, 2321}, + /* 12 : CFCMOVNLE reg64?,reg64,rm64 [vrm: evex.nf1.nd1.l0.m4.o64 4f /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 fc 1c) 300 324 001(4f) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNLE, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+17493, 357, 2322}, + /* 13 : CFCMOVNLE reg64,rm64 [rm: evex.nf1.nd0.l0.m4.o64 4f /r ] SM0,SM1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 fc 0c) 300 324 001(4f) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNLE, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17653, 354, 2322}, + /* 14 : CFCMOVNLE reg64?,rm64 [v+rm: evex.nf1.nd1.l0.m4.o64 4f /r ] ND,SM0,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 1c) 300 324 001(4f) 110 : SM0,SM1,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNLE, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17813, 358, 2322}, +}; + +static const struct itemplate instrux_CFCMOVNO[15] = { + /* 0 : CFCMOVNO rm16,reg16 [mr: evex.nf1.nd0.l0.m4.o16 41 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 0c) 300 320 001(41) 101 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNO, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+15623, 353, 2314}, + /* 1 : CFCMOVNO rm32,reg32 [mr: evex.nf1.nd0.l0.m4.o32 41 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 0c) 300 321 001(41) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNO, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+15783, 354, 2315}, + /* 2 : CFCMOVNO rm64,reg64 [mr: evex.nf1.nd0.l0.m4.o64 41 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 0c) 300 324 001(41) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNO, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+15943, 354, 2316}, + /* 3 : CFCMOVNO reg16,rm16 [rm: evex.nf0.nd0.l0.m4.o16 41 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(41) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNO, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16103, 353, 2317}, + /* 4 : CFCMOVNO reg32,rm32 [rm: evex.nf0.nd0.l0.m4.o32 41 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(41) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNO, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+16263, 354, 2318}, + /* 5 : CFCMOVNO reg64,rm64 [rm: evex.nf0.nd0.l0.m4.o64 41 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(41) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNO, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+16423, 354, 2319}, + /* 6 : CFCMOVNO reg16?,reg16,rm16 [vrm: evex.nf1.nd1.l0.m4.o16 41 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 1c) 300 320 001(41) 121 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNO, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+16583, 355, 2320}, + /* 7 : CFCMOVNO reg16,rm16 [rm: evex.nf1.nd0.l0.m4.o16 41 /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 0c) 300 320 001(41) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNO, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16743, 353, 2320}, + /* 8 : CFCMOVNO reg16?,rm16 [v+rm: evex.nf1.nd1.l0.m4.o16 41 /r ] SM0,ND,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 1c) 300 320 001(41) 110 : SM0,SM1,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNO, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16903, 356, 2320}, + /* 9 : CFCMOVNO reg32?,reg32,rm32 [vrm: evex.nf1.nd1.l0.m4.o32 41 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 1c) 300 321 001(41) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNO, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+17063, 357, 2321}, + /* 10 : CFCMOVNO reg32,rm32 [rm: evex.nf1.nd0.l0.m4.o32 41 /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 0c) 300 321 001(41) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNO, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17223, 354, 2321}, + /* 11 : CFCMOVNO reg32?,rm32 [v+rm: evex.nf1.nd1.l0.m4.o32 41 /r ] SM0,ND,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 1c) 300 321 001(41) 110 : SM0,SM1,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNO, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17383, 358, 2321}, + /* 12 : CFCMOVNO reg64?,reg64,rm64 [vrm: evex.nf1.nd1.l0.m4.o64 41 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 1c) 300 324 001(41) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNO, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+17543, 357, 2322}, + /* 13 : CFCMOVNO reg64,rm64 [rm: evex.nf1.nd0.l0.m4.o64 41 /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 0c) 300 324 001(41) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNO, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17703, 354, 2322}, + /* 14 : CFCMOVNO reg64?,rm64 [v+rm: evex.nf1.nd1.l0.m4.o64 41 /r ] ND,SM0,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 1c) 300 324 001(41) 110 : SM0,SM1,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNO, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17863, 358, 2322}, +}; + +static const struct itemplate instrux_CFCMOVNP[15] = { + /* 0 : CFCMOVNP rm16,reg16 [mr: evex.nf1.nd0.l0.m4.o16 4b /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7d 0c) 300 320 001(4b) 101 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNP, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+15633, 353, 2314}, + /* 1 : CFCMOVNP rm32,reg32 [mr: evex.nf1.nd0.l0.m4.o32 4b /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7c 0c) 300 321 001(4b) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNP, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+15793, 354, 2315}, + /* 2 : CFCMOVNP rm64,reg64 [mr: evex.nf1.nd0.l0.m4.o64 4b /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 fc 0c) 300 324 001(4b) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNP, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+15953, 354, 2316}, + /* 3 : CFCMOVNP reg16,rm16 [rm: evex.nf0.nd0.l0.m4.o16 4b /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7d 08) 300 320 001(4b) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNP, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16113, 353, 2317}, + /* 4 : CFCMOVNP reg32,rm32 [rm: evex.nf0.nd0.l0.m4.o32 4b /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7c 08) 300 321 001(4b) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNP, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+16273, 354, 2318}, + /* 5 : CFCMOVNP reg64,rm64 [rm: evex.nf0.nd0.l0.m4.o64 4b /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 fc 08) 300 324 001(4b) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNP, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+16433, 354, 2319}, + /* 6 : CFCMOVNP reg16?,reg16,rm16 [vrm: evex.nf1.nd1.l0.m4.o16 4b /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 7d 1c) 300 320 001(4b) 121 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNP, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+16593, 355, 2320}, + /* 7 : CFCMOVNP reg16,rm16 [rm: evex.nf1.nd0.l0.m4.o16 4b /r ] SM0,SM1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7d 0c) 300 320 001(4b) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNP, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16753, 353, 2320}, + /* 8 : CFCMOVNP reg16?,rm16 [v+rm: evex.nf1.nd1.l0.m4.o16 4b /r ] SM0,ND,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 1c) 300 320 001(4b) 110 : SM0,SM1,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNP, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16913, 356, 2320}, + /* 9 : CFCMOVNP reg32?,reg32,rm32 [vrm: evex.nf1.nd1.l0.m4.o32 4b /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 7c 1c) 300 321 001(4b) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNP, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+17073, 357, 2321}, + /* 10 : CFCMOVNP reg32,rm32 [rm: evex.nf1.nd0.l0.m4.o32 4b /r ] SM0,SM1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7c 0c) 300 321 001(4b) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNP, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17233, 354, 2321}, + /* 11 : CFCMOVNP reg32?,rm32 [v+rm: evex.nf1.nd1.l0.m4.o32 4b /r ] SM0,ND,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 1c) 300 321 001(4b) 110 : SM0,SM1,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNP, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17393, 358, 2321}, + /* 12 : CFCMOVNP reg64?,reg64,rm64 [vrm: evex.nf1.nd1.l0.m4.o64 4b /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 fc 1c) 300 324 001(4b) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNP, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+17553, 357, 2322}, + /* 13 : CFCMOVNP reg64,rm64 [rm: evex.nf1.nd0.l0.m4.o64 4b /r ] SM0,SM1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 fc 0c) 300 324 001(4b) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNP, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17713, 354, 2322}, + /* 14 : CFCMOVNP reg64?,rm64 [v+rm: evex.nf1.nd1.l0.m4.o64 4b /r ] ND,SM0,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 1c) 300 324 001(4b) 110 : SM0,SM1,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNP, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17873, 358, 2322}, +}; + +static const struct itemplate instrux_CFCMOVNS[15] = { + /* 0 : CFCMOVNS rm16,reg16 [mr: evex.nf1.nd0.l0.m4.o16 49 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 0c) 300 320 001(49) 101 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNS, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+15643, 353, 2314}, + /* 1 : CFCMOVNS rm32,reg32 [mr: evex.nf1.nd0.l0.m4.o32 49 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 0c) 300 321 001(49) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNS, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+15803, 354, 2315}, + /* 2 : CFCMOVNS rm64,reg64 [mr: evex.nf1.nd0.l0.m4.o64 49 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 0c) 300 324 001(49) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNS, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+15963, 354, 2316}, + /* 3 : CFCMOVNS reg16,rm16 [rm: evex.nf0.nd0.l0.m4.o16 49 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(49) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNS, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16123, 353, 2317}, + /* 4 : CFCMOVNS reg32,rm32 [rm: evex.nf0.nd0.l0.m4.o32 49 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(49) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNS, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+16283, 354, 2318}, + /* 5 : CFCMOVNS reg64,rm64 [rm: evex.nf0.nd0.l0.m4.o64 49 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(49) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNS, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+16443, 354, 2319}, + /* 6 : CFCMOVNS reg16?,reg16,rm16 [vrm: evex.nf1.nd1.l0.m4.o16 49 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 1c) 300 320 001(49) 121 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNS, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+16603, 355, 2320}, + /* 7 : CFCMOVNS reg16,rm16 [rm: evex.nf1.nd0.l0.m4.o16 49 /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 0c) 300 320 001(49) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNS, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16763, 353, 2320}, + /* 8 : CFCMOVNS reg16?,rm16 [v+rm: evex.nf1.nd1.l0.m4.o16 49 /r ] SM0,ND,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 1c) 300 320 001(49) 110 : SM0,SM1,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNS, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16923, 356, 2320}, + /* 9 : CFCMOVNS reg32?,reg32,rm32 [vrm: evex.nf1.nd1.l0.m4.o32 49 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 1c) 300 321 001(49) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNS, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+17083, 357, 2321}, + /* 10 : CFCMOVNS reg32,rm32 [rm: evex.nf1.nd0.l0.m4.o32 49 /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 0c) 300 321 001(49) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNS, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17243, 354, 2321}, + /* 11 : CFCMOVNS reg32?,rm32 [v+rm: evex.nf1.nd1.l0.m4.o32 49 /r ] SM0,ND,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 1c) 300 321 001(49) 110 : SM0,SM1,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNS, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17403, 358, 2321}, + /* 12 : CFCMOVNS reg64?,reg64,rm64 [vrm: evex.nf1.nd1.l0.m4.o64 49 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 1c) 300 324 001(49) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNS, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+17563, 357, 2322}, + /* 13 : CFCMOVNS reg64,rm64 [rm: evex.nf1.nd0.l0.m4.o64 49 /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 0c) 300 324 001(49) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNS, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17723, 354, 2322}, + /* 14 : CFCMOVNS reg64?,rm64 [v+rm: evex.nf1.nd1.l0.m4.o64 49 /r ] ND,SM0,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 1c) 300 324 001(49) 110 : SM0,SM1,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNS, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17883, 358, 2322}, +}; + +static const struct itemplate instrux_CFCMOVNZ[15] = { + /* 0 : CFCMOVNZ rm16,reg16 [mr: evex.nf1.nd0.l0.m4.o16 45 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 0c) 300 320 001(45) 101 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNZ, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+15613, 353, 2314}, + /* 1 : CFCMOVNZ rm32,reg32 [mr: evex.nf1.nd0.l0.m4.o32 45 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 0c) 300 321 001(45) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNZ, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+15773, 354, 2315}, + /* 2 : CFCMOVNZ rm64,reg64 [mr: evex.nf1.nd0.l0.m4.o64 45 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 0c) 300 324 001(45) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNZ, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+15933, 354, 2316}, + /* 3 : CFCMOVNZ reg16,rm16 [rm: evex.nf0.nd0.l0.m4.o16 45 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(45) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNZ, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16093, 353, 2317}, + /* 4 : CFCMOVNZ reg32,rm32 [rm: evex.nf0.nd0.l0.m4.o32 45 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(45) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNZ, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+16253, 354, 2318}, + /* 5 : CFCMOVNZ reg64,rm64 [rm: evex.nf0.nd0.l0.m4.o64 45 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(45) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNZ, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+16413, 354, 2319}, + /* 6 : CFCMOVNZ reg16?,reg16,rm16 [vrm: evex.nf1.nd1.l0.m4.o16 45 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 1c) 300 320 001(45) 121 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNZ, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+16573, 355, 2320}, + /* 7 : CFCMOVNZ reg16,rm16 [rm: evex.nf1.nd0.l0.m4.o16 45 /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 0c) 300 320 001(45) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNZ, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16733, 353, 2320}, + /* 8 : CFCMOVNZ reg16?,rm16 [v+rm: evex.nf1.nd1.l0.m4.o16 45 /r ] SM0,ND,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 1c) 300 320 001(45) 110 : SM0,SM1,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNZ, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16893, 356, 2320}, + /* 9 : CFCMOVNZ reg32?,reg32,rm32 [vrm: evex.nf1.nd1.l0.m4.o32 45 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 1c) 300 321 001(45) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNZ, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+17053, 357, 2321}, + /* 10 : CFCMOVNZ reg32,rm32 [rm: evex.nf1.nd0.l0.m4.o32 45 /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 0c) 300 321 001(45) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNZ, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17213, 354, 2321}, + /* 11 : CFCMOVNZ reg32?,rm32 [v+rm: evex.nf1.nd1.l0.m4.o32 45 /r ] SM0,ND,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 1c) 300 321 001(45) 110 : SM0,SM1,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNZ, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17373, 358, 2321}, + /* 12 : CFCMOVNZ reg64?,reg64,rm64 [vrm: evex.nf1.nd1.l0.m4.o64 45 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 1c) 300 324 001(45) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNZ, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+17533, 357, 2322}, + /* 13 : CFCMOVNZ reg64,rm64 [rm: evex.nf1.nd0.l0.m4.o64 45 /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 0c) 300 324 001(45) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNZ, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17693, 354, 2322}, + /* 14 : CFCMOVNZ reg64?,rm64 [v+rm: evex.nf1.nd1.l0.m4.o64 45 /r ] ND,SM0,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 1c) 300 324 001(45) 110 : SM0,SM1,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNZ, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17853, 358, 2322}, +}; + +static const struct itemplate instrux_CFCMOVO[15] = { + /* 0 : CFCMOVO rm16,reg16 [mr: evex.nf1.nd0.l0.m4.o16 40 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 0c) 300 320 001(40) 101 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVO, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+15653, 353, 2314}, + /* 1 : CFCMOVO rm32,reg32 [mr: evex.nf1.nd0.l0.m4.o32 40 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 0c) 300 321 001(40) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVO, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+15813, 354, 2315}, + /* 2 : CFCMOVO rm64,reg64 [mr: evex.nf1.nd0.l0.m4.o64 40 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 0c) 300 324 001(40) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVO, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+15973, 354, 2316}, + /* 3 : CFCMOVO reg16,rm16 [rm: evex.nf0.nd0.l0.m4.o16 40 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(40) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVO, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16133, 353, 2317}, + /* 4 : CFCMOVO reg32,rm32 [rm: evex.nf0.nd0.l0.m4.o32 40 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(40) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVO, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+16293, 354, 2318}, + /* 5 : CFCMOVO reg64,rm64 [rm: evex.nf0.nd0.l0.m4.o64 40 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(40) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVO, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+16453, 354, 2319}, + /* 6 : CFCMOVO reg16?,reg16,rm16 [vrm: evex.nf1.nd1.l0.m4.o16 40 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 1c) 300 320 001(40) 121 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVO, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+16613, 355, 2320}, + /* 7 : CFCMOVO reg16,rm16 [rm: evex.nf1.nd0.l0.m4.o16 40 /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 0c) 300 320 001(40) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVO, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16773, 353, 2320}, + /* 8 : CFCMOVO reg16?,rm16 [v+rm: evex.nf1.nd1.l0.m4.o16 40 /r ] SM0,ND,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 1c) 300 320 001(40) 110 : SM0,SM1,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVO, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16933, 356, 2320}, + /* 9 : CFCMOVO reg32?,reg32,rm32 [vrm: evex.nf1.nd1.l0.m4.o32 40 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 1c) 300 321 001(40) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVO, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+17093, 357, 2321}, + /* 10 : CFCMOVO reg32,rm32 [rm: evex.nf1.nd0.l0.m4.o32 40 /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 0c) 300 321 001(40) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVO, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17253, 354, 2321}, + /* 11 : CFCMOVO reg32?,rm32 [v+rm: evex.nf1.nd1.l0.m4.o32 40 /r ] SM0,ND,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 1c) 300 321 001(40) 110 : SM0,SM1,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVO, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17413, 358, 2321}, + /* 12 : CFCMOVO reg64?,reg64,rm64 [vrm: evex.nf1.nd1.l0.m4.o64 40 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 1c) 300 324 001(40) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVO, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+17573, 357, 2322}, + /* 13 : CFCMOVO reg64,rm64 [rm: evex.nf1.nd0.l0.m4.o64 40 /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 0c) 300 324 001(40) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVO, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17733, 354, 2322}, + /* 14 : CFCMOVO reg64?,rm64 [v+rm: evex.nf1.nd1.l0.m4.o64 40 /r ] ND,SM0,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 1c) 300 324 001(40) 110 : SM0,SM1,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVO, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17893, 358, 2322}, +}; + +static const struct itemplate instrux_CFCMOVP[15] = { + /* 0 : CFCMOVP rm16,reg16 [mr: evex.nf1.nd0.l0.m4.o16 4a /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7d 0c) 300 320 001(4a) 101 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVP, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+15663, 353, 2314}, + /* 1 : CFCMOVP rm32,reg32 [mr: evex.nf1.nd0.l0.m4.o32 4a /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7c 0c) 300 321 001(4a) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVP, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+15823, 354, 2315}, + /* 2 : CFCMOVP rm64,reg64 [mr: evex.nf1.nd0.l0.m4.o64 4a /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 fc 0c) 300 324 001(4a) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVP, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+15983, 354, 2316}, + /* 3 : CFCMOVP reg16,rm16 [rm: evex.nf0.nd0.l0.m4.o16 4a /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7d 08) 300 320 001(4a) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVP, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16143, 353, 2317}, + /* 4 : CFCMOVP reg32,rm32 [rm: evex.nf0.nd0.l0.m4.o32 4a /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7c 08) 300 321 001(4a) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVP, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+16303, 354, 2318}, + /* 5 : CFCMOVP reg64,rm64 [rm: evex.nf0.nd0.l0.m4.o64 4a /r ] SM0-1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 fc 08) 300 324 001(4a) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVP, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+16463, 354, 2319}, + /* 6 : CFCMOVP reg16?,reg16,rm16 [vrm: evex.nf1.nd1.l0.m4.o16 4a /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 7d 1c) 300 320 001(4a) 121 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVP, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+16623, 355, 2320}, + /* 7 : CFCMOVP reg16,rm16 [rm: evex.nf1.nd0.l0.m4.o16 4a /r ] SM0,SM1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7d 0c) 300 320 001(4a) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVP, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16783, 353, 2320}, + /* 8 : CFCMOVP reg16?,rm16 [v+rm: evex.nf1.nd1.l0.m4.o16 4a /r ] SM0,ND,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 1c) 300 320 001(4a) 110 : SM0,SM1,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVP, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16943, 356, 2320}, + /* 9 : CFCMOVP reg32?,reg32,rm32 [vrm: evex.nf1.nd1.l0.m4.o32 4a /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 7c 1c) 300 321 001(4a) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVP, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+17103, 357, 2321}, + /* 10 : CFCMOVP reg32,rm32 [rm: evex.nf1.nd0.l0.m4.o32 4a /r ] SM0,SM1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7c 0c) 300 321 001(4a) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVP, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17263, 354, 2321}, + /* 11 : CFCMOVP reg32?,rm32 [v+rm: evex.nf1.nd1.l0.m4.o32 4a /r ] SM0,ND,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 1c) 300 321 001(4a) 110 : SM0,SM1,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVP, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17423, 358, 2321}, + /* 12 : CFCMOVP reg64?,reg64,rm64 [vrm: evex.nf1.nd1.l0.m4.o64 4a /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64,ND */ + /* 240(f4 fc 1c) 300 324 001(4a) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVP, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+17583, 357, 2322}, + /* 13 : CFCMOVP reg64,rm64 [rm: evex.nf1.nd0.l0.m4.o64 4a /r ] SM0,SM1,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 fc 0c) 300 324 001(4a) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVP, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17743, 354, 2322}, + /* 14 : CFCMOVP reg64?,rm64 [v+rm: evex.nf1.nd1.l0.m4.o64 4a /r ] ND,SM0,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 1c) 300 324 001(4a) 110 : SM0,SM1,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVP, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17903, 358, 2322}, +}; + +static const struct itemplate instrux_CFCMOVPE[15] = { + /* 0 : CFCMOVPE rm16,reg16 [mr: evex.nf1.nd0.l0.m4.o16 4a /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 0c) 300 320 001(4a) 101 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVPE, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+15663, 353, 2314}, + /* 1 : CFCMOVPE rm32,reg32 [mr: evex.nf1.nd0.l0.m4.o32 4a /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 0c) 300 321 001(4a) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVPE, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+15823, 354, 2315}, + /* 2 : CFCMOVPE rm64,reg64 [mr: evex.nf1.nd0.l0.m4.o64 4a /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 0c) 300 324 001(4a) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVPE, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+15983, 354, 2316}, + /* 3 : CFCMOVPE reg16,rm16 [rm: evex.nf0.nd0.l0.m4.o16 4a /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(4a) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVPE, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16143, 353, 2317}, + /* 4 : CFCMOVPE reg32,rm32 [rm: evex.nf0.nd0.l0.m4.o32 4a /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(4a) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVPE, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+16303, 354, 2318}, + /* 5 : CFCMOVPE reg64,rm64 [rm: evex.nf0.nd0.l0.m4.o64 4a /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(4a) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVPE, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+16463, 354, 2319}, + /* 6 : CFCMOVPE reg16?,reg16,rm16 [vrm: evex.nf1.nd1.l0.m4.o16 4a /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 1c) 300 320 001(4a) 121 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVPE, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+16623, 355, 2320}, + /* 7 : CFCMOVPE reg16,rm16 [rm: evex.nf1.nd0.l0.m4.o16 4a /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 0c) 300 320 001(4a) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVPE, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16783, 353, 2320}, + /* 8 : CFCMOVPE reg16?,rm16 [v+rm: evex.nf1.nd1.l0.m4.o16 4a /r ] SM0,ND,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 1c) 300 320 001(4a) 110 : SM0,SM1,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVPE, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16943, 356, 2320}, + /* 9 : CFCMOVPE reg32?,reg32,rm32 [vrm: evex.nf1.nd1.l0.m4.o32 4a /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 1c) 300 321 001(4a) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVPE, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+17103, 357, 2321}, + /* 10 : CFCMOVPE reg32,rm32 [rm: evex.nf1.nd0.l0.m4.o32 4a /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 0c) 300 321 001(4a) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVPE, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17263, 354, 2321}, + /* 11 : CFCMOVPE reg32?,rm32 [v+rm: evex.nf1.nd1.l0.m4.o32 4a /r ] SM0,ND,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 1c) 300 321 001(4a) 110 : SM0,SM1,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVPE, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17423, 358, 2321}, + /* 12 : CFCMOVPE reg64?,reg64,rm64 [vrm: evex.nf1.nd1.l0.m4.o64 4a /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 1c) 300 324 001(4a) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVPE, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+17583, 357, 2322}, + /* 13 : CFCMOVPE reg64,rm64 [rm: evex.nf1.nd0.l0.m4.o64 4a /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 0c) 300 324 001(4a) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVPE, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17743, 354, 2322}, + /* 14 : CFCMOVPE reg64?,rm64 [v+rm: evex.nf1.nd1.l0.m4.o64 4a /r ] ND,SM0,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 1c) 300 324 001(4a) 110 : SM0,SM1,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVPE, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17903, 358, 2322}, +}; + +static const struct itemplate instrux_CFCMOVPO[15] = { + /* 0 : CFCMOVPO rm16,reg16 [mr: evex.nf1.nd0.l0.m4.o16 4b /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 0c) 300 320 001(4b) 101 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVPO, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+15633, 353, 2314}, + /* 1 : CFCMOVPO rm32,reg32 [mr: evex.nf1.nd0.l0.m4.o32 4b /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 0c) 300 321 001(4b) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVPO, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+15793, 354, 2315}, + /* 2 : CFCMOVPO rm64,reg64 [mr: evex.nf1.nd0.l0.m4.o64 4b /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 0c) 300 324 001(4b) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVPO, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+15953, 354, 2316}, + /* 3 : CFCMOVPO reg16,rm16 [rm: evex.nf0.nd0.l0.m4.o16 4b /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(4b) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVPO, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16113, 353, 2317}, + /* 4 : CFCMOVPO reg32,rm32 [rm: evex.nf0.nd0.l0.m4.o32 4b /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(4b) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVPO, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+16273, 354, 2318}, + /* 5 : CFCMOVPO reg64,rm64 [rm: evex.nf0.nd0.l0.m4.o64 4b /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(4b) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVPO, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+16433, 354, 2319}, + /* 6 : CFCMOVPO reg16?,reg16,rm16 [vrm: evex.nf1.nd1.l0.m4.o16 4b /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 1c) 300 320 001(4b) 121 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVPO, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+16593, 355, 2320}, + /* 7 : CFCMOVPO reg16,rm16 [rm: evex.nf1.nd0.l0.m4.o16 4b /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 0c) 300 320 001(4b) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVPO, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16753, 353, 2320}, + /* 8 : CFCMOVPO reg16?,rm16 [v+rm: evex.nf1.nd1.l0.m4.o16 4b /r ] SM0,ND,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 1c) 300 320 001(4b) 110 : SM0,SM1,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVPO, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16913, 356, 2320}, + /* 9 : CFCMOVPO reg32?,reg32,rm32 [vrm: evex.nf1.nd1.l0.m4.o32 4b /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 1c) 300 321 001(4b) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVPO, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+17073, 357, 2321}, + /* 10 : CFCMOVPO reg32,rm32 [rm: evex.nf1.nd0.l0.m4.o32 4b /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 0c) 300 321 001(4b) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVPO, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17233, 354, 2321}, + /* 11 : CFCMOVPO reg32?,rm32 [v+rm: evex.nf1.nd1.l0.m4.o32 4b /r ] SM0,ND,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 1c) 300 321 001(4b) 110 : SM0,SM1,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVPO, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17393, 358, 2321}, + /* 12 : CFCMOVPO reg64?,reg64,rm64 [vrm: evex.nf1.nd1.l0.m4.o64 4b /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 1c) 300 324 001(4b) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVPO, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+17553, 357, 2322}, + /* 13 : CFCMOVPO reg64,rm64 [rm: evex.nf1.nd0.l0.m4.o64 4b /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 0c) 300 324 001(4b) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVPO, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17713, 354, 2322}, + /* 14 : CFCMOVPO reg64?,rm64 [v+rm: evex.nf1.nd1.l0.m4.o64 4b /r ] ND,SM0,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 1c) 300 324 001(4b) 110 : SM0,SM1,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVPO, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17873, 358, 2322}, +}; + +static const struct itemplate instrux_CFCMOVS[15] = { + /* 0 : CFCMOVS rm16,reg16 [mr: evex.nf1.nd0.l0.m4.o16 48 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 0c) 300 320 001(48) 101 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVS, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+15673, 353, 2314}, + /* 1 : CFCMOVS rm32,reg32 [mr: evex.nf1.nd0.l0.m4.o32 48 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 0c) 300 321 001(48) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVS, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+15833, 354, 2315}, + /* 2 : CFCMOVS rm64,reg64 [mr: evex.nf1.nd0.l0.m4.o64 48 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 0c) 300 324 001(48) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVS, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+15993, 354, 2316}, + /* 3 : CFCMOVS reg16,rm16 [rm: evex.nf0.nd0.l0.m4.o16 48 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(48) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVS, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16153, 353, 2317}, + /* 4 : CFCMOVS reg32,rm32 [rm: evex.nf0.nd0.l0.m4.o32 48 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(48) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVS, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+16313, 354, 2318}, + /* 5 : CFCMOVS reg64,rm64 [rm: evex.nf0.nd0.l0.m4.o64 48 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(48) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVS, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+16473, 354, 2319}, + /* 6 : CFCMOVS reg16?,reg16,rm16 [vrm: evex.nf1.nd1.l0.m4.o16 48 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 1c) 300 320 001(48) 121 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVS, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+16633, 355, 2320}, + /* 7 : CFCMOVS reg16,rm16 [rm: evex.nf1.nd0.l0.m4.o16 48 /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 0c) 300 320 001(48) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVS, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16793, 353, 2320}, + /* 8 : CFCMOVS reg16?,rm16 [v+rm: evex.nf1.nd1.l0.m4.o16 48 /r ] SM0,ND,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 1c) 300 320 001(48) 110 : SM0,SM1,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVS, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16953, 356, 2320}, + /* 9 : CFCMOVS reg32?,reg32,rm32 [vrm: evex.nf1.nd1.l0.m4.o32 48 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 1c) 300 321 001(48) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVS, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+17113, 357, 2321}, + /* 10 : CFCMOVS reg32,rm32 [rm: evex.nf1.nd0.l0.m4.o32 48 /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 0c) 300 321 001(48) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVS, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17273, 354, 2321}, + /* 11 : CFCMOVS reg32?,rm32 [v+rm: evex.nf1.nd1.l0.m4.o32 48 /r ] SM0,ND,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 1c) 300 321 001(48) 110 : SM0,SM1,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVS, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17433, 358, 2321}, + /* 12 : CFCMOVS reg64?,reg64,rm64 [vrm: evex.nf1.nd1.l0.m4.o64 48 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 1c) 300 324 001(48) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVS, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+17593, 357, 2322}, + /* 13 : CFCMOVS reg64,rm64 [rm: evex.nf1.nd0.l0.m4.o64 48 /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 0c) 300 324 001(48) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVS, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17753, 354, 2322}, + /* 14 : CFCMOVS reg64?,rm64 [v+rm: evex.nf1.nd1.l0.m4.o64 48 /r ] ND,SM0,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 1c) 300 324 001(48) 110 : SM0,SM1,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVS, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17913, 358, 2322}, +}; + +static const struct itemplate instrux_CFCMOVZ[15] = { + /* 0 : CFCMOVZ rm16,reg16 [mr: evex.nf1.nd0.l0.m4.o16 44 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 0c) 300 320 001(44) 101 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVZ, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+15563, 353, 2314}, + /* 1 : CFCMOVZ rm32,reg32 [mr: evex.nf1.nd0.l0.m4.o32 44 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 0c) 300 321 001(44) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVZ, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+15723, 354, 2315}, + /* 2 : CFCMOVZ rm64,reg64 [mr: evex.nf1.nd0.l0.m4.o64 44 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 0c) 300 324 001(44) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVZ, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+15883, 354, 2316}, + /* 3 : CFCMOVZ reg16,rm16 [rm: evex.nf0.nd0.l0.m4.o16 44 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(44) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVZ, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16043, 353, 2317}, + /* 4 : CFCMOVZ reg32,rm32 [rm: evex.nf0.nd0.l0.m4.o32 44 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(44) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVZ, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+16203, 354, 2318}, + /* 5 : CFCMOVZ reg64,rm64 [rm: evex.nf0.nd0.l0.m4.o64 44 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(44) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVZ, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+16363, 354, 2319}, + /* 6 : CFCMOVZ reg16?,reg16,rm16 [vrm: evex.nf1.nd1.l0.m4.o16 44 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 1c) 300 320 001(44) 121 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVZ, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+16523, 355, 2320}, + /* 7 : CFCMOVZ reg16,rm16 [rm: evex.nf1.nd0.l0.m4.o16 44 /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 0c) 300 320 001(44) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVZ, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16683, 353, 2320}, + /* 8 : CFCMOVZ reg16?,rm16 [v+rm: evex.nf1.nd1.l0.m4.o16 44 /r ] SM0,ND,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 1c) 300 320 001(44) 110 : SM0,SM1,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVZ, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16843, 356, 2320}, + /* 9 : CFCMOVZ reg32?,reg32,rm32 [vrm: evex.nf1.nd1.l0.m4.o32 44 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 1c) 300 321 001(44) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVZ, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+17003, 357, 2321}, + /* 10 : CFCMOVZ reg32,rm32 [rm: evex.nf1.nd0.l0.m4.o32 44 /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 0c) 300 321 001(44) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVZ, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17163, 354, 2321}, + /* 11 : CFCMOVZ reg32?,rm32 [v+rm: evex.nf1.nd1.l0.m4.o32 44 /r ] SM0,ND,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 1c) 300 321 001(44) 110 : SM0,SM1,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVZ, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17323, 358, 2321}, + /* 12 : CFCMOVZ reg64?,reg64,rm64 [vrm: evex.nf1.nd1.l0.m4.o64 44 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 1c) 300 324 001(44) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVZ, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+17483, 357, 2322}, + /* 13 : CFCMOVZ reg64,rm64 [rm: evex.nf1.nd0.l0.m4.o64 44 /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 0c) 300 324 001(44) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVZ, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17643, 354, 2322}, + /* 14 : CFCMOVZ reg64?,rm64 [v+rm: evex.nf1.nd1.l0.m4.o64 44 /r ] ND,SM0,SM1,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 1c) 300 324 001(44) 110 : SM0,SM1,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVZ, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17803, 358, 2322}, +}; + +static const struct itemplate instrux_SETA[4] = { + /* 0 : SETA rm8 [m: 0f 97 /0 ] AR0,SB,386 */ + /* 355 001(97) 200 : AR0,SB,386 */ + {I_SETA, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72374, 359, 2324}, + /* 1 : SETA reg64 [m: evex.nd1.l0.f2.m4.wig 47 /0 ] ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(47) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETA, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25141, 360, 2325}, + /* 2 : SETA reg32 [m: evex.nd1.l0.f2.m4.wig 47 /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(47) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETA, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25141, 360, 2326}, + /* 3 : SETA rm8 [m: evex.zu.l0.f2.m4.wig 47 /0 ] LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 08) 300 001(47) 200 : ZU,ZU_E,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETA, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25285, 361, 2329}, +}; + +static const struct itemplate instrux_SETAE[4] = { + /* 0 : SETAE rm8 [m: 0f 93 /0 ] AR0,SB,386,ND */ + /* 355 001(93) 200 : AR0,SB,386 */ + {I_SETAE, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72379, 359, 2324}, + /* 1 : SETAE reg64 [m: evex.nd1.l0.f2.m4.wig 43 /0 ] ZU,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7f 18) 300 001(43) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETAE, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25150, 360, 2325}, + /* 2 : SETAE reg32 [m: evex.nd1.l0.f2.m4.wig 43 /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(43) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETAE, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25150, 360, 2326}, + /* 3 : SETAE rm8 [m: evex.zu.l0.f2.m4.wig 43 /0 ] LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7f 08) 300 001(43) 200 : ZU,ZU_E,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETAE, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25294, 361, 2329}, +}; + +static const struct itemplate instrux_SETB[4] = { + /* 0 : SETB rm8 [m: 0f 92 /0 ] AR0,SB,386,ND */ + /* 355 001(92) 200 : AR0,SB,386 */ + {I_SETB, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72384, 359, 2324}, + /* 1 : SETB reg64 [m: evex.nd1.l0.f2.m4.wig 42 /0 ] ZU,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7f 18) 300 001(42) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETB, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25159, 360, 2325}, + /* 2 : SETB reg32 [m: evex.nd1.l0.f2.m4.wig 42 /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(42) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETB, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25159, 360, 2326}, + /* 3 : SETB rm8 [m: evex.zu.l0.f2.m4.wig 42 /0 ] LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7f 08) 300 001(42) 200 : ZU,ZU_E,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETB, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25303, 361, 2329}, +}; + +static const struct itemplate instrux_SETBE[4] = { + /* 0 : SETBE rm8 [m: 0f 96 /0 ] AR0,SB,386,ND */ + /* 355 001(96) 200 : AR0,SB,386 */ + {I_SETBE, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72389, 359, 2324}, + /* 1 : SETBE reg64 [m: evex.nd1.l0.f2.m4.wig 46 /0 ] ZU,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7f 18) 300 001(46) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETBE, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25168, 360, 2325}, + /* 2 : SETBE reg32 [m: evex.nd1.l0.f2.m4.wig 46 /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(46) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETBE, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25168, 360, 2326}, + /* 3 : SETBE rm8 [m: evex.zu.l0.f2.m4.wig 46 /0 ] LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7f 08) 300 001(46) 200 : ZU,ZU_E,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETBE, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25312, 361, 2329}, +}; + +static const struct itemplate instrux_SETC[4] = { + /* 0 : SETC rm8 [m: 0f 92 /0 ] AR0,SB,386 */ + /* 355 001(92) 200 : AR0,SB,386 */ + {I_SETC, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72384, 359, 2324}, + /* 1 : SETC reg64 [m: evex.nd1.l0.f2.m4.wig 42 /0 ] ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(42) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETC, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25159, 360, 2325}, + /* 2 : SETC reg32 [m: evex.nd1.l0.f2.m4.wig 42 /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(42) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETC, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25159, 360, 2326}, + /* 3 : SETC rm8 [m: evex.zu.l0.f2.m4.wig 42 /0 ] LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 08) 300 001(42) 200 : ZU,ZU_E,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETC, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25303, 361, 2329}, +}; + +static const struct itemplate instrux_SETE[4] = { + /* 0 : SETE rm8 [m: 0f 94 /0 ] AR0,SB,386,ND */ + /* 355 001(94) 200 : AR0,SB,386 */ + {I_SETE, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72394, 359, 2324}, + /* 1 : SETE reg64 [m: evex.nd1.l0.f2.m4.wig 44 /0 ] ZU,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7f 18) 300 001(44) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETE, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25177, 360, 2325}, + /* 2 : SETE reg32 [m: evex.nd1.l0.f2.m4.wig 44 /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(44) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETE, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25177, 360, 2326}, + /* 3 : SETE rm8 [m: evex.zu.l0.f2.m4.wig 44 /0 ] LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7f 08) 300 001(44) 200 : ZU,ZU_E,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETE, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25321, 361, 2329}, +}; + +static const struct itemplate instrux_SETG[4] = { + /* 0 : SETG rm8 [m: 0f 9f /0 ] AR0,SB,386 */ + /* 355 001(9f) 200 : AR0,SB,386 */ + {I_SETG, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72399, 359, 2324}, + /* 1 : SETG reg64 [m: evex.nd1.l0.f2.m4.wig 4f /0 ] ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(4f) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETG, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25186, 360, 2325}, + /* 2 : SETG reg32 [m: evex.nd1.l0.f2.m4.wig 4f /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(4f) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETG, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25186, 360, 2326}, + /* 3 : SETG rm8 [m: evex.zu.l0.f2.m4.wig 4f /0 ] LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 08) 300 001(4f) 200 : ZU,ZU_E,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETG, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25330, 361, 2329}, +}; + +static const struct itemplate instrux_SETGE[4] = { + /* 0 : SETGE rm8 [m: 0f 9d /0 ] AR0,SB,386,ND */ + /* 355 001(9d) 200 : AR0,SB,386 */ + {I_SETGE, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72404, 359, 2324}, + /* 1 : SETGE reg64 [m: evex.nd1.l0.f2.m4.wig 4d /0 ] ZU,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7f 18) 300 001(4d) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETGE, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25195, 360, 2325}, + /* 2 : SETGE reg32 [m: evex.nd1.l0.f2.m4.wig 4d /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(4d) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETGE, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25195, 360, 2326}, + /* 3 : SETGE rm8 [m: evex.zu.l0.f2.m4.wig 4d /0 ] LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7f 08) 300 001(4d) 200 : ZU,ZU_E,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETGE, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25339, 361, 2329}, +}; + +static const struct itemplate instrux_SETL[4] = { + /* 0 : SETL rm8 [m: 0f 9c /0 ] AR0,SB,386 */ + /* 355 001(9c) 200 : AR0,SB,386 */ + {I_SETL, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72409, 359, 2324}, + /* 1 : SETL reg64 [m: evex.nd1.l0.f2.m4.wig 4c /0 ] ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(4c) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETL, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25204, 360, 2325}, + /* 2 : SETL reg32 [m: evex.nd1.l0.f2.m4.wig 4c /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(4c) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETL, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25204, 360, 2326}, + /* 3 : SETL rm8 [m: evex.zu.l0.f2.m4.wig 4c /0 ] LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 08) 300 001(4c) 200 : ZU,ZU_E,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETL, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25348, 361, 2329}, +}; + +static const struct itemplate instrux_SETLE[4] = { + /* 0 : SETLE rm8 [m: 0f 9e /0 ] AR0,SB,386,ND */ + /* 355 001(9e) 200 : AR0,SB,386 */ + {I_SETLE, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72414, 359, 2324}, + /* 1 : SETLE reg64 [m: evex.nd1.l0.f2.m4.wig 4e /0 ] ZU,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7f 18) 300 001(4e) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETLE, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25213, 360, 2325}, + /* 2 : SETLE reg32 [m: evex.nd1.l0.f2.m4.wig 4e /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(4e) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETLE, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25213, 360, 2326}, + /* 3 : SETLE rm8 [m: evex.zu.l0.f2.m4.wig 4e /0 ] LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7f 08) 300 001(4e) 200 : ZU,ZU_E,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETLE, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25357, 361, 2329}, +}; + +static const struct itemplate instrux_SETNA[4] = { + /* 0 : SETNA rm8 [m: 0f 96 /0 ] AR0,SB,386 */ + /* 355 001(96) 200 : AR0,SB,386 */ + {I_SETNA, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72389, 359, 2324}, + /* 1 : SETNA reg64 [m: evex.nd1.l0.f2.m4.wig 46 /0 ] ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(46) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNA, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25168, 360, 2325}, + /* 2 : SETNA reg32 [m: evex.nd1.l0.f2.m4.wig 46 /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(46) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNA, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25168, 360, 2326}, + /* 3 : SETNA rm8 [m: evex.zu.l0.f2.m4.wig 46 /0 ] LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 08) 300 001(46) 200 : ZU,ZU_E,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNA, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25312, 361, 2329}, +}; + +static const struct itemplate instrux_SETNAE[4] = { + /* 0 : SETNAE rm8 [m: 0f 92 /0 ] AR0,SB,386,ND */ + /* 355 001(92) 200 : AR0,SB,386 */ + {I_SETNAE, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72384, 359, 2324}, + /* 1 : SETNAE reg64 [m: evex.nd1.l0.f2.m4.wig 42 /0 ] ZU,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7f 18) 300 001(42) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNAE, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25159, 360, 2325}, + /* 2 : SETNAE reg32 [m: evex.nd1.l0.f2.m4.wig 42 /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(42) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNAE, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25159, 360, 2326}, + /* 3 : SETNAE rm8 [m: evex.zu.l0.f2.m4.wig 42 /0 ] LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7f 08) 300 001(42) 200 : ZU,ZU_E,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNAE, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25303, 361, 2329}, +}; + +static const struct itemplate instrux_SETNB[4] = { + /* 0 : SETNB rm8 [m: 0f 93 /0 ] AR0,SB,386,ND */ + /* 355 001(93) 200 : AR0,SB,386 */ + {I_SETNB, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72379, 359, 2324}, + /* 1 : SETNB reg64 [m: evex.nd1.l0.f2.m4.wig 43 /0 ] ZU,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7f 18) 300 001(43) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNB, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25150, 360, 2325}, + /* 2 : SETNB reg32 [m: evex.nd1.l0.f2.m4.wig 43 /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(43) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNB, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25150, 360, 2326}, + /* 3 : SETNB rm8 [m: evex.zu.l0.f2.m4.wig 43 /0 ] LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7f 08) 300 001(43) 200 : ZU,ZU_E,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNB, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25294, 361, 2329}, +}; + +static const struct itemplate instrux_SETNBE[4] = { + /* 0 : SETNBE rm8 [m: 0f 97 /0 ] AR0,SB,386,ND */ + /* 355 001(97) 200 : AR0,SB,386 */ + {I_SETNBE, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72374, 359, 2324}, + /* 1 : SETNBE reg64 [m: evex.nd1.l0.f2.m4.wig 47 /0 ] ZU,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7f 18) 300 001(47) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNBE, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25141, 360, 2325}, + /* 2 : SETNBE reg32 [m: evex.nd1.l0.f2.m4.wig 47 /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(47) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNBE, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25141, 360, 2326}, + /* 3 : SETNBE rm8 [m: evex.zu.l0.f2.m4.wig 47 /0 ] LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7f 08) 300 001(47) 200 : ZU,ZU_E,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNBE, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25285, 361, 2329}, +}; + +static const struct itemplate instrux_SETNC[4] = { + /* 0 : SETNC rm8 [m: 0f 93 /0 ] AR0,SB,386 */ + /* 355 001(93) 200 : AR0,SB,386 */ + {I_SETNC, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72379, 359, 2324}, + /* 1 : SETNC reg64 [m: evex.nd1.l0.f2.m4.wig 43 /0 ] ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(43) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNC, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25150, 360, 2325}, + /* 2 : SETNC reg32 [m: evex.nd1.l0.f2.m4.wig 43 /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(43) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNC, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25150, 360, 2326}, + /* 3 : SETNC rm8 [m: evex.zu.l0.f2.m4.wig 43 /0 ] LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 08) 300 001(43) 200 : ZU,ZU_E,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNC, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25294, 361, 2329}, +}; + +static const struct itemplate instrux_SETNE[4] = { + /* 0 : SETNE rm8 [m: 0f 95 /0 ] AR0,SB,386,ND */ + /* 355 001(95) 200 : AR0,SB,386 */ + {I_SETNE, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72419, 359, 2324}, + /* 1 : SETNE reg64 [m: evex.nd1.l0.f2.m4.wig 45 /0 ] ZU,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7f 18) 300 001(45) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNE, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25222, 360, 2325}, + /* 2 : SETNE reg32 [m: evex.nd1.l0.f2.m4.wig 45 /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(45) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNE, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25222, 360, 2326}, + /* 3 : SETNE rm8 [m: evex.zu.l0.f2.m4.wig 45 /0 ] LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7f 08) 300 001(45) 200 : ZU,ZU_E,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNE, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25366, 361, 2329}, +}; + +static const struct itemplate instrux_SETNG[4] = { + /* 0 : SETNG rm8 [m: 0f 9e /0 ] AR0,SB,386 */ + /* 355 001(9e) 200 : AR0,SB,386 */ + {I_SETNG, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72414, 359, 2324}, + /* 1 : SETNG reg64 [m: evex.nd1.l0.f2.m4.wig 4e /0 ] ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(4e) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNG, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25213, 360, 2325}, + /* 2 : SETNG reg32 [m: evex.nd1.l0.f2.m4.wig 4e /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(4e) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNG, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25213, 360, 2326}, + /* 3 : SETNG rm8 [m: evex.zu.l0.f2.m4.wig 4e /0 ] LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 08) 300 001(4e) 200 : ZU,ZU_E,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNG, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25357, 361, 2329}, +}; + +static const struct itemplate instrux_SETNGE[4] = { + /* 0 : SETNGE rm8 [m: 0f 9c /0 ] AR0,SB,386,ND */ + /* 355 001(9c) 200 : AR0,SB,386 */ + {I_SETNGE, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72409, 359, 2324}, + /* 1 : SETNGE reg64 [m: evex.nd1.l0.f2.m4.wig 4c /0 ] ZU,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7f 18) 300 001(4c) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNGE, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25204, 360, 2325}, + /* 2 : SETNGE reg32 [m: evex.nd1.l0.f2.m4.wig 4c /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(4c) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNGE, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25204, 360, 2326}, + /* 3 : SETNGE rm8 [m: evex.zu.l0.f2.m4.wig 4c /0 ] LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7f 08) 300 001(4c) 200 : ZU,ZU_E,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNGE, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25348, 361, 2329}, +}; + +static const struct itemplate instrux_SETNL[4] = { + /* 0 : SETNL rm8 [m: 0f 9d /0 ] AR0,SB,386 */ + /* 355 001(9d) 200 : AR0,SB,386 */ + {I_SETNL, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72404, 359, 2324}, + /* 1 : SETNL reg64 [m: evex.nd1.l0.f2.m4.wig 4d /0 ] ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(4d) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNL, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25195, 360, 2325}, + /* 2 : SETNL reg32 [m: evex.nd1.l0.f2.m4.wig 4d /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(4d) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNL, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25195, 360, 2326}, + /* 3 : SETNL rm8 [m: evex.zu.l0.f2.m4.wig 4d /0 ] LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 08) 300 001(4d) 200 : ZU,ZU_E,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNL, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25339, 361, 2329}, +}; + +static const struct itemplate instrux_SETNLE[4] = { + /* 0 : SETNLE rm8 [m: 0f 9f /0 ] AR0,SB,386,ND */ + /* 355 001(9f) 200 : AR0,SB,386 */ + {I_SETNLE, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72399, 359, 2324}, + /* 1 : SETNLE reg64 [m: evex.nd1.l0.f2.m4.wig 4f /0 ] ZU,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7f 18) 300 001(4f) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNLE, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25186, 360, 2325}, + /* 2 : SETNLE reg32 [m: evex.nd1.l0.f2.m4.wig 4f /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(4f) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNLE, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25186, 360, 2326}, + /* 3 : SETNLE rm8 [m: evex.zu.l0.f2.m4.wig 4f /0 ] LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7f 08) 300 001(4f) 200 : ZU,ZU_E,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNLE, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25330, 361, 2329}, +}; + +static const struct itemplate instrux_SETNO[4] = { + /* 0 : SETNO rm8 [m: 0f 91 /0 ] AR0,SB,386 */ + /* 355 001(91) 200 : AR0,SB,386 */ + {I_SETNO, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72424, 359, 2324}, + /* 1 : SETNO reg64 [m: evex.nd1.l0.f2.m4.wig 41 /0 ] ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(41) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNO, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25231, 360, 2325}, + /* 2 : SETNO reg32 [m: evex.nd1.l0.f2.m4.wig 41 /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(41) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNO, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25231, 360, 2326}, + /* 3 : SETNO rm8 [m: evex.zu.l0.f2.m4.wig 41 /0 ] LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 08) 300 001(41) 200 : ZU,ZU_E,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNO, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25375, 361, 2329}, +}; + +static const struct itemplate instrux_SETNP[4] = { + /* 0 : SETNP rm8 [m: 0f 9b /0 ] AR0,SB,386,ND */ + /* 355 001(9b) 200 : AR0,SB,386 */ + {I_SETNP, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72429, 359, 2324}, + /* 1 : SETNP reg64 [m: evex.nd1.l0.f2.m4.wig 4b /0 ] ZU,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7f 18) 300 001(4b) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNP, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25240, 360, 2325}, + /* 2 : SETNP reg32 [m: evex.nd1.l0.f2.m4.wig 4b /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(4b) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNP, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25240, 360, 2326}, + /* 3 : SETNP rm8 [m: evex.zu.l0.f2.m4.wig 4b /0 ] LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7f 08) 300 001(4b) 200 : ZU,ZU_E,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNP, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25384, 361, 2329}, +}; + +static const struct itemplate instrux_SETNS[4] = { + /* 0 : SETNS rm8 [m: 0f 99 /0 ] AR0,SB,386 */ + /* 355 001(99) 200 : AR0,SB,386 */ + {I_SETNS, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72434, 359, 2324}, + /* 1 : SETNS reg64 [m: evex.nd1.l0.f2.m4.wig 49 /0 ] ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(49) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNS, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25249, 360, 2325}, + /* 2 : SETNS reg32 [m: evex.nd1.l0.f2.m4.wig 49 /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(49) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNS, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25249, 360, 2326}, + /* 3 : SETNS rm8 [m: evex.zu.l0.f2.m4.wig 49 /0 ] LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 08) 300 001(49) 200 : ZU,ZU_E,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNS, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25393, 361, 2329}, +}; + +static const struct itemplate instrux_SETNZ[4] = { + /* 0 : SETNZ rm8 [m: 0f 95 /0 ] AR0,SB,386 */ + /* 355 001(95) 200 : AR0,SB,386 */ + {I_SETNZ, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72419, 359, 2324}, + /* 1 : SETNZ reg64 [m: evex.nd1.l0.f2.m4.wig 45 /0 ] ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(45) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNZ, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25222, 360, 2325}, + /* 2 : SETNZ reg32 [m: evex.nd1.l0.f2.m4.wig 45 /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(45) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNZ, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25222, 360, 2326}, + /* 3 : SETNZ rm8 [m: evex.zu.l0.f2.m4.wig 45 /0 ] LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 08) 300 001(45) 200 : ZU,ZU_E,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNZ, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25366, 361, 2329}, +}; + +static const struct itemplate instrux_SETO[4] = { + /* 0 : SETO rm8 [m: 0f 90 /0 ] AR0,SB,386 */ + /* 355 001(90) 200 : AR0,SB,386 */ + {I_SETO, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72439, 359, 2324}, + /* 1 : SETO reg64 [m: evex.nd1.l0.f2.m4.wig 40 /0 ] ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(40) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETO, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25258, 360, 2325}, + /* 2 : SETO reg32 [m: evex.nd1.l0.f2.m4.wig 40 /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(40) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETO, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25258, 360, 2326}, + /* 3 : SETO rm8 [m: evex.zu.l0.f2.m4.wig 40 /0 ] LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 08) 300 001(40) 200 : ZU,ZU_E,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETO, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25402, 361, 2329}, +}; + +static const struct itemplate instrux_SETP[4] = { + /* 0 : SETP rm8 [m: 0f 9a /0 ] AR0,SB,386,ND */ + /* 355 001(9a) 200 : AR0,SB,386 */ + {I_SETP, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72444, 359, 2324}, + /* 1 : SETP reg64 [m: evex.nd1.l0.f2.m4.wig 4a /0 ] ZU,LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7f 18) 300 001(4a) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETP, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25267, 360, 2325}, + /* 2 : SETP reg32 [m: evex.nd1.l0.f2.m4.wig 4a /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(4a) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETP, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25267, 360, 2326}, + /* 3 : SETP rm8 [m: evex.zu.l0.f2.m4.wig 4a /0 ] LONG,PROT,APX,X86_64,ND */ + /* 250(f4 7f 08) 300 001(4a) 200 : ZU,ZU_E,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETP, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25411, 361, 2329}, +}; + +static const struct itemplate instrux_SETPE[4] = { + /* 0 : SETPE rm8 [m: 0f 9a /0 ] AR0,SB,386 */ + /* 355 001(9a) 200 : AR0,SB,386 */ + {I_SETPE, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72444, 359, 2324}, + /* 1 : SETPE reg64 [m: evex.nd1.l0.f2.m4.wig 4a /0 ] ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(4a) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETPE, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25267, 360, 2325}, + /* 2 : SETPE reg32 [m: evex.nd1.l0.f2.m4.wig 4a /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(4a) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETPE, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25267, 360, 2326}, + /* 3 : SETPE rm8 [m: evex.zu.l0.f2.m4.wig 4a /0 ] LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 08) 300 001(4a) 200 : ZU,ZU_E,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETPE, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25411, 361, 2329}, +}; + +static const struct itemplate instrux_SETPO[4] = { + /* 0 : SETPO rm8 [m: 0f 9b /0 ] AR0,SB,386 */ + /* 355 001(9b) 200 : AR0,SB,386 */ + {I_SETPO, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72429, 359, 2324}, + /* 1 : SETPO reg64 [m: evex.nd1.l0.f2.m4.wig 4b /0 ] ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(4b) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETPO, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25240, 360, 2325}, + /* 2 : SETPO reg32 [m: evex.nd1.l0.f2.m4.wig 4b /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(4b) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETPO, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25240, 360, 2326}, + /* 3 : SETPO rm8 [m: evex.zu.l0.f2.m4.wig 4b /0 ] LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 08) 300 001(4b) 200 : ZU,ZU_E,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETPO, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25384, 361, 2329}, +}; + +static const struct itemplate instrux_SETS[4] = { + /* 0 : SETS rm8 [m: 0f 98 /0 ] AR0,SB,386 */ + /* 355 001(98) 200 : AR0,SB,386 */ + {I_SETS, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72449, 359, 2324}, + /* 1 : SETS reg64 [m: evex.nd1.l0.f2.m4.wig 48 /0 ] ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(48) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETS, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25276, 360, 2325}, + /* 2 : SETS reg32 [m: evex.nd1.l0.f2.m4.wig 48 /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(48) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETS, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25276, 360, 2326}, + /* 3 : SETS rm8 [m: evex.zu.l0.f2.m4.wig 48 /0 ] LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 08) 300 001(48) 200 : ZU,ZU_E,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETS, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25420, 361, 2329}, +}; + +static const struct itemplate instrux_SETZ[4] = { + /* 0 : SETZ rm8 [m: 0f 94 /0 ] AR0,SB,386 */ + /* 355 001(94) 200 : AR0,SB,386 */ + {I_SETZ, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72394, 359, 2324}, + /* 1 : SETZ reg64 [m: evex.nd1.l0.f2.m4.wig 44 /0 ] ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(44) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETZ, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25177, 360, 2325}, + /* 2 : SETZ reg32 [m: evex.nd1.l0.f2.m4.wig 44 /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(44) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETZ, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25177, 360, 2326}, + /* 3 : SETZ rm8 [m: evex.zu.l0.f2.m4.wig 44 /0 ] LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 08) 300 001(44) 200 : ZU,ZU_E,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETZ, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25321, 361, 2329}, +}; + +static const struct itemplate instrux_SETAZU[3] = { + /* 0 : SETAZU reg64 [m: evex.nd1.l0.f2.m4.wig 47 /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(47) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETAZU, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25141, 360, 2327}, + /* 1 : SETAZU reg32 [m: evex.nd1.l0.f2.m4.wig 47 /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(47) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETAZU, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25141, 360, 2328}, + /* 2 : SETAZU rm8 [m: evex.nd1.l0.f2.m4.wig 47 /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(47) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETAZU, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25141, 360, 2330}, +}; + +static const struct itemplate instrux_SETAEZU[3] = { + /* 0 : SETAEZU reg64 [m: evex.nd1.l0.f2.m4.wig 43 /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(43) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETAEZU, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25150, 360, 2327}, + /* 1 : SETAEZU reg32 [m: evex.nd1.l0.f2.m4.wig 43 /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(43) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETAEZU, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25150, 360, 2328}, + /* 2 : SETAEZU rm8 [m: evex.nd1.l0.f2.m4.wig 43 /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(43) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETAEZU, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25150, 360, 2330}, +}; + +static const struct itemplate instrux_SETBZU[3] = { + /* 0 : SETBZU reg64 [m: evex.nd1.l0.f2.m4.wig 42 /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(42) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETBZU, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25159, 360, 2327}, + /* 1 : SETBZU reg32 [m: evex.nd1.l0.f2.m4.wig 42 /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(42) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETBZU, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25159, 360, 2328}, + /* 2 : SETBZU rm8 [m: evex.nd1.l0.f2.m4.wig 42 /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(42) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETBZU, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25159, 360, 2330}, +}; + +static const struct itemplate instrux_SETBEZU[3] = { + /* 0 : SETBEZU reg64 [m: evex.nd1.l0.f2.m4.wig 46 /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(46) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETBEZU, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25168, 360, 2327}, + /* 1 : SETBEZU reg32 [m: evex.nd1.l0.f2.m4.wig 46 /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(46) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETBEZU, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25168, 360, 2328}, + /* 2 : SETBEZU rm8 [m: evex.nd1.l0.f2.m4.wig 46 /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(46) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETBEZU, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25168, 360, 2330}, +}; + +static const struct itemplate instrux_SETCZU[3] = { + /* 0 : SETCZU reg64 [m: evex.nd1.l0.f2.m4.wig 42 /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(42) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETCZU, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25159, 360, 2327}, + /* 1 : SETCZU reg32 [m: evex.nd1.l0.f2.m4.wig 42 /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(42) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETCZU, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25159, 360, 2328}, + /* 2 : SETCZU rm8 [m: evex.nd1.l0.f2.m4.wig 42 /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(42) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETCZU, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25159, 360, 2330}, +}; + +static const struct itemplate instrux_SETEZU[3] = { + /* 0 : SETEZU reg64 [m: evex.nd1.l0.f2.m4.wig 44 /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(44) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETEZU, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25177, 360, 2327}, + /* 1 : SETEZU reg32 [m: evex.nd1.l0.f2.m4.wig 44 /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(44) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETEZU, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25177, 360, 2328}, + /* 2 : SETEZU rm8 [m: evex.nd1.l0.f2.m4.wig 44 /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(44) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETEZU, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25177, 360, 2330}, +}; + +static const struct itemplate instrux_SETGZU[3] = { + /* 0 : SETGZU reg64 [m: evex.nd1.l0.f2.m4.wig 4f /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(4f) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETGZU, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25186, 360, 2327}, + /* 1 : SETGZU reg32 [m: evex.nd1.l0.f2.m4.wig 4f /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(4f) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETGZU, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25186, 360, 2328}, + /* 2 : SETGZU rm8 [m: evex.nd1.l0.f2.m4.wig 4f /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(4f) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETGZU, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25186, 360, 2330}, +}; + +static const struct itemplate instrux_SETGEZU[3] = { + /* 0 : SETGEZU reg64 [m: evex.nd1.l0.f2.m4.wig 4d /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(4d) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETGEZU, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25195, 360, 2327}, + /* 1 : SETGEZU reg32 [m: evex.nd1.l0.f2.m4.wig 4d /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(4d) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETGEZU, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25195, 360, 2328}, + /* 2 : SETGEZU rm8 [m: evex.nd1.l0.f2.m4.wig 4d /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(4d) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETGEZU, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25195, 360, 2330}, +}; + +static const struct itemplate instrux_SETLZU[3] = { + /* 0 : SETLZU reg64 [m: evex.nd1.l0.f2.m4.wig 4c /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(4c) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETLZU, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25204, 360, 2327}, + /* 1 : SETLZU reg32 [m: evex.nd1.l0.f2.m4.wig 4c /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(4c) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETLZU, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25204, 360, 2328}, + /* 2 : SETLZU rm8 [m: evex.nd1.l0.f2.m4.wig 4c /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(4c) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETLZU, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25204, 360, 2330}, +}; + +static const struct itemplate instrux_SETLEZU[3] = { + /* 0 : SETLEZU reg64 [m: evex.nd1.l0.f2.m4.wig 4e /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(4e) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETLEZU, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25213, 360, 2327}, + /* 1 : SETLEZU reg32 [m: evex.nd1.l0.f2.m4.wig 4e /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(4e) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETLEZU, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25213, 360, 2328}, + /* 2 : SETLEZU rm8 [m: evex.nd1.l0.f2.m4.wig 4e /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(4e) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETLEZU, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25213, 360, 2330}, +}; + +static const struct itemplate instrux_SETNAZU[3] = { + /* 0 : SETNAZU reg64 [m: evex.nd1.l0.f2.m4.wig 46 /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(46) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNAZU, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25168, 360, 2327}, + /* 1 : SETNAZU reg32 [m: evex.nd1.l0.f2.m4.wig 46 /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(46) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNAZU, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25168, 360, 2328}, + /* 2 : SETNAZU rm8 [m: evex.nd1.l0.f2.m4.wig 46 /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(46) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNAZU, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25168, 360, 2330}, +}; + +static const struct itemplate instrux_SETNAEZU[3] = { + /* 0 : SETNAEZU reg64 [m: evex.nd1.l0.f2.m4.wig 42 /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(42) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNAEZU, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25159, 360, 2327}, + /* 1 : SETNAEZU reg32 [m: evex.nd1.l0.f2.m4.wig 42 /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(42) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNAEZU, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25159, 360, 2328}, + /* 2 : SETNAEZU rm8 [m: evex.nd1.l0.f2.m4.wig 42 /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(42) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNAEZU, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25159, 360, 2330}, +}; + +static const struct itemplate instrux_SETNBZU[3] = { + /* 0 : SETNBZU reg64 [m: evex.nd1.l0.f2.m4.wig 43 /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(43) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNBZU, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25150, 360, 2327}, + /* 1 : SETNBZU reg32 [m: evex.nd1.l0.f2.m4.wig 43 /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(43) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNBZU, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25150, 360, 2328}, + /* 2 : SETNBZU rm8 [m: evex.nd1.l0.f2.m4.wig 43 /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(43) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNBZU, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25150, 360, 2330}, +}; + +static const struct itemplate instrux_SETNBEZU[3] = { + /* 0 : SETNBEZU reg64 [m: evex.nd1.l0.f2.m4.wig 47 /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(47) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNBEZU, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25141, 360, 2327}, + /* 1 : SETNBEZU reg32 [m: evex.nd1.l0.f2.m4.wig 47 /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(47) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNBEZU, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25141, 360, 2328}, + /* 2 : SETNBEZU rm8 [m: evex.nd1.l0.f2.m4.wig 47 /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(47) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNBEZU, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25141, 360, 2330}, +}; + +static const struct itemplate instrux_SETNCZU[3] = { + /* 0 : SETNCZU reg64 [m: evex.nd1.l0.f2.m4.wig 43 /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(43) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNCZU, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25150, 360, 2327}, + /* 1 : SETNCZU reg32 [m: evex.nd1.l0.f2.m4.wig 43 /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(43) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNCZU, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25150, 360, 2328}, + /* 2 : SETNCZU rm8 [m: evex.nd1.l0.f2.m4.wig 43 /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(43) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNCZU, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25150, 360, 2330}, +}; + +static const struct itemplate instrux_SETNEZU[3] = { + /* 0 : SETNEZU reg64 [m: evex.nd1.l0.f2.m4.wig 45 /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(45) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNEZU, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25222, 360, 2327}, + /* 1 : SETNEZU reg32 [m: evex.nd1.l0.f2.m4.wig 45 /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(45) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNEZU, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25222, 360, 2328}, + /* 2 : SETNEZU rm8 [m: evex.nd1.l0.f2.m4.wig 45 /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(45) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNEZU, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25222, 360, 2330}, +}; + +static const struct itemplate instrux_SETNGZU[3] = { + /* 0 : SETNGZU reg64 [m: evex.nd1.l0.f2.m4.wig 4e /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(4e) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNGZU, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25213, 360, 2327}, + /* 1 : SETNGZU reg32 [m: evex.nd1.l0.f2.m4.wig 4e /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(4e) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNGZU, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25213, 360, 2328}, + /* 2 : SETNGZU rm8 [m: evex.nd1.l0.f2.m4.wig 4e /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(4e) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNGZU, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25213, 360, 2330}, +}; + +static const struct itemplate instrux_SETNGEZU[3] = { + /* 0 : SETNGEZU reg64 [m: evex.nd1.l0.f2.m4.wig 4c /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(4c) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNGEZU, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25204, 360, 2327}, + /* 1 : SETNGEZU reg32 [m: evex.nd1.l0.f2.m4.wig 4c /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(4c) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNGEZU, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25204, 360, 2328}, + /* 2 : SETNGEZU rm8 [m: evex.nd1.l0.f2.m4.wig 4c /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(4c) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNGEZU, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25204, 360, 2330}, +}; + +static const struct itemplate instrux_SETNLZU[3] = { + /* 0 : SETNLZU reg64 [m: evex.nd1.l0.f2.m4.wig 4d /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(4d) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNLZU, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25195, 360, 2327}, + /* 1 : SETNLZU reg32 [m: evex.nd1.l0.f2.m4.wig 4d /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(4d) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNLZU, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25195, 360, 2328}, + /* 2 : SETNLZU rm8 [m: evex.nd1.l0.f2.m4.wig 4d /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(4d) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNLZU, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25195, 360, 2330}, +}; + +static const struct itemplate instrux_SETNLEZU[3] = { + /* 0 : SETNLEZU reg64 [m: evex.nd1.l0.f2.m4.wig 4f /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(4f) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNLEZU, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25186, 360, 2327}, + /* 1 : SETNLEZU reg32 [m: evex.nd1.l0.f2.m4.wig 4f /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(4f) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNLEZU, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25186, 360, 2328}, + /* 2 : SETNLEZU rm8 [m: evex.nd1.l0.f2.m4.wig 4f /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(4f) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNLEZU, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25186, 360, 2330}, +}; + +static const struct itemplate instrux_SETNOZU[3] = { + /* 0 : SETNOZU reg64 [m: evex.nd1.l0.f2.m4.wig 41 /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(41) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNOZU, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25231, 360, 2327}, + /* 1 : SETNOZU reg32 [m: evex.nd1.l0.f2.m4.wig 41 /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(41) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNOZU, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25231, 360, 2328}, + /* 2 : SETNOZU rm8 [m: evex.nd1.l0.f2.m4.wig 41 /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(41) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNOZU, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25231, 360, 2330}, +}; + +static const struct itemplate instrux_SETNPZU[3] = { + /* 0 : SETNPZU reg64 [m: evex.nd1.l0.f2.m4.wig 4b /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(4b) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNPZU, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25240, 360, 2327}, + /* 1 : SETNPZU reg32 [m: evex.nd1.l0.f2.m4.wig 4b /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(4b) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNPZU, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25240, 360, 2328}, + /* 2 : SETNPZU rm8 [m: evex.nd1.l0.f2.m4.wig 4b /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(4b) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNPZU, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25240, 360, 2330}, +}; + +static const struct itemplate instrux_SETNSZU[3] = { + /* 0 : SETNSZU reg64 [m: evex.nd1.l0.f2.m4.wig 49 /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(49) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNSZU, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25249, 360, 2327}, + /* 1 : SETNSZU reg32 [m: evex.nd1.l0.f2.m4.wig 49 /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(49) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNSZU, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25249, 360, 2328}, + /* 2 : SETNSZU rm8 [m: evex.nd1.l0.f2.m4.wig 49 /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(49) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNSZU, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25249, 360, 2330}, +}; + +static const struct itemplate instrux_SETNZZU[3] = { + /* 0 : SETNZZU reg64 [m: evex.nd1.l0.f2.m4.wig 45 /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(45) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNZZU, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25222, 360, 2327}, + /* 1 : SETNZZU reg32 [m: evex.nd1.l0.f2.m4.wig 45 /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(45) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNZZU, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25222, 360, 2328}, + /* 2 : SETNZZU rm8 [m: evex.nd1.l0.f2.m4.wig 45 /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(45) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNZZU, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25222, 360, 2330}, +}; + +static const struct itemplate instrux_SETOZU[3] = { + /* 0 : SETOZU reg64 [m: evex.nd1.l0.f2.m4.wig 40 /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(40) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETOZU, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25258, 360, 2327}, + /* 1 : SETOZU reg32 [m: evex.nd1.l0.f2.m4.wig 40 /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(40) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETOZU, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25258, 360, 2328}, + /* 2 : SETOZU rm8 [m: evex.nd1.l0.f2.m4.wig 40 /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(40) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETOZU, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25258, 360, 2330}, +}; + +static const struct itemplate instrux_SETPZU[3] = { + /* 0 : SETPZU reg64 [m: evex.nd1.l0.f2.m4.wig 4a /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(4a) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETPZU, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25267, 360, 2327}, + /* 1 : SETPZU reg32 [m: evex.nd1.l0.f2.m4.wig 4a /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(4a) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETPZU, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25267, 360, 2328}, + /* 2 : SETPZU rm8 [m: evex.nd1.l0.f2.m4.wig 4a /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(4a) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETPZU, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25267, 360, 2330}, +}; + +static const struct itemplate instrux_SETPEZU[3] = { + /* 0 : SETPEZU reg64 [m: evex.nd1.l0.f2.m4.wig 4a /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(4a) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETPEZU, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25267, 360, 2327}, + /* 1 : SETPEZU reg32 [m: evex.nd1.l0.f2.m4.wig 4a /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(4a) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETPEZU, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25267, 360, 2328}, + /* 2 : SETPEZU rm8 [m: evex.nd1.l0.f2.m4.wig 4a /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(4a) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETPEZU, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25267, 360, 2330}, +}; + +static const struct itemplate instrux_SETPOZU[3] = { + /* 0 : SETPOZU reg64 [m: evex.nd1.l0.f2.m4.wig 4b /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(4b) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETPOZU, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25240, 360, 2327}, + /* 1 : SETPOZU reg32 [m: evex.nd1.l0.f2.m4.wig 4b /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(4b) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETPOZU, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25240, 360, 2328}, + /* 2 : SETPOZU rm8 [m: evex.nd1.l0.f2.m4.wig 4b /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(4b) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETPOZU, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25240, 360, 2330}, +}; + +static const struct itemplate instrux_SETSZU[3] = { + /* 0 : SETSZU reg64 [m: evex.nd1.l0.f2.m4.wig 48 /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(48) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETSZU, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25276, 360, 2327}, + /* 1 : SETSZU reg32 [m: evex.nd1.l0.f2.m4.wig 48 /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(48) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETSZU, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25276, 360, 2328}, + /* 2 : SETSZU rm8 [m: evex.nd1.l0.f2.m4.wig 48 /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(48) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETSZU, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25276, 360, 2330}, +}; + +static const struct itemplate instrux_SETZZU[3] = { + /* 0 : SETZZU reg64 [m: evex.nd1.l0.f2.m4.wig 44 /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(44) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETZZU, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25177, 360, 2327}, + /* 1 : SETZZU reg32 [m: evex.nd1.l0.f2.m4.wig 44 /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(44) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETZZU, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25177, 360, 2328}, + /* 2 : SETZZU rm8 [m: evex.nd1.l0.f2.m4.wig 44 /0 ] ND,ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(44) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETZZU, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25177, 360, 2330}, +}; + +static const struct itemplate instrux_CMPAXADD[4] = { + /* 0 : CMPAXADD mem32,reg32,reg32 [mrv: vex.128.66.0f38.w0 e7 /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64 */ + /* 262(002 001) 001(e7) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPAXADD, 3, {MEMORY|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57581, 362, 2332}, + /* 1 : CMPAXADD mem64,reg64,reg64 [mrv: vex.128.66.0f38.w1 e7 /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64 */ + /* 262(002 201) 001(e7) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPAXADD, 3, {MEMORY|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57693, 362, 2333}, + /* 2 : CMPAXADD mem32,reg32,reg32 [mrv: evex.nf0.128.66.0f38.w0 e7 /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64 */ + /* 242(f2 7d 08) 300 001(e7) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPAXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+25429, 363, 2334}, + /* 3 : CMPAXADD mem64,reg64,reg64 [mrv: evex.nf0.128.66.0f38.w1 e7 /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64 */ + /* 242(f2 fd 08) 300 001(e7) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPAXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+25573, 363, 2335}, +}; + +static const struct itemplate instrux_CMPAEXADD[4] = { + /* 0 : CMPAEXADD mem32,reg32,reg32 [mrv: vex.128.66.0f38.w0 e3 /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64,ND */ + /* 262(002 001) 001(e3) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPAEXADD, 3, {MEMORY|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57588, 362, 2332}, + /* 1 : CMPAEXADD mem64,reg64,reg64 [mrv: vex.128.66.0f38.w1 e3 /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64,ND */ + /* 262(002 201) 001(e3) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPAEXADD, 3, {MEMORY|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57700, 362, 2333}, + /* 2 : CMPAEXADD mem32,reg32,reg32 [mrv: evex.nf0.128.66.0f38.w0 e3 /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64,ND */ + /* 242(f2 7d 08) 300 001(e3) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPAEXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+25438, 363, 2334}, + /* 3 : CMPAEXADD mem64,reg64,reg64 [mrv: evex.nf0.128.66.0f38.w1 e3 /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64,ND */ + /* 242(f2 fd 08) 300 001(e3) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPAEXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+25582, 363, 2335}, +}; + +static const struct itemplate instrux_CMPBXADD[4] = { + /* 0 : CMPBXADD mem32,reg32,reg32 [mrv: vex.128.66.0f38.w0 e2 /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64,ND */ + /* 262(002 001) 001(e2) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPBXADD, 3, {MEMORY|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57595, 362, 2332}, + /* 1 : CMPBXADD mem64,reg64,reg64 [mrv: vex.128.66.0f38.w1 e2 /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64,ND */ + /* 262(002 201) 001(e2) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPBXADD, 3, {MEMORY|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57707, 362, 2333}, + /* 2 : CMPBXADD mem32,reg32,reg32 [mrv: evex.nf0.128.66.0f38.w0 e2 /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64,ND */ + /* 242(f2 7d 08) 300 001(e2) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPBXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+25447, 363, 2334}, + /* 3 : CMPBXADD mem64,reg64,reg64 [mrv: evex.nf0.128.66.0f38.w1 e2 /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64,ND */ + /* 242(f2 fd 08) 300 001(e2) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPBXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+25591, 363, 2335}, +}; + +static const struct itemplate instrux_CMPBEXADD[4] = { + /* 0 : CMPBEXADD mem32,reg32,reg32 [mrv: vex.128.66.0f38.w0 e6 /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64,ND */ + /* 262(002 001) 001(e6) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPBEXADD, 3, {MEMORY|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57602, 362, 2332}, + /* 1 : CMPBEXADD mem64,reg64,reg64 [mrv: vex.128.66.0f38.w1 e6 /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64,ND */ + /* 262(002 201) 001(e6) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPBEXADD, 3, {MEMORY|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57714, 362, 2333}, + /* 2 : CMPBEXADD mem32,reg32,reg32 [mrv: evex.nf0.128.66.0f38.w0 e6 /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64,ND */ + /* 242(f2 7d 08) 300 001(e6) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPBEXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+25456, 363, 2334}, + /* 3 : CMPBEXADD mem64,reg64,reg64 [mrv: evex.nf0.128.66.0f38.w1 e6 /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64,ND */ + /* 242(f2 fd 08) 300 001(e6) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPBEXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+25600, 363, 2335}, +}; + +static const struct itemplate instrux_CMPCXADD[4] = { + /* 0 : CMPCXADD mem32,reg32,reg32 [mrv: vex.128.66.0f38.w0 e2 /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64 */ + /* 262(002 001) 001(e2) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPCXADD, 3, {MEMORY|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57595, 362, 2332}, + /* 1 : CMPCXADD mem64,reg64,reg64 [mrv: vex.128.66.0f38.w1 e2 /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64 */ + /* 262(002 201) 001(e2) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPCXADD, 3, {MEMORY|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57707, 362, 2333}, + /* 2 : CMPCXADD mem32,reg32,reg32 [mrv: evex.nf0.128.66.0f38.w0 e2 /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64 */ + /* 242(f2 7d 08) 300 001(e2) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPCXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+25447, 363, 2334}, + /* 3 : CMPCXADD mem64,reg64,reg64 [mrv: evex.nf0.128.66.0f38.w1 e2 /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64 */ + /* 242(f2 fd 08) 300 001(e2) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPCXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+25591, 363, 2335}, +}; + +static const struct itemplate instrux_CMPEXADD[4] = { + /* 0 : CMPEXADD mem32,reg32,reg32 [mrv: vex.128.66.0f38.w0 e4 /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64,ND */ + /* 262(002 001) 001(e4) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPEXADD, 3, {MEMORY|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57609, 362, 2332}, + /* 1 : CMPEXADD mem64,reg64,reg64 [mrv: vex.128.66.0f38.w1 e4 /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64,ND */ + /* 262(002 201) 001(e4) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPEXADD, 3, {MEMORY|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57721, 362, 2333}, + /* 2 : CMPEXADD mem32,reg32,reg32 [mrv: evex.nf0.128.66.0f38.w0 e4 /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64,ND */ + /* 242(f2 7d 08) 300 001(e4) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPEXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+25465, 363, 2334}, + /* 3 : CMPEXADD mem64,reg64,reg64 [mrv: evex.nf0.128.66.0f38.w1 e4 /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64,ND */ + /* 242(f2 fd 08) 300 001(e4) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPEXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+25609, 363, 2335}, +}; + +static const struct itemplate instrux_CMPGXADD[4] = { + /* 0 : CMPGXADD mem32,reg32,reg32 [mrv: vex.128.66.0f38.w0 ef /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64 */ + /* 262(002 001) 001(ef) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPGXADD, 3, {MEMORY|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57616, 362, 2332}, + /* 1 : CMPGXADD mem64,reg64,reg64 [mrv: vex.128.66.0f38.w1 ef /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64 */ + /* 262(002 201) 001(ef) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPGXADD, 3, {MEMORY|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57728, 362, 2333}, + /* 2 : CMPGXADD mem32,reg32,reg32 [mrv: evex.nf0.128.66.0f38.w0 ef /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64 */ + /* 242(f2 7d 08) 300 001(ef) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPGXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+25474, 363, 2334}, + /* 3 : CMPGXADD mem64,reg64,reg64 [mrv: evex.nf0.128.66.0f38.w1 ef /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64 */ + /* 242(f2 fd 08) 300 001(ef) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPGXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+25618, 363, 2335}, +}; + +static const struct itemplate instrux_CMPGEXADD[4] = { + /* 0 : CMPGEXADD mem32,reg32,reg32 [mrv: vex.128.66.0f38.w0 ed /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64,ND */ + /* 262(002 001) 001(ed) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPGEXADD, 3, {MEMORY|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57623, 362, 2332}, + /* 1 : CMPGEXADD mem64,reg64,reg64 [mrv: vex.128.66.0f38.w1 ed /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64,ND */ + /* 262(002 201) 001(ed) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPGEXADD, 3, {MEMORY|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57735, 362, 2333}, + /* 2 : CMPGEXADD mem32,reg32,reg32 [mrv: evex.nf0.128.66.0f38.w0 ed /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64,ND */ + /* 242(f2 7d 08) 300 001(ed) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPGEXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+25483, 363, 2334}, + /* 3 : CMPGEXADD mem64,reg64,reg64 [mrv: evex.nf0.128.66.0f38.w1 ed /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64,ND */ + /* 242(f2 fd 08) 300 001(ed) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPGEXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+25627, 363, 2335}, +}; + +static const struct itemplate instrux_CMPLXADD[4] = { + /* 0 : CMPLXADD mem32,reg32,reg32 [mrv: vex.128.66.0f38.w0 ec /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64 */ + /* 262(002 001) 001(ec) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPLXADD, 3, {MEMORY|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57630, 362, 2332}, + /* 1 : CMPLXADD mem64,reg64,reg64 [mrv: vex.128.66.0f38.w1 ec /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64 */ + /* 262(002 201) 001(ec) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPLXADD, 3, {MEMORY|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57742, 362, 2333}, + /* 2 : CMPLXADD mem32,reg32,reg32 [mrv: evex.nf0.128.66.0f38.w0 ec /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64 */ + /* 242(f2 7d 08) 300 001(ec) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPLXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+25492, 363, 2334}, + /* 3 : CMPLXADD mem64,reg64,reg64 [mrv: evex.nf0.128.66.0f38.w1 ec /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64 */ + /* 242(f2 fd 08) 300 001(ec) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPLXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+25636, 363, 2335}, +}; + +static const struct itemplate instrux_CMPLEXADD[4] = { + /* 0 : CMPLEXADD mem32,reg32,reg32 [mrv: vex.128.66.0f38.w0 ee /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64,ND */ + /* 262(002 001) 001(ee) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPLEXADD, 3, {MEMORY|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57637, 362, 2332}, + /* 1 : CMPLEXADD mem64,reg64,reg64 [mrv: vex.128.66.0f38.w1 ee /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64,ND */ + /* 262(002 201) 001(ee) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPLEXADD, 3, {MEMORY|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57749, 362, 2333}, + /* 2 : CMPLEXADD mem32,reg32,reg32 [mrv: evex.nf0.128.66.0f38.w0 ee /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64,ND */ + /* 242(f2 7d 08) 300 001(ee) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPLEXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+25501, 363, 2334}, + /* 3 : CMPLEXADD mem64,reg64,reg64 [mrv: evex.nf0.128.66.0f38.w1 ee /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64,ND */ + /* 242(f2 fd 08) 300 001(ee) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPLEXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+25645, 363, 2335}, +}; + +static const struct itemplate instrux_CMPNAXADD[4] = { + /* 0 : CMPNAXADD mem32,reg32,reg32 [mrv: vex.128.66.0f38.w0 e6 /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64 */ + /* 262(002 001) 001(e6) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPNAXADD, 3, {MEMORY|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57602, 362, 2332}, + /* 1 : CMPNAXADD mem64,reg64,reg64 [mrv: vex.128.66.0f38.w1 e6 /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64 */ + /* 262(002 201) 001(e6) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPNAXADD, 3, {MEMORY|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57714, 362, 2333}, + /* 2 : CMPNAXADD mem32,reg32,reg32 [mrv: evex.nf0.128.66.0f38.w0 e6 /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64 */ + /* 242(f2 7d 08) 300 001(e6) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPNAXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+25456, 363, 2334}, + /* 3 : CMPNAXADD mem64,reg64,reg64 [mrv: evex.nf0.128.66.0f38.w1 e6 /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64 */ + /* 242(f2 fd 08) 300 001(e6) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPNAXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+25600, 363, 2335}, +}; + +static const struct itemplate instrux_CMPNAEXADD[4] = { + /* 0 : CMPNAEXADD mem32,reg32,reg32 [mrv: vex.128.66.0f38.w0 e2 /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64,ND */ + /* 262(002 001) 001(e2) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPNAEXADD, 3, {MEMORY|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57595, 362, 2332}, + /* 1 : CMPNAEXADD mem64,reg64,reg64 [mrv: vex.128.66.0f38.w1 e2 /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64,ND */ + /* 262(002 201) 001(e2) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPNAEXADD, 3, {MEMORY|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57707, 362, 2333}, + /* 2 : CMPNAEXADD mem32,reg32,reg32 [mrv: evex.nf0.128.66.0f38.w0 e2 /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64,ND */ + /* 242(f2 7d 08) 300 001(e2) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPNAEXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+25447, 363, 2334}, + /* 3 : CMPNAEXADD mem64,reg64,reg64 [mrv: evex.nf0.128.66.0f38.w1 e2 /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64,ND */ + /* 242(f2 fd 08) 300 001(e2) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPNAEXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+25591, 363, 2335}, +}; + +static const struct itemplate instrux_CMPNBXADD[4] = { + /* 0 : CMPNBXADD mem32,reg32,reg32 [mrv: vex.128.66.0f38.w0 e3 /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64,ND */ + /* 262(002 001) 001(e3) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPNBXADD, 3, {MEMORY|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57588, 362, 2332}, + /* 1 : CMPNBXADD mem64,reg64,reg64 [mrv: vex.128.66.0f38.w1 e3 /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64,ND */ + /* 262(002 201) 001(e3) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPNBXADD, 3, {MEMORY|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57700, 362, 2333}, + /* 2 : CMPNBXADD mem32,reg32,reg32 [mrv: evex.nf0.128.66.0f38.w0 e3 /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64,ND */ + /* 242(f2 7d 08) 300 001(e3) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPNBXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+25438, 363, 2334}, + /* 3 : CMPNBXADD mem64,reg64,reg64 [mrv: evex.nf0.128.66.0f38.w1 e3 /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64,ND */ + /* 242(f2 fd 08) 300 001(e3) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPNBXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+25582, 363, 2335}, +}; + +static const struct itemplate instrux_CMPNBEXADD[4] = { + /* 0 : CMPNBEXADD mem32,reg32,reg32 [mrv: vex.128.66.0f38.w0 e7 /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64,ND */ + /* 262(002 001) 001(e7) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPNBEXADD, 3, {MEMORY|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57581, 362, 2332}, + /* 1 : CMPNBEXADD mem64,reg64,reg64 [mrv: vex.128.66.0f38.w1 e7 /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64,ND */ + /* 262(002 201) 001(e7) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPNBEXADD, 3, {MEMORY|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57693, 362, 2333}, + /* 2 : CMPNBEXADD mem32,reg32,reg32 [mrv: evex.nf0.128.66.0f38.w0 e7 /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64,ND */ + /* 242(f2 7d 08) 300 001(e7) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPNBEXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+25429, 363, 2334}, + /* 3 : CMPNBEXADD mem64,reg64,reg64 [mrv: evex.nf0.128.66.0f38.w1 e7 /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64,ND */ + /* 242(f2 fd 08) 300 001(e7) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPNBEXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+25573, 363, 2335}, +}; + +static const struct itemplate instrux_CMPNCXADD[4] = { + /* 0 : CMPNCXADD mem32,reg32,reg32 [mrv: vex.128.66.0f38.w0 e3 /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64 */ + /* 262(002 001) 001(e3) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPNCXADD, 3, {MEMORY|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57588, 362, 2332}, + /* 1 : CMPNCXADD mem64,reg64,reg64 [mrv: vex.128.66.0f38.w1 e3 /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64 */ + /* 262(002 201) 001(e3) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPNCXADD, 3, {MEMORY|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57700, 362, 2333}, + /* 2 : CMPNCXADD mem32,reg32,reg32 [mrv: evex.nf0.128.66.0f38.w0 e3 /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64 */ + /* 242(f2 7d 08) 300 001(e3) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPNCXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+25438, 363, 2334}, + /* 3 : CMPNCXADD mem64,reg64,reg64 [mrv: evex.nf0.128.66.0f38.w1 e3 /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64 */ + /* 242(f2 fd 08) 300 001(e3) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPNCXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+25582, 363, 2335}, +}; + +static const struct itemplate instrux_CMPNEXADD[4] = { + /* 0 : CMPNEXADD mem32,reg32,reg32 [mrv: vex.128.66.0f38.w0 e5 /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64,ND */ + /* 262(002 001) 001(e5) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPNEXADD, 3, {MEMORY|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57644, 362, 2332}, + /* 1 : CMPNEXADD mem64,reg64,reg64 [mrv: vex.128.66.0f38.w1 e5 /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64,ND */ + /* 262(002 201) 001(e5) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPNEXADD, 3, {MEMORY|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57756, 362, 2333}, + /* 2 : CMPNEXADD mem32,reg32,reg32 [mrv: evex.nf0.128.66.0f38.w0 e5 /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64,ND */ + /* 242(f2 7d 08) 300 001(e5) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPNEXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+25510, 363, 2334}, + /* 3 : CMPNEXADD mem64,reg64,reg64 [mrv: evex.nf0.128.66.0f38.w1 e5 /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64,ND */ + /* 242(f2 fd 08) 300 001(e5) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPNEXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+25654, 363, 2335}, +}; + +static const struct itemplate instrux_CMPNGXADD[4] = { + /* 0 : CMPNGXADD mem32,reg32,reg32 [mrv: vex.128.66.0f38.w0 ee /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64 */ + /* 262(002 001) 001(ee) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPNGXADD, 3, {MEMORY|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57637, 362, 2332}, + /* 1 : CMPNGXADD mem64,reg64,reg64 [mrv: vex.128.66.0f38.w1 ee /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64 */ + /* 262(002 201) 001(ee) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPNGXADD, 3, {MEMORY|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57749, 362, 2333}, + /* 2 : CMPNGXADD mem32,reg32,reg32 [mrv: evex.nf0.128.66.0f38.w0 ee /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64 */ + /* 242(f2 7d 08) 300 001(ee) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPNGXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+25501, 363, 2334}, + /* 3 : CMPNGXADD mem64,reg64,reg64 [mrv: evex.nf0.128.66.0f38.w1 ee /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64 */ + /* 242(f2 fd 08) 300 001(ee) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPNGXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+25645, 363, 2335}, +}; + +static const struct itemplate instrux_CMPNGEXADD[4] = { + /* 0 : CMPNGEXADD mem32,reg32,reg32 [mrv: vex.128.66.0f38.w0 ec /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64,ND */ + /* 262(002 001) 001(ec) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPNGEXADD, 3, {MEMORY|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57630, 362, 2332}, + /* 1 : CMPNGEXADD mem64,reg64,reg64 [mrv: vex.128.66.0f38.w1 ec /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64,ND */ + /* 262(002 201) 001(ec) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPNGEXADD, 3, {MEMORY|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57742, 362, 2333}, + /* 2 : CMPNGEXADD mem32,reg32,reg32 [mrv: evex.nf0.128.66.0f38.w0 ec /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64,ND */ + /* 242(f2 7d 08) 300 001(ec) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPNGEXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+25492, 363, 2334}, + /* 3 : CMPNGEXADD mem64,reg64,reg64 [mrv: evex.nf0.128.66.0f38.w1 ec /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64,ND */ + /* 242(f2 fd 08) 300 001(ec) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPNGEXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+25636, 363, 2335}, +}; + +static const struct itemplate instrux_CMPNLXADD[4] = { + /* 0 : CMPNLXADD mem32,reg32,reg32 [mrv: vex.128.66.0f38.w0 ed /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64 */ + /* 262(002 001) 001(ed) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPNLXADD, 3, {MEMORY|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57623, 362, 2332}, + /* 1 : CMPNLXADD mem64,reg64,reg64 [mrv: vex.128.66.0f38.w1 ed /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64 */ + /* 262(002 201) 001(ed) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPNLXADD, 3, {MEMORY|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57735, 362, 2333}, + /* 2 : CMPNLXADD mem32,reg32,reg32 [mrv: evex.nf0.128.66.0f38.w0 ed /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64 */ + /* 242(f2 7d 08) 300 001(ed) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPNLXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+25483, 363, 2334}, + /* 3 : CMPNLXADD mem64,reg64,reg64 [mrv: evex.nf0.128.66.0f38.w1 ed /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64 */ + /* 242(f2 fd 08) 300 001(ed) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPNLXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+25627, 363, 2335}, +}; + +static const struct itemplate instrux_CMPNLEXADD[4] = { + /* 0 : CMPNLEXADD mem32,reg32,reg32 [mrv: vex.128.66.0f38.w0 ef /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64,ND */ + /* 262(002 001) 001(ef) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPNLEXADD, 3, {MEMORY|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57616, 362, 2332}, + /* 1 : CMPNLEXADD mem64,reg64,reg64 [mrv: vex.128.66.0f38.w1 ef /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64,ND */ + /* 262(002 201) 001(ef) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPNLEXADD, 3, {MEMORY|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57728, 362, 2333}, + /* 2 : CMPNLEXADD mem32,reg32,reg32 [mrv: evex.nf0.128.66.0f38.w0 ef /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64,ND */ + /* 242(f2 7d 08) 300 001(ef) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPNLEXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+25474, 363, 2334}, + /* 3 : CMPNLEXADD mem64,reg64,reg64 [mrv: evex.nf0.128.66.0f38.w1 ef /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64,ND */ + /* 242(f2 fd 08) 300 001(ef) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPNLEXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+25618, 363, 2335}, +}; + +static const struct itemplate instrux_CMPNOXADD[4] = { + /* 0 : CMPNOXADD mem32,reg32,reg32 [mrv: vex.128.66.0f38.w0 e1 /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64 */ + /* 262(002 001) 001(e1) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPNOXADD, 3, {MEMORY|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57651, 362, 2332}, + /* 1 : CMPNOXADD mem64,reg64,reg64 [mrv: vex.128.66.0f38.w1 e1 /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64 */ + /* 262(002 201) 001(e1) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPNOXADD, 3, {MEMORY|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57763, 362, 2333}, + /* 2 : CMPNOXADD mem32,reg32,reg32 [mrv: evex.nf0.128.66.0f38.w0 e1 /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64 */ + /* 242(f2 7d 08) 300 001(e1) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPNOXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+25519, 363, 2334}, + /* 3 : CMPNOXADD mem64,reg64,reg64 [mrv: evex.nf0.128.66.0f38.w1 e1 /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64 */ + /* 242(f2 fd 08) 300 001(e1) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPNOXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+25663, 363, 2335}, +}; + +static const struct itemplate instrux_CMPNPXADD[4] = { + /* 0 : CMPNPXADD mem32,reg32,reg32 [mrv: vex.128.66.0f38.w0 eb /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64,ND */ + /* 262(002 001) 001(eb) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPNPXADD, 3, {MEMORY|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57658, 362, 2332}, + /* 1 : CMPNPXADD mem64,reg64,reg64 [mrv: vex.128.66.0f38.w1 eb /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64,ND */ + /* 262(002 201) 001(eb) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPNPXADD, 3, {MEMORY|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57770, 362, 2333}, + /* 2 : CMPNPXADD mem32,reg32,reg32 [mrv: evex.nf0.128.66.0f38.w0 eb /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64,ND */ + /* 242(f2 7d 08) 300 001(eb) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPNPXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+25528, 363, 2334}, + /* 3 : CMPNPXADD mem64,reg64,reg64 [mrv: evex.nf0.128.66.0f38.w1 eb /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64,ND */ + /* 242(f2 fd 08) 300 001(eb) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPNPXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+25672, 363, 2335}, +}; + +static const struct itemplate instrux_CMPNSXADD[4] = { + /* 0 : CMPNSXADD mem32,reg32,reg32 [mrv: vex.128.66.0f38.w0 e9 /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64 */ + /* 262(002 001) 001(e9) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPNSXADD, 3, {MEMORY|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57665, 362, 2332}, + /* 1 : CMPNSXADD mem64,reg64,reg64 [mrv: vex.128.66.0f38.w1 e9 /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64 */ + /* 262(002 201) 001(e9) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPNSXADD, 3, {MEMORY|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57777, 362, 2333}, + /* 2 : CMPNSXADD mem32,reg32,reg32 [mrv: evex.nf0.128.66.0f38.w0 e9 /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64 */ + /* 242(f2 7d 08) 300 001(e9) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPNSXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+25537, 363, 2334}, + /* 3 : CMPNSXADD mem64,reg64,reg64 [mrv: evex.nf0.128.66.0f38.w1 e9 /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64 */ + /* 242(f2 fd 08) 300 001(e9) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPNSXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+25681, 363, 2335}, +}; + +static const struct itemplate instrux_CMPNZXADD[4] = { + /* 0 : CMPNZXADD mem32,reg32,reg32 [mrv: vex.128.66.0f38.w0 e5 /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64 */ + /* 262(002 001) 001(e5) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPNZXADD, 3, {MEMORY|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57644, 362, 2332}, + /* 1 : CMPNZXADD mem64,reg64,reg64 [mrv: vex.128.66.0f38.w1 e5 /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64 */ + /* 262(002 201) 001(e5) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPNZXADD, 3, {MEMORY|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57756, 362, 2333}, + /* 2 : CMPNZXADD mem32,reg32,reg32 [mrv: evex.nf0.128.66.0f38.w0 e5 /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64 */ + /* 242(f2 7d 08) 300 001(e5) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPNZXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+25510, 363, 2334}, + /* 3 : CMPNZXADD mem64,reg64,reg64 [mrv: evex.nf0.128.66.0f38.w1 e5 /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64 */ + /* 242(f2 fd 08) 300 001(e5) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPNZXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+25654, 363, 2335}, +}; + +static const struct itemplate instrux_CMPOXADD[4] = { + /* 0 : CMPOXADD mem32,reg32,reg32 [mrv: vex.128.66.0f38.w0 e0 /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64 */ + /* 262(002 001) 001(e0) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPOXADD, 3, {MEMORY|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57672, 362, 2332}, + /* 1 : CMPOXADD mem64,reg64,reg64 [mrv: vex.128.66.0f38.w1 e0 /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64 */ + /* 262(002 201) 001(e0) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPOXADD, 3, {MEMORY|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57784, 362, 2333}, + /* 2 : CMPOXADD mem32,reg32,reg32 [mrv: evex.nf0.128.66.0f38.w0 e0 /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64 */ + /* 242(f2 7d 08) 300 001(e0) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPOXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+25546, 363, 2334}, + /* 3 : CMPOXADD mem64,reg64,reg64 [mrv: evex.nf0.128.66.0f38.w1 e0 /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64 */ + /* 242(f2 fd 08) 300 001(e0) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPOXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+25690, 363, 2335}, +}; + +static const struct itemplate instrux_CMPPXADD[4] = { + /* 0 : CMPPXADD mem32,reg32,reg32 [mrv: vex.128.66.0f38.w0 ea /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64,ND */ + /* 262(002 001) 001(ea) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPPXADD, 3, {MEMORY|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57679, 362, 2332}, + /* 1 : CMPPXADD mem64,reg64,reg64 [mrv: vex.128.66.0f38.w1 ea /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64,ND */ + /* 262(002 201) 001(ea) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPPXADD, 3, {MEMORY|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57791, 362, 2333}, + /* 2 : CMPPXADD mem32,reg32,reg32 [mrv: evex.nf0.128.66.0f38.w0 ea /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64,ND */ + /* 242(f2 7d 08) 300 001(ea) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPPXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+25555, 363, 2334}, + /* 3 : CMPPXADD mem64,reg64,reg64 [mrv: evex.nf0.128.66.0f38.w1 ea /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64,ND */ + /* 242(f2 fd 08) 300 001(ea) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPPXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+25699, 363, 2335}, +}; + +static const struct itemplate instrux_CMPPEXADD[4] = { + /* 0 : CMPPEXADD mem32,reg32,reg32 [mrv: vex.128.66.0f38.w0 ea /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64 */ + /* 262(002 001) 001(ea) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPPEXADD, 3, {MEMORY|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57679, 362, 2332}, + /* 1 : CMPPEXADD mem64,reg64,reg64 [mrv: vex.128.66.0f38.w1 ea /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64 */ + /* 262(002 201) 001(ea) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPPEXADD, 3, {MEMORY|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57791, 362, 2333}, + /* 2 : CMPPEXADD mem32,reg32,reg32 [mrv: evex.nf0.128.66.0f38.w0 ea /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64 */ + /* 242(f2 7d 08) 300 001(ea) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPPEXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+25555, 363, 2334}, + /* 3 : CMPPEXADD mem64,reg64,reg64 [mrv: evex.nf0.128.66.0f38.w1 ea /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64 */ + /* 242(f2 fd 08) 300 001(ea) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPPEXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+25699, 363, 2335}, +}; + +static const struct itemplate instrux_CMPPOXADD[4] = { + /* 0 : CMPPOXADD mem32,reg32,reg32 [mrv: vex.128.66.0f38.w0 eb /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64 */ + /* 262(002 001) 001(eb) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPPOXADD, 3, {MEMORY|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57658, 362, 2332}, + /* 1 : CMPPOXADD mem64,reg64,reg64 [mrv: vex.128.66.0f38.w1 eb /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64 */ + /* 262(002 201) 001(eb) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPPOXADD, 3, {MEMORY|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57770, 362, 2333}, + /* 2 : CMPPOXADD mem32,reg32,reg32 [mrv: evex.nf0.128.66.0f38.w0 eb /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64 */ + /* 242(f2 7d 08) 300 001(eb) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPPOXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+25528, 363, 2334}, + /* 3 : CMPPOXADD mem64,reg64,reg64 [mrv: evex.nf0.128.66.0f38.w1 eb /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64 */ + /* 242(f2 fd 08) 300 001(eb) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPPOXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+25672, 363, 2335}, +}; + +static const struct itemplate instrux_CMPSXADD[4] = { + /* 0 : CMPSXADD mem32,reg32,reg32 [mrv: vex.128.66.0f38.w0 e8 /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64 */ + /* 262(002 001) 001(e8) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPSXADD, 3, {MEMORY|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57686, 362, 2332}, + /* 1 : CMPSXADD mem64,reg64,reg64 [mrv: vex.128.66.0f38.w1 e8 /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64 */ + /* 262(002 201) 001(e8) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPSXADD, 3, {MEMORY|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57798, 362, 2333}, + /* 2 : CMPSXADD mem32,reg32,reg32 [mrv: evex.nf0.128.66.0f38.w0 e8 /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64 */ + /* 242(f2 7d 08) 300 001(e8) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPSXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+25564, 363, 2334}, + /* 3 : CMPSXADD mem64,reg64,reg64 [mrv: evex.nf0.128.66.0f38.w1 e8 /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64 */ + /* 242(f2 fd 08) 300 001(e8) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPSXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+25708, 363, 2335}, +}; + +static const struct itemplate instrux_CMPZXADD[4] = { + /* 0 : CMPZXADD mem32,reg32,reg32 [mrv: vex.128.66.0f38.w0 e4 /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64 */ + /* 262(002 001) 001(e4) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPZXADD, 3, {MEMORY|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57609, 362, 2332}, + /* 1 : CMPZXADD mem64,reg64,reg64 [mrv: vex.128.66.0f38.w1 e4 /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64 */ + /* 262(002 201) 001(e4) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPZXADD, 3, {MEMORY|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57721, 362, 2333}, + /* 2 : CMPZXADD mem32,reg32,reg32 [mrv: evex.nf0.128.66.0f38.w0 e4 /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64 */ + /* 242(f2 7d 08) 300 001(e4) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPZXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+25465, 363, 2334}, + /* 3 : CMPZXADD mem64,reg64,reg64 [mrv: evex.nf0.128.66.0f38.w1 e4 /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64 */ + /* 242(f2 fd 08) 300 001(e4) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPZXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+25609, 363, 2335}, +}; + +static const struct itemplate instrux_ADDPS[1] = { + /* 0 : ADDPS xmmreg,xmmrm128 [rm: np 0f 58 /r ] SSE,KATMAI */ + /* 360 355 001(58) 110 : SSE,KATMAI */ + {I_ADDPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+68355, 364, 2338}, +}; + +static const struct itemplate instrux_ADDSS[1] = { + /* 0 : ADDSS xmmreg,xmmrm32 [rm: f3 0f 58 /r ] SSE,KATMAI */ + /* 333 355 001(58) 110 : SSE,KATMAI */ + {I_ADDSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68361, 364, 2339}, +}; + +static const struct itemplate instrux_ANDNPS[1] = { + /* 0 : ANDNPS xmmreg,xmmrm128 [rm: np 0f 55 /r ] SSE,KATMAI */ + /* 360 355 001(55) 110 : SSE,KATMAI */ + {I_ANDNPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+68367, 364, 2340}, +}; + +static const struct itemplate instrux_ANDPS[1] = { + /* 0 : ANDPS xmmreg,xmmrm128 [rm: np 0f 54 /r ] SSE,KATMAI */ + /* 360 355 001(54) 110 : SSE,KATMAI */ + {I_ANDPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+68373, 364, 2341}, +}; + +static const struct itemplate instrux_CMPEQPS[1] = { + /* 0 : CMPEQPS xmmreg,xmmrm128 [rm: np 0f c2 /r 00 ] SSE,KATMAI */ + /* 360 355 001(c2) 110 001(00) : SSE,KATMAI */ + {I_CMPEQPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+51403, 364, 2342}, +}; + +static const struct itemplate instrux_CMPEQSS[1] = { + /* 0 : CMPEQSS xmmreg,xmmrm32 [rm: f3 0f c2 /r 00 ] SSE,KATMAI */ + /* 333 355 001(c2) 110 001(00) : SSE,KATMAI */ + {I_CMPEQSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+51411, 364, 2343}, +}; + +static const struct itemplate instrux_CMPLEPS[1] = { + /* 0 : CMPLEPS xmmreg,xmmrm128 [rm: np 0f c2 /r 02 ] SSE,KATMAI */ + /* 360 355 001(c2) 110 001(02) : SSE,KATMAI */ + {I_CMPLEPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+51419, 364, 2344}, +}; + +static const struct itemplate instrux_CMPLESS[1] = { + /* 0 : CMPLESS xmmreg,xmmrm32 [rm: f3 0f c2 /r 02 ] SSE,KATMAI */ + /* 333 355 001(c2) 110 001(02) : SSE,KATMAI */ + {I_CMPLESS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+51427, 364, 2345}, +}; + +static const struct itemplate instrux_CMPLTPS[1] = { + /* 0 : CMPLTPS xmmreg,xmmrm128 [rm: np 0f c2 /r 01 ] SSE,KATMAI */ + /* 360 355 001(c2) 110 001(01) : SSE,KATMAI */ + {I_CMPLTPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+51435, 364, 2346}, +}; + +static const struct itemplate instrux_CMPLTSS[1] = { + /* 0 : CMPLTSS xmmreg,xmmrm32 [rm: f3 0f c2 /r 01 ] SSE,KATMAI */ + /* 333 355 001(c2) 110 001(01) : SSE,KATMAI */ + {I_CMPLTSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+51443, 364, 2347}, +}; + +static const struct itemplate instrux_CMPNEQPS[1] = { + /* 0 : CMPNEQPS xmmreg,xmmrm128 [rm: np 0f c2 /r 04 ] SSE,KATMAI */ + /* 360 355 001(c2) 110 001(04) : SSE,KATMAI */ + {I_CMPNEQPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+51451, 364, 2348}, +}; + +static const struct itemplate instrux_CMPNEQSS[1] = { + /* 0 : CMPNEQSS xmmreg,xmmrm32 [rm: f3 0f c2 /r 04 ] SSE,KATMAI */ + /* 333 355 001(c2) 110 001(04) : SSE,KATMAI */ + {I_CMPNEQSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+51459, 364, 2349}, +}; + +static const struct itemplate instrux_CMPNLEPS[1] = { + /* 0 : CMPNLEPS xmmreg,xmmrm128 [rm: np 0f c2 /r 06 ] SSE,KATMAI */ + /* 360 355 001(c2) 110 001(06) : SSE,KATMAI */ + {I_CMPNLEPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+51467, 364, 2350}, +}; + +static const struct itemplate instrux_CMPNLESS[1] = { + /* 0 : CMPNLESS xmmreg,xmmrm32 [rm: f3 0f c2 /r 06 ] SSE,KATMAI */ + /* 333 355 001(c2) 110 001(06) : SSE,KATMAI */ + {I_CMPNLESS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+51475, 364, 2351}, +}; + +static const struct itemplate instrux_CMPNLTPS[1] = { + /* 0 : CMPNLTPS xmmreg,xmmrm128 [rm: np 0f c2 /r 05 ] SSE,KATMAI */ + /* 360 355 001(c2) 110 001(05) : SSE,KATMAI */ + {I_CMPNLTPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+51483, 364, 2352}, +}; + +static const struct itemplate instrux_CMPNLTSS[1] = { + /* 0 : CMPNLTSS xmmreg,xmmrm32 [rm: f3 0f c2 /r 05 ] SSE,KATMAI */ + /* 333 355 001(c2) 110 001(05) : SSE,KATMAI */ + {I_CMPNLTSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+51491, 364, 2353}, +}; + +static const struct itemplate instrux_CMPORDPS[1] = { + /* 0 : CMPORDPS xmmreg,xmmrm128 [rm: np 0f c2 /r 07 ] SSE,KATMAI */ + /* 360 355 001(c2) 110 001(07) : SSE,KATMAI */ + {I_CMPORDPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+51499, 364, 2354}, +}; + +static const struct itemplate instrux_CMPORDSS[1] = { + /* 0 : CMPORDSS xmmreg,xmmrm32 [rm: f3 0f c2 /r 07 ] SSE,KATMAI */ + /* 333 355 001(c2) 110 001(07) : SSE,KATMAI */ + {I_CMPORDSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+51507, 364, 2355}, +}; + +static const struct itemplate instrux_CMPUNORDPS[1] = { + /* 0 : CMPUNORDPS xmmreg,xmmrm128 [rm: np 0f c2 /r 03 ] SSE,KATMAI */ + /* 360 355 001(c2) 110 001(03) : SSE,KATMAI */ + {I_CMPUNORDPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+51515, 364, 2356}, +}; + +static const struct itemplate instrux_CMPUNORDSS[1] = { + /* 0 : CMPUNORDSS xmmreg,xmmrm32 [rm: f3 0f c2 /r 03 ] SSE,KATMAI */ + /* 333 355 001(c2) 110 001(03) : SSE,KATMAI */ + {I_CMPUNORDSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+51523, 364, 2357}, +}; + +static const struct itemplate instrux_CMPPS[1] = { + /* 0 : CMPPS xmmreg,xmmrm128,imm8 [rmi: np 0f c2 /r ib,u ] SSE,KATMAI */ + /* 360 355 001(c2) 110 026 : SSE,KATMAI */ + {I_CMPPS, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+57805, 364, 2360}, +}; + +static const struct itemplate instrux_CMPSS[1] = { + /* 0 : CMPSS xmmreg,xmmrm32,imm8 [rmi: f3 0f c2 /r ib,u ] SSE,KATMAI */ + /* 333 355 001(c2) 110 026 : SSE,KATMAI */ + {I_CMPSS, 3, {XMMREG,RM_XMM|BITS32,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+57812, 364, 2361}, +}; + +static const struct itemplate instrux_COMISS[1] = { + /* 0 : COMISS xmmreg,xmmrm32 [rm: np 0f 2f /r ] FL,SSE,KATMAI */ + /* 360 355 001(2f) 110 : FL,SSE,KATMAI */ + {I_COMISS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68379, 365, 2362}, +}; + +static const struct itemplate instrux_CVTPI2PS[1] = { + /* 0 : CVTPI2PS xmmreg,mmxrm64 [rm: np 0f 2a /r ] MMX,SSE,KATMAI */ + /* 360 355 001(2a) 110 : MMX,SSE,KATMAI */ + {I_CVTPI2PS, 2, {XMMREG,RM_MMX|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+68385, 366, 2363}, +}; + +static const struct itemplate instrux_CVTPS2PI[1] = { + /* 0 : CVTPS2PI mmxreg,xmmrm64 [rm: np 0f 2d /r ] MMX,SSE,KATMAI */ + /* 360 355 001(2d) 110 : MMX,SSE,KATMAI */ + {I_CVTPS2PI, 2, {MMXREG,RM_XMM|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+68391, 366, 2364}, +}; + +static const struct itemplate instrux_CVTSI2SS[2] = { + /* 0 : CVTSI2SS xmmreg,rm32 [rm: f3 0f 2a /r ] SSE,KATMAI */ + /* 333 355 001(2a) 110 : SSE,KATMAI */ + {I_CVTSI2SS, 2, {XMMREG,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+57820, 364, 2365}, + /* 1 : CVTSI2SS xmmreg,rm64 [rm: o64 f3 0f 2a /r ] AR1,SX,LONG,PROT,SSE,X86_64 */ + /* 324 333 355 001(2a) 110 : AR1,SX,LONG,PROT,SSE,X86_64 */ + {I_CVTSI2SS, 2, {XMMREG,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+57819, 367, 2366}, +}; + +static const struct itemplate instrux_CVTSS2SI[2] = { + /* 0 : CVTSS2SI reg32,xmmrm32 [rm: f3 0f 2d /r ] SSE,KATMAI */ + /* 333 355 001(2d) 110 : SSE,KATMAI */ + {I_CVTSS2SI, 2, {REG_GPR|BITS32,RM_XMM|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+57827, 364, 2367}, + /* 1 : CVTSS2SI reg64,xmmrm32 [rm: o64 f3 0f 2d /r ] LONG,PROT,SSE,X86_64 */ + /* 324 333 355 001(2d) 110 : LONG,PROT,SSE,X86_64 */ + {I_CVTSS2SI, 2, {REG_GPR|BITS64,RM_XMM|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+57826, 368, 2368}, +}; + +static const struct itemplate instrux_CVTTPS2PI[1] = { + /* 0 : CVTTPS2PI mmxreg,xmmrm64 [rm: np 0f 2c /r ] MMX,SSE,KATMAI */ + /* 360 355 001(2c) 110 : MMX,SSE,KATMAI */ + {I_CVTTPS2PI, 2, {MMXREG,RM_XMM|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+68397, 366, 2369}, +}; + +static const struct itemplate instrux_CVTTSS2SI[2] = { + /* 0 : CVTTSS2SI reg32,xmmrm32 [rm: f3 0f 2c /r ] SSE,KATMAI */ + /* 333 355 001(2c) 110 : SSE,KATMAI */ + {I_CVTTSS2SI, 2, {REG_GPR|BITS32,RM_XMM|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+57834, 364, 2370}, + /* 1 : CVTTSS2SI reg64,xmmrm32 [rm: o64 f3 0f 2c /r ] LONG,PROT,SSE,X86_64 */ + /* 324 333 355 001(2c) 110 : LONG,PROT,SSE,X86_64 */ + {I_CVTTSS2SI, 2, {REG_GPR|BITS64,RM_XMM|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+57833, 368, 2371}, +}; + +static const struct itemplate instrux_DIVPS[1] = { + /* 0 : DIVPS xmmreg,xmmrm128 [rm: np 0f 5e /r ] SSE,KATMAI */ + /* 360 355 001(5e) 110 : SSE,KATMAI */ + {I_DIVPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+68403, 364, 2372}, +}; + +static const struct itemplate instrux_DIVSS[1] = { + /* 0 : DIVSS xmmreg,xmmrm32 [rm: f3 0f 5e /r ] SSE,KATMAI */ + /* 333 355 001(5e) 110 : SSE,KATMAI */ + {I_DIVSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68409, 364, 2373}, +}; + +static const struct itemplate instrux_LDMXCSR[1] = { + /* 0 : LDMXCSR mem32 [m: np 0f ae /2 ] SSE,KATMAI */ + /* 360 355 001(ae) 202 : SSE,KATMAI */ + {I_LDMXCSR, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+68415, 364, 2374}, +}; + +static const struct itemplate instrux_MAXPS[1] = { + /* 0 : MAXPS xmmreg,xmmrm128 [rm: np 0f 5f /r ] SSE,KATMAI */ + /* 360 355 001(5f) 110 : SSE,KATMAI */ + {I_MAXPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+68421, 364, 2375}, +}; + +static const struct itemplate instrux_MAXSS[1] = { + /* 0 : MAXSS xmmreg,xmmrm32 [rm: f3 0f 5f /r ] SSE,KATMAI */ + /* 333 355 001(5f) 110 : SSE,KATMAI */ + {I_MAXSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68427, 364, 2376}, +}; + +static const struct itemplate instrux_MINPS[1] = { + /* 0 : MINPS xmmreg,xmmrm128 [rm: np 0f 5d /r ] SSE,KATMAI */ + /* 360 355 001(5d) 110 : SSE,KATMAI */ + {I_MINPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+68433, 364, 2377}, +}; + +static const struct itemplate instrux_MINSS[1] = { + /* 0 : MINSS xmmreg,xmmrm32 [rm: f3 0f 5d /r ] SSE,KATMAI */ + /* 333 355 001(5d) 110 : SSE,KATMAI */ + {I_MINSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68439, 364, 2378}, +}; + +static const struct itemplate instrux_MOVAPS[2] = { + /* 0 : MOVAPS xmmreg,xmmrm128 [rm: np 0f 28 /r ] SSE,KATMAI */ + /* 360 355 001(28) 110 : SSE,KATMAI */ + {I_MOVAPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+68445, 364, 2379}, + /* 1 : MOVAPS xmmrm128,xmmreg [mr: np 0f 29 /r ] SSE,KATMAI */ + /* 360 355 001(29) 101 : SSE,KATMAI */ + {I_MOVAPS, 2, {RM_XMM|BITS128,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+68451, 364, 2380}, +}; + +static const struct itemplate instrux_MOVHPS[2] = { + /* 0 : MOVHPS xmmreg,mem64 [rm: np 0f 16 /r ] SSE,KATMAI */ + /* 360 355 001(16) 110 : SSE,KATMAI */ + {I_MOVHPS, 2, {XMMREG,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+68457, 364, 2381}, + /* 1 : MOVHPS mem64,xmmreg [mr: np 0f 17 /r ] SSE,KATMAI */ + /* 360 355 001(17) 101 : SSE,KATMAI */ + {I_MOVHPS, 2, {MEMORY|BITS64,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+68463, 364, 2382}, +}; + +static const struct itemplate instrux_MOVLHPS[1] = { + /* 0 : MOVLHPS xmmreg,xmmreg [rm: np 0f 16 /r ] SSE,KATMAI */ + /* 360 355 001(16) 110 : SSE,KATMAI */ + {I_MOVLHPS, 2, {XMMREG,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+68457, 364, 2383}, +}; + +static const struct itemplate instrux_MOVLPS[2] = { + /* 0 : MOVLPS xmmreg,mem64 [rm: np 0f 12 /r ] SSE,KATMAI */ + /* 360 355 001(12) 110 : SSE,KATMAI */ + {I_MOVLPS, 2, {XMMREG,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+67437, 364, 2384}, + /* 1 : MOVLPS mem64,xmmreg [mr: np 0f 13 /r ] SSE,KATMAI */ + /* 360 355 001(13) 101 : SSE,KATMAI */ + {I_MOVLPS, 2, {MEMORY|BITS64,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+68469, 364, 2385}, +}; + +static const struct itemplate instrux_MOVHLPS[1] = { + /* 0 : MOVHLPS xmmreg,xmmreg [rm: np 0f 12 /r ] SSE,KATMAI */ + /* 360 355 001(12) 110 : SSE,KATMAI */ + {I_MOVHLPS, 2, {XMMREG,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+67437, 364, 2386}, +}; + +static const struct itemplate instrux_MOVMSKPS[2] = { + /* 0 : MOVMSKPS reg32,xmmreg [rm: np 0f 50 /r ] SSE,KATMAI */ + /* 360 355 001(50) 110 : SSE,KATMAI */ + {I_MOVMSKPS, 2, {REG_GPR|BITS32,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+68475, 364, 2387}, + /* 1 : MOVMSKPS reg64,xmmreg [rm: np o64 0f 50 /r ] LONG,PROT,SSE,X86_64 */ + /* 360 324 355 001(50) 110 : LONG,PROT,SSE,X86_64 */ + {I_MOVMSKPS, 2, {REG_GPR|BITS64,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+57840, 368, 2388}, +}; + +static const struct itemplate instrux_MOVNTPS[1] = { + /* 0 : MOVNTPS mem128,xmmreg [mr: np 0f 2b /r ] SSE,KATMAI */ + /* 360 355 001(2b) 101 : SSE,KATMAI */ + {I_MOVNTPS, 2, {MEMORY|BITS128,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+68481, 364, 2389}, +}; + +static const struct itemplate instrux_MOVSS[2] = { + /* 0 : MOVSS xmmreg,xmmrm32 [rm: f3 0f 10 /r ] SSE,KATMAI */ + /* 333 355 001(10) 110 : SSE,KATMAI */ + {I_MOVSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68487, 364, 2390}, + /* 1 : MOVSS xmmrm32,xmmreg [mr: f3 0f 11 /r ] SSE,KATMAI */ + /* 333 355 001(11) 101 : SSE,KATMAI */ + {I_MOVSS, 2, {RM_XMM|BITS32,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+68493, 364, 2391}, +}; + +static const struct itemplate instrux_MOVUPS[2] = { + /* 0 : MOVUPS xmmreg,xmmrm128 [rm: np 0f 10 /r ] SSE,KATMAI */ + /* 360 355 001(10) 110 : SSE,KATMAI */ + {I_MOVUPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+68499, 364, 2392}, + /* 1 : MOVUPS xmmrm128,xmmreg [mr: np 0f 11 /r ] SSE,KATMAI */ + /* 360 355 001(11) 101 : SSE,KATMAI */ + {I_MOVUPS, 2, {RM_XMM|BITS128,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+68505, 364, 2393}, +}; + +static const struct itemplate instrux_MULPS[1] = { + /* 0 : MULPS xmmreg,xmmrm128 [rm: np 0f 59 /r ] SSE,KATMAI */ + /* 360 355 001(59) 110 : SSE,KATMAI */ + {I_MULPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+68511, 364, 2394}, +}; + +static const struct itemplate instrux_MULSS[1] = { + /* 0 : MULSS xmmreg,xmmrm32 [rm: f3 0f 59 /r ] SSE,KATMAI */ + /* 333 355 001(59) 110 : SSE,KATMAI */ + {I_MULSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68517, 364, 2395}, +}; + +static const struct itemplate instrux_ORPS[1] = { + /* 0 : ORPS xmmreg,xmmrm128 [rm: np 0f 56 /r ] SSE,KATMAI */ + /* 360 355 001(56) 110 : SSE,KATMAI */ + {I_ORPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+68523, 364, 2396}, +}; + +static const struct itemplate instrux_RCPPS[1] = { + /* 0 : RCPPS xmmreg,xmmrm128 [rm: np 0f 53 /r ] SSE,KATMAI */ + /* 360 355 001(53) 110 : SSE,KATMAI */ + {I_RCPPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+68529, 364, 2397}, +}; + +static const struct itemplate instrux_RCPSS[1] = { + /* 0 : RCPSS xmmreg,xmmrm32 [rm: f3 0f 53 /r ] SSE,KATMAI */ + /* 333 355 001(53) 110 : SSE,KATMAI */ + {I_RCPSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68535, 364, 2398}, +}; + +static const struct itemplate instrux_RSQRTPS[1] = { + /* 0 : RSQRTPS xmmreg,xmmrm128 [rm: np 0f 52 /r ] SSE,KATMAI */ + /* 360 355 001(52) 110 : SSE,KATMAI */ + {I_RSQRTPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+68541, 364, 2399}, +}; + +static const struct itemplate instrux_RSQRTSS[1] = { + /* 0 : RSQRTSS xmmreg,xmmrm32 [rm: f3 0f 52 /r ] SSE,KATMAI */ + /* 333 355 001(52) 110 : SSE,KATMAI */ + {I_RSQRTSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68547, 364, 2400}, +}; + +static const struct itemplate instrux_SHUFPS[1] = { + /* 0 : SHUFPS xmmreg,xmmrm128,imm8 [rmi: np 0f c6 /r ib,u ] SSE,KATMAI */ + /* 360 355 001(c6) 110 026 : SSE,KATMAI */ + {I_SHUFPS, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+57847, 364, 2401}, +}; + +static const struct itemplate instrux_SQRTPS[1] = { + /* 0 : SQRTPS xmmreg,xmmrm128 [rm: np 0f 51 /r ] SSE,KATMAI */ + /* 360 355 001(51) 110 : SSE,KATMAI */ + {I_SQRTPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+68553, 364, 2402}, +}; + +static const struct itemplate instrux_SQRTSS[1] = { + /* 0 : SQRTSS xmmreg,xmmrm32 [rm: f3 0f 51 /r ] SSE,KATMAI */ + /* 333 355 001(51) 110 : SSE,KATMAI */ + {I_SQRTSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68559, 364, 2403}, +}; + +static const struct itemplate instrux_STMXCSR[1] = { + /* 0 : STMXCSR mem32 [m: np 0f ae /3 ] SSE,KATMAI */ + /* 360 355 001(ae) 203 : SSE,KATMAI */ + {I_STMXCSR, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+68565, 364, 2404}, +}; + +static const struct itemplate instrux_SUBPS[1] = { + /* 0 : SUBPS xmmreg,xmmrm128 [rm: np 0f 5c /r ] SSE,KATMAI */ + /* 360 355 001(5c) 110 : SSE,KATMAI */ + {I_SUBPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+68571, 364, 2405}, +}; + +static const struct itemplate instrux_SUBSS[1] = { + /* 0 : SUBSS xmmreg,xmmrm32 [rm: f3 0f 5c /r ] SSE,KATMAI */ + /* 333 355 001(5c) 110 : SSE,KATMAI */ + {I_SUBSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68577, 364, 2406}, +}; + +static const struct itemplate instrux_UCOMISS[1] = { + /* 0 : UCOMISS xmmreg,xmmrm32 [rm: np 0f 2e /r ] FL,SSE,KATMAI */ + /* 360 355 001(2e) 110 : FL,SSE,KATMAI */ + {I_UCOMISS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68583, 365, 2407}, +}; + +static const struct itemplate instrux_UNPCKHPS[1] = { + /* 0 : UNPCKHPS xmmreg,xmmrm128 [rm: np 0f 15 /r ] SSE,KATMAI */ + /* 360 355 001(15) 110 : SSE,KATMAI */ + {I_UNPCKHPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+68589, 364, 2408}, +}; + +static const struct itemplate instrux_UNPCKLPS[1] = { + /* 0 : UNPCKLPS xmmreg,xmmrm128 [rm: np 0f 14 /r ] SSE,KATMAI */ + /* 360 355 001(14) 110 : SSE,KATMAI */ + {I_UNPCKLPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+68595, 364, 2409}, +}; + +static const struct itemplate instrux_XORPS[1] = { + /* 0 : XORPS xmmreg,xmmrm128 [rm: np 0f 57 /r ] SSE,KATMAI */ + /* 360 355 001(57) 110 : SSE,KATMAI */ + {I_XORPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+68601, 364, 2410}, +}; + +static const struct itemplate instrux_FXRSTOR[1] = { + /* 0 : FXRSTOR mem [m: np 0f ae /1 ] FPU,SSE,P6 */ + /* 360 355 001(ae) 201 : FPU,SSE,P6 */ + {I_FXRSTOR, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57855, 369, 2413}, +}; + +static const struct itemplate instrux_FXRSTOR64[1] = { + /* 0 : FXRSTOR64 mem [m: o64 np 0f ae /1 ] LONG,PROT,FPU,SSE,X86_64 */ + /* 324 360 355 001(ae) 201 : LONG,PROT,FPU,SSE,X86_64 */ + {I_FXRSTOR64, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57854, 370, 2414}, +}; + +static const struct itemplate instrux_FXSAVE[1] = { + /* 0 : FXSAVE mem [m: np 0f ae /0 ] FPU,SSE,P6 */ + /* 360 355 001(ae) 200 : FPU,SSE,P6 */ + {I_FXSAVE, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57862, 369, 2415}, +}; + +static const struct itemplate instrux_FXSAVE64[1] = { + /* 0 : FXSAVE64 mem [m: o64 np 0f ae /0 ] LONG,PROT,FPU,SSE,X86_64 */ + /* 324 360 355 001(ae) 200 : LONG,PROT,FPU,SSE,X86_64 */ + {I_FXSAVE64, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57861, 370, 2416}, +}; + +static const struct itemplate instrux_XGETBV[1] = { + /* 0 : XGETBV void [ 0f 01 d0 ] NEHALEM */ + /* 355 002(01 d0) : NEHALEM */ + {I_XGETBV, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72454, 371, 2421}, +}; + +static const struct itemplate instrux_XSETBV[1] = { + /* 0 : XSETBV void [ 0f 01 d1 ] PRIV,NEHALEM */ + /* 355 002(01 d1) : PRIV,NEHALEM */ + {I_XSETBV, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72459, 372, 2422}, +}; + +static const struct itemplate instrux_XSAVE[1] = { + /* 0 : XSAVE mem [m: np 0f ae /4 ] NOAPX,NEHALEM */ + /* 360 355 001(ae) 204 : NOAPX,NEHALEM */ + {I_XSAVE, 1, {MEMORY|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57869, 373, 2423}, +}; + +static const struct itemplate instrux_XSAVE64[1] = { + /* 0 : XSAVE64 mem [m: o64 np 0f ae /4 ] NOAPX,LONG,PROT,X86_64,NEHALEM */ + /* 324 360 355 001(ae) 204 : NOAPX,LONG,PROT,NEHALEM */ + {I_XSAVE64, 1, {MEMORY|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57868, 374, 2424}, +}; + +static const struct itemplate instrux_XSAVEC[1] = { + /* 0 : XSAVEC mem [m: np 0f c7 /4 ] NOAPX,FUTURE */ + /* 360 355 001(c7) 204 : NOAPX,FUTURE */ + {I_XSAVEC, 1, {MEMORY|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57876, 282, 2425}, +}; + +static const struct itemplate instrux_XSAVEC64[1] = { + /* 0 : XSAVEC64 mem [m: o64 np 0f c7 /4 ] NOAPX,LONG,PROT,X86_64 */ + /* 324 360 355 001(c7) 204 : NOAPX,LONG,PROT,X86_64 */ + {I_XSAVEC64, 1, {MEMORY|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57875, 244, 2426}, +}; + +static const struct itemplate instrux_XSAVEOPT[1] = { + /* 0 : XSAVEOPT mem [m: np 0f ae /6 ] NOAPX,FUTURE */ + /* 360 355 001(ae) 206 : NOAPX,FUTURE */ + {I_XSAVEOPT, 1, {MEMORY|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57883, 282, 2427}, +}; + +static const struct itemplate instrux_XSAVEOPT64[1] = { + /* 0 : XSAVEOPT64 mem [m: o64 np 0f ae /6 ] NOAPX,LONG,PROT,X86_64 */ + /* 324 360 355 001(ae) 206 : NOAPX,LONG,PROT,X86_64 */ + {I_XSAVEOPT64, 1, {MEMORY|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57882, 244, 2428}, +}; + +static const struct itemplate instrux_XSAVES[1] = { + /* 0 : XSAVES mem [m: np 0f c7 /5 ] NOAPX,FUTURE */ + /* 360 355 001(c7) 205 : NOAPX,FUTURE */ + {I_XSAVES, 1, {MEMORY|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57890, 282, 2429}, +}; + +static const struct itemplate instrux_XSAVES64[1] = { + /* 0 : XSAVES64 mem [m: o64 np 0f c7 /5 ] NOAPX,LONG,PROT,X86_64 */ + /* 324 360 355 001(c7) 205 : NOAPX,LONG,PROT,X86_64 */ + {I_XSAVES64, 1, {MEMORY|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57889, 244, 2430}, +}; + +static const struct itemplate instrux_XRSTOR[1] = { + /* 0 : XRSTOR mem [m: np 0f ae /5 ] NOAPX,NEHALEM */ + /* 360 355 001(ae) 205 : NOAPX,NEHALEM */ + {I_XRSTOR, 1, {MEMORY|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57897, 373, 2431}, +}; + +static const struct itemplate instrux_XRSTOR64[1] = { + /* 0 : XRSTOR64 mem [m: o64 np 0f ae /5 ] NOAPX,LONG,PROT,X86_64,NEHALEM */ + /* 324 360 355 001(ae) 205 : NOAPX,LONG,PROT,NEHALEM */ + {I_XRSTOR64, 1, {MEMORY|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57896, 374, 2432}, +}; + +static const struct itemplate instrux_XRSTORS[1] = { + /* 0 : XRSTORS mem [m: np 0f c7 /3 ] NOAPX,FUTURE */ + /* 360 355 001(c7) 203 : NOAPX,FUTURE */ + {I_XRSTORS, 1, {MEMORY|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57904, 282, 2433}, +}; + +static const struct itemplate instrux_XRSTORS64[1] = { + /* 0 : XRSTORS64 mem [m: o64 np 0f c7 /3 ] NOAPX,LONG,PROT,X86_64 */ + /* 324 360 355 001(c7) 203 : NOAPX,LONG,PROT,X86_64 */ + {I_XRSTORS64, 1, {MEMORY|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57903, 244, 2434}, +}; + +static const struct itemplate instrux_PREFETCHNTA[1] = { + /* 0 : PREFETCHNTA mem8 [m: 0f 18 /0 ] AR0,SB,KATMAI */ + /* 355 001(18) 200 : AR0,SB,KATMAI */ + {I_PREFETCHNTA, 1, {MEMORY|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70198, 375, 2439}, +}; + +static const struct itemplate instrux_PREFETCHT0[1] = { + /* 0 : PREFETCHT0 mem8 [m: 0f 18 /1 ] AR0,SB,KATMAI */ + /* 355 001(18) 201 : AR0,SB,KATMAI */ + {I_PREFETCHT0, 1, {MEMORY|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70216, 375, 2440}, +}; + +static const struct itemplate instrux_PREFETCHT1[1] = { + /* 0 : PREFETCHT1 mem8 [m: 0f 18 /2 ] AR0,SB,KATMAI */ + /* 355 001(18) 202 : AR0,SB,KATMAI */ + {I_PREFETCHT1, 1, {MEMORY|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70234, 375, 2441}, +}; + +static const struct itemplate instrux_PREFETCHT2[1] = { + /* 0 : PREFETCHT2 mem8 [m: 0f 18 /3 ] AR0,SB,KATMAI */ + /* 355 001(18) 203 : AR0,SB,KATMAI */ + {I_PREFETCHT2, 1, {MEMORY|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70252, 375, 2442}, +}; + +static const struct itemplate instrux_PREFETCHIT0[1] = { + /* 0 : PREFETCHIT0 mem8 [m: 0f 18 /7 ] AR0,SB,PREFETCHI,FUTURE */ + /* 355 001(18) 207 : AR0,SB,PREFETCHI,FUTURE */ + {I_PREFETCHIT0, 1, {MEMORY|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70324, 376, 2443}, +}; + +static const struct itemplate instrux_PREFETCHIT1[1] = { + /* 0 : PREFETCHIT1 mem8 [m: 0f 18 /6 ] AR0,SB,PREFETCHI,FUTURE */ + /* 355 001(18) 206 : AR0,SB,PREFETCHI,FUTURE */ + {I_PREFETCHIT1, 1, {MEMORY|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70306, 376, 2444}, +}; + +static const struct itemplate instrux_MASKMOVQ[1] = { + /* 0 : MASKMOVQ mmxreg,mmxreg [rm: np 0f f7 /r ] MMX,KATMAI */ + /* 360 355 001(f7) 110 : MMX,KATMAI */ + {I_MASKMOVQ, 2, {MMXREG,MMXREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+68607, 378, 2448}, +}; + +static const struct itemplate instrux_MOVNTQ[1] = { + /* 0 : MOVNTQ mem,mmxreg [mr: np 0f e7 /r ] AR0-1,SQ,MMX,KATMAI */ + /* 360 355 001(e7) 101 : AR0,AR1,SQ,MMX,KATMAI */ + {I_MOVNTQ, 2, {MEMORY,MMXREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+68613, 379, 2449}, +}; + +static const struct itemplate instrux_PAVGB[2] = { + /* 0 : PAVGB mmxreg,mmxrm [rm: np 0f e0 /r ] AR0-1,SQ,MMX,KATMAI */ + /* 360 355 001(e0) 110 : AR0,AR1,SQ,MMX,KATMAI */ + {I_PAVGB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+68619, 379, 2450}, + /* 1 : PAVGB xmmreg,xmmrm [rm: 66 0f e0 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(e0) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PAVGB, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68823, 381, 2514}, +}; + +static const struct itemplate instrux_PAVGW[2] = { + /* 0 : PAVGW mmxreg,mmxrm [rm: np 0f e3 /r ] AR0-1,SQ,MMX,KATMAI */ + /* 360 355 001(e3) 110 : AR0,AR1,SQ,MMX,KATMAI */ + {I_PAVGW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+68625, 379, 2451}, + /* 1 : PAVGW xmmreg,xmmrm [rm: 66 0f e3 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(e3) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PAVGW, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68829, 381, 2515}, +}; + +static const struct itemplate instrux_PEXTRW[6] = { + /* 0 : PEXTRW reg32,mmxreg,imm [rmi: np 0f c5 /r ib,u ] AR2,SB,MMX,KATMAI */ + /* 360 355 001(c5) 110 026 : AR2,SB,MMX,KATMAI */ + {I_PEXTRW, 3, {REG_GPR|BITS32,MMXREG,IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+57910, 380, 2452}, + /* 1 : PEXTRW reg32,xmmreg,imm [rmi: 66 0f c5 /r ib,u ] AR2,SB,SSE2,WILLAMETTE */ + /* 361 355 001(c5) 110 026 : AR2,SB,SSE2,WILLAMETTE */ + {I_PEXTRW, 3, {REG_GPR|BITS32,XMMREG,IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+58001, 388, 2522}, + /* 2 : PEXTRW reg64,xmmreg,imm [rmi: 66 0f c5 /r ib,u ] ND,AR2,SB,LONG,PROT,SSE2,X86_64 */ + /* 361 355 001(c5) 110 026 : AR2,SB,LONG,PROT,SSE2,X86_64 */ + {I_PEXTRW, 3, {REG_GPR|BITS64,XMMREG,IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+58001, 389, 2523}, + /* 3 : PEXTRW reg32,xmmreg,imm8 [mri: 66 0f3a 15 /r ib,u ] SSE41,FUTURE */ + /* 361 357 001(15) 101 026 : NOAPX,SSE41,FUTURE */ + {I_PEXTRW, 3, {REG_GPR|BITS32|RN_L16,XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+51708, 409, 2774}, + /* 4 : PEXTRW mem16,xmmreg,imm8 [mri: 66 0f3a 15 /r ib,u ] SSE41,FUTURE */ + /* 361 357 001(15) 101 026 : NOAPX,SSE41,FUTURE */ + {I_PEXTRW, 3, {MEMORY|BITS16|RN_L16,XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+51708, 409, 2775}, + /* 5 : PEXTRW reg64,xmmreg,imm8 [mri: o64 66 0f3a 15 /r ib,u ] LONG,PROT,SSE41,X86_64 */ + /* 324 361 357 001(15) 101 026 : NOAPX,LONG,PROT,SSE41,X86_64 */ + {I_PEXTRW, 3, {REG_GPR|BITS64|RN_L16,XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+51707, 410, 2776}, +}; + +static const struct itemplate instrux_PINSRW[8] = { + /* 0 : PINSRW mmxreg,mem,imm [rmi: np 0f c4 /r ib,u ] AR2,SB,MMX,KATMAI */ + /* 360 355 001(c4) 110 026 : AR2,SB,MMX,KATMAI */ + {I_PINSRW, 3, {MMXREG,MEMORY,IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+57917, 380, 2455}, + /* 1 : PINSRW mmxreg,rm16,imm [rmi: np 0f c4 /r ib,u ] AR2,SB,MMX,KATMAI */ + /* 360 355 001(c4) 110 026 : AR2,SB,MMX,KATMAI */ + {I_PINSRW, 3, {MMXREG,RM_GPR|BITS16,IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+57917, 380, 2456}, + /* 2 : PINSRW mmxreg,reg32,imm [rmi: np 0f c4 /r ib,u ] AR2,SB,MMX,KATMAI */ + /* 360 355 001(c4) 110 026 : AR2,SB,MMX,KATMAI */ + {I_PINSRW, 3, {MMXREG,REG_GPR|BITS32,IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+57917, 380, 2457}, + /* 3 : PINSRW xmmreg,reg16,imm [rmi: 66 0f c4 /r ib,u ] AR2,SB,SSE2,WILLAMETTE */ + /* 361 355 001(c4) 110 026 : AR2,SB,SSE2,WILLAMETTE */ + {I_PINSRW, 3, {XMMREG,REG_GPR|BITS16,IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+58008, 388, 2524}, + /* 4 : PINSRW xmmreg,reg32,imm [rmi: 66 0f c4 /r ib,u ] ND,AR2,SB,SSE2,WILLAMETTE */ + /* 361 355 001(c4) 110 026 : AR2,SB,SSE2,WILLAMETTE */ + {I_PINSRW, 3, {XMMREG,REG_GPR|BITS32,IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+58008, 388, 2525}, + /* 5 : PINSRW xmmreg,reg64,imm [rmi: 66 0f c4 /r ib,u ] ND,AR2,SB,LONG,PROT,SSE2,X86_64 */ + /* 361 355 001(c4) 110 026 : AR2,SB,LONG,PROT,SSE2,X86_64 */ + {I_PINSRW, 3, {XMMREG,REG_GPR|BITS64,IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+58008, 389, 2526}, + /* 6 : PINSRW xmmreg,mem,imm [rmi: 66 0f c4 /r ib,u ] AR2,SB,SSE2,WILLAMETTE */ + /* 361 355 001(c4) 110 026 : AR2,SB,SSE2,WILLAMETTE */ + {I_PINSRW, 3, {XMMREG,MEMORY,IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+58008, 388, 2527}, + /* 7 : PINSRW xmmreg,mem16,imm [rmi: 66 0f c4 /r ib,u ] AR2,SB,SSE2,WILLAMETTE */ + /* 361 355 001(c4) 110 026 : AR2,SB,SSE2,WILLAMETTE */ + {I_PINSRW, 3, {XMMREG,MEMORY|BITS16,IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+58008, 388, 2528}, +}; + +static const struct itemplate instrux_PMAXSW[2] = { + /* 0 : PMAXSW mmxreg,mmxrm [rm: np 0f ee /r ] AR0-1,SQ,MMX,KATMAI */ + /* 360 355 001(ee) 110 : AR0,AR1,SQ,MMX,KATMAI */ + {I_PMAXSW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+68631, 379, 2458}, + /* 1 : PMAXSW xmmreg,xmmrm [rm: 66 0f ee /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(ee) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PMAXSW, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68877, 381, 2530}, +}; + +static const struct itemplate instrux_PMAXUB[2] = { + /* 0 : PMAXUB mmxreg,mmxrm [rm: np 0f de /r ] AR0-1,SQ,MMX,KATMAI */ + /* 360 355 001(de) 110 : AR0,AR1,SQ,MMX,KATMAI */ + {I_PMAXUB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+68637, 379, 2459}, + /* 1 : PMAXUB xmmreg,xmmrm [rm: 66 0f de /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(de) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PMAXUB, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68883, 381, 2531}, +}; + +static const struct itemplate instrux_PMINSW[2] = { + /* 0 : PMINSW mmxreg,mmxrm [rm: np 0f ea /r ] AR0-1,SQ,MMX,KATMAI */ + /* 360 355 001(ea) 110 : AR0,AR1,SQ,MMX,KATMAI */ + {I_PMINSW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+68643, 379, 2460}, + /* 1 : PMINSW xmmreg,xmmrm [rm: 66 0f ea /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(ea) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PMINSW, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68889, 381, 2532}, +}; + +static const struct itemplate instrux_PMINUB[2] = { + /* 0 : PMINUB mmxreg,mmxrm [rm: np 0f da /r ] AR0-1,SQ,MMX,KATMAI */ + /* 360 355 001(da) 110 : AR0,AR1,SQ,MMX,KATMAI */ + {I_PMINUB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+68649, 379, 2461}, + /* 1 : PMINUB xmmreg,xmmrm [rm: 66 0f da /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(da) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PMINUB, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68895, 381, 2533}, +}; + +static const struct itemplate instrux_PMOVMSKB[2] = { + /* 0 : PMOVMSKB reg32,mmxreg [rm: np 0f d7 /r ] MMX,KATMAI */ + /* 360 355 001(d7) 110 : MMX,KATMAI */ + {I_PMOVMSKB, 2, {REG_GPR|BITS32,MMXREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+68655, 378, 2462}, + /* 1 : PMOVMSKB reg32,xmmreg [rm: 66 0f d7 /r ] SSE2,WILLAMETTE */ + /* 361 355 001(d7) 110 : SSE2,WILLAMETTE */ + {I_PMOVMSKB, 2, {REG_GPR|BITS32,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+68901, 248, 2534}, +}; + +static const struct itemplate instrux_PMULHUW[2] = { + /* 0 : PMULHUW mmxreg,mmxrm [rm: np 0f e4 /r ] AR0-1,SQ,MMX,KATMAI */ + /* 360 355 001(e4) 110 : AR0,AR1,SQ,MMX,KATMAI */ + {I_PMULHUW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+68661, 379, 2463}, + /* 1 : PMULHUW xmmreg,xmmrm [rm: 66 0f e4 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(e4) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PMULHUW, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68907, 381, 2535}, +}; + +static const struct itemplate instrux_PSADBW[2] = { + /* 0 : PSADBW mmxreg,mmxrm [rm: np 0f f6 /r ] AR0-1,SQ,MMX,KATMAI */ + /* 360 355 001(f6) 110 : AR0,AR1,SQ,MMX,KATMAI */ + {I_PSADBW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+68667, 379, 2464}, + /* 1 : PSADBW xmmreg,xmmrm [rm: 66 0f f6 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(f6) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PSADBW, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68943, 381, 2541}, +}; + +static const struct itemplate instrux_PSHUFW[1] = { + /* 0 : PSHUFW mmxreg,mmxrm,imm [rmi: np 0f 70 /r ib ] AR2,SB,MMX,KATMAI */ + /* 360 355 001(70) 110 022 : AR2,SB,MMX,KATMAI */ + {I_PSHUFW, 3, {MMXREG,RM_MMX,IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+57924, 380, 2465}, +}; + +static const struct itemplate instrux_PF2IW[1] = { + /* 0 : PF2IW mmxreg,mmxrm [rm: 0f 0f /r 1c ] AR0-1,SQ,3DNOW,PENT */ + /* 355 001(0f) 110 001(1c) : AR0,AR1,SQ,3DNOW,PENT */ + {I_PF2IW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+57931, 336, 2468}, +}; + +static const struct itemplate instrux_PFNACC[1] = { + /* 0 : PFNACC mmxreg,mmxrm [rm: 0f 0f /r 8a ] AR0-1,SQ,3DNOW,PENT */ + /* 355 001(0f) 110 001(8a) : AR0,AR1,SQ,3DNOW,PENT */ + {I_PFNACC, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+57938, 336, 2469}, +}; + +static const struct itemplate instrux_PFPNACC[1] = { + /* 0 : PFPNACC mmxreg,mmxrm [rm: 0f 0f /r 8e ] AR0-1,SQ,3DNOW,PENT */ + /* 355 001(0f) 110 001(8e) : AR0,AR1,SQ,3DNOW,PENT */ + {I_PFPNACC, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+57945, 336, 2470}, +}; + +static const struct itemplate instrux_PI2FW[1] = { + /* 0 : PI2FW mmxreg,mmxrm [rm: 0f 0f /r 0c ] AR0-1,SQ,3DNOW,PENT */ + /* 355 001(0f) 110 001(0c) : AR0,AR1,SQ,3DNOW,PENT */ + {I_PI2FW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+57952, 336, 2471}, +}; + +static const struct itemplate instrux_PSWAPD[1] = { + /* 0 : PSWAPD mmxreg,mmxrm [rm: 0f 0f /r bb ] AR0-1,SQ,3DNOW,PENT */ + /* 355 001(0f) 110 001(bb) : AR0,AR1,SQ,3DNOW,PENT */ + {I_PSWAPD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+57959, 336, 2472}, +}; + +static const struct itemplate instrux_MASKMOVDQU[1] = { + /* 0 : MASKMOVDQU xmmreg,xmmreg [rm: 66 0f f7 /r ] SSE2,WILLAMETTE */ + /* 361 355 001(f7) 110 : SSE2,WILLAMETTE */ + {I_MASKMOVDQU, 2, {XMMREG,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+68673, 248, 2475}, +}; + +static const struct itemplate instrux_MOVNTDQ[1] = { + /* 0 : MOVNTDQ mem,xmmreg [mr: 66 0f e7 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(e7) 101 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_MOVNTDQ, 2, {MEMORY,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+68679, 381, 2476}, +}; + +static const struct itemplate instrux_MOVNTI[2] = { + /* 0 : MOVNTI mem,reg32 [mr: np 0f c3 /r ] AR0-1,SD,WILLAMETTE */ + /* 360 355 001(c3) 101 : AR0,AR1,SD,WILLAMETTE */ + {I_MOVNTI, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+57967, 382, 2477}, + /* 1 : MOVNTI mem,reg64 [mr: o64 np 0f c3 /r ] AR0-1,SQ,LONG,PROT,X86_64 */ + /* 324 360 355 001(c3) 101 : AR0,AR1,SQ,LONG,PROT,X86_64 */ + {I_MOVNTI, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+57966, 383, 2478}, +}; + +static const struct itemplate instrux_MOVNTPD[1] = { + /* 0 : MOVNTPD mem,xmmreg [mr: 66 0f 2b /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(2b) 101 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_MOVNTPD, 2, {MEMORY,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+68685, 381, 2479}, +}; + +static const struct itemplate instrux_MOVDQA[2] = { + /* 0 : MOVDQA xmmreg,xmmrm128 [rm: 66 0f 6f /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(6f) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_MOVDQA, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+68691, 381, 2488}, + /* 1 : MOVDQA xmmrm128,xmmreg [mr: 66 0f 7f /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(7f) 101 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_MOVDQA, 2, {RM_XMM|BITS128,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+68697, 381, 2489}, +}; + +static const struct itemplate instrux_MOVDQU[2] = { + /* 0 : MOVDQU xmmreg,xmmrm128 [rm: f3 0f 6f /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 333 355 001(6f) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_MOVDQU, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+68703, 381, 2490}, + /* 1 : MOVDQU xmmrm128,xmmreg [mr: f3 0f 7f /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 333 355 001(7f) 101 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_MOVDQU, 2, {RM_XMM|BITS128,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+68709, 381, 2491}, +}; + +static const struct itemplate instrux_MOVDQ2Q[1] = { + /* 0 : MOVDQ2Q mmxreg,xmmreg [rm: f2 0f d6 /r ] SSE2,WILLAMETTE */ + /* 332 355 001(d6) 110 : SSE2,WILLAMETTE */ + {I_MOVDQ2Q, 2, {MMXREG,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+68715, 248, 2492}, +}; + +static const struct itemplate instrux_MOVQ2DQ[1] = { + /* 0 : MOVQ2DQ xmmreg,mmxreg [rm: f3 0f d6 /r ] SSE2,WILLAMETTE */ + /* 333 355 001(d6) 110 : SSE2,WILLAMETTE */ + {I_MOVQ2DQ, 2, {XMMREG,MMXREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+68733, 248, 2499}, +}; + +static const struct itemplate instrux_PADDQ[2] = { + /* 0 : PADDQ mmxreg,mmxrm [rm: np 0f d4 /r ] AR0-1,SQ,MMX,WILLAMETTE */ + /* 360 355 001(d4) 110 : AR0,AR1,SQ,MMX,WILLAMETTE */ + {I_PADDQ, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+68775, 387, 2506}, + /* 1 : PADDQ xmmreg,xmmrm [rm: 66 0f d4 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(d4) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PADDQ, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68781, 381, 2507}, +}; + +static const struct itemplate instrux_PMULUDQ[2] = { + /* 0 : PMULUDQ mmxreg,mmxrm [rm: np 0f f4 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 360 355 001(f4) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PMULUDQ, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+68925, 381, 2538}, + /* 1 : PMULUDQ xmmreg,xmmrm [rm: 66 0f f4 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(f4) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PMULUDQ, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68931, 381, 2539}, +}; + +static const struct itemplate instrux_PSHUFD[2] = { + /* 0 : PSHUFD xmmreg,xmmreg,imm [rmi: 66 0f 70 /r ib ] AR2,SB,SSE2,WILLAMETTE */ + /* 361 355 001(70) 110 022 : AR2,SB,SSE2,WILLAMETTE */ + {I_PSHUFD, 3, {XMMREG,XMMREG,IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+58015, 388, 2542}, + /* 1 : PSHUFD xmmreg,mem,imm [rmi: 66 0f 70 /r ib ] AR2,SB,SSE2,WILLAMETTE */ + /* 361 355 001(70) 110 022 : AR2,SB,SSE2,WILLAMETTE */ + {I_PSHUFD, 3, {XMMREG,MEMORY,IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+58015, 388, 2543}, +}; + +static const struct itemplate instrux_PSHUFHW[2] = { + /* 0 : PSHUFHW xmmreg,xmmreg,imm [rmi: f3 0f 70 /r ib ] AR2,SB,SSE2,WILLAMETTE */ + /* 333 355 001(70) 110 022 : AR2,SB,SSE2,WILLAMETTE */ + {I_PSHUFHW, 3, {XMMREG,XMMREG,IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+58022, 388, 2544}, + /* 1 : PSHUFHW xmmreg,mem,imm [rmi: f3 0f 70 /r ib ] AR2,SB,SSE2,WILLAMETTE */ + /* 333 355 001(70) 110 022 : AR2,SB,SSE2,WILLAMETTE */ + {I_PSHUFHW, 3, {XMMREG,MEMORY,IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+58022, 388, 2545}, +}; + +static const struct itemplate instrux_PSHUFLW[2] = { + /* 0 : PSHUFLW xmmreg,xmmreg,imm [rmi: f2 0f 70 /r ib ] AR2,SB,SSE2,WILLAMETTE */ + /* 332 355 001(70) 110 022 : AR2,SB,SSE2,WILLAMETTE */ + {I_PSHUFLW, 3, {XMMREG,XMMREG,IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+58029, 388, 2546}, + /* 1 : PSHUFLW xmmreg,mem,imm [rmi: f2 0f 70 /r ib ] AR2,SB,SSE2,WILLAMETTE */ + /* 332 355 001(70) 110 022 : AR2,SB,SSE2,WILLAMETTE */ + {I_PSHUFLW, 3, {XMMREG,MEMORY,IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+58029, 388, 2547}, +}; + +static const struct itemplate instrux_PSLLDQ[1] = { + /* 0 : PSLLDQ xmmreg,imm [mi: 66 0f 73 /7 ib,u ] AR1,SB,SSE2,WILLAMETTE */ + /* 361 355 001(73) 207 025 : AR1,SB,SSE2,WILLAMETTE */ + {I_PSLLDQ, 2, {XMMREG,IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+58036, 390, 2548}, +}; + +static const struct itemplate instrux_PSRLDQ[1] = { + /* 0 : PSRLDQ xmmreg,imm [mi: 66 0f 73 /3 ib,u ] AR1,SB,SSE2,WILLAMETTE */ + /* 361 355 001(73) 203 025 : AR1,SB,SSE2,WILLAMETTE */ + {I_PSRLDQ, 2, {XMMREG,IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+58078, 390, 2559}, +}; + +static const struct itemplate instrux_PSUBQ[2] = { + /* 0 : PSUBQ mmxreg,mmxrm [rm: np 0f fb /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 360 355 001(fb) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PSUBQ, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+69015, 381, 2569}, + /* 1 : PSUBQ xmmreg,xmmrm [rm: 66 0f fb /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(fb) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PSUBQ, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69021, 381, 2570}, +}; + +static const struct itemplate instrux_PUNPCKHQDQ[1] = { + /* 0 : PUNPCKHQDQ xmmreg,xmmrm [rm: 66 0f 6d /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(6d) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PUNPCKHQDQ, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69069, 381, 2578}, +}; + +static const struct itemplate instrux_PUNPCKLQDQ[1] = { + /* 0 : PUNPCKLQDQ xmmreg,xmmrm [rm: 66 0f 6c /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(6c) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PUNPCKLQDQ, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69093, 381, 2582}, +}; + +static const struct itemplate instrux_ADDPD[1] = { + /* 0 : ADDPD xmmreg,xmmrm [rm: 66 0f 58 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(58) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_ADDPD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69105, 381, 2586}, +}; + +static const struct itemplate instrux_ADDSD[1] = { + /* 0 : ADDSD xmmreg,xmmrm [rm: f2 0f 58 /r ] AR0-1,SQ,SSE2,WILLAMETTE */ + /* 332 355 001(58) 110 : AR0,AR1,SQ,SSE2,WILLAMETTE */ + {I_ADDSD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69111, 385, 2587}, +}; + +static const struct itemplate instrux_ANDNPD[1] = { + /* 0 : ANDNPD xmmreg,xmmrm [rm: 66 0f 55 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(55) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_ANDNPD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69117, 381, 2588}, +}; + +static const struct itemplate instrux_ANDPD[1] = { + /* 0 : ANDPD xmmreg,xmmrm [rm: 66 0f 54 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(54) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_ANDPD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69123, 381, 2589}, +}; + +static const struct itemplate instrux_CMPEQPD[1] = { + /* 0 : CMPEQPD xmmreg,xmmrm [rm: 66 0f c2 /r 00 ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(c2) 110 001(00) : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_CMPEQPD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+51531, 381, 2590}, +}; + +static const struct itemplate instrux_CMPEQSD[1] = { + /* 0 : CMPEQSD xmmreg,xmmrm [rm: f2 0f c2 /r 00 ] AR0-1,SQ,SSE2,WILLAMETTE */ + /* 332 355 001(c2) 110 001(00) : AR0,AR1,SQ,SSE2,WILLAMETTE */ + {I_CMPEQSD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+51539, 385, 2591}, +}; + +static const struct itemplate instrux_CMPLEPD[1] = { + /* 0 : CMPLEPD xmmreg,xmmrm [rm: 66 0f c2 /r 02 ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(c2) 110 001(02) : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_CMPLEPD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+51547, 381, 2592}, +}; + +static const struct itemplate instrux_CMPLESD[1] = { + /* 0 : CMPLESD xmmreg,xmmrm [rm: f2 0f c2 /r 02 ] AR0-1,SQ,SSE2,WILLAMETTE */ + /* 332 355 001(c2) 110 001(02) : AR0,AR1,SQ,SSE2,WILLAMETTE */ + {I_CMPLESD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+51555, 385, 2593}, +}; + +static const struct itemplate instrux_CMPLTPD[1] = { + /* 0 : CMPLTPD xmmreg,xmmrm [rm: 66 0f c2 /r 01 ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(c2) 110 001(01) : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_CMPLTPD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+51563, 381, 2594}, +}; + +static const struct itemplate instrux_CMPLTSD[1] = { + /* 0 : CMPLTSD xmmreg,xmmrm [rm: f2 0f c2 /r 01 ] AR0-1,SQ,SSE2,WILLAMETTE */ + /* 332 355 001(c2) 110 001(01) : AR0,AR1,SQ,SSE2,WILLAMETTE */ + {I_CMPLTSD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+51571, 385, 2595}, +}; + +static const struct itemplate instrux_CMPNEQPD[1] = { + /* 0 : CMPNEQPD xmmreg,xmmrm [rm: 66 0f c2 /r 04 ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(c2) 110 001(04) : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_CMPNEQPD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+51579, 381, 2596}, +}; + +static const struct itemplate instrux_CMPNEQSD[1] = { + /* 0 : CMPNEQSD xmmreg,xmmrm [rm: f2 0f c2 /r 04 ] AR0-1,SQ,SSE2,WILLAMETTE */ + /* 332 355 001(c2) 110 001(04) : AR0,AR1,SQ,SSE2,WILLAMETTE */ + {I_CMPNEQSD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+51587, 385, 2597}, +}; + +static const struct itemplate instrux_CMPNLEPD[1] = { + /* 0 : CMPNLEPD xmmreg,xmmrm [rm: 66 0f c2 /r 06 ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(c2) 110 001(06) : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_CMPNLEPD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+51595, 381, 2598}, +}; + +static const struct itemplate instrux_CMPNLESD[1] = { + /* 0 : CMPNLESD xmmreg,xmmrm [rm: f2 0f c2 /r 06 ] AR0-1,SQ,SSE2,WILLAMETTE */ + /* 332 355 001(c2) 110 001(06) : AR0,AR1,SQ,SSE2,WILLAMETTE */ + {I_CMPNLESD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+51603, 385, 2599}, +}; + +static const struct itemplate instrux_CMPNLTPD[1] = { + /* 0 : CMPNLTPD xmmreg,xmmrm [rm: 66 0f c2 /r 05 ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(c2) 110 001(05) : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_CMPNLTPD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+51611, 381, 2600}, +}; + +static const struct itemplate instrux_CMPNLTSD[1] = { + /* 0 : CMPNLTSD xmmreg,xmmrm [rm: f2 0f c2 /r 05 ] AR0-1,SQ,SSE2,WILLAMETTE */ + /* 332 355 001(c2) 110 001(05) : AR0,AR1,SQ,SSE2,WILLAMETTE */ + {I_CMPNLTSD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+51619, 385, 2601}, +}; + +static const struct itemplate instrux_CMPORDPD[1] = { + /* 0 : CMPORDPD xmmreg,xmmrm [rm: 66 0f c2 /r 07 ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(c2) 110 001(07) : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_CMPORDPD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+51627, 381, 2602}, +}; + +static const struct itemplate instrux_CMPORDSD[1] = { + /* 0 : CMPORDSD xmmreg,xmmrm [rm: f2 0f c2 /r 07 ] AR0-1,SQ,SSE2,WILLAMETTE */ + /* 332 355 001(c2) 110 001(07) : AR0,AR1,SQ,SSE2,WILLAMETTE */ + {I_CMPORDSD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+51635, 385, 2603}, +}; + +static const struct itemplate instrux_CMPUNORDPD[1] = { + /* 0 : CMPUNORDPD xmmreg,xmmrm [rm: 66 0f c2 /r 03 ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(c2) 110 001(03) : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_CMPUNORDPD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+51643, 381, 2604}, +}; + +static const struct itemplate instrux_CMPUNORDSD[1] = { + /* 0 : CMPUNORDSD xmmreg,xmmrm [rm: f2 0f c2 /r 03 ] AR0-1,SQ,SSE2,WILLAMETTE */ + /* 332 355 001(c2) 110 001(03) : AR0,AR1,SQ,SSE2,WILLAMETTE */ + {I_CMPUNORDSD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+51651, 385, 2605}, +}; + +static const struct itemplate instrux_CMPPD[1] = { + /* 0 : CMPPD xmmreg,xmmrm128,imm8 [rmi: 66 0f c2 /r ib,u ] SSE2,WILLAMETTE */ + /* 361 355 001(c2) 110 026 : SSE2,WILLAMETTE */ + {I_CMPPD, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+58106, 248, 2608}, +}; + +static const struct itemplate instrux_COMISD[1] = { + /* 0 : COMISD xmmreg,xmmrm64 [rm: 66 0f 2f /r ] FL,SSE2,WILLAMETTE */ + /* 361 355 001(2f) 110 : FL,SSE2,WILLAMETTE */ + {I_COMISD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+69129, 391, 2610}, +}; + +static const struct itemplate instrux_CVTDQ2PD[1] = { + /* 0 : CVTDQ2PD xmmreg,xmmrm [rm: f3 0f e6 /r ] AR0-1,SQ,SSE2,WILLAMETTE */ + /* 333 355 001(e6) 110 : AR0,AR1,SQ,SSE2,WILLAMETTE */ + {I_CVTDQ2PD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69135, 385, 2611}, +}; + +static const struct itemplate instrux_CVTDQ2PS[1] = { + /* 0 : CVTDQ2PS xmmreg,xmmrm [rm: np 0f 5b /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 360 355 001(5b) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_CVTDQ2PS, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69141, 381, 2612}, +}; + +static const struct itemplate instrux_CVTPD2DQ[1] = { + /* 0 : CVTPD2DQ xmmreg,xmmrm [rm: f2 0f e6 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 332 355 001(e6) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_CVTPD2DQ, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69147, 381, 2613}, +}; + +static const struct itemplate instrux_CVTPD2PI[1] = { + /* 0 : CVTPD2PI mmxreg,xmmrm [rm: 66 0f 2d /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(2d) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_CVTPD2PI, 2, {MMXREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69153, 381, 2614}, +}; + +static const struct itemplate instrux_CVTPD2PS[1] = { + /* 0 : CVTPD2PS xmmreg,xmmrm [rm: 66 0f 5a /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(5a) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_CVTPD2PS, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69159, 381, 2615}, +}; + +static const struct itemplate instrux_CVTPI2PD[1] = { + /* 0 : CVTPI2PD xmmreg,mmxrm [rm: 66 0f 2a /r ] AR0-1,SQ,SSE2,WILLAMETTE */ + /* 361 355 001(2a) 110 : AR0,AR1,SQ,SSE2,WILLAMETTE */ + {I_CVTPI2PD, 2, {XMMREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+69165, 385, 2616}, +}; + +static const struct itemplate instrux_CVTPS2DQ[1] = { + /* 0 : CVTPS2DQ xmmreg,xmmrm [rm: 66 0f 5b /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(5b) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_CVTPS2DQ, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69171, 381, 2617}, +}; + +static const struct itemplate instrux_CVTPS2PD[1] = { + /* 0 : CVTPS2PD xmmreg,xmmrm [rm: np 0f 5a /r ] AR0-1,SQ,SSE2,WILLAMETTE */ + /* 360 355 001(5a) 110 : AR0,AR1,SQ,SSE2,WILLAMETTE */ + {I_CVTPS2PD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69177, 385, 2618}, +}; + +static const struct itemplate instrux_CVTSD2SI[2] = { + /* 0 : CVTSD2SI reg32,xmmrm64 [rm: norexw f2 0f 2d /r ] SSE2,WILLAMETTE */ + /* 317 332 355 001(2d) 110 : SSE2,WILLAMETTE */ + {I_CVTSD2SI, 2, {REG_GPR|BITS32,RM_XMM|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+58120, 248, 2619}, + /* 1 : CVTSD2SI reg64,xmmrm64 [rm: o64 f2 0f 2d /r ] LONG,PROT,SSE2,X86_64 */ + /* 324 332 355 001(2d) 110 : LONG,PROT,SSE2,X86_64 */ + {I_CVTSD2SI, 2, {REG_GPR|BITS64,RM_XMM|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+58127, 386, 2620}, +}; + +static const struct itemplate instrux_CVTSD2SS[1] = { + /* 0 : CVTSD2SS xmmreg,xmmrm64 [rm: f2 0f 5a /r ] AR0-1,SQ,SSE2,WILLAMETTE */ + /* 332 355 001(5a) 110 : AR0,AR1,SQ,SSE2,WILLAMETTE */ + {I_CVTSD2SS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+69183, 385, 2621}, +}; + +static const struct itemplate instrux_CVTSI2SD[2] = { + /* 0 : CVTSI2SD xmmreg,rm32 [rm: norexw f2 0f 2a /r ] SSE2,WILLAMETTE */ + /* 317 332 355 001(2a) 110 : SSE2,WILLAMETTE */ + {I_CVTSI2SD, 2, {XMMREG,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+58134, 248, 2622}, + /* 1 : CVTSI2SD xmmreg,rm64 [rm: o64 f2 0f 2a /r ] AR1,SX,LONG,PROT,SSE2,X86_64 */ + /* 324 332 355 001(2a) 110 : AR1,SX,LONG,PROT,SSE2,X86_64 */ + {I_CVTSI2SD, 2, {XMMREG,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+58141, 392, 2623}, +}; + +static const struct itemplate instrux_CVTSS2SD[1] = { + /* 0 : CVTSS2SD xmmreg,xmmrm [rm: f3 0f 5a /r ] AR0-1,SD,SSE2,WILLAMETTE */ + /* 333 355 001(5a) 110 : AR0,AR1,SD,SSE2,WILLAMETTE */ + {I_CVTSS2SD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69189, 384, 2624}, +}; + +static const struct itemplate instrux_CVTTPD2PI[1] = { + /* 0 : CVTTPD2PI mmxreg,xmmrm [rm: 66 0f 2c /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(2c) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_CVTTPD2PI, 2, {MMXREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69195, 381, 2625}, +}; + +static const struct itemplate instrux_CVTTPD2DQ[1] = { + /* 0 : CVTTPD2DQ xmmreg,xmmrm [rm: 66 0f e6 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(e6) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_CVTTPD2DQ, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69201, 381, 2626}, +}; + +static const struct itemplate instrux_CVTTPS2DQ[1] = { + /* 0 : CVTTPS2DQ xmmreg,xmmrm [rm: f3 0f 5b /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 333 355 001(5b) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_CVTTPS2DQ, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69207, 381, 2627}, +}; + +static const struct itemplate instrux_CVTTSD2SI[2] = { + /* 0 : CVTTSD2SI reg32,xmmrm64 [rm: norexw f2 0f 2c /r ] SSE2,WILLAMETTE */ + /* 317 332 355 001(2c) 110 : SSE2,WILLAMETTE */ + {I_CVTTSD2SI, 2, {REG_GPR|BITS32,RM_XMM|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+58148, 248, 2628}, + /* 1 : CVTTSD2SI reg64,xmmrm64 [rm: o64 f2 0f 2c /r ] LONG,PROT,SSE2,X86_64 */ + /* 324 332 355 001(2c) 110 : LONG,PROT,SSE2,X86_64 */ + {I_CVTTSD2SI, 2, {REG_GPR|BITS64,RM_XMM|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+58155, 386, 2629}, +}; + +static const struct itemplate instrux_DIVPD[1] = { + /* 0 : DIVPD xmmreg,xmmrm [rm: 66 0f 5e /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(5e) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_DIVPD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69213, 381, 2630}, +}; + +static const struct itemplate instrux_DIVSD[1] = { + /* 0 : DIVSD xmmreg,xmmrm [rm: f2 0f 5e /r ] AR0-1,SQ,SSE2,WILLAMETTE */ + /* 332 355 001(5e) 110 : AR0,AR1,SQ,SSE2,WILLAMETTE */ + {I_DIVSD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69219, 385, 2631}, +}; + +static const struct itemplate instrux_MAXPD[1] = { + /* 0 : MAXPD xmmreg,xmmrm [rm: 66 0f 5f /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(5f) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_MAXPD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69225, 381, 2632}, +}; + +static const struct itemplate instrux_MAXSD[1] = { + /* 0 : MAXSD xmmreg,xmmrm [rm: f2 0f 5f /r ] AR0-1,SQ,SSE2,WILLAMETTE */ + /* 332 355 001(5f) 110 : AR0,AR1,SQ,SSE2,WILLAMETTE */ + {I_MAXSD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69231, 385, 2633}, +}; + +static const struct itemplate instrux_MINPD[1] = { + /* 0 : MINPD xmmreg,xmmrm [rm: 66 0f 5d /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(5d) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_MINPD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69237, 381, 2634}, +}; + +static const struct itemplate instrux_MINSD[1] = { + /* 0 : MINSD xmmreg,xmmrm [rm: f2 0f 5d /r ] AR0-1,SQ,SSE2,WILLAMETTE */ + /* 332 355 001(5d) 110 : AR0,AR1,SQ,SSE2,WILLAMETTE */ + {I_MINSD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69243, 385, 2635}, +}; + +static const struct itemplate instrux_MOVAPD[2] = { + /* 0 : MOVAPD xmmreg,xmmrm128 [rm: 66 0f 28 /r ] SSE2,WILLAMETTE */ + /* 361 355 001(28) 110 : SSE2,WILLAMETTE */ + {I_MOVAPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+69249, 248, 2636}, + /* 1 : MOVAPD xmmrm128,xmmreg [mr: 66 0f 29 /r ] SSE2,WILLAMETTE */ + /* 361 355 001(29) 101 : SSE2,WILLAMETTE */ + {I_MOVAPD, 2, {RM_XMM|BITS128,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+69255, 248, 2637}, +}; + +static const struct itemplate instrux_MOVHPD[2] = { + /* 0 : MOVHPD mem64,xmmreg [mr: 66 0f 17 /r ] SSE2,WILLAMETTE */ + /* 361 355 001(17) 101 : SSE2,WILLAMETTE */ + {I_MOVHPD, 2, {MEMORY|BITS64,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+69261, 248, 2638}, + /* 1 : MOVHPD xmmreg,mem64 [rm: 66 0f 16 /r ] SSE2,WILLAMETTE */ + /* 361 355 001(16) 110 : SSE2,WILLAMETTE */ + {I_MOVHPD, 2, {XMMREG,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+69267, 248, 2639}, +}; + +static const struct itemplate instrux_MOVLPD[2] = { + /* 0 : MOVLPD mem64,xmmreg [mr: 66 0f 13 /r ] SSE2,WILLAMETTE */ + /* 361 355 001(13) 101 : SSE2,WILLAMETTE */ + {I_MOVLPD, 2, {MEMORY|BITS64,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+69273, 248, 2640}, + /* 1 : MOVLPD xmmreg,mem64 [rm: 66 0f 12 /r ] SSE2,WILLAMETTE */ + /* 361 355 001(12) 110 : SSE2,WILLAMETTE */ + {I_MOVLPD, 2, {XMMREG,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+69279, 248, 2641}, +}; + +static const struct itemplate instrux_MOVMSKPD[2] = { + /* 0 : MOVMSKPD reg32,xmmreg [rm: 66 0f 50 /r ] SSE2,WILLAMETTE */ + /* 361 355 001(50) 110 : SSE2,WILLAMETTE */ + {I_MOVMSKPD, 2, {REG_GPR|BITS32,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+69285, 248, 2642}, + /* 1 : MOVMSKPD reg64,xmmreg [rm: 66 o64 0f 50 /r ] LONG,PROT,SSE2,X86_64 */ + /* 361 324 355 001(50) 110 : LONG,PROT,SSE2,X86_64 */ + {I_MOVMSKPD, 2, {REG_GPR|BITS64,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+58162, 386, 2643}, +}; + +static const struct itemplate instrux_MOVUPD[2] = { + /* 0 : MOVUPD xmmreg,xmmrm128 [rm: 66 0f 10 /r ] SSE2,WILLAMETTE */ + /* 361 355 001(10) 110 : SSE2,WILLAMETTE */ + {I_MOVUPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+69303, 248, 2646}, + /* 1 : MOVUPD xmmrm128,xmmreg [mr: 66 0f 11 /r ] SSE2,WILLAMETTE */ + /* 361 355 001(11) 101 : SSE2,WILLAMETTE */ + {I_MOVUPD, 2, {RM_XMM|BITS128,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+69309, 248, 2647}, +}; + +static const struct itemplate instrux_MULPD[1] = { + /* 0 : MULPD xmmreg,xmmrm128 [rm: 66 0f 59 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(59) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_MULPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+69315, 381, 2648}, +}; + +static const struct itemplate instrux_MULSD[1] = { + /* 0 : MULSD xmmreg,xmmrm64 [rm: f2 0f 59 /r ] AR0-1,SQ,SSE2,WILLAMETTE */ + /* 332 355 001(59) 110 : AR0,AR1,SQ,SSE2,WILLAMETTE */ + {I_MULSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+69321, 385, 2649}, +}; + +static const struct itemplate instrux_ORPD[1] = { + /* 0 : ORPD xmmreg,xmmrm128 [rm: 66 0f 56 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(56) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_ORPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+69327, 381, 2650}, +}; + +static const struct itemplate instrux_SHUFPD[1] = { + /* 0 : SHUFPD xmmreg,xmmrm128,imm8 [rmi: 66 0f c6 /r ib,u ] SSE2,WILLAMETTE */ + /* 361 355 001(c6) 110 026 : SSE2,WILLAMETTE */ + {I_SHUFPD, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+58169, 248, 2651}, +}; + +static const struct itemplate instrux_SQRTPD[1] = { + /* 0 : SQRTPD xmmreg,xmmrm128 [rm: 66 0f 51 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(51) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_SQRTPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+69333, 381, 2652}, +}; + +static const struct itemplate instrux_SQRTSD[1] = { + /* 0 : SQRTSD xmmreg,xmmrm64 [rm: f2 0f 51 /r ] SSE2,WILLAMETTE */ + /* 332 355 001(51) 110 : SSE2,WILLAMETTE */ + {I_SQRTSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+69339, 248, 2653}, +}; + +static const struct itemplate instrux_SUBPD[1] = { + /* 0 : SUBPD xmmreg,xmmrm128 [rm: 66 0f 5c /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(5c) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_SUBPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+69345, 381, 2654}, +}; + +static const struct itemplate instrux_SUBSD[1] = { + /* 0 : SUBSD xmmreg,xmmrm64 [rm: f2 0f 5c /r ] SSE2,WILLAMETTE */ + /* 332 355 001(5c) 110 : SSE2,WILLAMETTE */ + {I_SUBSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+69351, 248, 2655}, +}; + +static const struct itemplate instrux_UCOMISD[1] = { + /* 0 : UCOMISD xmmreg,xmmrm64 [rm: 66 0f 2e /r ] FL,SSE2,WILLAMETTE */ + /* 361 355 001(2e) 110 : FL,SSE2,WILLAMETTE */ + {I_UCOMISD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+69357, 391, 2656}, +}; + +static const struct itemplate instrux_UNPCKHPD[1] = { + /* 0 : UNPCKHPD xmmreg,xmmrm128 [rm: 66 0f 15 /r ] SSE2,WILLAMETTE */ + /* 361 355 001(15) 110 : SSE2,WILLAMETTE */ + {I_UNPCKHPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+69363, 248, 2657}, +}; + +static const struct itemplate instrux_UNPCKLPD[1] = { + /* 0 : UNPCKLPD xmmreg,xmmrm128 [rm: 66 0f 14 /r ] SSE2,WILLAMETTE */ + /* 361 355 001(14) 110 : SSE2,WILLAMETTE */ + {I_UNPCKLPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+69369, 248, 2658}, +}; + +static const struct itemplate instrux_XORPD[1] = { + /* 0 : XORPD xmmreg,xmmrm128 [rm: 66 0f 57 /r ] SSE2,WILLAMETTE */ + /* 361 355 001(57) 110 : SSE2,WILLAMETTE */ + {I_XORPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+69375, 248, 2659}, +}; + +static const struct itemplate instrux_ADDSUBPD[1] = { + /* 0 : ADDSUBPD xmmreg,xmmrm128 [rm: 66 0f d0 /r ] AR0-1,SO,SSE3,PRESCOTT */ + /* 361 355 001(d0) 110 : AR0,AR1,SO,SSE3,PRESCOTT */ + {I_ADDSUBPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+69381, 393, 2662}, +}; + +static const struct itemplate instrux_ADDSUBPS[1] = { + /* 0 : ADDSUBPS xmmreg,xmmrm128 [rm: f2 0f d0 /r ] AR0-1,SO,SSE3,PRESCOTT */ + /* 332 355 001(d0) 110 : AR0,AR1,SO,SSE3,PRESCOTT */ + {I_ADDSUBPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+69387, 393, 2663}, +}; + +static const struct itemplate instrux_HADDPD[1] = { + /* 0 : HADDPD xmmreg,xmmrm128 [rm: 66 0f 7c /r ] AR0-1,SO,SSE3,PRESCOTT */ + /* 361 355 001(7c) 110 : AR0,AR1,SO,SSE3,PRESCOTT */ + {I_HADDPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+69393, 393, 2664}, +}; + +static const struct itemplate instrux_HADDPS[1] = { + /* 0 : HADDPS xmmreg,xmmrm128 [rm: f2 0f 7c /r ] AR0-1,SO,SSE3,PRESCOTT */ + /* 332 355 001(7c) 110 : AR0,AR1,SO,SSE3,PRESCOTT */ + {I_HADDPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+69399, 393, 2665}, +}; + +static const struct itemplate instrux_HSUBPD[1] = { + /* 0 : HSUBPD xmmreg,xmmrm128 [rm: 66 0f 7d /r ] AR0-1,SO,SSE3,PRESCOTT */ + /* 361 355 001(7d) 110 : AR0,AR1,SO,SSE3,PRESCOTT */ + {I_HSUBPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+69405, 393, 2666}, +}; + +static const struct itemplate instrux_HSUBPS[1] = { + /* 0 : HSUBPS xmmreg,xmmrm128 [rm: f2 0f 7d /r ] AR0-1,SO,SSE3,PRESCOTT */ + /* 332 355 001(7d) 110 : AR0,AR1,SO,SSE3,PRESCOTT */ + {I_HSUBPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+69411, 393, 2667}, +}; + +static const struct itemplate instrux_LDDQU[1] = { + /* 0 : LDDQU xmmreg,mem128 [rm: f2 0f f0 /r ] AR0-1,SO,SSE3,PRESCOTT */ + /* 332 355 001(f0) 110 : AR0,AR1,SO,SSE3,PRESCOTT */ + {I_LDDQU, 2, {XMMREG,MEMORY|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+69417, 393, 2668}, +}; + +static const struct itemplate instrux_MOVDDUP[1] = { + /* 0 : MOVDDUP xmmreg,xmmrm64 [rm: f2 0f 12 /r ] AR0-1,SQ,SSE3,PRESCOTT */ + /* 332 355 001(12) 110 : AR0,AR1,SQ,SSE3,PRESCOTT */ + {I_MOVDDUP, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+69423, 394, 2669}, +}; + +static const struct itemplate instrux_MOVSHDUP[1] = { + /* 0 : MOVSHDUP xmmreg,xmmrm128 [rm: f3 0f 16 /r ] SSE3,PRESCOTT */ + /* 333 355 001(16) 110 : SSE3,PRESCOTT */ + {I_MOVSHDUP, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+69429, 395, 2670}, +}; + +static const struct itemplate instrux_MOVSLDUP[1] = { + /* 0 : MOVSLDUP xmmreg,xmmrm128 [rm: f3 0f 12 /r ] SSE3,PRESCOTT */ + /* 333 355 001(12) 110 : SSE3,PRESCOTT */ + {I_MOVSLDUP, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+69435, 395, 2671}, +}; + +static const struct itemplate instrux_CLGI[1] = { + /* 0 : CLGI void [ 0f 01 dd ] VMX,FUTURE,AMD */ + /* 355 002(01 dd) : VMX,FUTURE,AMD */ + {I_CLGI, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72464, 396, 2674}, +}; + +static const struct itemplate instrux_STGI[1] = { + /* 0 : STGI void [ 0f 01 dc ] VMX,FUTURE,AMD */ + /* 355 002(01 dc) : VMX,FUTURE,AMD */ + {I_STGI, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72469, 396, 2675}, +}; + +static const struct itemplate instrux_VMCALL[1] = { + /* 0 : VMCALL void [ 0f 01 c1 ] VMX,FUTURE */ + /* 355 002(01 c1) : VMX,FUTURE */ + {I_VMCALL, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+69478, 397, 2676}, +}; + +static const struct itemplate instrux_VMCLEAR[1] = { + /* 0 : VMCLEAR mem [m: 66 0f c7 /6 ] VMX,FUTURE */ + /* 361 355 001(c7) 206 : VMX,FUTURE */ + {I_VMCLEAR, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+69441, 397, 2677}, +}; + +static const struct itemplate instrux_VMFUNC[1] = { + /* 0 : VMFUNC void [ 0f 01 d4 ] VMX,FUTURE */ + /* 355 002(01 d4) : VMX,FUTURE */ + {I_VMFUNC, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72474, 397, 2678}, +}; + +static const struct itemplate instrux_VMLAUNCH[1] = { + /* 0 : VMLAUNCH void [ 0f 01 c2 ] VMX,FUTURE */ + /* 355 002(01 c2) : VMX,FUTURE */ + {I_VMLAUNCH, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72479, 397, 2679}, +}; + +static const struct itemplate instrux_VMLOAD[1] = { + /* 0 : VMLOAD void [ 0f 01 da ] VMX,FUTURE,AMD */ + /* 355 002(01 da) : VMX,FUTURE,AMD */ + {I_VMLOAD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72484, 396, 2680}, +}; + +static const struct itemplate instrux_VMMCALL[1] = { + /* 0 : VMMCALL void [ 0f 01 d9 ] VMX,FUTURE,AMD */ + /* 355 002(01 d9) : VMX,FUTURE,AMD */ + {I_VMMCALL, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72489, 396, 2681}, +}; + +static const struct itemplate instrux_VMPTRLD[1] = { + /* 0 : VMPTRLD mem [m: np 0f c7 /6 ] VMX,FUTURE */ + /* 360 355 001(c7) 206 : VMX,FUTURE */ + {I_VMPTRLD, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+69447, 397, 2682}, +}; + +static const struct itemplate instrux_VMPTRST[1] = { + /* 0 : VMPTRST mem [m: np 0f c7 /7 ] VMX,FUTURE */ + /* 360 355 001(c7) 207 : VMX,FUTURE */ + {I_VMPTRST, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+69453, 397, 2683}, +}; + +static const struct itemplate instrux_VMREAD[2] = { + /* 0 : VMREAD rm32,reg32 [mr: np 0f 78 /r ] AR0-1,SD,NOREX,NOAPX,NOLONG,VMX,FUTURE */ + /* 360 355 001(78) 101 : AR0,AR1,SD,NOREX,NOAPX,NOLONG,VMX,FUTURE */ + {I_VMREAD, 2, {RM_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58177, 398, 2684}, + /* 1 : VMREAD rm64,reg64 [mr: o64nw np 0f 78 /r ] AR0-1,SQ,LONG,PROT,VMX,X86_64 */ + /* 323 360 355 001(78) 101 : AR0,AR1,SQ,NWSIZE,LONG,PROT,VMX,X86_64 */ + {I_VMREAD, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+58176, 399, 2685}, +}; + +static const struct itemplate instrux_VMRESUME[1] = { + /* 0 : VMRESUME void [ 0f 01 c3 ] VMX,FUTURE */ + /* 355 002(01 c3) : VMX,FUTURE */ + {I_VMRESUME, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72494, 397, 2686}, +}; + +static const struct itemplate instrux_VMRUN[1] = { + /* 0 : VMRUN void [ 0f 01 d8 ] VMX,FUTURE,AMD */ + /* 355 002(01 d8) : VMX,FUTURE,AMD */ + {I_VMRUN, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72499, 396, 2687}, +}; + +static const struct itemplate instrux_VMSAVE[1] = { + /* 0 : VMSAVE void [ 0f 01 db ] VMX,FUTURE,AMD */ + /* 355 002(01 db) : VMX,FUTURE,AMD */ + {I_VMSAVE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72504, 396, 2688}, +}; + +static const struct itemplate instrux_VMWRITE[2] = { + /* 0 : VMWRITE reg32,rm32 [rm: np 0f 79 /r ] AR0-1,SD,NOREX,NOAPX,NOLONG,VMX,FUTURE */ + /* 360 355 001(79) 110 : AR0,AR1,SD,NOREX,NOAPX,NOLONG,VMX,FUTURE */ + {I_VMWRITE, 2, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58184, 398, 2689}, + /* 1 : VMWRITE reg64,rm64 [rm: o64nw np 0f 79 /r ] AR0-1,SQ,LONG,PROT,VMX,X86_64 */ + /* 323 360 355 001(79) 110 : AR0,AR1,SQ,NWSIZE,LONG,PROT,VMX,X86_64 */ + {I_VMWRITE, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+58183, 399, 2690}, +}; + +static const struct itemplate instrux_VMXOFF[1] = { + /* 0 : VMXOFF void [ 0f 01 c4 ] VMX,FUTURE */ + /* 355 002(01 c4) : VMX,FUTURE */ + {I_VMXOFF, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72509, 397, 2691}, +}; + +static const struct itemplate instrux_VMXON[1] = { + /* 0 : VMXON mem [m: f3 0f c7 /6 ] VMX,FUTURE */ + /* 333 355 001(c7) 206 : VMX,FUTURE */ + {I_VMXON, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+66374, 397, 2692}, +}; + +static const struct itemplate instrux_INVEPT[3] = { + /* 0 : INVEPT reg32,mem [rm: 66 0f38 80 /r ] AR0-1,SO,NOREX,NOAPX,NOLONG,VMX,FUTURE */ + /* 361 356 001(80) 110 : AR0,AR1,SO,NOREX,NOAPX,NOLONG,VMX,FUTURE */ + {I_INVEPT, 2, {REG_GPR|BITS32|RN_L16,MEMORY|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58191, 400, 2694}, + /* 1 : INVEPT reg64,mem [rm: o64nw 66 0f38 80 /r ] AR0-1,SO,LONG,PROT,VMX,X86_64 */ + /* 323 361 356 001(80) 110 : AR0,AR1,SO,NWSIZE,NOAPX,LONG,PROT,VMX,X86_64 */ + {I_INVEPT, 2, {REG_GPR|BITS64|RN_L16,MEMORY|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58190, 401, 2695}, + /* 2 : INVEPT reg64,mem128 [rm: evex.nf0.nd0.l0.f3.m4.w1 f0 /r ] AR0-1,SO,LONG,PROT,VMX,APX,X86_64 */ + /* 250(f4 fe 08) 300 001(f0) 110 : AR0,AR1,SO,LONG,EVEX,PROT,VMX,APX,X86_64 */ + {I_INVEPT, 2, {REG_GPR|BITS64,MEMORY|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+25717, 402, 2696}, +}; + +static const struct itemplate instrux_INVVPID[3] = { + /* 0 : INVVPID reg32,mem [rm: 66 0f38 81 /r ] AR0-1,SO,NOREX,NOAPX,NOLONG,VMX,FUTURE */ + /* 361 356 001(81) 110 : AR0,AR1,SO,NOREX,NOAPX,NOLONG,VMX,FUTURE */ + {I_INVVPID, 2, {REG_GPR|BITS32|RN_L16,MEMORY|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58198, 400, 2697}, + /* 1 : INVVPID reg64,mem [rm: o64nw 66 0f38 81 /r ] AR0-1,SO,LONG,PROT,VMX,X86_64 */ + /* 323 361 356 001(81) 110 : AR0,AR1,SO,NWSIZE,NOAPX,LONG,PROT,VMX,X86_64 */ + {I_INVVPID, 2, {REG_GPR|BITS64|RN_L16,MEMORY|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58197, 401, 2698}, + /* 2 : INVVPID reg64,mem128 [rm: evex.nf0.nd0.l0.f3.m4.w1 f1 /r ] AR0-1,SO,LONG,PROT,VMX,APX,X86_64 */ + /* 250(f4 fe 08) 300 001(f1) 110 : AR0,AR1,SO,LONG,EVEX,PROT,VMX,APX,X86_64 */ + {I_INVVPID, 2, {REG_GPR|BITS64,MEMORY|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+25726, 402, 2699}, +}; + +static const struct itemplate instrux_PVALIDATE[1] = { + /* 0 : PVALIDATE void [ f2 0f 01 ff ] VMX,FUTURE,AMD */ + /* 332 355 002(01 ff) : VMX,FUTURE,AMD */ + {I_PVALIDATE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+69459, 396, 2701}, +}; + +static const struct itemplate instrux_RMPADJUST[1] = { + /* 0 : RMPADJUST void [ f3 0f 01 fe ] VMX,FUTURE,AMD */ + /* 333 355 002(01 fe) : VMX,FUTURE,AMD */ + {I_RMPADJUST, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+69465, 396, 2702}, +}; + +static const struct itemplate instrux_VMGEXIT[2] = { + /* 0 : VMGEXIT void [ f2 0f 01 c1 ] VMX,FUTURE,AMD */ + /* 332 355 002(01 c1) : VMX,FUTURE,AMD */ + {I_VMGEXIT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+69471, 396, 2703}, + /* 1 : VMGEXIT void [ f3 0f 01 c1 ] VMX,FUTURE,AMD */ + /* 333 355 002(01 c1) : VMX,FUTURE,AMD */ + {I_VMGEXIT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+69477, 396, 2704}, +}; + +static const struct itemplate instrux_PABSB[2] = { + /* 0 : PABSB mmxreg,mmxrm [rm: np 0f38 1c /r ] AR0-1,SQ,MMX,SSSE3,FUTURE */ + /* 360 356 001(1c) 110 : AR0,AR1,SQ,NOAPX,MMX,SSSE3,FUTURE */ + {I_PABSB, 2, {MMXREG|RN_L16,RM_MMX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69483, 403, 2707}, + /* 1 : PABSB xmmreg,xmmrm128 [rm: 66 0f38 1c /r ] SSSE3,FUTURE */ + /* 361 356 001(1c) 110 : NOAPX,SSSE3,FUTURE */ + {I_PABSB, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69489, 404, 2708}, +}; + +static const struct itemplate instrux_PABSW[2] = { + /* 0 : PABSW mmxreg,mmxrm [rm: np 0f38 1d /r ] AR0-1,SQ,MMX,SSSE3,FUTURE */ + /* 360 356 001(1d) 110 : AR0,AR1,SQ,NOAPX,MMX,SSSE3,FUTURE */ + {I_PABSW, 2, {MMXREG|RN_L16,RM_MMX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69495, 403, 2709}, + /* 1 : PABSW xmmreg,xmmrm128 [rm: 66 0f38 1d /r ] SSSE3,FUTURE */ + /* 361 356 001(1d) 110 : NOAPX,SSSE3,FUTURE */ + {I_PABSW, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69501, 404, 2710}, +}; + +static const struct itemplate instrux_PABSD[2] = { + /* 0 : PABSD mmxreg,mmxrm [rm: np 0f38 1e /r ] AR0-1,SQ,MMX,SSSE3,FUTURE */ + /* 360 356 001(1e) 110 : AR0,AR1,SQ,NOAPX,MMX,SSSE3,FUTURE */ + {I_PABSD, 2, {MMXREG|RN_L16,RM_MMX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69507, 403, 2711}, + /* 1 : PABSD xmmreg,xmmrm128 [rm: 66 0f38 1e /r ] SSSE3,FUTURE */ + /* 361 356 001(1e) 110 : NOAPX,SSSE3,FUTURE */ + {I_PABSD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69513, 404, 2712}, +}; + +static const struct itemplate instrux_PALIGNR[2] = { + /* 0 : PALIGNR mmxreg,mmxrm,imm [rmi: np 0f3a 0f /r ib,u ] AR0-2,SQ,MMX,SSSE3,FUTURE */ + /* 360 357 001(0f) 110 026 : AR0,AR1,AR2,SQ,NOAPX,MMX,SSSE3,FUTURE */ + {I_PALIGNR, 3, {MMXREG|RN_L16,RM_MMX|RN_L16,IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+58204, 405, 2713}, + /* 1 : PALIGNR xmmreg,xmmrm,imm [rmi: 66 0f3a 0f /r ib,u ] SSSE3,FUTURE */ + /* 361 357 001(0f) 110 026 : NOAPX,SSSE3,FUTURE */ + {I_PALIGNR, 3, {XMMREG|RN_L16,RM_XMM|RN_L16,IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+58211, 404, 2714}, +}; + +static const struct itemplate instrux_PHADDW[2] = { + /* 0 : PHADDW mmxreg,mmxrm [rm: np 0f38 01 /r ] AR0-1,SQ,MMX,SSSE3,FUTURE */ + /* 360 356 001(01) 110 : AR0,AR1,SQ,NOAPX,MMX,SSSE3,FUTURE */ + {I_PHADDW, 2, {MMXREG|RN_L16,RM_MMX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69519, 403, 2715}, + /* 1 : PHADDW xmmreg,xmmrm128 [rm: 66 0f38 01 /r ] SSSE3,FUTURE */ + /* 361 356 001(01) 110 : NOAPX,SSSE3,FUTURE */ + {I_PHADDW, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69525, 404, 2716}, +}; + +static const struct itemplate instrux_PHADDD[2] = { + /* 0 : PHADDD mmxreg,mmxrm [rm: np 0f38 02 /r ] AR0-1,SQ,MMX,SSSE3,FUTURE */ + /* 360 356 001(02) 110 : AR0,AR1,SQ,NOAPX,MMX,SSSE3,FUTURE */ + {I_PHADDD, 2, {MMXREG|RN_L16,RM_MMX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69531, 403, 2717}, + /* 1 : PHADDD xmmreg,xmmrm128 [rm: 66 0f38 02 /r ] SSSE3,FUTURE */ + /* 361 356 001(02) 110 : NOAPX,SSSE3,FUTURE */ + {I_PHADDD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69537, 404, 2718}, +}; + +static const struct itemplate instrux_PHADDSW[2] = { + /* 0 : PHADDSW mmxreg,mmxrm [rm: np 0f38 03 /r ] AR0-1,SQ,MMX,SSSE3,FUTURE */ + /* 360 356 001(03) 110 : AR0,AR1,SQ,NOAPX,MMX,SSSE3,FUTURE */ + {I_PHADDSW, 2, {MMXREG|RN_L16,RM_MMX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69543, 403, 2719}, + /* 1 : PHADDSW xmmreg,xmmrm128 [rm: 66 0f38 03 /r ] SSSE3,FUTURE */ + /* 361 356 001(03) 110 : NOAPX,SSSE3,FUTURE */ + {I_PHADDSW, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69549, 404, 2720}, +}; + +static const struct itemplate instrux_PHSUBW[2] = { + /* 0 : PHSUBW mmxreg,mmxrm [rm: np 0f38 05 /r ] AR0-1,SQ,MMX,SSSE3,FUTURE */ + /* 360 356 001(05) 110 : AR0,AR1,SQ,NOAPX,MMX,SSSE3,FUTURE */ + {I_PHSUBW, 2, {MMXREG|RN_L16,RM_MMX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69555, 403, 2721}, + /* 1 : PHSUBW xmmreg,xmmrm128 [rm: 66 0f38 05 /r ] SSSE3,FUTURE */ + /* 361 356 001(05) 110 : NOAPX,SSSE3,FUTURE */ + {I_PHSUBW, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69561, 404, 2722}, +}; + +static const struct itemplate instrux_PHSUBD[2] = { + /* 0 : PHSUBD mmxreg,mmxrm [rm: np 0f38 06 /r ] AR0-1,SQ,MMX,SSSE3,FUTURE */ + /* 360 356 001(06) 110 : AR0,AR1,SQ,NOAPX,MMX,SSSE3,FUTURE */ + {I_PHSUBD, 2, {MMXREG|RN_L16,RM_MMX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69567, 403, 2723}, + /* 1 : PHSUBD xmmreg,xmmrm128 [rm: 66 0f38 06 /r ] SSSE3,FUTURE */ + /* 361 356 001(06) 110 : NOAPX,SSSE3,FUTURE */ + {I_PHSUBD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69573, 404, 2724}, +}; + +static const struct itemplate instrux_PHSUBSW[2] = { + /* 0 : PHSUBSW mmxreg,mmxrm [rm: np 0f38 07 /r ] AR0-1,SQ,MMX,SSSE3,FUTURE */ + /* 360 356 001(07) 110 : AR0,AR1,SQ,NOAPX,MMX,SSSE3,FUTURE */ + {I_PHSUBSW, 2, {MMXREG|RN_L16,RM_MMX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69579, 403, 2725}, + /* 1 : PHSUBSW xmmreg,xmmrm128 [rm: 66 0f38 07 /r ] SSSE3,FUTURE */ + /* 361 356 001(07) 110 : NOAPX,SSSE3,FUTURE */ + {I_PHSUBSW, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69585, 404, 2726}, +}; + +static const struct itemplate instrux_PMADDUBSW[2] = { + /* 0 : PMADDUBSW mmxreg,mmxrm [rm: np 0f38 04 /r ] AR0-1,SQ,MMX,SSSE3,FUTURE */ + /* 360 356 001(04) 110 : AR0,AR1,SQ,NOAPX,MMX,SSSE3,FUTURE */ + {I_PMADDUBSW, 2, {MMXREG|RN_L16,RM_MMX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69591, 403, 2727}, + /* 1 : PMADDUBSW xmmreg,xmmrm128 [rm: 66 0f38 04 /r ] SSSE3,FUTURE */ + /* 361 356 001(04) 110 : NOAPX,SSSE3,FUTURE */ + {I_PMADDUBSW, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69597, 404, 2728}, +}; + +static const struct itemplate instrux_PMULHRSW[2] = { + /* 0 : PMULHRSW mmxreg,mmxrm [rm: np 0f38 0b /r ] AR0-1,SQ,MMX,SSSE3,FUTURE */ + /* 360 356 001(0b) 110 : AR0,AR1,SQ,NOAPX,MMX,SSSE3,FUTURE */ + {I_PMULHRSW, 2, {MMXREG|RN_L16,RM_MMX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69603, 403, 2729}, + /* 1 : PMULHRSW xmmreg,xmmrm128 [rm: 66 0f38 0b /r ] SSSE3,FUTURE */ + /* 361 356 001(0b) 110 : NOAPX,SSSE3,FUTURE */ + {I_PMULHRSW, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69609, 404, 2730}, +}; + +static const struct itemplate instrux_PSHUFB[2] = { + /* 0 : PSHUFB mmxreg,mmxrm [rm: np 0f38 00 /r ] AR0-1,SQ,MMX,SSSE3,FUTURE */ + /* 360 356 001(00) 110 : AR0,AR1,SQ,NOAPX,MMX,SSSE3,FUTURE */ + {I_PSHUFB, 2, {MMXREG|RN_L16,RM_MMX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69615, 403, 2731}, + /* 1 : PSHUFB xmmreg,xmmrm128 [rm: 66 0f38 00 /r ] SSSE3,FUTURE */ + /* 361 356 001(00) 110 : NOAPX,SSSE3,FUTURE */ + {I_PSHUFB, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69621, 404, 2732}, +}; + +static const struct itemplate instrux_PSIGNB[2] = { + /* 0 : PSIGNB mmxreg,mmxrm [rm: np 0f38 08 /r ] AR0-1,SQ,MMX,SSSE3,FUTURE */ + /* 360 356 001(08) 110 : AR0,AR1,SQ,NOAPX,MMX,SSSE3,FUTURE */ + {I_PSIGNB, 2, {MMXREG|RN_L16,RM_MMX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69627, 403, 2733}, + /* 1 : PSIGNB xmmreg,xmmrm128 [rm: 66 0f38 08 /r ] SSSE3,FUTURE */ + /* 361 356 001(08) 110 : NOAPX,SSSE3,FUTURE */ + {I_PSIGNB, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69633, 404, 2734}, +}; + +static const struct itemplate instrux_PSIGNW[2] = { + /* 0 : PSIGNW mmxreg,mmxrm [rm: np 0f38 09 /r ] AR0-1,SQ,MMX,SSSE3,FUTURE */ + /* 360 356 001(09) 110 : AR0,AR1,SQ,NOAPX,MMX,SSSE3,FUTURE */ + {I_PSIGNW, 2, {MMXREG|RN_L16,RM_MMX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69639, 403, 2735}, + /* 1 : PSIGNW xmmreg,xmmrm128 [rm: 66 0f38 09 /r ] SSSE3,FUTURE */ + /* 361 356 001(09) 110 : NOAPX,SSSE3,FUTURE */ + {I_PSIGNW, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69645, 404, 2736}, +}; + +static const struct itemplate instrux_PSIGND[2] = { + /* 0 : PSIGND mmxreg,mmxrm [rm: np 0f38 0a /r ] AR0-1,SQ,MMX,SSSE3,FUTURE */ + /* 360 356 001(0a) 110 : AR0,AR1,SQ,NOAPX,MMX,SSSE3,FUTURE */ + {I_PSIGND, 2, {MMXREG|RN_L16,RM_MMX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69651, 403, 2737}, + /* 1 : PSIGND xmmreg,xmmrm128 [rm: 66 0f38 0a /r ] SSSE3,FUTURE */ + /* 361 356 001(0a) 110 : NOAPX,SSSE3,FUTURE */ + {I_PSIGND, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69657, 404, 2738}, +}; + +static const struct itemplate instrux_EXTRQ[2] = { + /* 0 : EXTRQ xmmreg,imm,imm [mij: 66 0f 78 /0 ib,u ib,u ] SSE4A,FUTURE,AMD */ + /* 361 355 001(78) 200 025 026 : SSE4A,FUTURE,AMD */ + {I_EXTRQ, 3, {XMMREG,IMM_NORMAL,IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+51659, 406, 2741}, + /* 1 : EXTRQ xmmreg,xmmreg [rm: 66 0f 79 /r ] SSE4A,FUTURE,AMD */ + /* 361 355 001(79) 110 : SSE4A,FUTURE,AMD */ + {I_EXTRQ, 2, {XMMREG,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+69663, 406, 2742}, +}; + +static const struct itemplate instrux_INSERTQ[2] = { + /* 0 : INSERTQ xmmreg,xmmreg,imm,imm [rmij: f2 0f 78 /r ib,u ib,u ] SSE4A,FUTURE,AMD */ + /* 332 355 001(78) 110 026 027 : SSE4A,FUTURE,AMD */ + {I_INSERTQ, 4, {XMMREG,XMMREG,IMM_NORMAL,IMM_NORMAL,0}, NO_DECORATOR, nasm_bytecodes+51667, 406, 2743}, + /* 1 : INSERTQ xmmreg,xmmreg [rm: f2 0f 79 /r ] SSE4A,FUTURE,AMD */ + /* 332 355 001(79) 110 : SSE4A,FUTURE,AMD */ + {I_INSERTQ, 2, {XMMREG,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+69669, 406, 2744}, +}; + +static const struct itemplate instrux_MOVNTSD[1] = { + /* 0 : MOVNTSD mem64,xmmreg [mr: f2 0f 2b /r ] AR0-1,SQ,SSE4A,FUTURE,AMD */ + /* 332 355 001(2b) 101 : AR0,AR1,SQ,SSE4A,FUTURE,AMD */ + {I_MOVNTSD, 2, {MEMORY|BITS64,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+69675, 407, 2745}, +}; + +static const struct itemplate instrux_MOVNTSS[1] = { + /* 0 : MOVNTSS mem32,xmmreg [mr: f3 0f 2b /r ] AR0-1,SD,SSE4A,FUTURE,AMD */ + /* 333 355 001(2b) 101 : AR0,AR1,SD,SSE4A,FUTURE,AMD */ + {I_MOVNTSS, 2, {MEMORY|BITS32,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+69681, 408, 2746}, +}; + +static const struct itemplate instrux_BLENDPD[1] = { + /* 0 : BLENDPD xmmreg,xmmrm128,imm8 [rmi: 66 0f3a 0d /r ib,u ] SSE41,FUTURE */ + /* 361 357 001(0d) 110 026 : NOAPX,SSE41,FUTURE */ + {I_BLENDPD, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+58218, 409, 2751}, +}; + +static const struct itemplate instrux_BLENDPS[1] = { + /* 0 : BLENDPS xmmreg,xmmrm128,imm8 [rmi: 66 0f3a 0c /r ib,u ] SSE41,FUTURE */ + /* 361 357 001(0c) 110 026 : NOAPX,SSE41,FUTURE */ + {I_BLENDPS, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+58225, 409, 2752}, +}; + +static const struct itemplate instrux_BLENDVPD[2] = { + /* 0 : BLENDVPD xmmreg,xmmrm128,xmm0 [rm-: 66 0f38 15 /r ] SSE41,FUTURE */ + /* 361 356 001(15) 110 : NOAPX,SSE41,FUTURE */ + {I_BLENDVPD, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_ZERO|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+69687, 409, 2753}, + /* 1 : BLENDVPD xmmreg,xmmrm128 [rm: 66 0f38 15 /r ] SSE41,FUTURE */ + /* 361 356 001(15) 110 : NOAPX,SSE41,FUTURE */ + {I_BLENDVPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69687, 409, 2754}, +}; + +static const struct itemplate instrux_BLENDVPS[2] = { + /* 0 : BLENDVPS xmmreg,xmmrm128,xmm0 [rm-: 66 0f38 14 /r ] SSE41,FUTURE */ + /* 361 356 001(14) 110 : NOAPX,SSE41,FUTURE */ + {I_BLENDVPS, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_ZERO|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+69693, 409, 2755}, + /* 1 : BLENDVPS xmmreg,xmmrm128 [rm: 66 0f38 14 /r ] SSE41,FUTURE */ + /* 361 356 001(14) 110 : NOAPX,SSE41,FUTURE */ + {I_BLENDVPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69693, 409, 2756}, +}; + +static const struct itemplate instrux_DPPD[1] = { + /* 0 : DPPD xmmreg,xmmrm128,imm8 [rmi: 66 0f3a 41 /r ib,u ] SSE41,FUTURE */ + /* 361 357 001(41) 110 026 : NOAPX,SSE41,FUTURE */ + {I_DPPD, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+58232, 409, 2757}, +}; + +static const struct itemplate instrux_DPPS[1] = { + /* 0 : DPPS xmmreg,xmmrm128,imm8 [rmi: 66 0f3a 40 /r ib,u ] SSE41,FUTURE */ + /* 361 357 001(40) 110 026 : NOAPX,SSE41,FUTURE */ + {I_DPPS, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+58239, 409, 2758}, +}; + +static const struct itemplate instrux_EXTRACTPS[2] = { + /* 0 : EXTRACTPS rm32,xmmreg,imm8 [mri: 66 0f3a 17 /r ib,u ] SSE41,FUTURE */ + /* 361 357 001(17) 101 026 : NOAPX,SSE41,FUTURE */ + {I_EXTRACTPS, 3, {RM_GPR|BITS32|RN_L16,XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+51676, 409, 2759}, + /* 1 : EXTRACTPS reg64,xmmreg,imm8 [mri: o64 66 0f3a 17 /r ib,u ] LONG,PROT,SSE41,X86_64 */ + /* 324 361 357 001(17) 101 026 : NOAPX,LONG,PROT,SSE41,X86_64 */ + {I_EXTRACTPS, 3, {REG_GPR|BITS64|RN_L16,XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+51675, 410, 2760}, +}; + +static const struct itemplate instrux_INSERTPS[1] = { + /* 0 : INSERTPS xmmreg,xmmrm32,imm8 [rmi: 66 0f3a 21 /r ib,u ] SSE41,FUTURE */ + /* 361 357 001(21) 110 026 : NOAPX,SSE41,FUTURE */ + {I_INSERTPS, 3, {XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+58246, 409, 2761}, +}; + +static const struct itemplate instrux_MOVNTDQA[1] = { + /* 0 : MOVNTDQA xmmreg,mem128 [rm: 66 0f38 2a /r ] SSE41,FUTURE */ + /* 361 356 001(2a) 110 : NOAPX,SSE41,FUTURE */ + {I_MOVNTDQA, 2, {XMMREG|RN_L16,MEMORY|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69699, 409, 2762}, +}; + +static const struct itemplate instrux_MPSADBW[1] = { + /* 0 : MPSADBW xmmreg,xmmrm128,imm8 [rmi: 66 0f3a 42 /r ib,u ] SSE41,FUTURE */ + /* 361 357 001(42) 110 026 : NOAPX,SSE41,FUTURE */ + {I_MPSADBW, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+58253, 409, 2763}, +}; + +static const struct itemplate instrux_PACKUSDW[1] = { + /* 0 : PACKUSDW xmmreg,xmmrm128 [rm: 66 0f38 2b /r ] SSE41,FUTURE */ + /* 361 356 001(2b) 110 : NOAPX,SSE41,FUTURE */ + {I_PACKUSDW, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69705, 409, 2764}, +}; + +static const struct itemplate instrux_PBLENDVB[2] = { + /* 0 : PBLENDVB xmmreg,xmmrm,xmm0 [rm-: 66 0f38 10 /r ] SSE41,FUTURE */ + /* 361 356 001(10) 110 : NOAPX,SSE41,FUTURE */ + {I_PBLENDVB, 3, {XMMREG|RN_L16,RM_XMM|RN_L16,XMMREG|RN_ZERO|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+69711, 409, 2765}, + /* 1 : PBLENDVB xmmreg,xmmrm128 [rm: 66 0f38 10 /r ] SSE41,FUTURE */ + /* 361 356 001(10) 110 : NOAPX,SSE41,FUTURE */ + {I_PBLENDVB, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69711, 409, 2766}, +}; + +static const struct itemplate instrux_PBLENDW[1] = { + /* 0 : PBLENDW xmmreg,xmmrm128,imm8 [rmi: 66 0f3a 0e /r ib,u ] SSE41,FUTURE */ + /* 361 357 001(0e) 110 026 : NOAPX,SSE41,FUTURE */ + {I_PBLENDW, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+58260, 409, 2767}, +}; + +static const struct itemplate instrux_PCMPEQQ[1] = { + /* 0 : PCMPEQQ xmmreg,xmmrm128 [rm: 66 0f38 29 /r ] SSE41,FUTURE */ + /* 361 356 001(29) 110 : NOAPX,SSE41,FUTURE */ + {I_PCMPEQQ, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69717, 409, 2768}, +}; + +static const struct itemplate instrux_PEXTRB[3] = { + /* 0 : PEXTRB reg32,xmmreg,imm8 [mri: 66 0f3a 14 /r ib,u ] SSE41,FUTURE */ + /* 361 357 001(14) 101 026 : NOAPX,SSE41,FUTURE */ + {I_PEXTRB, 3, {REG_GPR|BITS32|RN_L16,XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+51684, 409, 2769}, + /* 1 : PEXTRB mem8,xmmreg,imm8 [mri: 66 0f3a 14 /r ib,u ] SSE41,FUTURE */ + /* 361 357 001(14) 101 026 : NOAPX,SSE41,FUTURE */ + {I_PEXTRB, 3, {MEMORY|BITS8|RN_L16,XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+51684, 409, 2770}, + /* 2 : PEXTRB reg64,xmmreg,imm8 [mri: o64nw 66 0f3a 14 /r ib,u ] LONG,PROT,SSE41,X86_64 */ + /* 323 361 357 001(14) 101 026 : NWSIZE,NOAPX,LONG,PROT,SSE41,X86_64 */ + {I_PEXTRB, 3, {REG_GPR|BITS64|RN_L16,XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+51683, 411, 2771}, +}; + +static const struct itemplate instrux_PEXTRD[1] = { + /* 0 : PEXTRD rm32,xmmreg,imm8 [mri: norexw 66 0f3a 16 /r ib,u ] SSE41,FUTURE */ + /* 317 361 357 001(16) 101 026 : NOAPX,SSE41,FUTURE */ + {I_PEXTRD, 3, {RM_GPR|BITS32|RN_L16,XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+51691, 409, 2772}, +}; + +static const struct itemplate instrux_PEXTRQ[1] = { + /* 0 : PEXTRQ rm64,xmmreg,imm8 [mri: o64 66 0f3a 16 /r ib,u ] LONG,PROT,SSE41,X86_64 */ + /* 324 361 357 001(16) 101 026 : NOAPX,LONG,PROT,SSE41,X86_64 */ + {I_PEXTRQ, 3, {RM_GPR|BITS64|RN_L16,XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+51699, 410, 2773}, +}; + +static const struct itemplate instrux_PHMINPOSUW[1] = { + /* 0 : PHMINPOSUW xmmreg,xmmrm128 [rm: 66 0f38 41 /r ] SSE41,FUTURE */ + /* 361 356 001(41) 110 : NOAPX,SSE41,FUTURE */ + {I_PHMINPOSUW, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69723, 409, 2777}, +}; + +static const struct itemplate instrux_PINSRB[3] = { + /* 0 : PINSRB xmmreg,mem,imm8 [rmi: 66 0f3a 20 /r ib,u ] AR2,SB,SSE41,FUTURE */ + /* 361 357 001(20) 110 026 : AR2,SB,NOAPX,SSE41,FUTURE */ + {I_PINSRB, 3, {XMMREG|RN_L16,MEMORY|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+51716, 412, 2778}, + /* 1 : PINSRB xmmreg,rm8,imm8 [rmi: nohi 66 0f3a 20 /r ib,u ] AR2,SB,SSE41,FUTURE */ + /* 325 361 357 001(20) 110 026 : AR2,SB,NOAPX,SSE41,FUTURE */ + {I_PINSRB, 3, {XMMREG|RN_L16,RM_GPR|BITS8|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+51715, 412, 2779}, + /* 2 : PINSRB xmmreg,reg32,imm8 [rmi: 66 0f3a 20 /r ib,u ] AR2,SB,SSE41,FUTURE */ + /* 361 357 001(20) 110 026 : AR2,SB,NOAPX,SSE41,FUTURE */ + {I_PINSRB, 3, {XMMREG|RN_L16,REG_GPR|BITS32|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+51716, 412, 2780}, +}; + +static const struct itemplate instrux_PINSRD[1] = { + /* 0 : PINSRD xmmreg,rm32,imm8 [rmi: norexw 66 0f3a 22 /r ib,u ] AR2,SB,SSE41,FUTURE */ + /* 317 361 357 001(22) 110 026 : AR2,SB,NOAPX,SSE41,FUTURE */ + {I_PINSRD, 3, {XMMREG|RN_L16,RM_GPR|BITS32|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+51723, 412, 2781}, +}; + +static const struct itemplate instrux_PINSRQ[1] = { + /* 0 : PINSRQ xmmreg,rm64,imm8 [rmi: o64 66 0f3a 22 /r ib,u ] AR2,SB,LONG,PROT,SSE41,X86_64 */ + /* 324 361 357 001(22) 110 026 : AR2,SB,NOAPX,LONG,PROT,SSE41,X86_64 */ + {I_PINSRQ, 3, {XMMREG|RN_L16,RM_GPR|BITS64|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+51731, 413, 2782}, +}; + +static const struct itemplate instrux_PMAXSB[1] = { + /* 0 : PMAXSB xmmreg,xmmrm128 [rm: 66 0f38 3c /r ] SSE41,FUTURE */ + /* 361 356 001(3c) 110 : NOAPX,SSE41,FUTURE */ + {I_PMAXSB, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69729, 409, 2783}, +}; + +static const struct itemplate instrux_PMAXSD[1] = { + /* 0 : PMAXSD xmmreg,xmmrm128 [rm: 66 0f38 3d /r ] SSE41,FUTURE */ + /* 361 356 001(3d) 110 : NOAPX,SSE41,FUTURE */ + {I_PMAXSD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69735, 409, 2784}, +}; + +static const struct itemplate instrux_PMAXUD[1] = { + /* 0 : PMAXUD xmmreg,xmmrm128 [rm: 66 0f38 3f /r ] SSE41,FUTURE */ + /* 361 356 001(3f) 110 : NOAPX,SSE41,FUTURE */ + {I_PMAXUD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69741, 409, 2785}, +}; + +static const struct itemplate instrux_PMAXUW[1] = { + /* 0 : PMAXUW xmmreg,xmmrm128 [rm: 66 0f38 3e /r ] SSE41,FUTURE */ + /* 361 356 001(3e) 110 : NOAPX,SSE41,FUTURE */ + {I_PMAXUW, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69747, 409, 2786}, +}; + +static const struct itemplate instrux_PMINSB[1] = { + /* 0 : PMINSB xmmreg,xmmrm128 [rm: 66 0f38 38 /r ] SSE41,FUTURE */ + /* 361 356 001(38) 110 : NOAPX,SSE41,FUTURE */ + {I_PMINSB, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69753, 409, 2787}, +}; + +static const struct itemplate instrux_PMINSD[1] = { + /* 0 : PMINSD xmmreg,xmmrm128 [rm: 66 0f38 39 /r ] SSE41,FUTURE */ + /* 361 356 001(39) 110 : NOAPX,SSE41,FUTURE */ + {I_PMINSD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69759, 409, 2788}, +}; + +static const struct itemplate instrux_PMINUD[1] = { + /* 0 : PMINUD xmmreg,xmmrm128 [rm: 66 0f38 3b /r ] SSE41,FUTURE */ + /* 361 356 001(3b) 110 : NOAPX,SSE41,FUTURE */ + {I_PMINUD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69765, 409, 2789}, +}; + +static const struct itemplate instrux_PMINUW[1] = { + /* 0 : PMINUW xmmreg,xmmrm128 [rm: 66 0f38 3a /r ] SSE41,FUTURE */ + /* 361 356 001(3a) 110 : NOAPX,SSE41,FUTURE */ + {I_PMINUW, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69771, 409, 2790}, +}; + +static const struct itemplate instrux_PMOVSXBW[1] = { + /* 0 : PMOVSXBW xmmreg,xmmrm64 [rm: 66 0f38 20 /r ] AR0-1,SQ,SSE41,FUTURE */ + /* 361 356 001(20) 110 : AR0,AR1,SQ,NOAPX,SSE41,FUTURE */ + {I_PMOVSXBW, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69777, 414, 2791}, +}; + +static const struct itemplate instrux_PMOVSXBD[1] = { + /* 0 : PMOVSXBD xmmreg,xmmrm32 [rm: 66 0f38 21 /r ] AR0-1,SD,SSE41,FUTURE */ + /* 361 356 001(21) 110 : AR0,AR1,SD,NOAPX,SSE41,FUTURE */ + {I_PMOVSXBD, 2, {XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69783, 415, 2792}, +}; + +static const struct itemplate instrux_PMOVSXBQ[1] = { + /* 0 : PMOVSXBQ xmmreg,xmmrm16 [rm: 66 0f38 22 /r ] AR0-1,SW,SSE41,FUTURE */ + /* 361 356 001(22) 110 : AR0,AR1,SW,NOAPX,SSE41,FUTURE */ + {I_PMOVSXBQ, 2, {XMMREG|RN_L16,RM_XMM|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69789, 416, 2793}, +}; + +static const struct itemplate instrux_PMOVSXWD[1] = { + /* 0 : PMOVSXWD xmmreg,xmmrm64 [rm: 66 0f38 23 /r ] AR0-1,SQ,SSE41,FUTURE */ + /* 361 356 001(23) 110 : AR0,AR1,SQ,NOAPX,SSE41,FUTURE */ + {I_PMOVSXWD, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69795, 414, 2794}, +}; + +static const struct itemplate instrux_PMOVSXWQ[1] = { + /* 0 : PMOVSXWQ xmmreg,xmmrm32 [rm: 66 0f38 24 /r ] AR0-1,SD,SSE41,FUTURE */ + /* 361 356 001(24) 110 : AR0,AR1,SD,NOAPX,SSE41,FUTURE */ + {I_PMOVSXWQ, 2, {XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69801, 415, 2795}, +}; + +static const struct itemplate instrux_PMOVSXDQ[1] = { + /* 0 : PMOVSXDQ xmmreg,xmmrm64 [rm: 66 0f38 25 /r ] AR0-1,SQ,SSE41,FUTURE */ + /* 361 356 001(25) 110 : AR0,AR1,SQ,NOAPX,SSE41,FUTURE */ + {I_PMOVSXDQ, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69807, 414, 2796}, +}; + +static const struct itemplate instrux_PMOVZXBW[1] = { + /* 0 : PMOVZXBW xmmreg,xmmrm64 [rm: 66 0f38 30 /r ] AR0-1,SQ,SSE41,FUTURE */ + /* 361 356 001(30) 110 : AR0,AR1,SQ,NOAPX,SSE41,FUTURE */ + {I_PMOVZXBW, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69813, 414, 2797}, +}; + +static const struct itemplate instrux_PMOVZXBD[1] = { + /* 0 : PMOVZXBD xmmreg,xmmrm32 [rm: 66 0f38 31 /r ] AR0-1,SD,SSE41,FUTURE */ + /* 361 356 001(31) 110 : AR0,AR1,SD,NOAPX,SSE41,FUTURE */ + {I_PMOVZXBD, 2, {XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69819, 415, 2798}, +}; + +static const struct itemplate instrux_PMOVZXBQ[1] = { + /* 0 : PMOVZXBQ xmmreg,xmmrm16 [rm: 66 0f38 32 /r ] AR0-1,SW,SSE41,FUTURE */ + /* 361 356 001(32) 110 : AR0,AR1,SW,NOAPX,SSE41,FUTURE */ + {I_PMOVZXBQ, 2, {XMMREG|RN_L16,RM_XMM|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69825, 416, 2799}, +}; + +static const struct itemplate instrux_PMOVZXWD[1] = { + /* 0 : PMOVZXWD xmmreg,xmmrm64 [rm: 66 0f38 33 /r ] AR0-1,SQ,SSE41,FUTURE */ + /* 361 356 001(33) 110 : AR0,AR1,SQ,NOAPX,SSE41,FUTURE */ + {I_PMOVZXWD, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69831, 414, 2800}, +}; + +static const struct itemplate instrux_PMOVZXWQ[1] = { + /* 0 : PMOVZXWQ xmmreg,xmmrm32 [rm: 66 0f38 34 /r ] AR0-1,SD,SSE41,FUTURE */ + /* 361 356 001(34) 110 : AR0,AR1,SD,NOAPX,SSE41,FUTURE */ + {I_PMOVZXWQ, 2, {XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69837, 415, 2801}, +}; + +static const struct itemplate instrux_PMOVZXDQ[1] = { + /* 0 : PMOVZXDQ xmmreg,xmmrm64 [rm: 66 0f38 35 /r ] AR0-1,SQ,SSE41,FUTURE */ + /* 361 356 001(35) 110 : AR0,AR1,SQ,NOAPX,SSE41,FUTURE */ + {I_PMOVZXDQ, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69843, 414, 2802}, +}; + +static const struct itemplate instrux_PMULDQ[1] = { + /* 0 : PMULDQ xmmreg,xmmrm128 [rm: 66 0f38 28 /r ] SSE41,FUTURE */ + /* 361 356 001(28) 110 : NOAPX,SSE41,FUTURE */ + {I_PMULDQ, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69849, 409, 2803}, +}; + +static const struct itemplate instrux_PMULLD[1] = { + /* 0 : PMULLD xmmreg,xmmrm128 [rm: 66 0f38 40 /r ] SSE41,FUTURE */ + /* 361 356 001(40) 110 : NOAPX,SSE41,FUTURE */ + {I_PMULLD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69855, 409, 2804}, +}; + +static const struct itemplate instrux_PTEST[1] = { + /* 0 : PTEST xmmreg,xmmrm128 [rm: 66 0f38 17 /r ] SSE41,FUTURE */ + /* 361 356 001(17) 110 : NOAPX,SSE41,FUTURE */ + {I_PTEST, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69861, 409, 2805}, +}; + +static const struct itemplate instrux_ROUNDPD[1] = { + /* 0 : ROUNDPD xmmreg,xmmrm128,imm8 [rmi: 66 0f3a 09 /r ib,u ] SSE41,FUTURE */ + /* 361 357 001(09) 110 026 : NOAPX,SSE41,FUTURE */ + {I_ROUNDPD, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+58267, 409, 2806}, +}; + +static const struct itemplate instrux_ROUNDPS[1] = { + /* 0 : ROUNDPS xmmreg,xmmrm128,imm8 [rmi: 66 0f3a 08 /r ib,u ] SSE41,FUTURE */ + /* 361 357 001(08) 110 026 : NOAPX,SSE41,FUTURE */ + {I_ROUNDPS, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+58274, 409, 2807}, +}; + +static const struct itemplate instrux_ROUNDSD[1] = { + /* 0 : ROUNDSD xmmreg,xmmrm64,imm8 [rmi: 66 0f3a 0b /r ib,u ] SSE41,FUTURE */ + /* 361 357 001(0b) 110 026 : NOAPX,SSE41,FUTURE */ + {I_ROUNDSD, 3, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+58281, 409, 2808}, +}; + +static const struct itemplate instrux_ROUNDSS[1] = { + /* 0 : ROUNDSS xmmreg,xmmrm32,imm8 [rmi: 66 0f3a 0a /r ib,u ] SSE41,FUTURE */ + /* 361 357 001(0a) 110 026 : NOAPX,SSE41,FUTURE */ + {I_ROUNDSS, 3, {XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+58288, 409, 2809}, +}; + +static const struct itemplate instrux_CRC32[18] = { + /* 0 : CRC32 reg32,rm8 [rm: o8 f2 0f38 f0 /r ] SSE42,FUTURE */ + /* 332 356 001(f0) 110 : NOAPX,SSE42,FUTURE */ + {I_CRC32, 2, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58317, 417, 2812}, + /* 1 : CRC32 reg32,rm16 [rm: o16 f2 0f38 f1 /r ] SSE42,FUTURE */ + /* 320 332 356 001(f1) 110 : NOAPX,SSE42,FUTURE */ + {I_CRC32, 2, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58295, 417, 2813}, + /* 2 : CRC32 reg32,rm32 [rm: o32 f2 0f38 f1 /r ] SSE42,FUTURE */ + /* 321 332 356 001(f1) 110 : NOAPX,SSE42,FUTURE */ + {I_CRC32, 2, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58302, 417, 2814}, + /* 3 : CRC32 reg32,rm64 [rm: o64 f2 0f38 f1 /r ] ND,LONG,PROT,SSE42,X86_64 */ + /* 324 332 356 001(f1) 110 : NOAPX,LONG,PROT,SSE42,X86_64 */ + {I_CRC32, 2, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58309, 418, 2815}, + /* 4 : CRC32 reg32,rm8 [rm: evex.l0.m4.o8 f0 /r ] LONG,PROT,SSE42,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(f0) 110 : WIG,LONG,EVEX,PROT,SSE42,APX,X86_64 */ + {I_CRC32, 2, {REG_GPR|BITS32,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+25735, 419, 2816}, + /* 5 : CRC32 reg32,rm16 [rm: evex.l0.m4.o16 f1 /r ] LONG,PROT,SSE42,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(f1) 110 : LONG,EVEX,PROT,SSE42,APX,X86_64 */ + {I_CRC32, 2, {REG_GPR|BITS32,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+17923, 420, 2817}, + /* 6 : CRC32 reg32,rm32 [rm: evex.l0.m4.o32 f1 /r ] LONG,PROT,SSE42,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(f1) 110 : WW,LONG,EVEX,PROT,SSE42,APX,X86_64 */ + {I_CRC32, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17933, 421, 2818}, + /* 7 : CRC32 reg32,rm64 [rm: evex.l0.m4.o64 f1 /r ] ND,LONG,PROT,SSE42,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(f1) 110 : WW,LONG,EVEX,PROT,SSE42,APX,X86_64 */ + {I_CRC32, 2, {REG_GPR|BITS32,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17943, 421, 2819}, + /* 8 : CRC32 reg64,rm8 [rm: o8 f2 0f38 f0 /r ] OPT,LONG,PROT,SSE42,X86_64 */ + /* 332 356 001(f0) 110 : OPT,NOAPX,LONG,PROT,SSE42,X86_64 */ + {I_CRC32, 2, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58317, 422, 2820}, + /* 9 : CRC32 reg64,rm16 [rm: o16 f2 0f38 f1 /r ] LONG,PROT,SSE42,X86_64 */ + /* 320 332 356 001(f1) 110 : NOAPX,LONG,PROT,SSE42,X86_64 */ + {I_CRC32, 2, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58295, 418, 2821}, + /* 10 : CRC32 reg64,rm32 [rm: o32 f2 0f38 f1 /r ] LONG,PROT,SSE42,X86_64 */ + /* 321 332 356 001(f1) 110 : NOAPX,LONG,PROT,SSE42,X86_64 */ + {I_CRC32, 2, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58302, 418, 2822}, + /* 11 : CRC32 reg64,rm64 [rm: o64 f2 0f38 f1 /r ] LONG,PROT,SSE42,X86_64 */ + /* 324 332 356 001(f1) 110 : NOAPX,LONG,PROT,SSE42,X86_64 */ + {I_CRC32, 2, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58309, 418, 2823}, + /* 12 : CRC32 reg64,rm8 [rm: evex.l0.m4.o8 f0 /r ] OPT,LONG,PROT,SSE42,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(f0) 110 : OPT,WIG,LONG,EVEX,PROT,SSE42,APX,X86_64 */ + {I_CRC32, 2, {REG_GPR|BITS64,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+25735, 423, 2824}, + /* 13 : CRC32 reg64,rm16 [rm: evex.l0.m4.o16 f1 /r ] LONG,PROT,SSE42,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(f1) 110 : LONG,EVEX,PROT,SSE42,APX,X86_64 */ + {I_CRC32, 2, {REG_GPR|BITS64,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+17923, 420, 2825}, + /* 14 : CRC32 reg64,rm32 [rm: evex.l0.m4.o32 f1 /r ] LONG,PROT,SSE42,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(f1) 110 : WW,LONG,EVEX,PROT,SSE42,APX,X86_64 */ + {I_CRC32, 2, {REG_GPR|BITS64,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17933, 421, 2826}, + /* 15 : CRC32 reg64,rm64 [rm: evex.l0.m4.o64 f1 /r ] LONG,PROT,SSE42,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(f1) 110 : WW,LONG,EVEX,PROT,SSE42,APX,X86_64 */ + {I_CRC32, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17943, 421, 2827}, + /* 16 : CRC32 reg64,rm8 [rm: o64 f2 0f38 f0 /r ] LONG,SSE42,X86_64,FUTURE */ + /* 324 332 356 001(f0) 110 : NOAPX,LONG,PROT,SSE42,FUTURE */ + {I_CRC32, 2, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58316, 424, 2829}, + /* 17 : CRC32 reg64,rm8 [rm: evex.l0.m4.o64 f0 /r ] LONG,PROT,SSE42,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(f0) 110 : WW,LONG,EVEX,PROT,SSE42,APX,X86_64 */ + {I_CRC32, 2, {REG_GPR|BITS64,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+17953, 421, 2830}, +}; + +static const struct itemplate instrux_PCMPESTRI[1] = { + /* 0 : PCMPESTRI xmmreg,xmmrm128,imm8 [rmi: 66 0f3a 61 /r ib,u ] SSE42,FUTURE */ + /* 361 357 001(61) 110 026 : NOAPX,SSE42,FUTURE */ + {I_PCMPESTRI, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+58323, 417, 2832}, +}; + +static const struct itemplate instrux_PCMPESTRM[1] = { + /* 0 : PCMPESTRM xmmreg,xmmrm128,imm8 [rmi: 66 0f3a 60 /r ib,u ] SSE42,FUTURE */ + /* 361 357 001(60) 110 026 : NOAPX,SSE42,FUTURE */ + {I_PCMPESTRM, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+58330, 417, 2833}, +}; + +static const struct itemplate instrux_PCMPISTRI[1] = { + /* 0 : PCMPISTRI xmmreg,xmmrm128,imm8 [rmi: 66 0f3a 63 /r ib,u ] SSE42,FUTURE */ + /* 361 357 001(63) 110 026 : NOAPX,SSE42,FUTURE */ + {I_PCMPISTRI, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+58337, 417, 2834}, +}; + +static const struct itemplate instrux_PCMPISTRM[1] = { + /* 0 : PCMPISTRM xmmreg,xmmrm128,imm8 [rmi: 66 0f3a 62 /r ib,u ] SSE42,FUTURE */ + /* 361 357 001(62) 110 026 : NOAPX,SSE42,FUTURE */ + {I_PCMPISTRM, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+58344, 417, 2835}, +}; + +static const struct itemplate instrux_PCMPGTQ[1] = { + /* 0 : PCMPGTQ xmmreg,xmmrm128 [rm: 66 0f38 37 /r ] SSE42,FUTURE */ + /* 361 356 001(37) 110 : NOAPX,SSE42,FUTURE */ + {I_PCMPGTQ, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69867, 417, 2836}, +}; + +static const struct itemplate instrux_POPCNT[6] = { + /* 0 : POPCNT reg16,rm16 [rm: o16 f3i 0f b8 /r ] AR0-1,SW,FL,NEHALEM */ + /* 320 333 355 001(b8) 110 : AR0,AR1,SW,FL,NEHALEM */ + {I_POPCNT, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58351, 425, 2837}, + /* 1 : POPCNT reg32,rm32 [rm: o32 f3i 0f b8 /r ] AR0-1,SD,FL,NEHALEM */ + /* 321 333 355 001(b8) 110 : AR0,AR1,SD,FL,NEHALEM */ + {I_POPCNT, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+58358, 426, 2838}, + /* 2 : POPCNT reg64,rm64 [rm: o64 f3i 0f b8 /r ] AR0-1,SQ,LONG,FL,PROT,X86_64,NEHALEM */ + /* 324 333 355 001(b8) 110 : AR0,AR1,SQ,LONG,FL,PROT,NEHALEM */ + {I_POPCNT, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+58365, 427, 2839}, + /* 3 : POPCNT reg16,rm16 [rm: evex.nf.nd0.l0.m4.o16 88 /r ] SM0-1,NF,LONG,PROT,APX,X86_64,NEHALEM */ + /* 250(f4 7d 08) 300 320 001(88) 110 : SM0,SM1,NF,NF_E,LONG,EVEX,PROT,APX,NEHALEM */ + {I_POPCNT, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+17963, 428, 2840}, + /* 4 : POPCNT reg32,rm32 [rm: evex.nf.nd0.l0.m4.o32 88 /r ] SM0-1,NF,LONG,PROT,APX,X86_64,NEHALEM */ + /* 250(f4 7c 08) 300 321 001(88) 110 : SM0,SM1,NF,NF_E,WW,LONG,EVEX,PROT,APX,NEHALEM */ + {I_POPCNT, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17973, 429, 2841}, + /* 5 : POPCNT reg64,rm64 [rm: evex.nf.nd0.l0.m4.o64 88 /r ] SM0-1,NF,LONG,PROT,APX,X86_64,NEHALEM */ + /* 250(f4 fc 08) 300 324 001(88) 110 : SM0,SM1,NF,NF_E,WW,LONG,EVEX,PROT,APX,NEHALEM */ + {I_POPCNT, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17983, 429, 2842}, +}; + +static const struct itemplate instrux_GETSEC[1] = { + /* 0 : GETSEC void [ 0f 37 ] NOAPX,FL,KATMAI */ + /* 355 001(37) : NOAPX,FL,KATMAI */ + {I_GETSEC, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73444, 430, 2845}, +}; + +static const struct itemplate instrux_PFRCPV[1] = { + /* 0 : PFRCPV mmxreg,mmxrm [rm: 0f 0f /r 86 ] AR0-1,SQ,3DNOW,PENT,CYRIX */ + /* 355 001(0f) 110 001(86) : AR0,AR1,SQ,3DNOW,PENT,CYRIX */ + {I_PFRCPV, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+58372, 431, 2848}, +}; + +static const struct itemplate instrux_PFRSQRTV[1] = { + /* 0 : PFRSQRTV mmxreg,mmxrm [rm: 0f 0f /r 87 ] AR0-1,SQ,3DNOW,PENT,CYRIX */ + /* 355 001(0f) 110 001(87) : AR0,AR1,SQ,3DNOW,PENT,CYRIX */ + {I_PFRSQRTV, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+58379, 431, 2849}, +}; + +static const struct itemplate instrux_AESENC[1] = { + /* 0 : AESENC xmmreg,xmmrm128 [rm: 66 0f38 dc /r ] SSE,WESTMERE */ + /* 361 356 001(dc) 110 : NOAPX,SSE,WESTMERE */ + {I_AESENC, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69873, 432, 2855}, +}; + +static const struct itemplate instrux_AESENCLAST[1] = { + /* 0 : AESENCLAST xmmreg,xmmrm128 [rm: 66 0f38 dd /r ] SSE,WESTMERE */ + /* 361 356 001(dd) 110 : NOAPX,SSE,WESTMERE */ + {I_AESENCLAST, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69879, 432, 2856}, +}; + +static const struct itemplate instrux_AESDEC[1] = { + /* 0 : AESDEC xmmreg,xmmrm128 [rm: 66 0f38 de /r ] SSE,WESTMERE */ + /* 361 356 001(de) 110 : NOAPX,SSE,WESTMERE */ + {I_AESDEC, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69885, 432, 2857}, +}; + +static const struct itemplate instrux_AESDECLAST[1] = { + /* 0 : AESDECLAST xmmreg,xmmrm128 [rm: 66 0f38 df /r ] SSE,WESTMERE */ + /* 361 356 001(df) 110 : NOAPX,SSE,WESTMERE */ + {I_AESDECLAST, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69891, 432, 2858}, +}; + +static const struct itemplate instrux_AESIMC[1] = { + /* 0 : AESIMC xmmreg,xmmrm128 [rm: 66 0f38 db /r ] SSE,WESTMERE */ + /* 361 356 001(db) 110 : NOAPX,SSE,WESTMERE */ + {I_AESIMC, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69897, 432, 2859}, +}; + +static const struct itemplate instrux_AESKEYGENASSIST[1] = { + /* 0 : AESKEYGENASSIST xmmreg,xmmrm128,imm8 [rmi: 66 0f3a df /r ib ] SSE,WESTMERE */ + /* 361 357 001(df) 110 022 : NOAPX,SSE,WESTMERE */ + {I_AESKEYGENASSIST, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+58386, 432, 2860}, +}; + +static const struct itemplate instrux_VAESENC[10] = { + /* 0 : VAESENC xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 dc /r ] AVX,SANDYBRIDGE */ + /* 261(002 001) 001(dc) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VAESENC, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+58393, 433, 2863}, + /* 1 : VAESENC xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f38 dc /r ] ND,AVX,SANDYBRIDGE */ + /* 260(002 001) 001(dc) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VAESENC, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58400, 433, 2863}, + /* 2 : VAESENC ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38.wig dc /r ] VAES,FUTURE */ + /* 261(002 005) 001(dc) 120 : NOAPX,WIG,VEX,VAES,FUTURE */ + {I_VAESENC, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+58456, 437, 2886}, + /* 3 : VAESENC ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f38.wig dc /r ] ND,VAES,FUTURE */ + /* 260(002 005) 001(dc) 110 : NOAPX,WIG,VEX,VAES,FUTURE */ + {I_VAESENC, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58463, 437, 2886}, + /* 4 : VAESENC xmmreg,xmmreg*,xmmrm128 [rvm:fv: evex.nds.128.66.0f38.wig dc /r ] AVX512,AVX512VL,VAES,FUTURE */ + /* 241(f2 7d 08) 301 001(dc) 120 : WIG,EVEX,PROT,AVX512,AVX512VL,VAES,FUTURE */ + {I_VAESENC, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+25744, 438, 2892}, + /* 5 : VAESENC xmmreg,xmmrm128 [r+vm:fv: evex.nds.128.66.0f38.wig dc /r ] ND,AVX512,AVX512VL,VAES,FUTURE */ + /* 240(f2 7d 08) 301 001(dc) 110 : WIG,EVEX,PROT,AVX512,AVX512VL,VAES,FUTURE */ + {I_VAESENC, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+25753, 438, 2892}, + /* 6 : VAESENC ymmreg,ymmreg*,ymmrm256 [rvm:fv: evex.nds.256.66.0f38.wig dc /r ] AVX512,AVX512VL,VAES,FUTURE */ + /* 241(f2 7d 28) 301 001(dc) 120 : WIG,EVEX,PROT,AVX512,AVX512VL,VAES,FUTURE */ + {I_VAESENC, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+25762, 438, 2893}, + /* 7 : VAESENC ymmreg,ymmrm256 [r+vm:fv: evex.nds.256.66.0f38.wig dc /r ] ND,AVX512,AVX512VL,VAES,FUTURE */ + /* 240(f2 7d 28) 301 001(dc) 110 : WIG,EVEX,PROT,AVX512,AVX512VL,VAES,FUTURE */ + {I_VAESENC, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+25771, 438, 2893}, + /* 8 : VAESENC zmmreg,zmmreg*,zmmrm512 [rvm:fv: evex.nds.512.66.0f38.wig dc /r ] AVX512,VAES,FUTURE */ + /* 241(f2 7d 48) 301 001(dc) 120 : WIG,EVEX,PROT,AVX512,VAES,FUTURE */ + {I_VAESENC, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, NO_DECORATOR, nasm_bytecodes+25888, 439, 2902}, + /* 9 : VAESENC zmmreg,zmmrm512 [r+vm:fv: evex.nds.512.66.0f38.wig dc /r ] ND,AVX512,VAES,FUTURE */ + /* 240(f2 7d 48) 301 001(dc) 110 : WIG,EVEX,PROT,AVX512,VAES,FUTURE */ + {I_VAESENC, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+25897, 439, 2902}, +}; + +static const struct itemplate instrux_VAESENCLAST[10] = { + /* 0 : VAESENCLAST xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 dd /r ] AVX,SANDYBRIDGE */ + /* 261(002 001) 001(dd) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VAESENCLAST, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+58407, 433, 2864}, + /* 1 : VAESENCLAST xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f38 dd /r ] ND,AVX,SANDYBRIDGE */ + /* 260(002 001) 001(dd) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VAESENCLAST, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58414, 433, 2864}, + /* 2 : VAESENCLAST ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38.wig dd /r ] VAES,FUTURE */ + /* 261(002 005) 001(dd) 120 : NOAPX,WIG,VEX,VAES,FUTURE */ + {I_VAESENCLAST, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+58470, 437, 2887}, + /* 3 : VAESENCLAST ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f38.wig dd /r ] ND,VAES,FUTURE */ + /* 260(002 005) 001(dd) 110 : NOAPX,WIG,VEX,VAES,FUTURE */ + {I_VAESENCLAST, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58477, 437, 2887}, + /* 4 : VAESENCLAST xmmreg,xmmreg*,xmmrm128 [rvm:fv: evex.nds.128.66.0f38.wig dd /r ] AVX512,AVX512VL,VAES,FUTURE */ + /* 241(f2 7d 08) 301 001(dd) 120 : WIG,EVEX,PROT,AVX512,AVX512VL,VAES,FUTURE */ + {I_VAESENCLAST, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+25780, 438, 2894}, + /* 5 : VAESENCLAST xmmreg,xmmrm128 [r+vm:fv: evex.nds.128.66.0f38.wig dd /r ] ND,AVX512,AVX512VL,VAES,FUTURE */ + /* 240(f2 7d 08) 301 001(dd) 110 : WIG,EVEX,PROT,AVX512,AVX512VL,VAES,FUTURE */ + {I_VAESENCLAST, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+25789, 438, 2894}, + /* 6 : VAESENCLAST ymmreg,ymmreg*,ymmrm256 [rvm:fv: evex.nds.256.66.0f38.wig dd /r ] AVX512,AVX512VL,VAES,FUTURE */ + /* 241(f2 7d 28) 301 001(dd) 120 : WIG,EVEX,PROT,AVX512,AVX512VL,VAES,FUTURE */ + {I_VAESENCLAST, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+25798, 438, 2895}, + /* 7 : VAESENCLAST ymmreg,ymmrm256 [r+vm:fv: evex.nds.256.66.0f38.wig dd /r ] ND,AVX512,AVX512VL,VAES,FUTURE */ + /* 240(f2 7d 28) 301 001(dd) 110 : WIG,EVEX,PROT,AVX512,AVX512VL,VAES,FUTURE */ + {I_VAESENCLAST, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+25807, 438, 2895}, + /* 8 : VAESENCLAST zmmreg,zmmreg*,zmmrm512 [rvm:fv: evex.nds.512.66.0f38.wig dd /r ] AVX512,VAES,FUTURE */ + /* 241(f2 7d 48) 301 001(dd) 120 : WIG,EVEX,PROT,AVX512,VAES,FUTURE */ + {I_VAESENCLAST, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, NO_DECORATOR, nasm_bytecodes+25906, 439, 2903}, + /* 9 : VAESENCLAST zmmreg,zmmrm512 [r+vm:fv: evex.nds.512.66.0f38.wig dd /r ] ND,AVX512,VAES,FUTURE */ + /* 240(f2 7d 48) 301 001(dd) 110 : WIG,EVEX,PROT,AVX512,VAES,FUTURE */ + {I_VAESENCLAST, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+25915, 439, 2903}, +}; + +static const struct itemplate instrux_VAESDEC[10] = { + /* 0 : VAESDEC xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 de /r ] AVX,SANDYBRIDGE */ + /* 261(002 001) 001(de) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VAESDEC, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+58421, 433, 2865}, + /* 1 : VAESDEC xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f38 de /r ] ND,AVX,SANDYBRIDGE */ + /* 260(002 001) 001(de) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VAESDEC, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58428, 433, 2865}, + /* 2 : VAESDEC ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38.wig de /r ] VAES,FUTURE */ + /* 261(002 005) 001(de) 120 : NOAPX,WIG,VEX,VAES,FUTURE */ + {I_VAESDEC, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+58484, 437, 2888}, + /* 3 : VAESDEC ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f38.wig de /r ] ND,VAES,FUTURE */ + /* 260(002 005) 001(de) 110 : NOAPX,WIG,VEX,VAES,FUTURE */ + {I_VAESDEC, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58491, 437, 2888}, + /* 4 : VAESDEC xmmreg,xmmreg*,xmmrm128 [rvm:fv: evex.nds.128.66.0f38.wig de /r ] AVX512,AVX512VL,VAES,FUTURE */ + /* 241(f2 7d 08) 301 001(de) 120 : WIG,EVEX,PROT,AVX512,AVX512VL,VAES,FUTURE */ + {I_VAESDEC, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+25816, 438, 2896}, + /* 5 : VAESDEC xmmreg,xmmrm128 [r+vm:fv: evex.nds.128.66.0f38.wig de /r ] ND,AVX512,AVX512VL,VAES,FUTURE */ + /* 240(f2 7d 08) 301 001(de) 110 : WIG,EVEX,PROT,AVX512,AVX512VL,VAES,FUTURE */ + {I_VAESDEC, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+25825, 438, 2896}, + /* 6 : VAESDEC ymmreg,ymmreg*,ymmrm256 [rvm:fv: evex.nds.256.66.0f38.wig de /r ] AVX512,AVX512VL,VAES,FUTURE */ + /* 241(f2 7d 28) 301 001(de) 120 : WIG,EVEX,PROT,AVX512,AVX512VL,VAES,FUTURE */ + {I_VAESDEC, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+25834, 438, 2897}, + /* 7 : VAESDEC ymmreg,ymmrm256 [r+vm:fv: evex.nds.256.66.0f38.wig de /r ] ND,AVX512,AVX512VL,VAES,FUTURE */ + /* 240(f2 7d 28) 301 001(de) 110 : WIG,EVEX,PROT,AVX512,AVX512VL,VAES,FUTURE */ + {I_VAESDEC, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+25843, 438, 2897}, + /* 8 : VAESDEC zmmreg,zmmreg*,zmmrm512 [rvm:fv: evex.nds.512.66.0f38.wig de /r ] AVX512,VAES,FUTURE */ + /* 241(f2 7d 48) 301 001(de) 120 : WIG,EVEX,PROT,AVX512,VAES,FUTURE */ + {I_VAESDEC, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, NO_DECORATOR, nasm_bytecodes+25924, 439, 2904}, + /* 9 : VAESDEC zmmreg,zmmrm512 [r+vm:fv: evex.nds.512.66.0f38.wig de /r ] ND,AVX512,VAES,FUTURE */ + /* 240(f2 7d 48) 301 001(de) 110 : WIG,EVEX,PROT,AVX512,VAES,FUTURE */ + {I_VAESDEC, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+25933, 439, 2904}, +}; + +static const struct itemplate instrux_VAESDECLAST[10] = { + /* 0 : VAESDECLAST xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 df /r ] AVX,SANDYBRIDGE */ + /* 261(002 001) 001(df) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VAESDECLAST, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+58435, 433, 2866}, + /* 1 : VAESDECLAST xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f38 df /r ] ND,AVX,SANDYBRIDGE */ + /* 260(002 001) 001(df) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VAESDECLAST, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58442, 433, 2866}, + /* 2 : VAESDECLAST ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38.wig df /r ] VAES,FUTURE */ + /* 261(002 005) 001(df) 120 : NOAPX,WIG,VEX,VAES,FUTURE */ + {I_VAESDECLAST, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+58498, 437, 2889}, + /* 3 : VAESDECLAST ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f38.wig df /r ] ND,VAES,FUTURE */ + /* 260(002 005) 001(df) 110 : NOAPX,WIG,VEX,VAES,FUTURE */ + {I_VAESDECLAST, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58505, 437, 2889}, + /* 4 : VAESDECLAST xmmreg,xmmreg*,xmmrm128 [rvm:fv: evex.nds.128.66.0f38.wig df /r ] AVX512,AVX512VL,VAES,FUTURE */ + /* 241(f2 7d 08) 301 001(df) 120 : WIG,EVEX,PROT,AVX512,AVX512VL,VAES,FUTURE */ + {I_VAESDECLAST, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+25852, 438, 2898}, + /* 5 : VAESDECLAST xmmreg,xmmrm128 [r+vm:fv: evex.nds.128.66.0f38.wig df /r ] ND,AVX512,AVX512VL,VAES,FUTURE */ + /* 240(f2 7d 08) 301 001(df) 110 : WIG,EVEX,PROT,AVX512,AVX512VL,VAES,FUTURE */ + {I_VAESDECLAST, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+25861, 438, 2898}, + /* 6 : VAESDECLAST ymmreg,ymmreg*,ymmrm256 [rvm:fv: evex.nds.256.66.0f38.wig df /r ] AVX512,AVX512VL,VAES,FUTURE */ + /* 241(f2 7d 28) 301 001(df) 120 : WIG,EVEX,PROT,AVX512,AVX512VL,VAES,FUTURE */ + {I_VAESDECLAST, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+25870, 438, 2899}, + /* 7 : VAESDECLAST ymmreg,ymmrm256 [r+vm:fv: evex.nds.256.66.0f38.wig df /r ] ND,AVX512,AVX512VL,VAES,FUTURE */ + /* 240(f2 7d 28) 301 001(df) 110 : WIG,EVEX,PROT,AVX512,AVX512VL,VAES,FUTURE */ + {I_VAESDECLAST, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+25879, 438, 2899}, + /* 8 : VAESDECLAST zmmreg,zmmreg*,zmmrm512 [rvm:fv: evex.nds.512.66.0f38.wig df /r ] AVX512,VAES,FUTURE */ + /* 241(f2 7d 48) 301 001(df) 120 : WIG,EVEX,PROT,AVX512,VAES,FUTURE */ + {I_VAESDECLAST, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, NO_DECORATOR, nasm_bytecodes+25942, 439, 2905}, + /* 9 : VAESDECLAST zmmreg,zmmrm512 [r+vm:fv: evex.nds.512.66.0f38.wig df /r ] ND,AVX512,VAES,FUTURE */ + /* 240(f2 7d 48) 301 001(df) 110 : WIG,EVEX,PROT,AVX512,VAES,FUTURE */ + {I_VAESDECLAST, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+25951, 439, 2905}, +}; + +static const struct itemplate instrux_VAESIMC[1] = { + /* 0 : VAESIMC xmmreg,xmmrm128 [rm: vex.128.66.0f38 db /r ] AVX,SANDYBRIDGE */ + /* 270(002 001) 001(db) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VAESIMC, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58449, 433, 2867}, +}; + +static const struct itemplate instrux_VAESKEYGENASSIST[1] = { + /* 0 : VAESKEYGENASSIST xmmreg,xmmrm128,imm8 [rmi: vex.128.66.0f3a df /r ib ] AVX,SANDYBRIDGE */ + /* 270(003 001) 001(df) 110 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VAESKEYGENASSIST, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+51739, 433, 2868}, +}; + +static const struct itemplate instrux_AESDEC128KL[1] = { + /* 0 : AESDEC128KL xmmreg,mem [rm: f3 0f38 dd /r ] FL,AESKLE,FUTURE */ + /* 333 356 001(dd) 110 : NOAPX,FL,AESKLE,FUTURE */ + {I_AESDEC128KL, 2, {XMMREG|RN_L16,MEMORY|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69903, 434, 2871}, +}; + +static const struct itemplate instrux_AESDEC256KL[1] = { + /* 0 : AESDEC256KL xmmreg,mem512 [rm: f3 0f38 df /r ] FL,AESKLE,FUTURE */ + /* 333 356 001(df) 110 : NOAPX,FL,AESKLE,FUTURE */ + {I_AESDEC256KL, 2, {XMMREG|RN_L16,MEMORY|BITS512|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69909, 434, 2872}, +}; + +static const struct itemplate instrux_AESENC128KL[1] = { + /* 0 : AESENC128KL xmmreg,mem [rm: f3 0f38 dc /r ] FL,AESKLE,FUTURE */ + /* 333 356 001(dc) 110 : NOAPX,FL,AESKLE,FUTURE */ + {I_AESENC128KL, 2, {XMMREG|RN_L16,MEMORY|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69915, 434, 2873}, +}; + +static const struct itemplate instrux_AESENC256KL[1] = { + /* 0 : AESENC256KL xmmreg,mem512 [rm: f3 0f38 de /r ] FL,AESKLE,FUTURE */ + /* 333 356 001(de) 110 : NOAPX,FL,AESKLE,FUTURE */ + {I_AESENC256KL, 2, {XMMREG|RN_L16,MEMORY|BITS512|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69921, 434, 2874}, +}; + +static const struct itemplate instrux_ENCODEKEY128[1] = { + /* 0 : ENCODEKEY128 reg32,reg32 [rm: f3 0f38 fa /r ] AESKLE,FUTURE */ + /* 333 356 001(fa) 110 : NOAPX,AESKLE,FUTURE */ + {I_ENCODEKEY128, 2, {REG_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69927, 435, 2875}, +}; + +static const struct itemplate instrux_ENCODEKEY256[1] = { + /* 0 : ENCODEKEY256 reg32,reg32 [rm: f3 0f38 fb /r ] AESKLE,FUTURE */ + /* 333 356 001(fb) 110 : NOAPX,AESKLE,FUTURE */ + {I_ENCODEKEY256, 2, {REG_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69933, 435, 2876}, +}; + +static const struct itemplate instrux_LOADIWKEY[1] = { + /* 0 : LOADIWKEY xmmreg,xmmreg [rm: f3 0f38 dc /r ] FL,AESKLE,FUTURE */ + /* 333 356 001(dc) 110 : NOAPX,FL,AESKLE,FUTURE */ + {I_LOADIWKEY, 2, {XMMREG|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69915, 434, 2877}, +}; + +static const struct itemplate instrux_AESDECWIDE128KL[1] = { + /* 0 : AESDECWIDE128KL mem [m: f3 0f38 d8 /1 ] FL,AESKLEWIDE_KL,FUTURE */ + /* 333 356 001(d8) 201 : NOAPX,FL,AESKLEWIDE_KL,FUTURE */ + {I_AESDECWIDE128KL, 1, {MEMORY|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+69939, 436, 2878}, +}; + +static const struct itemplate instrux_AESDECWIDE256KL[1] = { + /* 0 : AESDECWIDE256KL mem512 [m: f3 0f38 d8 /3 ] FL,AESKLEWIDE_KL,FUTURE */ + /* 333 356 001(d8) 203 : NOAPX,FL,AESKLEWIDE_KL,FUTURE */ + {I_AESDECWIDE256KL, 1, {MEMORY|BITS512|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+69945, 436, 2879}, +}; + +static const struct itemplate instrux_AESENCWIDE128KL[1] = { + /* 0 : AESENCWIDE128KL mem [m: f3 0f38 d8 /0 ] FL,AESKLEWIDE_KL,FUTURE */ + /* 333 356 001(d8) 200 : NOAPX,FL,AESKLEWIDE_KL,FUTURE */ + {I_AESENCWIDE128KL, 1, {MEMORY|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+69951, 436, 2880}, +}; + +static const struct itemplate instrux_AESENCWIDE256KL[1] = { + /* 0 : AESENCWIDE256KL mem512 [m: f3 0f38 d8 /2 ] FL,AESKLEWIDE_KL,FUTURE */ + /* 333 356 001(d8) 202 : NOAPX,FL,AESKLEWIDE_KL,FUTURE */ + {I_AESENCWIDE256KL, 1, {MEMORY|BITS512|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+69957, 436, 2881}, +}; + +static const struct itemplate instrux_VADDPD[10] = { + /* 0 : VADDPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 58 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(58) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VADDPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+58512, 433, 2908}, + /* 1 : VADDPD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f 58 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(58) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VADDPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58519, 433, 2908}, + /* 2 : VADDPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 58 /r ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(58) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VADDPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+58526, 433, 2909}, + /* 3 : VADDPD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f 58 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 005) 001(58) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VADDPD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58533, 433, 2909}, + /* 4 : VADDPD xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f.w1 58 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(58) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VADDPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+30388, 543, 4719}, + /* 5 : VADDPD xmmreg|mask|z,xmmrm128|b64 [r+vm:fv: evex.nds.128.66.0f.w1 58 /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 fd 08) 301 001(58) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VADDPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+30397, 543, 4719}, + /* 6 : VADDPD ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f.w1 58 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(58) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VADDPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+30406, 543, 4720}, + /* 7 : VADDPD ymmreg|mask|z,ymmrm256|b64 [r+vm:fv: evex.nds.256.66.0f.w1 58 /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 fd 28) 301 001(58) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VADDPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+30415, 543, 4720}, + /* 8 : VADDPD zmmreg|mask|z,zmmreg*,zmmrm512|b64|er [rvm:fv: evex.nds.512.66.0f.w1 58 /r ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(58) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VADDPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+30424, 544, 4721}, + /* 9 : VADDPD zmmreg|mask|z,zmmrm512|b64|er [r+vm:fv: evex.nds.512.66.0f.w1 58 /r ] ND,AVX512,FUTURE */ + /* 240(f1 fd 48) 301 001(58) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VADDPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+30433, 544, 4721}, +}; + +static const struct itemplate instrux_VADDPS[10] = { + /* 0 : VADDPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f 58 /r ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(58) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VADDPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+58540, 433, 2910}, + /* 1 : VADDPS xmmreg,xmmrm128 [r+vm: vex.nds.128.0f 58 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 000) 001(58) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VADDPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58547, 433, 2910}, + /* 2 : VADDPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f 58 /r ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(58) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VADDPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+58554, 433, 2911}, + /* 3 : VADDPS ymmreg,ymmrm256 [r+vm: vex.nds.256.0f 58 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 004) 001(58) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VADDPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58561, 433, 2911}, + /* 4 : VADDPS xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.0f.w0 58 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(58) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VADDPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+30442, 543, 4722}, + /* 5 : VADDPS xmmreg|mask|z,xmmrm128|b32 [r+vm:fv: evex.nds.128.0f.w0 58 /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 7c 08) 301 001(58) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VADDPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+30451, 543, 4722}, + /* 6 : VADDPS ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.0f.w0 58 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(58) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VADDPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+30460, 543, 4723}, + /* 7 : VADDPS ymmreg|mask|z,ymmrm256|b32 [r+vm:fv: evex.nds.256.0f.w0 58 /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 7c 28) 301 001(58) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VADDPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+30469, 543, 4723}, + /* 8 : VADDPS zmmreg|mask|z,zmmreg*,zmmrm512|b32|er [rvm:fv: evex.nds.512.0f.w0 58 /r ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(58) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VADDPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+30478, 544, 4724}, + /* 9 : VADDPS zmmreg|mask|z,zmmrm512|b32|er [r+vm:fv: evex.nds.512.0f.w0 58 /r ] ND,AVX512,FUTURE */ + /* 240(f1 7c 48) 301 001(58) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VADDPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+30487, 544, 4724}, +}; + +static const struct itemplate instrux_VADDSD[4] = { + /* 0 : VADDSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f 58 /r ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(58) 120 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VADDSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+58568, 440, 2912}, + /* 1 : VADDSD xmmreg,xmmrm64 [r+vm: vex.nds.lig.f2.0f 58 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 003) 001(58) 110 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VADDSD, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58575, 440, 2912}, + /* 2 : VADDSD xmmreg|mask|z,xmmreg*,xmmrm64|er [rvm:t1s: evex.nds.lig.f2.0f.w1 58 /r ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(58) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VADDSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+30496, 545, 4725}, + /* 3 : VADDSD xmmreg|mask|z,xmmrm64|er [r+vm:t1s: evex.nds.lig.f2.0f.w1 58 /r ] ND,AVX512,FUTURE */ + /* 240(f1 ff 08) 306 001(58) 110 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VADDSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+30505, 545, 4725}, +}; + +static const struct itemplate instrux_VADDSS[4] = { + /* 0 : VADDSS xmmreg,xmmreg*,xmmrm32 [rvm: vex.nds.lig.f3.0f 58 /r ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(58) 120 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VADDSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+58582, 440, 2913}, + /* 1 : VADDSS xmmreg,xmmrm32 [r+vm: vex.nds.lig.f3.0f 58 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 002) 001(58) 110 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VADDSS, 2, {XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58589, 440, 2913}, + /* 2 : VADDSS xmmreg|mask|z,xmmreg*,xmmrm32|er [rvm:t1s: evex.nds.lig.f3.0f.w0 58 /r ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(58) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VADDSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+30514, 545, 4726}, + /* 3 : VADDSS xmmreg|mask|z,xmmrm32|er [r+vm:t1s: evex.nds.lig.f3.0f.w0 58 /r ] ND,AVX512,FUTURE */ + /* 240(f1 7e 08) 306 001(58) 110 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VADDSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+30523, 545, 4726}, +}; + +static const struct itemplate instrux_VADDSUBPD[4] = { + /* 0 : VADDSUBPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f d0 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(d0) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VADDSUBPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+58596, 433, 2914}, + /* 1 : VADDSUBPD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f d0 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(d0) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VADDSUBPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58603, 433, 2914}, + /* 2 : VADDSUBPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f d0 /r ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(d0) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VADDSUBPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+58610, 433, 2915}, + /* 3 : VADDSUBPD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f d0 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 005) 001(d0) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VADDSUBPD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58617, 433, 2915}, +}; + +static const struct itemplate instrux_VADDSUBPS[4] = { + /* 0 : VADDSUBPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.f2.0f d0 /r ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(d0) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VADDSUBPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+58624, 433, 2916}, + /* 1 : VADDSUBPS xmmreg,xmmrm128 [r+vm: vex.nds.128.f2.0f d0 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 003) 001(d0) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VADDSUBPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58631, 433, 2916}, + /* 2 : VADDSUBPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.f2.0f d0 /r ] AVX,SANDYBRIDGE */ + /* 261(001 007) 001(d0) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VADDSUBPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+58638, 433, 2917}, + /* 3 : VADDSUBPS ymmreg,ymmrm256 [r+vm: vex.nds.256.f2.0f d0 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 007) 001(d0) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VADDSUBPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58645, 433, 2917}, +}; + +static const struct itemplate instrux_VANDPD[10] = { + /* 0 : VANDPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 54 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(54) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VANDPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+58652, 433, 2918}, + /* 1 : VANDPD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f 54 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(54) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VANDPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58659, 433, 2918}, + /* 2 : VANDPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 54 /r ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(54) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VANDPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+58666, 433, 2919}, + /* 3 : VANDPD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f 54 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 005) 001(54) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VANDPD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58673, 433, 2919}, + /* 4 : VANDPD xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f.w1 54 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 241(f1 fd 08) 301 001(54) 120 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VANDPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+30640, 546, 4739}, + /* 5 : VANDPD xmmreg|mask|z,xmmrm128|b64 [r+vm:fv: evex.nds.128.66.0f.w1 54 /r ] ND,AVX512VL,AVX512DQ,FUTURE */ + /* 240(f1 fd 08) 301 001(54) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VANDPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+30649, 546, 4739}, + /* 6 : VANDPD ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f.w1 54 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 241(f1 fd 28) 301 001(54) 120 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VANDPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+30658, 546, 4740}, + /* 7 : VANDPD ymmreg|mask|z,ymmrm256|b64 [r+vm:fv: evex.nds.256.66.0f.w1 54 /r ] ND,AVX512VL,AVX512DQ,FUTURE */ + /* 240(f1 fd 28) 301 001(54) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VANDPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+30667, 546, 4740}, + /* 8 : VANDPD zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f.w1 54 /r ] AVX512DQ,FUTURE */ + /* 241(f1 fd 48) 301 001(54) 120 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VANDPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+30676, 547, 4741}, + /* 9 : VANDPD zmmreg|mask|z,zmmrm512|b64 [r+vm:fv: evex.nds.512.66.0f.w1 54 /r ] ND,AVX512DQ,FUTURE */ + /* 240(f1 fd 48) 301 001(54) 110 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VANDPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+30685, 547, 4741}, +}; + +static const struct itemplate instrux_VANDPS[10] = { + /* 0 : VANDPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f 54 /r ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(54) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VANDPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+58680, 433, 2920}, + /* 1 : VANDPS xmmreg,xmmrm128 [r+vm: vex.nds.128.0f 54 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 000) 001(54) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VANDPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58687, 433, 2920}, + /* 2 : VANDPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f 54 /r ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(54) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VANDPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+58694, 433, 2921}, + /* 3 : VANDPS ymmreg,ymmrm256 [r+vm: vex.nds.256.0f 54 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 004) 001(54) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VANDPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58701, 433, 2921}, + /* 4 : VANDPS xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.0f.w0 54 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 241(f1 7c 08) 301 001(54) 120 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VANDPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+30694, 546, 4742}, + /* 5 : VANDPS xmmreg|mask|z,xmmrm128|b32 [r+vm:fv: evex.nds.128.0f.w0 54 /r ] ND,AVX512VL,AVX512DQ,FUTURE */ + /* 240(f1 7c 08) 301 001(54) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VANDPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+30703, 546, 4742}, + /* 6 : VANDPS ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.0f.w0 54 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 241(f1 7c 28) 301 001(54) 120 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VANDPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+30712, 546, 4743}, + /* 7 : VANDPS ymmreg|mask|z,ymmrm256|b32 [r+vm:fv: evex.nds.256.0f.w0 54 /r ] ND,AVX512VL,AVX512DQ,FUTURE */ + /* 240(f1 7c 28) 301 001(54) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VANDPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+30721, 546, 4743}, + /* 8 : VANDPS zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.0f.w0 54 /r ] AVX512DQ,FUTURE */ + /* 241(f1 7c 48) 301 001(54) 120 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VANDPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+30730, 547, 4744}, + /* 9 : VANDPS zmmreg|mask|z,zmmrm512|b32 [r+vm:fv: evex.nds.512.0f.w0 54 /r ] ND,AVX512DQ,FUTURE */ + /* 240(f1 7c 48) 301 001(54) 110 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VANDPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+30739, 547, 4744}, +}; + +static const struct itemplate instrux_VANDNPD[10] = { + /* 0 : VANDNPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 55 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(55) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VANDNPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+58708, 433, 2922}, + /* 1 : VANDNPD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f 55 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(55) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VANDNPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58715, 433, 2922}, + /* 2 : VANDNPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 55 /r ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(55) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VANDNPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+58722, 433, 2923}, + /* 3 : VANDNPD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f 55 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 005) 001(55) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VANDNPD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58729, 433, 2923}, + /* 4 : VANDNPD xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f.w1 55 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 241(f1 fd 08) 301 001(55) 120 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VANDNPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+30532, 546, 4733}, + /* 5 : VANDNPD xmmreg|mask|z,xmmrm128|b64 [r+vm:fv: evex.nds.128.66.0f.w1 55 /r ] ND,AVX512VL,AVX512DQ,FUTURE */ + /* 240(f1 fd 08) 301 001(55) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VANDNPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+30541, 546, 4733}, + /* 6 : VANDNPD ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f.w1 55 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 241(f1 fd 28) 301 001(55) 120 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VANDNPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+30550, 546, 4734}, + /* 7 : VANDNPD ymmreg|mask|z,ymmrm256|b64 [r+vm:fv: evex.nds.256.66.0f.w1 55 /r ] ND,AVX512VL,AVX512DQ,FUTURE */ + /* 240(f1 fd 28) 301 001(55) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VANDNPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+30559, 546, 4734}, + /* 8 : VANDNPD zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f.w1 55 /r ] AVX512DQ,FUTURE */ + /* 241(f1 fd 48) 301 001(55) 120 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VANDNPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+30568, 547, 4735}, + /* 9 : VANDNPD zmmreg|mask|z,zmmrm512|b64 [r+vm:fv: evex.nds.512.66.0f.w1 55 /r ] ND,AVX512DQ,FUTURE */ + /* 240(f1 fd 48) 301 001(55) 110 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VANDNPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+30577, 547, 4735}, +}; + +static const struct itemplate instrux_VANDNPS[10] = { + /* 0 : VANDNPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f 55 /r ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(55) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VANDNPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+58736, 433, 2924}, + /* 1 : VANDNPS xmmreg,xmmrm128 [r+vm: vex.nds.128.0f 55 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 000) 001(55) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VANDNPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58743, 433, 2924}, + /* 2 : VANDNPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f 55 /r ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(55) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VANDNPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+58750, 433, 2925}, + /* 3 : VANDNPS ymmreg,ymmrm256 [r+vm: vex.nds.256.0f 55 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 004) 001(55) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VANDNPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58757, 433, 2925}, + /* 4 : VANDNPS xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.0f.w0 55 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 241(f1 7c 08) 301 001(55) 120 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VANDNPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+30586, 546, 4736}, + /* 5 : VANDNPS xmmreg|mask|z,xmmrm128|b32 [r+vm:fv: evex.nds.128.0f.w0 55 /r ] ND,AVX512VL,AVX512DQ,FUTURE */ + /* 240(f1 7c 08) 301 001(55) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VANDNPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+30595, 546, 4736}, + /* 6 : VANDNPS ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.0f.w0 55 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 241(f1 7c 28) 301 001(55) 120 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VANDNPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+30604, 546, 4737}, + /* 7 : VANDNPS ymmreg|mask|z,ymmrm256|b32 [r+vm:fv: evex.nds.256.0f.w0 55 /r ] ND,AVX512VL,AVX512DQ,FUTURE */ + /* 240(f1 7c 28) 301 001(55) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VANDNPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+30613, 546, 4737}, + /* 8 : VANDNPS zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.0f.w0 55 /r ] AVX512DQ,FUTURE */ + /* 241(f1 7c 48) 301 001(55) 120 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VANDNPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+30622, 547, 4738}, + /* 9 : VANDNPS zmmreg|mask|z,zmmrm512|b32 [r+vm:fv: evex.nds.512.0f.w0 55 /r ] ND,AVX512DQ,FUTURE */ + /* 240(f1 7c 48) 301 001(55) 110 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VANDNPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+30631, 547, 4738}, +}; + +static const struct itemplate instrux_VBLENDPD[4] = { + /* 0 : VBLENDPD xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: vex.nds.128.66.0f3a 0d /r ib ] AVX,SANDYBRIDGE */ + /* 261(003 001) 001(0d) 120 023 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VBLENDPD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+51747, 433, 2926}, + /* 1 : VBLENDPD xmmreg,xmmrm128,imm8 [r+vmi: vex.nds.128.66.0f3a 0d /r ib ] ND,AVX,SANDYBRIDGE */ + /* 260(003 001) 001(0d) 110 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VBLENDPD, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+51755, 433, 2926}, + /* 2 : VBLENDPD ymmreg,ymmreg*,ymmrm256,imm8 [rvmi: vex.nds.256.66.0f3a 0d /r ib ] AVX,SANDYBRIDGE */ + /* 261(003 005) 001(0d) 120 023 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VBLENDPD, 4, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+51763, 433, 2927}, + /* 3 : VBLENDPD ymmreg,ymmrm256,imm8 [r+vmi: vex.nds.256.66.0f3a 0d /r ib ] ND,AVX,SANDYBRIDGE */ + /* 260(003 005) 001(0d) 110 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VBLENDPD, 3, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+51771, 433, 2927}, +}; + +static const struct itemplate instrux_VBLENDPS[4] = { + /* 0 : VBLENDPS xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: vex.nds.128.66.0f3a 0c /r ib ] AVX,SANDYBRIDGE */ + /* 261(003 001) 001(0c) 120 023 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VBLENDPS, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+51779, 433, 2928}, + /* 1 : VBLENDPS xmmreg,xmmrm128,imm8 [r+vmi: vex.nds.128.66.0f3a 0c /r ib ] ND,AVX,SANDYBRIDGE */ + /* 260(003 001) 001(0c) 110 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VBLENDPS, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+51787, 433, 2928}, + /* 2 : VBLENDPS ymmreg,ymmreg*,ymmrm256,imm8 [rvmi: vex.nds.256.66.0f3a 0c /r ib ] AVX,SANDYBRIDGE */ + /* 261(003 005) 001(0c) 120 023 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VBLENDPS, 4, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+51795, 433, 2929}, + /* 3 : VBLENDPS ymmreg,ymmrm256,imm8 [r+vmi: vex.nds.256.66.0f3a 0c /r ib ] ND,AVX,SANDYBRIDGE */ + /* 260(003 005) 001(0c) 110 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VBLENDPS, 3, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+51803, 433, 2929}, +}; + +static const struct itemplate instrux_VBLENDVPD[4] = { + /* 0 : VBLENDVPD xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: vex.nds.128.66.0f3a.w0 4b /r /is4 ] AVX,SANDYBRIDGE */ + /* 261(003 001) 001(4b) 120 177 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VBLENDVPD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+51811, 441, 2930}, + /* 1 : VBLENDVPD xmmreg,xmmrm128,xmmreg [r+vms: vex.nds.128.66.0f3a.w0 4b /r /is4 ] ND,AVX,SANDYBRIDGE */ + /* 260(003 001) 001(4b) 110 176 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VBLENDVPD, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+51819, 441, 2930}, + /* 2 : VBLENDVPD ymmreg,ymmreg*,ymmrm256,ymmreg [rvms: vex.nds.256.66.0f3a.w0 4b /r /is4 ] AVX,SANDYBRIDGE */ + /* 261(003 005) 001(4b) 120 177 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VBLENDVPD, 4, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,YMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+51827, 441, 2931}, + /* 3 : VBLENDVPD ymmreg,ymmrm256,ymmreg [r+vms: vex.nds.256.66.0f3a.w0 4b /r /is4 ] ND,AVX,SANDYBRIDGE */ + /* 260(003 005) 001(4b) 110 176 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VBLENDVPD, 3, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,YMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+51835, 441, 2931}, +}; + +static const struct itemplate instrux_VBLENDVPS[4] = { + /* 0 : VBLENDVPS xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: vex.nds.128.66.0f3a.w0 4a /r /is4 ] AVX,SANDYBRIDGE */ + /* 261(003 001) 001(4a) 120 177 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VBLENDVPS, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+51843, 441, 2932}, + /* 1 : VBLENDVPS xmmreg,xmmrm128,xmmreg [r+vms: vex.nds.128.66.0f3a.w0 4a /r /is4 ] ND,AVX,SANDYBRIDGE */ + /* 260(003 001) 001(4a) 110 176 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VBLENDVPS, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+51851, 441, 2932}, + /* 2 : VBLENDVPS ymmreg,ymmreg*,ymmrm256,ymmreg [rvms: vex.nds.256.66.0f3a.w0 4a /r /is4 ] AVX,SANDYBRIDGE */ + /* 261(003 005) 001(4a) 120 177 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VBLENDVPS, 4, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,YMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+51859, 441, 2933}, + /* 3 : VBLENDVPS ymmreg,ymmrm256,ymmreg [r+vms: vex.nds.256.66.0f3a.w0 4a /r /is4 ] ND,AVX,SANDYBRIDGE */ + /* 260(003 005) 001(4a) 110 176 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VBLENDVPS, 3, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,YMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+51867, 441, 2933}, +}; + +static const struct itemplate instrux_VBROADCASTSS[10] = { + /* 0 : VBROADCASTSS xmmreg,mem32 [rm: vex.128.66.0f38.w0 18 /r ] AVX,SANDYBRIDGE */ + /* 270(002 001) 001(18) 110 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VBROADCASTSS, 2, {XMMREG|RN_L16,MEMORY|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58764, 441, 2934}, + /* 1 : VBROADCASTSS ymmreg,mem32 [rm: vex.256.66.0f38.w0 18 /r ] AVX,SANDYBRIDGE */ + /* 270(002 005) 001(18) 110 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VBROADCASTSS, 2, {YMMREG|RN_L16,MEMORY|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58771, 441, 2935}, + /* 2 : VBROADCASTSS xmmreg,xmmreg [rm: vex.128.66.0f38.w0 18 /r ] AVX2,FUTURE */ + /* 270(002 001) 001(18) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VBROADCASTSS, 2, {XMMREG|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58764, 468, 4213}, + /* 3 : VBROADCASTSS ymmreg,xmmreg [rm: vex.256.66.0f38.w0 18 /r ] AVX2,FUTURE */ + /* 270(002 005) 001(18) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VBROADCASTSS, 2, {YMMREG|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58771, 468, 4214}, + /* 4 : VBROADCASTSS xmmreg|mask|z,mem32 [rm:t1s: evex.128.66.0f38.w0 18 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 08) 306 001(18) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VBROADCASTSS, 2, {XMMREG,MEMORY|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+30991, 543, 4772}, + /* 5 : VBROADCASTSS ymmreg|mask|z,mem32 [rm:t1s: evex.256.66.0f38.w0 18 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 28) 306 001(18) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VBROADCASTSS, 2, {YMMREG,MEMORY|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+31000, 543, 4773}, + /* 6 : VBROADCASTSS zmmreg|mask|z,mem32 [rm:t1s: evex.512.66.0f38.w0 18 /r ] AVX512,FUTURE */ + /* 250(f2 7d 48) 306 001(18) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VBROADCASTSS, 2, {ZMMREG,MEMORY|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+31009, 544, 4774}, + /* 7 : VBROADCASTSS xmmreg|mask|z,xmmreg [rm: evex.128.66.0f38.w0 18 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 08) 300 001(18) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VBROADCASTSS, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+31018, 543, 4775}, + /* 8 : VBROADCASTSS ymmreg|mask|z,xmmreg [rm: evex.256.66.0f38.w0 18 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 28) 300 001(18) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VBROADCASTSS, 2, {YMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+31027, 543, 4776}, + /* 9 : VBROADCASTSS zmmreg|mask|z,xmmreg [rm: evex.512.66.0f38.w0 18 /r ] AVX512,FUTURE */ + /* 250(f2 7d 48) 300 001(18) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VBROADCASTSS, 2, {ZMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+31036, 544, 4777}, +}; + +static const struct itemplate instrux_VBROADCASTSD[6] = { + /* 0 : VBROADCASTSD ymmreg,mem64 [rm: vex.256.66.0f38.w0 19 /r ] AVX,SANDYBRIDGE */ + /* 270(002 005) 001(19) 110 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VBROADCASTSD, 2, {YMMREG|RN_L16,MEMORY|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58778, 441, 2936}, + /* 1 : VBROADCASTSD ymmreg,xmmreg [rm: vex.256.66.0f38.w0 19 /r ] AVX2,FUTURE */ + /* 270(002 005) 001(19) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VBROADCASTSD, 2, {YMMREG|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58778, 468, 4215}, + /* 2 : VBROADCASTSD ymmreg|mask|z,mem64 [rm:t1s: evex.256.66.0f38.w1 19 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 fd 28) 306 001(19) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VBROADCASTSD, 2, {YMMREG,MEMORY|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+30955, 543, 4768}, + /* 3 : VBROADCASTSD zmmreg|mask|z,mem64 [rm:t1s: evex.512.66.0f38.w1 19 /r ] AVX512,FUTURE */ + /* 250(f2 fd 48) 306 001(19) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VBROADCASTSD, 2, {ZMMREG,MEMORY|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+30964, 544, 4769}, + /* 4 : VBROADCASTSD ymmreg|mask|z,xmmreg [rm: evex.256.66.0f38.w1 19 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 fd 28) 300 001(19) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VBROADCASTSD, 2, {YMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+30973, 543, 4770}, + /* 5 : VBROADCASTSD zmmreg|mask|z,xmmreg [rm: evex.512.66.0f38.w1 19 /r ] AVX512,FUTURE */ + /* 250(f2 fd 48) 300 001(19) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VBROADCASTSD, 2, {ZMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+30982, 544, 4771}, +}; + +static const struct itemplate instrux_VBROADCASTF128[1] = { + /* 0 : VBROADCASTF128 ymmreg,mem128 [rm: vex.256.66.0f38.w0 1a /r ] AVX,SANDYBRIDGE */ + /* 270(002 005) 001(1a) 110 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VBROADCASTF128, 2, {YMMREG|RN_L16,MEMORY|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58785, 441, 2937}, +}; + +static const struct itemplate instrux_VCMPEQ_OSPD[11] = { + /* 0 : VCMPEQ_OSPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 10 ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(10) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQ_OSPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+25960, 433, 2939}, + /* 1 : VCMPEQ_OSPD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f c2 /r 10 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(c2) 110 001(10) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQ_OSPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+25969, 433, 2939}, + /* 2 : VCMPEQ_OSPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 10 ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(10) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQ_OSPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+25978, 433, 2940}, + /* 3 : VCMPEQ_OSPD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f c2 /r 10 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 005) 001(c2) 110 001(10) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQ_OSPD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+25987, 433, 2940}, + /* 4 : VCMPEQ_OSPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 10 ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(10) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQ_OSPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+25960, 433, 2999}, + /* 5 : VCMPEQ_OSPD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f c2 /r 10 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(c2) 110 001(10) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQ_OSPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+25969, 433, 2999}, + /* 6 : VCMPEQ_OSPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 10 ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(10) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQ_OSPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+25978, 433, 3000}, + /* 7 : VCMPEQ_OSPD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f c2 /r 10 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 005) 001(c2) 110 001(10) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQ_OSPD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+25987, 433, 3000}, + /* 8 : VCMPEQ_OSPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 10 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(10) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPEQ_OSPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+6151, 543, 5018}, + /* 9 : VCMPEQ_OSPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 10 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(10) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPEQ_OSPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+6162, 543, 5019}, + /* 10 : VCMPEQ_OSPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 10 ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(10) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPEQ_OSPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+6173, 544, 5020}, +}; + +static const struct itemplate instrux_VCMPEQPD[7] = { + /* 0 : VCMPEQPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 00 ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(00) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+25996, 433, 2941}, + /* 1 : VCMPEQPD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f c2 /r 00 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(c2) 110 001(00) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26005, 433, 2941}, + /* 2 : VCMPEQPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 00 ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(00) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26014, 433, 2942}, + /* 3 : VCMPEQPD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f c2 /r 00 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 005) 001(c2) 110 001(00) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQPD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26023, 433, 2942}, + /* 4 : VCMPEQPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 00 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(00) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPEQPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+4743, 543, 4778}, + /* 5 : VCMPEQPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 00 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(00) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPEQPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+4754, 543, 4779}, + /* 6 : VCMPEQPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 00 ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(00) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPEQPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+4765, 544, 4780}, +}; + +static const struct itemplate instrux_VCMPLT_OSPD[7] = { + /* 0 : VCMPLT_OSPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 01 ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(01) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLT_OSPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26032, 433, 2943}, + /* 1 : VCMPLT_OSPD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f c2 /r 01 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(c2) 110 001(01) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLT_OSPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26041, 433, 2943}, + /* 2 : VCMPLT_OSPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 01 ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(01) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLT_OSPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26050, 433, 2944}, + /* 3 : VCMPLT_OSPD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f c2 /r 01 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 005) 001(c2) 110 001(01) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLT_OSPD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26059, 433, 2944}, + /* 4 : VCMPLT_OSPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 01 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(01) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPLT_OSPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+4831, 543, 4802}, + /* 5 : VCMPLT_OSPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 01 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(01) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPLT_OSPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+4842, 543, 4803}, + /* 6 : VCMPLT_OSPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 01 ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(01) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPLT_OSPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+4853, 544, 4804}, +}; + +static const struct itemplate instrux_VCMPLTPD[7] = { + /* 0 : VCMPLTPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 01 ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(01) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLTPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26032, 433, 2945}, + /* 1 : VCMPLTPD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f c2 /r 01 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(c2) 110 001(01) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLTPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26041, 433, 2945}, + /* 2 : VCMPLTPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 01 ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(01) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLTPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26050, 433, 2946}, + /* 3 : VCMPLTPD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f c2 /r 01 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 005) 001(c2) 110 001(01) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLTPD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26059, 433, 2946}, + /* 4 : VCMPLTPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 01 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(01) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPLTPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+4831, 543, 4794}, + /* 5 : VCMPLTPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 01 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(01) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPLTPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+4842, 543, 4795}, + /* 6 : VCMPLTPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 01 ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(01) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPLTPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+4853, 544, 4796}, +}; + +static const struct itemplate instrux_VCMPLE_OSPD[7] = { + /* 0 : VCMPLE_OSPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 02 ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(02) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLE_OSPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26068, 433, 2947}, + /* 1 : VCMPLE_OSPD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f c2 /r 02 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(c2) 110 001(02) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLE_OSPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26077, 433, 2947}, + /* 2 : VCMPLE_OSPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 02 ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(02) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLE_OSPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26086, 433, 2948}, + /* 3 : VCMPLE_OSPD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f c2 /r 02 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 005) 001(c2) 110 001(02) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLE_OSPD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26095, 433, 2948}, + /* 4 : VCMPLE_OSPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 02 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(02) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPLE_OSPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+4919, 543, 4818}, + /* 5 : VCMPLE_OSPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 02 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(02) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPLE_OSPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+4930, 543, 4819}, + /* 6 : VCMPLE_OSPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 02 ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(02) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPLE_OSPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+4941, 544, 4820}, +}; + +static const struct itemplate instrux_VCMPLEPD[7] = { + /* 0 : VCMPLEPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 02 ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(02) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLEPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26068, 433, 2949}, + /* 1 : VCMPLEPD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f c2 /r 02 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(c2) 110 001(02) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLEPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26077, 433, 2949}, + /* 2 : VCMPLEPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 02 ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(02) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLEPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26086, 433, 2950}, + /* 3 : VCMPLEPD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f c2 /r 02 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 005) 001(c2) 110 001(02) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLEPD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26095, 433, 2950}, + /* 4 : VCMPLEPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 02 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(02) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPLEPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+4919, 543, 4810}, + /* 5 : VCMPLEPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 02 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(02) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPLEPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+4930, 543, 4811}, + /* 6 : VCMPLEPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 02 ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(02) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPLEPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+4941, 544, 4812}, +}; + +static const struct itemplate instrux_VCMPUNORD_QPD[7] = { + /* 0 : VCMPUNORD_QPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 03 ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(03) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPUNORD_QPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26104, 433, 2951}, + /* 1 : VCMPUNORD_QPD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f c2 /r 03 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(c2) 110 001(03) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPUNORD_QPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26113, 433, 2951}, + /* 2 : VCMPUNORD_QPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 03 ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(03) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPUNORD_QPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26122, 433, 2952}, + /* 3 : VCMPUNORD_QPD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f c2 /r 03 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 005) 001(c2) 110 001(03) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPUNORD_QPD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26131, 433, 2952}, + /* 4 : VCMPUNORD_QPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 03 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(03) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPUNORD_QPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5007, 543, 4834}, + /* 5 : VCMPUNORD_QPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 03 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(03) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPUNORD_QPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5018, 543, 4835}, + /* 6 : VCMPUNORD_QPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 03 ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(03) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPUNORD_QPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+5029, 544, 4836}, +}; + +static const struct itemplate instrux_VCMPUNORDPD[7] = { + /* 0 : VCMPUNORDPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 03 ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(03) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPUNORDPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26104, 433, 2953}, + /* 1 : VCMPUNORDPD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f c2 /r 03 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(c2) 110 001(03) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPUNORDPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26113, 433, 2953}, + /* 2 : VCMPUNORDPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 03 ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(03) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPUNORDPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26122, 433, 2954}, + /* 3 : VCMPUNORDPD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f c2 /r 03 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 005) 001(c2) 110 001(03) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPUNORDPD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26131, 433, 2954}, + /* 4 : VCMPUNORDPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 03 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(03) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPUNORDPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5007, 543, 4826}, + /* 5 : VCMPUNORDPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 03 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(03) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPUNORDPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5018, 543, 4827}, + /* 6 : VCMPUNORDPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 03 ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(03) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPUNORDPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+5029, 544, 4828}, +}; + +static const struct itemplate instrux_VCMPNEQ_UQPD[7] = { + /* 0 : VCMPNEQ_UQPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 04 ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(04) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQ_UQPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26140, 433, 2955}, + /* 1 : VCMPNEQ_UQPD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f c2 /r 04 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(c2) 110 001(04) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQ_UQPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26149, 433, 2955}, + /* 2 : VCMPNEQ_UQPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 04 ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(04) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQ_UQPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26158, 433, 2956}, + /* 3 : VCMPNEQ_UQPD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f c2 /r 04 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 005) 001(c2) 110 001(04) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQ_UQPD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26167, 433, 2956}, + /* 4 : VCMPNEQ_UQPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 04 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(04) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNEQ_UQPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5095, 543, 4850}, + /* 5 : VCMPNEQ_UQPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 04 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(04) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNEQ_UQPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5106, 543, 4851}, + /* 6 : VCMPNEQ_UQPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 04 ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(04) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNEQ_UQPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+5117, 544, 4852}, +}; + +static const struct itemplate instrux_VCMPNEQPD[7] = { + /* 0 : VCMPNEQPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 04 ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(04) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26140, 433, 2957}, + /* 1 : VCMPNEQPD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f c2 /r 04 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(c2) 110 001(04) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26149, 433, 2957}, + /* 2 : VCMPNEQPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 04 ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(04) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26158, 433, 2958}, + /* 3 : VCMPNEQPD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f c2 /r 04 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 005) 001(c2) 110 001(04) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQPD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26167, 433, 2958}, + /* 4 : VCMPNEQPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 04 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(04) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNEQPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5095, 543, 4842}, + /* 5 : VCMPNEQPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 04 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(04) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNEQPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5106, 543, 4843}, + /* 6 : VCMPNEQPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 04 ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(04) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNEQPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+5117, 544, 4844}, +}; + +static const struct itemplate instrux_VCMPNLT_USPD[7] = { + /* 0 : VCMPNLT_USPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 05 ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(05) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLT_USPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26176, 433, 2959}, + /* 1 : VCMPNLT_USPD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f c2 /r 05 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(c2) 110 001(05) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLT_USPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26185, 433, 2959}, + /* 2 : VCMPNLT_USPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 05 ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(05) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLT_USPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26194, 433, 2960}, + /* 3 : VCMPNLT_USPD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f c2 /r 05 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 005) 001(c2) 110 001(05) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLT_USPD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26203, 433, 2960}, + /* 4 : VCMPNLT_USPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 05 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(05) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNLT_USPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5183, 543, 4866}, + /* 5 : VCMPNLT_USPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 05 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(05) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNLT_USPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5194, 543, 4867}, + /* 6 : VCMPNLT_USPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 05 ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(05) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNLT_USPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+5205, 544, 4868}, +}; + +static const struct itemplate instrux_VCMPNLTPD[7] = { + /* 0 : VCMPNLTPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 05 ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(05) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLTPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26176, 433, 2961}, + /* 1 : VCMPNLTPD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f c2 /r 05 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(c2) 110 001(05) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLTPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26185, 433, 2961}, + /* 2 : VCMPNLTPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 05 ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(05) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLTPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26194, 433, 2962}, + /* 3 : VCMPNLTPD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f c2 /r 05 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 005) 001(c2) 110 001(05) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLTPD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26203, 433, 2962}, + /* 4 : VCMPNLTPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 05 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(05) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNLTPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5183, 543, 4858}, + /* 5 : VCMPNLTPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 05 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(05) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNLTPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5194, 543, 4859}, + /* 6 : VCMPNLTPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 05 ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(05) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNLTPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+5205, 544, 4860}, +}; + +static const struct itemplate instrux_VCMPNLE_USPD[7] = { + /* 0 : VCMPNLE_USPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 06 ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(06) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLE_USPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26212, 433, 2963}, + /* 1 : VCMPNLE_USPD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f c2 /r 06 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(c2) 110 001(06) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLE_USPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26221, 433, 2963}, + /* 2 : VCMPNLE_USPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 06 ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(06) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLE_USPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26230, 433, 2964}, + /* 3 : VCMPNLE_USPD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f c2 /r 06 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 005) 001(c2) 110 001(06) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLE_USPD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26239, 433, 2964}, + /* 4 : VCMPNLE_USPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 06 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(06) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNLE_USPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5271, 543, 4882}, + /* 5 : VCMPNLE_USPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 06 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(06) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNLE_USPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5282, 543, 4883}, + /* 6 : VCMPNLE_USPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 06 ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(06) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNLE_USPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+5293, 544, 4884}, +}; + +static const struct itemplate instrux_VCMPNLEPD[7] = { + /* 0 : VCMPNLEPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 06 ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(06) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLEPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26212, 433, 2965}, + /* 1 : VCMPNLEPD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f c2 /r 06 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(c2) 110 001(06) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLEPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26221, 433, 2965}, + /* 2 : VCMPNLEPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 06 ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(06) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLEPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26230, 433, 2966}, + /* 3 : VCMPNLEPD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f c2 /r 06 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 005) 001(c2) 110 001(06) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLEPD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26239, 433, 2966}, + /* 4 : VCMPNLEPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 06 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(06) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNLEPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5271, 543, 4874}, + /* 5 : VCMPNLEPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 06 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(06) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNLEPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5282, 543, 4875}, + /* 6 : VCMPNLEPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 06 ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(06) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNLEPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+5293, 544, 4876}, +}; + +static const struct itemplate instrux_VCMPORD_QPD[7] = { + /* 0 : VCMPORD_QPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 07 ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(07) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPORD_QPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26248, 433, 2967}, + /* 1 : VCMPORD_QPD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f c2 /r 07 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(c2) 110 001(07) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPORD_QPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26257, 433, 2967}, + /* 2 : VCMPORD_QPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 07 ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(07) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPORD_QPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26266, 433, 2968}, + /* 3 : VCMPORD_QPD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f c2 /r 07 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 005) 001(c2) 110 001(07) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPORD_QPD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26275, 433, 2968}, + /* 4 : VCMPORD_QPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 07 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(07) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPORD_QPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5359, 543, 4898}, + /* 5 : VCMPORD_QPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 07 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(07) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPORD_QPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5370, 543, 4899}, + /* 6 : VCMPORD_QPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 07 ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(07) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPORD_QPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+5381, 544, 4900}, +}; + +static const struct itemplate instrux_VCMPORDPD[7] = { + /* 0 : VCMPORDPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 07 ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(07) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPORDPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26248, 433, 2969}, + /* 1 : VCMPORDPD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f c2 /r 07 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(c2) 110 001(07) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPORDPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26257, 433, 2969}, + /* 2 : VCMPORDPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 07 ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(07) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPORDPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26266, 433, 2970}, + /* 3 : VCMPORDPD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f c2 /r 07 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 005) 001(c2) 110 001(07) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPORDPD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26275, 433, 2970}, + /* 4 : VCMPORDPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 07 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(07) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPORDPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5359, 543, 4890}, + /* 5 : VCMPORDPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 07 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(07) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPORDPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5370, 543, 4891}, + /* 6 : VCMPORDPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 07 ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(07) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPORDPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+5381, 544, 4892}, +}; + +static const struct itemplate instrux_VCMPEQ_UQPD[7] = { + /* 0 : VCMPEQ_UQPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 08 ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(08) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQ_UQPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26284, 433, 2971}, + /* 1 : VCMPEQ_UQPD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f c2 /r 08 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(c2) 110 001(08) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQ_UQPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26293, 433, 2971}, + /* 2 : VCMPEQ_UQPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 08 ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(08) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQ_UQPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26302, 433, 2972}, + /* 3 : VCMPEQ_UQPD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f c2 /r 08 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 005) 001(c2) 110 001(08) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQ_UQPD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26311, 433, 2972}, + /* 4 : VCMPEQ_UQPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 08 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(08) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPEQ_UQPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5447, 543, 4906}, + /* 5 : VCMPEQ_UQPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 08 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(08) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPEQ_UQPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5458, 543, 4907}, + /* 6 : VCMPEQ_UQPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 08 ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(08) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPEQ_UQPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+5469, 544, 4908}, +}; + +static const struct itemplate instrux_VCMPNGE_USPD[7] = { + /* 0 : VCMPNGE_USPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 09 ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(09) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGE_USPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26320, 433, 2973}, + /* 1 : VCMPNGE_USPD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f c2 /r 09 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(c2) 110 001(09) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGE_USPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26329, 433, 2973}, + /* 2 : VCMPNGE_USPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 09 ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(09) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGE_USPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26338, 433, 2974}, + /* 3 : VCMPNGE_USPD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f c2 /r 09 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 005) 001(c2) 110 001(09) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGE_USPD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26347, 433, 2974}, + /* 4 : VCMPNGE_USPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 09 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(09) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNGE_USPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5535, 543, 4922}, + /* 5 : VCMPNGE_USPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 09 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(09) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNGE_USPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5546, 543, 4923}, + /* 6 : VCMPNGE_USPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 09 ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(09) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNGE_USPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+5557, 544, 4924}, +}; + +static const struct itemplate instrux_VCMPNGEPD[7] = { + /* 0 : VCMPNGEPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 09 ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(09) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGEPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26320, 433, 2975}, + /* 1 : VCMPNGEPD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f c2 /r 09 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(c2) 110 001(09) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGEPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26329, 433, 2975}, + /* 2 : VCMPNGEPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 09 ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(09) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGEPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26338, 433, 2976}, + /* 3 : VCMPNGEPD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f c2 /r 09 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 005) 001(c2) 110 001(09) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGEPD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26347, 433, 2976}, + /* 4 : VCMPNGEPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 09 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(09) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNGEPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5535, 543, 4914}, + /* 5 : VCMPNGEPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 09 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(09) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNGEPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5546, 543, 4915}, + /* 6 : VCMPNGEPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 09 ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(09) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNGEPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+5557, 544, 4916}, +}; + +static const struct itemplate instrux_VCMPNGT_USPD[7] = { + /* 0 : VCMPNGT_USPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 0a ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(0a) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGT_USPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26356, 433, 2977}, + /* 1 : VCMPNGT_USPD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f c2 /r 0a ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(c2) 110 001(0a) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGT_USPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26365, 433, 2977}, + /* 2 : VCMPNGT_USPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 0a ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(0a) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGT_USPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26374, 433, 2978}, + /* 3 : VCMPNGT_USPD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f c2 /r 0a ] ND,AVX,SANDYBRIDGE */ + /* 260(001 005) 001(c2) 110 001(0a) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGT_USPD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26383, 433, 2978}, + /* 4 : VCMPNGT_USPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 0a ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(0a) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNGT_USPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5623, 543, 4938}, + /* 5 : VCMPNGT_USPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 0a ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(0a) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNGT_USPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5634, 543, 4939}, + /* 6 : VCMPNGT_USPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 0a ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(0a) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNGT_USPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+5645, 544, 4940}, +}; + +static const struct itemplate instrux_VCMPNGTPD[7] = { + /* 0 : VCMPNGTPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 0a ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(0a) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGTPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26356, 433, 2979}, + /* 1 : VCMPNGTPD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f c2 /r 0a ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(c2) 110 001(0a) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGTPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26365, 433, 2979}, + /* 2 : VCMPNGTPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 0a ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(0a) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGTPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26374, 433, 2980}, + /* 3 : VCMPNGTPD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f c2 /r 0a ] ND,AVX,SANDYBRIDGE */ + /* 260(001 005) 001(c2) 110 001(0a) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGTPD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26383, 433, 2980}, + /* 4 : VCMPNGTPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 0a ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(0a) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNGTPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5623, 543, 4930}, + /* 5 : VCMPNGTPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 0a ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(0a) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNGTPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5634, 543, 4931}, + /* 6 : VCMPNGTPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 0a ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(0a) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNGTPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+5645, 544, 4932}, +}; + +static const struct itemplate instrux_VCMPFALSE_OQPD[7] = { + /* 0 : VCMPFALSE_OQPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 0b ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(0b) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPFALSE_OQPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26392, 433, 2981}, + /* 1 : VCMPFALSE_OQPD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f c2 /r 0b ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(c2) 110 001(0b) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPFALSE_OQPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26401, 433, 2981}, + /* 2 : VCMPFALSE_OQPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 0b ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(0b) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPFALSE_OQPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26410, 433, 2982}, + /* 3 : VCMPFALSE_OQPD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f c2 /r 0b ] ND,AVX,SANDYBRIDGE */ + /* 260(001 005) 001(c2) 110 001(0b) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPFALSE_OQPD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26419, 433, 2982}, + /* 4 : VCMPFALSE_OQPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 0b ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(0b) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPFALSE_OQPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5711, 543, 4954}, + /* 5 : VCMPFALSE_OQPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 0b ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(0b) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPFALSE_OQPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5722, 543, 4955}, + /* 6 : VCMPFALSE_OQPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 0b ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(0b) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPFALSE_OQPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+5733, 544, 4956}, +}; + +static const struct itemplate instrux_VCMPFALSEPD[7] = { + /* 0 : VCMPFALSEPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 0b ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(0b) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPFALSEPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26392, 433, 2983}, + /* 1 : VCMPFALSEPD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f c2 /r 0b ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(c2) 110 001(0b) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPFALSEPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26401, 433, 2983}, + /* 2 : VCMPFALSEPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 0b ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(0b) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPFALSEPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26410, 433, 2984}, + /* 3 : VCMPFALSEPD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f c2 /r 0b ] ND,AVX,SANDYBRIDGE */ + /* 260(001 005) 001(c2) 110 001(0b) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPFALSEPD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26419, 433, 2984}, + /* 4 : VCMPFALSEPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 0b ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(0b) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPFALSEPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5711, 543, 4946}, + /* 5 : VCMPFALSEPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 0b ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(0b) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPFALSEPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5722, 543, 4947}, + /* 6 : VCMPFALSEPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 0b ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(0b) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPFALSEPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+5733, 544, 4948}, +}; + +static const struct itemplate instrux_VCMPNEQ_OQPD[7] = { + /* 0 : VCMPNEQ_OQPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 0c ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(0c) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQ_OQPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26428, 433, 2985}, + /* 1 : VCMPNEQ_OQPD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f c2 /r 0c ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(c2) 110 001(0c) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQ_OQPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26437, 433, 2985}, + /* 2 : VCMPNEQ_OQPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 0c ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(0c) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQ_OQPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26446, 433, 2986}, + /* 3 : VCMPNEQ_OQPD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f c2 /r 0c ] ND,AVX,SANDYBRIDGE */ + /* 260(001 005) 001(c2) 110 001(0c) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQ_OQPD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26455, 433, 2986}, + /* 4 : VCMPNEQ_OQPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 0c ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(0c) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNEQ_OQPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5799, 543, 4962}, + /* 5 : VCMPNEQ_OQPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 0c ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(0c) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNEQ_OQPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5810, 543, 4963}, + /* 6 : VCMPNEQ_OQPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 0c ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(0c) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNEQ_OQPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+5821, 544, 4964}, +}; + +static const struct itemplate instrux_VCMPGE_OSPD[7] = { + /* 0 : VCMPGE_OSPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 0d ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(0d) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGE_OSPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26464, 433, 2987}, + /* 1 : VCMPGE_OSPD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f c2 /r 0d ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(c2) 110 001(0d) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGE_OSPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26473, 433, 2987}, + /* 2 : VCMPGE_OSPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 0d ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(0d) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGE_OSPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26482, 433, 2988}, + /* 3 : VCMPGE_OSPD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f c2 /r 0d ] ND,AVX,SANDYBRIDGE */ + /* 260(001 005) 001(c2) 110 001(0d) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGE_OSPD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26491, 433, 2988}, + /* 4 : VCMPGE_OSPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 0d ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(0d) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPGE_OSPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5887, 543, 4978}, + /* 5 : VCMPGE_OSPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 0d ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(0d) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPGE_OSPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5898, 543, 4979}, + /* 6 : VCMPGE_OSPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 0d ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(0d) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPGE_OSPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+5909, 544, 4980}, +}; + +static const struct itemplate instrux_VCMPGEPD[7] = { + /* 0 : VCMPGEPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 0d ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(0d) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGEPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26464, 433, 2989}, + /* 1 : VCMPGEPD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f c2 /r 0d ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(c2) 110 001(0d) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGEPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26473, 433, 2989}, + /* 2 : VCMPGEPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 0d ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(0d) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGEPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26482, 433, 2990}, + /* 3 : VCMPGEPD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f c2 /r 0d ] ND,AVX,SANDYBRIDGE */ + /* 260(001 005) 001(c2) 110 001(0d) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGEPD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26491, 433, 2990}, + /* 4 : VCMPGEPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 0d ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(0d) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPGEPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5887, 543, 4970}, + /* 5 : VCMPGEPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 0d ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(0d) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPGEPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5898, 543, 4971}, + /* 6 : VCMPGEPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 0d ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(0d) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPGEPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+5909, 544, 4972}, +}; + +static const struct itemplate instrux_VCMPGT_OSPD[7] = { + /* 0 : VCMPGT_OSPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 0e ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(0e) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGT_OSPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26500, 433, 2991}, + /* 1 : VCMPGT_OSPD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f c2 /r 0e ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(c2) 110 001(0e) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGT_OSPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26509, 433, 2991}, + /* 2 : VCMPGT_OSPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 0e ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(0e) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGT_OSPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26518, 433, 2992}, + /* 3 : VCMPGT_OSPD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f c2 /r 0e ] ND,AVX,SANDYBRIDGE */ + /* 260(001 005) 001(c2) 110 001(0e) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGT_OSPD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26527, 433, 2992}, + /* 4 : VCMPGT_OSPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 0e ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(0e) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPGT_OSPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5975, 543, 4994}, + /* 5 : VCMPGT_OSPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 0e ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(0e) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPGT_OSPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5986, 543, 4995}, + /* 6 : VCMPGT_OSPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 0e ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(0e) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPGT_OSPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+5997, 544, 4996}, +}; + +static const struct itemplate instrux_VCMPGTPD[7] = { + /* 0 : VCMPGTPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 0e ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(0e) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGTPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26500, 433, 2993}, + /* 1 : VCMPGTPD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f c2 /r 0e ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(c2) 110 001(0e) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGTPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26509, 433, 2993}, + /* 2 : VCMPGTPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 0e ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(0e) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGTPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26518, 433, 2994}, + /* 3 : VCMPGTPD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f c2 /r 0e ] ND,AVX,SANDYBRIDGE */ + /* 260(001 005) 001(c2) 110 001(0e) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGTPD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26527, 433, 2994}, + /* 4 : VCMPGTPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 0e ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(0e) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPGTPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5975, 543, 4986}, + /* 5 : VCMPGTPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 0e ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(0e) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPGTPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5986, 543, 4987}, + /* 6 : VCMPGTPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 0e ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(0e) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPGTPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+5997, 544, 4988}, +}; + +static const struct itemplate instrux_VCMPTRUE_UQPD[7] = { + /* 0 : VCMPTRUE_UQPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 0f ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(0f) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPTRUE_UQPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26536, 433, 2995}, + /* 1 : VCMPTRUE_UQPD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f c2 /r 0f ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(c2) 110 001(0f) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPTRUE_UQPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26545, 433, 2995}, + /* 2 : VCMPTRUE_UQPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 0f ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(0f) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPTRUE_UQPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26554, 433, 2996}, + /* 3 : VCMPTRUE_UQPD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f c2 /r 0f ] ND,AVX,SANDYBRIDGE */ + /* 260(001 005) 001(c2) 110 001(0f) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPTRUE_UQPD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26563, 433, 2996}, + /* 4 : VCMPTRUE_UQPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 0f ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(0f) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPTRUE_UQPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+6063, 543, 5010}, + /* 5 : VCMPTRUE_UQPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 0f ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(0f) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPTRUE_UQPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+6074, 543, 5011}, + /* 6 : VCMPTRUE_UQPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 0f ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(0f) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPTRUE_UQPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+6085, 544, 5012}, +}; + +static const struct itemplate instrux_VCMPTRUEPD[7] = { + /* 0 : VCMPTRUEPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 0f ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(0f) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPTRUEPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26536, 433, 2997}, + /* 1 : VCMPTRUEPD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f c2 /r 0f ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(c2) 110 001(0f) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPTRUEPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26545, 433, 2997}, + /* 2 : VCMPTRUEPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 0f ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(0f) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPTRUEPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26554, 433, 2998}, + /* 3 : VCMPTRUEPD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f c2 /r 0f ] ND,AVX,SANDYBRIDGE */ + /* 260(001 005) 001(c2) 110 001(0f) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPTRUEPD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26563, 433, 2998}, + /* 4 : VCMPTRUEPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 0f ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(0f) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPTRUEPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+6063, 543, 5002}, + /* 5 : VCMPTRUEPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 0f ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(0f) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPTRUEPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+6074, 543, 5003}, + /* 6 : VCMPTRUEPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 0f ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(0f) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPTRUEPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+6085, 544, 5004}, +}; + +static const struct itemplate instrux_VCMPLT_OQPD[7] = { + /* 0 : VCMPLT_OQPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 11 ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(11) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLT_OQPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26572, 433, 3001}, + /* 1 : VCMPLT_OQPD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f c2 /r 11 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(c2) 110 001(11) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLT_OQPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26581, 433, 3001}, + /* 2 : VCMPLT_OQPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 11 ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(11) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLT_OQPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26590, 433, 3002}, + /* 3 : VCMPLT_OQPD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f c2 /r 11 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 005) 001(c2) 110 001(11) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLT_OQPD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26599, 433, 3002}, + /* 4 : VCMPLT_OQPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 11 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(11) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPLT_OQPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+6239, 543, 5026}, + /* 5 : VCMPLT_OQPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 11 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(11) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPLT_OQPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+6250, 543, 5027}, + /* 6 : VCMPLT_OQPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 11 ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(11) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPLT_OQPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+6261, 544, 5028}, +}; + +static const struct itemplate instrux_VCMPLE_OQPD[7] = { + /* 0 : VCMPLE_OQPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 12 ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(12) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLE_OQPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26608, 433, 3003}, + /* 1 : VCMPLE_OQPD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f c2 /r 12 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(c2) 110 001(12) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLE_OQPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26617, 433, 3003}, + /* 2 : VCMPLE_OQPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 12 ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(12) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLE_OQPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26626, 433, 3004}, + /* 3 : VCMPLE_OQPD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f c2 /r 12 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 005) 001(c2) 110 001(12) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLE_OQPD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26635, 433, 3004}, + /* 4 : VCMPLE_OQPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 12 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(12) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPLE_OQPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+6327, 543, 5034}, + /* 5 : VCMPLE_OQPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 12 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(12) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPLE_OQPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+6338, 543, 5035}, + /* 6 : VCMPLE_OQPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 12 ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(12) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPLE_OQPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+6349, 544, 5036}, +}; + +static const struct itemplate instrux_VCMPUNORD_SPD[7] = { + /* 0 : VCMPUNORD_SPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 13 ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(13) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPUNORD_SPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26644, 433, 3005}, + /* 1 : VCMPUNORD_SPD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f c2 /r 13 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(c2) 110 001(13) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPUNORD_SPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26653, 433, 3005}, + /* 2 : VCMPUNORD_SPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 13 ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(13) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPUNORD_SPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26662, 433, 3006}, + /* 3 : VCMPUNORD_SPD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f c2 /r 13 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 005) 001(c2) 110 001(13) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPUNORD_SPD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26671, 433, 3006}, + /* 4 : VCMPUNORD_SPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 13 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(13) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPUNORD_SPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+6415, 543, 5042}, + /* 5 : VCMPUNORD_SPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 13 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(13) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPUNORD_SPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+6426, 543, 5043}, + /* 6 : VCMPUNORD_SPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 13 ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(13) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPUNORD_SPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+6437, 544, 5044}, +}; + +static const struct itemplate instrux_VCMPNEQ_USPD[7] = { + /* 0 : VCMPNEQ_USPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 14 ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(14) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQ_USPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26680, 433, 3007}, + /* 1 : VCMPNEQ_USPD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f c2 /r 14 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(c2) 110 001(14) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQ_USPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26689, 433, 3007}, + /* 2 : VCMPNEQ_USPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 14 ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(14) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQ_USPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26698, 433, 3008}, + /* 3 : VCMPNEQ_USPD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f c2 /r 14 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 005) 001(c2) 110 001(14) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQ_USPD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26707, 433, 3008}, + /* 4 : VCMPNEQ_USPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 14 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(14) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNEQ_USPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+6503, 543, 5050}, + /* 5 : VCMPNEQ_USPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 14 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(14) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNEQ_USPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+6514, 543, 5051}, + /* 6 : VCMPNEQ_USPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 14 ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(14) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNEQ_USPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+6525, 544, 5052}, +}; + +static const struct itemplate instrux_VCMPNLT_UQPD[7] = { + /* 0 : VCMPNLT_UQPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 15 ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(15) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLT_UQPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26716, 433, 3009}, + /* 1 : VCMPNLT_UQPD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f c2 /r 15 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(c2) 110 001(15) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLT_UQPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26725, 433, 3009}, + /* 2 : VCMPNLT_UQPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 15 ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(15) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLT_UQPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26734, 433, 3010}, + /* 3 : VCMPNLT_UQPD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f c2 /r 15 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 005) 001(c2) 110 001(15) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLT_UQPD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26743, 433, 3010}, + /* 4 : VCMPNLT_UQPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 15 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(15) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNLT_UQPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+6591, 543, 5058}, + /* 5 : VCMPNLT_UQPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 15 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(15) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNLT_UQPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+6602, 543, 5059}, + /* 6 : VCMPNLT_UQPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 15 ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(15) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNLT_UQPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+6613, 544, 5060}, +}; + +static const struct itemplate instrux_VCMPNLE_UQPD[7] = { + /* 0 : VCMPNLE_UQPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 16 ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(16) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLE_UQPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26752, 433, 3011}, + /* 1 : VCMPNLE_UQPD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f c2 /r 16 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(c2) 110 001(16) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLE_UQPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26761, 433, 3011}, + /* 2 : VCMPNLE_UQPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 16 ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(16) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLE_UQPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26770, 433, 3012}, + /* 3 : VCMPNLE_UQPD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f c2 /r 16 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 005) 001(c2) 110 001(16) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLE_UQPD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26779, 433, 3012}, + /* 4 : VCMPNLE_UQPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 16 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(16) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNLE_UQPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+6679, 543, 5066}, + /* 5 : VCMPNLE_UQPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 16 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(16) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNLE_UQPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+6690, 543, 5067}, + /* 6 : VCMPNLE_UQPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 16 ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(16) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNLE_UQPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+6701, 544, 5068}, +}; + +static const struct itemplate instrux_VCMPORD_SPD[7] = { + /* 0 : VCMPORD_SPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 17 ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(17) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPORD_SPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26788, 433, 3013}, + /* 1 : VCMPORD_SPD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f c2 /r 17 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(c2) 110 001(17) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPORD_SPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26797, 433, 3013}, + /* 2 : VCMPORD_SPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 17 ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(17) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPORD_SPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26806, 433, 3014}, + /* 3 : VCMPORD_SPD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f c2 /r 17 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 005) 001(c2) 110 001(17) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPORD_SPD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26815, 433, 3014}, + /* 4 : VCMPORD_SPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 17 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(17) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPORD_SPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+6767, 543, 5074}, + /* 5 : VCMPORD_SPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 17 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(17) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPORD_SPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+6778, 543, 5075}, + /* 6 : VCMPORD_SPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 17 ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(17) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPORD_SPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+6789, 544, 5076}, +}; + +static const struct itemplate instrux_VCMPEQ_USPD[7] = { + /* 0 : VCMPEQ_USPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 18 ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(18) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQ_USPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26824, 433, 3015}, + /* 1 : VCMPEQ_USPD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f c2 /r 18 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(c2) 110 001(18) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQ_USPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26833, 433, 3015}, + /* 2 : VCMPEQ_USPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 18 ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(18) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQ_USPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26842, 433, 3016}, + /* 3 : VCMPEQ_USPD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f c2 /r 18 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 005) 001(c2) 110 001(18) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQ_USPD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26851, 433, 3016}, + /* 4 : VCMPEQ_USPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 18 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(18) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPEQ_USPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+6855, 543, 5082}, + /* 5 : VCMPEQ_USPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 18 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(18) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPEQ_USPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+6866, 543, 5083}, + /* 6 : VCMPEQ_USPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 18 ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(18) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPEQ_USPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+6877, 544, 5084}, +}; + +static const struct itemplate instrux_VCMPNGE_UQPD[7] = { + /* 0 : VCMPNGE_UQPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 19 ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(19) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGE_UQPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26860, 433, 3017}, + /* 1 : VCMPNGE_UQPD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f c2 /r 19 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(c2) 110 001(19) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGE_UQPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26869, 433, 3017}, + /* 2 : VCMPNGE_UQPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 19 ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(19) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGE_UQPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26878, 433, 3018}, + /* 3 : VCMPNGE_UQPD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f c2 /r 19 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 005) 001(c2) 110 001(19) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGE_UQPD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26887, 433, 3018}, + /* 4 : VCMPNGE_UQPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 19 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(19) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNGE_UQPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+6943, 543, 5090}, + /* 5 : VCMPNGE_UQPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 19 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(19) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNGE_UQPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+6954, 543, 5091}, + /* 6 : VCMPNGE_UQPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 19 ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(19) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNGE_UQPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+6965, 544, 5092}, +}; + +static const struct itemplate instrux_VCMPNGT_UQPD[7] = { + /* 0 : VCMPNGT_UQPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 1a ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(1a) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGT_UQPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26896, 433, 3019}, + /* 1 : VCMPNGT_UQPD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f c2 /r 1a ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(c2) 110 001(1a) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGT_UQPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26905, 433, 3019}, + /* 2 : VCMPNGT_UQPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 1a ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(1a) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGT_UQPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26914, 433, 3020}, + /* 3 : VCMPNGT_UQPD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f c2 /r 1a ] ND,AVX,SANDYBRIDGE */ + /* 260(001 005) 001(c2) 110 001(1a) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGT_UQPD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26923, 433, 3020}, + /* 4 : VCMPNGT_UQPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 1a ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(1a) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNGT_UQPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+7031, 543, 5098}, + /* 5 : VCMPNGT_UQPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 1a ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(1a) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNGT_UQPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+7042, 543, 5099}, + /* 6 : VCMPNGT_UQPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 1a ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(1a) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNGT_UQPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+7053, 544, 5100}, +}; + +static const struct itemplate instrux_VCMPFALSE_OSPD[7] = { + /* 0 : VCMPFALSE_OSPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 1b ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(1b) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPFALSE_OSPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26932, 433, 3021}, + /* 1 : VCMPFALSE_OSPD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f c2 /r 1b ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(c2) 110 001(1b) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPFALSE_OSPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26941, 433, 3021}, + /* 2 : VCMPFALSE_OSPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 1b ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(1b) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPFALSE_OSPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26950, 433, 3022}, + /* 3 : VCMPFALSE_OSPD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f c2 /r 1b ] ND,AVX,SANDYBRIDGE */ + /* 260(001 005) 001(c2) 110 001(1b) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPFALSE_OSPD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26959, 433, 3022}, + /* 4 : VCMPFALSE_OSPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 1b ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(1b) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPFALSE_OSPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+7119, 543, 5106}, + /* 5 : VCMPFALSE_OSPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 1b ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(1b) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPFALSE_OSPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+7130, 543, 5107}, + /* 6 : VCMPFALSE_OSPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 1b ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(1b) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPFALSE_OSPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+7141, 544, 5108}, +}; + +static const struct itemplate instrux_VCMPNEQ_OSPD[7] = { + /* 0 : VCMPNEQ_OSPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 1c ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(1c) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQ_OSPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26968, 433, 3023}, + /* 1 : VCMPNEQ_OSPD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f c2 /r 1c ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(c2) 110 001(1c) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQ_OSPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26977, 433, 3023}, + /* 2 : VCMPNEQ_OSPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 1c ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(1c) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQ_OSPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26986, 433, 3024}, + /* 3 : VCMPNEQ_OSPD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f c2 /r 1c ] ND,AVX,SANDYBRIDGE */ + /* 260(001 005) 001(c2) 110 001(1c) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQ_OSPD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+26995, 433, 3024}, + /* 4 : VCMPNEQ_OSPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 1c ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(1c) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNEQ_OSPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+7207, 543, 5114}, + /* 5 : VCMPNEQ_OSPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 1c ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(1c) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNEQ_OSPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+7218, 543, 5115}, + /* 6 : VCMPNEQ_OSPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 1c ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(1c) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNEQ_OSPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+7229, 544, 5116}, +}; + +static const struct itemplate instrux_VCMPGE_OQPD[7] = { + /* 0 : VCMPGE_OQPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 1d ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(1d) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGE_OQPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27004, 433, 3025}, + /* 1 : VCMPGE_OQPD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f c2 /r 1d ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(c2) 110 001(1d) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGE_OQPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27013, 433, 3025}, + /* 2 : VCMPGE_OQPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 1d ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(1d) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGE_OQPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27022, 433, 3026}, + /* 3 : VCMPGE_OQPD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f c2 /r 1d ] ND,AVX,SANDYBRIDGE */ + /* 260(001 005) 001(c2) 110 001(1d) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGE_OQPD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27031, 433, 3026}, + /* 4 : VCMPGE_OQPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 1d ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(1d) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPGE_OQPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+7295, 543, 5122}, + /* 5 : VCMPGE_OQPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 1d ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(1d) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPGE_OQPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+7306, 543, 5123}, + /* 6 : VCMPGE_OQPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 1d ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(1d) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPGE_OQPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+7317, 544, 5124}, +}; + +static const struct itemplate instrux_VCMPGT_OQPD[7] = { + /* 0 : VCMPGT_OQPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 1e ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(1e) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGT_OQPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27040, 433, 3027}, + /* 1 : VCMPGT_OQPD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f c2 /r 1e ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(c2) 110 001(1e) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGT_OQPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27049, 433, 3027}, + /* 2 : VCMPGT_OQPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 1e ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(1e) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGT_OQPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27058, 433, 3028}, + /* 3 : VCMPGT_OQPD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f c2 /r 1e ] ND,AVX,SANDYBRIDGE */ + /* 260(001 005) 001(c2) 110 001(1e) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGT_OQPD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27067, 433, 3028}, + /* 4 : VCMPGT_OQPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 1e ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(1e) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPGT_OQPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+7383, 543, 5130}, + /* 5 : VCMPGT_OQPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 1e ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(1e) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPGT_OQPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+7394, 543, 5131}, + /* 6 : VCMPGT_OQPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 1e ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(1e) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPGT_OQPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+7405, 544, 5132}, +}; + +static const struct itemplate instrux_VCMPTRUE_USPD[7] = { + /* 0 : VCMPTRUE_USPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 1f ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(1f) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPTRUE_USPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27076, 433, 3029}, + /* 1 : VCMPTRUE_USPD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f c2 /r 1f ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(c2) 110 001(1f) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPTRUE_USPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27085, 433, 3029}, + /* 2 : VCMPTRUE_USPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 1f ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(1f) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPTRUE_USPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27094, 433, 3030}, + /* 3 : VCMPTRUE_USPD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f c2 /r 1f ] ND,AVX,SANDYBRIDGE */ + /* 260(001 005) 001(c2) 110 001(1f) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPTRUE_USPD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27103, 433, 3030}, + /* 4 : VCMPTRUE_USPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 1f ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(1f) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPTRUE_USPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+7471, 543, 5138}, + /* 5 : VCMPTRUE_USPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 1f ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(1f) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPTRUE_USPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+7482, 543, 5139}, + /* 6 : VCMPTRUE_USPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 1f ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(1f) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPTRUE_USPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+7493, 544, 5140}, +}; + +static const struct itemplate instrux_VCMPPD[7] = { + /* 0 : VCMPPD xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: vex.nds.128.66.0f c2 /r ib ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 023 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPPD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+51875, 433, 3031}, + /* 1 : VCMPPD xmmreg,xmmrm128,imm8 [r+vmi: vex.nds.128.66.0f c2 /r ib ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(c2) 110 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPPD, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+51883, 433, 3031}, + /* 2 : VCMPPD ymmreg,ymmreg*,ymmrm256,imm8 [rvmi: vex.nds.256.66.0f c2 /r ib ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 023 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPPD, 4, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+51891, 433, 3032}, + /* 3 : VCMPPD ymmreg,ymmrm256,imm8 [r+vmi: vex.nds.256.66.0f c2 /r ib ] ND,AVX,SANDYBRIDGE */ + /* 260(001 005) 001(c2) 110 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPPD, 3, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+51899, 433, 3032}, + /* 4 : VCMPPD kreg|mask,xmmreg,xmmrm128|b64,imm8 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 023 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPPD, 4, {OPMASKREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK,0,B64,0,0}, nasm_bytecodes+18253, 543, 5146}, + /* 5 : VCMPPD kreg|mask,ymmreg,ymmrm256|b64,imm8 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 023 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPPD, 4, {OPMASKREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK,0,B64,0,0}, nasm_bytecodes+18263, 543, 5147}, + /* 6 : VCMPPD kreg|mask,zmmreg,zmmrm512|b64|sae,imm8 [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r ib ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 023 : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPPD, 4, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+18273, 544, 5148}, +}; + +static const struct itemplate instrux_VCMPEQ_OSPS[11] = { + /* 0 : VCMPEQ_OSPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 10 ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(10) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQ_OSPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27112, 433, 3034}, + /* 1 : VCMPEQ_OSPS xmmreg,xmmrm128 [r+vm: vex.nds.128.0f c2 /r 10 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 000) 001(c2) 110 001(10) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQ_OSPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27121, 433, 3034}, + /* 2 : VCMPEQ_OSPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 10 ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(10) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQ_OSPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27130, 433, 3035}, + /* 3 : VCMPEQ_OSPS ymmreg,ymmrm256 [r+vm: vex.nds.256.0f c2 /r 10 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 004) 001(c2) 110 001(10) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQ_OSPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27139, 433, 3035}, + /* 4 : VCMPEQ_OSPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 10 ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(10) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQ_OSPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27112, 433, 3094}, + /* 5 : VCMPEQ_OSPS xmmreg,xmmrm128 [r+vm: vex.nds.128.0f c2 /r 10 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 000) 001(c2) 110 001(10) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQ_OSPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27121, 433, 3094}, + /* 6 : VCMPEQ_OSPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 10 ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(10) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQ_OSPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27130, 433, 3095}, + /* 7 : VCMPEQ_OSPS ymmreg,ymmrm256 [r+vm: vex.nds.256.0f c2 /r 10 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 004) 001(c2) 110 001(10) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQ_OSPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27139, 433, 3095}, + /* 8 : VCMPEQ_OSPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 10 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(10) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPEQ_OSPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+6184, 543, 5021}, + /* 9 : VCMPEQ_OSPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 10 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(10) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPEQ_OSPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+6195, 543, 5022}, + /* 10 : VCMPEQ_OSPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 10 ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(10) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPEQ_OSPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+6206, 544, 5023}, +}; + +static const struct itemplate instrux_VCMPEQPS[7] = { + /* 0 : VCMPEQPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 00 ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(00) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27148, 433, 3036}, + /* 1 : VCMPEQPS xmmreg,xmmrm128 [r+vm: vex.nds.128.0f c2 /r 00 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 000) 001(c2) 110 001(00) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27157, 433, 3036}, + /* 2 : VCMPEQPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 00 ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(00) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27166, 433, 3037}, + /* 3 : VCMPEQPS ymmreg,ymmrm256 [r+vm: vex.nds.256.0f c2 /r 00 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 004) 001(c2) 110 001(00) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27175, 433, 3037}, + /* 4 : VCMPEQPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 00 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(00) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPEQPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+4776, 543, 4781}, + /* 5 : VCMPEQPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 00 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(00) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPEQPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+4787, 543, 4782}, + /* 6 : VCMPEQPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 00 ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(00) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPEQPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+4798, 544, 4783}, +}; + +static const struct itemplate instrux_VCMPLT_OSPS[7] = { + /* 0 : VCMPLT_OSPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 01 ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(01) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLT_OSPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27184, 433, 3038}, + /* 1 : VCMPLT_OSPS xmmreg,xmmrm128 [r+vm: vex.nds.128.0f c2 /r 01 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 000) 001(c2) 110 001(01) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLT_OSPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27193, 433, 3038}, + /* 2 : VCMPLT_OSPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 01 ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(01) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLT_OSPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27202, 433, 3039}, + /* 3 : VCMPLT_OSPS ymmreg,ymmrm256 [r+vm: vex.nds.256.0f c2 /r 01 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 004) 001(c2) 110 001(01) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLT_OSPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27211, 433, 3039}, + /* 4 : VCMPLT_OSPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 01 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(01) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPLT_OSPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+4864, 543, 4805}, + /* 5 : VCMPLT_OSPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 01 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(01) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPLT_OSPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+4875, 543, 4806}, + /* 6 : VCMPLT_OSPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 01 ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(01) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPLT_OSPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+4886, 544, 4807}, +}; + +static const struct itemplate instrux_VCMPLTPS[7] = { + /* 0 : VCMPLTPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 01 ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(01) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLTPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27184, 433, 3040}, + /* 1 : VCMPLTPS xmmreg,xmmrm128 [r+vm: vex.nds.128.0f c2 /r 01 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 000) 001(c2) 110 001(01) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLTPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27193, 433, 3040}, + /* 2 : VCMPLTPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 01 ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(01) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLTPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27202, 433, 3041}, + /* 3 : VCMPLTPS ymmreg,ymmrm256 [r+vm: vex.nds.256.0f c2 /r 01 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 004) 001(c2) 110 001(01) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLTPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27211, 433, 3041}, + /* 4 : VCMPLTPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 01 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(01) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPLTPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+4864, 543, 4797}, + /* 5 : VCMPLTPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 01 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(01) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPLTPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+4875, 543, 4798}, + /* 6 : VCMPLTPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 01 ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(01) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPLTPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+4886, 544, 4799}, +}; + +static const struct itemplate instrux_VCMPLE_OSPS[7] = { + /* 0 : VCMPLE_OSPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 02 ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(02) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLE_OSPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27220, 433, 3042}, + /* 1 : VCMPLE_OSPS xmmreg,xmmrm128 [r+vm: vex.nds.128.0f c2 /r 02 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 000) 001(c2) 110 001(02) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLE_OSPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27229, 433, 3042}, + /* 2 : VCMPLE_OSPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 02 ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(02) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLE_OSPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27238, 433, 3043}, + /* 3 : VCMPLE_OSPS ymmreg,ymmrm256 [r+vm: vex.nds.256.0f c2 /r 02 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 004) 001(c2) 110 001(02) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLE_OSPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27247, 433, 3043}, + /* 4 : VCMPLE_OSPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 02 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(02) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPLE_OSPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+4952, 543, 4821}, + /* 5 : VCMPLE_OSPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 02 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(02) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPLE_OSPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+4963, 543, 4822}, + /* 6 : VCMPLE_OSPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 02 ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(02) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPLE_OSPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+4974, 544, 4823}, +}; + +static const struct itemplate instrux_VCMPLEPS[7] = { + /* 0 : VCMPLEPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 02 ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(02) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLEPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27220, 433, 3044}, + /* 1 : VCMPLEPS xmmreg,xmmrm128 [r+vm: vex.nds.128.0f c2 /r 02 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 000) 001(c2) 110 001(02) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLEPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27229, 433, 3044}, + /* 2 : VCMPLEPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 02 ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(02) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLEPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27238, 433, 3045}, + /* 3 : VCMPLEPS ymmreg,ymmrm256 [r+vm: vex.nds.256.0f c2 /r 02 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 004) 001(c2) 110 001(02) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLEPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27247, 433, 3045}, + /* 4 : VCMPLEPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 02 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(02) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPLEPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+4952, 543, 4813}, + /* 5 : VCMPLEPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 02 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(02) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPLEPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+4963, 543, 4814}, + /* 6 : VCMPLEPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 02 ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(02) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPLEPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+4974, 544, 4815}, +}; + +static const struct itemplate instrux_VCMPUNORD_QPS[7] = { + /* 0 : VCMPUNORD_QPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 03 ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(03) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPUNORD_QPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27256, 433, 3046}, + /* 1 : VCMPUNORD_QPS xmmreg,xmmrm128 [r+vm: vex.nds.128.0f c2 /r 03 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 000) 001(c2) 110 001(03) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPUNORD_QPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27265, 433, 3046}, + /* 2 : VCMPUNORD_QPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 03 ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(03) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPUNORD_QPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27274, 433, 3047}, + /* 3 : VCMPUNORD_QPS ymmreg,ymmrm256 [r+vm: vex.nds.256.0f c2 /r 03 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 004) 001(c2) 110 001(03) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPUNORD_QPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27283, 433, 3047}, + /* 4 : VCMPUNORD_QPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 03 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(03) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPUNORD_QPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5040, 543, 4837}, + /* 5 : VCMPUNORD_QPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 03 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(03) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPUNORD_QPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5051, 543, 4838}, + /* 6 : VCMPUNORD_QPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 03 ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(03) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPUNORD_QPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+5062, 544, 4839}, +}; + +static const struct itemplate instrux_VCMPUNORDPS[7] = { + /* 0 : VCMPUNORDPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 03 ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(03) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPUNORDPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27256, 433, 3048}, + /* 1 : VCMPUNORDPS xmmreg,xmmrm128 [r+vm: vex.nds.128.0f c2 /r 03 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 000) 001(c2) 110 001(03) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPUNORDPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27265, 433, 3048}, + /* 2 : VCMPUNORDPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 03 ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(03) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPUNORDPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27274, 433, 3049}, + /* 3 : VCMPUNORDPS ymmreg,ymmrm256 [r+vm: vex.nds.256.0f c2 /r 03 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 004) 001(c2) 110 001(03) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPUNORDPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27283, 433, 3049}, + /* 4 : VCMPUNORDPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 03 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(03) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPUNORDPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5040, 543, 4829}, + /* 5 : VCMPUNORDPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 03 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(03) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPUNORDPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5051, 543, 4830}, + /* 6 : VCMPUNORDPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 03 ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(03) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPUNORDPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+5062, 544, 4831}, +}; + +static const struct itemplate instrux_VCMPNEQ_UQPS[7] = { + /* 0 : VCMPNEQ_UQPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 04 ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(04) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQ_UQPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27292, 433, 3050}, + /* 1 : VCMPNEQ_UQPS xmmreg,xmmrm128 [r+vm: vex.nds.128.0f c2 /r 04 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 000) 001(c2) 110 001(04) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQ_UQPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27301, 433, 3050}, + /* 2 : VCMPNEQ_UQPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 04 ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(04) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQ_UQPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27310, 433, 3051}, + /* 3 : VCMPNEQ_UQPS ymmreg,ymmrm256 [r+vm: vex.nds.256.0f c2 /r 04 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 004) 001(c2) 110 001(04) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQ_UQPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27319, 433, 3051}, + /* 4 : VCMPNEQ_UQPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 04 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(04) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNEQ_UQPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5128, 543, 4853}, + /* 5 : VCMPNEQ_UQPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 04 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(04) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNEQ_UQPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5139, 543, 4854}, + /* 6 : VCMPNEQ_UQPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 04 ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(04) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNEQ_UQPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+5150, 544, 4855}, +}; + +static const struct itemplate instrux_VCMPNEQPS[7] = { + /* 0 : VCMPNEQPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 04 ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(04) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27292, 433, 3052}, + /* 1 : VCMPNEQPS xmmreg,xmmrm128 [r+vm: vex.nds.128.0f c2 /r 04 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 000) 001(c2) 110 001(04) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27301, 433, 3052}, + /* 2 : VCMPNEQPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 04 ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(04) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27310, 433, 3053}, + /* 3 : VCMPNEQPS ymmreg,ymmrm256 [r+vm: vex.nds.256.0f c2 /r 04 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 004) 001(c2) 110 001(04) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27319, 433, 3053}, + /* 4 : VCMPNEQPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 04 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(04) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNEQPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5128, 543, 4845}, + /* 5 : VCMPNEQPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 04 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(04) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNEQPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5139, 543, 4846}, + /* 6 : VCMPNEQPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 04 ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(04) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNEQPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+5150, 544, 4847}, +}; + +static const struct itemplate instrux_VCMPNLT_USPS[7] = { + /* 0 : VCMPNLT_USPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 05 ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(05) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLT_USPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27328, 433, 3054}, + /* 1 : VCMPNLT_USPS xmmreg,xmmrm128 [r+vm: vex.nds.128.0f c2 /r 05 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 000) 001(c2) 110 001(05) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLT_USPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27337, 433, 3054}, + /* 2 : VCMPNLT_USPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 05 ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(05) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLT_USPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27346, 433, 3055}, + /* 3 : VCMPNLT_USPS ymmreg,ymmrm256 [r+vm: vex.nds.256.0f c2 /r 05 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 004) 001(c2) 110 001(05) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLT_USPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27355, 433, 3055}, + /* 4 : VCMPNLT_USPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 05 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(05) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNLT_USPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5216, 543, 4869}, + /* 5 : VCMPNLT_USPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 05 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(05) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNLT_USPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5227, 543, 4870}, + /* 6 : VCMPNLT_USPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 05 ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(05) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNLT_USPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+5238, 544, 4871}, +}; + +static const struct itemplate instrux_VCMPNLTPS[7] = { + /* 0 : VCMPNLTPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 05 ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(05) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLTPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27328, 433, 3056}, + /* 1 : VCMPNLTPS xmmreg,xmmrm128 [r+vm: vex.nds.128.0f c2 /r 05 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 000) 001(c2) 110 001(05) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLTPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27337, 433, 3056}, + /* 2 : VCMPNLTPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 05 ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(05) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLTPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27346, 433, 3057}, + /* 3 : VCMPNLTPS ymmreg,ymmrm256 [r+vm: vex.nds.256.0f c2 /r 05 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 004) 001(c2) 110 001(05) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLTPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27355, 433, 3057}, + /* 4 : VCMPNLTPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 05 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(05) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNLTPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5216, 543, 4861}, + /* 5 : VCMPNLTPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 05 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(05) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNLTPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5227, 543, 4862}, + /* 6 : VCMPNLTPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 05 ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(05) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNLTPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+5238, 544, 4863}, +}; + +static const struct itemplate instrux_VCMPNLE_USPS[7] = { + /* 0 : VCMPNLE_USPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 06 ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(06) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLE_USPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27364, 433, 3058}, + /* 1 : VCMPNLE_USPS xmmreg,xmmrm128 [r+vm: vex.nds.128.0f c2 /r 06 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 000) 001(c2) 110 001(06) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLE_USPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27373, 433, 3058}, + /* 2 : VCMPNLE_USPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 06 ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(06) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLE_USPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27382, 433, 3059}, + /* 3 : VCMPNLE_USPS ymmreg,ymmrm256 [r+vm: vex.nds.256.0f c2 /r 06 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 004) 001(c2) 110 001(06) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLE_USPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27391, 433, 3059}, + /* 4 : VCMPNLE_USPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 06 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(06) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNLE_USPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5304, 543, 4885}, + /* 5 : VCMPNLE_USPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 06 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(06) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNLE_USPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5315, 543, 4886}, + /* 6 : VCMPNLE_USPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 06 ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(06) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNLE_USPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+5326, 544, 4887}, +}; + +static const struct itemplate instrux_VCMPNLEPS[7] = { + /* 0 : VCMPNLEPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 06 ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(06) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLEPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27364, 433, 3060}, + /* 1 : VCMPNLEPS xmmreg,xmmrm128 [r+vm: vex.nds.128.0f c2 /r 06 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 000) 001(c2) 110 001(06) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLEPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27373, 433, 3060}, + /* 2 : VCMPNLEPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 06 ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(06) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLEPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27382, 433, 3061}, + /* 3 : VCMPNLEPS ymmreg,ymmrm256 [r+vm: vex.nds.256.0f c2 /r 06 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 004) 001(c2) 110 001(06) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLEPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27391, 433, 3061}, + /* 4 : VCMPNLEPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 06 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(06) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNLEPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5304, 543, 4877}, + /* 5 : VCMPNLEPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 06 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(06) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNLEPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5315, 543, 4878}, + /* 6 : VCMPNLEPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 06 ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(06) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNLEPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+5326, 544, 4879}, +}; + +static const struct itemplate instrux_VCMPORD_QPS[7] = { + /* 0 : VCMPORD_QPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 07 ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(07) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPORD_QPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27400, 433, 3062}, + /* 1 : VCMPORD_QPS xmmreg,xmmrm128 [r+vm: vex.nds.128.0f c2 /r 07 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 000) 001(c2) 110 001(07) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPORD_QPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27409, 433, 3062}, + /* 2 : VCMPORD_QPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 07 ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(07) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPORD_QPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27418, 433, 3063}, + /* 3 : VCMPORD_QPS ymmreg,ymmrm256 [r+vm: vex.nds.256.0f c2 /r 07 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 004) 001(c2) 110 001(07) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPORD_QPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27427, 433, 3063}, + /* 4 : VCMPORD_QPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 07 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(07) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPORD_QPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5392, 543, 4901}, + /* 5 : VCMPORD_QPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 07 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(07) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPORD_QPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5403, 543, 4902}, + /* 6 : VCMPORD_QPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 07 ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(07) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPORD_QPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+5414, 544, 4903}, +}; + +static const struct itemplate instrux_VCMPORDPS[7] = { + /* 0 : VCMPORDPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 07 ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(07) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPORDPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27400, 433, 3064}, + /* 1 : VCMPORDPS xmmreg,xmmrm128 [r+vm: vex.nds.128.0f c2 /r 07 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 000) 001(c2) 110 001(07) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPORDPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27409, 433, 3064}, + /* 2 : VCMPORDPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 07 ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(07) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPORDPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27418, 433, 3065}, + /* 3 : VCMPORDPS ymmreg,ymmrm256 [r+vm: vex.nds.256.0f c2 /r 07 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 004) 001(c2) 110 001(07) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPORDPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27427, 433, 3065}, + /* 4 : VCMPORDPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 07 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(07) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPORDPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5392, 543, 4893}, + /* 5 : VCMPORDPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 07 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(07) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPORDPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5403, 543, 4894}, + /* 6 : VCMPORDPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 07 ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(07) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPORDPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+5414, 544, 4895}, +}; + +static const struct itemplate instrux_VCMPEQ_UQPS[7] = { + /* 0 : VCMPEQ_UQPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 08 ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(08) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQ_UQPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27436, 433, 3066}, + /* 1 : VCMPEQ_UQPS xmmreg,xmmrm128 [r+vm: vex.nds.128.0f c2 /r 08 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 000) 001(c2) 110 001(08) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQ_UQPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27445, 433, 3066}, + /* 2 : VCMPEQ_UQPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 08 ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(08) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQ_UQPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27454, 433, 3067}, + /* 3 : VCMPEQ_UQPS ymmreg,ymmrm256 [r+vm: vex.nds.256.0f c2 /r 08 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 004) 001(c2) 110 001(08) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQ_UQPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27463, 433, 3067}, + /* 4 : VCMPEQ_UQPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 08 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(08) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPEQ_UQPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5480, 543, 4909}, + /* 5 : VCMPEQ_UQPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 08 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(08) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPEQ_UQPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5491, 543, 4910}, + /* 6 : VCMPEQ_UQPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 08 ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(08) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPEQ_UQPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+5502, 544, 4911}, +}; + +static const struct itemplate instrux_VCMPNGE_USPS[7] = { + /* 0 : VCMPNGE_USPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 09 ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(09) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGE_USPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27472, 433, 3068}, + /* 1 : VCMPNGE_USPS xmmreg,xmmrm128 [r+vm: vex.nds.128.0f c2 /r 09 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 000) 001(c2) 110 001(09) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGE_USPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27481, 433, 3068}, + /* 2 : VCMPNGE_USPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 09 ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(09) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGE_USPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27490, 433, 3069}, + /* 3 : VCMPNGE_USPS ymmreg,ymmrm256 [r+vm: vex.nds.256.0f c2 /r 09 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 004) 001(c2) 110 001(09) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGE_USPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27499, 433, 3069}, + /* 4 : VCMPNGE_USPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 09 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(09) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNGE_USPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5568, 543, 4925}, + /* 5 : VCMPNGE_USPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 09 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(09) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNGE_USPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5579, 543, 4926}, + /* 6 : VCMPNGE_USPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 09 ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(09) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNGE_USPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+5590, 544, 4927}, +}; + +static const struct itemplate instrux_VCMPNGEPS[7] = { + /* 0 : VCMPNGEPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 09 ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(09) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGEPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27472, 433, 3070}, + /* 1 : VCMPNGEPS xmmreg,xmmrm128 [r+vm: vex.nds.128.0f c2 /r 09 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 000) 001(c2) 110 001(09) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGEPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27481, 433, 3070}, + /* 2 : VCMPNGEPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 09 ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(09) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGEPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27490, 433, 3071}, + /* 3 : VCMPNGEPS ymmreg,ymmrm256 [r+vm: vex.nds.256.0f c2 /r 09 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 004) 001(c2) 110 001(09) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGEPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27499, 433, 3071}, + /* 4 : VCMPNGEPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 09 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(09) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNGEPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5568, 543, 4917}, + /* 5 : VCMPNGEPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 09 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(09) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNGEPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5579, 543, 4918}, + /* 6 : VCMPNGEPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 09 ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(09) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNGEPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+5590, 544, 4919}, +}; + +static const struct itemplate instrux_VCMPNGT_USPS[7] = { + /* 0 : VCMPNGT_USPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 0a ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(0a) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGT_USPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27508, 433, 3072}, + /* 1 : VCMPNGT_USPS xmmreg,xmmrm128 [r+vm: vex.nds.128.0f c2 /r 0a ] ND,AVX,SANDYBRIDGE */ + /* 260(001 000) 001(c2) 110 001(0a) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGT_USPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27517, 433, 3072}, + /* 2 : VCMPNGT_USPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 0a ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(0a) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGT_USPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27526, 433, 3073}, + /* 3 : VCMPNGT_USPS ymmreg,ymmrm256 [r+vm: vex.nds.256.0f c2 /r 0a ] ND,AVX,SANDYBRIDGE */ + /* 260(001 004) 001(c2) 110 001(0a) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGT_USPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27535, 433, 3073}, + /* 4 : VCMPNGT_USPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 0a ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(0a) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNGT_USPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5656, 543, 4941}, + /* 5 : VCMPNGT_USPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 0a ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(0a) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNGT_USPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5667, 543, 4942}, + /* 6 : VCMPNGT_USPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 0a ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(0a) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNGT_USPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+5678, 544, 4943}, +}; + +static const struct itemplate instrux_VCMPNGTPS[7] = { + /* 0 : VCMPNGTPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 0a ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(0a) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGTPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27508, 433, 3074}, + /* 1 : VCMPNGTPS xmmreg,xmmrm128 [r+vm: vex.nds.128.0f c2 /r 0a ] ND,AVX,SANDYBRIDGE */ + /* 260(001 000) 001(c2) 110 001(0a) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGTPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27517, 433, 3074}, + /* 2 : VCMPNGTPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 0a ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(0a) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGTPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27526, 433, 3075}, + /* 3 : VCMPNGTPS ymmreg,ymmrm256 [r+vm: vex.nds.256.0f c2 /r 0a ] ND,AVX,SANDYBRIDGE */ + /* 260(001 004) 001(c2) 110 001(0a) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGTPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27535, 433, 3075}, + /* 4 : VCMPNGTPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 0a ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(0a) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNGTPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5656, 543, 4933}, + /* 5 : VCMPNGTPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 0a ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(0a) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNGTPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5667, 543, 4934}, + /* 6 : VCMPNGTPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 0a ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(0a) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNGTPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+5678, 544, 4935}, +}; + +static const struct itemplate instrux_VCMPFALSE_OQPS[7] = { + /* 0 : VCMPFALSE_OQPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 0b ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(0b) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPFALSE_OQPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27544, 433, 3076}, + /* 1 : VCMPFALSE_OQPS xmmreg,xmmrm128 [r+vm: vex.nds.128.0f c2 /r 0b ] ND,AVX,SANDYBRIDGE */ + /* 260(001 000) 001(c2) 110 001(0b) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPFALSE_OQPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27553, 433, 3076}, + /* 2 : VCMPFALSE_OQPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 0b ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(0b) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPFALSE_OQPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27562, 433, 3077}, + /* 3 : VCMPFALSE_OQPS ymmreg,ymmrm256 [r+vm: vex.nds.256.0f c2 /r 0b ] ND,AVX,SANDYBRIDGE */ + /* 260(001 004) 001(c2) 110 001(0b) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPFALSE_OQPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27571, 433, 3077}, + /* 4 : VCMPFALSE_OQPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 0b ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(0b) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPFALSE_OQPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5744, 543, 4957}, + /* 5 : VCMPFALSE_OQPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 0b ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(0b) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPFALSE_OQPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5755, 543, 4958}, + /* 6 : VCMPFALSE_OQPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 0b ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(0b) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPFALSE_OQPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+5766, 544, 4959}, +}; + +static const struct itemplate instrux_VCMPFALSEPS[7] = { + /* 0 : VCMPFALSEPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 0b ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(0b) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPFALSEPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27544, 433, 3078}, + /* 1 : VCMPFALSEPS xmmreg,xmmrm128 [r+vm: vex.nds.128.0f c2 /r 0b ] ND,AVX,SANDYBRIDGE */ + /* 260(001 000) 001(c2) 110 001(0b) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPFALSEPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27553, 433, 3078}, + /* 2 : VCMPFALSEPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 0b ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(0b) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPFALSEPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27562, 433, 3079}, + /* 3 : VCMPFALSEPS ymmreg,ymmrm256 [r+vm: vex.nds.256.0f c2 /r 0b ] ND,AVX,SANDYBRIDGE */ + /* 260(001 004) 001(c2) 110 001(0b) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPFALSEPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27571, 433, 3079}, + /* 4 : VCMPFALSEPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 0b ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(0b) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPFALSEPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5744, 543, 4949}, + /* 5 : VCMPFALSEPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 0b ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(0b) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPFALSEPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5755, 543, 4950}, + /* 6 : VCMPFALSEPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 0b ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(0b) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPFALSEPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+5766, 544, 4951}, +}; + +static const struct itemplate instrux_VCMPNEQ_OQPS[7] = { + /* 0 : VCMPNEQ_OQPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 0c ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(0c) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQ_OQPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27580, 433, 3080}, + /* 1 : VCMPNEQ_OQPS xmmreg,xmmrm128 [r+vm: vex.nds.128.0f c2 /r 0c ] ND,AVX,SANDYBRIDGE */ + /* 260(001 000) 001(c2) 110 001(0c) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQ_OQPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27589, 433, 3080}, + /* 2 : VCMPNEQ_OQPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 0c ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(0c) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQ_OQPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27598, 433, 3081}, + /* 3 : VCMPNEQ_OQPS ymmreg,ymmrm256 [r+vm: vex.nds.256.0f c2 /r 0c ] ND,AVX,SANDYBRIDGE */ + /* 260(001 004) 001(c2) 110 001(0c) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQ_OQPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27607, 433, 3081}, + /* 4 : VCMPNEQ_OQPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 0c ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(0c) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNEQ_OQPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5832, 543, 4965}, + /* 5 : VCMPNEQ_OQPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 0c ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(0c) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNEQ_OQPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5843, 543, 4966}, + /* 6 : VCMPNEQ_OQPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 0c ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(0c) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNEQ_OQPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+5854, 544, 4967}, +}; + +static const struct itemplate instrux_VCMPGE_OSPS[7] = { + /* 0 : VCMPGE_OSPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 0d ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(0d) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGE_OSPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27616, 433, 3082}, + /* 1 : VCMPGE_OSPS xmmreg,xmmrm128 [r+vm: vex.nds.128.0f c2 /r 0d ] ND,AVX,SANDYBRIDGE */ + /* 260(001 000) 001(c2) 110 001(0d) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGE_OSPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27625, 433, 3082}, + /* 2 : VCMPGE_OSPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 0d ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(0d) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGE_OSPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27634, 433, 3083}, + /* 3 : VCMPGE_OSPS ymmreg,ymmrm256 [r+vm: vex.nds.256.0f c2 /r 0d ] ND,AVX,SANDYBRIDGE */ + /* 260(001 004) 001(c2) 110 001(0d) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGE_OSPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27643, 433, 3083}, + /* 4 : VCMPGE_OSPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 0d ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(0d) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPGE_OSPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5920, 543, 4981}, + /* 5 : VCMPGE_OSPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 0d ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(0d) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPGE_OSPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5931, 543, 4982}, + /* 6 : VCMPGE_OSPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 0d ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(0d) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPGE_OSPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+5942, 544, 4983}, +}; + +static const struct itemplate instrux_VCMPGEPS[7] = { + /* 0 : VCMPGEPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 0d ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(0d) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGEPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27616, 433, 3084}, + /* 1 : VCMPGEPS xmmreg,xmmrm128 [r+vm: vex.nds.128.0f c2 /r 0d ] ND,AVX,SANDYBRIDGE */ + /* 260(001 000) 001(c2) 110 001(0d) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGEPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27625, 433, 3084}, + /* 2 : VCMPGEPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 0d ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(0d) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGEPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27634, 433, 3085}, + /* 3 : VCMPGEPS ymmreg,ymmrm256 [r+vm: vex.nds.256.0f c2 /r 0d ] ND,AVX,SANDYBRIDGE */ + /* 260(001 004) 001(c2) 110 001(0d) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGEPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27643, 433, 3085}, + /* 4 : VCMPGEPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 0d ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(0d) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPGEPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5920, 543, 4973}, + /* 5 : VCMPGEPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 0d ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(0d) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPGEPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5931, 543, 4974}, + /* 6 : VCMPGEPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 0d ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(0d) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPGEPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+5942, 544, 4975}, +}; + +static const struct itemplate instrux_VCMPGT_OSPS[7] = { + /* 0 : VCMPGT_OSPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 0e ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(0e) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGT_OSPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27652, 433, 3086}, + /* 1 : VCMPGT_OSPS xmmreg,xmmrm128 [r+vm: vex.nds.128.0f c2 /r 0e ] ND,AVX,SANDYBRIDGE */ + /* 260(001 000) 001(c2) 110 001(0e) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGT_OSPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27661, 433, 3086}, + /* 2 : VCMPGT_OSPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 0e ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(0e) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGT_OSPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27670, 433, 3087}, + /* 3 : VCMPGT_OSPS ymmreg,ymmrm256 [r+vm: vex.nds.256.0f c2 /r 0e ] ND,AVX,SANDYBRIDGE */ + /* 260(001 004) 001(c2) 110 001(0e) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGT_OSPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27679, 433, 3087}, + /* 4 : VCMPGT_OSPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 0e ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(0e) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPGT_OSPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+6008, 543, 4997}, + /* 5 : VCMPGT_OSPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 0e ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(0e) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPGT_OSPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+6019, 543, 4998}, + /* 6 : VCMPGT_OSPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 0e ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(0e) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPGT_OSPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+6030, 544, 4999}, +}; + +static const struct itemplate instrux_VCMPGTPS[7] = { + /* 0 : VCMPGTPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 0e ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(0e) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGTPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27652, 433, 3088}, + /* 1 : VCMPGTPS xmmreg,xmmrm128 [r+vm: vex.nds.128.0f c2 /r 0e ] ND,AVX,SANDYBRIDGE */ + /* 260(001 000) 001(c2) 110 001(0e) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGTPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27661, 433, 3088}, + /* 2 : VCMPGTPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 0e ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(0e) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGTPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27670, 433, 3089}, + /* 3 : VCMPGTPS ymmreg,ymmrm256 [r+vm: vex.nds.256.0f c2 /r 0e ] ND,AVX,SANDYBRIDGE */ + /* 260(001 004) 001(c2) 110 001(0e) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGTPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27679, 433, 3089}, + /* 4 : VCMPGTPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 0e ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(0e) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPGTPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+6008, 543, 4989}, + /* 5 : VCMPGTPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 0e ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(0e) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPGTPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+6019, 543, 4990}, + /* 6 : VCMPGTPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 0e ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(0e) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPGTPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+6030, 544, 4991}, +}; + +static const struct itemplate instrux_VCMPTRUE_UQPS[7] = { + /* 0 : VCMPTRUE_UQPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 0f ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(0f) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPTRUE_UQPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27688, 433, 3090}, + /* 1 : VCMPTRUE_UQPS xmmreg,xmmrm128 [r+vm: vex.nds.128.0f c2 /r 0f ] ND,AVX,SANDYBRIDGE */ + /* 260(001 000) 001(c2) 110 001(0f) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPTRUE_UQPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27697, 433, 3090}, + /* 2 : VCMPTRUE_UQPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 0f ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(0f) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPTRUE_UQPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27706, 433, 3091}, + /* 3 : VCMPTRUE_UQPS ymmreg,ymmrm256 [r+vm: vex.nds.256.0f c2 /r 0f ] ND,AVX,SANDYBRIDGE */ + /* 260(001 004) 001(c2) 110 001(0f) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPTRUE_UQPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27715, 433, 3091}, + /* 4 : VCMPTRUE_UQPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 0f ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(0f) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPTRUE_UQPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+6096, 543, 5013}, + /* 5 : VCMPTRUE_UQPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 0f ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(0f) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPTRUE_UQPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+6107, 543, 5014}, + /* 6 : VCMPTRUE_UQPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 0f ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(0f) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPTRUE_UQPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+6118, 544, 5015}, +}; + +static const struct itemplate instrux_VCMPTRUEPS[7] = { + /* 0 : VCMPTRUEPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 0f ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(0f) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPTRUEPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27688, 433, 3092}, + /* 1 : VCMPTRUEPS xmmreg,xmmrm128 [r+vm: vex.nds.128.0f c2 /r 0f ] ND,AVX,SANDYBRIDGE */ + /* 260(001 000) 001(c2) 110 001(0f) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPTRUEPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27697, 433, 3092}, + /* 2 : VCMPTRUEPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 0f ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(0f) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPTRUEPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27706, 433, 3093}, + /* 3 : VCMPTRUEPS ymmreg,ymmrm256 [r+vm: vex.nds.256.0f c2 /r 0f ] ND,AVX,SANDYBRIDGE */ + /* 260(001 004) 001(c2) 110 001(0f) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPTRUEPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27715, 433, 3093}, + /* 4 : VCMPTRUEPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 0f ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(0f) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPTRUEPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+6096, 543, 5005}, + /* 5 : VCMPTRUEPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 0f ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(0f) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPTRUEPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+6107, 543, 5006}, + /* 6 : VCMPTRUEPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 0f ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(0f) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPTRUEPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+6118, 544, 5007}, +}; + +static const struct itemplate instrux_VCMPLT_OQPS[7] = { + /* 0 : VCMPLT_OQPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 11 ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(11) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLT_OQPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27724, 433, 3096}, + /* 1 : VCMPLT_OQPS xmmreg,xmmrm128 [r+vm: vex.nds.128.0f c2 /r 11 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 000) 001(c2) 110 001(11) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLT_OQPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27733, 433, 3096}, + /* 2 : VCMPLT_OQPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 11 ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(11) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLT_OQPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27742, 433, 3097}, + /* 3 : VCMPLT_OQPS ymmreg,ymmrm256 [r+vm: vex.nds.256.0f c2 /r 11 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 004) 001(c2) 110 001(11) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLT_OQPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27751, 433, 3097}, + /* 4 : VCMPLT_OQPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 11 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(11) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPLT_OQPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+6272, 543, 5029}, + /* 5 : VCMPLT_OQPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 11 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(11) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPLT_OQPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+6283, 543, 5030}, + /* 6 : VCMPLT_OQPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 11 ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(11) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPLT_OQPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+6294, 544, 5031}, +}; + +static const struct itemplate instrux_VCMPLE_OQPS[7] = { + /* 0 : VCMPLE_OQPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 12 ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(12) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLE_OQPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27760, 433, 3098}, + /* 1 : VCMPLE_OQPS xmmreg,xmmrm128 [r+vm: vex.nds.128.0f c2 /r 12 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 000) 001(c2) 110 001(12) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLE_OQPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27769, 433, 3098}, + /* 2 : VCMPLE_OQPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 12 ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(12) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLE_OQPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27778, 433, 3099}, + /* 3 : VCMPLE_OQPS ymmreg,ymmrm256 [r+vm: vex.nds.256.0f c2 /r 12 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 004) 001(c2) 110 001(12) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLE_OQPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27787, 433, 3099}, + /* 4 : VCMPLE_OQPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 12 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(12) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPLE_OQPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+6360, 543, 5037}, + /* 5 : VCMPLE_OQPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 12 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(12) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPLE_OQPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+6371, 543, 5038}, + /* 6 : VCMPLE_OQPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 12 ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(12) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPLE_OQPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+6382, 544, 5039}, +}; + +static const struct itemplate instrux_VCMPUNORD_SPS[7] = { + /* 0 : VCMPUNORD_SPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 13 ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(13) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPUNORD_SPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27796, 433, 3100}, + /* 1 : VCMPUNORD_SPS xmmreg,xmmrm128 [r+vm: vex.nds.128.0f c2 /r 13 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 000) 001(c2) 110 001(13) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPUNORD_SPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27805, 433, 3100}, + /* 2 : VCMPUNORD_SPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 13 ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(13) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPUNORD_SPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27814, 433, 3101}, + /* 3 : VCMPUNORD_SPS ymmreg,ymmrm256 [r+vm: vex.nds.256.0f c2 /r 13 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 004) 001(c2) 110 001(13) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPUNORD_SPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27823, 433, 3101}, + /* 4 : VCMPUNORD_SPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 13 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(13) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPUNORD_SPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+6448, 543, 5045}, + /* 5 : VCMPUNORD_SPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 13 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(13) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPUNORD_SPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+6459, 543, 5046}, + /* 6 : VCMPUNORD_SPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 13 ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(13) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPUNORD_SPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+6470, 544, 5047}, +}; + +static const struct itemplate instrux_VCMPNEQ_USPS[7] = { + /* 0 : VCMPNEQ_USPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 14 ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(14) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQ_USPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27832, 433, 3102}, + /* 1 : VCMPNEQ_USPS xmmreg,xmmrm128 [r+vm: vex.nds.128.0f c2 /r 14 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 000) 001(c2) 110 001(14) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQ_USPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27841, 433, 3102}, + /* 2 : VCMPNEQ_USPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 14 ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(14) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQ_USPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27850, 433, 3103}, + /* 3 : VCMPNEQ_USPS ymmreg,ymmrm256 [r+vm: vex.nds.256.0f c2 /r 14 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 004) 001(c2) 110 001(14) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQ_USPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27859, 433, 3103}, + /* 4 : VCMPNEQ_USPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 14 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(14) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNEQ_USPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+6536, 543, 5053}, + /* 5 : VCMPNEQ_USPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 14 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(14) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNEQ_USPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+6547, 543, 5054}, + /* 6 : VCMPNEQ_USPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 14 ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(14) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNEQ_USPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+6558, 544, 5055}, +}; + +static const struct itemplate instrux_VCMPNLT_UQPS[7] = { + /* 0 : VCMPNLT_UQPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 15 ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(15) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLT_UQPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27868, 433, 3104}, + /* 1 : VCMPNLT_UQPS xmmreg,xmmrm128 [r+vm: vex.nds.128.0f c2 /r 15 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 000) 001(c2) 110 001(15) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLT_UQPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27877, 433, 3104}, + /* 2 : VCMPNLT_UQPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 15 ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(15) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLT_UQPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27886, 433, 3105}, + /* 3 : VCMPNLT_UQPS ymmreg,ymmrm256 [r+vm: vex.nds.256.0f c2 /r 15 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 004) 001(c2) 110 001(15) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLT_UQPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27895, 433, 3105}, + /* 4 : VCMPNLT_UQPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 15 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(15) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNLT_UQPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+6624, 543, 5061}, + /* 5 : VCMPNLT_UQPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 15 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(15) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNLT_UQPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+6635, 543, 5062}, + /* 6 : VCMPNLT_UQPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 15 ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(15) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNLT_UQPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+6646, 544, 5063}, +}; + +static const struct itemplate instrux_VCMPNLE_UQPS[7] = { + /* 0 : VCMPNLE_UQPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 16 ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(16) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLE_UQPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27904, 433, 3106}, + /* 1 : VCMPNLE_UQPS xmmreg,xmmrm128 [r+vm: vex.nds.128.0f c2 /r 16 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 000) 001(c2) 110 001(16) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLE_UQPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27913, 433, 3106}, + /* 2 : VCMPNLE_UQPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 16 ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(16) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLE_UQPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27922, 433, 3107}, + /* 3 : VCMPNLE_UQPS ymmreg,ymmrm256 [r+vm: vex.nds.256.0f c2 /r 16 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 004) 001(c2) 110 001(16) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLE_UQPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27931, 433, 3107}, + /* 4 : VCMPNLE_UQPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 16 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(16) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNLE_UQPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+6712, 543, 5069}, + /* 5 : VCMPNLE_UQPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 16 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(16) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNLE_UQPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+6723, 543, 5070}, + /* 6 : VCMPNLE_UQPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 16 ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(16) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNLE_UQPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+6734, 544, 5071}, +}; + +static const struct itemplate instrux_VCMPORD_SPS[7] = { + /* 0 : VCMPORD_SPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 17 ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(17) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPORD_SPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27940, 433, 3108}, + /* 1 : VCMPORD_SPS xmmreg,xmmrm128 [r+vm: vex.nds.128.0f c2 /r 17 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 000) 001(c2) 110 001(17) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPORD_SPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27949, 433, 3108}, + /* 2 : VCMPORD_SPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 17 ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(17) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPORD_SPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27958, 433, 3109}, + /* 3 : VCMPORD_SPS ymmreg,ymmrm256 [r+vm: vex.nds.256.0f c2 /r 17 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 004) 001(c2) 110 001(17) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPORD_SPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27967, 433, 3109}, + /* 4 : VCMPORD_SPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 17 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(17) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPORD_SPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+6800, 543, 5077}, + /* 5 : VCMPORD_SPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 17 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(17) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPORD_SPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+6811, 543, 5078}, + /* 6 : VCMPORD_SPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 17 ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(17) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPORD_SPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+6822, 544, 5079}, +}; + +static const struct itemplate instrux_VCMPEQ_USPS[7] = { + /* 0 : VCMPEQ_USPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 18 ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(18) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQ_USPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27976, 433, 3110}, + /* 1 : VCMPEQ_USPS xmmreg,xmmrm128 [r+vm: vex.nds.128.0f c2 /r 18 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 000) 001(c2) 110 001(18) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQ_USPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+27985, 433, 3110}, + /* 2 : VCMPEQ_USPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 18 ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(18) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQ_USPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27994, 433, 3111}, + /* 3 : VCMPEQ_USPS ymmreg,ymmrm256 [r+vm: vex.nds.256.0f c2 /r 18 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 004) 001(c2) 110 001(18) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQ_USPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28003, 433, 3111}, + /* 4 : VCMPEQ_USPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 18 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(18) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPEQ_USPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+6888, 543, 5085}, + /* 5 : VCMPEQ_USPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 18 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(18) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPEQ_USPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+6899, 543, 5086}, + /* 6 : VCMPEQ_USPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 18 ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(18) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPEQ_USPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+6910, 544, 5087}, +}; + +static const struct itemplate instrux_VCMPNGE_UQPS[7] = { + /* 0 : VCMPNGE_UQPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 19 ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(19) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGE_UQPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28012, 433, 3112}, + /* 1 : VCMPNGE_UQPS xmmreg,xmmrm128 [r+vm: vex.nds.128.0f c2 /r 19 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 000) 001(c2) 110 001(19) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGE_UQPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28021, 433, 3112}, + /* 2 : VCMPNGE_UQPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 19 ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(19) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGE_UQPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28030, 433, 3113}, + /* 3 : VCMPNGE_UQPS ymmreg,ymmrm256 [r+vm: vex.nds.256.0f c2 /r 19 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 004) 001(c2) 110 001(19) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGE_UQPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28039, 433, 3113}, + /* 4 : VCMPNGE_UQPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 19 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(19) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNGE_UQPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+6976, 543, 5093}, + /* 5 : VCMPNGE_UQPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 19 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(19) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNGE_UQPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+6987, 543, 5094}, + /* 6 : VCMPNGE_UQPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 19 ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(19) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNGE_UQPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+6998, 544, 5095}, +}; + +static const struct itemplate instrux_VCMPNGT_UQPS[7] = { + /* 0 : VCMPNGT_UQPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 1a ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(1a) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGT_UQPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28048, 433, 3114}, + /* 1 : VCMPNGT_UQPS xmmreg,xmmrm128 [r+vm: vex.nds.128.0f c2 /r 1a ] ND,AVX,SANDYBRIDGE */ + /* 260(001 000) 001(c2) 110 001(1a) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGT_UQPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28057, 433, 3114}, + /* 2 : VCMPNGT_UQPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 1a ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(1a) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGT_UQPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28066, 433, 3115}, + /* 3 : VCMPNGT_UQPS ymmreg,ymmrm256 [r+vm: vex.nds.256.0f c2 /r 1a ] ND,AVX,SANDYBRIDGE */ + /* 260(001 004) 001(c2) 110 001(1a) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGT_UQPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28075, 433, 3115}, + /* 4 : VCMPNGT_UQPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 1a ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(1a) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNGT_UQPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+7064, 543, 5101}, + /* 5 : VCMPNGT_UQPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 1a ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(1a) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNGT_UQPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+7075, 543, 5102}, + /* 6 : VCMPNGT_UQPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 1a ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(1a) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNGT_UQPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+7086, 544, 5103}, +}; + +static const struct itemplate instrux_VCMPFALSE_OSPS[7] = { + /* 0 : VCMPFALSE_OSPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 1b ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(1b) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPFALSE_OSPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28084, 433, 3116}, + /* 1 : VCMPFALSE_OSPS xmmreg,xmmrm128 [r+vm: vex.nds.128.0f c2 /r 1b ] ND,AVX,SANDYBRIDGE */ + /* 260(001 000) 001(c2) 110 001(1b) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPFALSE_OSPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28093, 433, 3116}, + /* 2 : VCMPFALSE_OSPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 1b ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(1b) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPFALSE_OSPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28102, 433, 3117}, + /* 3 : VCMPFALSE_OSPS ymmreg,ymmrm256 [r+vm: vex.nds.256.0f c2 /r 1b ] ND,AVX,SANDYBRIDGE */ + /* 260(001 004) 001(c2) 110 001(1b) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPFALSE_OSPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28111, 433, 3117}, + /* 4 : VCMPFALSE_OSPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 1b ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(1b) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPFALSE_OSPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+7152, 543, 5109}, + /* 5 : VCMPFALSE_OSPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 1b ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(1b) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPFALSE_OSPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+7163, 543, 5110}, + /* 6 : VCMPFALSE_OSPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 1b ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(1b) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPFALSE_OSPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+7174, 544, 5111}, +}; + +static const struct itemplate instrux_VCMPNEQ_OSPS[7] = { + /* 0 : VCMPNEQ_OSPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 1c ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(1c) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQ_OSPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28120, 433, 3118}, + /* 1 : VCMPNEQ_OSPS xmmreg,xmmrm128 [r+vm: vex.nds.128.0f c2 /r 1c ] ND,AVX,SANDYBRIDGE */ + /* 260(001 000) 001(c2) 110 001(1c) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQ_OSPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28129, 433, 3118}, + /* 2 : VCMPNEQ_OSPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 1c ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(1c) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQ_OSPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28138, 433, 3119}, + /* 3 : VCMPNEQ_OSPS ymmreg,ymmrm256 [r+vm: vex.nds.256.0f c2 /r 1c ] ND,AVX,SANDYBRIDGE */ + /* 260(001 004) 001(c2) 110 001(1c) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQ_OSPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28147, 433, 3119}, + /* 4 : VCMPNEQ_OSPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 1c ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(1c) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNEQ_OSPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+7240, 543, 5117}, + /* 5 : VCMPNEQ_OSPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 1c ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(1c) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNEQ_OSPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+7251, 543, 5118}, + /* 6 : VCMPNEQ_OSPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 1c ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(1c) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNEQ_OSPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+7262, 544, 5119}, +}; + +static const struct itemplate instrux_VCMPGE_OQPS[7] = { + /* 0 : VCMPGE_OQPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 1d ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(1d) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGE_OQPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28156, 433, 3120}, + /* 1 : VCMPGE_OQPS xmmreg,xmmrm128 [r+vm: vex.nds.128.0f c2 /r 1d ] ND,AVX,SANDYBRIDGE */ + /* 260(001 000) 001(c2) 110 001(1d) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGE_OQPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28165, 433, 3120}, + /* 2 : VCMPGE_OQPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 1d ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(1d) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGE_OQPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28174, 433, 3121}, + /* 3 : VCMPGE_OQPS ymmreg,ymmrm256 [r+vm: vex.nds.256.0f c2 /r 1d ] ND,AVX,SANDYBRIDGE */ + /* 260(001 004) 001(c2) 110 001(1d) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGE_OQPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28183, 433, 3121}, + /* 4 : VCMPGE_OQPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 1d ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(1d) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPGE_OQPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+7328, 543, 5125}, + /* 5 : VCMPGE_OQPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 1d ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(1d) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPGE_OQPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+7339, 543, 5126}, + /* 6 : VCMPGE_OQPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 1d ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(1d) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPGE_OQPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+7350, 544, 5127}, +}; + +static const struct itemplate instrux_VCMPGT_OQPS[7] = { + /* 0 : VCMPGT_OQPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 1e ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(1e) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGT_OQPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28192, 433, 3122}, + /* 1 : VCMPGT_OQPS xmmreg,xmmrm128 [r+vm: vex.nds.128.0f c2 /r 1e ] ND,AVX,SANDYBRIDGE */ + /* 260(001 000) 001(c2) 110 001(1e) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGT_OQPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28201, 433, 3122}, + /* 2 : VCMPGT_OQPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 1e ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(1e) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGT_OQPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28210, 433, 3123}, + /* 3 : VCMPGT_OQPS ymmreg,ymmrm256 [r+vm: vex.nds.256.0f c2 /r 1e ] ND,AVX,SANDYBRIDGE */ + /* 260(001 004) 001(c2) 110 001(1e) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGT_OQPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28219, 433, 3123}, + /* 4 : VCMPGT_OQPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 1e ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(1e) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPGT_OQPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+7416, 543, 5133}, + /* 5 : VCMPGT_OQPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 1e ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(1e) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPGT_OQPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+7427, 543, 5134}, + /* 6 : VCMPGT_OQPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 1e ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(1e) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPGT_OQPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+7438, 544, 5135}, +}; + +static const struct itemplate instrux_VCMPTRUE_USPS[7] = { + /* 0 : VCMPTRUE_USPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 1f ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(1f) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPTRUE_USPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28228, 433, 3124}, + /* 1 : VCMPTRUE_USPS xmmreg,xmmrm128 [r+vm: vex.nds.128.0f c2 /r 1f ] ND,AVX,SANDYBRIDGE */ + /* 260(001 000) 001(c2) 110 001(1f) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPTRUE_USPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28237, 433, 3124}, + /* 2 : VCMPTRUE_USPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 1f ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(1f) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPTRUE_USPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28246, 433, 3125}, + /* 3 : VCMPTRUE_USPS ymmreg,ymmrm256 [r+vm: vex.nds.256.0f c2 /r 1f ] ND,AVX,SANDYBRIDGE */ + /* 260(001 004) 001(c2) 110 001(1f) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPTRUE_USPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28255, 433, 3125}, + /* 4 : VCMPTRUE_USPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 1f ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(1f) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPTRUE_USPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+7504, 543, 5141}, + /* 5 : VCMPTRUE_USPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 1f ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(1f) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPTRUE_USPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+7515, 543, 5142}, + /* 6 : VCMPTRUE_USPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 1f ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(1f) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPTRUE_USPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+7526, 544, 5143}, +}; + +static const struct itemplate instrux_VCMPPS[7] = { + /* 0 : VCMPPS xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: vex.nds.128.0f c2 /r ib ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 023 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPPS, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+51907, 433, 3126}, + /* 1 : VCMPPS xmmreg,xmmrm128,imm8 [r+vmi: vex.nds.128.0f c2 /r ib ] ND,AVX,SANDYBRIDGE */ + /* 260(001 000) 001(c2) 110 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPPS, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+51915, 433, 3126}, + /* 2 : VCMPPS ymmreg,ymmreg*,ymmrm256,imm8 [rvmi: vex.nds.256.0f c2 /r ib ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 023 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPPS, 4, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+51923, 433, 3127}, + /* 3 : VCMPPS ymmreg,ymmrm256,imm8 [r+vmi: vex.nds.256.0f c2 /r ib ] ND,AVX,SANDYBRIDGE */ + /* 260(001 004) 001(c2) 110 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPPS, 3, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+51931, 433, 3127}, + /* 4 : VCMPPS kreg|mask,xmmreg,xmmrm128|b32,imm8 [rvmi:fv: evex.nds.128.0f.w0 c2 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 023 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPPS, 4, {OPMASKREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK,0,B32,0,0}, nasm_bytecodes+18283, 543, 5149}, + /* 5 : VCMPPS kreg|mask,ymmreg,ymmrm256|b32,imm8 [rvmi:fv: evex.nds.256.0f.w0 c2 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 023 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPPS, 4, {OPMASKREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK,0,B32,0,0}, nasm_bytecodes+18293, 543, 5150}, + /* 6 : VCMPPS kreg|mask,zmmreg,zmmrm512|b32|sae,imm8 [rvmi:fv: evex.nds.512.0f.w0 c2 /r ib ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 023 : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPPS, 4, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+18303, 544, 5151}, +}; + +static const struct itemplate instrux_VCMPEQ_OSSD[5] = { + /* 0 : VCMPEQ_OSSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 10 ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(10) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQ_OSSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28264, 440, 3129}, + /* 1 : VCMPEQ_OSSD xmmreg,xmmrm64 [r+vm: vex.nds.lig.f2.0f c2 /r 10 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 003) 001(c2) 110 001(10) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQ_OSSD, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28273, 440, 3129}, + /* 2 : VCMPEQ_OSSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 10 ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(10) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQ_OSSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28264, 440, 3159}, + /* 3 : VCMPEQ_OSSD xmmreg,xmmrm64 [r+vm: vex.nds.lig.f2.0f c2 /r 10 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 003) 001(c2) 110 001(10) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQ_OSSD, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28273, 440, 3159}, + /* 4 : VCMPEQ_OSSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 10 ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(10) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPEQ_OSSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+6217, 545, 5024}, +}; + +static const struct itemplate instrux_VCMPEQSD[3] = { + /* 0 : VCMPEQSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 00 ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(00) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28282, 440, 3130}, + /* 1 : VCMPEQSD xmmreg,xmmrm64 [r+vm: vex.nds.lig.f2.0f c2 /r 00 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 003) 001(c2) 110 001(00) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQSD, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28291, 440, 3130}, + /* 2 : VCMPEQSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 00 ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(00) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPEQSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+4809, 545, 4784}, +}; + +static const struct itemplate instrux_VCMPLT_OSSD[3] = { + /* 0 : VCMPLT_OSSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 01 ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(01) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLT_OSSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28300, 440, 3131}, + /* 1 : VCMPLT_OSSD xmmreg,xmmrm64 [r+vm: vex.nds.lig.f2.0f c2 /r 01 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 003) 001(c2) 110 001(01) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLT_OSSD, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28309, 440, 3131}, + /* 2 : VCMPLT_OSSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 01 ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(01) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPLT_OSSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+4897, 545, 4808}, +}; + +static const struct itemplate instrux_VCMPLTSD[3] = { + /* 0 : VCMPLTSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 01 ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(01) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLTSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28300, 440, 3132}, + /* 1 : VCMPLTSD xmmreg,xmmrm64 [r+vm: vex.nds.lig.f2.0f c2 /r 01 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 003) 001(c2) 110 001(01) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLTSD, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28309, 440, 3132}, + /* 2 : VCMPLTSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 01 ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(01) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPLTSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+4897, 545, 4800}, +}; + +static const struct itemplate instrux_VCMPLE_OSSD[3] = { + /* 0 : VCMPLE_OSSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 02 ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(02) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLE_OSSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28318, 440, 3133}, + /* 1 : VCMPLE_OSSD xmmreg,xmmrm64 [r+vm: vex.nds.lig.f2.0f c2 /r 02 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 003) 001(c2) 110 001(02) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLE_OSSD, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28327, 440, 3133}, + /* 2 : VCMPLE_OSSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 02 ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(02) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPLE_OSSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+4985, 545, 4824}, +}; + +static const struct itemplate instrux_VCMPLESD[3] = { + /* 0 : VCMPLESD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 02 ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(02) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLESD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28318, 440, 3134}, + /* 1 : VCMPLESD xmmreg,xmmrm64 [r+vm: vex.nds.lig.f2.0f c2 /r 02 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 003) 001(c2) 110 001(02) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLESD, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28327, 440, 3134}, + /* 2 : VCMPLESD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 02 ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(02) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPLESD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+4985, 545, 4816}, +}; + +static const struct itemplate instrux_VCMPUNORD_QSD[3] = { + /* 0 : VCMPUNORD_QSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 03 ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(03) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPUNORD_QSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28336, 440, 3135}, + /* 1 : VCMPUNORD_QSD xmmreg,xmmrm64 [r+vm: vex.nds.lig.f2.0f c2 /r 03 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 003) 001(c2) 110 001(03) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPUNORD_QSD, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28345, 440, 3135}, + /* 2 : VCMPUNORD_QSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 03 ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(03) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPUNORD_QSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5073, 545, 4840}, +}; + +static const struct itemplate instrux_VCMPUNORDSD[3] = { + /* 0 : VCMPUNORDSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 03 ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(03) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPUNORDSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28336, 440, 3136}, + /* 1 : VCMPUNORDSD xmmreg,xmmrm64 [r+vm: vex.nds.lig.f2.0f c2 /r 03 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 003) 001(c2) 110 001(03) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPUNORDSD, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28345, 440, 3136}, + /* 2 : VCMPUNORDSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 03 ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(03) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPUNORDSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5073, 545, 4832}, +}; + +static const struct itemplate instrux_VCMPNEQ_UQSD[3] = { + /* 0 : VCMPNEQ_UQSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 04 ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(04) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQ_UQSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28354, 440, 3137}, + /* 1 : VCMPNEQ_UQSD xmmreg,xmmrm64 [r+vm: vex.nds.lig.f2.0f c2 /r 04 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 003) 001(c2) 110 001(04) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQ_UQSD, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28363, 440, 3137}, + /* 2 : VCMPNEQ_UQSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 04 ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(04) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNEQ_UQSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5161, 545, 4856}, +}; + +static const struct itemplate instrux_VCMPNEQSD[3] = { + /* 0 : VCMPNEQSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 04 ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(04) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28354, 440, 3138}, + /* 1 : VCMPNEQSD xmmreg,xmmrm64 [r+vm: vex.nds.lig.f2.0f c2 /r 04 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 003) 001(c2) 110 001(04) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQSD, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28363, 440, 3138}, + /* 2 : VCMPNEQSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 04 ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(04) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNEQSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5161, 545, 4848}, +}; + +static const struct itemplate instrux_VCMPNLT_USSD[3] = { + /* 0 : VCMPNLT_USSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 05 ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(05) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLT_USSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28372, 440, 3139}, + /* 1 : VCMPNLT_USSD xmmreg,xmmrm64 [r+vm: vex.nds.lig.f2.0f c2 /r 05 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 003) 001(c2) 110 001(05) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLT_USSD, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28381, 440, 3139}, + /* 2 : VCMPNLT_USSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 05 ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(05) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNLT_USSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5249, 545, 4872}, +}; + +static const struct itemplate instrux_VCMPNLTSD[3] = { + /* 0 : VCMPNLTSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 05 ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(05) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLTSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28372, 440, 3140}, + /* 1 : VCMPNLTSD xmmreg,xmmrm64 [r+vm: vex.nds.lig.f2.0f c2 /r 05 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 003) 001(c2) 110 001(05) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLTSD, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28381, 440, 3140}, + /* 2 : VCMPNLTSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 05 ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(05) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNLTSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5249, 545, 4864}, +}; + +static const struct itemplate instrux_VCMPNLE_USSD[3] = { + /* 0 : VCMPNLE_USSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 06 ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(06) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLE_USSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28390, 440, 3141}, + /* 1 : VCMPNLE_USSD xmmreg,xmmrm64 [r+vm: vex.nds.lig.f2.0f c2 /r 06 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 003) 001(c2) 110 001(06) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLE_USSD, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28399, 440, 3141}, + /* 2 : VCMPNLE_USSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 06 ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(06) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNLE_USSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5337, 545, 4888}, +}; + +static const struct itemplate instrux_VCMPNLESD[3] = { + /* 0 : VCMPNLESD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 06 ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(06) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLESD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28390, 440, 3142}, + /* 1 : VCMPNLESD xmmreg,xmmrm64 [r+vm: vex.nds.lig.f2.0f c2 /r 06 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 003) 001(c2) 110 001(06) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLESD, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28399, 440, 3142}, + /* 2 : VCMPNLESD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 06 ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(06) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNLESD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5337, 545, 4880}, +}; + +static const struct itemplate instrux_VCMPORD_QSD[3] = { + /* 0 : VCMPORD_QSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 07 ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(07) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPORD_QSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28408, 440, 3143}, + /* 1 : VCMPORD_QSD xmmreg,xmmrm64 [r+vm: vex.nds.lig.f2.0f c2 /r 07 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 003) 001(c2) 110 001(07) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPORD_QSD, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28417, 440, 3143}, + /* 2 : VCMPORD_QSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 07 ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(07) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPORD_QSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5425, 545, 4904}, +}; + +static const struct itemplate instrux_VCMPORDSD[3] = { + /* 0 : VCMPORDSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 07 ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(07) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPORDSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28408, 440, 3144}, + /* 1 : VCMPORDSD xmmreg,xmmrm64 [r+vm: vex.nds.lig.f2.0f c2 /r 07 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 003) 001(c2) 110 001(07) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPORDSD, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28417, 440, 3144}, + /* 2 : VCMPORDSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 07 ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(07) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPORDSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5425, 545, 4896}, +}; + +static const struct itemplate instrux_VCMPEQ_UQSD[3] = { + /* 0 : VCMPEQ_UQSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 08 ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(08) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQ_UQSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28426, 440, 3145}, + /* 1 : VCMPEQ_UQSD xmmreg,xmmrm64 [r+vm: vex.nds.lig.f2.0f c2 /r 08 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 003) 001(c2) 110 001(08) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQ_UQSD, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28435, 440, 3145}, + /* 2 : VCMPEQ_UQSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 08 ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(08) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPEQ_UQSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5513, 545, 4912}, +}; + +static const struct itemplate instrux_VCMPNGE_USSD[3] = { + /* 0 : VCMPNGE_USSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 09 ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(09) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGE_USSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28444, 440, 3146}, + /* 1 : VCMPNGE_USSD xmmreg,xmmrm64 [r+vm: vex.nds.lig.f2.0f c2 /r 09 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 003) 001(c2) 110 001(09) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGE_USSD, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28453, 440, 3146}, + /* 2 : VCMPNGE_USSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 09 ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(09) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNGE_USSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5601, 545, 4928}, +}; + +static const struct itemplate instrux_VCMPNGESD[3] = { + /* 0 : VCMPNGESD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 09 ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(09) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGESD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28444, 440, 3147}, + /* 1 : VCMPNGESD xmmreg,xmmrm64 [r+vm: vex.nds.lig.f2.0f c2 /r 09 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 003) 001(c2) 110 001(09) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGESD, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28453, 440, 3147}, + /* 2 : VCMPNGESD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 09 ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(09) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNGESD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5601, 545, 4920}, +}; + +static const struct itemplate instrux_VCMPNGT_USSD[3] = { + /* 0 : VCMPNGT_USSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 0a ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(0a) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGT_USSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28462, 440, 3148}, + /* 1 : VCMPNGT_USSD xmmreg,xmmrm64 [r+vm: vex.nds.lig.f2.0f c2 /r 0a ] ND,AVX,SANDYBRIDGE */ + /* 260(001 003) 001(c2) 110 001(0a) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGT_USSD, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28471, 440, 3148}, + /* 2 : VCMPNGT_USSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 0a ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(0a) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNGT_USSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5689, 545, 4944}, +}; + +static const struct itemplate instrux_VCMPNGTSD[3] = { + /* 0 : VCMPNGTSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 0a ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(0a) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGTSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28462, 440, 3149}, + /* 1 : VCMPNGTSD xmmreg,xmmrm64 [r+vm: vex.nds.lig.f2.0f c2 /r 0a ] ND,AVX,SANDYBRIDGE */ + /* 260(001 003) 001(c2) 110 001(0a) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGTSD, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28471, 440, 3149}, + /* 2 : VCMPNGTSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 0a ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(0a) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNGTSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5689, 545, 4936}, +}; + +static const struct itemplate instrux_VCMPFALSE_OQSD[3] = { + /* 0 : VCMPFALSE_OQSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 0b ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(0b) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPFALSE_OQSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28480, 440, 3150}, + /* 1 : VCMPFALSE_OQSD xmmreg,xmmrm64 [r+vm: vex.nds.lig.f2.0f c2 /r 0b ] ND,AVX,SANDYBRIDGE */ + /* 260(001 003) 001(c2) 110 001(0b) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPFALSE_OQSD, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28489, 440, 3150}, + /* 2 : VCMPFALSE_OQSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 0b ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(0b) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPFALSE_OQSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5777, 545, 4960}, +}; + +static const struct itemplate instrux_VCMPFALSESD[3] = { + /* 0 : VCMPFALSESD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 0b ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(0b) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPFALSESD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28480, 440, 3151}, + /* 1 : VCMPFALSESD xmmreg,xmmrm64 [r+vm: vex.nds.lig.f2.0f c2 /r 0b ] ND,AVX,SANDYBRIDGE */ + /* 260(001 003) 001(c2) 110 001(0b) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPFALSESD, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28489, 440, 3151}, + /* 2 : VCMPFALSESD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 0b ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(0b) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPFALSESD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5777, 545, 4952}, +}; + +static const struct itemplate instrux_VCMPNEQ_OQSD[3] = { + /* 0 : VCMPNEQ_OQSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 0c ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(0c) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQ_OQSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28498, 440, 3152}, + /* 1 : VCMPNEQ_OQSD xmmreg,xmmrm64 [r+vm: vex.nds.lig.f2.0f c2 /r 0c ] ND,AVX,SANDYBRIDGE */ + /* 260(001 003) 001(c2) 110 001(0c) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQ_OQSD, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28507, 440, 3152}, + /* 2 : VCMPNEQ_OQSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 0c ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(0c) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNEQ_OQSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5865, 545, 4968}, +}; + +static const struct itemplate instrux_VCMPGE_OSSD[3] = { + /* 0 : VCMPGE_OSSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 0d ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(0d) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGE_OSSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28516, 440, 3153}, + /* 1 : VCMPGE_OSSD xmmreg,xmmrm64 [r+vm: vex.nds.lig.f2.0f c2 /r 0d ] ND,AVX,SANDYBRIDGE */ + /* 260(001 003) 001(c2) 110 001(0d) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGE_OSSD, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28525, 440, 3153}, + /* 2 : VCMPGE_OSSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 0d ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(0d) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPGE_OSSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5953, 545, 4984}, +}; + +static const struct itemplate instrux_VCMPGESD[3] = { + /* 0 : VCMPGESD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 0d ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(0d) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGESD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28516, 440, 3154}, + /* 1 : VCMPGESD xmmreg,xmmrm64 [r+vm: vex.nds.lig.f2.0f c2 /r 0d ] ND,AVX,SANDYBRIDGE */ + /* 260(001 003) 001(c2) 110 001(0d) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGESD, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28525, 440, 3154}, + /* 2 : VCMPGESD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 0d ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(0d) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPGESD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5953, 545, 4976}, +}; + +static const struct itemplate instrux_VCMPGT_OSSD[3] = { + /* 0 : VCMPGT_OSSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 0e ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(0e) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGT_OSSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28534, 440, 3155}, + /* 1 : VCMPGT_OSSD xmmreg,xmmrm64 [r+vm: vex.nds.lig.f2.0f c2 /r 0e ] ND,AVX,SANDYBRIDGE */ + /* 260(001 003) 001(c2) 110 001(0e) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGT_OSSD, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28543, 440, 3155}, + /* 2 : VCMPGT_OSSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 0e ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(0e) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPGT_OSSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+6041, 545, 5000}, +}; + +static const struct itemplate instrux_VCMPGTSD[3] = { + /* 0 : VCMPGTSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 0e ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(0e) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGTSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28534, 440, 3156}, + /* 1 : VCMPGTSD xmmreg,xmmrm64 [r+vm: vex.nds.lig.f2.0f c2 /r 0e ] ND,AVX,SANDYBRIDGE */ + /* 260(001 003) 001(c2) 110 001(0e) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGTSD, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28543, 440, 3156}, + /* 2 : VCMPGTSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 0e ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(0e) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPGTSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+6041, 545, 4992}, +}; + +static const struct itemplate instrux_VCMPTRUE_UQSD[3] = { + /* 0 : VCMPTRUE_UQSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 0f ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(0f) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPTRUE_UQSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28552, 440, 3157}, + /* 1 : VCMPTRUE_UQSD xmmreg,xmmrm64 [r+vm: vex.nds.lig.f2.0f c2 /r 0f ] ND,AVX,SANDYBRIDGE */ + /* 260(001 003) 001(c2) 110 001(0f) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPTRUE_UQSD, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28561, 440, 3157}, + /* 2 : VCMPTRUE_UQSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 0f ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(0f) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPTRUE_UQSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+6129, 545, 5016}, +}; + +static const struct itemplate instrux_VCMPTRUESD[3] = { + /* 0 : VCMPTRUESD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 0f ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(0f) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPTRUESD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28552, 440, 3158}, + /* 1 : VCMPTRUESD xmmreg,xmmrm64 [r+vm: vex.nds.lig.f2.0f c2 /r 0f ] ND,AVX,SANDYBRIDGE */ + /* 260(001 003) 001(c2) 110 001(0f) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPTRUESD, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28561, 440, 3158}, + /* 2 : VCMPTRUESD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 0f ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(0f) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPTRUESD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+6129, 545, 5008}, +}; + +static const struct itemplate instrux_VCMPLT_OQSD[3] = { + /* 0 : VCMPLT_OQSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 11 ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(11) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLT_OQSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28570, 440, 3160}, + /* 1 : VCMPLT_OQSD xmmreg,xmmrm64 [r+vm: vex.nds.lig.f2.0f c2 /r 11 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 003) 001(c2) 110 001(11) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLT_OQSD, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28579, 440, 3160}, + /* 2 : VCMPLT_OQSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 11 ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(11) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPLT_OQSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+6305, 545, 5032}, +}; + +static const struct itemplate instrux_VCMPLE_OQSD[3] = { + /* 0 : VCMPLE_OQSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 12 ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(12) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLE_OQSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28588, 440, 3161}, + /* 1 : VCMPLE_OQSD xmmreg,xmmrm64 [r+vm: vex.nds.lig.f2.0f c2 /r 12 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 003) 001(c2) 110 001(12) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLE_OQSD, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28597, 440, 3161}, + /* 2 : VCMPLE_OQSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 12 ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(12) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPLE_OQSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+6393, 545, 5040}, +}; + +static const struct itemplate instrux_VCMPUNORD_SSD[3] = { + /* 0 : VCMPUNORD_SSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 13 ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(13) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPUNORD_SSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28606, 440, 3162}, + /* 1 : VCMPUNORD_SSD xmmreg,xmmrm64 [r+vm: vex.nds.lig.f2.0f c2 /r 13 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 003) 001(c2) 110 001(13) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPUNORD_SSD, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28615, 440, 3162}, + /* 2 : VCMPUNORD_SSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 13 ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(13) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPUNORD_SSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+6481, 545, 5048}, +}; + +static const struct itemplate instrux_VCMPNEQ_USSD[3] = { + /* 0 : VCMPNEQ_USSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 14 ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(14) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQ_USSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28624, 440, 3163}, + /* 1 : VCMPNEQ_USSD xmmreg,xmmrm64 [r+vm: vex.nds.lig.f2.0f c2 /r 14 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 003) 001(c2) 110 001(14) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQ_USSD, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28633, 440, 3163}, + /* 2 : VCMPNEQ_USSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 14 ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(14) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNEQ_USSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+6569, 545, 5056}, +}; + +static const struct itemplate instrux_VCMPNLT_UQSD[3] = { + /* 0 : VCMPNLT_UQSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 15 ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(15) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLT_UQSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28642, 440, 3164}, + /* 1 : VCMPNLT_UQSD xmmreg,xmmrm64 [r+vm: vex.nds.lig.f2.0f c2 /r 15 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 003) 001(c2) 110 001(15) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLT_UQSD, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28651, 440, 3164}, + /* 2 : VCMPNLT_UQSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 15 ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(15) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNLT_UQSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+6657, 545, 5064}, +}; + +static const struct itemplate instrux_VCMPNLE_UQSD[3] = { + /* 0 : VCMPNLE_UQSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 16 ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(16) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLE_UQSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28660, 440, 3165}, + /* 1 : VCMPNLE_UQSD xmmreg,xmmrm64 [r+vm: vex.nds.lig.f2.0f c2 /r 16 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 003) 001(c2) 110 001(16) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLE_UQSD, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28669, 440, 3165}, + /* 2 : VCMPNLE_UQSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 16 ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(16) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNLE_UQSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+6745, 545, 5072}, +}; + +static const struct itemplate instrux_VCMPORD_SSD[3] = { + /* 0 : VCMPORD_SSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 17 ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(17) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPORD_SSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28678, 440, 3166}, + /* 1 : VCMPORD_SSD xmmreg,xmmrm64 [r+vm: vex.nds.lig.f2.0f c2 /r 17 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 003) 001(c2) 110 001(17) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPORD_SSD, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28687, 440, 3166}, + /* 2 : VCMPORD_SSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 17 ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(17) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPORD_SSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+6833, 545, 5080}, +}; + +static const struct itemplate instrux_VCMPEQ_USSD[3] = { + /* 0 : VCMPEQ_USSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 18 ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(18) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQ_USSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28696, 440, 3167}, + /* 1 : VCMPEQ_USSD xmmreg,xmmrm64 [r+vm: vex.nds.lig.f2.0f c2 /r 18 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 003) 001(c2) 110 001(18) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQ_USSD, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28705, 440, 3167}, + /* 2 : VCMPEQ_USSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 18 ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(18) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPEQ_USSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+6921, 545, 5088}, +}; + +static const struct itemplate instrux_VCMPNGE_UQSD[3] = { + /* 0 : VCMPNGE_UQSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 19 ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(19) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGE_UQSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28714, 440, 3168}, + /* 1 : VCMPNGE_UQSD xmmreg,xmmrm64 [r+vm: vex.nds.lig.f2.0f c2 /r 19 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 003) 001(c2) 110 001(19) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGE_UQSD, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28723, 440, 3168}, + /* 2 : VCMPNGE_UQSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 19 ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(19) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNGE_UQSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+7009, 545, 5096}, +}; + +static const struct itemplate instrux_VCMPNGT_UQSD[3] = { + /* 0 : VCMPNGT_UQSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 1a ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(1a) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGT_UQSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28732, 440, 3169}, + /* 1 : VCMPNGT_UQSD xmmreg,xmmrm64 [r+vm: vex.nds.lig.f2.0f c2 /r 1a ] ND,AVX,SANDYBRIDGE */ + /* 260(001 003) 001(c2) 110 001(1a) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGT_UQSD, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28741, 440, 3169}, + /* 2 : VCMPNGT_UQSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 1a ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(1a) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNGT_UQSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+7097, 545, 5104}, +}; + +static const struct itemplate instrux_VCMPFALSE_OSSD[3] = { + /* 0 : VCMPFALSE_OSSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 1b ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(1b) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPFALSE_OSSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28750, 440, 3170}, + /* 1 : VCMPFALSE_OSSD xmmreg,xmmrm64 [r+vm: vex.nds.lig.f2.0f c2 /r 1b ] ND,AVX,SANDYBRIDGE */ + /* 260(001 003) 001(c2) 110 001(1b) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPFALSE_OSSD, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28759, 440, 3170}, + /* 2 : VCMPFALSE_OSSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 1b ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(1b) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPFALSE_OSSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+7185, 545, 5112}, +}; + +static const struct itemplate instrux_VCMPNEQ_OSSD[3] = { + /* 0 : VCMPNEQ_OSSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 1c ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(1c) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQ_OSSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28768, 440, 3171}, + /* 1 : VCMPNEQ_OSSD xmmreg,xmmrm64 [r+vm: vex.nds.lig.f2.0f c2 /r 1c ] ND,AVX,SANDYBRIDGE */ + /* 260(001 003) 001(c2) 110 001(1c) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQ_OSSD, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28777, 440, 3171}, + /* 2 : VCMPNEQ_OSSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 1c ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(1c) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNEQ_OSSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+7273, 545, 5120}, +}; + +static const struct itemplate instrux_VCMPGE_OQSD[3] = { + /* 0 : VCMPGE_OQSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 1d ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(1d) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGE_OQSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28786, 440, 3172}, + /* 1 : VCMPGE_OQSD xmmreg,xmmrm64 [r+vm: vex.nds.lig.f2.0f c2 /r 1d ] ND,AVX,SANDYBRIDGE */ + /* 260(001 003) 001(c2) 110 001(1d) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGE_OQSD, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28795, 440, 3172}, + /* 2 : VCMPGE_OQSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 1d ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(1d) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPGE_OQSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+7361, 545, 5128}, +}; + +static const struct itemplate instrux_VCMPGT_OQSD[3] = { + /* 0 : VCMPGT_OQSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 1e ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(1e) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGT_OQSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28804, 440, 3173}, + /* 1 : VCMPGT_OQSD xmmreg,xmmrm64 [r+vm: vex.nds.lig.f2.0f c2 /r 1e ] ND,AVX,SANDYBRIDGE */ + /* 260(001 003) 001(c2) 110 001(1e) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGT_OQSD, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28813, 440, 3173}, + /* 2 : VCMPGT_OQSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 1e ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(1e) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPGT_OQSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+7449, 545, 5136}, +}; + +static const struct itemplate instrux_VCMPTRUE_USSD[3] = { + /* 0 : VCMPTRUE_USSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 1f ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(1f) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPTRUE_USSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28822, 440, 3174}, + /* 1 : VCMPTRUE_USSD xmmreg,xmmrm64 [r+vm: vex.nds.lig.f2.0f c2 /r 1f ] ND,AVX,SANDYBRIDGE */ + /* 260(001 003) 001(c2) 110 001(1f) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPTRUE_USSD, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28831, 440, 3174}, + /* 2 : VCMPTRUE_USSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 1f ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(1f) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPTRUE_USSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+7537, 545, 5144}, +}; + +static const struct itemplate instrux_VCMPSD[3] = { + /* 0 : VCMPSD xmmreg,xmmreg*,xmmrm64,imm8 [rvmi: vex.nds.lig.f2.0f c2 /r ib ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 023 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPSD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+51939, 440, 3175}, + /* 1 : VCMPSD xmmreg,xmmrm64,imm8 [r+vmi: vex.nds.lig.f2.0f c2 /r ib ] ND,AVX,SANDYBRIDGE */ + /* 260(001 003) 001(c2) 110 022 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPSD, 3, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+51947, 440, 3175}, + /* 2 : VCMPSD kreg|mask,xmmreg,xmmrm64|sae,imm8 [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r ib ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 023 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPSD, 4, {OPMASKREG,XMMREG,RM_XMM|BITS64,IMM_NORMAL|BITS8,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+18313, 545, 5152}, +}; + +static const struct itemplate instrux_VCMPEQ_OSSS[5] = { + /* 0 : VCMPEQ_OSSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 10 ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(10) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQ_OSSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28840, 440, 3177}, + /* 1 : VCMPEQ_OSSS xmmreg,xmmrm64 [r+vm: vex.nds.lig.f3.0f c2 /r 10 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 002) 001(c2) 110 001(10) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQ_OSSS, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28849, 440, 3177}, + /* 2 : VCMPEQ_OSSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 10 ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(10) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQ_OSSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28840, 440, 3207}, + /* 3 : VCMPEQ_OSSS xmmreg,xmmrm64 [r+vm: vex.nds.lig.f3.0f c2 /r 10 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 002) 001(c2) 110 001(10) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQ_OSSS, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28849, 440, 3207}, + /* 4 : VCMPEQ_OSSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 10 ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(10) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPEQ_OSSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+6228, 545, 5025}, +}; + +static const struct itemplate instrux_VCMPEQSS[3] = { + /* 0 : VCMPEQSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 00 ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(00) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28858, 440, 3178}, + /* 1 : VCMPEQSS xmmreg,xmmrm64 [r+vm: vex.nds.lig.f3.0f c2 /r 00 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 002) 001(c2) 110 001(00) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQSS, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28867, 440, 3178}, + /* 2 : VCMPEQSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 00 ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(00) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPEQSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+4820, 545, 4785}, +}; + +static const struct itemplate instrux_VCMPLT_OSSS[3] = { + /* 0 : VCMPLT_OSSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 01 ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(01) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLT_OSSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28876, 440, 3179}, + /* 1 : VCMPLT_OSSS xmmreg,xmmrm64 [r+vm: vex.nds.lig.f3.0f c2 /r 01 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 002) 001(c2) 110 001(01) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLT_OSSS, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28885, 440, 3179}, + /* 2 : VCMPLT_OSSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 01 ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(01) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPLT_OSSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+4908, 545, 4809}, +}; + +static const struct itemplate instrux_VCMPLTSS[3] = { + /* 0 : VCMPLTSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 01 ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(01) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLTSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28876, 440, 3180}, + /* 1 : VCMPLTSS xmmreg,xmmrm64 [r+vm: vex.nds.lig.f3.0f c2 /r 01 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 002) 001(c2) 110 001(01) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLTSS, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28885, 440, 3180}, + /* 2 : VCMPLTSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 01 ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(01) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPLTSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+4908, 545, 4801}, +}; + +static const struct itemplate instrux_VCMPLE_OSSS[3] = { + /* 0 : VCMPLE_OSSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 02 ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(02) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLE_OSSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28894, 440, 3181}, + /* 1 : VCMPLE_OSSS xmmreg,xmmrm64 [r+vm: vex.nds.lig.f3.0f c2 /r 02 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 002) 001(c2) 110 001(02) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLE_OSSS, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28903, 440, 3181}, + /* 2 : VCMPLE_OSSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 02 ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(02) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPLE_OSSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+4996, 545, 4825}, +}; + +static const struct itemplate instrux_VCMPLESS[3] = { + /* 0 : VCMPLESS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 02 ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(02) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLESS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28894, 440, 3182}, + /* 1 : VCMPLESS xmmreg,xmmrm64 [r+vm: vex.nds.lig.f3.0f c2 /r 02 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 002) 001(c2) 110 001(02) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLESS, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28903, 440, 3182}, + /* 2 : VCMPLESS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 02 ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(02) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPLESS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+4996, 545, 4817}, +}; + +static const struct itemplate instrux_VCMPUNORD_QSS[3] = { + /* 0 : VCMPUNORD_QSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 03 ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(03) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPUNORD_QSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28912, 440, 3183}, + /* 1 : VCMPUNORD_QSS xmmreg,xmmrm64 [r+vm: vex.nds.lig.f3.0f c2 /r 03 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 002) 001(c2) 110 001(03) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPUNORD_QSS, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28921, 440, 3183}, + /* 2 : VCMPUNORD_QSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 03 ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(03) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPUNORD_QSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5084, 545, 4841}, +}; + +static const struct itemplate instrux_VCMPUNORDSS[3] = { + /* 0 : VCMPUNORDSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 03 ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(03) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPUNORDSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28912, 440, 3184}, + /* 1 : VCMPUNORDSS xmmreg,xmmrm64 [r+vm: vex.nds.lig.f3.0f c2 /r 03 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 002) 001(c2) 110 001(03) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPUNORDSS, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28921, 440, 3184}, + /* 2 : VCMPUNORDSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 03 ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(03) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPUNORDSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5084, 545, 4833}, +}; + +static const struct itemplate instrux_VCMPNEQ_UQSS[3] = { + /* 0 : VCMPNEQ_UQSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 04 ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(04) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQ_UQSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28930, 440, 3185}, + /* 1 : VCMPNEQ_UQSS xmmreg,xmmrm64 [r+vm: vex.nds.lig.f3.0f c2 /r 04 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 002) 001(c2) 110 001(04) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQ_UQSS, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28939, 440, 3185}, + /* 2 : VCMPNEQ_UQSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 04 ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(04) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNEQ_UQSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5172, 545, 4857}, +}; + +static const struct itemplate instrux_VCMPNEQSS[3] = { + /* 0 : VCMPNEQSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 04 ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(04) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28930, 440, 3186}, + /* 1 : VCMPNEQSS xmmreg,xmmrm64 [r+vm: vex.nds.lig.f3.0f c2 /r 04 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 002) 001(c2) 110 001(04) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQSS, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28939, 440, 3186}, + /* 2 : VCMPNEQSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 04 ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(04) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNEQSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5172, 545, 4849}, +}; + +static const struct itemplate instrux_VCMPNLT_USSS[3] = { + /* 0 : VCMPNLT_USSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 05 ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(05) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLT_USSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28948, 440, 3187}, + /* 1 : VCMPNLT_USSS xmmreg,xmmrm64 [r+vm: vex.nds.lig.f3.0f c2 /r 05 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 002) 001(c2) 110 001(05) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLT_USSS, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28957, 440, 3187}, + /* 2 : VCMPNLT_USSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 05 ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(05) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNLT_USSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5260, 545, 4873}, +}; + +static const struct itemplate instrux_VCMPNLTSS[3] = { + /* 0 : VCMPNLTSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 05 ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(05) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLTSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28948, 440, 3188}, + /* 1 : VCMPNLTSS xmmreg,xmmrm64 [r+vm: vex.nds.lig.f3.0f c2 /r 05 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 002) 001(c2) 110 001(05) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLTSS, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28957, 440, 3188}, + /* 2 : VCMPNLTSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 05 ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(05) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNLTSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5260, 545, 4865}, +}; + +static const struct itemplate instrux_VCMPNLE_USSS[3] = { + /* 0 : VCMPNLE_USSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 06 ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(06) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLE_USSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28966, 440, 3189}, + /* 1 : VCMPNLE_USSS xmmreg,xmmrm64 [r+vm: vex.nds.lig.f3.0f c2 /r 06 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 002) 001(c2) 110 001(06) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLE_USSS, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28975, 440, 3189}, + /* 2 : VCMPNLE_USSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 06 ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(06) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNLE_USSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5348, 545, 4889}, +}; + +static const struct itemplate instrux_VCMPNLESS[3] = { + /* 0 : VCMPNLESS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 06 ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(06) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLESS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28966, 440, 3190}, + /* 1 : VCMPNLESS xmmreg,xmmrm64 [r+vm: vex.nds.lig.f3.0f c2 /r 06 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 002) 001(c2) 110 001(06) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLESS, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28975, 440, 3190}, + /* 2 : VCMPNLESS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 06 ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(06) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNLESS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5348, 545, 4881}, +}; + +static const struct itemplate instrux_VCMPORD_QSS[3] = { + /* 0 : VCMPORD_QSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 07 ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(07) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPORD_QSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28984, 440, 3191}, + /* 1 : VCMPORD_QSS xmmreg,xmmrm64 [r+vm: vex.nds.lig.f3.0f c2 /r 07 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 002) 001(c2) 110 001(07) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPORD_QSS, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28993, 440, 3191}, + /* 2 : VCMPORD_QSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 07 ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(07) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPORD_QSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5436, 545, 4905}, +}; + +static const struct itemplate instrux_VCMPORDSS[3] = { + /* 0 : VCMPORDSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 07 ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(07) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPORDSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28984, 440, 3192}, + /* 1 : VCMPORDSS xmmreg,xmmrm64 [r+vm: vex.nds.lig.f3.0f c2 /r 07 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 002) 001(c2) 110 001(07) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPORDSS, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+28993, 440, 3192}, + /* 2 : VCMPORDSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 07 ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(07) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPORDSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5436, 545, 4897}, +}; + +static const struct itemplate instrux_VCMPEQ_UQSS[3] = { + /* 0 : VCMPEQ_UQSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 08 ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(08) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQ_UQSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29002, 440, 3193}, + /* 1 : VCMPEQ_UQSS xmmreg,xmmrm64 [r+vm: vex.nds.lig.f3.0f c2 /r 08 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 002) 001(c2) 110 001(08) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQ_UQSS, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29011, 440, 3193}, + /* 2 : VCMPEQ_UQSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 08 ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(08) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPEQ_UQSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5524, 545, 4913}, +}; + +static const struct itemplate instrux_VCMPNGE_USSS[3] = { + /* 0 : VCMPNGE_USSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 09 ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(09) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGE_USSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29020, 440, 3194}, + /* 1 : VCMPNGE_USSS xmmreg,xmmrm64 [r+vm: vex.nds.lig.f3.0f c2 /r 09 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 002) 001(c2) 110 001(09) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGE_USSS, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29029, 440, 3194}, + /* 2 : VCMPNGE_USSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 09 ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(09) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNGE_USSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5612, 545, 4929}, +}; + +static const struct itemplate instrux_VCMPNGESS[3] = { + /* 0 : VCMPNGESS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 09 ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(09) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGESS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29020, 440, 3195}, + /* 1 : VCMPNGESS xmmreg,xmmrm64 [r+vm: vex.nds.lig.f3.0f c2 /r 09 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 002) 001(c2) 110 001(09) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGESS, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29029, 440, 3195}, + /* 2 : VCMPNGESS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 09 ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(09) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNGESS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5612, 545, 4921}, +}; + +static const struct itemplate instrux_VCMPNGT_USSS[3] = { + /* 0 : VCMPNGT_USSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 0a ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(0a) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGT_USSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29038, 440, 3196}, + /* 1 : VCMPNGT_USSS xmmreg,xmmrm64 [r+vm: vex.nds.lig.f3.0f c2 /r 0a ] ND,AVX,SANDYBRIDGE */ + /* 260(001 002) 001(c2) 110 001(0a) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGT_USSS, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29047, 440, 3196}, + /* 2 : VCMPNGT_USSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 0a ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(0a) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNGT_USSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5700, 545, 4945}, +}; + +static const struct itemplate instrux_VCMPNGTSS[3] = { + /* 0 : VCMPNGTSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 0a ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(0a) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGTSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29038, 440, 3197}, + /* 1 : VCMPNGTSS xmmreg,xmmrm64 [r+vm: vex.nds.lig.f3.0f c2 /r 0a ] ND,AVX,SANDYBRIDGE */ + /* 260(001 002) 001(c2) 110 001(0a) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGTSS, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29047, 440, 3197}, + /* 2 : VCMPNGTSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 0a ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(0a) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNGTSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5700, 545, 4937}, +}; + +static const struct itemplate instrux_VCMPFALSE_OQSS[3] = { + /* 0 : VCMPFALSE_OQSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 0b ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(0b) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPFALSE_OQSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29056, 440, 3198}, + /* 1 : VCMPFALSE_OQSS xmmreg,xmmrm64 [r+vm: vex.nds.lig.f3.0f c2 /r 0b ] ND,AVX,SANDYBRIDGE */ + /* 260(001 002) 001(c2) 110 001(0b) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPFALSE_OQSS, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29065, 440, 3198}, + /* 2 : VCMPFALSE_OQSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 0b ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(0b) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPFALSE_OQSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5788, 545, 4961}, +}; + +static const struct itemplate instrux_VCMPFALSESS[3] = { + /* 0 : VCMPFALSESS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 0b ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(0b) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPFALSESS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29056, 440, 3199}, + /* 1 : VCMPFALSESS xmmreg,xmmrm64 [r+vm: vex.nds.lig.f3.0f c2 /r 0b ] ND,AVX,SANDYBRIDGE */ + /* 260(001 002) 001(c2) 110 001(0b) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPFALSESS, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29065, 440, 3199}, + /* 2 : VCMPFALSESS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 0b ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(0b) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPFALSESS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5788, 545, 4953}, +}; + +static const struct itemplate instrux_VCMPNEQ_OQSS[3] = { + /* 0 : VCMPNEQ_OQSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 0c ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(0c) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQ_OQSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29074, 440, 3200}, + /* 1 : VCMPNEQ_OQSS xmmreg,xmmrm64 [r+vm: vex.nds.lig.f3.0f c2 /r 0c ] ND,AVX,SANDYBRIDGE */ + /* 260(001 002) 001(c2) 110 001(0c) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQ_OQSS, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29083, 440, 3200}, + /* 2 : VCMPNEQ_OQSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 0c ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(0c) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNEQ_OQSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5876, 545, 4969}, +}; + +static const struct itemplate instrux_VCMPGE_OSSS[3] = { + /* 0 : VCMPGE_OSSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 0d ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(0d) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGE_OSSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29092, 440, 3201}, + /* 1 : VCMPGE_OSSS xmmreg,xmmrm64 [r+vm: vex.nds.lig.f3.0f c2 /r 0d ] ND,AVX,SANDYBRIDGE */ + /* 260(001 002) 001(c2) 110 001(0d) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGE_OSSS, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29101, 440, 3201}, + /* 2 : VCMPGE_OSSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 0d ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(0d) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPGE_OSSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5964, 545, 4985}, +}; + +static const struct itemplate instrux_VCMPGESS[3] = { + /* 0 : VCMPGESS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 0d ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(0d) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGESS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29092, 440, 3202}, + /* 1 : VCMPGESS xmmreg,xmmrm64 [r+vm: vex.nds.lig.f3.0f c2 /r 0d ] ND,AVX,SANDYBRIDGE */ + /* 260(001 002) 001(c2) 110 001(0d) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGESS, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29101, 440, 3202}, + /* 2 : VCMPGESS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 0d ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(0d) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPGESS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5964, 545, 4977}, +}; + +static const struct itemplate instrux_VCMPGT_OSSS[3] = { + /* 0 : VCMPGT_OSSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 0e ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(0e) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGT_OSSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29110, 440, 3203}, + /* 1 : VCMPGT_OSSS xmmreg,xmmrm64 [r+vm: vex.nds.lig.f3.0f c2 /r 0e ] ND,AVX,SANDYBRIDGE */ + /* 260(001 002) 001(c2) 110 001(0e) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGT_OSSS, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29119, 440, 3203}, + /* 2 : VCMPGT_OSSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 0e ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(0e) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPGT_OSSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+6052, 545, 5001}, +}; + +static const struct itemplate instrux_VCMPGTSS[3] = { + /* 0 : VCMPGTSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 0e ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(0e) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGTSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29110, 440, 3204}, + /* 1 : VCMPGTSS xmmreg,xmmrm64 [r+vm: vex.nds.lig.f3.0f c2 /r 0e ] ND,AVX,SANDYBRIDGE */ + /* 260(001 002) 001(c2) 110 001(0e) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGTSS, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29119, 440, 3204}, + /* 2 : VCMPGTSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 0e ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(0e) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPGTSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+6052, 545, 4993}, +}; + +static const struct itemplate instrux_VCMPTRUE_UQSS[3] = { + /* 0 : VCMPTRUE_UQSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 0f ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(0f) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPTRUE_UQSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29128, 440, 3205}, + /* 1 : VCMPTRUE_UQSS xmmreg,xmmrm64 [r+vm: vex.nds.lig.f3.0f c2 /r 0f ] ND,AVX,SANDYBRIDGE */ + /* 260(001 002) 001(c2) 110 001(0f) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPTRUE_UQSS, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29137, 440, 3205}, + /* 2 : VCMPTRUE_UQSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 0f ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(0f) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPTRUE_UQSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+6140, 545, 5017}, +}; + +static const struct itemplate instrux_VCMPTRUESS[3] = { + /* 0 : VCMPTRUESS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 0f ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(0f) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPTRUESS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29128, 440, 3206}, + /* 1 : VCMPTRUESS xmmreg,xmmrm64 [r+vm: vex.nds.lig.f3.0f c2 /r 0f ] ND,AVX,SANDYBRIDGE */ + /* 260(001 002) 001(c2) 110 001(0f) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPTRUESS, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29137, 440, 3206}, + /* 2 : VCMPTRUESS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 0f ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(0f) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPTRUESS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+6140, 545, 5009}, +}; + +static const struct itemplate instrux_VCMPLT_OQSS[3] = { + /* 0 : VCMPLT_OQSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 11 ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(11) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLT_OQSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29146, 440, 3208}, + /* 1 : VCMPLT_OQSS xmmreg,xmmrm64 [r+vm: vex.nds.lig.f3.0f c2 /r 11 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 002) 001(c2) 110 001(11) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLT_OQSS, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29155, 440, 3208}, + /* 2 : VCMPLT_OQSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 11 ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(11) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPLT_OQSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+6316, 545, 5033}, +}; + +static const struct itemplate instrux_VCMPLE_OQSS[3] = { + /* 0 : VCMPLE_OQSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 12 ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(12) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLE_OQSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29164, 440, 3209}, + /* 1 : VCMPLE_OQSS xmmreg,xmmrm64 [r+vm: vex.nds.lig.f3.0f c2 /r 12 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 002) 001(c2) 110 001(12) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLE_OQSS, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29173, 440, 3209}, + /* 2 : VCMPLE_OQSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 12 ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(12) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPLE_OQSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+6404, 545, 5041}, +}; + +static const struct itemplate instrux_VCMPUNORD_SSS[3] = { + /* 0 : VCMPUNORD_SSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 13 ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(13) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPUNORD_SSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29182, 440, 3210}, + /* 1 : VCMPUNORD_SSS xmmreg,xmmrm64 [r+vm: vex.nds.lig.f3.0f c2 /r 13 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 002) 001(c2) 110 001(13) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPUNORD_SSS, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29191, 440, 3210}, + /* 2 : VCMPUNORD_SSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 13 ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(13) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPUNORD_SSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+6492, 545, 5049}, +}; + +static const struct itemplate instrux_VCMPNEQ_USSS[3] = { + /* 0 : VCMPNEQ_USSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 14 ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(14) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQ_USSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29200, 440, 3211}, + /* 1 : VCMPNEQ_USSS xmmreg,xmmrm64 [r+vm: vex.nds.lig.f3.0f c2 /r 14 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 002) 001(c2) 110 001(14) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQ_USSS, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29209, 440, 3211}, + /* 2 : VCMPNEQ_USSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 14 ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(14) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNEQ_USSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+6580, 545, 5057}, +}; + +static const struct itemplate instrux_VCMPNLT_UQSS[3] = { + /* 0 : VCMPNLT_UQSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 15 ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(15) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLT_UQSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29218, 440, 3212}, + /* 1 : VCMPNLT_UQSS xmmreg,xmmrm64 [r+vm: vex.nds.lig.f3.0f c2 /r 15 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 002) 001(c2) 110 001(15) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLT_UQSS, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29227, 440, 3212}, + /* 2 : VCMPNLT_UQSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 15 ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(15) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNLT_UQSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+6668, 545, 5065}, +}; + +static const struct itemplate instrux_VCMPNLE_UQSS[3] = { + /* 0 : VCMPNLE_UQSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 16 ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(16) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLE_UQSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29236, 440, 3213}, + /* 1 : VCMPNLE_UQSS xmmreg,xmmrm64 [r+vm: vex.nds.lig.f3.0f c2 /r 16 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 002) 001(c2) 110 001(16) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLE_UQSS, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29245, 440, 3213}, + /* 2 : VCMPNLE_UQSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 16 ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(16) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNLE_UQSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+6756, 545, 5073}, +}; + +static const struct itemplate instrux_VCMPORD_SSS[3] = { + /* 0 : VCMPORD_SSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 17 ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(17) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPORD_SSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29254, 440, 3214}, + /* 1 : VCMPORD_SSS xmmreg,xmmrm64 [r+vm: vex.nds.lig.f3.0f c2 /r 17 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 002) 001(c2) 110 001(17) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPORD_SSS, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29263, 440, 3214}, + /* 2 : VCMPORD_SSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 17 ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(17) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPORD_SSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+6844, 545, 5081}, +}; + +static const struct itemplate instrux_VCMPEQ_USSS[3] = { + /* 0 : VCMPEQ_USSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 18 ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(18) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQ_USSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29272, 440, 3215}, + /* 1 : VCMPEQ_USSS xmmreg,xmmrm64 [r+vm: vex.nds.lig.f3.0f c2 /r 18 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 002) 001(c2) 110 001(18) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQ_USSS, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29281, 440, 3215}, + /* 2 : VCMPEQ_USSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 18 ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(18) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPEQ_USSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+6932, 545, 5089}, +}; + +static const struct itemplate instrux_VCMPNGE_UQSS[3] = { + /* 0 : VCMPNGE_UQSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 19 ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(19) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGE_UQSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29290, 440, 3216}, + /* 1 : VCMPNGE_UQSS xmmreg,xmmrm64 [r+vm: vex.nds.lig.f3.0f c2 /r 19 ] ND,AVX,SANDYBRIDGE */ + /* 260(001 002) 001(c2) 110 001(19) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGE_UQSS, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29299, 440, 3216}, + /* 2 : VCMPNGE_UQSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 19 ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(19) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNGE_UQSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+7020, 545, 5097}, +}; + +static const struct itemplate instrux_VCMPNGT_UQSS[3] = { + /* 0 : VCMPNGT_UQSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 1a ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(1a) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGT_UQSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29308, 440, 3217}, + /* 1 : VCMPNGT_UQSS xmmreg,xmmrm64 [r+vm: vex.nds.lig.f3.0f c2 /r 1a ] ND,AVX,SANDYBRIDGE */ + /* 260(001 002) 001(c2) 110 001(1a) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGT_UQSS, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29317, 440, 3217}, + /* 2 : VCMPNGT_UQSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 1a ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(1a) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNGT_UQSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+7108, 545, 5105}, +}; + +static const struct itemplate instrux_VCMPFALSE_OSSS[3] = { + /* 0 : VCMPFALSE_OSSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 1b ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(1b) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPFALSE_OSSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29326, 440, 3218}, + /* 1 : VCMPFALSE_OSSS xmmreg,xmmrm64 [r+vm: vex.nds.lig.f3.0f c2 /r 1b ] ND,AVX,SANDYBRIDGE */ + /* 260(001 002) 001(c2) 110 001(1b) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPFALSE_OSSS, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29335, 440, 3218}, + /* 2 : VCMPFALSE_OSSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 1b ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(1b) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPFALSE_OSSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+7196, 545, 5113}, +}; + +static const struct itemplate instrux_VCMPNEQ_OSSS[3] = { + /* 0 : VCMPNEQ_OSSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 1c ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(1c) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQ_OSSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29344, 440, 3219}, + /* 1 : VCMPNEQ_OSSS xmmreg,xmmrm64 [r+vm: vex.nds.lig.f3.0f c2 /r 1c ] ND,AVX,SANDYBRIDGE */ + /* 260(001 002) 001(c2) 110 001(1c) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQ_OSSS, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29353, 440, 3219}, + /* 2 : VCMPNEQ_OSSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 1c ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(1c) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNEQ_OSSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+7284, 545, 5121}, +}; + +static const struct itemplate instrux_VCMPGE_OQSS[3] = { + /* 0 : VCMPGE_OQSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 1d ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(1d) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGE_OQSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29362, 440, 3220}, + /* 1 : VCMPGE_OQSS xmmreg,xmmrm64 [r+vm: vex.nds.lig.f3.0f c2 /r 1d ] ND,AVX,SANDYBRIDGE */ + /* 260(001 002) 001(c2) 110 001(1d) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGE_OQSS, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29371, 440, 3220}, + /* 2 : VCMPGE_OQSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 1d ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(1d) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPGE_OQSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+7372, 545, 5129}, +}; + +static const struct itemplate instrux_VCMPGT_OQSS[3] = { + /* 0 : VCMPGT_OQSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 1e ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(1e) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGT_OQSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29380, 440, 3221}, + /* 1 : VCMPGT_OQSS xmmreg,xmmrm64 [r+vm: vex.nds.lig.f3.0f c2 /r 1e ] ND,AVX,SANDYBRIDGE */ + /* 260(001 002) 001(c2) 110 001(1e) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGT_OQSS, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29389, 440, 3221}, + /* 2 : VCMPGT_OQSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 1e ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(1e) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPGT_OQSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+7460, 545, 5137}, +}; + +static const struct itemplate instrux_VCMPTRUE_USSS[3] = { + /* 0 : VCMPTRUE_USSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 1f ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(1f) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPTRUE_USSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29398, 440, 3222}, + /* 1 : VCMPTRUE_USSS xmmreg,xmmrm64 [r+vm: vex.nds.lig.f3.0f c2 /r 1f ] ND,AVX,SANDYBRIDGE */ + /* 260(001 002) 001(c2) 110 001(1f) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPTRUE_USSS, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29407, 440, 3222}, + /* 2 : VCMPTRUE_USSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 1f ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(1f) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPTRUE_USSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+7548, 545, 5145}, +}; + +static const struct itemplate instrux_VCMPSS[3] = { + /* 0 : VCMPSS xmmreg,xmmreg*,xmmrm32,imm8 [rvmi: vex.nds.lig.f3.0f c2 /r ib ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 023 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPSS, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+51955, 440, 3223}, + /* 1 : VCMPSS xmmreg,xmmrm32,imm8 [r+vmi: vex.nds.lig.f3.0f c2 /r ib ] ND,AVX,SANDYBRIDGE */ + /* 260(001 002) 001(c2) 110 022 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPSS, 3, {XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+51963, 440, 3223}, + /* 2 : VCMPSS kreg|mask,xmmreg,xmmrm32|sae,imm8 [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r ib ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 023 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPSS, 4, {OPMASKREG,XMMREG,RM_XMM|BITS32,IMM_NORMAL|BITS8,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+18323, 545, 5153}, +}; + +static const struct itemplate instrux_VCOMISD[2] = { + /* 0 : VCOMISD xmmreg,xmmrm64 [rm: vex.lig.66.0f 2f /r ] FL,AVX,SANDYBRIDGE */ + /* 270(001 001) 001(2f) 110 : NOAPX,LIG,WIG,FL,VEX,AVX,SANDYBRIDGE */ + {I_VCOMISD, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58792, 442, 3224}, + /* 1 : VCOMISD xmmreg,xmmrm64|sae [rm:t1s: evex.lig.66.0f.w1 2f /r ] FL,AVX512,FUTURE */ + /* 250(f1 fd 08) 306 001(2f) 110 : LIG,FL,EVEX,PROT,AVX512,FUTURE */ + {I_VCOMISD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+31045, 548, 5154}, +}; + +static const struct itemplate instrux_VCOMISS[2] = { + /* 0 : VCOMISS xmmreg,xmmrm32 [rm: vex.lig.0f 2f /r ] FL,AVX,SANDYBRIDGE */ + /* 270(001 000) 001(2f) 110 : NOAPX,LIG,WIG,FL,VEX,AVX,SANDYBRIDGE */ + {I_VCOMISS, 2, {XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58799, 442, 3225}, + /* 1 : VCOMISS xmmreg,xmmrm32|sae [rm:t1s: evex.lig.0f.w0 2f /r ] FL,AVX512,FUTURE */ + /* 250(f1 7c 08) 306 001(2f) 110 : LIG,FL,EVEX,PROT,AVX512,FUTURE */ + {I_VCOMISS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+31054, 548, 5155}, +}; + +static const struct itemplate instrux_VCVTDQ2PD[5] = { + /* 0 : VCVTDQ2PD xmmreg,xmmrm64 [rm: vex.128.f3.0f e6 /r ] AVX,SANDYBRIDGE */ + /* 270(001 002) 001(e6) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCVTDQ2PD, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58806, 433, 3226}, + /* 1 : VCVTDQ2PD ymmreg,xmmrm128 [rm: vex.256.f3.0f e6 /r ] AVX,SANDYBRIDGE */ + /* 270(001 006) 001(e6) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCVTDQ2PD, 2, {YMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58813, 433, 3227}, + /* 2 : VCVTDQ2PD xmmreg|mask|z,xmmrm64|b32 [rm:hv: evex.128.f3.0f.w0 e6 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7e 08) 302 001(e6) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTDQ2PD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+31171, 543, 5168}, + /* 3 : VCVTDQ2PD ymmreg|mask|z,xmmrm128|b32 [rm:hv: evex.256.f3.0f.w0 e6 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7e 28) 302 001(e6) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTDQ2PD, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+31180, 543, 5169}, + /* 4 : VCVTDQ2PD zmmreg|mask|z,ymmrm256|b32|er [rm:hv: evex.512.f3.0f.w0 e6 /r ] AVX512,FUTURE */ + /* 250(f1 7e 48) 302 001(e6) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VCVTDQ2PD, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+31189, 544, 5170}, +}; + +static const struct itemplate instrux_VCVTDQ2PS[5] = { + /* 0 : VCVTDQ2PS xmmreg,xmmrm128 [rm: vex.128.0f 5b /r ] AVX,SANDYBRIDGE */ + /* 270(001 000) 001(5b) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCVTDQ2PS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58820, 433, 3228}, + /* 1 : VCVTDQ2PS ymmreg,ymmrm256 [rm: vex.256.0f 5b /r ] AVX,SANDYBRIDGE */ + /* 270(001 004) 001(5b) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCVTDQ2PS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58827, 433, 3229}, + /* 2 : VCVTDQ2PS xmmreg|mask|z,xmmrm128|b32 [rm:fv: evex.128.0f.w0 5b /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7c 08) 301 001(5b) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTDQ2PS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+31198, 543, 5171}, + /* 3 : VCVTDQ2PS ymmreg|mask|z,ymmrm256|b32 [rm:fv: evex.256.0f.w0 5b /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7c 28) 301 001(5b) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTDQ2PS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+31207, 543, 5172}, + /* 4 : VCVTDQ2PS zmmreg|mask|z,zmmrm512|b32|er [rm:fv: evex.512.0f.w0 5b /r ] AVX512,FUTURE */ + /* 250(f1 7c 48) 301 001(5b) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VCVTDQ2PS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+31216, 544, 5173}, +}; + +static const struct itemplate instrux_VCVTPD2DQ[7] = { + /* 0 : VCVTPD2DQ xmmreg,xmmreg [rm: vex.128.f2.0f e6 /r ] AVX,SANDYBRIDGE */ + /* 270(001 003) 001(e6) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCVTPD2DQ, 2, {XMMREG|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58834, 433, 3230}, + /* 1 : VCVTPD2DQ xmmreg,mem128 [rm: vex.128.f2.0f e6 /r ] AR0-1,SO,AVX,SANDYBRIDGE */ + /* 270(001 003) 001(e6) 110 : AR0,AR1,SO,NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCVTPD2DQ, 2, {XMMREG|RN_L16,MEMORY|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58834, 443, 3231}, + /* 2 : VCVTPD2DQ xmmreg,ymmreg [rm: vex.256.f2.0f e6 /r ] AVX,SANDYBRIDGE */ + /* 270(001 007) 001(e6) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCVTPD2DQ, 2, {XMMREG|RN_L16,YMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58841, 433, 3232}, + /* 3 : VCVTPD2DQ xmmreg,mem256 [rm: vex.256.f2.0f e6 /r ] AR0-1,SY,AVX,SANDYBRIDGE */ + /* 270(001 007) 001(e6) 110 : AR0,AR1,SY,NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCVTPD2DQ, 2, {XMMREG|RN_L16,MEMORY|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58841, 444, 3233}, + /* 4 : VCVTPD2DQ xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.f2.0f.w1 e6 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 ff 08) 301 001(e6) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTPD2DQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+31225, 543, 5174}, + /* 5 : VCVTPD2DQ xmmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.f2.0f.w1 e6 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 ff 28) 301 001(e6) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTPD2DQ, 2, {XMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+31234, 543, 5175}, + /* 6 : VCVTPD2DQ ymmreg|mask|z,zmmrm512|b64|er [rm:fv: evex.512.f2.0f.w1 e6 /r ] AVX512,FUTURE */ + /* 250(f1 ff 48) 301 001(e6) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VCVTPD2DQ, 2, {YMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+31243, 544, 5176}, +}; + +static const struct itemplate instrux_VCVTPD2PS[7] = { + /* 0 : VCVTPD2PS xmmreg,xmmreg [rm: vex.128.66.0f 5a /r ] AVX,SANDYBRIDGE */ + /* 270(001 001) 001(5a) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCVTPD2PS, 2, {XMMREG|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58848, 433, 3234}, + /* 1 : VCVTPD2PS xmmreg,mem128 [rm: vex.128.66.0f 5a /r ] AR0-1,SO,AVX,SANDYBRIDGE */ + /* 270(001 001) 001(5a) 110 : AR0,AR1,SO,NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCVTPD2PS, 2, {XMMREG|RN_L16,MEMORY|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58848, 443, 3235}, + /* 2 : VCVTPD2PS xmmreg,ymmreg [rm: vex.256.66.0f 5a /r ] AVX,SANDYBRIDGE */ + /* 270(001 005) 001(5a) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCVTPD2PS, 2, {XMMREG|RN_L16,YMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58855, 433, 3236}, + /* 3 : VCVTPD2PS xmmreg,mem256 [rm: vex.256.66.0f 5a /r ] AR0-1,SY,AVX,SANDYBRIDGE */ + /* 270(001 005) 001(5a) 110 : AR0,AR1,SY,NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCVTPD2PS, 2, {XMMREG|RN_L16,MEMORY|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58855, 444, 3237}, + /* 4 : VCVTPD2PS xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.66.0f.w1 5a /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 fd 08) 301 001(5a) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTPD2PS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+31252, 543, 5177}, + /* 5 : VCVTPD2PS xmmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.66.0f.w1 5a /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 fd 28) 301 001(5a) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTPD2PS, 2, {XMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+31261, 543, 5178}, + /* 6 : VCVTPD2PS ymmreg|mask|z,zmmrm512|b64|er [rm:fv: evex.512.66.0f.w1 5a /r ] AVX512,FUTURE */ + /* 250(f1 fd 48) 301 001(5a) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VCVTPD2PS, 2, {YMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+31270, 544, 5179}, +}; + +static const struct itemplate instrux_VCVTPS2DQ[5] = { + /* 0 : VCVTPS2DQ xmmreg,xmmrm128 [rm: vex.128.66.0f 5b /r ] AVX,SANDYBRIDGE */ + /* 270(001 001) 001(5b) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCVTPS2DQ, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58862, 433, 3238}, + /* 1 : VCVTPS2DQ ymmreg,ymmrm256 [rm: vex.256.66.0f 5b /r ] AVX,SANDYBRIDGE */ + /* 270(001 005) 001(5b) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCVTPS2DQ, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58869, 433, 3239}, + /* 2 : VCVTPS2DQ xmmreg|mask|z,xmmrm128|b32 [rm:fv: evex.128.66.0f.w0 5b /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7d 08) 301 001(5b) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTPS2DQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+31387, 543, 5192}, + /* 3 : VCVTPS2DQ ymmreg|mask|z,ymmrm256|b32 [rm:fv: evex.256.66.0f.w0 5b /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7d 28) 301 001(5b) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTPS2DQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+31396, 543, 5193}, + /* 4 : VCVTPS2DQ zmmreg|mask|z,zmmrm512|b32|er [rm:fv: evex.512.66.0f.w0 5b /r ] AVX512,FUTURE */ + /* 250(f1 7d 48) 301 001(5b) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VCVTPS2DQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+31405, 544, 5194}, +}; + +static const struct itemplate instrux_VCVTPS2PD[5] = { + /* 0 : VCVTPS2PD xmmreg,xmmrm64 [rm: vex.128.0f 5a /r ] AVX,SANDYBRIDGE */ + /* 270(001 000) 001(5a) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCVTPS2PD, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58876, 433, 3240}, + /* 1 : VCVTPS2PD ymmreg,xmmrm128 [rm: vex.256.0f 5a /r ] AVX,SANDYBRIDGE */ + /* 270(001 004) 001(5a) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCVTPS2PD, 2, {YMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58883, 433, 3241}, + /* 2 : VCVTPS2PD xmmreg|mask|z,xmmrm64|b32 [rm:hv: evex.128.0f.w0 5a /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7c 08) 302 001(5a) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTPS2PD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+31414, 543, 5195}, + /* 3 : VCVTPS2PD ymmreg|mask|z,xmmrm128|b32 [rm:hv: evex.256.0f.w0 5a /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7c 28) 302 001(5a) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTPS2PD, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+31423, 543, 5196}, + /* 4 : VCVTPS2PD zmmreg|mask|z,ymmrm256|b32|sae [rm:hv: evex.512.0f.w0 5a /r ] AVX512,FUTURE */ + /* 250(f1 7c 48) 302 001(5a) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VCVTPS2PD, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+31432, 544, 5197}, +}; + +static const struct itemplate instrux_VCVTSD2SI[4] = { + /* 0 : VCVTSD2SI reg32,xmmrm64 [rm: vex.lig.f2.0f.w0 2d /r ] AVX,SANDYBRIDGE */ + /* 270(001 003) 001(2d) 110 : NOAPX,LIG,VEX,AVX,SANDYBRIDGE */ + {I_VCVTSD2SI, 2, {REG_GPR|BITS32|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58890, 445, 3242}, + /* 1 : VCVTSD2SI reg64,xmmrm64 [rm: vex.lig.f2.0f.w1 2d /r ] LONG,PROT,AVX,X86_64,SANDYBRIDGE */ + /* 270(001 203) 001(2d) 110 : NOAPX,LIG,LONG,VEX,PROT,AVX,SANDYBRIDGE */ + {I_VCVTSD2SI, 2, {REG_GPR|BITS64|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58897, 446, 3243}, + /* 2 : VCVTSD2SI reg32,xmmrm64|er [rm:t1f64: evex.lig.f2.0f.w0 2d /r ] AVX512,FUTURE */ + /* 250(f1 7f 08) 310 001(2d) 110 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCVTSD2SI, 2, {REG_GPR|BITS32,RM_XMM|BITS64,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+31576, 545, 5219}, + /* 3 : VCVTSD2SI reg64,xmmrm64|er [rm:t1f64: evex.lig.f2.0f.w1 2d /r ] AVX512,FUTURE */ + /* 250(f1 ff 08) 310 001(2d) 110 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCVTSD2SI, 2, {REG_GPR|BITS64,RM_XMM|BITS64,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+31585, 545, 5220}, +}; + +static const struct itemplate instrux_VCVTSD2SS[4] = { + /* 0 : VCVTSD2SS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f 5a /r ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(5a) 120 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCVTSD2SS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+58904, 440, 3244}, + /* 1 : VCVTSD2SS xmmreg,xmmrm64 [r+vm: vex.nds.lig.f2.0f 5a /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 003) 001(5a) 110 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCVTSD2SS, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58911, 440, 3244}, + /* 2 : VCVTSD2SS xmmreg|mask|z,xmmreg*,xmmrm64|er [rvm:t1s: evex.nds.lig.f2.0f.w1 5a /r ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(5a) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCVTSD2SS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+31594, 545, 5221}, + /* 3 : VCVTSD2SS xmmreg|mask|z,xmmrm64|er [r+vm:t1s: evex.nds.lig.f2.0f.w1 5a /r ] ND,AVX512,FUTURE */ + /* 240(f1 ff 08) 306 001(5a) 110 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCVTSD2SS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+31603, 545, 5221}, +}; + +static const struct itemplate instrux_VCVTSI2SD[10] = { + /* 0 : VCVTSI2SD xmmreg,xmmreg*,rm32 [rvm: vex.nds.lig.f2.0f.w0 2a /r ] AR0,AR1,AR2,SD,AVX,SANDYBRIDGE */ + /* 261(001 003) 001(2a) 120 : AR0,AR1,AR2,SD,NOAPX,LIG,VEX,AVX,SANDYBRIDGE */ + {I_VCVTSI2SD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+58918, 447, 3245}, + /* 1 : VCVTSI2SD xmmreg,rm32 [r+vm: vex.nds.lig.f2.0f.w0 2a /r ] ND,AR0,AR1,SD,AVX,SANDYBRIDGE */ + /* 260(001 003) 001(2a) 110 : AR0,AR1,SD,NOAPX,LIG,VEX,AVX,SANDYBRIDGE */ + {I_VCVTSI2SD, 2, {XMMREG|RN_L16,RM_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58925, 448, 3245}, + /* 2 : VCVTSI2SD xmmreg,xmmreg*,mem32 [rvm: vex.nds.lig.f2.0f.w0 2a /r ] ND,AR0,AR1,AR2,SD,AVX,SANDYBRIDGE */ + /* 261(001 003) 001(2a) 120 : AR0,AR1,AR2,SD,NOAPX,LIG,VEX,AVX,SANDYBRIDGE */ + {I_VCVTSI2SD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,MEMORY|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+58918, 447, 3246}, + /* 3 : VCVTSI2SD xmmreg,mem32 [r+vm: vex.nds.lig.f2.0f.w0 2a /r ] ND,AR0,AR1,SD,AVX,SANDYBRIDGE */ + /* 260(001 003) 001(2a) 110 : AR0,AR1,SD,NOAPX,LIG,VEX,AVX,SANDYBRIDGE */ + {I_VCVTSI2SD, 2, {XMMREG|RN_L16,MEMORY|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58925, 448, 3246}, + /* 4 : VCVTSI2SD xmmreg,xmmreg*,rm64 [rvm: vex.nds.lig.f2.0f.w1 2a /r ] AR0,AR1,AR2,SQ,LONG,PROT,AVX,X86_64,SANDYBRIDGE */ + /* 261(001 203) 001(2a) 120 : AR0,AR1,AR2,SQ,NOAPX,LIG,LONG,VEX,PROT,AVX,SANDYBRIDGE */ + {I_VCVTSI2SD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+58932, 449, 3247}, + /* 5 : VCVTSI2SD xmmreg,rm64 [r+vm: vex.nds.lig.f2.0f.w1 2a /r ] ND,AR0,AR1,SQ,LONG,PROT,AVX,X86_64,SANDYBRIDGE */ + /* 260(001 203) 001(2a) 110 : AR0,AR1,SQ,NOAPX,LIG,LONG,VEX,PROT,AVX,SANDYBRIDGE */ + {I_VCVTSI2SD, 2, {XMMREG|RN_L16,RM_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58939, 450, 3247}, + /* 6 : VCVTSI2SD xmmreg,xmmreg*,rm32 [rvm:t1s: evex.nds.lig.f2.0f.w0 2a /r ] AVX512,FUTURE */ + /* 241(f1 7f 08) 306 001(2a) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCVTSI2SD, 3, {XMMREG,XMMREG,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+31630, 545, 5224}, + /* 7 : VCVTSI2SD xmmreg,rm32 [r+vm:t1s: evex.nds.lig.f2.0f.w0 2a /r ] ND,AVX512,FUTURE */ + /* 240(f1 7f 08) 306 001(2a) 110 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCVTSI2SD, 2, {XMMREG,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+31639, 545, 5224}, + /* 8 : VCVTSI2SD xmmreg,xmmreg*,rm64|er [rvm:t1s: evex.nds.lig.f2.0f.w1 2a /r ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(2a) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCVTSI2SD, 3, {XMMREG,XMMREG,RM_GPR|BITS64,0,0}, {0,0,ER,0,0}, nasm_bytecodes+31648, 545, 5225}, + /* 9 : VCVTSI2SD xmmreg,rm64|er [r+vm:t1s: evex.nds.lig.f2.0f.w1 2a /r ] ND,AVX512,FUTURE */ + /* 240(f1 ff 08) 306 001(2a) 110 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCVTSI2SD, 2, {XMMREG,RM_GPR|BITS64,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+31657, 545, 5225}, +}; + +static const struct itemplate instrux_VCVTSI2SS[10] = { + /* 0 : VCVTSI2SS xmmreg,xmmreg*,rm32 [rvm: vex.nds.lig.f3.0f.w0 2a /r ] AR0,AR1,AR2,SD,AVX,SANDYBRIDGE */ + /* 261(001 002) 001(2a) 120 : AR0,AR1,AR2,SD,NOAPX,LIG,VEX,AVX,SANDYBRIDGE */ + {I_VCVTSI2SS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+58946, 447, 3248}, + /* 1 : VCVTSI2SS xmmreg,rm32 [r+vm: vex.nds.lig.f3.0f.w0 2a /r ] ND,AR0,AR1,SD,AVX,SANDYBRIDGE */ + /* 260(001 002) 001(2a) 110 : AR0,AR1,SD,NOAPX,LIG,VEX,AVX,SANDYBRIDGE */ + {I_VCVTSI2SS, 2, {XMMREG|RN_L16,RM_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58953, 448, 3248}, + /* 2 : VCVTSI2SS xmmreg,xmmreg*,mem32 [rvm: vex.nds.lig.f3.0f.w0 2a /r ] ND,AR0,AR1,AR2,SD,AVX,SANDYBRIDGE */ + /* 261(001 002) 001(2a) 120 : AR0,AR1,AR2,SD,NOAPX,LIG,VEX,AVX,SANDYBRIDGE */ + {I_VCVTSI2SS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,MEMORY|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+58946, 447, 3249}, + /* 3 : VCVTSI2SS xmmreg,mem32 [r+vm: vex.nds.lig.f3.0f.w0 2a /r ] ND,AR0,AR1,SD,AVX,SANDYBRIDGE */ + /* 260(001 002) 001(2a) 110 : AR0,AR1,SD,NOAPX,LIG,VEX,AVX,SANDYBRIDGE */ + {I_VCVTSI2SS, 2, {XMMREG|RN_L16,MEMORY|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58953, 448, 3249}, + /* 4 : VCVTSI2SS xmmreg,xmmreg*,rm64 [rvm: vex.nds.lig.f3.0f.w1 2a /r ] AR0,AR1,AR2,SQ,LONG,PROT,AVX,X86_64,SANDYBRIDGE */ + /* 261(001 202) 001(2a) 120 : AR0,AR1,AR2,SQ,NOAPX,LIG,LONG,VEX,PROT,AVX,SANDYBRIDGE */ + {I_VCVTSI2SS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+58960, 449, 3250}, + /* 5 : VCVTSI2SS xmmreg,rm64 [r+vm: vex.nds.lig.f3.0f.w1 2a /r ] ND,AR0,AR1,SQ,LONG,PROT,AVX,X86_64,SANDYBRIDGE */ + /* 260(001 202) 001(2a) 110 : AR0,AR1,SQ,NOAPX,LIG,LONG,VEX,PROT,AVX,SANDYBRIDGE */ + {I_VCVTSI2SS, 2, {XMMREG|RN_L16,RM_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58967, 450, 3250}, + /* 6 : VCVTSI2SS xmmreg,xmmreg*,rm32|er [rvm:t1s: evex.nds.lig.f3.0f.w0 2a /r ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(2a) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCVTSI2SS, 3, {XMMREG,XMMREG,RM_GPR|BITS32,0,0}, {0,0,ER,0,0}, nasm_bytecodes+31666, 545, 5226}, + /* 7 : VCVTSI2SS xmmreg,rm32|er [r+vm:t1s: evex.nds.lig.f3.0f.w0 2a /r ] ND,AVX512,FUTURE */ + /* 240(f1 7e 08) 306 001(2a) 110 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCVTSI2SS, 2, {XMMREG,RM_GPR|BITS32,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+31675, 545, 5226}, + /* 8 : VCVTSI2SS xmmreg,xmmreg*,rm64|er [rvm:t1s: evex.nds.lig.f3.0f.w1 2a /r ] AVX512,FUTURE */ + /* 241(f1 fe 08) 306 001(2a) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCVTSI2SS, 3, {XMMREG,XMMREG,RM_GPR|BITS64,0,0}, {0,0,ER,0,0}, nasm_bytecodes+31684, 545, 5227}, + /* 9 : VCVTSI2SS xmmreg,rm64|er [r+vm:t1s: evex.nds.lig.f3.0f.w1 2a /r ] ND,AVX512,FUTURE */ + /* 240(f1 fe 08) 306 001(2a) 110 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCVTSI2SS, 2, {XMMREG,RM_GPR|BITS64,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+31693, 545, 5227}, +}; + +static const struct itemplate instrux_VCVTSS2SD[4] = { + /* 0 : VCVTSS2SD xmmreg,xmmreg*,xmmrm32 [rvm: vex.nds.lig.f3.0f 5a /r ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(5a) 120 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCVTSS2SD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+58974, 440, 3251}, + /* 1 : VCVTSS2SD xmmreg,xmmrm32 [r+vm: vex.nds.lig.f3.0f 5a /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 002) 001(5a) 110 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCVTSS2SD, 2, {XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58981, 440, 3251}, + /* 2 : VCVTSS2SD xmmreg|mask|z,xmmreg*,xmmrm32|sae [rvm:t1s: evex.nds.lig.f3.0f.w0 5a /r ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(5a) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCVTSS2SD, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+31702, 545, 5228}, + /* 3 : VCVTSS2SD xmmreg|mask|z,xmmrm32|sae [r+vm:t1s: evex.nds.lig.f3.0f.w0 5a /r ] ND,AVX512,FUTURE */ + /* 240(f1 7e 08) 306 001(5a) 110 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCVTSS2SD, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+31711, 545, 5228}, +}; + +static const struct itemplate instrux_VCVTSS2SI[4] = { + /* 0 : VCVTSS2SI reg32,xmmrm32 [rm: vex.lig.f3.0f.w0 2d /r ] AVX,SANDYBRIDGE */ + /* 270(001 002) 001(2d) 110 : NOAPX,LIG,VEX,AVX,SANDYBRIDGE */ + {I_VCVTSS2SI, 2, {REG_GPR|BITS32|RN_L16,RM_XMM|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58988, 445, 3252}, + /* 1 : VCVTSS2SI reg64,xmmrm32 [rm: vex.lig.f3.0f.w1 2d /r ] LONG,PROT,AVX,X86_64,SANDYBRIDGE */ + /* 270(001 202) 001(2d) 110 : NOAPX,LIG,LONG,VEX,PROT,AVX,SANDYBRIDGE */ + {I_VCVTSS2SI, 2, {REG_GPR|BITS64|RN_L16,RM_XMM|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58995, 446, 3253}, + /* 2 : VCVTSS2SI reg32,xmmrm32|er [rm:t1f32: evex.lig.f3.0f.w0 2d /r ] AVX512,FUTURE */ + /* 250(f1 7e 08) 307 001(2d) 110 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCVTSS2SI, 2, {REG_GPR|BITS32,RM_XMM|BITS32,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+31720, 545, 5229}, + /* 3 : VCVTSS2SI reg64,xmmrm32|er [rm:t1f32: evex.lig.f3.0f.w1 2d /r ] AVX512,FUTURE */ + /* 250(f1 fe 08) 307 001(2d) 110 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCVTSS2SI, 2, {REG_GPR|BITS64,RM_XMM|BITS32,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+31729, 545, 5230}, +}; + +static const struct itemplate instrux_VCVTTPD2DQ[7] = { + /* 0 : VCVTTPD2DQ xmmreg,xmmreg [rm: vex.128.66.0f e6 /r ] AVX,SANDYBRIDGE */ + /* 270(001 001) 001(e6) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCVTTPD2DQ, 2, {XMMREG|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59002, 433, 3254}, + /* 1 : VCVTTPD2DQ xmmreg,mem128 [rm: vex.128.66.0f e6 /r ] AR0-1,SO,AVX,SANDYBRIDGE */ + /* 270(001 001) 001(e6) 110 : AR0,AR1,SO,NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCVTTPD2DQ, 2, {XMMREG|RN_L16,MEMORY|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59002, 443, 3255}, + /* 2 : VCVTTPD2DQ xmmreg,ymmreg [rm: vex.256.66.0f e6 /r ] AVX,SANDYBRIDGE */ + /* 270(001 005) 001(e6) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCVTTPD2DQ, 2, {XMMREG|RN_L16,YMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59009, 433, 3256}, + /* 3 : VCVTTPD2DQ xmmreg,mem256 [rm: vex.256.66.0f e6 /r ] AR0-1,SY,AVX,SANDYBRIDGE */ + /* 270(001 005) 001(e6) 110 : AR0,AR1,SY,NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCVTTPD2DQ, 2, {XMMREG|RN_L16,MEMORY|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59009, 444, 3257}, + /* 4 : VCVTTPD2DQ xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.66.0f.w1 e6 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 fd 08) 301 001(e6) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTTPD2DQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+31756, 543, 5233}, + /* 5 : VCVTTPD2DQ xmmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.66.0f.w1 e6 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 fd 28) 301 001(e6) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTTPD2DQ, 2, {XMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+31765, 543, 5234}, + /* 6 : VCVTTPD2DQ ymmreg|mask|z,zmmrm512|b64|sae [rm:fv: evex.512.66.0f.w1 e6 /r ] AVX512,FUTURE */ + /* 250(f1 fd 48) 301 001(e6) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VCVTTPD2DQ, 2, {YMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+31774, 544, 5235}, +}; + +static const struct itemplate instrux_VCVTTPS2DQ[5] = { + /* 0 : VCVTTPS2DQ xmmreg,xmmrm128 [rm: vex.128.f3.0f 5b /r ] AVX,SANDYBRIDGE */ + /* 270(001 002) 001(5b) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCVTTPS2DQ, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59016, 433, 3258}, + /* 1 : VCVTTPS2DQ ymmreg,ymmrm256 [rm: vex.256.f3.0f 5b /r ] AVX,SANDYBRIDGE */ + /* 270(001 006) 001(5b) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCVTTPS2DQ, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59023, 433, 3259}, + /* 2 : VCVTTPS2DQ xmmreg|mask|z,xmmrm128|b32 [rm:fv: evex.128.f3.0f.w0 5b /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7e 08) 301 001(5b) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTTPS2DQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+31864, 543, 5245}, + /* 3 : VCVTTPS2DQ ymmreg|mask|z,ymmrm256|b32 [rm:fv: evex.256.f3.0f.w0 5b /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7e 28) 301 001(5b) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTTPS2DQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+31873, 543, 5246}, + /* 4 : VCVTTPS2DQ zmmreg|mask|z,zmmrm512|b32|sae [rm:fv: evex.512.f3.0f.w0 5b /r ] AVX512,FUTURE */ + /* 250(f1 7e 48) 301 001(5b) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VCVTTPS2DQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+31882, 544, 5247}, +}; + +static const struct itemplate instrux_VCVTTSD2SI[4] = { + /* 0 : VCVTTSD2SI reg32,xmmrm64 [rm: vex.lig.f2.0f.w0 2c /r ] AVX,SANDYBRIDGE */ + /* 270(001 003) 001(2c) 110 : NOAPX,LIG,VEX,AVX,SANDYBRIDGE */ + {I_VCVTTSD2SI, 2, {REG_GPR|BITS32|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59030, 445, 3260}, + /* 1 : VCVTTSD2SI reg64,xmmrm64 [rm: vex.lig.f2.0f.w1 2c /r ] LONG,PROT,AVX,X86_64,SANDYBRIDGE */ + /* 270(001 203) 001(2c) 110 : NOAPX,LIG,LONG,VEX,PROT,AVX,SANDYBRIDGE */ + {I_VCVTTSD2SI, 2, {REG_GPR|BITS64|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59037, 446, 3261}, + /* 2 : VCVTTSD2SI reg32,xmmrm64|sae [rm:t1f64: evex.lig.f2.0f.w0 2c /r ] AVX512,FUTURE */ + /* 250(f1 7f 08) 310 001(2c) 110 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCVTTSD2SI, 2, {REG_GPR|BITS32,RM_XMM|BITS64,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+31972, 545, 5257}, + /* 3 : VCVTTSD2SI reg64,xmmrm64|sae [rm:t1f64: evex.lig.f2.0f.w1 2c /r ] AVX512,FUTURE */ + /* 250(f1 ff 08) 310 001(2c) 110 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCVTTSD2SI, 2, {REG_GPR|BITS64,RM_XMM|BITS64,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+31981, 545, 5258}, +}; + +static const struct itemplate instrux_VCVTTSS2SI[4] = { + /* 0 : VCVTTSS2SI reg32,xmmrm32 [rm: vex.lig.f3.0f.w0 2c /r ] AVX,SANDYBRIDGE */ + /* 270(001 002) 001(2c) 110 : NOAPX,LIG,VEX,AVX,SANDYBRIDGE */ + {I_VCVTTSS2SI, 2, {REG_GPR|BITS32|RN_L16,RM_XMM|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59044, 445, 3262}, + /* 1 : VCVTTSS2SI reg64,xmmrm32 [rm: vex.lig.f3.0f.w1 2c /r ] LONG,PROT,AVX,X86_64,SANDYBRIDGE */ + /* 270(001 202) 001(2c) 110 : NOAPX,LIG,LONG,VEX,PROT,AVX,SANDYBRIDGE */ + {I_VCVTTSS2SI, 2, {REG_GPR|BITS64|RN_L16,RM_XMM|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59051, 446, 3263}, + /* 2 : VCVTTSS2SI reg32,xmmrm32|sae [rm:t1f32: evex.lig.f3.0f.w0 2c /r ] AVX512,FUTURE */ + /* 250(f1 7e 08) 307 001(2c) 110 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCVTTSS2SI, 2, {REG_GPR|BITS32,RM_XMM|BITS32,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+32008, 545, 5261}, + /* 3 : VCVTTSS2SI reg64,xmmrm32|sae [rm:t1f32: evex.lig.f3.0f.w1 2c /r ] AVX512,FUTURE */ + /* 250(f1 fe 08) 307 001(2c) 110 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCVTTSS2SI, 2, {REG_GPR|BITS64,RM_XMM|BITS32,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+32017, 545, 5262}, +}; + +static const struct itemplate instrux_VDIVPD[10] = { + /* 0 : VDIVPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 5e /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(5e) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VDIVPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59058, 433, 3264}, + /* 1 : VDIVPD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f 5e /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(5e) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VDIVPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59065, 433, 3264}, + /* 2 : VDIVPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 5e /r ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(5e) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VDIVPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59072, 433, 3265}, + /* 3 : VDIVPD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f 5e /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 005) 001(5e) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VDIVPD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59079, 433, 3265}, + /* 4 : VDIVPD xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f.w1 5e /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(5e) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VDIVPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+32224, 543, 5284}, + /* 5 : VDIVPD xmmreg|mask|z,xmmrm128|b64 [r+vm:fv: evex.nds.128.66.0f.w1 5e /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 fd 08) 301 001(5e) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VDIVPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+32233, 543, 5284}, + /* 6 : VDIVPD ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f.w1 5e /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(5e) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VDIVPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+32242, 543, 5285}, + /* 7 : VDIVPD ymmreg|mask|z,ymmrm256|b64 [r+vm:fv: evex.nds.256.66.0f.w1 5e /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 fd 28) 301 001(5e) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VDIVPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+32251, 543, 5285}, + /* 8 : VDIVPD zmmreg|mask|z,zmmreg*,zmmrm512|b64|er [rvm:fv: evex.nds.512.66.0f.w1 5e /r ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(5e) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VDIVPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+32260, 544, 5286}, + /* 9 : VDIVPD zmmreg|mask|z,zmmrm512|b64|er [r+vm:fv: evex.nds.512.66.0f.w1 5e /r ] ND,AVX512,FUTURE */ + /* 240(f1 fd 48) 301 001(5e) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VDIVPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+32269, 544, 5286}, +}; + +static const struct itemplate instrux_VDIVPS[10] = { + /* 0 : VDIVPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f 5e /r ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(5e) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VDIVPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59086, 433, 3266}, + /* 1 : VDIVPS xmmreg,xmmrm128 [r+vm: vex.nds.128.0f 5e /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 000) 001(5e) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VDIVPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59093, 433, 3266}, + /* 2 : VDIVPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f 5e /r ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(5e) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VDIVPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59100, 433, 3267}, + /* 3 : VDIVPS ymmreg,ymmrm256 [r+vm: vex.nds.256.0f 5e /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 004) 001(5e) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VDIVPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59107, 433, 3267}, + /* 4 : VDIVPS xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.0f.w0 5e /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(5e) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VDIVPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+32278, 543, 5287}, + /* 5 : VDIVPS xmmreg|mask|z,xmmrm128|b32 [r+vm:fv: evex.nds.128.0f.w0 5e /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 7c 08) 301 001(5e) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VDIVPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+32287, 543, 5287}, + /* 6 : VDIVPS ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.0f.w0 5e /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(5e) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VDIVPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+32296, 543, 5288}, + /* 7 : VDIVPS ymmreg|mask|z,ymmrm256|b32 [r+vm:fv: evex.nds.256.0f.w0 5e /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 7c 28) 301 001(5e) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VDIVPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+32305, 543, 5288}, + /* 8 : VDIVPS zmmreg|mask|z,zmmreg*,zmmrm512|b32|er [rvm:fv: evex.nds.512.0f.w0 5e /r ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(5e) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VDIVPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+32314, 544, 5289}, + /* 9 : VDIVPS zmmreg|mask|z,zmmrm512|b32|er [r+vm:fv: evex.nds.512.0f.w0 5e /r ] ND,AVX512,FUTURE */ + /* 240(f1 7c 48) 301 001(5e) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VDIVPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+32323, 544, 5289}, +}; + +static const struct itemplate instrux_VDIVSD[4] = { + /* 0 : VDIVSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f 5e /r ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(5e) 120 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VDIVSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59114, 440, 3268}, + /* 1 : VDIVSD xmmreg,xmmrm64 [r+vm: vex.nds.lig.f2.0f 5e /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 003) 001(5e) 110 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VDIVSD, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59121, 440, 3268}, + /* 2 : VDIVSD xmmreg|mask|z,xmmreg*,xmmrm64|er [rvm:t1s: evex.nds.lig.f2.0f.w1 5e /r ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(5e) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VDIVSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+32332, 545, 5290}, + /* 3 : VDIVSD xmmreg|mask|z,xmmrm64|er [r+vm:t1s: evex.nds.lig.f2.0f.w1 5e /r ] ND,AVX512,FUTURE */ + /* 240(f1 ff 08) 306 001(5e) 110 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VDIVSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+32341, 545, 5290}, +}; + +static const struct itemplate instrux_VDIVSS[4] = { + /* 0 : VDIVSS xmmreg,xmmreg*,xmmrm32 [rvm: vex.nds.lig.f3.0f 5e /r ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(5e) 120 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VDIVSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59128, 440, 3269}, + /* 1 : VDIVSS xmmreg,xmmrm32 [r+vm: vex.nds.lig.f3.0f 5e /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 002) 001(5e) 110 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VDIVSS, 2, {XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59135, 440, 3269}, + /* 2 : VDIVSS xmmreg|mask|z,xmmreg*,xmmrm32|er [rvm:t1s: evex.nds.lig.f3.0f.w0 5e /r ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(5e) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VDIVSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+32350, 545, 5291}, + /* 3 : VDIVSS xmmreg|mask|z,xmmrm32|er [r+vm:t1s: evex.nds.lig.f3.0f.w0 5e /r ] ND,AVX512,FUTURE */ + /* 240(f1 7e 08) 306 001(5e) 110 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VDIVSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+32359, 545, 5291}, +}; + +static const struct itemplate instrux_VDPPD[2] = { + /* 0 : VDPPD xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: vex.nds.128.66.0f3a 41 /r ib ] AVX,SANDYBRIDGE */ + /* 261(003 001) 001(41) 120 023 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VDPPD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+51971, 433, 3270}, + /* 1 : VDPPD xmmreg,xmmrm128,imm8 [r+vmi: vex.nds.128.66.0f3a 41 /r ib ] ND,AVX,SANDYBRIDGE */ + /* 260(003 001) 001(41) 110 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VDPPD, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+51979, 433, 3270}, +}; + +static const struct itemplate instrux_VDPPS[4] = { + /* 0 : VDPPS xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: vex.nds.128.66.0f3a 40 /r ib ] AVX,SANDYBRIDGE */ + /* 261(003 001) 001(40) 120 023 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VDPPS, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+51987, 433, 3271}, + /* 1 : VDPPS xmmreg,xmmrm128,imm8 [r+vmi: vex.nds.128.66.0f3a 40 /r ib ] ND,AVX,SANDYBRIDGE */ + /* 260(003 001) 001(40) 110 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VDPPS, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+51995, 433, 3271}, + /* 2 : VDPPS ymmreg,ymmreg*,ymmrm256,imm8 [rvmi: vex.nds.256.66.0f3a 40 /r ib ] AVX,SANDYBRIDGE */ + /* 261(003 005) 001(40) 120 023 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VDPPS, 4, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+52003, 433, 3272}, + /* 3 : VDPPS ymmreg,ymmrm256,imm8 [r+vmi: vex.nds.256.66.0f3a 40 /r ib ] ND,AVX,SANDYBRIDGE */ + /* 260(003 005) 001(40) 110 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VDPPS, 3, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52011, 433, 3272}, +}; + +static const struct itemplate instrux_VEXTRACTF128[1] = { + /* 0 : VEXTRACTF128 xmmrm128,ymmreg,imm8 [mri: vex.256.66.0f3a.w0 19 /r ib ] AVX,SANDYBRIDGE */ + /* 270(003 005) 001(19) 101 022 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VEXTRACTF128, 3, {RM_XMM|BITS128|RN_L16,YMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52019, 441, 3273}, +}; + +static const struct itemplate instrux_VEXTRACTPS[4] = { + /* 0 : VEXTRACTPS rm32,xmmreg,imm8 [mri: vex.128.66.0f3a 17 /r ib ] AVX,SANDYBRIDGE */ + /* 270(003 001) 001(17) 101 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VEXTRACTPS, 3, {RM_GPR|BITS32|RN_L16,XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52027, 433, 3274}, + /* 1 : VEXTRACTPS reg32,xmmreg,imm8 [mri:t1s: evex.128.66.0f3a.wig 17 /r ib ] AVX512,FUTURE */ + /* 250(f3 7d 08) 306 001(17) 101 022 : WIG,EVEX,PROT,AVX512,FUTURE */ + {I_VEXTRACTPS, 3, {REG_GPR|BITS32,XMMREG,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18663, 552, 5330}, + /* 2 : VEXTRACTPS reg64,xmmreg,imm8 [mri:t1s: evex.128.66.0f3a.wig 17 /r ib ] AVX512,FUTURE */ + /* 250(f3 7d 08) 306 001(17) 101 022 : WIG,EVEX,PROT,AVX512,FUTURE */ + {I_VEXTRACTPS, 3, {REG_GPR|BITS64,XMMREG,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18663, 552, 5331}, + /* 3 : VEXTRACTPS mem32,xmmreg,imm8 [mri:t1s: evex.128.66.0f3a.wig 17 /r ib ] AVX512,FUTURE */ + /* 250(f3 7d 08) 306 001(17) 101 022 : WIG,EVEX,PROT,AVX512,FUTURE */ + {I_VEXTRACTPS, 3, {MEMORY|BITS32,XMMREG,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18663, 552, 5332}, +}; + +static const struct itemplate instrux_VHADDPD[4] = { + /* 0 : VHADDPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 7c /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(7c) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VHADDPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59142, 433, 3275}, + /* 1 : VHADDPD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f 7c /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(7c) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VHADDPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59149, 433, 3275}, + /* 2 : VHADDPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 7c /r ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(7c) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VHADDPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59156, 433, 3276}, + /* 3 : VHADDPD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f 7c /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 005) 001(7c) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VHADDPD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59163, 433, 3276}, +}; + +static const struct itemplate instrux_VHADDPS[4] = { + /* 0 : VHADDPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.f2.0f 7c /r ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(7c) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VHADDPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59170, 433, 3277}, + /* 1 : VHADDPS xmmreg,xmmrm128 [r+vm: vex.nds.128.f2.0f 7c /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 003) 001(7c) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VHADDPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59177, 433, 3277}, + /* 2 : VHADDPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.f2.0f 7c /r ] AVX,SANDYBRIDGE */ + /* 261(001 007) 001(7c) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VHADDPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59184, 433, 3278}, + /* 3 : VHADDPS ymmreg,ymmrm256 [r+vm: vex.nds.256.f2.0f 7c /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 007) 001(7c) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VHADDPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59191, 433, 3278}, +}; + +static const struct itemplate instrux_VHSUBPD[4] = { + /* 0 : VHSUBPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 7d /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(7d) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VHSUBPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59198, 433, 3279}, + /* 1 : VHSUBPD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f 7d /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(7d) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VHSUBPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59205, 433, 3279}, + /* 2 : VHSUBPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 7d /r ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(7d) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VHSUBPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59212, 433, 3280}, + /* 3 : VHSUBPD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f 7d /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 005) 001(7d) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VHSUBPD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59219, 433, 3280}, +}; + +static const struct itemplate instrux_VHSUBPS[4] = { + /* 0 : VHSUBPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.f2.0f 7d /r ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(7d) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VHSUBPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59226, 433, 3281}, + /* 1 : VHSUBPS xmmreg,xmmrm128 [r+vm: vex.nds.128.f2.0f 7d /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 003) 001(7d) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VHSUBPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59233, 433, 3281}, + /* 2 : VHSUBPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.f2.0f 7d /r ] AVX,SANDYBRIDGE */ + /* 261(001 007) 001(7d) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VHSUBPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59240, 433, 3282}, + /* 3 : VHSUBPS ymmreg,ymmrm256 [r+vm: vex.nds.256.f2.0f 7d /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 007) 001(7d) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VHSUBPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59247, 433, 3282}, +}; + +static const struct itemplate instrux_VINSERTF128[2] = { + /* 0 : VINSERTF128 ymmreg,ymmreg*,xmmrm128,imm8 [rvmi: vex.nds.256.66.0f3a.w0 18 /r ib ] AVX,SANDYBRIDGE */ + /* 261(003 005) 001(18) 120 023 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VINSERTF128, 4, {YMMREG|RN_L16,YMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+52035, 441, 3283}, + /* 1 : VINSERTF128 ymmreg,xmmrm128,imm8 [r+vmi: vex.nds.256.66.0f3a.w0 18 /r ib ] ND,AVX,SANDYBRIDGE */ + /* 260(003 005) 001(18) 110 022 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VINSERTF128, 3, {YMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52043, 441, 3283}, +}; + +static const struct itemplate instrux_VINSERTPS[4] = { + /* 0 : VINSERTPS xmmreg,xmmreg*,xmmrm32,imm8 [rvmi: vex.nds.128.66.0f3a 21 /r ib ] AVX,SANDYBRIDGE */ + /* 261(003 001) 001(21) 120 023 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VINSERTPS, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+52051, 433, 3284}, + /* 1 : VINSERTPS xmmreg,xmmrm32,imm8 [r+vmi: vex.nds.128.66.0f3a 21 /r ib ] ND,AVX,SANDYBRIDGE */ + /* 260(003 001) 001(21) 110 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VINSERTPS, 3, {XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52059, 433, 3284}, + /* 2 : VINSERTPS xmmreg,xmmreg*,xmmrm32,imm8 [rvmi:t1s: evex.nds.128.66.0f3a.w0 21 /r ib ] AVX512,FUTURE */ + /* 241(f3 7d 08) 306 001(21) 120 023 : EVEX,PROT,AVX512,FUTURE */ + {I_VINSERTPS, 4, {XMMREG,XMMREG,RM_XMM|BITS32,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+19433, 544, 5529}, + /* 3 : VINSERTPS xmmreg,xmmrm32,imm8 [r+vmi:t1s: evex.nds.128.66.0f3a.w0 21 /r ib ] ND,AVX512,FUTURE */ + /* 240(f3 7d 08) 306 001(21) 110 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VINSERTPS, 3, {XMMREG,RM_XMM|BITS32,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+19443, 544, 5529}, +}; + +static const struct itemplate instrux_VLDDQU[2] = { + /* 0 : VLDDQU xmmreg,mem128 [rm: vex.128.f2.0f f0 /r ] AVX,SANDYBRIDGE */ + /* 270(001 003) 001(f0) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VLDDQU, 2, {XMMREG|RN_L16,MEMORY|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59254, 433, 3285}, + /* 1 : VLDDQU ymmreg,mem256 [rm: vex.256.f2.0f f0 /r ] AVX,SANDYBRIDGE */ + /* 270(001 007) 001(f0) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VLDDQU, 2, {YMMREG|RN_L16,MEMORY|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59261, 433, 3287}, +}; + +static const struct itemplate instrux_VLDQQU[1] = { + /* 0 : VLDQQU ymmreg,mem256 [rm: vex.256.f2.0f f0 /r ] AVX,SANDYBRIDGE */ + /* 270(001 007) 001(f0) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VLDQQU, 2, {YMMREG|RN_L16,MEMORY|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59261, 433, 3286}, +}; + +static const struct itemplate instrux_VLDMXCSR[1] = { + /* 0 : VLDMXCSR mem32 [m: vex.lz.0f ae /2 ] AVX,SANDYBRIDGE */ + /* 270(001 000) 001(ae) 202 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VLDMXCSR, 1, {MEMORY|BITS32|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+59268, 433, 3288}, +}; + +static const struct itemplate instrux_VMASKMOVDQU[1] = { + /* 0 : VMASKMOVDQU xmmreg,xmmreg [rm: vex.128.66.0f f7 /r ] AVX,SANDYBRIDGE */ + /* 270(001 001) 001(f7) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMASKMOVDQU, 2, {XMMREG|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59275, 433, 3289}, +}; + +static const struct itemplate instrux_VMASKMOVPS[4] = { + /* 0 : VMASKMOVPS xmmreg,xmmreg,mem128 [rvm: vex.nds.128.66.0f38.w0 2c /r ] AVX,SANDYBRIDGE */ + /* 261(002 001) 001(2c) 120 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VMASKMOVPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,MEMORY|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59282, 441, 3290}, + /* 1 : VMASKMOVPS ymmreg,ymmreg,mem256 [rvm: vex.nds.256.66.0f38.w0 2c /r ] AVX,SANDYBRIDGE */ + /* 261(002 005) 001(2c) 120 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VMASKMOVPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,MEMORY|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59289, 441, 3291}, + /* 2 : VMASKMOVPS mem128,xmmreg,xmmreg [mvr: vex.nds.128.66.0f38.w0 2e /r ] AR0-2,SO,AVX,SANDYBRIDGE */ + /* 261(002 001) 001(2e) 102 : AR0,AR1,AR2,SO,NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VMASKMOVPS, 3, {MEMORY|BITS128|RN_L16,XMMREG|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59296, 451, 3292}, + /* 3 : VMASKMOVPS mem256,ymmreg,ymmreg [mvr: vex.nds.256.66.0f38.w0 2e /r ] AR0-2,SY,AVX,SANDYBRIDGE */ + /* 261(002 005) 001(2e) 102 : AR0,AR1,AR2,SY,NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VMASKMOVPS, 3, {MEMORY|BITS256|RN_L16,YMMREG|RN_L16,YMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59303, 452, 3293}, +}; + +static const struct itemplate instrux_VMASKMOVPD[4] = { + /* 0 : VMASKMOVPD xmmreg,xmmreg,mem128 [rvm: vex.nds.128.66.0f38.w0 2d /r ] AVX,SANDYBRIDGE */ + /* 261(002 001) 001(2d) 120 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VMASKMOVPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,MEMORY|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59310, 441, 3294}, + /* 1 : VMASKMOVPD ymmreg,ymmreg,mem256 [rvm: vex.nds.256.66.0f38.w0 2d /r ] AVX,SANDYBRIDGE */ + /* 261(002 005) 001(2d) 120 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VMASKMOVPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,MEMORY|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59317, 441, 3295}, + /* 2 : VMASKMOVPD mem128,xmmreg,xmmreg [mvr: vex.nds.128.66.0f38.w0 2f /r ] AVX,SANDYBRIDGE */ + /* 261(002 001) 001(2f) 102 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VMASKMOVPD, 3, {MEMORY|BITS128|RN_L16,XMMREG|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59324, 441, 3296}, + /* 3 : VMASKMOVPD mem256,ymmreg,ymmreg [mvr: vex.nds.256.66.0f38.w0 2f /r ] AVX,SANDYBRIDGE */ + /* 261(002 005) 001(2f) 102 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VMASKMOVPD, 3, {MEMORY|BITS256|RN_L16,YMMREG|RN_L16,YMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59331, 441, 3297}, +}; + +static const struct itemplate instrux_VMAXPD[10] = { + /* 0 : VMAXPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 5f /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(5f) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMAXPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59338, 433, 3298}, + /* 1 : VMAXPD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f 5f /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(5f) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMAXPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59345, 433, 3298}, + /* 2 : VMAXPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 5f /r ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(5f) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMAXPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59352, 433, 3299}, + /* 3 : VMAXPD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f 5f /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 005) 001(5f) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMAXPD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59359, 433, 3299}, + /* 4 : VMAXPD xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f.w1 5f /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(5f) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMAXPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+33700, 543, 5530}, + /* 5 : VMAXPD xmmreg|mask|z,xmmrm128|b64 [r+vm:fv: evex.nds.128.66.0f.w1 5f /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 fd 08) 301 001(5f) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMAXPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+33709, 543, 5530}, + /* 6 : VMAXPD ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f.w1 5f /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(5f) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMAXPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+33718, 543, 5531}, + /* 7 : VMAXPD ymmreg|mask|z,ymmrm256|b64 [r+vm:fv: evex.nds.256.66.0f.w1 5f /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 fd 28) 301 001(5f) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMAXPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+33727, 543, 5531}, + /* 8 : VMAXPD zmmreg|mask|z,zmmreg*,zmmrm512|b64|sae [rvm:fv: evex.nds.512.66.0f.w1 5f /r ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(5f) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VMAXPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|SAE,0,0}, nasm_bytecodes+33736, 544, 5532}, + /* 9 : VMAXPD zmmreg|mask|z,zmmrm512|b64|sae [r+vm:fv: evex.nds.512.66.0f.w1 5f /r ] ND,AVX512,FUTURE */ + /* 240(f1 fd 48) 301 001(5f) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VMAXPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+33745, 544, 5532}, +}; + +static const struct itemplate instrux_VMAXPS[10] = { + /* 0 : VMAXPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f 5f /r ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(5f) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMAXPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59366, 433, 3300}, + /* 1 : VMAXPS xmmreg,xmmrm128 [r+vm: vex.nds.128.0f 5f /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 000) 001(5f) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMAXPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59373, 433, 3300}, + /* 2 : VMAXPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f 5f /r ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(5f) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMAXPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59380, 433, 3301}, + /* 3 : VMAXPS ymmreg,ymmrm256 [r+vm: vex.nds.256.0f 5f /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 004) 001(5f) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMAXPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59387, 433, 3301}, + /* 4 : VMAXPS xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.0f.w0 5f /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(5f) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMAXPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+33754, 543, 5533}, + /* 5 : VMAXPS xmmreg|mask|z,xmmrm128|b32 [r+vm:fv: evex.nds.128.0f.w0 5f /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 7c 08) 301 001(5f) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMAXPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+33763, 543, 5533}, + /* 6 : VMAXPS ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.0f.w0 5f /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(5f) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMAXPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+33772, 543, 5534}, + /* 7 : VMAXPS ymmreg|mask|z,ymmrm256|b32 [r+vm:fv: evex.nds.256.0f.w0 5f /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 7c 28) 301 001(5f) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMAXPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+33781, 543, 5534}, + /* 8 : VMAXPS zmmreg|mask|z,zmmreg*,zmmrm512|b32|sae [rvm:fv: evex.nds.512.0f.w0 5f /r ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(5f) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VMAXPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|SAE,0,0}, nasm_bytecodes+33790, 544, 5535}, + /* 9 : VMAXPS zmmreg|mask|z,zmmrm512|b32|sae [r+vm:fv: evex.nds.512.0f.w0 5f /r ] ND,AVX512,FUTURE */ + /* 240(f1 7c 48) 301 001(5f) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VMAXPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+33799, 544, 5535}, +}; + +static const struct itemplate instrux_VMAXSD[4] = { + /* 0 : VMAXSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f 5f /r ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(5f) 120 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMAXSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59394, 440, 3302}, + /* 1 : VMAXSD xmmreg,xmmrm64 [r+vm: vex.nds.lig.f2.0f 5f /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 003) 001(5f) 110 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMAXSD, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59401, 440, 3302}, + /* 2 : VMAXSD xmmreg|mask|z,xmmreg*,xmmrm64|sae [rvm:t1s: evex.nds.lig.f2.0f.w1 5f /r ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(5f) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VMAXSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+33808, 545, 5536}, + /* 3 : VMAXSD xmmreg|mask|z,xmmrm64|sae [r+vm:t1s: evex.nds.lig.f2.0f.w1 5f /r ] ND,AVX512,FUTURE */ + /* 240(f1 ff 08) 306 001(5f) 110 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VMAXSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+33817, 545, 5536}, +}; + +static const struct itemplate instrux_VMAXSS[4] = { + /* 0 : VMAXSS xmmreg,xmmreg*,xmmrm32 [rvm: vex.nds.lig.f3.0f 5f /r ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(5f) 120 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMAXSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59408, 440, 3303}, + /* 1 : VMAXSS xmmreg,xmmrm32 [r+vm: vex.nds.lig.f3.0f 5f /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 002) 001(5f) 110 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMAXSS, 2, {XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59415, 440, 3303}, + /* 2 : VMAXSS xmmreg|mask|z,xmmreg*,xmmrm32|sae [rvm:t1s: evex.nds.lig.f3.0f.w0 5f /r ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(5f) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VMAXSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+33826, 545, 5537}, + /* 3 : VMAXSS xmmreg|mask|z,xmmrm32|sae [r+vm:t1s: evex.nds.lig.f3.0f.w0 5f /r ] ND,AVX512,FUTURE */ + /* 240(f1 7e 08) 306 001(5f) 110 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VMAXSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+33835, 545, 5537}, +}; + +static const struct itemplate instrux_VMINPD[10] = { + /* 0 : VMINPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 5d /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(5d) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMINPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59422, 433, 3304}, + /* 1 : VMINPD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f 5d /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(5d) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMINPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59429, 433, 3304}, + /* 2 : VMINPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 5d /r ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(5d) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMINPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59436, 433, 3305}, + /* 3 : VMINPD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f 5d /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 005) 001(5d) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMINPD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59443, 433, 3305}, + /* 4 : VMINPD xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f.w1 5d /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(5d) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMINPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+33844, 543, 5538}, + /* 5 : VMINPD xmmreg|mask|z,xmmrm128|b64 [r+vm:fv: evex.nds.128.66.0f.w1 5d /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 fd 08) 301 001(5d) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMINPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+33853, 543, 5538}, + /* 6 : VMINPD ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f.w1 5d /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(5d) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMINPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+33862, 543, 5539}, + /* 7 : VMINPD ymmreg|mask|z,ymmrm256|b64 [r+vm:fv: evex.nds.256.66.0f.w1 5d /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 fd 28) 301 001(5d) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMINPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+33871, 543, 5539}, + /* 8 : VMINPD zmmreg|mask|z,zmmreg*,zmmrm512|b64|sae [rvm:fv: evex.nds.512.66.0f.w1 5d /r ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(5d) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VMINPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|SAE,0,0}, nasm_bytecodes+33880, 544, 5540}, + /* 9 : VMINPD zmmreg|mask|z,zmmrm512|b64|sae [r+vm:fv: evex.nds.512.66.0f.w1 5d /r ] ND,AVX512,FUTURE */ + /* 240(f1 fd 48) 301 001(5d) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VMINPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+33889, 544, 5540}, +}; + +static const struct itemplate instrux_VMINPS[10] = { + /* 0 : VMINPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f 5d /r ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(5d) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMINPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59450, 433, 3306}, + /* 1 : VMINPS xmmreg,xmmrm128 [r+vm: vex.nds.128.0f 5d /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 000) 001(5d) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMINPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59457, 433, 3306}, + /* 2 : VMINPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f 5d /r ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(5d) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMINPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59464, 433, 3307}, + /* 3 : VMINPS ymmreg,ymmrm256 [r+vm: vex.nds.256.0f 5d /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 004) 001(5d) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMINPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59471, 433, 3307}, + /* 4 : VMINPS xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.0f.w0 5d /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(5d) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMINPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+33898, 543, 5541}, + /* 5 : VMINPS xmmreg|mask|z,xmmrm128|b32 [r+vm:fv: evex.nds.128.0f.w0 5d /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 7c 08) 301 001(5d) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMINPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+33907, 543, 5541}, + /* 6 : VMINPS ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.0f.w0 5d /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(5d) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMINPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+33916, 543, 5542}, + /* 7 : VMINPS ymmreg|mask|z,ymmrm256|b32 [r+vm:fv: evex.nds.256.0f.w0 5d /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 7c 28) 301 001(5d) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMINPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+33925, 543, 5542}, + /* 8 : VMINPS zmmreg|mask|z,zmmreg*,zmmrm512|b32|sae [rvm:fv: evex.nds.512.0f.w0 5d /r ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(5d) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VMINPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|SAE,0,0}, nasm_bytecodes+33934, 544, 5543}, + /* 9 : VMINPS zmmreg|mask|z,zmmrm512|b32|sae [r+vm:fv: evex.nds.512.0f.w0 5d /r ] ND,AVX512,FUTURE */ + /* 240(f1 7c 48) 301 001(5d) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VMINPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+33943, 544, 5543}, +}; + +static const struct itemplate instrux_VMINSD[4] = { + /* 0 : VMINSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f 5d /r ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(5d) 120 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMINSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59478, 440, 3308}, + /* 1 : VMINSD xmmreg,xmmrm64 [r+vm: vex.nds.lig.f2.0f 5d /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 003) 001(5d) 110 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMINSD, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59485, 440, 3308}, + /* 2 : VMINSD xmmreg|mask|z,xmmreg*,xmmrm64|sae [rvm:t1s: evex.nds.lig.f2.0f.w1 5d /r ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(5d) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VMINSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+33952, 545, 5544}, + /* 3 : VMINSD xmmreg|mask|z,xmmrm64|sae [r+vm:t1s: evex.nds.lig.f2.0f.w1 5d /r ] ND,AVX512,FUTURE */ + /* 240(f1 ff 08) 306 001(5d) 110 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VMINSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+33961, 545, 5544}, +}; + +static const struct itemplate instrux_VMINSS[4] = { + /* 0 : VMINSS xmmreg,xmmreg*,xmmrm32 [rvm: vex.nds.lig.f3.0f 5d /r ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(5d) 120 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMINSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59492, 440, 3309}, + /* 1 : VMINSS xmmreg,xmmrm32 [r+vm: vex.nds.lig.f3.0f 5d /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 002) 001(5d) 110 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMINSS, 2, {XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59499, 440, 3309}, + /* 2 : VMINSS xmmreg|mask|z,xmmreg*,xmmrm32|sae [rvm:t1s: evex.nds.lig.f3.0f.w0 5d /r ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(5d) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VMINSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+33970, 545, 5545}, + /* 3 : VMINSS xmmreg|mask|z,xmmrm32|sae [r+vm:t1s: evex.nds.lig.f3.0f.w0 5d /r ] ND,AVX512,FUTURE */ + /* 240(f1 7e 08) 306 001(5d) 110 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VMINSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+33979, 545, 5545}, +}; + +static const struct itemplate instrux_VMOVAPD[13] = { + /* 0 : VMOVAPD xmmreg,xmmrm128 [rm: vex.128.66.0f 28 /r ] AVX,SANDYBRIDGE */ + /* 270(001 001) 001(28) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVAPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59506, 433, 3310}, + /* 1 : VMOVAPD xmmrm128,xmmreg [mr: vex.128.66.0f 29 /r ] AVX,SANDYBRIDGE */ + /* 270(001 001) 001(29) 101 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVAPD, 2, {RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59513, 433, 3311}, + /* 2 : VMOVAPD ymmreg,ymmrm256 [rm: vex.256.66.0f 28 /r ] AVX,SANDYBRIDGE */ + /* 270(001 005) 001(28) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVAPD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59520, 433, 3312}, + /* 3 : VMOVAPD ymmrm256,ymmreg [mr: vex.256.66.0f 29 /r ] AVX,SANDYBRIDGE */ + /* 270(001 005) 001(29) 101 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVAPD, 2, {RM_YMM|BITS256|RN_L16,YMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59527, 433, 3313}, + /* 4 : VMOVAPD xmmreg|mask|z,xmmrm128 [rm:fvm: evex.128.66.0f.w1 28 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 fd 08) 303 001(28) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVAPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+33988, 543, 5546}, + /* 5 : VMOVAPD ymmreg|mask|z,ymmrm256 [rm:fvm: evex.256.66.0f.w1 28 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 fd 28) 303 001(28) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVAPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+33997, 543, 5547}, + /* 6 : VMOVAPD zmmreg|mask|z,zmmrm512 [rm:fvm: evex.512.66.0f.w1 28 /r ] AVX512,FUTURE */ + /* 250(f1 fd 48) 303 001(28) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVAPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34006, 544, 5548}, + /* 7 : VMOVAPD xmmreg|mask|z,xmmreg [mr: evex.128.66.0f.w1 29 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 fd 08) 300 001(29) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVAPD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34015, 543, 5549}, + /* 8 : VMOVAPD ymmreg|mask|z,ymmreg [mr: evex.256.66.0f.w1 29 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 fd 28) 300 001(29) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVAPD, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34024, 543, 5550}, + /* 9 : VMOVAPD zmmreg|mask|z,zmmreg [mr: evex.512.66.0f.w1 29 /r ] AVX512,FUTURE */ + /* 250(f1 fd 48) 300 001(29) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVAPD, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34033, 544, 5551}, + /* 10 : VMOVAPD mem128|mask,xmmreg [mr:fvm: evex.128.66.0f.w1 29 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 fd 08) 303 001(29) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVAPD, 2, {MEMORY|BITS128,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+34042, 543, 5552}, + /* 11 : VMOVAPD mem256|mask,ymmreg [mr:fvm: evex.256.66.0f.w1 29 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 fd 28) 303 001(29) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVAPD, 2, {MEMORY|BITS256,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+34051, 543, 5553}, + /* 12 : VMOVAPD mem512|mask,zmmreg [mr:fvm: evex.512.66.0f.w1 29 /r ] AVX512,FUTURE */ + /* 250(f1 fd 48) 303 001(29) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVAPD, 2, {MEMORY|BITS512,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+34060, 544, 5554}, +}; + +static const struct itemplate instrux_VMOVAPS[13] = { + /* 0 : VMOVAPS xmmreg,xmmrm128 [rm: vex.128.0f 28 /r ] AVX,SANDYBRIDGE */ + /* 270(001 000) 001(28) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVAPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59534, 433, 3314}, + /* 1 : VMOVAPS xmmrm128,xmmreg [mr: vex.128.0f 29 /r ] AVX,SANDYBRIDGE */ + /* 270(001 000) 001(29) 101 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVAPS, 2, {RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59541, 433, 3315}, + /* 2 : VMOVAPS ymmreg,ymmrm256 [rm: vex.256.0f 28 /r ] AVX,SANDYBRIDGE */ + /* 270(001 004) 001(28) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVAPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59548, 433, 3316}, + /* 3 : VMOVAPS ymmrm256,ymmreg [mr: vex.256.0f 29 /r ] AVX,SANDYBRIDGE */ + /* 270(001 004) 001(29) 101 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVAPS, 2, {RM_YMM|BITS256|RN_L16,YMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59555, 433, 3317}, + /* 4 : VMOVAPS xmmreg|mask|z,xmmrm128 [rm:fvm: evex.128.0f.w0 28 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7c 08) 303 001(28) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVAPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34069, 543, 5555}, + /* 5 : VMOVAPS ymmreg|mask|z,ymmrm256 [rm:fvm: evex.256.0f.w0 28 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7c 28) 303 001(28) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVAPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34078, 543, 5556}, + /* 6 : VMOVAPS zmmreg|mask|z,zmmrm512 [rm:fvm: evex.512.0f.w0 28 /r ] AVX512,FUTURE */ + /* 250(f1 7c 48) 303 001(28) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVAPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34087, 544, 5557}, + /* 7 : VMOVAPS xmmreg|mask|z,xmmreg [mr: evex.128.0f.w0 29 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7c 08) 300 001(29) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVAPS, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34096, 543, 5558}, + /* 8 : VMOVAPS ymmreg|mask|z,ymmreg [mr: evex.256.0f.w0 29 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7c 28) 300 001(29) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVAPS, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34105, 543, 5559}, + /* 9 : VMOVAPS zmmreg|mask|z,zmmreg [mr: evex.512.0f.w0 29 /r ] AVX512,FUTURE */ + /* 250(f1 7c 48) 300 001(29) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVAPS, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34114, 544, 5560}, + /* 10 : VMOVAPS mem128|mask,xmmreg [mr:fvm: evex.128.0f.w0 29 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7c 08) 303 001(29) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVAPS, 2, {MEMORY|BITS128,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+34123, 543, 5561}, + /* 11 : VMOVAPS mem256|mask,ymmreg [mr:fvm: evex.256.0f.w0 29 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7c 28) 303 001(29) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVAPS, 2, {MEMORY|BITS256,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+34132, 543, 5562}, + /* 12 : VMOVAPS mem512|mask,zmmreg [mr:fvm: evex.512.0f.w0 29 /r ] AVX512,FUTURE */ + /* 250(f1 7c 48) 303 001(29) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVAPS, 2, {MEMORY|BITS512,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+34141, 544, 5563}, +}; + +static const struct itemplate instrux_VMOVD[6] = { + /* 0 : VMOVD xmmreg,rm32 [rm: vex.128.66.0f.w0 6e /r ] AVX,SANDYBRIDGE */ + /* 270(001 001) 001(6e) 110 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VMOVD, 2, {XMMREG|RN_L16,RM_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59562, 441, 3318}, + /* 1 : VMOVD rm32,xmmreg [mr: vex.128.66.0f.w0 7e /r ] AVX,SANDYBRIDGE */ + /* 270(001 001) 001(7e) 101 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VMOVD, 2, {RM_GPR|BITS32|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59569, 441, 3319}, + /* 2 : VMOVD xmmreg,rm32 [rm:t1s: evex.128.66.0f.w0 6e /r ] AVX512,FUTURE */ + /* 250(f1 7d 08) 306 001(6e) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVD, 2, {XMMREG,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+34150, 544, 5564}, + /* 3 : VMOVD rm32,xmmreg [mr:t1s: evex.128.66.0f.w0 7e /r ] AVX512,FUTURE */ + /* 250(f1 7d 08) 306 001(7e) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVD, 2, {RM_GPR|BITS32,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+34159, 544, 5565}, + /* 4 : VMOVD xmmreg,xmmrm32 [rm:t1s: evex.128.f3.0f.w0 7e /r ] AVX10_2,FUTURE */ + /* 250(f1 7e 08) 306 001(7e) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VMOVD, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+51160, 644, 7642}, + /* 5 : VMOVD xmmrm32,xmmreg [mr:t1s: evex.128.66.0f.w0 d6 /r ] AVX10_2,FUTURE */ + /* 250(f1 7d 08) 306 001(d6) 101 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VMOVD, 2, {RM_XMM|BITS32,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+51169, 644, 7643}, +}; + +static const struct itemplate instrux_VMOVQ[8] = { + /* 0 : VMOVQ xmmreg,xmmrm64 [rm: vex.128.f3.0f 7e /r ] AR0-1,SQ,AVX,SANDYBRIDGE */ + /* 270(001 002) 001(7e) 110 : AR0,AR1,SQ,NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVQ, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59576, 453, 3320}, + /* 1 : VMOVQ xmmrm64,xmmreg [mr: vex.128.66.0f d6 /r ] AR0-1,SQ,AVX,SANDYBRIDGE */ + /* 270(001 001) 001(d6) 101 : AR0,AR1,SQ,NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVQ, 2, {RM_XMM|BITS64|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59583, 453, 3321}, + /* 2 : VMOVQ xmmreg,rm64 [rm: vex.128.66.0f.w1 6e /r ] AR0-1,SQ,LONG,PROT,AVX,X86_64,SANDYBRIDGE */ + /* 270(001 201) 001(6e) 110 : AR0,AR1,SQ,NOAPX,LONG,VEX,PROT,AVX,SANDYBRIDGE */ + {I_VMOVQ, 2, {XMMREG|RN_L16,RM_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59590, 454, 3322}, + /* 3 : VMOVQ rm64,xmmreg [mr: vex.128.66.0f.w1 7e /r ] AR0-1,SQ,LONG,PROT,AVX,X86_64,SANDYBRIDGE */ + /* 270(001 201) 001(7e) 101 : AR0,AR1,SQ,NOAPX,LONG,VEX,PROT,AVX,SANDYBRIDGE */ + {I_VMOVQ, 2, {RM_GPR|BITS64|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59597, 454, 3323}, + /* 4 : VMOVQ xmmreg,rm64 [rm:t1s: evex.128.66.0f.w1 6e /r ] AVX512,FUTURE */ + /* 250(f1 fd 08) 306 001(6e) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVQ, 2, {XMMREG,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+34771, 544, 5627}, + /* 5 : VMOVQ rm64,xmmreg [mr:t1s: evex.128.66.0f.w1 7e /r ] AVX512,FUTURE */ + /* 250(f1 fd 08) 306 001(7e) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVQ, 2, {RM_GPR|BITS64,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+34780, 544, 5628}, + /* 6 : VMOVQ xmmreg,xmmrm64 [rm:t1s: evex.128.f3.0f.w1 7e /r ] AVX512,FUTURE */ + /* 250(f1 fe 08) 306 001(7e) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVQ, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+34789, 544, 5629}, + /* 7 : VMOVQ xmmrm64,xmmreg [mr:t1s: evex.128.66.0f.w1 d6 /r ] AVX512,FUTURE */ + /* 250(f1 fd 08) 306 001(d6) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVQ, 2, {RM_XMM|BITS64,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+34798, 544, 5630}, +}; + +static const struct itemplate instrux_VMOVDDUP[5] = { + /* 0 : VMOVDDUP xmmreg,xmmrm64 [rm: vex.128.f2.0f 12 /r ] AVX,SANDYBRIDGE */ + /* 270(001 003) 001(12) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVDDUP, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59604, 433, 3324}, + /* 1 : VMOVDDUP ymmreg,ymmrm256 [rm: vex.256.f2.0f 12 /r ] AVX,SANDYBRIDGE */ + /* 270(001 007) 001(12) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVDDUP, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59611, 433, 3325}, + /* 2 : VMOVDDUP xmmreg|mask|z,xmmrm64 [rm:dup: evex.128.f2.0f.w1 12 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 ff 08) 320 001(12) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVDDUP, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34168, 543, 5566}, + /* 3 : VMOVDDUP ymmreg|mask|z,ymmrm256 [rm:dup: evex.256.f2.0f.w1 12 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 ff 28) 320 001(12) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVDDUP, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34177, 543, 5567}, + /* 4 : VMOVDDUP zmmreg|mask|z,zmmrm512 [rm:dup: evex.512.f2.0f.w1 12 /r ] AVX512,FUTURE */ + /* 250(f1 ff 48) 320 001(12) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVDDUP, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34186, 544, 5568}, +}; + +static const struct itemplate instrux_VMOVDQA[4] = { + /* 0 : VMOVDQA xmmreg,xmmrm128 [rm: vex.128.66.0f 6f /r ] AVX,SANDYBRIDGE */ + /* 270(001 001) 001(6f) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVDQA, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59618, 433, 3326}, + /* 1 : VMOVDQA xmmrm128,xmmreg [mr: vex.128.66.0f 7f /r ] AVX,SANDYBRIDGE */ + /* 270(001 001) 001(7f) 101 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVDQA, 2, {RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59625, 433, 3327}, + /* 2 : VMOVDQA ymmreg,ymmrm256 [rm: vex.256.66.0f 6f /r ] AVX,SANDYBRIDGE */ + /* 270(001 005) 001(6f) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVDQA, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59632, 433, 3331}, + /* 3 : VMOVDQA ymmrm256,ymmreg [mr: vex.256.66.0f 7f /r ] AVX,SANDYBRIDGE */ + /* 270(001 005) 001(7f) 101 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVDQA, 2, {RM_YMM|BITS256|RN_L16,YMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59639, 433, 3332}, +}; + +static const struct itemplate instrux_VMOVQQA[2] = { + /* 0 : VMOVQQA ymmreg,ymmrm256 [rm: vex.256.66.0f 6f /r ] AVX,SANDYBRIDGE */ + /* 270(001 005) 001(6f) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVQQA, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59632, 433, 3329}, + /* 1 : VMOVQQA ymmrm256,ymmreg [mr: vex.256.66.0f 7f /r ] AVX,SANDYBRIDGE */ + /* 270(001 005) 001(7f) 101 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVQQA, 2, {RM_YMM|BITS256|RN_L16,YMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59639, 433, 3330}, +}; + +static const struct itemplate instrux_VMOVDQU[4] = { + /* 0 : VMOVDQU xmmreg,xmmrm128 [rm: vex.128.f3.0f 6f /r ] AVX,SANDYBRIDGE */ + /* 270(001 002) 001(6f) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVDQU, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59646, 433, 3333}, + /* 1 : VMOVDQU xmmrm128,xmmreg [mr: vex.128.f3.0f 7f /r ] AVX,SANDYBRIDGE */ + /* 270(001 002) 001(7f) 101 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVDQU, 2, {RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59653, 433, 3334}, + /* 2 : VMOVDQU ymmreg,ymmrm256 [rm: vex.256.f3.0f 6f /r ] AVX,SANDYBRIDGE */ + /* 270(001 006) 001(6f) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVDQU, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59660, 433, 3338}, + /* 3 : VMOVDQU ymmrm256,ymmreg [mr: vex.256.f3.0f 7f /r ] AVX,SANDYBRIDGE */ + /* 270(001 006) 001(7f) 101 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVDQU, 2, {RM_YMM|BITS256|RN_L16,YMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59667, 433, 3339}, +}; + +static const struct itemplate instrux_VMOVQQU[2] = { + /* 0 : VMOVQQU ymmreg,ymmrm256 [rm: vex.256.f3.0f 6f /r ] AVX,SANDYBRIDGE */ + /* 270(001 006) 001(6f) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVQQU, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59660, 433, 3336}, + /* 1 : VMOVQQU ymmrm256,ymmreg [mr: vex.256.f3.0f 7f /r ] AVX,SANDYBRIDGE */ + /* 270(001 006) 001(7f) 101 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVQQU, 2, {RM_YMM|BITS256|RN_L16,YMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59667, 433, 3337}, +}; + +static const struct itemplate instrux_VMOVHLPS[4] = { + /* 0 : VMOVHLPS xmmreg,xmmreg*,xmmreg [rvm: vex.nds.128.0f 12 /r ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(12) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVHLPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59674, 433, 3340}, + /* 1 : VMOVHLPS xmmreg,xmmreg [r+vm: vex.nds.128.0f 12 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 000) 001(12) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVHLPS, 2, {XMMREG|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59681, 433, 3340}, + /* 2 : VMOVHLPS xmmreg,xmmreg*,xmmreg [rvm: evex.nds.128.0f.w0 12 /r ] AVX512,FUTURE */ + /* 241(f1 7c 08) 300 001(12) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVHLPS, 3, {XMMREG,XMMREG,XMMREG,0,0}, NO_DECORATOR, nasm_bytecodes+34519, 544, 5605}, + /* 3 : VMOVHLPS xmmreg,xmmreg [r+vm: evex.nds.128.0f.w0 12 /r ] ND,AVX512,FUTURE */ + /* 240(f1 7c 08) 300 001(12) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVHLPS, 2, {XMMREG,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+34528, 544, 5605}, +}; + +static const struct itemplate instrux_VMOVHPD[6] = { + /* 0 : VMOVHPD xmmreg,xmmreg*,mem64 [rvm: vex.nds.128.66.0f 16 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(16) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVHPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,MEMORY|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59688, 433, 3341}, + /* 1 : VMOVHPD xmmreg,mem64 [r+vm: vex.nds.128.66.0f 16 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(16) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVHPD, 2, {XMMREG|RN_L16,MEMORY|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59695, 433, 3341}, + /* 2 : VMOVHPD mem64,xmmreg [mr: vex.128.66.0f 17 /r ] AVX,SANDYBRIDGE */ + /* 270(001 001) 001(17) 101 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVHPD, 2, {MEMORY|BITS64|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59702, 433, 3342}, + /* 3 : VMOVHPD xmmreg,xmmreg*,mem64 [rvm:t1s: evex.nds.128.66.0f.w1 16 /r ] AVX512,FUTURE */ + /* 241(f1 fd 08) 306 001(16) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVHPD, 3, {XMMREG,XMMREG,MEMORY|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+34537, 544, 5606}, + /* 4 : VMOVHPD xmmreg,mem64 [r+vm:t1s: evex.nds.128.66.0f.w1 16 /r ] ND,AVX512,FUTURE */ + /* 240(f1 fd 08) 306 001(16) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVHPD, 2, {XMMREG,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+34546, 544, 5606}, + /* 5 : VMOVHPD mem64,xmmreg [mr:t1s: evex.128.66.0f.w1 17 /r ] AVX512,FUTURE */ + /* 250(f1 fd 08) 306 001(17) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVHPD, 2, {MEMORY|BITS64,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+34555, 544, 5607}, +}; + +static const struct itemplate instrux_VMOVHPS[6] = { + /* 0 : VMOVHPS xmmreg,xmmreg*,mem64 [rvm: vex.nds.128.0f 16 /r ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(16) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVHPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,MEMORY|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59709, 433, 3343}, + /* 1 : VMOVHPS xmmreg,mem64 [r+vm: vex.nds.128.0f 16 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 000) 001(16) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVHPS, 2, {XMMREG|RN_L16,MEMORY|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59716, 433, 3343}, + /* 2 : VMOVHPS mem64,xmmreg [mr: vex.128.0f 17 /r ] AVX,SANDYBRIDGE */ + /* 270(001 000) 001(17) 101 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVHPS, 2, {MEMORY|BITS64|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59723, 433, 3344}, + /* 3 : VMOVHPS xmmreg,xmmreg*,mem64 [rvm:t2: evex.nds.128.0f.w0 16 /r ] AVX512,FUTURE */ + /* 241(f1 7c 08) 311 001(16) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVHPS, 3, {XMMREG,XMMREG,MEMORY|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+34564, 544, 5608}, + /* 4 : VMOVHPS xmmreg,mem64 [r+vm:t2: evex.nds.128.0f.w0 16 /r ] ND,AVX512,FUTURE */ + /* 240(f1 7c 08) 311 001(16) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVHPS, 2, {XMMREG,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+34573, 544, 5608}, + /* 5 : VMOVHPS mem64,xmmreg [mr:t2: evex.128.0f.w0 17 /r ] AVX512,FUTURE */ + /* 250(f1 7c 08) 311 001(17) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVHPS, 2, {MEMORY|BITS64,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+34582, 544, 5609}, +}; + +static const struct itemplate instrux_VMOVLHPS[4] = { + /* 0 : VMOVLHPS xmmreg,xmmreg*,xmmreg [rvm: vex.nds.128.0f 16 /r ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(16) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVLHPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59709, 433, 3345}, + /* 1 : VMOVLHPS xmmreg,xmmreg [r+vm: vex.nds.128.0f 16 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 000) 001(16) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVLHPS, 2, {XMMREG|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59716, 433, 3345}, + /* 2 : VMOVLHPS xmmreg,xmmreg*,xmmreg [rvm: evex.nds.128.0f.w0 16 /r ] AVX512,FUTURE */ + /* 241(f1 7c 08) 300 001(16) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVLHPS, 3, {XMMREG,XMMREG,XMMREG,0,0}, NO_DECORATOR, nasm_bytecodes+34591, 544, 5610}, + /* 3 : VMOVLHPS xmmreg,xmmreg [r+vm: evex.nds.128.0f.w0 16 /r ] ND,AVX512,FUTURE */ + /* 240(f1 7c 08) 300 001(16) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVLHPS, 2, {XMMREG,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+34600, 544, 5610}, +}; + +static const struct itemplate instrux_VMOVLPD[6] = { + /* 0 : VMOVLPD xmmreg,xmmreg*,mem64 [rvm: vex.nds.128.66.0f 12 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(12) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVLPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,MEMORY|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59730, 433, 3346}, + /* 1 : VMOVLPD xmmreg,mem64 [r+vm: vex.nds.128.66.0f 12 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(12) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVLPD, 2, {XMMREG|RN_L16,MEMORY|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59737, 433, 3346}, + /* 2 : VMOVLPD mem64,xmmreg [mr: vex.128.66.0f 13 /r ] AVX,SANDYBRIDGE */ + /* 270(001 001) 001(13) 101 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVLPD, 2, {MEMORY|BITS64|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59744, 433, 3347}, + /* 3 : VMOVLPD xmmreg,xmmreg*,mem64 [rvm:t1s: evex.nds.128.66.0f.w1 12 /r ] AVX512,FUTURE */ + /* 241(f1 fd 08) 306 001(12) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVLPD, 3, {XMMREG,XMMREG,MEMORY|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+34609, 544, 5611}, + /* 4 : VMOVLPD xmmreg,mem64 [r+vm:t1s: evex.nds.128.66.0f.w1 12 /r ] ND,AVX512,FUTURE */ + /* 240(f1 fd 08) 306 001(12) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVLPD, 2, {XMMREG,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+34618, 544, 5611}, + /* 5 : VMOVLPD mem64,xmmreg [mr:t1s: evex.128.66.0f.w1 13 /r ] AVX512,FUTURE */ + /* 250(f1 fd 08) 306 001(13) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVLPD, 2, {MEMORY|BITS64,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+34627, 544, 5612}, +}; + +static const struct itemplate instrux_VMOVLPS[6] = { + /* 0 : VMOVLPS xmmreg,xmmreg*,mem64 [rvm: vex.nds.128.0f 12 /r ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(12) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVLPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,MEMORY|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59674, 433, 3348}, + /* 1 : VMOVLPS xmmreg,mem64 [r+vm: vex.nds.128.0f 12 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 000) 001(12) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVLPS, 2, {XMMREG|RN_L16,MEMORY|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59681, 433, 3348}, + /* 2 : VMOVLPS mem64,xmmreg [mr: vex.128.0f 13 /r ] AVX,SANDYBRIDGE */ + /* 270(001 000) 001(13) 101 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVLPS, 2, {MEMORY|BITS64|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59751, 433, 3349}, + /* 3 : VMOVLPS xmmreg,xmmreg*,mem64 [rvm:t2: evex.nds.128.0f.w0 12 /r ] AVX512,FUTURE */ + /* 241(f1 7c 08) 311 001(12) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVLPS, 3, {XMMREG,XMMREG,MEMORY|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+34636, 544, 5613}, + /* 4 : VMOVLPS xmmreg,mem64 [r+vm:t2: evex.nds.128.0f.w0 12 /r ] ND,AVX512,FUTURE */ + /* 240(f1 7c 08) 311 001(12) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVLPS, 2, {XMMREG,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+34645, 544, 5613}, + /* 5 : VMOVLPS mem64,xmmreg [mr:t2: evex.128.0f.w0 13 /r ] AVX512,FUTURE */ + /* 250(f1 7c 08) 311 001(13) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVLPS, 2, {MEMORY|BITS64,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+34654, 544, 5614}, +}; + +static const struct itemplate instrux_VMOVMSKPD[4] = { + /* 0 : VMOVMSKPD reg64,xmmreg [rm: vex.128.66.0f 50 /r ] LONG,PROT,AVX,X86_64,SANDYBRIDGE */ + /* 270(001 001) 001(50) 110 : NOAPX,WIG,LONG,VEX,PROT,AVX,SANDYBRIDGE */ + {I_VMOVMSKPD, 2, {REG_GPR|BITS64|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59758, 455, 3350}, + /* 1 : VMOVMSKPD reg32,xmmreg [rm: vex.128.66.0f 50 /r ] AVX,SANDYBRIDGE */ + /* 270(001 001) 001(50) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVMSKPD, 2, {REG_GPR|BITS32|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59758, 433, 3351}, + /* 2 : VMOVMSKPD reg64,ymmreg [rm: vex.256.66.0f 50 /r ] LONG,PROT,AVX,X86_64,SANDYBRIDGE */ + /* 270(001 005) 001(50) 110 : NOAPX,WIG,LONG,VEX,PROT,AVX,SANDYBRIDGE */ + {I_VMOVMSKPD, 2, {REG_GPR|BITS64|RN_L16,YMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59765, 455, 3352}, + /* 3 : VMOVMSKPD reg32,ymmreg [rm: vex.256.66.0f 50 /r ] AVX,SANDYBRIDGE */ + /* 270(001 005) 001(50) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVMSKPD, 2, {REG_GPR|BITS32|RN_L16,YMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59765, 433, 3353}, +}; + +static const struct itemplate instrux_VMOVMSKPS[4] = { + /* 0 : VMOVMSKPS reg64,xmmreg [rm: vex.128.0f 50 /r ] LONG,PROT,AVX,X86_64,SANDYBRIDGE */ + /* 270(001 000) 001(50) 110 : NOAPX,WIG,LONG,VEX,PROT,AVX,SANDYBRIDGE */ + {I_VMOVMSKPS, 2, {REG_GPR|BITS64|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59772, 455, 3354}, + /* 1 : VMOVMSKPS reg32,xmmreg [rm: vex.128.0f 50 /r ] AVX,SANDYBRIDGE */ + /* 270(001 000) 001(50) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVMSKPS, 2, {REG_GPR|BITS32|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59772, 433, 3355}, + /* 2 : VMOVMSKPS reg64,ymmreg [rm: vex.256.0f 50 /r ] LONG,PROT,AVX,X86_64,SANDYBRIDGE */ + /* 270(001 004) 001(50) 110 : NOAPX,WIG,LONG,VEX,PROT,AVX,SANDYBRIDGE */ + {I_VMOVMSKPS, 2, {REG_GPR|BITS64|RN_L16,YMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59779, 455, 3356}, + /* 3 : VMOVMSKPS reg32,ymmreg [rm: vex.256.0f 50 /r ] AVX,SANDYBRIDGE */ + /* 270(001 004) 001(50) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVMSKPS, 2, {REG_GPR|BITS32|RN_L16,YMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59779, 433, 3357}, +}; + +static const struct itemplate instrux_VMOVNTDQ[5] = { + /* 0 : VMOVNTDQ mem128,xmmreg [mr: vex.128.66.0f e7 /r ] AVX,SANDYBRIDGE */ + /* 270(001 001) 001(e7) 101 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVNTDQ, 2, {MEMORY|BITS128|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59786, 433, 3358}, + /* 1 : VMOVNTDQ mem256,ymmreg [mr: vex.256.66.0f e7 /r ] AVX,SANDYBRIDGE */ + /* 270(001 005) 001(e7) 101 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVNTDQ, 2, {MEMORY|BITS256|RN_L16,YMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59793, 433, 3361}, + /* 2 : VMOVNTDQ mem128,xmmreg [mr:fvm: evex.128.66.0f.w0 e7 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7d 08) 303 001(e7) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVNTDQ, 2, {MEMORY|BITS128,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+34663, 543, 5615}, + /* 3 : VMOVNTDQ mem256,ymmreg [mr:fvm: evex.256.66.0f.w0 e7 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7d 28) 303 001(e7) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVNTDQ, 2, {MEMORY|BITS256,YMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+34672, 543, 5616}, + /* 4 : VMOVNTDQ mem512,zmmreg [mr:fvm: evex.512.66.0f.w0 e7 /r ] AVX512,FUTURE */ + /* 250(f1 7d 48) 303 001(e7) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVNTDQ, 2, {MEMORY|BITS512,ZMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+34681, 544, 5617}, +}; + +static const struct itemplate instrux_VMOVNTQQ[1] = { + /* 0 : VMOVNTQQ mem256,ymmreg [mr: vex.256.66.0f e7 /r ] AVX,SANDYBRIDGE */ + /* 270(001 005) 001(e7) 101 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVNTQQ, 2, {MEMORY|BITS256|RN_L16,YMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59793, 433, 3360}, +}; + +static const struct itemplate instrux_VMOVNTDQA[5] = { + /* 0 : VMOVNTDQA xmmreg,mem128 [rm: vex.128.66.0f38 2a /r ] AVX,SANDYBRIDGE */ + /* 270(002 001) 001(2a) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVNTDQA, 2, {XMMREG|RN_L16,MEMORY|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59800, 433, 3362}, + /* 1 : VMOVNTDQA ymmreg,mem256 [rm: vex.256.66.0f38 2a /r ] AVX2,FUTURE */ + /* 270(002 005) 001(2a) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VMOVNTDQA, 2, {YMMREG|RN_L16,MEMORY|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64504, 467, 4212}, + /* 2 : VMOVNTDQA xmmreg,mem128 [rm:fvm: evex.128.66.0f38.w0 2a /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 08) 303 001(2a) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVNTDQA, 2, {XMMREG,MEMORY|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34690, 543, 5618}, + /* 3 : VMOVNTDQA ymmreg,mem256 [rm:fvm: evex.256.66.0f38.w0 2a /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 28) 303 001(2a) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVNTDQA, 2, {YMMREG,MEMORY|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+34699, 543, 5619}, + /* 4 : VMOVNTDQA zmmreg,mem512 [rm:fvm: evex.512.66.0f38.w0 2a /r ] AVX512,FUTURE */ + /* 250(f2 7d 48) 303 001(2a) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVNTDQA, 2, {ZMMREG,MEMORY|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+34708, 544, 5620}, +}; + +static const struct itemplate instrux_VMOVNTPD[5] = { + /* 0 : VMOVNTPD mem128,xmmreg [mr: vex.128.66.0f 2b /r ] AVX,SANDYBRIDGE */ + /* 270(001 001) 001(2b) 101 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVNTPD, 2, {MEMORY|BITS128|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59807, 433, 3363}, + /* 1 : VMOVNTPD mem256,ymmreg [mr: vex.256.66.0f 2b /r ] AVX,SANDYBRIDGE */ + /* 270(001 005) 001(2b) 101 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVNTPD, 2, {MEMORY|BITS256|RN_L16,YMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59814, 433, 3364}, + /* 2 : VMOVNTPD mem128,xmmreg [mr:fvm: evex.128.66.0f.w1 2b /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 fd 08) 303 001(2b) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVNTPD, 2, {MEMORY|BITS128,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+34717, 543, 5621}, + /* 3 : VMOVNTPD mem256,ymmreg [mr:fvm: evex.256.66.0f.w1 2b /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 fd 28) 303 001(2b) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVNTPD, 2, {MEMORY|BITS256,YMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+34726, 543, 5622}, + /* 4 : VMOVNTPD mem512,zmmreg [mr:fvm: evex.512.66.0f.w1 2b /r ] AVX512,FUTURE */ + /* 250(f1 fd 48) 303 001(2b) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVNTPD, 2, {MEMORY|BITS512,ZMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+34735, 544, 5623}, +}; + +static const struct itemplate instrux_VMOVNTPS[5] = { + /* 0 : VMOVNTPS mem128,xmmreg [mr: vex.128.0f 2b /r ] AVX,SANDYBRIDGE */ + /* 270(001 000) 001(2b) 101 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVNTPS, 2, {MEMORY|BITS128|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59821, 433, 3365}, + /* 1 : VMOVNTPS mem256,ymmreg [mr: vex.256.0f 2b /r ] AVX,SANDYBRIDGE */ + /* 270(001 004) 001(2b) 101 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVNTPS, 2, {MEMORY|BITS256|RN_L16,YMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59828, 433, 3366}, + /* 2 : VMOVNTPS mem128,xmmreg [mr:fvm: evex.128.0f.w0 2b /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7c 08) 303 001(2b) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVNTPS, 2, {MEMORY|BITS128,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+34744, 543, 5624}, + /* 3 : VMOVNTPS mem256,ymmreg [mr:fvm: evex.256.0f.w0 2b /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7c 28) 303 001(2b) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVNTPS, 2, {MEMORY|BITS256,YMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+34753, 543, 5625}, + /* 4 : VMOVNTPS mem512,zmmreg [mr:fvm: evex.512.0f.w0 2b /r ] AVX512,FUTURE */ + /* 250(f1 7c 48) 303 001(2b) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVNTPS, 2, {MEMORY|BITS512,ZMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+34762, 544, 5626}, +}; + +static const struct itemplate instrux_VMOVSD[12] = { + /* 0 : VMOVSD xmmreg,xmmreg*,xmmreg [rvm: vex.nds.lig.f2.0f 10 /r ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(10) 120 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59835, 440, 3367}, + /* 1 : VMOVSD xmmreg,xmmreg [r+vm: vex.nds.lig.f2.0f 10 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 003) 001(10) 110 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVSD, 2, {XMMREG|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59842, 440, 3367}, + /* 2 : VMOVSD xmmreg,mem64 [rm: vex.lig.f2.0f 10 /r ] AVX,SANDYBRIDGE */ + /* 270(001 003) 001(10) 110 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVSD, 2, {XMMREG|RN_L16,MEMORY|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59849, 440, 3368}, + /* 3 : VMOVSD xmmreg,xmmreg*,xmmreg [mvr: vex.nds.lig.f2.0f 11 /r ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(11) 102 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59856, 440, 3369}, + /* 4 : VMOVSD xmmreg,xmmreg [m+vr: vex.nds.lig.f2.0f 11 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 003) 001(11) 101 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVSD, 2, {XMMREG|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59863, 440, 3369}, + /* 5 : VMOVSD mem64,xmmreg [mr: vex.lig.f2.0f 11 /r ] AVX,SANDYBRIDGE */ + /* 270(001 003) 001(11) 101 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVSD, 2, {MEMORY|BITS64|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59870, 440, 3370}, + /* 6 : VMOVSD xmmreg|mask|z,mem64 [rm:t1s: evex.lig.f2.0f.w1 10 /r ] AVX512,FUTURE */ + /* 250(f1 ff 08) 306 001(10) 110 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VMOVSD, 2, {XMMREG,MEMORY|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34807, 545, 5631}, + /* 7 : VMOVSD mem64|mask,xmmreg [mr:t1s: evex.lig.f2.0f.w1 11 /r ] AVX512,FUTURE */ + /* 250(f1 ff 08) 306 001(11) 101 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VMOVSD, 2, {MEMORY|BITS64,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+34816, 545, 5632}, + /* 8 : VMOVSD xmmreg|mask|z,xmmreg*,xmmreg [rvm: evex.nds.lig.f2.0f.w1 10 /r ] AVX512,FUTURE */ + /* 241(f1 ff 08) 300 001(10) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VMOVSD, 3, {XMMREG,XMMREG,XMMREG,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34825, 545, 5633}, + /* 9 : VMOVSD xmmreg|mask|z,xmmreg [r+vm: evex.nds.lig.f2.0f.w1 10 /r ] ND,AVX512,FUTURE */ + /* 240(f1 ff 08) 300 001(10) 110 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VMOVSD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34834, 545, 5633}, + /* 10 : VMOVSD xmmreg|mask|z,xmmreg*,xmmreg [mvr: evex.nds.lig.f2.0f.w1 11 /r ] AVX512,FUTURE */ + /* 241(f1 ff 08) 300 001(11) 102 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VMOVSD, 3, {XMMREG,XMMREG,XMMREG,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34843, 545, 5634}, + /* 11 : VMOVSD xmmreg|mask|z,xmmreg [m+vr: evex.nds.lig.f2.0f.w1 11 /r ] ND,AVX512,FUTURE */ + /* 240(f1 ff 08) 300 001(11) 101 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VMOVSD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34852, 545, 5634}, +}; + +static const struct itemplate instrux_VMOVSHDUP[5] = { + /* 0 : VMOVSHDUP xmmreg,xmmrm128 [rm: vex.128.f3.0f 16 /r ] AVX,SANDYBRIDGE */ + /* 270(001 002) 001(16) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVSHDUP, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59877, 433, 3371}, + /* 1 : VMOVSHDUP ymmreg,ymmrm256 [rm: vex.256.f3.0f 16 /r ] AVX,SANDYBRIDGE */ + /* 270(001 006) 001(16) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVSHDUP, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59884, 433, 3372}, + /* 2 : VMOVSHDUP xmmreg|mask|z,xmmrm128 [rm:fvm: evex.128.f3.0f.w0 16 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7e 08) 303 001(16) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVSHDUP, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34861, 543, 5635}, + /* 3 : VMOVSHDUP ymmreg|mask|z,ymmrm256 [rm:fvm: evex.256.f3.0f.w0 16 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7e 28) 303 001(16) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVSHDUP, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34870, 543, 5636}, + /* 4 : VMOVSHDUP zmmreg|mask|z,zmmrm512 [rm:fvm: evex.512.f3.0f.w0 16 /r ] AVX512,FUTURE */ + /* 250(f1 7e 48) 303 001(16) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVSHDUP, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34879, 544, 5637}, +}; + +static const struct itemplate instrux_VMOVSLDUP[5] = { + /* 0 : VMOVSLDUP xmmreg,xmmrm128 [rm: vex.128.f3.0f 12 /r ] AVX,SANDYBRIDGE */ + /* 270(001 002) 001(12) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVSLDUP, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59891, 433, 3373}, + /* 1 : VMOVSLDUP ymmreg,ymmrm256 [rm: vex.256.f3.0f 12 /r ] AVX,SANDYBRIDGE */ + /* 270(001 006) 001(12) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVSLDUP, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59898, 433, 3374}, + /* 2 : VMOVSLDUP xmmreg|mask|z,xmmrm128 [rm:fvm: evex.128.f3.0f.w0 12 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7e 08) 303 001(12) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVSLDUP, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34888, 543, 5638}, + /* 3 : VMOVSLDUP ymmreg|mask|z,ymmrm256 [rm:fvm: evex.256.f3.0f.w0 12 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7e 28) 303 001(12) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVSLDUP, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34897, 543, 5639}, + /* 4 : VMOVSLDUP zmmreg|mask|z,zmmrm512 [rm:fvm: evex.512.f3.0f.w0 12 /r ] AVX512,FUTURE */ + /* 250(f1 7e 48) 303 001(12) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVSLDUP, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34906, 544, 5640}, +}; + +static const struct itemplate instrux_VMOVSS[12] = { + /* 0 : VMOVSS xmmreg,xmmreg*,xmmreg [rvm: vex.nds.lig.f3.0f 10 /r ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(10) 120 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59905, 440, 3375}, + /* 1 : VMOVSS xmmreg,xmmreg [r+vm: vex.nds.lig.f3.0f 10 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 002) 001(10) 110 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVSS, 2, {XMMREG|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59912, 440, 3375}, + /* 2 : VMOVSS xmmreg,mem32 [rm: vex.lig.f3.0f 10 /r ] AVX,SANDYBRIDGE */ + /* 270(001 002) 001(10) 110 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVSS, 2, {XMMREG|RN_L16,MEMORY|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59919, 440, 3376}, + /* 3 : VMOVSS xmmreg,xmmreg*,xmmreg [mvr: vex.nds.lig.f3.0f 11 /r ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(11) 102 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59926, 440, 3377}, + /* 4 : VMOVSS xmmreg,xmmreg [m+vr: vex.nds.lig.f3.0f 11 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 002) 001(11) 101 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVSS, 2, {XMMREG|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59933, 440, 3377}, + /* 5 : VMOVSS mem32,xmmreg [mr: vex.lig.f3.0f 11 /r ] AVX,SANDYBRIDGE */ + /* 270(001 002) 001(11) 101 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVSS, 2, {MEMORY|BITS32|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59940, 440, 3378}, + /* 6 : VMOVSS xmmreg|mask|z,mem32 [rm:t1s: evex.lig.f3.0f.w0 10 /r ] AVX512,FUTURE */ + /* 250(f1 7e 08) 306 001(10) 110 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VMOVSS, 2, {XMMREG,MEMORY|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34915, 545, 5641}, + /* 7 : VMOVSS mem32|mask,xmmreg [mr:t1s: evex.lig.f3.0f.w0 11 /r ] AVX512,FUTURE */ + /* 250(f1 7e 08) 306 001(11) 101 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VMOVSS, 2, {MEMORY|BITS32,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+34924, 545, 5642}, + /* 8 : VMOVSS xmmreg|mask|z,xmmreg*,xmmreg [rvm: evex.nds.lig.f3.0f.w0 10 /r ] AVX512,FUTURE */ + /* 241(f1 7e 08) 300 001(10) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VMOVSS, 3, {XMMREG,XMMREG,XMMREG,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34933, 545, 5643}, + /* 9 : VMOVSS xmmreg|mask|z,xmmreg [r+vm: evex.nds.lig.f3.0f.w0 10 /r ] ND,AVX512,FUTURE */ + /* 240(f1 7e 08) 300 001(10) 110 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VMOVSS, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34942, 545, 5643}, + /* 10 : VMOVSS xmmreg|mask|z,xmmreg*,xmmreg [mvr: evex.nds.lig.f3.0f.w0 11 /r ] AVX512,FUTURE */ + /* 241(f1 7e 08) 300 001(11) 102 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VMOVSS, 3, {XMMREG,XMMREG,XMMREG,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34951, 545, 5644}, + /* 11 : VMOVSS xmmreg|mask|z,xmmreg [m+vr: evex.nds.lig.f3.0f.w0 11 /r ] ND,AVX512,FUTURE */ + /* 240(f1 7e 08) 300 001(11) 101 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VMOVSS, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34960, 545, 5644}, +}; + +static const struct itemplate instrux_VMOVUPD[13] = { + /* 0 : VMOVUPD xmmreg,xmmrm128 [rm: vex.128.66.0f 10 /r ] AVX,SANDYBRIDGE */ + /* 270(001 001) 001(10) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVUPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59947, 433, 3379}, + /* 1 : VMOVUPD xmmrm128,xmmreg [mr: vex.128.66.0f 11 /r ] AVX,SANDYBRIDGE */ + /* 270(001 001) 001(11) 101 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVUPD, 2, {RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59954, 433, 3380}, + /* 2 : VMOVUPD ymmreg,ymmrm256 [rm: vex.256.66.0f 10 /r ] AVX,SANDYBRIDGE */ + /* 270(001 005) 001(10) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVUPD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59961, 433, 3381}, + /* 3 : VMOVUPD ymmrm256,ymmreg [mr: vex.256.66.0f 11 /r ] AVX,SANDYBRIDGE */ + /* 270(001 005) 001(11) 101 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVUPD, 2, {RM_YMM|BITS256|RN_L16,YMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59968, 433, 3382}, + /* 4 : VMOVUPD xmmreg|mask|z,xmmrm128 [rm:fvm: evex.128.66.0f.w1 10 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 fd 08) 303 001(10) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVUPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34969, 543, 5645}, + /* 5 : VMOVUPD ymmreg|mask|z,ymmrm256 [rm:fvm: evex.256.66.0f.w1 10 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 fd 28) 303 001(10) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVUPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34978, 543, 5646}, + /* 6 : VMOVUPD zmmreg|mask|z,zmmrm512 [rm:fvm: evex.512.66.0f.w1 10 /r ] AVX512,FUTURE */ + /* 250(f1 fd 48) 303 001(10) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVUPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34987, 544, 5647}, + /* 7 : VMOVUPD xmmreg|mask|z,xmmreg [mr: evex.128.66.0f.w1 11 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 fd 08) 300 001(11) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVUPD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34996, 543, 5648}, + /* 8 : VMOVUPD ymmreg|mask|z,ymmreg [mr: evex.256.66.0f.w1 11 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 fd 28) 300 001(11) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVUPD, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35005, 543, 5649}, + /* 9 : VMOVUPD zmmreg|mask|z,zmmreg [mr: evex.512.66.0f.w1 11 /r ] AVX512,FUTURE */ + /* 250(f1 fd 48) 300 001(11) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVUPD, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35014, 544, 5650}, + /* 10 : VMOVUPD mem128|mask,xmmreg [mr:fvm: evex.128.66.0f.w1 11 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 fd 08) 303 001(11) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVUPD, 2, {MEMORY|BITS128,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+35023, 543, 5651}, + /* 11 : VMOVUPD mem256|mask,ymmreg [mr:fvm: evex.256.66.0f.w1 11 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 fd 28) 303 001(11) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVUPD, 2, {MEMORY|BITS256,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+35032, 543, 5652}, + /* 12 : VMOVUPD mem512|mask,zmmreg [mr:fvm: evex.512.66.0f.w1 11 /r ] AVX512,FUTURE */ + /* 250(f1 fd 48) 303 001(11) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVUPD, 2, {MEMORY|BITS512,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+35041, 544, 5653}, +}; + +static const struct itemplate instrux_VMOVUPS[13] = { + /* 0 : VMOVUPS xmmreg,xmmrm128 [rm: vex.128.0f 10 /r ] AVX,SANDYBRIDGE */ + /* 270(001 000) 001(10) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVUPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59975, 433, 3383}, + /* 1 : VMOVUPS xmmrm128,xmmreg [mr: vex.128.0f 11 /r ] AVX,SANDYBRIDGE */ + /* 270(001 000) 001(11) 101 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVUPS, 2, {RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59982, 433, 3384}, + /* 2 : VMOVUPS ymmreg,ymmrm256 [rm: vex.256.0f 10 /r ] AVX,SANDYBRIDGE */ + /* 270(001 004) 001(10) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVUPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59989, 433, 3385}, + /* 3 : VMOVUPS ymmrm256,ymmreg [mr: vex.256.0f 11 /r ] AVX,SANDYBRIDGE */ + /* 270(001 004) 001(11) 101 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVUPS, 2, {RM_YMM|BITS256|RN_L16,YMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59996, 433, 3386}, + /* 4 : VMOVUPS xmmreg|mask|z,xmmrm128 [rm:fvm: evex.128.0f.w0 10 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7c 08) 303 001(10) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVUPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35050, 543, 5654}, + /* 5 : VMOVUPS ymmreg|mask|z,ymmrm256 [rm:fvm: evex.256.0f.w0 10 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7c 28) 303 001(10) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVUPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35059, 543, 5655}, + /* 6 : VMOVUPS zmmreg|mask|z,zmmrm512 [rm:fvm: evex.512.0f.w0 10 /r ] AVX512,FUTURE */ + /* 250(f1 7c 48) 303 001(10) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVUPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35068, 544, 5656}, + /* 7 : VMOVUPS xmmreg|mask|z,xmmreg [mr: evex.128.0f.w0 11 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7c 08) 300 001(11) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVUPS, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35077, 543, 5657}, + /* 8 : VMOVUPS ymmreg|mask|z,ymmreg [mr: evex.256.0f.w0 11 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7c 28) 300 001(11) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVUPS, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35086, 543, 5658}, + /* 9 : VMOVUPS zmmreg|mask|z,zmmreg [mr: evex.512.0f.w0 11 /r ] AVX512,FUTURE */ + /* 250(f1 7c 48) 300 001(11) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVUPS, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35095, 544, 5659}, + /* 10 : VMOVUPS mem128|mask,xmmreg [mr:fvm: evex.128.0f.w0 11 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7c 08) 303 001(11) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVUPS, 2, {MEMORY|BITS128,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+35104, 543, 5660}, + /* 11 : VMOVUPS mem256|mask,ymmreg [mr:fvm: evex.256.0f.w0 11 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7c 28) 303 001(11) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVUPS, 2, {MEMORY|BITS256,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+35113, 543, 5661}, + /* 12 : VMOVUPS mem512|mask,zmmreg [mr:fvm: evex.512.0f.w0 11 /r ] AVX512,FUTURE */ + /* 250(f1 7c 48) 303 001(11) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVUPS, 2, {MEMORY|BITS512,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+35122, 544, 5662}, +}; + +static const struct itemplate instrux_VMPSADBW[7] = { + /* 0 : VMPSADBW xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: vex.nds.128.66.0f3a 42 /r ib ] AVX,SANDYBRIDGE */ + /* 261(003 001) 001(42) 120 023 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMPSADBW, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+52067, 433, 3387}, + /* 1 : VMPSADBW xmmreg,xmmrm128,imm8 [r+vmi: vex.nds.128.66.0f3a 42 /r ib ] ND,AVX,SANDYBRIDGE */ + /* 260(003 001) 001(42) 110 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMPSADBW, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52075, 433, 3387}, + /* 2 : VMPSADBW ymmreg,ymmreg*,ymmrm256,imm8 [rvmi: vex.nds.256.66.0f3a 42 /r ib ] AVX2,FUTURE */ + /* 261(003 005) 001(42) 120 023 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VMPSADBW, 4, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+54243, 467, 4090}, + /* 3 : VMPSADBW ymmreg,ymmrm256,imm8 [r+vmi: vex.nds.256.66.0f3a 42 /r ib ] ND,AVX2,FUTURE */ + /* 260(003 005) 001(42) 110 022 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VMPSADBW, 3, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54251, 467, 4090}, + /* 4 : VMPSADBW xmmreg|mask|z,xmmreg,xmmrm128,imm8 [rvmi:fvm: evex.128.f3.0f3a.w0 42 /r ib ] AVX10_2,FUTURE */ + /* 241(f3 7e 08) 303 001(42) 120 023 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VMPSADBW, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23143, 644, 7514}, + /* 5 : VMPSADBW ymmreg|mask|z,ymmreg,ymmrm256,imm8 [rvmi:fvm: evex.256.f3.0f3a.w0 42 /r ib ] AVX10_2,FUTURE */ + /* 241(f3 7e 28) 303 001(42) 120 023 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VMPSADBW, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23153, 644, 7515}, + /* 6 : VMPSADBW zmmreg|mask|z,zmmreg,zmmrm512,imm8 [rvmi:fvm: evex.512.f3.0f3a.w0 42 /r ib ] AVX10_2,FUTURE */ + /* 241(f3 7e 48) 303 001(42) 120 023 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VMPSADBW, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23163, 644, 7516}, +}; + +static const struct itemplate instrux_VMULPD[10] = { + /* 0 : VMULPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 59 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(59) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMULPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60003, 433, 3388}, + /* 1 : VMULPD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f 59 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(59) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMULPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60010, 433, 3388}, + /* 2 : VMULPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 59 /r ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(59) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMULPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60017, 433, 3389}, + /* 3 : VMULPD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f 59 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 005) 001(59) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMULPD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60024, 433, 3389}, + /* 4 : VMULPD xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f.w1 59 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(59) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMULPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+35131, 543, 5663}, + /* 5 : VMULPD xmmreg|mask|z,xmmrm128|b64 [r+vm:fv: evex.nds.128.66.0f.w1 59 /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 fd 08) 301 001(59) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMULPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+35140, 543, 5663}, + /* 6 : VMULPD ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f.w1 59 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(59) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMULPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+35149, 543, 5664}, + /* 7 : VMULPD ymmreg|mask|z,ymmrm256|b64 [r+vm:fv: evex.nds.256.66.0f.w1 59 /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 fd 28) 301 001(59) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMULPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+35158, 543, 5664}, + /* 8 : VMULPD zmmreg|mask|z,zmmreg*,zmmrm512|b64|er [rvm:fv: evex.nds.512.66.0f.w1 59 /r ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(59) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VMULPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+35167, 544, 5665}, + /* 9 : VMULPD zmmreg|mask|z,zmmrm512|b64|er [r+vm:fv: evex.nds.512.66.0f.w1 59 /r ] ND,AVX512,FUTURE */ + /* 240(f1 fd 48) 301 001(59) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VMULPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+35176, 544, 5665}, +}; + +static const struct itemplate instrux_VMULPS[10] = { + /* 0 : VMULPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f 59 /r ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(59) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMULPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60031, 433, 3390}, + /* 1 : VMULPS xmmreg,xmmrm128 [r+vm: vex.nds.128.0f 59 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 000) 001(59) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMULPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60038, 433, 3390}, + /* 2 : VMULPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f 59 /r ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(59) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMULPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60045, 433, 3391}, + /* 3 : VMULPS ymmreg,ymmrm256 [r+vm: vex.nds.256.0f 59 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 004) 001(59) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMULPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60052, 433, 3391}, + /* 4 : VMULPS xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.0f.w0 59 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(59) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMULPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+35185, 543, 5666}, + /* 5 : VMULPS xmmreg|mask|z,xmmrm128|b32 [r+vm:fv: evex.nds.128.0f.w0 59 /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 7c 08) 301 001(59) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMULPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+35194, 543, 5666}, + /* 6 : VMULPS ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.0f.w0 59 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(59) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMULPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+35203, 543, 5667}, + /* 7 : VMULPS ymmreg|mask|z,ymmrm256|b32 [r+vm:fv: evex.nds.256.0f.w0 59 /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 7c 28) 301 001(59) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMULPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+35212, 543, 5667}, + /* 8 : VMULPS zmmreg|mask|z,zmmreg*,zmmrm512|b32|er [rvm:fv: evex.nds.512.0f.w0 59 /r ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(59) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VMULPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+35221, 544, 5668}, + /* 9 : VMULPS zmmreg|mask|z,zmmrm512|b32|er [r+vm:fv: evex.nds.512.0f.w0 59 /r ] ND,AVX512,FUTURE */ + /* 240(f1 7c 48) 301 001(59) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VMULPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+35230, 544, 5668}, +}; + +static const struct itemplate instrux_VMULSD[4] = { + /* 0 : VMULSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f 59 /r ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(59) 120 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMULSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60059, 440, 3392}, + /* 1 : VMULSD xmmreg,xmmrm64 [r+vm: vex.nds.lig.f2.0f 59 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 003) 001(59) 110 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMULSD, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60066, 440, 3392}, + /* 2 : VMULSD xmmreg|mask|z,xmmreg*,xmmrm64|er [rvm:t1s: evex.nds.lig.f2.0f.w1 59 /r ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(59) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VMULSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+35239, 545, 5669}, + /* 3 : VMULSD xmmreg|mask|z,xmmrm64|er [r+vm:t1s: evex.nds.lig.f2.0f.w1 59 /r ] ND,AVX512,FUTURE */ + /* 240(f1 ff 08) 306 001(59) 110 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VMULSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+35248, 545, 5669}, +}; + +static const struct itemplate instrux_VMULSS[4] = { + /* 0 : VMULSS xmmreg,xmmreg*,xmmrm32 [rvm: vex.nds.lig.f3.0f 59 /r ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(59) 120 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMULSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60073, 440, 3393}, + /* 1 : VMULSS xmmreg,xmmrm32 [r+vm: vex.nds.lig.f3.0f 59 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 002) 001(59) 110 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMULSS, 2, {XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60080, 440, 3393}, + /* 2 : VMULSS xmmreg|mask|z,xmmreg*,xmmrm32|er [rvm:t1s: evex.nds.lig.f3.0f.w0 59 /r ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(59) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VMULSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+35257, 545, 5670}, + /* 3 : VMULSS xmmreg|mask|z,xmmrm32|er [r+vm:t1s: evex.nds.lig.f3.0f.w0 59 /r ] ND,AVX512,FUTURE */ + /* 240(f1 7e 08) 306 001(59) 110 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VMULSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+35266, 545, 5670}, +}; + +static const struct itemplate instrux_VORPD[10] = { + /* 0 : VORPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 56 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(56) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VORPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60087, 433, 3394}, + /* 1 : VORPD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f 56 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(56) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VORPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60094, 433, 3394}, + /* 2 : VORPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 56 /r ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(56) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VORPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60101, 433, 3395}, + /* 3 : VORPD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f 56 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 005) 001(56) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VORPD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60108, 433, 3395}, + /* 4 : VORPD xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f.w1 56 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 241(f1 fd 08) 301 001(56) 120 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VORPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+35275, 546, 5671}, + /* 5 : VORPD xmmreg|mask|z,xmmrm128|b64 [r+vm:fv: evex.nds.128.66.0f.w1 56 /r ] ND,AVX512VL,AVX512DQ,FUTURE */ + /* 240(f1 fd 08) 301 001(56) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VORPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+35284, 546, 5671}, + /* 6 : VORPD ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f.w1 56 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 241(f1 fd 28) 301 001(56) 120 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VORPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+35293, 546, 5672}, + /* 7 : VORPD ymmreg|mask|z,ymmrm256|b64 [r+vm:fv: evex.nds.256.66.0f.w1 56 /r ] ND,AVX512VL,AVX512DQ,FUTURE */ + /* 240(f1 fd 28) 301 001(56) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VORPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+35302, 546, 5672}, + /* 8 : VORPD zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f.w1 56 /r ] AVX512DQ,FUTURE */ + /* 241(f1 fd 48) 301 001(56) 120 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VORPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+35311, 547, 5673}, + /* 9 : VORPD zmmreg|mask|z,zmmrm512|b64 [r+vm:fv: evex.nds.512.66.0f.w1 56 /r ] ND,AVX512DQ,FUTURE */ + /* 240(f1 fd 48) 301 001(56) 110 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VORPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+35320, 547, 5673}, +}; + +static const struct itemplate instrux_VORPS[10] = { + /* 0 : VORPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f 56 /r ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(56) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VORPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60115, 433, 3396}, + /* 1 : VORPS xmmreg,xmmrm128 [r+vm: vex.nds.128.0f 56 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 000) 001(56) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VORPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60122, 433, 3396}, + /* 2 : VORPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f 56 /r ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(56) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VORPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60129, 433, 3397}, + /* 3 : VORPS ymmreg,ymmrm256 [r+vm: vex.nds.256.0f 56 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 004) 001(56) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VORPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60136, 433, 3397}, + /* 4 : VORPS xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.0f.w0 56 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 241(f1 7c 08) 301 001(56) 120 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VORPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+35329, 546, 5674}, + /* 5 : VORPS xmmreg|mask|z,xmmrm128|b32 [r+vm:fv: evex.nds.128.0f.w0 56 /r ] ND,AVX512VL,AVX512DQ,FUTURE */ + /* 240(f1 7c 08) 301 001(56) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VORPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+35338, 546, 5674}, + /* 6 : VORPS ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.0f.w0 56 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 241(f1 7c 28) 301 001(56) 120 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VORPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+35347, 546, 5675}, + /* 7 : VORPS ymmreg|mask|z,ymmrm256|b32 [r+vm:fv: evex.nds.256.0f.w0 56 /r ] ND,AVX512VL,AVX512DQ,FUTURE */ + /* 240(f1 7c 28) 301 001(56) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VORPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+35356, 546, 5675}, + /* 8 : VORPS zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.0f.w0 56 /r ] AVX512DQ,FUTURE */ + /* 241(f1 7c 48) 301 001(56) 120 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VORPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+35365, 547, 5676}, + /* 9 : VORPS zmmreg|mask|z,zmmrm512|b32 [r+vm:fv: evex.nds.512.0f.w0 56 /r ] ND,AVX512DQ,FUTURE */ + /* 240(f1 7c 48) 301 001(56) 110 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VORPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+35374, 547, 5676}, +}; + +static const struct itemplate instrux_VPABSB[5] = { + /* 0 : VPABSB xmmreg,xmmrm128 [rm: vex.128.66.0f38 1c /r ] AVX,SANDYBRIDGE */ + /* 270(002 001) 001(1c) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPABSB, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60143, 433, 3398}, + /* 1 : VPABSB ymmreg,ymmrm256 [rm: vex.256.66.0f38 1c /r ] AVX2,FUTURE */ + /* 270(002 005) 001(1c) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPABSB, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63244, 467, 4091}, + /* 2 : VPABSB xmmreg|mask|z,xmmrm128 [rm:fvm: evex.128.66.0f38.wig 1c /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7d 08) 303 001(1c) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPABSB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35383, 555, 5677}, + /* 3 : VPABSB ymmreg|mask|z,ymmrm256 [rm:fvm: evex.256.66.0f38.wig 1c /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7d 28) 303 001(1c) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPABSB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35392, 555, 5678}, + /* 4 : VPABSB zmmreg|mask|z,zmmrm512 [rm:fvm: evex.512.66.0f38.wig 1c /r ] AVX512BW,FUTURE */ + /* 250(f2 7d 48) 303 001(1c) 110 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPABSB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35401, 556, 5679}, +}; + +static const struct itemplate instrux_VPABSW[5] = { + /* 0 : VPABSW xmmreg,xmmrm128 [rm: vex.128.66.0f38 1d /r ] AVX,SANDYBRIDGE */ + /* 270(002 001) 001(1d) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPABSW, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60150, 433, 3399}, + /* 1 : VPABSW ymmreg,ymmrm256 [rm: vex.256.66.0f38 1d /r ] AVX2,FUTURE */ + /* 270(002 005) 001(1d) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPABSW, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63251, 467, 4092}, + /* 2 : VPABSW xmmreg|mask|z,xmmrm128 [rm:fvm: evex.128.66.0f38.wig 1d /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7d 08) 303 001(1d) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPABSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35464, 555, 5686}, + /* 3 : VPABSW ymmreg|mask|z,ymmrm256 [rm:fvm: evex.256.66.0f38.wig 1d /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7d 28) 303 001(1d) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPABSW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35473, 555, 5687}, + /* 4 : VPABSW zmmreg|mask|z,zmmrm512 [rm:fvm: evex.512.66.0f38.wig 1d /r ] AVX512BW,FUTURE */ + /* 250(f2 7d 48) 303 001(1d) 110 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPABSW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35482, 556, 5688}, +}; + +static const struct itemplate instrux_VPABSD[5] = { + /* 0 : VPABSD xmmreg,xmmrm128 [rm: vex.128.66.0f38 1e /r ] AVX,SANDYBRIDGE */ + /* 270(002 001) 001(1e) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPABSD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60157, 433, 3400}, + /* 1 : VPABSD ymmreg,ymmrm256 [rm: vex.256.66.0f38 1e /r ] AVX2,FUTURE */ + /* 270(002 005) 001(1e) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPABSD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63258, 467, 4093}, + /* 2 : VPABSD xmmreg|mask|z,xmmrm128|b32 [rm:fv: evex.128.66.0f38.w0 1e /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 08) 301 001(1e) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPABSD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+35410, 543, 5680}, + /* 3 : VPABSD ymmreg|mask|z,ymmrm256|b32 [rm:fv: evex.256.66.0f38.w0 1e /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 28) 301 001(1e) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPABSD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+35419, 543, 5681}, + /* 4 : VPABSD zmmreg|mask|z,zmmrm512|b32 [rm:fv: evex.512.66.0f38.w0 1e /r ] AVX512,FUTURE */ + /* 250(f2 7d 48) 301 001(1e) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPABSD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+35428, 544, 5682}, +}; + +static const struct itemplate instrux_VPACKSSWB[10] = { + /* 0 : VPACKSSWB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 63 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(63) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPACKSSWB, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60164, 433, 3401}, + /* 1 : VPACKSSWB xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f 63 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(63) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPACKSSWB, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60171, 433, 3401}, + /* 2 : VPACKSSWB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 63 /r ] AVX2,FUTURE */ + /* 261(001 005) 001(63) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPACKSSWB, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63265, 467, 4094}, + /* 3 : VPACKSSWB ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f 63 /r ] ND,AVX2,FUTURE */ + /* 260(001 005) 001(63) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPACKSSWB, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63272, 467, 4094}, + /* 4 : VPACKSSWB xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig 63 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 303 001(63) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPACKSSWB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35545, 555, 5692}, + /* 5 : VPACKSSWB xmmreg|mask|z,xmmrm128 [r+vm:fvm: evex.nds.128.66.0f.wig 63 /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 08) 303 001(63) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPACKSSWB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35554, 555, 5692}, + /* 6 : VPACKSSWB ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig 63 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 303 001(63) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPACKSSWB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35563, 555, 5693}, + /* 7 : VPACKSSWB ymmreg|mask|z,ymmrm256 [r+vm:fvm: evex.nds.256.66.0f.wig 63 /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 28) 303 001(63) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPACKSSWB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35572, 555, 5693}, + /* 8 : VPACKSSWB zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig 63 /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 303 001(63) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPACKSSWB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35581, 556, 5694}, + /* 9 : VPACKSSWB zmmreg|mask|z,zmmrm512 [r+vm:fvm: evex.nds.512.66.0f.wig 63 /r ] ND,AVX512BW,FUTURE */ + /* 240(f1 7d 48) 303 001(63) 110 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPACKSSWB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35590, 556, 5694}, +}; + +static const struct itemplate instrux_VPACKSSDW[10] = { + /* 0 : VPACKSSDW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 6b /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(6b) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPACKSSDW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60178, 433, 3402}, + /* 1 : VPACKSSDW xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f 6b /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(6b) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPACKSSDW, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60185, 433, 3402}, + /* 2 : VPACKSSDW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 6b /r ] AVX2,FUTURE */ + /* 261(001 005) 001(6b) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPACKSSDW, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63279, 467, 4095}, + /* 3 : VPACKSSDW ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f 6b /r ] ND,AVX2,FUTURE */ + /* 260(001 005) 001(6b) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPACKSSDW, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63286, 467, 4095}, + /* 4 : VPACKSSDW xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f.w0 6b /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 301 001(6b) 120 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPACKSSDW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+35491, 549, 5689}, + /* 5 : VPACKSSDW xmmreg|mask|z,xmmrm128|b32 [r+vm:fv: evex.nds.128.66.0f.w0 6b /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 08) 301 001(6b) 110 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPACKSSDW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+35500, 549, 5689}, + /* 6 : VPACKSSDW ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f.w0 6b /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 301 001(6b) 120 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPACKSSDW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+35509, 549, 5690}, + /* 7 : VPACKSSDW ymmreg|mask|z,ymmrm256|b32 [r+vm:fv: evex.nds.256.66.0f.w0 6b /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 28) 301 001(6b) 110 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPACKSSDW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+35518, 549, 5690}, + /* 8 : VPACKSSDW zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f.w0 6b /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 301 001(6b) 120 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPACKSSDW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+35527, 550, 5691}, + /* 9 : VPACKSSDW zmmreg|mask|z,zmmrm512|b32 [r+vm:fv: evex.nds.512.66.0f.w0 6b /r ] ND,AVX512BW,FUTURE */ + /* 240(f1 7d 48) 301 001(6b) 110 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPACKSSDW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+35536, 550, 5691}, +}; + +static const struct itemplate instrux_VPACKUSWB[10] = { + /* 0 : VPACKUSWB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 67 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(67) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPACKUSWB, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60192, 433, 3403}, + /* 1 : VPACKUSWB xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f 67 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(67) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPACKUSWB, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60199, 433, 3403}, + /* 2 : VPACKUSWB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 67 /r ] AVX2,FUTURE */ + /* 261(001 005) 001(67) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPACKUSWB, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63307, 467, 4097}, + /* 3 : VPACKUSWB ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f 67 /r ] ND,AVX2,FUTURE */ + /* 260(001 005) 001(67) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPACKUSWB, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63314, 467, 4097}, + /* 4 : VPACKUSWB xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig 67 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 303 001(67) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPACKUSWB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35653, 555, 5698}, + /* 5 : VPACKUSWB xmmreg|mask|z,xmmrm128 [r+vm:fvm: evex.nds.128.66.0f.wig 67 /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 08) 303 001(67) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPACKUSWB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35662, 555, 5698}, + /* 6 : VPACKUSWB ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig 67 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 303 001(67) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPACKUSWB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35671, 555, 5699}, + /* 7 : VPACKUSWB ymmreg|mask|z,ymmrm256 [r+vm:fvm: evex.nds.256.66.0f.wig 67 /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 28) 303 001(67) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPACKUSWB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35680, 555, 5699}, + /* 8 : VPACKUSWB zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig 67 /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 303 001(67) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPACKUSWB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35689, 556, 5700}, + /* 9 : VPACKUSWB zmmreg|mask|z,zmmrm512 [r+vm:fvm: evex.nds.512.66.0f.wig 67 /r ] ND,AVX512BW,FUTURE */ + /* 240(f1 7d 48) 303 001(67) 110 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPACKUSWB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35698, 556, 5700}, +}; + +static const struct itemplate instrux_VPACKUSDW[10] = { + /* 0 : VPACKUSDW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 2b /r ] AVX,SANDYBRIDGE */ + /* 261(002 001) 001(2b) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPACKUSDW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60206, 433, 3404}, + /* 1 : VPACKUSDW xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f38 2b /r ] ND,AVX,SANDYBRIDGE */ + /* 260(002 001) 001(2b) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPACKUSDW, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60213, 433, 3404}, + /* 2 : VPACKUSDW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 2b /r ] AVX2,FUTURE */ + /* 261(002 005) 001(2b) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPACKUSDW, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63293, 467, 4096}, + /* 3 : VPACKUSDW ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f38 2b /r ] ND,AVX2,FUTURE */ + /* 260(002 005) 001(2b) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPACKUSDW, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63300, 467, 4096}, + /* 4 : VPACKUSDW xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 2b /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 7d 08) 301 001(2b) 120 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPACKUSDW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+35599, 549, 5695}, + /* 5 : VPACKUSDW xmmreg|mask|z,xmmrm128|b32 [r+vm:fv: evex.nds.128.66.0f38.w0 2b /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f2 7d 08) 301 001(2b) 110 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPACKUSDW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+35608, 549, 5695}, + /* 6 : VPACKUSDW ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 2b /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 7d 28) 301 001(2b) 120 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPACKUSDW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+35617, 549, 5696}, + /* 7 : VPACKUSDW ymmreg|mask|z,ymmrm256|b32 [r+vm:fv: evex.nds.256.66.0f38.w0 2b /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f2 7d 28) 301 001(2b) 110 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPACKUSDW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+35626, 549, 5696}, + /* 8 : VPACKUSDW zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f38.w0 2b /r ] AVX512BW,FUTURE */ + /* 241(f2 7d 48) 301 001(2b) 120 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPACKUSDW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+35635, 550, 5697}, + /* 9 : VPACKUSDW zmmreg|mask|z,zmmrm512|b32 [r+vm:fv: evex.nds.512.66.0f38.w0 2b /r ] ND,AVX512BW,FUTURE */ + /* 240(f2 7d 48) 301 001(2b) 110 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPACKUSDW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+35644, 550, 5697}, +}; + +static const struct itemplate instrux_VPADDB[10] = { + /* 0 : VPADDB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f fc /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(fc) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPADDB, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60220, 433, 3405}, + /* 1 : VPADDB xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f fc /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(fc) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPADDB, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60227, 433, 3405}, + /* 2 : VPADDB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f fc /r ] AVX2,FUTURE */ + /* 261(001 005) 001(fc) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPADDB, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63321, 467, 4098}, + /* 3 : VPADDB ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f fc /r ] ND,AVX2,FUTURE */ + /* 260(001 005) 001(fc) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPADDB, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63328, 467, 4098}, + /* 4 : VPADDB xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig fc /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 303 001(fc) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPADDB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35707, 555, 5701}, + /* 5 : VPADDB xmmreg|mask|z,xmmrm128 [r+vm:fvm: evex.nds.128.66.0f.wig fc /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 08) 303 001(fc) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPADDB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35716, 555, 5701}, + /* 6 : VPADDB ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig fc /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 303 001(fc) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPADDB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35725, 555, 5702}, + /* 7 : VPADDB ymmreg|mask|z,ymmrm256 [r+vm:fvm: evex.nds.256.66.0f.wig fc /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 28) 303 001(fc) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPADDB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35734, 555, 5702}, + /* 8 : VPADDB zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig fc /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 303 001(fc) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPADDB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35743, 556, 5703}, + /* 9 : VPADDB zmmreg|mask|z,zmmrm512 [r+vm:fvm: evex.nds.512.66.0f.wig fc /r ] ND,AVX512BW,FUTURE */ + /* 240(f1 7d 48) 303 001(fc) 110 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPADDB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35752, 556, 5703}, +}; + +static const struct itemplate instrux_VPADDW[10] = { + /* 0 : VPADDW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f fd /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(fd) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPADDW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60234, 433, 3406}, + /* 1 : VPADDW xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f fd /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(fd) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPADDW, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60241, 433, 3406}, + /* 2 : VPADDW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f fd /r ] AVX2,FUTURE */ + /* 261(001 005) 001(fd) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPADDW, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63335, 467, 4099}, + /* 3 : VPADDW ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f fd /r ] ND,AVX2,FUTURE */ + /* 260(001 005) 001(fd) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPADDW, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63342, 467, 4099}, + /* 4 : VPADDW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig fd /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 303 001(fd) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPADDW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36085, 555, 5722}, + /* 5 : VPADDW xmmreg|mask|z,xmmrm128 [r+vm:fvm: evex.nds.128.66.0f.wig fd /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 08) 303 001(fd) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPADDW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36094, 555, 5722}, + /* 6 : VPADDW ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig fd /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 303 001(fd) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPADDW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36103, 555, 5723}, + /* 7 : VPADDW ymmreg|mask|z,ymmrm256 [r+vm:fvm: evex.nds.256.66.0f.wig fd /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 28) 303 001(fd) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPADDW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36112, 555, 5723}, + /* 8 : VPADDW zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig fd /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 303 001(fd) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPADDW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36121, 556, 5724}, + /* 9 : VPADDW zmmreg|mask|z,zmmrm512 [r+vm:fvm: evex.nds.512.66.0f.wig fd /r ] ND,AVX512BW,FUTURE */ + /* 240(f1 7d 48) 303 001(fd) 110 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPADDW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36130, 556, 5724}, +}; + +static const struct itemplate instrux_VPADDD[10] = { + /* 0 : VPADDD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f fe /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(fe) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPADDD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60248, 433, 3407}, + /* 1 : VPADDD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f fe /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(fe) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPADDD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60255, 433, 3407}, + /* 2 : VPADDD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f fe /r ] AVX2,FUTURE */ + /* 261(001 005) 001(fe) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPADDD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63349, 467, 4100}, + /* 3 : VPADDD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f fe /r ] ND,AVX2,FUTURE */ + /* 260(001 005) 001(fe) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPADDD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63356, 467, 4100}, + /* 4 : VPADDD xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f.w0 fe /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7d 08) 301 001(fe) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPADDD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+35761, 543, 5704}, + /* 5 : VPADDD xmmreg|mask|z,xmmrm128|b32 [r+vm:fv: evex.nds.128.66.0f.w0 fe /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 7d 08) 301 001(fe) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPADDD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+35770, 543, 5704}, + /* 6 : VPADDD ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f.w0 fe /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7d 28) 301 001(fe) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPADDD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+35779, 543, 5705}, + /* 7 : VPADDD ymmreg|mask|z,ymmrm256|b32 [r+vm:fv: evex.nds.256.66.0f.w0 fe /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 7d 28) 301 001(fe) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPADDD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+35788, 543, 5705}, + /* 8 : VPADDD zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f.w0 fe /r ] AVX512,FUTURE */ + /* 241(f1 7d 48) 301 001(fe) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPADDD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+35797, 544, 5706}, + /* 9 : VPADDD zmmreg|mask|z,zmmrm512|b32 [r+vm:fv: evex.nds.512.66.0f.w0 fe /r ] ND,AVX512,FUTURE */ + /* 240(f1 7d 48) 301 001(fe) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPADDD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+35806, 544, 5706}, +}; + +static const struct itemplate instrux_VPADDQ[10] = { + /* 0 : VPADDQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f d4 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(d4) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPADDQ, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60262, 433, 3408}, + /* 1 : VPADDQ xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f d4 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(d4) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPADDQ, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60269, 433, 3408}, + /* 2 : VPADDQ ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f d4 /r ] AVX2,FUTURE */ + /* 261(001 005) 001(d4) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPADDQ, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63363, 467, 4101}, + /* 3 : VPADDQ ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f d4 /r ] ND,AVX2,FUTURE */ + /* 260(001 005) 001(d4) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPADDQ, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63370, 467, 4101}, + /* 4 : VPADDQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f.w1 d4 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(d4) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPADDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+35815, 543, 5707}, + /* 5 : VPADDQ xmmreg|mask|z,xmmrm128|b64 [r+vm:fv: evex.nds.128.66.0f.w1 d4 /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 fd 08) 301 001(d4) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPADDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+35824, 543, 5707}, + /* 6 : VPADDQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f.w1 d4 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(d4) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPADDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+35833, 543, 5708}, + /* 7 : VPADDQ ymmreg|mask|z,ymmrm256|b64 [r+vm:fv: evex.nds.256.66.0f.w1 d4 /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 fd 28) 301 001(d4) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPADDQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+35842, 543, 5708}, + /* 8 : VPADDQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f.w1 d4 /r ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(d4) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPADDQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+35851, 544, 5709}, + /* 9 : VPADDQ zmmreg|mask|z,zmmrm512|b64 [r+vm:fv: evex.nds.512.66.0f.w1 d4 /r ] ND,AVX512,FUTURE */ + /* 240(f1 fd 48) 301 001(d4) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPADDQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+35860, 544, 5709}, +}; + +static const struct itemplate instrux_VPADDSB[10] = { + /* 0 : VPADDSB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f ec /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(ec) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPADDSB, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60276, 433, 3409}, + /* 1 : VPADDSB xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f ec /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(ec) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPADDSB, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60283, 433, 3409}, + /* 2 : VPADDSB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f ec /r ] AVX2,FUTURE */ + /* 261(001 005) 001(ec) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPADDSB, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63377, 467, 4102}, + /* 3 : VPADDSB ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f ec /r ] ND,AVX2,FUTURE */ + /* 260(001 005) 001(ec) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPADDSB, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63384, 467, 4102}, + /* 4 : VPADDSB xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig ec /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 303 001(ec) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPADDSB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35869, 555, 5710}, + /* 5 : VPADDSB xmmreg|mask|z,xmmrm128 [r+vm:fvm: evex.nds.128.66.0f.wig ec /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 08) 303 001(ec) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPADDSB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35878, 555, 5710}, + /* 6 : VPADDSB ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig ec /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 303 001(ec) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPADDSB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35887, 555, 5711}, + /* 7 : VPADDSB ymmreg|mask|z,ymmrm256 [r+vm:fvm: evex.nds.256.66.0f.wig ec /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 28) 303 001(ec) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPADDSB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35896, 555, 5711}, + /* 8 : VPADDSB zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig ec /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 303 001(ec) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPADDSB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35905, 556, 5712}, + /* 9 : VPADDSB zmmreg|mask|z,zmmrm512 [r+vm:fvm: evex.nds.512.66.0f.wig ec /r ] ND,AVX512BW,FUTURE */ + /* 240(f1 7d 48) 303 001(ec) 110 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPADDSB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35914, 556, 5712}, +}; + +static const struct itemplate instrux_VPADDSW[10] = { + /* 0 : VPADDSW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f ed /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(ed) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPADDSW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60290, 433, 3410}, + /* 1 : VPADDSW xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f ed /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(ed) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPADDSW, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60297, 433, 3410}, + /* 2 : VPADDSW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f ed /r ] AVX2,FUTURE */ + /* 261(001 005) 001(ed) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPADDSW, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63391, 467, 4103}, + /* 3 : VPADDSW ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f ed /r ] ND,AVX2,FUTURE */ + /* 260(001 005) 001(ed) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPADDSW, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63398, 467, 4103}, + /* 4 : VPADDSW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig ed /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 303 001(ed) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPADDSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35923, 555, 5713}, + /* 5 : VPADDSW xmmreg|mask|z,xmmrm128 [r+vm:fvm: evex.nds.128.66.0f.wig ed /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 08) 303 001(ed) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPADDSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35932, 555, 5713}, + /* 6 : VPADDSW ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig ed /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 303 001(ed) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPADDSW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35941, 555, 5714}, + /* 7 : VPADDSW ymmreg|mask|z,ymmrm256 [r+vm:fvm: evex.nds.256.66.0f.wig ed /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 28) 303 001(ed) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPADDSW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35950, 555, 5714}, + /* 8 : VPADDSW zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig ed /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 303 001(ed) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPADDSW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35959, 556, 5715}, + /* 9 : VPADDSW zmmreg|mask|z,zmmrm512 [r+vm:fvm: evex.nds.512.66.0f.wig ed /r ] ND,AVX512BW,FUTURE */ + /* 240(f1 7d 48) 303 001(ed) 110 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPADDSW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35968, 556, 5715}, +}; + +static const struct itemplate instrux_VPADDUSB[10] = { + /* 0 : VPADDUSB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f dc /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(dc) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPADDUSB, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60304, 433, 3411}, + /* 1 : VPADDUSB xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f dc /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(dc) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPADDUSB, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60311, 433, 3411}, + /* 2 : VPADDUSB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f dc /r ] AVX2,FUTURE */ + /* 261(001 005) 001(dc) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPADDUSB, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63405, 467, 4104}, + /* 3 : VPADDUSB ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f dc /r ] ND,AVX2,FUTURE */ + /* 260(001 005) 001(dc) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPADDUSB, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63412, 467, 4104}, + /* 4 : VPADDUSB xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig dc /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 303 001(dc) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPADDUSB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35977, 555, 5716}, + /* 5 : VPADDUSB xmmreg|mask|z,xmmrm128 [r+vm:fvm: evex.nds.128.66.0f.wig dc /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 08) 303 001(dc) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPADDUSB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35986, 555, 5716}, + /* 6 : VPADDUSB ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig dc /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 303 001(dc) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPADDUSB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35995, 555, 5717}, + /* 7 : VPADDUSB ymmreg|mask|z,ymmrm256 [r+vm:fvm: evex.nds.256.66.0f.wig dc /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 28) 303 001(dc) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPADDUSB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36004, 555, 5717}, + /* 8 : VPADDUSB zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig dc /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 303 001(dc) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPADDUSB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36013, 556, 5718}, + /* 9 : VPADDUSB zmmreg|mask|z,zmmrm512 [r+vm:fvm: evex.nds.512.66.0f.wig dc /r ] ND,AVX512BW,FUTURE */ + /* 240(f1 7d 48) 303 001(dc) 110 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPADDUSB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36022, 556, 5718}, +}; + +static const struct itemplate instrux_VPADDUSW[10] = { + /* 0 : VPADDUSW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f dd /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(dd) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPADDUSW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60318, 433, 3412}, + /* 1 : VPADDUSW xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f dd /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(dd) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPADDUSW, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60325, 433, 3412}, + /* 2 : VPADDUSW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f dd /r ] AVX2,FUTURE */ + /* 261(001 005) 001(dd) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPADDUSW, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63419, 467, 4105}, + /* 3 : VPADDUSW ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f dd /r ] ND,AVX2,FUTURE */ + /* 260(001 005) 001(dd) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPADDUSW, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63426, 467, 4105}, + /* 4 : VPADDUSW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig dd /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 303 001(dd) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPADDUSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36031, 555, 5719}, + /* 5 : VPADDUSW xmmreg|mask|z,xmmrm128 [r+vm:fvm: evex.nds.128.66.0f.wig dd /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 08) 303 001(dd) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPADDUSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36040, 555, 5719}, + /* 6 : VPADDUSW ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig dd /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 303 001(dd) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPADDUSW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36049, 555, 5720}, + /* 7 : VPADDUSW ymmreg|mask|z,ymmrm256 [r+vm:fvm: evex.nds.256.66.0f.wig dd /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 28) 303 001(dd) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPADDUSW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36058, 555, 5720}, + /* 8 : VPADDUSW zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig dd /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 303 001(dd) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPADDUSW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36067, 556, 5721}, + /* 9 : VPADDUSW zmmreg|mask|z,zmmrm512 [r+vm:fvm: evex.nds.512.66.0f.wig dd /r ] ND,AVX512BW,FUTURE */ + /* 240(f1 7d 48) 303 001(dd) 110 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPADDUSW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36076, 556, 5721}, +}; + +static const struct itemplate instrux_VPALIGNR[10] = { + /* 0 : VPALIGNR xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: vex.nds.128.66.0f3a 0f /r ib ] AVX,SANDYBRIDGE */ + /* 261(003 001) 001(0f) 120 023 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPALIGNR, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+52083, 433, 3413}, + /* 1 : VPALIGNR xmmreg,xmmrm128,imm8 [r+vmi: vex.nds.128.66.0f3a 0f /r ib ] ND,AVX,SANDYBRIDGE */ + /* 260(003 001) 001(0f) 110 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPALIGNR, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52091, 433, 3413}, + /* 2 : VPALIGNR ymmreg,ymmreg*,ymmrm256,imm8 [rvmi: vex.nds.256.66.0f3a 0f /r ib ] AVX2,FUTURE */ + /* 261(003 005) 001(0f) 120 023 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPALIGNR, 4, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+54259, 467, 4106}, + /* 3 : VPALIGNR ymmreg,ymmrm256,imm8 [r+vmi: vex.nds.256.66.0f3a 0f /r ib ] ND,AVX2,FUTURE */ + /* 260(003 005) 001(0f) 110 022 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPALIGNR, 3, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54267, 467, 4106}, + /* 4 : VPALIGNR xmmreg|mask|z,xmmreg*,xmmrm128,imm8 [rvmi:fvm: evex.nds.128.66.0f3a.wig 0f /r ib ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 08) 303 001(0f) 120 023 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPALIGNR, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19453, 555, 5725}, + /* 5 : VPALIGNR xmmreg|mask|z,xmmrm128,imm8 [r+vmi:fvm: evex.nds.128.66.0f3a.wig 0f /r ib ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f3 7d 08) 303 001(0f) 110 022 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPALIGNR, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19463, 555, 5725}, + /* 6 : VPALIGNR ymmreg|mask|z,ymmreg*,ymmrm256,imm8 [rvmi:fvm: evex.nds.256.66.0f3a.wig 0f /r ib ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 28) 303 001(0f) 120 023 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPALIGNR, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19473, 555, 5726}, + /* 7 : VPALIGNR ymmreg|mask|z,ymmrm256,imm8 [r+vmi:fvm: evex.nds.256.66.0f3a.wig 0f /r ib ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f3 7d 28) 303 001(0f) 110 022 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPALIGNR, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19483, 555, 5726}, + /* 8 : VPALIGNR zmmreg|mask|z,zmmreg*,zmmrm512,imm8 [rvmi:fvm: evex.nds.512.66.0f3a.wig 0f /r ib ] AVX512BW,FUTURE */ + /* 241(f3 7d 48) 303 001(0f) 120 023 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPALIGNR, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19493, 556, 5727}, + /* 9 : VPALIGNR zmmreg|mask|z,zmmrm512,imm8 [r+vmi:fvm: evex.nds.512.66.0f3a.wig 0f /r ib ] ND,AVX512BW,FUTURE */ + /* 240(f3 7d 48) 303 001(0f) 110 022 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPALIGNR, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19503, 556, 5727}, +}; + +static const struct itemplate instrux_VPAND[4] = { + /* 0 : VPAND xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f db /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(db) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPAND, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60332, 433, 3414}, + /* 1 : VPAND xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f db /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(db) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPAND, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60339, 433, 3414}, + /* 2 : VPAND ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f db /r ] AVX2,FUTURE */ + /* 261(001 005) 001(db) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPAND, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63433, 467, 4107}, + /* 3 : VPAND ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f db /r ] ND,AVX2,FUTURE */ + /* 260(001 005) 001(db) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPAND, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63440, 467, 4107}, +}; + +static const struct itemplate instrux_VPANDN[4] = { + /* 0 : VPANDN xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f df /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(df) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPANDN, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60346, 433, 3415}, + /* 1 : VPANDN xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f df /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(df) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPANDN, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60353, 433, 3415}, + /* 2 : VPANDN ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f df /r ] AVX2,FUTURE */ + /* 261(001 005) 001(df) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPANDN, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63447, 467, 4108}, + /* 3 : VPANDN ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f df /r ] ND,AVX2,FUTURE */ + /* 260(001 005) 001(df) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPANDN, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63454, 467, 4108}, +}; + +static const struct itemplate instrux_VPAVGB[10] = { + /* 0 : VPAVGB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f e0 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(e0) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPAVGB, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60360, 433, 3416}, + /* 1 : VPAVGB xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f e0 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(e0) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPAVGB, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60367, 433, 3416}, + /* 2 : VPAVGB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f e0 /r ] AVX2,FUTURE */ + /* 261(001 005) 001(e0) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPAVGB, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63461, 467, 4109}, + /* 3 : VPAVGB ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f e0 /r ] ND,AVX2,FUTURE */ + /* 260(001 005) 001(e0) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPAVGB, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63468, 467, 4109}, + /* 4 : VPAVGB xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig e0 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 303 001(e0) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPAVGB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36355, 555, 5740}, + /* 5 : VPAVGB xmmreg|mask|z,xmmrm128 [r+vm:fvm: evex.nds.128.66.0f.wig e0 /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 08) 303 001(e0) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPAVGB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36364, 555, 5740}, + /* 6 : VPAVGB ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig e0 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 303 001(e0) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPAVGB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36373, 555, 5741}, + /* 7 : VPAVGB ymmreg|mask|z,ymmrm256 [r+vm:fvm: evex.nds.256.66.0f.wig e0 /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 28) 303 001(e0) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPAVGB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36382, 555, 5741}, + /* 8 : VPAVGB zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig e0 /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 303 001(e0) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPAVGB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36391, 556, 5742}, + /* 9 : VPAVGB zmmreg|mask|z,zmmrm512 [r+vm:fvm: evex.nds.512.66.0f.wig e0 /r ] ND,AVX512BW,FUTURE */ + /* 240(f1 7d 48) 303 001(e0) 110 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPAVGB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36400, 556, 5742}, +}; + +static const struct itemplate instrux_VPAVGW[10] = { + /* 0 : VPAVGW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f e3 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(e3) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPAVGW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60374, 433, 3417}, + /* 1 : VPAVGW xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f e3 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(e3) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPAVGW, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60381, 433, 3417}, + /* 2 : VPAVGW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f e3 /r ] AVX2,FUTURE */ + /* 261(001 005) 001(e3) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPAVGW, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63475, 467, 4110}, + /* 3 : VPAVGW ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f e3 /r ] ND,AVX2,FUTURE */ + /* 260(001 005) 001(e3) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPAVGW, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63482, 467, 4110}, + /* 4 : VPAVGW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig e3 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 303 001(e3) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPAVGW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36409, 555, 5743}, + /* 5 : VPAVGW xmmreg|mask|z,xmmrm128 [r+vm:fvm: evex.nds.128.66.0f.wig e3 /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 08) 303 001(e3) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPAVGW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36418, 555, 5743}, + /* 6 : VPAVGW ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig e3 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 303 001(e3) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPAVGW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36427, 555, 5744}, + /* 7 : VPAVGW ymmreg|mask|z,ymmrm256 [r+vm:fvm: evex.nds.256.66.0f.wig e3 /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 28) 303 001(e3) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPAVGW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36436, 555, 5744}, + /* 8 : VPAVGW zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig e3 /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 303 001(e3) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPAVGW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36445, 556, 5745}, + /* 9 : VPAVGW zmmreg|mask|z,zmmrm512 [r+vm:fvm: evex.nds.512.66.0f.wig e3 /r ] ND,AVX512BW,FUTURE */ + /* 240(f1 7d 48) 303 001(e3) 110 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPAVGW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36454, 556, 5745}, +}; + +static const struct itemplate instrux_VPBLENDVB[4] = { + /* 0 : VPBLENDVB xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: vex.nds.128.66.0f3a.w0 4c /r /is4 ] AVX,SANDYBRIDGE */ + /* 261(003 001) 001(4c) 120 177 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VPBLENDVB, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+52099, 441, 3418}, + /* 1 : VPBLENDVB xmmreg,xmmrm128,xmmreg [r+vms: vex.nds.128.66.0f3a.w0 4c /r /is4 ] ND,AVX,SANDYBRIDGE */ + /* 260(003 001) 001(4c) 110 176 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VPBLENDVB, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+52107, 441, 3418}, + /* 2 : VPBLENDVB ymmreg,ymmreg*,ymmrm256,ymmreg [rvms: vex.nds.256.66.0f3a 4c /r /is4 ] AVX2,FUTURE */ + /* 261(003 005) 001(4c) 120 177 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPBLENDVB, 4, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,YMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+54275, 467, 4111}, + /* 3 : VPBLENDVB ymmreg,ymmrm256,ymmreg [r+vms: vex.nds.256.66.0f3a 4c /r /is4 ] ND,AVX2,FUTURE */ + /* 260(003 005) 001(4c) 110 176 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPBLENDVB, 3, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,YMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+54283, 467, 4111}, +}; + +static const struct itemplate instrux_VPBLENDW[4] = { + /* 0 : VPBLENDW xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: vex.nds.128.66.0f3a 0e /r ib ] AVX,SANDYBRIDGE */ + /* 261(003 001) 001(0e) 120 023 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPBLENDW, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+52115, 433, 3419}, + /* 1 : VPBLENDW xmmreg,xmmrm128,imm8 [r+vmi: vex.nds.128.66.0f3a 0e /r ib ] ND,AVX,SANDYBRIDGE */ + /* 260(003 001) 001(0e) 110 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPBLENDW, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52123, 433, 3419}, + /* 2 : VPBLENDW ymmreg,ymmreg*,ymmrm256,imm8 [rvmi: vex.nds.256.66.0f3a 0e /r ib ] AVX2,FUTURE */ + /* 261(003 005) 001(0e) 120 023 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPBLENDW, 4, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+54291, 467, 4112}, + /* 3 : VPBLENDW ymmreg,ymmrm256,imm8 [r+vmi: vex.nds.256.66.0f3a 0e /r ib ] ND,AVX2,FUTURE */ + /* 260(003 005) 001(0e) 110 022 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPBLENDW, 3, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54299, 467, 4112}, +}; + +static const struct itemplate instrux_VPCMPESTRI[1] = { + /* 0 : VPCMPESTRI xmmreg,xmmrm128,imm8 [rmi: vex.128.66.0f3a 61 /r ib ] AVX,SANDYBRIDGE */ + /* 270(003 001) 001(61) 110 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPCMPESTRI, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52131, 433, 3420}, +}; + +static const struct itemplate instrux_VPCMPESTRM[1] = { + /* 0 : VPCMPESTRM xmmreg,xmmrm128,imm8 [rmi: vex.128.66.0f3a 60 /r ib ] AVX,SANDYBRIDGE */ + /* 270(003 001) 001(60) 110 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPCMPESTRM, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52139, 433, 3421}, +}; + +static const struct itemplate instrux_VPCMPISTRI[1] = { + /* 0 : VPCMPISTRI xmmreg,xmmrm128,imm8 [rmi: vex.128.66.0f3a 63 /r ib ] AVX,SANDYBRIDGE */ + /* 270(003 001) 001(63) 110 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPCMPISTRI, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52147, 433, 3422}, +}; + +static const struct itemplate instrux_VPCMPISTRM[1] = { + /* 0 : VPCMPISTRM xmmreg,xmmrm128,imm8 [rmi: vex.128.66.0f3a 62 /r ib ] AVX,SANDYBRIDGE */ + /* 270(003 001) 001(62) 110 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPCMPISTRM, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52155, 433, 3423}, +}; + +static const struct itemplate instrux_VPCMPEQB[10] = { + /* 0 : VPCMPEQB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 74 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(74) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPCMPEQB, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60388, 433, 3424}, + /* 1 : VPCMPEQB xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f 74 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(74) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPCMPEQB, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60395, 433, 3424}, + /* 2 : VPCMPEQB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 74 /r ] AVX2,FUTURE */ + /* 261(001 005) 001(74) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPCMPEQB, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63489, 467, 4113}, + /* 3 : VPCMPEQB ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f 74 /r ] ND,AVX2,FUTURE */ + /* 260(001 005) 001(74) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPCMPEQB, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63496, 467, 4113}, + /* 4 : VPCMPEQB kreg|mask,xmmreg,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig 74 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 303 001(74) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPEQB, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+36895, 555, 5811}, + /* 5 : VPCMPEQB kreg|mask,ymmreg,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig 74 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 303 001(74) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPEQB, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+36904, 555, 5812}, + /* 6 : VPCMPEQB kreg|mask,zmmreg,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig 74 /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 303 001(74) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPEQB, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+36913, 556, 5813}, + /* 7 : VPCMPEQB kreg|mask,xmmreg,xmmrm128 [rvmi:fvm: evex.nds.128.66.0f3a.w0 3f /r 00 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 08) 303 001(3f) 120 001(00) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPEQB, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+7559, 549, 5836}, + /* 8 : VPCMPEQB kreg|mask,ymmreg,ymmrm256 [rvmi:fvm: evex.nds.256.66.0f3a.w0 3f /r 00 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 28) 303 001(3f) 120 001(00) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPEQB, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+7570, 549, 5837}, + /* 9 : VPCMPEQB kreg|mask,zmmreg,zmmrm512 [rvmi:fvm: evex.nds.512.66.0f3a.w0 3f /r 00 ] AVX512BW,FUTURE */ + /* 241(f3 7d 48) 303 001(3f) 120 001(00) : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPEQB, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+7581, 550, 5838}, +}; + +static const struct itemplate instrux_VPCMPEQW[10] = { + /* 0 : VPCMPEQW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 75 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(75) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPCMPEQW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60402, 433, 3425}, + /* 1 : VPCMPEQW xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f 75 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(75) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPCMPEQW, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60409, 433, 3425}, + /* 2 : VPCMPEQW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 75 /r ] AVX2,FUTURE */ + /* 261(001 005) 001(75) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPCMPEQW, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63503, 467, 4114}, + /* 3 : VPCMPEQW ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f 75 /r ] ND,AVX2,FUTURE */ + /* 260(001 005) 001(75) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPCMPEQW, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63510, 467, 4114}, + /* 4 : VPCMPEQW kreg|mask,xmmreg,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig 75 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 303 001(75) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPEQW, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+36976, 555, 5820}, + /* 5 : VPCMPEQW kreg|mask,ymmreg,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig 75 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 303 001(75) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPEQW, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+36985, 555, 5821}, + /* 6 : VPCMPEQW kreg|mask,zmmreg,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig 75 /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 303 001(75) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPEQW, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+36994, 556, 5822}, + /* 7 : VPCMPEQW kreg|mask,xmmreg,xmmrm128 [rvmi:fvm: evex.nds.128.66.0f3a.w1 3f /r 00 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 08) 303 001(3f) 120 001(00) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPEQW, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+7790, 549, 5857}, + /* 8 : VPCMPEQW kreg|mask,ymmreg,ymmrm256 [rvmi:fvm: evex.nds.256.66.0f3a.w1 3f /r 00 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 28) 303 001(3f) 120 001(00) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPEQW, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+7801, 549, 5858}, + /* 9 : VPCMPEQW kreg|mask,zmmreg,zmmrm512 [rvmi:fvm: evex.nds.512.66.0f3a.w1 3f /r 00 ] AVX512BW,FUTURE */ + /* 241(f3 fd 48) 303 001(3f) 120 001(00) : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPEQW, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+7812, 550, 5859}, +}; + +static const struct itemplate instrux_VPCMPEQD[10] = { + /* 0 : VPCMPEQD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 76 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(76) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPCMPEQD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60416, 433, 3426}, + /* 1 : VPCMPEQD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f 76 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(76) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPCMPEQD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60423, 433, 3426}, + /* 2 : VPCMPEQD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 76 /r ] AVX2,FUTURE */ + /* 261(001 005) 001(76) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPCMPEQD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63517, 467, 4115}, + /* 3 : VPCMPEQD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f 76 /r ] ND,AVX2,FUTURE */ + /* 260(001 005) 001(76) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPCMPEQD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63524, 467, 4115}, + /* 4 : VPCMPEQD kreg|mask,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f.w0 76 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7d 08) 301 001(76) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPEQD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+36922, 543, 5814}, + /* 5 : VPCMPEQD kreg|mask,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f.w0 76 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7d 28) 301 001(76) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPEQD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+36931, 543, 5815}, + /* 6 : VPCMPEQD kreg|mask,zmmreg,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f.w0 76 /r ] AVX512,FUTURE */ + /* 241(f1 7d 48) 301 001(76) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPEQD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+36940, 544, 5816}, + /* 7 : VPCMPEQD kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.66.0f3a.w0 1f /r 00 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 08) 301 001(1f) 120 001(00) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPEQD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+7592, 543, 5839}, + /* 8 : VPCMPEQD kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.66.0f3a.w0 1f /r 00 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 28) 301 001(1f) 120 001(00) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPEQD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+7603, 543, 5840}, + /* 9 : VPCMPEQD kreg|mask,zmmreg,zmmrm512|b32 [rvmi:fv: evex.nds.512.66.0f3a.w0 1f /r 00 ] AVX512,FUTURE */ + /* 241(f3 7d 48) 301 001(1f) 120 001(00) : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPEQD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+7614, 544, 5841}, +}; + +static const struct itemplate instrux_VPCMPEQQ[10] = { + /* 0 : VPCMPEQQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 29 /r ] AVX,SANDYBRIDGE */ + /* 261(002 001) 001(29) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPCMPEQQ, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60430, 433, 3427}, + /* 1 : VPCMPEQQ xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f38 29 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(002 001) 001(29) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPCMPEQQ, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60437, 433, 3427}, + /* 2 : VPCMPEQQ ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 29 /r ] AVX2,FUTURE */ + /* 261(002 005) 001(29) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPCMPEQQ, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63531, 467, 4116}, + /* 3 : VPCMPEQQ ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f38 29 /r ] ND,AVX2,FUTURE */ + /* 260(002 005) 001(29) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPCMPEQQ, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63538, 467, 4116}, + /* 4 : VPCMPEQQ kreg|mask,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 29 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(29) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPEQQ, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+36949, 543, 5817}, + /* 5 : VPCMPEQQ kreg|mask,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 29 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(29) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPEQQ, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+36958, 543, 5818}, + /* 6 : VPCMPEQQ kreg|mask,zmmreg,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 29 /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(29) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPEQQ, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+36967, 544, 5819}, + /* 7 : VPCMPEQQ kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f3a.w1 1f /r 00 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 08) 301 001(1f) 120 001(00) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPEQQ, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+7625, 543, 5842}, + /* 8 : VPCMPEQQ kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f3a.w1 1f /r 00 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 28) 301 001(1f) 120 001(00) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPEQQ, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+7636, 543, 5843}, + /* 9 : VPCMPEQQ kreg|mask,zmmreg,zmmrm512|b64 [rvmi:fv: evex.nds.512.66.0f3a.w1 1f /r 00 ] AVX512,FUTURE */ + /* 241(f3 fd 48) 301 001(1f) 120 001(00) : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPEQQ, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+7647, 544, 5844}, +}; + +static const struct itemplate instrux_VPCMPGTB[10] = { + /* 0 : VPCMPGTB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 64 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(64) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPCMPGTB, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60444, 433, 3428}, + /* 1 : VPCMPGTB xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f 64 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(64) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPCMPGTB, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60451, 433, 3428}, + /* 2 : VPCMPGTB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 64 /r ] AVX2,FUTURE */ + /* 261(001 005) 001(64) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPCMPGTB, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63545, 467, 4117}, + /* 3 : VPCMPGTB ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f 64 /r ] ND,AVX2,FUTURE */ + /* 260(001 005) 001(64) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPCMPGTB, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63552, 467, 4117}, + /* 4 : VPCMPGTB kreg|mask,xmmreg,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig 64 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 303 001(64) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPGTB, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+37003, 555, 5823}, + /* 5 : VPCMPGTB kreg|mask,ymmreg,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig 64 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 303 001(64) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPGTB, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+37012, 555, 5824}, + /* 6 : VPCMPGTB kreg|mask,zmmreg,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig 64 /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 303 001(64) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPGTB, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+37021, 556, 5825}, + /* 7 : VPCMPGTB kreg|mask,xmmreg,xmmrm128 [rvmi:fvm: evex.nds.128.66.0f3a.w0 3f /r 06 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 08) 303 001(3f) 120 001(06) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPGTB, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8087, 549, 5884}, + /* 8 : VPCMPGTB kreg|mask,ymmreg,ymmrm256 [rvmi:fvm: evex.nds.256.66.0f3a.w0 3f /r 06 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 28) 303 001(3f) 120 001(06) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPGTB, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8098, 549, 5885}, + /* 9 : VPCMPGTB kreg|mask,zmmreg,zmmrm512 [rvmi:fvm: evex.nds.512.66.0f3a.w0 3f /r 06 ] AVX512BW,FUTURE */ + /* 241(f3 7d 48) 303 001(3f) 120 001(06) : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPGTB, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8109, 550, 5886}, +}; + +static const struct itemplate instrux_VPCMPGTW[10] = { + /* 0 : VPCMPGTW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 65 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(65) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPCMPGTW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60458, 433, 3429}, + /* 1 : VPCMPGTW xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f 65 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(65) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPCMPGTW, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60465, 433, 3429}, + /* 2 : VPCMPGTW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 65 /r ] AVX2,FUTURE */ + /* 261(001 005) 001(65) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPCMPGTW, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63559, 467, 4118}, + /* 3 : VPCMPGTW ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f 65 /r ] ND,AVX2,FUTURE */ + /* 260(001 005) 001(65) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPCMPGTW, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63566, 467, 4118}, + /* 4 : VPCMPGTW kreg|mask,xmmreg,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig 65 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 303 001(65) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPGTW, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+37084, 555, 5832}, + /* 5 : VPCMPGTW kreg|mask,ymmreg,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig 65 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 303 001(65) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPGTW, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+37093, 555, 5833}, + /* 6 : VPCMPGTW kreg|mask,zmmreg,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig 65 /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 303 001(65) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPGTW, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+37102, 556, 5834}, + /* 7 : VPCMPGTW kreg|mask,xmmreg,xmmrm128 [rvmi:fvm: evex.nds.128.66.0f3a.w1 3f /r 06 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 08) 303 001(3f) 120 001(06) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPGTW, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8318, 549, 5905}, + /* 8 : VPCMPGTW kreg|mask,ymmreg,ymmrm256 [rvmi:fvm: evex.nds.256.66.0f3a.w1 3f /r 06 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 28) 303 001(3f) 120 001(06) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPGTW, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8329, 549, 5906}, + /* 9 : VPCMPGTW kreg|mask,zmmreg,zmmrm512 [rvmi:fvm: evex.nds.512.66.0f3a.w1 3f /r 06 ] AVX512BW,FUTURE */ + /* 241(f3 fd 48) 303 001(3f) 120 001(06) : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPGTW, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8340, 550, 5907}, +}; + +static const struct itemplate instrux_VPCMPGTD[10] = { + /* 0 : VPCMPGTD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 66 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(66) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPCMPGTD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60472, 433, 3430}, + /* 1 : VPCMPGTD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f 66 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(66) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPCMPGTD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60479, 433, 3430}, + /* 2 : VPCMPGTD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 66 /r ] AVX2,FUTURE */ + /* 261(001 005) 001(66) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPCMPGTD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63573, 467, 4119}, + /* 3 : VPCMPGTD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f 66 /r ] ND,AVX2,FUTURE */ + /* 260(001 005) 001(66) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPCMPGTD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63580, 467, 4119}, + /* 4 : VPCMPGTD kreg|mask,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f.w0 66 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7d 08) 301 001(66) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPGTD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+37030, 543, 5826}, + /* 5 : VPCMPGTD kreg|mask,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f.w0 66 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7d 28) 301 001(66) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPGTD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+37039, 543, 5827}, + /* 6 : VPCMPGTD kreg|mask,zmmreg,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f.w0 66 /r ] AVX512,FUTURE */ + /* 241(f1 7d 48) 301 001(66) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPGTD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+37048, 544, 5828}, + /* 7 : VPCMPGTD kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.66.0f3a.w0 1f /r 06 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 08) 301 001(1f) 120 001(06) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPGTD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+8120, 543, 5887}, + /* 8 : VPCMPGTD kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.66.0f3a.w0 1f /r 06 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 28) 301 001(1f) 120 001(06) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPGTD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+8131, 543, 5888}, + /* 9 : VPCMPGTD kreg|mask,zmmreg,zmmrm512|b32 [rvmi:fv: evex.nds.512.66.0f3a.w0 1f /r 06 ] AVX512,FUTURE */ + /* 241(f3 7d 48) 301 001(1f) 120 001(06) : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPGTD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+8142, 544, 5889}, +}; + +static const struct itemplate instrux_VPCMPGTQ[10] = { + /* 0 : VPCMPGTQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 37 /r ] AVX,SANDYBRIDGE */ + /* 261(002 001) 001(37) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPCMPGTQ, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60486, 433, 3431}, + /* 1 : VPCMPGTQ xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f38 37 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(002 001) 001(37) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPCMPGTQ, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60493, 433, 3431}, + /* 2 : VPCMPGTQ ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 37 /r ] AVX2,FUTURE */ + /* 261(002 005) 001(37) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPCMPGTQ, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63587, 467, 4120}, + /* 3 : VPCMPGTQ ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f38 37 /r ] ND,AVX2,FUTURE */ + /* 260(002 005) 001(37) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPCMPGTQ, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63594, 467, 4120}, + /* 4 : VPCMPGTQ kreg|mask,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 37 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(37) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPGTQ, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+37057, 543, 5829}, + /* 5 : VPCMPGTQ kreg|mask,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 37 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(37) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPGTQ, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+37066, 543, 5830}, + /* 6 : VPCMPGTQ kreg|mask,zmmreg,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 37 /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(37) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPGTQ, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+37075, 544, 5831}, + /* 7 : VPCMPGTQ kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f3a.w1 1f /r 06 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 08) 301 001(1f) 120 001(06) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPGTQ, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8153, 543, 5890}, + /* 8 : VPCMPGTQ kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f3a.w1 1f /r 06 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 28) 301 001(1f) 120 001(06) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPGTQ, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8164, 543, 5891}, + /* 9 : VPCMPGTQ kreg|mask,zmmreg,zmmrm512|b64 [rvmi:fv: evex.nds.512.66.0f3a.w1 1f /r 06 ] AVX512,FUTURE */ + /* 241(f3 fd 48) 301 001(1f) 120 001(06) : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPGTQ, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8175, 544, 5892}, +}; + +static const struct itemplate instrux_VPERMILPD[15] = { + /* 0 : VPERMILPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38.w0 0d /r ] AVX,SANDYBRIDGE */ + /* 261(002 001) 001(0d) 120 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VPERMILPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60500, 441, 3432}, + /* 1 : VPERMILPD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f38.w0 0d /r ] ND,AVX,SANDYBRIDGE */ + /* 260(002 001) 001(0d) 110 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VPERMILPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60507, 441, 3432}, + /* 2 : VPERMILPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38.w0 0d /r ] AVX,SANDYBRIDGE */ + /* 261(002 005) 001(0d) 120 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VPERMILPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60514, 441, 3433}, + /* 3 : VPERMILPD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f38.w0 0d /r ] ND,AVX,SANDYBRIDGE */ + /* 260(002 005) 001(0d) 110 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VPERMILPD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60521, 441, 3433}, + /* 4 : VPERMILPD xmmreg,xmmrm128,imm8 [rmi: vex.128.66.0f3a.w0 05 /r ib ] AVX,SANDYBRIDGE */ + /* 270(003 001) 001(05) 110 022 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VPERMILPD, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52163, 441, 3434}, + /* 5 : VPERMILPD ymmreg,ymmrm256,imm8 [rmi: vex.256.66.0f3a.w0 05 /r ib ] AVX,SANDYBRIDGE */ + /* 270(003 005) 001(05) 110 022 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VPERMILPD, 3, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52171, 441, 3435}, + /* 6 : VPERMILPD xmmreg|mask|z,xmmrm128|b64,imm8 [rmi:fv: evex.128.66.0f3a.w1 05 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 250(f3 fd 08) 301 001(05) 110 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPERMILPD, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+19753, 543, 6117}, + /* 7 : VPERMILPD ymmreg|mask|z,ymmrm256|b64,imm8 [rmi:fv: evex.256.66.0f3a.w1 05 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 250(f3 fd 28) 301 001(05) 110 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPERMILPD, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+19763, 543, 6118}, + /* 8 : VPERMILPD zmmreg|mask|z,zmmrm512|b64,imm8 [rmi:fv: evex.512.66.0f3a.w1 05 /r ib ] AVX512,FUTURE */ + /* 250(f3 fd 48) 301 001(05) 110 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VPERMILPD, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+19773, 544, 6119}, + /* 9 : VPERMILPD xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 0d /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(0d) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPERMILPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+37525, 543, 6120}, + /* 10 : VPERMILPD xmmreg|mask|z,xmmrm128|b64 [r+vm:fv: evex.nds.128.66.0f38.w1 0d /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f2 fd 08) 301 001(0d) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPERMILPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+37534, 543, 6120}, + /* 11 : VPERMILPD ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 0d /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(0d) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPERMILPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+37543, 543, 6121}, + /* 12 : VPERMILPD ymmreg|mask|z,ymmrm256|b64 [r+vm:fv: evex.nds.256.66.0f38.w1 0d /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f2 fd 28) 301 001(0d) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPERMILPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+37552, 543, 6121}, + /* 13 : VPERMILPD zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 0d /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(0d) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPERMILPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+37561, 544, 6122}, + /* 14 : VPERMILPD zmmreg|mask|z,zmmrm512|b64 [r+vm:fv: evex.nds.512.66.0f38.w1 0d /r ] ND,AVX512,FUTURE */ + /* 240(f2 fd 48) 301 001(0d) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPERMILPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+37570, 544, 6122}, +}; + +static const struct itemplate instrux_VPERMILPS[15] = { + /* 0 : VPERMILPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38.w0 0c /r ] AVX,SANDYBRIDGE */ + /* 261(002 001) 001(0c) 120 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VPERMILPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60528, 441, 3436}, + /* 1 : VPERMILPS xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f38.w0 0c /r ] ND,AVX,SANDYBRIDGE */ + /* 260(002 001) 001(0c) 110 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VPERMILPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60535, 441, 3436}, + /* 2 : VPERMILPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38.w0 0c /r ] AVX,SANDYBRIDGE */ + /* 261(002 005) 001(0c) 120 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VPERMILPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60542, 441, 3437}, + /* 3 : VPERMILPS ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f38.w0 0c /r ] ND,AVX,SANDYBRIDGE */ + /* 260(002 005) 001(0c) 110 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VPERMILPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60549, 441, 3437}, + /* 4 : VPERMILPS xmmreg,xmmrm128,imm8 [rmi: vex.128.66.0f3a.w0 04 /r ib ] AVX,SANDYBRIDGE */ + /* 270(003 001) 001(04) 110 022 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VPERMILPS, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52179, 441, 3438}, + /* 5 : VPERMILPS ymmreg,ymmrm256,imm8 [rmi: vex.256.66.0f3a.w0 04 /r ib ] AVX,SANDYBRIDGE */ + /* 270(003 005) 001(04) 110 022 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VPERMILPS, 3, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52187, 441, 3439}, + /* 6 : VPERMILPS xmmreg|mask|z,xmmrm128|b32,imm8 [rmi:fv: evex.128.66.0f3a.w0 04 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 250(f3 7d 08) 301 001(04) 110 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPERMILPS, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+19783, 543, 6123}, + /* 7 : VPERMILPS ymmreg|mask|z,ymmrm256|b32,imm8 [rmi:fv: evex.256.66.0f3a.w0 04 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 250(f3 7d 28) 301 001(04) 110 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPERMILPS, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+19793, 543, 6124}, + /* 8 : VPERMILPS zmmreg|mask|z,zmmrm512|b32,imm8 [rmi:fv: evex.512.66.0f3a.w0 04 /r ib ] AVX512,FUTURE */ + /* 250(f3 7d 48) 301 001(04) 110 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VPERMILPS, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+19803, 544, 6125}, + /* 9 : VPERMILPS xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 0c /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(0c) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPERMILPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+37579, 543, 6126}, + /* 10 : VPERMILPS xmmreg|mask|z,xmmrm128|b32 [r+vm:fv: evex.nds.128.66.0f38.w0 0c /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f2 7d 08) 301 001(0c) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPERMILPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+37588, 543, 6126}, + /* 11 : VPERMILPS ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 0c /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(0c) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPERMILPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+37597, 543, 6127}, + /* 12 : VPERMILPS ymmreg|mask|z,ymmrm256|b32 [r+vm:fv: evex.nds.256.66.0f38.w0 0c /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f2 7d 28) 301 001(0c) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPERMILPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+37606, 543, 6127}, + /* 13 : VPERMILPS zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f38.w0 0c /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(0c) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPERMILPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+37615, 544, 6128}, + /* 14 : VPERMILPS zmmreg|mask|z,zmmrm512|b32 [r+vm:fv: evex.nds.512.66.0f38.w0 0c /r ] ND,AVX512,FUTURE */ + /* 240(f2 7d 48) 301 001(0c) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPERMILPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+37624, 544, 6128}, +}; + +static const struct itemplate instrux_VPERM2F128[2] = { + /* 0 : VPERM2F128 ymmreg,ymmreg*,ymmrm256,imm8 [rvmi: vex.nds.256.66.0f3a.w0 06 /r ib ] AVX,SANDYBRIDGE */ + /* 261(003 005) 001(06) 120 023 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VPERM2F128, 4, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+52195, 441, 3440}, + /* 1 : VPERM2F128 ymmreg,ymmrm256,imm8 [r+vmi: vex.nds.256.66.0f3a.w0 06 /r ib ] ND,AVX,SANDYBRIDGE */ + /* 260(003 005) 001(06) 110 022 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VPERM2F128, 3, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52203, 441, 3440}, +}; + +static const struct itemplate instrux_VPEXTRB[8] = { + /* 0 : VPEXTRB reg64,xmmreg,imm8 [mri: vex.128.66.0f3a.w0 14 /r ib ] LONG,PROT,AVX,X86_64,SANDYBRIDGE */ + /* 270(003 001) 001(14) 101 022 : NOAPX,LONG,VEX,PROT,AVX,SANDYBRIDGE */ + {I_VPEXTRB, 3, {REG_GPR|BITS64|RN_L16,XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52211, 456, 3441}, + /* 1 : VPEXTRB reg32,xmmreg,imm8 [mri: vex.128.66.0f3a.w0 14 /r ib ] AVX,SANDYBRIDGE */ + /* 270(003 001) 001(14) 101 022 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VPEXTRB, 3, {REG_GPR|BITS32|RN_L16,XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52211, 441, 3442}, + /* 2 : VPEXTRB mem8,xmmreg,imm8 [mri: vex.128.66.0f3a.w0 14 /r ib ] AVX,SANDYBRIDGE */ + /* 270(003 001) 001(14) 101 022 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VPEXTRB, 3, {MEMORY|BITS8|RN_L16,XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52211, 441, 3443}, + /* 3 : VPEXTRB reg8,xmmreg,imm8 [mri:t1s8: evex.128.66.0f3a.wig 14 /r ib ] AVX512BW,FUTURE */ + /* 250(f3 7d 08) 304 001(14) 101 022 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPEXTRB, 3, {REG_GPR|BITS8,XMMREG,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+19853, 556, 6172}, + /* 4 : VPEXTRB reg16,xmmreg,imm8 [mri:t1s8: evex.128.66.0f3a.wig 14 /r ib ] AVX512BW,FUTURE */ + /* 250(f3 7d 08) 304 001(14) 101 022 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPEXTRB, 3, {REG_GPR|BITS16,XMMREG,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+19853, 556, 6173}, + /* 5 : VPEXTRB reg32,xmmreg,imm8 [mri:t1s8: evex.128.66.0f3a.wig 14 /r ib ] AVX512BW,FUTURE */ + /* 250(f3 7d 08) 304 001(14) 101 022 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPEXTRB, 3, {REG_GPR|BITS32,XMMREG,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+19853, 556, 6174}, + /* 6 : VPEXTRB reg64,xmmreg,imm8 [mri:t1s8: evex.128.66.0f3a.wig 14 /r ib ] AVX512BW,FUTURE */ + /* 250(f3 7d 08) 304 001(14) 101 022 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPEXTRB, 3, {REG_GPR|BITS64,XMMREG,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+19853, 556, 6175}, + /* 7 : VPEXTRB mem8,xmmreg,imm8 [mri:t1s8: evex.128.66.0f3a.wig 14 /r ib ] AVX512BW,FUTURE */ + /* 250(f3 7d 08) 304 001(14) 101 022 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPEXTRB, 3, {MEMORY|BITS8,XMMREG,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+19853, 556, 6176}, +}; + +static const struct itemplate instrux_VPEXTRW[12] = { + /* 0 : VPEXTRW reg64,xmmreg,imm8 [rmi: vex.128.66.0f.w0 c5 /r ib ] LONG,PROT,AVX,X86_64,SANDYBRIDGE */ + /* 270(001 001) 001(c5) 110 022 : NOAPX,LONG,VEX,PROT,AVX,SANDYBRIDGE */ + {I_VPEXTRW, 3, {REG_GPR|BITS64|RN_L16,XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52219, 456, 3444}, + /* 1 : VPEXTRW reg32,xmmreg,imm8 [rmi: vex.128.66.0f.w0 c5 /r ib ] AVX,SANDYBRIDGE */ + /* 270(001 001) 001(c5) 110 022 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VPEXTRW, 3, {REG_GPR|BITS32|RN_L16,XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52219, 441, 3445}, + /* 2 : VPEXTRW reg64,xmmreg,imm8 [mri: vex.128.66.0f3a.w0 15 /r ib ] LONG,PROT,AVX,X86_64,SANDYBRIDGE */ + /* 270(003 001) 001(15) 101 022 : NOAPX,LONG,VEX,PROT,AVX,SANDYBRIDGE */ + {I_VPEXTRW, 3, {REG_GPR|BITS64|RN_L16,XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52227, 456, 3446}, + /* 3 : VPEXTRW reg32,xmmreg,imm8 [mri: vex.128.66.0f3a.w0 15 /r ib ] AVX,SANDYBRIDGE */ + /* 270(003 001) 001(15) 101 022 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VPEXTRW, 3, {REG_GPR|BITS32|RN_L16,XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52227, 441, 3447}, + /* 4 : VPEXTRW mem16,xmmreg,imm8 [mri: vex.128.66.0f3a.w0 15 /r ib ] AVX,SANDYBRIDGE */ + /* 270(003 001) 001(15) 101 022 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VPEXTRW, 3, {MEMORY|BITS16|RN_L16,XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52227, 441, 3448}, + /* 5 : VPEXTRW reg16,xmmreg,imm8 [mri:t1s16:evex.128.66.0f3a.wig 15 /r ib ] AVX512BW,FUTURE */ + /* 250(f3 7d 08) 305 001(15) 101 022 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPEXTRW, 3, {REG_GPR|BITS16,XMMREG,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+19883, 556, 6179}, + /* 6 : VPEXTRW reg32,xmmreg,imm8 [mri:t1s16:evex.128.66.0f3a.wig 15 /r ib ] AVX512BW,FUTURE */ + /* 250(f3 7d 08) 305 001(15) 101 022 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPEXTRW, 3, {REG_GPR|BITS32,XMMREG,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+19883, 556, 6180}, + /* 7 : VPEXTRW reg64,xmmreg,imm8 [mri:t1s16:evex.128.66.0f3a.wig 15 /r ib ] AVX512BW,FUTURE */ + /* 250(f3 7d 08) 305 001(15) 101 022 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPEXTRW, 3, {REG_GPR|BITS64,XMMREG,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+19883, 556, 6181}, + /* 8 : VPEXTRW mem16,xmmreg,imm8 [mri:t1s16:evex.128.66.0f3a.wig 15 /r ib ] AVX512BW,FUTURE */ + /* 250(f3 7d 08) 305 001(15) 101 022 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPEXTRW, 3, {MEMORY|BITS16,XMMREG,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+19883, 556, 6182}, + /* 9 : VPEXTRW reg16,xmmreg,imm8 [rmi: evex.128.66.0f.wig c5 /r ib ] AVX512BW,FUTURE */ + /* 250(f1 7d 08) 300 001(c5) 110 022 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPEXTRW, 3, {REG_GPR|BITS16,XMMREG,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+19893, 556, 6183}, + /* 10 : VPEXTRW reg32,xmmreg,imm8 [rmi: evex.128.66.0f.wig c5 /r ib ] AVX512BW,FUTURE */ + /* 250(f1 7d 08) 300 001(c5) 110 022 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPEXTRW, 3, {REG_GPR|BITS32,XMMREG,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+19893, 556, 6184}, + /* 11 : VPEXTRW reg64,xmmreg,imm8 [rmi: evex.128.66.0f.wig c5 /r ib ] AVX512BW,FUTURE */ + /* 250(f1 7d 08) 300 001(c5) 110 022 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPEXTRW, 3, {REG_GPR|BITS64,XMMREG,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+19893, 556, 6185}, +}; + +static const struct itemplate instrux_VPEXTRD[3] = { + /* 0 : VPEXTRD reg64,xmmreg,imm8 [mri: vex.128.66.0f3a.w0 16 /r ib ] LONG,PROT,AVX,X86_64,SANDYBRIDGE */ + /* 270(003 001) 001(16) 101 022 : NOAPX,LONG,VEX,PROT,AVX,SANDYBRIDGE */ + {I_VPEXTRD, 3, {REG_GPR|BITS64|RN_L16,XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52235, 456, 3449}, + /* 1 : VPEXTRD rm32,xmmreg,imm8 [mri: vex.128.66.0f3a.w0 16 /r ib ] AVX,SANDYBRIDGE */ + /* 270(003 001) 001(16) 101 022 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VPEXTRD, 3, {RM_GPR|BITS32|RN_L16,XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52235, 441, 3450}, + /* 2 : VPEXTRD rm32,xmmreg,imm8 [mri:t1s: evex.128.66.0f3a.w0 16 /r ib ] AVX512DQ,FUTURE */ + /* 250(f3 7d 08) 306 001(16) 101 022 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VPEXTRD, 3, {RM_GPR|BITS32,XMMREG,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+19863, 547, 6177}, +}; + +static const struct itemplate instrux_VPEXTRQ[2] = { + /* 0 : VPEXTRQ rm64,xmmreg,imm8 [mri: vex.128.66.0f3a.w1 16 /r ib ] LONG,PROT,AVX,X86_64,SANDYBRIDGE */ + /* 270(003 201) 001(16) 101 022 : NOAPX,LONG,VEX,PROT,AVX,SANDYBRIDGE */ + {I_VPEXTRQ, 3, {RM_GPR|BITS64|RN_L16,XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52243, 456, 3451}, + /* 1 : VPEXTRQ rm64,xmmreg,imm8 [mri:t1s: evex.128.66.0f3a.w1 16 /r ib ] AVX512DQ,FUTURE */ + /* 250(f3 fd 08) 306 001(16) 101 022 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VPEXTRQ, 3, {RM_GPR|BITS64,XMMREG,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+19873, 547, 6178}, +}; + +static const struct itemplate instrux_VPHADDW[4] = { + /* 0 : VPHADDW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 01 /r ] AVX,SANDYBRIDGE */ + /* 261(002 001) 001(01) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPHADDW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60556, 433, 3452}, + /* 1 : VPHADDW xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f38 01 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(002 001) 001(01) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPHADDW, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60563, 433, 3452}, + /* 2 : VPHADDW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 01 /r ] AVX2,FUTURE */ + /* 261(002 005) 001(01) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPHADDW, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63601, 467, 4121}, + /* 3 : VPHADDW ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f38 01 /r ] ND,AVX2,FUTURE */ + /* 260(002 005) 001(01) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPHADDW, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63608, 467, 4121}, +}; + +static const struct itemplate instrux_VPHADDD[4] = { + /* 0 : VPHADDD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 02 /r ] AVX,SANDYBRIDGE */ + /* 261(002 001) 001(02) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPHADDD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60570, 433, 3453}, + /* 1 : VPHADDD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f38 02 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(002 001) 001(02) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPHADDD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60577, 433, 3453}, + /* 2 : VPHADDD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 02 /r ] AVX2,FUTURE */ + /* 261(002 005) 001(02) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPHADDD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63615, 467, 4122}, + /* 3 : VPHADDD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f38 02 /r ] ND,AVX2,FUTURE */ + /* 260(002 005) 001(02) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPHADDD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63622, 467, 4122}, +}; + +static const struct itemplate instrux_VPHADDSW[4] = { + /* 0 : VPHADDSW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 03 /r ] AVX,SANDYBRIDGE */ + /* 261(002 001) 001(03) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPHADDSW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60584, 433, 3454}, + /* 1 : VPHADDSW xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f38 03 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(002 001) 001(03) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPHADDSW, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60591, 433, 3454}, + /* 2 : VPHADDSW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 03 /r ] AVX2,FUTURE */ + /* 261(002 005) 001(03) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPHADDSW, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63629, 467, 4123}, + /* 3 : VPHADDSW ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f38 03 /r ] ND,AVX2,FUTURE */ + /* 260(002 005) 001(03) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPHADDSW, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63636, 467, 4123}, +}; + +static const struct itemplate instrux_VPHMINPOSUW[1] = { + /* 0 : VPHMINPOSUW xmmreg,xmmrm128 [rm: vex.128.66.0f38 41 /r ] AVX,SANDYBRIDGE */ + /* 270(002 001) 001(41) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPHMINPOSUW, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60598, 433, 3455}, +}; + +static const struct itemplate instrux_VPHSUBW[4] = { + /* 0 : VPHSUBW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 05 /r ] AVX,SANDYBRIDGE */ + /* 261(002 001) 001(05) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPHSUBW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60605, 433, 3456}, + /* 1 : VPHSUBW xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f38 05 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(002 001) 001(05) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPHSUBW, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60612, 433, 3456}, + /* 2 : VPHSUBW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 05 /r ] AVX2,FUTURE */ + /* 261(002 005) 001(05) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPHSUBW, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63643, 467, 4124}, + /* 3 : VPHSUBW ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f38 05 /r ] ND,AVX2,FUTURE */ + /* 260(002 005) 001(05) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPHSUBW, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63650, 467, 4124}, +}; + +static const struct itemplate instrux_VPHSUBD[4] = { + /* 0 : VPHSUBD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 06 /r ] AVX,SANDYBRIDGE */ + /* 261(002 001) 001(06) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPHSUBD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60619, 433, 3457}, + /* 1 : VPHSUBD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f38 06 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(002 001) 001(06) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPHSUBD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60626, 433, 3457}, + /* 2 : VPHSUBD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 06 /r ] AVX2,FUTURE */ + /* 261(002 005) 001(06) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPHSUBD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63657, 467, 4125}, + /* 3 : VPHSUBD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f38 06 /r ] ND,AVX2,FUTURE */ + /* 260(002 005) 001(06) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPHSUBD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63664, 467, 4125}, +}; + +static const struct itemplate instrux_VPHSUBSW[4] = { + /* 0 : VPHSUBSW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 07 /r ] AVX,SANDYBRIDGE */ + /* 261(002 001) 001(07) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPHSUBSW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60633, 433, 3458}, + /* 1 : VPHSUBSW xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f38 07 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(002 001) 001(07) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPHSUBSW, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60640, 433, 3458}, + /* 2 : VPHSUBSW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 07 /r ] AVX2,FUTURE */ + /* 261(002 005) 001(07) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPHSUBSW, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63671, 467, 4126}, + /* 3 : VPHSUBSW ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f38 07 /r ] ND,AVX2,FUTURE */ + /* 260(002 005) 001(07) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPHSUBSW, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63678, 467, 4126}, +}; + +static const struct itemplate instrux_VPINSRB[10] = { + /* 0 : VPINSRB xmmreg,xmmreg*,mem8,imm8 [rvmi: vex.nds.128.66.0f3a 20 /r ib ] AVX,SANDYBRIDGE */ + /* 261(003 001) 001(20) 120 023 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPINSRB, 4, {XMMREG|RN_L16,XMMREG|RN_L16,MEMORY|BITS8|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+52251, 433, 3459}, + /* 1 : VPINSRB xmmreg,mem8,imm8 [r+vmi: vex.nds.128.66.0f3a 20 /r ib ] ND,AVX,SANDYBRIDGE */ + /* 260(003 001) 001(20) 110 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPINSRB, 3, {XMMREG|RN_L16,MEMORY|BITS8|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52259, 433, 3459}, + /* 2 : VPINSRB xmmreg,xmmreg*,rm8,imm8 [rvmi: vex.nds.128.66.0f3a 20 /r ib ] AVX,SANDYBRIDGE */ + /* 261(003 001) 001(20) 120 023 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPINSRB, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_GPR|BITS8|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+52251, 433, 3460}, + /* 3 : VPINSRB xmmreg,rm8,imm8 [r+vmi: vex.nds.128.66.0f3a 20 /r ib ] ND,AVX,SANDYBRIDGE */ + /* 260(003 001) 001(20) 110 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPINSRB, 3, {XMMREG|RN_L16,RM_GPR|BITS8|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52259, 433, 3460}, + /* 4 : VPINSRB xmmreg,xmmreg*,reg32,imm8 [rvmi: vex.nds.128.66.0f3a 20 /r ib ] AVX,SANDYBRIDGE */ + /* 261(003 001) 001(20) 120 023 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPINSRB, 4, {XMMREG|RN_L16,XMMREG|RN_L16,REG_GPR|BITS32|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+52251, 433, 3461}, + /* 5 : VPINSRB xmmreg,reg32,imm8 [r+vmi: vex.nds.128.66.0f3a 20 /r ib ] ND,AVX,SANDYBRIDGE */ + /* 260(003 001) 001(20) 110 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPINSRB, 3, {XMMREG|RN_L16,REG_GPR|BITS32|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52259, 433, 3461}, + /* 6 : VPINSRB xmmreg,xmmreg*,reg32,imm8 [rvmi:t1s8:evex.nds.128.66.0f3a.wig 20 /r ib ] AVX512BW,FUTURE */ + /* 241(f3 7d 08) 304 001(20) 120 023 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPINSRB, 4, {XMMREG,XMMREG,REG_GPR|BITS32,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+20023, 556, 6198}, + /* 7 : VPINSRB xmmreg,reg32,imm8 [r+vmi:t1s8:evex.nds.128.66.0f3a.wig 20 /r ib ] ND,AVX512BW,FUTURE */ + /* 240(f3 7d 08) 304 001(20) 110 022 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPINSRB, 3, {XMMREG,REG_GPR|BITS32,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+20033, 556, 6198}, + /* 8 : VPINSRB xmmreg,xmmreg*,mem8,imm8 [rvmi:t1s8:evex.nds.128.66.0f3a.wig 20 /r ib ] AVX512BW,FUTURE */ + /* 241(f3 7d 08) 304 001(20) 120 023 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPINSRB, 4, {XMMREG,XMMREG,MEMORY|BITS8,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+20023, 556, 6199}, + /* 9 : VPINSRB xmmreg,mem8,imm8 [r+vmi:t1s8:evex.nds.128.66.0f3a.wig 20 /r ib ] ND,AVX512BW,FUTURE */ + /* 240(f3 7d 08) 304 001(20) 110 022 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPINSRB, 3, {XMMREG,MEMORY|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+20033, 556, 6199}, +}; + +static const struct itemplate instrux_VPINSRW[10] = { + /* 0 : VPINSRW xmmreg,xmmreg*,mem16,imm8 [rvmi: vex.nds.128.66.0f c4 /r ib ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c4) 120 023 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPINSRW, 4, {XMMREG|RN_L16,XMMREG|RN_L16,MEMORY|BITS16|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+52267, 433, 3462}, + /* 1 : VPINSRW xmmreg,mem16,imm8 [r+vmi: vex.nds.128.66.0f c4 /r ib ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(c4) 110 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPINSRW, 3, {XMMREG|RN_L16,MEMORY|BITS16|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52275, 433, 3462}, + /* 2 : VPINSRW xmmreg,xmmreg*,rm16,imm8 [rvmi: vex.nds.128.66.0f c4 /r ib ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c4) 120 023 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPINSRW, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_GPR|BITS16|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+52267, 433, 3463}, + /* 3 : VPINSRW xmmreg,rm16,imm8 [r+vmi: vex.nds.128.66.0f c4 /r ib ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(c4) 110 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPINSRW, 3, {XMMREG|RN_L16,RM_GPR|BITS16|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52275, 433, 3463}, + /* 4 : VPINSRW xmmreg,xmmreg*,reg32,imm8 [rvmi: vex.nds.128.66.0f c4 /r ib ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c4) 120 023 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPINSRW, 4, {XMMREG|RN_L16,XMMREG|RN_L16,REG_GPR|BITS32|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+52267, 433, 3464}, + /* 5 : VPINSRW xmmreg,reg32,imm8 [r+vmi: vex.nds.128.66.0f c4 /r ib ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(c4) 110 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPINSRW, 3, {XMMREG|RN_L16,REG_GPR|BITS32|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52275, 433, 3464}, + /* 6 : VPINSRW xmmreg,xmmreg*,reg32,imm8 [rvmi:t1s16:evex.nds.128.66.0f.wig c4 /r ib ] AVX512BW,FUTURE */ + /* 241(f1 7d 08) 305 001(c4) 120 023 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPINSRW, 4, {XMMREG,XMMREG,REG_GPR|BITS32,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+20083, 556, 6202}, + /* 7 : VPINSRW xmmreg,reg32,imm8 [r+vmi:t1s16:evex.nds.128.66.0f.wig c4 /r ib ] ND,AVX512BW,FUTURE */ + /* 240(f1 7d 08) 305 001(c4) 110 022 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPINSRW, 3, {XMMREG,REG_GPR|BITS32,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+20093, 556, 6202}, + /* 8 : VPINSRW xmmreg,xmmreg*,mem16,imm8 [rvmi:t1s16:evex.nds.128.66.0f.wig c4 /r ib ] AVX512BW,FUTURE */ + /* 241(f1 7d 08) 305 001(c4) 120 023 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPINSRW, 4, {XMMREG,XMMREG,MEMORY|BITS16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+20083, 556, 6203}, + /* 9 : VPINSRW xmmreg,mem16,imm8 [r+vmi:t1s16:evex.nds.128.66.0f.wig c4 /r ib ] ND,AVX512BW,FUTURE */ + /* 240(f1 7d 08) 305 001(c4) 110 022 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPINSRW, 3, {XMMREG,MEMORY|BITS16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+20093, 556, 6203}, +}; + +static const struct itemplate instrux_VPINSRD[6] = { + /* 0 : VPINSRD xmmreg,xmmreg*,mem32,imm8 [rvmi: vex.nds.128.66.0f3a.w0 22 /r ib ] AVX,SANDYBRIDGE */ + /* 261(003 001) 001(22) 120 023 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VPINSRD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,MEMORY|BITS32|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+52283, 441, 3465}, + /* 1 : VPINSRD xmmreg,mem32,imm8 [r+vmi: vex.nds.128.66.0f3a.w0 22 /r ib ] ND,AVX,SANDYBRIDGE */ + /* 260(003 001) 001(22) 110 022 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VPINSRD, 3, {XMMREG|RN_L16,MEMORY|BITS32|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52291, 441, 3465}, + /* 2 : VPINSRD xmmreg,xmmreg*,rm32,imm8 [rvmi: vex.nds.128.66.0f3a.w0 22 /r ib ] AVX,SANDYBRIDGE */ + /* 261(003 001) 001(22) 120 023 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VPINSRD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_GPR|BITS32|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+52283, 441, 3466}, + /* 3 : VPINSRD xmmreg,rm32,imm8 [r+vmi: vex.nds.128.66.0f3a.w0 22 /r ib ] ND,AVX,SANDYBRIDGE */ + /* 260(003 001) 001(22) 110 022 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VPINSRD, 3, {XMMREG|RN_L16,RM_GPR|BITS32|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52291, 441, 3466}, + /* 4 : VPINSRD xmmreg,xmmreg*,rm32,imm8 [rvmi:t1s: evex.nds.128.66.0f3a.w0 22 /r ib ] AVX512DQ,FUTURE */ + /* 241(f3 7d 08) 306 001(22) 120 023 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VPINSRD, 4, {XMMREG,XMMREG,RM_GPR|BITS32,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+20043, 547, 6200}, + /* 5 : VPINSRD xmmreg,rm32,imm8 [r+vmi:t1s: evex.nds.128.66.0f3a.w0 22 /r ib ] ND,AVX512DQ,FUTURE */ + /* 240(f3 7d 08) 306 001(22) 110 022 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VPINSRD, 3, {XMMREG,RM_GPR|BITS32,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+20053, 547, 6200}, +}; + +static const struct itemplate instrux_VPINSRQ[6] = { + /* 0 : VPINSRQ xmmreg,xmmreg*,mem64,imm8 [rvmi: vex.nds.128.66.0f3a.w1 22 /r ib ] LONG,PROT,AVX,X86_64,SANDYBRIDGE */ + /* 261(003 201) 001(22) 120 023 : NOAPX,LONG,VEX,PROT,AVX,SANDYBRIDGE */ + {I_VPINSRQ, 4, {XMMREG|RN_L16,XMMREG|RN_L16,MEMORY|BITS64|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+52299, 456, 3467}, + /* 1 : VPINSRQ xmmreg,mem64,imm8 [r+vmi: vex.nds.128.66.0f3a.w1 22 /r ib ] ND,LONG,PROT,AVX,X86_64,SANDYBRIDGE */ + /* 260(003 201) 001(22) 110 022 : NOAPX,LONG,VEX,PROT,AVX,SANDYBRIDGE */ + {I_VPINSRQ, 3, {XMMREG|RN_L16,MEMORY|BITS64|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52307, 456, 3467}, + /* 2 : VPINSRQ xmmreg,xmmreg*,rm64,imm8 [rvmi: vex.nds.128.66.0f3a.w1 22 /r ib ] LONG,PROT,AVX,X86_64,SANDYBRIDGE */ + /* 261(003 201) 001(22) 120 023 : NOAPX,LONG,VEX,PROT,AVX,SANDYBRIDGE */ + {I_VPINSRQ, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_GPR|BITS64|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+52299, 456, 3468}, + /* 3 : VPINSRQ xmmreg,rm64,imm8 [r+vmi: vex.nds.128.66.0f3a.w1 22 /r ib ] ND,LONG,PROT,AVX,X86_64,SANDYBRIDGE */ + /* 260(003 201) 001(22) 110 022 : NOAPX,LONG,VEX,PROT,AVX,SANDYBRIDGE */ + {I_VPINSRQ, 3, {XMMREG|RN_L16,RM_GPR|BITS64|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52307, 456, 3468}, + /* 4 : VPINSRQ xmmreg,xmmreg*,rm64,imm8 [rvmi:t1s: evex.nds.128.66.0f3a.w1 22 /r ib ] AVX512DQ,FUTURE */ + /* 241(f3 fd 08) 306 001(22) 120 023 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VPINSRQ, 4, {XMMREG,XMMREG,RM_GPR|BITS64,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+20063, 547, 6201}, + /* 5 : VPINSRQ xmmreg,rm64,imm8 [r+vmi:t1s: evex.nds.128.66.0f3a.w1 22 /r ib ] ND,AVX512DQ,FUTURE */ + /* 240(f3 fd 08) 306 001(22) 110 022 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VPINSRQ, 3, {XMMREG,RM_GPR|BITS64,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+20073, 547, 6201}, +}; + +static const struct itemplate instrux_VPMADDWD[10] = { + /* 0 : VPMADDWD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f f5 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(f5) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMADDWD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60647, 433, 3469}, + /* 1 : VPMADDWD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f f5 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(f5) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMADDWD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60654, 433, 3469}, + /* 2 : VPMADDWD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f f5 /r ] AVX2,FUTURE */ + /* 261(001 005) 001(f5) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMADDWD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63699, 467, 4128}, + /* 3 : VPMADDWD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f f5 /r ] ND,AVX2,FUTURE */ + /* 260(001 005) 001(f5) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMADDWD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63706, 467, 4128}, + /* 4 : VPMADDWD xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig f5 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 303 001(f5) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMADDWD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38173, 555, 6219}, + /* 5 : VPMADDWD xmmreg|mask|z,xmmrm128 [r+vm:fvm: evex.nds.128.66.0f.wig f5 /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 08) 303 001(f5) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMADDWD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38182, 555, 6219}, + /* 6 : VPMADDWD ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig f5 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 303 001(f5) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMADDWD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38191, 555, 6220}, + /* 7 : VPMADDWD ymmreg|mask|z,ymmrm256 [r+vm:fvm: evex.nds.256.66.0f.wig f5 /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 28) 303 001(f5) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMADDWD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38200, 555, 6220}, + /* 8 : VPMADDWD zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig f5 /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 303 001(f5) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPMADDWD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38209, 556, 6221}, + /* 9 : VPMADDWD zmmreg|mask|z,zmmrm512 [r+vm:fvm: evex.nds.512.66.0f.wig f5 /r ] ND,AVX512BW,FUTURE */ + /* 240(f1 7d 48) 303 001(f5) 110 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPMADDWD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38218, 556, 6221}, +}; + +static const struct itemplate instrux_VPMADDUBSW[10] = { + /* 0 : VPMADDUBSW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 04 /r ] AVX,SANDYBRIDGE */ + /* 261(002 001) 001(04) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMADDUBSW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60661, 433, 3470}, + /* 1 : VPMADDUBSW xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f38 04 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(002 001) 001(04) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMADDUBSW, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60668, 433, 3470}, + /* 2 : VPMADDUBSW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 04 /r ] AVX2,FUTURE */ + /* 261(002 005) 001(04) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMADDUBSW, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63685, 467, 4127}, + /* 3 : VPMADDUBSW ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f38 04 /r ] ND,AVX2,FUTURE */ + /* 260(002 005) 001(04) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMADDUBSW, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63692, 467, 4127}, + /* 4 : VPMADDUBSW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f38.wig 04 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 7d 08) 303 001(04) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMADDUBSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38119, 555, 6216}, + /* 5 : VPMADDUBSW xmmreg|mask|z,xmmrm128 [r+vm:fvm: evex.nds.128.66.0f38.wig 04 /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f2 7d 08) 303 001(04) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMADDUBSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38128, 555, 6216}, + /* 6 : VPMADDUBSW ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f38.wig 04 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 7d 28) 303 001(04) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMADDUBSW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38137, 555, 6217}, + /* 7 : VPMADDUBSW ymmreg|mask|z,ymmrm256 [r+vm:fvm: evex.nds.256.66.0f38.wig 04 /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f2 7d 28) 303 001(04) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMADDUBSW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38146, 555, 6217}, + /* 8 : VPMADDUBSW zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f38.wig 04 /r ] AVX512BW,FUTURE */ + /* 241(f2 7d 48) 303 001(04) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPMADDUBSW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38155, 556, 6218}, + /* 9 : VPMADDUBSW zmmreg|mask|z,zmmrm512 [r+vm:fvm: evex.nds.512.66.0f38.wig 04 /r ] ND,AVX512BW,FUTURE */ + /* 240(f2 7d 48) 303 001(04) 110 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPMADDUBSW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38164, 556, 6218}, +}; + +static const struct itemplate instrux_VPMAXSB[10] = { + /* 0 : VPMAXSB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 3c /r ] AVX,SANDYBRIDGE */ + /* 261(002 001) 001(3c) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMAXSB, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60675, 433, 3471}, + /* 1 : VPMAXSB xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f38 3c /r ] ND,AVX,SANDYBRIDGE */ + /* 260(002 001) 001(3c) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMAXSB, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60682, 433, 3471}, + /* 2 : VPMAXSB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 3c /r ] AVX2,FUTURE */ + /* 261(002 005) 001(3c) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMAXSB, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63713, 467, 4129}, + /* 3 : VPMAXSB ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f38 3c /r ] ND,AVX2,FUTURE */ + /* 260(002 005) 001(3c) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMAXSB, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63720, 467, 4129}, + /* 4 : VPMAXSB xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f38.wig 3c /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 7d 08) 303 001(3c) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMAXSB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38227, 555, 6222}, + /* 5 : VPMAXSB xmmreg|mask|z,xmmrm128 [r+vm:fvm: evex.nds.128.66.0f38.wig 3c /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f2 7d 08) 303 001(3c) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMAXSB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38236, 555, 6222}, + /* 6 : VPMAXSB ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f38.wig 3c /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 7d 28) 303 001(3c) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMAXSB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38245, 555, 6223}, + /* 7 : VPMAXSB ymmreg|mask|z,ymmrm256 [r+vm:fvm: evex.nds.256.66.0f38.wig 3c /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f2 7d 28) 303 001(3c) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMAXSB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38254, 555, 6223}, + /* 8 : VPMAXSB zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f38.wig 3c /r ] AVX512BW,FUTURE */ + /* 241(f2 7d 48) 303 001(3c) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPMAXSB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38263, 556, 6224}, + /* 9 : VPMAXSB zmmreg|mask|z,zmmrm512 [r+vm:fvm: evex.nds.512.66.0f38.wig 3c /r ] ND,AVX512BW,FUTURE */ + /* 240(f2 7d 48) 303 001(3c) 110 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPMAXSB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38272, 556, 6224}, +}; + +static const struct itemplate instrux_VPMAXSW[10] = { + /* 0 : VPMAXSW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f ee /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(ee) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMAXSW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60689, 433, 3472}, + /* 1 : VPMAXSW xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f ee /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(ee) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMAXSW, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60696, 433, 3472}, + /* 2 : VPMAXSW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f ee /r ] AVX2,FUTURE */ + /* 261(001 005) 001(ee) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMAXSW, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63727, 467, 4130}, + /* 3 : VPMAXSW ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f ee /r ] ND,AVX2,FUTURE */ + /* 260(001 005) 001(ee) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMAXSW, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63734, 467, 4130}, + /* 4 : VPMAXSW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig ee /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 303 001(ee) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMAXSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38389, 555, 6231}, + /* 5 : VPMAXSW xmmreg|mask|z,xmmrm128 [r+vm:fvm: evex.nds.128.66.0f.wig ee /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 08) 303 001(ee) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMAXSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38398, 555, 6231}, + /* 6 : VPMAXSW ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig ee /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 303 001(ee) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMAXSW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38407, 555, 6232}, + /* 7 : VPMAXSW ymmreg|mask|z,ymmrm256 [r+vm:fvm: evex.nds.256.66.0f.wig ee /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 28) 303 001(ee) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMAXSW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38416, 555, 6232}, + /* 8 : VPMAXSW zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig ee /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 303 001(ee) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPMAXSW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38425, 556, 6233}, + /* 9 : VPMAXSW zmmreg|mask|z,zmmrm512 [r+vm:fvm: evex.nds.512.66.0f.wig ee /r ] ND,AVX512BW,FUTURE */ + /* 240(f1 7d 48) 303 001(ee) 110 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPMAXSW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38434, 556, 6233}, +}; + +static const struct itemplate instrux_VPMAXSD[10] = { + /* 0 : VPMAXSD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 3d /r ] AVX,SANDYBRIDGE */ + /* 261(002 001) 001(3d) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMAXSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60703, 433, 3473}, + /* 1 : VPMAXSD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f38 3d /r ] ND,AVX,SANDYBRIDGE */ + /* 260(002 001) 001(3d) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMAXSD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60710, 433, 3473}, + /* 2 : VPMAXSD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 3d /r ] AVX2,FUTURE */ + /* 261(002 005) 001(3d) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMAXSD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63741, 467, 4131}, + /* 3 : VPMAXSD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f38 3d /r ] ND,AVX2,FUTURE */ + /* 260(002 005) 001(3d) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMAXSD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63748, 467, 4131}, + /* 4 : VPMAXSD xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 3d /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(3d) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMAXSD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+38281, 543, 6225}, + /* 5 : VPMAXSD xmmreg|mask|z,xmmrm128|b32 [r+vm:fv: evex.nds.128.66.0f38.w0 3d /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f2 7d 08) 301 001(3d) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMAXSD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+38290, 543, 6225}, + /* 6 : VPMAXSD ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 3d /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(3d) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMAXSD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+38299, 543, 6226}, + /* 7 : VPMAXSD ymmreg|mask|z,ymmrm256|b32 [r+vm:fv: evex.nds.256.66.0f38.w0 3d /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f2 7d 28) 301 001(3d) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMAXSD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+38308, 543, 6226}, + /* 8 : VPMAXSD zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f38.w0 3d /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(3d) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMAXSD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+38317, 544, 6227}, + /* 9 : VPMAXSD zmmreg|mask|z,zmmrm512|b32 [r+vm:fv: evex.nds.512.66.0f38.w0 3d /r ] ND,AVX512,FUTURE */ + /* 240(f2 7d 48) 301 001(3d) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMAXSD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+38326, 544, 6227}, +}; + +static const struct itemplate instrux_VPMAXUB[10] = { + /* 0 : VPMAXUB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f de /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(de) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMAXUB, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60717, 433, 3474}, + /* 1 : VPMAXUB xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f de /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(de) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMAXUB, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60724, 433, 3474}, + /* 2 : VPMAXUB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f de /r ] AVX2,FUTURE */ + /* 261(001 005) 001(de) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMAXUB, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63755, 467, 4132}, + /* 3 : VPMAXUB ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f de /r ] ND,AVX2,FUTURE */ + /* 260(001 005) 001(de) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMAXUB, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63762, 467, 4132}, + /* 4 : VPMAXUB xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig de /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 303 001(de) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMAXUB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38443, 555, 6234}, + /* 5 : VPMAXUB xmmreg|mask|z,xmmrm128 [r+vm:fvm: evex.nds.128.66.0f.wig de /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 08) 303 001(de) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMAXUB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38452, 555, 6234}, + /* 6 : VPMAXUB ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig de /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 303 001(de) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMAXUB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38461, 555, 6235}, + /* 7 : VPMAXUB ymmreg|mask|z,ymmrm256 [r+vm:fvm: evex.nds.256.66.0f.wig de /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 28) 303 001(de) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMAXUB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38470, 555, 6235}, + /* 8 : VPMAXUB zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig de /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 303 001(de) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPMAXUB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38479, 556, 6236}, + /* 9 : VPMAXUB zmmreg|mask|z,zmmrm512 [r+vm:fvm: evex.nds.512.66.0f.wig de /r ] ND,AVX512BW,FUTURE */ + /* 240(f1 7d 48) 303 001(de) 110 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPMAXUB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38488, 556, 6236}, +}; + +static const struct itemplate instrux_VPMAXUW[10] = { + /* 0 : VPMAXUW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 3e /r ] AVX,SANDYBRIDGE */ + /* 261(002 001) 001(3e) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMAXUW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60731, 433, 3475}, + /* 1 : VPMAXUW xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f38 3e /r ] ND,AVX,SANDYBRIDGE */ + /* 260(002 001) 001(3e) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMAXUW, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60738, 433, 3475}, + /* 2 : VPMAXUW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 3e /r ] AVX2,FUTURE */ + /* 261(002 005) 001(3e) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMAXUW, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63769, 467, 4133}, + /* 3 : VPMAXUW ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f38 3e /r ] ND,AVX2,FUTURE */ + /* 260(002 005) 001(3e) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMAXUW, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63776, 467, 4133}, + /* 4 : VPMAXUW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f38.wig 3e /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 7d 08) 303 001(3e) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMAXUW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38605, 555, 6243}, + /* 5 : VPMAXUW xmmreg|mask|z,xmmrm128 [r+vm:fvm: evex.nds.128.66.0f38.wig 3e /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f2 7d 08) 303 001(3e) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMAXUW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38614, 555, 6243}, + /* 6 : VPMAXUW ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f38.wig 3e /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 7d 28) 303 001(3e) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMAXUW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38623, 555, 6244}, + /* 7 : VPMAXUW ymmreg|mask|z,ymmrm256 [r+vm:fvm: evex.nds.256.66.0f38.wig 3e /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f2 7d 28) 303 001(3e) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMAXUW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38632, 555, 6244}, + /* 8 : VPMAXUW zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f38.wig 3e /r ] AVX512BW,FUTURE */ + /* 241(f2 7d 48) 303 001(3e) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPMAXUW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38641, 556, 6245}, + /* 9 : VPMAXUW zmmreg|mask|z,zmmrm512 [r+vm:fvm: evex.nds.512.66.0f38.wig 3e /r ] ND,AVX512BW,FUTURE */ + /* 240(f2 7d 48) 303 001(3e) 110 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPMAXUW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38650, 556, 6245}, +}; + +static const struct itemplate instrux_VPMAXUD[10] = { + /* 0 : VPMAXUD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 3f /r ] AVX,SANDYBRIDGE */ + /* 261(002 001) 001(3f) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMAXUD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60745, 433, 3476}, + /* 1 : VPMAXUD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f38 3f /r ] ND,AVX,SANDYBRIDGE */ + /* 260(002 001) 001(3f) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMAXUD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60752, 433, 3476}, + /* 2 : VPMAXUD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 3f /r ] AVX2,FUTURE */ + /* 261(002 005) 001(3f) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMAXUD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63783, 467, 4134}, + /* 3 : VPMAXUD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f38 3f /r ] ND,AVX2,FUTURE */ + /* 260(002 005) 001(3f) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMAXUD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63790, 467, 4134}, + /* 4 : VPMAXUD xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 3f /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(3f) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMAXUD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+38497, 543, 6237}, + /* 5 : VPMAXUD xmmreg|mask|z,xmmrm128|b32 [r+vm:fv: evex.nds.128.66.0f38.w0 3f /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f2 7d 08) 301 001(3f) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMAXUD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+38506, 543, 6237}, + /* 6 : VPMAXUD ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 3f /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(3f) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMAXUD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+38515, 543, 6238}, + /* 7 : VPMAXUD ymmreg|mask|z,ymmrm256|b32 [r+vm:fv: evex.nds.256.66.0f38.w0 3f /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f2 7d 28) 301 001(3f) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMAXUD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+38524, 543, 6238}, + /* 8 : VPMAXUD zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f38.w0 3f /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(3f) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMAXUD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+38533, 544, 6239}, + /* 9 : VPMAXUD zmmreg|mask|z,zmmrm512|b32 [r+vm:fv: evex.nds.512.66.0f38.w0 3f /r ] ND,AVX512,FUTURE */ + /* 240(f2 7d 48) 301 001(3f) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMAXUD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+38542, 544, 6239}, +}; + +static const struct itemplate instrux_VPMINSB[10] = { + /* 0 : VPMINSB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 38 /r ] AVX,SANDYBRIDGE */ + /* 261(002 001) 001(38) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMINSB, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60759, 433, 3477}, + /* 1 : VPMINSB xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f38 38 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(002 001) 001(38) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMINSB, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60766, 433, 3477}, + /* 2 : VPMINSB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 38 /r ] AVX2,FUTURE */ + /* 261(002 005) 001(38) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMINSB, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63797, 467, 4135}, + /* 3 : VPMINSB ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f38 38 /r ] ND,AVX2,FUTURE */ + /* 260(002 005) 001(38) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMINSB, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63804, 467, 4135}, + /* 4 : VPMINSB xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f38.wig 38 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 7d 08) 303 001(38) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMINSB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38659, 555, 6246}, + /* 5 : VPMINSB xmmreg|mask|z,xmmrm128 [r+vm:fvm: evex.nds.128.66.0f38.wig 38 /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f2 7d 08) 303 001(38) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMINSB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38668, 555, 6246}, + /* 6 : VPMINSB ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f38.wig 38 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 7d 28) 303 001(38) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMINSB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38677, 555, 6247}, + /* 7 : VPMINSB ymmreg|mask|z,ymmrm256 [r+vm:fvm: evex.nds.256.66.0f38.wig 38 /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f2 7d 28) 303 001(38) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMINSB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38686, 555, 6247}, + /* 8 : VPMINSB zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f38.wig 38 /r ] AVX512BW,FUTURE */ + /* 241(f2 7d 48) 303 001(38) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPMINSB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38695, 556, 6248}, + /* 9 : VPMINSB zmmreg|mask|z,zmmrm512 [r+vm:fvm: evex.nds.512.66.0f38.wig 38 /r ] ND,AVX512BW,FUTURE */ + /* 240(f2 7d 48) 303 001(38) 110 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPMINSB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38704, 556, 6248}, +}; + +static const struct itemplate instrux_VPMINSW[10] = { + /* 0 : VPMINSW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f ea /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(ea) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMINSW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60773, 433, 3478}, + /* 1 : VPMINSW xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f ea /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(ea) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMINSW, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60780, 433, 3478}, + /* 2 : VPMINSW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f ea /r ] AVX2,FUTURE */ + /* 261(001 005) 001(ea) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMINSW, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63811, 467, 4136}, + /* 3 : VPMINSW ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f ea /r ] ND,AVX2,FUTURE */ + /* 260(001 005) 001(ea) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMINSW, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63818, 467, 4136}, + /* 4 : VPMINSW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig ea /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 303 001(ea) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMINSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38821, 555, 6255}, + /* 5 : VPMINSW xmmreg|mask|z,xmmrm128 [r+vm:fvm: evex.nds.128.66.0f.wig ea /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 08) 303 001(ea) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMINSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38830, 555, 6255}, + /* 6 : VPMINSW ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig ea /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 303 001(ea) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMINSW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38839, 555, 6256}, + /* 7 : VPMINSW ymmreg|mask|z,ymmrm256 [r+vm:fvm: evex.nds.256.66.0f.wig ea /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 28) 303 001(ea) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMINSW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38848, 555, 6256}, + /* 8 : VPMINSW zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig ea /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 303 001(ea) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPMINSW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38857, 556, 6257}, + /* 9 : VPMINSW zmmreg|mask|z,zmmrm512 [r+vm:fvm: evex.nds.512.66.0f.wig ea /r ] ND,AVX512BW,FUTURE */ + /* 240(f1 7d 48) 303 001(ea) 110 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPMINSW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38866, 556, 6257}, +}; + +static const struct itemplate instrux_VPMINSD[10] = { + /* 0 : VPMINSD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 39 /r ] AVX,SANDYBRIDGE */ + /* 261(002 001) 001(39) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMINSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60787, 433, 3479}, + /* 1 : VPMINSD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f38 39 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(002 001) 001(39) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMINSD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60794, 433, 3479}, + /* 2 : VPMINSD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 39 /r ] AVX2,FUTURE */ + /* 261(002 005) 001(39) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMINSD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63825, 467, 4137}, + /* 3 : VPMINSD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f38 39 /r ] ND,AVX2,FUTURE */ + /* 260(002 005) 001(39) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMINSD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63832, 467, 4137}, + /* 4 : VPMINSD xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 39 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(39) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMINSD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+38713, 543, 6249}, + /* 5 : VPMINSD xmmreg|mask|z,xmmrm128|b32 [r+vm:fv: evex.nds.128.66.0f38.w0 39 /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f2 7d 08) 301 001(39) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMINSD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+38722, 543, 6249}, + /* 6 : VPMINSD ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 39 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(39) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMINSD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+38731, 543, 6250}, + /* 7 : VPMINSD ymmreg|mask|z,ymmrm256|b32 [r+vm:fv: evex.nds.256.66.0f38.w0 39 /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f2 7d 28) 301 001(39) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMINSD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+38740, 543, 6250}, + /* 8 : VPMINSD zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f38.w0 39 /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(39) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMINSD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+38749, 544, 6251}, + /* 9 : VPMINSD zmmreg|mask|z,zmmrm512|b32 [r+vm:fv: evex.nds.512.66.0f38.w0 39 /r ] ND,AVX512,FUTURE */ + /* 240(f2 7d 48) 301 001(39) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMINSD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+38758, 544, 6251}, +}; + +static const struct itemplate instrux_VPMINUB[10] = { + /* 0 : VPMINUB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f da /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(da) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMINUB, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60801, 433, 3480}, + /* 1 : VPMINUB xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f da /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(da) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMINUB, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60808, 433, 3480}, + /* 2 : VPMINUB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f da /r ] AVX2,FUTURE */ + /* 261(001 005) 001(da) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMINUB, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63839, 467, 4138}, + /* 3 : VPMINUB ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f da /r ] ND,AVX2,FUTURE */ + /* 260(001 005) 001(da) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMINUB, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63846, 467, 4138}, + /* 4 : VPMINUB xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig da /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 303 001(da) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMINUB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38875, 555, 6258}, + /* 5 : VPMINUB xmmreg|mask|z,xmmrm128 [r+vm:fvm: evex.nds.128.66.0f.wig da /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 08) 303 001(da) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMINUB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38884, 555, 6258}, + /* 6 : VPMINUB ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig da /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 303 001(da) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMINUB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38893, 555, 6259}, + /* 7 : VPMINUB ymmreg|mask|z,ymmrm256 [r+vm:fvm: evex.nds.256.66.0f.wig da /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 28) 303 001(da) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMINUB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38902, 555, 6259}, + /* 8 : VPMINUB zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig da /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 303 001(da) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPMINUB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38911, 556, 6260}, + /* 9 : VPMINUB zmmreg|mask|z,zmmrm512 [r+vm:fvm: evex.nds.512.66.0f.wig da /r ] ND,AVX512BW,FUTURE */ + /* 240(f1 7d 48) 303 001(da) 110 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPMINUB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38920, 556, 6260}, +}; + +static const struct itemplate instrux_VPMINUW[10] = { + /* 0 : VPMINUW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 3a /r ] AVX,SANDYBRIDGE */ + /* 261(002 001) 001(3a) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMINUW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60815, 433, 3481}, + /* 1 : VPMINUW xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f38 3a /r ] ND,AVX,SANDYBRIDGE */ + /* 260(002 001) 001(3a) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMINUW, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60822, 433, 3481}, + /* 2 : VPMINUW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 3a /r ] AVX2,FUTURE */ + /* 261(002 005) 001(3a) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMINUW, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63853, 467, 4139}, + /* 3 : VPMINUW ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f38 3a /r ] ND,AVX2,FUTURE */ + /* 260(002 005) 001(3a) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMINUW, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63860, 467, 4139}, + /* 4 : VPMINUW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f38.wig 3a /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 7d 08) 303 001(3a) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMINUW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39037, 555, 6267}, + /* 5 : VPMINUW xmmreg|mask|z,xmmrm128 [r+vm:fvm: evex.nds.128.66.0f38.wig 3a /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f2 7d 08) 303 001(3a) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMINUW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39046, 555, 6267}, + /* 6 : VPMINUW ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f38.wig 3a /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 7d 28) 303 001(3a) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMINUW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39055, 555, 6268}, + /* 7 : VPMINUW ymmreg|mask|z,ymmrm256 [r+vm:fvm: evex.nds.256.66.0f38.wig 3a /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f2 7d 28) 303 001(3a) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMINUW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39064, 555, 6268}, + /* 8 : VPMINUW zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f38.wig 3a /r ] AVX512BW,FUTURE */ + /* 241(f2 7d 48) 303 001(3a) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPMINUW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39073, 556, 6269}, + /* 9 : VPMINUW zmmreg|mask|z,zmmrm512 [r+vm:fvm: evex.nds.512.66.0f38.wig 3a /r ] ND,AVX512BW,FUTURE */ + /* 240(f2 7d 48) 303 001(3a) 110 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPMINUW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39082, 556, 6269}, +}; + +static const struct itemplate instrux_VPMINUD[10] = { + /* 0 : VPMINUD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 3b /r ] AVX,SANDYBRIDGE */ + /* 261(002 001) 001(3b) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMINUD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60829, 433, 3482}, + /* 1 : VPMINUD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f38 3b /r ] ND,AVX,SANDYBRIDGE */ + /* 260(002 001) 001(3b) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMINUD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60836, 433, 3482}, + /* 2 : VPMINUD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 3b /r ] AVX2,FUTURE */ + /* 261(002 005) 001(3b) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMINUD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63867, 467, 4140}, + /* 3 : VPMINUD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f38 3b /r ] ND,AVX2,FUTURE */ + /* 260(002 005) 001(3b) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMINUD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63874, 467, 4140}, + /* 4 : VPMINUD xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 3b /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(3b) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMINUD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+38929, 543, 6261}, + /* 5 : VPMINUD xmmreg|mask|z,xmmrm128|b32 [r+vm:fv: evex.nds.128.66.0f38.w0 3b /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f2 7d 08) 301 001(3b) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMINUD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+38938, 543, 6261}, + /* 6 : VPMINUD ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 3b /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(3b) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMINUD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+38947, 543, 6262}, + /* 7 : VPMINUD ymmreg|mask|z,ymmrm256|b32 [r+vm:fv: evex.nds.256.66.0f38.w0 3b /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f2 7d 28) 301 001(3b) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMINUD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+38956, 543, 6262}, + /* 8 : VPMINUD zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f38.w0 3b /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(3b) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMINUD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+38965, 544, 6263}, + /* 9 : VPMINUD zmmreg|mask|z,zmmrm512|b32 [r+vm:fv: evex.nds.512.66.0f38.w0 3b /r ] ND,AVX512,FUTURE */ + /* 240(f2 7d 48) 301 001(3b) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMINUD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+38974, 544, 6263}, +}; + +static const struct itemplate instrux_VPMOVMSKB[4] = { + /* 0 : VPMOVMSKB reg64,xmmreg [rm: vex.128.66.0f d7 /r ] LONG,PROT,AVX,X86_64,SANDYBRIDGE */ + /* 270(001 001) 001(d7) 110 : NOAPX,WIG,LONG,VEX,PROT,AVX,SANDYBRIDGE */ + {I_VPMOVMSKB, 2, {REG_GPR|BITS64|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60843, 455, 3483}, + /* 1 : VPMOVMSKB reg32,xmmreg [rm: vex.128.66.0f d7 /r ] AVX,SANDYBRIDGE */ + /* 270(001 001) 001(d7) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMOVMSKB, 2, {REG_GPR|BITS32|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60843, 433, 3484}, + /* 2 : VPMOVMSKB reg32,ymmreg [rm: vex.256.66.0f d7 /r ] AVX2,FUTURE */ + /* 270(001 005) 001(d7) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMOVMSKB, 2, {REG_GPR|BITS32|RN_L16,YMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63881, 467, 4141}, + /* 3 : VPMOVMSKB reg64,ymmreg [rm: vex.256.66.0f d7 /r ] AVX2,FUTURE */ + /* 270(001 005) 001(d7) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMOVMSKB, 2, {REG_GPR|BITS64|RN_L16,YMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63881, 467, 4142}, +}; + +static const struct itemplate instrux_VPMOVSXBW[5] = { + /* 0 : VPMOVSXBW xmmreg,xmmrm64 [rm: vex.128.66.0f38 20 /r ] AVX,SANDYBRIDGE */ + /* 270(002 001) 001(20) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMOVSXBW, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60850, 433, 3485}, + /* 1 : VPMOVSXBW ymmreg,xmmrm128 [rm: vex.256.66.0f38 20 /r ] AVX2,FUTURE */ + /* 270(002 005) 001(20) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMOVSXBW, 2, {YMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63888, 467, 4143}, + /* 2 : VPMOVSXBW xmmreg|mask|z,xmmrm64 [rm:hvm: evex.128.66.0f38.wig 20 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7d 08) 314 001(20) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMOVSXBW, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39928, 555, 6363}, + /* 3 : VPMOVSXBW ymmreg|mask|z,xmmrm128 [rm:hvm: evex.256.66.0f38.wig 20 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7d 28) 314 001(20) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMOVSXBW, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39937, 555, 6364}, + /* 4 : VPMOVSXBW zmmreg|mask|z,ymmrm256 [rm:hvm: evex.512.66.0f38.wig 20 /r ] AVX512BW,FUTURE */ + /* 250(f2 7d 48) 314 001(20) 110 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPMOVSXBW, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39946, 556, 6365}, +}; + +static const struct itemplate instrux_VPMOVSXBD[6] = { + /* 0 : VPMOVSXBD xmmreg,xmmrm32 [rm: vex.128.66.0f38 21 /r ] AVX,SANDYBRIDGE */ + /* 270(002 001) 001(21) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMOVSXBD, 2, {XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60857, 433, 3486}, + /* 1 : VPMOVSXBD ymmreg,mem64 [rm: vex.256.66.0f38 21 /r ] AVX2,FUTURE */ + /* 270(002 005) 001(21) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMOVSXBD, 2, {YMMREG|RN_L16,MEMORY|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63895, 467, 4144}, + /* 2 : VPMOVSXBD ymmreg,xmmreg [rm: vex.256.66.0f38 21 /r ] AVX2,FUTURE */ + /* 270(002 005) 001(21) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMOVSXBD, 2, {YMMREG|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63895, 467, 4145}, + /* 3 : VPMOVSXBD xmmreg|mask|z,xmmrm32 [rm:qvm: evex.128.66.0f38.wig 21 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 08) 315 001(21) 110 : WIG,EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVSXBD, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39874, 563, 6357}, + /* 4 : VPMOVSXBD ymmreg|mask|z,xmmrm64 [rm:qvm: evex.256.66.0f38.wig 21 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 28) 315 001(21) 110 : WIG,EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVSXBD, 2, {YMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39883, 563, 6358}, + /* 5 : VPMOVSXBD zmmreg|mask|z,xmmrm128 [rm:qvm: evex.512.66.0f38.wig 21 /r ] AVX512,FUTURE */ + /* 250(f2 7d 48) 315 001(21) 110 : WIG,EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVSXBD, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39892, 552, 6359}, +}; + +static const struct itemplate instrux_VPMOVSXBQ[6] = { + /* 0 : VPMOVSXBQ xmmreg,xmmrm16 [rm: vex.128.66.0f38 22 /r ] AVX,SANDYBRIDGE */ + /* 270(002 001) 001(22) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMOVSXBQ, 2, {XMMREG|RN_L16,RM_XMM|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60864, 433, 3487}, + /* 1 : VPMOVSXBQ ymmreg,mem32 [rm: vex.256.66.0f38 22 /r ] AVX2,FUTURE */ + /* 270(002 005) 001(22) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMOVSXBQ, 2, {YMMREG|RN_L16,MEMORY|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63902, 467, 4146}, + /* 2 : VPMOVSXBQ ymmreg,xmmreg [rm: vex.256.66.0f38 22 /r ] AVX2,FUTURE */ + /* 270(002 005) 001(22) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMOVSXBQ, 2, {YMMREG|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63902, 467, 4147}, + /* 3 : VPMOVSXBQ xmmreg|mask|z,xmmrm16 [rm:ovm: evex.128.66.0f38.wig 22 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 08) 316 001(22) 110 : WIG,EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVSXBQ, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39901, 563, 6360}, + /* 4 : VPMOVSXBQ ymmreg|mask|z,xmmrm32 [rm:ovm: evex.256.66.0f38.wig 22 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 28) 316 001(22) 110 : WIG,EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVSXBQ, 2, {YMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39910, 563, 6361}, + /* 5 : VPMOVSXBQ zmmreg|mask|z,xmmrm64 [rm:ovm: evex.512.66.0f38.wig 22 /r ] AVX512,FUTURE */ + /* 250(f2 7d 48) 316 001(22) 110 : WIG,EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVSXBQ, 2, {ZMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39919, 552, 6362}, +}; + +static const struct itemplate instrux_VPMOVSXWD[5] = { + /* 0 : VPMOVSXWD xmmreg,xmmrm64 [rm: vex.128.66.0f38 23 /r ] AVX,SANDYBRIDGE */ + /* 270(002 001) 001(23) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMOVSXWD, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60871, 433, 3488}, + /* 1 : VPMOVSXWD ymmreg,xmmrm128 [rm: vex.256.66.0f38 23 /r ] AVX2,FUTURE */ + /* 270(002 005) 001(23) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMOVSXWD, 2, {YMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63909, 467, 4148}, + /* 2 : VPMOVSXWD xmmreg|mask|z,xmmrm64 [rm:hvm: evex.128.66.0f38.wig 23 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 08) 314 001(23) 110 : WIG,EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVSXWD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39982, 563, 6369}, + /* 3 : VPMOVSXWD ymmreg|mask|z,xmmrm128 [rm:hvm: evex.256.66.0f38.wig 23 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 28) 314 001(23) 110 : WIG,EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVSXWD, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39991, 563, 6370}, + /* 4 : VPMOVSXWD zmmreg|mask|z,ymmrm256 [rm:hvm: evex.512.66.0f38.wig 23 /r ] AVX512,FUTURE */ + /* 250(f2 7d 48) 314 001(23) 110 : WIG,EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVSXWD, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40000, 552, 6371}, +}; + +static const struct itemplate instrux_VPMOVSXWQ[6] = { + /* 0 : VPMOVSXWQ xmmreg,xmmrm32 [rm: vex.128.66.0f38 24 /r ] AVX,SANDYBRIDGE */ + /* 270(002 001) 001(24) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMOVSXWQ, 2, {XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60878, 433, 3489}, + /* 1 : VPMOVSXWQ ymmreg,mem64 [rm: vex.256.66.0f38 24 /r ] AVX2,FUTURE */ + /* 270(002 005) 001(24) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMOVSXWQ, 2, {YMMREG|RN_L16,MEMORY|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63916, 467, 4149}, + /* 2 : VPMOVSXWQ ymmreg,xmmreg [rm: vex.256.66.0f38 24 /r ] AVX2,FUTURE */ + /* 270(002 005) 001(24) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMOVSXWQ, 2, {YMMREG|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63916, 467, 4150}, + /* 3 : VPMOVSXWQ xmmreg|mask|z,xmmrm32 [rm:qvm: evex.128.66.0f38.wig 24 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 08) 315 001(24) 110 : WIG,EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVSXWQ, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40009, 563, 6372}, + /* 4 : VPMOVSXWQ ymmreg|mask|z,xmmrm64 [rm:qvm: evex.256.66.0f38.wig 24 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 28) 315 001(24) 110 : WIG,EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVSXWQ, 2, {YMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40018, 563, 6373}, + /* 5 : VPMOVSXWQ zmmreg|mask|z,xmmrm128 [rm:qvm: evex.512.66.0f38.wig 24 /r ] AVX512,FUTURE */ + /* 250(f2 7d 48) 315 001(24) 110 : WIG,EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVSXWQ, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40027, 552, 6374}, +}; + +static const struct itemplate instrux_VPMOVSXDQ[5] = { + /* 0 : VPMOVSXDQ xmmreg,xmmrm64 [rm: vex.128.66.0f38 25 /r ] AVX,SANDYBRIDGE */ + /* 270(002 001) 001(25) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMOVSXDQ, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60885, 433, 3490}, + /* 1 : VPMOVSXDQ ymmreg,xmmrm128 [rm: vex.256.66.0f38 25 /r ] AVX2,FUTURE */ + /* 270(002 005) 001(25) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMOVSXDQ, 2, {YMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63923, 467, 4151}, + /* 2 : VPMOVSXDQ xmmreg|mask|z,xmmrm64 [rm:hvm: evex.128.66.0f38.w0 25 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 08) 314 001(25) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVSXDQ, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39955, 543, 6366}, + /* 3 : VPMOVSXDQ ymmreg|mask|z,xmmrm128 [rm:hvm: evex.256.66.0f38.w0 25 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 28) 314 001(25) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVSXDQ, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39964, 543, 6367}, + /* 4 : VPMOVSXDQ zmmreg|mask|z,ymmrm256 [rm:hvm: evex.512.66.0f38.w0 25 /r ] AVX512,FUTURE */ + /* 250(f2 7d 48) 314 001(25) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVSXDQ, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39973, 544, 6368}, +}; + +static const struct itemplate instrux_VPMOVZXBW[5] = { + /* 0 : VPMOVZXBW xmmreg,xmmrm64 [rm: vex.128.66.0f38 30 /r ] AVX,SANDYBRIDGE */ + /* 270(002 001) 001(30) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMOVZXBW, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60892, 433, 3491}, + /* 1 : VPMOVZXBW ymmreg,xmmrm128 [rm: vex.256.66.0f38 30 /r ] AVX2,FUTURE */ + /* 270(002 005) 001(30) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMOVZXBW, 2, {YMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63930, 467, 4152}, + /* 2 : VPMOVZXBW xmmreg|mask|z,xmmrm64 [rm:hvm: evex.128.66.0f38.wig 30 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7d 08) 314 001(30) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMOVZXBW, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40495, 555, 6426}, + /* 3 : VPMOVZXBW ymmreg|mask|z,xmmrm128 [rm:hvm: evex.256.66.0f38.wig 30 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7d 28) 314 001(30) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMOVZXBW, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40504, 555, 6427}, + /* 4 : VPMOVZXBW zmmreg|mask|z,ymmrm256 [rm:hvm: evex.512.66.0f38.wig 30 /r ] AVX512BW,FUTURE */ + /* 250(f2 7d 48) 314 001(30) 110 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPMOVZXBW, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40513, 556, 6428}, +}; + +static const struct itemplate instrux_VPMOVZXBD[6] = { + /* 0 : VPMOVZXBD xmmreg,xmmrm32 [rm: vex.128.66.0f38 31 /r ] AVX,SANDYBRIDGE */ + /* 270(002 001) 001(31) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMOVZXBD, 2, {XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60899, 433, 3492}, + /* 1 : VPMOVZXBD ymmreg,mem64 [rm: vex.256.66.0f38 31 /r ] AVX2,FUTURE */ + /* 270(002 005) 001(31) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMOVZXBD, 2, {YMMREG|RN_L16,MEMORY|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63937, 467, 4153}, + /* 2 : VPMOVZXBD ymmreg,xmmreg [rm: vex.256.66.0f38 31 /r ] AVX2,FUTURE */ + /* 270(002 005) 001(31) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMOVZXBD, 2, {YMMREG|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63937, 467, 4154}, + /* 3 : VPMOVZXBD xmmreg|mask|z,xmmrm32 [rm:qvm: evex.128.66.0f38.wig 31 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 08) 315 001(31) 110 : WIG,EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVZXBD, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40441, 563, 6420}, + /* 4 : VPMOVZXBD ymmreg|mask|z,xmmrm64 [rm:qvm: evex.256.66.0f38.wig 31 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 28) 315 001(31) 110 : WIG,EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVZXBD, 2, {YMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40450, 563, 6421}, + /* 5 : VPMOVZXBD zmmreg|mask|z,xmmrm128 [rm:qvm: evex.512.66.0f38.wig 31 /r ] AVX512,FUTURE */ + /* 250(f2 7d 48) 315 001(31) 110 : WIG,EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVZXBD, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40459, 552, 6422}, +}; + +static const struct itemplate instrux_VPMOVZXBQ[6] = { + /* 0 : VPMOVZXBQ xmmreg,xmmrm16 [rm: vex.128.66.0f38 32 /r ] AVX,SANDYBRIDGE */ + /* 270(002 001) 001(32) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMOVZXBQ, 2, {XMMREG|RN_L16,RM_XMM|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60906, 433, 3493}, + /* 1 : VPMOVZXBQ ymmreg,mem32 [rm: vex.256.66.0f38 32 /r ] AVX2,FUTURE */ + /* 270(002 005) 001(32) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMOVZXBQ, 2, {YMMREG|RN_L16,MEMORY|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63944, 467, 4155}, + /* 2 : VPMOVZXBQ ymmreg,xmmreg [rm: vex.256.66.0f38 32 /r ] AVX2,FUTURE */ + /* 270(002 005) 001(32) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMOVZXBQ, 2, {YMMREG|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63944, 467, 4156}, + /* 3 : VPMOVZXBQ xmmreg|mask|z,xmmrm16 [rm:ovm: evex.128.66.0f38.wig 32 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 08) 316 001(32) 110 : WIG,EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVZXBQ, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40468, 563, 6423}, + /* 4 : VPMOVZXBQ ymmreg|mask|z,xmmrm32 [rm:ovm: evex.256.66.0f38.wig 32 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 28) 316 001(32) 110 : WIG,EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVZXBQ, 2, {YMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40477, 563, 6424}, + /* 5 : VPMOVZXBQ zmmreg|mask|z,xmmrm64 [rm:ovm: evex.512.66.0f38.wig 32 /r ] AVX512,FUTURE */ + /* 250(f2 7d 48) 316 001(32) 110 : WIG,EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVZXBQ, 2, {ZMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40486, 552, 6425}, +}; + +static const struct itemplate instrux_VPMOVZXWD[5] = { + /* 0 : VPMOVZXWD xmmreg,xmmrm64 [rm: vex.128.66.0f38 33 /r ] AVX,SANDYBRIDGE */ + /* 270(002 001) 001(33) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMOVZXWD, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60913, 433, 3494}, + /* 1 : VPMOVZXWD ymmreg,xmmrm128 [rm: vex.256.66.0f38 33 /r ] AVX2,FUTURE */ + /* 270(002 005) 001(33) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMOVZXWD, 2, {YMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63951, 467, 4157}, + /* 2 : VPMOVZXWD xmmreg|mask|z,xmmrm64 [rm:hvm: evex.128.66.0f38.wig 33 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 08) 314 001(33) 110 : WIG,EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVZXWD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40549, 563, 6432}, + /* 3 : VPMOVZXWD ymmreg|mask|z,xmmrm128 [rm:hvm: evex.256.66.0f38.wig 33 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 28) 314 001(33) 110 : WIG,EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVZXWD, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40558, 563, 6433}, + /* 4 : VPMOVZXWD zmmreg|mask|z,ymmrm256 [rm:hvm: evex.512.66.0f38.wig 33 /r ] AVX512,FUTURE */ + /* 250(f2 7d 48) 314 001(33) 110 : WIG,EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVZXWD, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40567, 552, 6434}, +}; + +static const struct itemplate instrux_VPMOVZXWQ[6] = { + /* 0 : VPMOVZXWQ xmmreg,xmmrm32 [rm: vex.128.66.0f38 34 /r ] AVX,SANDYBRIDGE */ + /* 270(002 001) 001(34) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMOVZXWQ, 2, {XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60920, 433, 3495}, + /* 1 : VPMOVZXWQ ymmreg,mem64 [rm: vex.256.66.0f38 34 /r ] AVX2,FUTURE */ + /* 270(002 005) 001(34) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMOVZXWQ, 2, {YMMREG|RN_L16,MEMORY|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63958, 467, 4158}, + /* 2 : VPMOVZXWQ ymmreg,xmmreg [rm: vex.256.66.0f38 34 /r ] AVX2,FUTURE */ + /* 270(002 005) 001(34) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMOVZXWQ, 2, {YMMREG|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63958, 467, 4159}, + /* 3 : VPMOVZXWQ xmmreg|mask|z,xmmrm32 [rm:qvm: evex.128.66.0f38.wig 34 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 08) 315 001(34) 110 : WIG,EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVZXWQ, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40576, 563, 6435}, + /* 4 : VPMOVZXWQ ymmreg|mask|z,xmmrm64 [rm:qvm: evex.256.66.0f38.wig 34 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 28) 315 001(34) 110 : WIG,EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVZXWQ, 2, {YMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40585, 563, 6436}, + /* 5 : VPMOVZXWQ zmmreg|mask|z,xmmrm128 [rm:qvm: evex.512.66.0f38.wig 34 /r ] AVX512,FUTURE */ + /* 250(f2 7d 48) 315 001(34) 110 : WIG,EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVZXWQ, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40594, 552, 6437}, +}; + +static const struct itemplate instrux_VPMOVZXDQ[5] = { + /* 0 : VPMOVZXDQ xmmreg,xmmrm64 [rm: vex.128.66.0f38 35 /r ] AVX,SANDYBRIDGE */ + /* 270(002 001) 001(35) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMOVZXDQ, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60927, 433, 3496}, + /* 1 : VPMOVZXDQ ymmreg,xmmrm128 [rm: vex.256.66.0f38 35 /r ] AVX2,FUTURE */ + /* 270(002 005) 001(35) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMOVZXDQ, 2, {YMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63965, 467, 4160}, + /* 2 : VPMOVZXDQ xmmreg|mask|z,xmmrm64 [rm:hvm: evex.128.66.0f38.w0 35 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 08) 314 001(35) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVZXDQ, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40522, 543, 6429}, + /* 3 : VPMOVZXDQ ymmreg|mask|z,xmmrm128 [rm:hvm: evex.256.66.0f38.w0 35 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 28) 314 001(35) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVZXDQ, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40531, 543, 6430}, + /* 4 : VPMOVZXDQ zmmreg|mask|z,ymmrm256 [rm:hvm: evex.512.66.0f38.w0 35 /r ] AVX512,FUTURE */ + /* 250(f2 7d 48) 314 001(35) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVZXDQ, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40540, 544, 6431}, +}; + +static const struct itemplate instrux_VPMULHUW[10] = { + /* 0 : VPMULHUW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f e4 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(e4) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMULHUW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60934, 433, 3497}, + /* 1 : VPMULHUW xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f e4 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(e4) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMULHUW, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60941, 433, 3497}, + /* 2 : VPMULHUW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f e4 /r ] AVX2,FUTURE */ + /* 261(001 005) 001(e4) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMULHUW, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64000, 467, 4163}, + /* 3 : VPMULHUW ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f e4 /r ] ND,AVX2,FUTURE */ + /* 260(001 005) 001(e4) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMULHUW, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64007, 467, 4163}, + /* 4 : VPMULHUW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig e4 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 303 001(e4) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMULHUW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40711, 555, 6444}, + /* 5 : VPMULHUW xmmreg|mask|z,xmmrm128 [r+vm:fvm: evex.nds.128.66.0f.wig e4 /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 08) 303 001(e4) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMULHUW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40720, 555, 6444}, + /* 6 : VPMULHUW ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig e4 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 303 001(e4) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMULHUW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40729, 555, 6445}, + /* 7 : VPMULHUW ymmreg|mask|z,ymmrm256 [r+vm:fvm: evex.nds.256.66.0f.wig e4 /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 28) 303 001(e4) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMULHUW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40738, 555, 6445}, + /* 8 : VPMULHUW zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig e4 /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 303 001(e4) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPMULHUW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40747, 556, 6446}, + /* 9 : VPMULHUW zmmreg|mask|z,zmmrm512 [r+vm:fvm: evex.nds.512.66.0f.wig e4 /r ] ND,AVX512BW,FUTURE */ + /* 240(f1 7d 48) 303 001(e4) 110 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPMULHUW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40756, 556, 6446}, +}; + +static const struct itemplate instrux_VPMULHRSW[10] = { + /* 0 : VPMULHRSW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 0b /r ] AVX,SANDYBRIDGE */ + /* 261(002 001) 001(0b) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMULHRSW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60948, 433, 3498}, + /* 1 : VPMULHRSW xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f38 0b /r ] ND,AVX,SANDYBRIDGE */ + /* 260(002 001) 001(0b) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMULHRSW, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60955, 433, 3498}, + /* 2 : VPMULHRSW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 0b /r ] AVX2,FUTURE */ + /* 261(002 005) 001(0b) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMULHRSW, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63986, 467, 4162}, + /* 3 : VPMULHRSW ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f38 0b /r ] ND,AVX2,FUTURE */ + /* 260(002 005) 001(0b) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMULHRSW, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63993, 467, 4162}, + /* 4 : VPMULHRSW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f38.wig 0b /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 7d 08) 303 001(0b) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMULHRSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40657, 555, 6441}, + /* 5 : VPMULHRSW xmmreg|mask|z,xmmrm128 [r+vm:fvm: evex.nds.128.66.0f38.wig 0b /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f2 7d 08) 303 001(0b) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMULHRSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40666, 555, 6441}, + /* 6 : VPMULHRSW ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f38.wig 0b /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 7d 28) 303 001(0b) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMULHRSW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40675, 555, 6442}, + /* 7 : VPMULHRSW ymmreg|mask|z,ymmrm256 [r+vm:fvm: evex.nds.256.66.0f38.wig 0b /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f2 7d 28) 303 001(0b) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMULHRSW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40684, 555, 6442}, + /* 8 : VPMULHRSW zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f38.wig 0b /r ] AVX512BW,FUTURE */ + /* 241(f2 7d 48) 303 001(0b) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPMULHRSW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40693, 556, 6443}, + /* 9 : VPMULHRSW zmmreg|mask|z,zmmrm512 [r+vm:fvm: evex.nds.512.66.0f38.wig 0b /r ] ND,AVX512BW,FUTURE */ + /* 240(f2 7d 48) 303 001(0b) 110 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPMULHRSW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40702, 556, 6443}, +}; + +static const struct itemplate instrux_VPMULHW[10] = { + /* 0 : VPMULHW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f e5 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(e5) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMULHW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60962, 433, 3499}, + /* 1 : VPMULHW xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f e5 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(e5) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMULHW, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60969, 433, 3499}, + /* 2 : VPMULHW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f e5 /r ] AVX2,FUTURE */ + /* 261(001 005) 001(e5) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMULHW, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64014, 467, 4164}, + /* 3 : VPMULHW ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f e5 /r ] ND,AVX2,FUTURE */ + /* 260(001 005) 001(e5) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMULHW, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64021, 467, 4164}, + /* 4 : VPMULHW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig e5 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 303 001(e5) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMULHW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40765, 555, 6447}, + /* 5 : VPMULHW xmmreg|mask|z,xmmrm128 [r+vm:fvm: evex.nds.128.66.0f.wig e5 /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 08) 303 001(e5) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMULHW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40774, 555, 6447}, + /* 6 : VPMULHW ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig e5 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 303 001(e5) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMULHW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40783, 555, 6448}, + /* 7 : VPMULHW ymmreg|mask|z,ymmrm256 [r+vm:fvm: evex.nds.256.66.0f.wig e5 /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 28) 303 001(e5) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMULHW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40792, 555, 6448}, + /* 8 : VPMULHW zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig e5 /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 303 001(e5) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPMULHW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40801, 556, 6449}, + /* 9 : VPMULHW zmmreg|mask|z,zmmrm512 [r+vm:fvm: evex.nds.512.66.0f.wig e5 /r ] ND,AVX512BW,FUTURE */ + /* 240(f1 7d 48) 303 001(e5) 110 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPMULHW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40810, 556, 6449}, +}; + +static const struct itemplate instrux_VPMULLW[10] = { + /* 0 : VPMULLW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f d5 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(d5) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMULLW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60976, 433, 3500}, + /* 1 : VPMULLW xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f d5 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(d5) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMULLW, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60983, 433, 3500}, + /* 2 : VPMULLW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f d5 /r ] AVX2,FUTURE */ + /* 261(001 005) 001(d5) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMULLW, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64028, 467, 4165}, + /* 3 : VPMULLW ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f d5 /r ] ND,AVX2,FUTURE */ + /* 260(001 005) 001(d5) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMULLW, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64035, 467, 4165}, + /* 4 : VPMULLW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig d5 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 303 001(d5) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMULLW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40927, 555, 6456}, + /* 5 : VPMULLW xmmreg|mask|z,xmmrm128 [r+vm:fvm: evex.nds.128.66.0f.wig d5 /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 08) 303 001(d5) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMULLW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40936, 555, 6456}, + /* 6 : VPMULLW ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig d5 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 303 001(d5) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMULLW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40945, 555, 6457}, + /* 7 : VPMULLW ymmreg|mask|z,ymmrm256 [r+vm:fvm: evex.nds.256.66.0f.wig d5 /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 28) 303 001(d5) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMULLW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40954, 555, 6457}, + /* 8 : VPMULLW zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig d5 /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 303 001(d5) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPMULLW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40963, 556, 6458}, + /* 9 : VPMULLW zmmreg|mask|z,zmmrm512 [r+vm:fvm: evex.nds.512.66.0f.wig d5 /r ] ND,AVX512BW,FUTURE */ + /* 240(f1 7d 48) 303 001(d5) 110 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPMULLW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40972, 556, 6458}, +}; + +static const struct itemplate instrux_VPMULLD[10] = { + /* 0 : VPMULLD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 40 /r ] AVX,SANDYBRIDGE */ + /* 261(002 001) 001(40) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMULLD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60990, 433, 3501}, + /* 1 : VPMULLD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f38 40 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(002 001) 001(40) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMULLD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60997, 433, 3501}, + /* 2 : VPMULLD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 40 /r ] AVX2,FUTURE */ + /* 261(002 005) 001(40) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMULLD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64042, 467, 4166}, + /* 3 : VPMULLD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f38 40 /r ] ND,AVX2,FUTURE */ + /* 260(002 005) 001(40) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMULLD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64049, 467, 4166}, + /* 4 : VPMULLD xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 40 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(40) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMULLD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+40819, 543, 6450}, + /* 5 : VPMULLD xmmreg|mask|z,xmmrm128|b32 [r+vm:fv: evex.nds.128.66.0f38.w0 40 /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f2 7d 08) 301 001(40) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMULLD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+40828, 543, 6450}, + /* 6 : VPMULLD ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 40 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(40) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMULLD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+40837, 543, 6451}, + /* 7 : VPMULLD ymmreg|mask|z,ymmrm256|b32 [r+vm:fv: evex.nds.256.66.0f38.w0 40 /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f2 7d 28) 301 001(40) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMULLD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+40846, 543, 6451}, + /* 8 : VPMULLD zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f38.w0 40 /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(40) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMULLD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+40855, 544, 6452}, + /* 9 : VPMULLD zmmreg|mask|z,zmmrm512|b32 [r+vm:fv: evex.nds.512.66.0f38.w0 40 /r ] ND,AVX512,FUTURE */ + /* 240(f2 7d 48) 301 001(40) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMULLD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+40864, 544, 6452}, +}; + +static const struct itemplate instrux_VPMULUDQ[10] = { + /* 0 : VPMULUDQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f f4 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(f4) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMULUDQ, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61004, 433, 3502}, + /* 1 : VPMULUDQ xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f f4 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(f4) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMULUDQ, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61011, 433, 3502}, + /* 2 : VPMULUDQ ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f f4 /r ] AVX2,FUTURE */ + /* 261(001 005) 001(f4) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMULUDQ, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64056, 467, 4167}, + /* 3 : VPMULUDQ ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f f4 /r ] ND,AVX2,FUTURE */ + /* 260(001 005) 001(f4) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMULUDQ, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64063, 467, 4167}, + /* 4 : VPMULUDQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f.w1 f4 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(f4) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMULUDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+41035, 543, 6462}, + /* 5 : VPMULUDQ xmmreg|mask|z,xmmrm128|b64 [r+vm:fv: evex.nds.128.66.0f.w1 f4 /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 fd 08) 301 001(f4) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMULUDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+41044, 543, 6462}, + /* 6 : VPMULUDQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f.w1 f4 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(f4) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMULUDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+41053, 543, 6463}, + /* 7 : VPMULUDQ ymmreg|mask|z,ymmrm256|b64 [r+vm:fv: evex.nds.256.66.0f.w1 f4 /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 fd 28) 301 001(f4) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMULUDQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+41062, 543, 6463}, + /* 8 : VPMULUDQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f.w1 f4 /r ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(f4) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMULUDQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+41071, 544, 6464}, + /* 9 : VPMULUDQ zmmreg|mask|z,zmmrm512|b64 [r+vm:fv: evex.nds.512.66.0f.w1 f4 /r ] ND,AVX512,FUTURE */ + /* 240(f1 fd 48) 301 001(f4) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMULUDQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+41080, 544, 6464}, +}; + +static const struct itemplate instrux_VPMULDQ[10] = { + /* 0 : VPMULDQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 28 /r ] AVX,SANDYBRIDGE */ + /* 261(002 001) 001(28) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMULDQ, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61018, 433, 3503}, + /* 1 : VPMULDQ xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f38 28 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(002 001) 001(28) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMULDQ, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61025, 433, 3503}, + /* 2 : VPMULDQ ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 28 /r ] AVX2,FUTURE */ + /* 261(002 005) 001(28) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMULDQ, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63972, 467, 4161}, + /* 3 : VPMULDQ ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f38 28 /r ] ND,AVX2,FUTURE */ + /* 260(002 005) 001(28) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMULDQ, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63979, 467, 4161}, + /* 4 : VPMULDQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 28 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(28) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMULDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+40603, 543, 6438}, + /* 5 : VPMULDQ xmmreg|mask|z,xmmrm128|b64 [r+vm:fv: evex.nds.128.66.0f38.w1 28 /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f2 fd 08) 301 001(28) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMULDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+40612, 543, 6438}, + /* 6 : VPMULDQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 28 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(28) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMULDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+40621, 543, 6439}, + /* 7 : VPMULDQ ymmreg|mask|z,ymmrm256|b64 [r+vm:fv: evex.nds.256.66.0f38.w1 28 /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f2 fd 28) 301 001(28) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMULDQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+40630, 543, 6439}, + /* 8 : VPMULDQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 28 /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(28) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMULDQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+40639, 544, 6440}, + /* 9 : VPMULDQ zmmreg|mask|z,zmmrm512|b64 [r+vm:fv: evex.nds.512.66.0f38.w1 28 /r ] ND,AVX512,FUTURE */ + /* 240(f2 fd 48) 301 001(28) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMULDQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+40648, 544, 6440}, +}; + +static const struct itemplate instrux_VPOR[4] = { + /* 0 : VPOR xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f eb /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(eb) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPOR, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61032, 433, 3504}, + /* 1 : VPOR xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f eb /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(eb) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPOR, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61039, 433, 3504}, + /* 2 : VPOR ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f eb /r ] AVX2,FUTURE */ + /* 261(001 005) 001(eb) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPOR, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64070, 467, 4168}, + /* 3 : VPOR ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f eb /r ] ND,AVX2,FUTURE */ + /* 260(001 005) 001(eb) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPOR, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64077, 467, 4168}, +}; + +static const struct itemplate instrux_VPSADBW[10] = { + /* 0 : VPSADBW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f f6 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(f6) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSADBW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61046, 433, 3505}, + /* 1 : VPSADBW xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f f6 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(f6) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSADBW, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61053, 433, 3505}, + /* 2 : VPSADBW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f f6 /r ] AVX2,FUTURE */ + /* 261(001 005) 001(f6) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSADBW, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64084, 467, 4169}, + /* 3 : VPSADBW ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f f6 /r ] ND,AVX2,FUTURE */ + /* 260(001 005) 001(f6) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSADBW, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64091, 467, 4169}, + /* 4 : VPSADBW xmmreg,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig f6 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 303 001(f6) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSADBW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+41413, 555, 6495}, + /* 5 : VPSADBW xmmreg,xmmrm128 [r+vm:fvm: evex.nds.128.66.0f.wig f6 /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 08) 303 001(f6) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSADBW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+41422, 555, 6495}, + /* 6 : VPSADBW ymmreg,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig f6 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 303 001(f6) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSADBW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+41431, 555, 6496}, + /* 7 : VPSADBW ymmreg,ymmrm256 [r+vm:fvm: evex.nds.256.66.0f.wig f6 /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 28) 303 001(f6) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSADBW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+41440, 555, 6496}, + /* 8 : VPSADBW zmmreg,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig f6 /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 303 001(f6) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPSADBW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, NO_DECORATOR, nasm_bytecodes+41449, 556, 6497}, + /* 9 : VPSADBW zmmreg,zmmrm512 [r+vm:fvm: evex.nds.512.66.0f.wig f6 /r ] ND,AVX512BW,FUTURE */ + /* 240(f1 7d 48) 303 001(f6) 110 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPSADBW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+41458, 556, 6497}, +}; + +static const struct itemplate instrux_VPSHUFB[10] = { + /* 0 : VPSHUFB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 00 /r ] AVX,SANDYBRIDGE */ + /* 261(002 001) 001(00) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSHUFB, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61060, 433, 3506}, + /* 1 : VPSHUFB xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f38 00 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(002 001) 001(00) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSHUFB, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61067, 433, 3506}, + /* 2 : VPSHUFB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 00 /r ] AVX2,FUTURE */ + /* 261(002 005) 001(00) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSHUFB, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64098, 467, 4170}, + /* 3 : VPSHUFB ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f38 00 /r ] ND,AVX2,FUTURE */ + /* 260(002 005) 001(00) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSHUFB, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64105, 467, 4170}, + /* 4 : VPSHUFB xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f38.wig 00 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 7d 08) 303 001(00) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSHUFB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+41467, 555, 6510}, + /* 5 : VPSHUFB xmmreg|mask|z,xmmrm128 [r+vm:fvm: evex.nds.128.66.0f38.wig 00 /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f2 7d 08) 303 001(00) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSHUFB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+41476, 555, 6510}, + /* 6 : VPSHUFB ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f38.wig 00 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 7d 28) 303 001(00) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSHUFB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+41485, 555, 6511}, + /* 7 : VPSHUFB ymmreg|mask|z,ymmrm256 [r+vm:fvm: evex.nds.256.66.0f38.wig 00 /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f2 7d 28) 303 001(00) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSHUFB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+41494, 555, 6511}, + /* 8 : VPSHUFB zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f38.wig 00 /r ] AVX512BW,FUTURE */ + /* 241(f2 7d 48) 303 001(00) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPSHUFB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+41503, 556, 6512}, + /* 9 : VPSHUFB zmmreg|mask|z,zmmrm512 [r+vm:fvm: evex.nds.512.66.0f38.wig 00 /r ] ND,AVX512BW,FUTURE */ + /* 240(f2 7d 48) 303 001(00) 110 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPSHUFB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+41512, 556, 6512}, +}; + +static const struct itemplate instrux_VPSHUFD[5] = { + /* 0 : VPSHUFD xmmreg,xmmrm128,imm8 [rmi: vex.128.66.0f 70 /r ib ] AVX,SANDYBRIDGE */ + /* 270(001 001) 001(70) 110 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSHUFD, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52315, 433, 3507}, + /* 1 : VPSHUFD ymmreg,ymmrm256,imm8 [rmi: vex.256.66.0f 70 /r ib ] AVX2,FUTURE */ + /* 270(001 005) 001(70) 110 022 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSHUFD, 3, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54307, 467, 4171}, + /* 2 : VPSHUFD xmmreg|mask|z,xmmrm128|b32,imm8 [rmi:fv: evex.128.66.0f.w0 70 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7d 08) 301 001(70) 110 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSHUFD, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20463, 543, 6513}, + /* 3 : VPSHUFD ymmreg|mask|z,ymmrm256|b32,imm8 [rmi:fv: evex.256.66.0f.w0 70 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7d 28) 301 001(70) 110 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSHUFD, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20473, 543, 6514}, + /* 4 : VPSHUFD zmmreg|mask|z,zmmrm512|b32,imm8 [rmi:fv: evex.512.66.0f.w0 70 /r ib ] AVX512,FUTURE */ + /* 250(f1 7d 48) 301 001(70) 110 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VPSHUFD, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20483, 544, 6515}, +}; + +static const struct itemplate instrux_VPSHUFHW[5] = { + /* 0 : VPSHUFHW xmmreg,xmmrm128,imm8 [rmi: vex.128.f3.0f 70 /r ib ] AVX,SANDYBRIDGE */ + /* 270(001 002) 001(70) 110 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSHUFHW, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52323, 433, 3508}, + /* 1 : VPSHUFHW ymmreg,ymmrm256,imm8 [rmi: vex.256.f3.0f 70 /r ib ] AVX2,FUTURE */ + /* 270(001 006) 001(70) 110 022 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSHUFHW, 3, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54315, 467, 4172}, + /* 2 : VPSHUFHW xmmreg|mask|z,xmmrm128,imm8 [rmi:fvm: evex.128.f3.0f.wig 70 /r ib ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f1 7e 08) 303 001(70) 110 022 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSHUFHW, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20493, 555, 6516}, + /* 3 : VPSHUFHW ymmreg|mask|z,ymmrm256,imm8 [rmi:fvm: evex.256.f3.0f.wig 70 /r ib ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f1 7e 28) 303 001(70) 110 022 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSHUFHW, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20503, 555, 6517}, + /* 4 : VPSHUFHW zmmreg|mask|z,zmmrm512,imm8 [rmi:fvm: evex.512.f3.0f.wig 70 /r ib ] AVX512BW,FUTURE */ + /* 250(f1 7e 48) 303 001(70) 110 022 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPSHUFHW, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20513, 556, 6518}, +}; + +static const struct itemplate instrux_VPSHUFLW[5] = { + /* 0 : VPSHUFLW xmmreg,xmmrm128,imm8 [rmi: vex.128.f2.0f 70 /r ib ] AVX,SANDYBRIDGE */ + /* 270(001 003) 001(70) 110 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSHUFLW, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52331, 433, 3509}, + /* 1 : VPSHUFLW ymmreg,ymmrm256,imm8 [rmi: vex.256.f2.0f 70 /r ib ] AVX2,FUTURE */ + /* 270(001 007) 001(70) 110 022 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSHUFLW, 3, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54323, 467, 4173}, + /* 2 : VPSHUFLW xmmreg|mask|z,xmmrm128,imm8 [rmi:fvm: evex.128.f2.0f.wig 70 /r ib ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f1 7f 08) 303 001(70) 110 022 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSHUFLW, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20523, 555, 6519}, + /* 3 : VPSHUFLW ymmreg|mask|z,ymmrm256,imm8 [rmi:fvm: evex.256.f2.0f.wig 70 /r ib ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f1 7f 28) 303 001(70) 110 022 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSHUFLW, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20533, 555, 6520}, + /* 4 : VPSHUFLW zmmreg|mask|z,zmmrm512,imm8 [rmi:fvm: evex.512.f2.0f.wig 70 /r ib ] AVX512BW,FUTURE */ + /* 250(f1 7f 48) 303 001(70) 110 022 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPSHUFLW, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20543, 556, 6521}, +}; + +static const struct itemplate instrux_VPSIGNB[4] = { + /* 0 : VPSIGNB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 08 /r ] AVX,SANDYBRIDGE */ + /* 261(002 001) 001(08) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSIGNB, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61074, 433, 3510}, + /* 1 : VPSIGNB xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f38 08 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(002 001) 001(08) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSIGNB, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61081, 433, 3510}, + /* 2 : VPSIGNB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 08 /r ] AVX2,FUTURE */ + /* 261(002 005) 001(08) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSIGNB, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64112, 467, 4174}, + /* 3 : VPSIGNB ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f38 08 /r ] ND,AVX2,FUTURE */ + /* 260(002 005) 001(08) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSIGNB, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64119, 467, 4174}, +}; + +static const struct itemplate instrux_VPSIGNW[4] = { + /* 0 : VPSIGNW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 09 /r ] AVX,SANDYBRIDGE */ + /* 261(002 001) 001(09) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSIGNW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61088, 433, 3511}, + /* 1 : VPSIGNW xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f38 09 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(002 001) 001(09) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSIGNW, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61095, 433, 3511}, + /* 2 : VPSIGNW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 09 /r ] AVX2,FUTURE */ + /* 261(002 005) 001(09) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSIGNW, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64126, 467, 4175}, + /* 3 : VPSIGNW ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f38 09 /r ] ND,AVX2,FUTURE */ + /* 260(002 005) 001(09) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSIGNW, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64133, 467, 4175}, +}; + +static const struct itemplate instrux_VPSIGND[4] = { + /* 0 : VPSIGND xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 0a /r ] AVX,SANDYBRIDGE */ + /* 261(002 001) 001(0a) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSIGND, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61102, 433, 3512}, + /* 1 : VPSIGND xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f38 0a /r ] ND,AVX,SANDYBRIDGE */ + /* 260(002 001) 001(0a) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSIGND, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61109, 433, 3512}, + /* 2 : VPSIGND ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 0a /r ] AVX2,FUTURE */ + /* 261(002 005) 001(0a) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSIGND, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64140, 467, 4176}, + /* 3 : VPSIGND ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f38 0a /r ] ND,AVX2,FUTURE */ + /* 260(002 005) 001(0a) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSIGND, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64147, 467, 4176}, +}; + +static const struct itemplate instrux_VPSLLDQ[10] = { + /* 0 : VPSLLDQ xmmreg,xmmreg*,imm8 [vmi: vex.ndd.128.66.0f 73 /7 ib ] AVX,SANDYBRIDGE */ + /* 260(001 001) 001(73) 217 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSLLDQ, 3, {XMMREG|RN_L16,XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52339, 433, 3513}, + /* 1 : VPSLLDQ xmmreg,imm8 [v+mi: vex.ndd.128.66.0f 73 /7 ib ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(73) 207 021 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSLLDQ, 2, {XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+52347, 433, 3513}, + /* 2 : VPSLLDQ ymmreg,ymmreg*,imm8 [vmi: vex.ndd.256.66.0f 73 /7 ib ] AVX2,FUTURE */ + /* 260(001 005) 001(73) 217 022 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSLLDQ, 3, {YMMREG|RN_L16,YMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54331, 467, 4177}, + /* 3 : VPSLLDQ ymmreg,imm8 [v+mi: vex.ndd.256.66.0f 73 /7 ib ] ND,AVX2,FUTURE */ + /* 260(001 005) 001(73) 207 021 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSLLDQ, 2, {YMMREG|RN_L16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+54339, 467, 4177}, + /* 4 : VPSLLDQ xmmreg,xmmrm128*,imm8 [vmi:fvm: evex.nds.128.66.0f.wig 73 /7 ib ] AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 08) 303 001(73) 217 022 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSLLDQ, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+20613, 555, 6528}, + /* 5 : VPSLLDQ xmmreg,imm8 [v+mi:fvm: evex.nds.128.66.0f.wig 73 /7 ib ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 08) 303 001(73) 207 021 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSLLDQ, 2, {XMMREG,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+20623, 555, 6528}, + /* 6 : VPSLLDQ ymmreg,ymmrm256*,imm8 [vmi:fvm: evex.nds.256.66.0f.wig 73 /7 ib ] AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 28) 303 001(73) 217 022 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSLLDQ, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+20633, 555, 6529}, + /* 7 : VPSLLDQ ymmreg,imm8 [v+mi:fvm: evex.nds.256.66.0f.wig 73 /7 ib ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 28) 303 001(73) 207 021 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSLLDQ, 2, {YMMREG,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+20643, 555, 6529}, + /* 8 : VPSLLDQ zmmreg,zmmrm512*,imm8 [vmi:fvm: evex.nds.512.66.0f.wig 73 /7 ib ] AVX512BW,FUTURE */ + /* 240(f1 7d 48) 303 001(73) 217 022 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPSLLDQ, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+20653, 556, 6530}, + /* 9 : VPSLLDQ zmmreg,imm8 [v+mi:fvm: evex.nds.512.66.0f.wig 73 /7 ib ] ND,AVX512BW,FUTURE */ + /* 240(f1 7d 48) 303 001(73) 207 021 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPSLLDQ, 2, {ZMMREG,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+20663, 556, 6530}, +}; + +static const struct itemplate instrux_VPSRLDQ[10] = { + /* 0 : VPSRLDQ xmmreg,xmmreg*,imm8 [vmi: vex.ndd.128.66.0f 73 /3 ib ] AVX,SANDYBRIDGE */ + /* 260(001 001) 001(73) 213 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSRLDQ, 3, {XMMREG|RN_L16,XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52355, 433, 3514}, + /* 1 : VPSRLDQ xmmreg,imm8 [v+mi: vex.ndd.128.66.0f 73 /3 ib ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(73) 203 021 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSRLDQ, 2, {XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+52363, 433, 3514}, + /* 2 : VPSRLDQ ymmreg,ymmreg*,imm8 [vmi: vex.ndd.256.66.0f 73 /3 ib ] AVX2,FUTURE */ + /* 260(001 005) 001(73) 213 022 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSRLDQ, 3, {YMMREG|RN_L16,YMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54427, 467, 4188}, + /* 3 : VPSRLDQ ymmreg,imm8 [v+mi: vex.ndd.256.66.0f 73 /3 ib ] ND,AVX2,FUTURE */ + /* 260(001 005) 001(73) 203 021 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSRLDQ, 2, {YMMREG|RN_L16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+54435, 467, 4188}, + /* 4 : VPSRLDQ xmmreg,xmmrm128*,imm8 [vmi:fvm: evex.nds.128.66.0f.wig 73 /3 ib ] AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 08) 303 001(73) 213 022 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSRLDQ, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+21033, 555, 6585}, + /* 5 : VPSRLDQ xmmreg,imm8 [v+mi:fvm: evex.nds.128.66.0f.wig 73 /3 ib ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 08) 303 001(73) 203 021 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSRLDQ, 2, {XMMREG,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+21043, 555, 6585}, + /* 6 : VPSRLDQ ymmreg,ymmrm256*,imm8 [vmi:fvm: evex.nds.256.66.0f.wig 73 /3 ib ] AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 28) 303 001(73) 213 022 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSRLDQ, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+21053, 555, 6586}, + /* 7 : VPSRLDQ ymmreg,imm8 [v+mi:fvm: evex.nds.256.66.0f.wig 73 /3 ib ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 28) 303 001(73) 203 021 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSRLDQ, 2, {YMMREG,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+21063, 555, 6586}, + /* 8 : VPSRLDQ zmmreg,zmmrm512*,imm8 [vmi:fvm: evex.nds.512.66.0f.wig 73 /3 ib ] AVX512BW,FUTURE */ + /* 240(f1 7d 48) 303 001(73) 213 022 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPSRLDQ, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+21073, 556, 6587}, + /* 9 : VPSRLDQ zmmreg,imm8 [v+mi:fvm: evex.nds.512.66.0f.wig 73 /3 ib ] ND,AVX512BW,FUTURE */ + /* 240(f1 7d 48) 303 001(73) 203 021 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPSRLDQ, 2, {ZMMREG,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+21083, 556, 6587}, +}; + +static const struct itemplate instrux_VPSLLW[20] = { + /* 0 : VPSLLW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f f1 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(f1) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSLLW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61116, 433, 3515}, + /* 1 : VPSLLW xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f f1 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(f1) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSLLW, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61123, 433, 3515}, + /* 2 : VPSLLW xmmreg,xmmreg*,imm8 [vmi: vex.ndd.128.66.0f 71 /6 ib ] AVX,SANDYBRIDGE */ + /* 260(001 001) 001(71) 216 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSLLW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52371, 433, 3516}, + /* 3 : VPSLLW xmmreg,imm8 [v+mi: vex.ndd.128.66.0f 71 /6 ib ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(71) 206 021 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSLLW, 2, {XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+52379, 433, 3516}, + /* 4 : VPSLLW ymmreg,ymmreg*,xmmrm128 [rvm: vex.nds.256.66.0f f1 /r ] AVX2,FUTURE */ + /* 261(001 005) 001(f1) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSLLW, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64154, 467, 4178}, + /* 5 : VPSLLW ymmreg,xmmrm128 [r+vm: vex.nds.256.66.0f f1 /r ] ND,AVX2,FUTURE */ + /* 260(001 005) 001(f1) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSLLW, 2, {YMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64161, 467, 4178}, + /* 6 : VPSLLW ymmreg,ymmreg*,imm8 [vmi: vex.ndd.256.66.0f 71 /6 ib ] AVX2,FUTURE */ + /* 260(001 005) 001(71) 216 022 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSLLW, 3, {YMMREG|RN_L16,YMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54347, 467, 4179}, + /* 7 : VPSLLW ymmreg,imm8 [v+mi: vex.ndd.256.66.0f 71 /6 ib ] ND,AVX2,FUTURE */ + /* 260(001 005) 001(71) 206 021 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSLLW, 2, {YMMREG|RN_L16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+54355, 467, 4179}, + /* 8 : VPSLLW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:m128: evex.nds.128.66.0f.wig f1 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 317 001(f1) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSLLW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+41791, 555, 6546}, + /* 9 : VPSLLW xmmreg|mask|z,xmmrm128 [r+vm:m128: evex.nds.128.66.0f.wig f1 /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 08) 317 001(f1) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSLLW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+41800, 555, 6546}, + /* 10 : VPSLLW ymmreg|mask|z,ymmreg*,xmmrm128 [rvm:m128: evex.nds.256.66.0f.wig f1 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 317 001(f1) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSLLW, 3, {YMMREG,YMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+41809, 555, 6547}, + /* 11 : VPSLLW ymmreg|mask|z,xmmrm128 [r+vm:m128: evex.nds.256.66.0f.wig f1 /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 28) 317 001(f1) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSLLW, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+41818, 555, 6547}, + /* 12 : VPSLLW zmmreg|mask|z,zmmreg*,xmmrm128 [rvm:m128: evex.nds.512.66.0f.wig f1 /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 317 001(f1) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPSLLW, 3, {ZMMREG,ZMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+41827, 556, 6548}, + /* 13 : VPSLLW zmmreg|mask|z,xmmrm128 [r+vm:m128: evex.nds.512.66.0f.wig f1 /r ] ND,AVX512BW,FUTURE */ + /* 240(f1 7d 48) 317 001(f1) 110 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPSLLW, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+41836, 556, 6548}, + /* 14 : VPSLLW xmmreg|mask|z,xmmrm128*,imm8 [vmi:fvm: evex.nds.128.66.0f.wig 71 /6 ib ] AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 08) 303 001(71) 216 022 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSLLW, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20733, 555, 6549}, + /* 15 : VPSLLW xmmreg|mask|z,imm8 [v+mi:fvm: evex.nds.128.66.0f.wig 71 /6 ib ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 08) 303 001(71) 206 021 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSLLW, 2, {XMMREG,IMM_NORMAL|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20743, 555, 6549}, + /* 16 : VPSLLW ymmreg|mask|z,ymmrm256*,imm8 [vmi:fvm: evex.nds.256.66.0f.wig 71 /6 ib ] AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 28) 303 001(71) 216 022 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSLLW, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20753, 555, 6550}, + /* 17 : VPSLLW ymmreg|mask|z,imm8 [v+mi:fvm: evex.nds.256.66.0f.wig 71 /6 ib ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 28) 303 001(71) 206 021 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSLLW, 2, {YMMREG,IMM_NORMAL|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20763, 555, 6550}, + /* 18 : VPSLLW zmmreg|mask|z,zmmrm512*,imm8 [vmi:fvm: evex.nds.512.66.0f.wig 71 /6 ib ] AVX512BW,FUTURE */ + /* 240(f1 7d 48) 303 001(71) 216 022 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPSLLW, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20773, 556, 6551}, + /* 19 : VPSLLW zmmreg|mask|z,imm8 [v+mi:fvm: evex.nds.512.66.0f.wig 71 /6 ib ] ND,AVX512BW,FUTURE */ + /* 240(f1 7d 48) 303 001(71) 206 021 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPSLLW, 2, {ZMMREG,IMM_NORMAL|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20783, 556, 6551}, +}; + +static const struct itemplate instrux_VPSLLD[20] = { + /* 0 : VPSLLD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f f2 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(f2) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSLLD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61130, 433, 3517}, + /* 1 : VPSLLD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f f2 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(f2) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSLLD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61137, 433, 3517}, + /* 2 : VPSLLD xmmreg,xmmreg*,imm8 [vmi: vex.ndd.128.66.0f 72 /6 ib ] AVX,SANDYBRIDGE */ + /* 260(001 001) 001(72) 216 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSLLD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52387, 433, 3518}, + /* 3 : VPSLLD xmmreg,imm8 [v+mi: vex.ndd.128.66.0f 72 /6 ib ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(72) 206 021 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSLLD, 2, {XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+52395, 433, 3518}, + /* 4 : VPSLLD ymmreg,ymmreg*,xmmrm128 [rvm: vex.nds.256.66.0f f2 /r ] AVX2,FUTURE */ + /* 261(001 005) 001(f2) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSLLD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64168, 467, 4180}, + /* 5 : VPSLLD ymmreg,xmmrm128 [r+vm: vex.nds.256.66.0f f2 /r ] ND,AVX2,FUTURE */ + /* 260(001 005) 001(f2) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSLLD, 2, {YMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64175, 467, 4180}, + /* 6 : VPSLLD ymmreg,ymmreg*,imm8 [vmi: vex.ndd.256.66.0f 72 /6 ib ] AVX2,FUTURE */ + /* 260(001 005) 001(72) 216 022 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSLLD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54363, 467, 4181}, + /* 7 : VPSLLD ymmreg,imm8 [v+mi: vex.ndd.256.66.0f 72 /6 ib ] ND,AVX2,FUTURE */ + /* 260(001 005) 001(72) 206 021 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSLLD, 2, {YMMREG|RN_L16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+54371, 467, 4181}, + /* 8 : VPSLLD xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:m128: evex.nds.128.66.0f.w0 f2 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7d 08) 317 001(f2) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSLLD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+41521, 543, 6522}, + /* 9 : VPSLLD xmmreg|mask|z,xmmrm128 [r+vm:m128: evex.nds.128.66.0f.w0 f2 /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 7d 08) 317 001(f2) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSLLD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+41530, 543, 6522}, + /* 10 : VPSLLD ymmreg|mask|z,ymmreg*,xmmrm128 [rvm:m128: evex.nds.256.66.0f.w0 f2 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7d 28) 317 001(f2) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSLLD, 3, {YMMREG,YMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+41539, 543, 6523}, + /* 11 : VPSLLD ymmreg|mask|z,xmmrm128 [r+vm:m128: evex.nds.256.66.0f.w0 f2 /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 7d 28) 317 001(f2) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSLLD, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+41548, 543, 6523}, + /* 12 : VPSLLD zmmreg|mask|z,zmmreg*,xmmrm128 [rvm:m128: evex.nds.512.66.0f.w0 f2 /r ] AVX512,FUTURE */ + /* 241(f1 7d 48) 317 001(f2) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPSLLD, 3, {ZMMREG,ZMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+41557, 544, 6524}, + /* 13 : VPSLLD zmmreg|mask|z,xmmrm128 [r+vm:m128: evex.nds.512.66.0f.w0 f2 /r ] ND,AVX512,FUTURE */ + /* 240(f1 7d 48) 317 001(f2) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPSLLD, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+41566, 544, 6524}, + /* 14 : VPSLLD xmmreg|mask|z,xmmrm128|b32*,imm8 [vmi:fv: evex.nds.128.66.0f.w0 72 /6 ib ] AVX512,AVX512VL,FUTURE */ + /* 240(f1 7d 08) 301 001(72) 216 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSLLD, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20553, 543, 6525}, + /* 15 : VPSLLD xmmreg|mask|z,imm8 [v+mi:fv: evex.nds.128.66.0f.w0 72 /6 ib ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 7d 08) 301 001(72) 206 021 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSLLD, 2, {XMMREG,IMM_NORMAL|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20563, 543, 6525}, + /* 16 : VPSLLD ymmreg|mask|z,ymmrm256|b32*,imm8 [vmi:fv: evex.nds.256.66.0f.w0 72 /6 ib ] AVX512,AVX512VL,FUTURE */ + /* 240(f1 7d 28) 301 001(72) 216 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSLLD, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20573, 543, 6526}, + /* 17 : VPSLLD ymmreg|mask|z,imm8 [v+mi:fv: evex.nds.256.66.0f.w0 72 /6 ib ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 7d 28) 301 001(72) 206 021 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSLLD, 2, {YMMREG,IMM_NORMAL|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20583, 543, 6526}, + /* 18 : VPSLLD zmmreg|mask|z,zmmrm512|b32*,imm8 [vmi:fv: evex.nds.512.66.0f.w0 72 /6 ib ] AVX512,FUTURE */ + /* 240(f1 7d 48) 301 001(72) 216 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VPSLLD, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20593, 544, 6527}, + /* 19 : VPSLLD zmmreg|mask|z,imm8 [v+mi:fv: evex.nds.512.66.0f.w0 72 /6 ib ] ND,AVX512,FUTURE */ + /* 240(f1 7d 48) 301 001(72) 206 021 : EVEX,PROT,AVX512,FUTURE */ + {I_VPSLLD, 2, {ZMMREG,IMM_NORMAL|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20603, 544, 6527}, +}; + +static const struct itemplate instrux_VPSLLQ[20] = { + /* 0 : VPSLLQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f f3 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(f3) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSLLQ, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61144, 433, 3519}, + /* 1 : VPSLLQ xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f f3 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(f3) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSLLQ, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61151, 433, 3519}, + /* 2 : VPSLLQ xmmreg,xmmreg*,imm8 [vmi: vex.ndd.128.66.0f 73 /6 ib ] AVX,SANDYBRIDGE */ + /* 260(001 001) 001(73) 216 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSLLQ, 3, {XMMREG|RN_L16,XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52403, 433, 3520}, + /* 3 : VPSLLQ xmmreg,imm8 [v+mi: vex.ndd.128.66.0f 73 /6 ib ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(73) 206 021 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSLLQ, 2, {XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+52411, 433, 3520}, + /* 4 : VPSLLQ ymmreg,ymmreg*,xmmrm128 [rvm: vex.nds.256.66.0f f3 /r ] AVX2,FUTURE */ + /* 261(001 005) 001(f3) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSLLQ, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64182, 467, 4182}, + /* 5 : VPSLLQ ymmreg,xmmrm128 [r+vm: vex.nds.256.66.0f f3 /r ] ND,AVX2,FUTURE */ + /* 260(001 005) 001(f3) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSLLQ, 2, {YMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64189, 467, 4182}, + /* 6 : VPSLLQ ymmreg,ymmreg*,imm8 [vmi: vex.ndd.256.66.0f 73 /6 ib ] AVX2,FUTURE */ + /* 260(001 005) 001(73) 216 022 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSLLQ, 3, {YMMREG|RN_L16,YMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54379, 467, 4183}, + /* 7 : VPSLLQ ymmreg,imm8 [v+mi: vex.ndd.256.66.0f 73 /6 ib ] ND,AVX2,FUTURE */ + /* 260(001 005) 001(73) 206 021 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSLLQ, 2, {YMMREG|RN_L16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+54387, 467, 4183}, + /* 8 : VPSLLQ xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:m128: evex.nds.128.66.0f.w1 f3 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 317 001(f3) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSLLQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+41575, 543, 6531}, + /* 9 : VPSLLQ xmmreg|mask|z,xmmrm128 [r+vm:m128: evex.nds.128.66.0f.w1 f3 /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 fd 08) 317 001(f3) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSLLQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+41584, 543, 6531}, + /* 10 : VPSLLQ ymmreg|mask|z,ymmreg*,xmmrm128 [rvm:m128: evex.nds.256.66.0f.w1 f3 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 317 001(f3) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSLLQ, 3, {YMMREG,YMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+41593, 543, 6532}, + /* 11 : VPSLLQ ymmreg|mask|z,xmmrm128 [r+vm:m128: evex.nds.256.66.0f.w1 f3 /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 fd 28) 317 001(f3) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSLLQ, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+41602, 543, 6532}, + /* 12 : VPSLLQ zmmreg|mask|z,zmmreg*,xmmrm128 [rvm:m128: evex.nds.512.66.0f.w1 f3 /r ] AVX512,FUTURE */ + /* 241(f1 fd 48) 317 001(f3) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPSLLQ, 3, {ZMMREG,ZMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+41611, 544, 6533}, + /* 13 : VPSLLQ zmmreg|mask|z,xmmrm128 [r+vm:m128: evex.nds.512.66.0f.w1 f3 /r ] ND,AVX512,FUTURE */ + /* 240(f1 fd 48) 317 001(f3) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPSLLQ, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+41620, 544, 6533}, + /* 14 : VPSLLQ xmmreg|mask|z,xmmrm128|b64*,imm8 [vmi:fv: evex.nds.128.66.0f.w1 73 /6 ib ] AVX512,AVX512VL,FUTURE */ + /* 240(f1 fd 08) 301 001(73) 216 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSLLQ, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+20673, 543, 6534}, + /* 15 : VPSLLQ xmmreg|mask|z,imm8 [v+mi:fv: evex.nds.128.66.0f.w1 73 /6 ib ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 fd 08) 301 001(73) 206 021 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSLLQ, 2, {XMMREG,IMM_NORMAL|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20683, 543, 6534}, + /* 16 : VPSLLQ ymmreg|mask|z,ymmrm256|b64*,imm8 [vmi:fv: evex.nds.256.66.0f.w1 73 /6 ib ] AVX512,AVX512VL,FUTURE */ + /* 240(f1 fd 28) 301 001(73) 216 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSLLQ, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+20693, 543, 6535}, + /* 17 : VPSLLQ ymmreg|mask|z,imm8 [v+mi:fv: evex.nds.256.66.0f.w1 73 /6 ib ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 fd 28) 301 001(73) 206 021 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSLLQ, 2, {YMMREG,IMM_NORMAL|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20703, 543, 6535}, + /* 18 : VPSLLQ zmmreg|mask|z,zmmrm512|b64*,imm8 [vmi:fv: evex.nds.512.66.0f.w1 73 /6 ib ] AVX512,FUTURE */ + /* 240(f1 fd 48) 301 001(73) 216 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VPSLLQ, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+20713, 544, 6536}, + /* 19 : VPSLLQ zmmreg|mask|z,imm8 [v+mi:fv: evex.nds.512.66.0f.w1 73 /6 ib ] ND,AVX512,FUTURE */ + /* 240(f1 fd 48) 301 001(73) 206 021 : EVEX,PROT,AVX512,FUTURE */ + {I_VPSLLQ, 2, {ZMMREG,IMM_NORMAL|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20723, 544, 6536}, +}; + +static const struct itemplate instrux_VPSRAW[20] = { + /* 0 : VPSRAW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f e1 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(e1) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSRAW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61158, 433, 3521}, + /* 1 : VPSRAW xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f e1 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(e1) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSRAW, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61165, 433, 3521}, + /* 2 : VPSRAW xmmreg,xmmreg*,imm8 [vmi: vex.ndd.128.66.0f 71 /4 ib ] AVX,SANDYBRIDGE */ + /* 260(001 001) 001(71) 214 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSRAW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52419, 433, 3522}, + /* 3 : VPSRAW xmmreg,imm8 [v+mi: vex.ndd.128.66.0f 71 /4 ib ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(71) 204 021 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSRAW, 2, {XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+52427, 433, 3522}, + /* 4 : VPSRAW ymmreg,ymmreg*,xmmrm128 [rvm: vex.nds.256.66.0f e1 /r ] AVX2,FUTURE */ + /* 261(001 005) 001(e1) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSRAW, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64196, 467, 4184}, + /* 5 : VPSRAW ymmreg,xmmrm128 [r+vm: vex.nds.256.66.0f e1 /r ] ND,AVX2,FUTURE */ + /* 260(001 005) 001(e1) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSRAW, 2, {YMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64203, 467, 4184}, + /* 6 : VPSRAW ymmreg,ymmreg*,imm8 [vmi: vex.ndd.256.66.0f 71 /4 ib ] AVX2,FUTURE */ + /* 260(001 005) 001(71) 214 022 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSRAW, 3, {YMMREG|RN_L16,YMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54395, 467, 4185}, + /* 7 : VPSRAW ymmreg,imm8 [v+mi: vex.ndd.256.66.0f 71 /4 ib ] ND,AVX2,FUTURE */ + /* 260(001 005) 001(71) 204 021 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSRAW, 2, {YMMREG|RN_L16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+54403, 467, 4185}, + /* 8 : VPSRAW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:m128: evex.nds.128.66.0f.wig e1 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 317 001(e1) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSRAW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42115, 555, 6573}, + /* 9 : VPSRAW xmmreg|mask|z,xmmrm128 [r+vm:m128: evex.nds.128.66.0f.wig e1 /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 08) 317 001(e1) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSRAW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42124, 555, 6573}, + /* 10 : VPSRAW ymmreg|mask|z,ymmreg*,xmmrm128 [rvm:m128: evex.nds.256.66.0f.wig e1 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 317 001(e1) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSRAW, 3, {YMMREG,YMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42133, 555, 6574}, + /* 11 : VPSRAW ymmreg|mask|z,xmmrm128 [r+vm:m128: evex.nds.256.66.0f.wig e1 /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 28) 317 001(e1) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSRAW, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42142, 555, 6574}, + /* 12 : VPSRAW zmmreg|mask|z,zmmreg*,xmmrm128 [rvm:m128: evex.nds.512.66.0f.wig e1 /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 317 001(e1) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPSRAW, 3, {ZMMREG,ZMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42151, 556, 6575}, + /* 13 : VPSRAW zmmreg|mask|z,xmmrm128 [r+vm:m128: evex.nds.512.66.0f.wig e1 /r ] ND,AVX512BW,FUTURE */ + /* 240(f1 7d 48) 317 001(e1) 110 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPSRAW, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42160, 556, 6575}, + /* 14 : VPSRAW xmmreg|mask|z,xmmrm128*,imm8 [vmi:fvm: evex.nds.128.66.0f.wig 71 /4 ib ] AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 08) 303 001(71) 214 022 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSRAW, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20913, 555, 6576}, + /* 15 : VPSRAW xmmreg|mask|z,imm8 [v+mi:fvm: evex.nds.128.66.0f.wig 71 /4 ib ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 08) 303 001(71) 204 021 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSRAW, 2, {XMMREG,IMM_NORMAL|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20923, 555, 6576}, + /* 16 : VPSRAW ymmreg|mask|z,ymmrm256*,imm8 [vmi:fvm: evex.nds.256.66.0f.wig 71 /4 ib ] AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 28) 303 001(71) 214 022 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSRAW, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20933, 555, 6577}, + /* 17 : VPSRAW ymmreg|mask|z,imm8 [v+mi:fvm: evex.nds.256.66.0f.wig 71 /4 ib ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 28) 303 001(71) 204 021 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSRAW, 2, {YMMREG,IMM_NORMAL|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20943, 555, 6577}, + /* 18 : VPSRAW zmmreg|mask|z,zmmrm512*,imm8 [vmi:fvm: evex.nds.512.66.0f.wig 71 /4 ib ] AVX512BW,FUTURE */ + /* 240(f1 7d 48) 303 001(71) 214 022 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPSRAW, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20953, 556, 6578}, + /* 19 : VPSRAW zmmreg|mask|z,imm8 [v+mi:fvm: evex.nds.512.66.0f.wig 71 /4 ib ] ND,AVX512BW,FUTURE */ + /* 240(f1 7d 48) 303 001(71) 204 021 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPSRAW, 2, {ZMMREG,IMM_NORMAL|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20963, 556, 6578}, +}; + +static const struct itemplate instrux_VPSRAD[20] = { + /* 0 : VPSRAD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f e2 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(e2) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSRAD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61172, 433, 3523}, + /* 1 : VPSRAD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f e2 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(e2) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSRAD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61179, 433, 3523}, + /* 2 : VPSRAD xmmreg,xmmreg*,imm8 [vmi: vex.ndd.128.66.0f 72 /4 ib ] AVX,SANDYBRIDGE */ + /* 260(001 001) 001(72) 214 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSRAD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52435, 433, 3524}, + /* 3 : VPSRAD xmmreg,imm8 [v+mi: vex.ndd.128.66.0f 72 /4 ib ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(72) 204 021 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSRAD, 2, {XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+52443, 433, 3524}, + /* 4 : VPSRAD ymmreg,ymmreg*,xmmrm128 [rvm: vex.nds.256.66.0f e2 /r ] AVX2,FUTURE */ + /* 261(001 005) 001(e2) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSRAD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64210, 467, 4186}, + /* 5 : VPSRAD ymmreg,xmmrm128 [r+vm: vex.nds.256.66.0f e2 /r ] ND,AVX2,FUTURE */ + /* 260(001 005) 001(e2) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSRAD, 2, {YMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64217, 467, 4186}, + /* 6 : VPSRAD ymmreg,ymmreg*,imm8 [vmi: vex.ndd.256.66.0f 72 /4 ib ] AVX2,FUTURE */ + /* 260(001 005) 001(72) 214 022 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSRAD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54411, 467, 4187}, + /* 7 : VPSRAD ymmreg,imm8 [v+mi: vex.ndd.256.66.0f 72 /4 ib ] ND,AVX2,FUTURE */ + /* 260(001 005) 001(72) 204 021 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSRAD, 2, {YMMREG|RN_L16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+54419, 467, 4187}, + /* 8 : VPSRAD xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:m128: evex.nds.128.66.0f.w0 e2 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7d 08) 317 001(e2) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSRAD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+41845, 543, 6552}, + /* 9 : VPSRAD xmmreg|mask|z,xmmrm128 [r+vm:m128: evex.nds.128.66.0f.w0 e2 /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 7d 08) 317 001(e2) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSRAD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+41854, 543, 6552}, + /* 10 : VPSRAD ymmreg|mask|z,ymmreg*,xmmrm128 [rvm:m128: evex.nds.256.66.0f.w0 e2 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7d 28) 317 001(e2) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSRAD, 3, {YMMREG,YMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+41863, 543, 6553}, + /* 11 : VPSRAD ymmreg|mask|z,xmmrm128 [r+vm:m128: evex.nds.256.66.0f.w0 e2 /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 7d 28) 317 001(e2) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSRAD, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+41872, 543, 6553}, + /* 12 : VPSRAD zmmreg|mask|z,zmmreg*,xmmrm128 [rvm:m128: evex.nds.512.66.0f.w0 e2 /r ] AVX512,FUTURE */ + /* 241(f1 7d 48) 317 001(e2) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPSRAD, 3, {ZMMREG,ZMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+41881, 544, 6554}, + /* 13 : VPSRAD zmmreg|mask|z,xmmrm128 [r+vm:m128: evex.nds.512.66.0f.w0 e2 /r ] ND,AVX512,FUTURE */ + /* 240(f1 7d 48) 317 001(e2) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPSRAD, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+41890, 544, 6554}, + /* 14 : VPSRAD xmmreg|mask|z,xmmrm128|b32*,imm8 [vmi:fv: evex.nds.128.66.0f.w0 72 /4 ib ] AVX512,AVX512VL,FUTURE */ + /* 240(f1 7d 08) 301 001(72) 214 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSRAD, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20793, 543, 6555}, + /* 15 : VPSRAD xmmreg|mask|z,imm8 [v+mi:fv: evex.nds.128.66.0f.w0 72 /4 ib ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 7d 08) 301 001(72) 204 021 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSRAD, 2, {XMMREG,IMM_NORMAL|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20803, 543, 6555}, + /* 16 : VPSRAD ymmreg|mask|z,ymmrm256|b32*,imm8 [vmi:fv: evex.nds.256.66.0f.w0 72 /4 ib ] AVX512,AVX512VL,FUTURE */ + /* 240(f1 7d 28) 301 001(72) 214 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSRAD, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20813, 543, 6556}, + /* 17 : VPSRAD ymmreg|mask|z,imm8 [v+mi:fv: evex.nds.256.66.0f.w0 72 /4 ib ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 7d 28) 301 001(72) 204 021 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSRAD, 2, {YMMREG,IMM_NORMAL|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20823, 543, 6556}, + /* 18 : VPSRAD zmmreg|mask|z,zmmrm512|b32*,imm8 [vmi:fv: evex.nds.512.66.0f.w0 72 /4 ib ] AVX512,FUTURE */ + /* 240(f1 7d 48) 301 001(72) 214 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VPSRAD, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20833, 544, 6557}, + /* 19 : VPSRAD zmmreg|mask|z,imm8 [v+mi:fv: evex.nds.512.66.0f.w0 72 /4 ib ] ND,AVX512,FUTURE */ + /* 240(f1 7d 48) 301 001(72) 204 021 : EVEX,PROT,AVX512,FUTURE */ + {I_VPSRAD, 2, {ZMMREG,IMM_NORMAL|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20843, 544, 6557}, +}; + +static const struct itemplate instrux_VPSRLW[20] = { + /* 0 : VPSRLW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f d1 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(d1) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSRLW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61186, 433, 3525}, + /* 1 : VPSRLW xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f d1 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(d1) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSRLW, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61193, 433, 3525}, + /* 2 : VPSRLW xmmreg,xmmreg*,imm8 [vmi: vex.ndd.128.66.0f 71 /2 ib ] AVX,SANDYBRIDGE */ + /* 260(001 001) 001(71) 212 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSRLW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52451, 433, 3526}, + /* 3 : VPSRLW xmmreg,imm8 [v+mi: vex.ndd.128.66.0f 71 /2 ib ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(71) 202 021 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSRLW, 2, {XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+52459, 433, 3526}, + /* 4 : VPSRLW ymmreg,ymmreg*,xmmrm128 [rvm: vex.nds.256.66.0f d1 /r ] AVX2,FUTURE */ + /* 261(001 005) 001(d1) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSRLW, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64224, 467, 4189}, + /* 5 : VPSRLW ymmreg,xmmrm128 [r+vm: vex.nds.256.66.0f d1 /r ] ND,AVX2,FUTURE */ + /* 260(001 005) 001(d1) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSRLW, 2, {YMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64231, 467, 4189}, + /* 6 : VPSRLW ymmreg,ymmreg*,imm8 [vmi: vex.ndd.256.66.0f 71 /2 ib ] AVX2,FUTURE */ + /* 260(001 005) 001(71) 212 022 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSRLW, 3, {YMMREG|RN_L16,YMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54443, 467, 4190}, + /* 7 : VPSRLW ymmreg,imm8 [v+mi: vex.ndd.256.66.0f 71 /2 ib ] ND,AVX2,FUTURE */ + /* 260(001 005) 001(71) 202 021 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSRLW, 2, {YMMREG|RN_L16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+54451, 467, 4190}, + /* 8 : VPSRLW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:m128: evex.nds.128.66.0f.wig d1 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 317 001(d1) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSRLW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42439, 555, 6603}, + /* 9 : VPSRLW xmmreg|mask|z,xmmrm128 [r+vm:m128: evex.nds.128.66.0f.wig d1 /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 08) 317 001(d1) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSRLW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42448, 555, 6603}, + /* 10 : VPSRLW ymmreg|mask|z,ymmreg*,xmmrm128 [rvm:m128: evex.nds.256.66.0f.wig d1 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 317 001(d1) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSRLW, 3, {YMMREG,YMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42457, 555, 6604}, + /* 11 : VPSRLW ymmreg|mask|z,xmmrm128 [r+vm:m128: evex.nds.256.66.0f.wig d1 /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 28) 317 001(d1) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSRLW, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42466, 555, 6604}, + /* 12 : VPSRLW zmmreg|mask|z,zmmreg*,xmmrm128 [rvm:m128: evex.nds.512.66.0f.wig d1 /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 317 001(d1) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPSRLW, 3, {ZMMREG,ZMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42475, 556, 6605}, + /* 13 : VPSRLW zmmreg|mask|z,xmmrm128 [r+vm:m128: evex.nds.512.66.0f.wig d1 /r ] ND,AVX512BW,FUTURE */ + /* 240(f1 7d 48) 317 001(d1) 110 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPSRLW, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42484, 556, 6605}, + /* 14 : VPSRLW xmmreg|mask|z,xmmrm128*,imm8 [vmi:fvm: evex.nds.128.66.0f.wig 71 /2 ib ] AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 08) 303 001(71) 212 022 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSRLW, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21153, 555, 6606}, + /* 15 : VPSRLW xmmreg|mask|z,imm8 [v+mi:fvm: evex.nds.128.66.0f.wig 71 /2 ib ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 08) 303 001(71) 202 021 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSRLW, 2, {XMMREG,IMM_NORMAL|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21163, 555, 6606}, + /* 16 : VPSRLW ymmreg|mask|z,ymmrm256*,imm8 [vmi:fvm: evex.nds.256.66.0f.wig 71 /2 ib ] AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 28) 303 001(71) 212 022 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSRLW, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21173, 555, 6607}, + /* 17 : VPSRLW ymmreg|mask|z,imm8 [v+mi:fvm: evex.nds.256.66.0f.wig 71 /2 ib ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 28) 303 001(71) 202 021 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSRLW, 2, {YMMREG,IMM_NORMAL|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21183, 555, 6607}, + /* 18 : VPSRLW zmmreg|mask|z,zmmrm512*,imm8 [vmi:fvm: evex.nds.512.66.0f.wig 71 /2 ib ] AVX512BW,FUTURE */ + /* 240(f1 7d 48) 303 001(71) 212 022 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPSRLW, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21193, 556, 6608}, + /* 19 : VPSRLW zmmreg|mask|z,imm8 [v+mi:fvm: evex.nds.512.66.0f.wig 71 /2 ib ] ND,AVX512BW,FUTURE */ + /* 240(f1 7d 48) 303 001(71) 202 021 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPSRLW, 2, {ZMMREG,IMM_NORMAL|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21203, 556, 6608}, +}; + +static const struct itemplate instrux_VPSRLD[20] = { + /* 0 : VPSRLD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f d2 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(d2) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSRLD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61200, 433, 3527}, + /* 1 : VPSRLD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f d2 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(d2) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSRLD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61207, 433, 3527}, + /* 2 : VPSRLD xmmreg,xmmreg*,imm8 [vmi: vex.ndd.128.66.0f 72 /2 ib ] AVX,SANDYBRIDGE */ + /* 260(001 001) 001(72) 212 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSRLD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52467, 433, 3528}, + /* 3 : VPSRLD xmmreg,imm8 [v+mi: vex.ndd.128.66.0f 72 /2 ib ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(72) 202 021 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSRLD, 2, {XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+52475, 433, 3528}, + /* 4 : VPSRLD ymmreg,ymmreg*,xmmrm128 [rvm: vex.nds.256.66.0f d2 /r ] AVX2,FUTURE */ + /* 261(001 005) 001(d2) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSRLD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64238, 467, 4191}, + /* 5 : VPSRLD ymmreg,xmmrm128 [r+vm: vex.nds.256.66.0f d2 /r ] ND,AVX2,FUTURE */ + /* 260(001 005) 001(d2) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSRLD, 2, {YMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64245, 467, 4191}, + /* 6 : VPSRLD ymmreg,ymmreg*,imm8 [vmi: vex.ndd.256.66.0f 72 /2 ib ] AVX2,FUTURE */ + /* 260(001 005) 001(72) 212 022 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSRLD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54459, 467, 4192}, + /* 7 : VPSRLD ymmreg,imm8 [v+mi: vex.ndd.256.66.0f 72 /2 ib ] ND,AVX2,FUTURE */ + /* 260(001 005) 001(72) 202 021 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSRLD, 2, {YMMREG|RN_L16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+54467, 467, 4192}, + /* 8 : VPSRLD xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:m128: evex.nds.128.66.0f.w0 d2 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7d 08) 317 001(d2) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSRLD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42169, 543, 6579}, + /* 9 : VPSRLD xmmreg|mask|z,xmmrm128 [r+vm:m128: evex.nds.128.66.0f.w0 d2 /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 7d 08) 317 001(d2) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSRLD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42178, 543, 6579}, + /* 10 : VPSRLD ymmreg|mask|z,ymmreg*,xmmrm128 [rvm:m128: evex.nds.256.66.0f.w0 d2 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7d 28) 317 001(d2) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSRLD, 3, {YMMREG,YMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42187, 543, 6580}, + /* 11 : VPSRLD ymmreg|mask|z,xmmrm128 [r+vm:m128: evex.nds.256.66.0f.w0 d2 /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 7d 28) 317 001(d2) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSRLD, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42196, 543, 6580}, + /* 12 : VPSRLD zmmreg|mask|z,zmmreg*,xmmrm128 [rvm:m128: evex.nds.512.66.0f.w0 d2 /r ] AVX512,FUTURE */ + /* 241(f1 7d 48) 317 001(d2) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPSRLD, 3, {ZMMREG,ZMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42205, 544, 6581}, + /* 13 : VPSRLD zmmreg|mask|z,xmmrm128 [r+vm:m128: evex.nds.512.66.0f.w0 d2 /r ] ND,AVX512,FUTURE */ + /* 240(f1 7d 48) 317 001(d2) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPSRLD, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42214, 544, 6581}, + /* 14 : VPSRLD xmmreg|mask|z,xmmrm128|b32*,imm8 [vmi:fv: evex.nds.128.66.0f.w0 72 /2 ib ] AVX512,AVX512VL,FUTURE */ + /* 240(f1 7d 08) 301 001(72) 212 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSRLD, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20973, 543, 6582}, + /* 15 : VPSRLD xmmreg|mask|z,imm8 [v+mi:fv: evex.nds.128.66.0f.w0 72 /2 ib ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 7d 08) 301 001(72) 202 021 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSRLD, 2, {XMMREG,IMM_NORMAL|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20983, 543, 6582}, + /* 16 : VPSRLD ymmreg|mask|z,ymmrm256|b32*,imm8 [vmi:fv: evex.nds.256.66.0f.w0 72 /2 ib ] AVX512,AVX512VL,FUTURE */ + /* 240(f1 7d 28) 301 001(72) 212 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSRLD, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20993, 543, 6583}, + /* 17 : VPSRLD ymmreg|mask|z,imm8 [v+mi:fv: evex.nds.256.66.0f.w0 72 /2 ib ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 7d 28) 301 001(72) 202 021 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSRLD, 2, {YMMREG,IMM_NORMAL|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21003, 543, 6583}, + /* 18 : VPSRLD zmmreg|mask|z,zmmrm512|b32*,imm8 [vmi:fv: evex.nds.512.66.0f.w0 72 /2 ib ] AVX512,FUTURE */ + /* 240(f1 7d 48) 301 001(72) 212 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VPSRLD, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+21013, 544, 6584}, + /* 19 : VPSRLD zmmreg|mask|z,imm8 [v+mi:fv: evex.nds.512.66.0f.w0 72 /2 ib ] ND,AVX512,FUTURE */ + /* 240(f1 7d 48) 301 001(72) 202 021 : EVEX,PROT,AVX512,FUTURE */ + {I_VPSRLD, 2, {ZMMREG,IMM_NORMAL|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21023, 544, 6584}, +}; + +static const struct itemplate instrux_VPSRLQ[20] = { + /* 0 : VPSRLQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f d3 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(d3) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSRLQ, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61214, 433, 3529}, + /* 1 : VPSRLQ xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f d3 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(d3) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSRLQ, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61221, 433, 3529}, + /* 2 : VPSRLQ xmmreg,xmmreg*,imm8 [vmi: vex.ndd.128.66.0f 73 /2 ib ] AVX,SANDYBRIDGE */ + /* 260(001 001) 001(73) 212 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSRLQ, 3, {XMMREG|RN_L16,XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52483, 433, 3530}, + /* 3 : VPSRLQ xmmreg,imm8 [v+mi: vex.ndd.128.66.0f 73 /2 ib ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(73) 202 021 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSRLQ, 2, {XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+52491, 433, 3530}, + /* 4 : VPSRLQ ymmreg,ymmreg*,xmmrm128 [rvm: vex.nds.256.66.0f d3 /r ] AVX2,FUTURE */ + /* 261(001 005) 001(d3) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSRLQ, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64252, 467, 4193}, + /* 5 : VPSRLQ ymmreg,xmmrm128 [r+vm: vex.nds.256.66.0f d3 /r ] ND,AVX2,FUTURE */ + /* 260(001 005) 001(d3) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSRLQ, 2, {YMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64259, 467, 4193}, + /* 6 : VPSRLQ ymmreg,ymmreg*,imm8 [vmi: vex.ndd.256.66.0f.wig 73 /2 ib ] AVX2,FUTURE */ + /* 260(001 005) 001(73) 212 022 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSRLQ, 3, {YMMREG|RN_L16,YMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54475, 467, 4194}, + /* 7 : VPSRLQ ymmreg,imm8 [v+mi: vex.ndd.256.66.0f.wig 73 /2 ib ] ND,AVX2,FUTURE */ + /* 260(001 005) 001(73) 202 021 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSRLQ, 2, {YMMREG|RN_L16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+54483, 467, 4194}, + /* 8 : VPSRLQ xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:m128: evex.nds.128.66.0f.w1 d3 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 317 001(d3) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSRLQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42223, 543, 6588}, + /* 9 : VPSRLQ xmmreg|mask|z,xmmrm128 [r+vm:m128: evex.nds.128.66.0f.w1 d3 /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 fd 08) 317 001(d3) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSRLQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42232, 543, 6588}, + /* 10 : VPSRLQ ymmreg|mask|z,ymmreg*,xmmrm128 [rvm:m128: evex.nds.256.66.0f.w1 d3 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 317 001(d3) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSRLQ, 3, {YMMREG,YMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42241, 543, 6589}, + /* 11 : VPSRLQ ymmreg|mask|z,xmmrm128 [r+vm:m128: evex.nds.256.66.0f.w1 d3 /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 fd 28) 317 001(d3) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSRLQ, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42250, 543, 6589}, + /* 12 : VPSRLQ zmmreg|mask|z,zmmreg*,xmmrm128 [rvm:m128: evex.nds.512.66.0f.w1 d3 /r ] AVX512,FUTURE */ + /* 241(f1 fd 48) 317 001(d3) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPSRLQ, 3, {ZMMREG,ZMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42259, 544, 6590}, + /* 13 : VPSRLQ zmmreg|mask|z,xmmrm128 [r+vm:m128: evex.nds.512.66.0f.w1 d3 /r ] ND,AVX512,FUTURE */ + /* 240(f1 fd 48) 317 001(d3) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPSRLQ, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42268, 544, 6590}, + /* 14 : VPSRLQ xmmreg|mask|z,xmmrm128|b64*,imm8 [vmi:fv: evex.nds.128.66.0f.w1 73 /2 ib ] AVX512,AVX512VL,FUTURE */ + /* 240(f1 fd 08) 301 001(73) 212 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSRLQ, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+21093, 543, 6591}, + /* 15 : VPSRLQ xmmreg|mask|z,imm8 [v+mi:fv: evex.nds.128.66.0f.w1 73 /2 ib ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 fd 08) 301 001(73) 202 021 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSRLQ, 2, {XMMREG,IMM_NORMAL|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21103, 543, 6591}, + /* 16 : VPSRLQ ymmreg|mask|z,ymmrm256|b64*,imm8 [vmi:fv: evex.nds.256.66.0f.w1 73 /2 ib ] AVX512,AVX512VL,FUTURE */ + /* 240(f1 fd 28) 301 001(73) 212 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSRLQ, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+21113, 543, 6592}, + /* 17 : VPSRLQ ymmreg|mask|z,imm8 [v+mi:fv: evex.nds.256.66.0f.w1 73 /2 ib ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 fd 28) 301 001(73) 202 021 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSRLQ, 2, {YMMREG,IMM_NORMAL|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21123, 543, 6592}, + /* 18 : VPSRLQ zmmreg|mask|z,zmmrm512|b64*,imm8 [vmi:fv: evex.nds.512.66.0f.w1 73 /2 ib ] AVX512,FUTURE */ + /* 240(f1 fd 48) 301 001(73) 212 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VPSRLQ, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+21133, 544, 6593}, + /* 19 : VPSRLQ zmmreg|mask|z,imm8 [v+mi:fv: evex.nds.512.66.0f.w1 73 /2 ib ] ND,AVX512,FUTURE */ + /* 240(f1 fd 48) 301 001(73) 202 021 : EVEX,PROT,AVX512,FUTURE */ + {I_VPSRLQ, 2, {ZMMREG,IMM_NORMAL|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21143, 544, 6593}, +}; + +static const struct itemplate instrux_VPTEST[2] = { + /* 0 : VPTEST xmmreg,xmmrm128 [rm: vex.128.66.0f38 17 /r ] AVX,SANDYBRIDGE */ + /* 270(002 001) 001(17) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPTEST, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61228, 433, 3531}, + /* 1 : VPTEST ymmreg,ymmrm256 [rm: vex.256.66.0f38 17 /r ] AVX,SANDYBRIDGE */ + /* 270(002 005) 001(17) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPTEST, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61235, 433, 3532}, +}; + +static const struct itemplate instrux_VPSUBB[10] = { + /* 0 : VPSUBB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f f8 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(f8) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSUBB, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61242, 433, 3533}, + /* 1 : VPSUBB xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f f8 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(f8) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSUBB, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61249, 433, 3533}, + /* 2 : VPSUBB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f f8 /r ] AVX2,FUTURE */ + /* 261(001 005) 001(f8) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSUBB, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64266, 467, 4195}, + /* 3 : VPSUBB ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f f8 /r ] ND,AVX2,FUTURE */ + /* 260(001 005) 001(f8) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSUBB, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64273, 467, 4195}, + /* 4 : VPSUBB xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig f8 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 303 001(f8) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSUBB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42493, 555, 6609}, + /* 5 : VPSUBB xmmreg|mask|z,xmmrm128 [r+vm:fvm: evex.nds.128.66.0f.wig f8 /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 08) 303 001(f8) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSUBB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42502, 555, 6609}, + /* 6 : VPSUBB ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig f8 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 303 001(f8) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSUBB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42511, 555, 6610}, + /* 7 : VPSUBB ymmreg|mask|z,ymmrm256 [r+vm:fvm: evex.nds.256.66.0f.wig f8 /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 28) 303 001(f8) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSUBB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42520, 555, 6610}, + /* 8 : VPSUBB zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig f8 /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 303 001(f8) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPSUBB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42529, 556, 6611}, + /* 9 : VPSUBB zmmreg|mask|z,zmmrm512 [r+vm:fvm: evex.nds.512.66.0f.wig f8 /r ] ND,AVX512BW,FUTURE */ + /* 240(f1 7d 48) 303 001(f8) 110 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPSUBB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42538, 556, 6611}, +}; + +static const struct itemplate instrux_VPSUBW[10] = { + /* 0 : VPSUBW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f f9 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(f9) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSUBW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61256, 433, 3534}, + /* 1 : VPSUBW xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f f9 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(f9) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSUBW, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61263, 433, 3534}, + /* 2 : VPSUBW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f f9 /r ] AVX2,FUTURE */ + /* 261(001 005) 001(f9) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSUBW, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64280, 467, 4196}, + /* 3 : VPSUBW ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f f9 /r ] ND,AVX2,FUTURE */ + /* 260(001 005) 001(f9) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSUBW, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64287, 467, 4196}, + /* 4 : VPSUBW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig f9 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 303 001(f9) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSUBW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42871, 555, 6630}, + /* 5 : VPSUBW xmmreg|mask|z,xmmrm128 [r+vm:fvm: evex.nds.128.66.0f.wig f9 /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 08) 303 001(f9) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSUBW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42880, 555, 6630}, + /* 6 : VPSUBW ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig f9 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 303 001(f9) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSUBW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42889, 555, 6631}, + /* 7 : VPSUBW ymmreg|mask|z,ymmrm256 [r+vm:fvm: evex.nds.256.66.0f.wig f9 /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 28) 303 001(f9) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSUBW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42898, 555, 6631}, + /* 8 : VPSUBW zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig f9 /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 303 001(f9) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPSUBW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42907, 556, 6632}, + /* 9 : VPSUBW zmmreg|mask|z,zmmrm512 [r+vm:fvm: evex.nds.512.66.0f.wig f9 /r ] ND,AVX512BW,FUTURE */ + /* 240(f1 7d 48) 303 001(f9) 110 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPSUBW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42916, 556, 6632}, +}; + +static const struct itemplate instrux_VPSUBD[10] = { + /* 0 : VPSUBD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f fa /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(fa) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSUBD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61270, 433, 3535}, + /* 1 : VPSUBD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f fa /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(fa) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSUBD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61277, 433, 3535}, + /* 2 : VPSUBD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f fa /r ] AVX2,FUTURE */ + /* 261(001 005) 001(fa) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSUBD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64294, 467, 4197}, + /* 3 : VPSUBD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f fa /r ] ND,AVX2,FUTURE */ + /* 260(001 005) 001(fa) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSUBD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64301, 467, 4197}, + /* 4 : VPSUBD xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f.w0 fa /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7d 08) 301 001(fa) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSUBD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+42547, 543, 6612}, + /* 5 : VPSUBD xmmreg|mask|z,xmmrm128|b32 [r+vm:fv: evex.nds.128.66.0f.w0 fa /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 7d 08) 301 001(fa) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSUBD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+42556, 543, 6612}, + /* 6 : VPSUBD ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f.w0 fa /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7d 28) 301 001(fa) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSUBD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+42565, 543, 6613}, + /* 7 : VPSUBD ymmreg|mask|z,ymmrm256|b32 [r+vm:fv: evex.nds.256.66.0f.w0 fa /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 7d 28) 301 001(fa) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSUBD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+42574, 543, 6613}, + /* 8 : VPSUBD zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f.w0 fa /r ] AVX512,FUTURE */ + /* 241(f1 7d 48) 301 001(fa) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPSUBD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+42583, 544, 6614}, + /* 9 : VPSUBD zmmreg|mask|z,zmmrm512|b32 [r+vm:fv: evex.nds.512.66.0f.w0 fa /r ] ND,AVX512,FUTURE */ + /* 240(f1 7d 48) 301 001(fa) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPSUBD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+42592, 544, 6614}, +}; + +static const struct itemplate instrux_VPSUBQ[10] = { + /* 0 : VPSUBQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f fb /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(fb) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSUBQ, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61284, 433, 3536}, + /* 1 : VPSUBQ xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f fb /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(fb) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSUBQ, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61291, 433, 3536}, + /* 2 : VPSUBQ ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f fb /r ] AVX2,FUTURE */ + /* 261(001 005) 001(fb) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSUBQ, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64308, 467, 4198}, + /* 3 : VPSUBQ ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f fb /r ] ND,AVX2,FUTURE */ + /* 260(001 005) 001(fb) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSUBQ, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64315, 467, 4198}, + /* 4 : VPSUBQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f.w1 fb /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(fb) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSUBQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+42601, 543, 6615}, + /* 5 : VPSUBQ xmmreg|mask|z,xmmrm128|b64 [r+vm:fv: evex.nds.128.66.0f.w1 fb /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 fd 08) 301 001(fb) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSUBQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+42610, 543, 6615}, + /* 6 : VPSUBQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f.w1 fb /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(fb) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSUBQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+42619, 543, 6616}, + /* 7 : VPSUBQ ymmreg|mask|z,ymmrm256|b64 [r+vm:fv: evex.nds.256.66.0f.w1 fb /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 fd 28) 301 001(fb) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSUBQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+42628, 543, 6616}, + /* 8 : VPSUBQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f.w1 fb /r ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(fb) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPSUBQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+42637, 544, 6617}, + /* 9 : VPSUBQ zmmreg|mask|z,zmmrm512|b64 [r+vm:fv: evex.nds.512.66.0f.w1 fb /r ] ND,AVX512,FUTURE */ + /* 240(f1 fd 48) 301 001(fb) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPSUBQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+42646, 544, 6617}, +}; + +static const struct itemplate instrux_VPSUBSB[10] = { + /* 0 : VPSUBSB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f e8 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(e8) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSUBSB, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61298, 433, 3537}, + /* 1 : VPSUBSB xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f e8 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(e8) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSUBSB, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61305, 433, 3537}, + /* 2 : VPSUBSB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f e8 /r ] AVX2,FUTURE */ + /* 261(001 005) 001(e8) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSUBSB, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64322, 467, 4199}, + /* 3 : VPSUBSB ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f e8 /r ] ND,AVX2,FUTURE */ + /* 260(001 005) 001(e8) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSUBSB, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64329, 467, 4199}, + /* 4 : VPSUBSB xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig e8 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 303 001(e8) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSUBSB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42655, 555, 6618}, + /* 5 : VPSUBSB xmmreg|mask|z,xmmrm128 [r+vm:fvm: evex.nds.128.66.0f.wig e8 /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 08) 303 001(e8) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSUBSB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42664, 555, 6618}, + /* 6 : VPSUBSB ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig e8 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 303 001(e8) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSUBSB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42673, 555, 6619}, + /* 7 : VPSUBSB ymmreg|mask|z,ymmrm256 [r+vm:fvm: evex.nds.256.66.0f.wig e8 /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 28) 303 001(e8) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSUBSB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42682, 555, 6619}, + /* 8 : VPSUBSB zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig e8 /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 303 001(e8) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPSUBSB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42691, 556, 6620}, + /* 9 : VPSUBSB zmmreg|mask|z,zmmrm512 [r+vm:fvm: evex.nds.512.66.0f.wig e8 /r ] ND,AVX512BW,FUTURE */ + /* 240(f1 7d 48) 303 001(e8) 110 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPSUBSB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42700, 556, 6620}, +}; + +static const struct itemplate instrux_VPSUBSW[10] = { + /* 0 : VPSUBSW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f e9 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(e9) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSUBSW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61312, 433, 3538}, + /* 1 : VPSUBSW xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f e9 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(e9) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSUBSW, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61319, 433, 3538}, + /* 2 : VPSUBSW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f e9 /r ] AVX2,FUTURE */ + /* 261(001 005) 001(e9) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSUBSW, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64336, 467, 4200}, + /* 3 : VPSUBSW ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f e9 /r ] ND,AVX2,FUTURE */ + /* 260(001 005) 001(e9) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSUBSW, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64343, 467, 4200}, + /* 4 : VPSUBSW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig e9 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 303 001(e9) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSUBSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42709, 555, 6621}, + /* 5 : VPSUBSW xmmreg|mask|z,xmmrm128 [r+vm:fvm: evex.nds.128.66.0f.wig e9 /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 08) 303 001(e9) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSUBSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42718, 555, 6621}, + /* 6 : VPSUBSW ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig e9 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 303 001(e9) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSUBSW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42727, 555, 6622}, + /* 7 : VPSUBSW ymmreg|mask|z,ymmrm256 [r+vm:fvm: evex.nds.256.66.0f.wig e9 /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 28) 303 001(e9) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSUBSW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42736, 555, 6622}, + /* 8 : VPSUBSW zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig e9 /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 303 001(e9) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPSUBSW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42745, 556, 6623}, + /* 9 : VPSUBSW zmmreg|mask|z,zmmrm512 [r+vm:fvm: evex.nds.512.66.0f.wig e9 /r ] ND,AVX512BW,FUTURE */ + /* 240(f1 7d 48) 303 001(e9) 110 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPSUBSW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42754, 556, 6623}, +}; + +static const struct itemplate instrux_VPSUBUSB[10] = { + /* 0 : VPSUBUSB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f d8 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(d8) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSUBUSB, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61326, 433, 3539}, + /* 1 : VPSUBUSB xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f d8 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(d8) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSUBUSB, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61333, 433, 3539}, + /* 2 : VPSUBUSB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f d8 /r ] AVX2,FUTURE */ + /* 261(001 005) 001(d8) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSUBUSB, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64350, 467, 4201}, + /* 3 : VPSUBUSB ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f d8 /r ] ND,AVX2,FUTURE */ + /* 260(001 005) 001(d8) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSUBUSB, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64357, 467, 4201}, + /* 4 : VPSUBUSB xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig d8 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 303 001(d8) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSUBUSB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42763, 555, 6624}, + /* 5 : VPSUBUSB xmmreg|mask|z,xmmrm128 [r+vm:fvm: evex.nds.128.66.0f.wig d8 /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 08) 303 001(d8) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSUBUSB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42772, 555, 6624}, + /* 6 : VPSUBUSB ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig d8 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 303 001(d8) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSUBUSB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42781, 555, 6625}, + /* 7 : VPSUBUSB ymmreg|mask|z,ymmrm256 [r+vm:fvm: evex.nds.256.66.0f.wig d8 /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 28) 303 001(d8) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSUBUSB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42790, 555, 6625}, + /* 8 : VPSUBUSB zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig d8 /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 303 001(d8) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPSUBUSB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42799, 556, 6626}, + /* 9 : VPSUBUSB zmmreg|mask|z,zmmrm512 [r+vm:fvm: evex.nds.512.66.0f.wig d8 /r ] ND,AVX512BW,FUTURE */ + /* 240(f1 7d 48) 303 001(d8) 110 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPSUBUSB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42808, 556, 6626}, +}; + +static const struct itemplate instrux_VPSUBUSW[10] = { + /* 0 : VPSUBUSW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f d9 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(d9) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSUBUSW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61340, 433, 3540}, + /* 1 : VPSUBUSW xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f d9 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(d9) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSUBUSW, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61347, 433, 3540}, + /* 2 : VPSUBUSW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f d9 /r ] AVX2,FUTURE */ + /* 261(001 005) 001(d9) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSUBUSW, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64364, 467, 4202}, + /* 3 : VPSUBUSW ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f d9 /r ] ND,AVX2,FUTURE */ + /* 260(001 005) 001(d9) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSUBUSW, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64371, 467, 4202}, + /* 4 : VPSUBUSW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig d9 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 303 001(d9) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSUBUSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42817, 555, 6627}, + /* 5 : VPSUBUSW xmmreg|mask|z,xmmrm128 [r+vm:fvm: evex.nds.128.66.0f.wig d9 /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 08) 303 001(d9) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSUBUSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42826, 555, 6627}, + /* 6 : VPSUBUSW ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig d9 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 303 001(d9) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSUBUSW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42835, 555, 6628}, + /* 7 : VPSUBUSW ymmreg|mask|z,ymmrm256 [r+vm:fvm: evex.nds.256.66.0f.wig d9 /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 28) 303 001(d9) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSUBUSW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42844, 555, 6628}, + /* 8 : VPSUBUSW zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig d9 /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 303 001(d9) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPSUBUSW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42853, 556, 6629}, + /* 9 : VPSUBUSW zmmreg|mask|z,zmmrm512 [r+vm:fvm: evex.nds.512.66.0f.wig d9 /r ] ND,AVX512BW,FUTURE */ + /* 240(f1 7d 48) 303 001(d9) 110 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPSUBUSW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42862, 556, 6629}, +}; + +static const struct itemplate instrux_VPUNPCKHBW[10] = { + /* 0 : VPUNPCKHBW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 68 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(68) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPUNPCKHBW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61354, 433, 3541}, + /* 1 : VPUNPCKHBW xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f 68 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(68) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPUNPCKHBW, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61361, 433, 3541}, + /* 2 : VPUNPCKHBW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 68 /r ] AVX2,FUTURE */ + /* 261(001 005) 001(68) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPUNPCKHBW, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64378, 467, 4203}, + /* 3 : VPUNPCKHBW ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f 68 /r ] ND,AVX2,FUTURE */ + /* 260(001 005) 001(68) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPUNPCKHBW, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64385, 467, 4203}, + /* 4 : VPUNPCKHBW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig 68 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 303 001(68) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPUNPCKHBW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+43141, 555, 6663}, + /* 5 : VPUNPCKHBW xmmreg|mask|z,xmmrm128 [r+vm:fvm: evex.nds.128.66.0f.wig 68 /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 08) 303 001(68) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPUNPCKHBW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+43150, 555, 6663}, + /* 6 : VPUNPCKHBW ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig 68 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 303 001(68) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPUNPCKHBW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+43159, 555, 6664}, + /* 7 : VPUNPCKHBW ymmreg|mask|z,ymmrm256 [r+vm:fvm: evex.nds.256.66.0f.wig 68 /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 28) 303 001(68) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPUNPCKHBW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+43168, 555, 6664}, + /* 8 : VPUNPCKHBW zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig 68 /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 303 001(68) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPUNPCKHBW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+43177, 556, 6665}, + /* 9 : VPUNPCKHBW zmmreg|mask|z,zmmrm512 [r+vm:fvm: evex.nds.512.66.0f.wig 68 /r ] ND,AVX512BW,FUTURE */ + /* 240(f1 7d 48) 303 001(68) 110 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPUNPCKHBW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+43186, 556, 6665}, +}; + +static const struct itemplate instrux_VPUNPCKHWD[10] = { + /* 0 : VPUNPCKHWD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 69 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(69) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPUNPCKHWD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61368, 433, 3542}, + /* 1 : VPUNPCKHWD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f 69 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(69) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPUNPCKHWD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61375, 433, 3542}, + /* 2 : VPUNPCKHWD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 69 /r ] AVX2,FUTURE */ + /* 261(001 005) 001(69) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPUNPCKHWD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64392, 467, 4204}, + /* 3 : VPUNPCKHWD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f 69 /r ] ND,AVX2,FUTURE */ + /* 260(001 005) 001(69) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPUNPCKHWD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64399, 467, 4204}, + /* 4 : VPUNPCKHWD xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig 69 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 303 001(69) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPUNPCKHWD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+43303, 555, 6672}, + /* 5 : VPUNPCKHWD xmmreg|mask|z,xmmrm128 [r+vm:fvm: evex.nds.128.66.0f.wig 69 /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 08) 303 001(69) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPUNPCKHWD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+43312, 555, 6672}, + /* 6 : VPUNPCKHWD ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig 69 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 303 001(69) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPUNPCKHWD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+43321, 555, 6673}, + /* 7 : VPUNPCKHWD ymmreg|mask|z,ymmrm256 [r+vm:fvm: evex.nds.256.66.0f.wig 69 /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 28) 303 001(69) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPUNPCKHWD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+43330, 555, 6673}, + /* 8 : VPUNPCKHWD zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig 69 /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 303 001(69) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPUNPCKHWD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+43339, 556, 6674}, + /* 9 : VPUNPCKHWD zmmreg|mask|z,zmmrm512 [r+vm:fvm: evex.nds.512.66.0f.wig 69 /r ] ND,AVX512BW,FUTURE */ + /* 240(f1 7d 48) 303 001(69) 110 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPUNPCKHWD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+43348, 556, 6674}, +}; + +static const struct itemplate instrux_VPUNPCKHDQ[10] = { + /* 0 : VPUNPCKHDQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 6a /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(6a) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPUNPCKHDQ, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61382, 433, 3543}, + /* 1 : VPUNPCKHDQ xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f 6a /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(6a) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPUNPCKHDQ, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61389, 433, 3543}, + /* 2 : VPUNPCKHDQ ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 6a /r ] AVX2,FUTURE */ + /* 261(001 005) 001(6a) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPUNPCKHDQ, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64406, 467, 4205}, + /* 3 : VPUNPCKHDQ ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f 6a /r ] ND,AVX2,FUTURE */ + /* 260(001 005) 001(6a) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPUNPCKHDQ, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64413, 467, 4205}, + /* 4 : VPUNPCKHDQ xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f.w0 6a /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7d 08) 301 001(6a) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPUNPCKHDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+43195, 543, 6666}, + /* 5 : VPUNPCKHDQ xmmreg|mask|z,xmmrm128|b32 [r+vm:fv: evex.nds.128.66.0f.w0 6a /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 7d 08) 301 001(6a) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPUNPCKHDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+43204, 543, 6666}, + /* 6 : VPUNPCKHDQ ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f.w0 6a /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7d 28) 301 001(6a) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPUNPCKHDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+43213, 543, 6667}, + /* 7 : VPUNPCKHDQ ymmreg|mask|z,ymmrm256|b32 [r+vm:fv: evex.nds.256.66.0f.w0 6a /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 7d 28) 301 001(6a) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPUNPCKHDQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+43222, 543, 6667}, + /* 8 : VPUNPCKHDQ zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f.w0 6a /r ] AVX512,FUTURE */ + /* 241(f1 7d 48) 301 001(6a) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPUNPCKHDQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+43231, 544, 6668}, + /* 9 : VPUNPCKHDQ zmmreg|mask|z,zmmrm512|b32 [r+vm:fv: evex.nds.512.66.0f.w0 6a /r ] ND,AVX512,FUTURE */ + /* 240(f1 7d 48) 301 001(6a) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPUNPCKHDQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+43240, 544, 6668}, +}; + +static const struct itemplate instrux_VPUNPCKHQDQ[10] = { + /* 0 : VPUNPCKHQDQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 6d /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(6d) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPUNPCKHQDQ, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61396, 433, 3544}, + /* 1 : VPUNPCKHQDQ xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f 6d /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(6d) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPUNPCKHQDQ, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61403, 433, 3544}, + /* 2 : VPUNPCKHQDQ ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 6d /r ] AVX2,FUTURE */ + /* 261(001 005) 001(6d) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPUNPCKHQDQ, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64420, 467, 4206}, + /* 3 : VPUNPCKHQDQ ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f 6d /r ] ND,AVX2,FUTURE */ + /* 260(001 005) 001(6d) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPUNPCKHQDQ, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64427, 467, 4206}, + /* 4 : VPUNPCKHQDQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f.w1 6d /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(6d) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPUNPCKHQDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+43249, 543, 6669}, + /* 5 : VPUNPCKHQDQ xmmreg|mask|z,xmmrm128|b64 [r+vm:fv: evex.nds.128.66.0f.w1 6d /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 fd 08) 301 001(6d) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPUNPCKHQDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+43258, 543, 6669}, + /* 6 : VPUNPCKHQDQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f.w1 6d /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(6d) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPUNPCKHQDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+43267, 543, 6670}, + /* 7 : VPUNPCKHQDQ ymmreg|mask|z,ymmrm256|b64 [r+vm:fv: evex.nds.256.66.0f.w1 6d /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 fd 28) 301 001(6d) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPUNPCKHQDQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+43276, 543, 6670}, + /* 8 : VPUNPCKHQDQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f.w1 6d /r ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(6d) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPUNPCKHQDQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+43285, 544, 6671}, + /* 9 : VPUNPCKHQDQ zmmreg|mask|z,zmmrm512|b64 [r+vm:fv: evex.nds.512.66.0f.w1 6d /r ] ND,AVX512,FUTURE */ + /* 240(f1 fd 48) 301 001(6d) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPUNPCKHQDQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+43294, 544, 6671}, +}; + +static const struct itemplate instrux_VPUNPCKLBW[10] = { + /* 0 : VPUNPCKLBW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 60 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(60) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPUNPCKLBW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61410, 433, 3545}, + /* 1 : VPUNPCKLBW xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f 60 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(60) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPUNPCKLBW, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61417, 433, 3545}, + /* 2 : VPUNPCKLBW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 60 /r ] AVX2,FUTURE */ + /* 261(001 005) 001(60) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPUNPCKLBW, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64434, 467, 4207}, + /* 3 : VPUNPCKLBW ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f 60 /r ] ND,AVX2,FUTURE */ + /* 260(001 005) 001(60) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPUNPCKLBW, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64441, 467, 4207}, + /* 4 : VPUNPCKLBW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig 60 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 303 001(60) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPUNPCKLBW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+43357, 555, 6675}, + /* 5 : VPUNPCKLBW xmmreg|mask|z,xmmrm128 [r+vm:fvm: evex.nds.128.66.0f.wig 60 /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 08) 303 001(60) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPUNPCKLBW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+43366, 555, 6675}, + /* 6 : VPUNPCKLBW ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig 60 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 303 001(60) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPUNPCKLBW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+43375, 555, 6676}, + /* 7 : VPUNPCKLBW ymmreg|mask|z,ymmrm256 [r+vm:fvm: evex.nds.256.66.0f.wig 60 /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 28) 303 001(60) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPUNPCKLBW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+43384, 555, 6676}, + /* 8 : VPUNPCKLBW zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig 60 /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 303 001(60) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPUNPCKLBW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+43393, 556, 6677}, + /* 9 : VPUNPCKLBW zmmreg|mask|z,zmmrm512 [r+vm:fvm: evex.nds.512.66.0f.wig 60 /r ] ND,AVX512BW,FUTURE */ + /* 240(f1 7d 48) 303 001(60) 110 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPUNPCKLBW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+43402, 556, 6677}, +}; + +static const struct itemplate instrux_VPUNPCKLWD[10] = { + /* 0 : VPUNPCKLWD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 61 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(61) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPUNPCKLWD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61424, 433, 3546}, + /* 1 : VPUNPCKLWD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f 61 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(61) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPUNPCKLWD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61431, 433, 3546}, + /* 2 : VPUNPCKLWD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 61 /r ] AVX2,FUTURE */ + /* 261(001 005) 001(61) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPUNPCKLWD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64448, 467, 4208}, + /* 3 : VPUNPCKLWD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f 61 /r ] ND,AVX2,FUTURE */ + /* 260(001 005) 001(61) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPUNPCKLWD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64455, 467, 4208}, + /* 4 : VPUNPCKLWD xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig 61 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 303 001(61) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPUNPCKLWD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+43519, 555, 6684}, + /* 5 : VPUNPCKLWD xmmreg|mask|z,xmmrm128 [r+vm:fvm: evex.nds.128.66.0f.wig 61 /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 08) 303 001(61) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPUNPCKLWD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+43528, 555, 6684}, + /* 6 : VPUNPCKLWD ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig 61 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 303 001(61) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPUNPCKLWD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+43537, 555, 6685}, + /* 7 : VPUNPCKLWD ymmreg|mask|z,ymmrm256 [r+vm:fvm: evex.nds.256.66.0f.wig 61 /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 28) 303 001(61) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPUNPCKLWD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+43546, 555, 6685}, + /* 8 : VPUNPCKLWD zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig 61 /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 303 001(61) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPUNPCKLWD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+43555, 556, 6686}, + /* 9 : VPUNPCKLWD zmmreg|mask|z,zmmrm512 [r+vm:fvm: evex.nds.512.66.0f.wig 61 /r ] ND,AVX512BW,FUTURE */ + /* 240(f1 7d 48) 303 001(61) 110 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPUNPCKLWD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+43564, 556, 6686}, +}; + +static const struct itemplate instrux_VPUNPCKLDQ[10] = { + /* 0 : VPUNPCKLDQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 62 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(62) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPUNPCKLDQ, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61438, 433, 3547}, + /* 1 : VPUNPCKLDQ xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f 62 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(62) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPUNPCKLDQ, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61445, 433, 3547}, + /* 2 : VPUNPCKLDQ ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 62 /r ] AVX2,FUTURE */ + /* 261(001 005) 001(62) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPUNPCKLDQ, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64462, 467, 4209}, + /* 3 : VPUNPCKLDQ ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f 62 /r ] ND,AVX2,FUTURE */ + /* 260(001 005) 001(62) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPUNPCKLDQ, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64469, 467, 4209}, + /* 4 : VPUNPCKLDQ xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f.w0 62 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7d 08) 301 001(62) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPUNPCKLDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+43411, 543, 6678}, + /* 5 : VPUNPCKLDQ xmmreg|mask|z,xmmrm128|b32 [r+vm:fv: evex.nds.128.66.0f.w0 62 /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 7d 08) 301 001(62) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPUNPCKLDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+43420, 543, 6678}, + /* 6 : VPUNPCKLDQ ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f.w0 62 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7d 28) 301 001(62) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPUNPCKLDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+43429, 543, 6679}, + /* 7 : VPUNPCKLDQ ymmreg|mask|z,ymmrm256|b32 [r+vm:fv: evex.nds.256.66.0f.w0 62 /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 7d 28) 301 001(62) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPUNPCKLDQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+43438, 543, 6679}, + /* 8 : VPUNPCKLDQ zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f.w0 62 /r ] AVX512,FUTURE */ + /* 241(f1 7d 48) 301 001(62) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPUNPCKLDQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+43447, 544, 6680}, + /* 9 : VPUNPCKLDQ zmmreg|mask|z,zmmrm512|b32 [r+vm:fv: evex.nds.512.66.0f.w0 62 /r ] ND,AVX512,FUTURE */ + /* 240(f1 7d 48) 301 001(62) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPUNPCKLDQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+43456, 544, 6680}, +}; + +static const struct itemplate instrux_VPUNPCKLQDQ[10] = { + /* 0 : VPUNPCKLQDQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 6c /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(6c) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPUNPCKLQDQ, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61452, 433, 3548}, + /* 1 : VPUNPCKLQDQ xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f 6c /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(6c) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPUNPCKLQDQ, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61459, 433, 3548}, + /* 2 : VPUNPCKLQDQ ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 6c /r ] AVX2,FUTURE */ + /* 261(001 005) 001(6c) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPUNPCKLQDQ, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64476, 467, 4210}, + /* 3 : VPUNPCKLQDQ ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f 6c /r ] ND,AVX2,FUTURE */ + /* 260(001 005) 001(6c) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPUNPCKLQDQ, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64483, 467, 4210}, + /* 4 : VPUNPCKLQDQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f.w1 6c /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(6c) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPUNPCKLQDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+43465, 543, 6681}, + /* 5 : VPUNPCKLQDQ xmmreg|mask|z,xmmrm128|b64 [r+vm:fv: evex.nds.128.66.0f.w1 6c /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 fd 08) 301 001(6c) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPUNPCKLQDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+43474, 543, 6681}, + /* 6 : VPUNPCKLQDQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f.w1 6c /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(6c) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPUNPCKLQDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+43483, 543, 6682}, + /* 7 : VPUNPCKLQDQ ymmreg|mask|z,ymmrm256|b64 [r+vm:fv: evex.nds.256.66.0f.w1 6c /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 fd 28) 301 001(6c) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPUNPCKLQDQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+43492, 543, 6682}, + /* 8 : VPUNPCKLQDQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f.w1 6c /r ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(6c) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPUNPCKLQDQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+43501, 544, 6683}, + /* 9 : VPUNPCKLQDQ zmmreg|mask|z,zmmrm512|b64 [r+vm:fv: evex.nds.512.66.0f.w1 6c /r ] ND,AVX512,FUTURE */ + /* 240(f1 fd 48) 301 001(6c) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPUNPCKLQDQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+43510, 544, 6683}, +}; + +static const struct itemplate instrux_VPXOR[4] = { + /* 0 : VPXOR xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f ef /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(ef) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPXOR, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61466, 433, 3549}, + /* 1 : VPXOR xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f ef /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(ef) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPXOR, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61473, 433, 3549}, + /* 2 : VPXOR ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f ef /r ] AVX2,FUTURE */ + /* 261(001 005) 001(ef) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPXOR, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64490, 467, 4211}, + /* 3 : VPXOR ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f ef /r ] ND,AVX2,FUTURE */ + /* 260(001 005) 001(ef) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPXOR, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64497, 467, 4211}, +}; + +static const struct itemplate instrux_VRCPPS[2] = { + /* 0 : VRCPPS xmmreg,xmmrm128 [rm: vex.128.0f 53 /r ] AVX,SANDYBRIDGE */ + /* 270(001 000) 001(53) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VRCPPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61480, 433, 3550}, + /* 1 : VRCPPS ymmreg,ymmrm256 [rm: vex.256.0f 53 /r ] AVX,SANDYBRIDGE */ + /* 270(001 004) 001(53) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VRCPPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61487, 433, 3551}, +}; + +static const struct itemplate instrux_VRCPSS[2] = { + /* 0 : VRCPSS xmmreg,xmmreg*,xmmrm32 [rvm: vex.nds.lig.f3.0f 53 /r ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(53) 120 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VRCPSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61494, 440, 3552}, + /* 1 : VRCPSS xmmreg,xmmrm32 [r+vm: vex.nds.lig.f3.0f 53 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 002) 001(53) 110 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VRCPSS, 2, {XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61501, 440, 3552}, +}; + +static const struct itemplate instrux_VRSQRTPS[2] = { + /* 0 : VRSQRTPS xmmreg,xmmrm128 [rm: vex.128.0f 52 /r ] AVX,SANDYBRIDGE */ + /* 270(001 000) 001(52) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VRSQRTPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61508, 433, 3553}, + /* 1 : VRSQRTPS ymmreg,ymmrm256 [rm: vex.256.0f 52 /r ] AVX,SANDYBRIDGE */ + /* 270(001 004) 001(52) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VRSQRTPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61515, 433, 3554}, +}; + +static const struct itemplate instrux_VRSQRTSS[2] = { + /* 0 : VRSQRTSS xmmreg,xmmreg*,xmmrm32 [rvm: vex.nds.lig.f3.0f 52 /r ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(52) 120 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VRSQRTSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61522, 440, 3555}, + /* 1 : VRSQRTSS xmmreg,xmmrm32 [r+vm: vex.nds.lig.f3.0f 52 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 002) 001(52) 110 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VRSQRTSS, 2, {XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61529, 440, 3555}, +}; + +static const struct itemplate instrux_VROUNDPD[2] = { + /* 0 : VROUNDPD xmmreg,xmmrm128,imm8 [rmi: vex.128.66.0f3a 09 /r ib ] AVX,SANDYBRIDGE */ + /* 270(003 001) 001(09) 110 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VROUNDPD, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52499, 433, 3556}, + /* 1 : VROUNDPD ymmreg,ymmrm256,imm8 [rmi: vex.256.66.0f3a 09 /r ib ] AVX,SANDYBRIDGE */ + /* 270(003 005) 001(09) 110 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VROUNDPD, 3, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52507, 433, 3557}, +}; + +static const struct itemplate instrux_VROUNDPS[2] = { + /* 0 : VROUNDPS xmmreg,xmmrm128,imm8 [rmi: vex.128.66.0f3a 08 /r ib ] AVX,SANDYBRIDGE */ + /* 270(003 001) 001(08) 110 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VROUNDPS, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52515, 433, 3558}, + /* 1 : VROUNDPS ymmreg,ymmrm256,imm8 [rmi: vex.256.66.0f3a 08 /r ib ] AVX,SANDYBRIDGE */ + /* 270(003 005) 001(08) 110 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VROUNDPS, 3, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52523, 433, 3559}, +}; + +static const struct itemplate instrux_VROUNDSD[2] = { + /* 0 : VROUNDSD xmmreg,xmmreg*,xmmrm64,imm8 [rvmi: vex.nds.128.66.0f3a 0b /r ib ] AVX,SANDYBRIDGE */ + /* 261(003 001) 001(0b) 120 023 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VROUNDSD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+52531, 433, 3560}, + /* 1 : VROUNDSD xmmreg,xmmrm64,imm8 [r+vmi: vex.nds.128.66.0f3a 0b /r ib ] ND,AVX,SANDYBRIDGE */ + /* 260(003 001) 001(0b) 110 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VROUNDSD, 3, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52539, 433, 3560}, +}; + +static const struct itemplate instrux_VROUNDSS[2] = { + /* 0 : VROUNDSS xmmreg,xmmreg*,xmmrm32,imm8 [rvmi: vex.nds.128.66.0f3a 0a /r ib ] AVX,SANDYBRIDGE */ + /* 261(003 001) 001(0a) 120 023 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VROUNDSS, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+52547, 433, 3561}, + /* 1 : VROUNDSS xmmreg,xmmrm32,imm8 [r+vmi: vex.nds.128.66.0f3a 0a /r ib ] ND,AVX,SANDYBRIDGE */ + /* 260(003 001) 001(0a) 110 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VROUNDSS, 3, {XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52555, 433, 3561}, +}; + +static const struct itemplate instrux_VSHUFPD[10] = { + /* 0 : VSHUFPD xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: vex.nds.128.66.0f c6 /r ib ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c6) 120 023 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VSHUFPD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+52563, 433, 3562}, + /* 1 : VSHUFPD xmmreg,xmmrm128,imm8 [r+vmi: vex.nds.128.66.0f c6 /r ib ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(c6) 110 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VSHUFPD, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52571, 433, 3562}, + /* 2 : VSHUFPD ymmreg,ymmreg*,ymmrm256,imm8 [rvmi: vex.nds.256.66.0f c6 /r ib ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c6) 120 023 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VSHUFPD, 4, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+52579, 433, 3563}, + /* 3 : VSHUFPD ymmreg,ymmrm256,imm8 [r+vmi: vex.nds.256.66.0f c6 /r ib ] ND,AVX,SANDYBRIDGE */ + /* 260(001 005) 001(c6) 110 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VSHUFPD, 3, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52587, 433, 3563}, + /* 4 : VSHUFPD xmmreg|mask|z,xmmreg*,xmmrm128|b64,imm8 [rvmi:fv: evex.nds.128.66.0f.w1 c6 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c6) 120 023 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VSHUFPD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22043, 543, 6781}, + /* 5 : VSHUFPD xmmreg|mask|z,xmmrm128|b64,imm8 [r+vmi:fv: evex.nds.128.66.0f.w1 c6 /r ib ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 fd 08) 301 001(c6) 110 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VSHUFPD, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+22053, 543, 6781}, + /* 6 : VSHUFPD ymmreg|mask|z,ymmreg*,ymmrm256|b64,imm8 [rvmi:fv: evex.nds.256.66.0f.w1 c6 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c6) 120 023 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VSHUFPD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22063, 543, 6782}, + /* 7 : VSHUFPD ymmreg|mask|z,ymmrm256|b64,imm8 [r+vmi:fv: evex.nds.256.66.0f.w1 c6 /r ib ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 fd 28) 301 001(c6) 110 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VSHUFPD, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+22073, 543, 6782}, + /* 8 : VSHUFPD zmmreg|mask|z,zmmreg*,zmmrm512|b64,imm8 [rvmi:fv: evex.nds.512.66.0f.w1 c6 /r ib ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c6) 120 023 : EVEX,PROT,AVX512,FUTURE */ + {I_VSHUFPD, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22083, 544, 6783}, + /* 9 : VSHUFPD zmmreg|mask|z,zmmrm512|b64,imm8 [r+vmi:fv: evex.nds.512.66.0f.w1 c6 /r ib ] ND,AVX512,FUTURE */ + /* 240(f1 fd 48) 301 001(c6) 110 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VSHUFPD, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+22093, 544, 6783}, +}; + +static const struct itemplate instrux_VSHUFPS[10] = { + /* 0 : VSHUFPS xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: vex.nds.128.0f c6 /r ib ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c6) 120 023 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VSHUFPS, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+52595, 433, 3564}, + /* 1 : VSHUFPS xmmreg,xmmrm128,imm8 [r+vmi: vex.nds.128.0f c6 /r ib ] ND,AVX,SANDYBRIDGE */ + /* 260(001 000) 001(c6) 110 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VSHUFPS, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52603, 433, 3564}, + /* 2 : VSHUFPS ymmreg,ymmreg*,ymmrm256,imm8 [rvmi: vex.nds.256.0f c6 /r ib ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c6) 120 023 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VSHUFPS, 4, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+52611, 433, 3565}, + /* 3 : VSHUFPS ymmreg,ymmrm256,imm8 [r+vmi: vex.nds.256.0f c6 /r ib ] ND,AVX,SANDYBRIDGE */ + /* 260(001 004) 001(c6) 110 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VSHUFPS, 3, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52619, 433, 3565}, + /* 4 : VSHUFPS xmmreg|mask|z,xmmreg*,xmmrm128|b32,imm8 [rvmi:fv: evex.nds.128.0f.w0 c6 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c6) 120 023 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VSHUFPS, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22103, 543, 6784}, + /* 5 : VSHUFPS xmmreg|mask|z,xmmrm128|b32,imm8 [r+vmi:fv: evex.nds.128.0f.w0 c6 /r ib ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 7c 08) 301 001(c6) 110 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VSHUFPS, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+22113, 543, 6784}, + /* 6 : VSHUFPS ymmreg|mask|z,ymmreg*,ymmrm256|b32,imm8 [rvmi:fv: evex.nds.256.0f.w0 c6 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c6) 120 023 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VSHUFPS, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22123, 543, 6785}, + /* 7 : VSHUFPS ymmreg|mask|z,ymmrm256|b32,imm8 [r+vmi:fv: evex.nds.256.0f.w0 c6 /r ib ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 7c 28) 301 001(c6) 110 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VSHUFPS, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+22133, 543, 6785}, + /* 8 : VSHUFPS zmmreg|mask|z,zmmreg*,zmmrm512|b32,imm8 [rvmi:fv: evex.nds.512.0f.w0 c6 /r ib ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c6) 120 023 : EVEX,PROT,AVX512,FUTURE */ + {I_VSHUFPS, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22143, 544, 6786}, + /* 9 : VSHUFPS zmmreg|mask|z,zmmrm512|b32,imm8 [r+vmi:fv: evex.nds.512.0f.w0 c6 /r ib ] ND,AVX512,FUTURE */ + /* 240(f1 7c 48) 301 001(c6) 110 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VSHUFPS, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+22153, 544, 6786}, +}; + +static const struct itemplate instrux_VSQRTPD[5] = { + /* 0 : VSQRTPD xmmreg,xmmrm128 [rm: vex.128.66.0f 51 /r ] AVX,SANDYBRIDGE */ + /* 270(001 001) 001(51) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VSQRTPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61536, 433, 3566}, + /* 1 : VSQRTPD ymmreg,ymmrm256 [rm: vex.256.66.0f 51 /r ] AVX,SANDYBRIDGE */ + /* 270(001 005) 001(51) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VSQRTPD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61543, 433, 3567}, + /* 2 : VSQRTPD xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.66.0f.w1 51 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 fd 08) 301 001(51) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VSQRTPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+44113, 543, 6787}, + /* 3 : VSQRTPD ymmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.66.0f.w1 51 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 fd 28) 301 001(51) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VSQRTPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+44122, 543, 6788}, + /* 4 : VSQRTPD zmmreg|mask|z,zmmrm512|b64|er [rm:fv: evex.512.66.0f.w1 51 /r ] AVX512,FUTURE */ + /* 250(f1 fd 48) 301 001(51) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VSQRTPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+44131, 544, 6789}, +}; + +static const struct itemplate instrux_VSQRTPS[5] = { + /* 0 : VSQRTPS xmmreg,xmmrm128 [rm: vex.128.0f 51 /r ] AVX,SANDYBRIDGE */ + /* 270(001 000) 001(51) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VSQRTPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61550, 433, 3568}, + /* 1 : VSQRTPS ymmreg,ymmrm256 [rm: vex.256.0f 51 /r ] AVX,SANDYBRIDGE */ + /* 270(001 004) 001(51) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VSQRTPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61557, 433, 3569}, + /* 2 : VSQRTPS xmmreg|mask|z,xmmrm128|b32 [rm:fv: evex.128.0f.w0 51 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7c 08) 301 001(51) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VSQRTPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+44140, 543, 6790}, + /* 3 : VSQRTPS ymmreg|mask|z,ymmrm256|b32 [rm:fv: evex.256.0f.w0 51 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7c 28) 301 001(51) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VSQRTPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+44149, 543, 6791}, + /* 4 : VSQRTPS zmmreg|mask|z,zmmrm512|b32|er [rm:fv: evex.512.0f.w0 51 /r ] AVX512,FUTURE */ + /* 250(f1 7c 48) 301 001(51) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VSQRTPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+44158, 544, 6792}, +}; + +static const struct itemplate instrux_VSQRTSD[4] = { + /* 0 : VSQRTSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f 51 /r ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(51) 120 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VSQRTSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61564, 440, 3570}, + /* 1 : VSQRTSD xmmreg,xmmrm64 [r+vm: vex.nds.lig.f2.0f 51 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 003) 001(51) 110 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VSQRTSD, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61571, 440, 3570}, + /* 2 : VSQRTSD xmmreg|mask|z,xmmreg*,xmmrm64|er [rvm:t1s: evex.nds.lig.f2.0f.w1 51 /r ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(51) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VSQRTSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+44167, 545, 6793}, + /* 3 : VSQRTSD xmmreg|mask|z,xmmrm64|er [r+vm:t1s: evex.nds.lig.f2.0f.w1 51 /r ] ND,AVX512,FUTURE */ + /* 240(f1 ff 08) 306 001(51) 110 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VSQRTSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+44176, 545, 6793}, +}; + +static const struct itemplate instrux_VSQRTSS[4] = { + /* 0 : VSQRTSS xmmreg,xmmreg*,xmmrm32 [rvm: vex.nds.lig.f3.0f 51 /r ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(51) 120 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VSQRTSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61578, 440, 3571}, + /* 1 : VSQRTSS xmmreg,xmmrm32 [r+vm: vex.nds.lig.f3.0f 51 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 002) 001(51) 110 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VSQRTSS, 2, {XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61585, 440, 3571}, + /* 2 : VSQRTSS xmmreg|mask|z,xmmreg*,xmmrm32|er [rvm:t1s: evex.nds.lig.f3.0f.w0 51 /r ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(51) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VSQRTSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+44185, 545, 6794}, + /* 3 : VSQRTSS xmmreg|mask|z,xmmrm32|er [r+vm:t1s: evex.nds.lig.f3.0f.w0 51 /r ] ND,AVX512,FUTURE */ + /* 240(f1 7e 08) 306 001(51) 110 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VSQRTSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+44194, 545, 6794}, +}; + +static const struct itemplate instrux_VSTMXCSR[1] = { + /* 0 : VSTMXCSR mem32 [m: vex.128.0f ae /3 ] AVX,SANDYBRIDGE */ + /* 270(001 000) 001(ae) 203 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VSTMXCSR, 1, {MEMORY|BITS32|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+61592, 433, 3572}, +}; + +static const struct itemplate instrux_VSUBPD[10] = { + /* 0 : VSUBPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 5c /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(5c) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VSUBPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61599, 433, 3573}, + /* 1 : VSUBPD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f 5c /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(5c) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VSUBPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61606, 433, 3573}, + /* 2 : VSUBPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 5c /r ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(5c) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VSUBPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61613, 433, 3574}, + /* 3 : VSUBPD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f 5c /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 005) 001(5c) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VSUBPD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61620, 433, 3574}, + /* 4 : VSUBPD xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f.w1 5c /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(5c) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VSUBPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+44203, 543, 6795}, + /* 5 : VSUBPD xmmreg|mask|z,xmmrm128|b64 [r+vm:fv: evex.nds.128.66.0f.w1 5c /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 fd 08) 301 001(5c) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VSUBPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+44212, 543, 6795}, + /* 6 : VSUBPD ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f.w1 5c /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(5c) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VSUBPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+44221, 543, 6796}, + /* 7 : VSUBPD ymmreg|mask|z,ymmrm256|b64 [r+vm:fv: evex.nds.256.66.0f.w1 5c /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 fd 28) 301 001(5c) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VSUBPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+44230, 543, 6796}, + /* 8 : VSUBPD zmmreg|mask|z,zmmreg*,zmmrm512|b64|er [rvm:fv: evex.nds.512.66.0f.w1 5c /r ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(5c) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VSUBPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+44239, 544, 6797}, + /* 9 : VSUBPD zmmreg|mask|z,zmmrm512|b64|er [r+vm:fv: evex.nds.512.66.0f.w1 5c /r ] ND,AVX512,FUTURE */ + /* 240(f1 fd 48) 301 001(5c) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VSUBPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+44248, 544, 6797}, +}; + +static const struct itemplate instrux_VSUBPS[10] = { + /* 0 : VSUBPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f 5c /r ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(5c) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VSUBPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61627, 433, 3575}, + /* 1 : VSUBPS xmmreg,xmmrm128 [r+vm: vex.nds.128.0f 5c /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 000) 001(5c) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VSUBPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61634, 433, 3575}, + /* 2 : VSUBPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f 5c /r ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(5c) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VSUBPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61641, 433, 3576}, + /* 3 : VSUBPS ymmreg,ymmrm256 [r+vm: vex.nds.256.0f 5c /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 004) 001(5c) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VSUBPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61648, 433, 3576}, + /* 4 : VSUBPS xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.0f.w0 5c /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(5c) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VSUBPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+44257, 543, 6798}, + /* 5 : VSUBPS xmmreg|mask|z,xmmrm128|b32 [r+vm:fv: evex.nds.128.0f.w0 5c /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 7c 08) 301 001(5c) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VSUBPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+44266, 543, 6798}, + /* 6 : VSUBPS ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.0f.w0 5c /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(5c) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VSUBPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+44275, 543, 6799}, + /* 7 : VSUBPS ymmreg|mask|z,ymmrm256|b32 [r+vm:fv: evex.nds.256.0f.w0 5c /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 7c 28) 301 001(5c) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VSUBPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+44284, 543, 6799}, + /* 8 : VSUBPS zmmreg|mask|z,zmmreg*,zmmrm512|b32|er [rvm:fv: evex.nds.512.0f.w0 5c /r ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(5c) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VSUBPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+44293, 544, 6800}, + /* 9 : VSUBPS zmmreg|mask|z,zmmrm512|b32|er [r+vm:fv: evex.nds.512.0f.w0 5c /r ] ND,AVX512,FUTURE */ + /* 240(f1 7c 48) 301 001(5c) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VSUBPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+44302, 544, 6800}, +}; + +static const struct itemplate instrux_VSUBSD[4] = { + /* 0 : VSUBSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f 5c /r ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(5c) 120 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VSUBSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61655, 440, 3577}, + /* 1 : VSUBSD xmmreg,xmmrm64 [r+vm: vex.nds.lig.f2.0f 5c /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 003) 001(5c) 110 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VSUBSD, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61662, 440, 3577}, + /* 2 : VSUBSD xmmreg|mask|z,xmmreg*,xmmrm64|er [rvm:t1s: evex.nds.lig.f2.0f.w1 5c /r ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(5c) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VSUBSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+44311, 545, 6801}, + /* 3 : VSUBSD xmmreg|mask|z,xmmrm64|er [r+vm:t1s: evex.nds.lig.f2.0f.w1 5c /r ] ND,AVX512,FUTURE */ + /* 240(f1 ff 08) 306 001(5c) 110 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VSUBSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+44320, 545, 6801}, +}; + +static const struct itemplate instrux_VSUBSS[4] = { + /* 0 : VSUBSS xmmreg,xmmreg*,xmmrm32 [rvm: vex.nds.lig.f3.0f 5c /r ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(5c) 120 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VSUBSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61669, 440, 3578}, + /* 1 : VSUBSS xmmreg,xmmrm32 [r+vm: vex.nds.lig.f3.0f 5c /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 002) 001(5c) 110 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VSUBSS, 2, {XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61676, 440, 3578}, + /* 2 : VSUBSS xmmreg|mask|z,xmmreg*,xmmrm32|er [rvm:t1s: evex.nds.lig.f3.0f.w0 5c /r ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(5c) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VSUBSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+44329, 545, 6802}, + /* 3 : VSUBSS xmmreg|mask|z,xmmrm32|er [r+vm:t1s: evex.nds.lig.f3.0f.w0 5c /r ] ND,AVX512,FUTURE */ + /* 240(f1 7e 08) 306 001(5c) 110 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VSUBSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+44338, 545, 6802}, +}; + +static const struct itemplate instrux_VTESTPS[2] = { + /* 0 : VTESTPS xmmreg,xmmrm128 [rm: vex.128.66.0f38.w0 0e /r ] FL,AVX,SANDYBRIDGE */ + /* 270(002 001) 001(0e) 110 : NOAPX,FL,VEX,AVX,SANDYBRIDGE */ + {I_VTESTPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61683, 457, 3579}, + /* 1 : VTESTPS ymmreg,ymmrm256 [rm: vex.256.66.0f38.w0 0e /r ] FL,AVX,SANDYBRIDGE */ + /* 270(002 005) 001(0e) 110 : NOAPX,FL,VEX,AVX,SANDYBRIDGE */ + {I_VTESTPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61690, 457, 3580}, +}; + +static const struct itemplate instrux_VTESTPD[2] = { + /* 0 : VTESTPD xmmreg,xmmrm128 [rm: vex.128.66.0f38.w0 0f /r ] AVX,SANDYBRIDGE */ + /* 270(002 001) 001(0f) 110 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VTESTPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61697, 441, 3581}, + /* 1 : VTESTPD ymmreg,ymmrm256 [rm: vex.256.66.0f38.w0 0f /r ] AVX,SANDYBRIDGE */ + /* 270(002 005) 001(0f) 110 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VTESTPD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61704, 441, 3582}, +}; + +static const struct itemplate instrux_VUCOMISD[2] = { + /* 0 : VUCOMISD xmmreg,xmmrm64 [rm: vex.lig.66.0f 2e /r ] FL,AVX,SANDYBRIDGE */ + /* 270(001 001) 001(2e) 110 : NOAPX,LIG,WIG,FL,VEX,AVX,SANDYBRIDGE */ + {I_VUCOMISD, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61711, 442, 3583}, + /* 1 : VUCOMISD xmmreg,xmmrm64|sae [rm:t1s: evex.lig.66.0f.w1 2e /r ] FL,AVX512,FUTURE */ + /* 250(f1 fd 08) 306 001(2e) 110 : LIG,FL,EVEX,PROT,AVX512,FUTURE */ + {I_VUCOMISD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+44347, 548, 6803}, +}; + +static const struct itemplate instrux_VUCOMISS[2] = { + /* 0 : VUCOMISS xmmreg,xmmrm32 [rm: vex.lig.0f 2e /r ] FL,AVX,SANDYBRIDGE */ + /* 270(001 000) 001(2e) 110 : NOAPX,LIG,WIG,FL,VEX,AVX,SANDYBRIDGE */ + {I_VUCOMISS, 2, {XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61718, 442, 3584}, + /* 1 : VUCOMISS xmmreg,xmmrm32|sae [rm:t1s: evex.lig.0f.w0 2e /r ] FL,AVX512,FUTURE */ + /* 250(f1 7c 08) 306 001(2e) 110 : LIG,FL,EVEX,PROT,AVX512,FUTURE */ + {I_VUCOMISS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+44356, 548, 6804}, +}; + +static const struct itemplate instrux_VUNPCKHPD[10] = { + /* 0 : VUNPCKHPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 15 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(15) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VUNPCKHPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61725, 433, 3585}, + /* 1 : VUNPCKHPD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f 15 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(15) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VUNPCKHPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61732, 433, 3585}, + /* 2 : VUNPCKHPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 15 /r ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(15) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VUNPCKHPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61739, 433, 3586}, + /* 3 : VUNPCKHPD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f 15 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 005) 001(15) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VUNPCKHPD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61746, 433, 3586}, + /* 4 : VUNPCKHPD xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f.w1 15 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(15) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VUNPCKHPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+44365, 543, 6805}, + /* 5 : VUNPCKHPD xmmreg|mask|z,xmmrm128|b64 [r+vm:fv: evex.nds.128.66.0f.w1 15 /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 fd 08) 301 001(15) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VUNPCKHPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+44374, 543, 6805}, + /* 6 : VUNPCKHPD ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f.w1 15 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(15) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VUNPCKHPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+44383, 543, 6806}, + /* 7 : VUNPCKHPD ymmreg|mask|z,ymmrm256|b64 [r+vm:fv: evex.nds.256.66.0f.w1 15 /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 fd 28) 301 001(15) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VUNPCKHPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+44392, 543, 6806}, + /* 8 : VUNPCKHPD zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f.w1 15 /r ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(15) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VUNPCKHPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+44401, 544, 6807}, + /* 9 : VUNPCKHPD zmmreg|mask|z,zmmrm512|b64 [r+vm:fv: evex.nds.512.66.0f.w1 15 /r ] ND,AVX512,FUTURE */ + /* 240(f1 fd 48) 301 001(15) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VUNPCKHPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+44410, 544, 6807}, +}; + +static const struct itemplate instrux_VUNPCKHPS[10] = { + /* 0 : VUNPCKHPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f 15 /r ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(15) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VUNPCKHPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61753, 433, 3587}, + /* 1 : VUNPCKHPS xmmreg,xmmrm128 [r+vm: vex.nds.128.0f 15 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 000) 001(15) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VUNPCKHPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61760, 433, 3587}, + /* 2 : VUNPCKHPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f 15 /r ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(15) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VUNPCKHPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61767, 433, 3588}, + /* 3 : VUNPCKHPS ymmreg,ymmrm256 [r+vm: vex.nds.256.0f 15 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 004) 001(15) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VUNPCKHPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61774, 433, 3588}, + /* 4 : VUNPCKHPS xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.0f.w0 15 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(15) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VUNPCKHPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+44419, 543, 6808}, + /* 5 : VUNPCKHPS xmmreg|mask|z,xmmrm128|b32 [r+vm:fv: evex.nds.128.0f.w0 15 /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 7c 08) 301 001(15) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VUNPCKHPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+44428, 543, 6808}, + /* 6 : VUNPCKHPS ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.0f.w0 15 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(15) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VUNPCKHPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+44437, 543, 6809}, + /* 7 : VUNPCKHPS ymmreg|mask|z,ymmrm256|b32 [r+vm:fv: evex.nds.256.0f.w0 15 /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 7c 28) 301 001(15) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VUNPCKHPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+44446, 543, 6809}, + /* 8 : VUNPCKHPS zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.0f.w0 15 /r ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(15) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VUNPCKHPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+44455, 544, 6810}, + /* 9 : VUNPCKHPS zmmreg|mask|z,zmmrm512|b32 [r+vm:fv: evex.nds.512.0f.w0 15 /r ] ND,AVX512,FUTURE */ + /* 240(f1 7c 48) 301 001(15) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VUNPCKHPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+44464, 544, 6810}, +}; + +static const struct itemplate instrux_VUNPCKLPD[10] = { + /* 0 : VUNPCKLPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 14 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(14) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VUNPCKLPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61781, 433, 3589}, + /* 1 : VUNPCKLPD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f 14 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(14) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VUNPCKLPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61788, 433, 3589}, + /* 2 : VUNPCKLPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 14 /r ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(14) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VUNPCKLPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61795, 433, 3590}, + /* 3 : VUNPCKLPD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f 14 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 005) 001(14) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VUNPCKLPD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61802, 433, 3590}, + /* 4 : VUNPCKLPD xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f.w1 14 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(14) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VUNPCKLPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+44473, 543, 6811}, + /* 5 : VUNPCKLPD xmmreg|mask|z,xmmrm128|b64 [r+vm:fv: evex.nds.128.66.0f.w1 14 /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 fd 08) 301 001(14) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VUNPCKLPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+44482, 543, 6811}, + /* 6 : VUNPCKLPD ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f.w1 14 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(14) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VUNPCKLPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+44491, 543, 6812}, + /* 7 : VUNPCKLPD ymmreg|mask|z,ymmrm256|b64 [r+vm:fv: evex.nds.256.66.0f.w1 14 /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 fd 28) 301 001(14) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VUNPCKLPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+44500, 543, 6812}, + /* 8 : VUNPCKLPD zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f.w1 14 /r ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(14) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VUNPCKLPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+44509, 544, 6813}, + /* 9 : VUNPCKLPD zmmreg|mask|z,zmmrm512|b64 [r+vm:fv: evex.nds.512.66.0f.w1 14 /r ] ND,AVX512,FUTURE */ + /* 240(f1 fd 48) 301 001(14) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VUNPCKLPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+44518, 544, 6813}, +}; + +static const struct itemplate instrux_VUNPCKLPS[10] = { + /* 0 : VUNPCKLPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f 14 /r ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(14) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VUNPCKLPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61809, 433, 3591}, + /* 1 : VUNPCKLPS xmmreg,xmmrm128 [r+vm: vex.nds.128.0f 14 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 000) 001(14) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VUNPCKLPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61816, 433, 3591}, + /* 2 : VUNPCKLPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f 14 /r ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(14) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VUNPCKLPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61823, 433, 3592}, + /* 3 : VUNPCKLPS ymmreg,ymmrm256 [r+vm: vex.nds.256.0f 14 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 004) 001(14) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VUNPCKLPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61830, 433, 3592}, + /* 4 : VUNPCKLPS xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.0f.w0 14 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(14) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VUNPCKLPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+44527, 543, 6814}, + /* 5 : VUNPCKLPS xmmreg|mask|z,xmmrm128|b32 [r+vm:fv: evex.nds.128.0f.w0 14 /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 7c 08) 301 001(14) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VUNPCKLPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+44536, 543, 6814}, + /* 6 : VUNPCKLPS ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.0f.w0 14 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(14) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VUNPCKLPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+44545, 543, 6815}, + /* 7 : VUNPCKLPS ymmreg|mask|z,ymmrm256|b32 [r+vm:fv: evex.nds.256.0f.w0 14 /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 7c 28) 301 001(14) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VUNPCKLPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+44554, 543, 6815}, + /* 8 : VUNPCKLPS zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.0f.w0 14 /r ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(14) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VUNPCKLPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+44563, 544, 6816}, + /* 9 : VUNPCKLPS zmmreg|mask|z,zmmrm512|b32 [r+vm:fv: evex.nds.512.0f.w0 14 /r ] ND,AVX512,FUTURE */ + /* 240(f1 7c 48) 301 001(14) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VUNPCKLPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+44572, 544, 6816}, +}; + +static const struct itemplate instrux_VXORPD[10] = { + /* 0 : VXORPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 57 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(57) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VXORPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61837, 433, 3593}, + /* 1 : VXORPD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f 57 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 001) 001(57) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VXORPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61844, 433, 3593}, + /* 2 : VXORPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 57 /r ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(57) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VXORPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61851, 433, 3594}, + /* 3 : VXORPD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f 57 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 005) 001(57) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VXORPD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61858, 433, 3594}, + /* 4 : VXORPD xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f.w1 57 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 241(f1 fd 08) 301 001(57) 120 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VXORPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+44581, 546, 6817}, + /* 5 : VXORPD xmmreg|mask|z,xmmrm128|b64 [r+vm:fv: evex.nds.128.66.0f.w1 57 /r ] ND,AVX512VL,AVX512DQ,FUTURE */ + /* 240(f1 fd 08) 301 001(57) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VXORPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+44590, 546, 6817}, + /* 6 : VXORPD ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f.w1 57 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 241(f1 fd 28) 301 001(57) 120 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VXORPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+44599, 546, 6818}, + /* 7 : VXORPD ymmreg|mask|z,ymmrm256|b64 [r+vm:fv: evex.nds.256.66.0f.w1 57 /r ] ND,AVX512VL,AVX512DQ,FUTURE */ + /* 240(f1 fd 28) 301 001(57) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VXORPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+44608, 546, 6818}, + /* 8 : VXORPD zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f.w1 57 /r ] AVX512DQ,FUTURE */ + /* 241(f1 fd 48) 301 001(57) 120 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VXORPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+44617, 547, 6819}, + /* 9 : VXORPD zmmreg|mask|z,zmmrm512|b64 [r+vm:fv: evex.nds.512.66.0f.w1 57 /r ] ND,AVX512DQ,FUTURE */ + /* 240(f1 fd 48) 301 001(57) 110 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VXORPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+44626, 547, 6819}, +}; + +static const struct itemplate instrux_VXORPS[10] = { + /* 0 : VXORPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f 57 /r ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(57) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VXORPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61865, 433, 3595}, + /* 1 : VXORPS xmmreg,xmmrm128 [r+vm: vex.nds.128.0f 57 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 000) 001(57) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VXORPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61872, 433, 3595}, + /* 2 : VXORPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f 57 /r ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(57) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VXORPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61879, 433, 3596}, + /* 3 : VXORPS ymmreg,ymmrm256 [r+vm: vex.nds.256.0f 57 /r ] ND,AVX,SANDYBRIDGE */ + /* 260(001 004) 001(57) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VXORPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61886, 433, 3596}, + /* 4 : VXORPS xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.0f.w0 57 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 241(f1 7c 08) 301 001(57) 120 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VXORPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+44635, 546, 6820}, + /* 5 : VXORPS xmmreg|mask|z,xmmrm128|b32 [r+vm:fv: evex.nds.128.0f.w0 57 /r ] ND,AVX512VL,AVX512DQ,FUTURE */ + /* 240(f1 7c 08) 301 001(57) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VXORPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+44644, 546, 6820}, + /* 6 : VXORPS ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.0f.w0 57 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 241(f1 7c 28) 301 001(57) 120 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VXORPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+44653, 546, 6821}, + /* 7 : VXORPS ymmreg|mask|z,ymmrm256|b32 [r+vm:fv: evex.nds.256.0f.w0 57 /r ] ND,AVX512VL,AVX512DQ,FUTURE */ + /* 240(f1 7c 28) 301 001(57) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VXORPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+44662, 546, 6821}, + /* 8 : VXORPS zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.0f.w0 57 /r ] AVX512DQ,FUTURE */ + /* 241(f1 7c 48) 301 001(57) 120 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VXORPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+44671, 547, 6822}, + /* 9 : VXORPS zmmreg|mask|z,zmmrm512|b32 [r+vm:fv: evex.nds.512.0f.w0 57 /r ] ND,AVX512DQ,FUTURE */ + /* 240(f1 7c 48) 301 001(57) 110 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VXORPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+44680, 547, 6822}, +}; + +static const struct itemplate instrux_VZEROALL[1] = { + /* 0 : VZEROALL void [ vex.256.0f.w0 77 ] AVX,SANDYBRIDGE */ + /* 270(001 004) 001(77) : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VZEROALL, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+69963, 441, 3597}, +}; + +static const struct itemplate instrux_VZEROUPPER[1] = { + /* 0 : VZEROUPPER void [ vex.128.0f.w0 77 ] AVX,SANDYBRIDGE */ + /* 270(001 000) 001(77) : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VZEROUPPER, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+69969, 441, 3598}, +}; + +static const struct itemplate instrux_PCLMULLQLQDQ[1] = { + /* 0 : PCLMULLQLQDQ xmmreg,xmmrm128 [rm: 66 0f3a 44 /r 00 ] SSE,WESTMERE */ + /* 361 357 001(44) 110 001(00) : NOAPX,SSE,WESTMERE */ + {I_PCLMULLQLQDQ, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+52627, 432, 3601}, +}; + +static const struct itemplate instrux_PCLMULHQLQDQ[1] = { + /* 0 : PCLMULHQLQDQ xmmreg,xmmrm128 [rm: 66 0f3a 44 /r 01 ] SSE,WESTMERE */ + /* 361 357 001(44) 110 001(01) : NOAPX,SSE,WESTMERE */ + {I_PCLMULHQLQDQ, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+52635, 432, 3602}, +}; + +static const struct itemplate instrux_PCLMULLQHQDQ[1] = { + /* 0 : PCLMULLQHQDQ xmmreg,xmmrm128 [rm: 66 0f3a 44 /r 10 ] SSE,WESTMERE */ + /* 361 357 001(44) 110 001(10) : NOAPX,SSE,WESTMERE */ + {I_PCLMULLQHQDQ, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+52643, 432, 3603}, +}; + +static const struct itemplate instrux_PCLMULHQHQDQ[1] = { + /* 0 : PCLMULHQHQDQ xmmreg,xmmrm128 [rm: 66 0f3a 44 /r 11 ] SSE,WESTMERE */ + /* 361 357 001(44) 110 001(11) : NOAPX,SSE,WESTMERE */ + {I_PCLMULHQHQDQ, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+52651, 432, 3604}, +}; + +static const struct itemplate instrux_PCLMULQDQ[1] = { + /* 0 : PCLMULQDQ xmmreg,xmmrm128,imm8 [rmi: 66 0f3a 44 /r ib ] SSE,WESTMERE */ + /* 361 357 001(44) 110 022 : NOAPX,SSE,WESTMERE */ + {I_PCLMULQDQ, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+61893, 432, 3605}, +}; + +static const struct itemplate instrux_VPCLMULLQLQDQ[10] = { + /* 0 : VPCLMULLQLQDQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f3a 44 /r 00 ] AVX,SANDYBRIDGE */ + /* 261(003 001) 001(44) 120 001(00) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPCLMULLQLQDQ, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29416, 433, 3608}, + /* 1 : VPCLMULLQLQDQ xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f3a 44 /r 00 ] ND,AVX,SANDYBRIDGE */ + /* 260(003 001) 001(44) 110 001(00) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPCLMULLQLQDQ, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29425, 433, 3608}, + /* 2 : VPCLMULLQLQDQ ymmreg,ymmreg*,ymmrm256 [rvm:fv: vex.nds.256.66.0f3a.wig 44 /r 00 ] VPCLMULQDQ,FUTURE */ + /* 261(003 005) 001(44) 120 001(00) : NOAPX,WIG,VEX,VPCLMULQDQ,FUTURE */ + {I_VPCLMULLQLQDQ, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29488, 458, 3615}, + /* 3 : VPCLMULLQLQDQ ymmreg,ymmrm256 [r+vm:fv: vex.nds.256.66.0f3a.wig 44 /r 00 ] ND,VPCLMULQDQ,FUTURE */ + /* 260(003 005) 001(44) 110 001(00) : NOAPX,WIG,VEX,VPCLMULQDQ,FUTURE */ + {I_VPCLMULLQLQDQ, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29497, 458, 3615}, + /* 4 : VPCLMULLQLQDQ xmmreg,xmmreg*,xmmrm128 [rvm:fv: evex.nds.128.66.0f3a.wig 44 /r 00 ] AVX512VL,VPCLMULQDQ,FUTURE */ + /* 241(f3 7d 08) 301 001(44) 120 001(00) : WIG,EVEX,PROT,AVX512VL,VPCLMULQDQ,FUTURE */ + {I_VPCLMULLQLQDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4479, 459, 3622}, + /* 5 : VPCLMULLQLQDQ xmmreg,xmmrm128 [r+vm:fv: evex.nds.128.66.0f3a.wig 44 /r 00 ] ND,AVX512VL,VPCLMULQDQ,FUTURE */ + /* 240(f3 7d 08) 301 001(44) 110 001(00) : WIG,EVEX,PROT,AVX512VL,VPCLMULQDQ,FUTURE */ + {I_VPCLMULLQLQDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4490, 459, 3622}, + /* 6 : VPCLMULLQLQDQ ymmreg,ymmreg*,ymmrm256 [rvm:fv: evex.nds.256.66.0f3a.wig 44 /r 00 ] AVX512VL,VPCLMULQDQ,FUTURE */ + /* 241(f3 7d 28) 301 001(44) 120 001(00) : WIG,EVEX,PROT,AVX512VL,VPCLMULQDQ,FUTURE */ + {I_VPCLMULLQLQDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4567, 459, 3628}, + /* 7 : VPCLMULLQLQDQ ymmreg,ymmrm256 [r+vm:fv: evex.nds.256.66.0f3a.wig 44 /r 00 ] ND,AVX512VL,VPCLMULQDQ,FUTURE */ + /* 240(f3 7d 28) 301 001(44) 110 001(00) : WIG,EVEX,PROT,AVX512VL,VPCLMULQDQ,FUTURE */ + {I_VPCLMULLQLQDQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4578, 459, 3628}, + /* 8 : VPCLMULLQLQDQ zmmreg,zmmreg*,zmmrm512 [rvm:fv: evex.nds.512.66.0f3a.wig 44 /r 00 ] AVX512,VPCLMULQDQ,FUTURE */ + /* 241(f3 7d 48) 301 001(44) 120 001(00) : WIG,EVEX,PROT,AVX512,VPCLMULQDQ,FUTURE */ + {I_VPCLMULLQLQDQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, NO_DECORATOR, nasm_bytecodes+4655, 460, 3635}, + /* 9 : VPCLMULLQLQDQ zmmreg,zmmrm512 [r+vm:fv: evex.nds.512.66.0f3a.wig 44 /r 00 ] ND,AVX512,VPCLMULQDQ,FUTURE */ + /* 240(f3 7d 48) 301 001(44) 110 001(00) : WIG,EVEX,PROT,AVX512,VPCLMULQDQ,FUTURE */ + {I_VPCLMULLQLQDQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+4666, 460, 3635}, +}; + +static const struct itemplate instrux_VPCLMULHQLQDQ[10] = { + /* 0 : VPCLMULHQLQDQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f3a 44 /r 01 ] AVX,SANDYBRIDGE */ + /* 261(003 001) 001(44) 120 001(01) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPCLMULHQLQDQ, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29434, 433, 3609}, + /* 1 : VPCLMULHQLQDQ xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f3a 44 /r 01 ] ND,AVX,SANDYBRIDGE */ + /* 260(003 001) 001(44) 110 001(01) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPCLMULHQLQDQ, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29443, 433, 3609}, + /* 2 : VPCLMULHQLQDQ ymmreg,ymmreg*,ymmrm256 [rvm:fv: vex.nds.256.66.0f3a.wig 44 /r 01 ] VPCLMULQDQ,FUTURE */ + /* 261(003 005) 001(44) 120 001(01) : NOAPX,WIG,VEX,VPCLMULQDQ,FUTURE */ + {I_VPCLMULHQLQDQ, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29506, 458, 3616}, + /* 3 : VPCLMULHQLQDQ ymmreg,ymmrm256 [r+vm:fv: vex.nds.256.66.0f3a.wig 44 /r 01 ] ND,VPCLMULQDQ,FUTURE */ + /* 260(003 005) 001(44) 110 001(01) : NOAPX,WIG,VEX,VPCLMULQDQ,FUTURE */ + {I_VPCLMULHQLQDQ, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29515, 458, 3616}, + /* 4 : VPCLMULHQLQDQ xmmreg,xmmreg*,xmmrm128 [rvm:fv: evex.nds.128.66.0f3a.wig 44 /r 01 ] AVX512VL,VPCLMULQDQ,FUTURE */ + /* 241(f3 7d 08) 301 001(44) 120 001(01) : WIG,EVEX,PROT,AVX512VL,VPCLMULQDQ,FUTURE */ + {I_VPCLMULHQLQDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4501, 459, 3623}, + /* 5 : VPCLMULHQLQDQ xmmreg,xmmrm128 [r+vm:fv: evex.nds.128.66.0f3a.wig 44 /r 01 ] ND,AVX512VL,VPCLMULQDQ,FUTURE */ + /* 240(f3 7d 08) 301 001(44) 110 001(01) : WIG,EVEX,PROT,AVX512VL,VPCLMULQDQ,FUTURE */ + {I_VPCLMULHQLQDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4512, 459, 3623}, + /* 6 : VPCLMULHQLQDQ ymmreg,ymmreg*,ymmrm256 [rvm:fv: evex.nds.256.66.0f3a.wig 44 /r 01 ] AVX512VL,VPCLMULQDQ,FUTURE */ + /* 241(f3 7d 28) 301 001(44) 120 001(01) : WIG,EVEX,PROT,AVX512VL,VPCLMULQDQ,FUTURE */ + {I_VPCLMULHQLQDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4589, 459, 3629}, + /* 7 : VPCLMULHQLQDQ ymmreg,ymmrm256 [r+vm:fv: evex.nds.256.66.0f3a.wig 44 /r 01 ] ND,AVX512VL,VPCLMULQDQ,FUTURE */ + /* 240(f3 7d 28) 301 001(44) 110 001(01) : WIG,EVEX,PROT,AVX512VL,VPCLMULQDQ,FUTURE */ + {I_VPCLMULHQLQDQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4600, 459, 3629}, + /* 8 : VPCLMULHQLQDQ zmmreg,zmmreg*,zmmrm512 [rvm:fv: evex.nds.512.66.0f3a.wig 44 /r 01 ] AVX512,VPCLMULQDQ,FUTURE */ + /* 241(f3 7d 48) 301 001(44) 120 001(01) : WIG,EVEX,PROT,AVX512,VPCLMULQDQ,FUTURE */ + {I_VPCLMULHQLQDQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, NO_DECORATOR, nasm_bytecodes+4677, 460, 3636}, + /* 9 : VPCLMULHQLQDQ zmmreg,zmmrm512 [r+vm:fv: evex.nds.512.66.0f3a.wig 44 /r 01 ] ND,AVX512,VPCLMULQDQ,FUTURE */ + /* 240(f3 7d 48) 301 001(44) 110 001(01) : WIG,EVEX,PROT,AVX512,VPCLMULQDQ,FUTURE */ + {I_VPCLMULHQLQDQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+4688, 460, 3636}, +}; + +static const struct itemplate instrux_VPCLMULLQHQDQ[10] = { + /* 0 : VPCLMULLQHQDQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f3a 44 /r 10 ] AVX,SANDYBRIDGE */ + /* 261(003 001) 001(44) 120 001(10) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPCLMULLQHQDQ, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29452, 433, 3610}, + /* 1 : VPCLMULLQHQDQ xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f3a 44 /r 10 ] ND,AVX,SANDYBRIDGE */ + /* 260(003 001) 001(44) 110 001(10) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPCLMULLQHQDQ, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29461, 433, 3610}, + /* 2 : VPCLMULLQHQDQ ymmreg,ymmreg*,ymmrm256 [rvm:fv: vex.nds.256.66.0f3a.wig 44 /r 10 ] VPCLMULQDQ,FUTURE */ + /* 261(003 005) 001(44) 120 001(10) : NOAPX,WIG,VEX,VPCLMULQDQ,FUTURE */ + {I_VPCLMULLQHQDQ, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29524, 458, 3617}, + /* 3 : VPCLMULLQHQDQ ymmreg,ymmrm256 [r+vm:fv: vex.nds.256.66.0f3a.wig 44 /r 10 ] ND,VPCLMULQDQ,FUTURE */ + /* 260(003 005) 001(44) 110 001(10) : NOAPX,WIG,VEX,VPCLMULQDQ,FUTURE */ + {I_VPCLMULLQHQDQ, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29533, 458, 3617}, + /* 4 : VPCLMULLQHQDQ xmmreg,xmmreg*,xmmrm128 [rvm:fv: evex.nds.128.66.0f3a.wig 44 /r 10 ] AVX512VL,VPCLMULQDQ,FUTURE */ + /* 241(f3 7d 08) 301 001(44) 120 001(10) : WIG,EVEX,PROT,AVX512VL,VPCLMULQDQ,FUTURE */ + {I_VPCLMULLQHQDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4523, 459, 3624}, + /* 5 : VPCLMULLQHQDQ xmmreg,xmmrm128 [r+vm:fv: evex.nds.128.66.0f3a.wig 44 /r 10 ] ND,AVX512VL,VPCLMULQDQ,FUTURE */ + /* 240(f3 7d 08) 301 001(44) 110 001(10) : WIG,EVEX,PROT,AVX512VL,VPCLMULQDQ,FUTURE */ + {I_VPCLMULLQHQDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4534, 459, 3624}, + /* 6 : VPCLMULLQHQDQ ymmreg,ymmreg*,ymmrm256 [rvm:fv: evex.nds.256.66.0f3a.wig 44 /r 10 ] AVX512VL,VPCLMULQDQ,FUTURE */ + /* 241(f3 7d 28) 301 001(44) 120 001(10) : WIG,EVEX,PROT,AVX512VL,VPCLMULQDQ,FUTURE */ + {I_VPCLMULLQHQDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4611, 459, 3630}, + /* 7 : VPCLMULLQHQDQ ymmreg,ymmrm256 [r+vm:fv: evex.nds.256.66.0f3a.wig 44 /r 10 ] ND,AVX512VL,VPCLMULQDQ,FUTURE */ + /* 240(f3 7d 28) 301 001(44) 110 001(10) : WIG,EVEX,PROT,AVX512VL,VPCLMULQDQ,FUTURE */ + {I_VPCLMULLQHQDQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4622, 459, 3630}, + /* 8 : VPCLMULLQHQDQ zmmreg,zmmreg*,zmmrm512 [rvm:fv: evex.nds.512.66.0f3a.wig 44 /r 10 ] AVX512,VPCLMULQDQ,FUTURE */ + /* 241(f3 7d 48) 301 001(44) 120 001(10) : WIG,EVEX,PROT,AVX512,VPCLMULQDQ,FUTURE */ + {I_VPCLMULLQHQDQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, NO_DECORATOR, nasm_bytecodes+4699, 460, 3637}, + /* 9 : VPCLMULLQHQDQ zmmreg,zmmrm512 [r+vm:fv: evex.nds.512.66.0f3a.wig 44 /r 10 ] ND,AVX512,VPCLMULQDQ,FUTURE */ + /* 240(f3 7d 48) 301 001(44) 110 001(10) : WIG,EVEX,PROT,AVX512,VPCLMULQDQ,FUTURE */ + {I_VPCLMULLQHQDQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+4710, 460, 3637}, +}; + +static const struct itemplate instrux_VPCLMULHQHQDQ[10] = { + /* 0 : VPCLMULHQHQDQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f3a 44 /r 11 ] AVX,SANDYBRIDGE */ + /* 261(003 001) 001(44) 120 001(11) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPCLMULHQHQDQ, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29470, 433, 3611}, + /* 1 : VPCLMULHQHQDQ xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f3a 44 /r 11 ] ND,AVX,SANDYBRIDGE */ + /* 260(003 001) 001(44) 110 001(11) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPCLMULHQHQDQ, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29479, 433, 3611}, + /* 2 : VPCLMULHQHQDQ ymmreg,ymmreg*,ymmrm256 [rvm:fv: vex.nds.256.66.0f3a.wig 44 /r 11 ] VPCLMULQDQ,FUTURE */ + /* 261(003 005) 001(44) 120 001(11) : NOAPX,WIG,VEX,VPCLMULQDQ,FUTURE */ + {I_VPCLMULHQHQDQ, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29542, 458, 3618}, + /* 3 : VPCLMULHQHQDQ ymmreg,ymmrm256 [r+vm:fv: vex.nds.256.66.0f3a.wig 44 /r 11 ] ND,VPCLMULQDQ,FUTURE */ + /* 260(003 005) 001(44) 110 001(11) : NOAPX,WIG,VEX,VPCLMULQDQ,FUTURE */ + {I_VPCLMULHQHQDQ, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29551, 458, 3618}, + /* 4 : VPCLMULHQHQDQ xmmreg,xmmreg*,xmmrm128 [rvm:fv: evex.nds.128.66.0f3a.wig 44 /r 11 ] AVX512VL,VPCLMULQDQ,FUTURE */ + /* 241(f3 7d 08) 301 001(44) 120 001(11) : WIG,EVEX,PROT,AVX512VL,VPCLMULQDQ,FUTURE */ + {I_VPCLMULHQHQDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4545, 459, 3625}, + /* 5 : VPCLMULHQHQDQ xmmreg,xmmrm128 [r+vm:fv: evex.nds.128.66.0f3a.wig 44 /r 11 ] ND,AVX512VL,VPCLMULQDQ,FUTURE */ + /* 240(f3 7d 08) 301 001(44) 110 001(11) : WIG,EVEX,PROT,AVX512VL,VPCLMULQDQ,FUTURE */ + {I_VPCLMULHQHQDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+4556, 459, 3625}, + /* 6 : VPCLMULHQHQDQ ymmreg,ymmreg*,ymmrm256 [rvm:fv: evex.nds.256.66.0f3a.wig 44 /r 11 ] AVX512VL,VPCLMULQDQ,FUTURE */ + /* 241(f3 7d 28) 301 001(44) 120 001(11) : WIG,EVEX,PROT,AVX512VL,VPCLMULQDQ,FUTURE */ + {I_VPCLMULHQHQDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4633, 459, 3631}, + /* 7 : VPCLMULHQHQDQ ymmreg,ymmrm256 [r+vm:fv: evex.nds.256.66.0f3a.wig 44 /r 11 ] ND,AVX512VL,VPCLMULQDQ,FUTURE */ + /* 240(f3 7d 28) 301 001(44) 110 001(11) : WIG,EVEX,PROT,AVX512VL,VPCLMULQDQ,FUTURE */ + {I_VPCLMULHQHQDQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+4644, 459, 3631}, + /* 8 : VPCLMULHQHQDQ zmmreg,zmmreg*,zmmrm512 [rvm:fv: evex.nds.512.66.0f3a.wig 44 /r 11 ] AVX512,VPCLMULQDQ,FUTURE */ + /* 241(f3 7d 48) 301 001(44) 120 001(11) : WIG,EVEX,PROT,AVX512,VPCLMULQDQ,FUTURE */ + {I_VPCLMULHQHQDQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, NO_DECORATOR, nasm_bytecodes+4721, 460, 3638}, + /* 9 : VPCLMULHQHQDQ zmmreg,zmmrm512 [r+vm:fv: evex.nds.512.66.0f3a.wig 44 /r 11 ] ND,AVX512,VPCLMULQDQ,FUTURE */ + /* 240(f3 7d 48) 301 001(44) 110 001(11) : WIG,EVEX,PROT,AVX512,VPCLMULQDQ,FUTURE */ + {I_VPCLMULHQHQDQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+4732, 460, 3638}, +}; + +static const struct itemplate instrux_VPCLMULQDQ[10] = { + /* 0 : VPCLMULQDQ xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: vex.nds.128.66.0f3a 44 /r ib ] AVX,SANDYBRIDGE */ + /* 261(003 001) 001(44) 120 023 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPCLMULQDQ, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+52659, 433, 3612}, + /* 1 : VPCLMULQDQ xmmreg,xmmrm128,imm8 [r+vmi: vex.nds.128.66.0f3a 44 /r ib ] ND,AVX,SANDYBRIDGE */ + /* 260(003 001) 001(44) 110 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPCLMULQDQ, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52667, 433, 3612}, + /* 2 : VPCLMULQDQ ymmreg,ymmreg*,ymmrm256,imm8 [rvmi:fv: vex.nds.256.66.0f3a.wig 44 /r ib ] VPCLMULQDQ,FUTURE */ + /* 261(003 005) 001(44) 120 023 : NOAPX,WIG,VEX,VPCLMULQDQ,FUTURE */ + {I_VPCLMULQDQ, 4, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+52675, 458, 3619}, + /* 3 : VPCLMULQDQ ymmreg,ymmrm256,imm8 [r+vmi:fv: vex.nds.256.66.0f3a.wig 44 /r ib ] ND,VPCLMULQDQ,FUTURE */ + /* 260(003 005) 001(44) 110 022 : NOAPX,WIG,VEX,VPCLMULQDQ,FUTURE */ + {I_VPCLMULQDQ, 3, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52683, 458, 3619}, + /* 4 : VPCLMULQDQ xmmreg,xmmreg*,xmmrm128,imm8 [rvmi:fv: evex.nds.128.66.0f3a.wig 44 /r ib ] AVX512VL,VPCLMULQDQ,FUTURE */ + /* 241(f3 7d 08) 301 001(44) 120 023 : WIG,EVEX,PROT,AVX512VL,VPCLMULQDQ,FUTURE */ + {I_VPCLMULQDQ, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+17993, 459, 3626}, + /* 5 : VPCLMULQDQ xmmreg,xmmrm128,imm8 [r+vmi:fv: evex.nds.128.66.0f3a.wig 44 /r ib ] ND,AVX512VL,VPCLMULQDQ,FUTURE */ + /* 240(f3 7d 08) 301 001(44) 110 022 : WIG,EVEX,PROT,AVX512VL,VPCLMULQDQ,FUTURE */ + {I_VPCLMULQDQ, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18003, 459, 3626}, + /* 6 : VPCLMULQDQ ymmreg,ymmreg*,ymmrm256,imm8 [rvmi:fv: evex.nds.256.66.0f3a.wig 44 /r ib ] AVX512VL,VPCLMULQDQ,FUTURE */ + /* 241(f3 7d 28) 301 001(44) 120 023 : WIG,EVEX,PROT,AVX512VL,VPCLMULQDQ,FUTURE */ + {I_VPCLMULQDQ, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+18013, 459, 3632}, + /* 7 : VPCLMULQDQ ymmreg,ymmrm256,imm8 [r+vmi:fv: evex.nds.256.66.0f3a.wig 44 /r ib ] ND,AVX512VL,VPCLMULQDQ,FUTURE */ + /* 240(f3 7d 28) 301 001(44) 110 022 : WIG,EVEX,PROT,AVX512VL,VPCLMULQDQ,FUTURE */ + {I_VPCLMULQDQ, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18023, 459, 3632}, + /* 8 : VPCLMULQDQ zmmreg,zmmreg*,zmmrm512,imm8 [rvmi:fv: evex.nds.512.66.0f3a.wig 44 /r ib ] AVX512,VPCLMULQDQ,FUTURE */ + /* 241(f3 7d 48) 301 001(44) 120 023 : WIG,EVEX,PROT,AVX512,VPCLMULQDQ,FUTURE */ + {I_VPCLMULQDQ, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+18033, 460, 3639}, + /* 9 : VPCLMULQDQ zmmreg,zmmrm512,imm8 [r+vmi:fv: evex.nds.512.66.0f3a.wig 44 /r ib ] ND,AVX512,VPCLMULQDQ,FUTURE */ + /* 240(f3 7d 48) 301 001(44) 110 022 : WIG,EVEX,PROT,AVX512,VPCLMULQDQ,FUTURE */ + {I_VPCLMULQDQ, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18043, 460, 3639}, +}; + +static const struct itemplate instrux_VFMADD132PS[5] = { + /* 0 : VFMADD132PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 98 /r ] FMA,FUTURE */ + /* 261(002 001) 001(98) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADD132PS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61900, 461, 3643}, + /* 1 : VFMADD132PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 98 /r ] FMA,FUTURE */ + /* 261(002 005) 001(98) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADD132PS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61907, 461, 3644}, + /* 2 : VFMADD132PS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 98 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(98) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMADD132PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+32467, 543, 5344}, + /* 3 : VFMADD132PS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 98 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(98) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMADD132PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+32476, 543, 5345}, + /* 4 : VFMADD132PS zmmreg|mask|z,zmmreg,zmmrm512|b32|er [rvm:fv: evex.nds.512.66.0f38.w0 98 /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(98) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VFMADD132PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+32485, 544, 5346}, +}; + +static const struct itemplate instrux_VFMADD132PD[5] = { + /* 0 : VFMADD132PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 98 /r ] FMA,FUTURE */ + /* 261(002 201) 001(98) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADD132PD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61914, 461, 3645}, + /* 1 : VFMADD132PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 98 /r ] FMA,FUTURE */ + /* 261(002 205) 001(98) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADD132PD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61921, 461, 3646}, + /* 2 : VFMADD132PD xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 98 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(98) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMADD132PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+32440, 543, 5341}, + /* 3 : VFMADD132PD ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 98 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(98) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMADD132PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+32449, 543, 5342}, + /* 4 : VFMADD132PD zmmreg|mask|z,zmmreg,zmmrm512|b64|er [rvm:fv: evex.nds.512.66.0f38.w1 98 /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(98) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VFMADD132PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+32458, 544, 5343}, +}; + +static const struct itemplate instrux_VFMADD312PS[2] = { + /* 0 : VFMADD312PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 98 /r ] FMA,FUTURE */ + /* 261(002 001) 001(98) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADD312PS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61900, 461, 3647}, + /* 1 : VFMADD312PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 98 /r ] FMA,FUTURE */ + /* 261(002 005) 001(98) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADD312PS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61907, 461, 3648}, +}; + +static const struct itemplate instrux_VFMADD312PD[2] = { + /* 0 : VFMADD312PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 98 /r ] FMA,FUTURE */ + /* 261(002 201) 001(98) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADD312PD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61914, 461, 3649}, + /* 1 : VFMADD312PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 98 /r ] FMA,FUTURE */ + /* 261(002 205) 001(98) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADD312PD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61921, 461, 3650}, +}; + +static const struct itemplate instrux_VFMADD213PS[5] = { + /* 0 : VFMADD213PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 a8 /r ] FMA,FUTURE */ + /* 261(002 001) 001(a8) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADD213PS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61928, 461, 3651}, + /* 1 : VFMADD213PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 a8 /r ] FMA,FUTURE */ + /* 261(002 005) 001(a8) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADD213PS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61935, 461, 3652}, + /* 2 : VFMADD213PS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 a8 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(a8) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMADD213PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+32539, 543, 5352}, + /* 3 : VFMADD213PS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 a8 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(a8) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMADD213PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+32548, 543, 5353}, + /* 4 : VFMADD213PS zmmreg|mask|z,zmmreg,zmmrm512|b32|er [rvm:fv: evex.nds.512.66.0f38.w0 a8 /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(a8) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VFMADD213PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+32557, 544, 5354}, +}; + +static const struct itemplate instrux_VFMADD213PD[5] = { + /* 0 : VFMADD213PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 a8 /r ] FMA,FUTURE */ + /* 261(002 201) 001(a8) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADD213PD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61942, 461, 3653}, + /* 1 : VFMADD213PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 a8 /r ] FMA,FUTURE */ + /* 261(002 205) 001(a8) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADD213PD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61949, 461, 3654}, + /* 2 : VFMADD213PD xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 a8 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(a8) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMADD213PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+32512, 543, 5349}, + /* 3 : VFMADD213PD ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 a8 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(a8) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMADD213PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+32521, 543, 5350}, + /* 4 : VFMADD213PD zmmreg|mask|z,zmmreg,zmmrm512|b64|er [rvm:fv: evex.nds.512.66.0f38.w1 a8 /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(a8) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VFMADD213PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+32530, 544, 5351}, +}; + +static const struct itemplate instrux_VFMADD123PS[2] = { + /* 0 : VFMADD123PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 a8 /r ] FMA,FUTURE */ + /* 261(002 001) 001(a8) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADD123PS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61928, 461, 3655}, + /* 1 : VFMADD123PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 a8 /r ] FMA,FUTURE */ + /* 261(002 005) 001(a8) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADD123PS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61935, 461, 3656}, +}; + +static const struct itemplate instrux_VFMADD123PD[2] = { + /* 0 : VFMADD123PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 a8 /r ] FMA,FUTURE */ + /* 261(002 201) 001(a8) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADD123PD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61942, 461, 3657}, + /* 1 : VFMADD123PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 a8 /r ] FMA,FUTURE */ + /* 261(002 205) 001(a8) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADD123PD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61949, 461, 3658}, +}; + +static const struct itemplate instrux_VFMADD231PS[5] = { + /* 0 : VFMADD231PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 b8 /r ] FMA,FUTURE */ + /* 261(002 001) 001(b8) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADD231PS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61956, 461, 3659}, + /* 1 : VFMADD231PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 b8 /r ] FMA,FUTURE */ + /* 261(002 005) 001(b8) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADD231PS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61963, 461, 3660}, + /* 2 : VFMADD231PS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 b8 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(b8) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMADD231PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+32611, 543, 5360}, + /* 3 : VFMADD231PS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 b8 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(b8) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMADD231PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+32620, 543, 5361}, + /* 4 : VFMADD231PS zmmreg|mask|z,zmmreg,zmmrm512|b32|er [rvm:fv: evex.nds.512.66.0f38.w0 b8 /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(b8) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VFMADD231PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+32629, 544, 5362}, +}; + +static const struct itemplate instrux_VFMADD231PD[5] = { + /* 0 : VFMADD231PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 b8 /r ] FMA,FUTURE */ + /* 261(002 201) 001(b8) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADD231PD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61970, 461, 3661}, + /* 1 : VFMADD231PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 b8 /r ] FMA,FUTURE */ + /* 261(002 205) 001(b8) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADD231PD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61977, 461, 3662}, + /* 2 : VFMADD231PD xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 b8 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(b8) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMADD231PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+32584, 543, 5357}, + /* 3 : VFMADD231PD ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 b8 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(b8) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMADD231PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+32593, 543, 5358}, + /* 4 : VFMADD231PD zmmreg|mask|z,zmmreg,zmmrm512|b64|er [rvm:fv: evex.nds.512.66.0f38.w1 b8 /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(b8) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VFMADD231PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+32602, 544, 5359}, +}; + +static const struct itemplate instrux_VFMADD321PS[2] = { + /* 0 : VFMADD321PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 b8 /r ] FMA,FUTURE */ + /* 261(002 001) 001(b8) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADD321PS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61956, 461, 3663}, + /* 1 : VFMADD321PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 b8 /r ] FMA,FUTURE */ + /* 261(002 005) 001(b8) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADD321PS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61963, 461, 3664}, +}; + +static const struct itemplate instrux_VFMADD321PD[2] = { + /* 0 : VFMADD321PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 b8 /r ] FMA,FUTURE */ + /* 261(002 201) 001(b8) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADD321PD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61970, 461, 3665}, + /* 1 : VFMADD321PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 b8 /r ] FMA,FUTURE */ + /* 261(002 205) 001(b8) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADD321PD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61977, 461, 3666}, +}; + +static const struct itemplate instrux_VFMADDSUB132PS[5] = { + /* 0 : VFMADDSUB132PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 96 /r ] FMA,FUTURE */ + /* 261(002 001) 001(96) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADDSUB132PS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61984, 461, 3667}, + /* 1 : VFMADDSUB132PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 96 /r ] FMA,FUTURE */ + /* 261(002 005) 001(96) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADDSUB132PS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61991, 461, 3668}, + /* 2 : VFMADDSUB132PS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 96 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(96) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMADDSUB132PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+32683, 543, 5368}, + /* 3 : VFMADDSUB132PS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 96 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(96) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMADDSUB132PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+32692, 543, 5369}, + /* 4 : VFMADDSUB132PS zmmreg|mask|z,zmmreg,zmmrm512|b32|er [rvm:fv: evex.nds.512.66.0f38.w0 96 /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(96) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VFMADDSUB132PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+32701, 544, 5370}, +}; + +static const struct itemplate instrux_VFMADDSUB132PD[5] = { + /* 0 : VFMADDSUB132PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 96 /r ] FMA,FUTURE */ + /* 261(002 201) 001(96) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADDSUB132PD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61998, 461, 3669}, + /* 1 : VFMADDSUB132PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 96 /r ] FMA,FUTURE */ + /* 261(002 205) 001(96) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADDSUB132PD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62005, 461, 3670}, + /* 2 : VFMADDSUB132PD xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 96 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(96) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMADDSUB132PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+32656, 543, 5365}, + /* 3 : VFMADDSUB132PD ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 96 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(96) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMADDSUB132PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+32665, 543, 5366}, + /* 4 : VFMADDSUB132PD zmmreg|mask|z,zmmreg,zmmrm512|b64|er [rvm:fv: evex.nds.512.66.0f38.w1 96 /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(96) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VFMADDSUB132PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+32674, 544, 5367}, +}; + +static const struct itemplate instrux_VFMADDSUB312PS[2] = { + /* 0 : VFMADDSUB312PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 96 /r ] FMA,FUTURE */ + /* 261(002 001) 001(96) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADDSUB312PS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61984, 461, 3671}, + /* 1 : VFMADDSUB312PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 96 /r ] FMA,FUTURE */ + /* 261(002 005) 001(96) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADDSUB312PS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61991, 461, 3672}, +}; + +static const struct itemplate instrux_VFMADDSUB312PD[2] = { + /* 0 : VFMADDSUB312PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 96 /r ] FMA,FUTURE */ + /* 261(002 201) 001(96) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADDSUB312PD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61998, 461, 3673}, + /* 1 : VFMADDSUB312PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 96 /r ] FMA,FUTURE */ + /* 261(002 205) 001(96) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADDSUB312PD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62005, 461, 3674}, +}; + +static const struct itemplate instrux_VFMADDSUB213PS[5] = { + /* 0 : VFMADDSUB213PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 a6 /r ] FMA,FUTURE */ + /* 261(002 001) 001(a6) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADDSUB213PS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62012, 461, 3675}, + /* 1 : VFMADDSUB213PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 a6 /r ] FMA,FUTURE */ + /* 261(002 005) 001(a6) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADDSUB213PS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62019, 461, 3676}, + /* 2 : VFMADDSUB213PS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 a6 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(a6) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMADDSUB213PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+32737, 543, 5374}, + /* 3 : VFMADDSUB213PS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 a6 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(a6) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMADDSUB213PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+32746, 543, 5375}, + /* 4 : VFMADDSUB213PS zmmreg|mask|z,zmmreg,zmmrm512|b32|er [rvm:fv: evex.nds.512.66.0f38.w0 a6 /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(a6) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VFMADDSUB213PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+32755, 544, 5376}, +}; + +static const struct itemplate instrux_VFMADDSUB213PD[5] = { + /* 0 : VFMADDSUB213PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 a6 /r ] FMA,FUTURE */ + /* 261(002 201) 001(a6) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADDSUB213PD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62026, 461, 3677}, + /* 1 : VFMADDSUB213PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 a6 /r ] FMA,FUTURE */ + /* 261(002 205) 001(a6) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADDSUB213PD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62033, 461, 3678}, + /* 2 : VFMADDSUB213PD xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 a6 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(a6) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMADDSUB213PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+32710, 543, 5371}, + /* 3 : VFMADDSUB213PD ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 a6 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(a6) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMADDSUB213PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+32719, 543, 5372}, + /* 4 : VFMADDSUB213PD zmmreg|mask|z,zmmreg,zmmrm512|b64|er [rvm:fv: evex.nds.512.66.0f38.w1 a6 /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(a6) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VFMADDSUB213PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+32728, 544, 5373}, +}; + +static const struct itemplate instrux_VFMADDSUB123PS[2] = { + /* 0 : VFMADDSUB123PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 a6 /r ] FMA,FUTURE */ + /* 261(002 001) 001(a6) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADDSUB123PS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62012, 461, 3679}, + /* 1 : VFMADDSUB123PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 a6 /r ] FMA,FUTURE */ + /* 261(002 005) 001(a6) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADDSUB123PS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62019, 461, 3680}, +}; + +static const struct itemplate instrux_VFMADDSUB123PD[2] = { + /* 0 : VFMADDSUB123PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 a6 /r ] FMA,FUTURE */ + /* 261(002 201) 001(a6) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADDSUB123PD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62026, 461, 3681}, + /* 1 : VFMADDSUB123PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 a6 /r ] FMA,FUTURE */ + /* 261(002 205) 001(a6) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADDSUB123PD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62033, 461, 3682}, +}; + +static const struct itemplate instrux_VFMADDSUB231PS[5] = { + /* 0 : VFMADDSUB231PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 b6 /r ] FMA,FUTURE */ + /* 261(002 001) 001(b6) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADDSUB231PS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62040, 461, 3683}, + /* 1 : VFMADDSUB231PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 b6 /r ] FMA,FUTURE */ + /* 261(002 005) 001(b6) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADDSUB231PS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62047, 461, 3684}, + /* 2 : VFMADDSUB231PS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 b6 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(b6) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMADDSUB231PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+32791, 543, 5380}, + /* 3 : VFMADDSUB231PS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 b6 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(b6) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMADDSUB231PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+32800, 543, 5381}, + /* 4 : VFMADDSUB231PS zmmreg|mask|z,zmmreg,zmmrm512|b32|er [rvm:fv: evex.nds.512.66.0f38.w0 b6 /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(b6) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VFMADDSUB231PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+32809, 544, 5382}, +}; + +static const struct itemplate instrux_VFMADDSUB231PD[5] = { + /* 0 : VFMADDSUB231PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 b6 /r ] FMA,FUTURE */ + /* 261(002 201) 001(b6) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADDSUB231PD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62054, 461, 3685}, + /* 1 : VFMADDSUB231PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 b6 /r ] FMA,FUTURE */ + /* 261(002 205) 001(b6) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADDSUB231PD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62061, 461, 3686}, + /* 2 : VFMADDSUB231PD xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 b6 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(b6) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMADDSUB231PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+32764, 543, 5377}, + /* 3 : VFMADDSUB231PD ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 b6 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(b6) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMADDSUB231PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+32773, 543, 5378}, + /* 4 : VFMADDSUB231PD zmmreg|mask|z,zmmreg,zmmrm512|b64|er [rvm:fv: evex.nds.512.66.0f38.w1 b6 /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(b6) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VFMADDSUB231PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+32782, 544, 5379}, +}; + +static const struct itemplate instrux_VFMADDSUB321PS[2] = { + /* 0 : VFMADDSUB321PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 b6 /r ] FMA,FUTURE */ + /* 261(002 001) 001(b6) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADDSUB321PS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62040, 461, 3687}, + /* 1 : VFMADDSUB321PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 b6 /r ] FMA,FUTURE */ + /* 261(002 005) 001(b6) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADDSUB321PS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62047, 461, 3688}, +}; + +static const struct itemplate instrux_VFMADDSUB321PD[2] = { + /* 0 : VFMADDSUB321PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 b6 /r ] FMA,FUTURE */ + /* 261(002 201) 001(b6) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADDSUB321PD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62054, 461, 3689}, + /* 1 : VFMADDSUB321PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 b6 /r ] FMA,FUTURE */ + /* 261(002 205) 001(b6) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADDSUB321PD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62061, 461, 3690}, +}; + +static const struct itemplate instrux_VFMSUB132PS[5] = { + /* 0 : VFMSUB132PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 9a /r ] FMA,FUTURE */ + /* 261(002 001) 001(9a) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUB132PS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62068, 461, 3691}, + /* 1 : VFMSUB132PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 9a /r ] FMA,FUTURE */ + /* 261(002 005) 001(9a) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUB132PS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62075, 461, 3692}, + /* 2 : VFMSUB132PS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 9a /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(9a) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMSUB132PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+32845, 543, 5386}, + /* 3 : VFMSUB132PS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 9a /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(9a) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMSUB132PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+32854, 543, 5387}, + /* 4 : VFMSUB132PS zmmreg|mask|z,zmmreg,zmmrm512|b32|er [rvm:fv: evex.nds.512.66.0f38.w0 9a /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(9a) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VFMSUB132PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+32863, 544, 5388}, +}; + +static const struct itemplate instrux_VFMSUB132PD[5] = { + /* 0 : VFMSUB132PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 9a /r ] FMA,FUTURE */ + /* 261(002 201) 001(9a) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUB132PD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62082, 461, 3693}, + /* 1 : VFMSUB132PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 9a /r ] FMA,FUTURE */ + /* 261(002 205) 001(9a) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUB132PD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62089, 461, 3694}, + /* 2 : VFMSUB132PD xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 9a /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(9a) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMSUB132PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+32818, 543, 5383}, + /* 3 : VFMSUB132PD ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 9a /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(9a) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMSUB132PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+32827, 543, 5384}, + /* 4 : VFMSUB132PD zmmreg|mask|z,zmmreg,zmmrm512|b64|er [rvm:fv: evex.nds.512.66.0f38.w1 9a /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(9a) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VFMSUB132PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+32836, 544, 5385}, +}; + +static const struct itemplate instrux_VFMSUB312PS[2] = { + /* 0 : VFMSUB312PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 9a /r ] FMA,FUTURE */ + /* 261(002 001) 001(9a) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUB312PS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62068, 461, 3695}, + /* 1 : VFMSUB312PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 9a /r ] FMA,FUTURE */ + /* 261(002 005) 001(9a) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUB312PS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62075, 461, 3696}, +}; + +static const struct itemplate instrux_VFMSUB312PD[2] = { + /* 0 : VFMSUB312PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 9a /r ] FMA,FUTURE */ + /* 261(002 201) 001(9a) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUB312PD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62082, 461, 3697}, + /* 1 : VFMSUB312PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 9a /r ] FMA,FUTURE */ + /* 261(002 205) 001(9a) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUB312PD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62089, 461, 3698}, +}; + +static const struct itemplate instrux_VFMSUB213PS[5] = { + /* 0 : VFMSUB213PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 aa /r ] FMA,FUTURE */ + /* 261(002 001) 001(aa) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUB213PS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62096, 461, 3699}, + /* 1 : VFMSUB213PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 aa /r ] FMA,FUTURE */ + /* 261(002 005) 001(aa) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUB213PS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62103, 461, 3700}, + /* 2 : VFMSUB213PS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 aa /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(aa) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMSUB213PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+32917, 543, 5394}, + /* 3 : VFMSUB213PS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 aa /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(aa) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMSUB213PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+32926, 543, 5395}, + /* 4 : VFMSUB213PS zmmreg|mask|z,zmmreg,zmmrm512|b32|er [rvm:fv: evex.nds.512.66.0f38.w0 aa /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(aa) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VFMSUB213PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+32935, 544, 5396}, +}; + +static const struct itemplate instrux_VFMSUB213PD[5] = { + /* 0 : VFMSUB213PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 aa /r ] FMA,FUTURE */ + /* 261(002 201) 001(aa) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUB213PD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62110, 461, 3701}, + /* 1 : VFMSUB213PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 aa /r ] FMA,FUTURE */ + /* 261(002 205) 001(aa) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUB213PD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62117, 461, 3702}, + /* 2 : VFMSUB213PD xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 aa /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(aa) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMSUB213PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+32890, 543, 5391}, + /* 3 : VFMSUB213PD ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 aa /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(aa) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMSUB213PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+32899, 543, 5392}, + /* 4 : VFMSUB213PD zmmreg|mask|z,zmmreg,zmmrm512|b64|er [rvm:fv: evex.nds.512.66.0f38.w1 aa /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(aa) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VFMSUB213PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+32908, 544, 5393}, +}; + +static const struct itemplate instrux_VFMSUB123PS[2] = { + /* 0 : VFMSUB123PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 aa /r ] FMA,FUTURE */ + /* 261(002 001) 001(aa) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUB123PS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62096, 461, 3703}, + /* 1 : VFMSUB123PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 aa /r ] FMA,FUTURE */ + /* 261(002 005) 001(aa) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUB123PS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62103, 461, 3704}, +}; + +static const struct itemplate instrux_VFMSUB123PD[2] = { + /* 0 : VFMSUB123PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 aa /r ] FMA,FUTURE */ + /* 261(002 201) 001(aa) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUB123PD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62110, 461, 3705}, + /* 1 : VFMSUB123PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 aa /r ] FMA,FUTURE */ + /* 261(002 205) 001(aa) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUB123PD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62117, 461, 3706}, +}; + +static const struct itemplate instrux_VFMSUB231PS[5] = { + /* 0 : VFMSUB231PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 ba /r ] FMA,FUTURE */ + /* 261(002 001) 001(ba) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUB231PS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62124, 461, 3707}, + /* 1 : VFMSUB231PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 ba /r ] FMA,FUTURE */ + /* 261(002 005) 001(ba) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUB231PS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62131, 461, 3708}, + /* 2 : VFMSUB231PS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 ba /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(ba) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMSUB231PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+32989, 543, 5402}, + /* 3 : VFMSUB231PS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 ba /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(ba) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMSUB231PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+32998, 543, 5403}, + /* 4 : VFMSUB231PS zmmreg|mask|z,zmmreg,zmmrm512|b32|er [rvm:fv: evex.nds.512.66.0f38.w0 ba /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(ba) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VFMSUB231PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+33007, 544, 5404}, +}; + +static const struct itemplate instrux_VFMSUB231PD[5] = { + /* 0 : VFMSUB231PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 ba /r ] FMA,FUTURE */ + /* 261(002 201) 001(ba) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUB231PD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62138, 461, 3709}, + /* 1 : VFMSUB231PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 ba /r ] FMA,FUTURE */ + /* 261(002 205) 001(ba) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUB231PD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62145, 461, 3710}, + /* 2 : VFMSUB231PD xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 ba /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(ba) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMSUB231PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+32962, 543, 5399}, + /* 3 : VFMSUB231PD ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 ba /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(ba) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMSUB231PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+32971, 543, 5400}, + /* 4 : VFMSUB231PD zmmreg|mask|z,zmmreg,zmmrm512|b64|er [rvm:fv: evex.nds.512.66.0f38.w1 ba /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(ba) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VFMSUB231PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+32980, 544, 5401}, +}; + +static const struct itemplate instrux_VFMSUB321PS[2] = { + /* 0 : VFMSUB321PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 ba /r ] FMA,FUTURE */ + /* 261(002 001) 001(ba) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUB321PS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62124, 461, 3711}, + /* 1 : VFMSUB321PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 ba /r ] FMA,FUTURE */ + /* 261(002 005) 001(ba) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUB321PS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62131, 461, 3712}, +}; + +static const struct itemplate instrux_VFMSUB321PD[2] = { + /* 0 : VFMSUB321PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 ba /r ] FMA,FUTURE */ + /* 261(002 201) 001(ba) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUB321PD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62138, 461, 3713}, + /* 1 : VFMSUB321PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 ba /r ] FMA,FUTURE */ + /* 261(002 205) 001(ba) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUB321PD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62145, 461, 3714}, +}; + +static const struct itemplate instrux_VFMSUBADD132PS[5] = { + /* 0 : VFMSUBADD132PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 97 /r ] FMA,FUTURE */ + /* 261(002 001) 001(97) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUBADD132PS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62152, 461, 3715}, + /* 1 : VFMSUBADD132PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 97 /r ] FMA,FUTURE */ + /* 261(002 005) 001(97) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUBADD132PS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62159, 461, 3716}, + /* 2 : VFMSUBADD132PS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 97 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(97) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMSUBADD132PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+33061, 543, 5410}, + /* 3 : VFMSUBADD132PS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 97 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(97) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMSUBADD132PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+33070, 543, 5411}, + /* 4 : VFMSUBADD132PS zmmreg|mask|z,zmmreg,zmmrm512|b32|er [rvm:fv: evex.nds.512.66.0f38.w0 97 /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(97) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VFMSUBADD132PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+33079, 544, 5412}, +}; + +static const struct itemplate instrux_VFMSUBADD132PD[5] = { + /* 0 : VFMSUBADD132PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 97 /r ] FMA,FUTURE */ + /* 261(002 201) 001(97) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUBADD132PD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62166, 461, 3717}, + /* 1 : VFMSUBADD132PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 97 /r ] FMA,FUTURE */ + /* 261(002 205) 001(97) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUBADD132PD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62173, 461, 3718}, + /* 2 : VFMSUBADD132PD xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 97 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(97) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMSUBADD132PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+33034, 543, 5407}, + /* 3 : VFMSUBADD132PD ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 97 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(97) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMSUBADD132PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+33043, 543, 5408}, + /* 4 : VFMSUBADD132PD zmmreg|mask|z,zmmreg,zmmrm512|b64|er [rvm:fv: evex.nds.512.66.0f38.w1 97 /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(97) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VFMSUBADD132PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+33052, 544, 5409}, +}; + +static const struct itemplate instrux_VFMSUBADD312PS[2] = { + /* 0 : VFMSUBADD312PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 97 /r ] FMA,FUTURE */ + /* 261(002 001) 001(97) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUBADD312PS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62152, 461, 3719}, + /* 1 : VFMSUBADD312PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 97 /r ] FMA,FUTURE */ + /* 261(002 005) 001(97) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUBADD312PS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62159, 461, 3720}, +}; + +static const struct itemplate instrux_VFMSUBADD312PD[2] = { + /* 0 : VFMSUBADD312PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 97 /r ] FMA,FUTURE */ + /* 261(002 201) 001(97) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUBADD312PD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62166, 461, 3721}, + /* 1 : VFMSUBADD312PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 97 /r ] FMA,FUTURE */ + /* 261(002 205) 001(97) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUBADD312PD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62173, 461, 3722}, +}; + +static const struct itemplate instrux_VFMSUBADD213PS[5] = { + /* 0 : VFMSUBADD213PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 a7 /r ] FMA,FUTURE */ + /* 261(002 001) 001(a7) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUBADD213PS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62180, 461, 3723}, + /* 1 : VFMSUBADD213PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 a7 /r ] FMA,FUTURE */ + /* 261(002 005) 001(a7) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUBADD213PS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62187, 461, 3724}, + /* 2 : VFMSUBADD213PS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 a7 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(a7) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMSUBADD213PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+33115, 543, 5416}, + /* 3 : VFMSUBADD213PS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 a7 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(a7) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMSUBADD213PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+33124, 543, 5417}, + /* 4 : VFMSUBADD213PS zmmreg|mask|z,zmmreg,zmmrm512|b32|er [rvm:fv: evex.nds.512.66.0f38.w0 a7 /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(a7) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VFMSUBADD213PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+33133, 544, 5418}, +}; + +static const struct itemplate instrux_VFMSUBADD213PD[5] = { + /* 0 : VFMSUBADD213PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 a7 /r ] FMA,FUTURE */ + /* 261(002 201) 001(a7) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUBADD213PD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62194, 461, 3725}, + /* 1 : VFMSUBADD213PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 a7 /r ] FMA,FUTURE */ + /* 261(002 205) 001(a7) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUBADD213PD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62201, 461, 3726}, + /* 2 : VFMSUBADD213PD xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 a7 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(a7) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMSUBADD213PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+33088, 543, 5413}, + /* 3 : VFMSUBADD213PD ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 a7 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(a7) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMSUBADD213PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+33097, 543, 5414}, + /* 4 : VFMSUBADD213PD zmmreg|mask|z,zmmreg,zmmrm512|b64|er [rvm:fv: evex.nds.512.66.0f38.w1 a7 /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(a7) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VFMSUBADD213PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+33106, 544, 5415}, +}; + +static const struct itemplate instrux_VFMSUBADD123PS[2] = { + /* 0 : VFMSUBADD123PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 a7 /r ] FMA,FUTURE */ + /* 261(002 001) 001(a7) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUBADD123PS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62180, 461, 3727}, + /* 1 : VFMSUBADD123PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 a7 /r ] FMA,FUTURE */ + /* 261(002 005) 001(a7) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUBADD123PS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62187, 461, 3728}, +}; + +static const struct itemplate instrux_VFMSUBADD123PD[2] = { + /* 0 : VFMSUBADD123PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 a7 /r ] FMA,FUTURE */ + /* 261(002 201) 001(a7) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUBADD123PD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62194, 461, 3729}, + /* 1 : VFMSUBADD123PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 a7 /r ] FMA,FUTURE */ + /* 261(002 205) 001(a7) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUBADD123PD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62201, 461, 3730}, +}; + +static const struct itemplate instrux_VFMSUBADD231PS[5] = { + /* 0 : VFMSUBADD231PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 b7 /r ] FMA,FUTURE */ + /* 261(002 001) 001(b7) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUBADD231PS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62208, 461, 3731}, + /* 1 : VFMSUBADD231PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 b7 /r ] FMA,FUTURE */ + /* 261(002 005) 001(b7) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUBADD231PS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62215, 461, 3732}, + /* 2 : VFMSUBADD231PS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 b7 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(b7) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMSUBADD231PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+33169, 543, 5422}, + /* 3 : VFMSUBADD231PS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 b7 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(b7) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMSUBADD231PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+33178, 543, 5423}, + /* 4 : VFMSUBADD231PS zmmreg|mask|z,zmmreg,zmmrm512|b32|er [rvm:fv: evex.nds.512.66.0f38.w0 b7 /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(b7) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VFMSUBADD231PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+33187, 544, 5424}, +}; + +static const struct itemplate instrux_VFMSUBADD231PD[5] = { + /* 0 : VFMSUBADD231PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 b7 /r ] FMA,FUTURE */ + /* 261(002 201) 001(b7) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUBADD231PD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62222, 461, 3733}, + /* 1 : VFMSUBADD231PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 b7 /r ] FMA,FUTURE */ + /* 261(002 205) 001(b7) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUBADD231PD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62229, 461, 3734}, + /* 2 : VFMSUBADD231PD xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 b7 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(b7) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMSUBADD231PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+33142, 543, 5419}, + /* 3 : VFMSUBADD231PD ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 b7 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(b7) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMSUBADD231PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+33151, 543, 5420}, + /* 4 : VFMSUBADD231PD zmmreg|mask|z,zmmreg,zmmrm512|b64|er [rvm:fv: evex.nds.512.66.0f38.w1 b7 /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(b7) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VFMSUBADD231PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+33160, 544, 5421}, +}; + +static const struct itemplate instrux_VFMSUBADD321PS[2] = { + /* 0 : VFMSUBADD321PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 b7 /r ] FMA,FUTURE */ + /* 261(002 001) 001(b7) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUBADD321PS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62208, 461, 3735}, + /* 1 : VFMSUBADD321PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 b7 /r ] FMA,FUTURE */ + /* 261(002 005) 001(b7) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUBADD321PS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62215, 461, 3736}, +}; + +static const struct itemplate instrux_VFMSUBADD321PD[2] = { + /* 0 : VFMSUBADD321PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 b7 /r ] FMA,FUTURE */ + /* 261(002 201) 001(b7) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUBADD321PD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62222, 461, 3737}, + /* 1 : VFMSUBADD321PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 b7 /r ] FMA,FUTURE */ + /* 261(002 205) 001(b7) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUBADD321PD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62229, 461, 3738}, +}; + +static const struct itemplate instrux_VFNMADD132PS[5] = { + /* 0 : VFNMADD132PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 9c /r ] FMA,FUTURE */ + /* 261(002 001) 001(9c) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMADD132PS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62236, 461, 3739}, + /* 1 : VFNMADD132PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 9c /r ] FMA,FUTURE */ + /* 261(002 005) 001(9c) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMADD132PS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62243, 461, 3740}, + /* 2 : VFNMADD132PS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 9c /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(9c) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFNMADD132PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+33223, 543, 5428}, + /* 3 : VFNMADD132PS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 9c /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(9c) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFNMADD132PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+33232, 543, 5429}, + /* 4 : VFNMADD132PS zmmreg|mask|z,zmmreg,zmmrm512|b32|er [rvm:fv: evex.nds.512.66.0f38.w0 9c /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(9c) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VFNMADD132PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+33241, 544, 5430}, +}; + +static const struct itemplate instrux_VFNMADD132PD[5] = { + /* 0 : VFNMADD132PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 9c /r ] FMA,FUTURE */ + /* 261(002 201) 001(9c) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMADD132PD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62250, 461, 3741}, + /* 1 : VFNMADD132PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 9c /r ] FMA,FUTURE */ + /* 261(002 205) 001(9c) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMADD132PD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62257, 461, 3742}, + /* 2 : VFNMADD132PD xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 9c /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(9c) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFNMADD132PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+33196, 543, 5425}, + /* 3 : VFNMADD132PD ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 9c /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(9c) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFNMADD132PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+33205, 543, 5426}, + /* 4 : VFNMADD132PD zmmreg|mask|z,zmmreg,zmmrm512|b64|er [rvm:fv: evex.nds.512.66.0f38.w1 9c /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(9c) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VFNMADD132PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+33214, 544, 5427}, +}; + +static const struct itemplate instrux_VFNMADD312PS[2] = { + /* 0 : VFNMADD312PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 9c /r ] FMA,FUTURE */ + /* 261(002 001) 001(9c) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMADD312PS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62236, 461, 3743}, + /* 1 : VFNMADD312PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 9c /r ] FMA,FUTURE */ + /* 261(002 005) 001(9c) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMADD312PS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62243, 461, 3744}, +}; + +static const struct itemplate instrux_VFNMADD312PD[2] = { + /* 0 : VFNMADD312PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 9c /r ] FMA,FUTURE */ + /* 261(002 201) 001(9c) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMADD312PD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62250, 461, 3745}, + /* 1 : VFNMADD312PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 9c /r ] FMA,FUTURE */ + /* 261(002 205) 001(9c) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMADD312PD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62257, 461, 3746}, +}; + +static const struct itemplate instrux_VFNMADD213PS[5] = { + /* 0 : VFNMADD213PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 ac /r ] FMA,FUTURE */ + /* 261(002 001) 001(ac) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMADD213PS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62264, 461, 3747}, + /* 1 : VFNMADD213PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 ac /r ] FMA,FUTURE */ + /* 261(002 005) 001(ac) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMADD213PS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62271, 461, 3748}, + /* 2 : VFNMADD213PS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 ac /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(ac) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFNMADD213PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+33295, 543, 5436}, + /* 3 : VFNMADD213PS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 ac /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(ac) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFNMADD213PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+33304, 543, 5437}, + /* 4 : VFNMADD213PS zmmreg|mask|z,zmmreg,zmmrm512|b32|er [rvm:fv: evex.nds.512.66.0f38.w0 ac /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(ac) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VFNMADD213PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+33313, 544, 5438}, +}; + +static const struct itemplate instrux_VFNMADD213PD[5] = { + /* 0 : VFNMADD213PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 ac /r ] FMA,FUTURE */ + /* 261(002 201) 001(ac) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMADD213PD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62278, 461, 3749}, + /* 1 : VFNMADD213PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 ac /r ] FMA,FUTURE */ + /* 261(002 205) 001(ac) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMADD213PD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62285, 461, 3750}, + /* 2 : VFNMADD213PD xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 ac /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(ac) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFNMADD213PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+33268, 543, 5433}, + /* 3 : VFNMADD213PD ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 ac /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(ac) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFNMADD213PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+33277, 543, 5434}, + /* 4 : VFNMADD213PD zmmreg|mask|z,zmmreg,zmmrm512|b64|er [rvm:fv: evex.nds.512.66.0f38.w1 ac /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(ac) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VFNMADD213PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+33286, 544, 5435}, +}; + +static const struct itemplate instrux_VFNMADD123PS[2] = { + /* 0 : VFNMADD123PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 ac /r ] FMA,FUTURE */ + /* 261(002 001) 001(ac) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMADD123PS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62264, 461, 3751}, + /* 1 : VFNMADD123PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 ac /r ] FMA,FUTURE */ + /* 261(002 005) 001(ac) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMADD123PS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62271, 461, 3752}, +}; + +static const struct itemplate instrux_VFNMADD123PD[2] = { + /* 0 : VFNMADD123PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 ac /r ] FMA,FUTURE */ + /* 261(002 201) 001(ac) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMADD123PD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62278, 461, 3753}, + /* 1 : VFNMADD123PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 ac /r ] FMA,FUTURE */ + /* 261(002 205) 001(ac) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMADD123PD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62285, 461, 3754}, +}; + +static const struct itemplate instrux_VFNMADD231PS[5] = { + /* 0 : VFNMADD231PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 bc /r ] FMA,FUTURE */ + /* 261(002 001) 001(bc) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMADD231PS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62292, 461, 3755}, + /* 1 : VFNMADD231PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 bc /r ] FMA,FUTURE */ + /* 261(002 005) 001(bc) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMADD231PS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62299, 461, 3756}, + /* 2 : VFNMADD231PS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 bc /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(bc) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFNMADD231PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+33367, 543, 5444}, + /* 3 : VFNMADD231PS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 bc /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(bc) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFNMADD231PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+33376, 543, 5445}, + /* 4 : VFNMADD231PS zmmreg|mask|z,zmmreg,zmmrm512|b32|er [rvm:fv: evex.nds.512.66.0f38.w0 bc /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(bc) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VFNMADD231PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+33385, 544, 5446}, +}; + +static const struct itemplate instrux_VFNMADD231PD[5] = { + /* 0 : VFNMADD231PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 bc /r ] FMA,FUTURE */ + /* 261(002 201) 001(bc) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMADD231PD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62306, 461, 3757}, + /* 1 : VFNMADD231PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 bc /r ] FMA,FUTURE */ + /* 261(002 205) 001(bc) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMADD231PD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62313, 461, 3758}, + /* 2 : VFNMADD231PD xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 bc /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(bc) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFNMADD231PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+33340, 543, 5441}, + /* 3 : VFNMADD231PD ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 bc /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(bc) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFNMADD231PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+33349, 543, 5442}, + /* 4 : VFNMADD231PD zmmreg|mask|z,zmmreg,zmmrm512|b64|er [rvm:fv: evex.nds.512.66.0f38.w1 bc /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(bc) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VFNMADD231PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+33358, 544, 5443}, +}; + +static const struct itemplate instrux_VFNMADD321PS[2] = { + /* 0 : VFNMADD321PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 bc /r ] FMA,FUTURE */ + /* 261(002 001) 001(bc) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMADD321PS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62292, 461, 3759}, + /* 1 : VFNMADD321PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 bc /r ] FMA,FUTURE */ + /* 261(002 005) 001(bc) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMADD321PS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62299, 461, 3760}, +}; + +static const struct itemplate instrux_VFNMADD321PD[2] = { + /* 0 : VFNMADD321PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 bc /r ] FMA,FUTURE */ + /* 261(002 201) 001(bc) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMADD321PD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62306, 461, 3761}, + /* 1 : VFNMADD321PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 bc /r ] FMA,FUTURE */ + /* 261(002 205) 001(bc) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMADD321PD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62313, 461, 3762}, +}; + +static const struct itemplate instrux_VFNMSUB132PS[5] = { + /* 0 : VFNMSUB132PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 9e /r ] FMA,FUTURE */ + /* 261(002 001) 001(9e) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMSUB132PS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62320, 461, 3763}, + /* 1 : VFNMSUB132PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 9e /r ] FMA,FUTURE */ + /* 261(002 005) 001(9e) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMSUB132PS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62327, 461, 3764}, + /* 2 : VFNMSUB132PS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 9e /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(9e) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFNMSUB132PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+33439, 543, 5452}, + /* 3 : VFNMSUB132PS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 9e /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(9e) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFNMSUB132PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+33448, 543, 5453}, + /* 4 : VFNMSUB132PS zmmreg|mask|z,zmmreg,zmmrm512|b32|er [rvm:fv: evex.nds.512.66.0f38.w0 9e /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(9e) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VFNMSUB132PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+33457, 544, 5454}, +}; + +static const struct itemplate instrux_VFNMSUB132PD[5] = { + /* 0 : VFNMSUB132PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 9e /r ] FMA,FUTURE */ + /* 261(002 201) 001(9e) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMSUB132PD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62334, 461, 3765}, + /* 1 : VFNMSUB132PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 9e /r ] FMA,FUTURE */ + /* 261(002 205) 001(9e) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMSUB132PD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62341, 461, 3766}, + /* 2 : VFNMSUB132PD xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 9e /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(9e) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFNMSUB132PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+33412, 543, 5449}, + /* 3 : VFNMSUB132PD ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 9e /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(9e) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFNMSUB132PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+33421, 543, 5450}, + /* 4 : VFNMSUB132PD zmmreg|mask|z,zmmreg,zmmrm512|b64|er [rvm:fv: evex.nds.512.66.0f38.w1 9e /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(9e) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VFNMSUB132PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+33430, 544, 5451}, +}; + +static const struct itemplate instrux_VFNMSUB312PS[2] = { + /* 0 : VFNMSUB312PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 9e /r ] FMA,FUTURE */ + /* 261(002 001) 001(9e) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMSUB312PS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62320, 461, 3767}, + /* 1 : VFNMSUB312PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 9e /r ] FMA,FUTURE */ + /* 261(002 005) 001(9e) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMSUB312PS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62327, 461, 3768}, +}; + +static const struct itemplate instrux_VFNMSUB312PD[2] = { + /* 0 : VFNMSUB312PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 9e /r ] FMA,FUTURE */ + /* 261(002 201) 001(9e) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMSUB312PD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62334, 461, 3769}, + /* 1 : VFNMSUB312PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 9e /r ] FMA,FUTURE */ + /* 261(002 205) 001(9e) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMSUB312PD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62341, 461, 3770}, +}; + +static const struct itemplate instrux_VFNMSUB213PS[5] = { + /* 0 : VFNMSUB213PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 ae /r ] FMA,FUTURE */ + /* 261(002 001) 001(ae) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMSUB213PS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62348, 461, 3771}, + /* 1 : VFNMSUB213PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 ae /r ] FMA,FUTURE */ + /* 261(002 005) 001(ae) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMSUB213PS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62355, 461, 3772}, + /* 2 : VFNMSUB213PS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 ae /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(ae) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFNMSUB213PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+33511, 543, 5460}, + /* 3 : VFNMSUB213PS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 ae /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(ae) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFNMSUB213PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+33520, 543, 5461}, + /* 4 : VFNMSUB213PS zmmreg|mask|z,zmmreg,zmmrm512|b32|er [rvm:fv: evex.nds.512.66.0f38.w0 ae /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(ae) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VFNMSUB213PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+33529, 544, 5462}, +}; + +static const struct itemplate instrux_VFNMSUB213PD[5] = { + /* 0 : VFNMSUB213PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 ae /r ] FMA,FUTURE */ + /* 261(002 201) 001(ae) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMSUB213PD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62362, 461, 3773}, + /* 1 : VFNMSUB213PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 ae /r ] FMA,FUTURE */ + /* 261(002 205) 001(ae) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMSUB213PD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62369, 461, 3774}, + /* 2 : VFNMSUB213PD xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 ae /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(ae) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFNMSUB213PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+33484, 543, 5457}, + /* 3 : VFNMSUB213PD ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 ae /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(ae) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFNMSUB213PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+33493, 543, 5458}, + /* 4 : VFNMSUB213PD zmmreg|mask|z,zmmreg,zmmrm512|b64|er [rvm:fv: evex.nds.512.66.0f38.w1 ae /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(ae) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VFNMSUB213PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+33502, 544, 5459}, +}; + +static const struct itemplate instrux_VFNMSUB123PS[2] = { + /* 0 : VFNMSUB123PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 ae /r ] FMA,FUTURE */ + /* 261(002 001) 001(ae) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMSUB123PS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62348, 461, 3775}, + /* 1 : VFNMSUB123PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 ae /r ] FMA,FUTURE */ + /* 261(002 005) 001(ae) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMSUB123PS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62355, 461, 3776}, +}; + +static const struct itemplate instrux_VFNMSUB123PD[2] = { + /* 0 : VFNMSUB123PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 ae /r ] FMA,FUTURE */ + /* 261(002 201) 001(ae) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMSUB123PD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62362, 461, 3777}, + /* 1 : VFNMSUB123PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 ae /r ] FMA,FUTURE */ + /* 261(002 205) 001(ae) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMSUB123PD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62369, 461, 3778}, +}; + +static const struct itemplate instrux_VFNMSUB231PS[5] = { + /* 0 : VFNMSUB231PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 be /r ] FMA,FUTURE */ + /* 261(002 001) 001(be) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMSUB231PS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62376, 461, 3779}, + /* 1 : VFNMSUB231PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 be /r ] FMA,FUTURE */ + /* 261(002 005) 001(be) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMSUB231PS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62383, 461, 3780}, + /* 2 : VFNMSUB231PS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 be /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(be) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFNMSUB231PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+33583, 543, 5468}, + /* 3 : VFNMSUB231PS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 be /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(be) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFNMSUB231PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+33592, 543, 5469}, + /* 4 : VFNMSUB231PS zmmreg|mask|z,zmmreg,zmmrm512|b32|er [rvm:fv: evex.nds.512.66.0f38.w0 be /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(be) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VFNMSUB231PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+33601, 544, 5470}, +}; + +static const struct itemplate instrux_VFNMSUB231PD[5] = { + /* 0 : VFNMSUB231PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 be /r ] FMA,FUTURE */ + /* 261(002 201) 001(be) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMSUB231PD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62390, 461, 3781}, + /* 1 : VFNMSUB231PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 be /r ] FMA,FUTURE */ + /* 261(002 205) 001(be) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMSUB231PD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62397, 461, 3782}, + /* 2 : VFNMSUB231PD xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 be /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(be) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFNMSUB231PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+33556, 543, 5465}, + /* 3 : VFNMSUB231PD ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 be /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(be) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFNMSUB231PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+33565, 543, 5466}, + /* 4 : VFNMSUB231PD zmmreg|mask|z,zmmreg,zmmrm512|b64|er [rvm:fv: evex.nds.512.66.0f38.w1 be /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(be) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VFNMSUB231PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+33574, 544, 5467}, +}; + +static const struct itemplate instrux_VFNMSUB321PS[2] = { + /* 0 : VFNMSUB321PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 be /r ] FMA,FUTURE */ + /* 261(002 001) 001(be) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMSUB321PS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62376, 461, 3783}, + /* 1 : VFNMSUB321PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 be /r ] FMA,FUTURE */ + /* 261(002 005) 001(be) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMSUB321PS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62383, 461, 3784}, +}; + +static const struct itemplate instrux_VFNMSUB321PD[2] = { + /* 0 : VFNMSUB321PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 be /r ] FMA,FUTURE */ + /* 261(002 201) 001(be) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMSUB321PD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62390, 461, 3785}, + /* 1 : VFNMSUB321PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 be /r ] FMA,FUTURE */ + /* 261(002 205) 001(be) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMSUB321PD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62397, 461, 3786}, +}; + +static const struct itemplate instrux_VFMADD132SS[2] = { + /* 0 : VFMADD132SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 99 /r ] FMA,FUTURE */ + /* 261(002 001) 001(99) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADD132SS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62404, 461, 3787}, + /* 1 : VFMADD132SS xmmreg|mask|z,xmmreg,xmmrm32|er [rvm:t1s: evex.nds.lig.66.0f38.w0 99 /r ] AVX512,FUTURE */ + /* 241(f2 7d 08) 306 001(99) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VFMADD132SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+32503, 545, 5348}, +}; + +static const struct itemplate instrux_VFMADD132SD[2] = { + /* 0 : VFMADD132SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 99 /r ] FMA,FUTURE */ + /* 261(002 201) 001(99) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADD132SD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62411, 461, 3788}, + /* 1 : VFMADD132SD xmmreg|mask|z,xmmreg,xmmrm64|er [rvm:t1s: evex.nds.lig.66.0f38.w1 99 /r ] AVX512,FUTURE */ + /* 241(f2 fd 08) 306 001(99) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VFMADD132SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+32494, 545, 5347}, +}; + +static const struct itemplate instrux_VFMADD312SS[1] = { + /* 0 : VFMADD312SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 99 /r ] FMA,FUTURE */ + /* 261(002 001) 001(99) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADD312SS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62404, 461, 3789}, +}; + +static const struct itemplate instrux_VFMADD312SD[1] = { + /* 0 : VFMADD312SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 99 /r ] FMA,FUTURE */ + /* 261(002 201) 001(99) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADD312SD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62411, 461, 3790}, +}; + +static const struct itemplate instrux_VFMADD213SS[2] = { + /* 0 : VFMADD213SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 a9 /r ] FMA,FUTURE */ + /* 261(002 001) 001(a9) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADD213SS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62418, 461, 3791}, + /* 1 : VFMADD213SS xmmreg|mask|z,xmmreg,xmmrm32|er [rvm:t1s: evex.nds.lig.66.0f38.w0 a9 /r ] AVX512,FUTURE */ + /* 241(f2 7d 08) 306 001(a9) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VFMADD213SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+32575, 545, 5356}, +}; + +static const struct itemplate instrux_VFMADD213SD[2] = { + /* 0 : VFMADD213SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 a9 /r ] FMA,FUTURE */ + /* 261(002 201) 001(a9) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADD213SD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62425, 461, 3792}, + /* 1 : VFMADD213SD xmmreg|mask|z,xmmreg,xmmrm64|er [rvm:t1s: evex.nds.lig.66.0f38.w1 a9 /r ] AVX512,FUTURE */ + /* 241(f2 fd 08) 306 001(a9) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VFMADD213SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+32566, 545, 5355}, +}; + +static const struct itemplate instrux_VFMADD123SS[1] = { + /* 0 : VFMADD123SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 a9 /r ] FMA,FUTURE */ + /* 261(002 001) 001(a9) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADD123SS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62418, 461, 3793}, +}; + +static const struct itemplate instrux_VFMADD123SD[1] = { + /* 0 : VFMADD123SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 a9 /r ] FMA,FUTURE */ + /* 261(002 201) 001(a9) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADD123SD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62425, 461, 3794}, +}; + +static const struct itemplate instrux_VFMADD231SS[2] = { + /* 0 : VFMADD231SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 b9 /r ] FMA,FUTURE */ + /* 261(002 001) 001(b9) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADD231SS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62432, 461, 3795}, + /* 1 : VFMADD231SS xmmreg|mask|z,xmmreg,xmmrm32|er [rvm:t1s: evex.nds.lig.66.0f38.w0 b9 /r ] AVX512,FUTURE */ + /* 241(f2 7d 08) 306 001(b9) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VFMADD231SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+32647, 545, 5364}, +}; + +static const struct itemplate instrux_VFMADD231SD[2] = { + /* 0 : VFMADD231SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 b9 /r ] FMA,FUTURE */ + /* 261(002 201) 001(b9) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADD231SD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62439, 461, 3796}, + /* 1 : VFMADD231SD xmmreg|mask|z,xmmreg,xmmrm64|er [rvm:t1s: evex.nds.lig.66.0f38.w1 b9 /r ] AVX512,FUTURE */ + /* 241(f2 fd 08) 306 001(b9) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VFMADD231SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+32638, 545, 5363}, +}; + +static const struct itemplate instrux_VFMADD321SS[1] = { + /* 0 : VFMADD321SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 b9 /r ] FMA,FUTURE */ + /* 261(002 001) 001(b9) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADD321SS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62432, 461, 3797}, +}; + +static const struct itemplate instrux_VFMADD321SD[1] = { + /* 0 : VFMADD321SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 b9 /r ] FMA,FUTURE */ + /* 261(002 201) 001(b9) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADD321SD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62439, 461, 3798}, +}; + +static const struct itemplate instrux_VFMSUB132SS[2] = { + /* 0 : VFMSUB132SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 9b /r ] FMA,FUTURE */ + /* 261(002 001) 001(9b) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUB132SS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62446, 461, 3799}, + /* 1 : VFMSUB132SS xmmreg|mask|z,xmmreg,xmmrm32|er [rvm:t1s: evex.nds.lig.66.0f38.w0 9b /r ] AVX512,FUTURE */ + /* 241(f2 7d 08) 306 001(9b) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VFMSUB132SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+32881, 545, 5390}, +}; + +static const struct itemplate instrux_VFMSUB132SD[2] = { + /* 0 : VFMSUB132SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 9b /r ] FMA,FUTURE */ + /* 261(002 201) 001(9b) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUB132SD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62453, 461, 3800}, + /* 1 : VFMSUB132SD xmmreg|mask|z,xmmreg,xmmrm64|er [rvm:t1s: evex.nds.lig.66.0f38.w1 9b /r ] AVX512,FUTURE */ + /* 241(f2 fd 08) 306 001(9b) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VFMSUB132SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+32872, 545, 5389}, +}; + +static const struct itemplate instrux_VFMSUB312SS[1] = { + /* 0 : VFMSUB312SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 9b /r ] FMA,FUTURE */ + /* 261(002 001) 001(9b) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUB312SS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62446, 461, 3801}, +}; + +static const struct itemplate instrux_VFMSUB312SD[1] = { + /* 0 : VFMSUB312SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 9b /r ] FMA,FUTURE */ + /* 261(002 201) 001(9b) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUB312SD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62453, 461, 3802}, +}; + +static const struct itemplate instrux_VFMSUB213SS[2] = { + /* 0 : VFMSUB213SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 ab /r ] FMA,FUTURE */ + /* 261(002 001) 001(ab) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUB213SS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62460, 461, 3803}, + /* 1 : VFMSUB213SS xmmreg|mask|z,xmmreg,xmmrm32|er [rvm:t1s: evex.nds.lig.66.0f38.w0 ab /r ] AVX512,FUTURE */ + /* 241(f2 7d 08) 306 001(ab) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VFMSUB213SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+32953, 545, 5398}, +}; + +static const struct itemplate instrux_VFMSUB213SD[2] = { + /* 0 : VFMSUB213SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 ab /r ] FMA,FUTURE */ + /* 261(002 201) 001(ab) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUB213SD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62467, 461, 3804}, + /* 1 : VFMSUB213SD xmmreg|mask|z,xmmreg,xmmrm64|er [rvm:t1s: evex.nds.lig.66.0f38.w1 ab /r ] AVX512,FUTURE */ + /* 241(f2 fd 08) 306 001(ab) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VFMSUB213SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+32944, 545, 5397}, +}; + +static const struct itemplate instrux_VFMSUB123SS[1] = { + /* 0 : VFMSUB123SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 ab /r ] FMA,FUTURE */ + /* 261(002 001) 001(ab) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUB123SS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62460, 461, 3805}, +}; + +static const struct itemplate instrux_VFMSUB123SD[1] = { + /* 0 : VFMSUB123SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 ab /r ] FMA,FUTURE */ + /* 261(002 201) 001(ab) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUB123SD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62467, 461, 3806}, +}; + +static const struct itemplate instrux_VFMSUB231SS[2] = { + /* 0 : VFMSUB231SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 bb /r ] FMA,FUTURE */ + /* 261(002 001) 001(bb) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUB231SS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62474, 461, 3807}, + /* 1 : VFMSUB231SS xmmreg|mask|z,xmmreg,xmmrm32|er [rvm:t1s: evex.nds.lig.66.0f38.w0 bb /r ] AVX512,FUTURE */ + /* 241(f2 7d 08) 306 001(bb) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VFMSUB231SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+33025, 545, 5406}, +}; + +static const struct itemplate instrux_VFMSUB231SD[2] = { + /* 0 : VFMSUB231SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 bb /r ] FMA,FUTURE */ + /* 261(002 201) 001(bb) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUB231SD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62481, 461, 3808}, + /* 1 : VFMSUB231SD xmmreg|mask|z,xmmreg,xmmrm64|er [rvm:t1s: evex.nds.lig.66.0f38.w1 bb /r ] AVX512,FUTURE */ + /* 241(f2 fd 08) 306 001(bb) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VFMSUB231SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+33016, 545, 5405}, +}; + +static const struct itemplate instrux_VFMSUB321SS[1] = { + /* 0 : VFMSUB321SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 bb /r ] FMA,FUTURE */ + /* 261(002 001) 001(bb) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUB321SS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62474, 461, 3809}, +}; + +static const struct itemplate instrux_VFMSUB321SD[1] = { + /* 0 : VFMSUB321SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 bb /r ] FMA,FUTURE */ + /* 261(002 201) 001(bb) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUB321SD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62481, 461, 3810}, +}; + +static const struct itemplate instrux_VFNMADD132SS[2] = { + /* 0 : VFNMADD132SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 9d /r ] FMA,FUTURE */ + /* 261(002 001) 001(9d) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMADD132SS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62488, 461, 3811}, + /* 1 : VFNMADD132SS xmmreg|mask|z,xmmreg,xmmrm32|er [rvm:t1s: evex.nds.lig.66.0f38.w0 9d /r ] AVX512,FUTURE */ + /* 241(f2 7d 08) 306 001(9d) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VFNMADD132SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+33259, 545, 5432}, +}; + +static const struct itemplate instrux_VFNMADD132SD[2] = { + /* 0 : VFNMADD132SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 9d /r ] FMA,FUTURE */ + /* 261(002 201) 001(9d) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMADD132SD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62495, 461, 3812}, + /* 1 : VFNMADD132SD xmmreg|mask|z,xmmreg,xmmrm64|er [rvm:t1s: evex.nds.lig.66.0f38.w1 9d /r ] AVX512,FUTURE */ + /* 241(f2 fd 08) 306 001(9d) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VFNMADD132SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+33250, 545, 5431}, +}; + +static const struct itemplate instrux_VFNMADD312SS[1] = { + /* 0 : VFNMADD312SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 9d /r ] FMA,FUTURE */ + /* 261(002 001) 001(9d) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMADD312SS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62488, 461, 3813}, +}; + +static const struct itemplate instrux_VFNMADD312SD[1] = { + /* 0 : VFNMADD312SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 9d /r ] FMA,FUTURE */ + /* 261(002 201) 001(9d) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMADD312SD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62495, 461, 3814}, +}; + +static const struct itemplate instrux_VFNMADD213SS[2] = { + /* 0 : VFNMADD213SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 ad /r ] FMA,FUTURE */ + /* 261(002 001) 001(ad) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMADD213SS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62502, 461, 3815}, + /* 1 : VFNMADD213SS xmmreg|mask|z,xmmreg,xmmrm32|er [rvm:t1s: evex.nds.lig.66.0f38.w0 ad /r ] AVX512,FUTURE */ + /* 241(f2 7d 08) 306 001(ad) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VFNMADD213SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+33331, 545, 5440}, +}; + +static const struct itemplate instrux_VFNMADD213SD[2] = { + /* 0 : VFNMADD213SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 ad /r ] FMA,FUTURE */ + /* 261(002 201) 001(ad) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMADD213SD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62509, 461, 3816}, + /* 1 : VFNMADD213SD xmmreg|mask|z,xmmreg,xmmrm64|er [rvm:t1s: evex.nds.lig.66.0f38.w1 ad /r ] AVX512,FUTURE */ + /* 241(f2 fd 08) 306 001(ad) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VFNMADD213SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+33322, 545, 5439}, +}; + +static const struct itemplate instrux_VFNMADD123SS[1] = { + /* 0 : VFNMADD123SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 ad /r ] FMA,FUTURE */ + /* 261(002 001) 001(ad) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMADD123SS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62502, 461, 3817}, +}; + +static const struct itemplate instrux_VFNMADD123SD[1] = { + /* 0 : VFNMADD123SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 ad /r ] FMA,FUTURE */ + /* 261(002 201) 001(ad) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMADD123SD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62509, 461, 3818}, +}; + +static const struct itemplate instrux_VFNMADD231SS[2] = { + /* 0 : VFNMADD231SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 bd /r ] FMA,FUTURE */ + /* 261(002 001) 001(bd) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMADD231SS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62516, 461, 3819}, + /* 1 : VFNMADD231SS xmmreg|mask|z,xmmreg,xmmrm32|er [rvm:t1s: evex.nds.lig.66.0f38.w0 bd /r ] AVX512,FUTURE */ + /* 241(f2 7d 08) 306 001(bd) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VFNMADD231SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+33403, 545, 5448}, +}; + +static const struct itemplate instrux_VFNMADD231SD[2] = { + /* 0 : VFNMADD231SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 bd /r ] FMA,FUTURE */ + /* 261(002 201) 001(bd) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMADD231SD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62523, 461, 3820}, + /* 1 : VFNMADD231SD xmmreg|mask|z,xmmreg,xmmrm64|er [rvm:t1s: evex.nds.lig.66.0f38.w1 bd /r ] AVX512,FUTURE */ + /* 241(f2 fd 08) 306 001(bd) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VFNMADD231SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+33394, 545, 5447}, +}; + +static const struct itemplate instrux_VFNMADD321SS[1] = { + /* 0 : VFNMADD321SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 bd /r ] FMA,FUTURE */ + /* 261(002 001) 001(bd) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMADD321SS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62516, 461, 3821}, +}; + +static const struct itemplate instrux_VFNMADD321SD[1] = { + /* 0 : VFNMADD321SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 bd /r ] FMA,FUTURE */ + /* 261(002 201) 001(bd) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMADD321SD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62523, 461, 3822}, +}; + +static const struct itemplate instrux_VFNMSUB132SS[2] = { + /* 0 : VFNMSUB132SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 9f /r ] FMA,FUTURE */ + /* 261(002 001) 001(9f) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMSUB132SS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62530, 461, 3823}, + /* 1 : VFNMSUB132SS xmmreg|mask|z,xmmreg,xmmrm32|er [rvm:t1s: evex.nds.lig.66.0f38.w0 9f /r ] AVX512,FUTURE */ + /* 241(f2 7d 08) 306 001(9f) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VFNMSUB132SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+33475, 545, 5456}, +}; + +static const struct itemplate instrux_VFNMSUB132SD[2] = { + /* 0 : VFNMSUB132SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 9f /r ] FMA,FUTURE */ + /* 261(002 201) 001(9f) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMSUB132SD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62537, 461, 3824}, + /* 1 : VFNMSUB132SD xmmreg|mask|z,xmmreg,xmmrm64|er [rvm:t1s: evex.nds.lig.66.0f38.w1 9f /r ] AVX512,FUTURE */ + /* 241(f2 fd 08) 306 001(9f) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VFNMSUB132SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+33466, 545, 5455}, +}; + +static const struct itemplate instrux_VFNMSUB312SS[1] = { + /* 0 : VFNMSUB312SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 9f /r ] FMA,FUTURE */ + /* 261(002 001) 001(9f) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMSUB312SS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62530, 461, 3825}, +}; + +static const struct itemplate instrux_VFNMSUB312SD[1] = { + /* 0 : VFNMSUB312SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 9f /r ] FMA,FUTURE */ + /* 261(002 201) 001(9f) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMSUB312SD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62537, 461, 3826}, +}; + +static const struct itemplate instrux_VFNMSUB213SS[2] = { + /* 0 : VFNMSUB213SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 af /r ] FMA,FUTURE */ + /* 261(002 001) 001(af) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMSUB213SS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62544, 461, 3827}, + /* 1 : VFNMSUB213SS xmmreg|mask|z,xmmreg,xmmrm32|er [rvm:t1s: evex.nds.lig.66.0f38.w0 af /r ] AVX512,FUTURE */ + /* 241(f2 7d 08) 306 001(af) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VFNMSUB213SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+33547, 545, 5464}, +}; + +static const struct itemplate instrux_VFNMSUB213SD[2] = { + /* 0 : VFNMSUB213SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 af /r ] FMA,FUTURE */ + /* 261(002 201) 001(af) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMSUB213SD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62551, 461, 3828}, + /* 1 : VFNMSUB213SD xmmreg|mask|z,xmmreg,xmmrm64|er [rvm:t1s: evex.nds.lig.66.0f38.w1 af /r ] AVX512,FUTURE */ + /* 241(f2 fd 08) 306 001(af) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VFNMSUB213SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+33538, 545, 5463}, +}; + +static const struct itemplate instrux_VFNMSUB123SS[1] = { + /* 0 : VFNMSUB123SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 af /r ] FMA,FUTURE */ + /* 261(002 001) 001(af) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMSUB123SS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62544, 461, 3829}, +}; + +static const struct itemplate instrux_VFNMSUB123SD[1] = { + /* 0 : VFNMSUB123SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 af /r ] FMA,FUTURE */ + /* 261(002 201) 001(af) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMSUB123SD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62551, 461, 3830}, +}; + +static const struct itemplate instrux_VFNMSUB231SS[2] = { + /* 0 : VFNMSUB231SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 bf /r ] FMA,FUTURE */ + /* 261(002 001) 001(bf) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMSUB231SS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62558, 461, 3831}, + /* 1 : VFNMSUB231SS xmmreg|mask|z,xmmreg,xmmrm32|er [rvm:t1s: evex.nds.lig.66.0f38.w0 bf /r ] AVX512,FUTURE */ + /* 241(f2 7d 08) 306 001(bf) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VFNMSUB231SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+33619, 545, 5472}, +}; + +static const struct itemplate instrux_VFNMSUB231SD[2] = { + /* 0 : VFNMSUB231SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 bf /r ] FMA,FUTURE */ + /* 261(002 201) 001(bf) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMSUB231SD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62565, 461, 3832}, + /* 1 : VFNMSUB231SD xmmreg|mask|z,xmmreg,xmmrm64|er [rvm:t1s: evex.nds.lig.66.0f38.w1 bf /r ] AVX512,FUTURE */ + /* 241(f2 fd 08) 306 001(bf) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VFNMSUB231SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+33610, 545, 5471}, +}; + +static const struct itemplate instrux_VFNMSUB321SS[1] = { + /* 0 : VFNMSUB321SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 bf /r ] FMA,FUTURE */ + /* 261(002 001) 001(bf) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMSUB321SS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62558, 461, 3833}, +}; + +static const struct itemplate instrux_VFNMSUB321SD[1] = { + /* 0 : VFNMSUB321SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 bf /r ] FMA,FUTURE */ + /* 261(002 201) 001(bf) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMSUB321SD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62565, 461, 3834}, +}; + +static const struct itemplate instrux_VCVTPH2PS[8] = { + /* 0 : VCVTPH2PS ymmreg,xmmrm128 [rm: vex.256.66.0f38.w0 13 /r ] F16C,FUTURE */ + /* 270(002 005) 001(13) 110 : NOAPX,VEX,F16C,FUTURE */ + {I_VCVTPH2PS, 2, {YMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+62572, 462, 3839}, + /* 1 : VCVTPH2PS xmmreg,xmmrm64 [rm: vex.128.66.0f38.w0 13 /r ] F16C,FUTURE */ + /* 270(002 001) 001(13) 110 : NOAPX,VEX,F16C,FUTURE */ + {I_VCVTPH2PS, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+62579, 462, 3840}, + /* 2 : VCVTPH2PS xmmreg|mask|z,xmmrm64 [rm:hvm: evex.128.66.0f38.w0 13 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 08) 314 001(13) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTPH2PS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+31360, 543, 5189}, + /* 3 : VCVTPH2PS ymmreg|mask|z,xmmrm128 [rm:hvm: evex.256.66.0f38.w0 13 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 28) 314 001(13) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTPH2PS, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+31369, 543, 5190}, + /* 4 : VCVTPH2PS zmmreg|mask|z,ymmrm256|sae [rm:hvm: evex.512.66.0f38.w0 13 /r ] AVX512,FUTURE */ + /* 250(f2 7d 48) 314 001(13) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VCVTPH2PS, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+31378, 544, 5191}, + /* 5 : VCVTPH2PS xmmreg|mask|z,xmmrm64 [rm:hvm: evex.128.66.0f38.w0 13 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 08) 314 001(13) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTPH2PS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+31360, 543, 7107}, + /* 6 : VCVTPH2PS ymmreg|mask|z,xmmrm128 [rm:hvm: evex.256.66.0f38.w0 13 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 28) 314 001(13) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTPH2PS, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+31369, 543, 7108}, + /* 7 : VCVTPH2PS zmmreg|mask|z,ymmrm256|sae [rm:hvm: evex.512.66.0f38.w0 13 /r ] AVX512,FUTURE */ + /* 250(f2 7d 48) 314 001(13) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VCVTPH2PS, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+31378, 544, 7109}, +}; + +static const struct itemplate instrux_VCVTPS2PH[14] = { + /* 0 : VCVTPS2PH xmmrm128,ymmreg,imm8 [mri: vex.256.66.0f3a.w0 1d /r ib ] F16C,FUTURE */ + /* 270(003 005) 001(1d) 101 022 : NOAPX,VEX,F16C,FUTURE */ + {I_VCVTPS2PH, 3, {RM_XMM|BITS128|RN_L16,YMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52691, 462, 3841}, + /* 1 : VCVTPS2PH xmmrm64,xmmreg,imm8 [mri: vex.128.66.0f3a.w0 1d /r ib ] F16C,FUTURE */ + /* 270(003 001) 001(1d) 101 022 : NOAPX,VEX,F16C,FUTURE */ + {I_VCVTPS2PH, 3, {RM_XMM|BITS64|RN_L16,XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52699, 462, 3842}, + /* 2 : VCVTPS2PH xmmreg|mask|z,xmmreg,imm8 [mri:hvm: evex.128.66.0f3a.w0 1d /r ib ] AVX512,AVX512VL,FUTURE */ + /* 250(f3 7d 08) 314 001(1d) 101 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTPS2PH, 3, {XMMREG,XMMREG,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18333, 543, 5198}, + /* 3 : VCVTPS2PH xmmreg|mask|z,ymmreg,imm8 [mri:hvm: evex.256.66.0f3a.w0 1d /r ib ] AVX512,AVX512VL,FUTURE */ + /* 250(f3 7d 28) 314 001(1d) 101 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTPS2PH, 3, {XMMREG,YMMREG,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18343, 543, 5199}, + /* 4 : VCVTPS2PH ymmreg|mask|z,zmmreg|sae,imm8 [mri:hvm: evex.512.66.0f3a.w0 1d /r ib ] AVX512,FUTURE */ + /* 250(f3 7d 48) 314 001(1d) 101 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VCVTPS2PH, 3, {YMMREG,ZMMREG,IMM_NORMAL|BITS8,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+18353, 544, 5200}, + /* 5 : VCVTPS2PH mem64|mask,xmmreg,imm8 [mri:hvm: evex.128.66.0f3a.w0 1d /r ib ] AVX512,AVX512VL,FUTURE */ + /* 250(f3 7d 08) 314 001(1d) 101 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTPS2PH, 3, {MEMORY|BITS64,XMMREG,IMM_NORMAL|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+18333, 543, 5201}, + /* 6 : VCVTPS2PH mem128|mask,ymmreg,imm8 [mri:hvm: evex.256.66.0f3a.w0 1d /r ib ] AVX512,AVX512VL,FUTURE */ + /* 250(f3 7d 28) 314 001(1d) 101 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTPS2PH, 3, {MEMORY|BITS128,YMMREG,IMM_NORMAL|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+18343, 543, 5202}, + /* 7 : VCVTPS2PH mem256|mask,zmmreg|sae,imm8 [mri:hvm: evex.512.66.0f3a.w0 1d /r ib ] AVX512,FUTURE */ + /* 250(f3 7d 48) 314 001(1d) 101 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VCVTPS2PH, 3, {MEMORY|BITS256,ZMMREG,IMM_NORMAL|BITS8,0,0}, {MASK,SAE,0,0,0}, nasm_bytecodes+18353, 544, 5203}, + /* 8 : VCVTPS2PH xmmreg|mask|z,xmmreg,imm8 [mri:hvm: evex.128.66.0f3a.w0 1d /r ib ] AVX512,AVX512VL,FUTURE */ + /* 250(f3 7d 08) 314 001(1d) 101 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTPS2PH, 3, {XMMREG,XMMREG,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18333, 543, 7128}, + /* 9 : VCVTPS2PH mem64|mask,xmmreg,imm8 [mri:hvm: evex.128.66.0f3a.w0 1d /r ib ] AVX512,AVX512VL,FUTURE */ + /* 250(f3 7d 08) 314 001(1d) 101 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTPS2PH, 3, {MEMORY|BITS64,XMMREG,IMM_NORMAL|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+18333, 543, 7129}, + /* 10 : VCVTPS2PH xmmreg|mask|z,ymmreg,imm8 [mri:hvm: evex.256.66.0f3a.w0 1d /r ib ] AVX512,AVX512VL,FUTURE */ + /* 250(f3 7d 28) 314 001(1d) 101 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTPS2PH, 3, {XMMREG,YMMREG,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18343, 543, 7130}, + /* 11 : VCVTPS2PH mem128|mask,ymmreg,imm8 [mri:hvm: evex.256.66.0f3a.w0 1d /r ib ] AVX512,AVX512VL,FUTURE */ + /* 250(f3 7d 28) 314 001(1d) 101 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTPS2PH, 3, {MEMORY|BITS128,YMMREG,IMM_NORMAL|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+18343, 543, 7131}, + /* 12 : VCVTPS2PH ymmreg|mask|z,zmmreg|sae,imm8 [mri:hvm: evex.512.66.0f3a.w0 1d /r ib ] AVX512,FUTURE */ + /* 250(f3 7d 48) 314 001(1d) 101 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VCVTPS2PH, 3, {YMMREG,ZMMREG,IMM_NORMAL|BITS8,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+18353, 544, 7132}, + /* 13 : VCVTPS2PH mem256|mask,zmmreg|sae,imm8 [mri:hvm: evex.512.66.0f3a.w0 1d /r ib ] AVX512,FUTURE */ + /* 250(f3 7d 48) 314 001(1d) 101 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VCVTPS2PH, 3, {MEMORY|BITS256,ZMMREG,IMM_NORMAL|BITS8,0,0}, {MASK,SAE,0,0,0}, nasm_bytecodes+18353, 544, 7133}, +}; + +static const struct itemplate instrux_XSTORE[1] = { + /* 0 : XSTORE void [ 0f a7 c0 ] PENT,CYRIX */ + /* 355 002(a7 c0) : PENT,CYRIX */ + {I_XSTORE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72514, 463, 3847}, +}; + +static const struct itemplate instrux_XCRYPTECB[1] = { + /* 0 : XCRYPTECB void [ f3 0f a7 c8 ] PENT,CYRIX */ + /* 333 355 002(a7 c8) : PENT,CYRIX */ + {I_XCRYPTECB, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+69975, 463, 3848}, +}; + +static const struct itemplate instrux_XCRYPTCBC[1] = { + /* 0 : XCRYPTCBC void [ f3 0f a7 d0 ] PENT,CYRIX */ + /* 333 355 002(a7 d0) : PENT,CYRIX */ + {I_XCRYPTCBC, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+69981, 463, 3849}, +}; + +static const struct itemplate instrux_XCRYPTCTR[1] = { + /* 0 : XCRYPTCTR void [ f3 0f a7 d8 ] PENT,CYRIX */ + /* 333 355 002(a7 d8) : PENT,CYRIX */ + {I_XCRYPTCTR, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+69987, 463, 3850}, +}; + +static const struct itemplate instrux_XCRYPTCFB[1] = { + /* 0 : XCRYPTCFB void [ f3 0f a7 e0 ] PENT,CYRIX */ + /* 333 355 002(a7 e0) : PENT,CYRIX */ + {I_XCRYPTCFB, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+69993, 463, 3851}, +}; + +static const struct itemplate instrux_XCRYPTOFB[1] = { + /* 0 : XCRYPTOFB void [ f3 0f a7 e8 ] PENT,CYRIX */ + /* 333 355 002(a7 e8) : PENT,CYRIX */ + {I_XCRYPTOFB, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+69999, 463, 3852}, +}; + +static const struct itemplate instrux_MONTMUL[1] = { + /* 0 : MONTMUL void [ f3 0f a6 c0 ] PENT,CYRIX */ + /* 333 355 002(a6 c0) : PENT,CYRIX */ + {I_MONTMUL, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70005, 463, 3853}, +}; + +static const struct itemplate instrux_XSHA1[1] = { + /* 0 : XSHA1 void [ f3 0f a6 c8 ] PENT,CYRIX */ + /* 333 355 002(a6 c8) : PENT,CYRIX */ + {I_XSHA1, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70011, 463, 3854}, +}; + +static const struct itemplate instrux_XSHA256[1] = { + /* 0 : XSHA256 void [ f3 0f a6 d0 ] PENT,CYRIX */ + /* 333 355 002(a6 d0) : PENT,CYRIX */ + {I_XSHA256, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70017, 463, 3855}, +}; + +static const struct itemplate instrux_LLWPCB[2] = { + /* 0 : LLWPCB reg32 [m: xop.m9.w0.l0.p0 12 /0 ] 386,AMD */ + /* 270(111 000) 001(12) 200 : NOAPX,VEX,386,AMD */ + {I_LLWPCB, 1, {REG_GPR|BITS32|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+62586, 464, 3866}, + /* 1 : LLWPCB reg64 [m: xop.m9.w1.l0.p0 12 /0 ] LONG,PROT,X86_64,AMD */ + /* 270(111 200) 001(12) 200 : NOAPX,LONG,VEX,PROT,X86_64,AMD */ + {I_LLWPCB, 1, {REG_GPR|BITS64|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+62593, 465, 3867}, +}; + +static const struct itemplate instrux_SLWPCB[2] = { + /* 0 : SLWPCB reg32 [m: xop.m9.w0.l0.p0 12 /1 ] 386,AMD */ + /* 270(111 000) 001(12) 201 : NOAPX,VEX,386,AMD */ + {I_SLWPCB, 1, {REG_GPR|BITS32|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+62600, 464, 3869}, + /* 1 : SLWPCB reg64 [m: xop.m9.w1.l0.p0 12 /1 ] LONG,PROT,X86_64,AMD */ + /* 270(111 200) 001(12) 201 : NOAPX,LONG,VEX,PROT,X86_64,AMD */ + {I_SLWPCB, 1, {REG_GPR|BITS64|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+62607, 465, 3870}, +}; + +static const struct itemplate instrux_LWPVAL[2] = { + /* 0 : LWPVAL reg32,rm32,imm32 [vmi: xop.m10.w0.ndd.l0.p0 12 /1 id ] 386,AMD */ + /* 260(112 000) 001(12) 211 042 : NOAPX,VEX,386,AMD */ + {I_LWPVAL, 3, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+52707, 464, 3872}, + /* 1 : LWPVAL reg64,rm32,imm32 [vmi: xop.m10.w1.ndd.l0.p0 12 /1 id ] LONG,PROT,X86_64,AMD */ + /* 260(112 200) 001(12) 211 042 : NOAPX,LONG,VEX,PROT,X86_64,AMD */ + {I_LWPVAL, 3, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS32|RN_L16,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+52715, 465, 3873}, +}; + +static const struct itemplate instrux_LWPINS[2] = { + /* 0 : LWPINS reg32,rm32,imm32 [vmi: xop.m10.w0.ndd.l0.p0 12 /0 id ] 386,AMD */ + /* 260(112 000) 001(12) 210 042 : NOAPX,VEX,386,AMD */ + {I_LWPINS, 3, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+52723, 464, 3875}, + /* 1 : LWPINS reg64,rm32,imm32 [vmi: xop.m10.w1.ndd.l0.p0 12 /0 id ] LONG,PROT,X86_64,AMD */ + /* 260(112 200) 001(12) 210 042 : NOAPX,LONG,VEX,PROT,X86_64,AMD */ + {I_LWPINS, 3, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS32|RN_L16,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+52731, 465, 3876}, +}; + +static const struct itemplate instrux_VFMADDPD[8] = { + /* 0 : VFMADDPD xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: vex.m3.w0.nds.l0.p1 69 /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 001) 001(69) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMADDPD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+52739, 466, 3882}, + /* 1 : VFMADDPD xmmreg,xmmrm128,xmmreg [r+vms: vex.m3.w0.nds.l0.p1 69 /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(003 001) 001(69) 110 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMADDPD, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+52747, 466, 3882}, + /* 2 : VFMADDPD ymmreg,ymmreg*,ymmrm256,ymmreg [rvms: vex.m3.w0.nds.l1.p1 69 /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 005) 001(69) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMADDPD, 4, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,YMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+52755, 466, 3883}, + /* 3 : VFMADDPD ymmreg,ymmrm256,ymmreg [r+vms: vex.m3.w0.nds.l1.p1 69 /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(003 005) 001(69) 110 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMADDPD, 3, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,YMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+52763, 466, 3883}, + /* 4 : VFMADDPD xmmreg,xmmreg*,xmmreg,xmmrm128 [rvsm: vex.m3.w1.nds.l0.p1 69 /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 201) 001(69) 130 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMADDPD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+52771, 466, 3884}, + /* 5 : VFMADDPD xmmreg,xmmreg,xmmrm128 [r+vsm: vex.m3.w1.nds.l0.p1 69 /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(003 201) 001(69) 120 175 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMADDPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+52779, 466, 3884}, + /* 6 : VFMADDPD ymmreg,ymmreg*,ymmreg,ymmrm256 [rvsm: vex.m3.w1.nds.l1.p1 69 /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 205) 001(69) 130 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMADDPD, 4, {YMMREG|RN_L16,YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+52787, 466, 3885}, + /* 7 : VFMADDPD ymmreg,ymmreg,ymmrm256 [r+vsm: vex.m3.w1.nds.l1.p1 69 /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(003 205) 001(69) 120 175 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMADDPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+52795, 466, 3885}, +}; + +static const struct itemplate instrux_VFMADDPS[8] = { + /* 0 : VFMADDPS xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: vex.m3.w0.nds.l0.p1 68 /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 001) 001(68) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMADDPS, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+52803, 466, 3887}, + /* 1 : VFMADDPS xmmreg,xmmrm128,xmmreg [r+vms: vex.m3.w0.nds.l0.p1 68 /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(003 001) 001(68) 110 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMADDPS, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+52811, 466, 3887}, + /* 2 : VFMADDPS ymmreg,ymmreg*,ymmrm256,ymmreg [rvms: vex.m3.w0.nds.l1.p1 68 /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 005) 001(68) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMADDPS, 4, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,YMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+52819, 466, 3888}, + /* 3 : VFMADDPS ymmreg,ymmrm256,ymmreg [r+vms: vex.m3.w0.nds.l1.p1 68 /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(003 005) 001(68) 110 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMADDPS, 3, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,YMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+52827, 466, 3888}, + /* 4 : VFMADDPS xmmreg,xmmreg*,xmmreg,xmmrm128 [rvsm: vex.m3.w1.nds.l0.p1 68 /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 201) 001(68) 130 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMADDPS, 4, {XMMREG|RN_L16,XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+52835, 466, 3889}, + /* 5 : VFMADDPS xmmreg,xmmreg,xmmrm128 [r+vsm: vex.m3.w1.nds.l0.p1 68 /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(003 201) 001(68) 120 175 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMADDPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+52843, 466, 3889}, + /* 6 : VFMADDPS ymmreg,ymmreg*,ymmreg,ymmrm256 [rvsm: vex.m3.w1.nds.l1.p1 68 /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 205) 001(68) 130 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMADDPS, 4, {YMMREG|RN_L16,YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+52851, 466, 3890}, + /* 7 : VFMADDPS ymmreg,ymmreg,ymmrm256 [r+vsm: vex.m3.w1.nds.l1.p1 68 /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(003 205) 001(68) 120 175 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMADDPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+52859, 466, 3890}, +}; + +static const struct itemplate instrux_VFMADDSD[4] = { + /* 0 : VFMADDSD xmmreg,xmmreg*,xmmrm64,xmmreg [rvms: vex.m3.w0.nds.l0.p1 6b /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 001) 001(6b) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMADDSD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+52867, 466, 3892}, + /* 1 : VFMADDSD xmmreg,xmmrm64,xmmreg [r+vms: vex.m3.w0.nds.l0.p1 6b /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(003 001) 001(6b) 110 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMADDSD, 3, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+52875, 466, 3892}, + /* 2 : VFMADDSD xmmreg,xmmreg*,xmmreg,xmmrm64 [rvsm: vex.m3.w1.nds.l0.p1 6b /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 201) 001(6b) 130 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMADDSD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+52883, 466, 3893}, + /* 3 : VFMADDSD xmmreg,xmmreg,xmmrm64 [r+vsm: vex.m3.w1.nds.l0.p1 6b /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(003 201) 001(6b) 120 175 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMADDSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+52891, 466, 3893}, +}; + +static const struct itemplate instrux_VFMADDSS[4] = { + /* 0 : VFMADDSS xmmreg,xmmreg*,xmmrm32,xmmreg [rvms: vex.m3.w0.nds.l0.p1 6a /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 001) 001(6a) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMADDSS, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+52899, 466, 3895}, + /* 1 : VFMADDSS xmmreg,xmmrm32,xmmreg [r+vms: vex.m3.w0.nds.l0.p1 6a /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(003 001) 001(6a) 110 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMADDSS, 3, {XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+52907, 466, 3895}, + /* 2 : VFMADDSS xmmreg,xmmreg*,xmmreg,xmmrm32 [rvsm: vex.m3.w1.nds.l0.p1 6a /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 201) 001(6a) 130 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMADDSS, 4, {XMMREG|RN_L16,XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+52915, 466, 3896}, + /* 3 : VFMADDSS xmmreg,xmmreg,xmmrm32 [r+vsm: vex.m3.w1.nds.l0.p1 6a /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(003 201) 001(6a) 120 175 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMADDSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+52923, 466, 3896}, +}; + +static const struct itemplate instrux_VFMADDSUBPD[8] = { + /* 0 : VFMADDSUBPD xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: vex.m3.w0.nds.l0.p1 5d /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 001) 001(5d) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMADDSUBPD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+52931, 466, 3898}, + /* 1 : VFMADDSUBPD xmmreg,xmmrm128,xmmreg [r+vms: vex.m3.w0.nds.l0.p1 5d /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(003 001) 001(5d) 110 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMADDSUBPD, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+52939, 466, 3898}, + /* 2 : VFMADDSUBPD ymmreg,ymmreg*,ymmrm256,ymmreg [rvms: vex.m3.w0.nds.l1.p1 5d /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 005) 001(5d) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMADDSUBPD, 4, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,YMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+52947, 466, 3899}, + /* 3 : VFMADDSUBPD ymmreg,ymmrm256,ymmreg [r+vms: vex.m3.w0.nds.l1.p1 5d /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(003 005) 001(5d) 110 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMADDSUBPD, 3, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,YMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+52955, 466, 3899}, + /* 4 : VFMADDSUBPD xmmreg,xmmreg*,xmmreg,xmmrm128 [rvsm: vex.m3.w1.nds.l0.p1 5d /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 201) 001(5d) 130 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMADDSUBPD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+52963, 466, 3900}, + /* 5 : VFMADDSUBPD xmmreg,xmmreg,xmmrm128 [r+vsm: vex.m3.w1.nds.l0.p1 5d /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(003 201) 001(5d) 120 175 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMADDSUBPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+52971, 466, 3900}, + /* 6 : VFMADDSUBPD ymmreg,ymmreg*,ymmreg,ymmrm256 [rvsm: vex.m3.w1.nds.l1.p1 5d /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 205) 001(5d) 130 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMADDSUBPD, 4, {YMMREG|RN_L16,YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+52979, 466, 3901}, + /* 7 : VFMADDSUBPD ymmreg,ymmreg,ymmrm256 [r+vsm: vex.m3.w1.nds.l1.p1 5d /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(003 205) 001(5d) 120 175 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMADDSUBPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+52987, 466, 3901}, +}; + +static const struct itemplate instrux_VFMADDSUBPS[8] = { + /* 0 : VFMADDSUBPS xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: vex.m3.w0.nds.l0.p1 5c /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 001) 001(5c) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMADDSUBPS, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+52995, 466, 3903}, + /* 1 : VFMADDSUBPS xmmreg,xmmrm128,xmmreg [r+vms: vex.m3.w0.nds.l0.p1 5c /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(003 001) 001(5c) 110 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMADDSUBPS, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+53003, 466, 3903}, + /* 2 : VFMADDSUBPS ymmreg,ymmreg*,ymmrm256,ymmreg [rvms: vex.m3.w0.nds.l1.p1 5c /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 005) 001(5c) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMADDSUBPS, 4, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,YMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53011, 466, 3904}, + /* 3 : VFMADDSUBPS ymmreg,ymmrm256,ymmreg [r+vms: vex.m3.w0.nds.l1.p1 5c /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(003 005) 001(5c) 110 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMADDSUBPS, 3, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,YMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+53019, 466, 3904}, + /* 4 : VFMADDSUBPS xmmreg,xmmreg*,xmmreg,xmmrm128 [rvsm: vex.m3.w1.nds.l0.p1 5c /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 201) 001(5c) 130 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMADDSUBPS, 4, {XMMREG|RN_L16,XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53027, 466, 3905}, + /* 5 : VFMADDSUBPS xmmreg,xmmreg,xmmrm128 [r+vsm: vex.m3.w1.nds.l0.p1 5c /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(003 201) 001(5c) 120 175 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMADDSUBPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+53035, 466, 3905}, + /* 6 : VFMADDSUBPS ymmreg,ymmreg*,ymmreg,ymmrm256 [rvsm: vex.m3.w1.nds.l1.p1 5c /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 205) 001(5c) 130 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMADDSUBPS, 4, {YMMREG|RN_L16,YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53043, 466, 3906}, + /* 7 : VFMADDSUBPS ymmreg,ymmreg,ymmrm256 [r+vsm: vex.m3.w1.nds.l1.p1 5c /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(003 205) 001(5c) 120 175 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMADDSUBPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+53051, 466, 3906}, +}; + +static const struct itemplate instrux_VFMSUBADDPD[8] = { + /* 0 : VFMSUBADDPD xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: vex.m3.w0.nds.l0.p1 5f /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 001) 001(5f) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMSUBADDPD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53059, 466, 3908}, + /* 1 : VFMSUBADDPD xmmreg,xmmrm128,xmmreg [r+vms: vex.m3.w0.nds.l0.p1 5f /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(003 001) 001(5f) 110 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMSUBADDPD, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+53067, 466, 3908}, + /* 2 : VFMSUBADDPD ymmreg,ymmreg*,ymmrm256,ymmreg [rvms: vex.m3.w0.nds.l1.p1 5f /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 005) 001(5f) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMSUBADDPD, 4, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,YMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53075, 466, 3909}, + /* 3 : VFMSUBADDPD ymmreg,ymmrm256,ymmreg [r+vms: vex.m3.w0.nds.l1.p1 5f /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(003 005) 001(5f) 110 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMSUBADDPD, 3, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,YMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+53083, 466, 3909}, + /* 4 : VFMSUBADDPD xmmreg,xmmreg*,xmmreg,xmmrm128 [rvsm: vex.m3.w1.nds.l0.p1 5f /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 201) 001(5f) 130 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMSUBADDPD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53091, 466, 3910}, + /* 5 : VFMSUBADDPD xmmreg,xmmreg,xmmrm128 [r+vsm: vex.m3.w1.nds.l0.p1 5f /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(003 201) 001(5f) 120 175 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMSUBADDPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+53099, 466, 3910}, + /* 6 : VFMSUBADDPD ymmreg,ymmreg*,ymmreg,ymmrm256 [rvsm: vex.m3.w1.nds.l1.p1 5f /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 205) 001(5f) 130 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMSUBADDPD, 4, {YMMREG|RN_L16,YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53107, 466, 3911}, + /* 7 : VFMSUBADDPD ymmreg,ymmreg,ymmrm256 [r+vsm: vex.m3.w1.nds.l1.p1 5f /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(003 205) 001(5f) 120 175 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMSUBADDPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+53115, 466, 3911}, +}; + +static const struct itemplate instrux_VFMSUBADDPS[8] = { + /* 0 : VFMSUBADDPS xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: vex.m3.w0.nds.l0.p1 5e /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 001) 001(5e) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMSUBADDPS, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53123, 466, 3913}, + /* 1 : VFMSUBADDPS xmmreg,xmmrm128,xmmreg [r+vms: vex.m3.w0.nds.l0.p1 5e /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(003 001) 001(5e) 110 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMSUBADDPS, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+53131, 466, 3913}, + /* 2 : VFMSUBADDPS ymmreg,ymmreg*,ymmrm256,ymmreg [rvms: vex.m3.w0.nds.l1.p1 5e /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 005) 001(5e) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMSUBADDPS, 4, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,YMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53139, 466, 3914}, + /* 3 : VFMSUBADDPS ymmreg,ymmrm256,ymmreg [r+vms: vex.m3.w0.nds.l1.p1 5e /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(003 005) 001(5e) 110 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMSUBADDPS, 3, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,YMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+53147, 466, 3914}, + /* 4 : VFMSUBADDPS xmmreg,xmmreg*,xmmreg,xmmrm128 [rvsm: vex.m3.w1.nds.l0.p1 5e /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 201) 001(5e) 130 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMSUBADDPS, 4, {XMMREG|RN_L16,XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53155, 466, 3915}, + /* 5 : VFMSUBADDPS xmmreg,xmmreg,xmmrm128 [r+vsm: vex.m3.w1.nds.l0.p1 5e /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(003 201) 001(5e) 120 175 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMSUBADDPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+53163, 466, 3915}, + /* 6 : VFMSUBADDPS ymmreg,ymmreg*,ymmreg,ymmrm256 [rvsm: vex.m3.w1.nds.l1.p1 5e /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 205) 001(5e) 130 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMSUBADDPS, 4, {YMMREG|RN_L16,YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53171, 466, 3916}, + /* 7 : VFMSUBADDPS ymmreg,ymmreg,ymmrm256 [r+vsm: vex.m3.w1.nds.l1.p1 5e /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(003 205) 001(5e) 120 175 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMSUBADDPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+53179, 466, 3916}, +}; + +static const struct itemplate instrux_VFMSUBPD[8] = { + /* 0 : VFMSUBPD xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: vex.m3.w0.nds.l0.p1 6d /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 001) 001(6d) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMSUBPD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53187, 466, 3918}, + /* 1 : VFMSUBPD xmmreg,xmmrm128,xmmreg [r+vms: vex.m3.w0.nds.l0.p1 6d /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(003 001) 001(6d) 110 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMSUBPD, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+53195, 466, 3918}, + /* 2 : VFMSUBPD ymmreg,ymmreg*,ymmrm256,ymmreg [rvms: vex.m3.w0.nds.l1.p1 6d /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 005) 001(6d) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMSUBPD, 4, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,YMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53203, 466, 3919}, + /* 3 : VFMSUBPD ymmreg,ymmrm256,ymmreg [r+vms: vex.m3.w0.nds.l1.p1 6d /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(003 005) 001(6d) 110 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMSUBPD, 3, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,YMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+53211, 466, 3919}, + /* 4 : VFMSUBPD xmmreg,xmmreg*,xmmreg,xmmrm128 [rvsm: vex.m3.w1.nds.l0.p1 6d /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 201) 001(6d) 130 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMSUBPD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53219, 466, 3920}, + /* 5 : VFMSUBPD xmmreg,xmmreg,xmmrm128 [r+vsm: vex.m3.w1.nds.l0.p1 6d /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(003 201) 001(6d) 120 175 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMSUBPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+53227, 466, 3920}, + /* 6 : VFMSUBPD ymmreg,ymmreg*,ymmreg,ymmrm256 [rvsm: vex.m3.w1.nds.l1.p1 6d /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 205) 001(6d) 130 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMSUBPD, 4, {YMMREG|RN_L16,YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53235, 466, 3921}, + /* 7 : VFMSUBPD ymmreg,ymmreg,ymmrm256 [r+vsm: vex.m3.w1.nds.l1.p1 6d /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(003 205) 001(6d) 120 175 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMSUBPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+53243, 466, 3921}, +}; + +static const struct itemplate instrux_VFMSUBPS[8] = { + /* 0 : VFMSUBPS xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: vex.m3.w0.nds.l0.p1 6c /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 001) 001(6c) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMSUBPS, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53251, 466, 3923}, + /* 1 : VFMSUBPS xmmreg,xmmrm128,xmmreg [r+vms: vex.m3.w0.nds.l0.p1 6c /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(003 001) 001(6c) 110 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMSUBPS, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+53259, 466, 3923}, + /* 2 : VFMSUBPS ymmreg,ymmreg*,ymmrm256,ymmreg [rvms: vex.m3.w0.nds.l1.p1 6c /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 005) 001(6c) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMSUBPS, 4, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,YMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53267, 466, 3924}, + /* 3 : VFMSUBPS ymmreg,ymmrm256,ymmreg [r+vms: vex.m3.w0.nds.l1.p1 6c /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(003 005) 001(6c) 110 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMSUBPS, 3, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,YMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+53275, 466, 3924}, + /* 4 : VFMSUBPS xmmreg,xmmreg*,xmmreg,xmmrm128 [rvsm: vex.m3.w1.nds.l0.p1 6c /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 201) 001(6c) 130 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMSUBPS, 4, {XMMREG|RN_L16,XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53283, 466, 3925}, + /* 5 : VFMSUBPS xmmreg,xmmreg,xmmrm128 [r+vsm: vex.m3.w1.nds.l0.p1 6c /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(003 201) 001(6c) 120 175 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMSUBPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+53291, 466, 3925}, + /* 6 : VFMSUBPS ymmreg,ymmreg*,ymmreg,ymmrm256 [rvsm: vex.m3.w1.nds.l1.p1 6c /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 205) 001(6c) 130 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMSUBPS, 4, {YMMREG|RN_L16,YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53299, 466, 3926}, + /* 7 : VFMSUBPS ymmreg,ymmreg,ymmrm256 [r+vsm: vex.m3.w1.nds.l1.p1 6c /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(003 205) 001(6c) 120 175 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMSUBPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+53307, 466, 3926}, +}; + +static const struct itemplate instrux_VFMSUBSD[4] = { + /* 0 : VFMSUBSD xmmreg,xmmreg*,xmmrm64,xmmreg [rvms: vex.m3.w0.nds.l0.p1 6f /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 001) 001(6f) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMSUBSD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53315, 466, 3928}, + /* 1 : VFMSUBSD xmmreg,xmmrm64,xmmreg [r+vms: vex.m3.w0.nds.l0.p1 6f /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(003 001) 001(6f) 110 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMSUBSD, 3, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+53323, 466, 3928}, + /* 2 : VFMSUBSD xmmreg,xmmreg*,xmmreg,xmmrm64 [rvsm: vex.m3.w1.nds.l0.p1 6f /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 201) 001(6f) 130 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMSUBSD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53331, 466, 3929}, + /* 3 : VFMSUBSD xmmreg,xmmreg,xmmrm64 [r+vsm: vex.m3.w1.nds.l0.p1 6f /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(003 201) 001(6f) 120 175 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMSUBSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+53339, 466, 3929}, +}; + +static const struct itemplate instrux_VFMSUBSS[4] = { + /* 0 : VFMSUBSS xmmreg,xmmreg*,xmmrm32,xmmreg [rvms: vex.m3.w0.nds.l0.p1 6e /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 001) 001(6e) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMSUBSS, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53347, 466, 3931}, + /* 1 : VFMSUBSS xmmreg,xmmrm32,xmmreg [r+vms: vex.m3.w0.nds.l0.p1 6e /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(003 001) 001(6e) 110 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMSUBSS, 3, {XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+53355, 466, 3931}, + /* 2 : VFMSUBSS xmmreg,xmmreg*,xmmreg,xmmrm32 [rvsm: vex.m3.w1.nds.l0.p1 6e /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 201) 001(6e) 130 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMSUBSS, 4, {XMMREG|RN_L16,XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53363, 466, 3932}, + /* 3 : VFMSUBSS xmmreg,xmmreg,xmmrm32 [r+vsm: vex.m3.w1.nds.l0.p1 6e /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(003 201) 001(6e) 120 175 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMSUBSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+53371, 466, 3932}, +}; + +static const struct itemplate instrux_VFNMADDPD[8] = { + /* 0 : VFNMADDPD xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: vex.m3.w0.nds.l0.p1 79 /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 001) 001(79) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFNMADDPD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53379, 466, 3934}, + /* 1 : VFNMADDPD xmmreg,xmmrm128,xmmreg [r+vms: vex.m3.w0.nds.l0.p1 79 /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(003 001) 001(79) 110 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFNMADDPD, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+53387, 466, 3934}, + /* 2 : VFNMADDPD ymmreg,ymmreg*,ymmrm256,ymmreg [rvms: vex.m3.w0.nds.l1.p1 79 /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 005) 001(79) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFNMADDPD, 4, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,YMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53395, 466, 3935}, + /* 3 : VFNMADDPD ymmreg,ymmrm256,ymmreg [r+vms: vex.m3.w0.nds.l1.p1 79 /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(003 005) 001(79) 110 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFNMADDPD, 3, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,YMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+53403, 466, 3935}, + /* 4 : VFNMADDPD xmmreg,xmmreg*,xmmreg,xmmrm128 [rvsm: vex.m3.w1.nds.l0.p1 79 /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 201) 001(79) 130 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFNMADDPD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53411, 466, 3936}, + /* 5 : VFNMADDPD xmmreg,xmmreg,xmmrm128 [r+vsm: vex.m3.w1.nds.l0.p1 79 /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(003 201) 001(79) 120 175 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFNMADDPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+53419, 466, 3936}, + /* 6 : VFNMADDPD ymmreg,ymmreg*,ymmreg,ymmrm256 [rvsm: vex.m3.w1.nds.l1.p1 79 /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 205) 001(79) 130 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFNMADDPD, 4, {YMMREG|RN_L16,YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53427, 466, 3937}, + /* 7 : VFNMADDPD ymmreg,ymmreg,ymmrm256 [r+vsm: vex.m3.w1.nds.l1.p1 79 /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(003 205) 001(79) 120 175 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFNMADDPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+53435, 466, 3937}, +}; + +static const struct itemplate instrux_VFNMADDPS[8] = { + /* 0 : VFNMADDPS xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: vex.m3.w0.nds.l0.p1 78 /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 001) 001(78) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFNMADDPS, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53443, 466, 3939}, + /* 1 : VFNMADDPS xmmreg,xmmrm128,xmmreg [r+vms: vex.m3.w0.nds.l0.p1 78 /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(003 001) 001(78) 110 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFNMADDPS, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+53451, 466, 3939}, + /* 2 : VFNMADDPS ymmreg,ymmreg*,ymmrm256,ymmreg [rvms: vex.m3.w0.nds.l1.p1 78 /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 005) 001(78) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFNMADDPS, 4, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,YMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53459, 466, 3940}, + /* 3 : VFNMADDPS ymmreg,ymmrm256,ymmreg [r+vms: vex.m3.w0.nds.l1.p1 78 /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(003 005) 001(78) 110 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFNMADDPS, 3, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,YMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+53467, 466, 3940}, + /* 4 : VFNMADDPS xmmreg,xmmreg*,xmmreg,xmmrm128 [rvsm: vex.m3.w1.nds.l0.p1 78 /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 201) 001(78) 130 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFNMADDPS, 4, {XMMREG|RN_L16,XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53475, 466, 3941}, + /* 5 : VFNMADDPS xmmreg,xmmreg,xmmrm128 [r+vsm: vex.m3.w1.nds.l0.p1 78 /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(003 201) 001(78) 120 175 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFNMADDPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+53483, 466, 3941}, + /* 6 : VFNMADDPS ymmreg,ymmreg*,ymmreg,ymmrm256 [rvsm: vex.m3.w1.nds.l1.p1 78 /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 205) 001(78) 130 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFNMADDPS, 4, {YMMREG|RN_L16,YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53491, 466, 3942}, + /* 7 : VFNMADDPS ymmreg,ymmreg,ymmrm256 [r+vsm: vex.m3.w1.nds.l1.p1 78 /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(003 205) 001(78) 120 175 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFNMADDPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+53499, 466, 3942}, +}; + +static const struct itemplate instrux_VFNMADDSD[4] = { + /* 0 : VFNMADDSD xmmreg,xmmreg*,xmmrm64,xmmreg [rvms: vex.m3.w0.nds.l0.p1 7b /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 001) 001(7b) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFNMADDSD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53507, 466, 3944}, + /* 1 : VFNMADDSD xmmreg,xmmrm64,xmmreg [r+vms: vex.m3.w0.nds.l0.p1 7b /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(003 001) 001(7b) 110 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFNMADDSD, 3, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+53515, 466, 3944}, + /* 2 : VFNMADDSD xmmreg,xmmreg*,xmmreg,xmmrm64 [rvsm: vex.m3.w1.nds.l0.p1 7b /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 201) 001(7b) 130 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFNMADDSD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53523, 466, 3945}, + /* 3 : VFNMADDSD xmmreg,xmmreg,xmmrm64 [r+vsm: vex.m3.w1.nds.l0.p1 7b /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(003 201) 001(7b) 120 175 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFNMADDSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+53531, 466, 3945}, +}; + +static const struct itemplate instrux_VFNMADDSS[4] = { + /* 0 : VFNMADDSS xmmreg,xmmreg*,xmmrm32,xmmreg [rvms: vex.m3.w0.nds.l0.p1 7a /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 001) 001(7a) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFNMADDSS, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53539, 466, 3947}, + /* 1 : VFNMADDSS xmmreg,xmmrm32,xmmreg [r+vms: vex.m3.w0.nds.l0.p1 7a /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(003 001) 001(7a) 110 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFNMADDSS, 3, {XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+53547, 466, 3947}, + /* 2 : VFNMADDSS xmmreg,xmmreg*,xmmreg,xmmrm32 [rvsm: vex.m3.w1.nds.l0.p1 7a /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 201) 001(7a) 130 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFNMADDSS, 4, {XMMREG|RN_L16,XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53555, 466, 3948}, + /* 3 : VFNMADDSS xmmreg,xmmreg,xmmrm32 [r+vsm: vex.m3.w1.nds.l0.p1 7a /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(003 201) 001(7a) 120 175 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFNMADDSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+53563, 466, 3948}, +}; + +static const struct itemplate instrux_VFNMSUBPD[8] = { + /* 0 : VFNMSUBPD xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: vex.m3.w0.nds.l0.p1 7d /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 001) 001(7d) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFNMSUBPD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53571, 466, 3950}, + /* 1 : VFNMSUBPD xmmreg,xmmrm128,xmmreg [r+vms: vex.m3.w0.nds.l0.p1 7d /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(003 001) 001(7d) 110 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFNMSUBPD, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+53579, 466, 3950}, + /* 2 : VFNMSUBPD ymmreg,ymmreg*,ymmrm256,ymmreg [rvms: vex.m3.w0.nds.l1.p1 7d /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 005) 001(7d) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFNMSUBPD, 4, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,YMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53587, 466, 3951}, + /* 3 : VFNMSUBPD ymmreg,ymmrm256,ymmreg [r+vms: vex.m3.w0.nds.l1.p1 7d /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(003 005) 001(7d) 110 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFNMSUBPD, 3, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,YMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+53595, 466, 3951}, + /* 4 : VFNMSUBPD xmmreg,xmmreg*,xmmreg,xmmrm128 [rvsm: vex.m3.w1.nds.l0.p1 7d /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 201) 001(7d) 130 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFNMSUBPD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53603, 466, 3952}, + /* 5 : VFNMSUBPD xmmreg,xmmreg,xmmrm128 [r+vsm: vex.m3.w1.nds.l0.p1 7d /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(003 201) 001(7d) 120 175 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFNMSUBPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+53611, 466, 3952}, + /* 6 : VFNMSUBPD ymmreg,ymmreg*,ymmreg,ymmrm256 [rvsm: vex.m3.w1.nds.l1.p1 7d /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 205) 001(7d) 130 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFNMSUBPD, 4, {YMMREG|RN_L16,YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53619, 466, 3953}, + /* 7 : VFNMSUBPD ymmreg,ymmreg,ymmrm256 [r+vsm: vex.m3.w1.nds.l1.p1 7d /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(003 205) 001(7d) 120 175 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFNMSUBPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+53627, 466, 3953}, +}; + +static const struct itemplate instrux_VFNMSUBPS[8] = { + /* 0 : VFNMSUBPS xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: vex.m3.w0.nds.l0.p1 7c /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 001) 001(7c) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFNMSUBPS, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53635, 466, 3955}, + /* 1 : VFNMSUBPS xmmreg,xmmrm128,xmmreg [r+vms: vex.m3.w0.nds.l0.p1 7c /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(003 001) 001(7c) 110 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFNMSUBPS, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+53643, 466, 3955}, + /* 2 : VFNMSUBPS ymmreg,ymmreg*,ymmrm256,ymmreg [rvms: vex.m3.w0.nds.l1.p1 7c /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 005) 001(7c) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFNMSUBPS, 4, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,YMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53651, 466, 3956}, + /* 3 : VFNMSUBPS ymmreg,ymmrm256,ymmreg [r+vms: vex.m3.w0.nds.l1.p1 7c /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(003 005) 001(7c) 110 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFNMSUBPS, 3, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,YMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+53659, 466, 3956}, + /* 4 : VFNMSUBPS xmmreg,xmmreg*,xmmreg,xmmrm128 [rvsm: vex.m3.w1.nds.l0.p1 7c /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 201) 001(7c) 130 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFNMSUBPS, 4, {XMMREG|RN_L16,XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53667, 466, 3957}, + /* 5 : VFNMSUBPS xmmreg,xmmreg,xmmrm128 [r+vsm: vex.m3.w1.nds.l0.p1 7c /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(003 201) 001(7c) 120 175 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFNMSUBPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+53675, 466, 3957}, + /* 6 : VFNMSUBPS ymmreg,ymmreg*,ymmreg,ymmrm256 [rvsm: vex.m3.w1.nds.l1.p1 7c /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 205) 001(7c) 130 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFNMSUBPS, 4, {YMMREG|RN_L16,YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53683, 466, 3958}, + /* 7 : VFNMSUBPS ymmreg,ymmreg,ymmrm256 [r+vsm: vex.m3.w1.nds.l1.p1 7c /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(003 205) 001(7c) 120 175 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFNMSUBPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+53691, 466, 3958}, +}; + +static const struct itemplate instrux_VFNMSUBSD[4] = { + /* 0 : VFNMSUBSD xmmreg,xmmreg*,xmmrm64,xmmreg [rvms: vex.m3.w0.nds.l0.p1 7f /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 001) 001(7f) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFNMSUBSD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53699, 466, 3960}, + /* 1 : VFNMSUBSD xmmreg,xmmrm64,xmmreg [r+vms: vex.m3.w0.nds.l0.p1 7f /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(003 001) 001(7f) 110 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFNMSUBSD, 3, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+53707, 466, 3960}, + /* 2 : VFNMSUBSD xmmreg,xmmreg*,xmmreg,xmmrm64 [rvsm: vex.m3.w1.nds.l0.p1 7f /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 201) 001(7f) 130 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFNMSUBSD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53715, 466, 3961}, + /* 3 : VFNMSUBSD xmmreg,xmmreg,xmmrm64 [r+vsm: vex.m3.w1.nds.l0.p1 7f /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(003 201) 001(7f) 120 175 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFNMSUBSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+53723, 466, 3961}, +}; + +static const struct itemplate instrux_VFNMSUBSS[4] = { + /* 0 : VFNMSUBSS xmmreg,xmmreg*,xmmrm32,xmmreg [rvms: vex.m3.w0.nds.l0.p1 7e /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 001) 001(7e) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFNMSUBSS, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53731, 466, 3963}, + /* 1 : VFNMSUBSS xmmreg,xmmrm32,xmmreg [r+vms: vex.m3.w0.nds.l0.p1 7e /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(003 001) 001(7e) 110 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFNMSUBSS, 3, {XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+53739, 466, 3963}, + /* 2 : VFNMSUBSS xmmreg,xmmreg*,xmmreg,xmmrm32 [rvsm: vex.m3.w1.nds.l0.p1 7e /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 201) 001(7e) 130 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFNMSUBSS, 4, {XMMREG|RN_L16,XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53747, 466, 3964}, + /* 3 : VFNMSUBSS xmmreg,xmmreg,xmmrm32 [r+vsm: vex.m3.w1.nds.l0.p1 7e /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(003 201) 001(7e) 120 175 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFNMSUBSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+53755, 466, 3964}, +}; + +static const struct itemplate instrux_VFRCZPD[4] = { + /* 0 : VFRCZPD xmmreg,xmmrm128* [rm: xop.m9.w0.l0.p0 81 /r ] SSE5,FUTURE,AMD */ + /* 270(111 000) 001(81) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFRCZPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+62614, 466, 3966}, + /* 1 : VFRCZPD xmmreg [r+m: xop.m9.w0.l0.p0 81 /r ] ND,SSE5,FUTURE,AMD */ + /* 270(111 000) 001(81) 100 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFRCZPD, 1, {XMMREG|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+62621, 466, 3966}, + /* 2 : VFRCZPD ymmreg,ymmrm256* [rm: xop.m9.w0.l1.p0 81 /r ] SSE5,FUTURE,AMD */ + /* 270(111 004) 001(81) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFRCZPD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+62628, 466, 3967}, + /* 3 : VFRCZPD ymmreg [r+m: xop.m9.w0.l1.p0 81 /r ] ND,SSE5,FUTURE,AMD */ + /* 270(111 004) 001(81) 100 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFRCZPD, 1, {YMMREG|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+62635, 466, 3967}, +}; + +static const struct itemplate instrux_VFRCZPS[4] = { + /* 0 : VFRCZPS xmmreg,xmmrm128* [rm: xop.m9.w0.l0.p0 80 /r ] SSE5,FUTURE,AMD */ + /* 270(111 000) 001(80) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFRCZPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+62642, 466, 3969}, + /* 1 : VFRCZPS xmmreg [r+m: xop.m9.w0.l0.p0 80 /r ] ND,SSE5,FUTURE,AMD */ + /* 270(111 000) 001(80) 100 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFRCZPS, 1, {XMMREG|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+62649, 466, 3969}, + /* 2 : VFRCZPS ymmreg,ymmrm256* [rm: xop.m9.w0.l1.p0 80 /r ] SSE5,FUTURE,AMD */ + /* 270(111 004) 001(80) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFRCZPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+62656, 466, 3970}, + /* 3 : VFRCZPS ymmreg [r+m: xop.m9.w0.l1.p0 80 /r ] ND,SSE5,FUTURE,AMD */ + /* 270(111 004) 001(80) 100 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFRCZPS, 1, {YMMREG|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+62663, 466, 3970}, +}; + +static const struct itemplate instrux_VFRCZSD[2] = { + /* 0 : VFRCZSD xmmreg,xmmrm64* [rm: xop.m9.w0.l0.p0 83 /r ] SSE5,FUTURE,AMD */ + /* 270(111 000) 001(83) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFRCZSD, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+62670, 466, 3972}, + /* 1 : VFRCZSD xmmreg [r+m: xop.m9.w0.l0.p0 83 /r ] ND,SSE5,FUTURE,AMD */ + /* 270(111 000) 001(83) 100 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFRCZSD, 1, {XMMREG|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+62677, 466, 3972}, +}; + +static const struct itemplate instrux_VFRCZSS[2] = { + /* 0 : VFRCZSS xmmreg,xmmrm32* [rm: xop.m9.w0.l0.p0 82 /r ] SSE5,FUTURE,AMD */ + /* 270(111 000) 001(82) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFRCZSS, 2, {XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+62684, 466, 3974}, + /* 1 : VFRCZSS xmmreg [r+m: xop.m9.w0.l0.p0 82 /r ] ND,SSE5,FUTURE,AMD */ + /* 270(111 000) 001(82) 100 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFRCZSS, 1, {XMMREG|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+62691, 466, 3974}, +}; + +static const struct itemplate instrux_VPCMOV[8] = { + /* 0 : VPCMOV xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: xop.m8.w0.nds.l0.p0 a2 /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(110 000) 001(a2) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPCMOV, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53763, 466, 3977}, + /* 1 : VPCMOV xmmreg,xmmrm128,xmmreg [r+vms: xop.m8.w0.nds.l0.p0 a2 /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(110 000) 001(a2) 110 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPCMOV, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+53771, 466, 3977}, + /* 2 : VPCMOV ymmreg,ymmreg*,ymmrm256,ymmreg [rvms: xop.m8.w0.nds.l1.p0 a2 /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(110 004) 001(a2) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPCMOV, 4, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,YMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53779, 466, 3978}, + /* 3 : VPCMOV ymmreg,ymmrm256,ymmreg [r+vms: xop.m8.w0.nds.l1.p0 a2 /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(110 004) 001(a2) 110 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPCMOV, 3, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,YMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+53787, 466, 3978}, + /* 4 : VPCMOV xmmreg,xmmreg*,xmmreg,xmmrm128 [rvsm: xop.m8.w1.nds.l0.p0 a2 /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(110 200) 001(a2) 130 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPCMOV, 4, {XMMREG|RN_L16,XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53795, 466, 3979}, + /* 5 : VPCMOV xmmreg,xmmreg,xmmrm128 [r+vsm: xop.m8.w1.nds.l0.p0 a2 /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(110 200) 001(a2) 120 175 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPCMOV, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+53803, 466, 3979}, + /* 6 : VPCMOV ymmreg,ymmreg*,ymmreg,ymmrm256 [rvsm: xop.m8.w1.nds.l1.p0 a2 /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(110 204) 001(a2) 130 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPCMOV, 4, {YMMREG|RN_L16,YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53811, 466, 3980}, + /* 7 : VPCMOV ymmreg,ymmreg,ymmrm256 [r+vsm: xop.m8.w1.nds.l1.p0 a2 /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(110 204) 001(a2) 120 175 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPCMOV, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+53819, 466, 3980}, +}; + +static const struct itemplate instrux_VPCOMB[2] = { + /* 0 : VPCOMB xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: xop.m8.w0.nds.l0.p0 cc /r ib ] SSE5,FUTURE,AMD */ + /* 261(110 000) 001(cc) 120 023 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPCOMB, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+53827, 466, 3982}, + /* 1 : VPCOMB xmmreg,xmmrm128,imm8 [r+vmi: xop.m8.w0.nds.l0.p0 cc /r ib ] ND,SSE5,FUTURE,AMD */ + /* 260(110 000) 001(cc) 110 022 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPCOMB, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+53835, 466, 3982}, +}; + +static const struct itemplate instrux_VPCOMD[2] = { + /* 0 : VPCOMD xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: xop.m8.w0.nds.l0.p0 ce /r ib ] SSE5,FUTURE,AMD */ + /* 261(110 000) 001(ce) 120 023 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPCOMD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+53843, 466, 3983}, + /* 1 : VPCOMD xmmreg,xmmrm128,imm8 [r+vmi: xop.m8.w0.nds.l0.p0 ce /r ib ] ND,SSE5,FUTURE,AMD */ + /* 260(110 000) 001(ce) 110 022 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPCOMD, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+53851, 466, 3983}, +}; + +static const struct itemplate instrux_VPCOMQ[2] = { + /* 0 : VPCOMQ xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: xop.m8.w0.nds.l0.p0 cf /r ib ] SSE5,FUTURE,AMD */ + /* 261(110 000) 001(cf) 120 023 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPCOMQ, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+53859, 466, 3984}, + /* 1 : VPCOMQ xmmreg,xmmrm128,imm8 [r+vmi: xop.m8.w0.nds.l0.p0 cf /r ib ] ND,SSE5,FUTURE,AMD */ + /* 260(110 000) 001(cf) 110 022 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPCOMQ, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+53867, 466, 3984}, +}; + +static const struct itemplate instrux_VPCOMUB[2] = { + /* 0 : VPCOMUB xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: xop.m8.w0.nds.l0.p0 ec /r ib ] SSE5,FUTURE,AMD */ + /* 261(110 000) 001(ec) 120 023 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPCOMUB, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+53875, 466, 3987}, + /* 1 : VPCOMUB xmmreg,xmmrm128,imm8 [r+vmi: xop.m8.w0.nds.l0.p0 ec /r ib ] ND,SSE5,FUTURE,AMD */ + /* 260(110 000) 001(ec) 110 022 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPCOMUB, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+53883, 466, 3987}, +}; + +static const struct itemplate instrux_VPCOMUD[2] = { + /* 0 : VPCOMUD xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: xop.m8.w0.nds.l0.p0 ee /r ib ] SSE5,FUTURE,AMD */ + /* 261(110 000) 001(ee) 120 023 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPCOMUD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+53891, 466, 3988}, + /* 1 : VPCOMUD xmmreg,xmmrm128,imm8 [r+vmi: xop.m8.w0.nds.l0.p0 ee /r ib ] ND,SSE5,FUTURE,AMD */ + /* 260(110 000) 001(ee) 110 022 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPCOMUD, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+53899, 466, 3988}, +}; + +static const struct itemplate instrux_VPCOMUQ[2] = { + /* 0 : VPCOMUQ xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: xop.m8.w0.nds.l0.p0 ef /r ib ] SSE5,FUTURE,AMD */ + /* 261(110 000) 001(ef) 120 023 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPCOMUQ, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+53907, 466, 3989}, + /* 1 : VPCOMUQ xmmreg,xmmrm128,imm8 [r+vmi: xop.m8.w0.nds.l0.p0 ef /r ib ] ND,SSE5,FUTURE,AMD */ + /* 260(110 000) 001(ef) 110 022 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPCOMUQ, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+53915, 466, 3989}, +}; + +static const struct itemplate instrux_VPCOMUW[2] = { + /* 0 : VPCOMUW xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: xop.m8.w0.nds.l0.p0 ed /r ib ] SSE5,FUTURE,AMD */ + /* 261(110 000) 001(ed) 120 023 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPCOMUW, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+53923, 466, 3992}, + /* 1 : VPCOMUW xmmreg,xmmrm128,imm8 [r+vmi: xop.m8.w0.nds.l0.p0 ed /r ib ] ND,SSE5,FUTURE,AMD */ + /* 260(110 000) 001(ed) 110 022 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPCOMUW, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+53931, 466, 3992}, +}; + +static const struct itemplate instrux_VPCOMW[2] = { + /* 0 : VPCOMW xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: xop.m8.w0.nds.l0.p0 cd /r ib ] SSE5,FUTURE,AMD */ + /* 261(110 000) 001(cd) 120 023 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPCOMW, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+53939, 466, 3993}, + /* 1 : VPCOMW xmmreg,xmmrm128,imm8 [r+vmi: xop.m8.w0.nds.l0.p0 cd /r ib ] ND,SSE5,FUTURE,AMD */ + /* 260(110 000) 001(cd) 110 022 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPCOMW, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+53947, 466, 3993}, +}; + +static const struct itemplate instrux_VPHADDBD[2] = { + /* 0 : VPHADDBD xmmreg,xmmrm128* [rm: xop.m9.w0.l0.p0 c2 /r ] SSE5,FUTURE,AMD */ + /* 270(111 000) 001(c2) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPHADDBD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+62698, 466, 3995}, + /* 1 : VPHADDBD xmmreg [r+m: xop.m9.w0.l0.p0 c2 /r ] ND,SSE5,FUTURE,AMD */ + /* 270(111 000) 001(c2) 100 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPHADDBD, 1, {XMMREG|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+62705, 466, 3995}, +}; + +static const struct itemplate instrux_VPHADDBQ[2] = { + /* 0 : VPHADDBQ xmmreg,xmmrm128* [rm: xop.m9.w0.l0.p0 c3 /r ] SSE5,FUTURE,AMD */ + /* 270(111 000) 001(c3) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPHADDBQ, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+62712, 466, 3996}, + /* 1 : VPHADDBQ xmmreg [r+m: xop.m9.w0.l0.p0 c3 /r ] ND,SSE5,FUTURE,AMD */ + /* 270(111 000) 001(c3) 100 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPHADDBQ, 1, {XMMREG|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+62719, 466, 3996}, +}; + +static const struct itemplate instrux_VPHADDBW[2] = { + /* 0 : VPHADDBW xmmreg,xmmrm128* [rm: xop.m9.w0.l0.p0 c1 /r ] SSE5,FUTURE,AMD */ + /* 270(111 000) 001(c1) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPHADDBW, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+62726, 466, 3997}, + /* 1 : VPHADDBW xmmreg [r+m: xop.m9.w0.l0.p0 c1 /r ] ND,SSE5,FUTURE,AMD */ + /* 270(111 000) 001(c1) 100 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPHADDBW, 1, {XMMREG|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+62733, 466, 3997}, +}; + +static const struct itemplate instrux_VPHADDDQ[2] = { + /* 0 : VPHADDDQ xmmreg,xmmrm128* [rm: xop.m9.w0.l0.p0 cb /r ] SSE5,FUTURE,AMD */ + /* 270(111 000) 001(cb) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPHADDDQ, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+62740, 466, 3998}, + /* 1 : VPHADDDQ xmmreg [r+m: xop.m9.w0.l0.p0 cb /r ] ND,SSE5,FUTURE,AMD */ + /* 270(111 000) 001(cb) 100 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPHADDDQ, 1, {XMMREG|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+62747, 466, 3998}, +}; + +static const struct itemplate instrux_VPHADDUBD[2] = { + /* 0 : VPHADDUBD xmmreg,xmmrm128* [rm: xop.m9.w0.l0.p0 d2 /r ] SSE5,FUTURE,AMD */ + /* 270(111 000) 001(d2) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPHADDUBD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+62754, 466, 4001}, + /* 1 : VPHADDUBD xmmreg [r+m: xop.m9.w0.l0.p0 d2 /r ] ND,SSE5,FUTURE,AMD */ + /* 270(111 000) 001(d2) 100 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPHADDUBD, 1, {XMMREG|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+62761, 466, 4001}, +}; + +static const struct itemplate instrux_VPHADDUBQ[2] = { + /* 0 : VPHADDUBQ xmmreg,xmmrm128* [rm: xop.m9.w0.l0.p0 d3 /r ] SSE5,FUTURE,AMD */ + /* 270(111 000) 001(d3) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPHADDUBQ, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+62768, 466, 4002}, + /* 1 : VPHADDUBQ xmmreg [r+m: xop.m9.w0.l0.p0 d3 /r ] ND,SSE5,FUTURE,AMD */ + /* 270(111 000) 001(d3) 100 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPHADDUBQ, 1, {XMMREG|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+62775, 466, 4002}, +}; + +static const struct itemplate instrux_VPHADDUBW[2] = { + /* 0 : VPHADDUBW xmmreg,xmmrm128* [rm: xop.m9.w0.l0.p0 d1 /r ] SSE5,FUTURE,AMD */ + /* 270(111 000) 001(d1) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPHADDUBW, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+62782, 466, 4005}, + /* 1 : VPHADDUBW xmmreg [r+m: xop.m9.w0.l0.p0 d1 /r ] ND,SSE5,FUTURE,AMD */ + /* 270(111 000) 001(d1) 100 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPHADDUBW, 1, {XMMREG|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+62789, 466, 4005}, +}; + +static const struct itemplate instrux_VPHADDUDQ[2] = { + /* 0 : VPHADDUDQ xmmreg,xmmrm128* [rm: xop.m9.w0.l0.p0 db /r ] SSE5,FUTURE,AMD */ + /* 270(111 000) 001(db) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPHADDUDQ, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+62796, 466, 4008}, + /* 1 : VPHADDUDQ xmmreg [r+m: xop.m9.w0.l0.p0 db /r ] ND,SSE5,FUTURE,AMD */ + /* 270(111 000) 001(db) 100 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPHADDUDQ, 1, {XMMREG|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+62803, 466, 4008}, +}; + +static const struct itemplate instrux_VPHADDUWD[2] = { + /* 0 : VPHADDUWD xmmreg,xmmrm128* [rm: xop.m9.w0.l0.p0 d6 /r ] SSE5,FUTURE,AMD */ + /* 270(111 000) 001(d6) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPHADDUWD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+62810, 466, 4009}, + /* 1 : VPHADDUWD xmmreg [r+m: xop.m9.w0.l0.p0 d6 /r ] ND,SSE5,FUTURE,AMD */ + /* 270(111 000) 001(d6) 100 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPHADDUWD, 1, {XMMREG|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+62817, 466, 4009}, +}; + +static const struct itemplate instrux_VPHADDUWQ[2] = { + /* 0 : VPHADDUWQ xmmreg,xmmrm128* [rm: xop.m9.w0.l0.p0 d7 /r ] SSE5,FUTURE,AMD */ + /* 270(111 000) 001(d7) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPHADDUWQ, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+62824, 466, 4010}, + /* 1 : VPHADDUWQ xmmreg [r+m: xop.m9.w0.l0.p0 d7 /r ] ND,SSE5,FUTURE,AMD */ + /* 270(111 000) 001(d7) 100 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPHADDUWQ, 1, {XMMREG|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+62831, 466, 4010}, +}; + +static const struct itemplate instrux_VPHADDWD[2] = { + /* 0 : VPHADDWD xmmreg,xmmrm128* [rm: xop.m9.w0.l0.p0 c6 /r ] SSE5,FUTURE,AMD */ + /* 270(111 000) 001(c6) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPHADDWD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+62838, 466, 4013}, + /* 1 : VPHADDWD xmmreg [r+m: xop.m9.w0.l0.p0 c6 /r ] ND,SSE5,FUTURE,AMD */ + /* 270(111 000) 001(c6) 100 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPHADDWD, 1, {XMMREG|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+62845, 466, 4013}, +}; + +static const struct itemplate instrux_VPHADDWQ[2] = { + /* 0 : VPHADDWQ xmmreg,xmmrm128* [rm: xop.m9.w0.l0.p0 c7 /r ] SSE5,FUTURE,AMD */ + /* 270(111 000) 001(c7) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPHADDWQ, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+62852, 466, 4016}, + /* 1 : VPHADDWQ xmmreg [r+m: xop.m9.w0.l0.p0 c7 /r ] ND,SSE5,FUTURE,AMD */ + /* 270(111 000) 001(c7) 100 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPHADDWQ, 1, {XMMREG|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+62859, 466, 4016}, +}; + +static const struct itemplate instrux_VPHSUBBW[2] = { + /* 0 : VPHSUBBW xmmreg,xmmrm128* [rm: xop.m9.w0.l0.p0 e1 /r ] SSE5,FUTURE,AMD */ + /* 270(111 000) 001(e1) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPHSUBBW, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+62866, 466, 4018}, + /* 1 : VPHSUBBW xmmreg [r+m: xop.m9.w0.l0.p0 e1 /r ] ND,SSE5,FUTURE,AMD */ + /* 270(111 000) 001(e1) 100 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPHSUBBW, 1, {XMMREG|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+62873, 466, 4018}, +}; + +static const struct itemplate instrux_VPHSUBDQ[2] = { + /* 0 : VPHSUBDQ xmmreg,xmmrm128* [rm: xop.m9.w0.l0.p0 e3 /r ] SSE5,FUTURE,AMD */ + /* 270(111 000) 001(e3) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPHSUBDQ, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+62880, 466, 4019}, + /* 1 : VPHSUBDQ xmmreg [r+m: xop.m9.w0.l0.p0 e3 /r ] ND,SSE5,FUTURE,AMD */ + /* 270(111 000) 001(e3) 100 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPHSUBDQ, 1, {XMMREG|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+62887, 466, 4019}, +}; + +static const struct itemplate instrux_VPHSUBWD[2] = { + /* 0 : VPHSUBWD xmmreg,xmmrm128* [rm: xop.m9.w0.l0.p0 e2 /r ] SSE5,FUTURE,AMD */ + /* 270(111 000) 001(e2) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPHSUBWD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+62894, 466, 4020}, + /* 1 : VPHSUBWD xmmreg [r+m: xop.m9.w0.l0.p0 e2 /r ] ND,SSE5,FUTURE,AMD */ + /* 270(111 000) 001(e2) 100 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPHSUBWD, 1, {XMMREG|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+62901, 466, 4020}, +}; + +static const struct itemplate instrux_VPMACSDD[2] = { + /* 0 : VPMACSDD xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: xop.m8.w0.nds.l0.p0 9e /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(110 000) 001(9e) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPMACSDD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53955, 466, 4022}, + /* 1 : VPMACSDD xmmreg,xmmrm128,xmmreg [r+vms: xop.m8.w0.nds.l0.p0 9e /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(110 000) 001(9e) 110 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPMACSDD, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+53963, 466, 4022}, +}; + +static const struct itemplate instrux_VPMACSDQH[2] = { + /* 0 : VPMACSDQH xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: xop.m8.w0.nds.l0.p0 9f /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(110 000) 001(9f) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPMACSDQH, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53971, 466, 4025}, + /* 1 : VPMACSDQH xmmreg,xmmrm128,xmmreg [r+vms: xop.m8.w0.nds.l0.p0 9f /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(110 000) 001(9f) 110 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPMACSDQH, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+53979, 466, 4025}, +}; + +static const struct itemplate instrux_VPMACSDQL[2] = { + /* 0 : VPMACSDQL xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: xop.m8.w0.nds.l0.p0 97 /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(110 000) 001(97) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPMACSDQL, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53987, 466, 4026}, + /* 1 : VPMACSDQL xmmreg,xmmrm128,xmmreg [r+vms: xop.m8.w0.nds.l0.p0 97 /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(110 000) 001(97) 110 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPMACSDQL, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+53995, 466, 4026}, +}; + +static const struct itemplate instrux_VPMACSSDD[2] = { + /* 0 : VPMACSSDD xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: xop.m8.w0.nds.l0.p0 8e /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(110 000) 001(8e) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPMACSSDD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+54003, 466, 4027}, + /* 1 : VPMACSSDD xmmreg,xmmrm128,xmmreg [r+vms: xop.m8.w0.nds.l0.p0 8e /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(110 000) 001(8e) 110 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPMACSSDD, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+54011, 466, 4027}, +}; + +static const struct itemplate instrux_VPMACSSDQH[2] = { + /* 0 : VPMACSSDQH xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: xop.m8.w0.nds.l0.p0 8f /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(110 000) 001(8f) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPMACSSDQH, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+54019, 466, 4028}, + /* 1 : VPMACSSDQH xmmreg,xmmrm128,xmmreg [r+vms: xop.m8.w0.nds.l0.p0 8f /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(110 000) 001(8f) 110 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPMACSSDQH, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+54027, 466, 4028}, +}; + +static const struct itemplate instrux_VPMACSSDQL[2] = { + /* 0 : VPMACSSDQL xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: xop.m8.w0.nds.l0.p0 87 /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(110 000) 001(87) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPMACSSDQL, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+54035, 466, 4029}, + /* 1 : VPMACSSDQL xmmreg,xmmrm128,xmmreg [r+vms: xop.m8.w0.nds.l0.p0 87 /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(110 000) 001(87) 110 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPMACSSDQL, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+54043, 466, 4029}, +}; + +static const struct itemplate instrux_VPMACSSWD[2] = { + /* 0 : VPMACSSWD xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: xop.m8.w0.nds.l0.p0 86 /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(110 000) 001(86) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPMACSSWD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+54051, 466, 4030}, + /* 1 : VPMACSSWD xmmreg,xmmrm128,xmmreg [r+vms: xop.m8.w0.nds.l0.p0 86 /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(110 000) 001(86) 110 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPMACSSWD, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+54059, 466, 4030}, +}; + +static const struct itemplate instrux_VPMACSSWW[2] = { + /* 0 : VPMACSSWW xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: xop.m8.w0.nds.l0.p0 85 /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(110 000) 001(85) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPMACSSWW, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+54067, 466, 4031}, + /* 1 : VPMACSSWW xmmreg,xmmrm128,xmmreg [r+vms: xop.m8.w0.nds.l0.p0 85 /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(110 000) 001(85) 110 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPMACSSWW, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+54075, 466, 4031}, +}; + +static const struct itemplate instrux_VPMACSWD[2] = { + /* 0 : VPMACSWD xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: xop.m8.w0.nds.l0.p0 96 /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(110 000) 001(96) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPMACSWD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+54083, 466, 4032}, + /* 1 : VPMACSWD xmmreg,xmmrm128,xmmreg [r+vms: xop.m8.w0.nds.l0.p0 96 /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(110 000) 001(96) 110 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPMACSWD, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+54091, 466, 4032}, +}; + +static const struct itemplate instrux_VPMACSWW[2] = { + /* 0 : VPMACSWW xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: xop.m8.w0.nds.l0.p0 95 /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(110 000) 001(95) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPMACSWW, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+54099, 466, 4033}, + /* 1 : VPMACSWW xmmreg,xmmrm128,xmmreg [r+vms: xop.m8.w0.nds.l0.p0 95 /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(110 000) 001(95) 110 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPMACSWW, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+54107, 466, 4033}, +}; + +static const struct itemplate instrux_VPMADCSSWD[2] = { + /* 0 : VPMADCSSWD xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: xop.m8.w0.nds.l0.p0 a6 /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(110 000) 001(a6) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPMADCSSWD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+54115, 466, 4034}, + /* 1 : VPMADCSSWD xmmreg,xmmrm128,xmmreg [r+vms: xop.m8.w0.nds.l0.p0 a6 /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(110 000) 001(a6) 110 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPMADCSSWD, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+54123, 466, 4034}, +}; + +static const struct itemplate instrux_VPMADCSWD[2] = { + /* 0 : VPMADCSWD xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: xop.m8.w0.nds.l0.p0 b6 /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(110 000) 001(b6) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPMADCSWD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+54131, 466, 4035}, + /* 1 : VPMADCSWD xmmreg,xmmrm128,xmmreg [r+vms: xop.m8.w0.nds.l0.p0 b6 /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(110 000) 001(b6) 110 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPMADCSWD, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+54139, 466, 4035}, +}; + +static const struct itemplate instrux_VPPERM[4] = { + /* 0 : VPPERM xmmreg,xmmreg*,xmmreg,xmmrm128 [rvsm: xop.m8.w1.nds.l0.p0 a3 /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(110 200) 001(a3) 130 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPPERM, 4, {XMMREG|RN_L16,XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+54147, 466, 4037}, + /* 1 : VPPERM xmmreg,xmmreg,xmmrm128 [r+vsm: xop.m8.w1.nds.l0.p0 a3 /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(110 200) 001(a3) 120 175 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPPERM, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+54155, 466, 4037}, + /* 2 : VPPERM xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: xop.m8.w0.nds.l0.p0 a3 /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(110 000) 001(a3) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPPERM, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+54163, 466, 4038}, + /* 3 : VPPERM xmmreg,xmmrm128,xmmreg [r+vms: xop.m8.w0.nds.l0.p0 a3 /r /is4 ] ND,SSE5,FUTURE,AMD */ + /* 260(110 000) 001(a3) 110 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPPERM, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+54171, 466, 4038}, +}; + +static const struct itemplate instrux_VPROTB[6] = { + /* 0 : VPROTB xmmreg,xmmrm128*,xmmreg [rmv: xop.m9.w0.nds.l0.p0 90 /r ] SSE5,FUTURE,AMD */ + /* 262(111 000) 001(90) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPROTB, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62908, 466, 4040}, + /* 1 : VPROTB xmmreg,xmmreg [r+mv: xop.m9.w0.nds.l0.p0 90 /r ] ND,SSE5,FUTURE,AMD */ + /* 261(111 000) 001(90) 100 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPROTB, 2, {XMMREG|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+62915, 466, 4040}, + /* 2 : VPROTB xmmreg,xmmreg*,xmmrm128 [rvm: xop.m9.w1.nds.l0.p0 90 /r ] SSE5,FUTURE,AMD */ + /* 261(111 200) 001(90) 120 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPROTB, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62922, 466, 4041}, + /* 3 : VPROTB xmmreg,xmmrm128 [r+vm: xop.m9.w1.nds.l0.p0 90 /r ] ND,SSE5,FUTURE,AMD */ + /* 260(111 200) 001(90) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPROTB, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+62929, 466, 4041}, + /* 4 : VPROTB xmmreg,xmmrm128*,imm8 [rmi: xop.m8.w0.l0.p0 c0 /r ib ] SSE5,FUTURE,AMD */ + /* 270(110 000) 001(c0) 110 022 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPROTB, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54179, 466, 4044}, + /* 5 : VPROTB xmmreg,imm8 [r+mi: xop.m8.w0.l0.p0 c0 /r ib ] ND,SSE5,FUTURE,AMD */ + /* 270(110 000) 001(c0) 100 021 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPROTB, 2, {XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+54187, 466, 4044}, +}; + +static const struct itemplate instrux_VPROTD[6] = { + /* 0 : VPROTD xmmreg,xmmrm128*,xmmreg [rmv: xop.m9.w0.nds.l0.p0 92 /r ] SSE5,FUTURE,AMD */ + /* 262(111 000) 001(92) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPROTD, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62936, 466, 4046}, + /* 1 : VPROTD xmmreg,xmmreg [r+mv: xop.m9.w0.nds.l0.p0 92 /r ] ND,SSE5,FUTURE,AMD */ + /* 261(111 000) 001(92) 100 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPROTD, 2, {XMMREG|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+62943, 466, 4046}, + /* 2 : VPROTD xmmreg,xmmreg*,xmmrm128 [rvm: xop.m9.w1.nds.l0.p0 92 /r ] SSE5,FUTURE,AMD */ + /* 261(111 200) 001(92) 120 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPROTD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62950, 466, 4047}, + /* 3 : VPROTD xmmreg,xmmrm128 [r+vm: xop.m9.w1.nds.l0.p0 92 /r ] ND,SSE5,FUTURE,AMD */ + /* 260(111 200) 001(92) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPROTD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+62957, 466, 4047}, + /* 4 : VPROTD xmmreg,xmmrm128*,imm8 [rmi: xop.m8.w0.l0.p0 c2 /r ib ] SSE5,FUTURE,AMD */ + /* 270(110 000) 001(c2) 110 022 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPROTD, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54195, 466, 4050}, + /* 5 : VPROTD xmmreg,imm8 [r+mi: xop.m8.w0.l0.p0 c2 /r ib ] ND,SSE5,FUTURE,AMD */ + /* 270(110 000) 001(c2) 100 021 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPROTD, 2, {XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+54203, 466, 4050}, +}; + +static const struct itemplate instrux_VPROTQ[6] = { + /* 0 : VPROTQ xmmreg,xmmrm128*,xmmreg [rmv: xop.m9.w0.nds.l0.p0 93 /r ] SSE5,FUTURE,AMD */ + /* 262(111 000) 001(93) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPROTQ, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62964, 466, 4051}, + /* 1 : VPROTQ xmmreg,xmmreg [r+mv: xop.m9.w0.nds.l0.p0 93 /r ] ND,SSE5,FUTURE,AMD */ + /* 261(111 000) 001(93) 100 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPROTQ, 2, {XMMREG|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+62971, 466, 4051}, + /* 2 : VPROTQ xmmreg,xmmreg*,xmmrm128 [rvm: xop.m9.w1.nds.l0.p0 93 /r ] SSE5,FUTURE,AMD */ + /* 261(111 200) 001(93) 120 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPROTQ, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62978, 466, 4052}, + /* 3 : VPROTQ xmmreg,xmmrm128 [r+vm: xop.m9.w1.nds.l0.p0 93 /r ] ND,SSE5,FUTURE,AMD */ + /* 260(111 200) 001(93) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPROTQ, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+62985, 466, 4052}, + /* 4 : VPROTQ xmmreg,xmmrm128*,imm8 [rmi: xop.m8.w0.l0.p0 c3 /r ib ] SSE5,FUTURE,AMD */ + /* 270(110 000) 001(c3) 110 022 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPROTQ, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54211, 466, 4055}, + /* 5 : VPROTQ xmmreg,imm8 [r+mi: xop.m8.w0.l0.p0 c3 /r ib ] ND,SSE5,FUTURE,AMD */ + /* 270(110 000) 001(c3) 100 021 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPROTQ, 2, {XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+54219, 466, 4055}, +}; + +static const struct itemplate instrux_VPROTW[6] = { + /* 0 : VPROTW xmmreg,xmmrm128*,xmmreg [rmv: xop.m9.w0.nds.l0.p0 91 /r ] SSE5,FUTURE,AMD */ + /* 262(111 000) 001(91) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPROTW, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62992, 466, 4056}, + /* 1 : VPROTW xmmreg,xmmreg [r+mv: xop.m9.w0.nds.l0.p0 91 /r ] ND,SSE5,FUTURE,AMD */ + /* 261(111 000) 001(91) 100 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPROTW, 2, {XMMREG|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+62999, 466, 4056}, + /* 2 : VPROTW xmmreg,xmmreg*,xmmrm128 [rvm: xop.m9.w1.nds.l0.p0 91 /r ] SSE5,FUTURE,AMD */ + /* 261(111 200) 001(91) 120 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPROTW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63006, 466, 4057}, + /* 3 : VPROTW xmmreg,xmmrm128 [r+vm: xop.m9.w1.nds.l0.p0 91 /r ] ND,SSE5,FUTURE,AMD */ + /* 260(111 200) 001(91) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPROTW, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63013, 466, 4057}, + /* 4 : VPROTW xmmreg,xmmrm128*,imm8 [rmi: xop.m8.w0.l0.p0 c1 /r ib ] SSE5,FUTURE,AMD */ + /* 270(110 000) 001(c1) 110 022 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPROTW, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54227, 466, 4058}, + /* 5 : VPROTW xmmreg,imm8 [r+mi: xop.m8.w0.l0.p0 c1 /r ib ] ND,SSE5,FUTURE,AMD */ + /* 270(110 000) 001(c1) 100 021 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPROTW, 2, {XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+54235, 466, 4058}, +}; + +static const struct itemplate instrux_VPSHAB[4] = { + /* 0 : VPSHAB xmmreg,xmmrm128*,xmmreg [rmv: xop.m9.w0.nds.l0.p0 98 /r ] SSE5,FUTURE,AMD */ + /* 262(111 000) 001(98) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPSHAB, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63020, 466, 4060}, + /* 1 : VPSHAB xmmreg,xmmreg [r+mv: xop.m9.w0.nds.l0.p0 98 /r ] ND,SSE5,FUTURE,AMD */ + /* 261(111 000) 001(98) 100 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPSHAB, 2, {XMMREG|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63027, 466, 4060}, + /* 2 : VPSHAB xmmreg,xmmreg*,xmmrm128 [rvm: xop.m9.w1.nds.l0.p0 98 /r ] SSE5,FUTURE,AMD */ + /* 261(111 200) 001(98) 120 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPSHAB, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63034, 466, 4061}, + /* 3 : VPSHAB xmmreg,xmmrm128 [r+vm: xop.m9.w1.nds.l0.p0 98 /r ] ND,SSE5,FUTURE,AMD */ + /* 260(111 200) 001(98) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPSHAB, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63041, 466, 4061}, +}; + +static const struct itemplate instrux_VPSHAD[4] = { + /* 0 : VPSHAD xmmreg,xmmrm128*,xmmreg [rmv: xop.m9.w0.nds.l0.p0 9a /r ] SSE5,FUTURE,AMD */ + /* 262(111 000) 001(9a) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPSHAD, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63048, 466, 4063}, + /* 1 : VPSHAD xmmreg,xmmreg [r+mv: xop.m9.w0.nds.l0.p0 9a /r ] ND,SSE5,FUTURE,AMD */ + /* 261(111 000) 001(9a) 100 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPSHAD, 2, {XMMREG|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63055, 466, 4063}, + /* 2 : VPSHAD xmmreg,xmmreg*,xmmrm128 [rvm: xop.m9.w1.nds.l0.p0 9a /r ] SSE5,FUTURE,AMD */ + /* 261(111 200) 001(9a) 120 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPSHAD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63062, 466, 4064}, + /* 3 : VPSHAD xmmreg,xmmrm128 [r+vm: xop.m9.w1.nds.l0.p0 9a /r ] ND,SSE5,FUTURE,AMD */ + /* 260(111 200) 001(9a) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPSHAD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63069, 466, 4064}, +}; + +static const struct itemplate instrux_VPSHAQ[4] = { + /* 0 : VPSHAQ xmmreg,xmmrm128*,xmmreg [rmv: xop.m9.w0.nds.l0.p0 9b /r ] SSE5,FUTURE,AMD */ + /* 262(111 000) 001(9b) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPSHAQ, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63076, 466, 4066}, + /* 1 : VPSHAQ xmmreg,xmmreg [r+mv: xop.m9.w0.nds.l0.p0 9b /r ] ND,SSE5,FUTURE,AMD */ + /* 261(111 000) 001(9b) 100 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPSHAQ, 2, {XMMREG|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63083, 466, 4066}, + /* 2 : VPSHAQ xmmreg,xmmreg*,xmmrm128 [rvm: xop.m9.w1.nds.l0.p0 9b /r ] SSE5,FUTURE,AMD */ + /* 261(111 200) 001(9b) 120 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPSHAQ, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63090, 466, 4067}, + /* 3 : VPSHAQ xmmreg,xmmrm128 [r+vm: xop.m9.w1.nds.l0.p0 9b /r ] ND,SSE5,FUTURE,AMD */ + /* 260(111 200) 001(9b) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPSHAQ, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63097, 466, 4067}, +}; + +static const struct itemplate instrux_VPSHAW[4] = { + /* 0 : VPSHAW xmmreg,xmmrm128*,xmmreg [rmv: xop.m9.w0.nds.l0.p0 99 /r ] SSE5,FUTURE,AMD */ + /* 262(111 000) 001(99) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPSHAW, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63104, 466, 4069}, + /* 1 : VPSHAW xmmreg,xmmreg [r+mv: xop.m9.w0.nds.l0.p0 99 /r ] ND,SSE5,FUTURE,AMD */ + /* 261(111 000) 001(99) 100 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPSHAW, 2, {XMMREG|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63111, 466, 4069}, + /* 2 : VPSHAW xmmreg,xmmreg*,xmmrm128 [rvm: xop.m9.w1.nds.l0.p0 99 /r ] SSE5,FUTURE,AMD */ + /* 261(111 200) 001(99) 120 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPSHAW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63118, 466, 4070}, + /* 3 : VPSHAW xmmreg,xmmrm128 [r+vm: xop.m9.w1.nds.l0.p0 99 /r ] ND,SSE5,FUTURE,AMD */ + /* 260(111 200) 001(99) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPSHAW, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63125, 466, 4070}, +}; + +static const struct itemplate instrux_VPSHLB[4] = { + /* 0 : VPSHLB xmmreg,xmmrm128*,xmmreg [rmv: xop.m9.w0.nds.l0.p0 94 /r ] SSE5,FUTURE,AMD */ + /* 262(111 000) 001(94) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPSHLB, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63132, 466, 4072}, + /* 1 : VPSHLB xmmreg,xmmreg [r+mv: xop.m9.w0.nds.l0.p0 94 /r ] ND,SSE5,FUTURE,AMD */ + /* 261(111 000) 001(94) 100 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPSHLB, 2, {XMMREG|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63139, 466, 4072}, + /* 2 : VPSHLB xmmreg,xmmreg*,xmmrm128 [rvm: xop.m9.w1.nds.l0.p0 94 /r ] SSE5,FUTURE,AMD */ + /* 261(111 200) 001(94) 120 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPSHLB, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63146, 466, 4073}, + /* 3 : VPSHLB xmmreg,xmmrm128 [r+vm: xop.m9.w1.nds.l0.p0 94 /r ] ND,SSE5,FUTURE,AMD */ + /* 260(111 200) 001(94) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPSHLB, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63153, 466, 4073}, +}; + +static const struct itemplate instrux_VPSHLD[4] = { + /* 0 : VPSHLD xmmreg,xmmrm128*,xmmreg [rmv: xop.m9.w0.nds.l0.p0 96 /r ] SSE5,FUTURE,AMD */ + /* 262(111 000) 001(96) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPSHLD, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63160, 466, 4077}, + /* 1 : VPSHLD xmmreg,xmmreg [r+mv: xop.m9.w0.nds.l0.p0 96 /r ] ND,SSE5,FUTURE,AMD */ + /* 261(111 000) 001(96) 100 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPSHLD, 2, {XMMREG|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63167, 466, 4077}, + /* 2 : VPSHLD xmmreg,xmmreg*,xmmrm128 [rvm: xop.m9.w1.nds.l0.p0 96 /r ] SSE5,FUTURE,AMD */ + /* 261(111 200) 001(96) 120 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPSHLD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63174, 466, 4078}, + /* 3 : VPSHLD xmmreg,xmmrm128 [r+vm: xop.m9.w1.nds.l0.p0 96 /r ] ND,SSE5,FUTURE,AMD */ + /* 260(111 200) 001(96) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPSHLD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63181, 466, 4078}, +}; + +static const struct itemplate instrux_VPSHLQ[4] = { + /* 0 : VPSHLQ xmmreg,xmmrm128*,xmmreg [rmv: xop.m9.w0.nds.l0.p0 97 /r ] SSE5,FUTURE,AMD */ + /* 262(111 000) 001(97) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPSHLQ, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63188, 466, 4080}, + /* 1 : VPSHLQ xmmreg,xmmreg [r+mv: xop.m9.w0.nds.l0.p0 97 /r ] ND,SSE5,FUTURE,AMD */ + /* 261(111 000) 001(97) 100 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPSHLQ, 2, {XMMREG|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63195, 466, 4080}, + /* 2 : VPSHLQ xmmreg,xmmreg*,xmmrm128 [rvm: xop.m9.w1.nds.l0.p0 97 /r ] SSE5,FUTURE,AMD */ + /* 261(111 200) 001(97) 120 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPSHLQ, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63202, 466, 4081}, + /* 3 : VPSHLQ xmmreg,xmmrm128 [r+vm: xop.m9.w1.nds.l0.p0 97 /r ] ND,SSE5,FUTURE,AMD */ + /* 260(111 200) 001(97) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPSHLQ, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63209, 466, 4081}, +}; + +static const struct itemplate instrux_VPSHLW[4] = { + /* 0 : VPSHLW xmmreg,xmmrm128*,xmmreg [rmv: xop.m9.w0.nds.l0.p0 95 /r ] SSE5,FUTURE,AMD */ + /* 262(111 000) 001(95) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPSHLW, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63216, 466, 4083}, + /* 1 : VPSHLW xmmreg,xmmreg [r+mv: xop.m9.w0.nds.l0.p0 95 /r ] ND,SSE5,FUTURE,AMD */ + /* 261(111 000) 001(95) 100 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPSHLW, 2, {XMMREG|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63223, 466, 4083}, + /* 2 : VPSHLW xmmreg,xmmreg*,xmmrm128 [rvm: xop.m9.w1.nds.l0.p0 95 /r ] SSE5,FUTURE,AMD */ + /* 261(111 200) 001(95) 120 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPSHLW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63230, 466, 4084}, + /* 3 : VPSHLW xmmreg,xmmrm128 [r+vm: xop.m9.w1.nds.l0.p0 95 /r ] ND,SSE5,FUTURE,AMD */ + /* 260(111 200) 001(95) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPSHLW, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63237, 466, 4084}, +}; + +static const struct itemplate instrux_VBROADCASTI128[1] = { + /* 0 : VBROADCASTI128 ymmreg,mem128 [rm: vex.256.66.0f38.w0 5a /r ] AVX2,FUTURE */ + /* 270(002 005) 001(5a) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VBROADCASTI128, 2, {YMMREG|RN_L16,MEMORY|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64511, 468, 4216}, +}; + +static const struct itemplate instrux_VPBLENDD[4] = { + /* 0 : VPBLENDD xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: vex.nds.128.66.0f3a.w0 02 /r ib ] AVX2,FUTURE */ + /* 261(003 001) 001(02) 120 023 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPBLENDD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+54491, 468, 4217}, + /* 1 : VPBLENDD xmmreg,xmmrm128,imm8 [r+vmi: vex.nds.128.66.0f3a.w0 02 /r ib ] ND,AVX2,FUTURE */ + /* 260(003 001) 001(02) 110 022 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPBLENDD, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54499, 468, 4217}, + /* 2 : VPBLENDD ymmreg,ymmreg*,ymmrm256,imm8 [rvmi: vex.nds.256.66.0f3a.w0 02 /r ib ] AVX2,FUTURE */ + /* 261(003 005) 001(02) 120 023 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPBLENDD, 4, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+54507, 468, 4218}, + /* 3 : VPBLENDD ymmreg,ymmrm256,imm8 [r+vmi: vex.nds.256.66.0f3a.w0 02 /r ib ] ND,AVX2,FUTURE */ + /* 260(003 005) 001(02) 110 022 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPBLENDD, 3, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54515, 468, 4218}, +}; + +static const struct itemplate instrux_VPBROADCASTB[19] = { + /* 0 : VPBROADCASTB xmmreg,mem8 [rm: vex.128.66.0f38.w0 78 /r ] AVX2,FUTURE */ + /* 270(002 001) 001(78) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPBROADCASTB, 2, {XMMREG|RN_L16,MEMORY|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64518, 468, 4219}, + /* 1 : VPBROADCASTB xmmreg,xmmreg [rm: vex.128.66.0f38.w0 78 /r ] AVX2,FUTURE */ + /* 270(002 001) 001(78) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPBROADCASTB, 2, {XMMREG|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64518, 468, 4220}, + /* 2 : VPBROADCASTB ymmreg,mem8 [rm: vex.256.66.0f38.w0 78 /r ] AVX2,FUTURE */ + /* 270(002 005) 001(78) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPBROADCASTB, 2, {YMMREG|RN_L16,MEMORY|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64525, 468, 4221}, + /* 3 : VPBROADCASTB ymmreg,xmmreg [rm: vex.256.66.0f38.w0 78 /r ] AVX2,FUTURE */ + /* 270(002 005) 001(78) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPBROADCASTB, 2, {YMMREG|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64525, 468, 4222}, + /* 4 : VPBROADCASTB xmmreg|mask|z,xmmrm8 [rm:t1s8: evex.128.66.0f38.w0 78 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7d 08) 304 001(78) 110 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPBROADCASTB, 2, {XMMREG,RM_XMM|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36571, 549, 5758}, + /* 5 : VPBROADCASTB ymmreg|mask|z,xmmrm8 [rm:t1s8: evex.256.66.0f38.w0 78 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7d 28) 304 001(78) 110 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPBROADCASTB, 2, {YMMREG,RM_XMM|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36580, 549, 5759}, + /* 6 : VPBROADCASTB zmmreg|mask|z,xmmrm8 [rm:t1s8: evex.512.66.0f38.w0 78 /r ] AVX512BW,FUTURE */ + /* 250(f2 7d 48) 304 001(78) 110 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPBROADCASTB, 2, {ZMMREG,RM_XMM|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36589, 550, 5760}, + /* 7 : VPBROADCASTB xmmreg|mask|z,reg8 [rm: evex.128.66.0f38.w0 7a /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7d 08) 300 001(7a) 110 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPBROADCASTB, 2, {XMMREG,REG_GPR|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36598, 549, 5761}, + /* 8 : VPBROADCASTB xmmreg|mask|z,reg16 [rm: evex.128.66.0f38.w0 7a /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7d 08) 300 001(7a) 110 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPBROADCASTB, 2, {XMMREG,REG_GPR|BITS16,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36598, 549, 5762}, + /* 9 : VPBROADCASTB xmmreg|mask|z,reg32 [rm: evex.128.66.0f38.w0 7a /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7d 08) 300 001(7a) 110 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPBROADCASTB, 2, {XMMREG,REG_GPR|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36598, 549, 5763}, + /* 10 : VPBROADCASTB xmmreg|mask|z,reg64 [rm: evex.128.66.0f38.w0 7a /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7d 08) 300 001(7a) 110 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPBROADCASTB, 2, {XMMREG,REG_GPR|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36598, 549, 5764}, + /* 11 : VPBROADCASTB ymmreg|mask|z,reg8 [rm: evex.256.66.0f38.w0 7a /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7d 28) 300 001(7a) 110 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPBROADCASTB, 2, {YMMREG,REG_GPR|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36607, 549, 5765}, + /* 12 : VPBROADCASTB ymmreg|mask|z,reg16 [rm: evex.256.66.0f38.w0 7a /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7d 28) 300 001(7a) 110 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPBROADCASTB, 2, {YMMREG,REG_GPR|BITS16,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36607, 549, 5766}, + /* 13 : VPBROADCASTB ymmreg|mask|z,reg32 [rm: evex.256.66.0f38.w0 7a /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7d 28) 300 001(7a) 110 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPBROADCASTB, 2, {YMMREG,REG_GPR|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36607, 549, 5767}, + /* 14 : VPBROADCASTB ymmreg|mask|z,reg64 [rm: evex.256.66.0f38.w0 7a /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7d 28) 300 001(7a) 110 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPBROADCASTB, 2, {YMMREG,REG_GPR|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36607, 549, 5768}, + /* 15 : VPBROADCASTB zmmreg|mask|z,reg8 [rm: evex.512.66.0f38.w0 7a /r ] AVX512BW,FUTURE */ + /* 250(f2 7d 48) 300 001(7a) 110 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPBROADCASTB, 2, {ZMMREG,REG_GPR|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36616, 550, 5769}, + /* 16 : VPBROADCASTB zmmreg|mask|z,reg16 [rm: evex.512.66.0f38.w0 7a /r ] AVX512BW,FUTURE */ + /* 250(f2 7d 48) 300 001(7a) 110 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPBROADCASTB, 2, {ZMMREG,REG_GPR|BITS16,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36616, 550, 5770}, + /* 17 : VPBROADCASTB zmmreg|mask|z,reg32 [rm: evex.512.66.0f38.w0 7a /r ] AVX512BW,FUTURE */ + /* 250(f2 7d 48) 300 001(7a) 110 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPBROADCASTB, 2, {ZMMREG,REG_GPR|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36616, 550, 5771}, + /* 18 : VPBROADCASTB zmmreg|mask|z,reg64 [rm: evex.512.66.0f38.w0 7a /r ] AVX512BW,FUTURE */ + /* 250(f2 7d 48) 300 001(7a) 110 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPBROADCASTB, 2, {ZMMREG,REG_GPR|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36616, 550, 5772}, +}; + +static const struct itemplate instrux_VPBROADCASTW[16] = { + /* 0 : VPBROADCASTW xmmreg,mem16 [rm: vex.128.66.0f38.w0 79 /r ] AVX2,FUTURE */ + /* 270(002 001) 001(79) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPBROADCASTW, 2, {XMMREG|RN_L16,MEMORY|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64532, 468, 4223}, + /* 1 : VPBROADCASTW xmmreg,xmmreg [rm: vex.128.66.0f38.w0 79 /r ] AVX2,FUTURE */ + /* 270(002 001) 001(79) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPBROADCASTW, 2, {XMMREG|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64532, 468, 4224}, + /* 2 : VPBROADCASTW ymmreg,mem16 [rm: vex.256.66.0f38.w0 79 /r ] AVX2,FUTURE */ + /* 270(002 005) 001(79) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPBROADCASTW, 2, {YMMREG|RN_L16,MEMORY|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64539, 468, 4225}, + /* 3 : VPBROADCASTW ymmreg,xmmreg [rm: vex.256.66.0f38.w0 79 /r ] AVX2,FUTURE */ + /* 270(002 005) 001(79) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPBROADCASTW, 2, {YMMREG|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64539, 468, 4226}, + /* 4 : VPBROADCASTW xmmreg|mask|z,xmmrm16 [rm:t1s16: evex.128.66.0f38.w0 79 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7d 08) 305 001(79) 110 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPBROADCASTW, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36841, 549, 5797}, + /* 5 : VPBROADCASTW ymmreg|mask|z,xmmrm16 [rm:t1s16: evex.256.66.0f38.w0 79 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7d 28) 305 001(79) 110 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPBROADCASTW, 2, {YMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36850, 549, 5798}, + /* 6 : VPBROADCASTW zmmreg|mask|z,xmmrm16 [rm:t1s16: evex.512.66.0f38.w0 79 /r ] AVX512BW,FUTURE */ + /* 250(f2 7d 48) 305 001(79) 110 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPBROADCASTW, 2, {ZMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36859, 550, 5799}, + /* 7 : VPBROADCASTW xmmreg|mask|z,reg16 [rm: evex.128.66.0f38.w0 7b /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7d 08) 300 001(7b) 110 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPBROADCASTW, 2, {XMMREG,REG_GPR|BITS16,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36868, 549, 5800}, + /* 8 : VPBROADCASTW xmmreg|mask|z,reg32 [rm: evex.128.66.0f38.w0 7b /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7d 08) 300 001(7b) 110 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPBROADCASTW, 2, {XMMREG,REG_GPR|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36868, 549, 5801}, + /* 9 : VPBROADCASTW xmmreg|mask|z,reg64 [rm: evex.128.66.0f38.w0 7b /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7d 08) 300 001(7b) 110 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPBROADCASTW, 2, {XMMREG,REG_GPR|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36868, 549, 5802}, + /* 10 : VPBROADCASTW ymmreg|mask|z,reg16 [rm: evex.256.66.0f38.w0 7b /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7d 28) 300 001(7b) 110 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPBROADCASTW, 2, {YMMREG,REG_GPR|BITS16,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36877, 549, 5803}, + /* 11 : VPBROADCASTW ymmreg|mask|z,reg32 [rm: evex.256.66.0f38.w0 7b /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7d 28) 300 001(7b) 110 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPBROADCASTW, 2, {YMMREG,REG_GPR|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36877, 549, 5804}, + /* 12 : VPBROADCASTW ymmreg|mask|z,reg64 [rm: evex.256.66.0f38.w0 7b /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7d 28) 300 001(7b) 110 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPBROADCASTW, 2, {YMMREG,REG_GPR|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36877, 549, 5805}, + /* 13 : VPBROADCASTW zmmreg|mask|z,reg16 [rm: evex.512.66.0f38.w0 7b /r ] AVX512BW,FUTURE */ + /* 250(f2 7d 48) 300 001(7b) 110 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPBROADCASTW, 2, {ZMMREG,REG_GPR|BITS16,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36886, 550, 5806}, + /* 14 : VPBROADCASTW zmmreg|mask|z,reg32 [rm: evex.512.66.0f38.w0 7b /r ] AVX512BW,FUTURE */ + /* 250(f2 7d 48) 300 001(7b) 110 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPBROADCASTW, 2, {ZMMREG,REG_GPR|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36886, 550, 5807}, + /* 15 : VPBROADCASTW zmmreg|mask|z,reg64 [rm: evex.512.66.0f38.w0 7b /r ] AVX512BW,FUTURE */ + /* 250(f2 7d 48) 300 001(7b) 110 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPBROADCASTW, 2, {ZMMREG,REG_GPR|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36886, 550, 5808}, +}; + +static const struct itemplate instrux_VPBROADCASTD[13] = { + /* 0 : VPBROADCASTD xmmreg,mem32 [rm: vex.128.66.0f38.w0 58 /r ] AVX2,FUTURE */ + /* 270(002 001) 001(58) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPBROADCASTD, 2, {XMMREG|RN_L16,MEMORY|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64546, 468, 4227}, + /* 1 : VPBROADCASTD xmmreg,xmmreg [rm: vex.128.66.0f38.w0 58 /r ] AVX2,FUTURE */ + /* 270(002 001) 001(58) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPBROADCASTD, 2, {XMMREG|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64546, 468, 4228}, + /* 2 : VPBROADCASTD ymmreg,mem32 [rm: vex.256.66.0f38.w0 58 /r ] AVX2,FUTURE */ + /* 270(002 005) 001(58) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPBROADCASTD, 2, {YMMREG|RN_L16,MEMORY|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64553, 468, 4229}, + /* 3 : VPBROADCASTD ymmreg,xmmreg [rm: vex.256.66.0f38.w0 58 /r ] AVX2,FUTURE */ + /* 270(002 005) 001(58) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPBROADCASTD, 2, {YMMREG|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64553, 468, 4230}, + /* 4 : VPBROADCASTD xmmreg|mask|z,mem32 [rm:t1s: evex.128.66.0f38.w0 58 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 08) 306 001(58) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPBROADCASTD, 2, {XMMREG,MEMORY|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36625, 543, 5773}, + /* 5 : VPBROADCASTD ymmreg|mask|z,mem32 [rm:t1s: evex.256.66.0f38.w0 58 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 28) 306 001(58) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPBROADCASTD, 2, {YMMREG,MEMORY|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36634, 543, 5774}, + /* 6 : VPBROADCASTD zmmreg|mask|z,mem32 [rm:t1s: evex.512.66.0f38.w0 58 /r ] AVX512,FUTURE */ + /* 250(f2 7d 48) 306 001(58) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPBROADCASTD, 2, {ZMMREG,MEMORY|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36643, 544, 5775}, + /* 7 : VPBROADCASTD xmmreg|mask|z,xmmreg [rm: evex.128.66.0f38.w0 58 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 08) 300 001(58) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPBROADCASTD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36652, 543, 5776}, + /* 8 : VPBROADCASTD ymmreg|mask|z,xmmreg [rm: evex.256.66.0f38.w0 58 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 28) 300 001(58) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPBROADCASTD, 2, {YMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36661, 543, 5777}, + /* 9 : VPBROADCASTD zmmreg|mask|z,xmmreg [rm: evex.512.66.0f38.w0 58 /r ] AVX512,FUTURE */ + /* 250(f2 7d 48) 300 001(58) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPBROADCASTD, 2, {ZMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36670, 544, 5778}, + /* 10 : VPBROADCASTD xmmreg|mask|z,reg32 [rm: evex.128.66.0f38.w0 7c /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 08) 300 001(7c) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPBROADCASTD, 2, {XMMREG,REG_GPR|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36679, 543, 5779}, + /* 11 : VPBROADCASTD ymmreg|mask|z,reg32 [rm: evex.256.66.0f38.w0 7c /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 28) 300 001(7c) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPBROADCASTD, 2, {YMMREG,REG_GPR|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36688, 543, 5780}, + /* 12 : VPBROADCASTD zmmreg|mask|z,reg32 [rm: evex.512.66.0f38.w0 7c /r ] AVX512,FUTURE */ + /* 250(f2 7d 48) 300 001(7c) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPBROADCASTD, 2, {ZMMREG,REG_GPR|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36697, 544, 5781}, +}; + +static const struct itemplate instrux_VPBROADCASTQ[13] = { + /* 0 : VPBROADCASTQ xmmreg,mem64 [rm: vex.128.66.0f38.w0 59 /r ] AVX2,FUTURE */ + /* 270(002 001) 001(59) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPBROADCASTQ, 2, {XMMREG|RN_L16,MEMORY|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64560, 468, 4231}, + /* 1 : VPBROADCASTQ xmmreg,xmmreg [rm: vex.128.66.0f38.w0 59 /r ] AVX2,FUTURE */ + /* 270(002 001) 001(59) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPBROADCASTQ, 2, {XMMREG|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64560, 468, 4232}, + /* 2 : VPBROADCASTQ ymmreg,mem64 [rm: vex.256.66.0f38.w0 59 /r ] AVX2,FUTURE */ + /* 270(002 005) 001(59) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPBROADCASTQ, 2, {YMMREG|RN_L16,MEMORY|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64567, 468, 4233}, + /* 3 : VPBROADCASTQ ymmreg,xmmreg [rm: vex.256.66.0f38.w0 59 /r ] AVX2,FUTURE */ + /* 270(002 005) 001(59) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPBROADCASTQ, 2, {YMMREG|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64567, 468, 4234}, + /* 4 : VPBROADCASTQ xmmreg|mask|z,mem64 [rm:t1s: evex.128.66.0f38.w1 59 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 fd 08) 306 001(59) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPBROADCASTQ, 2, {XMMREG,MEMORY|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36760, 543, 5788}, + /* 5 : VPBROADCASTQ ymmreg|mask|z,mem64 [rm:t1s: evex.256.66.0f38.w1 59 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 fd 28) 306 001(59) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPBROADCASTQ, 2, {YMMREG,MEMORY|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36769, 543, 5789}, + /* 6 : VPBROADCASTQ zmmreg|mask|z,mem64 [rm:t1s: evex.512.66.0f38.w1 59 /r ] AVX512,FUTURE */ + /* 250(f2 fd 48) 306 001(59) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPBROADCASTQ, 2, {ZMMREG,MEMORY|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36778, 544, 5790}, + /* 7 : VPBROADCASTQ xmmreg|mask|z,xmmreg [rm: evex.128.66.0f38.w1 59 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 fd 08) 300 001(59) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPBROADCASTQ, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36787, 543, 5791}, + /* 8 : VPBROADCASTQ ymmreg|mask|z,xmmreg [rm: evex.256.66.0f38.w1 59 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 fd 28) 300 001(59) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPBROADCASTQ, 2, {YMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36796, 543, 5792}, + /* 9 : VPBROADCASTQ zmmreg|mask|z,xmmreg [rm: evex.512.66.0f38.w1 59 /r ] AVX512,FUTURE */ + /* 250(f2 fd 48) 300 001(59) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPBROADCASTQ, 2, {ZMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36805, 544, 5793}, + /* 10 : VPBROADCASTQ xmmreg|mask|z,reg64 [rm: evex.128.66.0f38.w1 7c /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 fd 08) 300 001(7c) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPBROADCASTQ, 2, {XMMREG,REG_GPR|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36814, 543, 5794}, + /* 11 : VPBROADCASTQ ymmreg|mask|z,reg64 [rm: evex.256.66.0f38.w1 7c /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 fd 28) 300 001(7c) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPBROADCASTQ, 2, {YMMREG,REG_GPR|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36823, 543, 5795}, + /* 12 : VPBROADCASTQ zmmreg|mask|z,reg64 [rm: evex.512.66.0f38.w1 7c /r ] AVX512,FUTURE */ + /* 250(f2 fd 48) 300 001(7c) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPBROADCASTQ, 2, {ZMMREG,REG_GPR|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36832, 544, 5796}, +}; + +static const struct itemplate instrux_VPERMD[6] = { + /* 0 : VPERMD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38.w0 36 /r ] AVX2,FUTURE */ + /* 261(002 005) 001(36) 120 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPERMD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64574, 468, 4236}, + /* 1 : VPERMD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f38.w0 36 /r ] ND,AVX2,FUTURE */ + /* 260(002 005) 001(36) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPERMD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64581, 468, 4236}, + /* 2 : VPERMD ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 36 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(36) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPERMD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+37327, 543, 6097}, + /* 3 : VPERMD ymmreg|mask|z,ymmrm256|b32 [r+vm:fv: evex.nds.256.66.0f38.w0 36 /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f2 7d 28) 301 001(36) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPERMD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+37336, 543, 6097}, + /* 4 : VPERMD zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f38.w0 36 /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(36) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPERMD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+37345, 544, 6098}, + /* 5 : VPERMD zmmreg|mask|z,zmmrm512|b32 [r+vm:fv: evex.nds.512.66.0f38.w0 36 /r ] ND,AVX512,FUTURE */ + /* 240(f2 7d 48) 301 001(36) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPERMD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+37354, 544, 6098}, +}; + +static const struct itemplate instrux_VPERMPD[7] = { + /* 0 : VPERMPD ymmreg,ymmrm256,imm8 [rmi: vex.256.66.0f3a.w1 01 /r ib ] AVX2,FUTURE */ + /* 270(003 205) 001(01) 110 022 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPERMPD, 3, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54523, 468, 4237}, + /* 1 : VPERMPD ymmreg|mask|z,ymmrm256|b64,imm8 [rmi:fv: evex.256.66.0f3a.w1 01 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 250(f3 fd 28) 301 001(01) 110 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPERMPD, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+19813, 543, 6129}, + /* 2 : VPERMPD zmmreg|mask|z,zmmrm512|b64,imm8 [rmi:fv: evex.512.66.0f3a.w1 01 /r ib ] AVX512,FUTURE */ + /* 250(f3 fd 48) 301 001(01) 110 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VPERMPD, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+19823, 544, 6130}, + /* 3 : VPERMPD ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 16 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(16) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPERMPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+37633, 543, 6131}, + /* 4 : VPERMPD ymmreg|mask|z,ymmrm256|b64 [r+vm:fv: evex.nds.256.66.0f38.w1 16 /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f2 fd 28) 301 001(16) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPERMPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+37642, 543, 6131}, + /* 5 : VPERMPD zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 16 /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(16) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPERMPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+37651, 544, 6132}, + /* 6 : VPERMPD zmmreg|mask|z,zmmrm512|b64 [r+vm:fv: evex.nds.512.66.0f38.w1 16 /r ] ND,AVX512,FUTURE */ + /* 240(f2 fd 48) 301 001(16) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPERMPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+37660, 544, 6132}, +}; + +static const struct itemplate instrux_VPERMPS[6] = { + /* 0 : VPERMPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38.w0 16 /r ] AVX2,FUTURE */ + /* 261(002 005) 001(16) 120 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPERMPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64588, 468, 4238}, + /* 1 : VPERMPS ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f38.w0 16 /r ] ND,AVX2,FUTURE */ + /* 260(002 005) 001(16) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPERMPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64595, 468, 4238}, + /* 2 : VPERMPS ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 16 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(16) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPERMPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+37669, 543, 6133}, + /* 3 : VPERMPS ymmreg|mask|z,ymmrm256|b32 [r+vm:fv: evex.nds.256.66.0f38.w0 16 /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f2 7d 28) 301 001(16) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPERMPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+37678, 543, 6133}, + /* 4 : VPERMPS zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f38.w0 16 /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(16) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPERMPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+37687, 544, 6134}, + /* 5 : VPERMPS zmmreg|mask|z,zmmrm512|b32 [r+vm:fv: evex.nds.512.66.0f38.w0 16 /r ] ND,AVX512,FUTURE */ + /* 240(f2 7d 48) 301 001(16) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPERMPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+37696, 544, 6134}, +}; + +static const struct itemplate instrux_VPERMQ[7] = { + /* 0 : VPERMQ ymmreg,ymmrm256,imm8 [rmi: vex.256.66.0f3a.w1 00 /r ib ] AVX2,FUTURE */ + /* 270(003 205) 001(00) 110 022 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPERMQ, 3, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54531, 468, 4239}, + /* 1 : VPERMQ ymmreg|mask|z,ymmrm256|b64,imm8 [rmi:fv: evex.256.66.0f3a.w1 00 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 250(f3 fd 28) 301 001(00) 110 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPERMQ, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+19833, 543, 6135}, + /* 2 : VPERMQ zmmreg|mask|z,zmmrm512|b64,imm8 [rmi:fv: evex.512.66.0f3a.w1 00 /r ib ] AVX512,FUTURE */ + /* 250(f3 fd 48) 301 001(00) 110 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VPERMQ, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+19843, 544, 6136}, + /* 3 : VPERMQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 36 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(36) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPERMQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+37705, 543, 6137}, + /* 4 : VPERMQ ymmreg|mask|z,ymmrm256|b64 [r+vm:fv: evex.nds.256.66.0f38.w1 36 /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f2 fd 28) 301 001(36) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPERMQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+37714, 543, 6137}, + /* 5 : VPERMQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 36 /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(36) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPERMQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+37723, 544, 6138}, + /* 6 : VPERMQ zmmreg|mask|z,zmmrm512|b64 [r+vm:fv: evex.nds.512.66.0f38.w1 36 /r ] ND,AVX512,FUTURE */ + /* 240(f2 fd 48) 301 001(36) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPERMQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+37732, 544, 6138}, +}; + +static const struct itemplate instrux_VPERM2I128[2] = { + /* 0 : VPERM2I128 ymmreg,ymmreg*,ymmrm256,imm8 [rvmi: vex.nds.256.66.0f3a.w0 46 /r ib ] AVX2,FUTURE */ + /* 261(003 005) 001(46) 120 023 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPERM2I128, 4, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+54539, 468, 4240}, + /* 1 : VPERM2I128 ymmreg,ymmrm256,imm8 [r+vmi: vex.nds.256.66.0f3a.w0 46 /r ib ] ND,AVX2,FUTURE */ + /* 260(003 005) 001(46) 110 022 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPERM2I128, 3, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54547, 468, 4240}, +}; + +static const struct itemplate instrux_VEXTRACTI128[1] = { + /* 0 : VEXTRACTI128 xmmrm128,ymmreg,imm8 [mri: vex.256.66.0f3a.w0 39 /r ib ] AVX2,FUTURE */ + /* 270(003 005) 001(39) 101 022 : NOAPX,VEX,AVX2,FUTURE */ + {I_VEXTRACTI128, 3, {RM_XMM|BITS128|RN_L16,YMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54555, 468, 4241}, +}; + +static const struct itemplate instrux_VINSERTI128[2] = { + /* 0 : VINSERTI128 ymmreg,ymmreg*,xmmrm128,imm8 [rvmi: vex.nds.256.66.0f3a.w0 38 /r ib ] AVX2,FUTURE */ + /* 261(003 005) 001(38) 120 023 : NOAPX,VEX,AVX2,FUTURE */ + {I_VINSERTI128, 4, {YMMREG|RN_L16,YMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+54563, 468, 4243}, + /* 1 : VINSERTI128 ymmreg,xmmrm128,imm8 [r+vmi: vex.nds.256.66.0f3a.w0 38 /r ib ] ND,AVX2,FUTURE */ + /* 260(003 005) 001(38) 110 022 : NOAPX,VEX,AVX2,FUTURE */ + {I_VINSERTI128, 3, {YMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54571, 468, 4243}, +}; + +static const struct itemplate instrux_VPMASKMOVD[6] = { + /* 0 : VPMASKMOVD xmmreg,xmmreg*,mem128 [rvm: vex.nds.128.66.0f38.w0 8c /r ] AVX2,FUTURE */ + /* 261(002 001) 001(8c) 120 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPMASKMOVD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,MEMORY|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64602, 468, 4244}, + /* 1 : VPMASKMOVD xmmreg,mem128 [r+vm: vex.nds.128.66.0f38.w0 8c /r ] ND,AVX2,FUTURE */ + /* 260(002 001) 001(8c) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPMASKMOVD, 2, {XMMREG|RN_L16,MEMORY|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64609, 468, 4244}, + /* 2 : VPMASKMOVD ymmreg,ymmreg*,mem256 [rvm: vex.nds.256.66.0f38.w0 8c /r ] AVX2,FUTURE */ + /* 261(002 005) 001(8c) 120 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPMASKMOVD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,MEMORY|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64616, 468, 4245}, + /* 3 : VPMASKMOVD ymmreg,mem256 [r+vm: vex.nds.256.66.0f38.w0 8c /r ] ND,AVX2,FUTURE */ + /* 260(002 005) 001(8c) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPMASKMOVD, 2, {YMMREG|RN_L16,MEMORY|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64623, 468, 4245}, + /* 4 : VPMASKMOVD mem128,xmmreg,xmmreg [mvr: vex.nds.128.66.0f38.w0 8e /r ] AVX2,FUTURE */ + /* 261(002 001) 001(8e) 102 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPMASKMOVD, 3, {MEMORY|BITS128|RN_L16,XMMREG|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64658, 468, 4249}, + /* 5 : VPMASKMOVD mem256,ymmreg,ymmreg [mvr: vex.nds.256.66.0f38.w0 8e /r ] AVX2,FUTURE */ + /* 261(002 005) 001(8e) 102 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPMASKMOVD, 3, {MEMORY|BITS256|RN_L16,YMMREG|RN_L16,YMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64665, 468, 4250}, +}; + +static const struct itemplate instrux_VPMASKMOVQ[6] = { + /* 0 : VPMASKMOVQ xmmreg,xmmreg*,mem128 [rvm: vex.nds.128.66.0f38.w1 8c /r ] AVX2,FUTURE */ + /* 261(002 201) 001(8c) 120 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPMASKMOVQ, 3, {XMMREG|RN_L16,XMMREG|RN_L16,MEMORY|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64630, 468, 4246}, + /* 1 : VPMASKMOVQ xmmreg,mem128 [r+vm: vex.nds.128.66.0f38.w1 8c /r ] ND,AVX2,FUTURE */ + /* 260(002 201) 001(8c) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPMASKMOVQ, 2, {XMMREG|RN_L16,MEMORY|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64637, 468, 4246}, + /* 2 : VPMASKMOVQ ymmreg,ymmreg*,mem256 [rvm: vex.nds.256.66.0f38.w1 8c /r ] AVX2,FUTURE */ + /* 261(002 205) 001(8c) 120 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPMASKMOVQ, 3, {YMMREG|RN_L16,YMMREG|RN_L16,MEMORY|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64644, 468, 4247}, + /* 3 : VPMASKMOVQ ymmreg,mem256 [r+vm: vex.nds.256.66.0f38.w1 8c /r ] ND,AVX2,FUTURE */ + /* 260(002 205) 001(8c) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPMASKMOVQ, 2, {YMMREG|RN_L16,MEMORY|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64651, 468, 4247}, + /* 4 : VPMASKMOVQ mem128,xmmreg,xmmreg [mvr: vex.nds.128.66.0f38.w1 8e /r ] AVX2,FUTURE */ + /* 261(002 201) 001(8e) 102 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPMASKMOVQ, 3, {MEMORY|BITS128|RN_L16,XMMREG|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64672, 468, 4251}, + /* 5 : VPMASKMOVQ mem256,ymmreg,ymmreg [mvr: vex.nds.256.66.0f38.w1 8e /r ] AVX2,FUTURE */ + /* 261(002 205) 001(8e) 102 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPMASKMOVQ, 3, {MEMORY|BITS256|RN_L16,YMMREG|RN_L16,YMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64679, 468, 4252}, +}; + +static const struct itemplate instrux_VPSLLVD[10] = { + /* 0 : VPSLLVD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38.w0 47 /r ] AVX2,FUTURE */ + /* 261(002 001) 001(47) 120 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPSLLVD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64686, 468, 4254}, + /* 1 : VPSLLVD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f38.w0 47 /r ] ND,AVX2,FUTURE */ + /* 260(002 001) 001(47) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPSLLVD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64693, 468, 4254}, + /* 2 : VPSLLVD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38.w0 47 /r ] AVX2,FUTURE */ + /* 261(002 005) 001(47) 120 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPSLLVD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64714, 468, 4256}, + /* 3 : VPSLLVD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f38.w0 47 /r ] ND,AVX2,FUTURE */ + /* 260(002 005) 001(47) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPSLLVD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64721, 468, 4256}, + /* 4 : VPSLLVD xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 47 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(47) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSLLVD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+41629, 543, 6537}, + /* 5 : VPSLLVD xmmreg|mask|z,xmmrm128|b32 [r+vm:fv: evex.nds.128.66.0f38.w0 47 /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f2 7d 08) 301 001(47) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSLLVD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+41638, 543, 6537}, + /* 6 : VPSLLVD ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 47 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(47) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSLLVD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+41647, 543, 6538}, + /* 7 : VPSLLVD ymmreg|mask|z,ymmrm256|b32 [r+vm:fv: evex.nds.256.66.0f38.w0 47 /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f2 7d 28) 301 001(47) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSLLVD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+41656, 543, 6538}, + /* 8 : VPSLLVD zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f38.w0 47 /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(47) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPSLLVD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+41665, 544, 6539}, + /* 9 : VPSLLVD zmmreg|mask|z,zmmrm512|b32 [r+vm:fv: evex.nds.512.66.0f38.w0 47 /r ] ND,AVX512,FUTURE */ + /* 240(f2 7d 48) 301 001(47) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPSLLVD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+41674, 544, 6539}, +}; + +static const struct itemplate instrux_VPSLLVQ[10] = { + /* 0 : VPSLLVQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38.w1 47 /r ] AVX2,FUTURE */ + /* 261(002 201) 001(47) 120 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPSLLVQ, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64700, 468, 4255}, + /* 1 : VPSLLVQ xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f38.w1 47 /r ] ND,AVX2,FUTURE */ + /* 260(002 201) 001(47) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPSLLVQ, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64707, 468, 4255}, + /* 2 : VPSLLVQ ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38.w1 47 /r ] AVX2,FUTURE */ + /* 261(002 205) 001(47) 120 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPSLLVQ, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64728, 468, 4257}, + /* 3 : VPSLLVQ ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f38.w1 47 /r ] ND,AVX2,FUTURE */ + /* 260(002 205) 001(47) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPSLLVQ, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64735, 468, 4257}, + /* 4 : VPSLLVQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 47 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(47) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSLLVQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+41683, 543, 6540}, + /* 5 : VPSLLVQ xmmreg|mask|z,xmmrm128|b64 [r+vm:fv: evex.nds.128.66.0f38.w1 47 /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f2 fd 08) 301 001(47) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSLLVQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+41692, 543, 6540}, + /* 6 : VPSLLVQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 47 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(47) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSLLVQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+41701, 543, 6541}, + /* 7 : VPSLLVQ ymmreg|mask|z,ymmrm256|b64 [r+vm:fv: evex.nds.256.66.0f38.w1 47 /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f2 fd 28) 301 001(47) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSLLVQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+41710, 543, 6541}, + /* 8 : VPSLLVQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 47 /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(47) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPSLLVQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+41719, 544, 6542}, + /* 9 : VPSLLVQ zmmreg|mask|z,zmmrm512|b64 [r+vm:fv: evex.nds.512.66.0f38.w1 47 /r ] ND,AVX512,FUTURE */ + /* 240(f2 fd 48) 301 001(47) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPSLLVQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+41728, 544, 6542}, +}; + +static const struct itemplate instrux_VPSRAVD[10] = { + /* 0 : VPSRAVD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38.w0 46 /r ] AVX2,FUTURE */ + /* 261(002 001) 001(46) 120 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPSRAVD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64742, 468, 4259}, + /* 1 : VPSRAVD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f38.w0 46 /r ] ND,AVX2,FUTURE */ + /* 260(002 001) 001(46) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPSRAVD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64749, 468, 4259}, + /* 2 : VPSRAVD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38.w0 46 /r ] AVX2,FUTURE */ + /* 261(002 005) 001(46) 120 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPSRAVD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64756, 468, 4260}, + /* 3 : VPSRAVD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f38.w0 46 /r ] ND,AVX2,FUTURE */ + /* 260(002 005) 001(46) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPSRAVD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64763, 468, 4260}, + /* 4 : VPSRAVD xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 46 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(46) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSRAVD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+41953, 543, 6564}, + /* 5 : VPSRAVD xmmreg|mask|z,xmmrm128|b32 [r+vm:fv: evex.nds.128.66.0f38.w0 46 /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f2 7d 08) 301 001(46) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSRAVD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+41962, 543, 6564}, + /* 6 : VPSRAVD ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 46 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(46) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSRAVD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+41971, 543, 6565}, + /* 7 : VPSRAVD ymmreg|mask|z,ymmrm256|b32 [r+vm:fv: evex.nds.256.66.0f38.w0 46 /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f2 7d 28) 301 001(46) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSRAVD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+41980, 543, 6565}, + /* 8 : VPSRAVD zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f38.w0 46 /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(46) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPSRAVD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+41989, 544, 6566}, + /* 9 : VPSRAVD zmmreg|mask|z,zmmrm512|b32 [r+vm:fv: evex.nds.512.66.0f38.w0 46 /r ] ND,AVX512,FUTURE */ + /* 240(f2 7d 48) 301 001(46) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPSRAVD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+41998, 544, 6566}, +}; + +static const struct itemplate instrux_VPSRLVD[10] = { + /* 0 : VPSRLVD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38.w0 45 /r ] AVX2,FUTURE */ + /* 261(002 001) 001(45) 120 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPSRLVD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64770, 468, 4262}, + /* 1 : VPSRLVD xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f38.w0 45 /r ] ND,AVX2,FUTURE */ + /* 260(002 001) 001(45) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPSRLVD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64777, 468, 4262}, + /* 2 : VPSRLVD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38.w0 45 /r ] AVX2,FUTURE */ + /* 261(002 005) 001(45) 120 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPSRLVD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64798, 468, 4264}, + /* 3 : VPSRLVD ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f38.w0 45 /r ] ND,AVX2,FUTURE */ + /* 260(002 005) 001(45) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPSRLVD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64805, 468, 4264}, + /* 4 : VPSRLVD xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 45 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(45) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSRLVD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+42277, 543, 6594}, + /* 5 : VPSRLVD xmmreg|mask|z,xmmrm128|b32 [r+vm:fv: evex.nds.128.66.0f38.w0 45 /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f2 7d 08) 301 001(45) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSRLVD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+42286, 543, 6594}, + /* 6 : VPSRLVD ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 45 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(45) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSRLVD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+42295, 543, 6595}, + /* 7 : VPSRLVD ymmreg|mask|z,ymmrm256|b32 [r+vm:fv: evex.nds.256.66.0f38.w0 45 /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f2 7d 28) 301 001(45) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSRLVD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+42304, 543, 6595}, + /* 8 : VPSRLVD zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f38.w0 45 /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(45) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPSRLVD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+42313, 544, 6596}, + /* 9 : VPSRLVD zmmreg|mask|z,zmmrm512|b32 [r+vm:fv: evex.nds.512.66.0f38.w0 45 /r ] ND,AVX512,FUTURE */ + /* 240(f2 7d 48) 301 001(45) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPSRLVD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+42322, 544, 6596}, +}; + +static const struct itemplate instrux_VPSRLVQ[10] = { + /* 0 : VPSRLVQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38.w1 45 /r ] AVX2,FUTURE */ + /* 261(002 201) 001(45) 120 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPSRLVQ, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64784, 468, 4263}, + /* 1 : VPSRLVQ xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f38.w1 45 /r ] ND,AVX2,FUTURE */ + /* 260(002 201) 001(45) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPSRLVQ, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64791, 468, 4263}, + /* 2 : VPSRLVQ ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38.w1 45 /r ] AVX2,FUTURE */ + /* 261(002 205) 001(45) 120 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPSRLVQ, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64812, 468, 4265}, + /* 3 : VPSRLVQ ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f38.w1 45 /r ] ND,AVX2,FUTURE */ + /* 260(002 205) 001(45) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPSRLVQ, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64819, 468, 4265}, + /* 4 : VPSRLVQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 45 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(45) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSRLVQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+42331, 543, 6597}, + /* 5 : VPSRLVQ xmmreg|mask|z,xmmrm128|b64 [r+vm:fv: evex.nds.128.66.0f38.w1 45 /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f2 fd 08) 301 001(45) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSRLVQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+42340, 543, 6597}, + /* 6 : VPSRLVQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 45 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(45) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSRLVQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+42349, 543, 6598}, + /* 7 : VPSRLVQ ymmreg|mask|z,ymmrm256|b64 [r+vm:fv: evex.nds.256.66.0f38.w1 45 /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f2 fd 28) 301 001(45) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSRLVQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+42358, 543, 6598}, + /* 8 : VPSRLVQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 45 /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(45) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPSRLVQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+42367, 544, 6599}, + /* 9 : VPSRLVQ zmmreg|mask|z,zmmrm512|b64 [r+vm:fv: evex.nds.512.66.0f38.w1 45 /r ] ND,AVX512,FUTURE */ + /* 240(f2 fd 48) 301 001(45) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPSRLVQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+42376, 544, 6599}, +}; + +static const struct itemplate instrux_VGATHERDPD[5] = { + /* 0 : VGATHERDPD xmmreg,xmem64,xmmreg [rmv: vm32x vex.dds.128.66.0f38.w1 92 /r] AVX2,FUTURE */ + /* 374 262(002 201) 001(92) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VGATHERDPD, 3, {XMMREG|RN_L16,XMEM|BITS64|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+54579, 468, 4267}, + /* 1 : VGATHERDPD ymmreg,xmem64,ymmreg [rmv: vm32x vex.dds.256.66.0f38.w1 92 /r] AVX2,FUTURE */ + /* 374 262(002 205) 001(92) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VGATHERDPD, 3, {YMMREG|RN_L16,XMEM|BITS64|RN_L16,YMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+54595, 468, 4269}, + /* 2 : VGATHERDPD xmmreg|mask,xmem64 [rm:t1s: vsibx evex.128.66.0f38.w1 92 /r ] AVX512,AVX512VL,FUTURE */ + /* 374 250(f2 fd 08) 306 001(92) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VGATHERDPD, 2, {XMMREG,XMEM|BITS64,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+18913, 543, 5481}, + /* 3 : VGATHERDPD ymmreg|mask,xmem64 [rm:t1s: vsibx evex.256.66.0f38.w1 92 /r ] AVX512,AVX512VL,FUTURE */ + /* 374 250(f2 fd 28) 306 001(92) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VGATHERDPD, 2, {YMMREG,XMEM|BITS64,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+18923, 543, 5482}, + /* 4 : VGATHERDPD zmmreg|mask,ymem64 [rm:t1s: vsiby evex.512.66.0f38.w1 92 /r ] AVX512,FUTURE */ + /* 375 250(f2 fd 48) 306 001(92) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VGATHERDPD, 2, {ZMMREG,YMEM|BITS64,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+18933, 544, 5483}, +}; + +static const struct itemplate instrux_VGATHERQPD[5] = { + /* 0 : VGATHERQPD xmmreg,xmem64,xmmreg [rmv: vm64x vex.dds.128.66.0f38.w1 93 /r] AVX2,FUTURE */ + /* 374 262(002 201) 001(93) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VGATHERQPD, 3, {XMMREG|RN_L16,XMEM|BITS64|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+54587, 468, 4268}, + /* 1 : VGATHERQPD ymmreg,ymem64,ymmreg [rmv: vm64y vex.dds.256.66.0f38.w1 93 /r] AVX2,FUTURE */ + /* 375 262(002 205) 001(93) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VGATHERQPD, 3, {YMMREG|RN_L16,YMEM|BITS64|RN_L16,YMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+54603, 468, 4270}, + /* 2 : VGATHERQPD xmmreg|mask,xmem64 [rm:t1s: vsibx evex.128.66.0f38.w1 93 /r ] AVX512,AVX512VL,FUTURE */ + /* 374 250(f2 fd 08) 306 001(93) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VGATHERQPD, 2, {XMMREG,XMEM|BITS64,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+19053, 543, 5495}, + /* 3 : VGATHERQPD ymmreg|mask,ymem64 [rm:t1s: vsiby evex.256.66.0f38.w1 93 /r ] AVX512,AVX512VL,FUTURE */ + /* 375 250(f2 fd 28) 306 001(93) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VGATHERQPD, 2, {YMMREG,YMEM|BITS64,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+19063, 543, 5496}, + /* 4 : VGATHERQPD zmmreg|mask,zmem64 [rm:t1s: vsibz evex.512.66.0f38.w1 93 /r ] AVX512,FUTURE */ + /* 376 250(f2 fd 48) 306 001(93) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VGATHERQPD, 2, {ZMMREG,ZMEM|BITS64,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+19073, 544, 5497}, +}; + +static const struct itemplate instrux_VGATHERDPS[5] = { + /* 0 : VGATHERDPS xmmreg,xmem32,xmmreg [rmv: vm32x vex.dds.128.66.0f38.w0 92 /r] AVX2,FUTURE */ + /* 374 262(002 001) 001(92) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VGATHERDPS, 3, {XMMREG|RN_L16,XMEM|BITS32|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+54611, 468, 4272}, + /* 1 : VGATHERDPS ymmreg,ymem32,ymmreg [rmv: vm32y vex.dds.256.66.0f38.w0 92 /r] AVX2,FUTURE */ + /* 375 262(002 005) 001(92) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VGATHERDPS, 3, {YMMREG|RN_L16,YMEM|BITS32|RN_L16,YMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+54627, 468, 4274}, + /* 2 : VGATHERDPS xmmreg|mask,xmem32 [rm:t1s: vsibx evex.128.66.0f38.w0 92 /r ] AVX512,AVX512VL,FUTURE */ + /* 374 250(f2 7d 08) 306 001(92) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VGATHERDPS, 2, {XMMREG,XMEM|BITS32,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+18943, 543, 5484}, + /* 3 : VGATHERDPS ymmreg|mask,ymem32 [rm:t1s: vsiby evex.256.66.0f38.w0 92 /r ] AVX512,AVX512VL,FUTURE */ + /* 375 250(f2 7d 28) 306 001(92) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VGATHERDPS, 2, {YMMREG,YMEM|BITS32,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+18953, 543, 5485}, + /* 4 : VGATHERDPS zmmreg|mask,zmem32 [rm:t1s: vsibz evex.512.66.0f38.w0 92 /r ] AVX512,FUTURE */ + /* 376 250(f2 7d 48) 306 001(92) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VGATHERDPS, 2, {ZMMREG,ZMEM|BITS32,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+18963, 544, 5486}, +}; + +static const struct itemplate instrux_VGATHERQPS[5] = { + /* 0 : VGATHERQPS xmmreg,xmem32,xmmreg [rmv: vm64x vex.dds.128.66.0f38.w0 93 /r] AVX2,FUTURE */ + /* 374 262(002 001) 001(93) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VGATHERQPS, 3, {XMMREG|RN_L16,XMEM|BITS32|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+54619, 468, 4273}, + /* 1 : VGATHERQPS xmmreg,ymem32,xmmreg [rmv: vm64y vex.dds.256.66.0f38.w0 93 /r] AVX2,FUTURE */ + /* 375 262(002 005) 001(93) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VGATHERQPS, 3, {XMMREG|RN_L16,YMEM|BITS32|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+54635, 468, 4275}, + /* 2 : VGATHERQPS xmmreg|mask,xmem32 [rm:t1s: vsibx evex.128.66.0f38.w0 93 /r ] AVX512,AVX512VL,FUTURE */ + /* 374 250(f2 7d 08) 306 001(93) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VGATHERQPS, 2, {XMMREG,XMEM|BITS32,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+19083, 543, 5498}, + /* 3 : VGATHERQPS xmmreg|mask,ymem32 [rm:t1s: vsiby evex.256.66.0f38.w0 93 /r ] AVX512,AVX512VL,FUTURE */ + /* 375 250(f2 7d 28) 306 001(93) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VGATHERQPS, 2, {XMMREG,YMEM|BITS32,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+19093, 543, 5499}, + /* 4 : VGATHERQPS ymmreg|mask,zmem32 [rm:t1s: vsibz evex.512.66.0f38.w0 93 /r ] AVX512,FUTURE */ + /* 376 250(f2 7d 48) 306 001(93) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VGATHERQPS, 2, {YMMREG,ZMEM|BITS32,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+19103, 544, 5500}, +}; + +static const struct itemplate instrux_VPGATHERDD[5] = { + /* 0 : VPGATHERDD xmmreg,xmem32,xmmreg [rmv: vm32x vex.dds.128.66.0f38.w0 90 /r] AVX2,FUTURE */ + /* 374 262(002 001) 001(90) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPGATHERDD, 3, {XMMREG|RN_L16,XMEM|BITS32|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+54643, 468, 4277}, + /* 1 : VPGATHERDD ymmreg,ymem32,ymmreg [rmv: vm32y vex.dds.256.66.0f38.w0 90 /r] AVX2,FUTURE */ + /* 375 262(002 005) 001(90) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPGATHERDD, 3, {YMMREG|RN_L16,YMEM|BITS32|RN_L16,YMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+54659, 468, 4279}, + /* 2 : VPGATHERDD xmmreg|mask,xmem32 [rm:t1s: vsibx evex.128.66.0f38.w0 90 /r ] AVX512,AVX512VL,FUTURE */ + /* 374 250(f2 7d 08) 306 001(90) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPGATHERDD, 2, {XMMREG,XMEM|BITS32,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+19903, 543, 6186}, + /* 3 : VPGATHERDD ymmreg|mask,ymem32 [rm:t1s: vsiby evex.256.66.0f38.w0 90 /r ] AVX512,AVX512VL,FUTURE */ + /* 375 250(f2 7d 28) 306 001(90) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPGATHERDD, 2, {YMMREG,YMEM|BITS32,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+19913, 543, 6187}, + /* 4 : VPGATHERDD zmmreg|mask,zmem32 [rm:t1s: vsibz evex.512.66.0f38.w0 90 /r ] AVX512,FUTURE */ + /* 376 250(f2 7d 48) 306 001(90) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPGATHERDD, 2, {ZMMREG,ZMEM|BITS32,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+19923, 544, 6188}, +}; + +static const struct itemplate instrux_VPGATHERQD[5] = { + /* 0 : VPGATHERQD xmmreg,xmem32,xmmreg [rmv: vm64x vex.dds.128.66.0f38.w0 91 /r] AVX2,FUTURE */ + /* 374 262(002 001) 001(91) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPGATHERQD, 3, {XMMREG|RN_L16,XMEM|BITS32|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+54651, 468, 4278}, + /* 1 : VPGATHERQD xmmreg,ymem32,xmmreg [rmv: vm64y vex.dds.256.66.0f38.w0 91 /r] AVX2,FUTURE */ + /* 375 262(002 005) 001(91) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPGATHERQD, 3, {XMMREG|RN_L16,YMEM|BITS32|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+54667, 468, 4280}, + /* 2 : VPGATHERQD xmmreg|mask,xmem32 [rm:t1s: vsibx evex.128.66.0f38.w0 91 /r ] AVX512,AVX512VL,FUTURE */ + /* 374 250(f2 7d 08) 306 001(91) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPGATHERQD, 2, {XMMREG,XMEM|BITS32,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+19963, 543, 6192}, + /* 3 : VPGATHERQD xmmreg|mask,ymem32 [rm:t1s: vsiby evex.256.66.0f38.w0 91 /r ] AVX512,AVX512VL,FUTURE */ + /* 375 250(f2 7d 28) 306 001(91) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPGATHERQD, 2, {XMMREG,YMEM|BITS32,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+19973, 543, 6193}, + /* 4 : VPGATHERQD ymmreg|mask,zmem32 [rm:t1s: vsibz evex.512.66.0f38.w0 91 /r ] AVX512,FUTURE */ + /* 376 250(f2 7d 48) 306 001(91) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPGATHERQD, 2, {YMMREG,ZMEM|BITS32,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+19983, 544, 6194}, +}; + +static const struct itemplate instrux_VPGATHERDQ[5] = { + /* 0 : VPGATHERDQ xmmreg,xmem64,xmmreg [rmv: vm32x vex.dds.128.66.0f38.w1 90 /r] AVX2,FUTURE */ + /* 374 262(002 201) 001(90) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPGATHERDQ, 3, {XMMREG|RN_L16,XMEM|BITS64|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+54675, 468, 4282}, + /* 1 : VPGATHERDQ ymmreg,xmem64,ymmreg [rmv: vm32x vex.dds.256.66.0f38.w1 90 /r] AVX2,FUTURE */ + /* 374 262(002 205) 001(90) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPGATHERDQ, 3, {YMMREG|RN_L16,XMEM|BITS64|RN_L16,YMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+54691, 468, 4284}, + /* 2 : VPGATHERDQ xmmreg|mask,xmem64 [rm:t1s: vsibx evex.128.66.0f38.w1 90 /r ] AVX512,AVX512VL,FUTURE */ + /* 374 250(f2 fd 08) 306 001(90) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPGATHERDQ, 2, {XMMREG,XMEM|BITS64,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+19933, 543, 6189}, + /* 3 : VPGATHERDQ ymmreg|mask,xmem64 [rm:t1s: vsibx evex.256.66.0f38.w1 90 /r ] AVX512,AVX512VL,FUTURE */ + /* 374 250(f2 fd 28) 306 001(90) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPGATHERDQ, 2, {YMMREG,XMEM|BITS64,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+19943, 543, 6190}, + /* 4 : VPGATHERDQ zmmreg|mask,ymem64 [rm:t1s: vsiby evex.512.66.0f38.w1 90 /r ] AVX512,FUTURE */ + /* 375 250(f2 fd 48) 306 001(90) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPGATHERDQ, 2, {ZMMREG,YMEM|BITS64,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+19953, 544, 6191}, +}; + +static const struct itemplate instrux_VPGATHERQQ[5] = { + /* 0 : VPGATHERQQ xmmreg,xmem64,xmmreg [rmv: vm64x vex.dds.128.66.0f38.w1 91 /r] AVX2,FUTURE */ + /* 374 262(002 201) 001(91) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPGATHERQQ, 3, {XMMREG|RN_L16,XMEM|BITS64|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+54683, 468, 4283}, + /* 1 : VPGATHERQQ ymmreg,ymem64,ymmreg [rmv: vm64y vex.dds.256.66.0f38.w1 91 /r] AVX2,FUTURE */ + /* 375 262(002 205) 001(91) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPGATHERQQ, 3, {YMMREG|RN_L16,YMEM|BITS64|RN_L16,YMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+54699, 468, 4285}, + /* 2 : VPGATHERQQ xmmreg|mask,xmem64 [rm:t1s: vsibx evex.128.66.0f38.w1 91 /r ] AVX512,AVX512VL,FUTURE */ + /* 374 250(f2 fd 08) 306 001(91) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPGATHERQQ, 2, {XMMREG,XMEM|BITS64,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+19993, 543, 6195}, + /* 3 : VPGATHERQQ ymmreg|mask,ymem64 [rm:t1s: vsiby evex.256.66.0f38.w1 91 /r ] AVX512,AVX512VL,FUTURE */ + /* 375 250(f2 fd 28) 306 001(91) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPGATHERQQ, 2, {YMMREG,YMEM|BITS64,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+20003, 543, 6196}, + /* 4 : VPGATHERQQ zmmreg|mask,zmem64 [rm:t1s: vsibz evex.512.66.0f38.w1 91 /r ] AVX512,FUTURE */ + /* 376 250(f2 fd 48) 306 001(91) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPGATHERQQ, 2, {ZMMREG,ZMEM|BITS64,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+20013, 544, 6197}, +}; + +static const struct itemplate instrux_XABORT[1] = { + /* 0 : XABORT imm8 [i: c6 f8 ib ] RTM,FUTURE */ + /* 002(c6 f8) 020 : RTM,FUTURE */ + {I_XABORT, 1, {IMM_NORMAL|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72519, 469, 4288}, +}; + +static const struct itemplate instrux_XBEGIN[4] = { + /* 0 : XBEGIN imm16|near [i: nw o16 c7 f8 rel ] AR0,OSIZE,NOREX,NOAPX,NOLONG,RTM,FUTURE */ + /* 327 320 002(c7 f8) 064 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,RTM,FUTURE */ + {I_XBEGIN, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+64826, 470, 4289}, + /* 1 : XBEGIN imm32|near [i: nw o32 c7 f8 rel ] AR0,OSIZE,NOREX,NOAPX,NOLONG,RTM,FUTURE */ + /* 327 321 002(c7 f8) 064 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,RTM,FUTURE */ + {I_XBEGIN, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+64833, 470, 4290}, + /* 2 : XBEGIN imm64|near [i: nw o64 c7 f8 rel ] AR0,OSIZE,LONG,PROT,RTM,X86_64 */ + /* 327 324 002(c7 f8) 064 : AR0,NWSIZE,OSIZE,LONG,PROT,RTM,X86_64 */ + {I_XBEGIN, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+64840, 471, 4291}, + /* 3 : XBEGIN imm32|near [i: nw o64 c7 f8 rel ] ND,AR0,SX,LONG,PROT,RTM,X86_64 */ + /* 327 324 002(c7 f8) 064 : AR0,NWSIZE,SX,LONG,PROT,RTM,X86_64 */ + {I_XBEGIN, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+64840, 472, 4292}, +}; + +static const struct itemplate instrux_XEND[1] = { + /* 0 : XEND void [ 0f 01 d5 ] RTM,FUTURE */ + /* 355 002(01 d5) : RTM,FUTURE */ + {I_XEND, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72524, 469, 4293}, +}; + +static const struct itemplate instrux_XTEST[1] = { + /* 0 : XTEST void [ 0f 01 d6 ] HLE,FL,RTM,FUTURE */ + /* 355 002(01 d6) : HLE,FL,RTM,FUTURE */ + {I_XTEST, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72529, 473, 4294}, +}; + +static const struct itemplate instrux_PREFETCHWT1[1] = { + /* 0 : PREFETCHWT1 mem8 [m: 0f 0d /2 ] PREFETCHWT1,FUTURE */ + /* 355 001(0d) 202 : PREFETCHWT1,FUTURE */ + {I_PREFETCHWT1, 1, {MEMORY|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72534, 474, 4296}, +}; + +static const struct itemplate instrux_BNDMK[1] = { + /* 0 : BNDMK bndreg,mem [rm: f3 0f 1b /r ] MIB,MPX,FUTURE */ + /* 333 355 001(1b) 110 : MIB,MPX,FUTURE */ + {I_BNDMK, 2, {BNDREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+70023, 475, 4299}, +}; + +static const struct itemplate instrux_BNDCL[3] = { + /* 0 : BNDCL bndreg,mem [rm: f3 0f 1a /r ] MPX,FUTURE */ + /* 333 355 001(1a) 110 : MPX,FUTURE */ + {I_BNDCL, 2, {BNDREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+64848, 476, 4300}, + /* 1 : BNDCL bndreg,reg32 [rm: f3 0f 1a /r ] NOREX,NOAPX,NOLONG,MPX,FUTURE */ + /* 333 355 001(1a) 110 : NOREX,NOAPX,NOLONG,MPX,FUTURE */ + {I_BNDCL, 2, {BNDREG|RN_L16,REG_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64848, 477, 4301}, + /* 2 : BNDCL bndreg,reg64 [rm: o64nw f3 0f 1a /r ] LONG,PROT,MPX,X86_64 */ + /* 323 333 355 001(1a) 110 : NWSIZE,LONG,PROT,MPX,X86_64 */ + {I_BNDCL, 2, {BNDREG,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+64847, 478, 4302}, +}; + +static const struct itemplate instrux_BNDCU[3] = { + /* 0 : BNDCU bndreg,mem [rm: f2 0f 1a /r ] MPX,FUTURE */ + /* 332 355 001(1a) 110 : MPX,FUTURE */ + {I_BNDCU, 2, {BNDREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+64855, 476, 4303}, + /* 1 : BNDCU bndreg,reg32 [rm: f2 0f 1a /r ] NOREX,NOAPX,NOLONG,MPX,FUTURE */ + /* 332 355 001(1a) 110 : NOREX,NOAPX,NOLONG,MPX,FUTURE */ + {I_BNDCU, 2, {BNDREG|RN_L16,REG_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64855, 477, 4304}, + /* 2 : BNDCU bndreg,reg64 [rm: o64nw f2 0f 1a /r ] LONG,PROT,MPX,X86_64 */ + /* 323 332 355 001(1a) 110 : NWSIZE,LONG,PROT,MPX,X86_64 */ + {I_BNDCU, 2, {BNDREG,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+64854, 478, 4305}, +}; + +static const struct itemplate instrux_BNDCN[3] = { + /* 0 : BNDCN bndreg,mem [rm: f2 0f 1b /r ] MPX,FUTURE */ + /* 332 355 001(1b) 110 : MPX,FUTURE */ + {I_BNDCN, 2, {BNDREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+64862, 476, 4306}, + /* 1 : BNDCN bndreg,reg32 [rm: f2 0f 1b /r ] NOREX,NOAPX,NOLONG,MPX,FUTURE */ + /* 332 355 001(1b) 110 : NOREX,NOAPX,NOLONG,MPX,FUTURE */ + {I_BNDCN, 2, {BNDREG|RN_L16,REG_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64862, 477, 4307}, + /* 2 : BNDCN bndreg,reg64 [rm: o64nw f2 0f 1b /r ] LONG,PROT,MPX,X86_64 */ + /* 323 332 355 001(1b) 110 : NWSIZE,LONG,PROT,MPX,X86_64 */ + {I_BNDCN, 2, {BNDREG,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+64861, 478, 4308}, +}; + +static const struct itemplate instrux_BNDMOV[4] = { + /* 0 : BNDMOV bndreg,bndreg [rm: 66 0f 1a /r ] MPX,FUTURE */ + /* 361 355 001(1a) 110 : MPX,FUTURE */ + {I_BNDMOV, 2, {BNDREG,BNDREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+70029, 476, 4309}, + /* 1 : BNDMOV bndreg,mem [rm: 66 0f 1a /r ] MPX,FUTURE */ + /* 361 355 001(1a) 110 : MPX,FUTURE */ + {I_BNDMOV, 2, {BNDREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+70029, 476, 4310}, + /* 2 : BNDMOV bndreg,bndreg [mr: 66 0f 1b /r ] MPX,FUTURE */ + /* 361 355 001(1b) 101 : MPX,FUTURE */ + {I_BNDMOV, 2, {BNDREG,BNDREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+70035, 476, 4311}, + /* 3 : BNDMOV mem,bndreg [mr: 66 0f 1b /r ] MPX,FUTURE */ + /* 361 355 001(1b) 101 : MPX,FUTURE */ + {I_BNDMOV, 2, {MEMORY,BNDREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+70035, 476, 4312}, +}; + +static const struct itemplate instrux_BNDLDX[3] = { + /* 0 : BNDLDX bndreg,mem [rm: 0f 1a /r ] MIB,MPX,FUTURE */ + /* 355 001(1a) 110 : MIB,MPX,FUTURE */ + {I_BNDLDX, 2, {BNDREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+70030, 475, 4313}, + /* 1 : BNDLDX bndreg,mem,reg32 [rmx: 0f 1a /r ] NOREX,NOAPX,NOLONG,MIB,MPX,FUTURE */ + /* 355 001(1a) 016 110 : NOREX,NOAPX,NOLONG,MIB,MPX,FUTURE */ + {I_BNDLDX, 3, {BNDREG|RN_L16,MEMORY|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+70041, 479, 4314}, + /* 2 : BNDLDX bndreg,mem,reg64 [rmx: 0f 1a /r ] LONG,MIB,PROT,MPX,X86_64 */ + /* 355 001(1a) 016 110 : LONG,MIB,PROT,MPX,X86_64 */ + {I_BNDLDX, 3, {BNDREG,MEMORY,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+70041, 480, 4315}, +}; + +static const struct itemplate instrux_BNDSTX[5] = { + /* 0 : BNDSTX mem,bndreg [mr: 0f 1b /r ] MIB,MPX,FUTURE */ + /* 355 001(1b) 101 : MIB,MPX,FUTURE */ + {I_BNDSTX, 2, {MEMORY,BNDREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+70036, 475, 4316}, + /* 1 : BNDSTX mem,reg32,bndreg [mxr: 0f 1b /r ] NOREX,NOAPX,NOLONG,MIB,MPX,FUTURE */ + /* 355 001(1b) 015 102 : NOREX,NOAPX,NOLONG,MIB,MPX,FUTURE */ + {I_BNDSTX, 3, {MEMORY|RN_L16,REG_GPR|BITS32|RN_L16,BNDREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+70047, 479, 4317}, + /* 2 : BNDSTX mem,reg64,bndreg [mxr: 0f 1b /r ] LONG,MIB,PROT,MPX,X86_64 */ + /* 355 001(1b) 015 102 : LONG,MIB,PROT,MPX,X86_64 */ + {I_BNDSTX, 3, {MEMORY,REG_GPR|BITS64,BNDREG,0,0}, NO_DECORATOR, nasm_bytecodes+70047, 480, 4318}, + /* 3 : BNDSTX mem,bndreg,reg32 [mrx: 0f 1b /r ] NOREX,NOAPX,NOLONG,MIB,MPX,FUTURE */ + /* 355 001(1b) 016 101 : NOREX,NOAPX,NOLONG,MIB,MPX,FUTURE */ + {I_BNDSTX, 3, {MEMORY|RN_L16,BNDREG|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+70053, 479, 4319}, + /* 4 : BNDSTX mem,bndreg,reg64 [mrx: 0f 1b /r ] LONG,MIB,PROT,MPX,X86_64 */ + /* 355 001(1b) 016 101 : LONG,MIB,PROT,MPX,X86_64 */ + {I_BNDSTX, 3, {MEMORY,BNDREG,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+70053, 480, 4320}, +}; + +static const struct itemplate instrux_SHA1MSG1[1] = { + /* 0 : SHA1MSG1 xmmreg,xmmrm128 [rm: 0f38 c9 /r ] SHA,FUTURE */ + /* 356 001(c9) 110 : NOAPX,SHA,FUTURE */ + {I_SHA1MSG1, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+72539, 481, 4323}, +}; + +static const struct itemplate instrux_SHA1MSG2[1] = { + /* 0 : SHA1MSG2 xmmreg,xmmrm128 [rm: 0f38 ca /r ] SHA,FUTURE */ + /* 356 001(ca) 110 : NOAPX,SHA,FUTURE */ + {I_SHA1MSG2, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+72544, 481, 4324}, +}; + +static const struct itemplate instrux_SHA1NEXTE[1] = { + /* 0 : SHA1NEXTE xmmreg,xmmrm128 [rm: 0f38 c8 /r ] SHA,FUTURE */ + /* 356 001(c8) 110 : NOAPX,SHA,FUTURE */ + {I_SHA1NEXTE, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+72549, 481, 4325}, +}; + +static const struct itemplate instrux_SHA1RNDS4[1] = { + /* 0 : SHA1RNDS4 xmmreg,xmmrm128,imm8 [rmi: 0f3a cc /r ib ] SHA,FUTURE */ + /* 357 001(cc) 110 022 : NOAPX,SHA,FUTURE */ + {I_SHA1RNDS4, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+70059, 481, 4326}, +}; + +static const struct itemplate instrux_SHA256MSG1[1] = { + /* 0 : SHA256MSG1 xmmreg,xmmrm128 [rm: 0f38 cc /r ] SHA,FUTURE */ + /* 356 001(cc) 110 : NOAPX,SHA,FUTURE */ + {I_SHA256MSG1, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+72554, 481, 4327}, +}; + +static const struct itemplate instrux_SHA256MSG2[1] = { + /* 0 : SHA256MSG2 xmmreg,xmmrm128 [rm: 0f38 cd /r ] SHA,FUTURE */ + /* 356 001(cd) 110 : NOAPX,SHA,FUTURE */ + {I_SHA256MSG2, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+72559, 481, 4328}, +}; + +static const struct itemplate instrux_SHA256RNDS2[2] = { + /* 0 : SHA256RNDS2 xmmreg,xmmrm128,xmm0 [rm-: 0f38 cb /r ] SHA,FUTURE */ + /* 356 001(cb) 110 : NOAPX,SHA,FUTURE */ + {I_SHA256RNDS2, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_ZERO|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+72564, 481, 4329}, + /* 1 : SHA256RNDS2 xmmreg,xmmrm128 [rm: 0f38 cb /r ] SHA,FUTURE */ + /* 356 001(cb) 110 : NOAPX,SHA,FUTURE */ + {I_SHA256RNDS2, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+72564, 481, 4330}, +}; + +static const struct itemplate instrux_VSHA512MSG1[1] = { + /* 0 : VSHA512MSG1 ymmreg,xmmreg [rm: vex.256.f2.0f38.w0 cc /r ] AVX,SHA512,FUTURE */ + /* 270(002 007) 001(cc) 110 : NOAPX,VEX,AVX,SHA512,FUTURE */ + {I_VSHA512MSG1, 2, {YMMREG|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64868, 482, 4331}, +}; + +static const struct itemplate instrux_VSHA512MSG2[1] = { + /* 0 : VSHA512MSG2 ymmreg,ymmreg [rm: vex.256.f2.0f38.w0 cd /r ] AVX,SHA512,FUTURE */ + /* 270(002 007) 001(cd) 110 : NOAPX,VEX,AVX,SHA512,FUTURE */ + {I_VSHA512MSG2, 2, {YMMREG|RN_L16,YMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64875, 482, 4332}, +}; + +static const struct itemplate instrux_VSHA512RNDS2[1] = { + /* 0 : VSHA512RNDS2 ymmreg,ymmreg,xmmreg [rvm: vex.nds.256.f2.0f38.w0 cb /r ] AVX,SHA512,FUTURE */ + /* 261(002 007) 001(cb) 120 : NOAPX,VEX,AVX,SHA512,FUTURE */ + {I_VSHA512RNDS2, 3, {YMMREG|RN_L16,YMMREG|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64882, 482, 4333}, +}; + +static const struct itemplate instrux_VSM3MSG1[1] = { + /* 0 : VSM3MSG1 xmmreg,xmmreg,xmmreg [rvm: vex.nds.128.p0.0f38.w0 da /r ] AVX,HSM3,FUTURE */ + /* 261(002 000) 001(da) 120 : NOAPX,VEX,AVX,HSM3,FUTURE */ + {I_VSM3MSG1, 3, {XMMREG|RN_L16,XMMREG|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64889, 483, 4336}, +}; + +static const struct itemplate instrux_VSM3MSG2[1] = { + /* 0 : VSM3MSG2 xmmreg,xmmreg,xmmreg [rvm: vex.nds.128.66.0f38.w0 da /r ] AVX,HSM3,FUTURE */ + /* 261(002 001) 001(da) 120 : NOAPX,VEX,AVX,HSM3,FUTURE */ + {I_VSM3MSG2, 3, {XMMREG|RN_L16,XMMREG|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64896, 483, 4337}, +}; + +static const struct itemplate instrux_VSM3RNDS2[1] = { + /* 0 : VSM3RNDS2 xmmreg,xmmreg,xmmreg,imm8 [rvmi: vex.nds.128.66.0f3a.w0 de /r ib ] AVX,HSM3,FUTURE */ + /* 261(003 001) 001(de) 120 023 : NOAPX,VEX,AVX,HSM3,FUTURE */ + {I_VSM3RNDS2, 4, {XMMREG|RN_L16,XMMREG|RN_L16,XMMREG|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+54707, 483, 4338}, +}; + +static const struct itemplate instrux_VSM4KEY4[5] = { + /* 0 : VSM4KEY4 xmmreg,xmmreg,xmmrm128 [rvm: vex.nds.128.f3.0f38.w0 da /r ] AVX,HSM4,FUTURE */ + /* 261(002 002) 001(da) 120 : NOAPX,VEX,AVX,HSM4,FUTURE */ + {I_VSM4KEY4, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64903, 484, 4341}, + /* 1 : VSM4KEY4 ymmreg,ymmreg,ymmrm256 [rvm: vex.nds.256.f3.0f38.w0 da /r ] AVX,HSM4,FUTURE */ + /* 261(002 006) 001(da) 120 : NOAPX,VEX,AVX,HSM4,FUTURE */ + {I_VSM4KEY4, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64910, 484, 4342}, + /* 2 : VSM4KEY4 xmmreg,xmmreg,xmmrm128 [rvm: evex.nds.128.f3.0f38.w0 da /r ] AVX,HSM4,FUTURE */ + /* 241(f2 7e 08) 300 001(da) 120 : EVEX,PROT,AVX,HSM4,FUTURE */ + {I_VSM4KEY4, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+29560, 485, 4343}, + /* 3 : VSM4KEY4 ymmreg,ymmreg,ymmrm256 [rvm: evex.nds.256.f3.0f38.w0 da /r ] AVX,HSM4,FUTURE */ + /* 241(f2 7e 28) 300 001(da) 120 : EVEX,PROT,AVX,HSM4,FUTURE */ + {I_VSM4KEY4, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+29569, 485, 4344}, + /* 4 : VSM4KEY4 zmmreg,zmmreg,zmmrm512 [rvm: evex.nds.512.f3.0f38.w0 da /r ] AVX,HSM4,FUTURE */ + /* 241(f2 7e 48) 300 001(da) 120 : EVEX,PROT,AVX,HSM4,FUTURE */ + {I_VSM4KEY4, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, NO_DECORATOR, nasm_bytecodes+29578, 485, 4345}, +}; + +static const struct itemplate instrux_VSM4RNDS4[5] = { + /* 0 : VSM4RNDS4 xmmreg,xmmreg,xmmrm128 [rvm: vex.nds.128.f2.0f38.w0 da /r ] AVX,HSM4,FUTURE */ + /* 261(002 003) 001(da) 120 : NOAPX,VEX,AVX,HSM4,FUTURE */ + {I_VSM4RNDS4, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64917, 484, 4346}, + /* 1 : VSM4RNDS4 ymmreg,ymmreg,ymmrm256 [rvm: vex.nds.256.f2.0f38.w0 da /r ] AVX,HSM4,FUTURE */ + /* 261(002 007) 001(da) 120 : NOAPX,VEX,AVX,HSM4,FUTURE */ + {I_VSM4RNDS4, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64924, 484, 4347}, + /* 2 : VSM4RNDS4 xmmreg,xmmreg,xmmrm128 [rvm: evex.nds.128.f2.0f38.w0 da /r ] AVX,HSM4,FUTURE */ + /* 241(f2 7f 08) 300 001(da) 120 : EVEX,PROT,AVX,HSM4,FUTURE */ + {I_VSM4RNDS4, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+29587, 485, 4348}, + /* 3 : VSM4RNDS4 ymmreg,ymmreg,ymmrm256 [rvm: evex.nds.256.f2.0f38.w0 da /r ] AVX,HSM4,FUTURE */ + /* 241(f2 7f 28) 300 001(da) 120 : EVEX,PROT,AVX,HSM4,FUTURE */ + {I_VSM4RNDS4, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+29596, 485, 4349}, + /* 4 : VSM4RNDS4 zmmreg,zmmreg,zmmrm512 [rvm: evex.nds.512.f2.0f38.w0 da /r ] AVX,HSM4,FUTURE */ + /* 241(f2 7f 48) 300 001(da) 120 : EVEX,PROT,AVX,HSM4,FUTURE */ + {I_VSM4RNDS4, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, NO_DECORATOR, nasm_bytecodes+29605, 485, 4350}, +}; + +static const struct itemplate instrux_VBCSTNEBF16PS[2] = { + /* 0 : VBCSTNEBF16PS xmmreg,mem16 [rm: vex.128.f3.0f38.w0 b1 /r ] AR0-1,SW,AVXNECONVERT,FUTURE */ + /* 270(002 002) 001(b1) 110 : AR0,AR1,SW,NOAPX,VEX,AVXNECONVERT,FUTURE */ + {I_VBCSTNEBF16PS, 2, {XMMREG|RN_L16,MEMORY|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64931, 486, 4354}, + /* 1 : VBCSTNEBF16PS ymmreg,mem16 [rm: vex.256.f3.0f38.w0 b1 /r ] AR0-1,SW,AVXNECONVERT,FUTURE */ + /* 270(002 006) 001(b1) 110 : AR0,AR1,SW,NOAPX,VEX,AVXNECONVERT,FUTURE */ + {I_VBCSTNEBF16PS, 2, {YMMREG|RN_L16,MEMORY|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64938, 486, 4355}, +}; + +static const struct itemplate instrux_VBCSTNEBF162PS[2] = { + /* 0 : VBCSTNEBF162PS xmmreg,mem16 [rm: vex.128.f3.0f38.w0 b1 /r ] AR0-1,SW,AVXNECONVERT,FUTURE */ + /* 270(002 002) 001(b1) 110 : AR0,AR1,SW,NOAPX,VEX,AVXNECONVERT,FUTURE */ + {I_VBCSTNEBF162PS, 2, {XMMREG|RN_L16,MEMORY|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64931, 486, 4356}, + /* 1 : VBCSTNEBF162PS ymmreg,mem16 [rm: vex.256.f3.0f38.w0 b1 /r ] AR0-1,SW,AVXNECONVERT,FUTURE */ + /* 270(002 006) 001(b1) 110 : AR0,AR1,SW,NOAPX,VEX,AVXNECONVERT,FUTURE */ + {I_VBCSTNEBF162PS, 2, {YMMREG|RN_L16,MEMORY|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64938, 486, 4357}, +}; + +static const struct itemplate instrux_VBCSTNESH2PS[2] = { + /* 0 : VBCSTNESH2PS xmmreg,mem16 [rm: vex.128.66.0f38.w0 b1 /r ] AR0-1,SW,AVXNECONVERT,FUTURE */ + /* 270(002 001) 001(b1) 110 : AR0,AR1,SW,NOAPX,VEX,AVXNECONVERT,FUTURE */ + {I_VBCSTNESH2PS, 2, {XMMREG|RN_L16,MEMORY|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64945, 486, 4358}, + /* 1 : VBCSTNESH2PS ymmreg,mem16 [rm: vex.256.66.0f38.w0 b1 /r ] AR0-1,SW,AVXNECONVERT,FUTURE */ + /* 270(002 005) 001(b1) 110 : AR0,AR1,SW,NOAPX,VEX,AVXNECONVERT,FUTURE */ + {I_VBCSTNESH2PS, 2, {YMMREG|RN_L16,MEMORY|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64952, 486, 4359}, +}; + +static const struct itemplate instrux_VCVTNEEBF162PS[2] = { + /* 0 : VCVTNEEBF162PS xmmreg,mem128 [rm: vex.128.f3.0f38.w0 b0 /r ] AR0-1,SO,AVXNECONVERT,FUTURE */ + /* 270(002 002) 001(b0) 110 : AR0,AR1,SO,NOAPX,VEX,AVXNECONVERT,FUTURE */ + {I_VCVTNEEBF162PS, 2, {XMMREG|RN_L16,MEMORY|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64959, 487, 4360}, + /* 1 : VCVTNEEBF162PS ymmreg,mem256 [rm: vex.256.f3.0f38.w0 b0 /r ] AR0-1,SY,AVXNECONVERT,FUTURE */ + /* 270(002 006) 001(b0) 110 : AR0,AR1,SY,NOAPX,VEX,AVXNECONVERT,FUTURE */ + {I_VCVTNEEBF162PS, 2, {YMMREG|RN_L16,MEMORY|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64966, 488, 4361}, +}; + +static const struct itemplate instrux_VCVTNEEPH2PS[2] = { + /* 0 : VCVTNEEPH2PS xmmreg,mem128 [rm: vex.128.66.0f38.w0 b0 /r ] AR0-1,SO,AVXNECONVERT,FUTURE */ + /* 270(002 001) 001(b0) 110 : AR0,AR1,SO,NOAPX,VEX,AVXNECONVERT,FUTURE */ + {I_VCVTNEEPH2PS, 2, {XMMREG|RN_L16,MEMORY|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64973, 487, 4362}, + /* 1 : VCVTNEEPH2PS ymmreg,mem256 [rm: vex.256.66.0f38.w0 b0 /r ] AR0-1,SY,AVXNECONVERT,FUTURE */ + /* 270(002 005) 001(b0) 110 : AR0,AR1,SY,NOAPX,VEX,AVXNECONVERT,FUTURE */ + {I_VCVTNEEPH2PS, 2, {YMMREG|RN_L16,MEMORY|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64980, 488, 4363}, +}; + +static const struct itemplate instrux_VCVTNEOBF162PS[2] = { + /* 0 : VCVTNEOBF162PS xmmreg,mem128 [rm: vex.128.f2.0f38.w0 b0 /r ] AR0-1,SO,AVXNECONVERT,FUTURE */ + /* 270(002 003) 001(b0) 110 : AR0,AR1,SO,NOAPX,VEX,AVXNECONVERT,FUTURE */ + {I_VCVTNEOBF162PS, 2, {XMMREG|RN_L16,MEMORY|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64987, 487, 4364}, + /* 1 : VCVTNEOBF162PS ymmreg,mem256 [rm: vex.256.f2.0f38.w0 b0 /r ] AR0-1,SY,AVXNECONVERT,FUTURE */ + /* 270(002 007) 001(b0) 110 : AR0,AR1,SY,NOAPX,VEX,AVXNECONVERT,FUTURE */ + {I_VCVTNEOBF162PS, 2, {YMMREG|RN_L16,MEMORY|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64994, 488, 4365}, +}; + +static const struct itemplate instrux_VCVTNEOPH2PS[2] = { + /* 0 : VCVTNEOPH2PS xmmreg,mem128 [rm: vex.128.np.0f38.w0 b0 /r ] AR0-1,SO,AVXNECONVERT,FUTURE */ + /* 270(002 000) 001(b0) 110 : AR0,AR1,SO,NOAPX,VEX,AVXNECONVERT,FUTURE */ + {I_VCVTNEOPH2PS, 2, {XMMREG|RN_L16,MEMORY|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65001, 487, 4366}, + /* 1 : VCVTNEOPH2PS ymmreg,mem256 [rm: vex.256.np.0f38.w0 b0 /r ] AR0-1,SY,AVXNECONVERT,FUTURE */ + /* 270(002 004) 001(b0) 110 : AR0,AR1,SY,NOAPX,VEX,AVXNECONVERT,FUTURE */ + {I_VCVTNEOPH2PS, 2, {YMMREG|RN_L16,MEMORY|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65008, 488, 4367}, +}; + +static const struct itemplate instrux_VCVTNEPS2BF16[5] = { + /* 0 : VCVTNEPS2BF16 xmmreg,xmmrm128 [rm: vex.128.f3.0f38.w0 72 /r ] AR0-1,SO,LATEVEX,AVXNECONVERT,FUTURE */ + /* 270(002 002) 001(72) 110 : AR0,AR1,SO,LATEVEX,NOAPX,VEX,AVXNECONVERT,FUTURE */ + {I_VCVTNEPS2BF16, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65015, 489, 4368}, + /* 1 : VCVTNEPS2BF16 xmmreg,ymmrm256 [rm: vex.256.f3.0f38.w0 72 /r ] AR0-1,SY,LATEVEX,AVXNECONVERT,FUTURE */ + /* 270(002 006) 001(72) 110 : AR0,AR1,SY,LATEVEX,NOAPX,VEX,AVXNECONVERT,FUTURE */ + {I_VCVTNEPS2BF16, 2, {XMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65022, 490, 4369}, + /* 2 : VCVTNEPS2BF16 xmmreg|mask|z,xmmrm128|b32 [rm:fv: evex.128.f3.0f38.w0 72 /r ] AVX512VL,AVX512BF16,FUTURE */ + /* 250(f2 7e 08) 301 001(72) 110 : EVEX,PROT,AVX512VL,AVX512BF16,FUTURE */ + {I_VCVTNEPS2BF16, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+45769, 613, 7015}, + /* 3 : VCVTNEPS2BF16 xmmreg|mask|z,ymmrm256|b32 [rm:fv: evex.256.f3.0f38.w0 72 /r ] AVX512VL,AVX512BF16,FUTURE */ + /* 250(f2 7e 28) 301 001(72) 110 : EVEX,PROT,AVX512VL,AVX512BF16,FUTURE */ + {I_VCVTNEPS2BF16, 2, {XMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+45778, 613, 7016}, + /* 4 : VCVTNEPS2BF16 ymmreg|mask|z,zmmrm512|b32 [rm:fv: evex.512.f3.0f38.w0 72 /r ] AVX512BF16,FUTURE */ + /* 250(f2 7e 48) 301 001(72) 110 : EVEX,PROT,AVX512BF16,FUTURE */ + {I_VCVTNEPS2BF16, 2, {YMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+45787, 614, 7017}, +}; + +static const struct itemplate instrux_VPDPBUSD[8] = { + /* 0 : VPDPBUSD xmmreg,xmmreg,xmmrm128 [rvm: vex.128.66.0f38.w0 50 /r ] AR0-2,SO,LATEVEX,AVXVNNI,FUTURE */ + /* 261(002 001) 001(50) 120 : AR0,AR1,AR2,SO,LATEVEX,NOAPX,VEX,AVXVNNI,FUTURE */ + {I_VPDPBUSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65029, 491, 4373}, + /* 1 : VPDPBUSD ymmreg,ymmreg,ymmrm256 [rvm: vex.256.66.0f38.w0 50 /r ] AR0-2,SY,LATEVEX,AVXVNNI,FUTURE */ + /* 261(002 005) 001(50) 120 : AR0,AR1,AR2,SY,LATEVEX,NOAPX,VEX,AVXVNNI,FUTURE */ + {I_VPDPBUSD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65036, 492, 4374}, + /* 2 : VPDPBUSD xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.dds.128.66.0f38.w0 50 /r ] AVX512VL,AVX512VNNI,FUTURE */ + /* 241(f2 7d 08) 301 001(50) 120 : EVEX,PROT,AVX512VL,AVX512VNNI,FUTURE */ + {I_VPDPBUSD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+45256, 588, 6931}, + /* 3 : VPDPBUSD xmmreg|mask|z,xmmrm128|b32 [r+vm:fv: evex.dds.128.66.0f38.w0 50 /r ] ND,AVX512VL,AVX512VNNI,FUTURE */ + /* 240(f2 7d 08) 301 001(50) 110 : EVEX,PROT,AVX512VL,AVX512VNNI,FUTURE */ + {I_VPDPBUSD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+45265, 588, 6931}, + /* 4 : VPDPBUSD ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.dds.256.66.0f38.w0 50 /r ] AVX512VL,AVX512VNNI,FUTURE */ + /* 241(f2 7d 28) 301 001(50) 120 : EVEX,PROT,AVX512VL,AVX512VNNI,FUTURE */ + {I_VPDPBUSD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+45274, 588, 6932}, + /* 5 : VPDPBUSD ymmreg|mask|z,ymmrm256|b32 [r+vm:fv: evex.dds.256.66.0f38.w0 50 /r ] ND,AVX512VL,AVX512VNNI,FUTURE */ + /* 240(f2 7d 28) 301 001(50) 110 : EVEX,PROT,AVX512VL,AVX512VNNI,FUTURE */ + {I_VPDPBUSD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+45283, 588, 6932}, + /* 6 : VPDPBUSD zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.dds.512.66.0f38.w0 50 /r ] AVX512VNNI,FUTURE */ + /* 241(f2 7d 48) 301 001(50) 120 : EVEX,PROT,AVX512VNNI,FUTURE */ + {I_VPDPBUSD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+45292, 589, 6933}, + /* 7 : VPDPBUSD zmmreg|mask|z,zmmrm512|b32 [r+vm:fv: evex.dds.512.66.0f38.w0 50 /r ] ND,AVX512VNNI,FUTURE */ + /* 240(f2 7d 48) 301 001(50) 110 : EVEX,PROT,AVX512VNNI,FUTURE */ + {I_VPDPBUSD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+45301, 589, 6933}, +}; + +static const struct itemplate instrux_VPDPBUSDS[8] = { + /* 0 : VPDPBUSDS xmmreg,xmmreg,xmmrm128 [rvm: vex.128.66.0f38.w0 51 /r ] AR0-2,SO,LATEVEX,AVXVNNI,FUTURE */ + /* 261(002 001) 001(51) 120 : AR0,AR1,AR2,SO,LATEVEX,NOAPX,VEX,AVXVNNI,FUTURE */ + {I_VPDPBUSDS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65043, 491, 4375}, + /* 1 : VPDPBUSDS ymmreg,ymmreg,ymmrm256 [rvm: vex.256.66.0f38.w0 51 /r ] AR0-2,SY,LATEVEX,AVXVNNI,FUTURE */ + /* 261(002 005) 001(51) 120 : AR0,AR1,AR2,SY,LATEVEX,NOAPX,VEX,AVXVNNI,FUTURE */ + {I_VPDPBUSDS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65050, 492, 4376}, + /* 2 : VPDPBUSDS xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.dds.128.66.0f38.w0 51 /r ] AVX512VL,AVX512VNNI,FUTURE */ + /* 241(f2 7d 08) 301 001(51) 120 : EVEX,PROT,AVX512VL,AVX512VNNI,FUTURE */ + {I_VPDPBUSDS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+45310, 588, 6934}, + /* 3 : VPDPBUSDS xmmreg|mask|z,xmmrm128|b32 [r+vm:fv: evex.dds.128.66.0f38.w0 51 /r ] ND,AVX512VL,AVX512VNNI,FUTURE */ + /* 240(f2 7d 08) 301 001(51) 110 : EVEX,PROT,AVX512VL,AVX512VNNI,FUTURE */ + {I_VPDPBUSDS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+45319, 588, 6934}, + /* 4 : VPDPBUSDS ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.dds.256.66.0f38.w0 51 /r ] AVX512VL,AVX512VNNI,FUTURE */ + /* 241(f2 7d 28) 301 001(51) 120 : EVEX,PROT,AVX512VL,AVX512VNNI,FUTURE */ + {I_VPDPBUSDS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+45328, 588, 6935}, + /* 5 : VPDPBUSDS ymmreg|mask|z,ymmrm256|b32 [r+vm:fv: evex.dds.256.66.0f38.w0 51 /r ] ND,AVX512VL,AVX512VNNI,FUTURE */ + /* 240(f2 7d 28) 301 001(51) 110 : EVEX,PROT,AVX512VL,AVX512VNNI,FUTURE */ + {I_VPDPBUSDS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+45337, 588, 6935}, + /* 6 : VPDPBUSDS zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.dds.512.66.0f38.w0 51 /r ] AVX512VNNI,FUTURE */ + /* 241(f2 7d 48) 301 001(51) 120 : EVEX,PROT,AVX512VNNI,FUTURE */ + {I_VPDPBUSDS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+45346, 589, 6936}, + /* 7 : VPDPBUSDS zmmreg|mask|z,zmmrm512|b32 [r+vm:fv: evex.dds.512.66.0f38.w0 51 /r ] ND,AVX512VNNI,FUTURE */ + /* 240(f2 7d 48) 301 001(51) 110 : EVEX,PROT,AVX512VNNI,FUTURE */ + {I_VPDPBUSDS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+45355, 589, 6936}, +}; + +static const struct itemplate instrux_VPDPWSSD[8] = { + /* 0 : VPDPWSSD xmmreg,xmmreg,xmmrm128 [rvm: vex.128.66.0f38.w0 52 /r ] AR0-2,SO,LATEVEX,AVXVNNI,FUTURE */ + /* 261(002 001) 001(52) 120 : AR0,AR1,AR2,SO,LATEVEX,NOAPX,VEX,AVXVNNI,FUTURE */ + {I_VPDPWSSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65057, 491, 4377}, + /* 1 : VPDPWSSD ymmreg,ymmreg,ymmrm256 [rvm: vex.256.66.0f38.w0 52 /r ] AR0-2,SY,LATEVEX,AVXVNNI,FUTURE */ + /* 261(002 005) 001(52) 120 : AR0,AR1,AR2,SY,LATEVEX,NOAPX,VEX,AVXVNNI,FUTURE */ + {I_VPDPWSSD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65064, 492, 4378}, + /* 2 : VPDPWSSD xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.dds.128.66.0f38.w0 52 /r ] AVX512VL,AVX512VNNI,FUTURE */ + /* 241(f2 7d 08) 301 001(52) 120 : EVEX,PROT,AVX512VL,AVX512VNNI,FUTURE */ + {I_VPDPWSSD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+45364, 588, 6937}, + /* 3 : VPDPWSSD xmmreg|mask|z,xmmrm128|b32 [r+vm:fv: evex.dds.128.66.0f38.w0 52 /r ] ND,AVX512VL,AVX512VNNI,FUTURE */ + /* 240(f2 7d 08) 301 001(52) 110 : EVEX,PROT,AVX512VL,AVX512VNNI,FUTURE */ + {I_VPDPWSSD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+45373, 588, 6937}, + /* 4 : VPDPWSSD ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.dds.256.66.0f38.w0 52 /r ] AVX512VL,AVX512VNNI,FUTURE */ + /* 241(f2 7d 28) 301 001(52) 120 : EVEX,PROT,AVX512VL,AVX512VNNI,FUTURE */ + {I_VPDPWSSD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+45382, 588, 6938}, + /* 5 : VPDPWSSD ymmreg|mask|z,ymmrm256|b32 [r+vm:fv: evex.dds.256.66.0f38.w0 52 /r ] ND,AVX512VL,AVX512VNNI,FUTURE */ + /* 240(f2 7d 28) 301 001(52) 110 : EVEX,PROT,AVX512VL,AVX512VNNI,FUTURE */ + {I_VPDPWSSD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+45391, 588, 6938}, + /* 6 : VPDPWSSD zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.dds.512.66.0f38.w0 52 /r ] AVX512VNNI,FUTURE */ + /* 241(f2 7d 48) 301 001(52) 120 : EVEX,PROT,AVX512VNNI,FUTURE */ + {I_VPDPWSSD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+45400, 589, 6939}, + /* 7 : VPDPWSSD zmmreg|mask|z,zmmrm512|b32 [r+vm:fv: evex.dds.512.66.0f38.w0 52 /r ] ND,AVX512VNNI,FUTURE */ + /* 240(f2 7d 48) 301 001(52) 110 : EVEX,PROT,AVX512VNNI,FUTURE */ + {I_VPDPWSSD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+45409, 589, 6939}, +}; + +static const struct itemplate instrux_VPDPWSSDS[8] = { + /* 0 : VPDPWSSDS xmmreg,xmmreg,xmmrm128 [rvm: vex.128.66.0f38.w0 53 /r ] AR0-2,SO,LATEVEX,AVXVNNI,FUTURE */ + /* 261(002 001) 001(53) 120 : AR0,AR1,AR2,SO,LATEVEX,NOAPX,VEX,AVXVNNI,FUTURE */ + {I_VPDPWSSDS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65071, 491, 4379}, + /* 1 : VPDPWSSDS ymmreg,ymmreg,ymmrm256 [rvm: vex.256.66.0f38.w0 53 /r ] AR0-2,SY,LATEVEX,AVXVNNI,FUTURE */ + /* 261(002 005) 001(53) 120 : AR0,AR1,AR2,SY,LATEVEX,NOAPX,VEX,AVXVNNI,FUTURE */ + {I_VPDPWSSDS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65078, 492, 4380}, + /* 2 : VPDPWSSDS xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.dds.128.66.0f38.w0 53 /r ] AVX512VL,AVX512VNNI,FUTURE */ + /* 241(f2 7d 08) 301 001(53) 120 : EVEX,PROT,AVX512VL,AVX512VNNI,FUTURE */ + {I_VPDPWSSDS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+45418, 588, 6940}, + /* 3 : VPDPWSSDS xmmreg|mask|z,xmmrm128|b32 [r+vm:fv: evex.dds.128.66.0f38.w0 53 /r ] ND,AVX512VL,AVX512VNNI,FUTURE */ + /* 240(f2 7d 08) 301 001(53) 110 : EVEX,PROT,AVX512VL,AVX512VNNI,FUTURE */ + {I_VPDPWSSDS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+45427, 588, 6940}, + /* 4 : VPDPWSSDS ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.dds.256.66.0f38.w0 53 /r ] AVX512VL,AVX512VNNI,FUTURE */ + /* 241(f2 7d 28) 301 001(53) 120 : EVEX,PROT,AVX512VL,AVX512VNNI,FUTURE */ + {I_VPDPWSSDS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+45436, 588, 6941}, + /* 5 : VPDPWSSDS ymmreg|mask|z,ymmrm256|b32 [r+vm:fv: evex.dds.256.66.0f38.w0 53 /r ] ND,AVX512VL,AVX512VNNI,FUTURE */ + /* 240(f2 7d 28) 301 001(53) 110 : EVEX,PROT,AVX512VL,AVX512VNNI,FUTURE */ + {I_VPDPWSSDS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+45445, 588, 6941}, + /* 6 : VPDPWSSDS zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.dds.512.66.0f38.w0 53 /r ] AVX512VNNI,FUTURE */ + /* 241(f2 7d 48) 301 001(53) 120 : EVEX,PROT,AVX512VNNI,FUTURE */ + {I_VPDPWSSDS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+45454, 589, 6942}, + /* 7 : VPDPWSSDS zmmreg|mask|z,zmmrm512|b32 [r+vm:fv: evex.dds.512.66.0f38.w0 53 /r ] ND,AVX512VNNI,FUTURE */ + /* 240(f2 7d 48) 301 001(53) 110 : EVEX,PROT,AVX512VNNI,FUTURE */ + {I_VPDPWSSDS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+45463, 589, 6942}, +}; + +static const struct itemplate instrux_VPDPBSSD[5] = { + /* 0 : VPDPBSSD xmmreg,xmmreg,xmmrm128 [rvm: vex.128.f2.0f38.w0 50 /r ] AR0-2,SO,LATEVEX,AVX,AVXVNNIINT8,FUTURE */ + /* 261(002 003) 001(50) 120 : AR0,AR1,AR2,SO,LATEVEX,NOAPX,VEX,AVX,AVXVNNIINT8,FUTURE */ + {I_VPDPBSSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65085, 493, 4383}, + /* 1 : VPDPBSSD ymmreg,ymmreg,ymmrm256 [rvm: vex.256.f2.0f38.w0 50 /r ] AR0-2,SY,LATEVEX,AVX,AVXVNNIINT8,FUTURE */ + /* 261(002 007) 001(50) 120 : AR0,AR1,AR2,SY,LATEVEX,NOAPX,VEX,AVX,AVXVNNIINT8,FUTURE */ + {I_VPDPBSSD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65092, 494, 4384}, + /* 2 : VPDPBSSD xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.128.f2.0f38.w0 50 /r ] AVX10_2,AVX10_VNNIINT,FUTURE */ + /* 241(f2 7f 08) 301 001(50) 120 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {I_VPDPBSSD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50224, 646, 7517}, + /* 3 : VPDPBSSD ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.256.f2.0f38.w0 50 /r ] AVX10_2,AVX10_VNNIINT,FUTURE */ + /* 241(f2 7f 28) 301 001(50) 120 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {I_VPDPBSSD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50233, 646, 7518}, + /* 4 : VPDPBSSD zmmreg|mask|z,zmmreg,zmmrm512|b32 [rvm:fv: evex.512.f2.0f38.w0 50 /r ] AVX10_2,AVX10_VNNIINT,FUTURE */ + /* 241(f2 7f 48) 301 001(50) 120 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {I_VPDPBSSD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50242, 646, 7519}, +}; + +static const struct itemplate instrux_VPDPBSSDS[5] = { + /* 0 : VPDPBSSDS xmmreg,xmmreg,xmmrm128 [rvm: vex.128.f2.0f38.w0 51 /r ] AR0-2,SO,LATEVEX,AVX,AVXVNNIINT8,FUTURE */ + /* 261(002 003) 001(51) 120 : AR0,AR1,AR2,SO,LATEVEX,NOAPX,VEX,AVX,AVXVNNIINT8,FUTURE */ + {I_VPDPBSSDS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65099, 493, 4385}, + /* 1 : VPDPBSSDS ymmreg,ymmreg,ymmrm256 [rvm: vex.256.f2.0f38.w0 51 /r ] AR0-2,SY,LATEVEX,AVX,AVXVNNIINT8,FUTURE */ + /* 261(002 007) 001(51) 120 : AR0,AR1,AR2,SY,LATEVEX,NOAPX,VEX,AVX,AVXVNNIINT8,FUTURE */ + {I_VPDPBSSDS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65106, 494, 4386}, + /* 2 : VPDPBSSDS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.128.f2.0f38.w0 51 /r ] AVX10_2,AVX10_VNNIINT,FUTURE */ + /* 241(f2 7f 08) 301 001(51) 120 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {I_VPDPBSSDS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50251, 646, 7520}, + /* 3 : VPDPBSSDS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.256.f2.0f38.w0 51 /r ] AVX10_2,AVX10_VNNIINT,FUTURE */ + /* 241(f2 7f 28) 301 001(51) 120 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {I_VPDPBSSDS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50260, 646, 7521}, + /* 4 : VPDPBSSDS zmmreg|mask|z,zmmreg,zmmrm512|b32 [rvm:fv: evex.512.f2.0f38.w0 51 /r ] AVX10_2,AVX10_VNNIINT,FUTURE */ + /* 241(f2 7f 48) 301 001(51) 120 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {I_VPDPBSSDS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50269, 646, 7522}, +}; + +static const struct itemplate instrux_VPDPBSUD[5] = { + /* 0 : VPDPBSUD xmmreg,xmmreg,xmmrm128 [rvm: vex.128.f3.0f38.w0 50 /r ] AR0-2,SO,LATEVEX,AVX,AVXVNNIINT8,FUTURE */ + /* 261(002 002) 001(50) 120 : AR0,AR1,AR2,SO,LATEVEX,NOAPX,VEX,AVX,AVXVNNIINT8,FUTURE */ + {I_VPDPBSUD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65113, 493, 4387}, + /* 1 : VPDPBSUD ymmreg,ymmreg,ymmrm256 [rvm: vex.256.f3.0f38.w0 50 /r ] AR0-2,SY,LATEVEX,AVX,AVXVNNIINT8,FUTURE */ + /* 261(002 006) 001(50) 120 : AR0,AR1,AR2,SY,LATEVEX,NOAPX,VEX,AVX,AVXVNNIINT8,FUTURE */ + {I_VPDPBSUD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65120, 494, 4388}, + /* 2 : VPDPBSUD xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.128.f3.0f38.w0 50 /r ] AVX10_2,AVX10_VNNIINT,FUTURE */ + /* 241(f2 7e 08) 301 001(50) 120 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {I_VPDPBSUD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50278, 646, 7523}, + /* 3 : VPDPBSUD ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.256.f3.0f38.w0 50 /r ] AVX10_2,AVX10_VNNIINT,FUTURE */ + /* 241(f2 7e 28) 301 001(50) 120 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {I_VPDPBSUD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50287, 646, 7524}, + /* 4 : VPDPBSUD zmmreg|mask|z,zmmreg,zmmrm512|b32 [rvm:fv: evex.512.f3.0f38.w0 50 /r ] AVX10_2,AVX10_VNNIINT,FUTURE */ + /* 241(f2 7e 48) 301 001(50) 120 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {I_VPDPBSUD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50296, 646, 7525}, +}; + +static const struct itemplate instrux_VPDPBSUDS[5] = { + /* 0 : VPDPBSUDS xmmreg,xmmreg,xmmrm128 [rvm: vex.128.f3.0f38.w0 51 /r ] AR0-2,SO,LATEVEX,AVX,AVXVNNIINT8,FUTURE */ + /* 261(002 002) 001(51) 120 : AR0,AR1,AR2,SO,LATEVEX,NOAPX,VEX,AVX,AVXVNNIINT8,FUTURE */ + {I_VPDPBSUDS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65127, 493, 4389}, + /* 1 : VPDPBSUDS ymmreg,ymmreg,ymmrm256 [rvm: vex.256.f3.0f38.w0 51 /r ] AR0-2,SY,LATEVEX,AVX,AVXVNNIINT8,FUTURE */ + /* 261(002 006) 001(51) 120 : AR0,AR1,AR2,SY,LATEVEX,NOAPX,VEX,AVX,AVXVNNIINT8,FUTURE */ + {I_VPDPBSUDS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65134, 494, 4390}, + /* 2 : VPDPBSUDS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.128.f3.0f38.w0 51 /r ] AVX10_2,AVX10_VNNIINT,FUTURE */ + /* 241(f2 7e 08) 301 001(51) 120 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {I_VPDPBSUDS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50305, 646, 7526}, + /* 3 : VPDPBSUDS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.256.f3.0f38.w0 51 /r ] AVX10_2,AVX10_VNNIINT,FUTURE */ + /* 241(f2 7e 28) 301 001(51) 120 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {I_VPDPBSUDS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50314, 646, 7527}, + /* 4 : VPDPBSUDS zmmreg|mask|z,zmmreg,zmmrm512|b32 [rvm:fv: evex.512.f3.0f38.w0 51 /r ] AVX10_2,AVX10_VNNIINT,FUTURE */ + /* 241(f2 7e 48) 301 001(51) 120 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {I_VPDPBSUDS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50323, 646, 7528}, +}; + +static const struct itemplate instrux_VPDPBUUD[5] = { + /* 0 : VPDPBUUD xmmreg,xmmreg,xmmrm128 [rvm: vex.128.np.0f38.w0 50 /r ] AR0-2,SO,LATEVEX,AVX,AVXVNNIINT8,FUTURE */ + /* 261(002 000) 001(50) 120 : AR0,AR1,AR2,SO,LATEVEX,NOAPX,VEX,AVX,AVXVNNIINT8,FUTURE */ + {I_VPDPBUUD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65141, 493, 4391}, + /* 1 : VPDPBUUD ymmreg,ymmreg,ymmrm256 [rvm: vex.256.np.0f38.w0 50 /r ] AR0-2,SY,LATEVEX,AVX,AVXVNNIINT8,FUTURE */ + /* 261(002 004) 001(50) 120 : AR0,AR1,AR2,SY,LATEVEX,NOAPX,VEX,AVX,AVXVNNIINT8,FUTURE */ + {I_VPDPBUUD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65148, 494, 4392}, + /* 2 : VPDPBUUD xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.128.np.0f38.w0 50 /r ] AVX10_2,AVX10_VNNIINT,FUTURE */ + /* 241(f2 7c 08) 301 001(50) 120 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {I_VPDPBUUD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50332, 646, 7529}, + /* 3 : VPDPBUUD ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.256.np.0f38.w0 50 /r ] AVX10_2,AVX10_VNNIINT,FUTURE */ + /* 241(f2 7c 28) 301 001(50) 120 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {I_VPDPBUUD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50341, 646, 7530}, + /* 4 : VPDPBUUD zmmreg|mask|z,zmmreg,zmmrm512|b32 [rvm:fv: evex.512.np.0f38.w0 50 /r ] AVX10_2,AVX10_VNNIINT,FUTURE */ + /* 241(f2 7c 48) 301 001(50) 120 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {I_VPDPBUUD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50350, 646, 7531}, +}; + +static const struct itemplate instrux_VPDPBUUDS[5] = { + /* 0 : VPDPBUUDS xmmreg,xmmreg,xmmrm128 [rvm: vex.128.np.0f38.w0 51 /r ] AR0-2,SO,LATEVEX,AVX,AVXVNNIINT8,FUTURE */ + /* 261(002 000) 001(51) 120 : AR0,AR1,AR2,SO,LATEVEX,NOAPX,VEX,AVX,AVXVNNIINT8,FUTURE */ + {I_VPDPBUUDS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65155, 493, 4393}, + /* 1 : VPDPBUUDS ymmreg,ymmreg,ymmrm256 [rvm: vex.256.np.0f38.w0 51 /r ] AR0-2,SY,LATEVEX,AVX,AVXVNNIINT8,FUTURE */ + /* 261(002 004) 001(51) 120 : AR0,AR1,AR2,SY,LATEVEX,NOAPX,VEX,AVX,AVXVNNIINT8,FUTURE */ + {I_VPDPBUUDS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65162, 494, 4394}, + /* 2 : VPDPBUUDS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.128.np.0f38.w0 51 /r ] AVX10_2,AVX10_VNNIINT,FUTURE */ + /* 241(f2 7c 08) 301 001(51) 120 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {I_VPDPBUUDS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50359, 646, 7532}, + /* 3 : VPDPBUUDS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.256.np.0f38.w0 51 /r ] AVX10_2,AVX10_VNNIINT,FUTURE */ + /* 241(f2 7c 28) 301 001(51) 120 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {I_VPDPBUUDS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50368, 646, 7533}, + /* 4 : VPDPBUUDS zmmreg|mask|z,zmmreg,zmmrm512|b32 [rvm:fv: evex.512.np.0f38.w0 51 /r ] AVX10_2,AVX10_VNNIINT,FUTURE */ + /* 241(f2 7c 48) 301 001(51) 120 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {I_VPDPBUUDS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50377, 646, 7534}, +}; + +static const struct itemplate instrux_VPDPWSUD[5] = { + /* 0 : VPDPWSUD xmmreg,xmmreg,xmmrm128 [rvm: vex.128.f3.0f38.w0 d2 /r ] AR0-2,SO,LATEVEX,AVX,AVXVNNIINT16,FUTURE */ + /* 261(002 002) 001(d2) 120 : AR0,AR1,AR2,SO,LATEVEX,NOAPX,VEX,AVX,AVXVNNIINT16,FUTURE */ + {I_VPDPWSUD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65169, 495, 4397}, + /* 1 : VPDPWSUD ymmreg,ymmreg,ymmrm256 [rvm: vex.256.f3.0f38.w0 d2 /r ] AR0-2,SY,LATEVEX,AVX,AVXVNNIINT16,FUTURE */ + /* 261(002 006) 001(d2) 120 : AR0,AR1,AR2,SY,LATEVEX,NOAPX,VEX,AVX,AVXVNNIINT16,FUTURE */ + {I_VPDPWSUD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65176, 496, 4398}, + /* 2 : VPDPWSUD xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.128.f3.0f38.w0 d2 /r ] AVX10_2,AVX10_VNNIINT,FUTURE */ + /* 241(f2 7e 08) 301 001(d2) 120 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {I_VPDPWSUD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50386, 646, 7535}, + /* 3 : VPDPWSUD ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.256.f3.0f38.w0 d2 /r ] AVX10_2,AVX10_VNNIINT,FUTURE */ + /* 241(f2 7e 28) 301 001(d2) 120 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {I_VPDPWSUD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50395, 646, 7536}, + /* 4 : VPDPWSUD zmmreg|mask|z,zmmreg,zmmrm512|b32 [rvm:fv: evex.512.f3.0f38.w0 d2 /r ] AVX10_2,AVX10_VNNIINT,FUTURE */ + /* 241(f2 7e 48) 301 001(d2) 120 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {I_VPDPWSUD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50404, 646, 7537}, +}; + +static const struct itemplate instrux_VPDPWSUDS[5] = { + /* 0 : VPDPWSUDS xmmreg,xmmreg,xmmrm128 [rvm: vex.128.f3.0f38.w0 d3 /r ] AR0-2,SO,LATEVEX,AVX,AVXVNNIINT16,FUTURE */ + /* 261(002 002) 001(d3) 120 : AR0,AR1,AR2,SO,LATEVEX,NOAPX,VEX,AVX,AVXVNNIINT16,FUTURE */ + {I_VPDPWSUDS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65183, 495, 4399}, + /* 1 : VPDPWSUDS ymmreg,ymmreg,ymmrm256 [rvm: vex.256.f3.0f38.w0 d3 /r ] AR0-2,SY,LATEVEX,AVX,AVXVNNIINT16,FUTURE */ + /* 261(002 006) 001(d3) 120 : AR0,AR1,AR2,SY,LATEVEX,NOAPX,VEX,AVX,AVXVNNIINT16,FUTURE */ + {I_VPDPWSUDS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65190, 496, 4400}, + /* 2 : VPDPWSUDS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.128.f3.0f38.w0 d3 /r ] AVX10_2,AVX10_VNNIINT,FUTURE */ + /* 241(f2 7e 08) 301 001(d3) 120 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {I_VPDPWSUDS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50413, 646, 7538}, + /* 3 : VPDPWSUDS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.256.f3.0f38.w0 d3 /r ] AVX10_2,AVX10_VNNIINT,FUTURE */ + /* 241(f2 7e 28) 301 001(d3) 120 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {I_VPDPWSUDS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50422, 646, 7539}, + /* 4 : VPDPWSUDS zmmreg|mask|z,zmmreg,zmmrm512|b32 [rvm:fv: evex.512.f3.0f38.w0 d3 /r ] AVX10_2,AVX10_VNNIINT,FUTURE */ + /* 241(f2 7e 48) 301 001(d3) 120 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {I_VPDPWSUDS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50431, 646, 7540}, +}; + +static const struct itemplate instrux_VPDPWUSD[5] = { + /* 0 : VPDPWUSD xmmreg,xmmreg,xmmrm128 [rvm: vex.128.66.0f38.w0 d2 /r ] AR0-2,SO,LATEVEX,AVX,AVXVNNIINT16,FUTURE */ + /* 261(002 001) 001(d2) 120 : AR0,AR1,AR2,SO,LATEVEX,NOAPX,VEX,AVX,AVXVNNIINT16,FUTURE */ + {I_VPDPWUSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65197, 495, 4401}, + /* 1 : VPDPWUSD ymmreg,ymmreg,ymmrm256 [rvm: vex.256.66.0f38.w0 d2 /r ] AR0-2,SY,LATEVEX,AVX,AVXVNNIINT16,FUTURE */ + /* 261(002 005) 001(d2) 120 : AR0,AR1,AR2,SY,LATEVEX,NOAPX,VEX,AVX,AVXVNNIINT16,FUTURE */ + {I_VPDPWUSD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65204, 496, 4402}, + /* 2 : VPDPWUSD xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.128.66.0f38.w0 d2 /r ] AVX10_2,AVX10_VNNIINT,FUTURE */ + /* 241(f2 7d 08) 301 001(d2) 120 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {I_VPDPWUSD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50440, 646, 7541}, + /* 3 : VPDPWUSD ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.256.66.0f38.w0 d2 /r ] AVX10_2,AVX10_VNNIINT,FUTURE */ + /* 241(f2 7d 28) 301 001(d2) 120 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {I_VPDPWUSD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50449, 646, 7542}, + /* 4 : VPDPWUSD zmmreg|mask|z,zmmreg,zmmrm512|b32 [rvm:fv: evex.512.66.0f38.w0 d2 /r ] AVX10_2,AVX10_VNNIINT,FUTURE */ + /* 241(f2 7d 48) 301 001(d2) 120 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {I_VPDPWUSD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50458, 646, 7543}, +}; + +static const struct itemplate instrux_VPDPWUSDS[5] = { + /* 0 : VPDPWUSDS xmmreg,xmmreg,xmmrm128 [rvm: vex.128.66.0f38.w0 d3 /r ] AR0-2,SO,LATEVEX,AVX,AVXVNNIINT16,FUTURE */ + /* 261(002 001) 001(d3) 120 : AR0,AR1,AR2,SO,LATEVEX,NOAPX,VEX,AVX,AVXVNNIINT16,FUTURE */ + {I_VPDPWUSDS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65211, 495, 4403}, + /* 1 : VPDPWUSDS ymmreg,ymmreg,ymmrm256 [rvm: vex.256.66.0f38.w0 d3 /r ] AR0-2,SY,LATEVEX,AVX,AVXVNNIINT16,FUTURE */ + /* 261(002 005) 001(d3) 120 : AR0,AR1,AR2,SY,LATEVEX,NOAPX,VEX,AVX,AVXVNNIINT16,FUTURE */ + {I_VPDPWUSDS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65218, 496, 4404}, + /* 2 : VPDPWUSDS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.128.66.0f38.w0 d3 /r ] AVX10_2,AVX10_VNNIINT,FUTURE */ + /* 241(f2 7d 08) 301 001(d3) 120 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {I_VPDPWUSDS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50467, 646, 7544}, + /* 3 : VPDPWUSDS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.256.66.0f38.w0 d3 /r ] AVX10_2,AVX10_VNNIINT,FUTURE */ + /* 241(f2 7d 28) 301 001(d3) 120 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {I_VPDPWUSDS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50476, 646, 7545}, + /* 4 : VPDPWUSDS zmmreg|mask|z,zmmreg,zmmrm512|b32 [rvm:fv: evex.512.66.0f38.w0 d3 /r ] AVX10_2,AVX10_VNNIINT,FUTURE */ + /* 241(f2 7d 48) 301 001(d3) 120 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {I_VPDPWUSDS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50485, 646, 7546}, +}; + +static const struct itemplate instrux_VPDPWUUD[5] = { + /* 0 : VPDPWUUD xmmreg,xmmreg,xmmrm128 [rvm: vex.128.np.0f38.w0 d2 /r ] AR0-2,SO,LATEVEX,AVX,AVXVNNIINT16,FUTURE */ + /* 261(002 000) 001(d2) 120 : AR0,AR1,AR2,SO,LATEVEX,NOAPX,VEX,AVX,AVXVNNIINT16,FUTURE */ + {I_VPDPWUUD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65225, 495, 4405}, + /* 1 : VPDPWUUD ymmreg,ymmreg,ymmrm256 [rvm: vex.256.np.0f38.w0 d2 /r ] AR0-2,SY,LATEVEX,AVX,AVXVNNIINT16,FUTURE */ + /* 261(002 004) 001(d2) 120 : AR0,AR1,AR2,SY,LATEVEX,NOAPX,VEX,AVX,AVXVNNIINT16,FUTURE */ + {I_VPDPWUUD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65232, 496, 4406}, + /* 2 : VPDPWUUD xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.128.np.0f38.w0 d2 /r ] AVX10_2,AVX10_VNNIINT,FUTURE */ + /* 241(f2 7c 08) 301 001(d2) 120 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {I_VPDPWUUD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50494, 646, 7547}, + /* 3 : VPDPWUUD ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.256.np.0f38.w0 d2 /r ] AVX10_2,AVX10_VNNIINT,FUTURE */ + /* 241(f2 7c 28) 301 001(d2) 120 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {I_VPDPWUUD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50503, 646, 7548}, + /* 4 : VPDPWUUD zmmreg|mask|z,zmmreg,zmmrm512|b32 [rvm:fv: evex.512.np.0f38.w0 d2 /r ] AVX10_2,AVX10_VNNIINT,FUTURE */ + /* 241(f2 7c 48) 301 001(d2) 120 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {I_VPDPWUUD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50512, 646, 7549}, +}; + +static const struct itemplate instrux_VPDPWUUDS[5] = { + /* 0 : VPDPWUUDS xmmreg,xmmreg,xmmrm128 [rvm: vex.128.np.0f38.w0 d3 /r ] AR0-2,SO,LATEVEX,AVX,AVXVNNIINT16,FUTURE */ + /* 261(002 000) 001(d3) 120 : AR0,AR1,AR2,SO,LATEVEX,NOAPX,VEX,AVX,AVXVNNIINT16,FUTURE */ + {I_VPDPWUUDS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65239, 495, 4407}, + /* 1 : VPDPWUUDS ymmreg,ymmreg,ymmrm256 [rvm: vex.256.np.0f38.w0 d3 /r ] AR0-2,SY,LATEVEX,AVX,AVXVNNIINT16,FUTURE */ + /* 261(002 004) 001(d3) 120 : AR0,AR1,AR2,SY,LATEVEX,NOAPX,VEX,AVX,AVXVNNIINT16,FUTURE */ + {I_VPDPWUUDS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65246, 496, 4408}, + /* 2 : VPDPWUUDS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.128.np.0f38.w0 d3 /r ] AVX10_2,AVX10_VNNIINT,FUTURE */ + /* 241(f2 7c 08) 301 001(d3) 120 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {I_VPDPWUUDS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50521, 646, 7550}, + /* 3 : VPDPWUUDS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.256.np.0f38.w0 d3 /r ] AVX10_2,AVX10_VNNIINT,FUTURE */ + /* 241(f2 7c 28) 301 001(d3) 120 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {I_VPDPWUUDS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50530, 646, 7551}, + /* 4 : VPDPWUUDS zmmreg|mask|z,zmmreg,zmmrm512|b32 [rvm:fv: evex.512.np.0f38.w0 d3 /r ] AVX10_2,AVX10_VNNIINT,FUTURE */ + /* 241(f2 7c 48) 301 001(d3) 120 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {I_VPDPWUUDS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50539, 646, 7552}, +}; + +static const struct itemplate instrux_VPMADD52HUQ[5] = { + /* 0 : VPMADD52HUQ xmmreg,xmmreg,xmmrm128 [rvm: vex.128.66.0f38.w1 b5 /r ] AR0-2,SO,LATEVEX,AVXIFMA,FUTURE */ + /* 261(002 201) 001(b5) 120 : AR0,AR1,AR2,SO,LATEVEX,NOAPX,VEX,AVXIFMA,FUTURE */ + {I_VPMADD52HUQ, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65253, 497, 4412}, + /* 1 : VPMADD52HUQ ymmreg,ymmreg,ymmrm256 [rvm: vex.256.66.0f38.w1 b5 /r ] AR0-2,SY,LATEVEX,AVXIFMA,FUTURE */ + /* 261(002 205) 001(b5) 120 : AR0,AR1,AR2,SY,LATEVEX,NOAPX,VEX,AVXIFMA,FUTURE */ + {I_VPMADD52HUQ, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65260, 498, 4413}, + /* 2 : VPMADD52HUQ xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 b5 /r ] AVX512VL,AVX512IFMA,FUTURE */ + /* 241(f2 fd 08) 301 001(b5) 120 : EVEX,PROT,AVX512VL,AVX512IFMA,FUTURE */ + {I_VPMADD52HUQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+38065, 561, 6210}, + /* 3 : VPMADD52HUQ ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 b5 /r ] AVX512VL,AVX512IFMA,FUTURE */ + /* 241(f2 fd 28) 301 001(b5) 120 : EVEX,PROT,AVX512VL,AVX512IFMA,FUTURE */ + {I_VPMADD52HUQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+38074, 561, 6211}, + /* 4 : VPMADD52HUQ zmmreg|mask|z,zmmreg,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 b5 /r ] AVX512IFMA,FUTURE */ + /* 241(f2 fd 48) 301 001(b5) 120 : EVEX,PROT,AVX512IFMA,FUTURE */ + {I_VPMADD52HUQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+38083, 562, 6212}, +}; + +static const struct itemplate instrux_VPMADD52LUQ[5] = { + /* 0 : VPMADD52LUQ xmmreg,xmmreg,xmmrm128 [rvm: vex.128.66.0f38.w1 b4 /r ] AR0-2,SO,LATEVEX,AVXIFMA,FUTURE */ + /* 261(002 201) 001(b4) 120 : AR0,AR1,AR2,SO,LATEVEX,NOAPX,VEX,AVXIFMA,FUTURE */ + {I_VPMADD52LUQ, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65267, 497, 4414}, + /* 1 : VPMADD52LUQ ymmreg,ymmreg,ymmrm256 [rvm: vex.256.66.0f38.w1 b4 /r ] AR0-2,SY,LATEVEX,AVXIFMA,FUTURE */ + /* 261(002 205) 001(b4) 120 : AR0,AR1,AR2,SY,LATEVEX,NOAPX,VEX,AVXIFMA,FUTURE */ + {I_VPMADD52LUQ, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65274, 498, 4415}, + /* 2 : VPMADD52LUQ xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 b4 /r ] AVX512VL,AVX512IFMA,FUTURE */ + /* 241(f2 fd 08) 301 001(b4) 120 : EVEX,PROT,AVX512VL,AVX512IFMA,FUTURE */ + {I_VPMADD52LUQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+38092, 561, 6213}, + /* 3 : VPMADD52LUQ ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 b4 /r ] AVX512VL,AVX512IFMA,FUTURE */ + /* 241(f2 fd 28) 301 001(b4) 120 : EVEX,PROT,AVX512VL,AVX512IFMA,FUTURE */ + {I_VPMADD52LUQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+38101, 561, 6214}, + /* 4 : VPMADD52LUQ zmmreg|mask|z,zmmreg,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 b4 /r ] AVX512IFMA,FUTURE */ + /* 241(f2 fd 48) 301 001(b4) 120 : EVEX,PROT,AVX512IFMA,FUTURE */ + {I_VPMADD52LUQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+38110, 562, 6215}, +}; + +static const struct itemplate instrux_KMOVB[10] = { + /* 0 : KMOVB kreg8,krm8 [rm: vex.l0.0f.ko8 90 /r ] ZU,AVX512DQ,FUTURE */ + /* 270(001 001) 001(90) 110 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_KMOVB, 2, {OPMASKREG|BITS8|RN_L16,RM_OPMASK|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65281, 499, 4418}, + /* 1 : KMOVB kreg8,krm8 [rm: evex.l0.0f.ko8 90 /r ] ZU,AVX512DQ,FUTURE,APX */ + /* 250(f1 7d 08) 300 001(90) 110 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KMOVB, 2, {OPMASKREG|BITS8,RM_OPMASK|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+29614, 500, 4418}, + /* 2 : KMOVB mem8,kreg8 [mr: vex.l0.0f.ko8 91 /r ] ZU,AVX512DQ,FUTURE */ + /* 270(001 001) 001(91) 101 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_KMOVB, 2, {MEMORY|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65309, 499, 4434}, + /* 3 : KMOVB mem8,kreg8 [mr: evex.l0.0f.ko8 91 /r ] ZU,AVX512DQ,FUTURE,APX */ + /* 250(f1 7d 08) 300 001(91) 101 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KMOVB, 2, {MEMORY|BITS8,OPMASKREG|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+29650, 500, 4434}, + /* 4 : KMOVB kreg8,reg32 [rm: vex.l0.0f.66.w0 92 /r ] ZU,AVX512DQ,FUTURE */ + /* 270(001 001) 001(92) 110 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_KMOVB, 2, {OPMASKREG|BITS8|RN_L16,REG_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65365, 499, 4466}, + /* 5 : KMOVB kreg8,reg32 [rm: evex.l0.0f.66.w0 92 /r ] ZU,AVX512DQ,FUTURE,APX */ + /* 250(f1 7d 08) 300 001(92) 110 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KMOVB, 2, {OPMASKREG|BITS8,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+29722, 500, 4466}, + /* 6 : KMOVB kreg8,reg8 [rm: vex.l0.0f.66.w0 92 /r ] ND,ZU,AVX512DQ,FUTURE */ + /* 270(001 001) 001(92) 110 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_KMOVB, 2, {OPMASKREG|BITS8|RN_L16,REG_GPR|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65365, 499, 4470}, + /* 7 : KMOVB kreg8,reg8 [rm: evex.l0.0f.66.w0 92 /r ] ND,ZU,AVX512DQ,FUTURE,APX */ + /* 250(f1 7d 08) 300 001(92) 110 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KMOVB, 2, {OPMASKREG|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+29722, 500, 4470}, + /* 8 : KMOVB reg32,kreg8 [rm: vex.l0.0f.66.w0 93 /r ] ZU,AVX512DQ,FUTURE */ + /* 270(001 001) 001(93) 110 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_KMOVB, 2, {REG_GPR|BITS32|RN_L16,OPMASKREG|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65379, 499, 4482}, + /* 9 : KMOVB reg32,kreg8 [rm: evex.l0.0f.66.w0 93 /r ] ZU,AVX512DQ,FUTURE,APX */ + /* 250(f1 7d 08) 300 001(93) 110 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KMOVB, 2, {REG_GPR|BITS32,OPMASKREG|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+29740, 500, 4482}, +}; + +static const struct itemplate instrux_KMOVW[10] = { + /* 0 : KMOVW kreg16,krm16 [rm: vex.l0.0f.ko16 90 /r ] ZU,AVX512F,FUTURE */ + /* 270(001 000) 001(90) 110 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_KMOVW, 2, {OPMASKREG|BITS16|RN_L16,RM_OPMASK|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65288, 501, 4419}, + /* 1 : KMOVW kreg16,krm16 [rm: evex.l0.0f.ko16 90 /r ] ZU,AVX512F,FUTURE,APX */ + /* 250(f1 7c 08) 300 001(90) 110 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_KMOVW, 2, {OPMASKREG|BITS16,RM_OPMASK|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29623, 502, 4419}, + /* 2 : KMOVW mem16,kreg16 [mr: vex.l0.0f.ko16 91 /r ] ZU,AVX512DQ,FUTURE */ + /* 270(001 000) 001(91) 101 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_KMOVW, 2, {MEMORY|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65316, 499, 4435}, + /* 3 : KMOVW mem16,kreg16 [mr: evex.l0.0f.ko16 91 /r ] ZU,AVX512DQ,FUTURE,APX */ + /* 250(f1 7c 08) 300 001(91) 101 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KMOVW, 2, {MEMORY|BITS16,OPMASKREG|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29659, 500, 4435}, + /* 4 : KMOVW kreg16,reg32 [rm: vex.l0.0f.np.w0 92 /r ] ZU,AVX512F,FUTURE */ + /* 270(001 000) 001(92) 110 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_KMOVW, 2, {OPMASKREG|BITS16|RN_L16,REG_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65372, 501, 4474}, + /* 5 : KMOVW kreg16,reg32 [rm: evex.l0.0f.np.w0 92 /r ] ZU,AVX512F,FUTURE,APX */ + /* 250(f1 7c 08) 300 001(92) 110 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_KMOVW, 2, {OPMASKREG|BITS16,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+29731, 502, 4474}, + /* 6 : KMOVW kreg16,reg16 [rm: vex.l0.0f.np.w0 92 /r ] ND,ZU,AVX512F,FUTURE */ + /* 270(001 000) 001(92) 110 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_KMOVW, 2, {OPMASKREG|BITS16|RN_L16,REG_GPR|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65372, 501, 4478}, + /* 7 : KMOVW kreg16,reg16 [rm: evex.l0.0f.np.w0 92 /r ] ND,ZU,AVX512F,FUTURE,APX */ + /* 250(f1 7c 08) 300 001(92) 110 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_KMOVW, 2, {OPMASKREG|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29731, 502, 4478}, + /* 8 : KMOVW reg32,kreg16 [rm: vex.l0.0f.np.w0 93 /r ] ZU,AVX512F,FUTURE */ + /* 270(001 000) 001(93) 110 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_KMOVW, 2, {REG_GPR|BITS32|RN_L16,OPMASKREG|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65386, 501, 4486}, + /* 9 : KMOVW reg32,kreg16 [rm: evex.l0.0f.np.w0 93 /r ] ZU,AVX512F,FUTURE,APX */ + /* 250(f1 7c 08) 300 001(93) 110 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_KMOVW, 2, {REG_GPR|BITS32,OPMASKREG|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29749, 502, 4486}, +}; + +static const struct itemplate instrux_KMOVD[8] = { + /* 0 : KMOVD kreg32,krm32 [rm: vex.l0.0f.ko32 90 /r ] ZU,AVX512BW,FUTURE */ + /* 270(001 201) 001(90) 110 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KMOVD, 2, {OPMASKREG|BITS32|RN_L16,RM_OPMASK|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65295, 503, 4420}, + /* 1 : KMOVD kreg32,krm32 [rm: evex.l0.0f.ko32 90 /r ] ZU,AVX512BW,FUTURE,APX */ + /* 250(f1 fd 08) 300 001(90) 110 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KMOVD, 2, {OPMASKREG|BITS32,RM_OPMASK|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+29632, 504, 4420}, + /* 2 : KMOVD mem32,kreg32 [mr: vex.l0.0f.ko32 91 /r ] ZU,AVX512BW,FUTURE */ + /* 270(001 201) 001(91) 101 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KMOVD, 2, {MEMORY|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65323, 503, 4436}, + /* 3 : KMOVD mem32,kreg32 [mr: evex.l0.0f.ko32 91 /r ] ZU,AVX512BW,FUTURE,APX */ + /* 250(f1 fd 08) 300 001(91) 101 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KMOVD, 2, {MEMORY|BITS32,OPMASKREG|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+29668, 504, 4436}, + /* 4 : KMOVD kreg32,reg32 [rm: vex.l0.0f.f2.w0 92 /r ] ZU,AVX512BW,FUTURE */ + /* 270(001 003) 001(92) 110 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KMOVD, 2, {OPMASKREG|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65337, 503, 4450}, + /* 5 : KMOVD kreg32,reg32 [rm: evex.l0.0f.f2.w0 92 /r ] ZU,AVX512BW,FUTURE,APX */ + /* 250(f1 7f 08) 300 001(92) 110 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KMOVD, 2, {OPMASKREG|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+29686, 504, 4450}, + /* 6 : KMOVD reg32,kreg32 [rm: vex.l0.0f.f2.w0 93 /r ] ZU,AVX512BW,FUTURE */ + /* 270(001 003) 001(93) 110 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KMOVD, 2, {REG_GPR|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65351, 503, 4458}, + /* 7 : KMOVD reg32,kreg32 [rm: evex.l0.0f.f2.w0 93 /r ] ZU,AVX512BW,FUTURE,APX */ + /* 250(f1 7f 08) 300 001(93) 110 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KMOVD, 2, {REG_GPR|BITS32,OPMASKREG|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+29704, 504, 4458}, +}; + +static const struct itemplate instrux_KMOVQ[8] = { + /* 0 : KMOVQ kreg64,krm64 [rm: vex.l0.0f.ko64 90 /r ] ZU,AVX512BW,FUTURE */ + /* 270(001 200) 001(90) 110 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KMOVQ, 2, {OPMASKREG|BITS64|RN_L16,RM_OPMASK|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65302, 503, 4421}, + /* 1 : KMOVQ kreg64,krm64 [rm: evex.l0.0f.ko64 90 /r ] ZU,AVX512BW,FUTURE,APX */ + /* 250(f1 fc 08) 300 001(90) 110 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KMOVQ, 2, {OPMASKREG|BITS64,RM_OPMASK|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+29641, 504, 4421}, + /* 2 : KMOVQ mem64,kreg64 [mr: vex.l0.0f.ko64 91 /r ] ZU,AVX512BW,FUTURE */ + /* 270(001 200) 001(91) 101 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KMOVQ, 2, {MEMORY|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65330, 503, 4437}, + /* 3 : KMOVQ mem64,kreg64 [mr: evex.l0.0f.ko64 91 /r ] ZU,AVX512BW,FUTURE,APX */ + /* 250(f1 fc 08) 300 001(91) 101 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KMOVQ, 2, {MEMORY|BITS64,OPMASKREG|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+29677, 504, 4437}, + /* 4 : KMOVQ kreg64,reg64 [rm: vex.l0.0f.f2.w1 92 /r ] ZU,LONG,PROT,AVX512BW,X86_64 */ + /* 270(001 203) 001(92) 110 : NOAPX,ZU,LONG,VEX,PROT,AVX512BW,X86_64 */ + {I_KMOVQ, 2, {OPMASKREG|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65344, 505, 4451}, + /* 5 : KMOVQ kreg64,reg64 [rm: evex.l0.0f.f2.w1 92 /r ] ZU,LONG,PROT,AVX512BW,X86_64,APX */ + /* 250(f1 ff 08) 300 001(92) 110 : ZU,LONG,EVEX,PROT,AVX512BW,APX,X86_64 */ + {I_KMOVQ, 2, {OPMASKREG|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+29695, 506, 4451}, + /* 6 : KMOVQ reg64,kreg64 [rm: vex.l0.0f.f2.w1 93 /r ] ZU,LONG,PROT,AVX512BW,X86_64 */ + /* 270(001 203) 001(93) 110 : NOAPX,ZU,LONG,VEX,PROT,AVX512BW,X86_64 */ + {I_KMOVQ, 2, {REG_GPR|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65358, 505, 4459}, + /* 7 : KMOVQ reg64,kreg64 [rm: evex.l0.0f.f2.w1 93 /r ] ZU,LONG,PROT,AVX512BW,X86_64,APX */ + /* 250(f1 ff 08) 300 001(93) 110 : ZU,LONG,EVEX,PROT,AVX512BW,APX,X86_64 */ + {I_KMOVQ, 2, {REG_GPR|BITS64,OPMASKREG|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+29713, 506, 4459}, +}; + +static const struct itemplate instrux_KMOV[36] = { + /* 0 : KMOV kreg8,krm8 [rm: vex.l0.0f.ko8 90 /r ] ND,ZU,AVX512DQ,FUTURE */ + /* 270(001 001) 001(90) 110 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_KMOV, 2, {OPMASKREG|BITS8|RN_L16,RM_OPMASK|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65281, 499, 4422}, + /* 1 : KMOV kreg8,krm8 [rm: evex.l0.0f.ko8 90 /r ] ND,ZU,AVX512DQ,FUTURE,APX */ + /* 250(f1 7d 08) 300 001(90) 110 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KMOV, 2, {OPMASKREG|BITS8,RM_OPMASK|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+29614, 500, 4422}, + /* 2 : KMOV kreg16,krm16 [rm: vex.l0.0f.ko16 90 /r ] ND,ZU,AVX512F,FUTURE */ + /* 270(001 000) 001(90) 110 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_KMOV, 2, {OPMASKREG|BITS16|RN_L16,RM_OPMASK|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65288, 501, 4423}, + /* 3 : KMOV kreg16,krm16 [rm: evex.l0.0f.ko16 90 /r ] ND,ZU,AVX512F,FUTURE,APX */ + /* 250(f1 7c 08) 300 001(90) 110 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_KMOV, 2, {OPMASKREG|BITS16,RM_OPMASK|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29623, 502, 4423}, + /* 4 : KMOV kreg32,krm32 [rm: vex.l0.0f.ko32 90 /r ] ND,ZU,AVX512BW,FUTURE */ + /* 270(001 201) 001(90) 110 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KMOV, 2, {OPMASKREG|BITS32|RN_L16,RM_OPMASK|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65295, 503, 4424}, + /* 5 : KMOV kreg32,krm32 [rm: evex.l0.0f.ko32 90 /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 250(f1 fd 08) 300 001(90) 110 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KMOV, 2, {OPMASKREG|BITS32,RM_OPMASK|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+29632, 504, 4424}, + /* 6 : KMOV kreg64,krm64 [rm: vex.l0.0f.ko64 90 /r ] ND,ZU,AVX512BW,FUTURE */ + /* 270(001 200) 001(90) 110 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KMOV, 2, {OPMASKREG|BITS64|RN_L16,RM_OPMASK|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65302, 503, 4425}, + /* 7 : KMOV kreg64,krm64 [rm: evex.l0.0f.ko64 90 /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 250(f1 fc 08) 300 001(90) 110 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KMOV, 2, {OPMASKREG|BITS64,RM_OPMASK|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+29641, 504, 4425}, + /* 8 : KMOV mem8,kreg8 [mr: vex.l0.0f.ko8 91 /r ] ND,ZU,AVX512DQ,FUTURE */ + /* 270(001 001) 001(91) 101 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_KMOV, 2, {MEMORY|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65309, 499, 4438}, + /* 9 : KMOV mem8,kreg8 [mr: evex.l0.0f.ko8 91 /r ] ND,ZU,AVX512DQ,FUTURE,APX */ + /* 250(f1 7d 08) 300 001(91) 101 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KMOV, 2, {MEMORY|BITS8,OPMASKREG|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+29650, 500, 4438}, + /* 10 : KMOV mem16,kreg16 [mr: vex.l0.0f.ko16 91 /r ] ND,ZU,AVX512DQ,FUTURE */ + /* 270(001 000) 001(91) 101 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_KMOV, 2, {MEMORY|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65316, 499, 4439}, + /* 11 : KMOV mem16,kreg16 [mr: evex.l0.0f.ko16 91 /r ] ND,ZU,AVX512DQ,FUTURE,APX */ + /* 250(f1 7c 08) 300 001(91) 101 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KMOV, 2, {MEMORY|BITS16,OPMASKREG|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29659, 500, 4439}, + /* 12 : KMOV mem32,kreg32 [mr: vex.l0.0f.ko32 91 /r ] ND,ZU,AVX512BW,FUTURE */ + /* 270(001 201) 001(91) 101 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KMOV, 2, {MEMORY|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65323, 503, 4440}, + /* 13 : KMOV mem32,kreg32 [mr: evex.l0.0f.ko32 91 /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 250(f1 fd 08) 300 001(91) 101 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KMOV, 2, {MEMORY|BITS32,OPMASKREG|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+29668, 504, 4440}, + /* 14 : KMOV mem64,kreg64 [mr: vex.l0.0f.ko64 91 /r ] ND,ZU,AVX512BW,FUTURE */ + /* 270(001 200) 001(91) 101 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KMOV, 2, {MEMORY|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65330, 503, 4441}, + /* 15 : KMOV mem64,kreg64 [mr: evex.l0.0f.ko64 91 /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 250(f1 fc 08) 300 001(91) 101 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KMOV, 2, {MEMORY|BITS64,OPMASKREG|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+29677, 504, 4441}, + /* 16 : KMOV kreg32,reg32 [rm: vex.l0.0f.f2.w0 92 /r ] ND,ZU,AVX512BW,FUTURE */ + /* 270(001 003) 001(92) 110 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KMOV, 2, {OPMASKREG|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65337, 503, 4452}, + /* 17 : KMOV kreg32,reg32 [rm: evex.l0.0f.f2.w0 92 /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 250(f1 7f 08) 300 001(92) 110 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KMOV, 2, {OPMASKREG|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+29686, 504, 4452}, + /* 18 : KMOV kreg64,reg64 [rm: vex.l0.0f.f2.w1 92 /r ] ND,ZU,LONG,PROT,AVX512BW,X86_64 */ + /* 270(001 203) 001(92) 110 : NOAPX,ZU,LONG,VEX,PROT,AVX512BW,X86_64 */ + {I_KMOV, 2, {OPMASKREG|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65344, 505, 4453}, + /* 19 : KMOV kreg64,reg64 [rm: evex.l0.0f.f2.w1 92 /r ] ND,ZU,LONG,PROT,AVX512BW,X86_64,APX */ + /* 250(f1 ff 08) 300 001(92) 110 : ZU,LONG,EVEX,PROT,AVX512BW,APX,X86_64 */ + {I_KMOV, 2, {OPMASKREG|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+29695, 506, 4453}, + /* 20 : KMOV reg32,kreg32 [rm: vex.l0.0f.f2.w0 93 /r ] ND,ZU,AVX512BW,FUTURE */ + /* 270(001 003) 001(93) 110 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KMOV, 2, {REG_GPR|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65351, 503, 4460}, + /* 21 : KMOV reg32,kreg32 [rm: evex.l0.0f.f2.w0 93 /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 250(f1 7f 08) 300 001(93) 110 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KMOV, 2, {REG_GPR|BITS32,OPMASKREG|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+29704, 504, 4460}, + /* 22 : KMOV reg64,kreg64 [rm: vex.l0.0f.f2.w1 93 /r ] ND,ZU,LONG,PROT,AVX512BW,X86_64 */ + /* 270(001 203) 001(93) 110 : NOAPX,ZU,LONG,VEX,PROT,AVX512BW,X86_64 */ + {I_KMOV, 2, {REG_GPR|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65358, 505, 4461}, + /* 23 : KMOV reg64,kreg64 [rm: evex.l0.0f.f2.w1 93 /r ] ND,ZU,LONG,PROT,AVX512BW,X86_64,APX */ + /* 250(f1 ff 08) 300 001(93) 110 : ZU,LONG,EVEX,PROT,AVX512BW,APX,X86_64 */ + {I_KMOV, 2, {REG_GPR|BITS64,OPMASKREG|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+29713, 506, 4461}, + /* 24 : KMOV kreg8,reg32 [rm: vex.l0.0f.66.w0 92 /r ] ND,ZU,AVX512DQ,FUTURE */ + /* 270(001 001) 001(92) 110 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_KMOV, 2, {OPMASKREG|BITS8|RN_L16,REG_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65365, 499, 4467}, + /* 25 : KMOV kreg8,reg32 [rm: evex.l0.0f.66.w0 92 /r ] ND,ZU,AVX512DQ,FUTURE,APX */ + /* 250(f1 7d 08) 300 001(92) 110 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KMOV, 2, {OPMASKREG|BITS8,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+29722, 500, 4467}, + /* 26 : KMOV kreg8,reg8 [rm: vex.l0.0f.66.w0 92 /r ] ND,ZU,AVX512DQ,FUTURE */ + /* 270(001 001) 001(92) 110 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_KMOV, 2, {OPMASKREG|BITS8|RN_L16,REG_GPR|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65365, 499, 4471}, + /* 27 : KMOV kreg8,reg8 [rm: evex.l0.0f.66.w0 92 /r ] ND,ZU,AVX512DQ,FUTURE,APX */ + /* 250(f1 7d 08) 300 001(92) 110 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KMOV, 2, {OPMASKREG|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+29722, 500, 4471}, + /* 28 : KMOV kreg16,reg32 [rm: vex.l0.0f.np.w0 92 /r ] ND,ZU,AVX512F,FUTURE */ + /* 270(001 000) 001(92) 110 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_KMOV, 2, {OPMASKREG|BITS16|RN_L16,REG_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65372, 501, 4475}, + /* 29 : KMOV kreg16,reg32 [rm: evex.l0.0f.np.w0 92 /r ] ND,ZU,AVX512F,FUTURE,APX */ + /* 250(f1 7c 08) 300 001(92) 110 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_KMOV, 2, {OPMASKREG|BITS16,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+29731, 502, 4475}, + /* 30 : KMOV kreg16,reg16 [rm: vex.l0.0f.np.w0 92 /r ] ND,ZU,AVX512F,FUTURE */ + /* 270(001 000) 001(92) 110 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_KMOV, 2, {OPMASKREG|BITS16|RN_L16,REG_GPR|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65372, 501, 4479}, + /* 31 : KMOV kreg16,reg16 [rm: evex.l0.0f.np.w0 92 /r ] ND,ZU,AVX512F,FUTURE,APX */ + /* 250(f1 7c 08) 300 001(92) 110 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_KMOV, 2, {OPMASKREG|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29731, 502, 4479}, + /* 32 : KMOV reg32,kreg8 [rm: vex.l0.0f.66.w0 93 /r ] ND,ZU,AVX512DQ,FUTURE */ + /* 270(001 001) 001(93) 110 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_KMOV, 2, {REG_GPR|BITS32|RN_L16,OPMASKREG|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65379, 499, 4483}, + /* 33 : KMOV reg32,kreg8 [rm: evex.l0.0f.66.w0 93 /r ] ND,ZU,AVX512DQ,FUTURE,APX */ + /* 250(f1 7d 08) 300 001(93) 110 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KMOV, 2, {REG_GPR|BITS32,OPMASKREG|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+29740, 500, 4483}, + /* 34 : KMOV reg32,kreg16 [rm: vex.l0.0f.np.w0 93 /r ] ND,ZU,AVX512F,FUTURE */ + /* 270(001 000) 001(93) 110 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_KMOV, 2, {REG_GPR|BITS32|RN_L16,OPMASKREG|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65386, 501, 4487}, + /* 35 : KMOV reg32,kreg16 [rm: evex.l0.0f.np.w0 93 /r ] ND,ZU,AVX512F,FUTURE,APX */ + /* 250(f1 7c 08) 300 001(93) 110 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_KMOV, 2, {REG_GPR|BITS32,OPMASKREG|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29749, 502, 4487}, +}; + +static const struct itemplate instrux_MOVB[10] = { + /* 0 : MOVB kreg8,krm8 [rm: vex.l0.0f.ko8 90 /r ] ND,ZU,AVX512DQ,FUTURE */ + /* 270(001 001) 001(90) 110 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_MOVB, 2, {OPMASKREG|BITS8|RN_L16,RM_OPMASK|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65281, 499, 4426}, + /* 1 : MOVB kreg8,krm8 [rm: evex.l0.0f.ko8 90 /r ] ND,ZU,AVX512DQ,FUTURE,APX */ + /* 250(f1 7d 08) 300 001(90) 110 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_MOVB, 2, {OPMASKREG|BITS8,RM_OPMASK|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+29614, 500, 4426}, + /* 2 : MOVB mem8,kreg8 [mr: vex.l0.0f.ko8 91 /r ] ND,ZU,AVX512DQ,FUTURE */ + /* 270(001 001) 001(91) 101 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_MOVB, 2, {MEMORY|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65309, 499, 4442}, + /* 3 : MOVB mem8,kreg8 [mr: evex.l0.0f.ko8 91 /r ] ND,ZU,AVX512DQ,FUTURE,APX */ + /* 250(f1 7d 08) 300 001(91) 101 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_MOVB, 2, {MEMORY|BITS8,OPMASKREG|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+29650, 500, 4442}, + /* 4 : MOVB kreg8,reg32 [rm: vex.l0.0f.66.w0 92 /r ] ND,ZU,AVX512DQ,FUTURE */ + /* 270(001 001) 001(92) 110 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_MOVB, 2, {OPMASKREG|BITS8|RN_L16,REG_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65365, 499, 4468}, + /* 5 : MOVB kreg8,reg32 [rm: evex.l0.0f.66.w0 92 /r ] ND,ZU,AVX512DQ,FUTURE,APX */ + /* 250(f1 7d 08) 300 001(92) 110 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_MOVB, 2, {OPMASKREG|BITS8,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+29722, 500, 4468}, + /* 6 : MOVB kreg8,reg8 [rm: vex.l0.0f.66.w0 92 /r ] ND,ZU,AVX512DQ,FUTURE */ + /* 270(001 001) 001(92) 110 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_MOVB, 2, {OPMASKREG|BITS8|RN_L16,REG_GPR|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65365, 499, 4472}, + /* 7 : MOVB kreg8,reg8 [rm: evex.l0.0f.66.w0 92 /r ] ND,ZU,AVX512DQ,FUTURE,APX */ + /* 250(f1 7d 08) 300 001(92) 110 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_MOVB, 2, {OPMASKREG|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+29722, 500, 4472}, + /* 8 : MOVB reg32,kreg8 [rm: vex.l0.0f.66.w0 93 /r ] ND,ZU,AVX512DQ,FUTURE */ + /* 270(001 001) 001(93) 110 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_MOVB, 2, {REG_GPR|BITS32|RN_L16,OPMASKREG|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65379, 499, 4484}, + /* 9 : MOVB reg32,kreg8 [rm: evex.l0.0f.66.w0 93 /r ] ND,ZU,AVX512DQ,FUTURE,APX */ + /* 250(f1 7d 08) 300 001(93) 110 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_MOVB, 2, {REG_GPR|BITS32,OPMASKREG|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+29740, 500, 4484}, +}; + +static const struct itemplate instrux_MOVW[10] = { + /* 0 : MOVW kreg16,krm16 [rm: vex.l0.0f.ko16 90 /r ] ND,ZU,AVX512F,FUTURE */ + /* 270(001 000) 001(90) 110 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_MOVW, 2, {OPMASKREG|BITS16|RN_L16,RM_OPMASK|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65288, 501, 4427}, + /* 1 : MOVW kreg16,krm16 [rm: evex.l0.0f.ko16 90 /r ] ND,ZU,AVX512F,FUTURE,APX */ + /* 250(f1 7c 08) 300 001(90) 110 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_MOVW, 2, {OPMASKREG|BITS16,RM_OPMASK|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29623, 502, 4427}, + /* 2 : MOVW mem16,kreg16 [mr: vex.l0.0f.ko16 91 /r ] ND,ZU,AVX512DQ,FUTURE */ + /* 270(001 000) 001(91) 101 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_MOVW, 2, {MEMORY|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65316, 499, 4443}, + /* 3 : MOVW mem16,kreg16 [mr: evex.l0.0f.ko16 91 /r ] ND,ZU,AVX512DQ,FUTURE,APX */ + /* 250(f1 7c 08) 300 001(91) 101 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_MOVW, 2, {MEMORY|BITS16,OPMASKREG|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29659, 500, 4443}, + /* 4 : MOVW kreg16,reg32 [rm: vex.l0.0f.np.w0 92 /r ] ND,ZU,AVX512F,FUTURE */ + /* 270(001 000) 001(92) 110 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_MOVW, 2, {OPMASKREG|BITS16|RN_L16,REG_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65372, 501, 4476}, + /* 5 : MOVW kreg16,reg32 [rm: evex.l0.0f.np.w0 92 /r ] ND,ZU,AVX512F,FUTURE,APX */ + /* 250(f1 7c 08) 300 001(92) 110 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_MOVW, 2, {OPMASKREG|BITS16,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+29731, 502, 4476}, + /* 6 : MOVW kreg16,reg16 [rm: vex.l0.0f.np.w0 92 /r ] ND,ZU,AVX512F,FUTURE */ + /* 270(001 000) 001(92) 110 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_MOVW, 2, {OPMASKREG|BITS16|RN_L16,REG_GPR|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65372, 501, 4480}, + /* 7 : MOVW kreg16,reg16 [rm: evex.l0.0f.np.w0 92 /r ] ND,ZU,AVX512F,FUTURE,APX */ + /* 250(f1 7c 08) 300 001(92) 110 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_MOVW, 2, {OPMASKREG|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29731, 502, 4480}, + /* 8 : MOVW reg32,kreg16 [rm: vex.l0.0f.np.w0 93 /r ] ND,ZU,AVX512F,FUTURE */ + /* 270(001 000) 001(93) 110 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_MOVW, 2, {REG_GPR|BITS32|RN_L16,OPMASKREG|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65386, 501, 4488}, + /* 9 : MOVW reg32,kreg16 [rm: evex.l0.0f.np.w0 93 /r ] ND,ZU,AVX512F,FUTURE,APX */ + /* 250(f1 7c 08) 300 001(93) 110 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_MOVW, 2, {REG_GPR|BITS32,OPMASKREG|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29749, 502, 4488}, +}; + +static const struct itemplate instrux_KADDB[4] = { + /* 0 : KADDB kreg8,kreg8*,kreg8 [rvm: vex.l1.0f.ko8 4a /r ] ZU,AVX512DQ,FUTURE */ + /* 261(001 005) 001(4a) 120 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_KADDB, 3, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65393, 499, 4491}, + /* 1 : KADDB kreg8,kreg8*,kreg8 [rvm: evex.l1.0f.ko8 4a /r ] ZU,AVX512DQ,FUTURE,APX */ + /* 241(f1 7d 28) 300 001(4a) 120 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KADDB, 3, {OPMASKREG|BITS8,OPMASKREG|BITS8,OPMASKREG|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+29758, 500, 4491}, + /* 2 : KADDB kreg8,kreg8 [r+vm: vex.l1.0f.ko8 4a /r ] ND,ZU,AVX512DQ,FUTURE */ + /* 260(001 005) 001(4a) 110 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_KADDB, 2, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65400, 499, 4491}, + /* 3 : KADDB kreg8,kreg8 [r+vm: evex.l1.0f.ko8 4a /r ] ND,ZU,AVX512DQ,FUTURE,APX */ + /* 240(f1 7d 28) 300 001(4a) 110 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KADDB, 2, {OPMASKREG|BITS8,OPMASKREG|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+29767, 500, 4491}, +}; + +static const struct itemplate instrux_KADDW[4] = { + /* 0 : KADDW kreg16,kreg16*,kreg16 [rvm: vex.l1.0f.ko16 4a /r ] ZU,AVX512DQ,FUTURE */ + /* 261(001 004) 001(4a) 120 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_KADDW, 3, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65407, 499, 4492}, + /* 1 : KADDW kreg16,kreg16*,kreg16 [rvm: evex.l1.0f.ko16 4a /r ] ZU,AVX512DQ,FUTURE,APX */ + /* 241(f1 7c 28) 300 001(4a) 120 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KADDW, 3, {OPMASKREG|BITS16,OPMASKREG|BITS16,OPMASKREG|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+29776, 500, 4492}, + /* 2 : KADDW kreg16,kreg16 [r+vm: vex.l1.0f.ko16 4a /r ] ND,ZU,AVX512DQ,FUTURE */ + /* 260(001 004) 001(4a) 110 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_KADDW, 2, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65414, 499, 4492}, + /* 3 : KADDW kreg16,kreg16 [r+vm: evex.l1.0f.ko16 4a /r ] ND,ZU,AVX512DQ,FUTURE,APX */ + /* 240(f1 7c 28) 300 001(4a) 110 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KADDW, 2, {OPMASKREG|BITS16,OPMASKREG|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29785, 500, 4492}, +}; + +static const struct itemplate instrux_KADDD[4] = { + /* 0 : KADDD kreg32,kreg32*,kreg32 [rvm: vex.l1.0f.ko32 4a /r ] ZU,AVX512BW,FUTURE */ + /* 261(001 205) 001(4a) 120 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KADDD, 3, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65421, 503, 4493}, + /* 1 : KADDD kreg32,kreg32*,kreg32 [rvm: evex.l1.0f.ko32 4a /r ] ZU,AVX512BW,FUTURE,APX */ + /* 241(f1 fd 28) 300 001(4a) 120 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KADDD, 3, {OPMASKREG|BITS32,OPMASKREG|BITS32,OPMASKREG|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+29794, 504, 4493}, + /* 2 : KADDD kreg32,kreg32 [r+vm: vex.l1.0f.ko32 4a /r ] ND,ZU,AVX512BW,FUTURE */ + /* 260(001 205) 001(4a) 110 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KADDD, 2, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65428, 503, 4493}, + /* 3 : KADDD kreg32,kreg32 [r+vm: evex.l1.0f.ko32 4a /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 240(f1 fd 28) 300 001(4a) 110 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KADDD, 2, {OPMASKREG|BITS32,OPMASKREG|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+29803, 504, 4493}, +}; + +static const struct itemplate instrux_KADDQ[4] = { + /* 0 : KADDQ kreg64,kreg64*,kreg64 [rvm: vex.l1.0f.ko64 4a /r ] ZU,AVX512BW,FUTURE */ + /* 261(001 204) 001(4a) 120 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KADDQ, 3, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65435, 503, 4494}, + /* 1 : KADDQ kreg64,kreg64*,kreg64 [rvm: evex.l1.0f.ko64 4a /r ] ZU,AVX512BW,FUTURE,APX */ + /* 241(f1 fc 28) 300 001(4a) 120 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KADDQ, 3, {OPMASKREG|BITS64,OPMASKREG|BITS64,OPMASKREG|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+29812, 504, 4494}, + /* 2 : KADDQ kreg64,kreg64 [r+vm: vex.l1.0f.ko64 4a /r ] ND,ZU,AVX512BW,FUTURE */ + /* 260(001 204) 001(4a) 110 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KADDQ, 2, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65442, 503, 4494}, + /* 3 : KADDQ kreg64,kreg64 [r+vm: evex.l1.0f.ko64 4a /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 240(f1 fc 28) 300 001(4a) 110 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KADDQ, 2, {OPMASKREG|BITS64,OPMASKREG|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+29821, 504, 4494}, +}; + +static const struct itemplate instrux_KADD[16] = { + /* 0 : KADD kreg8,kreg8*,kreg8 [rvm: vex.l1.0f.ko8 4a /r ] SM0,ND,SM1,SM2,ZU,AVX512DQ,FUTURE */ + /* 261(001 005) 001(4a) 120 : SM0,SM1,SM2,NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_KADD, 3, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65393, 507, 4495}, + /* 1 : KADD kreg8,kreg8*,kreg8 [rvm: evex.l1.0f.ko8 4a /r ] SM0,ND,SM1,SM2,ZU,AVX512DQ,FUTURE,APX */ + /* 241(f1 7d 28) 300 001(4a) 120 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KADD, 3, {OPMASKREG|BITS8,OPMASKREG|BITS8,OPMASKREG|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+29758, 508, 4495}, + /* 2 : KADD kreg8,kreg8 [r+vm: vex.l1.0f.ko8 4a /r ] SM0,ND,SM1,ZU,AVX512DQ,FUTURE */ + /* 260(001 005) 001(4a) 110 : SM0,SM1,NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_KADD, 2, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65400, 509, 4495}, + /* 3 : KADD kreg8,kreg8 [r+vm: evex.l1.0f.ko8 4a /r ] SM0,ND,SM1,ZU,AVX512DQ,FUTURE,APX */ + /* 240(f1 7d 28) 300 001(4a) 110 : SM0,SM1,ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KADD, 2, {OPMASKREG|BITS8,OPMASKREG|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+29767, 510, 4495}, + /* 4 : KADD kreg16,kreg16*,kreg16 [rvm: vex.l1.0f.ko16 4a /r ] SM0,ND,SM1,SM2,ZU,AVX512DQ,FUTURE */ + /* 261(001 004) 001(4a) 120 : SM0,SM1,SM2,NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_KADD, 3, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65407, 507, 4496}, + /* 5 : KADD kreg16,kreg16*,kreg16 [rvm: evex.l1.0f.ko16 4a /r ] SM0,ND,SM1,SM2,ZU,AVX512DQ,FUTURE,APX */ + /* 241(f1 7c 28) 300 001(4a) 120 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KADD, 3, {OPMASKREG|BITS16,OPMASKREG|BITS16,OPMASKREG|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+29776, 508, 4496}, + /* 6 : KADD kreg16,kreg16 [r+vm: vex.l1.0f.ko16 4a /r ] SM0,ND,SM1,ZU,AVX512DQ,FUTURE */ + /* 260(001 004) 001(4a) 110 : SM0,SM1,NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_KADD, 2, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65414, 509, 4496}, + /* 7 : KADD kreg16,kreg16 [r+vm: evex.l1.0f.ko16 4a /r ] SM0,ND,SM1,ZU,AVX512DQ,FUTURE,APX */ + /* 240(f1 7c 28) 300 001(4a) 110 : SM0,SM1,ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KADD, 2, {OPMASKREG|BITS16,OPMASKREG|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29785, 510, 4496}, + /* 8 : KADD kreg32,kreg32*,kreg32 [rvm: vex.l1.0f.ko32 4a /r ] ND,SM0,SM1,SM2,ZU,AVX512BW,FUTURE */ + /* 261(001 205) 001(4a) 120 : SM0,SM1,SM2,NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KADD, 3, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65421, 511, 4497}, + /* 9 : KADD kreg32,kreg32*,kreg32 [rvm: evex.l1.0f.ko32 4a /r ] ND,SM0,SM1,SM2,ZU,AVX512BW,FUTURE,APX */ + /* 241(f1 fd 28) 300 001(4a) 120 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KADD, 3, {OPMASKREG|BITS32,OPMASKREG|BITS32,OPMASKREG|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+29794, 512, 4497}, + /* 10 : KADD kreg32,kreg32 [r+vm: vex.l1.0f.ko32 4a /r ] SM0,ND,SM1,ZU,AVX512BW,FUTURE */ + /* 260(001 205) 001(4a) 110 : SM0,SM1,NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KADD, 2, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65428, 513, 4497}, + /* 11 : KADD kreg32,kreg32 [r+vm: evex.l1.0f.ko32 4a /r ] SM0,ND,SM1,ZU,AVX512BW,FUTURE,APX */ + /* 240(f1 fd 28) 300 001(4a) 110 : SM0,SM1,ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KADD, 2, {OPMASKREG|BITS32,OPMASKREG|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+29803, 514, 4497}, + /* 12 : KADD kreg64,kreg64*,kreg64 [rvm: vex.l1.0f.ko64 4a /r ] SM0,ND,SM1,SM2,ZU,AVX512BW,FUTURE */ + /* 261(001 204) 001(4a) 120 : SM0,SM1,SM2,NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KADD, 3, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65435, 511, 4498}, + /* 13 : KADD kreg64,kreg64*,kreg64 [rvm: evex.l1.0f.ko64 4a /r ] SM0,ND,SM1,SM2,ZU,AVX512BW,FUTURE,APX */ + /* 241(f1 fc 28) 300 001(4a) 120 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KADD, 3, {OPMASKREG|BITS64,OPMASKREG|BITS64,OPMASKREG|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+29812, 512, 4498}, + /* 14 : KADD kreg64,kreg64 [r+vm: vex.l1.0f.ko64 4a /r ] ND,SM0,SM1,ZU,AVX512BW,FUTURE */ + /* 260(001 204) 001(4a) 110 : SM0,SM1,NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KADD, 2, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65442, 513, 4498}, + /* 15 : KADD kreg64,kreg64 [r+vm: evex.l1.0f.ko64 4a /r ] ND,SM0,SM1,ZU,AVX512BW,FUTURE,APX */ + /* 240(f1 fc 28) 300 001(4a) 110 : SM0,SM1,ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KADD, 2, {OPMASKREG|BITS64,OPMASKREG|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+29821, 514, 4498}, +}; + +static const struct itemplate instrux_ADDB[4] = { + /* 0 : ADDB kreg8,kreg8*,kreg8 [rvm: vex.l1.0f.ko8 4a /r ] ND,ZU,AVX512DQ,FUTURE */ + /* 261(001 005) 001(4a) 120 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_ADDB, 3, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65393, 499, 4499}, + /* 1 : ADDB kreg8,kreg8*,kreg8 [rvm: evex.l1.0f.ko8 4a /r ] ND,ZU,AVX512DQ,FUTURE,APX */ + /* 241(f1 7d 28) 300 001(4a) 120 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_ADDB, 3, {OPMASKREG|BITS8,OPMASKREG|BITS8,OPMASKREG|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+29758, 500, 4499}, + /* 2 : ADDB kreg8,kreg8 [r+vm: vex.l1.0f.ko8 4a /r ] ND,ZU,AVX512DQ,FUTURE */ + /* 260(001 005) 001(4a) 110 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_ADDB, 2, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65400, 499, 4499}, + /* 3 : ADDB kreg8,kreg8 [r+vm: evex.l1.0f.ko8 4a /r ] ND,ZU,AVX512DQ,FUTURE,APX */ + /* 240(f1 7d 28) 300 001(4a) 110 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_ADDB, 2, {OPMASKREG|BITS8,OPMASKREG|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+29767, 500, 4499}, +}; + +static const struct itemplate instrux_ADDW[4] = { + /* 0 : ADDW kreg16,kreg16*,kreg16 [rvm: vex.l1.0f.ko16 4a /r ] ND,ZU,AVX512DQ,FUTURE */ + /* 261(001 004) 001(4a) 120 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_ADDW, 3, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65407, 499, 4500}, + /* 1 : ADDW kreg16,kreg16*,kreg16 [rvm: evex.l1.0f.ko16 4a /r ] ND,ZU,AVX512DQ,FUTURE,APX */ + /* 241(f1 7c 28) 300 001(4a) 120 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_ADDW, 3, {OPMASKREG|BITS16,OPMASKREG|BITS16,OPMASKREG|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+29776, 500, 4500}, + /* 2 : ADDW kreg16,kreg16 [r+vm: vex.l1.0f.ko16 4a /r ] ND,ZU,AVX512DQ,FUTURE */ + /* 260(001 004) 001(4a) 110 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_ADDW, 2, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65414, 499, 4500}, + /* 3 : ADDW kreg16,kreg16 [r+vm: evex.l1.0f.ko16 4a /r ] ND,ZU,AVX512DQ,FUTURE,APX */ + /* 240(f1 7c 28) 300 001(4a) 110 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_ADDW, 2, {OPMASKREG|BITS16,OPMASKREG|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29785, 500, 4500}, +}; + +static const struct itemplate instrux_ADDD[4] = { + /* 0 : ADDD kreg32,kreg32*,kreg32 [rvm: vex.l1.0f.ko32 4a /r ] ND,ZU,AVX512BW,FUTURE */ + /* 261(001 205) 001(4a) 120 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_ADDD, 3, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65421, 503, 4501}, + /* 1 : ADDD kreg32,kreg32*,kreg32 [rvm: evex.l1.0f.ko32 4a /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 241(f1 fd 28) 300 001(4a) 120 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_ADDD, 3, {OPMASKREG|BITS32,OPMASKREG|BITS32,OPMASKREG|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+29794, 504, 4501}, + /* 2 : ADDD kreg32,kreg32 [r+vm: vex.l1.0f.ko32 4a /r ] ND,ZU,AVX512BW,FUTURE */ + /* 260(001 205) 001(4a) 110 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_ADDD, 2, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65428, 503, 4501}, + /* 3 : ADDD kreg32,kreg32 [r+vm: evex.l1.0f.ko32 4a /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 240(f1 fd 28) 300 001(4a) 110 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_ADDD, 2, {OPMASKREG|BITS32,OPMASKREG|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+29803, 504, 4501}, +}; + +static const struct itemplate instrux_ADDQ[4] = { + /* 0 : ADDQ kreg64,kreg64*,kreg64 [rvm: vex.l1.0f.ko64 4a /r ] ND,ZU,AVX512BW,FUTURE */ + /* 261(001 204) 001(4a) 120 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_ADDQ, 3, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65435, 503, 4502}, + /* 1 : ADDQ kreg64,kreg64*,kreg64 [rvm: evex.l1.0f.ko64 4a /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 241(f1 fc 28) 300 001(4a) 120 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_ADDQ, 3, {OPMASKREG|BITS64,OPMASKREG|BITS64,OPMASKREG|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+29812, 504, 4502}, + /* 2 : ADDQ kreg64,kreg64 [r+vm: vex.l1.0f.ko64 4a /r ] ND,ZU,AVX512BW,FUTURE */ + /* 260(001 204) 001(4a) 110 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_ADDQ, 2, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65442, 503, 4502}, + /* 3 : ADDQ kreg64,kreg64 [r+vm: evex.l1.0f.ko64 4a /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 240(f1 fc 28) 300 001(4a) 110 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_ADDQ, 2, {OPMASKREG|BITS64,OPMASKREG|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+29821, 504, 4502}, +}; + +static const struct itemplate instrux_KANDB[4] = { + /* 0 : KANDB kreg8,kreg8*,kreg8 [rvm: vex.l1.0f.ko8 41 /r ] ZU,AVX512DQ,FUTURE */ + /* 261(001 005) 001(41) 120 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_KANDB, 3, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65449, 499, 4507}, + /* 1 : KANDB kreg8,kreg8*,kreg8 [rvm: evex.l1.0f.ko8 41 /r ] ZU,AVX512DQ,FUTURE,APX */ + /* 241(f1 7d 28) 300 001(41) 120 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KANDB, 3, {OPMASKREG|BITS8,OPMASKREG|BITS8,OPMASKREG|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+29830, 500, 4507}, + /* 2 : KANDB kreg8,kreg8 [r+vm: vex.l1.0f.ko8 41 /r ] ND,ZU,AVX512DQ,FUTURE */ + /* 260(001 005) 001(41) 110 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_KANDB, 2, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65456, 499, 4507}, + /* 3 : KANDB kreg8,kreg8 [r+vm: evex.l1.0f.ko8 41 /r ] ND,ZU,AVX512DQ,FUTURE,APX */ + /* 240(f1 7d 28) 300 001(41) 110 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KANDB, 2, {OPMASKREG|BITS8,OPMASKREG|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+29839, 500, 4507}, +}; + +static const struct itemplate instrux_KANDW[4] = { + /* 0 : KANDW kreg16,kreg16*,kreg16 [rvm: vex.l1.0f.ko16 41 /r ] ZU,AVX512F,FUTURE */ + /* 261(001 004) 001(41) 120 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_KANDW, 3, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65463, 501, 4508}, + /* 1 : KANDW kreg16,kreg16*,kreg16 [rvm: evex.l1.0f.ko16 41 /r ] ZU,AVX512F,FUTURE,APX */ + /* 241(f1 7c 28) 300 001(41) 120 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_KANDW, 3, {OPMASKREG|BITS16,OPMASKREG|BITS16,OPMASKREG|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+29848, 502, 4508}, + /* 2 : KANDW kreg16,kreg16 [r+vm: vex.l1.0f.ko16 41 /r ] ND,ZU,AVX512F,FUTURE */ + /* 260(001 004) 001(41) 110 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_KANDW, 2, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65470, 501, 4508}, + /* 3 : KANDW kreg16,kreg16 [r+vm: evex.l1.0f.ko16 41 /r ] ND,ZU,AVX512F,FUTURE,APX */ + /* 240(f1 7c 28) 300 001(41) 110 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_KANDW, 2, {OPMASKREG|BITS16,OPMASKREG|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29857, 502, 4508}, +}; + +static const struct itemplate instrux_KANDD[4] = { + /* 0 : KANDD kreg32,kreg32*,kreg32 [rvm: vex.l1.0f.ko32 41 /r ] ZU,AVX512BW,FUTURE */ + /* 261(001 205) 001(41) 120 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KANDD, 3, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65477, 503, 4509}, + /* 1 : KANDD kreg32,kreg32*,kreg32 [rvm: evex.l1.0f.ko32 41 /r ] ZU,AVX512BW,FUTURE,APX */ + /* 241(f1 fd 28) 300 001(41) 120 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KANDD, 3, {OPMASKREG|BITS32,OPMASKREG|BITS32,OPMASKREG|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+29866, 504, 4509}, + /* 2 : KANDD kreg32,kreg32 [r+vm: vex.l1.0f.ko32 41 /r ] ND,ZU,AVX512BW,FUTURE */ + /* 260(001 205) 001(41) 110 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KANDD, 2, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65484, 503, 4509}, + /* 3 : KANDD kreg32,kreg32 [r+vm: evex.l1.0f.ko32 41 /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 240(f1 fd 28) 300 001(41) 110 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KANDD, 2, {OPMASKREG|BITS32,OPMASKREG|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+29875, 504, 4509}, +}; + +static const struct itemplate instrux_KANDQ[4] = { + /* 0 : KANDQ kreg64,kreg64*,kreg64 [rvm: vex.l1.0f.ko64 41 /r ] ZU,AVX512BW,FUTURE */ + /* 261(001 204) 001(41) 120 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KANDQ, 3, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65491, 503, 4510}, + /* 1 : KANDQ kreg64,kreg64*,kreg64 [rvm: evex.l1.0f.ko64 41 /r ] ZU,AVX512BW,FUTURE,APX */ + /* 241(f1 fc 28) 300 001(41) 120 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KANDQ, 3, {OPMASKREG|BITS64,OPMASKREG|BITS64,OPMASKREG|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+29884, 504, 4510}, + /* 2 : KANDQ kreg64,kreg64 [r+vm: vex.l1.0f.ko64 41 /r ] ND,ZU,AVX512BW,FUTURE */ + /* 260(001 204) 001(41) 110 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KANDQ, 2, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65498, 503, 4510}, + /* 3 : KANDQ kreg64,kreg64 [r+vm: evex.l1.0f.ko64 41 /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 240(f1 fc 28) 300 001(41) 110 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KANDQ, 2, {OPMASKREG|BITS64,OPMASKREG|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+29893, 504, 4510}, +}; + +static const struct itemplate instrux_KAND[16] = { + /* 0 : KAND kreg8,kreg8*,kreg8 [rvm: vex.l1.0f.ko8 41 /r ] ND,SM0,SM1,SM2,ZU,AVX512DQ,FUTURE */ + /* 261(001 005) 001(41) 120 : SM0,SM1,SM2,NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_KAND, 3, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65449, 507, 4511}, + /* 1 : KAND kreg8,kreg8*,kreg8 [rvm: evex.l1.0f.ko8 41 /r ] ND,SM0,SM1,SM2,ZU,AVX512DQ,FUTURE,APX */ + /* 241(f1 7d 28) 300 001(41) 120 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KAND, 3, {OPMASKREG|BITS8,OPMASKREG|BITS8,OPMASKREG|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+29830, 508, 4511}, + /* 2 : KAND kreg8,kreg8 [r+vm: vex.l1.0f.ko8 41 /r ] SM0,ND,SM1,ZU,AVX512DQ,FUTURE */ + /* 260(001 005) 001(41) 110 : SM0,SM1,NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_KAND, 2, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65456, 509, 4511}, + /* 3 : KAND kreg8,kreg8 [r+vm: evex.l1.0f.ko8 41 /r ] SM0,ND,SM1,ZU,AVX512DQ,FUTURE,APX */ + /* 240(f1 7d 28) 300 001(41) 110 : SM0,SM1,ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KAND, 2, {OPMASKREG|BITS8,OPMASKREG|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+29839, 510, 4511}, + /* 4 : KAND kreg16,kreg16*,kreg16 [rvm: vex.l1.0f.ko16 41 /r ] SM0,ND,SM1,SM2,ZU,AVX512F,FUTURE */ + /* 261(001 004) 001(41) 120 : SM0,SM1,SM2,NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_KAND, 3, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65463, 523, 4512}, + /* 5 : KAND kreg16,kreg16*,kreg16 [rvm: evex.l1.0f.ko16 41 /r ] SM0,ND,SM1,SM2,ZU,AVX512F,FUTURE,APX */ + /* 241(f1 7c 28) 300 001(41) 120 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_KAND, 3, {OPMASKREG|BITS16,OPMASKREG|BITS16,OPMASKREG|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+29848, 524, 4512}, + /* 6 : KAND kreg16,kreg16 [r+vm: vex.l1.0f.ko16 41 /r ] SM0,ND,SM1,ZU,AVX512F,FUTURE */ + /* 260(001 004) 001(41) 110 : SM0,SM1,NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_KAND, 2, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65470, 525, 4512}, + /* 7 : KAND kreg16,kreg16 [r+vm: evex.l1.0f.ko16 41 /r ] SM0,ND,SM1,ZU,AVX512F,FUTURE,APX */ + /* 240(f1 7c 28) 300 001(41) 110 : SM0,SM1,ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_KAND, 2, {OPMASKREG|BITS16,OPMASKREG|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29857, 526, 4512}, + /* 8 : KAND kreg32,kreg32*,kreg32 [rvm: vex.l1.0f.ko32 41 /r ] SM0,ND,SM1,SM2,ZU,AVX512BW,FUTURE */ + /* 261(001 205) 001(41) 120 : SM0,SM1,SM2,NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KAND, 3, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65477, 511, 4513}, + /* 9 : KAND kreg32,kreg32*,kreg32 [rvm: evex.l1.0f.ko32 41 /r ] SM0,ND,SM1,SM2,ZU,AVX512BW,FUTURE,APX */ + /* 241(f1 fd 28) 300 001(41) 120 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KAND, 3, {OPMASKREG|BITS32,OPMASKREG|BITS32,OPMASKREG|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+29866, 512, 4513}, + /* 10 : KAND kreg32,kreg32 [r+vm: vex.l1.0f.ko32 41 /r ] ND,SM0,SM1,ZU,AVX512BW,FUTURE */ + /* 260(001 205) 001(41) 110 : SM0,SM1,NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KAND, 2, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65484, 513, 4513}, + /* 11 : KAND kreg32,kreg32 [r+vm: evex.l1.0f.ko32 41 /r ] ND,SM0,SM1,ZU,AVX512BW,FUTURE,APX */ + /* 240(f1 fd 28) 300 001(41) 110 : SM0,SM1,ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KAND, 2, {OPMASKREG|BITS32,OPMASKREG|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+29875, 514, 4513}, + /* 12 : KAND kreg64,kreg64*,kreg64 [rvm: vex.l1.0f.ko64 41 /r ] SM0,ND,SM1,SM2,ZU,AVX512BW,FUTURE */ + /* 261(001 204) 001(41) 120 : SM0,SM1,SM2,NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KAND, 3, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65491, 511, 4514}, + /* 13 : KAND kreg64,kreg64*,kreg64 [rvm: evex.l1.0f.ko64 41 /r ] SM0,ND,SM1,SM2,ZU,AVX512BW,FUTURE,APX */ + /* 241(f1 fc 28) 300 001(41) 120 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KAND, 3, {OPMASKREG|BITS64,OPMASKREG|BITS64,OPMASKREG|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+29884, 512, 4514}, + /* 14 : KAND kreg64,kreg64 [r+vm: vex.l1.0f.ko64 41 /r ] SM0,ND,SM1,ZU,AVX512BW,FUTURE */ + /* 260(001 204) 001(41) 110 : SM0,SM1,NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KAND, 2, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65498, 513, 4514}, + /* 15 : KAND kreg64,kreg64 [r+vm: evex.l1.0f.ko64 41 /r ] SM0,ND,SM1,ZU,AVX512BW,FUTURE,APX */ + /* 240(f1 fc 28) 300 001(41) 110 : SM0,SM1,ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KAND, 2, {OPMASKREG|BITS64,OPMASKREG|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+29893, 514, 4514}, +}; + +static const struct itemplate instrux_ANDB[4] = { + /* 0 : ANDB kreg8,kreg8*,kreg8 [rvm: vex.l1.0f.ko8 41 /r ] ND,ZU,AVX512DQ,FUTURE */ + /* 261(001 005) 001(41) 120 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_ANDB, 3, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65449, 499, 4515}, + /* 1 : ANDB kreg8,kreg8*,kreg8 [rvm: evex.l1.0f.ko8 41 /r ] ND,ZU,AVX512DQ,FUTURE,APX */ + /* 241(f1 7d 28) 300 001(41) 120 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_ANDB, 3, {OPMASKREG|BITS8,OPMASKREG|BITS8,OPMASKREG|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+29830, 500, 4515}, + /* 2 : ANDB kreg8,kreg8 [r+vm: vex.l1.0f.ko8 41 /r ] ND,ZU,AVX512DQ,FUTURE */ + /* 260(001 005) 001(41) 110 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_ANDB, 2, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65456, 499, 4515}, + /* 3 : ANDB kreg8,kreg8 [r+vm: evex.l1.0f.ko8 41 /r ] ND,ZU,AVX512DQ,FUTURE,APX */ + /* 240(f1 7d 28) 300 001(41) 110 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_ANDB, 2, {OPMASKREG|BITS8,OPMASKREG|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+29839, 500, 4515}, +}; + +static const struct itemplate instrux_ANDW[4] = { + /* 0 : ANDW kreg16,kreg16*,kreg16 [rvm: vex.l1.0f.ko16 41 /r ] ND,ZU,AVX512F,FUTURE */ + /* 261(001 004) 001(41) 120 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_ANDW, 3, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65463, 501, 4516}, + /* 1 : ANDW kreg16,kreg16*,kreg16 [rvm: evex.l1.0f.ko16 41 /r ] ND,ZU,AVX512F,FUTURE,APX */ + /* 241(f1 7c 28) 300 001(41) 120 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_ANDW, 3, {OPMASKREG|BITS16,OPMASKREG|BITS16,OPMASKREG|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+29848, 502, 4516}, + /* 2 : ANDW kreg16,kreg16 [r+vm: vex.l1.0f.ko16 41 /r ] ND,ZU,AVX512F,FUTURE */ + /* 260(001 004) 001(41) 110 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_ANDW, 2, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65470, 501, 4516}, + /* 3 : ANDW kreg16,kreg16 [r+vm: evex.l1.0f.ko16 41 /r ] ND,ZU,AVX512F,FUTURE,APX */ + /* 240(f1 7c 28) 300 001(41) 110 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_ANDW, 2, {OPMASKREG|BITS16,OPMASKREG|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29857, 502, 4516}, +}; + +static const struct itemplate instrux_ANDD[4] = { + /* 0 : ANDD kreg32,kreg32*,kreg32 [rvm: vex.l1.0f.ko32 41 /r ] ND,ZU,AVX512BW,FUTURE */ + /* 261(001 205) 001(41) 120 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_ANDD, 3, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65477, 503, 4517}, + /* 1 : ANDD kreg32,kreg32*,kreg32 [rvm: evex.l1.0f.ko32 41 /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 241(f1 fd 28) 300 001(41) 120 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_ANDD, 3, {OPMASKREG|BITS32,OPMASKREG|BITS32,OPMASKREG|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+29866, 504, 4517}, + /* 2 : ANDD kreg32,kreg32 [r+vm: vex.l1.0f.ko32 41 /r ] ND,ZU,AVX512BW,FUTURE */ + /* 260(001 205) 001(41) 110 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_ANDD, 2, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65484, 503, 4517}, + /* 3 : ANDD kreg32,kreg32 [r+vm: evex.l1.0f.ko32 41 /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 240(f1 fd 28) 300 001(41) 110 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_ANDD, 2, {OPMASKREG|BITS32,OPMASKREG|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+29875, 504, 4517}, +}; + +static const struct itemplate instrux_ANDQ[4] = { + /* 0 : ANDQ kreg64,kreg64*,kreg64 [rvm: vex.l1.0f.ko64 41 /r ] ND,ZU,AVX512BW,FUTURE */ + /* 261(001 204) 001(41) 120 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_ANDQ, 3, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65491, 503, 4518}, + /* 1 : ANDQ kreg64,kreg64*,kreg64 [rvm: evex.l1.0f.ko64 41 /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 241(f1 fc 28) 300 001(41) 120 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_ANDQ, 3, {OPMASKREG|BITS64,OPMASKREG|BITS64,OPMASKREG|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+29884, 504, 4518}, + /* 2 : ANDQ kreg64,kreg64 [r+vm: vex.l1.0f.ko64 41 /r ] ND,ZU,AVX512BW,FUTURE */ + /* 260(001 204) 001(41) 110 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_ANDQ, 2, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65498, 503, 4518}, + /* 3 : ANDQ kreg64,kreg64 [r+vm: evex.l1.0f.ko64 41 /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 240(f1 fc 28) 300 001(41) 110 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_ANDQ, 2, {OPMASKREG|BITS64,OPMASKREG|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+29893, 504, 4518}, +}; + +static const struct itemplate instrux_KANDNB[4] = { + /* 0 : KANDNB kreg8,kreg8*,kreg8 [rvm: vex.l1.0f.ko8 42 /r ] ZU,AVX512DQ,FUTURE */ + /* 261(001 005) 001(42) 120 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_KANDNB, 3, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65505, 499, 4523}, + /* 1 : KANDNB kreg8,kreg8*,kreg8 [rvm: evex.l1.0f.ko8 42 /r ] ZU,AVX512DQ,FUTURE,APX */ + /* 241(f1 7d 28) 300 001(42) 120 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KANDNB, 3, {OPMASKREG|BITS8,OPMASKREG|BITS8,OPMASKREG|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+29902, 500, 4523}, + /* 2 : KANDNB kreg8,kreg8 [r+vm: vex.l1.0f.ko8 42 /r ] ND,ZU,AVX512DQ,FUTURE */ + /* 260(001 005) 001(42) 110 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_KANDNB, 2, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65512, 499, 4523}, + /* 3 : KANDNB kreg8,kreg8 [r+vm: evex.l1.0f.ko8 42 /r ] ND,ZU,AVX512DQ,FUTURE,APX */ + /* 240(f1 7d 28) 300 001(42) 110 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KANDNB, 2, {OPMASKREG|BITS8,OPMASKREG|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+29911, 500, 4523}, +}; + +static const struct itemplate instrux_KANDNW[4] = { + /* 0 : KANDNW kreg16,kreg16*,kreg16 [rvm: vex.l1.0f.ko16 42 /r ] ZU,AVX512F,FUTURE */ + /* 261(001 004) 001(42) 120 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_KANDNW, 3, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65519, 501, 4524}, + /* 1 : KANDNW kreg16,kreg16*,kreg16 [rvm: evex.l1.0f.ko16 42 /r ] ZU,AVX512F,FUTURE,APX */ + /* 241(f1 7c 28) 300 001(42) 120 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_KANDNW, 3, {OPMASKREG|BITS16,OPMASKREG|BITS16,OPMASKREG|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+29920, 502, 4524}, + /* 2 : KANDNW kreg16,kreg16 [r+vm: vex.l1.0f.ko16 42 /r ] ND,ZU,AVX512F,FUTURE */ + /* 260(001 004) 001(42) 110 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_KANDNW, 2, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65526, 501, 4524}, + /* 3 : KANDNW kreg16,kreg16 [r+vm: evex.l1.0f.ko16 42 /r ] ND,ZU,AVX512F,FUTURE,APX */ + /* 240(f1 7c 28) 300 001(42) 110 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_KANDNW, 2, {OPMASKREG|BITS16,OPMASKREG|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29929, 502, 4524}, +}; + +static const struct itemplate instrux_KANDND[4] = { + /* 0 : KANDND kreg32,kreg32*,kreg32 [rvm: vex.l1.0f.ko32 42 /r ] ZU,AVX512BW,FUTURE */ + /* 261(001 205) 001(42) 120 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KANDND, 3, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65533, 503, 4525}, + /* 1 : KANDND kreg32,kreg32*,kreg32 [rvm: evex.l1.0f.ko32 42 /r ] ZU,AVX512BW,FUTURE,APX */ + /* 241(f1 fd 28) 300 001(42) 120 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KANDND, 3, {OPMASKREG|BITS32,OPMASKREG|BITS32,OPMASKREG|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+29938, 504, 4525}, + /* 2 : KANDND kreg32,kreg32 [r+vm: vex.l1.0f.ko32 42 /r ] ND,ZU,AVX512BW,FUTURE */ + /* 260(001 205) 001(42) 110 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KANDND, 2, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65540, 503, 4525}, + /* 3 : KANDND kreg32,kreg32 [r+vm: evex.l1.0f.ko32 42 /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 240(f1 fd 28) 300 001(42) 110 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KANDND, 2, {OPMASKREG|BITS32,OPMASKREG|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+29947, 504, 4525}, +}; + +static const struct itemplate instrux_KANDNQ[4] = { + /* 0 : KANDNQ kreg64,kreg64*,kreg64 [rvm: vex.l1.0f.ko64 42 /r ] ZU,AVX512BW,FUTURE */ + /* 261(001 204) 001(42) 120 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KANDNQ, 3, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65547, 503, 4526}, + /* 1 : KANDNQ kreg64,kreg64*,kreg64 [rvm: evex.l1.0f.ko64 42 /r ] ZU,AVX512BW,FUTURE,APX */ + /* 241(f1 fc 28) 300 001(42) 120 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KANDNQ, 3, {OPMASKREG|BITS64,OPMASKREG|BITS64,OPMASKREG|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+29956, 504, 4526}, + /* 2 : KANDNQ kreg64,kreg64 [r+vm: vex.l1.0f.ko64 42 /r ] ND,ZU,AVX512BW,FUTURE */ + /* 260(001 204) 001(42) 110 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KANDNQ, 2, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65554, 503, 4526}, + /* 3 : KANDNQ kreg64,kreg64 [r+vm: evex.l1.0f.ko64 42 /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 240(f1 fc 28) 300 001(42) 110 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KANDNQ, 2, {OPMASKREG|BITS64,OPMASKREG|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+29965, 504, 4526}, +}; + +static const struct itemplate instrux_KANDN[16] = { + /* 0 : KANDN kreg8,kreg8*,kreg8 [rvm: vex.l1.0f.ko8 42 /r ] ND,SM0,SM1,SM2,ZU,AVX512DQ,FUTURE */ + /* 261(001 005) 001(42) 120 : SM0,SM1,SM2,NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_KANDN, 3, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65505, 507, 4527}, + /* 1 : KANDN kreg8,kreg8*,kreg8 [rvm: evex.l1.0f.ko8 42 /r ] ND,SM0,SM1,SM2,ZU,AVX512DQ,FUTURE,APX */ + /* 241(f1 7d 28) 300 001(42) 120 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KANDN, 3, {OPMASKREG|BITS8,OPMASKREG|BITS8,OPMASKREG|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+29902, 508, 4527}, + /* 2 : KANDN kreg8,kreg8 [r+vm: vex.l1.0f.ko8 42 /r ] ND,SM0,SM1,ZU,AVX512DQ,FUTURE */ + /* 260(001 005) 001(42) 110 : SM0,SM1,NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_KANDN, 2, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65512, 509, 4527}, + /* 3 : KANDN kreg8,kreg8 [r+vm: evex.l1.0f.ko8 42 /r ] ND,SM0,SM1,ZU,AVX512DQ,FUTURE,APX */ + /* 240(f1 7d 28) 300 001(42) 110 : SM0,SM1,ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KANDN, 2, {OPMASKREG|BITS8,OPMASKREG|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+29911, 510, 4527}, + /* 4 : KANDN kreg16,kreg16*,kreg16 [rvm: vex.l1.0f.ko16 42 /r ] ND,SM0,SM1,SM2,ZU,AVX512F,FUTURE */ + /* 261(001 004) 001(42) 120 : SM0,SM1,SM2,NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_KANDN, 3, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65519, 523, 4528}, + /* 5 : KANDN kreg16,kreg16*,kreg16 [rvm: evex.l1.0f.ko16 42 /r ] ND,SM0,SM1,SM2,ZU,AVX512F,FUTURE,APX */ + /* 241(f1 7c 28) 300 001(42) 120 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_KANDN, 3, {OPMASKREG|BITS16,OPMASKREG|BITS16,OPMASKREG|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+29920, 524, 4528}, + /* 6 : KANDN kreg16,kreg16 [r+vm: vex.l1.0f.ko16 42 /r ] SM0,ND,SM1,ZU,AVX512F,FUTURE */ + /* 260(001 004) 001(42) 110 : SM0,SM1,NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_KANDN, 2, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65526, 525, 4528}, + /* 7 : KANDN kreg16,kreg16 [r+vm: evex.l1.0f.ko16 42 /r ] SM0,ND,SM1,ZU,AVX512F,FUTURE,APX */ + /* 240(f1 7c 28) 300 001(42) 110 : SM0,SM1,ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_KANDN, 2, {OPMASKREG|BITS16,OPMASKREG|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29929, 526, 4528}, + /* 8 : KANDN kreg32,kreg32*,kreg32 [rvm: vex.l1.0f.ko32 42 /r ] ND,SM0,SM1,SM2,ZU,AVX512BW,FUTURE */ + /* 261(001 205) 001(42) 120 : SM0,SM1,SM2,NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KANDN, 3, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65533, 511, 4529}, + /* 9 : KANDN kreg32,kreg32*,kreg32 [rvm: evex.l1.0f.ko32 42 /r ] ND,SM0,SM1,SM2,ZU,AVX512BW,FUTURE,APX */ + /* 241(f1 fd 28) 300 001(42) 120 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KANDN, 3, {OPMASKREG|BITS32,OPMASKREG|BITS32,OPMASKREG|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+29938, 512, 4529}, + /* 10 : KANDN kreg32,kreg32 [r+vm: vex.l1.0f.ko32 42 /r ] ND,SM0,SM1,ZU,AVX512BW,FUTURE */ + /* 260(001 205) 001(42) 110 : SM0,SM1,NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KANDN, 2, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65540, 513, 4529}, + /* 11 : KANDN kreg32,kreg32 [r+vm: evex.l1.0f.ko32 42 /r ] ND,SM0,SM1,ZU,AVX512BW,FUTURE,APX */ + /* 240(f1 fd 28) 300 001(42) 110 : SM0,SM1,ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KANDN, 2, {OPMASKREG|BITS32,OPMASKREG|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+29947, 514, 4529}, + /* 12 : KANDN kreg64,kreg64*,kreg64 [rvm: vex.l1.0f.ko64 42 /r ] SM0,ND,SM1,SM2,ZU,AVX512BW,FUTURE */ + /* 261(001 204) 001(42) 120 : SM0,SM1,SM2,NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KANDN, 3, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65547, 511, 4530}, + /* 13 : KANDN kreg64,kreg64*,kreg64 [rvm: evex.l1.0f.ko64 42 /r ] SM0,ND,SM1,SM2,ZU,AVX512BW,FUTURE,APX */ + /* 241(f1 fc 28) 300 001(42) 120 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KANDN, 3, {OPMASKREG|BITS64,OPMASKREG|BITS64,OPMASKREG|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+29956, 512, 4530}, + /* 14 : KANDN kreg64,kreg64 [r+vm: vex.l1.0f.ko64 42 /r ] ND,SM0,SM1,ZU,AVX512BW,FUTURE */ + /* 260(001 204) 001(42) 110 : SM0,SM1,NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KANDN, 2, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65554, 513, 4530}, + /* 15 : KANDN kreg64,kreg64 [r+vm: evex.l1.0f.ko64 42 /r ] ND,SM0,SM1,ZU,AVX512BW,FUTURE,APX */ + /* 240(f1 fc 28) 300 001(42) 110 : SM0,SM1,ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KANDN, 2, {OPMASKREG|BITS64,OPMASKREG|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+29965, 514, 4530}, +}; + +static const struct itemplate instrux_ANDNB[4] = { + /* 0 : ANDNB kreg8,kreg8*,kreg8 [rvm: vex.l1.0f.ko8 42 /r ] ND,ZU,AVX512DQ,FUTURE */ + /* 261(001 005) 001(42) 120 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_ANDNB, 3, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65505, 499, 4531}, + /* 1 : ANDNB kreg8,kreg8*,kreg8 [rvm: evex.l1.0f.ko8 42 /r ] ND,ZU,AVX512DQ,FUTURE,APX */ + /* 241(f1 7d 28) 300 001(42) 120 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_ANDNB, 3, {OPMASKREG|BITS8,OPMASKREG|BITS8,OPMASKREG|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+29902, 500, 4531}, + /* 2 : ANDNB kreg8,kreg8 [r+vm: vex.l1.0f.ko8 42 /r ] ND,ZU,AVX512DQ,FUTURE */ + /* 260(001 005) 001(42) 110 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_ANDNB, 2, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65512, 499, 4531}, + /* 3 : ANDNB kreg8,kreg8 [r+vm: evex.l1.0f.ko8 42 /r ] ND,ZU,AVX512DQ,FUTURE,APX */ + /* 240(f1 7d 28) 300 001(42) 110 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_ANDNB, 2, {OPMASKREG|BITS8,OPMASKREG|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+29911, 500, 4531}, +}; + +static const struct itemplate instrux_ANDNW[4] = { + /* 0 : ANDNW kreg16,kreg16*,kreg16 [rvm: vex.l1.0f.ko16 42 /r ] ND,ZU,AVX512F,FUTURE */ + /* 261(001 004) 001(42) 120 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_ANDNW, 3, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65519, 501, 4532}, + /* 1 : ANDNW kreg16,kreg16*,kreg16 [rvm: evex.l1.0f.ko16 42 /r ] ND,ZU,AVX512F,FUTURE,APX */ + /* 241(f1 7c 28) 300 001(42) 120 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_ANDNW, 3, {OPMASKREG|BITS16,OPMASKREG|BITS16,OPMASKREG|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+29920, 502, 4532}, + /* 2 : ANDNW kreg16,kreg16 [r+vm: vex.l1.0f.ko16 42 /r ] ND,ZU,AVX512F,FUTURE */ + /* 260(001 004) 001(42) 110 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_ANDNW, 2, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65526, 501, 4532}, + /* 3 : ANDNW kreg16,kreg16 [r+vm: evex.l1.0f.ko16 42 /r ] ND,ZU,AVX512F,FUTURE,APX */ + /* 240(f1 7c 28) 300 001(42) 110 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_ANDNW, 2, {OPMASKREG|BITS16,OPMASKREG|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29929, 502, 4532}, +}; + +static const struct itemplate instrux_ANDND[4] = { + /* 0 : ANDND kreg32,kreg32*,kreg32 [rvm: vex.l1.0f.ko32 42 /r ] ND,ZU,AVX512BW,FUTURE */ + /* 261(001 205) 001(42) 120 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_ANDND, 3, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65533, 503, 4533}, + /* 1 : ANDND kreg32,kreg32*,kreg32 [rvm: evex.l1.0f.ko32 42 /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 241(f1 fd 28) 300 001(42) 120 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_ANDND, 3, {OPMASKREG|BITS32,OPMASKREG|BITS32,OPMASKREG|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+29938, 504, 4533}, + /* 2 : ANDND kreg32,kreg32 [r+vm: vex.l1.0f.ko32 42 /r ] ND,ZU,AVX512BW,FUTURE */ + /* 260(001 205) 001(42) 110 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_ANDND, 2, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65540, 503, 4533}, + /* 3 : ANDND kreg32,kreg32 [r+vm: evex.l1.0f.ko32 42 /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 240(f1 fd 28) 300 001(42) 110 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_ANDND, 2, {OPMASKREG|BITS32,OPMASKREG|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+29947, 504, 4533}, +}; + +static const struct itemplate instrux_ANDNQ[4] = { + /* 0 : ANDNQ kreg64,kreg64*,kreg64 [rvm: vex.l1.0f.ko64 42 /r ] ND,ZU,AVX512BW,FUTURE */ + /* 261(001 204) 001(42) 120 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_ANDNQ, 3, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65547, 503, 4534}, + /* 1 : ANDNQ kreg64,kreg64*,kreg64 [rvm: evex.l1.0f.ko64 42 /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 241(f1 fc 28) 300 001(42) 120 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_ANDNQ, 3, {OPMASKREG|BITS64,OPMASKREG|BITS64,OPMASKREG|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+29956, 504, 4534}, + /* 2 : ANDNQ kreg64,kreg64 [r+vm: vex.l1.0f.ko64 42 /r ] ND,ZU,AVX512BW,FUTURE */ + /* 260(001 204) 001(42) 110 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_ANDNQ, 2, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65554, 503, 4534}, + /* 3 : ANDNQ kreg64,kreg64 [r+vm: evex.l1.0f.ko64 42 /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 240(f1 fc 28) 300 001(42) 110 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_ANDNQ, 2, {OPMASKREG|BITS64,OPMASKREG|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+29965, 504, 4534}, +}; + +static const struct itemplate instrux_KNOTB[4] = { + /* 0 : KNOTB kreg8,kreg8* [rm: vex.l0.0f.ko8 44 /r ] ZU,AVX512DQ,FUTURE */ + /* 270(001 001) 001(44) 110 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_KNOTB, 2, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65561, 499, 4539}, + /* 1 : KNOTB kreg8,kreg8* [rm: evex.l0.0f.ko8 44 /r ] ZU,AVX512DQ,FUTURE,APX */ + /* 250(f1 7d 08) 300 001(44) 110 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KNOTB, 2, {OPMASKREG|BITS8,OPMASKREG|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+29974, 500, 4539}, + /* 2 : KNOTB kreg8 [r+m: vex.l0.0f.ko8 44 /r ] ND,ZU,AVX512DQ,FUTURE */ + /* 270(001 001) 001(44) 100 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_KNOTB, 1, {OPMASKREG|BITS8|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+65568, 499, 4539}, + /* 3 : KNOTB kreg8 [r+m: evex.l0.0f.ko8 44 /r ] ND,ZU,AVX512DQ,FUTURE,APX */ + /* 250(f1 7d 08) 300 001(44) 100 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KNOTB, 1, {OPMASKREG|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+29983, 500, 4539}, +}; + +static const struct itemplate instrux_KNOTW[4] = { + /* 0 : KNOTW kreg16,kreg16* [rm: vex.l0.0f.ko16 44 /r ] ZU,AVX512F,FUTURE */ + /* 270(001 000) 001(44) 110 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_KNOTW, 2, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65575, 501, 4540}, + /* 1 : KNOTW kreg16,kreg16* [rm: evex.l0.0f.ko16 44 /r ] ZU,AVX512F,FUTURE,APX */ + /* 250(f1 7c 08) 300 001(44) 110 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_KNOTW, 2, {OPMASKREG|BITS16,OPMASKREG|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29992, 502, 4540}, + /* 2 : KNOTW kreg16 [r+m: vex.l0.0f.ko16 44 /r ] ND,ZU,AVX512F,FUTURE */ + /* 270(001 000) 001(44) 100 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_KNOTW, 1, {OPMASKREG|BITS16|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+65582, 501, 4540}, + /* 3 : KNOTW kreg16 [r+m: evex.l0.0f.ko16 44 /r ] ND,ZU,AVX512F,FUTURE,APX */ + /* 250(f1 7c 08) 300 001(44) 100 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_KNOTW, 1, {OPMASKREG|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+30001, 502, 4540}, +}; + +static const struct itemplate instrux_KNOTD[4] = { + /* 0 : KNOTD kreg32,kreg32* [rm: vex.l0.0f.ko32 44 /r ] ZU,AVX512BW,FUTURE */ + /* 270(001 201) 001(44) 110 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KNOTD, 2, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65589, 503, 4541}, + /* 1 : KNOTD kreg32,kreg32* [rm: evex.l0.0f.ko32 44 /r ] ZU,AVX512BW,FUTURE,APX */ + /* 250(f1 fd 08) 300 001(44) 110 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KNOTD, 2, {OPMASKREG|BITS32,OPMASKREG|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+30010, 504, 4541}, + /* 2 : KNOTD kreg32 [r+m: vex.l0.0f.ko32 44 /r ] ND,ZU,AVX512BW,FUTURE */ + /* 270(001 201) 001(44) 100 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KNOTD, 1, {OPMASKREG|BITS32|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+65596, 503, 4541}, + /* 3 : KNOTD kreg32 [r+m: evex.l0.0f.ko32 44 /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 250(f1 fd 08) 300 001(44) 100 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KNOTD, 1, {OPMASKREG|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+30019, 504, 4541}, +}; + +static const struct itemplate instrux_KNOTQ[4] = { + /* 0 : KNOTQ kreg64,kreg64* [rm: vex.l0.0f.ko64 44 /r ] ZU,AVX512BW,FUTURE */ + /* 270(001 200) 001(44) 110 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KNOTQ, 2, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65603, 503, 4542}, + /* 1 : KNOTQ kreg64,kreg64* [rm: evex.l0.0f.ko64 44 /r ] ZU,AVX512BW,FUTURE,APX */ + /* 250(f1 fc 08) 300 001(44) 110 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KNOTQ, 2, {OPMASKREG|BITS64,OPMASKREG|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+30028, 504, 4542}, + /* 2 : KNOTQ kreg64 [r+m: vex.l0.0f.ko64 44 /r ] ND,ZU,AVX512BW,FUTURE */ + /* 270(001 200) 001(44) 100 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KNOTQ, 1, {OPMASKREG|BITS64|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+65610, 503, 4542}, + /* 3 : KNOTQ kreg64 [r+m: evex.l0.0f.ko64 44 /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 250(f1 fc 08) 300 001(44) 100 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KNOTQ, 1, {OPMASKREG|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+30037, 504, 4542}, +}; + +static const struct itemplate instrux_KNOT[16] = { + /* 0 : KNOT kreg8,kreg8* [rm: vex.l0.0f.ko8 44 /r ] ND,SM0,SM1,ZU,AVX512DQ,FUTURE */ + /* 270(001 001) 001(44) 110 : SM0,SM1,NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_KNOT, 2, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65561, 509, 4543}, + /* 1 : KNOT kreg8,kreg8* [rm: evex.l0.0f.ko8 44 /r ] ND,SM0,SM1,ZU,AVX512DQ,FUTURE,APX */ + /* 250(f1 7d 08) 300 001(44) 110 : SM0,SM1,ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KNOT, 2, {OPMASKREG|BITS8,OPMASKREG|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+29974, 510, 4543}, + /* 2 : KNOT kreg8 [r+m: vex.l0.0f.ko8 44 /r ] SM0,ND,ZU,AVX512DQ,FUTURE */ + /* 270(001 001) 001(44) 100 : SM0,NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_KNOT, 1, {OPMASKREG|BITS8|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+65568, 531, 4543}, + /* 3 : KNOT kreg8 [r+m: evex.l0.0f.ko8 44 /r ] SM0,ND,ZU,AVX512DQ,FUTURE,APX */ + /* 250(f1 7d 08) 300 001(44) 100 : SM0,ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KNOT, 1, {OPMASKREG|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+29983, 532, 4543}, + /* 4 : KNOT kreg16,kreg16* [rm: vex.l0.0f.ko16 44 /r ] ND,SM0,SM1,ZU,AVX512F,FUTURE */ + /* 270(001 000) 001(44) 110 : SM0,SM1,NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_KNOT, 2, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65575, 525, 4544}, + /* 5 : KNOT kreg16,kreg16* [rm: evex.l0.0f.ko16 44 /r ] ND,SM0,SM1,ZU,AVX512F,FUTURE,APX */ + /* 250(f1 7c 08) 300 001(44) 110 : SM0,SM1,ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_KNOT, 2, {OPMASKREG|BITS16,OPMASKREG|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29992, 526, 4544}, + /* 6 : KNOT kreg16 [r+m: vex.l0.0f.ko16 44 /r ] ND,SM0,ZU,AVX512F,FUTURE */ + /* 270(001 000) 001(44) 100 : SM0,NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_KNOT, 1, {OPMASKREG|BITS16|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+65582, 533, 4544}, + /* 7 : KNOT kreg16 [r+m: evex.l0.0f.ko16 44 /r ] ND,SM0,ZU,AVX512F,FUTURE,APX */ + /* 250(f1 7c 08) 300 001(44) 100 : SM0,ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_KNOT, 1, {OPMASKREG|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+30001, 534, 4544}, + /* 8 : KNOT kreg32,kreg32* [rm: vex.l0.0f.ko32 44 /r ] ND,SM0,SM1,ZU,AVX512BW,FUTURE */ + /* 270(001 201) 001(44) 110 : SM0,SM1,NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KNOT, 2, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65589, 513, 4545}, + /* 9 : KNOT kreg32,kreg32* [rm: evex.l0.0f.ko32 44 /r ] ND,SM0,SM1,ZU,AVX512BW,FUTURE,APX */ + /* 250(f1 fd 08) 300 001(44) 110 : SM0,SM1,ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KNOT, 2, {OPMASKREG|BITS32,OPMASKREG|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+30010, 514, 4545}, + /* 10 : KNOT kreg32 [r+m: vex.l0.0f.ko32 44 /r ] ND,SM0,ZU,AVX512BW,FUTURE */ + /* 270(001 201) 001(44) 100 : SM0,NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KNOT, 1, {OPMASKREG|BITS32|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+65596, 535, 4545}, + /* 11 : KNOT kreg32 [r+m: evex.l0.0f.ko32 44 /r ] ND,SM0,ZU,AVX512BW,FUTURE,APX */ + /* 250(f1 fd 08) 300 001(44) 100 : SM0,ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KNOT, 1, {OPMASKREG|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+30019, 536, 4545}, + /* 12 : KNOT kreg64,kreg64* [rm: vex.l0.0f.ko64 44 /r ] SM0,ND,SM1,ZU,AVX512BW,FUTURE */ + /* 270(001 200) 001(44) 110 : SM0,SM1,NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KNOT, 2, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65603, 513, 4546}, + /* 13 : KNOT kreg64,kreg64* [rm: evex.l0.0f.ko64 44 /r ] SM0,ND,SM1,ZU,AVX512BW,FUTURE,APX */ + /* 250(f1 fc 08) 300 001(44) 110 : SM0,SM1,ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KNOT, 2, {OPMASKREG|BITS64,OPMASKREG|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+30028, 514, 4546}, + /* 14 : KNOT kreg64 [r+m: vex.l0.0f.ko64 44 /r ] ND,SM0,ZU,AVX512BW,FUTURE */ + /* 270(001 200) 001(44) 100 : SM0,NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KNOT, 1, {OPMASKREG|BITS64|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+65610, 535, 4546}, + /* 15 : KNOT kreg64 [r+m: evex.l0.0f.ko64 44 /r ] ND,SM0,ZU,AVX512BW,FUTURE,APX */ + /* 250(f1 fc 08) 300 001(44) 100 : SM0,ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KNOT, 1, {OPMASKREG|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+30037, 536, 4546}, +}; + +static const struct itemplate instrux_NOTB[4] = { + /* 0 : NOTB kreg8,kreg8* [rm: vex.l0.0f.ko8 44 /r ] ND,ZU,AVX512DQ,FUTURE */ + /* 270(001 001) 001(44) 110 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_NOTB, 2, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65561, 499, 4547}, + /* 1 : NOTB kreg8,kreg8* [rm: evex.l0.0f.ko8 44 /r ] ND,ZU,AVX512DQ,FUTURE,APX */ + /* 250(f1 7d 08) 300 001(44) 110 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_NOTB, 2, {OPMASKREG|BITS8,OPMASKREG|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+29974, 500, 4547}, + /* 2 : NOTB kreg8 [r+m: vex.l0.0f.ko8 44 /r ] ND,ZU,AVX512DQ,FUTURE */ + /* 270(001 001) 001(44) 100 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_NOTB, 1, {OPMASKREG|BITS8|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+65568, 499, 4547}, + /* 3 : NOTB kreg8 [r+m: evex.l0.0f.ko8 44 /r ] ND,ZU,AVX512DQ,FUTURE,APX */ + /* 250(f1 7d 08) 300 001(44) 100 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_NOTB, 1, {OPMASKREG|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+29983, 500, 4547}, +}; + +static const struct itemplate instrux_NOTW[4] = { + /* 0 : NOTW kreg16,kreg16* [rm: vex.l0.0f.ko16 44 /r ] ND,ZU,AVX512F,FUTURE */ + /* 270(001 000) 001(44) 110 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_NOTW, 2, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65575, 501, 4548}, + /* 1 : NOTW kreg16,kreg16* [rm: evex.l0.0f.ko16 44 /r ] ND,ZU,AVX512F,FUTURE,APX */ + /* 250(f1 7c 08) 300 001(44) 110 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_NOTW, 2, {OPMASKREG|BITS16,OPMASKREG|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29992, 502, 4548}, + /* 2 : NOTW kreg16 [r+m: vex.l0.0f.ko16 44 /r ] ND,ZU,AVX512F,FUTURE */ + /* 270(001 000) 001(44) 100 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_NOTW, 1, {OPMASKREG|BITS16|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+65582, 501, 4548}, + /* 3 : NOTW kreg16 [r+m: evex.l0.0f.ko16 44 /r ] ND,ZU,AVX512F,FUTURE,APX */ + /* 250(f1 7c 08) 300 001(44) 100 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_NOTW, 1, {OPMASKREG|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+30001, 502, 4548}, +}; + +static const struct itemplate instrux_NOTD[4] = { + /* 0 : NOTD kreg32,kreg32* [rm: vex.l0.0f.ko32 44 /r ] ND,ZU,AVX512BW,FUTURE */ + /* 270(001 201) 001(44) 110 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_NOTD, 2, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65589, 503, 4549}, + /* 1 : NOTD kreg32,kreg32* [rm: evex.l0.0f.ko32 44 /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 250(f1 fd 08) 300 001(44) 110 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_NOTD, 2, {OPMASKREG|BITS32,OPMASKREG|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+30010, 504, 4549}, + /* 2 : NOTD kreg32 [r+m: vex.l0.0f.ko32 44 /r ] ND,ZU,AVX512BW,FUTURE */ + /* 270(001 201) 001(44) 100 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_NOTD, 1, {OPMASKREG|BITS32|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+65596, 503, 4549}, + /* 3 : NOTD kreg32 [r+m: evex.l0.0f.ko32 44 /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 250(f1 fd 08) 300 001(44) 100 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_NOTD, 1, {OPMASKREG|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+30019, 504, 4549}, +}; + +static const struct itemplate instrux_NOTQ[4] = { + /* 0 : NOTQ kreg64,kreg64* [rm: vex.l0.0f.ko64 44 /r ] ND,ZU,AVX512BW,FUTURE */ + /* 270(001 200) 001(44) 110 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_NOTQ, 2, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65603, 503, 4550}, + /* 1 : NOTQ kreg64,kreg64* [rm: evex.l0.0f.ko64 44 /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 250(f1 fc 08) 300 001(44) 110 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_NOTQ, 2, {OPMASKREG|BITS64,OPMASKREG|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+30028, 504, 4550}, + /* 2 : NOTQ kreg64 [r+m: vex.l0.0f.ko64 44 /r ] ND,ZU,AVX512BW,FUTURE */ + /* 270(001 200) 001(44) 100 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_NOTQ, 1, {OPMASKREG|BITS64|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+65610, 503, 4550}, + /* 3 : NOTQ kreg64 [r+m: evex.l0.0f.ko64 44 /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 250(f1 fc 08) 300 001(44) 100 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_NOTQ, 1, {OPMASKREG|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+30037, 504, 4550}, +}; + +static const struct itemplate instrux_KORB[4] = { + /* 0 : KORB kreg8,kreg8*,kreg8 [rvm: vex.nds.l1.0f.ko8 45 /r ] ZU,AVX512DQ,FUTURE */ + /* 261(001 005) 001(45) 120 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_KORB, 3, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65617, 499, 4555}, + /* 1 : KORB kreg8,kreg8*,kreg8 [rvm: evex.nds.l1.0f.ko8 45 /r ] ZU,AVX512DQ,FUTURE,APX */ + /* 241(f1 7d 28) 300 001(45) 120 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KORB, 3, {OPMASKREG|BITS8,OPMASKREG|BITS8,OPMASKREG|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+30046, 500, 4555}, + /* 2 : KORB kreg8,kreg8 [r+vm: vex.nds.l1.0f.ko8 45 /r ] ND,ZU,AVX512DQ,FUTURE */ + /* 260(001 005) 001(45) 110 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_KORB, 2, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65624, 499, 4555}, + /* 3 : KORB kreg8,kreg8 [r+vm: evex.nds.l1.0f.ko8 45 /r ] ND,ZU,AVX512DQ,FUTURE,APX */ + /* 240(f1 7d 28) 300 001(45) 110 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KORB, 2, {OPMASKREG|BITS8,OPMASKREG|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+30055, 500, 4555}, +}; + +static const struct itemplate instrux_KORW[4] = { + /* 0 : KORW kreg16,kreg16*,kreg16 [rvm: vex.nds.l1.0f.ko16 45 /r ] ZU,AVX512F,FUTURE */ + /* 261(001 004) 001(45) 120 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_KORW, 3, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65631, 501, 4556}, + /* 1 : KORW kreg16,kreg16*,kreg16 [rvm: evex.nds.l1.0f.ko16 45 /r ] ZU,AVX512F,FUTURE,APX */ + /* 241(f1 7c 28) 300 001(45) 120 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_KORW, 3, {OPMASKREG|BITS16,OPMASKREG|BITS16,OPMASKREG|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+30064, 502, 4556}, + /* 2 : KORW kreg16,kreg16 [r+vm: vex.nds.l1.0f.ko16 45 /r ] ND,ZU,AVX512F,FUTURE */ + /* 260(001 004) 001(45) 110 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_KORW, 2, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65638, 501, 4556}, + /* 3 : KORW kreg16,kreg16 [r+vm: evex.nds.l1.0f.ko16 45 /r ] ND,ZU,AVX512F,FUTURE,APX */ + /* 240(f1 7c 28) 300 001(45) 110 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_KORW, 2, {OPMASKREG|BITS16,OPMASKREG|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+30073, 502, 4556}, +}; + +static const struct itemplate instrux_KORD[4] = { + /* 0 : KORD kreg32,kreg32*,kreg32 [rvm: vex.nds.l1.0f.ko32 45 /r ] ZU,AVX512BW,FUTURE */ + /* 261(001 205) 001(45) 120 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KORD, 3, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65645, 503, 4557}, + /* 1 : KORD kreg32,kreg32*,kreg32 [rvm: evex.nds.l1.0f.ko32 45 /r ] ZU,AVX512BW,FUTURE,APX */ + /* 241(f1 fd 28) 300 001(45) 120 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KORD, 3, {OPMASKREG|BITS32,OPMASKREG|BITS32,OPMASKREG|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+30082, 504, 4557}, + /* 2 : KORD kreg32,kreg32 [r+vm: vex.nds.l1.0f.ko32 45 /r ] ND,ZU,AVX512BW,FUTURE */ + /* 260(001 205) 001(45) 110 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KORD, 2, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65652, 503, 4557}, + /* 3 : KORD kreg32,kreg32 [r+vm: evex.nds.l1.0f.ko32 45 /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 240(f1 fd 28) 300 001(45) 110 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KORD, 2, {OPMASKREG|BITS32,OPMASKREG|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+30091, 504, 4557}, +}; + +static const struct itemplate instrux_KORQ[4] = { + /* 0 : KORQ kreg64,kreg64*,kreg64 [rvm: vex.nds.l1.0f.ko64 45 /r ] ZU,AVX512BW,FUTURE */ + /* 261(001 204) 001(45) 120 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KORQ, 3, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65659, 503, 4558}, + /* 1 : KORQ kreg64,kreg64*,kreg64 [rvm: evex.nds.l1.0f.ko64 45 /r ] ZU,AVX512BW,FUTURE,APX */ + /* 241(f1 fc 28) 300 001(45) 120 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KORQ, 3, {OPMASKREG|BITS64,OPMASKREG|BITS64,OPMASKREG|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+30100, 504, 4558}, + /* 2 : KORQ kreg64,kreg64 [r+vm: vex.nds.l1.0f.ko64 45 /r ] ND,ZU,AVX512BW,FUTURE */ + /* 260(001 204) 001(45) 110 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KORQ, 2, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65666, 503, 4558}, + /* 3 : KORQ kreg64,kreg64 [r+vm: evex.nds.l1.0f.ko64 45 /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 240(f1 fc 28) 300 001(45) 110 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KORQ, 2, {OPMASKREG|BITS64,OPMASKREG|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+30109, 504, 4558}, +}; + +static const struct itemplate instrux_KOR[16] = { + /* 0 : KOR kreg8,kreg8*,kreg8 [rvm: vex.nds.l1.0f.ko8 45 /r ] ND,SM0,SM1,SM2,ZU,AVX512DQ,FUTURE */ + /* 261(001 005) 001(45) 120 : SM0,SM1,SM2,NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_KOR, 3, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65617, 507, 4559}, + /* 1 : KOR kreg8,kreg8*,kreg8 [rvm: evex.nds.l1.0f.ko8 45 /r ] ND,SM0,SM1,SM2,ZU,AVX512DQ,FUTURE,APX */ + /* 241(f1 7d 28) 300 001(45) 120 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KOR, 3, {OPMASKREG|BITS8,OPMASKREG|BITS8,OPMASKREG|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+30046, 508, 4559}, + /* 2 : KOR kreg8,kreg8 [r+vm: vex.nds.l1.0f.ko8 45 /r ] SM0,ND,SM1,ZU,AVX512DQ,FUTURE */ + /* 260(001 005) 001(45) 110 : SM0,SM1,NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_KOR, 2, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65624, 509, 4559}, + /* 3 : KOR kreg8,kreg8 [r+vm: evex.nds.l1.0f.ko8 45 /r ] SM0,ND,SM1,ZU,AVX512DQ,FUTURE,APX */ + /* 240(f1 7d 28) 300 001(45) 110 : SM0,SM1,ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KOR, 2, {OPMASKREG|BITS8,OPMASKREG|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+30055, 510, 4559}, + /* 4 : KOR kreg16,kreg16*,kreg16 [rvm: vex.nds.l1.0f.ko16 45 /r ] ND,SM0,SM1,SM2,ZU,AVX512F,FUTURE */ + /* 261(001 004) 001(45) 120 : SM0,SM1,SM2,NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_KOR, 3, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65631, 523, 4560}, + /* 5 : KOR kreg16,kreg16*,kreg16 [rvm: evex.nds.l1.0f.ko16 45 /r ] ND,SM0,SM1,SM2,ZU,AVX512F,FUTURE,APX */ + /* 241(f1 7c 28) 300 001(45) 120 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_KOR, 3, {OPMASKREG|BITS16,OPMASKREG|BITS16,OPMASKREG|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+30064, 524, 4560}, + /* 6 : KOR kreg16,kreg16 [r+vm: vex.nds.l1.0f.ko16 45 /r ] SM0,ND,SM1,ZU,AVX512F,FUTURE */ + /* 260(001 004) 001(45) 110 : SM0,SM1,NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_KOR, 2, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65638, 525, 4560}, + /* 7 : KOR kreg16,kreg16 [r+vm: evex.nds.l1.0f.ko16 45 /r ] SM0,ND,SM1,ZU,AVX512F,FUTURE,APX */ + /* 240(f1 7c 28) 300 001(45) 110 : SM0,SM1,ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_KOR, 2, {OPMASKREG|BITS16,OPMASKREG|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+30073, 526, 4560}, + /* 8 : KOR kreg32,kreg32*,kreg32 [rvm: vex.nds.l1.0f.ko32 45 /r ] ND,SM0,SM1,SM2,ZU,AVX512BW,FUTURE */ + /* 261(001 205) 001(45) 120 : SM0,SM1,SM2,NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KOR, 3, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65645, 511, 4561}, + /* 9 : KOR kreg32,kreg32*,kreg32 [rvm: evex.nds.l1.0f.ko32 45 /r ] ND,SM0,SM1,SM2,ZU,AVX512BW,FUTURE,APX */ + /* 241(f1 fd 28) 300 001(45) 120 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KOR, 3, {OPMASKREG|BITS32,OPMASKREG|BITS32,OPMASKREG|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+30082, 512, 4561}, + /* 10 : KOR kreg32,kreg32 [r+vm: vex.nds.l1.0f.ko32 45 /r ] SM0,ND,SM1,ZU,AVX512BW,FUTURE */ + /* 260(001 205) 001(45) 110 : SM0,SM1,NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KOR, 2, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65652, 513, 4561}, + /* 11 : KOR kreg32,kreg32 [r+vm: evex.nds.l1.0f.ko32 45 /r ] SM0,ND,SM1,ZU,AVX512BW,FUTURE,APX */ + /* 240(f1 fd 28) 300 001(45) 110 : SM0,SM1,ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KOR, 2, {OPMASKREG|BITS32,OPMASKREG|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+30091, 514, 4561}, + /* 12 : KOR kreg64,kreg64*,kreg64 [rvm: vex.nds.l1.0f.ko64 45 /r ] ND,SM0,SM1,SM2,ZU,AVX512BW,FUTURE */ + /* 261(001 204) 001(45) 120 : SM0,SM1,SM2,NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KOR, 3, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65659, 511, 4562}, + /* 13 : KOR kreg64,kreg64*,kreg64 [rvm: evex.nds.l1.0f.ko64 45 /r ] ND,SM0,SM1,SM2,ZU,AVX512BW,FUTURE,APX */ + /* 241(f1 fc 28) 300 001(45) 120 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KOR, 3, {OPMASKREG|BITS64,OPMASKREG|BITS64,OPMASKREG|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+30100, 512, 4562}, + /* 14 : KOR kreg64,kreg64 [r+vm: vex.nds.l1.0f.ko64 45 /r ] ND,SM0,SM1,ZU,AVX512BW,FUTURE */ + /* 260(001 204) 001(45) 110 : SM0,SM1,NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KOR, 2, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65666, 513, 4562}, + /* 15 : KOR kreg64,kreg64 [r+vm: evex.nds.l1.0f.ko64 45 /r ] ND,SM0,SM1,ZU,AVX512BW,FUTURE,APX */ + /* 240(f1 fc 28) 300 001(45) 110 : SM0,SM1,ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KOR, 2, {OPMASKREG|BITS64,OPMASKREG|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+30109, 514, 4562}, +}; + +static const struct itemplate instrux_ORB[4] = { + /* 0 : ORB kreg8,kreg8*,kreg8 [rvm: vex.nds.l1.0f.ko8 45 /r ] ND,ZU,AVX512DQ,FUTURE */ + /* 261(001 005) 001(45) 120 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_ORB, 3, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65617, 499, 4563}, + /* 1 : ORB kreg8,kreg8*,kreg8 [rvm: evex.nds.l1.0f.ko8 45 /r ] ND,ZU,AVX512DQ,FUTURE,APX */ + /* 241(f1 7d 28) 300 001(45) 120 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_ORB, 3, {OPMASKREG|BITS8,OPMASKREG|BITS8,OPMASKREG|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+30046, 500, 4563}, + /* 2 : ORB kreg8,kreg8 [r+vm: vex.nds.l1.0f.ko8 45 /r ] ND,ZU,AVX512DQ,FUTURE */ + /* 260(001 005) 001(45) 110 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_ORB, 2, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65624, 499, 4563}, + /* 3 : ORB kreg8,kreg8 [r+vm: evex.nds.l1.0f.ko8 45 /r ] ND,ZU,AVX512DQ,FUTURE,APX */ + /* 240(f1 7d 28) 300 001(45) 110 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_ORB, 2, {OPMASKREG|BITS8,OPMASKREG|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+30055, 500, 4563}, +}; + +static const struct itemplate instrux_ORW[4] = { + /* 0 : ORW kreg16,kreg16*,kreg16 [rvm: vex.nds.l1.0f.ko16 45 /r ] ND,ZU,AVX512F,FUTURE */ + /* 261(001 004) 001(45) 120 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_ORW, 3, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65631, 501, 4564}, + /* 1 : ORW kreg16,kreg16*,kreg16 [rvm: evex.nds.l1.0f.ko16 45 /r ] ND,ZU,AVX512F,FUTURE,APX */ + /* 241(f1 7c 28) 300 001(45) 120 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_ORW, 3, {OPMASKREG|BITS16,OPMASKREG|BITS16,OPMASKREG|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+30064, 502, 4564}, + /* 2 : ORW kreg16,kreg16 [r+vm: vex.nds.l1.0f.ko16 45 /r ] ND,ZU,AVX512F,FUTURE */ + /* 260(001 004) 001(45) 110 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_ORW, 2, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65638, 501, 4564}, + /* 3 : ORW kreg16,kreg16 [r+vm: evex.nds.l1.0f.ko16 45 /r ] ND,ZU,AVX512F,FUTURE,APX */ + /* 240(f1 7c 28) 300 001(45) 110 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_ORW, 2, {OPMASKREG|BITS16,OPMASKREG|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+30073, 502, 4564}, +}; + +static const struct itemplate instrux_ORD[4] = { + /* 0 : ORD kreg32,kreg32*,kreg32 [rvm: vex.nds.l1.0f.ko32 45 /r ] ND,ZU,AVX512BW,FUTURE */ + /* 261(001 205) 001(45) 120 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_ORD, 3, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65645, 503, 4565}, + /* 1 : ORD kreg32,kreg32*,kreg32 [rvm: evex.nds.l1.0f.ko32 45 /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 241(f1 fd 28) 300 001(45) 120 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_ORD, 3, {OPMASKREG|BITS32,OPMASKREG|BITS32,OPMASKREG|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+30082, 504, 4565}, + /* 2 : ORD kreg32,kreg32 [r+vm: vex.nds.l1.0f.ko32 45 /r ] ND,ZU,AVX512BW,FUTURE */ + /* 260(001 205) 001(45) 110 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_ORD, 2, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65652, 503, 4565}, + /* 3 : ORD kreg32,kreg32 [r+vm: evex.nds.l1.0f.ko32 45 /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 240(f1 fd 28) 300 001(45) 110 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_ORD, 2, {OPMASKREG|BITS32,OPMASKREG|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+30091, 504, 4565}, +}; + +static const struct itemplate instrux_ORQ[4] = { + /* 0 : ORQ kreg64,kreg64*,kreg64 [rvm: vex.nds.l1.0f.ko64 45 /r ] ND,ZU,AVX512BW,FUTURE */ + /* 261(001 204) 001(45) 120 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_ORQ, 3, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65659, 503, 4566}, + /* 1 : ORQ kreg64,kreg64*,kreg64 [rvm: evex.nds.l1.0f.ko64 45 /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 241(f1 fc 28) 300 001(45) 120 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_ORQ, 3, {OPMASKREG|BITS64,OPMASKREG|BITS64,OPMASKREG|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+30100, 504, 4566}, + /* 2 : ORQ kreg64,kreg64 [r+vm: vex.nds.l1.0f.ko64 45 /r ] ND,ZU,AVX512BW,FUTURE */ + /* 260(001 204) 001(45) 110 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_ORQ, 2, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65666, 503, 4566}, + /* 3 : ORQ kreg64,kreg64 [r+vm: evex.nds.l1.0f.ko64 45 /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 240(f1 fc 28) 300 001(45) 110 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_ORQ, 2, {OPMASKREG|BITS64,OPMASKREG|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+30109, 504, 4566}, +}; + +static const struct itemplate instrux_KORTESTB[2] = { + /* 0 : KORTESTB kreg8,kreg8 [rm: vex.l0.0f.ko8 98 /r ] ZU,FL,AVX512DQ,FUTURE */ + /* 270(001 001) 001(98) 110 : NOAPX,ZU,FL,VEX,AVX512DQ,FUTURE */ + {I_KORTESTB, 2, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65673, 537, 4571}, + /* 1 : KORTESTB kreg8,kreg8 [rm: evex.l0.0f.ko8 98 /r ] ZU,FL,AVX512DQ,FUTURE,APX */ + /* 250(f1 7d 08) 300 001(98) 110 : ZU,LONG,FL,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KORTESTB, 2, {OPMASKREG|BITS8,OPMASKREG|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+30118, 538, 4571}, +}; + +static const struct itemplate instrux_KORTESTW[2] = { + /* 0 : KORTESTW kreg16,kreg16 [rm: vex.l0.0f.ko16 98 /r ] ZU,FL,AVX512F,FUTURE */ + /* 270(001 000) 001(98) 110 : NOAPX,ZU,FL,VEX,AVX512F,FUTURE */ + {I_KORTESTW, 2, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65680, 539, 4572}, + /* 1 : KORTESTW kreg16,kreg16 [rm: evex.l0.0f.ko16 98 /r ] ZU,FL,AVX512F,FUTURE,APX */ + /* 250(f1 7c 08) 300 001(98) 110 : ZU,LONG,FL,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_KORTESTW, 2, {OPMASKREG|BITS16,OPMASKREG|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+30127, 540, 4572}, +}; + +static const struct itemplate instrux_KORTESTD[2] = { + /* 0 : KORTESTD kreg32,kreg32 [rm: vex.l0.0f.ko32 98 /r ] ZU,FL,AVX512BW,FUTURE */ + /* 270(001 201) 001(98) 110 : NOAPX,ZU,FL,VEX,AVX512BW,FUTURE */ + {I_KORTESTD, 2, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65687, 541, 4573}, + /* 1 : KORTESTD kreg32,kreg32 [rm: evex.l0.0f.ko32 98 /r ] ZU,FL,AVX512BW,FUTURE,APX */ + /* 250(f1 fd 08) 300 001(98) 110 : ZU,LONG,FL,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KORTESTD, 2, {OPMASKREG|BITS32,OPMASKREG|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+30136, 542, 4573}, +}; + +static const struct itemplate instrux_KORTESTQ[2] = { + /* 0 : KORTESTQ kreg64,kreg64 [rm: vex.l0.0f.ko64 98 /r ] ZU,FL,AVX512BW,FUTURE */ + /* 270(001 200) 001(98) 110 : NOAPX,ZU,FL,VEX,AVX512BW,FUTURE */ + {I_KORTESTQ, 2, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65694, 541, 4574}, + /* 1 : KORTESTQ kreg64,kreg64 [rm: evex.l0.0f.ko64 98 /r ] ZU,FL,AVX512BW,FUTURE,APX */ + /* 250(f1 fc 08) 300 001(98) 110 : ZU,LONG,FL,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KORTESTQ, 2, {OPMASKREG|BITS64,OPMASKREG|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+30145, 542, 4574}, +}; + +static const struct itemplate instrux_KORTEST[8] = { + /* 0 : KORTEST kreg8,kreg8 [rm: vex.l0.0f.ko8 98 /r ] SM0,ND,SM1,ZU,FL,AVX512DQ,FUTURE */ + /* 270(001 001) 001(98) 110 : SM0,SM1,NOAPX,ZU,FL,VEX,AVX512DQ,FUTURE */ + {I_KORTEST, 2, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65673, 517, 4575}, + /* 1 : KORTEST kreg8,kreg8 [rm: evex.l0.0f.ko8 98 /r ] SM0,ND,SM1,ZU,FL,AVX512DQ,FUTURE,APX */ + /* 250(f1 7d 08) 300 001(98) 110 : SM0,SM1,ZU,LONG,FL,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KORTEST, 2, {OPMASKREG|BITS8,OPMASKREG|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+30118, 518, 4575}, + /* 2 : KORTEST kreg16,kreg16 [rm: vex.l0.0f.ko16 98 /r ] SM0,ND,SM1,ZU,FL,AVX512F,FUTURE */ + /* 270(001 000) 001(98) 110 : SM0,SM1,NOAPX,ZU,FL,VEX,AVX512F,FUTURE */ + {I_KORTEST, 2, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65680, 529, 4576}, + /* 3 : KORTEST kreg16,kreg16 [rm: evex.l0.0f.ko16 98 /r ] SM0,ND,SM1,ZU,FL,AVX512F,FUTURE,APX */ + /* 250(f1 7c 08) 300 001(98) 110 : SM0,SM1,ZU,LONG,FL,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_KORTEST, 2, {OPMASKREG|BITS16,OPMASKREG|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+30127, 530, 4576}, + /* 4 : KORTEST kreg32,kreg32 [rm: vex.l0.0f.ko32 98 /r ] ND,SM0-1,ZU,FL,AVX512BW,FUTURE */ + /* 270(001 201) 001(98) 110 : SM0,SM1,NOAPX,ZU,FL,VEX,AVX512BW,FUTURE */ + {I_KORTEST, 2, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65687, 521, 4577}, + /* 5 : KORTEST kreg32,kreg32 [rm: evex.l0.0f.ko32 98 /r ] ND,SM0-1,ZU,FL,AVX512BW,FUTURE,APX */ + /* 250(f1 fd 08) 300 001(98) 110 : SM0,SM1,ZU,LONG,FL,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KORTEST, 2, {OPMASKREG|BITS32,OPMASKREG|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+30136, 522, 4577}, + /* 6 : KORTEST kreg64,kreg64 [rm: vex.l0.0f.ko64 98 /r ] ND,SM0-1,ZU,FL,AVX512BW,FUTURE */ + /* 270(001 200) 001(98) 110 : SM0,SM1,NOAPX,ZU,FL,VEX,AVX512BW,FUTURE */ + {I_KORTEST, 2, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65694, 521, 4578}, + /* 7 : KORTEST kreg64,kreg64 [rm: evex.l0.0f.ko64 98 /r ] ND,SM0-1,ZU,FL,AVX512BW,FUTURE,APX */ + /* 250(f1 fc 08) 300 001(98) 110 : SM0,SM1,ZU,LONG,FL,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KORTEST, 2, {OPMASKREG|BITS64,OPMASKREG|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+30145, 522, 4578}, +}; + +static const struct itemplate instrux_ORTESTB[2] = { + /* 0 : ORTESTB kreg8,kreg8 [rm: vex.l0.0f.ko8 98 /r ] ND,ZU,FL,AVX512DQ,FUTURE */ + /* 270(001 001) 001(98) 110 : NOAPX,ZU,FL,VEX,AVX512DQ,FUTURE */ + {I_ORTESTB, 2, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65673, 537, 4579}, + /* 1 : ORTESTB kreg8,kreg8 [rm: evex.l0.0f.ko8 98 /r ] ND,ZU,FL,AVX512DQ,FUTURE,APX */ + /* 250(f1 7d 08) 300 001(98) 110 : ZU,LONG,FL,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_ORTESTB, 2, {OPMASKREG|BITS8,OPMASKREG|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+30118, 538, 4579}, +}; + +static const struct itemplate instrux_ORTESTW[2] = { + /* 0 : ORTESTW kreg16,kreg16 [rm: vex.l0.0f.ko16 98 /r ] ND,ZU,FL,AVX512F,FUTURE */ + /* 270(001 000) 001(98) 110 : NOAPX,ZU,FL,VEX,AVX512F,FUTURE */ + {I_ORTESTW, 2, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65680, 539, 4580}, + /* 1 : ORTESTW kreg16,kreg16 [rm: evex.l0.0f.ko16 98 /r ] ND,ZU,FL,AVX512F,FUTURE,APX */ + /* 250(f1 7c 08) 300 001(98) 110 : ZU,LONG,FL,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_ORTESTW, 2, {OPMASKREG|BITS16,OPMASKREG|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+30127, 540, 4580}, +}; + +static const struct itemplate instrux_ORTESTD[2] = { + /* 0 : ORTESTD kreg32,kreg32 [rm: vex.l0.0f.ko32 98 /r ] ND,ZU,FL,AVX512BW,FUTURE */ + /* 270(001 201) 001(98) 110 : NOAPX,ZU,FL,VEX,AVX512BW,FUTURE */ + {I_ORTESTD, 2, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65687, 541, 4581}, + /* 1 : ORTESTD kreg32,kreg32 [rm: evex.l0.0f.ko32 98 /r ] ND,ZU,FL,AVX512BW,FUTURE,APX */ + /* 250(f1 fd 08) 300 001(98) 110 : ZU,LONG,FL,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_ORTESTD, 2, {OPMASKREG|BITS32,OPMASKREG|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+30136, 542, 4581}, +}; + +static const struct itemplate instrux_ORTESTQ[2] = { + /* 0 : ORTESTQ kreg64,kreg64 [rm: vex.l0.0f.ko64 98 /r ] ND,ZU,FL,AVX512BW,FUTURE */ + /* 270(001 200) 001(98) 110 : NOAPX,ZU,FL,VEX,AVX512BW,FUTURE */ + {I_ORTESTQ, 2, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65694, 541, 4582}, + /* 1 : ORTESTQ kreg64,kreg64 [rm: evex.l0.0f.ko64 98 /r ] ND,ZU,FL,AVX512BW,FUTURE,APX */ + /* 250(f1 fc 08) 300 001(98) 110 : ZU,LONG,FL,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_ORTESTQ, 2, {OPMASKREG|BITS64,OPMASKREG|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+30145, 542, 4582}, +}; + +static const struct itemplate instrux_ORTEST[8] = { + /* 0 : ORTEST kreg8,kreg8 [rm: vex.l0.0f.ko8 98 /r ] SM0,ND,SM1,ZU,FL,AVX512DQ,FUTURE */ + /* 270(001 001) 001(98) 110 : SM0,SM1,NOAPX,ZU,FL,VEX,AVX512DQ,FUTURE */ + {I_ORTEST, 2, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65673, 517, 4583}, + /* 1 : ORTEST kreg8,kreg8 [rm: evex.l0.0f.ko8 98 /r ] SM0,ND,SM1,ZU,FL,AVX512DQ,FUTURE,APX */ + /* 250(f1 7d 08) 300 001(98) 110 : SM0,SM1,ZU,LONG,FL,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_ORTEST, 2, {OPMASKREG|BITS8,OPMASKREG|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+30118, 518, 4583}, + /* 2 : ORTEST kreg16,kreg16 [rm: vex.l0.0f.ko16 98 /r ] SM0,ND,SM1,ZU,FL,AVX512F,FUTURE */ + /* 270(001 000) 001(98) 110 : SM0,SM1,NOAPX,ZU,FL,VEX,AVX512F,FUTURE */ + {I_ORTEST, 2, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65680, 529, 4584}, + /* 3 : ORTEST kreg16,kreg16 [rm: evex.l0.0f.ko16 98 /r ] SM0,ND,SM1,ZU,FL,AVX512F,FUTURE,APX */ + /* 250(f1 7c 08) 300 001(98) 110 : SM0,SM1,ZU,LONG,FL,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_ORTEST, 2, {OPMASKREG|BITS16,OPMASKREG|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+30127, 530, 4584}, + /* 4 : ORTEST kreg32,kreg32 [rm: vex.l0.0f.ko32 98 /r ] SM0,ND,SM1,ZU,FL,AVX512BW,FUTURE */ + /* 270(001 201) 001(98) 110 : SM0,SM1,NOAPX,ZU,FL,VEX,AVX512BW,FUTURE */ + {I_ORTEST, 2, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65687, 521, 4585}, + /* 5 : ORTEST kreg32,kreg32 [rm: evex.l0.0f.ko32 98 /r ] SM0,ND,SM1,ZU,FL,AVX512BW,FUTURE,APX */ + /* 250(f1 fd 08) 300 001(98) 110 : SM0,SM1,ZU,LONG,FL,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_ORTEST, 2, {OPMASKREG|BITS32,OPMASKREG|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+30136, 522, 4585}, + /* 6 : ORTEST kreg64,kreg64 [rm: vex.l0.0f.ko64 98 /r ] ND,SM0-1,ZU,FL,AVX512BW,FUTURE */ + /* 270(001 200) 001(98) 110 : SM0,SM1,NOAPX,ZU,FL,VEX,AVX512BW,FUTURE */ + {I_ORTEST, 2, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65694, 521, 4586}, + /* 7 : ORTEST kreg64,kreg64 [rm: evex.l0.0f.ko64 98 /r ] ND,SM0-1,ZU,FL,AVX512BW,FUTURE,APX */ + /* 250(f1 fc 08) 300 001(98) 110 : SM0,SM1,ZU,LONG,FL,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_ORTEST, 2, {OPMASKREG|BITS64,OPMASKREG|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+30145, 522, 4586}, +}; + +static const struct itemplate instrux_KSHIFTLB[2] = { + /* 0 : KSHIFTLB kreg8,kreg8,imm8 [rmi: vex.l0.66.0f3a.w0 32 /r ib ] ZU,AVX512DQ,FUTURE */ + /* 270(003 001) 001(32) 110 022 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_KSHIFTLB, 3, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54715, 499, 4587}, + /* 1 : KSHIFTLB kreg8,kreg8,imm8 [rmi: evex.l0.66.0f3a.w0 32 /r ib ] ZU,AVX512DQ,FUTURE,APX */ + /* 250(f3 7d 08) 300 001(32) 110 022 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KSHIFTLB, 3, {OPMASKREG|BITS8,OPMASKREG|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18053, 500, 4587}, +}; + +static const struct itemplate instrux_KSHIFTLW[2] = { + /* 0 : KSHIFTLW kreg16,kreg16,imm8 [rmi: vex.l0.66.0f3a.w1 32 /r ib ] ZU,AVX512F,FUTURE */ + /* 270(003 201) 001(32) 110 022 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_KSHIFTLW, 3, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54723, 501, 4588}, + /* 1 : KSHIFTLW kreg16,kreg16,imm8 [rmi: evex.l0.66.0f3a.w1 32 /r ib ] ZU,AVX512F,FUTURE,APX */ + /* 250(f3 fd 08) 300 001(32) 110 022 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_KSHIFTLW, 3, {OPMASKREG|BITS16,OPMASKREG|BITS16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18063, 502, 4588}, +}; + +static const struct itemplate instrux_KSHIFTLD[2] = { + /* 0 : KSHIFTLD kreg32,kreg32,imm8 [rmi: vex.l0.66.0f3a.w0 33 /r ib ] ZU,AVX512BW,FUTURE */ + /* 270(003 001) 001(33) 110 022 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KSHIFTLD, 3, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54731, 503, 4589}, + /* 1 : KSHIFTLD kreg32,kreg32,imm8 [rmi: evex.l0.66.0f3a.w0 33 /r ib ] ZU,AVX512BW,FUTURE,APX */ + /* 250(f3 7d 08) 300 001(33) 110 022 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KSHIFTLD, 3, {OPMASKREG|BITS32,OPMASKREG|BITS32,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18073, 504, 4589}, +}; + +static const struct itemplate instrux_KSHIFTLQ[2] = { + /* 0 : KSHIFTLQ kreg64,kreg64,imm8 [rmi: vex.l0.66.0f3a.w1 33 /r ib ] ZU,AVX512BW,FUTURE */ + /* 270(003 201) 001(33) 110 022 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KSHIFTLQ, 3, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54739, 503, 4590}, + /* 1 : KSHIFTLQ kreg64,kreg64,imm8 [rmi: evex.l0.66.0f3a.w1 33 /r ib ] ZU,AVX512BW,FUTURE,APX */ + /* 250(f3 fd 08) 300 001(33) 110 022 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KSHIFTLQ, 3, {OPMASKREG|BITS64,OPMASKREG|BITS64,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18083, 504, 4590}, +}; + +static const struct itemplate instrux_KSHIFTL[8] = { + /* 0 : KSHIFTL kreg8,kreg8,imm8 [rmi: vex.l0.66.0f3a.w0 32 /r ib ] ND,SM0-1,ZU,AVX512DQ,FUTURE */ + /* 270(003 001) 001(32) 110 022 : SM0,SM1,NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_KSHIFTL, 3, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54715, 509, 4591}, + /* 1 : KSHIFTL kreg8,kreg8,imm8 [rmi: evex.l0.66.0f3a.w0 32 /r ib ] ND,SM0-1,ZU,AVX512DQ,FUTURE,APX */ + /* 250(f3 7d 08) 300 001(32) 110 022 : SM0,SM1,ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KSHIFTL, 3, {OPMASKREG|BITS8,OPMASKREG|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18053, 510, 4591}, + /* 2 : KSHIFTL kreg16,kreg16,imm8 [rmi: vex.l0.66.0f3a.w1 32 /r ib ] SM0,ND,SM1,ZU,AVX512F,FUTURE */ + /* 270(003 201) 001(32) 110 022 : SM0,SM1,NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_KSHIFTL, 3, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54723, 525, 4592}, + /* 3 : KSHIFTL kreg16,kreg16,imm8 [rmi: evex.l0.66.0f3a.w1 32 /r ib ] SM0,ND,SM1,ZU,AVX512F,FUTURE,APX */ + /* 250(f3 fd 08) 300 001(32) 110 022 : SM0,SM1,ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_KSHIFTL, 3, {OPMASKREG|BITS16,OPMASKREG|BITS16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18063, 526, 4592}, + /* 4 : KSHIFTL kreg32,kreg32,imm8 [rmi: vex.l0.66.0f3a.w0 33 /r ib ] SM0,ND,SM1,ZU,AVX512BW,FUTURE */ + /* 270(003 001) 001(33) 110 022 : SM0,SM1,NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KSHIFTL, 3, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54731, 513, 4593}, + /* 5 : KSHIFTL kreg32,kreg32,imm8 [rmi: evex.l0.66.0f3a.w0 33 /r ib ] SM0,ND,SM1,ZU,AVX512BW,FUTURE,APX */ + /* 250(f3 7d 08) 300 001(33) 110 022 : SM0,SM1,ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KSHIFTL, 3, {OPMASKREG|BITS32,OPMASKREG|BITS32,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18073, 514, 4593}, + /* 6 : KSHIFTL kreg64,kreg64,imm8 [rmi: vex.l0.66.0f3a.w1 33 /r ib ] ND,SM0-1,ZU,AVX512BW,FUTURE */ + /* 270(003 201) 001(33) 110 022 : SM0,SM1,NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KSHIFTL, 3, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54739, 513, 4594}, + /* 7 : KSHIFTL kreg64,kreg64,imm8 [rmi: evex.l0.66.0f3a.w1 33 /r ib ] ND,SM0-1,ZU,AVX512BW,FUTURE,APX */ + /* 250(f3 fd 08) 300 001(33) 110 022 : SM0,SM1,ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KSHIFTL, 3, {OPMASKREG|BITS64,OPMASKREG|BITS64,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18083, 514, 4594}, +}; + +static const struct itemplate instrux_SHIFTLB[2] = { + /* 0 : SHIFTLB kreg8,kreg8,imm8 [rmi: vex.l0.66.0f3a.w0 32 /r ib ] ND,ZU,AVX512DQ,FUTURE */ + /* 270(003 001) 001(32) 110 022 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_SHIFTLB, 3, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54715, 499, 4595}, + /* 1 : SHIFTLB kreg8,kreg8,imm8 [rmi: evex.l0.66.0f3a.w0 32 /r ib ] ND,ZU,AVX512DQ,FUTURE,APX */ + /* 250(f3 7d 08) 300 001(32) 110 022 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_SHIFTLB, 3, {OPMASKREG|BITS8,OPMASKREG|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18053, 500, 4595}, +}; + +static const struct itemplate instrux_SHIFTLW[2] = { + /* 0 : SHIFTLW kreg16,kreg16,imm8 [rmi: vex.l0.66.0f3a.w1 32 /r ib ] ND,ZU,AVX512F,FUTURE */ + /* 270(003 201) 001(32) 110 022 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_SHIFTLW, 3, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54723, 501, 4596}, + /* 1 : SHIFTLW kreg16,kreg16,imm8 [rmi: evex.l0.66.0f3a.w1 32 /r ib ] ND,ZU,AVX512F,FUTURE,APX */ + /* 250(f3 fd 08) 300 001(32) 110 022 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_SHIFTLW, 3, {OPMASKREG|BITS16,OPMASKREG|BITS16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18063, 502, 4596}, +}; + +static const struct itemplate instrux_SHIFTLD[2] = { + /* 0 : SHIFTLD kreg32,kreg32,imm8 [rmi: vex.l0.66.0f3a.w0 33 /r ib ] ND,ZU,AVX512BW,FUTURE */ + /* 270(003 001) 001(33) 110 022 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_SHIFTLD, 3, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54731, 503, 4597}, + /* 1 : SHIFTLD kreg32,kreg32,imm8 [rmi: evex.l0.66.0f3a.w0 33 /r ib ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 250(f3 7d 08) 300 001(33) 110 022 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_SHIFTLD, 3, {OPMASKREG|BITS32,OPMASKREG|BITS32,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18073, 504, 4597}, +}; + +static const struct itemplate instrux_SHIFTLQ[2] = { + /* 0 : SHIFTLQ kreg64,kreg64,imm8 [rmi: vex.l0.66.0f3a.w1 33 /r ib ] ND,ZU,AVX512BW,FUTURE */ + /* 270(003 201) 001(33) 110 022 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_SHIFTLQ, 3, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54739, 503, 4598}, + /* 1 : SHIFTLQ kreg64,kreg64,imm8 [rmi: evex.l0.66.0f3a.w1 33 /r ib ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 250(f3 fd 08) 300 001(33) 110 022 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_SHIFTLQ, 3, {OPMASKREG|BITS64,OPMASKREG|BITS64,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18083, 504, 4598}, +}; + +static const struct itemplate instrux_SHIFTL[8] = { + /* 0 : SHIFTL kreg8,kreg8,imm8 [rmi: vex.l0.66.0f3a.w0 32 /r ib ] SM0,ND,SM1,ZU,AVX512DQ,FUTURE */ + /* 270(003 001) 001(32) 110 022 : SM0,SM1,NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_SHIFTL, 3, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54715, 509, 4599}, + /* 1 : SHIFTL kreg8,kreg8,imm8 [rmi: evex.l0.66.0f3a.w0 32 /r ib ] SM0,ND,SM1,ZU,AVX512DQ,FUTURE,APX */ + /* 250(f3 7d 08) 300 001(32) 110 022 : SM0,SM1,ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_SHIFTL, 3, {OPMASKREG|BITS8,OPMASKREG|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18053, 510, 4599}, + /* 2 : SHIFTL kreg16,kreg16,imm8 [rmi: vex.l0.66.0f3a.w1 32 /r ib ] SM0,ND,SM1,ZU,AVX512F,FUTURE */ + /* 270(003 201) 001(32) 110 022 : SM0,SM1,NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_SHIFTL, 3, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54723, 525, 4600}, + /* 3 : SHIFTL kreg16,kreg16,imm8 [rmi: evex.l0.66.0f3a.w1 32 /r ib ] SM0,ND,SM1,ZU,AVX512F,FUTURE,APX */ + /* 250(f3 fd 08) 300 001(32) 110 022 : SM0,SM1,ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_SHIFTL, 3, {OPMASKREG|BITS16,OPMASKREG|BITS16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18063, 526, 4600}, + /* 4 : SHIFTL kreg32,kreg32,imm8 [rmi: vex.l0.66.0f3a.w0 33 /r ib ] ND,SM0-1,ZU,AVX512BW,FUTURE */ + /* 270(003 001) 001(33) 110 022 : SM0,SM1,NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_SHIFTL, 3, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54731, 513, 4601}, + /* 5 : SHIFTL kreg32,kreg32,imm8 [rmi: evex.l0.66.0f3a.w0 33 /r ib ] ND,SM0-1,ZU,AVX512BW,FUTURE,APX */ + /* 250(f3 7d 08) 300 001(33) 110 022 : SM0,SM1,ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_SHIFTL, 3, {OPMASKREG|BITS32,OPMASKREG|BITS32,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18073, 514, 4601}, + /* 6 : SHIFTL kreg64,kreg64,imm8 [rmi: vex.l0.66.0f3a.w1 33 /r ib ] SM0,ND,SM1,ZU,AVX512BW,FUTURE */ + /* 270(003 201) 001(33) 110 022 : SM0,SM1,NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_SHIFTL, 3, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54739, 513, 4602}, + /* 7 : SHIFTL kreg64,kreg64,imm8 [rmi: evex.l0.66.0f3a.w1 33 /r ib ] SM0,ND,SM1,ZU,AVX512BW,FUTURE,APX */ + /* 250(f3 fd 08) 300 001(33) 110 022 : SM0,SM1,ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_SHIFTL, 3, {OPMASKREG|BITS64,OPMASKREG|BITS64,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18083, 514, 4602}, +}; + +static const struct itemplate instrux_KSHLB[2] = { + /* 0 : KSHLB kreg8,kreg8,imm8 [rmi: vex.l0.66.0f3a.w0 32 /r ib ] ND,ZU,AVX512DQ,FUTURE */ + /* 270(003 001) 001(32) 110 022 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_KSHLB, 3, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54715, 499, 4603}, + /* 1 : KSHLB kreg8,kreg8,imm8 [rmi: evex.l0.66.0f3a.w0 32 /r ib ] ND,ZU,AVX512DQ,FUTURE,APX */ + /* 250(f3 7d 08) 300 001(32) 110 022 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KSHLB, 3, {OPMASKREG|BITS8,OPMASKREG|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18053, 500, 4603}, +}; + +static const struct itemplate instrux_KSHLW[2] = { + /* 0 : KSHLW kreg16,kreg16,imm8 [rmi: vex.l0.66.0f3a.w1 32 /r ib ] ND,ZU,AVX512F,FUTURE */ + /* 270(003 201) 001(32) 110 022 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_KSHLW, 3, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54723, 501, 4604}, + /* 1 : KSHLW kreg16,kreg16,imm8 [rmi: evex.l0.66.0f3a.w1 32 /r ib ] ND,ZU,AVX512F,FUTURE,APX */ + /* 250(f3 fd 08) 300 001(32) 110 022 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_KSHLW, 3, {OPMASKREG|BITS16,OPMASKREG|BITS16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18063, 502, 4604}, +}; + +static const struct itemplate instrux_KSHLD[2] = { + /* 0 : KSHLD kreg32,kreg32,imm8 [rmi: vex.l0.66.0f3a.w0 33 /r ib ] ND,ZU,AVX512BW,FUTURE */ + /* 270(003 001) 001(33) 110 022 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KSHLD, 3, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54731, 503, 4605}, + /* 1 : KSHLD kreg32,kreg32,imm8 [rmi: evex.l0.66.0f3a.w0 33 /r ib ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 250(f3 7d 08) 300 001(33) 110 022 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KSHLD, 3, {OPMASKREG|BITS32,OPMASKREG|BITS32,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18073, 504, 4605}, +}; + +static const struct itemplate instrux_KSHLQ[2] = { + /* 0 : KSHLQ kreg64,kreg64,imm8 [rmi: vex.l0.66.0f3a.w1 33 /r ib ] ND,ZU,AVX512BW,FUTURE */ + /* 270(003 201) 001(33) 110 022 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KSHLQ, 3, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54739, 503, 4606}, + /* 1 : KSHLQ kreg64,kreg64,imm8 [rmi: evex.l0.66.0f3a.w1 33 /r ib ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 250(f3 fd 08) 300 001(33) 110 022 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KSHLQ, 3, {OPMASKREG|BITS64,OPMASKREG|BITS64,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18083, 504, 4606}, +}; + +static const struct itemplate instrux_KSHL[8] = { + /* 0 : KSHL kreg8,kreg8,imm8 [rmi: vex.l0.66.0f3a.w0 32 /r ib ] ND,SM0-1,ZU,AVX512DQ,FUTURE */ + /* 270(003 001) 001(32) 110 022 : SM0,SM1,NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_KSHL, 3, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54715, 509, 4607}, + /* 1 : KSHL kreg8,kreg8,imm8 [rmi: evex.l0.66.0f3a.w0 32 /r ib ] ND,SM0-1,ZU,AVX512DQ,FUTURE,APX */ + /* 250(f3 7d 08) 300 001(32) 110 022 : SM0,SM1,ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KSHL, 3, {OPMASKREG|BITS8,OPMASKREG|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18053, 510, 4607}, + /* 2 : KSHL kreg16,kreg16,imm8 [rmi: vex.l0.66.0f3a.w1 32 /r ib ] ND,SM0-1,ZU,AVX512F,FUTURE */ + /* 270(003 201) 001(32) 110 022 : SM0,SM1,NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_KSHL, 3, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54723, 525, 4608}, + /* 3 : KSHL kreg16,kreg16,imm8 [rmi: evex.l0.66.0f3a.w1 32 /r ib ] ND,SM0-1,ZU,AVX512F,FUTURE,APX */ + /* 250(f3 fd 08) 300 001(32) 110 022 : SM0,SM1,ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_KSHL, 3, {OPMASKREG|BITS16,OPMASKREG|BITS16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18063, 526, 4608}, + /* 4 : KSHL kreg32,kreg32,imm8 [rmi: vex.l0.66.0f3a.w0 33 /r ib ] ND,SM0-1,ZU,AVX512BW,FUTURE */ + /* 270(003 001) 001(33) 110 022 : SM0,SM1,NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KSHL, 3, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54731, 513, 4609}, + /* 5 : KSHL kreg32,kreg32,imm8 [rmi: evex.l0.66.0f3a.w0 33 /r ib ] ND,SM0-1,ZU,AVX512BW,FUTURE,APX */ + /* 250(f3 7d 08) 300 001(33) 110 022 : SM0,SM1,ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KSHL, 3, {OPMASKREG|BITS32,OPMASKREG|BITS32,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18073, 514, 4609}, + /* 6 : KSHL kreg64,kreg64,imm8 [rmi: vex.l0.66.0f3a.w1 33 /r ib ] ND,SM0-1,ZU,AVX512BW,FUTURE */ + /* 270(003 201) 001(33) 110 022 : SM0,SM1,NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KSHL, 3, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54739, 513, 4610}, + /* 7 : KSHL kreg64,kreg64,imm8 [rmi: evex.l0.66.0f3a.w1 33 /r ib ] ND,SM0-1,ZU,AVX512BW,FUTURE,APX */ + /* 250(f3 fd 08) 300 001(33) 110 022 : SM0,SM1,ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KSHL, 3, {OPMASKREG|BITS64,OPMASKREG|BITS64,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18083, 514, 4610}, +}; + +static const struct itemplate instrux_SHLB[2] = { + /* 0 : SHLB kreg8,kreg8,imm8 [rmi: vex.l0.66.0f3a.w0 32 /r ib ] ND,ZU,AVX512DQ,FUTURE */ + /* 270(003 001) 001(32) 110 022 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_SHLB, 3, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54715, 499, 4611}, + /* 1 : SHLB kreg8,kreg8,imm8 [rmi: evex.l0.66.0f3a.w0 32 /r ib ] ND,ZU,AVX512DQ,FUTURE,APX */ + /* 250(f3 7d 08) 300 001(32) 110 022 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_SHLB, 3, {OPMASKREG|BITS8,OPMASKREG|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18053, 500, 4611}, +}; + +static const struct itemplate instrux_SHLW[2] = { + /* 0 : SHLW kreg16,kreg16,imm8 [rmi: vex.l0.66.0f3a.w1 32 /r ib ] ND,ZU,AVX512F,FUTURE */ + /* 270(003 201) 001(32) 110 022 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_SHLW, 3, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54723, 501, 4612}, + /* 1 : SHLW kreg16,kreg16,imm8 [rmi: evex.l0.66.0f3a.w1 32 /r ib ] ND,ZU,AVX512F,FUTURE,APX */ + /* 250(f3 fd 08) 300 001(32) 110 022 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_SHLW, 3, {OPMASKREG|BITS16,OPMASKREG|BITS16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18063, 502, 4612}, +}; + +static const struct itemplate instrux_SHLQ[2] = { + /* 0 : SHLQ kreg64,kreg64,imm8 [rmi: vex.l0.66.0f3a.w1 33 /r ib ] ND,ZU,AVX512BW,FUTURE */ + /* 270(003 201) 001(33) 110 022 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_SHLQ, 3, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54739, 503, 4614}, + /* 1 : SHLQ kreg64,kreg64,imm8 [rmi: evex.l0.66.0f3a.w1 33 /r ib ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 250(f3 fd 08) 300 001(33) 110 022 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_SHLQ, 3, {OPMASKREG|BITS64,OPMASKREG|BITS64,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18083, 504, 4614}, +}; + +static const struct itemplate instrux_KSHIFTRB[2] = { + /* 0 : KSHIFTRB kreg8,kreg8,imm8 [rmi: vex.l0.66.0f3a.w0 30 /r ib ] ZU,AVX512DQ,FUTURE */ + /* 270(003 001) 001(30) 110 022 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_KSHIFTRB, 3, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54747, 499, 4619}, + /* 1 : KSHIFTRB kreg8,kreg8,imm8 [rmi: evex.l0.66.0f3a.w0 30 /r ib ] ZU,AVX512DQ,FUTURE,APX */ + /* 250(f3 7d 08) 300 001(30) 110 022 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KSHIFTRB, 3, {OPMASKREG|BITS8,OPMASKREG|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18093, 500, 4619}, +}; + +static const struct itemplate instrux_KSHIFTRW[2] = { + /* 0 : KSHIFTRW kreg16,kreg16,imm8 [rmi: vex.l0.66.0f3a.w1 30 /r ib ] ZU,AVX512F,FUTURE */ + /* 270(003 201) 001(30) 110 022 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_KSHIFTRW, 3, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54755, 501, 4620}, + /* 1 : KSHIFTRW kreg16,kreg16,imm8 [rmi: evex.l0.66.0f3a.w1 30 /r ib ] ZU,AVX512F,FUTURE,APX */ + /* 250(f3 fd 08) 300 001(30) 110 022 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_KSHIFTRW, 3, {OPMASKREG|BITS16,OPMASKREG|BITS16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18103, 502, 4620}, +}; + +static const struct itemplate instrux_KSHIFTRD[2] = { + /* 0 : KSHIFTRD kreg32,kreg32,imm8 [rmi: vex.l0.66.0f3a.w0 31 /r ib ] ZU,AVX512BW,FUTURE */ + /* 270(003 001) 001(31) 110 022 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KSHIFTRD, 3, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54763, 503, 4621}, + /* 1 : KSHIFTRD kreg32,kreg32,imm8 [rmi: evex.l0.66.0f3a.w0 31 /r ib ] ZU,AVX512BW,FUTURE,APX */ + /* 250(f3 7d 08) 300 001(31) 110 022 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KSHIFTRD, 3, {OPMASKREG|BITS32,OPMASKREG|BITS32,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18113, 504, 4621}, +}; + +static const struct itemplate instrux_KSHIFTRQ[2] = { + /* 0 : KSHIFTRQ kreg64,kreg64,imm8 [rmi: vex.l0.66.0f3a.w1 31 /r ib ] ZU,AVX512BW,FUTURE */ + /* 270(003 201) 001(31) 110 022 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KSHIFTRQ, 3, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54771, 503, 4622}, + /* 1 : KSHIFTRQ kreg64,kreg64,imm8 [rmi: evex.l0.66.0f3a.w1 31 /r ib ] ZU,AVX512BW,FUTURE,APX */ + /* 250(f3 fd 08) 300 001(31) 110 022 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KSHIFTRQ, 3, {OPMASKREG|BITS64,OPMASKREG|BITS64,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18123, 504, 4622}, +}; + +static const struct itemplate instrux_KSHIFTR[8] = { + /* 0 : KSHIFTR kreg8,kreg8,imm8 [rmi: vex.l0.66.0f3a.w0 30 /r ib ] ND,SM0-1,ZU,AVX512DQ,FUTURE */ + /* 270(003 001) 001(30) 110 022 : SM0,SM1,NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_KSHIFTR, 3, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54747, 509, 4623}, + /* 1 : KSHIFTR kreg8,kreg8,imm8 [rmi: evex.l0.66.0f3a.w0 30 /r ib ] ND,SM0-1,ZU,AVX512DQ,FUTURE,APX */ + /* 250(f3 7d 08) 300 001(30) 110 022 : SM0,SM1,ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KSHIFTR, 3, {OPMASKREG|BITS8,OPMASKREG|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18093, 510, 4623}, + /* 2 : KSHIFTR kreg16,kreg16,imm8 [rmi: vex.l0.66.0f3a.w1 30 /r ib ] ND,SM0-1,ZU,AVX512F,FUTURE */ + /* 270(003 201) 001(30) 110 022 : SM0,SM1,NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_KSHIFTR, 3, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54755, 525, 4624}, + /* 3 : KSHIFTR kreg16,kreg16,imm8 [rmi: evex.l0.66.0f3a.w1 30 /r ib ] ND,SM0-1,ZU,AVX512F,FUTURE,APX */ + /* 250(f3 fd 08) 300 001(30) 110 022 : SM0,SM1,ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_KSHIFTR, 3, {OPMASKREG|BITS16,OPMASKREG|BITS16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18103, 526, 4624}, + /* 4 : KSHIFTR kreg32,kreg32,imm8 [rmi: vex.l0.66.0f3a.w0 31 /r ib ] ND,SM0-1,ZU,AVX512BW,FUTURE */ + /* 270(003 001) 001(31) 110 022 : SM0,SM1,NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KSHIFTR, 3, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54763, 513, 4625}, + /* 5 : KSHIFTR kreg32,kreg32,imm8 [rmi: evex.l0.66.0f3a.w0 31 /r ib ] ND,SM0-1,ZU,AVX512BW,FUTURE,APX */ + /* 250(f3 7d 08) 300 001(31) 110 022 : SM0,SM1,ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KSHIFTR, 3, {OPMASKREG|BITS32,OPMASKREG|BITS32,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18113, 514, 4625}, + /* 6 : KSHIFTR kreg64,kreg64,imm8 [rmi: vex.l0.66.0f3a.w1 31 /r ib ] SM0,ND,SM1,ZU,AVX512BW,FUTURE */ + /* 270(003 201) 001(31) 110 022 : SM0,SM1,NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KSHIFTR, 3, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54771, 513, 4626}, + /* 7 : KSHIFTR kreg64,kreg64,imm8 [rmi: evex.l0.66.0f3a.w1 31 /r ib ] SM0,ND,SM1,ZU,AVX512BW,FUTURE,APX */ + /* 250(f3 fd 08) 300 001(31) 110 022 : SM0,SM1,ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KSHIFTR, 3, {OPMASKREG|BITS64,OPMASKREG|BITS64,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18123, 514, 4626}, +}; + +static const struct itemplate instrux_SHIFTRB[2] = { + /* 0 : SHIFTRB kreg8,kreg8,imm8 [rmi: vex.l0.66.0f3a.w0 30 /r ib ] ND,ZU,AVX512DQ,FUTURE */ + /* 270(003 001) 001(30) 110 022 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_SHIFTRB, 3, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54747, 499, 4627}, + /* 1 : SHIFTRB kreg8,kreg8,imm8 [rmi: evex.l0.66.0f3a.w0 30 /r ib ] ND,ZU,AVX512DQ,FUTURE,APX */ + /* 250(f3 7d 08) 300 001(30) 110 022 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_SHIFTRB, 3, {OPMASKREG|BITS8,OPMASKREG|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18093, 500, 4627}, +}; + +static const struct itemplate instrux_SHIFTRW[2] = { + /* 0 : SHIFTRW kreg16,kreg16,imm8 [rmi: vex.l0.66.0f3a.w1 30 /r ib ] ND,ZU,AVX512F,FUTURE */ + /* 270(003 201) 001(30) 110 022 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_SHIFTRW, 3, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54755, 501, 4628}, + /* 1 : SHIFTRW kreg16,kreg16,imm8 [rmi: evex.l0.66.0f3a.w1 30 /r ib ] ND,ZU,AVX512F,FUTURE,APX */ + /* 250(f3 fd 08) 300 001(30) 110 022 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_SHIFTRW, 3, {OPMASKREG|BITS16,OPMASKREG|BITS16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18103, 502, 4628}, +}; + +static const struct itemplate instrux_SHIFTRD[2] = { + /* 0 : SHIFTRD kreg32,kreg32,imm8 [rmi: vex.l0.66.0f3a.w0 31 /r ib ] ND,ZU,AVX512BW,FUTURE */ + /* 270(003 001) 001(31) 110 022 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_SHIFTRD, 3, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54763, 503, 4629}, + /* 1 : SHIFTRD kreg32,kreg32,imm8 [rmi: evex.l0.66.0f3a.w0 31 /r ib ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 250(f3 7d 08) 300 001(31) 110 022 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_SHIFTRD, 3, {OPMASKREG|BITS32,OPMASKREG|BITS32,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18113, 504, 4629}, +}; + +static const struct itemplate instrux_SHIFTRQ[2] = { + /* 0 : SHIFTRQ kreg64,kreg64,imm8 [rmi: vex.l0.66.0f3a.w1 31 /r ib ] ND,ZU,AVX512BW,FUTURE */ + /* 270(003 201) 001(31) 110 022 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_SHIFTRQ, 3, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54771, 503, 4630}, + /* 1 : SHIFTRQ kreg64,kreg64,imm8 [rmi: evex.l0.66.0f3a.w1 31 /r ib ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 250(f3 fd 08) 300 001(31) 110 022 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_SHIFTRQ, 3, {OPMASKREG|BITS64,OPMASKREG|BITS64,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18123, 504, 4630}, +}; + +static const struct itemplate instrux_SHIFTR[8] = { + /* 0 : SHIFTR kreg8,kreg8,imm8 [rmi: vex.l0.66.0f3a.w0 30 /r ib ] ND,SM0-1,ZU,AVX512DQ,FUTURE */ + /* 270(003 001) 001(30) 110 022 : SM0,SM1,NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_SHIFTR, 3, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54747, 509, 4631}, + /* 1 : SHIFTR kreg8,kreg8,imm8 [rmi: evex.l0.66.0f3a.w0 30 /r ib ] ND,SM0-1,ZU,AVX512DQ,FUTURE,APX */ + /* 250(f3 7d 08) 300 001(30) 110 022 : SM0,SM1,ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_SHIFTR, 3, {OPMASKREG|BITS8,OPMASKREG|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18093, 510, 4631}, + /* 2 : SHIFTR kreg16,kreg16,imm8 [rmi: vex.l0.66.0f3a.w1 30 /r ib ] ND,SM0-1,ZU,AVX512F,FUTURE */ + /* 270(003 201) 001(30) 110 022 : SM0,SM1,NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_SHIFTR, 3, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54755, 525, 4632}, + /* 3 : SHIFTR kreg16,kreg16,imm8 [rmi: evex.l0.66.0f3a.w1 30 /r ib ] ND,SM0-1,ZU,AVX512F,FUTURE,APX */ + /* 250(f3 fd 08) 300 001(30) 110 022 : SM0,SM1,ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_SHIFTR, 3, {OPMASKREG|BITS16,OPMASKREG|BITS16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18103, 526, 4632}, + /* 4 : SHIFTR kreg32,kreg32,imm8 [rmi: vex.l0.66.0f3a.w0 31 /r ib ] SM0,ND,SM1,ZU,AVX512BW,FUTURE */ + /* 270(003 001) 001(31) 110 022 : SM0,SM1,NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_SHIFTR, 3, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54763, 513, 4633}, + /* 5 : SHIFTR kreg32,kreg32,imm8 [rmi: evex.l0.66.0f3a.w0 31 /r ib ] SM0,ND,SM1,ZU,AVX512BW,FUTURE,APX */ + /* 250(f3 7d 08) 300 001(31) 110 022 : SM0,SM1,ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_SHIFTR, 3, {OPMASKREG|BITS32,OPMASKREG|BITS32,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18113, 514, 4633}, + /* 6 : SHIFTR kreg64,kreg64,imm8 [rmi: vex.l0.66.0f3a.w1 31 /r ib ] ND,SM0-1,ZU,AVX512BW,FUTURE */ + /* 270(003 201) 001(31) 110 022 : SM0,SM1,NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_SHIFTR, 3, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54771, 513, 4634}, + /* 7 : SHIFTR kreg64,kreg64,imm8 [rmi: evex.l0.66.0f3a.w1 31 /r ib ] ND,SM0-1,ZU,AVX512BW,FUTURE,APX */ + /* 250(f3 fd 08) 300 001(31) 110 022 : SM0,SM1,ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_SHIFTR, 3, {OPMASKREG|BITS64,OPMASKREG|BITS64,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18123, 514, 4634}, +}; + +static const struct itemplate instrux_KSHRB[2] = { + /* 0 : KSHRB kreg8,kreg8,imm8 [rmi: vex.l0.66.0f3a.w0 30 /r ib ] ND,ZU,AVX512DQ,FUTURE */ + /* 270(003 001) 001(30) 110 022 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_KSHRB, 3, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54747, 499, 4635}, + /* 1 : KSHRB kreg8,kreg8,imm8 [rmi: evex.l0.66.0f3a.w0 30 /r ib ] ND,ZU,AVX512DQ,FUTURE,APX */ + /* 250(f3 7d 08) 300 001(30) 110 022 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KSHRB, 3, {OPMASKREG|BITS8,OPMASKREG|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18093, 500, 4635}, +}; + +static const struct itemplate instrux_KSHRW[2] = { + /* 0 : KSHRW kreg16,kreg16,imm8 [rmi: vex.l0.66.0f3a.w1 30 /r ib ] ND,ZU,AVX512F,FUTURE */ + /* 270(003 201) 001(30) 110 022 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_KSHRW, 3, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54755, 501, 4636}, + /* 1 : KSHRW kreg16,kreg16,imm8 [rmi: evex.l0.66.0f3a.w1 30 /r ib ] ND,ZU,AVX512F,FUTURE,APX */ + /* 250(f3 fd 08) 300 001(30) 110 022 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_KSHRW, 3, {OPMASKREG|BITS16,OPMASKREG|BITS16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18103, 502, 4636}, +}; + +static const struct itemplate instrux_KSHRD[2] = { + /* 0 : KSHRD kreg32,kreg32,imm8 [rmi: vex.l0.66.0f3a.w0 31 /r ib ] ND,ZU,AVX512BW,FUTURE */ + /* 270(003 001) 001(31) 110 022 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KSHRD, 3, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54763, 503, 4637}, + /* 1 : KSHRD kreg32,kreg32,imm8 [rmi: evex.l0.66.0f3a.w0 31 /r ib ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 250(f3 7d 08) 300 001(31) 110 022 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KSHRD, 3, {OPMASKREG|BITS32,OPMASKREG|BITS32,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18113, 504, 4637}, +}; + +static const struct itemplate instrux_KSHRQ[2] = { + /* 0 : KSHRQ kreg64,kreg64,imm8 [rmi: vex.l0.66.0f3a.w1 31 /r ib ] ND,ZU,AVX512BW,FUTURE */ + /* 270(003 201) 001(31) 110 022 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KSHRQ, 3, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54771, 503, 4638}, + /* 1 : KSHRQ kreg64,kreg64,imm8 [rmi: evex.l0.66.0f3a.w1 31 /r ib ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 250(f3 fd 08) 300 001(31) 110 022 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KSHRQ, 3, {OPMASKREG|BITS64,OPMASKREG|BITS64,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18123, 504, 4638}, +}; + +static const struct itemplate instrux_KSHR[8] = { + /* 0 : KSHR kreg8,kreg8,imm8 [rmi: vex.l0.66.0f3a.w0 30 /r ib ] ND,SM0-1,ZU,AVX512DQ,FUTURE */ + /* 270(003 001) 001(30) 110 022 : SM0,SM1,NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_KSHR, 3, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54747, 509, 4639}, + /* 1 : KSHR kreg8,kreg8,imm8 [rmi: evex.l0.66.0f3a.w0 30 /r ib ] ND,SM0-1,ZU,AVX512DQ,FUTURE,APX */ + /* 250(f3 7d 08) 300 001(30) 110 022 : SM0,SM1,ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KSHR, 3, {OPMASKREG|BITS8,OPMASKREG|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18093, 510, 4639}, + /* 2 : KSHR kreg16,kreg16,imm8 [rmi: vex.l0.66.0f3a.w1 30 /r ib ] SM0,ND,SM1,ZU,AVX512F,FUTURE */ + /* 270(003 201) 001(30) 110 022 : SM0,SM1,NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_KSHR, 3, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54755, 525, 4640}, + /* 3 : KSHR kreg16,kreg16,imm8 [rmi: evex.l0.66.0f3a.w1 30 /r ib ] SM0,ND,SM1,ZU,AVX512F,FUTURE,APX */ + /* 250(f3 fd 08) 300 001(30) 110 022 : SM0,SM1,ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_KSHR, 3, {OPMASKREG|BITS16,OPMASKREG|BITS16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18103, 526, 4640}, + /* 4 : KSHR kreg32,kreg32,imm8 [rmi: vex.l0.66.0f3a.w0 31 /r ib ] SM0,ND,SM1,ZU,AVX512BW,FUTURE */ + /* 270(003 001) 001(31) 110 022 : SM0,SM1,NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KSHR, 3, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54763, 513, 4641}, + /* 5 : KSHR kreg32,kreg32,imm8 [rmi: evex.l0.66.0f3a.w0 31 /r ib ] SM0,ND,SM1,ZU,AVX512BW,FUTURE,APX */ + /* 250(f3 7d 08) 300 001(31) 110 022 : SM0,SM1,ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KSHR, 3, {OPMASKREG|BITS32,OPMASKREG|BITS32,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18113, 514, 4641}, + /* 6 : KSHR kreg64,kreg64,imm8 [rmi: vex.l0.66.0f3a.w1 31 /r ib ] ND,SM0-1,ZU,AVX512BW,FUTURE */ + /* 270(003 201) 001(31) 110 022 : SM0,SM1,NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KSHR, 3, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54771, 513, 4642}, + /* 7 : KSHR kreg64,kreg64,imm8 [rmi: evex.l0.66.0f3a.w1 31 /r ib ] ND,SM0-1,ZU,AVX512BW,FUTURE,APX */ + /* 250(f3 fd 08) 300 001(31) 110 022 : SM0,SM1,ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KSHR, 3, {OPMASKREG|BITS64,OPMASKREG|BITS64,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18123, 514, 4642}, +}; + +static const struct itemplate instrux_SHRB[2] = { + /* 0 : SHRB kreg8,kreg8,imm8 [rmi: vex.l0.66.0f3a.w0 30 /r ib ] ND,ZU,AVX512DQ,FUTURE */ + /* 270(003 001) 001(30) 110 022 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_SHRB, 3, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54747, 499, 4643}, + /* 1 : SHRB kreg8,kreg8,imm8 [rmi: evex.l0.66.0f3a.w0 30 /r ib ] ND,ZU,AVX512DQ,FUTURE,APX */ + /* 250(f3 7d 08) 300 001(30) 110 022 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_SHRB, 3, {OPMASKREG|BITS8,OPMASKREG|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18093, 500, 4643}, +}; + +static const struct itemplate instrux_SHRW[2] = { + /* 0 : SHRW kreg16,kreg16,imm8 [rmi: vex.l0.66.0f3a.w1 30 /r ib ] ND,ZU,AVX512F,FUTURE */ + /* 270(003 201) 001(30) 110 022 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_SHRW, 3, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54755, 501, 4644}, + /* 1 : SHRW kreg16,kreg16,imm8 [rmi: evex.l0.66.0f3a.w1 30 /r ib ] ND,ZU,AVX512F,FUTURE,APX */ + /* 250(f3 fd 08) 300 001(30) 110 022 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_SHRW, 3, {OPMASKREG|BITS16,OPMASKREG|BITS16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18103, 502, 4644}, +}; + +static const struct itemplate instrux_SHRQ[2] = { + /* 0 : SHRQ kreg64,kreg64,imm8 [rmi: vex.l0.66.0f3a.w1 31 /r ib ] ND,ZU,AVX512BW,FUTURE */ + /* 270(003 201) 001(31) 110 022 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_SHRQ, 3, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54771, 503, 4646}, + /* 1 : SHRQ kreg64,kreg64,imm8 [rmi: evex.l0.66.0f3a.w1 31 /r ib ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 250(f3 fd 08) 300 001(31) 110 022 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_SHRQ, 3, {OPMASKREG|BITS64,OPMASKREG|BITS64,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18123, 504, 4646}, +}; + +static const struct itemplate instrux_KTESTB[2] = { + /* 0 : KTESTB kreg8,kreg8 [rm: vex.l0.0f.ko8 99 /r ] ZU,FL,AVX512DQ,FUTURE */ + /* 270(001 001) 001(99) 110 : NOAPX,ZU,FL,VEX,AVX512DQ,FUTURE */ + {I_KTESTB, 2, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65701, 537, 4651}, + /* 1 : KTESTB kreg8,kreg8 [rm: evex.l0.0f.ko8 99 /r ] ZU,FL,AVX512DQ,FUTURE,APX */ + /* 250(f1 7d 08) 300 001(99) 110 : ZU,LONG,FL,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KTESTB, 2, {OPMASKREG|BITS8,OPMASKREG|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+30154, 538, 4651}, +}; + +static const struct itemplate instrux_KTESTW[2] = { + /* 0 : KTESTW kreg16,kreg16 [rm: vex.l0.0f.ko16 99 /r ] ZU,FL,AVX512DQ,FUTURE */ + /* 270(001 000) 001(99) 110 : NOAPX,ZU,FL,VEX,AVX512DQ,FUTURE */ + {I_KTESTW, 2, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65708, 537, 4652}, + /* 1 : KTESTW kreg16,kreg16 [rm: evex.l0.0f.ko16 99 /r ] ZU,FL,AVX512DQ,FUTURE,APX */ + /* 250(f1 7c 08) 300 001(99) 110 : ZU,LONG,FL,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KTESTW, 2, {OPMASKREG|BITS16,OPMASKREG|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+30163, 538, 4652}, +}; + +static const struct itemplate instrux_KTESTD[2] = { + /* 0 : KTESTD kreg32,kreg32 [rm: vex.l0.0f.ko32 99 /r ] ZU,FL,AVX512BW,FUTURE */ + /* 270(001 201) 001(99) 110 : NOAPX,ZU,FL,VEX,AVX512BW,FUTURE */ + {I_KTESTD, 2, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65715, 541, 4653}, + /* 1 : KTESTD kreg32,kreg32 [rm: evex.l0.0f.ko32 99 /r ] ZU,FL,AVX512BW,FUTURE,APX */ + /* 250(f1 fd 08) 300 001(99) 110 : ZU,LONG,FL,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KTESTD, 2, {OPMASKREG|BITS32,OPMASKREG|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+30172, 542, 4653}, +}; + +static const struct itemplate instrux_KTESTQ[2] = { + /* 0 : KTESTQ kreg64,kreg64 [rm: vex.l0.0f.ko64 99 /r ] ZU,FL,AVX512BW,FUTURE */ + /* 270(001 200) 001(99) 110 : NOAPX,ZU,FL,VEX,AVX512BW,FUTURE */ + {I_KTESTQ, 2, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65722, 541, 4654}, + /* 1 : KTESTQ kreg64,kreg64 [rm: evex.l0.0f.ko64 99 /r ] ZU,FL,AVX512BW,FUTURE,APX */ + /* 250(f1 fc 08) 300 001(99) 110 : ZU,LONG,FL,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KTESTQ, 2, {OPMASKREG|BITS64,OPMASKREG|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+30181, 542, 4654}, +}; + +static const struct itemplate instrux_KTEST[8] = { + /* 0 : KTEST kreg8,kreg8 [rm: vex.l0.0f.ko8 99 /r ] SM0,ND,SM1,ZU,FL,AVX512DQ,FUTURE */ + /* 270(001 001) 001(99) 110 : SM0,SM1,NOAPX,ZU,FL,VEX,AVX512DQ,FUTURE */ + {I_KTEST, 2, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65701, 517, 4655}, + /* 1 : KTEST kreg8,kreg8 [rm: evex.l0.0f.ko8 99 /r ] SM0,ND,SM1,ZU,FL,AVX512DQ,FUTURE,APX */ + /* 250(f1 7d 08) 300 001(99) 110 : SM0,SM1,ZU,LONG,FL,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KTEST, 2, {OPMASKREG|BITS8,OPMASKREG|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+30154, 518, 4655}, + /* 2 : KTEST kreg16,kreg16 [rm: vex.l0.0f.ko16 99 /r ] ND,SM0-1,ZU,FL,AVX512DQ,FUTURE */ + /* 270(001 000) 001(99) 110 : SM0,SM1,NOAPX,ZU,FL,VEX,AVX512DQ,FUTURE */ + {I_KTEST, 2, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65708, 517, 4656}, + /* 3 : KTEST kreg16,kreg16 [rm: evex.l0.0f.ko16 99 /r ] ND,SM0-1,ZU,FL,AVX512DQ,FUTURE,APX */ + /* 250(f1 7c 08) 300 001(99) 110 : SM0,SM1,ZU,LONG,FL,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KTEST, 2, {OPMASKREG|BITS16,OPMASKREG|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+30163, 518, 4656}, + /* 4 : KTEST kreg32,kreg32 [rm: vex.l0.0f.ko32 99 /r ] ND,SM0-1,ZU,FL,AVX512BW,FUTURE */ + /* 270(001 201) 001(99) 110 : SM0,SM1,NOAPX,ZU,FL,VEX,AVX512BW,FUTURE */ + {I_KTEST, 2, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65715, 521, 4657}, + /* 5 : KTEST kreg32,kreg32 [rm: evex.l0.0f.ko32 99 /r ] ND,SM0-1,ZU,FL,AVX512BW,FUTURE,APX */ + /* 250(f1 fd 08) 300 001(99) 110 : SM0,SM1,ZU,LONG,FL,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KTEST, 2, {OPMASKREG|BITS32,OPMASKREG|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+30172, 522, 4657}, + /* 6 : KTEST kreg64,kreg64 [rm: vex.l0.0f.ko64 99 /r ] ND,SM0-1,ZU,FL,AVX512BW,FUTURE */ + /* 270(001 200) 001(99) 110 : SM0,SM1,NOAPX,ZU,FL,VEX,AVX512BW,FUTURE */ + {I_KTEST, 2, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65722, 521, 4658}, + /* 7 : KTEST kreg64,kreg64 [rm: evex.l0.0f.ko64 99 /r ] ND,SM0-1,ZU,FL,AVX512BW,FUTURE,APX */ + /* 250(f1 fc 08) 300 001(99) 110 : SM0,SM1,ZU,LONG,FL,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KTEST, 2, {OPMASKREG|BITS64,OPMASKREG|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+30181, 522, 4658}, +}; + +static const struct itemplate instrux_TESTB[2] = { + /* 0 : TESTB kreg8,kreg8 [rm: vex.l0.0f.ko8 99 /r ] ND,ZU,FL,AVX512DQ,FUTURE */ + /* 270(001 001) 001(99) 110 : NOAPX,ZU,FL,VEX,AVX512DQ,FUTURE */ + {I_TESTB, 2, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65701, 537, 4659}, + /* 1 : TESTB kreg8,kreg8 [rm: evex.l0.0f.ko8 99 /r ] ND,ZU,FL,AVX512DQ,FUTURE,APX */ + /* 250(f1 7d 08) 300 001(99) 110 : ZU,LONG,FL,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_TESTB, 2, {OPMASKREG|BITS8,OPMASKREG|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+30154, 538, 4659}, +}; + +static const struct itemplate instrux_TESTW[2] = { + /* 0 : TESTW kreg16,kreg16 [rm: vex.l0.0f.ko16 99 /r ] ND,ZU,FL,AVX512DQ,FUTURE */ + /* 270(001 000) 001(99) 110 : NOAPX,ZU,FL,VEX,AVX512DQ,FUTURE */ + {I_TESTW, 2, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65708, 537, 4660}, + /* 1 : TESTW kreg16,kreg16 [rm: evex.l0.0f.ko16 99 /r ] ND,ZU,FL,AVX512DQ,FUTURE,APX */ + /* 250(f1 7c 08) 300 001(99) 110 : ZU,LONG,FL,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_TESTW, 2, {OPMASKREG|BITS16,OPMASKREG|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+30163, 538, 4660}, +}; + +static const struct itemplate instrux_TESTD[2] = { + /* 0 : TESTD kreg32,kreg32 [rm: vex.l0.0f.ko32 99 /r ] ND,ZU,FL,AVX512BW,FUTURE */ + /* 270(001 201) 001(99) 110 : NOAPX,ZU,FL,VEX,AVX512BW,FUTURE */ + {I_TESTD, 2, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65715, 541, 4661}, + /* 1 : TESTD kreg32,kreg32 [rm: evex.l0.0f.ko32 99 /r ] ND,ZU,FL,AVX512BW,FUTURE,APX */ + /* 250(f1 fd 08) 300 001(99) 110 : ZU,LONG,FL,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_TESTD, 2, {OPMASKREG|BITS32,OPMASKREG|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+30172, 542, 4661}, +}; + +static const struct itemplate instrux_TESTQ[2] = { + /* 0 : TESTQ kreg64,kreg64 [rm: vex.l0.0f.ko64 99 /r ] ND,ZU,FL,AVX512BW,FUTURE */ + /* 270(001 200) 001(99) 110 : NOAPX,ZU,FL,VEX,AVX512BW,FUTURE */ + {I_TESTQ, 2, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65722, 541, 4662}, + /* 1 : TESTQ kreg64,kreg64 [rm: evex.l0.0f.ko64 99 /r ] ND,ZU,FL,AVX512BW,FUTURE,APX */ + /* 250(f1 fc 08) 300 001(99) 110 : ZU,LONG,FL,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_TESTQ, 2, {OPMASKREG|BITS64,OPMASKREG|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+30181, 542, 4662}, +}; + +static const struct itemplate instrux_KUNPCKBW[4] = { + /* 0 : KUNPCKBW kreg16,kreg8*,kreg8 [rvm: vex.nds.l1.66.0f.w0 4b /r ] ZU,AVX512F,FUTURE */ + /* 261(001 005) 001(4b) 120 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_KUNPCKBW, 3, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65729, 501, 4667}, + /* 1 : KUNPCKBW kreg16,kreg8*,kreg8 [rvm: evex.nds.l1.66.0f.w0 4b /r ] ZU,AVX512F,FUTURE,APX */ + /* 241(f1 7d 28) 300 001(4b) 120 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_KUNPCKBW, 3, {OPMASKREG|BITS16,OPMASKREG|BITS8,OPMASKREG|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+30190, 502, 4667}, + /* 2 : KUNPCKBW kreg16,kreg8 [r+vm: vex.nds.l1.66.0f.w0 4b /r ] ND,ZU,AVX512F,FUTURE */ + /* 260(001 005) 001(4b) 110 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_KUNPCKBW, 2, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65736, 501, 4667}, + /* 3 : KUNPCKBW kreg16,kreg8 [r+vm: evex.nds.l1.66.0f.w0 4b /r ] ND,ZU,AVX512F,FUTURE,APX */ + /* 240(f1 7d 28) 300 001(4b) 110 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_KUNPCKBW, 2, {OPMASKREG|BITS16,OPMASKREG|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+30199, 502, 4667}, +}; + +static const struct itemplate instrux_KUNPCKW[4] = { + /* 0 : KUNPCKW kreg16,kreg8*,kreg8 [rvm: vex.nds.l1.66.0f.w0 4b /r ] ND,ZU,AVX512F,FUTURE */ + /* 261(001 005) 001(4b) 120 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_KUNPCKW, 3, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65729, 501, 4668}, + /* 1 : KUNPCKW kreg16,kreg8*,kreg8 [rvm: evex.nds.l1.66.0f.w0 4b /r ] ND,ZU,AVX512F,FUTURE,APX */ + /* 241(f1 7d 28) 300 001(4b) 120 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_KUNPCKW, 3, {OPMASKREG|BITS16,OPMASKREG|BITS8,OPMASKREG|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+30190, 502, 4668}, + /* 2 : KUNPCKW kreg16,kreg8 [r+vm: vex.nds.l1.66.0f.w0 4b /r ] ND,ZU,AVX512F,FUTURE */ + /* 260(001 005) 001(4b) 110 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_KUNPCKW, 2, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65736, 501, 4668}, + /* 3 : KUNPCKW kreg16,kreg8 [r+vm: evex.nds.l1.66.0f.w0 4b /r ] ND,ZU,AVX512F,FUTURE,APX */ + /* 240(f1 7d 28) 300 001(4b) 110 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_KUNPCKW, 2, {OPMASKREG|BITS16,OPMASKREG|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+30199, 502, 4668}, +}; + +static const struct itemplate instrux_KUNPCK[12] = { + /* 0 : KUNPCK kreg16,kreg8*,kreg8 [rvm: vex.nds.l1.66.0f.w0 4b /r ] ND,ZU,AVX512F,FUTURE */ + /* 261(001 005) 001(4b) 120 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_KUNPCK, 3, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65729, 501, 4669}, + /* 1 : KUNPCK kreg16,kreg8*,kreg8 [rvm: evex.nds.l1.66.0f.w0 4b /r ] ND,ZU,AVX512F,FUTURE,APX */ + /* 241(f1 7d 28) 300 001(4b) 120 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_KUNPCK, 3, {OPMASKREG|BITS16,OPMASKREG|BITS8,OPMASKREG|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+30190, 502, 4669}, + /* 2 : KUNPCK kreg16,kreg8 [r+vm: vex.nds.l1.66.0f.w0 4b /r ] ND,ZU,AVX512F,FUTURE */ + /* 260(001 005) 001(4b) 110 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_KUNPCK, 2, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65736, 501, 4669}, + /* 3 : KUNPCK kreg16,kreg8 [r+vm: evex.nds.l1.66.0f.w0 4b /r ] ND,ZU,AVX512F,FUTURE,APX */ + /* 240(f1 7d 28) 300 001(4b) 110 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_KUNPCK, 2, {OPMASKREG|BITS16,OPMASKREG|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+30199, 502, 4669}, + /* 4 : KUNPCK kreg32,kreg16*,kreg16 [rvm: vex.nds.l1.0f.w0 4b /r ] ND,ZU,AVX512BW,FUTURE */ + /* 261(001 004) 001(4b) 120 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KUNPCK, 3, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65743, 503, 4675}, + /* 5 : KUNPCK kreg32,kreg16*,kreg16 [rvm: evex.nds.l1.0f.w0 4b /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 241(f1 7c 28) 300 001(4b) 120 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KUNPCK, 3, {OPMASKREG|BITS32,OPMASKREG|BITS16,OPMASKREG|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+30208, 504, 4675}, + /* 6 : KUNPCK kreg32,kreg16 [r+vm: vex.nds.l1.0f.w0 4b /r ] ND,ZU,AVX512BW,FUTURE */ + /* 260(001 004) 001(4b) 110 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KUNPCK, 2, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65750, 503, 4675}, + /* 7 : KUNPCK kreg32,kreg16 [r+vm: evex.nds.l1.0f.w0 4b /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 240(f1 7c 28) 300 001(4b) 110 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KUNPCK, 2, {OPMASKREG|BITS32,OPMASKREG|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+30217, 504, 4675}, + /* 8 : KUNPCK kreg64,kreg32*,kreg32 [rvm: vex.nds.l1.0f.w1 4b /r ] ND,ZU,AVX512BW,FUTURE */ + /* 261(001 204) 001(4b) 120 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KUNPCK, 3, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65757, 503, 4681}, + /* 9 : KUNPCK kreg64,kreg32*,kreg32 [rvm: evex.nds.l1.0f.w1 4b /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 241(f1 fc 28) 300 001(4b) 120 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KUNPCK, 3, {OPMASKREG|BITS64,OPMASKREG|BITS32,OPMASKREG|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+30226, 504, 4681}, + /* 10 : KUNPCK kreg64,kreg32 [r+vm: vex.nds.l1.0f.w1 4b /r ] ND,ZU,AVX512BW,FUTURE */ + /* 260(001 204) 001(4b) 110 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KUNPCK, 2, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65764, 503, 4681}, + /* 11 : KUNPCK kreg64,kreg32 [r+vm: evex.nds.l1.0f.w1 4b /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 240(f1 fc 28) 300 001(4b) 110 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KUNPCK, 2, {OPMASKREG|BITS64,OPMASKREG|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+30235, 504, 4681}, +}; + +static const struct itemplate instrux_UNPCKBW[4] = { + /* 0 : UNPCKBW kreg16,kreg8*,kreg8 [rvm: vex.nds.l1.66.0f.w0 4b /r ] ND,ZU,AVX512F,FUTURE */ + /* 261(001 005) 001(4b) 120 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_UNPCKBW, 3, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65729, 501, 4670}, + /* 1 : UNPCKBW kreg16,kreg8*,kreg8 [rvm: evex.nds.l1.66.0f.w0 4b /r ] ND,ZU,AVX512F,FUTURE,APX */ + /* 241(f1 7d 28) 300 001(4b) 120 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_UNPCKBW, 3, {OPMASKREG|BITS16,OPMASKREG|BITS8,OPMASKREG|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+30190, 502, 4670}, + /* 2 : UNPCKBW kreg16,kreg8 [r+vm: vex.nds.l1.66.0f.w0 4b /r ] ND,ZU,AVX512F,FUTURE */ + /* 260(001 005) 001(4b) 110 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_UNPCKBW, 2, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65736, 501, 4670}, + /* 3 : UNPCKBW kreg16,kreg8 [r+vm: evex.nds.l1.66.0f.w0 4b /r ] ND,ZU,AVX512F,FUTURE,APX */ + /* 240(f1 7d 28) 300 001(4b) 110 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_UNPCKBW, 2, {OPMASKREG|BITS16,OPMASKREG|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+30199, 502, 4670}, +}; + +static const struct itemplate instrux_UNPCKW[4] = { + /* 0 : UNPCKW kreg16,kreg8*,kreg8 [rvm: vex.nds.l1.66.0f.w0 4b /r ] ND,ZU,AVX512F,FUTURE */ + /* 261(001 005) 001(4b) 120 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_UNPCKW, 3, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65729, 501, 4671}, + /* 1 : UNPCKW kreg16,kreg8*,kreg8 [rvm: evex.nds.l1.66.0f.w0 4b /r ] ND,ZU,AVX512F,FUTURE,APX */ + /* 241(f1 7d 28) 300 001(4b) 120 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_UNPCKW, 3, {OPMASKREG|BITS16,OPMASKREG|BITS8,OPMASKREG|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+30190, 502, 4671}, + /* 2 : UNPCKW kreg16,kreg8 [r+vm: vex.nds.l1.66.0f.w0 4b /r ] ND,ZU,AVX512F,FUTURE */ + /* 260(001 005) 001(4b) 110 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_UNPCKW, 2, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65736, 501, 4671}, + /* 3 : UNPCKW kreg16,kreg8 [r+vm: evex.nds.l1.66.0f.w0 4b /r ] ND,ZU,AVX512F,FUTURE,APX */ + /* 240(f1 7d 28) 300 001(4b) 110 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_UNPCKW, 2, {OPMASKREG|BITS16,OPMASKREG|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+30199, 502, 4671}, +}; + +static const struct itemplate instrux_UNPCK[12] = { + /* 0 : UNPCK kreg16,kreg8*,kreg8 [rvm: vex.nds.l1.66.0f.w0 4b /r ] ND,ZU,AVX512F,FUTURE */ + /* 261(001 005) 001(4b) 120 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_UNPCK, 3, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65729, 501, 4672}, + /* 1 : UNPCK kreg16,kreg8*,kreg8 [rvm: evex.nds.l1.66.0f.w0 4b /r ] ND,ZU,AVX512F,FUTURE,APX */ + /* 241(f1 7d 28) 300 001(4b) 120 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_UNPCK, 3, {OPMASKREG|BITS16,OPMASKREG|BITS8,OPMASKREG|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+30190, 502, 4672}, + /* 2 : UNPCK kreg16,kreg8 [r+vm: vex.nds.l1.66.0f.w0 4b /r ] ND,ZU,AVX512F,FUTURE */ + /* 260(001 005) 001(4b) 110 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_UNPCK, 2, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65736, 501, 4672}, + /* 3 : UNPCK kreg16,kreg8 [r+vm: evex.nds.l1.66.0f.w0 4b /r ] ND,ZU,AVX512F,FUTURE,APX */ + /* 240(f1 7d 28) 300 001(4b) 110 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_UNPCK, 2, {OPMASKREG|BITS16,OPMASKREG|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+30199, 502, 4672}, + /* 4 : UNPCK kreg32,kreg16*,kreg16 [rvm: vex.nds.l1.0f.w0 4b /r ] ND,ZU,AVX512BW,FUTURE */ + /* 261(001 004) 001(4b) 120 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_UNPCK, 3, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65743, 503, 4678}, + /* 5 : UNPCK kreg32,kreg16*,kreg16 [rvm: evex.nds.l1.0f.w0 4b /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 241(f1 7c 28) 300 001(4b) 120 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_UNPCK, 3, {OPMASKREG|BITS32,OPMASKREG|BITS16,OPMASKREG|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+30208, 504, 4678}, + /* 6 : UNPCK kreg32,kreg16 [r+vm: vex.nds.l1.0f.w0 4b /r ] ND,ZU,AVX512BW,FUTURE */ + /* 260(001 004) 001(4b) 110 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_UNPCK, 2, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65750, 503, 4678}, + /* 7 : UNPCK kreg32,kreg16 [r+vm: evex.nds.l1.0f.w0 4b /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 240(f1 7c 28) 300 001(4b) 110 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_UNPCK, 2, {OPMASKREG|BITS32,OPMASKREG|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+30217, 504, 4678}, + /* 8 : UNPCK kreg64,kreg32*,kreg32 [rvm: vex.nds.l1.0f.w1 4b /r ] ND,ZU,AVX512BW,FUTURE */ + /* 261(001 204) 001(4b) 120 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_UNPCK, 3, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65757, 503, 4684}, + /* 9 : UNPCK kreg64,kreg32*,kreg32 [rvm: evex.nds.l1.0f.w1 4b /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 241(f1 fc 28) 300 001(4b) 120 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_UNPCK, 3, {OPMASKREG|BITS64,OPMASKREG|BITS32,OPMASKREG|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+30226, 504, 4684}, + /* 10 : UNPCK kreg64,kreg32 [r+vm: vex.nds.l1.0f.w1 4b /r ] ND,ZU,AVX512BW,FUTURE */ + /* 260(001 204) 001(4b) 110 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_UNPCK, 2, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65764, 503, 4684}, + /* 11 : UNPCK kreg64,kreg32 [r+vm: evex.nds.l1.0f.w1 4b /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 240(f1 fc 28) 300 001(4b) 110 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_UNPCK, 2, {OPMASKREG|BITS64,OPMASKREG|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+30235, 504, 4684}, +}; + +static const struct itemplate instrux_KUNPCKWD[4] = { + /* 0 : KUNPCKWD kreg32,kreg16*,kreg16 [rvm: vex.nds.l1.0f.w0 4b /r ] ZU,AVX512BW,FUTURE */ + /* 261(001 004) 001(4b) 120 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KUNPCKWD, 3, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65743, 503, 4673}, + /* 1 : KUNPCKWD kreg32,kreg16*,kreg16 [rvm: evex.nds.l1.0f.w0 4b /r ] ZU,AVX512BW,FUTURE,APX */ + /* 241(f1 7c 28) 300 001(4b) 120 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KUNPCKWD, 3, {OPMASKREG|BITS32,OPMASKREG|BITS16,OPMASKREG|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+30208, 504, 4673}, + /* 2 : KUNPCKWD kreg32,kreg16 [r+vm: vex.nds.l1.0f.w0 4b /r ] ND,ZU,AVX512BW,FUTURE */ + /* 260(001 004) 001(4b) 110 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KUNPCKWD, 2, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65750, 503, 4673}, + /* 3 : KUNPCKWD kreg32,kreg16 [r+vm: evex.nds.l1.0f.w0 4b /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 240(f1 7c 28) 300 001(4b) 110 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KUNPCKWD, 2, {OPMASKREG|BITS32,OPMASKREG|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+30217, 504, 4673}, +}; + +static const struct itemplate instrux_KUNPCKD[4] = { + /* 0 : KUNPCKD kreg32,kreg16*,kreg16 [rvm: vex.nds.l1.0f.w0 4b /r ] ND,ZU,AVX512BW,FUTURE */ + /* 261(001 004) 001(4b) 120 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KUNPCKD, 3, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65743, 503, 4674}, + /* 1 : KUNPCKD kreg32,kreg16*,kreg16 [rvm: evex.nds.l1.0f.w0 4b /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 241(f1 7c 28) 300 001(4b) 120 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KUNPCKD, 3, {OPMASKREG|BITS32,OPMASKREG|BITS16,OPMASKREG|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+30208, 504, 4674}, + /* 2 : KUNPCKD kreg32,kreg16 [r+vm: vex.nds.l1.0f.w0 4b /r ] ND,ZU,AVX512BW,FUTURE */ + /* 260(001 004) 001(4b) 110 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KUNPCKD, 2, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65750, 503, 4674}, + /* 3 : KUNPCKD kreg32,kreg16 [r+vm: evex.nds.l1.0f.w0 4b /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 240(f1 7c 28) 300 001(4b) 110 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KUNPCKD, 2, {OPMASKREG|BITS32,OPMASKREG|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+30217, 504, 4674}, +}; + +static const struct itemplate instrux_UNPCKWD[4] = { + /* 0 : UNPCKWD kreg32,kreg16*,kreg16 [rvm: vex.nds.l1.0f.w0 4b /r ] ND,ZU,AVX512BW,FUTURE */ + /* 261(001 004) 001(4b) 120 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_UNPCKWD, 3, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65743, 503, 4676}, + /* 1 : UNPCKWD kreg32,kreg16*,kreg16 [rvm: evex.nds.l1.0f.w0 4b /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 241(f1 7c 28) 300 001(4b) 120 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_UNPCKWD, 3, {OPMASKREG|BITS32,OPMASKREG|BITS16,OPMASKREG|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+30208, 504, 4676}, + /* 2 : UNPCKWD kreg32,kreg16 [r+vm: vex.nds.l1.0f.w0 4b /r ] ND,ZU,AVX512BW,FUTURE */ + /* 260(001 004) 001(4b) 110 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_UNPCKWD, 2, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65750, 503, 4676}, + /* 3 : UNPCKWD kreg32,kreg16 [r+vm: evex.nds.l1.0f.w0 4b /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 240(f1 7c 28) 300 001(4b) 110 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_UNPCKWD, 2, {OPMASKREG|BITS32,OPMASKREG|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+30217, 504, 4676}, +}; + +static const struct itemplate instrux_UNPCKD[4] = { + /* 0 : UNPCKD kreg32,kreg16*,kreg16 [rvm: vex.nds.l1.0f.w0 4b /r ] ND,ZU,AVX512BW,FUTURE */ + /* 261(001 004) 001(4b) 120 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_UNPCKD, 3, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65743, 503, 4677}, + /* 1 : UNPCKD kreg32,kreg16*,kreg16 [rvm: evex.nds.l1.0f.w0 4b /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 241(f1 7c 28) 300 001(4b) 120 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_UNPCKD, 3, {OPMASKREG|BITS32,OPMASKREG|BITS16,OPMASKREG|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+30208, 504, 4677}, + /* 2 : UNPCKD kreg32,kreg16 [r+vm: vex.nds.l1.0f.w0 4b /r ] ND,ZU,AVX512BW,FUTURE */ + /* 260(001 004) 001(4b) 110 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_UNPCKD, 2, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65750, 503, 4677}, + /* 3 : UNPCKD kreg32,kreg16 [r+vm: evex.nds.l1.0f.w0 4b /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 240(f1 7c 28) 300 001(4b) 110 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_UNPCKD, 2, {OPMASKREG|BITS32,OPMASKREG|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+30217, 504, 4677}, +}; + +static const struct itemplate instrux_KUNPCKDQ[4] = { + /* 0 : KUNPCKDQ kreg64,kreg32*,kreg32 [rvm: vex.nds.l1.0f.w1 4b /r ] ZU,AVX512BW,FUTURE */ + /* 261(001 204) 001(4b) 120 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KUNPCKDQ, 3, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65757, 503, 4679}, + /* 1 : KUNPCKDQ kreg64,kreg32*,kreg32 [rvm: evex.nds.l1.0f.w1 4b /r ] ZU,AVX512BW,FUTURE,APX */ + /* 241(f1 fc 28) 300 001(4b) 120 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KUNPCKDQ, 3, {OPMASKREG|BITS64,OPMASKREG|BITS32,OPMASKREG|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+30226, 504, 4679}, + /* 2 : KUNPCKDQ kreg64,kreg32 [r+vm: vex.nds.l1.0f.w1 4b /r ] ND,ZU,AVX512BW,FUTURE */ + /* 260(001 204) 001(4b) 110 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KUNPCKDQ, 2, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65764, 503, 4679}, + /* 3 : KUNPCKDQ kreg64,kreg32 [r+vm: evex.nds.l1.0f.w1 4b /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 240(f1 fc 28) 300 001(4b) 110 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KUNPCKDQ, 2, {OPMASKREG|BITS64,OPMASKREG|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+30235, 504, 4679}, +}; + +static const struct itemplate instrux_KUNPCKQ[4] = { + /* 0 : KUNPCKQ kreg64,kreg32*,kreg32 [rvm: vex.nds.l1.0f.w1 4b /r ] ND,ZU,AVX512BW,FUTURE */ + /* 261(001 204) 001(4b) 120 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KUNPCKQ, 3, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65757, 503, 4680}, + /* 1 : KUNPCKQ kreg64,kreg32*,kreg32 [rvm: evex.nds.l1.0f.w1 4b /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 241(f1 fc 28) 300 001(4b) 120 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KUNPCKQ, 3, {OPMASKREG|BITS64,OPMASKREG|BITS32,OPMASKREG|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+30226, 504, 4680}, + /* 2 : KUNPCKQ kreg64,kreg32 [r+vm: vex.nds.l1.0f.w1 4b /r ] ND,ZU,AVX512BW,FUTURE */ + /* 260(001 204) 001(4b) 110 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KUNPCKQ, 2, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65764, 503, 4680}, + /* 3 : KUNPCKQ kreg64,kreg32 [r+vm: evex.nds.l1.0f.w1 4b /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 240(f1 fc 28) 300 001(4b) 110 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KUNPCKQ, 2, {OPMASKREG|BITS64,OPMASKREG|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+30235, 504, 4680}, +}; + +static const struct itemplate instrux_UNPCKDQ[4] = { + /* 0 : UNPCKDQ kreg64,kreg32*,kreg32 [rvm: vex.nds.l1.0f.w1 4b /r ] ND,ZU,AVX512BW,FUTURE */ + /* 261(001 204) 001(4b) 120 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_UNPCKDQ, 3, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65757, 503, 4682}, + /* 1 : UNPCKDQ kreg64,kreg32*,kreg32 [rvm: evex.nds.l1.0f.w1 4b /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 241(f1 fc 28) 300 001(4b) 120 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_UNPCKDQ, 3, {OPMASKREG|BITS64,OPMASKREG|BITS32,OPMASKREG|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+30226, 504, 4682}, + /* 2 : UNPCKDQ kreg64,kreg32 [r+vm: vex.nds.l1.0f.w1 4b /r ] ND,ZU,AVX512BW,FUTURE */ + /* 260(001 204) 001(4b) 110 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_UNPCKDQ, 2, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65764, 503, 4682}, + /* 3 : UNPCKDQ kreg64,kreg32 [r+vm: evex.nds.l1.0f.w1 4b /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 240(f1 fc 28) 300 001(4b) 110 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_UNPCKDQ, 2, {OPMASKREG|BITS64,OPMASKREG|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+30235, 504, 4682}, +}; + +static const struct itemplate instrux_UNPCKQ[4] = { + /* 0 : UNPCKQ kreg64,kreg32*,kreg32 [rvm: vex.nds.l1.0f.w1 4b /r ] ND,ZU,AVX512BW,FUTURE */ + /* 261(001 204) 001(4b) 120 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_UNPCKQ, 3, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65757, 503, 4683}, + /* 1 : UNPCKQ kreg64,kreg32*,kreg32 [rvm: evex.nds.l1.0f.w1 4b /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 241(f1 fc 28) 300 001(4b) 120 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_UNPCKQ, 3, {OPMASKREG|BITS64,OPMASKREG|BITS32,OPMASKREG|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+30226, 504, 4683}, + /* 2 : UNPCKQ kreg64,kreg32 [r+vm: vex.nds.l1.0f.w1 4b /r ] ND,ZU,AVX512BW,FUTURE */ + /* 260(001 204) 001(4b) 110 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_UNPCKQ, 2, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65764, 503, 4683}, + /* 3 : UNPCKQ kreg64,kreg32 [r+vm: evex.nds.l1.0f.w1 4b /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 240(f1 fc 28) 300 001(4b) 110 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_UNPCKQ, 2, {OPMASKREG|BITS64,OPMASKREG|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+30235, 504, 4683}, +}; + +static const struct itemplate instrux_KXNORB[4] = { + /* 0 : KXNORB kreg8,kreg8*,kreg8 [rvm: vex.nds.l1.0f.ko8 46 /r ] ZU,AVX512DQ,FUTURE */ + /* 261(001 005) 001(46) 120 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_KXNORB, 3, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65771, 499, 4685}, + /* 1 : KXNORB kreg8,kreg8*,kreg8 [rvm: evex.nds.l1.0f.ko8 46 /r ] ZU,AVX512DQ,FUTURE,APX */ + /* 241(f1 7d 28) 300 001(46) 120 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KXNORB, 3, {OPMASKREG|BITS8,OPMASKREG|BITS8,OPMASKREG|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+30244, 500, 4685}, + /* 2 : KXNORB kreg8,kreg8 [r+vm: vex.nds.l1.0f.ko8 46 /r ] ND,ZU,AVX512DQ,FUTURE */ + /* 260(001 005) 001(46) 110 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_KXNORB, 2, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65778, 499, 4685}, + /* 3 : KXNORB kreg8,kreg8 [r+vm: evex.nds.l1.0f.ko8 46 /r ] ND,ZU,AVX512DQ,FUTURE,APX */ + /* 240(f1 7d 28) 300 001(46) 110 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KXNORB, 2, {OPMASKREG|BITS8,OPMASKREG|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+30253, 500, 4685}, +}; + +static const struct itemplate instrux_KXNORW[4] = { + /* 0 : KXNORW kreg16,kreg16*,kreg16 [rvm: vex.nds.l1.0f.ko16 46 /r ] ZU,AVX512F,FUTURE */ + /* 261(001 004) 001(46) 120 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_KXNORW, 3, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65785, 501, 4686}, + /* 1 : KXNORW kreg16,kreg16*,kreg16 [rvm: evex.nds.l1.0f.ko16 46 /r ] ZU,AVX512F,FUTURE,APX */ + /* 241(f1 7c 28) 300 001(46) 120 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_KXNORW, 3, {OPMASKREG|BITS16,OPMASKREG|BITS16,OPMASKREG|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+30262, 502, 4686}, + /* 2 : KXNORW kreg16,kreg16 [r+vm: vex.nds.l1.0f.ko16 46 /r ] ND,ZU,AVX512F,FUTURE */ + /* 260(001 004) 001(46) 110 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_KXNORW, 2, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65792, 501, 4686}, + /* 3 : KXNORW kreg16,kreg16 [r+vm: evex.nds.l1.0f.ko16 46 /r ] ND,ZU,AVX512F,FUTURE,APX */ + /* 240(f1 7c 28) 300 001(46) 110 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_KXNORW, 2, {OPMASKREG|BITS16,OPMASKREG|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+30271, 502, 4686}, +}; + +static const struct itemplate instrux_KXNORD[4] = { + /* 0 : KXNORD kreg32,kreg32*,kreg32 [rvm: vex.nds.l1.0f.ko32 46 /r ] ZU,AVX512BW,FUTURE */ + /* 261(001 205) 001(46) 120 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KXNORD, 3, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65799, 503, 4687}, + /* 1 : KXNORD kreg32,kreg32*,kreg32 [rvm: evex.nds.l1.0f.ko32 46 /r ] ZU,AVX512BW,FUTURE,APX */ + /* 241(f1 fd 28) 300 001(46) 120 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KXNORD, 3, {OPMASKREG|BITS32,OPMASKREG|BITS32,OPMASKREG|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+30280, 504, 4687}, + /* 2 : KXNORD kreg32,kreg32 [r+vm: vex.nds.l1.0f.ko32 46 /r ] ND,ZU,AVX512BW,FUTURE */ + /* 260(001 205) 001(46) 110 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KXNORD, 2, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65806, 503, 4687}, + /* 3 : KXNORD kreg32,kreg32 [r+vm: evex.nds.l1.0f.ko32 46 /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 240(f1 fd 28) 300 001(46) 110 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KXNORD, 2, {OPMASKREG|BITS32,OPMASKREG|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+30289, 504, 4687}, +}; + +static const struct itemplate instrux_KXNORQ[4] = { + /* 0 : KXNORQ kreg64,kreg64*,kreg64 [rvm: vex.nds.l1.0f.ko64 46 /r ] ZU,AVX512BW,FUTURE */ + /* 261(001 204) 001(46) 120 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KXNORQ, 3, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65813, 503, 4688}, + /* 1 : KXNORQ kreg64,kreg64*,kreg64 [rvm: evex.nds.l1.0f.ko64 46 /r ] ZU,AVX512BW,FUTURE,APX */ + /* 241(f1 fc 28) 300 001(46) 120 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KXNORQ, 3, {OPMASKREG|BITS64,OPMASKREG|BITS64,OPMASKREG|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+30298, 504, 4688}, + /* 2 : KXNORQ kreg64,kreg64 [r+vm: vex.nds.l1.0f.ko64 46 /r ] ND,ZU,AVX512BW,FUTURE */ + /* 260(001 204) 001(46) 110 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KXNORQ, 2, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65820, 503, 4688}, + /* 3 : KXNORQ kreg64,kreg64 [r+vm: evex.nds.l1.0f.ko64 46 /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 240(f1 fc 28) 300 001(46) 110 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KXNORQ, 2, {OPMASKREG|BITS64,OPMASKREG|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+30307, 504, 4688}, +}; + +static const struct itemplate instrux_KXNOR[16] = { + /* 0 : KXNOR kreg8,kreg8*,kreg8 [rvm: vex.nds.l1.0f.ko8 46 /r ] SM0,ND,SM1,SM2,ZU,AVX512DQ,FUTURE */ + /* 261(001 005) 001(46) 120 : SM0,SM1,SM2,NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_KXNOR, 3, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65771, 507, 4689}, + /* 1 : KXNOR kreg8,kreg8*,kreg8 [rvm: evex.nds.l1.0f.ko8 46 /r ] SM0,ND,SM1,SM2,ZU,AVX512DQ,FUTURE,APX */ + /* 241(f1 7d 28) 300 001(46) 120 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KXNOR, 3, {OPMASKREG|BITS8,OPMASKREG|BITS8,OPMASKREG|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+30244, 508, 4689}, + /* 2 : KXNOR kreg8,kreg8 [r+vm: vex.nds.l1.0f.ko8 46 /r ] ND,SM0,SM1,ZU,AVX512DQ,FUTURE */ + /* 260(001 005) 001(46) 110 : SM0,SM1,NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_KXNOR, 2, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65778, 509, 4689}, + /* 3 : KXNOR kreg8,kreg8 [r+vm: evex.nds.l1.0f.ko8 46 /r ] ND,SM0,SM1,ZU,AVX512DQ,FUTURE,APX */ + /* 240(f1 7d 28) 300 001(46) 110 : SM0,SM1,ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KXNOR, 2, {OPMASKREG|BITS8,OPMASKREG|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+30253, 510, 4689}, + /* 4 : KXNOR kreg16,kreg16*,kreg16 [rvm: vex.nds.l1.0f.ko16 46 /r ] SM0,ND,SM1,SM2,ZU,AVX512F,FUTURE */ + /* 261(001 004) 001(46) 120 : SM0,SM1,SM2,NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_KXNOR, 3, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65785, 523, 4690}, + /* 5 : KXNOR kreg16,kreg16*,kreg16 [rvm: evex.nds.l1.0f.ko16 46 /r ] SM0,ND,SM1,SM2,ZU,AVX512F,FUTURE,APX */ + /* 241(f1 7c 28) 300 001(46) 120 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_KXNOR, 3, {OPMASKREG|BITS16,OPMASKREG|BITS16,OPMASKREG|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+30262, 524, 4690}, + /* 6 : KXNOR kreg16,kreg16 [r+vm: vex.nds.l1.0f.ko16 46 /r ] ND,SM0,SM1,ZU,AVX512F,FUTURE */ + /* 260(001 004) 001(46) 110 : SM0,SM1,NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_KXNOR, 2, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65792, 525, 4690}, + /* 7 : KXNOR kreg16,kreg16 [r+vm: evex.nds.l1.0f.ko16 46 /r ] ND,SM0,SM1,ZU,AVX512F,FUTURE,APX */ + /* 240(f1 7c 28) 300 001(46) 110 : SM0,SM1,ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_KXNOR, 2, {OPMASKREG|BITS16,OPMASKREG|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+30271, 526, 4690}, + /* 8 : KXNOR kreg32,kreg32*,kreg32 [rvm: vex.nds.l1.0f.ko32 46 /r ] SM0,ND,SM1,SM2,ZU,AVX512BW,FUTURE */ + /* 261(001 205) 001(46) 120 : SM0,SM1,SM2,NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KXNOR, 3, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65799, 511, 4691}, + /* 9 : KXNOR kreg32,kreg32*,kreg32 [rvm: evex.nds.l1.0f.ko32 46 /r ] SM0,ND,SM1,SM2,ZU,AVX512BW,FUTURE,APX */ + /* 241(f1 fd 28) 300 001(46) 120 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KXNOR, 3, {OPMASKREG|BITS32,OPMASKREG|BITS32,OPMASKREG|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+30280, 512, 4691}, + /* 10 : KXNOR kreg32,kreg32 [r+vm: vex.nds.l1.0f.ko32 46 /r ] ND,SM0,SM1,ZU,AVX512BW,FUTURE */ + /* 260(001 205) 001(46) 110 : SM0,SM1,NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KXNOR, 2, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65806, 513, 4691}, + /* 11 : KXNOR kreg32,kreg32 [r+vm: evex.nds.l1.0f.ko32 46 /r ] ND,SM0,SM1,ZU,AVX512BW,FUTURE,APX */ + /* 240(f1 fd 28) 300 001(46) 110 : SM0,SM1,ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KXNOR, 2, {OPMASKREG|BITS32,OPMASKREG|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+30289, 514, 4691}, + /* 12 : KXNOR kreg64,kreg64*,kreg64 [rvm: vex.nds.l1.0f.ko64 46 /r ] SM0,ND,SM1,SM2,ZU,AVX512BW,FUTURE */ + /* 261(001 204) 001(46) 120 : SM0,SM1,SM2,NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KXNOR, 3, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65813, 511, 4692}, + /* 13 : KXNOR kreg64,kreg64*,kreg64 [rvm: evex.nds.l1.0f.ko64 46 /r ] SM0,ND,SM1,SM2,ZU,AVX512BW,FUTURE,APX */ + /* 241(f1 fc 28) 300 001(46) 120 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KXNOR, 3, {OPMASKREG|BITS64,OPMASKREG|BITS64,OPMASKREG|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+30298, 512, 4692}, + /* 14 : KXNOR kreg64,kreg64 [r+vm: vex.nds.l1.0f.ko64 46 /r ] ND,SM0,SM1,ZU,AVX512BW,FUTURE */ + /* 260(001 204) 001(46) 110 : SM0,SM1,NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KXNOR, 2, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65820, 513, 4692}, + /* 15 : KXNOR kreg64,kreg64 [r+vm: evex.nds.l1.0f.ko64 46 /r ] ND,SM0,SM1,ZU,AVX512BW,FUTURE,APX */ + /* 240(f1 fc 28) 300 001(46) 110 : SM0,SM1,ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KXNOR, 2, {OPMASKREG|BITS64,OPMASKREG|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+30307, 514, 4692}, +}; + +static const struct itemplate instrux_XNORB[4] = { + /* 0 : XNORB kreg8,kreg8*,kreg8 [rvm: vex.nds.l1.0f.ko8 46 /r ] ND,ZU,AVX512DQ,FUTURE */ + /* 261(001 005) 001(46) 120 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_XNORB, 3, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65771, 499, 4693}, + /* 1 : XNORB kreg8,kreg8*,kreg8 [rvm: evex.nds.l1.0f.ko8 46 /r ] ND,ZU,AVX512DQ,FUTURE,APX */ + /* 241(f1 7d 28) 300 001(46) 120 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_XNORB, 3, {OPMASKREG|BITS8,OPMASKREG|BITS8,OPMASKREG|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+30244, 500, 4693}, + /* 2 : XNORB kreg8,kreg8 [r+vm: vex.nds.l1.0f.ko8 46 /r ] ND,ZU,AVX512DQ,FUTURE */ + /* 260(001 005) 001(46) 110 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_XNORB, 2, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65778, 499, 4693}, + /* 3 : XNORB kreg8,kreg8 [r+vm: evex.nds.l1.0f.ko8 46 /r ] ND,ZU,AVX512DQ,FUTURE,APX */ + /* 240(f1 7d 28) 300 001(46) 110 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_XNORB, 2, {OPMASKREG|BITS8,OPMASKREG|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+30253, 500, 4693}, +}; + +static const struct itemplate instrux_XNORW[4] = { + /* 0 : XNORW kreg16,kreg16*,kreg16 [rvm: vex.nds.l1.0f.ko16 46 /r ] ND,ZU,AVX512F,FUTURE */ + /* 261(001 004) 001(46) 120 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_XNORW, 3, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65785, 501, 4694}, + /* 1 : XNORW kreg16,kreg16*,kreg16 [rvm: evex.nds.l1.0f.ko16 46 /r ] ND,ZU,AVX512F,FUTURE,APX */ + /* 241(f1 7c 28) 300 001(46) 120 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_XNORW, 3, {OPMASKREG|BITS16,OPMASKREG|BITS16,OPMASKREG|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+30262, 502, 4694}, + /* 2 : XNORW kreg16,kreg16 [r+vm: vex.nds.l1.0f.ko16 46 /r ] ND,ZU,AVX512F,FUTURE */ + /* 260(001 004) 001(46) 110 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_XNORW, 2, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65792, 501, 4694}, + /* 3 : XNORW kreg16,kreg16 [r+vm: evex.nds.l1.0f.ko16 46 /r ] ND,ZU,AVX512F,FUTURE,APX */ + /* 240(f1 7c 28) 300 001(46) 110 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_XNORW, 2, {OPMASKREG|BITS16,OPMASKREG|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+30271, 502, 4694}, +}; + +static const struct itemplate instrux_XNORD[4] = { + /* 0 : XNORD kreg32,kreg32*,kreg32 [rvm: vex.nds.l1.0f.ko32 46 /r ] ND,ZU,AVX512BW,FUTURE */ + /* 261(001 205) 001(46) 120 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_XNORD, 3, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65799, 503, 4695}, + /* 1 : XNORD kreg32,kreg32*,kreg32 [rvm: evex.nds.l1.0f.ko32 46 /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 241(f1 fd 28) 300 001(46) 120 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_XNORD, 3, {OPMASKREG|BITS32,OPMASKREG|BITS32,OPMASKREG|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+30280, 504, 4695}, + /* 2 : XNORD kreg32,kreg32 [r+vm: vex.nds.l1.0f.ko32 46 /r ] ND,ZU,AVX512BW,FUTURE */ + /* 260(001 205) 001(46) 110 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_XNORD, 2, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65806, 503, 4695}, + /* 3 : XNORD kreg32,kreg32 [r+vm: evex.nds.l1.0f.ko32 46 /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 240(f1 fd 28) 300 001(46) 110 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_XNORD, 2, {OPMASKREG|BITS32,OPMASKREG|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+30289, 504, 4695}, +}; + +static const struct itemplate instrux_XNORQ[4] = { + /* 0 : XNORQ kreg64,kreg64*,kreg64 [rvm: vex.nds.l1.0f.ko64 46 /r ] ND,ZU,AVX512BW,FUTURE */ + /* 261(001 204) 001(46) 120 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_XNORQ, 3, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65813, 503, 4696}, + /* 1 : XNORQ kreg64,kreg64*,kreg64 [rvm: evex.nds.l1.0f.ko64 46 /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 241(f1 fc 28) 300 001(46) 120 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_XNORQ, 3, {OPMASKREG|BITS64,OPMASKREG|BITS64,OPMASKREG|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+30298, 504, 4696}, + /* 2 : XNORQ kreg64,kreg64 [r+vm: vex.nds.l1.0f.ko64 46 /r ] ND,ZU,AVX512BW,FUTURE */ + /* 260(001 204) 001(46) 110 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_XNORQ, 2, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65820, 503, 4696}, + /* 3 : XNORQ kreg64,kreg64 [r+vm: evex.nds.l1.0f.ko64 46 /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 240(f1 fc 28) 300 001(46) 110 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_XNORQ, 2, {OPMASKREG|BITS64,OPMASKREG|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+30307, 504, 4696}, +}; + +static const struct itemplate instrux_XNOR[16] = { + /* 0 : XNOR kreg8,kreg8*,kreg8 [rvm: vex.nds.l1.0f.ko8 46 /r ] ND,SM0,SM1,SM2,ZU,AVX512DQ,FUTURE */ + /* 261(001 005) 001(46) 120 : SM0,SM1,SM2,NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_XNOR, 3, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65771, 507, 4697}, + /* 1 : XNOR kreg8,kreg8*,kreg8 [rvm: evex.nds.l1.0f.ko8 46 /r ] ND,SM0,SM1,SM2,ZU,AVX512DQ,FUTURE,APX */ + /* 241(f1 7d 28) 300 001(46) 120 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_XNOR, 3, {OPMASKREG|BITS8,OPMASKREG|BITS8,OPMASKREG|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+30244, 508, 4697}, + /* 2 : XNOR kreg8,kreg8 [r+vm: vex.nds.l1.0f.ko8 46 /r ] ND,SM0,SM1,ZU,AVX512DQ,FUTURE */ + /* 260(001 005) 001(46) 110 : SM0,SM1,NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_XNOR, 2, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65778, 509, 4697}, + /* 3 : XNOR kreg8,kreg8 [r+vm: evex.nds.l1.0f.ko8 46 /r ] ND,SM0,SM1,ZU,AVX512DQ,FUTURE,APX */ + /* 240(f1 7d 28) 300 001(46) 110 : SM0,SM1,ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_XNOR, 2, {OPMASKREG|BITS8,OPMASKREG|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+30253, 510, 4697}, + /* 4 : XNOR kreg16,kreg16*,kreg16 [rvm: vex.nds.l1.0f.ko16 46 /r ] ND,SM0,SM1,SM2,ZU,AVX512F,FUTURE */ + /* 261(001 004) 001(46) 120 : SM0,SM1,SM2,NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_XNOR, 3, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65785, 523, 4698}, + /* 5 : XNOR kreg16,kreg16*,kreg16 [rvm: evex.nds.l1.0f.ko16 46 /r ] ND,SM0,SM1,SM2,ZU,AVX512F,FUTURE,APX */ + /* 241(f1 7c 28) 300 001(46) 120 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_XNOR, 3, {OPMASKREG|BITS16,OPMASKREG|BITS16,OPMASKREG|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+30262, 524, 4698}, + /* 6 : XNOR kreg16,kreg16 [r+vm: vex.nds.l1.0f.ko16 46 /r ] ND,SM0,SM1,ZU,AVX512F,FUTURE */ + /* 260(001 004) 001(46) 110 : SM0,SM1,NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_XNOR, 2, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65792, 525, 4698}, + /* 7 : XNOR kreg16,kreg16 [r+vm: evex.nds.l1.0f.ko16 46 /r ] ND,SM0,SM1,ZU,AVX512F,FUTURE,APX */ + /* 240(f1 7c 28) 300 001(46) 110 : SM0,SM1,ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_XNOR, 2, {OPMASKREG|BITS16,OPMASKREG|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+30271, 526, 4698}, + /* 8 : XNOR kreg32,kreg32*,kreg32 [rvm: vex.nds.l1.0f.ko32 46 /r ] SM0,ND,SM1,SM2,ZU,AVX512BW,FUTURE */ + /* 261(001 205) 001(46) 120 : SM0,SM1,SM2,NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_XNOR, 3, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65799, 511, 4699}, + /* 9 : XNOR kreg32,kreg32*,kreg32 [rvm: evex.nds.l1.0f.ko32 46 /r ] SM0,ND,SM1,SM2,ZU,AVX512BW,FUTURE,APX */ + /* 241(f1 fd 28) 300 001(46) 120 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_XNOR, 3, {OPMASKREG|BITS32,OPMASKREG|BITS32,OPMASKREG|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+30280, 512, 4699}, + /* 10 : XNOR kreg32,kreg32 [r+vm: vex.nds.l1.0f.ko32 46 /r ] ND,SM0,SM1,ZU,AVX512BW,FUTURE */ + /* 260(001 205) 001(46) 110 : SM0,SM1,NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_XNOR, 2, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65806, 513, 4699}, + /* 11 : XNOR kreg32,kreg32 [r+vm: evex.nds.l1.0f.ko32 46 /r ] ND,SM0,SM1,ZU,AVX512BW,FUTURE,APX */ + /* 240(f1 fd 28) 300 001(46) 110 : SM0,SM1,ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_XNOR, 2, {OPMASKREG|BITS32,OPMASKREG|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+30289, 514, 4699}, + /* 12 : XNOR kreg64,kreg64*,kreg64 [rvm: vex.nds.l1.0f.ko64 46 /r ] ND,SM0,SM1,SM2,ZU,AVX512BW,FUTURE */ + /* 261(001 204) 001(46) 120 : SM0,SM1,SM2,NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_XNOR, 3, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65813, 511, 4700}, + /* 13 : XNOR kreg64,kreg64*,kreg64 [rvm: evex.nds.l1.0f.ko64 46 /r ] ND,SM0,SM1,SM2,ZU,AVX512BW,FUTURE,APX */ + /* 241(f1 fc 28) 300 001(46) 120 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_XNOR, 3, {OPMASKREG|BITS64,OPMASKREG|BITS64,OPMASKREG|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+30298, 512, 4700}, + /* 14 : XNOR kreg64,kreg64 [r+vm: vex.nds.l1.0f.ko64 46 /r ] ND,SM0,SM1,ZU,AVX512BW,FUTURE */ + /* 260(001 204) 001(46) 110 : SM0,SM1,NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_XNOR, 2, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65820, 513, 4700}, + /* 15 : XNOR kreg64,kreg64 [r+vm: evex.nds.l1.0f.ko64 46 /r ] ND,SM0,SM1,ZU,AVX512BW,FUTURE,APX */ + /* 240(f1 fc 28) 300 001(46) 110 : SM0,SM1,ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_XNOR, 2, {OPMASKREG|BITS64,OPMASKREG|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+30307, 514, 4700}, +}; + +static const struct itemplate instrux_KXORB[4] = { + /* 0 : KXORB kreg8,kreg8*,kreg8 [rvm: vex.nds.l1.0f.ko8 47 /r ] ZU,AVX512DQ,FUTURE */ + /* 261(001 005) 001(47) 120 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_KXORB, 3, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65827, 499, 4701}, + /* 1 : KXORB kreg8,kreg8*,kreg8 [rvm: evex.nds.l1.0f.ko8 47 /r ] ZU,AVX512DQ,FUTURE,APX */ + /* 241(f1 7d 28) 300 001(47) 120 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KXORB, 3, {OPMASKREG|BITS8,OPMASKREG|BITS8,OPMASKREG|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+30316, 500, 4701}, + /* 2 : KXORB kreg8,kreg8 [r+vm: vex.nds.l1.0f.ko8 47 /r ] ND,ZU,AVX512DQ,FUTURE */ + /* 260(001 005) 001(47) 110 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_KXORB, 2, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65834, 499, 4701}, + /* 3 : KXORB kreg8,kreg8 [r+vm: evex.nds.l1.0f.ko8 47 /r ] ND,ZU,AVX512DQ,FUTURE,APX */ + /* 240(f1 7d 28) 300 001(47) 110 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KXORB, 2, {OPMASKREG|BITS8,OPMASKREG|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+30325, 500, 4701}, +}; + +static const struct itemplate instrux_KXORW[4] = { + /* 0 : KXORW kreg16,kreg16*,kreg16 [rvm: vex.nds.l1.0f.ko16 47 /r ] ZU,AVX512F,FUTURE */ + /* 261(001 004) 001(47) 120 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_KXORW, 3, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65841, 501, 4702}, + /* 1 : KXORW kreg16,kreg16*,kreg16 [rvm: evex.nds.l1.0f.ko16 47 /r ] ZU,AVX512F,FUTURE,APX */ + /* 241(f1 7c 28) 300 001(47) 120 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_KXORW, 3, {OPMASKREG|BITS16,OPMASKREG|BITS16,OPMASKREG|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+30334, 502, 4702}, + /* 2 : KXORW kreg16,kreg16 [r+vm: vex.nds.l1.0f.ko16 47 /r ] ND,ZU,AVX512F,FUTURE */ + /* 260(001 004) 001(47) 110 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_KXORW, 2, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65848, 501, 4702}, + /* 3 : KXORW kreg16,kreg16 [r+vm: evex.nds.l1.0f.ko16 47 /r ] ND,ZU,AVX512F,FUTURE,APX */ + /* 240(f1 7c 28) 300 001(47) 110 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_KXORW, 2, {OPMASKREG|BITS16,OPMASKREG|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+30343, 502, 4702}, +}; + +static const struct itemplate instrux_KXORD[4] = { + /* 0 : KXORD kreg32,kreg32*,kreg32 [rvm: vex.nds.l1.0f.ko32 47 /r ] ZU,AVX512BW,FUTURE */ + /* 261(001 205) 001(47) 120 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KXORD, 3, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65855, 503, 4703}, + /* 1 : KXORD kreg32,kreg32*,kreg32 [rvm: evex.nds.l1.0f.ko32 47 /r ] ZU,AVX512BW,FUTURE,APX */ + /* 241(f1 fd 28) 300 001(47) 120 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KXORD, 3, {OPMASKREG|BITS32,OPMASKREG|BITS32,OPMASKREG|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+30352, 504, 4703}, + /* 2 : KXORD kreg32,kreg32 [r+vm: vex.nds.l1.0f.ko32 47 /r ] ND,ZU,AVX512BW,FUTURE */ + /* 260(001 205) 001(47) 110 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KXORD, 2, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65862, 503, 4703}, + /* 3 : KXORD kreg32,kreg32 [r+vm: evex.nds.l1.0f.ko32 47 /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 240(f1 fd 28) 300 001(47) 110 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KXORD, 2, {OPMASKREG|BITS32,OPMASKREG|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+30361, 504, 4703}, +}; + +static const struct itemplate instrux_KXORQ[4] = { + /* 0 : KXORQ kreg64,kreg64*,kreg64 [rvm: vex.nds.l1.0f.ko64 47 /r ] ZU,AVX512BW,FUTURE */ + /* 261(001 204) 001(47) 120 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KXORQ, 3, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65869, 503, 4704}, + /* 1 : KXORQ kreg64,kreg64*,kreg64 [rvm: evex.nds.l1.0f.ko64 47 /r ] ZU,AVX512BW,FUTURE,APX */ + /* 241(f1 fc 28) 300 001(47) 120 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KXORQ, 3, {OPMASKREG|BITS64,OPMASKREG|BITS64,OPMASKREG|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+30370, 504, 4704}, + /* 2 : KXORQ kreg64,kreg64 [r+vm: vex.nds.l1.0f.ko64 47 /r ] ND,ZU,AVX512BW,FUTURE */ + /* 260(001 204) 001(47) 110 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KXORQ, 2, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65876, 503, 4704}, + /* 3 : KXORQ kreg64,kreg64 [r+vm: evex.nds.l1.0f.ko64 47 /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 240(f1 fc 28) 300 001(47) 110 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KXORQ, 2, {OPMASKREG|BITS64,OPMASKREG|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+30379, 504, 4704}, +}; + +static const struct itemplate instrux_KXOR[16] = { + /* 0 : KXOR kreg8,kreg8*,kreg8 [rvm: vex.nds.l1.0f.ko8 47 /r ] SM0,ND,SM1,SM2,ZU,AVX512DQ,FUTURE */ + /* 261(001 005) 001(47) 120 : SM0,SM1,SM2,NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_KXOR, 3, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65827, 507, 4705}, + /* 1 : KXOR kreg8,kreg8*,kreg8 [rvm: evex.nds.l1.0f.ko8 47 /r ] SM0,ND,SM1,SM2,ZU,AVX512DQ,FUTURE,APX */ + /* 241(f1 7d 28) 300 001(47) 120 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KXOR, 3, {OPMASKREG|BITS8,OPMASKREG|BITS8,OPMASKREG|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+30316, 508, 4705}, + /* 2 : KXOR kreg8,kreg8 [r+vm: vex.nds.l1.0f.ko8 47 /r ] SM0,ND,SM1,ZU,AVX512DQ,FUTURE */ + /* 260(001 005) 001(47) 110 : SM0,SM1,NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_KXOR, 2, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65834, 509, 4705}, + /* 3 : KXOR kreg8,kreg8 [r+vm: evex.nds.l1.0f.ko8 47 /r ] SM0,ND,SM1,ZU,AVX512DQ,FUTURE,APX */ + /* 240(f1 7d 28) 300 001(47) 110 : SM0,SM1,ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KXOR, 2, {OPMASKREG|BITS8,OPMASKREG|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+30325, 510, 4705}, + /* 4 : KXOR kreg16,kreg16*,kreg16 [rvm: vex.nds.l1.0f.ko16 47 /r ] SM0,ND,SM1,SM2,ZU,AVX512F,FUTURE */ + /* 261(001 004) 001(47) 120 : SM0,SM1,SM2,NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_KXOR, 3, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65841, 523, 4706}, + /* 5 : KXOR kreg16,kreg16*,kreg16 [rvm: evex.nds.l1.0f.ko16 47 /r ] SM0,ND,SM1,SM2,ZU,AVX512F,FUTURE,APX */ + /* 241(f1 7c 28) 300 001(47) 120 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_KXOR, 3, {OPMASKREG|BITS16,OPMASKREG|BITS16,OPMASKREG|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+30334, 524, 4706}, + /* 6 : KXOR kreg16,kreg16 [r+vm: vex.nds.l1.0f.ko16 47 /r ] SM0,ND,SM1,ZU,AVX512F,FUTURE */ + /* 260(001 004) 001(47) 110 : SM0,SM1,NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_KXOR, 2, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65848, 525, 4706}, + /* 7 : KXOR kreg16,kreg16 [r+vm: evex.nds.l1.0f.ko16 47 /r ] SM0,ND,SM1,ZU,AVX512F,FUTURE,APX */ + /* 240(f1 7c 28) 300 001(47) 110 : SM0,SM1,ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_KXOR, 2, {OPMASKREG|BITS16,OPMASKREG|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+30343, 526, 4706}, + /* 8 : KXOR kreg32,kreg32*,kreg32 [rvm: vex.nds.l1.0f.ko32 47 /r ] ND,SM0,SM1,SM2,ZU,AVX512BW,FUTURE */ + /* 261(001 205) 001(47) 120 : SM0,SM1,SM2,NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KXOR, 3, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65855, 511, 4707}, + /* 9 : KXOR kreg32,kreg32*,kreg32 [rvm: evex.nds.l1.0f.ko32 47 /r ] ND,SM0,SM1,SM2,ZU,AVX512BW,FUTURE,APX */ + /* 241(f1 fd 28) 300 001(47) 120 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KXOR, 3, {OPMASKREG|BITS32,OPMASKREG|BITS32,OPMASKREG|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+30352, 512, 4707}, + /* 10 : KXOR kreg32,kreg32 [r+vm: vex.nds.l1.0f.ko32 47 /r ] ND,SM0,SM1,ZU,AVX512BW,FUTURE */ + /* 260(001 205) 001(47) 110 : SM0,SM1,NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KXOR, 2, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65862, 513, 4707}, + /* 11 : KXOR kreg32,kreg32 [r+vm: evex.nds.l1.0f.ko32 47 /r ] ND,SM0,SM1,ZU,AVX512BW,FUTURE,APX */ + /* 240(f1 fd 28) 300 001(47) 110 : SM0,SM1,ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KXOR, 2, {OPMASKREG|BITS32,OPMASKREG|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+30361, 514, 4707}, + /* 12 : KXOR kreg64,kreg64*,kreg64 [rvm: vex.nds.l1.0f.ko64 47 /r ] ND,SM0,SM1,SM2,ZU,AVX512BW,FUTURE */ + /* 261(001 204) 001(47) 120 : SM0,SM1,SM2,NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KXOR, 3, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65869, 511, 4708}, + /* 13 : KXOR kreg64,kreg64*,kreg64 [rvm: evex.nds.l1.0f.ko64 47 /r ] ND,SM0,SM1,SM2,ZU,AVX512BW,FUTURE,APX */ + /* 241(f1 fc 28) 300 001(47) 120 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KXOR, 3, {OPMASKREG|BITS64,OPMASKREG|BITS64,OPMASKREG|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+30370, 512, 4708}, + /* 14 : KXOR kreg64,kreg64 [r+vm: vex.nds.l1.0f.ko64 47 /r ] ND,SM0,SM1,ZU,AVX512BW,FUTURE */ + /* 260(001 204) 001(47) 110 : SM0,SM1,NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KXOR, 2, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65876, 513, 4708}, + /* 15 : KXOR kreg64,kreg64 [r+vm: evex.nds.l1.0f.ko64 47 /r ] ND,SM0,SM1,ZU,AVX512BW,FUTURE,APX */ + /* 240(f1 fc 28) 300 001(47) 110 : SM0,SM1,ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KXOR, 2, {OPMASKREG|BITS64,OPMASKREG|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+30379, 514, 4708}, +}; + +static const struct itemplate instrux_XORB[4] = { + /* 0 : XORB kreg8,kreg8*,kreg8 [rvm: vex.nds.l1.0f.ko8 47 /r ] ND,ZU,AVX512DQ,FUTURE */ + /* 261(001 005) 001(47) 120 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_XORB, 3, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65827, 499, 4709}, + /* 1 : XORB kreg8,kreg8*,kreg8 [rvm: evex.nds.l1.0f.ko8 47 /r ] ND,ZU,AVX512DQ,FUTURE,APX */ + /* 241(f1 7d 28) 300 001(47) 120 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_XORB, 3, {OPMASKREG|BITS8,OPMASKREG|BITS8,OPMASKREG|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+30316, 500, 4709}, + /* 2 : XORB kreg8,kreg8 [r+vm: vex.nds.l1.0f.ko8 47 /r ] ND,ZU,AVX512DQ,FUTURE */ + /* 260(001 005) 001(47) 110 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_XORB, 2, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65834, 499, 4709}, + /* 3 : XORB kreg8,kreg8 [r+vm: evex.nds.l1.0f.ko8 47 /r ] ND,ZU,AVX512DQ,FUTURE,APX */ + /* 240(f1 7d 28) 300 001(47) 110 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_XORB, 2, {OPMASKREG|BITS8,OPMASKREG|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+30325, 500, 4709}, +}; + +static const struct itemplate instrux_XORW[4] = { + /* 0 : XORW kreg16,kreg16*,kreg16 [rvm: vex.nds.l1.0f.ko16 47 /r ] ND,ZU,AVX512F,FUTURE */ + /* 261(001 004) 001(47) 120 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_XORW, 3, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65841, 501, 4710}, + /* 1 : XORW kreg16,kreg16*,kreg16 [rvm: evex.nds.l1.0f.ko16 47 /r ] ND,ZU,AVX512F,FUTURE,APX */ + /* 241(f1 7c 28) 300 001(47) 120 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_XORW, 3, {OPMASKREG|BITS16,OPMASKREG|BITS16,OPMASKREG|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+30334, 502, 4710}, + /* 2 : XORW kreg16,kreg16 [r+vm: vex.nds.l1.0f.ko16 47 /r ] ND,ZU,AVX512F,FUTURE */ + /* 260(001 004) 001(47) 110 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_XORW, 2, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65848, 501, 4710}, + /* 3 : XORW kreg16,kreg16 [r+vm: evex.nds.l1.0f.ko16 47 /r ] ND,ZU,AVX512F,FUTURE,APX */ + /* 240(f1 7c 28) 300 001(47) 110 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_XORW, 2, {OPMASKREG|BITS16,OPMASKREG|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+30343, 502, 4710}, +}; + +static const struct itemplate instrux_XORD[4] = { + /* 0 : XORD kreg32,kreg32*,kreg32 [rvm: vex.nds.l1.0f.ko32 47 /r ] ND,ZU,AVX512BW,FUTURE */ + /* 261(001 205) 001(47) 120 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_XORD, 3, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65855, 503, 4711}, + /* 1 : XORD kreg32,kreg32*,kreg32 [rvm: evex.nds.l1.0f.ko32 47 /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 241(f1 fd 28) 300 001(47) 120 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_XORD, 3, {OPMASKREG|BITS32,OPMASKREG|BITS32,OPMASKREG|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+30352, 504, 4711}, + /* 2 : XORD kreg32,kreg32 [r+vm: vex.nds.l1.0f.ko32 47 /r ] ND,ZU,AVX512BW,FUTURE */ + /* 260(001 205) 001(47) 110 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_XORD, 2, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65862, 503, 4711}, + /* 3 : XORD kreg32,kreg32 [r+vm: evex.nds.l1.0f.ko32 47 /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 240(f1 fd 28) 300 001(47) 110 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_XORD, 2, {OPMASKREG|BITS32,OPMASKREG|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+30361, 504, 4711}, +}; + +static const struct itemplate instrux_XORQ[4] = { + /* 0 : XORQ kreg64,kreg64*,kreg64 [rvm: vex.nds.l1.0f.ko64 47 /r ] ND,ZU,AVX512BW,FUTURE */ + /* 261(001 204) 001(47) 120 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_XORQ, 3, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65869, 503, 4712}, + /* 1 : XORQ kreg64,kreg64*,kreg64 [rvm: evex.nds.l1.0f.ko64 47 /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 241(f1 fc 28) 300 001(47) 120 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_XORQ, 3, {OPMASKREG|BITS64,OPMASKREG|BITS64,OPMASKREG|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+30370, 504, 4712}, + /* 2 : XORQ kreg64,kreg64 [r+vm: vex.nds.l1.0f.ko64 47 /r ] ND,ZU,AVX512BW,FUTURE */ + /* 260(001 204) 001(47) 110 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_XORQ, 2, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65876, 503, 4712}, + /* 3 : XORQ kreg64,kreg64 [r+vm: evex.nds.l1.0f.ko64 47 /r ] ND,ZU,AVX512BW,FUTURE,APX */ + /* 240(f1 fc 28) 300 001(47) 110 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_XORQ, 2, {OPMASKREG|BITS64,OPMASKREG|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+30379, 504, 4712}, +}; + +static const struct itemplate instrux_VALIGND[6] = { + /* 0 : VALIGND xmmreg|mask|z,xmmreg*,xmmrm128|b32,imm8 [rvmi:fv: evex.nds.128.66.0f3a.w0 03 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 08) 301 001(03) 120 023 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VALIGND, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18133, 543, 4727}, + /* 1 : VALIGND xmmreg|mask|z,xmmrm128|b32,imm8 [r+vmi:fv: evex.nds.128.66.0f3a.w0 03 /r ib ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f3 7d 08) 301 001(03) 110 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VALIGND, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+18143, 543, 4727}, + /* 2 : VALIGND ymmreg|mask|z,ymmreg*,ymmrm256|b32,imm8 [rvmi:fv: evex.nds.256.66.0f3a.w0 03 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 28) 301 001(03) 120 023 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VALIGND, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18153, 543, 4728}, + /* 3 : VALIGND ymmreg|mask|z,ymmrm256|b32,imm8 [r+vmi:fv: evex.nds.256.66.0f3a.w0 03 /r ib ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f3 7d 28) 301 001(03) 110 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VALIGND, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+18163, 543, 4728}, + /* 4 : VALIGND zmmreg|mask|z,zmmreg*,zmmrm512|b32,imm8 [rvmi:fv: evex.nds.512.66.0f3a.w0 03 /r ib ] AVX512,FUTURE */ + /* 241(f3 7d 48) 301 001(03) 120 023 : EVEX,PROT,AVX512,FUTURE */ + {I_VALIGND, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18173, 544, 4729}, + /* 5 : VALIGND zmmreg|mask|z,zmmrm512|b32,imm8 [r+vmi:fv: evex.nds.512.66.0f3a.w0 03 /r ib ] ND,AVX512,FUTURE */ + /* 240(f3 7d 48) 301 001(03) 110 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VALIGND, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+18183, 544, 4729}, +}; + +static const struct itemplate instrux_VALIGNQ[6] = { + /* 0 : VALIGNQ xmmreg|mask|z,xmmreg*,xmmrm128|b64,imm8 [rvmi:fv: evex.nds.128.66.0f3a.w1 03 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 08) 301 001(03) 120 023 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VALIGNQ, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18193, 543, 4730}, + /* 1 : VALIGNQ xmmreg|mask|z,xmmrm128|b64,imm8 [r+vmi:fv: evex.nds.128.66.0f3a.w1 03 /r ib ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f3 fd 08) 301 001(03) 110 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VALIGNQ, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+18203, 543, 4730}, + /* 2 : VALIGNQ ymmreg|mask|z,ymmreg*,ymmrm256|b64,imm8 [rvmi:fv: evex.nds.256.66.0f3a.w1 03 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 28) 301 001(03) 120 023 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VALIGNQ, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18213, 543, 4731}, + /* 3 : VALIGNQ ymmreg|mask|z,ymmrm256|b64,imm8 [r+vmi:fv: evex.nds.256.66.0f3a.w1 03 /r ib ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f3 fd 28) 301 001(03) 110 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VALIGNQ, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+18223, 543, 4731}, + /* 4 : VALIGNQ zmmreg|mask|z,zmmreg*,zmmrm512|b64,imm8 [rvmi:fv: evex.nds.512.66.0f3a.w1 03 /r ib ] AVX512,FUTURE */ + /* 241(f3 fd 48) 301 001(03) 120 023 : EVEX,PROT,AVX512,FUTURE */ + {I_VALIGNQ, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18233, 544, 4732}, + /* 5 : VALIGNQ zmmreg|mask|z,zmmrm512|b64,imm8 [r+vmi:fv: evex.nds.512.66.0f3a.w1 03 /r ib ] ND,AVX512,FUTURE */ + /* 240(f3 fd 48) 301 001(03) 110 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VALIGNQ, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+18243, 544, 4732}, +}; + +static const struct itemplate instrux_VBLENDMPD[3] = { + /* 0 : VBLENDMPD xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 65 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(65) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VBLENDMPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+30748, 543, 4745}, + /* 1 : VBLENDMPD ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 65 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(65) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VBLENDMPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+30757, 543, 4746}, + /* 2 : VBLENDMPD zmmreg|mask|z,zmmreg,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 65 /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(65) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VBLENDMPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+30766, 544, 4747}, +}; + +static const struct itemplate instrux_VBLENDMPS[3] = { + /* 0 : VBLENDMPS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 65 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(65) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VBLENDMPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+30775, 543, 4748}, + /* 1 : VBLENDMPS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 65 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(65) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VBLENDMPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+30784, 543, 4749}, + /* 2 : VBLENDMPS zmmreg|mask|z,zmmreg,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f38.w0 65 /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(65) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VBLENDMPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+30793, 544, 4750}, +}; + +static const struct itemplate instrux_VBROADCASTF32X2[2] = { + /* 0 : VBROADCASTF32X2 ymmreg|mask|z,xmmrm64 [rm:t2: evex.256.66.0f38.w0 19 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f2 7d 28) 311 001(19) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VBROADCASTF32X2, 2, {YMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+30802, 546, 4751}, + /* 1 : VBROADCASTF32X2 zmmreg|mask|z,xmmrm64 [rm:t2: evex.512.66.0f38.w0 19 /r ] AVX512DQ,FUTURE */ + /* 250(f2 7d 48) 311 001(19) 110 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VBROADCASTF32X2, 2, {ZMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+30811, 547, 4752}, +}; + +static const struct itemplate instrux_VBROADCASTF32X4[2] = { + /* 0 : VBROADCASTF32X4 ymmreg|mask|z,mem128 [rm:t4: evex.256.66.0f38.w0 1a /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 28) 312 001(1a) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VBROADCASTF32X4, 2, {YMMREG,MEMORY|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+30820, 543, 4753}, + /* 1 : VBROADCASTF32X4 zmmreg|mask|z,mem128 [rm:t4: evex.512.66.0f38.w0 1a /r ] AVX512,FUTURE */ + /* 250(f2 7d 48) 312 001(1a) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VBROADCASTF32X4, 2, {ZMMREG,MEMORY|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+30829, 544, 4754}, +}; + +static const struct itemplate instrux_VBROADCASTF32X8[1] = { + /* 0 : VBROADCASTF32X8 zmmreg|mask|z,mem256 [rm:t8: evex.512.66.0f38.w0 1b /r ] AVX512DQ,FUTURE */ + /* 250(f2 7d 48) 313 001(1b) 110 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VBROADCASTF32X8, 2, {ZMMREG,MEMORY|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+30838, 547, 4755}, +}; + +static const struct itemplate instrux_VBROADCASTF64X2[2] = { + /* 0 : VBROADCASTF64X2 ymmreg|mask|z,mem128 [rm:t2: evex.256.66.0f38.w1 1a /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f2 fd 28) 311 001(1a) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VBROADCASTF64X2, 2, {YMMREG,MEMORY|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+30847, 546, 4756}, + /* 1 : VBROADCASTF64X2 zmmreg|mask|z,mem128 [rm:t2: evex.512.66.0f38.w1 1a /r ] AVX512DQ,FUTURE */ + /* 250(f2 fd 48) 311 001(1a) 110 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VBROADCASTF64X2, 2, {ZMMREG,MEMORY|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+30856, 547, 4757}, +}; + +static const struct itemplate instrux_VBROADCASTF64X4[1] = { + /* 0 : VBROADCASTF64X4 zmmreg|mask|z,mem256 [rm:t4: evex.512.66.0f38.w1 1b /r ] AVX512,FUTURE */ + /* 250(f2 fd 48) 312 001(1b) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VBROADCASTF64X4, 2, {ZMMREG,MEMORY|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+30865, 544, 4758}, +}; + +static const struct itemplate instrux_VBROADCASTI32X2[3] = { + /* 0 : VBROADCASTI32X2 xmmreg|mask|z,xmmrm64 [rm:t2: evex.128.66.0f38.w0 59 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f2 7d 08) 311 001(59) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VBROADCASTI32X2, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+30874, 546, 4759}, + /* 1 : VBROADCASTI32X2 ymmreg|mask|z,xmmrm64 [rm:t2: evex.256.66.0f38.w0 59 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f2 7d 28) 311 001(59) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VBROADCASTI32X2, 2, {YMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+30883, 546, 4760}, + /* 2 : VBROADCASTI32X2 zmmreg|mask|z,xmmrm64 [rm:t2: evex.512.66.0f38.w0 59 /r ] AVX512DQ,FUTURE */ + /* 250(f2 7d 48) 311 001(59) 110 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VBROADCASTI32X2, 2, {ZMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+30892, 547, 4761}, +}; + +static const struct itemplate instrux_VBROADCASTI32X4[2] = { + /* 0 : VBROADCASTI32X4 ymmreg|mask|z,mem128 [rm:t4: evex.256.66.0f38.w0 5a /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 28) 312 001(5a) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VBROADCASTI32X4, 2, {YMMREG,MEMORY|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+30901, 543, 4762}, + /* 1 : VBROADCASTI32X4 zmmreg|mask|z,mem128 [rm:t4: evex.512.66.0f38.w0 5a /r ] AVX512,FUTURE */ + /* 250(f2 7d 48) 312 001(5a) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VBROADCASTI32X4, 2, {ZMMREG,MEMORY|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+30910, 544, 4763}, +}; + +static const struct itemplate instrux_VBROADCASTI32X8[1] = { + /* 0 : VBROADCASTI32X8 zmmreg|mask|z,mem256 [rm:t8: evex.512.66.0f38.w0 5b /r ] AVX512DQ,FUTURE */ + /* 250(f2 7d 48) 313 001(5b) 110 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VBROADCASTI32X8, 2, {ZMMREG,MEMORY|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+30919, 547, 4764}, +}; + +static const struct itemplate instrux_VBROADCASTI64X2[2] = { + /* 0 : VBROADCASTI64X2 ymmreg|mask|z,mem128 [rm:t2: evex.256.66.0f38.w1 5a /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f2 fd 28) 311 001(5a) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VBROADCASTI64X2, 2, {YMMREG,MEMORY|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+30928, 546, 4765}, + /* 1 : VBROADCASTI64X2 zmmreg|mask|z,mem128 [rm:t2: evex.512.66.0f38.w1 5a /r ] AVX512DQ,FUTURE */ + /* 250(f2 fd 48) 311 001(5a) 110 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VBROADCASTI64X2, 2, {ZMMREG,MEMORY|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+30937, 547, 4766}, +}; + +static const struct itemplate instrux_VBROADCASTI64X4[1] = { + /* 0 : VBROADCASTI64X4 zmmreg|mask|z,mem256 [rm:t4: evex.512.66.0f38.w1 5b /r ] AVX512,FUTURE */ + /* 250(f2 fd 48) 312 001(5b) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VBROADCASTI64X4, 2, {ZMMREG,MEMORY|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+30946, 544, 4767}, +}; + +static const struct itemplate instrux_VCMPEQ_OQPD[3] = { + /* 0 : VCMPEQ_OQPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 00 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(00) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPEQ_OQPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+4743, 543, 4786}, + /* 1 : VCMPEQ_OQPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 00 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(00) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPEQ_OQPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+4754, 543, 4787}, + /* 2 : VCMPEQ_OQPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 00 ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(00) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPEQ_OQPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+4765, 544, 4788}, +}; + +static const struct itemplate instrux_VCMPEQ_OQPS[3] = { + /* 0 : VCMPEQ_OQPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 00 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(00) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPEQ_OQPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+4776, 543, 4789}, + /* 1 : VCMPEQ_OQPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 00 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(00) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPEQ_OQPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+4787, 543, 4790}, + /* 2 : VCMPEQ_OQPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 00 ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(00) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPEQ_OQPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+4798, 544, 4791}, +}; + +static const struct itemplate instrux_VCMPEQ_OQSD[1] = { + /* 0 : VCMPEQ_OQSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 00 ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(00) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPEQ_OQSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+4809, 545, 4792}, +}; + +static const struct itemplate instrux_VCMPEQ_OQSS[1] = { + /* 0 : VCMPEQ_OQSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 00 ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(00) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPEQ_OQSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+4820, 545, 4793}, +}; + +static const struct itemplate instrux_VCOMPRESSPD[6] = { + /* 0 : VCOMPRESSPD mem128|mask,xmmreg [mr:t1s: evex.128.66.0f38.w1 8a /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 fd 08) 306 001(8a) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCOMPRESSPD, 2, {MEMORY|BITS128,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+31063, 543, 5156}, + /* 1 : VCOMPRESSPD mem256|mask,ymmreg [mr:t1s: evex.256.66.0f38.w1 8a /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 fd 28) 306 001(8a) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCOMPRESSPD, 2, {MEMORY|BITS256,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+31072, 543, 5157}, + /* 2 : VCOMPRESSPD mem512|mask,zmmreg [mr:t1s: evex.512.66.0f38.w1 8a /r ] AVX512,FUTURE */ + /* 250(f2 fd 48) 306 001(8a) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VCOMPRESSPD, 2, {MEMORY|BITS512,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+31081, 544, 5158}, + /* 3 : VCOMPRESSPD xmmreg|mask|z,xmmreg [mr: evex.128.66.0f38.w1 8a /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 fd 08) 300 001(8a) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCOMPRESSPD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+31090, 543, 5159}, + /* 4 : VCOMPRESSPD ymmreg|mask|z,ymmreg [mr: evex.256.66.0f38.w1 8a /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 fd 28) 300 001(8a) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCOMPRESSPD, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+31099, 543, 5160}, + /* 5 : VCOMPRESSPD zmmreg|mask|z,zmmreg [mr: evex.512.66.0f38.w1 8a /r ] AVX512,FUTURE */ + /* 250(f2 fd 48) 300 001(8a) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VCOMPRESSPD, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+31108, 544, 5161}, +}; + +static const struct itemplate instrux_VCOMPRESSPS[6] = { + /* 0 : VCOMPRESSPS mem128|mask,xmmreg [mr:t1s: evex.128.66.0f38.w0 8a /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 08) 306 001(8a) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCOMPRESSPS, 2, {MEMORY|BITS128,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+31117, 543, 5162}, + /* 1 : VCOMPRESSPS mem256|mask,ymmreg [mr:t1s: evex.256.66.0f38.w0 8a /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 28) 306 001(8a) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCOMPRESSPS, 2, {MEMORY|BITS256,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+31126, 543, 5163}, + /* 2 : VCOMPRESSPS mem512|mask,zmmreg [mr:t1s: evex.512.66.0f38.w0 8a /r ] AVX512,FUTURE */ + /* 250(f2 7d 48) 306 001(8a) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VCOMPRESSPS, 2, {MEMORY|BITS512,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+31135, 544, 5164}, + /* 3 : VCOMPRESSPS xmmreg|mask|z,xmmreg [mr: evex.128.66.0f38.w0 8a /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 08) 300 001(8a) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCOMPRESSPS, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+31144, 543, 5165}, + /* 4 : VCOMPRESSPS ymmreg|mask|z,ymmreg [mr: evex.256.66.0f38.w0 8a /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 28) 300 001(8a) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCOMPRESSPS, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+31153, 543, 5166}, + /* 5 : VCOMPRESSPS zmmreg|mask|z,zmmreg [mr: evex.512.66.0f38.w0 8a /r ] AVX512,FUTURE */ + /* 250(f2 7d 48) 300 001(8a) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VCOMPRESSPS, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+31162, 544, 5167}, +}; + +static const struct itemplate instrux_VCVTPD2QQ[3] = { + /* 0 : VCVTPD2QQ xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.66.0f.w1 7b /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f1 fd 08) 301 001(7b) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VCVTPD2QQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+31279, 546, 5180}, + /* 1 : VCVTPD2QQ ymmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.66.0f.w1 7b /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f1 fd 28) 301 001(7b) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VCVTPD2QQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+31288, 546, 5181}, + /* 2 : VCVTPD2QQ zmmreg|mask|z,zmmrm512|b64|er [rm:fv: evex.512.66.0f.w1 7b /r ] AVX512DQ,FUTURE */ + /* 250(f1 fd 48) 301 001(7b) 110 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VCVTPD2QQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+31297, 547, 5182}, +}; + +static const struct itemplate instrux_VCVTPD2UDQ[3] = { + /* 0 : VCVTPD2UDQ xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.0f.w1 79 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 fc 08) 301 001(79) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTPD2UDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+31306, 543, 5183}, + /* 1 : VCVTPD2UDQ xmmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.0f.w1 79 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 fc 28) 301 001(79) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTPD2UDQ, 2, {XMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+31315, 543, 5184}, + /* 2 : VCVTPD2UDQ ymmreg|mask|z,zmmrm512|b64|er [rm:fv: evex.512.0f.w1 79 /r ] AVX512,FUTURE */ + /* 250(f1 fc 48) 301 001(79) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VCVTPD2UDQ, 2, {YMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+31324, 544, 5185}, +}; + +static const struct itemplate instrux_VCVTPD2UQQ[3] = { + /* 0 : VCVTPD2UQQ xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.66.0f.w1 79 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f1 fd 08) 301 001(79) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VCVTPD2UQQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+31333, 546, 5186}, + /* 1 : VCVTPD2UQQ ymmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.66.0f.w1 79 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f1 fd 28) 301 001(79) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VCVTPD2UQQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+31342, 546, 5187}, + /* 2 : VCVTPD2UQQ zmmreg|mask|z,zmmrm512|b64|er [rm:fv: evex.512.66.0f.w1 79 /r ] AVX512DQ,FUTURE */ + /* 250(f1 fd 48) 301 001(79) 110 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VCVTPD2UQQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+31351, 547, 5188}, +}; + +static const struct itemplate instrux_VCVTPS2QQ[3] = { + /* 0 : VCVTPS2QQ xmmreg|mask|z,xmmrm64|b32 [rm:hv: evex.128.66.0f.w0 7b /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f1 7d 08) 302 001(7b) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VCVTPS2QQ, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+31441, 546, 5204}, + /* 1 : VCVTPS2QQ ymmreg|mask|z,xmmrm128|b32 [rm:hv: evex.256.66.0f.w0 7b /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f1 7d 28) 302 001(7b) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VCVTPS2QQ, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+31450, 546, 5205}, + /* 2 : VCVTPS2QQ zmmreg|mask|z,ymmrm256|b32|er [rm:hv: evex.512.66.0f.w0 7b /r ] AVX512DQ,FUTURE */ + /* 250(f1 7d 48) 302 001(7b) 110 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VCVTPS2QQ, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+31459, 547, 5206}, +}; + +static const struct itemplate instrux_VCVTPS2UDQ[3] = { + /* 0 : VCVTPS2UDQ xmmreg|mask|z,xmmrm128|b32 [rm:fv: evex.128.0f.w0 79 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7c 08) 301 001(79) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTPS2UDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+31468, 543, 5207}, + /* 1 : VCVTPS2UDQ ymmreg|mask|z,ymmrm256|b32 [rm:fv: evex.256.0f.w0 79 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7c 28) 301 001(79) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTPS2UDQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+31477, 543, 5208}, + /* 2 : VCVTPS2UDQ zmmreg|mask|z,zmmrm512|b32|er [rm:fv: evex.512.0f.w0 79 /r ] AVX512,FUTURE */ + /* 250(f1 7c 48) 301 001(79) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VCVTPS2UDQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+31486, 544, 5209}, +}; + +static const struct itemplate instrux_VCVTPS2UQQ[3] = { + /* 0 : VCVTPS2UQQ xmmreg|mask|z,xmmrm64|b32 [rm:hv: evex.128.66.0f.w0 79 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f1 7d 08) 302 001(79) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VCVTPS2UQQ, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+31495, 546, 5210}, + /* 1 : VCVTPS2UQQ ymmreg|mask|z,xmmrm128|b32 [rm:hv: evex.256.66.0f.w0 79 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f1 7d 28) 302 001(79) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VCVTPS2UQQ, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+31504, 546, 5211}, + /* 2 : VCVTPS2UQQ zmmreg|mask|z,ymmrm256|b32|er [rm:hv: evex.512.66.0f.w0 79 /r ] AVX512DQ,FUTURE */ + /* 250(f1 7d 48) 302 001(79) 110 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VCVTPS2UQQ, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+31513, 547, 5212}, +}; + +static const struct itemplate instrux_VCVTQQ2PD[3] = { + /* 0 : VCVTQQ2PD xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.f3.0f.w1 e6 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f1 fe 08) 301 001(e6) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VCVTQQ2PD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+31522, 546, 5213}, + /* 1 : VCVTQQ2PD ymmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.f3.0f.w1 e6 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f1 fe 28) 301 001(e6) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VCVTQQ2PD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+31531, 546, 5214}, + /* 2 : VCVTQQ2PD zmmreg|mask|z,zmmrm512|b64|er [rm:fv: evex.512.f3.0f.w1 e6 /r ] AVX512DQ,FUTURE */ + /* 250(f1 fe 48) 301 001(e6) 110 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VCVTQQ2PD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+31540, 547, 5215}, +}; + +static const struct itemplate instrux_VCVTQQ2PS[3] = { + /* 0 : VCVTQQ2PS xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.0f.w1 5b /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f1 fc 08) 301 001(5b) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VCVTQQ2PS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+31549, 546, 5216}, + /* 1 : VCVTQQ2PS xmmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.0f.w1 5b /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f1 fc 28) 301 001(5b) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VCVTQQ2PS, 2, {XMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+31558, 546, 5217}, + /* 2 : VCVTQQ2PS ymmreg|mask|z,zmmrm512|b64|er [rm:fv: evex.512.0f.w1 5b /r ] AVX512DQ,FUTURE */ + /* 250(f1 fc 48) 301 001(5b) 110 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VCVTQQ2PS, 2, {YMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+31567, 547, 5218}, +}; + +static const struct itemplate instrux_VCVTSD2USI[2] = { + /* 0 : VCVTSD2USI reg32,xmmrm64|er [rm:t1f64: evex.lig.f2.0f.w0 79 /r ] AVX512,FUTURE */ + /* 250(f1 7f 08) 310 001(79) 110 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCVTSD2USI, 2, {REG_GPR|BITS32,RM_XMM|BITS64,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+31612, 545, 5222}, + /* 1 : VCVTSD2USI reg64,xmmrm64|er [rm:t1f64: evex.lig.f2.0f.w1 79 /r ] AVX512,FUTURE */ + /* 250(f1 ff 08) 310 001(79) 110 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCVTSD2USI, 2, {REG_GPR|BITS64,RM_XMM|BITS64,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+31621, 545, 5223}, +}; + +static const struct itemplate instrux_VCVTSS2USI[2] = { + /* 0 : VCVTSS2USI reg32,xmmrm32|er [rm:t1f32: evex.lig.f3.0f.w0 79 /r ] AVX512,FUTURE */ + /* 250(f1 7e 08) 307 001(79) 110 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCVTSS2USI, 2, {REG_GPR|BITS32,RM_XMM|BITS32,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+31738, 545, 5231}, + /* 1 : VCVTSS2USI reg64,xmmrm32|er [rm:t1f32: evex.lig.f3.0f.w1 79 /r ] AVX512,FUTURE */ + /* 250(f1 fe 08) 307 001(79) 110 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCVTSS2USI, 2, {REG_GPR|BITS64,RM_XMM|BITS32,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+31747, 545, 5232}, +}; + +static const struct itemplate instrux_VCVTTPD2QQ[3] = { + /* 0 : VCVTTPD2QQ xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.66.0f.w1 7a /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f1 fd 08) 301 001(7a) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VCVTTPD2QQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+31783, 546, 5236}, + /* 1 : VCVTTPD2QQ ymmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.66.0f.w1 7a /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f1 fd 28) 301 001(7a) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VCVTTPD2QQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+31792, 546, 5237}, + /* 2 : VCVTTPD2QQ zmmreg|mask|z,zmmrm512|b64|sae [rm:fv: evex.512.66.0f.w1 7a /r ] AVX512DQ,FUTURE */ + /* 250(f1 fd 48) 301 001(7a) 110 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VCVTTPD2QQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+31801, 547, 5238}, +}; + +static const struct itemplate instrux_VCVTTPD2UDQ[3] = { + /* 0 : VCVTTPD2UDQ xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.0f.w1 78 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 fc 08) 301 001(78) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTTPD2UDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+31810, 543, 5239}, + /* 1 : VCVTTPD2UDQ xmmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.0f.w1 78 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 fc 28) 301 001(78) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTTPD2UDQ, 2, {XMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+31819, 543, 5240}, + /* 2 : VCVTTPD2UDQ ymmreg|mask|z,zmmrm512|b64|sae [rm:fv: evex.512.0f.w1 78 /r ] AVX512,FUTURE */ + /* 250(f1 fc 48) 301 001(78) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VCVTTPD2UDQ, 2, {YMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+31828, 544, 5241}, +}; + +static const struct itemplate instrux_VCVTTPD2UQQ[3] = { + /* 0 : VCVTTPD2UQQ xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.66.0f.w1 78 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f1 fd 08) 301 001(78) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VCVTTPD2UQQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+31837, 546, 5242}, + /* 1 : VCVTTPD2UQQ ymmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.66.0f.w1 78 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f1 fd 28) 301 001(78) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VCVTTPD2UQQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+31846, 546, 5243}, + /* 2 : VCVTTPD2UQQ zmmreg|mask|z,zmmrm512|b64|sae [rm:fv: evex.512.66.0f.w1 78 /r ] AVX512DQ,FUTURE */ + /* 250(f1 fd 48) 301 001(78) 110 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VCVTTPD2UQQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+31855, 547, 5244}, +}; + +static const struct itemplate instrux_VCVTTPS2QQ[3] = { + /* 0 : VCVTTPS2QQ xmmreg|mask|z,xmmrm64|b32 [rm:hv: evex.128.66.0f.w0 7a /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f1 7d 08) 302 001(7a) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VCVTTPS2QQ, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+31891, 546, 5248}, + /* 1 : VCVTTPS2QQ ymmreg|mask|z,xmmrm128|b32 [rm:hv: evex.256.66.0f.w0 7a /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f1 7d 28) 302 001(7a) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VCVTTPS2QQ, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+31900, 546, 5249}, + /* 2 : VCVTTPS2QQ zmmreg|mask|z,ymmrm256|b32|sae [rm:hv: evex.512.66.0f.w0 7a /r ] AVX512DQ,FUTURE */ + /* 250(f1 7d 48) 302 001(7a) 110 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VCVTTPS2QQ, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+31909, 547, 5250}, +}; + +static const struct itemplate instrux_VCVTTPS2UDQ[3] = { + /* 0 : VCVTTPS2UDQ xmmreg|mask|z,xmmrm128|b32 [rm:fv: evex.128.0f.w0 78 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7c 08) 301 001(78) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTTPS2UDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+31918, 543, 5251}, + /* 1 : VCVTTPS2UDQ ymmreg|mask|z,ymmrm256|b32 [rm:fv: evex.256.0f.w0 78 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7c 28) 301 001(78) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTTPS2UDQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+31927, 543, 5252}, + /* 2 : VCVTTPS2UDQ zmmreg|mask|z,zmmrm512|b32|sae [rm:fv: evex.512.0f.w0 78 /r ] AVX512,FUTURE */ + /* 250(f1 7c 48) 301 001(78) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VCVTTPS2UDQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+31936, 544, 5253}, +}; + +static const struct itemplate instrux_VCVTTPS2UQQ[3] = { + /* 0 : VCVTTPS2UQQ xmmreg|mask|z,xmmrm64|b32 [rm:hv: evex.128.66.0f.w0 78 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f1 7d 08) 302 001(78) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VCVTTPS2UQQ, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+31945, 546, 5254}, + /* 1 : VCVTTPS2UQQ ymmreg|mask|z,xmmrm128|b32 [rm:hv: evex.256.66.0f.w0 78 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f1 7d 28) 302 001(78) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VCVTTPS2UQQ, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+31954, 546, 5255}, + /* 2 : VCVTTPS2UQQ zmmreg|mask|z,ymmrm256|b32|sae [rm:hv: evex.512.66.0f.w0 78 /r ] AVX512DQ,FUTURE */ + /* 250(f1 7d 48) 302 001(78) 110 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VCVTTPS2UQQ, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+31963, 547, 5256}, +}; + +static const struct itemplate instrux_VCVTTSD2USI[2] = { + /* 0 : VCVTTSD2USI reg32,xmmrm64|sae [rm:t1f64: evex.lig.f2.0f.w0 78 /r ] AVX512,FUTURE */ + /* 250(f1 7f 08) 310 001(78) 110 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCVTTSD2USI, 2, {REG_GPR|BITS32,RM_XMM|BITS64,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+31990, 545, 5259}, + /* 1 : VCVTTSD2USI reg64,xmmrm64|sae [rm:t1f64: evex.lig.f2.0f.w1 78 /r ] AVX512,FUTURE */ + /* 250(f1 ff 08) 310 001(78) 110 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCVTTSD2USI, 2, {REG_GPR|BITS64,RM_XMM|BITS64,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+31999, 545, 5260}, +}; + +static const struct itemplate instrux_VCVTTSS2USI[2] = { + /* 0 : VCVTTSS2USI reg32,xmmrm32|sae [rm:t1f32: evex.lig.f3.0f.w0 78 /r ] AVX512,FUTURE */ + /* 250(f1 7e 08) 307 001(78) 110 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCVTTSS2USI, 2, {REG_GPR|BITS32,RM_XMM|BITS32,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+32026, 545, 5263}, + /* 1 : VCVTTSS2USI reg64,xmmrm32|sae [rm:t1f32: evex.lig.f3.0f.w1 78 /r ] AVX512,FUTURE */ + /* 250(f1 fe 08) 307 001(78) 110 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCVTTSS2USI, 2, {REG_GPR|BITS64,RM_XMM|BITS32,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+32035, 545, 5264}, +}; + +static const struct itemplate instrux_VCVTUDQ2PD[3] = { + /* 0 : VCVTUDQ2PD xmmreg|mask|z,xmmrm64|b32 [rm:hv: evex.128.f3.0f.w0 7a /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7e 08) 302 001(7a) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTUDQ2PD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+32044, 543, 5265}, + /* 1 : VCVTUDQ2PD ymmreg|mask|z,xmmrm128|b32 [rm:hv: evex.256.f3.0f.w0 7a /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7e 28) 302 001(7a) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTUDQ2PD, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+32053, 543, 5266}, + /* 2 : VCVTUDQ2PD zmmreg|mask|z,ymmrm256|b32|er [rm:hv: evex.512.f3.0f.w0 7a /r ] AVX512,FUTURE */ + /* 250(f1 7e 48) 302 001(7a) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VCVTUDQ2PD, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+32062, 544, 5267}, +}; + +static const struct itemplate instrux_VCVTUDQ2PS[3] = { + /* 0 : VCVTUDQ2PS xmmreg|mask|z,xmmrm128|b32 [rm:fv: evex.128.f2.0f.w0 7a /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7f 08) 301 001(7a) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTUDQ2PS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+32071, 543, 5268}, + /* 1 : VCVTUDQ2PS ymmreg|mask|z,ymmrm256|b32 [rm:fv: evex.256.f2.0f.w0 7a /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7f 28) 301 001(7a) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTUDQ2PS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+32080, 543, 5269}, + /* 2 : VCVTUDQ2PS zmmreg|mask|z,zmmrm512|b32|er [rm:fv: evex.512.f2.0f.w0 7a /r ] AVX512,FUTURE */ + /* 250(f1 7f 48) 301 001(7a) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VCVTUDQ2PS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+32089, 544, 5270}, +}; + +static const struct itemplate instrux_VCVTUQQ2PD[3] = { + /* 0 : VCVTUQQ2PD xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.f3.0f.w1 7a /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f1 fe 08) 301 001(7a) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VCVTUQQ2PD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+32098, 546, 5271}, + /* 1 : VCVTUQQ2PD ymmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.f3.0f.w1 7a /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f1 fe 28) 301 001(7a) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VCVTUQQ2PD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+32107, 546, 5272}, + /* 2 : VCVTUQQ2PD zmmreg|mask|z,zmmrm512|b64|er [rm:fv: evex.512.f3.0f.w1 7a /r ] AVX512DQ,FUTURE */ + /* 250(f1 fe 48) 301 001(7a) 110 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VCVTUQQ2PD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+32116, 547, 5273}, +}; + +static const struct itemplate instrux_VCVTUQQ2PS[3] = { + /* 0 : VCVTUQQ2PS xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.f2.0f.w1 7a /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f1 ff 08) 301 001(7a) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VCVTUQQ2PS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+32125, 546, 5274}, + /* 1 : VCVTUQQ2PS xmmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.f2.0f.w1 7a /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f1 ff 28) 301 001(7a) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VCVTUQQ2PS, 2, {XMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+32134, 546, 5275}, + /* 2 : VCVTUQQ2PS ymmreg|mask|z,zmmrm512|b64|er [rm:fv: evex.512.f2.0f.w1 7a /r ] AVX512DQ,FUTURE */ + /* 250(f1 ff 48) 301 001(7a) 110 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VCVTUQQ2PS, 2, {YMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+32143, 547, 5276}, +}; + +static const struct itemplate instrux_VCVTUSI2SD[4] = { + /* 0 : VCVTUSI2SD xmmreg,xmmreg*,rm32|er [rvm:t1s: evex.nds.lig.f2.0f.w0 7b /r ] AVX512,FUTURE */ + /* 241(f1 7f 08) 306 001(7b) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCVTUSI2SD, 3, {XMMREG,XMMREG,RM_GPR|BITS32,0,0}, {0,0,ER,0,0}, nasm_bytecodes+32152, 545, 5277}, + /* 1 : VCVTUSI2SD xmmreg,rm32|er [r+vm:t1s: evex.nds.lig.f2.0f.w0 7b /r ] ND,AVX512,FUTURE */ + /* 240(f1 7f 08) 306 001(7b) 110 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCVTUSI2SD, 2, {XMMREG,RM_GPR|BITS32,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+32161, 545, 5277}, + /* 2 : VCVTUSI2SD xmmreg,xmmreg*,rm64|er [rvm:t1s: evex.nds.lig.f2.0f.w1 7b /r ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(7b) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCVTUSI2SD, 3, {XMMREG,XMMREG,RM_GPR|BITS64,0,0}, {0,0,ER,0,0}, nasm_bytecodes+32170, 545, 5278}, + /* 3 : VCVTUSI2SD xmmreg,rm64|er [r+vm:t1s: evex.nds.lig.f2.0f.w1 7b /r ] ND,AVX512,FUTURE */ + /* 240(f1 ff 08) 306 001(7b) 110 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCVTUSI2SD, 2, {XMMREG,RM_GPR|BITS64,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+32179, 545, 5278}, +}; + +static const struct itemplate instrux_VCVTUSI2SS[4] = { + /* 0 : VCVTUSI2SS xmmreg,xmmreg*,rm32|er [rvm:t1s: evex.nds.lig.f3.0f.w0 7b /r ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(7b) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCVTUSI2SS, 3, {XMMREG,XMMREG,RM_GPR|BITS32,0,0}, {0,0,ER,0,0}, nasm_bytecodes+32188, 545, 5279}, + /* 1 : VCVTUSI2SS xmmreg,rm32|er [r+vm:t1s: evex.nds.lig.f3.0f.w0 7b /r ] ND,AVX512,FUTURE */ + /* 240(f1 7e 08) 306 001(7b) 110 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCVTUSI2SS, 2, {XMMREG,RM_GPR|BITS32,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+32197, 545, 5279}, + /* 2 : VCVTUSI2SS xmmreg,xmmreg*,rm64|er [rvm:t1s: evex.nds.lig.f3.0f.w1 7b /r ] AVX512,FUTURE */ + /* 241(f1 fe 08) 306 001(7b) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCVTUSI2SS, 3, {XMMREG,XMMREG,RM_GPR|BITS64,0,0}, {0,0,ER,0,0}, nasm_bytecodes+32206, 545, 5280}, + /* 3 : VCVTUSI2SS xmmreg,rm64|er [r+vm:t1s: evex.nds.lig.f3.0f.w1 7b /r ] ND,AVX512,FUTURE */ + /* 240(f1 fe 08) 306 001(7b) 110 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCVTUSI2SS, 2, {XMMREG,RM_GPR|BITS64,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+32215, 545, 5280}, +}; + +static const struct itemplate instrux_VDBPSADBW[6] = { + /* 0 : VDBPSADBW xmmreg|mask|z,xmmreg*,xmmrm128,imm8 [rvmi:fvm: evex.nds.128.66.0f3a.w0 42 /r ib ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 08) 303 001(42) 120 023 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VDBPSADBW, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18363, 549, 5281}, + /* 1 : VDBPSADBW xmmreg|mask|z,xmmrm128,imm8 [r+vmi:fvm: evex.nds.128.66.0f3a.w0 42 /r ib ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f3 7d 08) 303 001(42) 110 022 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VDBPSADBW, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18373, 549, 5281}, + /* 2 : VDBPSADBW ymmreg|mask|z,ymmreg*,ymmrm256,imm8 [rvmi:fvm: evex.nds.256.66.0f3a.w0 42 /r ib ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 28) 303 001(42) 120 023 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VDBPSADBW, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18383, 549, 5282}, + /* 3 : VDBPSADBW ymmreg|mask|z,ymmrm256,imm8 [r+vmi:fvm: evex.nds.256.66.0f3a.w0 42 /r ib ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f3 7d 28) 303 001(42) 110 022 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VDBPSADBW, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18393, 549, 5282}, + /* 4 : VDBPSADBW zmmreg|mask|z,zmmreg*,zmmrm512,imm8 [rvmi:fvm: evex.nds.512.66.0f3a.w0 42 /r ib ] AVX512BW,FUTURE */ + /* 241(f3 7d 48) 303 001(42) 120 023 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VDBPSADBW, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18403, 550, 5283}, + /* 5 : VDBPSADBW zmmreg|mask|z,zmmrm512,imm8 [r+vmi:fvm: evex.nds.512.66.0f3a.w0 42 /r ib ] ND,AVX512BW,FUTURE */ + /* 240(f3 7d 48) 303 001(42) 110 022 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VDBPSADBW, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18413, 550, 5283}, +}; + +static const struct itemplate instrux_VEXP2PD[1] = { + /* 0 : VEXP2PD zmmreg|mask|z,zmmrm512|b64|sae [rm:fv: evex.512.66.0f38.w1 c8 /r ] AVX512ER,FUTURE */ + /* 250(f2 fd 48) 301 001(c8) 110 : EVEX,PROT,AVX512ER,FUTURE */ + {I_VEXP2PD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+32368, 551, 5292}, +}; + +static const struct itemplate instrux_VEXP2PS[1] = { + /* 0 : VEXP2PS zmmreg|mask|z,zmmrm512|b32|sae [rm:fv: evex.512.66.0f38.w0 c8 /r ] AVX512ER,FUTURE */ + /* 250(f2 7d 48) 301 001(c8) 110 : EVEX,PROT,AVX512ER,FUTURE */ + {I_VEXP2PS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+32377, 551, 5293}, +}; + +static const struct itemplate instrux_VEXPANDPD[6] = { + /* 0 : VEXPANDPD xmmreg|mask|z,mem128 [rm:t1s: evex.128.66.0f38.w1 88 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 fd 08) 306 001(88) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VEXPANDPD, 2, {XMMREG,MEMORY|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+32386, 543, 5294}, + /* 1 : VEXPANDPD ymmreg|mask|z,mem256 [rm:t1s: evex.256.66.0f38.w1 88 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 fd 28) 306 001(88) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VEXPANDPD, 2, {YMMREG,MEMORY|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+32395, 543, 5295}, + /* 2 : VEXPANDPD zmmreg|mask|z,mem512 [rm:t1s: evex.512.66.0f38.w1 88 /r ] AVX512,FUTURE */ + /* 250(f2 fd 48) 306 001(88) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VEXPANDPD, 2, {ZMMREG,MEMORY|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+32404, 544, 5296}, + /* 3 : VEXPANDPD xmmreg|mask|z,xmmreg [rm:t1s: evex.128.66.0f38.w1 88 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 fd 08) 306 001(88) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VEXPANDPD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+32386, 543, 5297}, + /* 4 : VEXPANDPD ymmreg|mask|z,ymmreg [rm:t1s: evex.256.66.0f38.w1 88 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 fd 28) 306 001(88) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VEXPANDPD, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+32395, 543, 5298}, + /* 5 : VEXPANDPD zmmreg|mask|z,zmmreg [rm:t1s: evex.512.66.0f38.w1 88 /r ] AVX512,FUTURE */ + /* 250(f2 fd 48) 306 001(88) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VEXPANDPD, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+32404, 544, 5299}, +}; + +static const struct itemplate instrux_VEXPANDPS[6] = { + /* 0 : VEXPANDPS xmmreg|mask|z,mem128 [rm:t1s: evex.128.66.0f38.w0 88 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 08) 306 001(88) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VEXPANDPS, 2, {XMMREG,MEMORY|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+32413, 543, 5300}, + /* 1 : VEXPANDPS ymmreg|mask|z,mem256 [rm:t1s: evex.256.66.0f38.w0 88 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 28) 306 001(88) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VEXPANDPS, 2, {YMMREG,MEMORY|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+32422, 543, 5301}, + /* 2 : VEXPANDPS zmmreg|mask|z,mem512 [rm:t1s: evex.512.66.0f38.w0 88 /r ] AVX512,FUTURE */ + /* 250(f2 7d 48) 306 001(88) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VEXPANDPS, 2, {ZMMREG,MEMORY|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+32431, 544, 5302}, + /* 3 : VEXPANDPS xmmreg|mask|z,xmmreg [rm:t1s: evex.128.66.0f38.w0 88 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 08) 306 001(88) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VEXPANDPS, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+32413, 543, 5303}, + /* 4 : VEXPANDPS ymmreg|mask|z,ymmreg [rm:t1s: evex.256.66.0f38.w0 88 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 28) 306 001(88) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VEXPANDPS, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+32422, 543, 5304}, + /* 5 : VEXPANDPS zmmreg|mask|z,zmmreg [rm:t1s: evex.512.66.0f38.w0 88 /r ] AVX512,FUTURE */ + /* 250(f2 7d 48) 306 001(88) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VEXPANDPS, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+32431, 544, 5305}, +}; + +static const struct itemplate instrux_VEXTRACTF32X4[4] = { + /* 0 : VEXTRACTF32X4 xmmreg|mask|z,ymmreg,imm8 [mri: evex.256.66.0f3a.w0 19 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 250(f3 7d 28) 300 001(19) 101 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VEXTRACTF32X4, 3, {XMMREG,YMMREG,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18423, 543, 5306}, + /* 1 : VEXTRACTF32X4 xmmreg|mask|z,zmmreg,imm8 [mri: evex.512.66.0f3a.w0 19 /r ib ] AVX512,FUTURE */ + /* 250(f3 7d 48) 300 001(19) 101 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VEXTRACTF32X4, 3, {XMMREG,ZMMREG,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18433, 544, 5307}, + /* 2 : VEXTRACTF32X4 mem128|mask,ymmreg,imm8 [mri:t4: evex.256.66.0f3a.w0 19 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 250(f3 7d 28) 312 001(19) 101 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VEXTRACTF32X4, 3, {MEMORY|BITS128,YMMREG,IMM_NORMAL|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+18443, 543, 5308}, + /* 3 : VEXTRACTF32X4 mem128|mask,zmmreg,imm8 [mri:t4: evex.512.66.0f3a.w0 19 /r ib ] AVX512,FUTURE */ + /* 250(f3 7d 48) 312 001(19) 101 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VEXTRACTF32X4, 3, {MEMORY|BITS128,ZMMREG,IMM_NORMAL|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+18453, 544, 5309}, +}; + +static const struct itemplate instrux_VEXTRACTF32X8[2] = { + /* 0 : VEXTRACTF32X8 ymmreg|mask|z,zmmreg,imm8 [mri: evex.512.66.0f3a.w0 1b /r ib ] AVX512DQ,FUTURE */ + /* 250(f3 7d 48) 300 001(1b) 101 022 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VEXTRACTF32X8, 3, {YMMREG,ZMMREG,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18463, 547, 5310}, + /* 1 : VEXTRACTF32X8 mem256|mask,zmmreg,imm8 [mri:t8: evex.512.66.0f3a.w0 1b /r ib ] AVX512DQ,FUTURE */ + /* 250(f3 7d 48) 313 001(1b) 101 022 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VEXTRACTF32X8, 3, {MEMORY|BITS256,ZMMREG,IMM_NORMAL|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+18473, 547, 5311}, +}; + +static const struct itemplate instrux_VEXTRACTF64X2[4] = { + /* 0 : VEXTRACTF64X2 xmmreg|mask|z,ymmreg,imm8 [mri: evex.256.66.0f3a.w1 19 /r ib ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f3 fd 28) 300 001(19) 101 022 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VEXTRACTF64X2, 3, {XMMREG,YMMREG,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18483, 546, 5312}, + /* 1 : VEXTRACTF64X2 xmmreg|mask|z,zmmreg,imm8 [mri: evex.512.66.0f3a.w1 19 /r ib ] AVX512DQ,FUTURE */ + /* 250(f3 fd 48) 300 001(19) 101 022 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VEXTRACTF64X2, 3, {XMMREG,ZMMREG,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18493, 547, 5313}, + /* 2 : VEXTRACTF64X2 mem128|mask,ymmreg,imm8 [mri:t2: evex.256.66.0f3a.w1 19 /r ib ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f3 fd 28) 311 001(19) 101 022 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VEXTRACTF64X2, 3, {MEMORY|BITS128,YMMREG,IMM_NORMAL|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+18503, 546, 5314}, + /* 3 : VEXTRACTF64X2 mem128|mask,zmmreg,imm8 [mri:t2: evex.512.66.0f3a.w1 19 /r ib ] AVX512DQ,FUTURE */ + /* 250(f3 fd 48) 311 001(19) 101 022 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VEXTRACTF64X2, 3, {MEMORY|BITS128,ZMMREG,IMM_NORMAL|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+18513, 547, 5315}, +}; + +static const struct itemplate instrux_VEXTRACTF64X4[2] = { + /* 0 : VEXTRACTF64X4 ymmreg|mask|z,zmmreg,imm8 [mri: evex.512.66.0f3a.w1 1b /r ib ] AVX512,FUTURE */ + /* 250(f3 fd 48) 300 001(1b) 101 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VEXTRACTF64X4, 3, {YMMREG,ZMMREG,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18523, 544, 5316}, + /* 1 : VEXTRACTF64X4 mem256|mask,zmmreg,imm8 [mri:t4: evex.512.66.0f3a.w1 1b /r ib ] AVX512,FUTURE */ + /* 250(f3 fd 48) 312 001(1b) 101 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VEXTRACTF64X4, 3, {MEMORY|BITS256,ZMMREG,IMM_NORMAL|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+18533, 544, 5317}, +}; + +static const struct itemplate instrux_VEXTRACTI32X4[4] = { + /* 0 : VEXTRACTI32X4 xmmreg|mask|z,ymmreg,imm8 [mri: evex.256.66.0f3a.w0 39 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 250(f3 7d 28) 300 001(39) 101 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VEXTRACTI32X4, 3, {XMMREG,YMMREG,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18543, 543, 5318}, + /* 1 : VEXTRACTI32X4 xmmreg|mask|z,zmmreg,imm8 [mri: evex.512.66.0f3a.w0 39 /r ib ] AVX512,FUTURE */ + /* 250(f3 7d 48) 300 001(39) 101 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VEXTRACTI32X4, 3, {XMMREG,ZMMREG,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18553, 544, 5319}, + /* 2 : VEXTRACTI32X4 mem128|mask,ymmreg,imm8 [mri:t4: evex.256.66.0f3a.w0 39 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 250(f3 7d 28) 312 001(39) 101 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VEXTRACTI32X4, 3, {MEMORY|BITS128,YMMREG,IMM_NORMAL|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+18563, 543, 5320}, + /* 3 : VEXTRACTI32X4 mem128|mask,zmmreg,imm8 [mri:t4: evex.512.66.0f3a.w0 39 /r ib ] AVX512,FUTURE */ + /* 250(f3 7d 48) 312 001(39) 101 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VEXTRACTI32X4, 3, {MEMORY|BITS128,ZMMREG,IMM_NORMAL|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+18573, 544, 5321}, +}; + +static const struct itemplate instrux_VEXTRACTI32X8[2] = { + /* 0 : VEXTRACTI32X8 ymmreg|mask|z,zmmreg,imm8 [mri: evex.512.66.0f3a.w0 3b /r ib ] AVX512DQ,FUTURE */ + /* 250(f3 7d 48) 300 001(3b) 101 022 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VEXTRACTI32X8, 3, {YMMREG,ZMMREG,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18583, 547, 5322}, + /* 1 : VEXTRACTI32X8 mem256|mask,zmmreg,imm8 [mri:t8: evex.512.66.0f3a.w0 3b /r ib ] AVX512DQ,FUTURE */ + /* 250(f3 7d 48) 313 001(3b) 101 022 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VEXTRACTI32X8, 3, {MEMORY|BITS256,ZMMREG,IMM_NORMAL|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+18593, 547, 5323}, +}; + +static const struct itemplate instrux_VEXTRACTI64X2[4] = { + /* 0 : VEXTRACTI64X2 xmmreg|mask|z,ymmreg,imm8 [mri: evex.256.66.0f3a.w1 39 /r ib ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f3 fd 28) 300 001(39) 101 022 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VEXTRACTI64X2, 3, {XMMREG,YMMREG,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18603, 546, 5324}, + /* 1 : VEXTRACTI64X2 xmmreg|mask|z,zmmreg,imm8 [mri: evex.512.66.0f3a.w1 39 /r ib ] AVX512DQ,FUTURE */ + /* 250(f3 fd 48) 300 001(39) 101 022 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VEXTRACTI64X2, 3, {XMMREG,ZMMREG,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18613, 547, 5325}, + /* 2 : VEXTRACTI64X2 mem128|mask,ymmreg,imm8 [mri:t2: evex.256.66.0f3a.w1 39 /r ib ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f3 fd 28) 311 001(39) 101 022 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VEXTRACTI64X2, 3, {MEMORY|BITS128,YMMREG,IMM_NORMAL|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+18623, 546, 5326}, + /* 3 : VEXTRACTI64X2 mem128|mask,zmmreg,imm8 [mri:t2: evex.512.66.0f3a.w1 39 /r ib ] AVX512DQ,FUTURE */ + /* 250(f3 fd 48) 311 001(39) 101 022 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VEXTRACTI64X2, 3, {MEMORY|BITS128,ZMMREG,IMM_NORMAL|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+18633, 547, 5327}, +}; + +static const struct itemplate instrux_VEXTRACTI64X4[2] = { + /* 0 : VEXTRACTI64X4 ymmreg|mask|z,zmmreg,imm8 [mri: evex.512.66.0f3a.w1 3b /r ib ] AVX512,FUTURE */ + /* 250(f3 fd 48) 300 001(3b) 101 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VEXTRACTI64X4, 3, {YMMREG,ZMMREG,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18643, 544, 5328}, + /* 1 : VEXTRACTI64X4 mem256|mask,zmmreg,imm8 [mri:t4: evex.512.66.0f3a.w1 3b /r ib ] AVX512,FUTURE */ + /* 250(f3 fd 48) 312 001(3b) 101 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VEXTRACTI64X4, 3, {MEMORY|BITS256,ZMMREG,IMM_NORMAL|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+18653, 544, 5329}, +}; + +static const struct itemplate instrux_VFIXUPIMMPD[6] = { + /* 0 : VFIXUPIMMPD xmmreg|mask|z,xmmreg*,xmmrm128|b64,imm8 [rvmi:fv: evex.nds.128.66.0f3a.w1 54 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 08) 301 001(54) 120 023 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFIXUPIMMPD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18673, 543, 5333}, + /* 1 : VFIXUPIMMPD xmmreg|mask|z,xmmrm128|b64,imm8 [r+vmi:fv: evex.nds.128.66.0f3a.w1 54 /r ib ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f3 fd 08) 301 001(54) 110 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFIXUPIMMPD, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+18683, 543, 5333}, + /* 2 : VFIXUPIMMPD ymmreg|mask|z,ymmreg*,ymmrm256|b64,imm8 [rvmi:fv: evex.nds.256.66.0f3a.w1 54 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 28) 301 001(54) 120 023 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFIXUPIMMPD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18693, 543, 5334}, + /* 3 : VFIXUPIMMPD ymmreg|mask|z,ymmrm256|b64,imm8 [r+vmi:fv: evex.nds.256.66.0f3a.w1 54 /r ib ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f3 fd 28) 301 001(54) 110 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFIXUPIMMPD, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+18703, 543, 5334}, + /* 4 : VFIXUPIMMPD zmmreg|mask|z,zmmreg*,zmmrm512|b64|sae,imm8 [rvmi:fv: evex.nds.512.66.0f3a.w1 54 /r ib ] AVX512,FUTURE */ + /* 241(f3 fd 48) 301 001(54) 120 023 : EVEX,PROT,AVX512,FUTURE */ + {I_VFIXUPIMMPD, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B64|SAE,0,0}, nasm_bytecodes+18713, 544, 5335}, + /* 5 : VFIXUPIMMPD zmmreg|mask|z,zmmrm512|b64|sae,imm8 [r+vmi:fv: evex.nds.512.66.0f3a.w1 54 /r ib ] ND,AVX512,FUTURE */ + /* 240(f3 fd 48) 301 001(54) 110 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VFIXUPIMMPD, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+18723, 544, 5335}, +}; + +static const struct itemplate instrux_VFIXUPIMMPS[6] = { + /* 0 : VFIXUPIMMPS xmmreg|mask|z,xmmreg*,xmmrm128|b32,imm8 [rvmi:fv: evex.nds.128.66.0f3a.w0 54 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 08) 301 001(54) 120 023 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFIXUPIMMPS, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18733, 543, 5336}, + /* 1 : VFIXUPIMMPS xmmreg|mask|z,xmmrm128|b32,imm8 [r+vmi:fv: evex.nds.128.66.0f3a.w0 54 /r ib ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f3 7d 08) 301 001(54) 110 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFIXUPIMMPS, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+18743, 543, 5336}, + /* 2 : VFIXUPIMMPS ymmreg|mask|z,ymmreg*,ymmrm256|b32,imm8 [rvmi:fv: evex.nds.256.66.0f3a.w0 54 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 28) 301 001(54) 120 023 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFIXUPIMMPS, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18753, 543, 5337}, + /* 3 : VFIXUPIMMPS ymmreg|mask|z,ymmrm256|b32,imm8 [r+vmi:fv: evex.nds.256.66.0f3a.w0 54 /r ib ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f3 7d 28) 301 001(54) 110 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFIXUPIMMPS, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+18763, 543, 5337}, + /* 4 : VFIXUPIMMPS zmmreg|mask|z,zmmreg*,zmmrm512|b32|sae,imm8 [rvmi:fv: evex.nds.512.66.0f3a.w0 54 /r ib ] AVX512,FUTURE */ + /* 241(f3 7d 48) 301 001(54) 120 023 : EVEX,PROT,AVX512,FUTURE */ + {I_VFIXUPIMMPS, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B32|SAE,0,0}, nasm_bytecodes+18773, 544, 5338}, + /* 5 : VFIXUPIMMPS zmmreg|mask|z,zmmrm512|b32|sae,imm8 [r+vmi:fv: evex.nds.512.66.0f3a.w0 54 /r ib ] ND,AVX512,FUTURE */ + /* 240(f3 7d 48) 301 001(54) 110 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VFIXUPIMMPS, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+18783, 544, 5338}, +}; + +static const struct itemplate instrux_VFIXUPIMMSD[2] = { + /* 0 : VFIXUPIMMSD xmmreg|mask|z,xmmreg*,xmmrm64|sae,imm8 [rvmi:t1s: evex.nds.lig.66.0f3a.w1 55 /r ib ] AVX512,FUTURE */ + /* 241(f3 fd 08) 306 001(55) 120 023 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VFIXUPIMMSD, 4, {XMMREG,XMMREG,RM_XMM|BITS64,IMM_NORMAL|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+18793, 545, 5339}, + /* 1 : VFIXUPIMMSD xmmreg|mask|z,xmmrm64|sae,imm8 [r+vmi:t1s: evex.nds.lig.66.0f3a.w1 55 /r ib ] ND,AVX512,FUTURE */ + /* 240(f3 fd 08) 306 001(55) 110 022 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VFIXUPIMMSD, 3, {XMMREG,RM_XMM|BITS64,IMM_NORMAL|BITS8,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+18803, 545, 5339}, +}; + +static const struct itemplate instrux_VFIXUPIMMSS[2] = { + /* 0 : VFIXUPIMMSS xmmreg|mask|z,xmmreg*,xmmrm32|sae,imm8 [rvmi:t1s: evex.nds.lig.66.0f3a.w0 55 /r ib ] AVX512,FUTURE */ + /* 241(f3 7d 08) 306 001(55) 120 023 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VFIXUPIMMSS, 4, {XMMREG,XMMREG,RM_XMM|BITS32,IMM_NORMAL|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+18813, 545, 5340}, + /* 1 : VFIXUPIMMSS xmmreg|mask|z,xmmrm32|sae,imm8 [r+vmi:t1s: evex.nds.lig.66.0f3a.w0 55 /r ib ] ND,AVX512,FUTURE */ + /* 240(f3 7d 08) 306 001(55) 110 022 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VFIXUPIMMSS, 3, {XMMREG,RM_XMM|BITS32,IMM_NORMAL|BITS8,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+18823, 545, 5340}, +}; + +static const struct itemplate instrux_VFPCLASSPD[3] = { + /* 0 : VFPCLASSPD kreg|mask,xmmrm128|b64,imm8 [rmi:fv: evex.128.66.0f3a.w1 66 /r ib ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f3 fd 08) 301 001(66) 110 022 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VFPCLASSPD, 3, {OPMASKREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK,B64,0,0,0}, nasm_bytecodes+18833, 546, 5473}, + /* 1 : VFPCLASSPD kreg|mask,ymmrm256|b64,imm8 [rmi:fv: evex.256.66.0f3a.w1 66 /r ib ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f3 fd 28) 301 001(66) 110 022 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VFPCLASSPD, 3, {OPMASKREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK,B64,0,0,0}, nasm_bytecodes+18843, 546, 5474}, + /* 2 : VFPCLASSPD kreg|mask,zmmrm512|b64,imm8 [rmi:fv: evex.512.66.0f3a.w1 66 /r ib ] AVX512DQ,FUTURE */ + /* 250(f3 fd 48) 301 001(66) 110 022 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VFPCLASSPD, 3, {OPMASKREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK,B64,0,0,0}, nasm_bytecodes+18853, 547, 5475}, +}; + +static const struct itemplate instrux_VFPCLASSPS[3] = { + /* 0 : VFPCLASSPS kreg|mask,xmmrm128|b32,imm8 [rmi:fv: evex.128.66.0f3a.w0 66 /r ib ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f3 7d 08) 301 001(66) 110 022 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VFPCLASSPS, 3, {OPMASKREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK,B32,0,0,0}, nasm_bytecodes+18863, 546, 5476}, + /* 1 : VFPCLASSPS kreg|mask,ymmrm256|b32,imm8 [rmi:fv: evex.256.66.0f3a.w0 66 /r ib ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f3 7d 28) 301 001(66) 110 022 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VFPCLASSPS, 3, {OPMASKREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK,B32,0,0,0}, nasm_bytecodes+18873, 546, 5477}, + /* 2 : VFPCLASSPS kreg|mask,zmmrm512|b32,imm8 [rmi:fv: evex.512.66.0f3a.w0 66 /r ib ] AVX512DQ,FUTURE */ + /* 250(f3 7d 48) 301 001(66) 110 022 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VFPCLASSPS, 3, {OPMASKREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK,B32,0,0,0}, nasm_bytecodes+18883, 547, 5478}, +}; + +static const struct itemplate instrux_VFPCLASSSD[1] = { + /* 0 : VFPCLASSSD kreg|mask,xmmrm64,imm8 [rmi:t1s: evex.lig.66.0f3a.w1 67 /r ib ] AVX512DQ,FUTURE */ + /* 250(f3 fd 08) 306 001(67) 110 022 : LIG,EVEX,PROT,AVX512DQ,FUTURE */ + {I_VFPCLASSSD, 3, {OPMASKREG,RM_XMM|BITS64,IMM_NORMAL|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+18893, 553, 5479}, +}; + +static const struct itemplate instrux_VFPCLASSSS[1] = { + /* 0 : VFPCLASSSS kreg|mask,xmmrm32,imm8 [rmi:t1s: evex.lig.66.0f3a.w0 67 /r ib ] AVX512DQ,FUTURE */ + /* 250(f3 7d 08) 306 001(67) 110 022 : LIG,EVEX,PROT,AVX512DQ,FUTURE */ + {I_VFPCLASSSS, 3, {OPMASKREG,RM_XMM|BITS32,IMM_NORMAL|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+18903, 553, 5480}, +}; + +static const struct itemplate instrux_VGATHERPF0DPD[1] = { + /* 0 : VGATHERPF0DPD ymem64|mask [m:t1s: vsiby evex.512.66.0f38.w1 c6 /1 ] AVX512PF,FUTURE */ + /* 375 250(f2 fd 48) 306 001(c6) 201 : EVEX,PROT,AVX512PF,FUTURE */ + {I_VGATHERPF0DPD, 1, {YMEM|BITS64,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+18973, 554, 5487}, +}; + +static const struct itemplate instrux_VGATHERPF0DPS[1] = { + /* 0 : VGATHERPF0DPS zmem32|mask [m:t1s: vsibz evex.512.66.0f38.w0 c6 /1 ] AVX512PF,FUTURE */ + /* 376 250(f2 7d 48) 306 001(c6) 201 : EVEX,PROT,AVX512PF,FUTURE */ + {I_VGATHERPF0DPS, 1, {ZMEM|BITS32,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+18983, 554, 5488}, +}; + +static const struct itemplate instrux_VGATHERPF0QPD[1] = { + /* 0 : VGATHERPF0QPD zmem64|mask [m:t1s: vsibz evex.512.66.0f38.w1 c7 /1 ] AVX512PF,FUTURE */ + /* 376 250(f2 fd 48) 306 001(c7) 201 : EVEX,PROT,AVX512PF,FUTURE */ + {I_VGATHERPF0QPD, 1, {ZMEM|BITS64,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+18993, 554, 5489}, +}; + +static const struct itemplate instrux_VGATHERPF0QPS[1] = { + /* 0 : VGATHERPF0QPS zmem32|mask [m:t1s: vsibz evex.512.66.0f38.w0 c7 /1 ] AVX512PF,FUTURE */ + /* 376 250(f2 7d 48) 306 001(c7) 201 : EVEX,PROT,AVX512PF,FUTURE */ + {I_VGATHERPF0QPS, 1, {ZMEM|BITS32,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+19003, 554, 5490}, +}; + +static const struct itemplate instrux_VGATHERPF1DPD[1] = { + /* 0 : VGATHERPF1DPD ymem64|mask [m:t1s: vsiby evex.512.66.0f38.w1 c6 /2 ] AVX512PF,FUTURE */ + /* 375 250(f2 fd 48) 306 001(c6) 202 : EVEX,PROT,AVX512PF,FUTURE */ + {I_VGATHERPF1DPD, 1, {YMEM|BITS64,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+19013, 554, 5491}, +}; + +static const struct itemplate instrux_VGATHERPF1DPS[1] = { + /* 0 : VGATHERPF1DPS zmem32|mask [m:t1s: vsibz evex.512.66.0f38.w0 c6 /2 ] AVX512PF,FUTURE */ + /* 376 250(f2 7d 48) 306 001(c6) 202 : EVEX,PROT,AVX512PF,FUTURE */ + {I_VGATHERPF1DPS, 1, {ZMEM|BITS32,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+19023, 554, 5492}, +}; + +static const struct itemplate instrux_VGATHERPF1QPD[1] = { + /* 0 : VGATHERPF1QPD zmem64|mask [m:t1s: vsibz evex.512.66.0f38.w1 c7 /2 ] AVX512PF,FUTURE */ + /* 376 250(f2 fd 48) 306 001(c7) 202 : EVEX,PROT,AVX512PF,FUTURE */ + {I_VGATHERPF1QPD, 1, {ZMEM|BITS64,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+19033, 554, 5493}, +}; + +static const struct itemplate instrux_VGATHERPF1QPS[1] = { + /* 0 : VGATHERPF1QPS zmem32|mask [m:t1s: vsibz evex.512.66.0f38.w0 c7 /2 ] AVX512PF,FUTURE */ + /* 376 250(f2 7d 48) 306 001(c7) 202 : EVEX,PROT,AVX512PF,FUTURE */ + {I_VGATHERPF1QPS, 1, {ZMEM|BITS32,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+19043, 554, 5494}, +}; + +static const struct itemplate instrux_VGETEXPPD[3] = { + /* 0 : VGETEXPPD xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.66.0f38.w1 42 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 fd 08) 301 001(42) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VGETEXPPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+33628, 543, 5501}, + /* 1 : VGETEXPPD ymmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.66.0f38.w1 42 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 fd 28) 301 001(42) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VGETEXPPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+33637, 543, 5502}, + /* 2 : VGETEXPPD zmmreg|mask|z,zmmrm512|b64|sae [rm:fv: evex.512.66.0f38.w1 42 /r ] AVX512,FUTURE */ + /* 250(f2 fd 48) 301 001(42) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VGETEXPPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+33646, 544, 5503}, +}; + +static const struct itemplate instrux_VGETEXPPS[3] = { + /* 0 : VGETEXPPS xmmreg|mask|z,xmmrm128|b32 [rm:fv: evex.128.66.0f38.w0 42 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 08) 301 001(42) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VGETEXPPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+33655, 543, 5504}, + /* 1 : VGETEXPPS ymmreg|mask|z,ymmrm256|b32 [rm:fv: evex.256.66.0f38.w0 42 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 28) 301 001(42) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VGETEXPPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+33664, 543, 5505}, + /* 2 : VGETEXPPS zmmreg|mask|z,zmmrm512|b32|sae [rm:fv: evex.512.66.0f38.w0 42 /r ] AVX512,FUTURE */ + /* 250(f2 7d 48) 301 001(42) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VGETEXPPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+33673, 544, 5506}, +}; + +static const struct itemplate instrux_VGETEXPSD[1] = { + /* 0 : VGETEXPSD xmmreg|mask|z,xmmreg,xmmrm64|sae [rvm:t1s: evex.nds.lig.66.0f38.w1 43 /r ] AVX512,FUTURE */ + /* 241(f2 fd 08) 306 001(43) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VGETEXPSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+33682, 545, 5507}, +}; + +static const struct itemplate instrux_VGETEXPSS[1] = { + /* 0 : VGETEXPSS xmmreg|mask|z,xmmreg,xmmrm32|sae [rvm:t1s: evex.nds.lig.66.0f38.w0 43 /r ] AVX512,FUTURE */ + /* 241(f2 7d 08) 306 001(43) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VGETEXPSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+33691, 545, 5508}, +}; + +static const struct itemplate instrux_VGETMANTPD[3] = { + /* 0 : VGETMANTPD xmmreg|mask|z,xmmrm128|b64,imm8 [rmi:fv: evex.128.66.0f3a.w1 26 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 250(f3 fd 08) 301 001(26) 110 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VGETMANTPD, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+19113, 543, 5509}, + /* 1 : VGETMANTPD ymmreg|mask|z,ymmrm256|b64,imm8 [rmi:fv: evex.256.66.0f3a.w1 26 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 250(f3 fd 28) 301 001(26) 110 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VGETMANTPD, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+19123, 543, 5510}, + /* 2 : VGETMANTPD zmmreg|mask|z,zmmrm512|b64|sae,imm8 [rmi:fv: evex.512.66.0f3a.w1 26 /r ib ] AVX512,FUTURE */ + /* 250(f3 fd 48) 301 001(26) 110 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VGETMANTPD, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+19133, 544, 5511}, +}; + +static const struct itemplate instrux_VGETMANTPS[3] = { + /* 0 : VGETMANTPS xmmreg|mask|z,xmmrm128|b32,imm8 [rmi:fv: evex.128.66.0f3a.w0 26 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 250(f3 7d 08) 301 001(26) 110 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VGETMANTPS, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+19143, 543, 5512}, + /* 1 : VGETMANTPS ymmreg|mask|z,ymmrm256|b32,imm8 [rmi:fv: evex.256.66.0f3a.w0 26 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 250(f3 7d 28) 301 001(26) 110 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VGETMANTPS, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+19153, 543, 5513}, + /* 2 : VGETMANTPS zmmreg|mask|z,zmmrm512|b32|sae,imm8 [rmi:fv: evex.512.66.0f3a.w0 26 /r ib ] AVX512,FUTURE */ + /* 250(f3 7d 48) 301 001(26) 110 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VGETMANTPS, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+19163, 544, 5514}, +}; + +static const struct itemplate instrux_VGETMANTSD[1] = { + /* 0 : VGETMANTSD xmmreg|mask|z,xmmreg,xmmrm64|sae,imm8 [rvmi:t1s: evex.nds.lig.66.0f3a.w1 27 /r ib ] AVX512,FUTURE */ + /* 241(f3 fd 08) 306 001(27) 120 023 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VGETMANTSD, 4, {XMMREG,XMMREG,RM_XMM|BITS64,IMM_NORMAL|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+19173, 545, 5515}, +}; + +static const struct itemplate instrux_VGETMANTSS[1] = { + /* 0 : VGETMANTSS xmmreg|mask|z,xmmreg,xmmrm32|sae,imm8 [rvmi:t1s: evex.nds.lig.66.0f3a.w0 27 /r ib ] AVX512,FUTURE */ + /* 241(f3 7d 08) 306 001(27) 120 023 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VGETMANTSS, 4, {XMMREG,XMMREG,RM_XMM|BITS32,IMM_NORMAL|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+19183, 545, 5516}, +}; + +static const struct itemplate instrux_VINSERTF32X4[4] = { + /* 0 : VINSERTF32X4 ymmreg|mask|z,ymmreg*,xmmrm128,imm8 [rvmi:t4: evex.nds.256.66.0f3a.w0 18 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 28) 312 001(18) 120 023 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VINSERTF32X4, 4, {YMMREG,YMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19193, 543, 5517}, + /* 1 : VINSERTF32X4 ymmreg|mask|z,xmmrm128,imm8 [r+vmi:t4: evex.nds.256.66.0f3a.w0 18 /r ib ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f3 7d 28) 312 001(18) 110 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VINSERTF32X4, 3, {YMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19203, 543, 5517}, + /* 2 : VINSERTF32X4 zmmreg|mask|z,zmmreg*,xmmrm128,imm8 [rvmi:t4: evex.nds.512.66.0f3a.w0 18 /r ib ] AVX512,FUTURE */ + /* 241(f3 7d 48) 312 001(18) 120 023 : EVEX,PROT,AVX512,FUTURE */ + {I_VINSERTF32X4, 4, {ZMMREG,ZMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19213, 544, 5518}, + /* 3 : VINSERTF32X4 zmmreg|mask|z,xmmrm128,imm8 [r+vmi:t4: evex.nds.512.66.0f3a.w0 18 /r ib ] ND,AVX512,FUTURE */ + /* 240(f3 7d 48) 312 001(18) 110 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VINSERTF32X4, 3, {ZMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19223, 544, 5518}, +}; + +static const struct itemplate instrux_VINSERTF32X8[2] = { + /* 0 : VINSERTF32X8 zmmreg|mask|z,zmmreg*,ymmrm256,imm8 [rvmi:t8: evex.nds.512.66.0f3a.w0 1a /r ib ] AVX512DQ,FUTURE */ + /* 241(f3 7d 48) 313 001(1a) 120 023 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VINSERTF32X8, 4, {ZMMREG,ZMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19233, 547, 5519}, + /* 1 : VINSERTF32X8 zmmreg|mask|z,ymmrm256,imm8 [r+vmi:t8: evex.nds.512.66.0f3a.w0 1a /r ib ] ND,AVX512DQ,FUTURE */ + /* 240(f3 7d 48) 313 001(1a) 110 022 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VINSERTF32X8, 3, {ZMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19243, 547, 5519}, +}; + +static const struct itemplate instrux_VINSERTF64X2[4] = { + /* 0 : VINSERTF64X2 ymmreg|mask|z,ymmreg*,xmmrm128,imm8 [rvmi:t2: evex.nds.256.66.0f3a.w1 18 /r ib ] AVX512VL,AVX512DQ,FUTURE */ + /* 241(f3 fd 28) 311 001(18) 120 023 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VINSERTF64X2, 4, {YMMREG,YMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19253, 546, 5520}, + /* 1 : VINSERTF64X2 ymmreg|mask|z,xmmrm128,imm8 [r+vmi:t2: evex.nds.256.66.0f3a.w1 18 /r ib ] ND,AVX512VL,AVX512DQ,FUTURE */ + /* 240(f3 fd 28) 311 001(18) 110 022 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VINSERTF64X2, 3, {YMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19263, 546, 5520}, + /* 2 : VINSERTF64X2 zmmreg|mask|z,zmmreg*,xmmrm128,imm8 [rvmi:t2: evex.nds.512.66.0f3a.w1 18 /r ib ] AVX512DQ,FUTURE */ + /* 241(f3 fd 48) 311 001(18) 120 023 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VINSERTF64X2, 4, {ZMMREG,ZMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19273, 547, 5521}, + /* 3 : VINSERTF64X2 zmmreg|mask|z,xmmrm128,imm8 [r+vmi:t2: evex.nds.512.66.0f3a.w1 18 /r ib ] ND,AVX512DQ,FUTURE */ + /* 240(f3 fd 48) 311 001(18) 110 022 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VINSERTF64X2, 3, {ZMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19283, 547, 5521}, +}; + +static const struct itemplate instrux_VINSERTF64X4[2] = { + /* 0 : VINSERTF64X4 zmmreg|mask|z,zmmreg*,ymmrm256,imm8 [rvmi:t4: evex.nds.512.66.0f3a.w1 1a /r ib ] AVX512,FUTURE */ + /* 241(f3 fd 48) 312 001(1a) 120 023 : EVEX,PROT,AVX512,FUTURE */ + {I_VINSERTF64X4, 4, {ZMMREG,ZMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19293, 544, 5522}, + /* 1 : VINSERTF64X4 zmmreg|mask|z,ymmrm256,imm8 [r+vmi:t4: evex.nds.512.66.0f3a.w1 1a /r ib ] ND,AVX512,FUTURE */ + /* 240(f3 fd 48) 312 001(1a) 110 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VINSERTF64X4, 3, {ZMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19303, 544, 5522}, +}; + +static const struct itemplate instrux_VINSERTI32X4[4] = { + /* 0 : VINSERTI32X4 ymmreg|mask|z,ymmreg*,xmmrm128,imm8 [rvmi:t4: evex.nds.256.66.0f3a.w0 38 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 28) 312 001(38) 120 023 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VINSERTI32X4, 4, {YMMREG,YMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19313, 543, 5523}, + /* 1 : VINSERTI32X4 ymmreg|mask|z,xmmrm128,imm8 [r+vmi:t4: evex.nds.256.66.0f3a.w0 38 /r ib ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f3 7d 28) 312 001(38) 110 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VINSERTI32X4, 3, {YMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19323, 543, 5523}, + /* 2 : VINSERTI32X4 zmmreg|mask|z,zmmreg*,xmmrm128,imm8 [rvmi:t4: evex.nds.512.66.0f3a.w0 38 /r ib ] AVX512,FUTURE */ + /* 241(f3 7d 48) 312 001(38) 120 023 : EVEX,PROT,AVX512,FUTURE */ + {I_VINSERTI32X4, 4, {ZMMREG,ZMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19333, 544, 5524}, + /* 3 : VINSERTI32X4 zmmreg|mask|z,xmmrm128,imm8 [r+vmi:t4: evex.nds.512.66.0f3a.w0 38 /r ib ] ND,AVX512,FUTURE */ + /* 240(f3 7d 48) 312 001(38) 110 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VINSERTI32X4, 3, {ZMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19343, 544, 5524}, +}; + +static const struct itemplate instrux_VINSERTI32X8[2] = { + /* 0 : VINSERTI32X8 zmmreg|mask|z,zmmreg*,ymmrm256,imm8 [rvmi:t8: evex.nds.512.66.0f3a.w0 3a /r ib ] AVX512DQ,FUTURE */ + /* 241(f3 7d 48) 313 001(3a) 120 023 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VINSERTI32X8, 4, {ZMMREG,ZMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19353, 547, 5525}, + /* 1 : VINSERTI32X8 zmmreg|mask|z,ymmrm256,imm8 [r+vmi:t8: evex.nds.512.66.0f3a.w0 3a /r ib ] ND,AVX512DQ,FUTURE */ + /* 240(f3 7d 48) 313 001(3a) 110 022 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VINSERTI32X8, 3, {ZMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19363, 547, 5525}, +}; + +static const struct itemplate instrux_VINSERTI64X2[4] = { + /* 0 : VINSERTI64X2 ymmreg|mask|z,ymmreg*,xmmrm128,imm8 [rvmi:t2: evex.nds.256.66.0f3a.w1 38 /r ib ] AVX512VL,AVX512DQ,FUTURE */ + /* 241(f3 fd 28) 311 001(38) 120 023 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VINSERTI64X2, 4, {YMMREG,YMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19373, 546, 5526}, + /* 1 : VINSERTI64X2 ymmreg|mask|z,xmmrm128,imm8 [r+vmi:t2: evex.nds.256.66.0f3a.w1 38 /r ib ] ND,AVX512VL,AVX512DQ,FUTURE */ + /* 240(f3 fd 28) 311 001(38) 110 022 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VINSERTI64X2, 3, {YMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19383, 546, 5526}, + /* 2 : VINSERTI64X2 zmmreg|mask|z,zmmreg*,xmmrm128,imm8 [rvmi:t2: evex.nds.512.66.0f3a.w1 38 /r ib ] AVX512DQ,FUTURE */ + /* 241(f3 fd 48) 311 001(38) 120 023 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VINSERTI64X2, 4, {ZMMREG,ZMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19393, 547, 5527}, + /* 3 : VINSERTI64X2 zmmreg|mask|z,xmmrm128,imm8 [r+vmi:t2: evex.nds.512.66.0f3a.w1 38 /r ib ] ND,AVX512DQ,FUTURE */ + /* 240(f3 fd 48) 311 001(38) 110 022 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VINSERTI64X2, 3, {ZMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19403, 547, 5527}, +}; + +static const struct itemplate instrux_VINSERTI64X4[2] = { + /* 0 : VINSERTI64X4 zmmreg|mask|z,zmmreg*,ymmrm256,imm8 [rvmi:t4: evex.nds.512.66.0f3a.w1 3a /r ib ] AVX512,FUTURE */ + /* 241(f3 fd 48) 312 001(3a) 120 023 : EVEX,PROT,AVX512,FUTURE */ + {I_VINSERTI64X4, 4, {ZMMREG,ZMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19413, 544, 5528}, + /* 1 : VINSERTI64X4 zmmreg|mask|z,ymmrm256,imm8 [r+vmi:t4: evex.nds.512.66.0f3a.w1 3a /r ib ] ND,AVX512,FUTURE */ + /* 240(f3 fd 48) 312 001(3a) 110 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VINSERTI64X4, 3, {ZMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19423, 544, 5528}, +}; + +static const struct itemplate instrux_VMOVDQA32[6] = { + /* 0 : VMOVDQA32 xmmreg|mask|z,xmmrm128 [rm:fvm: evex.128.66.0f.w0 6f /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7d 08) 303 001(6f) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVDQA32, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34195, 543, 5569}, + /* 1 : VMOVDQA32 ymmreg|mask|z,ymmrm256 [rm:fvm: evex.256.66.0f.w0 6f /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7d 28) 303 001(6f) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVDQA32, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34204, 543, 5570}, + /* 2 : VMOVDQA32 zmmreg|mask|z,zmmrm512 [rm:fvm: evex.512.66.0f.w0 6f /r ] AVX512,FUTURE */ + /* 250(f1 7d 48) 303 001(6f) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVDQA32, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34213, 544, 5571}, + /* 3 : VMOVDQA32 xmmrm128|mask|z,xmmreg [mr:fvm: evex.128.66.0f.w0 7f /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7d 08) 303 001(7f) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVDQA32, 2, {RM_XMM|BITS128,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34222, 543, 5572}, + /* 4 : VMOVDQA32 ymmrm256|mask|z,ymmreg [mr:fvm: evex.256.66.0f.w0 7f /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7d 28) 303 001(7f) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVDQA32, 2, {RM_YMM|BITS256,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34231, 543, 5573}, + /* 5 : VMOVDQA32 zmmrm512|mask|z,zmmreg [mr:fvm: evex.512.66.0f.w0 7f /r ] AVX512,FUTURE */ + /* 250(f1 7d 48) 303 001(7f) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVDQA32, 2, {RM_ZMM|BITS512,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34240, 544, 5574}, +}; + +static const struct itemplate instrux_VMOVDQA64[6] = { + /* 0 : VMOVDQA64 xmmreg|mask|z,xmmrm128 [rm:fvm: evex.128.66.0f.w1 6f /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 fd 08) 303 001(6f) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVDQA64, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34249, 543, 5575}, + /* 1 : VMOVDQA64 ymmreg|mask|z,ymmrm256 [rm:fvm: evex.256.66.0f.w1 6f /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 fd 28) 303 001(6f) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVDQA64, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34258, 543, 5576}, + /* 2 : VMOVDQA64 zmmreg|mask|z,zmmrm512 [rm:fvm: evex.512.66.0f.w1 6f /r ] AVX512,FUTURE */ + /* 250(f1 fd 48) 303 001(6f) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVDQA64, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34267, 544, 5577}, + /* 3 : VMOVDQA64 xmmrm128|mask|z,xmmreg [mr:fvm: evex.128.66.0f.w1 7f /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 fd 08) 303 001(7f) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVDQA64, 2, {RM_XMM|BITS128,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34276, 543, 5578}, + /* 4 : VMOVDQA64 ymmrm256|mask|z,ymmreg [mr:fvm: evex.256.66.0f.w1 7f /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 fd 28) 303 001(7f) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVDQA64, 2, {RM_YMM|BITS256,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34285, 543, 5579}, + /* 5 : VMOVDQA64 zmmrm512|mask|z,zmmreg [mr:fvm: evex.512.66.0f.w1 7f /r ] AVX512,FUTURE */ + /* 250(f1 fd 48) 303 001(7f) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVDQA64, 2, {RM_ZMM|BITS512,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34294, 544, 5580}, +}; + +static const struct itemplate instrux_VMOVDQU16[6] = { + /* 0 : VMOVDQU16 xmmreg|mask|z,xmmrm128 [rm:fvm: evex.128.f2.0f.w1 6f /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f1 ff 08) 303 001(6f) 110 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VMOVDQU16, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34303, 549, 5581}, + /* 1 : VMOVDQU16 ymmreg|mask|z,ymmrm256 [rm:fvm: evex.256.f2.0f.w1 6f /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f1 ff 28) 303 001(6f) 110 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VMOVDQU16, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34312, 549, 5582}, + /* 2 : VMOVDQU16 zmmreg|mask|z,zmmrm512 [rm:fvm: evex.512.f2.0f.w1 6f /r ] AVX512BW,FUTURE */ + /* 250(f1 ff 48) 303 001(6f) 110 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VMOVDQU16, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34321, 550, 5583}, + /* 3 : VMOVDQU16 xmmrm128|mask|z,xmmreg [mr:fvm: evex.128.f2.0f.w1 7f /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f1 ff 08) 303 001(7f) 101 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VMOVDQU16, 2, {RM_XMM|BITS128,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34330, 549, 5584}, + /* 4 : VMOVDQU16 ymmrm256|mask|z,ymmreg [mr:fvm: evex.256.f2.0f.w1 7f /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f1 ff 28) 303 001(7f) 101 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VMOVDQU16, 2, {RM_YMM|BITS256,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34339, 549, 5585}, + /* 5 : VMOVDQU16 zmmrm512|mask|z,zmmreg [mr:fvm: evex.512.f2.0f.w1 7f /r ] AVX512BW,FUTURE */ + /* 250(f1 ff 48) 303 001(7f) 101 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VMOVDQU16, 2, {RM_ZMM|BITS512,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34348, 550, 5586}, +}; + +static const struct itemplate instrux_VMOVDQU32[6] = { + /* 0 : VMOVDQU32 xmmreg|mask|z,xmmrm128 [rm:fvm: evex.128.f3.0f.w0 6f /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7e 08) 303 001(6f) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVDQU32, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34357, 543, 5587}, + /* 1 : VMOVDQU32 ymmreg|mask|z,ymmrm256 [rm:fvm: evex.256.f3.0f.w0 6f /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7e 28) 303 001(6f) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVDQU32, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34366, 543, 5588}, + /* 2 : VMOVDQU32 zmmreg|mask|z,zmmrm512 [rm:fvm: evex.512.f3.0f.w0 6f /r ] AVX512,FUTURE */ + /* 250(f1 7e 48) 303 001(6f) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVDQU32, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34375, 544, 5589}, + /* 3 : VMOVDQU32 xmmrm128|mask|z,xmmreg [mr:fvm: evex.128.f3.0f.w0 7f /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7e 08) 303 001(7f) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVDQU32, 2, {RM_XMM|BITS128,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34384, 543, 5590}, + /* 4 : VMOVDQU32 ymmrm256|mask|z,ymmreg [mr:fvm: evex.256.f3.0f.w0 7f /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7e 28) 303 001(7f) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVDQU32, 2, {RM_YMM|BITS256,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34393, 543, 5591}, + /* 5 : VMOVDQU32 zmmrm512|mask|z,zmmreg [mr:fvm: evex.512.f3.0f.w0 7f /r ] AVX512,FUTURE */ + /* 250(f1 7e 48) 303 001(7f) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVDQU32, 2, {RM_ZMM|BITS512,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34402, 544, 5592}, +}; + +static const struct itemplate instrux_VMOVDQU64[6] = { + /* 0 : VMOVDQU64 xmmreg|mask|z,xmmrm128 [rm:fvm: evex.128.f3.0f.w1 6f /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 fe 08) 303 001(6f) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVDQU64, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34411, 543, 5593}, + /* 1 : VMOVDQU64 ymmreg|mask|z,ymmrm256 [rm:fvm: evex.256.f3.0f.w1 6f /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 fe 28) 303 001(6f) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVDQU64, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34420, 543, 5594}, + /* 2 : VMOVDQU64 zmmreg|mask|z,zmmrm512 [rm:fvm: evex.512.f3.0f.w1 6f /r ] AVX512,FUTURE */ + /* 250(f1 fe 48) 303 001(6f) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVDQU64, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34429, 544, 5595}, + /* 3 : VMOVDQU64 xmmrm128|mask|z,xmmreg [mr:fvm: evex.128.f3.0f.w1 7f /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 fe 08) 303 001(7f) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVDQU64, 2, {RM_XMM|BITS128,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34438, 543, 5596}, + /* 4 : VMOVDQU64 ymmrm256|mask|z,ymmreg [mr:fvm: evex.256.f3.0f.w1 7f /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 fe 28) 303 001(7f) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVDQU64, 2, {RM_YMM|BITS256,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34447, 543, 5597}, + /* 5 : VMOVDQU64 zmmrm512|mask|z,zmmreg [mr:fvm: evex.512.f3.0f.w1 7f /r ] AVX512,FUTURE */ + /* 250(f1 fe 48) 303 001(7f) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVDQU64, 2, {RM_ZMM|BITS512,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34456, 544, 5598}, +}; + +static const struct itemplate instrux_VMOVDQU8[6] = { + /* 0 : VMOVDQU8 xmmreg|mask|z,xmmrm128 [rm:fvm: evex.128.f2.0f.w0 6f /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f1 7f 08) 303 001(6f) 110 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VMOVDQU8, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34465, 549, 5599}, + /* 1 : VMOVDQU8 ymmreg|mask|z,ymmrm256 [rm:fvm: evex.256.f2.0f.w0 6f /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f1 7f 28) 303 001(6f) 110 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VMOVDQU8, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34474, 549, 5600}, + /* 2 : VMOVDQU8 zmmreg|mask|z,zmmrm512 [rm:fvm: evex.512.f2.0f.w0 6f /r ] AVX512BW,FUTURE */ + /* 250(f1 7f 48) 303 001(6f) 110 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VMOVDQU8, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34483, 550, 5601}, + /* 3 : VMOVDQU8 xmmrm128|mask|z,xmmreg [mr:fvm: evex.128.f2.0f.w0 7f /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f1 7f 08) 303 001(7f) 101 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VMOVDQU8, 2, {RM_XMM|BITS128,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34492, 549, 5602}, + /* 4 : VMOVDQU8 ymmrm256|mask|z,ymmreg [mr:fvm: evex.256.f2.0f.w0 7f /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f1 7f 28) 303 001(7f) 101 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VMOVDQU8, 2, {RM_YMM|BITS256,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34501, 549, 5603}, + /* 5 : VMOVDQU8 zmmrm512|mask|z,zmmreg [mr:fvm: evex.512.f2.0f.w0 7f /r ] AVX512BW,FUTURE */ + /* 250(f1 7f 48) 303 001(7f) 101 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VMOVDQU8, 2, {RM_ZMM|BITS512,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34510, 550, 5604}, +}; + +static const struct itemplate instrux_VPABSQ[3] = { + /* 0 : VPABSQ xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.66.0f38.w1 1f /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 fd 08) 301 001(1f) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPABSQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+35437, 543, 5683}, + /* 1 : VPABSQ ymmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.66.0f38.w1 1f /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 fd 28) 301 001(1f) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPABSQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+35446, 543, 5684}, + /* 2 : VPABSQ zmmreg|mask|z,zmmrm512|b64 [rm:fv: evex.512.66.0f38.w1 1f /r ] AVX512,FUTURE */ + /* 250(f2 fd 48) 301 001(1f) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPABSQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+35455, 544, 5685}, +}; + +static const struct itemplate instrux_VPANDD[6] = { + /* 0 : VPANDD xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f.w0 db /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7d 08) 301 001(db) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPANDD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+36139, 543, 5728}, + /* 1 : VPANDD xmmreg|mask|z,xmmrm128|b32 [r+vm:fv: evex.nds.128.66.0f.w0 db /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 7d 08) 301 001(db) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPANDD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+36148, 543, 5728}, + /* 2 : VPANDD ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f.w0 db /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7d 28) 301 001(db) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPANDD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+36157, 543, 5729}, + /* 3 : VPANDD ymmreg|mask|z,ymmrm256|b32 [r+vm:fv: evex.nds.256.66.0f.w0 db /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 7d 28) 301 001(db) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPANDD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+36166, 543, 5729}, + /* 4 : VPANDD zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f.w0 db /r ] AVX512,FUTURE */ + /* 241(f1 7d 48) 301 001(db) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPANDD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+36175, 544, 5730}, + /* 5 : VPANDD zmmreg|mask|z,zmmrm512|b32 [r+vm:fv: evex.nds.512.66.0f.w0 db /r ] ND,AVX512,FUTURE */ + /* 240(f1 7d 48) 301 001(db) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPANDD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+36184, 544, 5730}, +}; + +static const struct itemplate instrux_VPANDND[6] = { + /* 0 : VPANDND xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f.w0 df /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7d 08) 301 001(df) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPANDND, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+36193, 543, 5731}, + /* 1 : VPANDND xmmreg|mask|z,xmmrm128|b32 [r+vm:fv: evex.nds.128.66.0f.w0 df /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 7d 08) 301 001(df) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPANDND, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+36202, 543, 5731}, + /* 2 : VPANDND ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f.w0 df /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7d 28) 301 001(df) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPANDND, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+36211, 543, 5732}, + /* 3 : VPANDND ymmreg|mask|z,ymmrm256|b32 [r+vm:fv: evex.nds.256.66.0f.w0 df /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 7d 28) 301 001(df) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPANDND, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+36220, 543, 5732}, + /* 4 : VPANDND zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f.w0 df /r ] AVX512,FUTURE */ + /* 241(f1 7d 48) 301 001(df) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPANDND, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+36229, 544, 5733}, + /* 5 : VPANDND zmmreg|mask|z,zmmrm512|b32 [r+vm:fv: evex.nds.512.66.0f.w0 df /r ] ND,AVX512,FUTURE */ + /* 240(f1 7d 48) 301 001(df) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPANDND, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+36238, 544, 5733}, +}; + +static const struct itemplate instrux_VPANDNQ[6] = { + /* 0 : VPANDNQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f.w1 df /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(df) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPANDNQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+36247, 543, 5734}, + /* 1 : VPANDNQ xmmreg|mask|z,xmmrm128|b64 [r+vm:fv: evex.nds.128.66.0f.w1 df /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 fd 08) 301 001(df) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPANDNQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+36256, 543, 5734}, + /* 2 : VPANDNQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f.w1 df /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(df) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPANDNQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+36265, 543, 5735}, + /* 3 : VPANDNQ ymmreg|mask|z,ymmrm256|b64 [r+vm:fv: evex.nds.256.66.0f.w1 df /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 fd 28) 301 001(df) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPANDNQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+36274, 543, 5735}, + /* 4 : VPANDNQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f.w1 df /r ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(df) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPANDNQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+36283, 544, 5736}, + /* 5 : VPANDNQ zmmreg|mask|z,zmmrm512|b64 [r+vm:fv: evex.nds.512.66.0f.w1 df /r ] ND,AVX512,FUTURE */ + /* 240(f1 fd 48) 301 001(df) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPANDNQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+36292, 544, 5736}, +}; + +static const struct itemplate instrux_VPANDQ[6] = { + /* 0 : VPANDQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f.w1 db /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(db) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPANDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+36301, 543, 5737}, + /* 1 : VPANDQ xmmreg|mask|z,xmmrm128|b64 [r+vm:fv: evex.nds.128.66.0f.w1 db /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 fd 08) 301 001(db) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPANDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+36310, 543, 5737}, + /* 2 : VPANDQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f.w1 db /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(db) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPANDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+36319, 543, 5738}, + /* 3 : VPANDQ ymmreg|mask|z,ymmrm256|b64 [r+vm:fv: evex.nds.256.66.0f.w1 db /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 fd 28) 301 001(db) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPANDQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+36328, 543, 5738}, + /* 4 : VPANDQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f.w1 db /r ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(db) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPANDQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+36337, 544, 5739}, + /* 5 : VPANDQ zmmreg|mask|z,zmmrm512|b64 [r+vm:fv: evex.nds.512.66.0f.w1 db /r ] ND,AVX512,FUTURE */ + /* 240(f1 fd 48) 301 001(db) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPANDQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+36346, 544, 5739}, +}; + +static const struct itemplate instrux_VPBLENDMB[3] = { + /* 0 : VPBLENDMB xmmreg|mask|z,xmmreg,xmmrm128 [rvm:fvm: evex.nds.128.66.0f38.w0 66 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 7d 08) 303 001(66) 120 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPBLENDMB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36463, 549, 5746}, + /* 1 : VPBLENDMB ymmreg|mask|z,ymmreg,ymmrm256 [rvm:fvm: evex.nds.256.66.0f38.w0 66 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 7d 28) 303 001(66) 120 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPBLENDMB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36472, 549, 5747}, + /* 2 : VPBLENDMB zmmreg|mask|z,zmmreg,zmmrm512 [rvm:fvm: evex.nds.512.66.0f38.w0 66 /r ] AVX512BW,FUTURE */ + /* 241(f2 7d 48) 303 001(66) 120 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPBLENDMB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36481, 550, 5748}, +}; + +static const struct itemplate instrux_VPBLENDMD[3] = { + /* 0 : VPBLENDMD xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 64 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(64) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPBLENDMD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+36490, 543, 5749}, + /* 1 : VPBLENDMD ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 64 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(64) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPBLENDMD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+36499, 543, 5750}, + /* 2 : VPBLENDMD zmmreg|mask|z,zmmreg,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f38.w0 64 /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(64) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPBLENDMD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+36508, 544, 5751}, +}; + +static const struct itemplate instrux_VPBLENDMQ[3] = { + /* 0 : VPBLENDMQ xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 64 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(64) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPBLENDMQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+36517, 543, 5752}, + /* 1 : VPBLENDMQ ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 64 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(64) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPBLENDMQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+36526, 543, 5753}, + /* 2 : VPBLENDMQ zmmreg|mask|z,zmmreg,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 64 /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(64) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPBLENDMQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+36535, 544, 5754}, +}; + +static const struct itemplate instrux_VPBLENDMW[3] = { + /* 0 : VPBLENDMW xmmreg|mask|z,xmmreg,xmmrm128 [rvm:fvm: evex.nds.128.66.0f38.w1 66 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 fd 08) 303 001(66) 120 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPBLENDMW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36544, 549, 5755}, + /* 1 : VPBLENDMW ymmreg|mask|z,ymmreg,ymmrm256 [rvm:fvm: evex.nds.256.66.0f38.w1 66 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 fd 28) 303 001(66) 120 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPBLENDMW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36553, 549, 5756}, + /* 2 : VPBLENDMW zmmreg|mask|z,zmmreg,zmmrm512 [rvm:fvm: evex.nds.512.66.0f38.w1 66 /r ] AVX512BW,FUTURE */ + /* 241(f2 fd 48) 303 001(66) 120 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPBLENDMW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36562, 550, 5757}, +}; + +static const struct itemplate instrux_VPBROADCASTMB2Q[3] = { + /* 0 : VPBROADCASTMB2Q xmmreg,kreg [rm: evex.128.f3.0f38.w1 2a /r ] AVX512CD,AVX512VL,FUTURE */ + /* 250(f2 fe 08) 300 001(2a) 110 : EVEX,PROT,AVX512CD,AVX512VL,FUTURE */ + {I_VPBROADCASTMB2Q, 2, {XMMREG,OPMASKREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+36706, 557, 5782}, + /* 1 : VPBROADCASTMB2Q ymmreg,kreg [rm: evex.256.f3.0f38.w1 2a /r ] AVX512CD,AVX512VL,FUTURE */ + /* 250(f2 fe 28) 300 001(2a) 110 : EVEX,PROT,AVX512CD,AVX512VL,FUTURE */ + {I_VPBROADCASTMB2Q, 2, {YMMREG,OPMASKREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+36715, 557, 5783}, + /* 2 : VPBROADCASTMB2Q zmmreg,kreg [rm: evex.512.f3.0f38.w1 2a /r ] AVX512CD,FUTURE */ + /* 250(f2 fe 48) 300 001(2a) 110 : EVEX,PROT,AVX512CD,FUTURE */ + {I_VPBROADCASTMB2Q, 2, {ZMMREG,OPMASKREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+36724, 558, 5784}, +}; + +static const struct itemplate instrux_VPBROADCASTMW2D[3] = { + /* 0 : VPBROADCASTMW2D xmmreg,kreg [rm: evex.128.f3.0f38.w0 3a /r ] AVX512CD,AVX512VL,FUTURE */ + /* 250(f2 7e 08) 300 001(3a) 110 : EVEX,PROT,AVX512CD,AVX512VL,FUTURE */ + {I_VPBROADCASTMW2D, 2, {XMMREG,OPMASKREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+36733, 557, 5785}, + /* 1 : VPBROADCASTMW2D ymmreg,kreg [rm: evex.256.f3.0f38.w0 3a /r ] AVX512CD,AVX512VL,FUTURE */ + /* 250(f2 7e 28) 300 001(3a) 110 : EVEX,PROT,AVX512CD,AVX512VL,FUTURE */ + {I_VPBROADCASTMW2D, 2, {YMMREG,OPMASKREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+36742, 557, 5786}, + /* 2 : VPBROADCASTMW2D zmmreg,kreg [rm: evex.512.f3.0f38.w0 3a /r ] AVX512CD,FUTURE */ + /* 250(f2 7e 48) 300 001(3a) 110 : EVEX,PROT,AVX512CD,FUTURE */ + {I_VPBROADCASTMW2D, 2, {ZMMREG,OPMASKREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+36751, 558, 5787}, +}; + +static const struct itemplate instrux_VPCMPEQUB[3] = { + /* 0 : VPCMPEQUB kreg|mask,xmmreg,xmmrm128 [rvmi:fvm: evex.nds.128.66.0f3a.w0 3e /r 00 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 08) 303 001(3e) 120 001(00) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPEQUB, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+7658, 549, 5845}, + /* 1 : VPCMPEQUB kreg|mask,ymmreg,ymmrm256 [rvmi:fvm: evex.nds.256.66.0f3a.w0 3e /r 00 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 28) 303 001(3e) 120 001(00) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPEQUB, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+7669, 549, 5846}, + /* 2 : VPCMPEQUB kreg|mask,zmmreg,zmmrm512 [rvmi:fvm: evex.nds.512.66.0f3a.w0 3e /r 00 ] AVX512BW,FUTURE */ + /* 241(f3 7d 48) 303 001(3e) 120 001(00) : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPEQUB, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+7680, 550, 5847}, +}; + +static const struct itemplate instrux_VPCMPEQUD[3] = { + /* 0 : VPCMPEQUD kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.66.0f3a.w0 1e /r 00 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 08) 301 001(1e) 120 001(00) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPEQUD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+7691, 543, 5848}, + /* 1 : VPCMPEQUD kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.66.0f3a.w0 1e /r 00 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 28) 301 001(1e) 120 001(00) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPEQUD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+7702, 543, 5849}, + /* 2 : VPCMPEQUD kreg|mask,zmmreg,zmmrm512|b32 [rvmi:fv: evex.nds.512.66.0f3a.w0 1e /r 00 ] AVX512,FUTURE */ + /* 241(f3 7d 48) 301 001(1e) 120 001(00) : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPEQUD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+7713, 544, 5850}, +}; + +static const struct itemplate instrux_VPCMPEQUQ[3] = { + /* 0 : VPCMPEQUQ kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f3a.w1 1e /r 00 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 08) 301 001(1e) 120 001(00) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPEQUQ, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+7724, 543, 5851}, + /* 1 : VPCMPEQUQ kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f3a.w1 1e /r 00 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 28) 301 001(1e) 120 001(00) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPEQUQ, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+7735, 543, 5852}, + /* 2 : VPCMPEQUQ kreg|mask,zmmreg,zmmrm512|b64 [rvmi:fv: evex.nds.512.66.0f3a.w1 1e /r 00 ] AVX512,FUTURE */ + /* 241(f3 fd 48) 301 001(1e) 120 001(00) : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPEQUQ, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+7746, 544, 5853}, +}; + +static const struct itemplate instrux_VPCMPEQUW[3] = { + /* 0 : VPCMPEQUW kreg|mask,xmmreg,xmmrm128 [rvmi:fvm: evex.nds.128.66.0f3a.w1 3e /r 00 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 08) 303 001(3e) 120 001(00) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPEQUW, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+7757, 549, 5854}, + /* 1 : VPCMPEQUW kreg|mask,ymmreg,ymmrm256 [rvmi:fvm: evex.nds.256.66.0f3a.w1 3e /r 00 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 28) 303 001(3e) 120 001(00) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPEQUW, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+7768, 549, 5855}, + /* 2 : VPCMPEQUW kreg|mask,zmmreg,zmmrm512 [rvmi:fvm: evex.nds.512.66.0f3a.w1 3e /r 00 ] AVX512BW,FUTURE */ + /* 241(f3 fd 48) 303 001(3e) 120 001(00) : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPEQUW, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+7779, 550, 5856}, +}; + +static const struct itemplate instrux_VPCMPGEB[3] = { + /* 0 : VPCMPGEB kreg|mask,xmmreg,xmmrm128 [rvmi:fvm: evex.nds.128.66.0f3a.w0 3f /r 05 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 08) 303 001(3f) 120 001(05) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPGEB, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+7823, 549, 5860}, + /* 1 : VPCMPGEB kreg|mask,ymmreg,ymmrm256 [rvmi:fvm: evex.nds.256.66.0f3a.w0 3f /r 05 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 28) 303 001(3f) 120 001(05) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPGEB, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+7834, 549, 5861}, + /* 2 : VPCMPGEB kreg|mask,zmmreg,zmmrm512 [rvmi:fvm: evex.nds.512.66.0f3a.w0 3f /r 05 ] AVX512BW,FUTURE */ + /* 241(f3 7d 48) 303 001(3f) 120 001(05) : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPGEB, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+7845, 550, 5862}, +}; + +static const struct itemplate instrux_VPCMPGED[3] = { + /* 0 : VPCMPGED kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.66.0f3a.w0 1f /r 05 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 08) 301 001(1f) 120 001(05) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPGED, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+7856, 543, 5863}, + /* 1 : VPCMPGED kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.66.0f3a.w0 1f /r 05 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 28) 301 001(1f) 120 001(05) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPGED, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+7867, 543, 5864}, + /* 2 : VPCMPGED kreg|mask,zmmreg,zmmrm512|b32 [rvmi:fv: evex.nds.512.66.0f3a.w0 1f /r 05 ] AVX512,FUTURE */ + /* 241(f3 7d 48) 301 001(1f) 120 001(05) : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPGED, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+7878, 544, 5865}, +}; + +static const struct itemplate instrux_VPCMPGEQ[3] = { + /* 0 : VPCMPGEQ kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f3a.w1 1f /r 05 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 08) 301 001(1f) 120 001(05) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPGEQ, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+7889, 543, 5866}, + /* 1 : VPCMPGEQ kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f3a.w1 1f /r 05 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 28) 301 001(1f) 120 001(05) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPGEQ, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+7900, 543, 5867}, + /* 2 : VPCMPGEQ kreg|mask,zmmreg,zmmrm512|b64 [rvmi:fv: evex.nds.512.66.0f3a.w1 1f /r 05 ] AVX512,FUTURE */ + /* 241(f3 fd 48) 301 001(1f) 120 001(05) : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPGEQ, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+7911, 544, 5868}, +}; + +static const struct itemplate instrux_VPCMPGEUB[3] = { + /* 0 : VPCMPGEUB kreg|mask,xmmreg,xmmrm128 [rvmi:fvm: evex.nds.128.66.0f3a.w0 3e /r 05 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 08) 303 001(3e) 120 001(05) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPGEUB, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+7922, 549, 5869}, + /* 1 : VPCMPGEUB kreg|mask,ymmreg,ymmrm256 [rvmi:fvm: evex.nds.256.66.0f3a.w0 3e /r 05 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 28) 303 001(3e) 120 001(05) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPGEUB, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+7933, 549, 5870}, + /* 2 : VPCMPGEUB kreg|mask,zmmreg,zmmrm512 [rvmi:fvm: evex.nds.512.66.0f3a.w0 3e /r 05 ] AVX512BW,FUTURE */ + /* 241(f3 7d 48) 303 001(3e) 120 001(05) : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPGEUB, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+7944, 550, 5871}, +}; + +static const struct itemplate instrux_VPCMPGEUD[3] = { + /* 0 : VPCMPGEUD kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.66.0f3a.w0 1e /r 05 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 08) 301 001(1e) 120 001(05) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPGEUD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+7955, 543, 5872}, + /* 1 : VPCMPGEUD kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.66.0f3a.w0 1e /r 05 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 28) 301 001(1e) 120 001(05) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPGEUD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+7966, 543, 5873}, + /* 2 : VPCMPGEUD kreg|mask,zmmreg,zmmrm512|b32 [rvmi:fv: evex.nds.512.66.0f3a.w0 1e /r 05 ] AVX512,FUTURE */ + /* 241(f3 7d 48) 301 001(1e) 120 001(05) : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPGEUD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+7977, 544, 5874}, +}; + +static const struct itemplate instrux_VPCMPGEUQ[3] = { + /* 0 : VPCMPGEUQ kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f3a.w1 1e /r 05 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 08) 301 001(1e) 120 001(05) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPGEUQ, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+7988, 543, 5875}, + /* 1 : VPCMPGEUQ kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f3a.w1 1e /r 05 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 28) 301 001(1e) 120 001(05) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPGEUQ, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+7999, 543, 5876}, + /* 2 : VPCMPGEUQ kreg|mask,zmmreg,zmmrm512|b64 [rvmi:fv: evex.nds.512.66.0f3a.w1 1e /r 05 ] AVX512,FUTURE */ + /* 241(f3 fd 48) 301 001(1e) 120 001(05) : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPGEUQ, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8010, 544, 5877}, +}; + +static const struct itemplate instrux_VPCMPGEUW[3] = { + /* 0 : VPCMPGEUW kreg|mask,xmmreg,xmmrm128 [rvmi:fvm: evex.nds.128.66.0f3a.w1 3e /r 05 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 08) 303 001(3e) 120 001(05) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPGEUW, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8021, 549, 5878}, + /* 1 : VPCMPGEUW kreg|mask,ymmreg,ymmrm256 [rvmi:fvm: evex.nds.256.66.0f3a.w1 3e /r 05 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 28) 303 001(3e) 120 001(05) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPGEUW, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8032, 549, 5879}, + /* 2 : VPCMPGEUW kreg|mask,zmmreg,zmmrm512 [rvmi:fvm: evex.nds.512.66.0f3a.w1 3e /r 05 ] AVX512BW,FUTURE */ + /* 241(f3 fd 48) 303 001(3e) 120 001(05) : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPGEUW, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8043, 550, 5880}, +}; + +static const struct itemplate instrux_VPCMPGEW[3] = { + /* 0 : VPCMPGEW kreg|mask,xmmreg,xmmrm128 [rvmi:fvm: evex.nds.128.66.0f3a.w1 3f /r 05 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 08) 303 001(3f) 120 001(05) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPGEW, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8054, 549, 5881}, + /* 1 : VPCMPGEW kreg|mask,ymmreg,ymmrm256 [rvmi:fvm: evex.nds.256.66.0f3a.w1 3f /r 05 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 28) 303 001(3f) 120 001(05) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPGEW, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8065, 549, 5882}, + /* 2 : VPCMPGEW kreg|mask,zmmreg,zmmrm512 [rvmi:fvm: evex.nds.512.66.0f3a.w1 3f /r 05 ] AVX512BW,FUTURE */ + /* 241(f3 fd 48) 303 001(3f) 120 001(05) : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPGEW, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8076, 550, 5883}, +}; + +static const struct itemplate instrux_VPCMPGTUB[3] = { + /* 0 : VPCMPGTUB kreg|mask,xmmreg,xmmrm128 [rvmi:fvm: evex.nds.128.66.0f3a.w0 3e /r 06 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 08) 303 001(3e) 120 001(06) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPGTUB, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8186, 549, 5893}, + /* 1 : VPCMPGTUB kreg|mask,ymmreg,ymmrm256 [rvmi:fvm: evex.nds.256.66.0f3a.w0 3e /r 06 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 28) 303 001(3e) 120 001(06) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPGTUB, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8197, 549, 5894}, + /* 2 : VPCMPGTUB kreg|mask,zmmreg,zmmrm512 [rvmi:fvm: evex.nds.512.66.0f3a.w0 3e /r 06 ] AVX512BW,FUTURE */ + /* 241(f3 7d 48) 303 001(3e) 120 001(06) : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPGTUB, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8208, 550, 5895}, +}; + +static const struct itemplate instrux_VPCMPGTUD[3] = { + /* 0 : VPCMPGTUD kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.66.0f3a.w0 1e /r 06 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 08) 301 001(1e) 120 001(06) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPGTUD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+8219, 543, 5896}, + /* 1 : VPCMPGTUD kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.66.0f3a.w0 1e /r 06 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 28) 301 001(1e) 120 001(06) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPGTUD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+8230, 543, 5897}, + /* 2 : VPCMPGTUD kreg|mask,zmmreg,zmmrm512|b32 [rvmi:fv: evex.nds.512.66.0f3a.w0 1e /r 06 ] AVX512,FUTURE */ + /* 241(f3 7d 48) 301 001(1e) 120 001(06) : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPGTUD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+8241, 544, 5898}, +}; + +static const struct itemplate instrux_VPCMPGTUQ[3] = { + /* 0 : VPCMPGTUQ kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f3a.w1 1e /r 06 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 08) 301 001(1e) 120 001(06) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPGTUQ, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8252, 543, 5899}, + /* 1 : VPCMPGTUQ kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f3a.w1 1e /r 06 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 28) 301 001(1e) 120 001(06) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPGTUQ, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8263, 543, 5900}, + /* 2 : VPCMPGTUQ kreg|mask,zmmreg,zmmrm512|b64 [rvmi:fv: evex.nds.512.66.0f3a.w1 1e /r 06 ] AVX512,FUTURE */ + /* 241(f3 fd 48) 301 001(1e) 120 001(06) : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPGTUQ, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8274, 544, 5901}, +}; + +static const struct itemplate instrux_VPCMPGTUW[3] = { + /* 0 : VPCMPGTUW kreg|mask,xmmreg,xmmrm128 [rvmi:fvm: evex.nds.128.66.0f3a.w1 3e /r 06 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 08) 303 001(3e) 120 001(06) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPGTUW, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8285, 549, 5902}, + /* 1 : VPCMPGTUW kreg|mask,ymmreg,ymmrm256 [rvmi:fvm: evex.nds.256.66.0f3a.w1 3e /r 06 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 28) 303 001(3e) 120 001(06) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPGTUW, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8296, 549, 5903}, + /* 2 : VPCMPGTUW kreg|mask,zmmreg,zmmrm512 [rvmi:fvm: evex.nds.512.66.0f3a.w1 3e /r 06 ] AVX512BW,FUTURE */ + /* 241(f3 fd 48) 303 001(3e) 120 001(06) : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPGTUW, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8307, 550, 5904}, +}; + +static const struct itemplate instrux_VPCMPLEB[3] = { + /* 0 : VPCMPLEB kreg|mask,xmmreg,xmmrm128 [rvmi:fvm: evex.nds.128.66.0f3a.w0 3f /r 02 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 08) 303 001(3f) 120 001(02) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPLEB, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8351, 549, 5908}, + /* 1 : VPCMPLEB kreg|mask,ymmreg,ymmrm256 [rvmi:fvm: evex.nds.256.66.0f3a.w0 3f /r 02 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 28) 303 001(3f) 120 001(02) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPLEB, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8362, 549, 5909}, + /* 2 : VPCMPLEB kreg|mask,zmmreg,zmmrm512 [rvmi:fvm: evex.nds.512.66.0f3a.w0 3f /r 02 ] AVX512BW,FUTURE */ + /* 241(f3 7d 48) 303 001(3f) 120 001(02) : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPLEB, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8373, 550, 5910}, +}; + +static const struct itemplate instrux_VPCMPLED[3] = { + /* 0 : VPCMPLED kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.66.0f3a.w0 1f /r 02 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 08) 301 001(1f) 120 001(02) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPLED, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+8384, 543, 5911}, + /* 1 : VPCMPLED kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.66.0f3a.w0 1f /r 02 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 28) 301 001(1f) 120 001(02) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPLED, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+8395, 543, 5912}, + /* 2 : VPCMPLED kreg|mask,zmmreg,zmmrm512|b32 [rvmi:fv: evex.nds.512.66.0f3a.w0 1f /r 02 ] AVX512,FUTURE */ + /* 241(f3 7d 48) 301 001(1f) 120 001(02) : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPLED, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+8406, 544, 5913}, +}; + +static const struct itemplate instrux_VPCMPLEQ[3] = { + /* 0 : VPCMPLEQ kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f3a.w1 1f /r 02 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 08) 301 001(1f) 120 001(02) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPLEQ, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8417, 543, 5914}, + /* 1 : VPCMPLEQ kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f3a.w1 1f /r 02 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 28) 301 001(1f) 120 001(02) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPLEQ, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8428, 543, 5915}, + /* 2 : VPCMPLEQ kreg|mask,zmmreg,zmmrm512|b64 [rvmi:fv: evex.nds.512.66.0f3a.w1 1f /r 02 ] AVX512,FUTURE */ + /* 241(f3 fd 48) 301 001(1f) 120 001(02) : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPLEQ, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8439, 544, 5916}, +}; + +static const struct itemplate instrux_VPCMPLEUB[3] = { + /* 0 : VPCMPLEUB kreg|mask,xmmreg,xmmrm128 [rvmi:fvm: evex.nds.128.66.0f3a.w0 3e /r 02 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 08) 303 001(3e) 120 001(02) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPLEUB, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8450, 549, 5917}, + /* 1 : VPCMPLEUB kreg|mask,ymmreg,ymmrm256 [rvmi:fvm: evex.nds.256.66.0f3a.w0 3e /r 02 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 28) 303 001(3e) 120 001(02) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPLEUB, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8461, 549, 5918}, + /* 2 : VPCMPLEUB kreg|mask,zmmreg,zmmrm512 [rvmi:fvm: evex.nds.512.66.0f3a.w0 3e /r 02 ] AVX512BW,FUTURE */ + /* 241(f3 7d 48) 303 001(3e) 120 001(02) : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPLEUB, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8472, 550, 5919}, +}; + +static const struct itemplate instrux_VPCMPLEUD[3] = { + /* 0 : VPCMPLEUD kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.66.0f3a.w0 1e /r 02 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 08) 301 001(1e) 120 001(02) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPLEUD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+8483, 543, 5920}, + /* 1 : VPCMPLEUD kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.66.0f3a.w0 1e /r 02 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 28) 301 001(1e) 120 001(02) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPLEUD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+8494, 543, 5921}, + /* 2 : VPCMPLEUD kreg|mask,zmmreg,zmmrm512|b32 [rvmi:fv: evex.nds.512.66.0f3a.w0 1e /r 02 ] AVX512,FUTURE */ + /* 241(f3 7d 48) 301 001(1e) 120 001(02) : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPLEUD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+8505, 544, 5922}, +}; + +static const struct itemplate instrux_VPCMPLEUQ[3] = { + /* 0 : VPCMPLEUQ kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f3a.w1 1e /r 02 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 08) 301 001(1e) 120 001(02) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPLEUQ, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8516, 543, 5923}, + /* 1 : VPCMPLEUQ kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f3a.w1 1e /r 02 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 28) 301 001(1e) 120 001(02) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPLEUQ, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8527, 543, 5924}, + /* 2 : VPCMPLEUQ kreg|mask,zmmreg,zmmrm512|b64 [rvmi:fv: evex.nds.512.66.0f3a.w1 1e /r 02 ] AVX512,FUTURE */ + /* 241(f3 fd 48) 301 001(1e) 120 001(02) : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPLEUQ, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8538, 544, 5925}, +}; + +static const struct itemplate instrux_VPCMPLEUW[3] = { + /* 0 : VPCMPLEUW kreg|mask,xmmreg,xmmrm128 [rvmi:fvm: evex.nds.128.66.0f3a.w1 3e /r 02 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 08) 303 001(3e) 120 001(02) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPLEUW, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8549, 549, 5926}, + /* 1 : VPCMPLEUW kreg|mask,ymmreg,ymmrm256 [rvmi:fvm: evex.nds.256.66.0f3a.w1 3e /r 02 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 28) 303 001(3e) 120 001(02) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPLEUW, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8560, 549, 5927}, + /* 2 : VPCMPLEUW kreg|mask,zmmreg,zmmrm512 [rvmi:fvm: evex.nds.512.66.0f3a.w1 3e /r 02 ] AVX512BW,FUTURE */ + /* 241(f3 fd 48) 303 001(3e) 120 001(02) : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPLEUW, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8571, 550, 5928}, +}; + +static const struct itemplate instrux_VPCMPLEW[3] = { + /* 0 : VPCMPLEW kreg|mask,xmmreg,xmmrm128 [rvmi:fvm: evex.nds.128.66.0f3a.w1 3f /r 02 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 08) 303 001(3f) 120 001(02) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPLEW, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8582, 549, 5929}, + /* 1 : VPCMPLEW kreg|mask,ymmreg,ymmrm256 [rvmi:fvm: evex.nds.256.66.0f3a.w1 3f /r 02 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 28) 303 001(3f) 120 001(02) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPLEW, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8593, 549, 5930}, + /* 2 : VPCMPLEW kreg|mask,zmmreg,zmmrm512 [rvmi:fvm: evex.nds.512.66.0f3a.w1 3f /r 02 ] AVX512BW,FUTURE */ + /* 241(f3 fd 48) 303 001(3f) 120 001(02) : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPLEW, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8604, 550, 5931}, +}; + +static const struct itemplate instrux_VPCMPLTB[3] = { + /* 0 : VPCMPLTB kreg|mask,xmmreg,xmmrm128 [rvmi:fvm: evex.nds.128.66.0f3a.w0 3f /r 01 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 08) 303 001(3f) 120 001(01) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPLTB, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8615, 549, 5932}, + /* 1 : VPCMPLTB kreg|mask,ymmreg,ymmrm256 [rvmi:fvm: evex.nds.256.66.0f3a.w0 3f /r 01 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 28) 303 001(3f) 120 001(01) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPLTB, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8626, 549, 5933}, + /* 2 : VPCMPLTB kreg|mask,zmmreg,zmmrm512 [rvmi:fvm: evex.nds.512.66.0f3a.w0 3f /r 01 ] AVX512BW,FUTURE */ + /* 241(f3 7d 48) 303 001(3f) 120 001(01) : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPLTB, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8637, 550, 5934}, +}; + +static const struct itemplate instrux_VPCMPLTD[3] = { + /* 0 : VPCMPLTD kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.66.0f3a.w0 1f /r 01 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 08) 301 001(1f) 120 001(01) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPLTD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+8648, 543, 5935}, + /* 1 : VPCMPLTD kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.66.0f3a.w0 1f /r 01 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 28) 301 001(1f) 120 001(01) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPLTD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+8659, 543, 5936}, + /* 2 : VPCMPLTD kreg|mask,zmmreg,zmmrm512|b32 [rvmi:fv: evex.nds.512.66.0f3a.w0 1f /r 01 ] AVX512,FUTURE */ + /* 241(f3 7d 48) 301 001(1f) 120 001(01) : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPLTD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+8670, 544, 5937}, +}; + +static const struct itemplate instrux_VPCMPLTQ[3] = { + /* 0 : VPCMPLTQ kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f3a.w1 1f /r 01 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 08) 301 001(1f) 120 001(01) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPLTQ, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8681, 543, 5938}, + /* 1 : VPCMPLTQ kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f3a.w1 1f /r 01 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 28) 301 001(1f) 120 001(01) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPLTQ, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8692, 543, 5939}, + /* 2 : VPCMPLTQ kreg|mask,zmmreg,zmmrm512|b64 [rvmi:fv: evex.nds.512.66.0f3a.w1 1f /r 01 ] AVX512,FUTURE */ + /* 241(f3 fd 48) 301 001(1f) 120 001(01) : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPLTQ, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8703, 544, 5940}, +}; + +static const struct itemplate instrux_VPCMPLTUB[3] = { + /* 0 : VPCMPLTUB kreg|mask,xmmreg,xmmrm128 [rvmi:fvm: evex.nds.128.66.0f3a.w0 3e /r 01 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 08) 303 001(3e) 120 001(01) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPLTUB, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8714, 549, 5941}, + /* 1 : VPCMPLTUB kreg|mask,ymmreg,ymmrm256 [rvmi:fvm: evex.nds.256.66.0f3a.w0 3e /r 01 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 28) 303 001(3e) 120 001(01) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPLTUB, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8725, 549, 5942}, + /* 2 : VPCMPLTUB kreg|mask,zmmreg,zmmrm512 [rvmi:fvm: evex.nds.512.66.0f3a.w0 3e /r 01 ] AVX512BW,FUTURE */ + /* 241(f3 7d 48) 303 001(3e) 120 001(01) : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPLTUB, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8736, 550, 5943}, +}; + +static const struct itemplate instrux_VPCMPLTUD[3] = { + /* 0 : VPCMPLTUD kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.66.0f3a.w0 1e /r 01 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 08) 301 001(1e) 120 001(01) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPLTUD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+8747, 543, 5944}, + /* 1 : VPCMPLTUD kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.66.0f3a.w0 1e /r 01 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 28) 301 001(1e) 120 001(01) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPLTUD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+8758, 543, 5945}, + /* 2 : VPCMPLTUD kreg|mask,zmmreg,zmmrm512|b32 [rvmi:fv: evex.nds.512.66.0f3a.w0 1e /r 01 ] AVX512,FUTURE */ + /* 241(f3 7d 48) 301 001(1e) 120 001(01) : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPLTUD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+8769, 544, 5946}, +}; + +static const struct itemplate instrux_VPCMPLTUQ[3] = { + /* 0 : VPCMPLTUQ kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f3a.w1 1e /r 01 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 08) 301 001(1e) 120 001(01) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPLTUQ, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8780, 543, 5947}, + /* 1 : VPCMPLTUQ kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f3a.w1 1e /r 01 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 28) 301 001(1e) 120 001(01) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPLTUQ, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8791, 543, 5948}, + /* 2 : VPCMPLTUQ kreg|mask,zmmreg,zmmrm512|b64 [rvmi:fv: evex.nds.512.66.0f3a.w1 1e /r 01 ] AVX512,FUTURE */ + /* 241(f3 fd 48) 301 001(1e) 120 001(01) : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPLTUQ, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8802, 544, 5949}, +}; + +static const struct itemplate instrux_VPCMPLTUW[3] = { + /* 0 : VPCMPLTUW kreg|mask,xmmreg,xmmrm128 [rvmi:fvm: evex.nds.128.66.0f3a.w1 3e /r 01 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 08) 303 001(3e) 120 001(01) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPLTUW, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8813, 549, 5950}, + /* 1 : VPCMPLTUW kreg|mask,ymmreg,ymmrm256 [rvmi:fvm: evex.nds.256.66.0f3a.w1 3e /r 01 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 28) 303 001(3e) 120 001(01) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPLTUW, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8824, 549, 5951}, + /* 2 : VPCMPLTUW kreg|mask,zmmreg,zmmrm512 [rvmi:fvm: evex.nds.512.66.0f3a.w1 3e /r 01 ] AVX512BW,FUTURE */ + /* 241(f3 fd 48) 303 001(3e) 120 001(01) : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPLTUW, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8835, 550, 5952}, +}; + +static const struct itemplate instrux_VPCMPLTW[3] = { + /* 0 : VPCMPLTW kreg|mask,xmmreg,xmmrm128 [rvmi:fvm: evex.nds.128.66.0f3a.w1 3f /r 01 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 08) 303 001(3f) 120 001(01) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPLTW, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8846, 549, 5953}, + /* 1 : VPCMPLTW kreg|mask,ymmreg,ymmrm256 [rvmi:fvm: evex.nds.256.66.0f3a.w1 3f /r 01 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 28) 303 001(3f) 120 001(01) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPLTW, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8857, 549, 5954}, + /* 2 : VPCMPLTW kreg|mask,zmmreg,zmmrm512 [rvmi:fvm: evex.nds.512.66.0f3a.w1 3f /r 01 ] AVX512BW,FUTURE */ + /* 241(f3 fd 48) 303 001(3f) 120 001(01) : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPLTW, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8868, 550, 5955}, +}; + +static const struct itemplate instrux_VPCMPNEQB[3] = { + /* 0 : VPCMPNEQB kreg|mask,xmmreg,xmmrm128 [rvmi:fvm: evex.nds.128.66.0f3a.w0 3f /r 04 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 08) 303 001(3f) 120 001(04) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPNEQB, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8879, 549, 5956}, + /* 1 : VPCMPNEQB kreg|mask,ymmreg,ymmrm256 [rvmi:fvm: evex.nds.256.66.0f3a.w0 3f /r 04 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 28) 303 001(3f) 120 001(04) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPNEQB, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8890, 549, 5957}, + /* 2 : VPCMPNEQB kreg|mask,zmmreg,zmmrm512 [rvmi:fvm: evex.nds.512.66.0f3a.w0 3f /r 04 ] AVX512BW,FUTURE */ + /* 241(f3 7d 48) 303 001(3f) 120 001(04) : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPNEQB, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8901, 550, 5958}, +}; + +static const struct itemplate instrux_VPCMPNEQD[3] = { + /* 0 : VPCMPNEQD kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.66.0f3a.w0 1f /r 04 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 08) 301 001(1f) 120 001(04) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPNEQD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+8912, 543, 5959}, + /* 1 : VPCMPNEQD kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.66.0f3a.w0 1f /r 04 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 28) 301 001(1f) 120 001(04) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPNEQD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+8923, 543, 5960}, + /* 2 : VPCMPNEQD kreg|mask,zmmreg,zmmrm512|b32 [rvmi:fv: evex.nds.512.66.0f3a.w0 1f /r 04 ] AVX512,FUTURE */ + /* 241(f3 7d 48) 301 001(1f) 120 001(04) : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPNEQD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+8934, 544, 5961}, +}; + +static const struct itemplate instrux_VPCMPNEQQ[3] = { + /* 0 : VPCMPNEQQ kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f3a.w1 1f /r 04 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 08) 301 001(1f) 120 001(04) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPNEQQ, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8945, 543, 5962}, + /* 1 : VPCMPNEQQ kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f3a.w1 1f /r 04 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 28) 301 001(1f) 120 001(04) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPNEQQ, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8956, 543, 5963}, + /* 2 : VPCMPNEQQ kreg|mask,zmmreg,zmmrm512|b64 [rvmi:fv: evex.nds.512.66.0f3a.w1 1f /r 04 ] AVX512,FUTURE */ + /* 241(f3 fd 48) 301 001(1f) 120 001(04) : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPNEQQ, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8967, 544, 5964}, +}; + +static const struct itemplate instrux_VPCMPNEQUB[3] = { + /* 0 : VPCMPNEQUB kreg|mask,xmmreg,xmmrm128 [rvmi:fvm: evex.nds.128.66.0f3a.w0 3e /r 04 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 08) 303 001(3e) 120 001(04) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPNEQUB, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8978, 549, 5965}, + /* 1 : VPCMPNEQUB kreg|mask,ymmreg,ymmrm256 [rvmi:fvm: evex.nds.256.66.0f3a.w0 3e /r 04 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 28) 303 001(3e) 120 001(04) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPNEQUB, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8989, 549, 5966}, + /* 2 : VPCMPNEQUB kreg|mask,zmmreg,zmmrm512 [rvmi:fvm: evex.nds.512.66.0f3a.w0 3e /r 04 ] AVX512BW,FUTURE */ + /* 241(f3 7d 48) 303 001(3e) 120 001(04) : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPNEQUB, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+9000, 550, 5967}, +}; + +static const struct itemplate instrux_VPCMPNEQUD[3] = { + /* 0 : VPCMPNEQUD kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.66.0f3a.w0 1e /r 04 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 08) 301 001(1e) 120 001(04) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPNEQUD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+9011, 543, 5968}, + /* 1 : VPCMPNEQUD kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.66.0f3a.w0 1e /r 04 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 28) 301 001(1e) 120 001(04) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPNEQUD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+9022, 543, 5969}, + /* 2 : VPCMPNEQUD kreg|mask,zmmreg,zmmrm512|b32 [rvmi:fv: evex.nds.512.66.0f3a.w0 1e /r 04 ] AVX512,FUTURE */ + /* 241(f3 7d 48) 301 001(1e) 120 001(04) : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPNEQUD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+9033, 544, 5970}, +}; + +static const struct itemplate instrux_VPCMPNEQUQ[3] = { + /* 0 : VPCMPNEQUQ kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f3a.w1 1e /r 04 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 08) 301 001(1e) 120 001(04) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPNEQUQ, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+9044, 543, 5971}, + /* 1 : VPCMPNEQUQ kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f3a.w1 1e /r 04 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 28) 301 001(1e) 120 001(04) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPNEQUQ, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+9055, 543, 5972}, + /* 2 : VPCMPNEQUQ kreg|mask,zmmreg,zmmrm512|b64 [rvmi:fv: evex.nds.512.66.0f3a.w1 1e /r 04 ] AVX512,FUTURE */ + /* 241(f3 fd 48) 301 001(1e) 120 001(04) : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPNEQUQ, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+9066, 544, 5973}, +}; + +static const struct itemplate instrux_VPCMPNEQUW[3] = { + /* 0 : VPCMPNEQUW kreg|mask,xmmreg,xmmrm128 [rvmi:fvm: evex.nds.128.66.0f3a.w1 3e /r 04 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 08) 303 001(3e) 120 001(04) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPNEQUW, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+9077, 549, 5974}, + /* 1 : VPCMPNEQUW kreg|mask,ymmreg,ymmrm256 [rvmi:fvm: evex.nds.256.66.0f3a.w1 3e /r 04 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 28) 303 001(3e) 120 001(04) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPNEQUW, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+9088, 549, 5975}, + /* 2 : VPCMPNEQUW kreg|mask,zmmreg,zmmrm512 [rvmi:fvm: evex.nds.512.66.0f3a.w1 3e /r 04 ] AVX512BW,FUTURE */ + /* 241(f3 fd 48) 303 001(3e) 120 001(04) : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPNEQUW, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+9099, 550, 5976}, +}; + +static const struct itemplate instrux_VPCMPNEQW[3] = { + /* 0 : VPCMPNEQW kreg|mask,xmmreg,xmmrm128 [rvmi:fvm: evex.nds.128.66.0f3a.w1 3f /r 04 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 08) 303 001(3f) 120 001(04) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPNEQW, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+9110, 549, 5977}, + /* 1 : VPCMPNEQW kreg|mask,ymmreg,ymmrm256 [rvmi:fvm: evex.nds.256.66.0f3a.w1 3f /r 04 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 28) 303 001(3f) 120 001(04) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPNEQW, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+9121, 549, 5978}, + /* 2 : VPCMPNEQW kreg|mask,zmmreg,zmmrm512 [rvmi:fvm: evex.nds.512.66.0f3a.w1 3f /r 04 ] AVX512BW,FUTURE */ + /* 241(f3 fd 48) 303 001(3f) 120 001(04) : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPNEQW, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+9132, 550, 5979}, +}; + +static const struct itemplate instrux_VPCMPNGTB[3] = { + /* 0 : VPCMPNGTB kreg|mask,xmmreg,xmmrm128 [rvmi:fvm: evex.nds.128.66.0f3a.w0 3f /r 02 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 08) 303 001(3f) 120 001(02) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPNGTB, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8351, 549, 5980}, + /* 1 : VPCMPNGTB kreg|mask,ymmreg,ymmrm256 [rvmi:fvm: evex.nds.256.66.0f3a.w0 3f /r 02 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 28) 303 001(3f) 120 001(02) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPNGTB, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8362, 549, 5981}, + /* 2 : VPCMPNGTB kreg|mask,zmmreg,zmmrm512 [rvmi:fvm: evex.nds.512.66.0f3a.w0 3f /r 02 ] AVX512BW,FUTURE */ + /* 241(f3 7d 48) 303 001(3f) 120 001(02) : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPNGTB, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8373, 550, 5982}, +}; + +static const struct itemplate instrux_VPCMPNGTD[3] = { + /* 0 : VPCMPNGTD kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.66.0f3a.w0 1f /r 02 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 08) 301 001(1f) 120 001(02) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPNGTD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+8384, 543, 5983}, + /* 1 : VPCMPNGTD kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.66.0f3a.w0 1f /r 02 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 28) 301 001(1f) 120 001(02) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPNGTD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+8395, 543, 5984}, + /* 2 : VPCMPNGTD kreg|mask,zmmreg,zmmrm512|b32 [rvmi:fv: evex.nds.512.66.0f3a.w0 1f /r 02 ] AVX512,FUTURE */ + /* 241(f3 7d 48) 301 001(1f) 120 001(02) : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPNGTD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+8406, 544, 5985}, +}; + +static const struct itemplate instrux_VPCMPNGTQ[3] = { + /* 0 : VPCMPNGTQ kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f3a.w1 1f /r 02 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 08) 301 001(1f) 120 001(02) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPNGTQ, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8417, 543, 5986}, + /* 1 : VPCMPNGTQ kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f3a.w1 1f /r 02 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 28) 301 001(1f) 120 001(02) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPNGTQ, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8428, 543, 5987}, + /* 2 : VPCMPNGTQ kreg|mask,zmmreg,zmmrm512|b64 [rvmi:fv: evex.nds.512.66.0f3a.w1 1f /r 02 ] AVX512,FUTURE */ + /* 241(f3 fd 48) 301 001(1f) 120 001(02) : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPNGTQ, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8439, 544, 5988}, +}; + +static const struct itemplate instrux_VPCMPNGTUB[3] = { + /* 0 : VPCMPNGTUB kreg|mask,xmmreg,xmmrm128 [rvmi:fvm: evex.nds.128.66.0f3a.w0 3e /r 02 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 08) 303 001(3e) 120 001(02) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPNGTUB, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8450, 549, 5989}, + /* 1 : VPCMPNGTUB kreg|mask,ymmreg,ymmrm256 [rvmi:fvm: evex.nds.256.66.0f3a.w0 3e /r 02 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 28) 303 001(3e) 120 001(02) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPNGTUB, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8461, 549, 5990}, + /* 2 : VPCMPNGTUB kreg|mask,zmmreg,zmmrm512 [rvmi:fvm: evex.nds.512.66.0f3a.w0 3e /r 02 ] AVX512BW,FUTURE */ + /* 241(f3 7d 48) 303 001(3e) 120 001(02) : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPNGTUB, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8472, 550, 5991}, +}; + +static const struct itemplate instrux_VPCMPNGTUD[3] = { + /* 0 : VPCMPNGTUD kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.66.0f3a.w0 1e /r 02 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 08) 301 001(1e) 120 001(02) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPNGTUD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+8483, 543, 5992}, + /* 1 : VPCMPNGTUD kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.66.0f3a.w0 1e /r 02 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 28) 301 001(1e) 120 001(02) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPNGTUD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+8494, 543, 5993}, + /* 2 : VPCMPNGTUD kreg|mask,zmmreg,zmmrm512|b32 [rvmi:fv: evex.nds.512.66.0f3a.w0 1e /r 02 ] AVX512,FUTURE */ + /* 241(f3 7d 48) 301 001(1e) 120 001(02) : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPNGTUD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+8505, 544, 5994}, +}; + +static const struct itemplate instrux_VPCMPNGTUQ[3] = { + /* 0 : VPCMPNGTUQ kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f3a.w1 1e /r 02 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 08) 301 001(1e) 120 001(02) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPNGTUQ, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8516, 543, 5995}, + /* 1 : VPCMPNGTUQ kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f3a.w1 1e /r 02 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 28) 301 001(1e) 120 001(02) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPNGTUQ, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8527, 543, 5996}, + /* 2 : VPCMPNGTUQ kreg|mask,zmmreg,zmmrm512|b64 [rvmi:fv: evex.nds.512.66.0f3a.w1 1e /r 02 ] AVX512,FUTURE */ + /* 241(f3 fd 48) 301 001(1e) 120 001(02) : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPNGTUQ, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8538, 544, 5997}, +}; + +static const struct itemplate instrux_VPCMPNGTUW[3] = { + /* 0 : VPCMPNGTUW kreg|mask,xmmreg,xmmrm128 [rvmi:fvm: evex.nds.128.66.0f3a.w1 3e /r 02 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 08) 303 001(3e) 120 001(02) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPNGTUW, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8549, 549, 5998}, + /* 1 : VPCMPNGTUW kreg|mask,ymmreg,ymmrm256 [rvmi:fvm: evex.nds.256.66.0f3a.w1 3e /r 02 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 28) 303 001(3e) 120 001(02) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPNGTUW, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8560, 549, 5999}, + /* 2 : VPCMPNGTUW kreg|mask,zmmreg,zmmrm512 [rvmi:fvm: evex.nds.512.66.0f3a.w1 3e /r 02 ] AVX512BW,FUTURE */ + /* 241(f3 fd 48) 303 001(3e) 120 001(02) : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPNGTUW, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8571, 550, 6000}, +}; + +static const struct itemplate instrux_VPCMPNGTW[3] = { + /* 0 : VPCMPNGTW kreg|mask,xmmreg,xmmrm128 [rvmi:fvm: evex.nds.128.66.0f3a.w1 3f /r 02 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 08) 303 001(3f) 120 001(02) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPNGTW, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8582, 549, 6001}, + /* 1 : VPCMPNGTW kreg|mask,ymmreg,ymmrm256 [rvmi:fvm: evex.nds.256.66.0f3a.w1 3f /r 02 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 28) 303 001(3f) 120 001(02) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPNGTW, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8593, 549, 6002}, + /* 2 : VPCMPNGTW kreg|mask,zmmreg,zmmrm512 [rvmi:fvm: evex.nds.512.66.0f3a.w1 3f /r 02 ] AVX512BW,FUTURE */ + /* 241(f3 fd 48) 303 001(3f) 120 001(02) : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPNGTW, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8604, 550, 6003}, +}; + +static const struct itemplate instrux_VPCMPNLEB[3] = { + /* 0 : VPCMPNLEB kreg|mask,xmmreg,xmmrm128 [rvmi:fvm: evex.nds.128.66.0f3a.w0 3f /r 06 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 08) 303 001(3f) 120 001(06) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPNLEB, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8087, 549, 6004}, + /* 1 : VPCMPNLEB kreg|mask,ymmreg,ymmrm256 [rvmi:fvm: evex.nds.256.66.0f3a.w0 3f /r 06 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 28) 303 001(3f) 120 001(06) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPNLEB, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8098, 549, 6005}, + /* 2 : VPCMPNLEB kreg|mask,zmmreg,zmmrm512 [rvmi:fvm: evex.nds.512.66.0f3a.w0 3f /r 06 ] AVX512BW,FUTURE */ + /* 241(f3 7d 48) 303 001(3f) 120 001(06) : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPNLEB, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8109, 550, 6006}, +}; + +static const struct itemplate instrux_VPCMPNLED[3] = { + /* 0 : VPCMPNLED kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.66.0f3a.w0 1f /r 06 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 08) 301 001(1f) 120 001(06) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPNLED, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+8120, 543, 6007}, + /* 1 : VPCMPNLED kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.66.0f3a.w0 1f /r 06 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 28) 301 001(1f) 120 001(06) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPNLED, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+8131, 543, 6008}, + /* 2 : VPCMPNLED kreg|mask,zmmreg,zmmrm512|b32 [rvmi:fv: evex.nds.512.66.0f3a.w0 1f /r 06 ] AVX512,FUTURE */ + /* 241(f3 7d 48) 301 001(1f) 120 001(06) : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPNLED, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+8142, 544, 6009}, +}; + +static const struct itemplate instrux_VPCMPNLEQ[3] = { + /* 0 : VPCMPNLEQ kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f3a.w1 1f /r 06 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 08) 301 001(1f) 120 001(06) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPNLEQ, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8153, 543, 6010}, + /* 1 : VPCMPNLEQ kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f3a.w1 1f /r 06 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 28) 301 001(1f) 120 001(06) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPNLEQ, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8164, 543, 6011}, + /* 2 : VPCMPNLEQ kreg|mask,zmmreg,zmmrm512|b64 [rvmi:fv: evex.nds.512.66.0f3a.w1 1f /r 06 ] AVX512,FUTURE */ + /* 241(f3 fd 48) 301 001(1f) 120 001(06) : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPNLEQ, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8175, 544, 6012}, +}; + +static const struct itemplate instrux_VPCMPNLEUB[3] = { + /* 0 : VPCMPNLEUB kreg|mask,xmmreg,xmmrm128 [rvmi:fvm: evex.nds.128.66.0f3a.w0 3e /r 06 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 08) 303 001(3e) 120 001(06) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPNLEUB, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8186, 549, 6013}, + /* 1 : VPCMPNLEUB kreg|mask,ymmreg,ymmrm256 [rvmi:fvm: evex.nds.256.66.0f3a.w0 3e /r 06 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 28) 303 001(3e) 120 001(06) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPNLEUB, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8197, 549, 6014}, + /* 2 : VPCMPNLEUB kreg|mask,zmmreg,zmmrm512 [rvmi:fvm: evex.nds.512.66.0f3a.w0 3e /r 06 ] AVX512BW,FUTURE */ + /* 241(f3 7d 48) 303 001(3e) 120 001(06) : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPNLEUB, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8208, 550, 6015}, +}; + +static const struct itemplate instrux_VPCMPNLEUD[3] = { + /* 0 : VPCMPNLEUD kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.66.0f3a.w0 1e /r 06 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 08) 301 001(1e) 120 001(06) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPNLEUD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+8219, 543, 6016}, + /* 1 : VPCMPNLEUD kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.66.0f3a.w0 1e /r 06 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 28) 301 001(1e) 120 001(06) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPNLEUD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+8230, 543, 6017}, + /* 2 : VPCMPNLEUD kreg|mask,zmmreg,zmmrm512|b32 [rvmi:fv: evex.nds.512.66.0f3a.w0 1e /r 06 ] AVX512,FUTURE */ + /* 241(f3 7d 48) 301 001(1e) 120 001(06) : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPNLEUD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+8241, 544, 6018}, +}; + +static const struct itemplate instrux_VPCMPNLEUQ[3] = { + /* 0 : VPCMPNLEUQ kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f3a.w1 1e /r 06 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 08) 301 001(1e) 120 001(06) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPNLEUQ, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8252, 543, 6019}, + /* 1 : VPCMPNLEUQ kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f3a.w1 1e /r 06 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 28) 301 001(1e) 120 001(06) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPNLEUQ, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8263, 543, 6020}, + /* 2 : VPCMPNLEUQ kreg|mask,zmmreg,zmmrm512|b64 [rvmi:fv: evex.nds.512.66.0f3a.w1 1e /r 06 ] AVX512,FUTURE */ + /* 241(f3 fd 48) 301 001(1e) 120 001(06) : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPNLEUQ, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8274, 544, 6021}, +}; + +static const struct itemplate instrux_VPCMPNLEUW[3] = { + /* 0 : VPCMPNLEUW kreg|mask,xmmreg,xmmrm128 [rvmi:fvm: evex.nds.128.66.0f3a.w1 3e /r 06 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 08) 303 001(3e) 120 001(06) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPNLEUW, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8285, 549, 6022}, + /* 1 : VPCMPNLEUW kreg|mask,ymmreg,ymmrm256 [rvmi:fvm: evex.nds.256.66.0f3a.w1 3e /r 06 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 28) 303 001(3e) 120 001(06) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPNLEUW, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8296, 549, 6023}, + /* 2 : VPCMPNLEUW kreg|mask,zmmreg,zmmrm512 [rvmi:fvm: evex.nds.512.66.0f3a.w1 3e /r 06 ] AVX512BW,FUTURE */ + /* 241(f3 fd 48) 303 001(3e) 120 001(06) : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPNLEUW, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8307, 550, 6024}, +}; + +static const struct itemplate instrux_VPCMPNLEW[3] = { + /* 0 : VPCMPNLEW kreg|mask,xmmreg,xmmrm128 [rvmi:fvm: evex.nds.128.66.0f3a.w1 3f /r 06 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 08) 303 001(3f) 120 001(06) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPNLEW, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8318, 549, 6025}, + /* 1 : VPCMPNLEW kreg|mask,ymmreg,ymmrm256 [rvmi:fvm: evex.nds.256.66.0f3a.w1 3f /r 06 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 28) 303 001(3f) 120 001(06) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPNLEW, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8329, 549, 6026}, + /* 2 : VPCMPNLEW kreg|mask,zmmreg,zmmrm512 [rvmi:fvm: evex.nds.512.66.0f3a.w1 3f /r 06 ] AVX512BW,FUTURE */ + /* 241(f3 fd 48) 303 001(3f) 120 001(06) : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPNLEW, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8340, 550, 6027}, +}; + +static const struct itemplate instrux_VPCMPNLTB[3] = { + /* 0 : VPCMPNLTB kreg|mask,xmmreg,xmmrm128 [rvmi:fvm: evex.nds.128.66.0f3a.w0 3f /r 05 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 08) 303 001(3f) 120 001(05) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPNLTB, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+7823, 549, 6028}, + /* 1 : VPCMPNLTB kreg|mask,ymmreg,ymmrm256 [rvmi:fvm: evex.nds.256.66.0f3a.w0 3f /r 05 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 28) 303 001(3f) 120 001(05) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPNLTB, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+7834, 549, 6029}, + /* 2 : VPCMPNLTB kreg|mask,zmmreg,zmmrm512 [rvmi:fvm: evex.nds.512.66.0f3a.w0 3f /r 05 ] AVX512BW,FUTURE */ + /* 241(f3 7d 48) 303 001(3f) 120 001(05) : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPNLTB, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+7845, 550, 6030}, +}; + +static const struct itemplate instrux_VPCMPNLTD[3] = { + /* 0 : VPCMPNLTD kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.66.0f3a.w0 1f /r 05 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 08) 301 001(1f) 120 001(05) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPNLTD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+7856, 543, 6031}, + /* 1 : VPCMPNLTD kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.66.0f3a.w0 1f /r 05 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 28) 301 001(1f) 120 001(05) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPNLTD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+7867, 543, 6032}, + /* 2 : VPCMPNLTD kreg|mask,zmmreg,zmmrm512|b32 [rvmi:fv: evex.nds.512.66.0f3a.w0 1f /r 05 ] AVX512,FUTURE */ + /* 241(f3 7d 48) 301 001(1f) 120 001(05) : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPNLTD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+7878, 544, 6033}, +}; + +static const struct itemplate instrux_VPCMPNLTQ[3] = { + /* 0 : VPCMPNLTQ kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f3a.w1 1f /r 05 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 08) 301 001(1f) 120 001(05) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPNLTQ, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+7889, 543, 6034}, + /* 1 : VPCMPNLTQ kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f3a.w1 1f /r 05 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 28) 301 001(1f) 120 001(05) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPNLTQ, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+7900, 543, 6035}, + /* 2 : VPCMPNLTQ kreg|mask,zmmreg,zmmrm512|b64 [rvmi:fv: evex.nds.512.66.0f3a.w1 1f /r 05 ] AVX512,FUTURE */ + /* 241(f3 fd 48) 301 001(1f) 120 001(05) : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPNLTQ, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+7911, 544, 6036}, +}; + +static const struct itemplate instrux_VPCMPNLTUB[3] = { + /* 0 : VPCMPNLTUB kreg|mask,xmmreg,xmmrm128 [rvmi:fvm: evex.nds.128.66.0f3a.w0 3e /r 05 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 08) 303 001(3e) 120 001(05) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPNLTUB, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+7922, 549, 6037}, + /* 1 : VPCMPNLTUB kreg|mask,ymmreg,ymmrm256 [rvmi:fvm: evex.nds.256.66.0f3a.w0 3e /r 05 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 28) 303 001(3e) 120 001(05) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPNLTUB, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+7933, 549, 6038}, + /* 2 : VPCMPNLTUB kreg|mask,zmmreg,zmmrm512 [rvmi:fvm: evex.nds.512.66.0f3a.w0 3e /r 05 ] AVX512BW,FUTURE */ + /* 241(f3 7d 48) 303 001(3e) 120 001(05) : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPNLTUB, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+7944, 550, 6039}, +}; + +static const struct itemplate instrux_VPCMPNLTUD[3] = { + /* 0 : VPCMPNLTUD kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.66.0f3a.w0 1e /r 05 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 08) 301 001(1e) 120 001(05) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPNLTUD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+7955, 543, 6040}, + /* 1 : VPCMPNLTUD kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.66.0f3a.w0 1e /r 05 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 28) 301 001(1e) 120 001(05) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPNLTUD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+7966, 543, 6041}, + /* 2 : VPCMPNLTUD kreg|mask,zmmreg,zmmrm512|b32 [rvmi:fv: evex.nds.512.66.0f3a.w0 1e /r 05 ] AVX512,FUTURE */ + /* 241(f3 7d 48) 301 001(1e) 120 001(05) : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPNLTUD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+7977, 544, 6042}, +}; + +static const struct itemplate instrux_VPCMPNLTUQ[3] = { + /* 0 : VPCMPNLTUQ kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f3a.w1 1e /r 05 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 08) 301 001(1e) 120 001(05) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPNLTUQ, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+7988, 543, 6043}, + /* 1 : VPCMPNLTUQ kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f3a.w1 1e /r 05 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 28) 301 001(1e) 120 001(05) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPNLTUQ, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+7999, 543, 6044}, + /* 2 : VPCMPNLTUQ kreg|mask,zmmreg,zmmrm512|b64 [rvmi:fv: evex.nds.512.66.0f3a.w1 1e /r 05 ] AVX512,FUTURE */ + /* 241(f3 fd 48) 301 001(1e) 120 001(05) : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPNLTUQ, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8010, 544, 6045}, +}; + +static const struct itemplate instrux_VPCMPNLTUW[3] = { + /* 0 : VPCMPNLTUW kreg|mask,xmmreg,xmmrm128 [rvmi:fvm: evex.nds.128.66.0f3a.w1 3e /r 05 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 08) 303 001(3e) 120 001(05) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPNLTUW, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8021, 549, 6046}, + /* 1 : VPCMPNLTUW kreg|mask,ymmreg,ymmrm256 [rvmi:fvm: evex.nds.256.66.0f3a.w1 3e /r 05 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 28) 303 001(3e) 120 001(05) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPNLTUW, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8032, 549, 6047}, + /* 2 : VPCMPNLTUW kreg|mask,zmmreg,zmmrm512 [rvmi:fvm: evex.nds.512.66.0f3a.w1 3e /r 05 ] AVX512BW,FUTURE */ + /* 241(f3 fd 48) 303 001(3e) 120 001(05) : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPNLTUW, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8043, 550, 6048}, +}; + +static const struct itemplate instrux_VPCMPNLTW[3] = { + /* 0 : VPCMPNLTW kreg|mask,xmmreg,xmmrm128 [rvmi:fvm: evex.nds.128.66.0f3a.w1 3f /r 05 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 08) 303 001(3f) 120 001(05) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPNLTW, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8054, 549, 6049}, + /* 1 : VPCMPNLTW kreg|mask,ymmreg,ymmrm256 [rvmi:fvm: evex.nds.256.66.0f3a.w1 3f /r 05 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 28) 303 001(3f) 120 001(05) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPNLTW, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8065, 549, 6050}, + /* 2 : VPCMPNLTW kreg|mask,zmmreg,zmmrm512 [rvmi:fvm: evex.nds.512.66.0f3a.w1 3f /r 05 ] AVX512BW,FUTURE */ + /* 241(f3 fd 48) 303 001(3f) 120 001(05) : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPNLTW, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8076, 550, 6051}, +}; + +static const struct itemplate instrux_VPCMPB[3] = { + /* 0 : VPCMPB kreg|mask,xmmreg,xmmrm128,imm8 [rvmi:fvm: evex.nds.128.66.0f3a.w0 3f /r ib ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 08) 303 001(3f) 120 023 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPB, 4, {OPMASKREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK,0,0,0,0}, nasm_bytecodes+19513, 549, 6052}, + /* 1 : VPCMPB kreg|mask,ymmreg,ymmrm256,imm8 [rvmi:fvm: evex.nds.256.66.0f3a.w0 3f /r ib ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 28) 303 001(3f) 120 023 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPB, 4, {OPMASKREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK,0,0,0,0}, nasm_bytecodes+19523, 549, 6053}, + /* 2 : VPCMPB kreg|mask,zmmreg,zmmrm512,imm8 [rvmi:fvm: evex.nds.512.66.0f3a.w0 3f /r ib ] AVX512BW,FUTURE */ + /* 241(f3 7d 48) 303 001(3f) 120 023 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPB, 4, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK,0,0,0,0}, nasm_bytecodes+19533, 550, 6054}, +}; + +static const struct itemplate instrux_VPCMPD[3] = { + /* 0 : VPCMPD kreg|mask,xmmreg,xmmrm128|b32,imm8 [rvmi:fv: evex.nds.128.66.0f3a.w0 1f /r ib ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 08) 301 001(1f) 120 023 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPD, 4, {OPMASKREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK,0,B32,0,0}, nasm_bytecodes+19543, 543, 6055}, + /* 1 : VPCMPD kreg|mask,ymmreg,ymmrm256|b32,imm8 [rvmi:fv: evex.nds.256.66.0f3a.w0 1f /r ib ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 28) 301 001(1f) 120 023 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPD, 4, {OPMASKREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK,0,B32,0,0}, nasm_bytecodes+19553, 543, 6056}, + /* 2 : VPCMPD kreg|mask,zmmreg,zmmrm512|b32,imm8 [rvmi:fv: evex.nds.512.66.0f3a.w0 1f /r ib ] AVX512,FUTURE */ + /* 241(f3 7d 48) 301 001(1f) 120 023 : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPD, 4, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK,0,B32,0,0}, nasm_bytecodes+19563, 544, 6057}, +}; + +static const struct itemplate instrux_VPCMPQ[3] = { + /* 0 : VPCMPQ kreg|mask,xmmreg,xmmrm128|b64,imm8 [rvmi:fv: evex.nds.128.66.0f3a.w1 1f /r ib ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 08) 301 001(1f) 120 023 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPQ, 4, {OPMASKREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK,0,B64,0,0}, nasm_bytecodes+19573, 543, 6058}, + /* 1 : VPCMPQ kreg|mask,ymmreg,ymmrm256|b64,imm8 [rvmi:fv: evex.nds.256.66.0f3a.w1 1f /r ib ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 28) 301 001(1f) 120 023 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPQ, 4, {OPMASKREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK,0,B64,0,0}, nasm_bytecodes+19583, 543, 6059}, + /* 2 : VPCMPQ kreg|mask,zmmreg,zmmrm512|b64,imm8 [rvmi:fv: evex.nds.512.66.0f3a.w1 1f /r ib ] AVX512,FUTURE */ + /* 241(f3 fd 48) 301 001(1f) 120 023 : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPQ, 4, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK,0,B64,0,0}, nasm_bytecodes+19593, 544, 6060}, +}; + +static const struct itemplate instrux_VPCMPUB[3] = { + /* 0 : VPCMPUB kreg|mask,xmmreg,xmmrm128,imm8 [rvmi:fvm: evex.nds.128.66.0f3a.w0 3e /r ib ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 08) 303 001(3e) 120 023 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPUB, 4, {OPMASKREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK,0,0,0,0}, nasm_bytecodes+19603, 549, 6061}, + /* 1 : VPCMPUB kreg|mask,ymmreg,ymmrm256,imm8 [rvmi:fvm: evex.nds.256.66.0f3a.w0 3e /r ib ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 28) 303 001(3e) 120 023 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPUB, 4, {OPMASKREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK,0,0,0,0}, nasm_bytecodes+19613, 549, 6062}, + /* 2 : VPCMPUB kreg|mask,zmmreg,zmmrm512,imm8 [rvmi:fvm: evex.nds.512.66.0f3a.w0 3e /r ib ] AVX512BW,FUTURE */ + /* 241(f3 7d 48) 303 001(3e) 120 023 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPUB, 4, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK,0,0,0,0}, nasm_bytecodes+19623, 550, 6063}, +}; + +static const struct itemplate instrux_VPCMPUD[3] = { + /* 0 : VPCMPUD kreg|mask,xmmreg,xmmrm128|b32,imm8 [rvmi:fv: evex.nds.128.66.0f3a.w0 1e /r ib ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 08) 301 001(1e) 120 023 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPUD, 4, {OPMASKREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK,0,B32,0,0}, nasm_bytecodes+19633, 543, 6064}, + /* 1 : VPCMPUD kreg|mask,ymmreg,ymmrm256|b32,imm8 [rvmi:fv: evex.nds.256.66.0f3a.w0 1e /r ib ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 28) 301 001(1e) 120 023 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPUD, 4, {OPMASKREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK,0,B32,0,0}, nasm_bytecodes+19643, 543, 6065}, + /* 2 : VPCMPUD kreg|mask,zmmreg,zmmrm512|b32,imm8 [rvmi:fv: evex.nds.512.66.0f3a.w0 1e /r ib ] AVX512,FUTURE */ + /* 241(f3 7d 48) 301 001(1e) 120 023 : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPUD, 4, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK,0,B32,0,0}, nasm_bytecodes+19653, 544, 6066}, +}; + +static const struct itemplate instrux_VPCMPUQ[3] = { + /* 0 : VPCMPUQ kreg|mask,xmmreg,xmmrm128|b64,imm8 [rvmi:fv: evex.nds.128.66.0f3a.w1 1e /r ib ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 08) 301 001(1e) 120 023 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPUQ, 4, {OPMASKREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK,0,B64,0,0}, nasm_bytecodes+19663, 543, 6067}, + /* 1 : VPCMPUQ kreg|mask,ymmreg,ymmrm256|b64,imm8 [rvmi:fv: evex.nds.256.66.0f3a.w1 1e /r ib ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 28) 301 001(1e) 120 023 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPUQ, 4, {OPMASKREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK,0,B64,0,0}, nasm_bytecodes+19673, 543, 6068}, + /* 2 : VPCMPUQ kreg|mask,zmmreg,zmmrm512|b64,imm8 [rvmi:fv: evex.nds.512.66.0f3a.w1 1e /r ib ] AVX512,FUTURE */ + /* 241(f3 fd 48) 301 001(1e) 120 023 : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPUQ, 4, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK,0,B64,0,0}, nasm_bytecodes+19683, 544, 6069}, +}; + +static const struct itemplate instrux_VPCMPUW[3] = { + /* 0 : VPCMPUW kreg|mask,xmmreg,xmmrm128,imm8 [rvmi:fvm: evex.nds.128.66.0f3a.w1 3e /r ib ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 08) 303 001(3e) 120 023 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPUW, 4, {OPMASKREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK,0,0,0,0}, nasm_bytecodes+19693, 549, 6070}, + /* 1 : VPCMPUW kreg|mask,ymmreg,ymmrm256,imm8 [rvmi:fvm: evex.nds.256.66.0f3a.w1 3e /r ib ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 28) 303 001(3e) 120 023 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPUW, 4, {OPMASKREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK,0,0,0,0}, nasm_bytecodes+19703, 549, 6071}, + /* 2 : VPCMPUW kreg|mask,zmmreg,zmmrm512,imm8 [rvmi:fvm: evex.nds.512.66.0f3a.w1 3e /r ib ] AVX512BW,FUTURE */ + /* 241(f3 fd 48) 303 001(3e) 120 023 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPUW, 4, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK,0,0,0,0}, nasm_bytecodes+19713, 550, 6072}, +}; + +static const struct itemplate instrux_VPCMPW[3] = { + /* 0 : VPCMPW kreg|mask,xmmreg,xmmrm128,imm8 [rvmi:fvm: evex.nds.128.66.0f3a.w1 3f /r ib ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 08) 303 001(3f) 120 023 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPW, 4, {OPMASKREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK,0,0,0,0}, nasm_bytecodes+19723, 549, 6073}, + /* 1 : VPCMPW kreg|mask,ymmreg,ymmrm256,imm8 [rvmi:fvm: evex.nds.256.66.0f3a.w1 3f /r ib ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 28) 303 001(3f) 120 023 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPW, 4, {OPMASKREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK,0,0,0,0}, nasm_bytecodes+19733, 549, 6074}, + /* 2 : VPCMPW kreg|mask,zmmreg,zmmrm512,imm8 [rvmi:fvm: evex.nds.512.66.0f3a.w1 3f /r ib ] AVX512BW,FUTURE */ + /* 241(f3 fd 48) 303 001(3f) 120 023 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPW, 4, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK,0,0,0,0}, nasm_bytecodes+19743, 550, 6075}, +}; + +static const struct itemplate instrux_VPCOMPRESSD[6] = { + /* 0 : VPCOMPRESSD mem128|mask,xmmreg [mr:t1s: evex.128.66.0f38.w0 8b /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 08) 306 001(8b) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCOMPRESSD, 2, {MEMORY|BITS128,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+37111, 543, 6076}, + /* 1 : VPCOMPRESSD mem256|mask,ymmreg [mr:t1s: evex.256.66.0f38.w0 8b /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 28) 306 001(8b) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCOMPRESSD, 2, {MEMORY|BITS256,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+37120, 543, 6077}, + /* 2 : VPCOMPRESSD mem512|mask,zmmreg [mr:t1s: evex.512.66.0f38.w0 8b /r ] AVX512,FUTURE */ + /* 250(f2 7d 48) 306 001(8b) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPCOMPRESSD, 2, {MEMORY|BITS512,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+37129, 544, 6078}, + /* 3 : VPCOMPRESSD xmmreg|mask|z,xmmreg [mr: evex.128.66.0f38.w0 8b /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 08) 300 001(8b) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCOMPRESSD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37138, 543, 6079}, + /* 4 : VPCOMPRESSD ymmreg|mask|z,ymmreg [mr: evex.256.66.0f38.w0 8b /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 28) 300 001(8b) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCOMPRESSD, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37147, 543, 6080}, + /* 5 : VPCOMPRESSD zmmreg|mask|z,zmmreg [mr: evex.512.66.0f38.w0 8b /r ] AVX512,FUTURE */ + /* 250(f2 7d 48) 300 001(8b) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPCOMPRESSD, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37156, 544, 6081}, +}; + +static const struct itemplate instrux_VPCOMPRESSQ[6] = { + /* 0 : VPCOMPRESSQ mem128|mask,xmmreg [mr:t1s: evex.128.66.0f38.w1 8b /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 fd 08) 306 001(8b) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCOMPRESSQ, 2, {MEMORY|BITS128,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+37165, 543, 6082}, + /* 1 : VPCOMPRESSQ mem256|mask,ymmreg [mr:t1s: evex.256.66.0f38.w1 8b /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 fd 28) 306 001(8b) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCOMPRESSQ, 2, {MEMORY|BITS256,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+37174, 543, 6083}, + /* 2 : VPCOMPRESSQ mem512|mask,zmmreg [mr:t1s: evex.512.66.0f38.w1 8b /r ] AVX512,FUTURE */ + /* 250(f2 fd 48) 306 001(8b) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPCOMPRESSQ, 2, {MEMORY|BITS512,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+37183, 544, 6084}, + /* 3 : VPCOMPRESSQ xmmreg|mask|z,xmmreg [mr: evex.128.66.0f38.w1 8b /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 fd 08) 300 001(8b) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCOMPRESSQ, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37192, 543, 6085}, + /* 4 : VPCOMPRESSQ ymmreg|mask|z,ymmreg [mr: evex.256.66.0f38.w1 8b /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 fd 28) 300 001(8b) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCOMPRESSQ, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37201, 543, 6086}, + /* 5 : VPCOMPRESSQ zmmreg|mask|z,zmmreg [mr: evex.512.66.0f38.w1 8b /r ] AVX512,FUTURE */ + /* 250(f2 fd 48) 300 001(8b) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPCOMPRESSQ, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37210, 544, 6087}, +}; + +static const struct itemplate instrux_VPCONFLICTD[3] = { + /* 0 : VPCONFLICTD xmmreg|mask|z,xmmrm128|b32 [rm:fv: evex.128.66.0f38.w0 c4 /r ] AVX512CD,AVX512VL,FUTURE */ + /* 250(f2 7d 08) 301 001(c4) 110 : EVEX,PROT,AVX512CD,AVX512VL,FUTURE */ + {I_VPCONFLICTD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+37219, 557, 6088}, + /* 1 : VPCONFLICTD ymmreg|mask|z,ymmrm256|b32 [rm:fv: evex.256.66.0f38.w0 c4 /r ] AVX512CD,AVX512VL,FUTURE */ + /* 250(f2 7d 28) 301 001(c4) 110 : EVEX,PROT,AVX512CD,AVX512VL,FUTURE */ + {I_VPCONFLICTD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+37228, 557, 6089}, + /* 2 : VPCONFLICTD zmmreg|mask|z,zmmrm512|b32 [rm:fv: evex.512.66.0f38.w0 c4 /r ] AVX512CD,FUTURE */ + /* 250(f2 7d 48) 301 001(c4) 110 : EVEX,PROT,AVX512CD,FUTURE */ + {I_VPCONFLICTD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+37237, 558, 6090}, +}; + +static const struct itemplate instrux_VPCONFLICTQ[3] = { + /* 0 : VPCONFLICTQ xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.66.0f38.w1 c4 /r ] AVX512CD,AVX512VL,FUTURE */ + /* 250(f2 fd 08) 301 001(c4) 110 : EVEX,PROT,AVX512CD,AVX512VL,FUTURE */ + {I_VPCONFLICTQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+37246, 557, 6091}, + /* 1 : VPCONFLICTQ ymmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.66.0f38.w1 c4 /r ] AVX512CD,AVX512VL,FUTURE */ + /* 250(f2 fd 28) 301 001(c4) 110 : EVEX,PROT,AVX512CD,AVX512VL,FUTURE */ + {I_VPCONFLICTQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+37255, 557, 6092}, + /* 2 : VPCONFLICTQ zmmreg|mask|z,zmmrm512|b64 [rm:fv: evex.512.66.0f38.w1 c4 /r ] AVX512CD,FUTURE */ + /* 250(f2 fd 48) 301 001(c4) 110 : EVEX,PROT,AVX512CD,FUTURE */ + {I_VPCONFLICTQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+37264, 558, 6093}, +}; + +static const struct itemplate instrux_VPERMB[6] = { + /* 0 : VPERMB xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f38.w0 8d /r ] AVX512VL,AVX512VBMI,FUTURE */ + /* 241(f2 7d 08) 303 001(8d) 120 : EVEX,PROT,AVX512VL,AVX512VBMI,FUTURE */ + {I_VPERMB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37273, 559, 6094}, + /* 1 : VPERMB xmmreg|mask|z,xmmrm128 [r+vm:fvm: evex.nds.128.66.0f38.w0 8d /r ] ND,AVX512VL,AVX512VBMI,FUTURE */ + /* 240(f2 7d 08) 303 001(8d) 110 : EVEX,PROT,AVX512VL,AVX512VBMI,FUTURE */ + {I_VPERMB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37282, 559, 6094}, + /* 2 : VPERMB ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f38.w0 8d /r ] AVX512VL,AVX512VBMI,FUTURE */ + /* 241(f2 7d 28) 303 001(8d) 120 : EVEX,PROT,AVX512VL,AVX512VBMI,FUTURE */ + {I_VPERMB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37291, 559, 6095}, + /* 3 : VPERMB ymmreg|mask|z,ymmrm256 [r+vm:fvm: evex.nds.256.66.0f38.w0 8d /r ] ND,AVX512VL,AVX512VBMI,FUTURE */ + /* 240(f2 7d 28) 303 001(8d) 110 : EVEX,PROT,AVX512VL,AVX512VBMI,FUTURE */ + {I_VPERMB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37300, 559, 6095}, + /* 4 : VPERMB zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f38.w0 8d /r ] AVX512VBMI,FUTURE */ + /* 241(f2 7d 48) 303 001(8d) 120 : EVEX,PROT,AVX512VBMI,FUTURE */ + {I_VPERMB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37309, 560, 6096}, + /* 5 : VPERMB zmmreg|mask|z,zmmrm512 [r+vm:fvm: evex.nds.512.66.0f38.w0 8d /r ] ND,AVX512VBMI,FUTURE */ + /* 240(f2 7d 48) 303 001(8d) 110 : EVEX,PROT,AVX512VBMI,FUTURE */ + {I_VPERMB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37318, 560, 6096}, +}; + +static const struct itemplate instrux_VPERMI2B[3] = { + /* 0 : VPERMI2B xmmreg|mask|z,xmmreg,xmmrm128 [rvm:fvm: evex.nds.128.66.0f38.w0 75 /r ] AVX512VL,AVX512VBMI,FUTURE */ + /* 241(f2 7d 08) 303 001(75) 120 : EVEX,PROT,AVX512VL,AVX512VBMI,FUTURE */ + {I_VPERMI2B, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37363, 559, 6099}, + /* 1 : VPERMI2B ymmreg|mask|z,ymmreg,ymmrm256 [rvm:fvm: evex.nds.256.66.0f38.w0 75 /r ] AVX512VL,AVX512VBMI,FUTURE */ + /* 241(f2 7d 28) 303 001(75) 120 : EVEX,PROT,AVX512VL,AVX512VBMI,FUTURE */ + {I_VPERMI2B, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37372, 559, 6100}, + /* 2 : VPERMI2B zmmreg|mask|z,zmmreg,zmmrm512 [rvm:fvm: evex.nds.512.66.0f38.w0 75 /r ] AVX512VBMI,FUTURE */ + /* 241(f2 7d 48) 303 001(75) 120 : EVEX,PROT,AVX512VBMI,FUTURE */ + {I_VPERMI2B, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37381, 560, 6101}, +}; + +static const struct itemplate instrux_VPERMI2D[3] = { + /* 0 : VPERMI2D xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 76 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(76) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPERMI2D, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+37390, 543, 6102}, + /* 1 : VPERMI2D ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 76 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(76) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPERMI2D, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+37399, 543, 6103}, + /* 2 : VPERMI2D zmmreg|mask|z,zmmreg,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f38.w0 76 /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(76) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPERMI2D, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+37408, 544, 6104}, +}; + +static const struct itemplate instrux_VPERMI2PD[3] = { + /* 0 : VPERMI2PD xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 77 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(77) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPERMI2PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+37417, 543, 6105}, + /* 1 : VPERMI2PD ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 77 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(77) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPERMI2PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+37426, 543, 6106}, + /* 2 : VPERMI2PD zmmreg|mask|z,zmmreg,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 77 /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(77) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPERMI2PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+37435, 544, 6107}, +}; + +static const struct itemplate instrux_VPERMI2PS[3] = { + /* 0 : VPERMI2PS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 77 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(77) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPERMI2PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+37444, 543, 6108}, + /* 1 : VPERMI2PS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 77 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(77) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPERMI2PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+37453, 543, 6109}, + /* 2 : VPERMI2PS zmmreg|mask|z,zmmreg,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f38.w0 77 /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(77) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPERMI2PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+37462, 544, 6110}, +}; + +static const struct itemplate instrux_VPERMI2Q[3] = { + /* 0 : VPERMI2Q xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 76 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(76) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPERMI2Q, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+37471, 543, 6111}, + /* 1 : VPERMI2Q ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 76 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(76) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPERMI2Q, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+37480, 543, 6112}, + /* 2 : VPERMI2Q zmmreg|mask|z,zmmreg,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 76 /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(76) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPERMI2Q, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+37489, 544, 6113}, +}; + +static const struct itemplate instrux_VPERMI2W[3] = { + /* 0 : VPERMI2W xmmreg|mask|z,xmmreg,xmmrm128 [rvm:fvm: evex.nds.128.66.0f38.w1 75 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 fd 08) 303 001(75) 120 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPERMI2W, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37498, 549, 6114}, + /* 1 : VPERMI2W ymmreg|mask|z,ymmreg,ymmrm256 [rvm:fvm: evex.nds.256.66.0f38.w1 75 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 fd 28) 303 001(75) 120 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPERMI2W, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37507, 549, 6115}, + /* 2 : VPERMI2W zmmreg|mask|z,zmmreg,zmmrm512 [rvm:fvm: evex.nds.512.66.0f38.w1 75 /r ] AVX512BW,FUTURE */ + /* 241(f2 fd 48) 303 001(75) 120 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPERMI2W, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37516, 550, 6116}, +}; + +static const struct itemplate instrux_VPERMT2B[3] = { + /* 0 : VPERMT2B xmmreg|mask|z,xmmreg,xmmrm128 [rvm:fvm: evex.nds.128.66.0f38.w0 7d /r ] AVX512VL,AVX512VBMI,FUTURE */ + /* 241(f2 7d 08) 303 001(7d) 120 : EVEX,PROT,AVX512VL,AVX512VBMI,FUTURE */ + {I_VPERMT2B, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37741, 559, 6139}, + /* 1 : VPERMT2B ymmreg|mask|z,ymmreg,ymmrm256 [rvm:fvm: evex.nds.256.66.0f38.w0 7d /r ] AVX512VL,AVX512VBMI,FUTURE */ + /* 241(f2 7d 28) 303 001(7d) 120 : EVEX,PROT,AVX512VL,AVX512VBMI,FUTURE */ + {I_VPERMT2B, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37750, 559, 6140}, + /* 2 : VPERMT2B zmmreg|mask|z,zmmreg,zmmrm512 [rvm:fvm: evex.nds.512.66.0f38.w0 7d /r ] AVX512VBMI,FUTURE */ + /* 241(f2 7d 48) 303 001(7d) 120 : EVEX,PROT,AVX512VBMI,FUTURE */ + {I_VPERMT2B, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37759, 560, 6141}, +}; + +static const struct itemplate instrux_VPERMT2D[3] = { + /* 0 : VPERMT2D xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 7e /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(7e) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPERMT2D, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+37768, 543, 6142}, + /* 1 : VPERMT2D ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 7e /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(7e) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPERMT2D, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+37777, 543, 6143}, + /* 2 : VPERMT2D zmmreg|mask|z,zmmreg,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f38.w0 7e /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(7e) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPERMT2D, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+37786, 544, 6144}, +}; + +static const struct itemplate instrux_VPERMT2PD[3] = { + /* 0 : VPERMT2PD xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 7f /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(7f) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPERMT2PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+37795, 543, 6145}, + /* 1 : VPERMT2PD ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 7f /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(7f) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPERMT2PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+37804, 543, 6146}, + /* 2 : VPERMT2PD zmmreg|mask|z,zmmreg,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 7f /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(7f) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPERMT2PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+37813, 544, 6147}, +}; + +static const struct itemplate instrux_VPERMT2PS[3] = { + /* 0 : VPERMT2PS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 7f /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(7f) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPERMT2PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+37822, 543, 6148}, + /* 1 : VPERMT2PS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 7f /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(7f) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPERMT2PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+37831, 543, 6149}, + /* 2 : VPERMT2PS zmmreg|mask|z,zmmreg,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f38.w0 7f /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(7f) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPERMT2PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+37840, 544, 6150}, +}; + +static const struct itemplate instrux_VPERMT2Q[3] = { + /* 0 : VPERMT2Q xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 7e /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(7e) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPERMT2Q, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+37849, 543, 6151}, + /* 1 : VPERMT2Q ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 7e /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(7e) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPERMT2Q, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+37858, 543, 6152}, + /* 2 : VPERMT2Q zmmreg|mask|z,zmmreg,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 7e /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(7e) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPERMT2Q, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+37867, 544, 6153}, +}; + +static const struct itemplate instrux_VPERMT2W[3] = { + /* 0 : VPERMT2W xmmreg|mask|z,xmmreg,xmmrm128 [rvm:fvm: evex.nds.128.66.0f38.w1 7d /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 fd 08) 303 001(7d) 120 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPERMT2W, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37876, 549, 6154}, + /* 1 : VPERMT2W ymmreg|mask|z,ymmreg,ymmrm256 [rvm:fvm: evex.nds.256.66.0f38.w1 7d /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 fd 28) 303 001(7d) 120 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPERMT2W, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37885, 549, 6155}, + /* 2 : VPERMT2W zmmreg|mask|z,zmmreg,zmmrm512 [rvm:fvm: evex.nds.512.66.0f38.w1 7d /r ] AVX512BW,FUTURE */ + /* 241(f2 fd 48) 303 001(7d) 120 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPERMT2W, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37894, 550, 6156}, +}; + +static const struct itemplate instrux_VPERMW[6] = { + /* 0 : VPERMW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f38.w1 8d /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 fd 08) 303 001(8d) 120 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPERMW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37903, 549, 6157}, + /* 1 : VPERMW xmmreg|mask|z,xmmrm128 [r+vm:fvm: evex.nds.128.66.0f38.w1 8d /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f2 fd 08) 303 001(8d) 110 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPERMW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37912, 549, 6157}, + /* 2 : VPERMW ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f38.w1 8d /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 fd 28) 303 001(8d) 120 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPERMW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37921, 549, 6158}, + /* 3 : VPERMW ymmreg|mask|z,ymmrm256 [r+vm:fvm: evex.nds.256.66.0f38.w1 8d /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f2 fd 28) 303 001(8d) 110 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPERMW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37930, 549, 6158}, + /* 4 : VPERMW zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f38.w1 8d /r ] AVX512BW,FUTURE */ + /* 241(f2 fd 48) 303 001(8d) 120 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPERMW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37939, 550, 6159}, + /* 5 : VPERMW zmmreg|mask|z,zmmrm512 [r+vm:fvm: evex.nds.512.66.0f38.w1 8d /r ] ND,AVX512BW,FUTURE */ + /* 240(f2 fd 48) 303 001(8d) 110 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPERMW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37948, 550, 6159}, +}; + +static const struct itemplate instrux_VPEXPANDD[6] = { + /* 0 : VPEXPANDD xmmreg|mask|z,mem128 [rm:t1s: evex.128.66.0f38.w0 89 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 08) 306 001(89) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPEXPANDD, 2, {XMMREG,MEMORY|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37957, 543, 6160}, + /* 1 : VPEXPANDD ymmreg|mask|z,mem256 [rm:t1s: evex.256.66.0f38.w0 89 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 28) 306 001(89) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPEXPANDD, 2, {YMMREG,MEMORY|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37966, 543, 6161}, + /* 2 : VPEXPANDD zmmreg|mask|z,mem512 [rm:t1s: evex.512.66.0f38.w0 89 /r ] AVX512,FUTURE */ + /* 250(f2 7d 48) 306 001(89) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPEXPANDD, 2, {ZMMREG,MEMORY|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37975, 544, 6162}, + /* 3 : VPEXPANDD xmmreg|mask|z,xmmreg [rm:t1s: evex.128.66.0f38.w0 89 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 08) 306 001(89) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPEXPANDD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37957, 543, 6163}, + /* 4 : VPEXPANDD ymmreg|mask|z,ymmreg [rm:t1s: evex.256.66.0f38.w0 89 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 28) 306 001(89) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPEXPANDD, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37966, 543, 6164}, + /* 5 : VPEXPANDD zmmreg|mask|z,zmmreg [rm:t1s: evex.512.66.0f38.w0 89 /r ] AVX512,FUTURE */ + /* 250(f2 7d 48) 306 001(89) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPEXPANDD, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37975, 544, 6165}, +}; + +static const struct itemplate instrux_VPEXPANDQ[6] = { + /* 0 : VPEXPANDQ xmmreg|mask|z,mem128 [rm:t1s: evex.128.66.0f38.w1 89 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 fd 08) 306 001(89) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPEXPANDQ, 2, {XMMREG,MEMORY|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37984, 543, 6166}, + /* 1 : VPEXPANDQ ymmreg|mask|z,mem256 [rm:t1s: evex.256.66.0f38.w1 89 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 fd 28) 306 001(89) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPEXPANDQ, 2, {YMMREG,MEMORY|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37993, 543, 6167}, + /* 2 : VPEXPANDQ zmmreg|mask|z,mem512 [rm:t1s: evex.512.66.0f38.w1 89 /r ] AVX512,FUTURE */ + /* 250(f2 fd 48) 306 001(89) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPEXPANDQ, 2, {ZMMREG,MEMORY|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38002, 544, 6168}, + /* 3 : VPEXPANDQ xmmreg|mask|z,xmmreg [rm:t1s: evex.128.66.0f38.w1 89 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 fd 08) 306 001(89) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPEXPANDQ, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37984, 543, 6169}, + /* 4 : VPEXPANDQ ymmreg|mask|z,ymmreg [rm:t1s: evex.256.66.0f38.w1 89 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 fd 28) 306 001(89) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPEXPANDQ, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37993, 543, 6170}, + /* 5 : VPEXPANDQ zmmreg|mask|z,zmmreg [rm:t1s: evex.512.66.0f38.w1 89 /r ] AVX512,FUTURE */ + /* 250(f2 fd 48) 306 001(89) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPEXPANDQ, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38002, 544, 6171}, +}; + +static const struct itemplate instrux_VPLZCNTD[3] = { + /* 0 : VPLZCNTD xmmreg|mask|z,xmmrm128|b32 [rm:fv: evex.128.66.0f38.w0 44 /r ] AVX512CD,AVX512VL,FUTURE */ + /* 250(f2 7d 08) 301 001(44) 110 : EVEX,PROT,AVX512CD,AVX512VL,FUTURE */ + {I_VPLZCNTD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+38011, 557, 6204}, + /* 1 : VPLZCNTD ymmreg|mask|z,ymmrm256|b32 [rm:fv: evex.256.66.0f38.w0 44 /r ] AVX512CD,AVX512VL,FUTURE */ + /* 250(f2 7d 28) 301 001(44) 110 : EVEX,PROT,AVX512CD,AVX512VL,FUTURE */ + {I_VPLZCNTD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+38020, 557, 6205}, + /* 2 : VPLZCNTD zmmreg|mask|z,zmmrm512|b32 [rm:fv: evex.512.66.0f38.w0 44 /r ] AVX512CD,FUTURE */ + /* 250(f2 7d 48) 301 001(44) 110 : EVEX,PROT,AVX512CD,FUTURE */ + {I_VPLZCNTD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+38029, 558, 6206}, +}; + +static const struct itemplate instrux_VPLZCNTQ[3] = { + /* 0 : VPLZCNTQ xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.66.0f38.w1 44 /r ] AVX512CD,AVX512VL,FUTURE */ + /* 250(f2 fd 08) 301 001(44) 110 : EVEX,PROT,AVX512CD,AVX512VL,FUTURE */ + {I_VPLZCNTQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+38038, 557, 6207}, + /* 1 : VPLZCNTQ ymmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.66.0f38.w1 44 /r ] AVX512CD,AVX512VL,FUTURE */ + /* 250(f2 fd 28) 301 001(44) 110 : EVEX,PROT,AVX512CD,AVX512VL,FUTURE */ + {I_VPLZCNTQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+38047, 557, 6208}, + /* 2 : VPLZCNTQ zmmreg|mask|z,zmmrm512|b64 [rm:fv: evex.512.66.0f38.w1 44 /r ] AVX512CD,FUTURE */ + /* 250(f2 fd 48) 301 001(44) 110 : EVEX,PROT,AVX512CD,FUTURE */ + {I_VPLZCNTQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+38056, 558, 6209}, +}; + +static const struct itemplate instrux_VPMAXSQ[6] = { + /* 0 : VPMAXSQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 3d /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(3d) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMAXSQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+38335, 543, 6228}, + /* 1 : VPMAXSQ xmmreg|mask|z,xmmrm128|b64 [r+vm:fv: evex.nds.128.66.0f38.w1 3d /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f2 fd 08) 301 001(3d) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMAXSQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+38344, 543, 6228}, + /* 2 : VPMAXSQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 3d /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(3d) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMAXSQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+38353, 543, 6229}, + /* 3 : VPMAXSQ ymmreg|mask|z,ymmrm256|b64 [r+vm:fv: evex.nds.256.66.0f38.w1 3d /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f2 fd 28) 301 001(3d) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMAXSQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+38362, 543, 6229}, + /* 4 : VPMAXSQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 3d /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(3d) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMAXSQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+38371, 544, 6230}, + /* 5 : VPMAXSQ zmmreg|mask|z,zmmrm512|b64 [r+vm:fv: evex.nds.512.66.0f38.w1 3d /r ] ND,AVX512,FUTURE */ + /* 240(f2 fd 48) 301 001(3d) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMAXSQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+38380, 544, 6230}, +}; + +static const struct itemplate instrux_VPMAXUQ[6] = { + /* 0 : VPMAXUQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 3f /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(3f) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMAXUQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+38551, 543, 6240}, + /* 1 : VPMAXUQ xmmreg|mask|z,xmmrm128|b64 [r+vm:fv: evex.nds.128.66.0f38.w1 3f /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f2 fd 08) 301 001(3f) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMAXUQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+38560, 543, 6240}, + /* 2 : VPMAXUQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 3f /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(3f) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMAXUQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+38569, 543, 6241}, + /* 3 : VPMAXUQ ymmreg|mask|z,ymmrm256|b64 [r+vm:fv: evex.nds.256.66.0f38.w1 3f /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f2 fd 28) 301 001(3f) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMAXUQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+38578, 543, 6241}, + /* 4 : VPMAXUQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 3f /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(3f) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMAXUQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+38587, 544, 6242}, + /* 5 : VPMAXUQ zmmreg|mask|z,zmmrm512|b64 [r+vm:fv: evex.nds.512.66.0f38.w1 3f /r ] ND,AVX512,FUTURE */ + /* 240(f2 fd 48) 301 001(3f) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMAXUQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+38596, 544, 6242}, +}; + +static const struct itemplate instrux_VPMINSQ[6] = { + /* 0 : VPMINSQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 39 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(39) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMINSQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+38767, 543, 6252}, + /* 1 : VPMINSQ xmmreg|mask|z,xmmrm128|b64 [r+vm:fv: evex.nds.128.66.0f38.w1 39 /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f2 fd 08) 301 001(39) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMINSQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+38776, 543, 6252}, + /* 2 : VPMINSQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 39 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(39) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMINSQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+38785, 543, 6253}, + /* 3 : VPMINSQ ymmreg|mask|z,ymmrm256|b64 [r+vm:fv: evex.nds.256.66.0f38.w1 39 /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f2 fd 28) 301 001(39) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMINSQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+38794, 543, 6253}, + /* 4 : VPMINSQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 39 /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(39) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMINSQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+38803, 544, 6254}, + /* 5 : VPMINSQ zmmreg|mask|z,zmmrm512|b64 [r+vm:fv: evex.nds.512.66.0f38.w1 39 /r ] ND,AVX512,FUTURE */ + /* 240(f2 fd 48) 301 001(39) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMINSQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+38812, 544, 6254}, +}; + +static const struct itemplate instrux_VPMINUQ[6] = { + /* 0 : VPMINUQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 3b /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(3b) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMINUQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+38983, 543, 6264}, + /* 1 : VPMINUQ xmmreg|mask|z,xmmrm128|b64 [r+vm:fv: evex.nds.128.66.0f38.w1 3b /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f2 fd 08) 301 001(3b) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMINUQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+38992, 543, 6264}, + /* 2 : VPMINUQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 3b /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(3b) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMINUQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+39001, 543, 6265}, + /* 3 : VPMINUQ ymmreg|mask|z,ymmrm256|b64 [r+vm:fv: evex.nds.256.66.0f38.w1 3b /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f2 fd 28) 301 001(3b) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMINUQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+39010, 543, 6265}, + /* 4 : VPMINUQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 3b /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(3b) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMINUQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+39019, 544, 6266}, + /* 5 : VPMINUQ zmmreg|mask|z,zmmrm512|b64 [r+vm:fv: evex.nds.512.66.0f38.w1 3b /r ] ND,AVX512,FUTURE */ + /* 240(f2 fd 48) 301 001(3b) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMINUQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+39028, 544, 6266}, +}; + +static const struct itemplate instrux_VPMOVB2M[3] = { + /* 0 : VPMOVB2M kreg,xmmreg [rm: evex.128.f3.0f38.w0 29 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7e 08) 300 001(29) 110 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMOVB2M, 2, {OPMASKREG,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+39091, 549, 6270}, + /* 1 : VPMOVB2M kreg,ymmreg [rm: evex.256.f3.0f38.w0 29 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7e 28) 300 001(29) 110 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMOVB2M, 2, {OPMASKREG,YMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+39100, 549, 6271}, + /* 2 : VPMOVB2M kreg,zmmreg [rm: evex.512.f3.0f38.w0 29 /r ] AVX512BW,FUTURE */ + /* 250(f2 7e 48) 300 001(29) 110 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPMOVB2M, 2, {OPMASKREG,ZMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+39109, 550, 6272}, +}; + +static const struct itemplate instrux_VPMOVD2M[3] = { + /* 0 : VPMOVD2M kreg,xmmreg [rm: evex.128.f3.0f38.w0 39 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f2 7e 08) 300 001(39) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VPMOVD2M, 2, {OPMASKREG,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+39118, 546, 6273}, + /* 1 : VPMOVD2M kreg,ymmreg [rm: evex.256.f3.0f38.w0 39 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f2 7e 28) 300 001(39) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VPMOVD2M, 2, {OPMASKREG,YMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+39127, 546, 6274}, + /* 2 : VPMOVD2M kreg,zmmreg [rm: evex.512.f3.0f38.w0 39 /r ] AVX512DQ,FUTURE */ + /* 250(f2 7e 48) 300 001(39) 110 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VPMOVD2M, 2, {OPMASKREG,ZMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+39136, 547, 6275}, +}; + +static const struct itemplate instrux_VPMOVDB[6] = { + /* 0 : VPMOVDB xmmreg|mask|z,xmmreg [mr: evex.128.f3.0f38.w0 31 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 08) 300 001(31) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVDB, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39145, 543, 6276}, + /* 1 : VPMOVDB xmmreg|mask|z,ymmreg [mr: evex.256.f3.0f38.w0 31 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 28) 300 001(31) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVDB, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39154, 543, 6277}, + /* 2 : VPMOVDB xmmreg|mask|z,zmmreg [mr: evex.512.f3.0f38.w0 31 /r ] AVX512,FUTURE */ + /* 250(f2 7e 48) 300 001(31) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVDB, 2, {XMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39163, 544, 6278}, + /* 3 : VPMOVDB mem32|mask,xmmreg [mr:qvm: evex.128.f3.0f38.w0 31 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 08) 315 001(31) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVDB, 2, {MEMORY|BITS32,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+39172, 543, 6279}, + /* 4 : VPMOVDB mem64|mask,ymmreg [mr:qvm: evex.256.f3.0f38.w0 31 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 28) 315 001(31) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVDB, 2, {MEMORY|BITS64,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+39181, 543, 6280}, + /* 5 : VPMOVDB mem128|mask,zmmreg [mr:qvm: evex.512.f3.0f38.w0 31 /r ] AVX512,FUTURE */ + /* 250(f2 7e 48) 315 001(31) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVDB, 2, {MEMORY|BITS128,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+39190, 544, 6281}, +}; + +static const struct itemplate instrux_VPMOVDW[6] = { + /* 0 : VPMOVDW xmmreg|mask|z,xmmreg [mr: evex.128.f3.0f38.w0 33 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 08) 300 001(33) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVDW, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39199, 543, 6282}, + /* 1 : VPMOVDW xmmreg|mask|z,ymmreg [mr: evex.256.f3.0f38.w0 33 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 28) 300 001(33) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVDW, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39208, 543, 6283}, + /* 2 : VPMOVDW ymmreg|mask|z,zmmreg [mr: evex.512.f3.0f38.w0 33 /r ] AVX512,FUTURE */ + /* 250(f2 7e 48) 300 001(33) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVDW, 2, {YMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39217, 544, 6284}, + /* 3 : VPMOVDW mem64|mask,xmmreg [mr:hvm: evex.128.f3.0f38.w0 33 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 08) 314 001(33) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVDW, 2, {MEMORY|BITS64,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+39226, 543, 6285}, + /* 4 : VPMOVDW mem128|mask,ymmreg [mr:hvm: evex.256.f3.0f38.w0 33 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 28) 314 001(33) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVDW, 2, {MEMORY|BITS128,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+39235, 543, 6286}, + /* 5 : VPMOVDW mem256|mask,zmmreg [mr:hvm: evex.512.f3.0f38.w0 33 /r ] AVX512,FUTURE */ + /* 250(f2 7e 48) 314 001(33) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVDW, 2, {MEMORY|BITS256,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+39244, 544, 6287}, +}; + +static const struct itemplate instrux_VPMOVM2B[3] = { + /* 0 : VPMOVM2B xmmreg,kreg [rm: evex.128.f3.0f38.w0 28 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7e 08) 300 001(28) 110 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMOVM2B, 2, {XMMREG,OPMASKREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+39253, 549, 6288}, + /* 1 : VPMOVM2B ymmreg,kreg [rm: evex.256.f3.0f38.w0 28 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7e 28) 300 001(28) 110 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMOVM2B, 2, {YMMREG,OPMASKREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+39262, 549, 6289}, + /* 2 : VPMOVM2B zmmreg,kreg [rm: evex.512.f3.0f38.w0 28 /r ] AVX512BW,FUTURE */ + /* 250(f2 7e 48) 300 001(28) 110 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPMOVM2B, 2, {ZMMREG,OPMASKREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+39271, 550, 6290}, +}; + +static const struct itemplate instrux_VPMOVM2D[3] = { + /* 0 : VPMOVM2D xmmreg,kreg [rm: evex.128.f3.0f38.w0 38 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f2 7e 08) 300 001(38) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VPMOVM2D, 2, {XMMREG,OPMASKREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+39280, 546, 6291}, + /* 1 : VPMOVM2D ymmreg,kreg [rm: evex.256.f3.0f38.w0 38 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f2 7e 28) 300 001(38) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VPMOVM2D, 2, {YMMREG,OPMASKREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+39289, 546, 6292}, + /* 2 : VPMOVM2D zmmreg,kreg [rm: evex.512.f3.0f38.w0 38 /r ] AVX512DQ,FUTURE */ + /* 250(f2 7e 48) 300 001(38) 110 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VPMOVM2D, 2, {ZMMREG,OPMASKREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+39298, 547, 6293}, +}; + +static const struct itemplate instrux_VPMOVM2Q[3] = { + /* 0 : VPMOVM2Q xmmreg,kreg [rm: evex.128.f3.0f38.w1 38 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f2 fe 08) 300 001(38) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VPMOVM2Q, 2, {XMMREG,OPMASKREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+39307, 546, 6294}, + /* 1 : VPMOVM2Q ymmreg,kreg [rm: evex.256.f3.0f38.w1 38 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f2 fe 28) 300 001(38) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VPMOVM2Q, 2, {YMMREG,OPMASKREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+39316, 546, 6295}, + /* 2 : VPMOVM2Q zmmreg,kreg [rm: evex.512.f3.0f38.w1 38 /r ] AVX512DQ,FUTURE */ + /* 250(f2 fe 48) 300 001(38) 110 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VPMOVM2Q, 2, {ZMMREG,OPMASKREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+39325, 547, 6296}, +}; + +static const struct itemplate instrux_VPMOVM2W[3] = { + /* 0 : VPMOVM2W xmmreg,kreg [rm: evex.128.f3.0f38.w1 28 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 fe 08) 300 001(28) 110 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMOVM2W, 2, {XMMREG,OPMASKREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+39334, 549, 6297}, + /* 1 : VPMOVM2W ymmreg,kreg [rm: evex.256.f3.0f38.w1 28 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 fe 28) 300 001(28) 110 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMOVM2W, 2, {YMMREG,OPMASKREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+39343, 549, 6298}, + /* 2 : VPMOVM2W zmmreg,kreg [rm: evex.512.f3.0f38.w1 28 /r ] AVX512BW,FUTURE */ + /* 250(f2 fe 48) 300 001(28) 110 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPMOVM2W, 2, {ZMMREG,OPMASKREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+39352, 550, 6299}, +}; + +static const struct itemplate instrux_VPMOVQ2M[3] = { + /* 0 : VPMOVQ2M kreg,xmmreg [rm: evex.128.f3.0f38.w1 39 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f2 fe 08) 300 001(39) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VPMOVQ2M, 2, {OPMASKREG,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+39361, 546, 6300}, + /* 1 : VPMOVQ2M kreg,ymmreg [rm: evex.256.f3.0f38.w1 39 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f2 fe 28) 300 001(39) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VPMOVQ2M, 2, {OPMASKREG,YMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+39370, 546, 6301}, + /* 2 : VPMOVQ2M kreg,zmmreg [rm: evex.512.f3.0f38.w1 39 /r ] AVX512DQ,FUTURE */ + /* 250(f2 fe 48) 300 001(39) 110 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VPMOVQ2M, 2, {OPMASKREG,ZMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+39379, 547, 6302}, +}; + +static const struct itemplate instrux_VPMOVQB[6] = { + /* 0 : VPMOVQB xmmreg|mask|z,xmmreg [mr: evex.128.f3.0f38.w0 32 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 08) 300 001(32) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVQB, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39388, 543, 6303}, + /* 1 : VPMOVQB xmmreg|mask|z,ymmreg [mr: evex.256.f3.0f38.w0 32 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 28) 300 001(32) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVQB, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39397, 543, 6304}, + /* 2 : VPMOVQB xmmreg|mask|z,zmmreg [mr: evex.512.f3.0f38.w0 32 /r ] AVX512,FUTURE */ + /* 250(f2 7e 48) 300 001(32) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVQB, 2, {XMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39406, 544, 6305}, + /* 3 : VPMOVQB mem16|mask,xmmreg [mr:ovm: evex.128.f3.0f38.w0 32 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 08) 316 001(32) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVQB, 2, {MEMORY|BITS16,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+39415, 543, 6306}, + /* 4 : VPMOVQB mem32|mask,ymmreg [mr:ovm: evex.256.f3.0f38.w0 32 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 28) 316 001(32) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVQB, 2, {MEMORY|BITS32,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+39424, 543, 6307}, + /* 5 : VPMOVQB mem64|mask,zmmreg [mr:ovm: evex.512.f3.0f38.w0 32 /r ] AVX512,FUTURE */ + /* 250(f2 7e 48) 316 001(32) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVQB, 2, {MEMORY|BITS64,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+39433, 544, 6308}, +}; + +static const struct itemplate instrux_VPMOVQD[6] = { + /* 0 : VPMOVQD xmmreg|mask|z,xmmreg [mr: evex.128.f3.0f38.w0 35 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 08) 300 001(35) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVQD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39442, 543, 6309}, + /* 1 : VPMOVQD xmmreg|mask|z,ymmreg [mr: evex.256.f3.0f38.w0 35 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 28) 300 001(35) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVQD, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39451, 543, 6310}, + /* 2 : VPMOVQD ymmreg|mask|z,zmmreg [mr: evex.512.f3.0f38.w0 35 /r ] AVX512,FUTURE */ + /* 250(f2 7e 48) 300 001(35) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVQD, 2, {YMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39460, 544, 6311}, + /* 3 : VPMOVQD mem64|mask,xmmreg [mr:hvm: evex.128.f3.0f38.w0 35 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 08) 314 001(35) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVQD, 2, {MEMORY|BITS64,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+39469, 543, 6312}, + /* 4 : VPMOVQD mem128|mask,ymmreg [mr:hvm: evex.256.f3.0f38.w0 35 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 28) 314 001(35) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVQD, 2, {MEMORY|BITS128,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+39478, 543, 6313}, + /* 5 : VPMOVQD mem256|mask,zmmreg [mr:hvm: evex.512.f3.0f38.w0 35 /r ] AVX512,FUTURE */ + /* 250(f2 7e 48) 314 001(35) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVQD, 2, {MEMORY|BITS256,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+39487, 544, 6314}, +}; + +static const struct itemplate instrux_VPMOVQW[6] = { + /* 0 : VPMOVQW xmmreg|mask|z,xmmreg [mr: evex.128.f3.0f38.w0 34 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 08) 300 001(34) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVQW, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39496, 543, 6315}, + /* 1 : VPMOVQW xmmreg|mask|z,ymmreg [mr: evex.256.f3.0f38.w0 34 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 28) 300 001(34) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVQW, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39505, 543, 6316}, + /* 2 : VPMOVQW xmmreg|mask|z,zmmreg [mr: evex.512.f3.0f38.w0 34 /r ] AVX512,FUTURE */ + /* 250(f2 7e 48) 300 001(34) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVQW, 2, {XMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39514, 544, 6317}, + /* 3 : VPMOVQW mem32|mask,xmmreg [mr:qvm: evex.128.f3.0f38.w0 34 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 08) 315 001(34) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVQW, 2, {MEMORY|BITS32,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+39523, 543, 6318}, + /* 4 : VPMOVQW mem64|mask,ymmreg [mr:qvm: evex.256.f3.0f38.w0 34 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 28) 315 001(34) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVQW, 2, {MEMORY|BITS64,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+39532, 543, 6319}, + /* 5 : VPMOVQW mem128|mask,zmmreg [mr:qvm: evex.512.f3.0f38.w0 34 /r ] AVX512,FUTURE */ + /* 250(f2 7e 48) 315 001(34) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVQW, 2, {MEMORY|BITS128,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+39541, 544, 6320}, +}; + +static const struct itemplate instrux_VPMOVSDB[6] = { + /* 0 : VPMOVSDB xmmreg|mask|z,xmmreg [mr: evex.128.f3.0f38.w0 21 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 08) 300 001(21) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVSDB, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39550, 543, 6321}, + /* 1 : VPMOVSDB xmmreg|mask|z,ymmreg [mr: evex.256.f3.0f38.w0 21 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 28) 300 001(21) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVSDB, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39559, 543, 6322}, + /* 2 : VPMOVSDB xmmreg|mask|z,zmmreg [mr: evex.512.f3.0f38.w0 21 /r ] AVX512,FUTURE */ + /* 250(f2 7e 48) 300 001(21) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVSDB, 2, {XMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39568, 544, 6323}, + /* 3 : VPMOVSDB mem32|mask,xmmreg [mr:qvm: evex.128.f3.0f38.w0 21 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 08) 315 001(21) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVSDB, 2, {MEMORY|BITS32,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+39577, 543, 6324}, + /* 4 : VPMOVSDB mem64|mask,ymmreg [mr:qvm: evex.256.f3.0f38.w0 21 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 28) 315 001(21) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVSDB, 2, {MEMORY|BITS64,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+39586, 543, 6325}, + /* 5 : VPMOVSDB mem128|mask,zmmreg [mr:qvm: evex.512.f3.0f38.w0 21 /r ] AVX512,FUTURE */ + /* 250(f2 7e 48) 315 001(21) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVSDB, 2, {MEMORY|BITS128,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+39595, 544, 6326}, +}; + +static const struct itemplate instrux_VPMOVSDW[6] = { + /* 0 : VPMOVSDW xmmreg|mask|z,xmmreg [mr: evex.128.f3.0f38.w0 23 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 08) 300 001(23) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVSDW, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39604, 543, 6327}, + /* 1 : VPMOVSDW xmmreg|mask|z,ymmreg [mr: evex.256.f3.0f38.w0 23 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 28) 300 001(23) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVSDW, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39613, 543, 6328}, + /* 2 : VPMOVSDW ymmreg|mask|z,zmmreg [mr: evex.512.f3.0f38.w0 23 /r ] AVX512,FUTURE */ + /* 250(f2 7e 48) 300 001(23) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVSDW, 2, {YMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39622, 544, 6329}, + /* 3 : VPMOVSDW mem64|mask,xmmreg [mr:hvm: evex.128.f3.0f38.w0 23 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 08) 314 001(23) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVSDW, 2, {MEMORY|BITS64,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+39631, 543, 6330}, + /* 4 : VPMOVSDW mem128|mask,ymmreg [mr:hvm: evex.256.f3.0f38.w0 23 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 28) 314 001(23) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVSDW, 2, {MEMORY|BITS128,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+39640, 543, 6331}, + /* 5 : VPMOVSDW mem256|mask,zmmreg [mr:hvm: evex.512.f3.0f38.w0 23 /r ] AVX512,FUTURE */ + /* 250(f2 7e 48) 314 001(23) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVSDW, 2, {MEMORY|BITS256,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+39649, 544, 6332}, +}; + +static const struct itemplate instrux_VPMOVSQB[6] = { + /* 0 : VPMOVSQB xmmreg|mask|z,xmmreg [mr: evex.128.f3.0f38.w0 22 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 08) 300 001(22) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVSQB, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39658, 543, 6333}, + /* 1 : VPMOVSQB xmmreg|mask|z,ymmreg [mr: evex.256.f3.0f38.w0 22 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 28) 300 001(22) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVSQB, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39667, 543, 6334}, + /* 2 : VPMOVSQB xmmreg|mask|z,zmmreg [mr: evex.512.f3.0f38.w0 22 /r ] AVX512,FUTURE */ + /* 250(f2 7e 48) 300 001(22) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVSQB, 2, {XMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39676, 544, 6335}, + /* 3 : VPMOVSQB mem16|mask,xmmreg [mr:ovm: evex.128.f3.0f38.w0 22 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 08) 316 001(22) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVSQB, 2, {MEMORY|BITS16,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+39685, 543, 6336}, + /* 4 : VPMOVSQB mem32|mask,ymmreg [mr:ovm: evex.256.f3.0f38.w0 22 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 28) 316 001(22) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVSQB, 2, {MEMORY|BITS32,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+39694, 543, 6337}, + /* 5 : VPMOVSQB mem64|mask,zmmreg [mr:ovm: evex.512.f3.0f38.w0 22 /r ] AVX512,FUTURE */ + /* 250(f2 7e 48) 316 001(22) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVSQB, 2, {MEMORY|BITS64,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+39703, 544, 6338}, +}; + +static const struct itemplate instrux_VPMOVSQD[6] = { + /* 0 : VPMOVSQD xmmreg|mask|z,xmmreg [mr: evex.128.f3.0f38.w0 25 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 08) 300 001(25) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVSQD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39712, 543, 6339}, + /* 1 : VPMOVSQD xmmreg|mask|z,ymmreg [mr: evex.256.f3.0f38.w0 25 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 28) 300 001(25) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVSQD, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39721, 543, 6340}, + /* 2 : VPMOVSQD ymmreg|mask|z,zmmreg [mr: evex.512.f3.0f38.w0 25 /r ] AVX512,FUTURE */ + /* 250(f2 7e 48) 300 001(25) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVSQD, 2, {YMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39730, 544, 6341}, + /* 3 : VPMOVSQD mem64|mask,xmmreg [mr:hvm: evex.128.f3.0f38.w0 25 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 08) 314 001(25) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVSQD, 2, {MEMORY|BITS64,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+39739, 543, 6342}, + /* 4 : VPMOVSQD mem128|mask,ymmreg [mr:hvm: evex.256.f3.0f38.w0 25 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 28) 314 001(25) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVSQD, 2, {MEMORY|BITS128,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+39748, 543, 6343}, + /* 5 : VPMOVSQD mem256|mask,zmmreg [mr:hvm: evex.512.f3.0f38.w0 25 /r ] AVX512,FUTURE */ + /* 250(f2 7e 48) 314 001(25) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVSQD, 2, {MEMORY|BITS256,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+39757, 544, 6344}, +}; + +static const struct itemplate instrux_VPMOVSQW[6] = { + /* 0 : VPMOVSQW xmmreg|mask|z,xmmreg [mr: evex.128.f3.0f38.w0 24 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 08) 300 001(24) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVSQW, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39766, 543, 6345}, + /* 1 : VPMOVSQW xmmreg|mask|z,ymmreg [mr: evex.256.f3.0f38.w0 24 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 28) 300 001(24) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVSQW, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39775, 543, 6346}, + /* 2 : VPMOVSQW xmmreg|mask|z,zmmreg [mr: evex.512.f3.0f38.w0 24 /r ] AVX512,FUTURE */ + /* 250(f2 7e 48) 300 001(24) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVSQW, 2, {XMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39784, 544, 6347}, + /* 3 : VPMOVSQW mem32|mask,xmmreg [mr:qvm: evex.128.f3.0f38.w0 24 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 08) 315 001(24) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVSQW, 2, {MEMORY|BITS32,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+39793, 543, 6348}, + /* 4 : VPMOVSQW mem64|mask,ymmreg [mr:qvm: evex.256.f3.0f38.w0 24 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 28) 315 001(24) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVSQW, 2, {MEMORY|BITS64,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+39802, 543, 6349}, + /* 5 : VPMOVSQW mem128|mask,zmmreg [mr:qvm: evex.512.f3.0f38.w0 24 /r ] AVX512,FUTURE */ + /* 250(f2 7e 48) 315 001(24) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVSQW, 2, {MEMORY|BITS128,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+39811, 544, 6350}, +}; + +static const struct itemplate instrux_VPMOVSWB[6] = { + /* 0 : VPMOVSWB xmmreg|mask|z,xmmreg [mr: evex.128.f3.0f38.w0 20 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7e 08) 300 001(20) 101 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMOVSWB, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39820, 549, 6351}, + /* 1 : VPMOVSWB xmmreg|mask|z,ymmreg [mr: evex.256.f3.0f38.w0 20 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7e 28) 300 001(20) 101 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMOVSWB, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39829, 549, 6352}, + /* 2 : VPMOVSWB ymmreg|mask|z,zmmreg [mr: evex.512.f3.0f38.w0 20 /r ] AVX512BW,FUTURE */ + /* 250(f2 7e 48) 300 001(20) 101 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPMOVSWB, 2, {YMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39838, 550, 6353}, + /* 3 : VPMOVSWB mem64|mask,xmmreg [mr:hvm: evex.128.f3.0f38.w0 20 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7e 08) 314 001(20) 101 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMOVSWB, 2, {MEMORY|BITS64,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+39847, 549, 6354}, + /* 4 : VPMOVSWB mem128|mask,ymmreg [mr:hvm: evex.256.f3.0f38.w0 20 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7e 28) 314 001(20) 101 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMOVSWB, 2, {MEMORY|BITS128,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+39856, 549, 6355}, + /* 5 : VPMOVSWB mem256|mask,zmmreg [mr:hvm: evex.512.f3.0f38.w0 20 /r ] AVX512BW,FUTURE */ + /* 250(f2 7e 48) 314 001(20) 101 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPMOVSWB, 2, {MEMORY|BITS256,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+39865, 550, 6356}, +}; + +static const struct itemplate instrux_VPMOVUSDB[6] = { + /* 0 : VPMOVUSDB xmmreg|mask|z,xmmreg [mr: evex.128.f3.0f38.w0 11 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 08) 300 001(11) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVUSDB, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40036, 543, 6375}, + /* 1 : VPMOVUSDB xmmreg|mask|z,ymmreg [mr: evex.256.f3.0f38.w0 11 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 28) 300 001(11) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVUSDB, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40045, 543, 6376}, + /* 2 : VPMOVUSDB xmmreg|mask|z,zmmreg [mr: evex.512.f3.0f38.w0 11 /r ] AVX512,FUTURE */ + /* 250(f2 7e 48) 300 001(11) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVUSDB, 2, {XMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40054, 544, 6377}, + /* 3 : VPMOVUSDB mem32|mask,xmmreg [mr:qvm: evex.128.f3.0f38.w0 11 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 08) 315 001(11) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVUSDB, 2, {MEMORY|BITS32,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+40063, 543, 6378}, + /* 4 : VPMOVUSDB mem64|mask,ymmreg [mr:qvm: evex.256.f3.0f38.w0 11 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 28) 315 001(11) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVUSDB, 2, {MEMORY|BITS64,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+40072, 543, 6379}, + /* 5 : VPMOVUSDB mem128|mask,zmmreg [mr:qvm: evex.512.f3.0f38.w0 11 /r ] AVX512,FUTURE */ + /* 250(f2 7e 48) 315 001(11) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVUSDB, 2, {MEMORY|BITS128,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+40081, 544, 6380}, +}; + +static const struct itemplate instrux_VPMOVUSDW[6] = { + /* 0 : VPMOVUSDW xmmreg|mask|z,xmmreg [mr: evex.128.f3.0f38.w0 13 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 08) 300 001(13) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVUSDW, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40090, 543, 6381}, + /* 1 : VPMOVUSDW xmmreg|mask|z,ymmreg [mr: evex.256.f3.0f38.w0 13 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 28) 300 001(13) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVUSDW, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40099, 543, 6382}, + /* 2 : VPMOVUSDW ymmreg|mask|z,zmmreg [mr: evex.512.f3.0f38.w0 13 /r ] AVX512,FUTURE */ + /* 250(f2 7e 48) 300 001(13) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVUSDW, 2, {YMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40108, 544, 6383}, + /* 3 : VPMOVUSDW mem64|mask,xmmreg [mr:hvm: evex.128.f3.0f38.w0 13 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 08) 314 001(13) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVUSDW, 2, {MEMORY|BITS64,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+40117, 543, 6384}, + /* 4 : VPMOVUSDW mem128|mask,ymmreg [mr:hvm: evex.256.f3.0f38.w0 13 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 28) 314 001(13) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVUSDW, 2, {MEMORY|BITS128,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+40126, 543, 6385}, + /* 5 : VPMOVUSDW mem256|mask,zmmreg [mr:hvm: evex.512.f3.0f38.w0 13 /r ] AVX512,FUTURE */ + /* 250(f2 7e 48) 314 001(13) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVUSDW, 2, {MEMORY|BITS256,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+40135, 544, 6386}, +}; + +static const struct itemplate instrux_VPMOVUSQB[6] = { + /* 0 : VPMOVUSQB xmmreg|mask|z,xmmreg [mr: evex.128.f3.0f38.w0 12 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 08) 300 001(12) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVUSQB, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40144, 543, 6387}, + /* 1 : VPMOVUSQB xmmreg|mask|z,ymmreg [mr: evex.256.f3.0f38.w0 12 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 28) 300 001(12) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVUSQB, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40153, 543, 6388}, + /* 2 : VPMOVUSQB xmmreg|mask|z,zmmreg [mr: evex.512.f3.0f38.w0 12 /r ] AVX512,FUTURE */ + /* 250(f2 7e 48) 300 001(12) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVUSQB, 2, {XMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40162, 544, 6389}, + /* 3 : VPMOVUSQB mem16|mask,xmmreg [mr:ovm: evex.128.f3.0f38.w0 12 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 08) 316 001(12) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVUSQB, 2, {MEMORY|BITS16,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+40171, 543, 6390}, + /* 4 : VPMOVUSQB mem32|mask,ymmreg [mr:ovm: evex.256.f3.0f38.w0 12 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 28) 316 001(12) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVUSQB, 2, {MEMORY|BITS32,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+40180, 543, 6391}, + /* 5 : VPMOVUSQB mem64|mask,zmmreg [mr:ovm: evex.512.f3.0f38.w0 12 /r ] AVX512,FUTURE */ + /* 250(f2 7e 48) 316 001(12) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVUSQB, 2, {MEMORY|BITS64,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+40189, 544, 6392}, +}; + +static const struct itemplate instrux_VPMOVUSQD[6] = { + /* 0 : VPMOVUSQD xmmreg|mask|z,xmmreg [mr: evex.128.f3.0f38.w0 15 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 08) 300 001(15) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVUSQD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40198, 543, 6393}, + /* 1 : VPMOVUSQD xmmreg|mask|z,ymmreg [mr: evex.256.f3.0f38.w0 15 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 28) 300 001(15) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVUSQD, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40207, 543, 6394}, + /* 2 : VPMOVUSQD ymmreg|mask|z,zmmreg [mr: evex.512.f3.0f38.w0 15 /r ] AVX512,FUTURE */ + /* 250(f2 7e 48) 300 001(15) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVUSQD, 2, {YMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40216, 544, 6395}, + /* 3 : VPMOVUSQD mem64|mask,xmmreg [mr:hvm: evex.128.f3.0f38.w0 15 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 08) 314 001(15) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVUSQD, 2, {MEMORY|BITS64,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+40225, 543, 6396}, + /* 4 : VPMOVUSQD mem128|mask,ymmreg [mr:hvm: evex.256.f3.0f38.w0 15 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 28) 314 001(15) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVUSQD, 2, {MEMORY|BITS128,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+40234, 543, 6397}, + /* 5 : VPMOVUSQD mem256|mask,zmmreg [mr:hvm: evex.512.f3.0f38.w0 15 /r ] AVX512,FUTURE */ + /* 250(f2 7e 48) 314 001(15) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVUSQD, 2, {MEMORY|BITS256,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+40243, 544, 6398}, +}; + +static const struct itemplate instrux_VPMOVUSQW[6] = { + /* 0 : VPMOVUSQW xmmreg|mask|z,xmmreg [mr: evex.128.f3.0f38.w0 14 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 08) 300 001(14) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVUSQW, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40252, 543, 6399}, + /* 1 : VPMOVUSQW xmmreg|mask|z,ymmreg [mr: evex.256.f3.0f38.w0 14 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 28) 300 001(14) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVUSQW, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40261, 543, 6400}, + /* 2 : VPMOVUSQW xmmreg|mask|z,zmmreg [mr: evex.512.f3.0f38.w0 14 /r ] AVX512,FUTURE */ + /* 250(f2 7e 48) 300 001(14) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVUSQW, 2, {XMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40270, 544, 6401}, + /* 3 : VPMOVUSQW mem32|mask,xmmreg [mr:qvm: evex.128.f3.0f38.w0 14 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 08) 315 001(14) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVUSQW, 2, {MEMORY|BITS32,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+40279, 543, 6402}, + /* 4 : VPMOVUSQW mem64|mask,ymmreg [mr:qvm: evex.256.f3.0f38.w0 14 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 28) 315 001(14) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVUSQW, 2, {MEMORY|BITS64,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+40288, 543, 6403}, + /* 5 : VPMOVUSQW mem128|mask,zmmreg [mr:qvm: evex.512.f3.0f38.w0 14 /r ] AVX512,FUTURE */ + /* 250(f2 7e 48) 315 001(14) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVUSQW, 2, {MEMORY|BITS128,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+40297, 544, 6404}, +}; + +static const struct itemplate instrux_VPMOVUSWB[6] = { + /* 0 : VPMOVUSWB xmmreg|mask|z,xmmreg [mr: evex.128.f3.0f38.w0 10 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7e 08) 300 001(10) 101 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMOVUSWB, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40306, 549, 6405}, + /* 1 : VPMOVUSWB xmmreg|mask|z,ymmreg [mr: evex.256.f3.0f38.w0 10 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7e 28) 300 001(10) 101 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMOVUSWB, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40315, 549, 6406}, + /* 2 : VPMOVUSWB ymmreg|mask|z,zmmreg [mr: evex.512.f3.0f38.w0 10 /r ] AVX512BW,FUTURE */ + /* 250(f2 7e 48) 300 001(10) 101 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPMOVUSWB, 2, {YMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40324, 550, 6407}, + /* 3 : VPMOVUSWB mem64|mask,xmmreg [mr:hvm: evex.128.f3.0f38.w0 10 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7e 08) 314 001(10) 101 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMOVUSWB, 2, {MEMORY|BITS64,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+40333, 549, 6408}, + /* 4 : VPMOVUSWB mem128|mask,ymmreg [mr:hvm: evex.256.f3.0f38.w0 10 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7e 28) 314 001(10) 101 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMOVUSWB, 2, {MEMORY|BITS128,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+40342, 549, 6409}, + /* 5 : VPMOVUSWB mem256|mask,zmmreg [mr:hvm: evex.512.f3.0f38.w0 10 /r ] AVX512BW,FUTURE */ + /* 250(f2 7e 48) 314 001(10) 101 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPMOVUSWB, 2, {MEMORY|BITS256,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+40351, 550, 6410}, +}; + +static const struct itemplate instrux_VPMOVW2M[3] = { + /* 0 : VPMOVW2M kreg,xmmreg [rm: evex.128.f3.0f38.w1 29 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 fe 08) 300 001(29) 110 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMOVW2M, 2, {OPMASKREG,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+40360, 549, 6411}, + /* 1 : VPMOVW2M kreg,ymmreg [rm: evex.256.f3.0f38.w1 29 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 fe 28) 300 001(29) 110 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMOVW2M, 2, {OPMASKREG,YMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+40369, 549, 6412}, + /* 2 : VPMOVW2M kreg,zmmreg [rm: evex.512.f3.0f38.w1 29 /r ] AVX512BW,FUTURE */ + /* 250(f2 fe 48) 300 001(29) 110 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPMOVW2M, 2, {OPMASKREG,ZMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+40378, 550, 6413}, +}; + +static const struct itemplate instrux_VPMOVWB[6] = { + /* 0 : VPMOVWB xmmreg|mask|z,xmmreg [mr: evex.128.f3.0f38.w0 30 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7e 08) 300 001(30) 101 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMOVWB, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40387, 549, 6414}, + /* 1 : VPMOVWB xmmreg|mask|z,ymmreg [mr: evex.256.f3.0f38.w0 30 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7e 28) 300 001(30) 101 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMOVWB, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40396, 549, 6415}, + /* 2 : VPMOVWB ymmreg|mask|z,zmmreg [mr: evex.512.f3.0f38.w0 30 /r ] AVX512BW,FUTURE */ + /* 250(f2 7e 48) 300 001(30) 101 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPMOVWB, 2, {YMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40405, 550, 6416}, + /* 3 : VPMOVWB mem64|mask,xmmreg [mr:hvm: evex.128.f3.0f38.w0 30 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7e 08) 314 001(30) 101 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMOVWB, 2, {MEMORY|BITS64,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+40414, 549, 6417}, + /* 4 : VPMOVWB mem128|mask,ymmreg [mr:hvm: evex.256.f3.0f38.w0 30 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7e 28) 314 001(30) 101 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMOVWB, 2, {MEMORY|BITS128,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+40423, 549, 6418}, + /* 5 : VPMOVWB mem256|mask,zmmreg [mr:hvm: evex.512.f3.0f38.w0 30 /r ] AVX512BW,FUTURE */ + /* 250(f2 7e 48) 314 001(30) 101 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPMOVWB, 2, {MEMORY|BITS256,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+40432, 550, 6419}, +}; + +static const struct itemplate instrux_VPMULLQ[6] = { + /* 0 : VPMULLQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 40 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 241(f2 fd 08) 301 001(40) 120 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VPMULLQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+40873, 546, 6453}, + /* 1 : VPMULLQ xmmreg|mask|z,xmmrm128|b64 [r+vm:fv: evex.nds.128.66.0f38.w1 40 /r ] ND,AVX512VL,AVX512DQ,FUTURE */ + /* 240(f2 fd 08) 301 001(40) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VPMULLQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+40882, 546, 6453}, + /* 2 : VPMULLQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 40 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 241(f2 fd 28) 301 001(40) 120 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VPMULLQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+40891, 546, 6454}, + /* 3 : VPMULLQ ymmreg|mask|z,ymmrm256|b64 [r+vm:fv: evex.nds.256.66.0f38.w1 40 /r ] ND,AVX512VL,AVX512DQ,FUTURE */ + /* 240(f2 fd 28) 301 001(40) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VPMULLQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+40900, 546, 6454}, + /* 4 : VPMULLQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 40 /r ] AVX512DQ,FUTURE */ + /* 241(f2 fd 48) 301 001(40) 120 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VPMULLQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+40909, 547, 6455}, + /* 5 : VPMULLQ zmmreg|mask|z,zmmrm512|b64 [r+vm:fv: evex.nds.512.66.0f38.w1 40 /r ] ND,AVX512DQ,FUTURE */ + /* 240(f2 fd 48) 301 001(40) 110 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VPMULLQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+40918, 547, 6455}, +}; + +static const struct itemplate instrux_VPMULTISHIFTQB[6] = { + /* 0 : VPMULTISHIFTQB xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 83 /r ] AVX512VL,AVX512VBMI,FUTURE */ + /* 241(f2 fd 08) 301 001(83) 120 : EVEX,PROT,AVX512VL,AVX512VBMI,FUTURE */ + {I_VPMULTISHIFTQB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+40981, 559, 6459}, + /* 1 : VPMULTISHIFTQB xmmreg|mask|z,xmmrm128|b64 [r+vm:fv: evex.nds.128.66.0f38.w1 83 /r ] ND,AVX512VL,AVX512VBMI,FUTURE */ + /* 240(f2 fd 08) 301 001(83) 110 : EVEX,PROT,AVX512VL,AVX512VBMI,FUTURE */ + {I_VPMULTISHIFTQB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+40990, 559, 6459}, + /* 2 : VPMULTISHIFTQB ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 83 /r ] AVX512VL,AVX512VBMI,FUTURE */ + /* 241(f2 fd 28) 301 001(83) 120 : EVEX,PROT,AVX512VL,AVX512VBMI,FUTURE */ + {I_VPMULTISHIFTQB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+40999, 559, 6460}, + /* 3 : VPMULTISHIFTQB ymmreg|mask|z,ymmrm256|b64 [r+vm:fv: evex.nds.256.66.0f38.w1 83 /r ] ND,AVX512VL,AVX512VBMI,FUTURE */ + /* 240(f2 fd 28) 301 001(83) 110 : EVEX,PROT,AVX512VL,AVX512VBMI,FUTURE */ + {I_VPMULTISHIFTQB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+41008, 559, 6460}, + /* 4 : VPMULTISHIFTQB zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 83 /r ] AVX512VBMI,FUTURE */ + /* 241(f2 fd 48) 301 001(83) 120 : EVEX,PROT,AVX512VBMI,FUTURE */ + {I_VPMULTISHIFTQB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+41017, 560, 6461}, + /* 5 : VPMULTISHIFTQB zmmreg|mask|z,zmmrm512|b64 [r+vm:fv: evex.nds.512.66.0f38.w1 83 /r ] ND,AVX512VBMI,FUTURE */ + /* 240(f2 fd 48) 301 001(83) 110 : EVEX,PROT,AVX512VBMI,FUTURE */ + {I_VPMULTISHIFTQB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+41026, 560, 6461}, +}; + +static const struct itemplate instrux_VPORD[6] = { + /* 0 : VPORD xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f.w0 eb /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7d 08) 301 001(eb) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPORD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+41089, 543, 6465}, + /* 1 : VPORD xmmreg|mask|z,xmmrm128|b32 [r+vm:fv: evex.nds.128.66.0f.w0 eb /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 7d 08) 301 001(eb) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPORD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+41098, 543, 6465}, + /* 2 : VPORD ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f.w0 eb /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7d 28) 301 001(eb) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPORD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+41107, 543, 6466}, + /* 3 : VPORD ymmreg|mask|z,ymmrm256|b32 [r+vm:fv: evex.nds.256.66.0f.w0 eb /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 7d 28) 301 001(eb) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPORD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+41116, 543, 6466}, + /* 4 : VPORD zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f.w0 eb /r ] AVX512,FUTURE */ + /* 241(f1 7d 48) 301 001(eb) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPORD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+41125, 544, 6467}, + /* 5 : VPORD zmmreg|mask|z,zmmrm512|b32 [r+vm:fv: evex.nds.512.66.0f.w0 eb /r ] ND,AVX512,FUTURE */ + /* 240(f1 7d 48) 301 001(eb) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPORD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+41134, 544, 6467}, +}; + +static const struct itemplate instrux_VPORQ[6] = { + /* 0 : VPORQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f.w1 eb /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(eb) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPORQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+41143, 543, 6468}, + /* 1 : VPORQ xmmreg|mask|z,xmmrm128|b64 [r+vm:fv: evex.nds.128.66.0f.w1 eb /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 fd 08) 301 001(eb) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPORQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+41152, 543, 6468}, + /* 2 : VPORQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f.w1 eb /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(eb) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPORQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+41161, 543, 6469}, + /* 3 : VPORQ ymmreg|mask|z,ymmrm256|b64 [r+vm:fv: evex.nds.256.66.0f.w1 eb /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 fd 28) 301 001(eb) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPORQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+41170, 543, 6469}, + /* 4 : VPORQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f.w1 eb /r ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(eb) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPORQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+41179, 544, 6470}, + /* 5 : VPORQ zmmreg|mask|z,zmmrm512|b64 [r+vm:fv: evex.nds.512.66.0f.w1 eb /r ] ND,AVX512,FUTURE */ + /* 240(f1 fd 48) 301 001(eb) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPORQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+41188, 544, 6470}, +}; + +static const struct itemplate instrux_VPROLD[6] = { + /* 0 : VPROLD xmmreg|mask|z,xmmrm128|b32*,imm8 [vmi:fv: evex.nds.128.66.0f.w0 72 /1 ib ] AVX512,AVX512VL,FUTURE */ + /* 240(f1 7d 08) 301 001(72) 211 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPROLD, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20103, 543, 6471}, + /* 1 : VPROLD xmmreg|mask|z,imm8 [v+mi:fv: evex.nds.128.66.0f.w0 72 /1 ib ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 7d 08) 301 001(72) 201 021 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPROLD, 2, {XMMREG,IMM_NORMAL|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20113, 543, 6471}, + /* 2 : VPROLD ymmreg|mask|z,ymmrm256|b32*,imm8 [vmi:fv: evex.nds.256.66.0f.w0 72 /1 ib ] AVX512,AVX512VL,FUTURE */ + /* 240(f1 7d 28) 301 001(72) 211 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPROLD, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20123, 543, 6472}, + /* 3 : VPROLD ymmreg|mask|z,imm8 [v+mi:fv: evex.nds.256.66.0f.w0 72 /1 ib ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 7d 28) 301 001(72) 201 021 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPROLD, 2, {YMMREG,IMM_NORMAL|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20133, 543, 6472}, + /* 4 : VPROLD zmmreg|mask|z,zmmrm512|b32*,imm8 [vmi:fv: evex.nds.512.66.0f.w0 72 /1 ib ] AVX512,FUTURE */ + /* 240(f1 7d 48) 301 001(72) 211 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VPROLD, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20143, 544, 6473}, + /* 5 : VPROLD zmmreg|mask|z,imm8 [v+mi:fv: evex.nds.512.66.0f.w0 72 /1 ib ] ND,AVX512,FUTURE */ + /* 240(f1 7d 48) 301 001(72) 201 021 : EVEX,PROT,AVX512,FUTURE */ + {I_VPROLD, 2, {ZMMREG,IMM_NORMAL|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20153, 544, 6473}, +}; + +static const struct itemplate instrux_VPROLQ[6] = { + /* 0 : VPROLQ xmmreg|mask|z,xmmrm128|b64*,imm8 [vmi:fv: evex.nds.128.66.0f.w1 72 /1 ib ] AVX512,AVX512VL,FUTURE */ + /* 240(f1 fd 08) 301 001(72) 211 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPROLQ, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+20163, 543, 6474}, + /* 1 : VPROLQ xmmreg|mask|z,imm8 [v+mi:fv: evex.nds.128.66.0f.w1 72 /1 ib ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 fd 08) 301 001(72) 201 021 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPROLQ, 2, {XMMREG,IMM_NORMAL|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20173, 543, 6474}, + /* 2 : VPROLQ ymmreg|mask|z,ymmrm256|b64*,imm8 [vmi:fv: evex.nds.256.66.0f.w1 72 /1 ib ] AVX512,AVX512VL,FUTURE */ + /* 240(f1 fd 28) 301 001(72) 211 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPROLQ, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+20183, 543, 6475}, + /* 3 : VPROLQ ymmreg|mask|z,imm8 [v+mi:fv: evex.nds.256.66.0f.w1 72 /1 ib ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 fd 28) 301 001(72) 201 021 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPROLQ, 2, {YMMREG,IMM_NORMAL|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20193, 543, 6475}, + /* 4 : VPROLQ zmmreg|mask|z,zmmrm512|b64*,imm8 [vmi:fv: evex.nds.512.66.0f.w1 72 /1 ib ] AVX512,FUTURE */ + /* 240(f1 fd 48) 301 001(72) 211 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VPROLQ, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+20203, 544, 6476}, + /* 5 : VPROLQ zmmreg|mask|z,imm8 [v+mi:fv: evex.nds.512.66.0f.w1 72 /1 ib ] ND,AVX512,FUTURE */ + /* 240(f1 fd 48) 301 001(72) 201 021 : EVEX,PROT,AVX512,FUTURE */ + {I_VPROLQ, 2, {ZMMREG,IMM_NORMAL|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20213, 544, 6476}, +}; + +static const struct itemplate instrux_VPROLVD[6] = { + /* 0 : VPROLVD xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 15 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(15) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPROLVD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+41197, 543, 6477}, + /* 1 : VPROLVD xmmreg|mask|z,xmmrm128|b32 [r+vm:fv: evex.nds.128.66.0f38.w0 15 /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f2 7d 08) 301 001(15) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPROLVD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+41206, 543, 6477}, + /* 2 : VPROLVD ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 15 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(15) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPROLVD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+41215, 543, 6478}, + /* 3 : VPROLVD ymmreg|mask|z,ymmrm256|b32 [r+vm:fv: evex.nds.256.66.0f38.w0 15 /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f2 7d 28) 301 001(15) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPROLVD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+41224, 543, 6478}, + /* 4 : VPROLVD zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f38.w0 15 /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(15) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPROLVD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+41233, 544, 6479}, + /* 5 : VPROLVD zmmreg|mask|z,zmmrm512|b32 [r+vm:fv: evex.nds.512.66.0f38.w0 15 /r ] ND,AVX512,FUTURE */ + /* 240(f2 7d 48) 301 001(15) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPROLVD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+41242, 544, 6479}, +}; + +static const struct itemplate instrux_VPROLVQ[6] = { + /* 0 : VPROLVQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 15 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(15) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPROLVQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+41251, 543, 6480}, + /* 1 : VPROLVQ xmmreg|mask|z,xmmrm128|b64 [r+vm:fv: evex.nds.128.66.0f38.w1 15 /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f2 fd 08) 301 001(15) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPROLVQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+41260, 543, 6480}, + /* 2 : VPROLVQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 15 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(15) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPROLVQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+41269, 543, 6481}, + /* 3 : VPROLVQ ymmreg|mask|z,ymmrm256|b64 [r+vm:fv: evex.nds.256.66.0f38.w1 15 /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f2 fd 28) 301 001(15) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPROLVQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+41278, 543, 6481}, + /* 4 : VPROLVQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 15 /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(15) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPROLVQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+41287, 544, 6482}, + /* 5 : VPROLVQ zmmreg|mask|z,zmmrm512|b64 [r+vm:fv: evex.nds.512.66.0f38.w1 15 /r ] ND,AVX512,FUTURE */ + /* 240(f2 fd 48) 301 001(15) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPROLVQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+41296, 544, 6482}, +}; + +static const struct itemplate instrux_VPRORD[6] = { + /* 0 : VPRORD xmmreg|mask|z,xmmrm128|b32*,imm8 [vmi:fv: evex.nds.128.66.0f.w0 72 /0 ib ] AVX512,AVX512VL,FUTURE */ + /* 240(f1 7d 08) 301 001(72) 210 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPRORD, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20223, 543, 6483}, + /* 1 : VPRORD xmmreg|mask|z,imm8 [v+mi:fv: evex.nds.128.66.0f.w0 72 /0 ib ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 7d 08) 301 001(72) 200 021 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPRORD, 2, {XMMREG,IMM_NORMAL|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20233, 543, 6483}, + /* 2 : VPRORD ymmreg|mask|z,ymmrm256|b32*,imm8 [vmi:fv: evex.nds.256.66.0f.w0 72 /0 ib ] AVX512,AVX512VL,FUTURE */ + /* 240(f1 7d 28) 301 001(72) 210 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPRORD, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20243, 543, 6484}, + /* 3 : VPRORD ymmreg|mask|z,imm8 [v+mi:fv: evex.nds.256.66.0f.w0 72 /0 ib ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 7d 28) 301 001(72) 200 021 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPRORD, 2, {YMMREG,IMM_NORMAL|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20253, 543, 6484}, + /* 4 : VPRORD zmmreg|mask|z,zmmrm512|b32*,imm8 [vmi:fv: evex.nds.512.66.0f.w0 72 /0 ib ] AVX512,FUTURE */ + /* 240(f1 7d 48) 301 001(72) 210 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VPRORD, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20263, 544, 6485}, + /* 5 : VPRORD zmmreg|mask|z,imm8 [v+mi:fv: evex.nds.512.66.0f.w0 72 /0 ib ] ND,AVX512,FUTURE */ + /* 240(f1 7d 48) 301 001(72) 200 021 : EVEX,PROT,AVX512,FUTURE */ + {I_VPRORD, 2, {ZMMREG,IMM_NORMAL|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20273, 544, 6485}, +}; + +static const struct itemplate instrux_VPRORQ[6] = { + /* 0 : VPRORQ xmmreg|mask|z,xmmrm128|b64*,imm8 [vmi:fv: evex.nds.128.66.0f.w1 72 /0 ib ] AVX512,AVX512VL,FUTURE */ + /* 240(f1 fd 08) 301 001(72) 210 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPRORQ, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+20283, 543, 6486}, + /* 1 : VPRORQ xmmreg|mask|z,imm8 [v+mi:fv: evex.nds.128.66.0f.w1 72 /0 ib ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 fd 08) 301 001(72) 200 021 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPRORQ, 2, {XMMREG,IMM_NORMAL|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20293, 543, 6486}, + /* 2 : VPRORQ ymmreg|mask|z,ymmrm256|b64*,imm8 [vmi:fv: evex.nds.256.66.0f.w1 72 /0 ib ] AVX512,AVX512VL,FUTURE */ + /* 240(f1 fd 28) 301 001(72) 210 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPRORQ, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+20303, 543, 6487}, + /* 3 : VPRORQ ymmreg|mask|z,imm8 [v+mi:fv: evex.nds.256.66.0f.w1 72 /0 ib ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 fd 28) 301 001(72) 200 021 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPRORQ, 2, {YMMREG,IMM_NORMAL|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20313, 543, 6487}, + /* 4 : VPRORQ zmmreg|mask|z,zmmrm512|b64*,imm8 [vmi:fv: evex.nds.512.66.0f.w1 72 /0 ib ] AVX512,FUTURE */ + /* 240(f1 fd 48) 301 001(72) 210 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VPRORQ, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+20323, 544, 6488}, + /* 5 : VPRORQ zmmreg|mask|z,imm8 [v+mi:fv: evex.nds.512.66.0f.w1 72 /0 ib ] ND,AVX512,FUTURE */ + /* 240(f1 fd 48) 301 001(72) 200 021 : EVEX,PROT,AVX512,FUTURE */ + {I_VPRORQ, 2, {ZMMREG,IMM_NORMAL|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20333, 544, 6488}, +}; + +static const struct itemplate instrux_VPRORVD[6] = { + /* 0 : VPRORVD xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 14 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(14) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPRORVD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+41305, 543, 6489}, + /* 1 : VPRORVD xmmreg|mask|z,xmmrm128|b32 [r+vm:fv: evex.nds.128.66.0f38.w0 14 /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f2 7d 08) 301 001(14) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPRORVD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+41314, 543, 6489}, + /* 2 : VPRORVD ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 14 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(14) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPRORVD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+41323, 543, 6490}, + /* 3 : VPRORVD ymmreg|mask|z,ymmrm256|b32 [r+vm:fv: evex.nds.256.66.0f38.w0 14 /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f2 7d 28) 301 001(14) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPRORVD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+41332, 543, 6490}, + /* 4 : VPRORVD zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f38.w0 14 /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(14) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPRORVD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+41341, 544, 6491}, + /* 5 : VPRORVD zmmreg|mask|z,zmmrm512|b32 [r+vm:fv: evex.nds.512.66.0f38.w0 14 /r ] ND,AVX512,FUTURE */ + /* 240(f2 7d 48) 301 001(14) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPRORVD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+41350, 544, 6491}, +}; + +static const struct itemplate instrux_VPRORVQ[6] = { + /* 0 : VPRORVQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 14 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(14) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPRORVQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+41359, 543, 6492}, + /* 1 : VPRORVQ xmmreg|mask|z,xmmrm128|b64 [r+vm:fv: evex.nds.128.66.0f38.w1 14 /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f2 fd 08) 301 001(14) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPRORVQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+41368, 543, 6492}, + /* 2 : VPRORVQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 14 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(14) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPRORVQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+41377, 543, 6493}, + /* 3 : VPRORVQ ymmreg|mask|z,ymmrm256|b64 [r+vm:fv: evex.nds.256.66.0f38.w1 14 /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f2 fd 28) 301 001(14) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPRORVQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+41386, 543, 6493}, + /* 4 : VPRORVQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 14 /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(14) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPRORVQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+41395, 544, 6494}, + /* 5 : VPRORVQ zmmreg|mask|z,zmmrm512|b64 [r+vm:fv: evex.nds.512.66.0f38.w1 14 /r ] ND,AVX512,FUTURE */ + /* 240(f2 fd 48) 301 001(14) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPRORVQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+41404, 544, 6494}, +}; + +static const struct itemplate instrux_VPSCATTERDD[3] = { + /* 0 : VPSCATTERDD xmem32|mask,xmmreg [mr:t1s: vsibx evex.128.66.0f38.w0 a0 /r ] AVX512,AVX512VL,FUTURE */ + /* 374 250(f2 7d 08) 306 001(a0) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSCATTERDD, 2, {XMEM|BITS32,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+20343, 543, 6498}, + /* 1 : VPSCATTERDD ymem32|mask,ymmreg [mr:t1s: vsiby evex.256.66.0f38.w0 a0 /r ] AVX512,AVX512VL,FUTURE */ + /* 375 250(f2 7d 28) 306 001(a0) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSCATTERDD, 2, {YMEM|BITS32,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+20353, 543, 6499}, + /* 2 : VPSCATTERDD zmem32|mask,zmmreg [mr:t1s: vsibz evex.512.66.0f38.w0 a0 /r ] AVX512,FUTURE */ + /* 376 250(f2 7d 48) 306 001(a0) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPSCATTERDD, 2, {ZMEM|BITS32,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+20363, 544, 6500}, +}; + +static const struct itemplate instrux_VPSCATTERDQ[3] = { + /* 0 : VPSCATTERDQ xmem64|mask,xmmreg [mr:t1s: vsibx evex.128.66.0f38.w1 a0 /r ] AVX512,AVX512VL,FUTURE */ + /* 374 250(f2 fd 08) 306 001(a0) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSCATTERDQ, 2, {XMEM|BITS64,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+20373, 543, 6501}, + /* 1 : VPSCATTERDQ xmem64|mask,ymmreg [mr:t1s: vsibx evex.256.66.0f38.w1 a0 /r ] AVX512,AVX512VL,FUTURE */ + /* 374 250(f2 fd 28) 306 001(a0) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSCATTERDQ, 2, {XMEM|BITS64,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+20383, 543, 6502}, + /* 2 : VPSCATTERDQ ymem64|mask,zmmreg [mr:t1s: vsiby evex.512.66.0f38.w1 a0 /r ] AVX512,FUTURE */ + /* 375 250(f2 fd 48) 306 001(a0) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPSCATTERDQ, 2, {YMEM|BITS64,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+20393, 544, 6503}, +}; + +static const struct itemplate instrux_VPSCATTERQD[3] = { + /* 0 : VPSCATTERQD xmem32|mask,xmmreg [mr:t1s: vsibx evex.128.66.0f38.w0 a1 /r ] AVX512,AVX512VL,FUTURE */ + /* 374 250(f2 7d 08) 306 001(a1) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSCATTERQD, 2, {XMEM|BITS32,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+20403, 543, 6504}, + /* 1 : VPSCATTERQD ymem32|mask,xmmreg [mr:t1s: vsiby evex.256.66.0f38.w0 a1 /r ] AVX512,AVX512VL,FUTURE */ + /* 375 250(f2 7d 28) 306 001(a1) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSCATTERQD, 2, {YMEM|BITS32,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+20413, 543, 6505}, + /* 2 : VPSCATTERQD zmem32|mask,ymmreg [mr:t1s: vsibz evex.512.66.0f38.w0 a1 /r ] AVX512,FUTURE */ + /* 376 250(f2 7d 48) 306 001(a1) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPSCATTERQD, 2, {ZMEM|BITS32,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+20423, 544, 6506}, +}; + +static const struct itemplate instrux_VPSCATTERQQ[3] = { + /* 0 : VPSCATTERQQ xmem64|mask,xmmreg [mr:t1s: vsibx evex.128.66.0f38.w1 a1 /r ] AVX512,AVX512VL,FUTURE */ + /* 374 250(f2 fd 08) 306 001(a1) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSCATTERQQ, 2, {XMEM|BITS64,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+20433, 543, 6507}, + /* 1 : VPSCATTERQQ ymem64|mask,ymmreg [mr:t1s: vsiby evex.256.66.0f38.w1 a1 /r ] AVX512,AVX512VL,FUTURE */ + /* 375 250(f2 fd 28) 306 001(a1) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSCATTERQQ, 2, {YMEM|BITS64,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+20443, 543, 6508}, + /* 2 : VPSCATTERQQ zmem64|mask,zmmreg [mr:t1s: vsibz evex.512.66.0f38.w1 a1 /r ] AVX512,FUTURE */ + /* 376 250(f2 fd 48) 306 001(a1) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPSCATTERQQ, 2, {ZMEM|BITS64,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+20453, 544, 6509}, +}; + +static const struct itemplate instrux_VPSLLVW[6] = { + /* 0 : VPSLLVW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f38.w1 12 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 fd 08) 303 001(12) 120 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSLLVW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+41737, 549, 6543}, + /* 1 : VPSLLVW xmmreg|mask|z,xmmrm128 [r+vm:fvm: evex.nds.128.66.0f38.w1 12 /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f2 fd 08) 303 001(12) 110 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSLLVW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+41746, 549, 6543}, + /* 2 : VPSLLVW ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f38.w1 12 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 fd 28) 303 001(12) 120 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSLLVW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+41755, 549, 6544}, + /* 3 : VPSLLVW ymmreg|mask|z,ymmrm256 [r+vm:fvm: evex.nds.256.66.0f38.w1 12 /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f2 fd 28) 303 001(12) 110 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSLLVW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+41764, 549, 6544}, + /* 4 : VPSLLVW zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f38.w1 12 /r ] AVX512BW,FUTURE */ + /* 241(f2 fd 48) 303 001(12) 120 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPSLLVW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+41773, 550, 6545}, + /* 5 : VPSLLVW zmmreg|mask|z,zmmrm512 [r+vm:fvm: evex.nds.512.66.0f38.w1 12 /r ] ND,AVX512BW,FUTURE */ + /* 240(f2 fd 48) 303 001(12) 110 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPSLLVW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+41782, 550, 6545}, +}; + +static const struct itemplate instrux_VPSRAQ[12] = { + /* 0 : VPSRAQ xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:m128: evex.nds.128.66.0f.w1 e2 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 317 001(e2) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSRAQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+41899, 543, 6558}, + /* 1 : VPSRAQ xmmreg|mask|z,xmmrm128 [r+vm:m128: evex.nds.128.66.0f.w1 e2 /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 fd 08) 317 001(e2) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSRAQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+41908, 543, 6558}, + /* 2 : VPSRAQ ymmreg|mask|z,ymmreg*,xmmrm128 [rvm:m128: evex.nds.256.66.0f.w1 e2 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 317 001(e2) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSRAQ, 3, {YMMREG,YMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+41917, 543, 6559}, + /* 3 : VPSRAQ ymmreg|mask|z,xmmrm128 [r+vm:m128: evex.nds.256.66.0f.w1 e2 /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 fd 28) 317 001(e2) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSRAQ, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+41926, 543, 6559}, + /* 4 : VPSRAQ zmmreg|mask|z,zmmreg*,xmmrm128 [rvm:m128: evex.nds.512.66.0f.w1 e2 /r ] AVX512,FUTURE */ + /* 241(f1 fd 48) 317 001(e2) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPSRAQ, 3, {ZMMREG,ZMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+41935, 544, 6560}, + /* 5 : VPSRAQ zmmreg|mask|z,xmmrm128 [r+vm:m128: evex.nds.512.66.0f.w1 e2 /r ] ND,AVX512,FUTURE */ + /* 240(f1 fd 48) 317 001(e2) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPSRAQ, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+41944, 544, 6560}, + /* 6 : VPSRAQ xmmreg|mask|z,xmmrm128|b64*,imm8 [vmi:fv: evex.nds.128.66.0f.w1 72 /4 ib ] AVX512,AVX512VL,FUTURE */ + /* 240(f1 fd 08) 301 001(72) 214 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSRAQ, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+20853, 543, 6561}, + /* 7 : VPSRAQ xmmreg|mask|z,imm8 [v+mi:fv: evex.nds.128.66.0f.w1 72 /4 ib ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 fd 08) 301 001(72) 204 021 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSRAQ, 2, {XMMREG,IMM_NORMAL|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20863, 543, 6561}, + /* 8 : VPSRAQ ymmreg|mask|z,ymmrm256|b64*,imm8 [vmi:fv: evex.nds.256.66.0f.w1 72 /4 ib ] AVX512,AVX512VL,FUTURE */ + /* 240(f1 fd 28) 301 001(72) 214 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSRAQ, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+20873, 543, 6562}, + /* 9 : VPSRAQ ymmreg|mask|z,imm8 [v+mi:fv: evex.nds.256.66.0f.w1 72 /4 ib ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 fd 28) 301 001(72) 204 021 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSRAQ, 2, {YMMREG,IMM_NORMAL|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20883, 543, 6562}, + /* 10 : VPSRAQ zmmreg|mask|z,zmmrm512|b64*,imm8 [vmi:fv: evex.nds.512.66.0f.w1 72 /4 ib ] AVX512,FUTURE */ + /* 240(f1 fd 48) 301 001(72) 214 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VPSRAQ, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+20893, 544, 6563}, + /* 11 : VPSRAQ zmmreg|mask|z,imm8 [v+mi:fv: evex.nds.512.66.0f.w1 72 /4 ib ] ND,AVX512,FUTURE */ + /* 240(f1 fd 48) 301 001(72) 204 021 : EVEX,PROT,AVX512,FUTURE */ + {I_VPSRAQ, 2, {ZMMREG,IMM_NORMAL|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20903, 544, 6563}, +}; + +static const struct itemplate instrux_VPSRAVQ[6] = { + /* 0 : VPSRAVQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 46 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(46) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSRAVQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+42007, 543, 6567}, + /* 1 : VPSRAVQ xmmreg|mask|z,xmmrm128|b64 [r+vm:fv: evex.nds.128.66.0f38.w1 46 /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f2 fd 08) 301 001(46) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSRAVQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+42016, 543, 6567}, + /* 2 : VPSRAVQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 46 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(46) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSRAVQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+42025, 543, 6568}, + /* 3 : VPSRAVQ ymmreg|mask|z,ymmrm256|b64 [r+vm:fv: evex.nds.256.66.0f38.w1 46 /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f2 fd 28) 301 001(46) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSRAVQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+42034, 543, 6568}, + /* 4 : VPSRAVQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 46 /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(46) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPSRAVQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+42043, 544, 6569}, + /* 5 : VPSRAVQ zmmreg|mask|z,zmmrm512|b64 [r+vm:fv: evex.nds.512.66.0f38.w1 46 /r ] ND,AVX512,FUTURE */ + /* 240(f2 fd 48) 301 001(46) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPSRAVQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+42052, 544, 6569}, +}; + +static const struct itemplate instrux_VPSRAVW[6] = { + /* 0 : VPSRAVW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f38.w1 11 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 fd 08) 303 001(11) 120 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSRAVW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42061, 549, 6570}, + /* 1 : VPSRAVW xmmreg|mask|z,xmmrm128 [r+vm:fvm: evex.nds.128.66.0f38.w1 11 /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f2 fd 08) 303 001(11) 110 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSRAVW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42070, 549, 6570}, + /* 2 : VPSRAVW ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f38.w1 11 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 fd 28) 303 001(11) 120 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSRAVW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42079, 549, 6571}, + /* 3 : VPSRAVW ymmreg|mask|z,ymmrm256 [r+vm:fvm: evex.nds.256.66.0f38.w1 11 /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f2 fd 28) 303 001(11) 110 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSRAVW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42088, 549, 6571}, + /* 4 : VPSRAVW zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f38.w1 11 /r ] AVX512BW,FUTURE */ + /* 241(f2 fd 48) 303 001(11) 120 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPSRAVW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42097, 550, 6572}, + /* 5 : VPSRAVW zmmreg|mask|z,zmmrm512 [r+vm:fvm: evex.nds.512.66.0f38.w1 11 /r ] ND,AVX512BW,FUTURE */ + /* 240(f2 fd 48) 303 001(11) 110 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPSRAVW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42106, 550, 6572}, +}; + +static const struct itemplate instrux_VPSRLVW[6] = { + /* 0 : VPSRLVW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f38.w1 10 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 fd 08) 303 001(10) 120 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSRLVW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42385, 549, 6600}, + /* 1 : VPSRLVW xmmreg|mask|z,xmmrm128 [r+vm:fvm: evex.nds.128.66.0f38.w1 10 /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f2 fd 08) 303 001(10) 110 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSRLVW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42394, 549, 6600}, + /* 2 : VPSRLVW ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f38.w1 10 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 fd 28) 303 001(10) 120 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSRLVW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42403, 549, 6601}, + /* 3 : VPSRLVW ymmreg|mask|z,ymmrm256 [r+vm:fvm: evex.nds.256.66.0f38.w1 10 /r ] ND,AVX512VL,AVX512BW,FUTURE */ + /* 240(f2 fd 28) 303 001(10) 110 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSRLVW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42412, 549, 6601}, + /* 4 : VPSRLVW zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f38.w1 10 /r ] AVX512BW,FUTURE */ + /* 241(f2 fd 48) 303 001(10) 120 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPSRLVW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42421, 550, 6602}, + /* 5 : VPSRLVW zmmreg|mask|z,zmmrm512 [r+vm:fvm: evex.nds.512.66.0f38.w1 10 /r ] ND,AVX512BW,FUTURE */ + /* 240(f2 fd 48) 303 001(10) 110 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPSRLVW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42430, 550, 6602}, +}; + +static const struct itemplate instrux_VPTERNLOGD[3] = { + /* 0 : VPTERNLOGD xmmreg|mask|z,xmmreg,xmmrm128|b32,imm8 [rvmi:fv: evex.nds.128.66.0f3a.w0 25 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 08) 301 001(25) 120 023 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPTERNLOGD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+21213, 543, 6633}, + /* 1 : VPTERNLOGD ymmreg|mask|z,ymmreg,ymmrm256|b32,imm8 [rvmi:fv: evex.nds.256.66.0f3a.w0 25 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 28) 301 001(25) 120 023 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPTERNLOGD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+21223, 543, 6634}, + /* 2 : VPTERNLOGD zmmreg|mask|z,zmmreg,zmmrm512|b32,imm8 [rvmi:fv: evex.nds.512.66.0f3a.w0 25 /r ib ] AVX512,FUTURE */ + /* 241(f3 7d 48) 301 001(25) 120 023 : EVEX,PROT,AVX512,FUTURE */ + {I_VPTERNLOGD, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+21233, 544, 6635}, +}; + +static const struct itemplate instrux_VPTERNLOGQ[3] = { + /* 0 : VPTERNLOGQ xmmreg|mask|z,xmmreg,xmmrm128|b64,imm8 [rvmi:fv: evex.nds.128.66.0f3a.w1 25 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 08) 301 001(25) 120 023 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPTERNLOGQ, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+21243, 543, 6636}, + /* 1 : VPTERNLOGQ ymmreg|mask|z,ymmreg,ymmrm256|b64,imm8 [rvmi:fv: evex.nds.256.66.0f3a.w1 25 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 28) 301 001(25) 120 023 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPTERNLOGQ, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+21253, 543, 6637}, + /* 2 : VPTERNLOGQ zmmreg|mask|z,zmmreg,zmmrm512|b64,imm8 [rvmi:fv: evex.nds.512.66.0f3a.w1 25 /r ib ] AVX512,FUTURE */ + /* 241(f3 fd 48) 301 001(25) 120 023 : EVEX,PROT,AVX512,FUTURE */ + {I_VPTERNLOGQ, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+21263, 544, 6638}, +}; + +static const struct itemplate instrux_VPTESTMB[3] = { + /* 0 : VPTESTMB kreg|mask,xmmreg,xmmrm128 [rvm:fvm: evex.nds.128.66.0f38.w0 26 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 7d 08) 303 001(26) 120 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPTESTMB, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+42925, 549, 6639}, + /* 1 : VPTESTMB kreg|mask,ymmreg,ymmrm256 [rvm:fvm: evex.nds.256.66.0f38.w0 26 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 7d 28) 303 001(26) 120 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPTESTMB, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+42934, 549, 6640}, + /* 2 : VPTESTMB kreg|mask,zmmreg,zmmrm512 [rvm:fvm: evex.nds.512.66.0f38.w0 26 /r ] AVX512BW,FUTURE */ + /* 241(f2 7d 48) 303 001(26) 120 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPTESTMB, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+42943, 550, 6641}, +}; + +static const struct itemplate instrux_VPTESTMD[3] = { + /* 0 : VPTESTMD kreg|mask,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 27 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(27) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPTESTMD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+42952, 543, 6642}, + /* 1 : VPTESTMD kreg|mask,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 27 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(27) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPTESTMD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+42961, 543, 6643}, + /* 2 : VPTESTMD kreg|mask,zmmreg,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f38.w0 27 /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(27) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPTESTMD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+42970, 544, 6644}, +}; + +static const struct itemplate instrux_VPTESTMQ[3] = { + /* 0 : VPTESTMQ kreg|mask,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 27 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(27) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPTESTMQ, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+42979, 543, 6645}, + /* 1 : VPTESTMQ kreg|mask,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 27 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(27) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPTESTMQ, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+42988, 543, 6646}, + /* 2 : VPTESTMQ kreg|mask,zmmreg,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 27 /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(27) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPTESTMQ, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+42997, 544, 6647}, +}; + +static const struct itemplate instrux_VPTESTMW[3] = { + /* 0 : VPTESTMW kreg|mask,xmmreg,xmmrm128 [rvm:fvm: evex.nds.128.66.0f38.w1 26 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 fd 08) 303 001(26) 120 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPTESTMW, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+43006, 549, 6648}, + /* 1 : VPTESTMW kreg|mask,ymmreg,ymmrm256 [rvm:fvm: evex.nds.256.66.0f38.w1 26 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 fd 28) 303 001(26) 120 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPTESTMW, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+43015, 549, 6649}, + /* 2 : VPTESTMW kreg|mask,zmmreg,zmmrm512 [rvm:fvm: evex.nds.512.66.0f38.w1 26 /r ] AVX512BW,FUTURE */ + /* 241(f2 fd 48) 303 001(26) 120 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPTESTMW, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+43024, 550, 6650}, +}; + +static const struct itemplate instrux_VPTESTNMB[3] = { + /* 0 : VPTESTNMB kreg|mask,xmmreg,xmmrm128 [rvm:fvm: evex.nds.128.f3.0f38.w0 26 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 7e 08) 303 001(26) 120 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPTESTNMB, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+43033, 549, 6651}, + /* 1 : VPTESTNMB kreg|mask,ymmreg,ymmrm256 [rvm:fvm: evex.nds.256.f3.0f38.w0 26 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 7e 28) 303 001(26) 120 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPTESTNMB, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+43042, 549, 6652}, + /* 2 : VPTESTNMB kreg|mask,zmmreg,zmmrm512 [rvm:fvm: evex.nds.512.f3.0f38.w0 26 /r ] AVX512BW,FUTURE */ + /* 241(f2 7e 48) 303 001(26) 120 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPTESTNMB, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+43051, 550, 6653}, +}; + +static const struct itemplate instrux_VPTESTNMD[3] = { + /* 0 : VPTESTNMD kreg|mask,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.f3.0f38.w0 27 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7e 08) 301 001(27) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPTESTNMD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+43060, 543, 6654}, + /* 1 : VPTESTNMD kreg|mask,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.f3.0f38.w0 27 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7e 28) 301 001(27) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPTESTNMD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+43069, 543, 6655}, + /* 2 : VPTESTNMD kreg|mask,zmmreg,zmmrm512|b32 [rvm:fv: evex.nds.512.f3.0f38.w0 27 /r ] AVX512,FUTURE */ + /* 241(f2 7e 48) 301 001(27) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPTESTNMD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+43078, 544, 6656}, +}; + +static const struct itemplate instrux_VPTESTNMQ[3] = { + /* 0 : VPTESTNMQ kreg|mask,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.f3.0f38.w1 27 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fe 08) 301 001(27) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPTESTNMQ, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+43087, 543, 6657}, + /* 1 : VPTESTNMQ kreg|mask,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.f3.0f38.w1 27 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fe 28) 301 001(27) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPTESTNMQ, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+43096, 543, 6658}, + /* 2 : VPTESTNMQ kreg|mask,zmmreg,zmmrm512|b64 [rvm:fv: evex.nds.512.f3.0f38.w1 27 /r ] AVX512,FUTURE */ + /* 241(f2 fe 48) 301 001(27) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPTESTNMQ, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+43105, 544, 6659}, +}; + +static const struct itemplate instrux_VPTESTNMW[3] = { + /* 0 : VPTESTNMW kreg|mask,xmmreg,xmmrm128 [rvm:fvm: evex.nds.128.f3.0f38.w1 26 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 fe 08) 303 001(26) 120 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPTESTNMW, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+43114, 549, 6660}, + /* 1 : VPTESTNMW kreg|mask,ymmreg,ymmrm256 [rvm:fvm: evex.nds.256.f3.0f38.w1 26 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 fe 28) 303 001(26) 120 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPTESTNMW, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+43123, 549, 6661}, + /* 2 : VPTESTNMW kreg|mask,zmmreg,zmmrm512 [rvm:fvm: evex.nds.512.f3.0f38.w1 26 /r ] AVX512BW,FUTURE */ + /* 241(f2 fe 48) 303 001(26) 120 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPTESTNMW, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+43132, 550, 6662}, +}; + +static const struct itemplate instrux_VPXORD[6] = { + /* 0 : VPXORD xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f.w0 ef /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7d 08) 301 001(ef) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPXORD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+43573, 543, 6687}, + /* 1 : VPXORD xmmreg|mask|z,xmmrm128|b32 [r+vm:fv: evex.nds.128.66.0f.w0 ef /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 7d 08) 301 001(ef) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPXORD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+43582, 543, 6687}, + /* 2 : VPXORD ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f.w0 ef /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7d 28) 301 001(ef) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPXORD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+43591, 543, 6688}, + /* 3 : VPXORD ymmreg|mask|z,ymmrm256|b32 [r+vm:fv: evex.nds.256.66.0f.w0 ef /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 7d 28) 301 001(ef) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPXORD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+43600, 543, 6688}, + /* 4 : VPXORD zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f.w0 ef /r ] AVX512,FUTURE */ + /* 241(f1 7d 48) 301 001(ef) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPXORD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+43609, 544, 6689}, + /* 5 : VPXORD zmmreg|mask|z,zmmrm512|b32 [r+vm:fv: evex.nds.512.66.0f.w0 ef /r ] ND,AVX512,FUTURE */ + /* 240(f1 7d 48) 301 001(ef) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPXORD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+43618, 544, 6689}, +}; + +static const struct itemplate instrux_VPXORQ[6] = { + /* 0 : VPXORQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f.w1 ef /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(ef) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPXORQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+43627, 543, 6690}, + /* 1 : VPXORQ xmmreg|mask|z,xmmrm128|b64 [r+vm:fv: evex.nds.128.66.0f.w1 ef /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 fd 08) 301 001(ef) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPXORQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+43636, 543, 6690}, + /* 2 : VPXORQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f.w1 ef /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(ef) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPXORQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+43645, 543, 6691}, + /* 3 : VPXORQ ymmreg|mask|z,ymmrm256|b64 [r+vm:fv: evex.nds.256.66.0f.w1 ef /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f1 fd 28) 301 001(ef) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPXORQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+43654, 543, 6691}, + /* 4 : VPXORQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f.w1 ef /r ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(ef) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPXORQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+43663, 544, 6692}, + /* 5 : VPXORQ zmmreg|mask|z,zmmrm512|b64 [r+vm:fv: evex.nds.512.66.0f.w1 ef /r ] ND,AVX512,FUTURE */ + /* 240(f1 fd 48) 301 001(ef) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPXORQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+43672, 544, 6692}, +}; + +static const struct itemplate instrux_VRANGEPD[6] = { + /* 0 : VRANGEPD xmmreg|mask|z,xmmreg*,xmmrm128|b64,imm8 [rvmi:fv: evex.nds.128.66.0f3a.w1 50 /r ib ] AVX512VL,AVX512DQ,FUTURE */ + /* 241(f3 fd 08) 301 001(50) 120 023 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VRANGEPD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+21273, 546, 6693}, + /* 1 : VRANGEPD xmmreg|mask|z,xmmrm128|b64,imm8 [r+vmi:fv: evex.nds.128.66.0f3a.w1 50 /r ib ] ND,AVX512VL,AVX512DQ,FUTURE */ + /* 240(f3 fd 08) 301 001(50) 110 022 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VRANGEPD, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+21283, 546, 6693}, + /* 2 : VRANGEPD ymmreg|mask|z,ymmreg*,ymmrm256|b64,imm8 [rvmi:fv: evex.nds.256.66.0f3a.w1 50 /r ib ] AVX512VL,AVX512DQ,FUTURE */ + /* 241(f3 fd 28) 301 001(50) 120 023 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VRANGEPD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+21293, 546, 6694}, + /* 3 : VRANGEPD ymmreg|mask|z,ymmrm256|b64,imm8 [r+vmi:fv: evex.nds.256.66.0f3a.w1 50 /r ib ] ND,AVX512VL,AVX512DQ,FUTURE */ + /* 240(f3 fd 28) 301 001(50) 110 022 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VRANGEPD, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+21303, 546, 6694}, + /* 4 : VRANGEPD zmmreg|mask|z,zmmreg*,zmmrm512|b64|sae,imm8 [rvmi:fv: evex.nds.512.66.0f3a.w1 50 /r ib ] AVX512DQ,FUTURE */ + /* 241(f3 fd 48) 301 001(50) 120 023 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VRANGEPD, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B64|SAE,0,0}, nasm_bytecodes+21313, 547, 6695}, + /* 5 : VRANGEPD zmmreg|mask|z,zmmrm512|b64|sae,imm8 [r+vmi:fv: evex.nds.512.66.0f3a.w1 50 /r ib ] ND,AVX512DQ,FUTURE */ + /* 240(f3 fd 48) 301 001(50) 110 022 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VRANGEPD, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+21323, 547, 6695}, +}; + +static const struct itemplate instrux_VRANGEPS[6] = { + /* 0 : VRANGEPS xmmreg|mask|z,xmmreg*,xmmrm128|b32,imm8 [rvmi:fv: evex.nds.128.66.0f3a.w0 50 /r ib ] AVX512VL,AVX512DQ,FUTURE */ + /* 241(f3 7d 08) 301 001(50) 120 023 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VRANGEPS, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+21333, 546, 6696}, + /* 1 : VRANGEPS xmmreg|mask|z,xmmrm128|b32,imm8 [r+vmi:fv: evex.nds.128.66.0f3a.w0 50 /r ib ] ND,AVX512VL,AVX512DQ,FUTURE */ + /* 240(f3 7d 08) 301 001(50) 110 022 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VRANGEPS, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+21343, 546, 6696}, + /* 2 : VRANGEPS ymmreg|mask|z,ymmreg*,ymmrm256|b32,imm8 [rvmi:fv: evex.nds.256.66.0f3a.w0 50 /r ib ] AVX512VL,AVX512DQ,FUTURE */ + /* 241(f3 7d 28) 301 001(50) 120 023 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VRANGEPS, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+21353, 546, 6697}, + /* 3 : VRANGEPS ymmreg|mask|z,ymmrm256|b32,imm8 [r+vmi:fv: evex.nds.256.66.0f3a.w0 50 /r ib ] ND,AVX512VL,AVX512DQ,FUTURE */ + /* 240(f3 7d 28) 301 001(50) 110 022 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VRANGEPS, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+21363, 546, 6697}, + /* 4 : VRANGEPS zmmreg|mask|z,zmmreg*,zmmrm512|b32|sae,imm8 [rvmi:fv: evex.nds.512.66.0f3a.w0 50 /r ib ] AVX512DQ,FUTURE */ + /* 241(f3 7d 48) 301 001(50) 120 023 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VRANGEPS, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B32|SAE,0,0}, nasm_bytecodes+21373, 547, 6698}, + /* 5 : VRANGEPS zmmreg|mask|z,zmmrm512|b32|sae,imm8 [r+vmi:fv: evex.nds.512.66.0f3a.w0 50 /r ib ] ND,AVX512DQ,FUTURE */ + /* 240(f3 7d 48) 301 001(50) 110 022 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VRANGEPS, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+21383, 547, 6698}, +}; + +static const struct itemplate instrux_VRANGESD[2] = { + /* 0 : VRANGESD xmmreg|mask|z,xmmreg*,xmmrm64|sae,imm8 [rvmi:t1s: evex.nds.lig.66.0f3a.w1 51 /r ib ] AVX512DQ,FUTURE */ + /* 241(f3 fd 08) 306 001(51) 120 023 : LIG,EVEX,PROT,AVX512DQ,FUTURE */ + {I_VRANGESD, 4, {XMMREG,XMMREG,RM_XMM|BITS64,IMM_NORMAL|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+21393, 553, 6699}, + /* 1 : VRANGESD xmmreg|mask|z,xmmrm64|sae,imm8 [r+vmi:t1s: evex.nds.lig.66.0f3a.w1 51 /r ib ] ND,AVX512DQ,FUTURE */ + /* 240(f3 fd 08) 306 001(51) 110 022 : LIG,EVEX,PROT,AVX512DQ,FUTURE */ + {I_VRANGESD, 3, {XMMREG,RM_XMM|BITS64,IMM_NORMAL|BITS8,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+21403, 553, 6699}, +}; + +static const struct itemplate instrux_VRANGESS[2] = { + /* 0 : VRANGESS xmmreg|mask|z,xmmreg*,xmmrm32|sae,imm8 [rvmi:t1s: evex.nds.lig.66.0f3a.w0 51 /r ib ] AVX512DQ,FUTURE */ + /* 241(f3 7d 08) 306 001(51) 120 023 : LIG,EVEX,PROT,AVX512DQ,FUTURE */ + {I_VRANGESS, 4, {XMMREG,XMMREG,RM_XMM|BITS32,IMM_NORMAL|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+21413, 553, 6700}, + /* 1 : VRANGESS xmmreg|mask|z,xmmrm32|sae,imm8 [r+vmi:t1s: evex.nds.lig.66.0f3a.w0 51 /r ib ] ND,AVX512DQ,FUTURE */ + /* 240(f3 7d 08) 306 001(51) 110 022 : LIG,EVEX,PROT,AVX512DQ,FUTURE */ + {I_VRANGESS, 3, {XMMREG,RM_XMM|BITS32,IMM_NORMAL|BITS8,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+21423, 553, 6700}, +}; + +static const struct itemplate instrux_VRCP14PD[3] = { + /* 0 : VRCP14PD xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.66.0f38.w1 4c /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 fd 08) 301 001(4c) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VRCP14PD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+43681, 543, 6701}, + /* 1 : VRCP14PD ymmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.66.0f38.w1 4c /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 fd 28) 301 001(4c) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VRCP14PD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+43690, 543, 6702}, + /* 2 : VRCP14PD zmmreg|mask|z,zmmrm512|b64 [rm:fv: evex.512.66.0f38.w1 4c /r ] AVX512,FUTURE */ + /* 250(f2 fd 48) 301 001(4c) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VRCP14PD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+43699, 544, 6703}, +}; + +static const struct itemplate instrux_VRCP14PS[3] = { + /* 0 : VRCP14PS xmmreg|mask|z,xmmrm128|b32 [rm:fv: evex.128.66.0f38.w0 4c /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 08) 301 001(4c) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VRCP14PS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+43708, 543, 6704}, + /* 1 : VRCP14PS ymmreg|mask|z,ymmrm256|b32 [rm:fv: evex.256.66.0f38.w0 4c /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 28) 301 001(4c) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VRCP14PS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+43717, 543, 6705}, + /* 2 : VRCP14PS zmmreg|mask|z,zmmrm512|b32 [rm:fv: evex.512.66.0f38.w0 4c /r ] AVX512,FUTURE */ + /* 250(f2 7d 48) 301 001(4c) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VRCP14PS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+43726, 544, 6706}, +}; + +static const struct itemplate instrux_VRCP14SD[2] = { + /* 0 : VRCP14SD xmmreg|mask|z,xmmreg*,xmmrm64 [rvm:t1s: evex.nds.lig.66.0f38.w1 4d /r ] AVX512,FUTURE */ + /* 241(f2 fd 08) 306 001(4d) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VRCP14SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+43735, 545, 6707}, + /* 1 : VRCP14SD xmmreg|mask|z,xmmrm64 [r+vm:t1s: evex.nds.lig.66.0f38.w1 4d /r ] ND,AVX512,FUTURE */ + /* 240(f2 fd 08) 306 001(4d) 110 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VRCP14SD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+43744, 545, 6707}, +}; + +static const struct itemplate instrux_VRCP14SS[2] = { + /* 0 : VRCP14SS xmmreg|mask|z,xmmreg*,xmmrm32 [rvm:t1s: evex.nds.lig.66.0f38.w0 4d /r ] AVX512,FUTURE */ + /* 241(f2 7d 08) 306 001(4d) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VRCP14SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+43753, 545, 6708}, + /* 1 : VRCP14SS xmmreg|mask|z,xmmrm32 [r+vm:t1s: evex.nds.lig.66.0f38.w0 4d /r ] ND,AVX512,FUTURE */ + /* 240(f2 7d 08) 306 001(4d) 110 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VRCP14SS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+43762, 545, 6708}, +}; + +static const struct itemplate instrux_VRCP28PD[1] = { + /* 0 : VRCP28PD zmmreg|mask|z,zmmrm512|b64|sae [rm:fv: evex.512.66.0f38.w1 ca /r ] AVX512ER,FUTURE */ + /* 250(f2 fd 48) 301 001(ca) 110 : EVEX,PROT,AVX512ER,FUTURE */ + {I_VRCP28PD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+43771, 551, 6709}, +}; + +static const struct itemplate instrux_VRCP28PS[1] = { + /* 0 : VRCP28PS zmmreg|mask|z,zmmrm512|b32|sae [rm:fv: evex.512.66.0f38.w0 ca /r ] AVX512ER,FUTURE */ + /* 250(f2 7d 48) 301 001(ca) 110 : EVEX,PROT,AVX512ER,FUTURE */ + {I_VRCP28PS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+43780, 551, 6710}, +}; + +static const struct itemplate instrux_VRCP28SD[2] = { + /* 0 : VRCP28SD xmmreg|mask|z,xmmreg*,xmmrm64|sae [rvm:t1s: evex.nds.lig.66.0f38.w1 cb /r ] AVX512ER,FUTURE */ + /* 241(f2 fd 08) 306 001(cb) 120 : LIG,EVEX,PROT,AVX512ER,FUTURE */ + {I_VRCP28SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+43789, 564, 6711}, + /* 1 : VRCP28SD xmmreg|mask|z,xmmrm64|sae [r+vm:t1s: evex.nds.lig.66.0f38.w1 cb /r ] ND,AVX512ER,FUTURE */ + /* 240(f2 fd 08) 306 001(cb) 110 : LIG,EVEX,PROT,AVX512ER,FUTURE */ + {I_VRCP28SD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+43798, 564, 6711}, +}; + +static const struct itemplate instrux_VRCP28SS[2] = { + /* 0 : VRCP28SS xmmreg|mask|z,xmmreg*,xmmrm32|sae [rvm:t1s: evex.nds.lig.66.0f38.w0 cb /r ] AVX512ER,FUTURE */ + /* 241(f2 7d 08) 306 001(cb) 120 : LIG,EVEX,PROT,AVX512ER,FUTURE */ + {I_VRCP28SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+43807, 564, 6712}, + /* 1 : VRCP28SS xmmreg|mask|z,xmmrm32|sae [r+vm:t1s: evex.nds.lig.66.0f38.w0 cb /r ] ND,AVX512ER,FUTURE */ + /* 240(f2 7d 08) 306 001(cb) 110 : LIG,EVEX,PROT,AVX512ER,FUTURE */ + {I_VRCP28SS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+43816, 564, 6712}, +}; + +static const struct itemplate instrux_VREDUCEPD[3] = { + /* 0 : VREDUCEPD xmmreg|mask|z,xmmrm128|b64,imm8 [rmi:fv: evex.128.66.0f3a.w1 56 /r ib ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f3 fd 08) 301 001(56) 110 022 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VREDUCEPD, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+21433, 546, 6713}, + /* 1 : VREDUCEPD ymmreg|mask|z,ymmrm256|b64,imm8 [rmi:fv: evex.256.66.0f3a.w1 56 /r ib ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f3 fd 28) 301 001(56) 110 022 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VREDUCEPD, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+21443, 546, 6714}, + /* 2 : VREDUCEPD zmmreg|mask|z,zmmrm512|b64|sae,imm8 [rmi:fv: evex.512.66.0f3a.w1 56 /r ib ] AVX512DQ,FUTURE */ + /* 250(f3 fd 48) 301 001(56) 110 022 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VREDUCEPD, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+21453, 547, 6715}, +}; + +static const struct itemplate instrux_VREDUCEPS[3] = { + /* 0 : VREDUCEPS xmmreg|mask|z,xmmrm128|b32,imm8 [rmi:fv: evex.128.66.0f3a.w0 56 /r ib ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f3 7d 08) 301 001(56) 110 022 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VREDUCEPS, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+21463, 546, 6716}, + /* 1 : VREDUCEPS ymmreg|mask|z,ymmrm256|b32,imm8 [rmi:fv: evex.256.66.0f3a.w0 56 /r ib ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f3 7d 28) 301 001(56) 110 022 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VREDUCEPS, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+21473, 546, 6717}, + /* 2 : VREDUCEPS zmmreg|mask|z,zmmrm512|b32|sae,imm8 [rmi:fv: evex.512.66.0f3a.w0 56 /r ib ] AVX512DQ,FUTURE */ + /* 250(f3 7d 48) 301 001(56) 110 022 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VREDUCEPS, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+21483, 547, 6718}, +}; + +static const struct itemplate instrux_VREDUCESD[2] = { + /* 0 : VREDUCESD xmmreg|mask|z,xmmreg*,xmmrm64|sae,imm8 [rvmi:t1s: evex.nds.lig.66.0f3a.w1 57 /r ib ] AVX512DQ,FUTURE */ + /* 241(f3 fd 08) 306 001(57) 120 023 : LIG,EVEX,PROT,AVX512DQ,FUTURE */ + {I_VREDUCESD, 4, {XMMREG,XMMREG,RM_XMM|BITS64,IMM_NORMAL|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+21493, 553, 6719}, + /* 1 : VREDUCESD xmmreg|mask|z,xmmrm64|sae,imm8 [r+vmi:t1s: evex.nds.lig.66.0f3a.w1 57 /r ib ] ND,AVX512DQ,FUTURE */ + /* 240(f3 fd 08) 306 001(57) 110 022 : LIG,EVEX,PROT,AVX512DQ,FUTURE */ + {I_VREDUCESD, 3, {XMMREG,RM_XMM|BITS64,IMM_NORMAL|BITS8,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+21503, 553, 6719}, +}; + +static const struct itemplate instrux_VREDUCESS[2] = { + /* 0 : VREDUCESS xmmreg|mask|z,xmmreg*,xmmrm32|sae,imm8 [rvmi:t1s: evex.nds.lig.66.0f3a.w0 57 /r ib ] AVX512DQ,FUTURE */ + /* 241(f3 7d 08) 306 001(57) 120 023 : LIG,EVEX,PROT,AVX512DQ,FUTURE */ + {I_VREDUCESS, 4, {XMMREG,XMMREG,RM_XMM|BITS32,IMM_NORMAL|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+21513, 553, 6720}, + /* 1 : VREDUCESS xmmreg|mask|z,xmmrm32|sae,imm8 [r+vmi:t1s: evex.nds.lig.66.0f3a.w0 57 /r ib ] ND,AVX512DQ,FUTURE */ + /* 240(f3 7d 08) 306 001(57) 110 022 : LIG,EVEX,PROT,AVX512DQ,FUTURE */ + {I_VREDUCESS, 3, {XMMREG,RM_XMM|BITS32,IMM_NORMAL|BITS8,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+21523, 553, 6720}, +}; + +static const struct itemplate instrux_VRNDSCALEPD[3] = { + /* 0 : VRNDSCALEPD xmmreg|mask|z,xmmrm128|b64,imm8 [rmi:fv: evex.128.66.0f3a.w1 09 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 250(f3 fd 08) 301 001(09) 110 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VRNDSCALEPD, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+21533, 543, 6721}, + /* 1 : VRNDSCALEPD ymmreg|mask|z,ymmrm256|b64,imm8 [rmi:fv: evex.256.66.0f3a.w1 09 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 250(f3 fd 28) 301 001(09) 110 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VRNDSCALEPD, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+21543, 543, 6722}, + /* 2 : VRNDSCALEPD zmmreg|mask|z,zmmrm512|b64|sae,imm8 [rmi:fv: evex.512.66.0f3a.w1 09 /r ib ] AVX512,FUTURE */ + /* 250(f3 fd 48) 301 001(09) 110 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VRNDSCALEPD, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+21553, 544, 6723}, +}; + +static const struct itemplate instrux_VRNDSCALEPH[3] = { + /* 0 : VRNDSCALEPH xmmreg|mask|z,xmmrm128|b16,imm8 [rmi:fv: evex.128.np.0f3a.w0 08 /r ib ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f3 7c 08) 301 001(08) 110 022 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VRNDSCALEPH, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+21563, 565, 6724}, + /* 1 : VRNDSCALEPH ymmreg|mask|z,ymmrm256|b16,imm8 [rmi:fv: evex.256.np.0f3a.w0 08 /r ib ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f3 7c 28) 301 001(08) 110 022 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VRNDSCALEPH, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+21573, 565, 6725}, + /* 2 : VRNDSCALEPH zmmreg|mask|z,zmmrm512|b16|sae,imm8 [rmi:fv: evex.512.np.0f3a.w0 08 /r ib ] AVX512FP16,FUTURE */ + /* 250(f3 7c 48) 301 001(08) 110 022 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VRNDSCALEPH, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+21583, 566, 6726}, +}; + +static const struct itemplate instrux_VRNDSCALEPS[3] = { + /* 0 : VRNDSCALEPS xmmreg|mask|z,xmmrm128|b32,imm8 [rmi:fv: evex.128.66.0f3a.w0 08 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 250(f3 7d 08) 301 001(08) 110 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VRNDSCALEPS, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+21593, 543, 6727}, + /* 1 : VRNDSCALEPS ymmreg|mask|z,ymmrm256|b32,imm8 [rmi:fv: evex.256.66.0f3a.w0 08 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 250(f3 7d 28) 301 001(08) 110 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VRNDSCALEPS, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+21603, 543, 6728}, + /* 2 : VRNDSCALEPS zmmreg|mask|z,zmmrm512|b32|sae,imm8 [rmi:fv: evex.512.66.0f3a.w0 08 /r ib ] AVX512,FUTURE */ + /* 250(f3 7d 48) 301 001(08) 110 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VRNDSCALEPS, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+21613, 544, 6729}, +}; + +static const struct itemplate instrux_VRNDSCALESD[2] = { + /* 0 : VRNDSCALESD xmmreg|mask|z,xmmreg*,xmmrm64|sae,imm8 [rvmi:t1s: evex.nds.lig.66.0f3a.w1 0b /r ib ] AVX512,FUTURE */ + /* 241(f3 fd 08) 306 001(0b) 120 023 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VRNDSCALESD, 4, {XMMREG,XMMREG,RM_XMM|BITS64,IMM_NORMAL|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+21623, 545, 6730}, + /* 1 : VRNDSCALESD xmmreg|mask|z,xmmrm64|sae,imm8 [r+vmi:t1s: evex.nds.lig.66.0f3a.w1 0b /r ib ] ND,AVX512,FUTURE */ + /* 240(f3 fd 08) 306 001(0b) 110 022 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VRNDSCALESD, 3, {XMMREG,RM_XMM|BITS64,IMM_NORMAL|BITS8,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+21633, 545, 6730}, +}; + +static const struct itemplate instrux_VRNDSCALESH[2] = { + /* 0 : VRNDSCALESH xmmreg|mask|z,xmmreg*,xmmrm16|sae,imm8 [rvmi:t1s: evex.nds.lig.np.0f3a.w0 0a /r ib ] AVX512FP16,FUTURE */ + /* 241(f3 7c 08) 306 001(0a) 120 023 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VRNDSCALESH, 4, {XMMREG,XMMREG,RM_XMM|BITS16,IMM_NORMAL|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+21643, 567, 6731}, + /* 1 : VRNDSCALESH xmmreg|mask|z,xmmrm16|sae,imm8 [r+vmi:t1s: evex.nds.lig.np.0f3a.w0 0a /r ib ] ND,AVX512FP16,FUTURE */ + /* 240(f3 7c 08) 306 001(0a) 110 022 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VRNDSCALESH, 3, {XMMREG,RM_XMM|BITS16,IMM_NORMAL|BITS8,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+21653, 567, 6731}, +}; + +static const struct itemplate instrux_VRNDSCALESS[2] = { + /* 0 : VRNDSCALESS xmmreg|mask|z,xmmreg*,xmmrm32|sae,imm8 [rvmi:t1s: evex.nds.lig.66.0f3a.w0 0a /r ib ] AVX512,FUTURE */ + /* 241(f3 7d 08) 306 001(0a) 120 023 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VRNDSCALESS, 4, {XMMREG,XMMREG,RM_XMM|BITS32,IMM_NORMAL|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+21663, 545, 6732}, + /* 1 : VRNDSCALESS xmmreg|mask|z,xmmrm32|sae,imm8 [r+vmi:t1s: evex.nds.lig.66.0f3a.w0 0a /r ib ] ND,AVX512,FUTURE */ + /* 240(f3 7d 08) 306 001(0a) 110 022 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VRNDSCALESS, 3, {XMMREG,RM_XMM|BITS32,IMM_NORMAL|BITS8,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+21673, 545, 6732}, +}; + +static const struct itemplate instrux_VRSQRT14PD[3] = { + /* 0 : VRSQRT14PD xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.66.0f38.w1 4e /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 fd 08) 301 001(4e) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VRSQRT14PD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+43825, 543, 6733}, + /* 1 : VRSQRT14PD ymmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.66.0f38.w1 4e /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 fd 28) 301 001(4e) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VRSQRT14PD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+43834, 543, 6734}, + /* 2 : VRSQRT14PD zmmreg|mask|z,zmmrm512|b64 [rm:fv: evex.512.66.0f38.w1 4e /r ] AVX512,FUTURE */ + /* 250(f2 fd 48) 301 001(4e) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VRSQRT14PD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+43843, 544, 6735}, +}; + +static const struct itemplate instrux_VRSQRT14PS[3] = { + /* 0 : VRSQRT14PS xmmreg|mask|z,xmmrm128|b32 [rm:fv: evex.128.66.0f38.w0 4e /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 08) 301 001(4e) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VRSQRT14PS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+43852, 543, 6736}, + /* 1 : VRSQRT14PS ymmreg|mask|z,ymmrm256|b32 [rm:fv: evex.256.66.0f38.w0 4e /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 28) 301 001(4e) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VRSQRT14PS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+43861, 543, 6737}, + /* 2 : VRSQRT14PS zmmreg|mask|z,zmmrm512|b32 [rm:fv: evex.512.66.0f38.w0 4e /r ] AVX512,FUTURE */ + /* 250(f2 7d 48) 301 001(4e) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VRSQRT14PS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+43870, 544, 6738}, +}; + +static const struct itemplate instrux_VRSQRT14SD[2] = { + /* 0 : VRSQRT14SD xmmreg|mask|z,xmmreg*,xmmrm64 [rvm:t1s: evex.nds.lig.66.0f38.w1 4f /r ] AVX512,FUTURE */ + /* 241(f2 fd 08) 306 001(4f) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VRSQRT14SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+43879, 545, 6739}, + /* 1 : VRSQRT14SD xmmreg|mask|z,xmmrm64 [r+vm:t1s: evex.nds.lig.66.0f38.w1 4f /r ] ND,AVX512,FUTURE */ + /* 240(f2 fd 08) 306 001(4f) 110 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VRSQRT14SD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+43888, 545, 6739}, +}; + +static const struct itemplate instrux_VRSQRT14SS[2] = { + /* 0 : VRSQRT14SS xmmreg|mask|z,xmmreg*,xmmrm32 [rvm:t1s: evex.nds.lig.66.0f38.w0 4f /r ] AVX512,FUTURE */ + /* 241(f2 7d 08) 306 001(4f) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VRSQRT14SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+43897, 545, 6740}, + /* 1 : VRSQRT14SS xmmreg|mask|z,xmmrm32 [r+vm:t1s: evex.nds.lig.66.0f38.w0 4f /r ] ND,AVX512,FUTURE */ + /* 240(f2 7d 08) 306 001(4f) 110 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VRSQRT14SS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+43906, 545, 6740}, +}; + +static const struct itemplate instrux_VRSQRT28PD[1] = { + /* 0 : VRSQRT28PD zmmreg|mask|z,zmmrm512|b64|sae [rm:fv: evex.512.66.0f38.w1 cc /r ] AVX512ER,FUTURE */ + /* 250(f2 fd 48) 301 001(cc) 110 : EVEX,PROT,AVX512ER,FUTURE */ + {I_VRSQRT28PD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+43915, 551, 6741}, +}; + +static const struct itemplate instrux_VRSQRT28PS[1] = { + /* 0 : VRSQRT28PS zmmreg|mask|z,zmmrm512|b32|sae [rm:fv: evex.512.66.0f38.w0 cc /r ] AVX512ER,FUTURE */ + /* 250(f2 7d 48) 301 001(cc) 110 : EVEX,PROT,AVX512ER,FUTURE */ + {I_VRSQRT28PS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+43924, 551, 6742}, +}; + +static const struct itemplate instrux_VRSQRT28SD[2] = { + /* 0 : VRSQRT28SD xmmreg|mask|z,xmmreg*,xmmrm64|sae [rvm:t1s: evex.nds.lig.66.0f38.w1 cd /r ] AVX512ER,FUTURE */ + /* 241(f2 fd 08) 306 001(cd) 120 : LIG,EVEX,PROT,AVX512ER,FUTURE */ + {I_VRSQRT28SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+43933, 564, 6743}, + /* 1 : VRSQRT28SD xmmreg|mask|z,xmmrm64|sae [r+vm:t1s: evex.nds.lig.66.0f38.w1 cd /r ] ND,AVX512ER,FUTURE */ + /* 240(f2 fd 08) 306 001(cd) 110 : LIG,EVEX,PROT,AVX512ER,FUTURE */ + {I_VRSQRT28SD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+43942, 564, 6743}, +}; + +static const struct itemplate instrux_VRSQRT28SS[2] = { + /* 0 : VRSQRT28SS xmmreg|mask|z,xmmreg*,xmmrm32|sae [rvm:t1s: evex.nds.lig.66.0f38.w0 cd /r ] AVX512ER,FUTURE */ + /* 241(f2 7d 08) 306 001(cd) 120 : LIG,EVEX,PROT,AVX512ER,FUTURE */ + {I_VRSQRT28SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+43951, 564, 6744}, + /* 1 : VRSQRT28SS xmmreg|mask|z,xmmrm32|sae [r+vm:t1s: evex.nds.lig.66.0f38.w0 cd /r ] ND,AVX512ER,FUTURE */ + /* 240(f2 7d 08) 306 001(cd) 110 : LIG,EVEX,PROT,AVX512ER,FUTURE */ + {I_VRSQRT28SS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+43960, 564, 6744}, +}; + +static const struct itemplate instrux_VSCALEFPD[6] = { + /* 0 : VSCALEFPD xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 2c /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(2c) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VSCALEFPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+43969, 543, 6745}, + /* 1 : VSCALEFPD xmmreg|mask|z,xmmrm128|b64 [r+vm:fv: evex.nds.128.66.0f38.w1 2c /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f2 fd 08) 301 001(2c) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VSCALEFPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+43978, 543, 6745}, + /* 2 : VSCALEFPD ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 2c /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(2c) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VSCALEFPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+43987, 543, 6746}, + /* 3 : VSCALEFPD ymmreg|mask|z,ymmrm256|b64 [r+vm:fv: evex.nds.256.66.0f38.w1 2c /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f2 fd 28) 301 001(2c) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VSCALEFPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+43996, 543, 6746}, + /* 4 : VSCALEFPD zmmreg|mask|z,zmmreg*,zmmrm512|b64|er [rvm:fv: evex.nds.512.66.0f38.w1 2c /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(2c) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VSCALEFPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+44005, 544, 6747}, + /* 5 : VSCALEFPD zmmreg|mask|z,zmmrm512|b64|er [r+vm:fv: evex.nds.512.66.0f38.w1 2c /r ] ND,AVX512,FUTURE */ + /* 240(f2 fd 48) 301 001(2c) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VSCALEFPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+44014, 544, 6747}, +}; + +static const struct itemplate instrux_VSCALEFPS[6] = { + /* 0 : VSCALEFPS xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 2c /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(2c) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VSCALEFPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+44023, 543, 6748}, + /* 1 : VSCALEFPS xmmreg|mask|z,xmmrm128|b32 [r+vm:fv: evex.nds.128.66.0f38.w0 2c /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f2 7d 08) 301 001(2c) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VSCALEFPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+44032, 543, 6748}, + /* 2 : VSCALEFPS ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 2c /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(2c) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VSCALEFPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+44041, 543, 6749}, + /* 3 : VSCALEFPS ymmreg|mask|z,ymmrm256|b32 [r+vm:fv: evex.nds.256.66.0f38.w0 2c /r ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f2 7d 28) 301 001(2c) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VSCALEFPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+44050, 543, 6749}, + /* 4 : VSCALEFPS zmmreg|mask|z,zmmreg*,zmmrm512|b32|er [rvm:fv: evex.nds.512.66.0f38.w0 2c /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(2c) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VSCALEFPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+44059, 544, 6750}, + /* 5 : VSCALEFPS zmmreg|mask|z,zmmrm512|b32|er [r+vm:fv: evex.nds.512.66.0f38.w0 2c /r ] ND,AVX512,FUTURE */ + /* 240(f2 7d 48) 301 001(2c) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VSCALEFPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+44068, 544, 6750}, +}; + +static const struct itemplate instrux_VSCALEFSD[2] = { + /* 0 : VSCALEFSD xmmreg|mask|z,xmmreg*,xmmrm64|er [rvm:t1s: evex.nds.lig.66.0f38.w1 2d /r ] AVX512,FUTURE */ + /* 241(f2 fd 08) 306 001(2d) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VSCALEFSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+44077, 545, 6751}, + /* 1 : VSCALEFSD xmmreg|mask|z,xmmrm64|er [r+vm:t1s: evex.nds.lig.66.0f38.w1 2d /r ] ND,AVX512,FUTURE */ + /* 240(f2 fd 08) 306 001(2d) 110 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VSCALEFSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+44086, 545, 6751}, +}; + +static const struct itemplate instrux_VSCALEFSS[2] = { + /* 0 : VSCALEFSS xmmreg|mask|z,xmmreg*,xmmrm32|er [rvm:t1s: evex.nds.lig.66.0f38.w0 2d /r ] AVX512,FUTURE */ + /* 241(f2 7d 08) 306 001(2d) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VSCALEFSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+44095, 545, 6752}, + /* 1 : VSCALEFSS xmmreg|mask|z,xmmrm32|er [r+vm:t1s: evex.nds.lig.66.0f38.w0 2d /r ] ND,AVX512,FUTURE */ + /* 240(f2 7d 08) 306 001(2d) 110 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VSCALEFSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+44104, 545, 6752}, +}; + +static const struct itemplate instrux_VSCATTERDPD[3] = { + /* 0 : VSCATTERDPD xmem64|mask,xmmreg [mr:t1s: vsibx evex.128.66.0f38.w1 a2 /r ] AVX512,AVX512VL,FUTURE */ + /* 374 250(f2 fd 08) 306 001(a2) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VSCATTERDPD, 2, {XMEM|BITS64,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+21683, 543, 6753}, + /* 1 : VSCATTERDPD xmem64|mask,ymmreg [mr:t1s: vsibx evex.256.66.0f38.w1 a2 /r ] AVX512,AVX512VL,FUTURE */ + /* 374 250(f2 fd 28) 306 001(a2) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VSCATTERDPD, 2, {XMEM|BITS64,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+21693, 543, 6754}, + /* 2 : VSCATTERDPD ymem64|mask,zmmreg [mr:t1s: vsiby evex.512.66.0f38.w1 a2 /r ] AVX512,FUTURE */ + /* 375 250(f2 fd 48) 306 001(a2) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VSCATTERDPD, 2, {YMEM|BITS64,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+21703, 544, 6755}, +}; + +static const struct itemplate instrux_VSCATTERDPS[3] = { + /* 0 : VSCATTERDPS xmem32|mask,xmmreg [mr:t1s: vsibx evex.128.66.0f38.w0 a2 /r ] AVX512,AVX512VL,FUTURE */ + /* 374 250(f2 7d 08) 306 001(a2) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VSCATTERDPS, 2, {XMEM|BITS32,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+21713, 543, 6756}, + /* 1 : VSCATTERDPS ymem32|mask,ymmreg [mr:t1s: vsiby evex.256.66.0f38.w0 a2 /r ] AVX512,AVX512VL,FUTURE */ + /* 375 250(f2 7d 28) 306 001(a2) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VSCATTERDPS, 2, {YMEM|BITS32,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+21723, 543, 6757}, + /* 2 : VSCATTERDPS zmem32|mask,zmmreg [mr:t1s: vsibz evex.512.66.0f38.w0 a2 /r ] AVX512,FUTURE */ + /* 376 250(f2 7d 48) 306 001(a2) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VSCATTERDPS, 2, {ZMEM|BITS32,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+21733, 544, 6758}, +}; + +static const struct itemplate instrux_VSCATTERPF0DPD[1] = { + /* 0 : VSCATTERPF0DPD ymem64|mask [m:t1s: vsiby evex.512.66.0f38.w1 c6 /5 ] AVX512PF,FUTURE */ + /* 375 250(f2 fd 48) 306 001(c6) 205 : EVEX,PROT,AVX512PF,FUTURE */ + {I_VSCATTERPF0DPD, 1, {YMEM|BITS64,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+21743, 554, 6759}, +}; + +static const struct itemplate instrux_VSCATTERPF0DPS[1] = { + /* 0 : VSCATTERPF0DPS zmem32|mask [m:t1s: vsibz evex.512.66.0f38.w0 c6 /5 ] AVX512PF,FUTURE */ + /* 376 250(f2 7d 48) 306 001(c6) 205 : EVEX,PROT,AVX512PF,FUTURE */ + {I_VSCATTERPF0DPS, 1, {ZMEM|BITS32,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+21753, 554, 6760}, +}; + +static const struct itemplate instrux_VSCATTERPF0QPD[1] = { + /* 0 : VSCATTERPF0QPD zmem64|mask [m:t1s: vsibz evex.512.66.0f38.w1 c7 /5 ] AVX512PF,FUTURE */ + /* 376 250(f2 fd 48) 306 001(c7) 205 : EVEX,PROT,AVX512PF,FUTURE */ + {I_VSCATTERPF0QPD, 1, {ZMEM|BITS64,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+21763, 554, 6761}, +}; + +static const struct itemplate instrux_VSCATTERPF0QPS[1] = { + /* 0 : VSCATTERPF0QPS zmem32|mask [m:t1s: vsibz evex.512.66.0f38.w0 c7 /5 ] AVX512PF,FUTURE */ + /* 376 250(f2 7d 48) 306 001(c7) 205 : EVEX,PROT,AVX512PF,FUTURE */ + {I_VSCATTERPF0QPS, 1, {ZMEM|BITS32,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+21773, 554, 6762}, +}; + +static const struct itemplate instrux_VSCATTERPF1DPD[1] = { + /* 0 : VSCATTERPF1DPD ymem64|mask [m:t1s: vsiby evex.512.66.0f38.w1 c6 /6 ] AVX512PF,FUTURE */ + /* 375 250(f2 fd 48) 306 001(c6) 206 : EVEX,PROT,AVX512PF,FUTURE */ + {I_VSCATTERPF1DPD, 1, {YMEM|BITS64,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+21783, 554, 6763}, +}; + +static const struct itemplate instrux_VSCATTERPF1DPS[1] = { + /* 0 : VSCATTERPF1DPS zmem32|mask [m:t1s: vsibz evex.512.66.0f38.w0 c6 /6 ] AVX512PF,FUTURE */ + /* 376 250(f2 7d 48) 306 001(c6) 206 : EVEX,PROT,AVX512PF,FUTURE */ + {I_VSCATTERPF1DPS, 1, {ZMEM|BITS32,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+21793, 554, 6764}, +}; + +static const struct itemplate instrux_VSCATTERPF1QPD[1] = { + /* 0 : VSCATTERPF1QPD zmem64|mask [m:t1s: vsibz evex.512.66.0f38.w1 c7 /6 ] AVX512PF,FUTURE */ + /* 376 250(f2 fd 48) 306 001(c7) 206 : EVEX,PROT,AVX512PF,FUTURE */ + {I_VSCATTERPF1QPD, 1, {ZMEM|BITS64,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+21803, 554, 6765}, +}; + +static const struct itemplate instrux_VSCATTERPF1QPS[1] = { + /* 0 : VSCATTERPF1QPS zmem32|mask [m:t1s: vsibz evex.512.66.0f38.w0 c7 /6 ] AVX512PF,FUTURE */ + /* 376 250(f2 7d 48) 306 001(c7) 206 : EVEX,PROT,AVX512PF,FUTURE */ + {I_VSCATTERPF1QPS, 1, {ZMEM|BITS32,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+21813, 554, 6766}, +}; + +static const struct itemplate instrux_VSCATTERQPD[3] = { + /* 0 : VSCATTERQPD xmem64|mask,xmmreg [mr:t1s: vsibx evex.128.66.0f38.w1 a3 /r ] AVX512,AVX512VL,FUTURE */ + /* 374 250(f2 fd 08) 306 001(a3) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VSCATTERQPD, 2, {XMEM|BITS64,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+21823, 543, 6767}, + /* 1 : VSCATTERQPD ymem64|mask,ymmreg [mr:t1s: vsiby evex.256.66.0f38.w1 a3 /r ] AVX512,AVX512VL,FUTURE */ + /* 375 250(f2 fd 28) 306 001(a3) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VSCATTERQPD, 2, {YMEM|BITS64,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+21833, 543, 6768}, + /* 2 : VSCATTERQPD zmem64|mask,zmmreg [mr:t1s: vsibz evex.512.66.0f38.w1 a3 /r ] AVX512,FUTURE */ + /* 376 250(f2 fd 48) 306 001(a3) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VSCATTERQPD, 2, {ZMEM|BITS64,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+21843, 544, 6769}, +}; + +static const struct itemplate instrux_VSCATTERQPS[3] = { + /* 0 : VSCATTERQPS xmem32|mask,xmmreg [mr:t1s: vsibx evex.128.66.0f38.w0 a3 /r ] AVX512,AVX512VL,FUTURE */ + /* 374 250(f2 7d 08) 306 001(a3) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VSCATTERQPS, 2, {XMEM|BITS32,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+21853, 543, 6770}, + /* 1 : VSCATTERQPS ymem32|mask,xmmreg [mr:t1s: vsiby evex.256.66.0f38.w0 a3 /r ] AVX512,AVX512VL,FUTURE */ + /* 375 250(f2 7d 28) 306 001(a3) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VSCATTERQPS, 2, {YMEM|BITS32,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+21863, 543, 6771}, + /* 2 : VSCATTERQPS zmem32|mask,ymmreg [mr:t1s: vsibz evex.512.66.0f38.w0 a3 /r ] AVX512,FUTURE */ + /* 376 250(f2 7d 48) 306 001(a3) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VSCATTERQPS, 2, {ZMEM|BITS32,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+21873, 544, 6772}, +}; + +static const struct itemplate instrux_VSHUFF32X4[4] = { + /* 0 : VSHUFF32X4 ymmreg|mask|z,ymmreg*,ymmrm256|b32,imm8 [rvmi:fv: evex.nds.256.66.0f3a.w0 23 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 28) 301 001(23) 120 023 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VSHUFF32X4, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+21883, 543, 6773}, + /* 1 : VSHUFF32X4 ymmreg|mask|z,ymmrm256|b32,imm8 [r+vmi:fv: evex.nds.256.66.0f3a.w0 23 /r ib ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f3 7d 28) 301 001(23) 110 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VSHUFF32X4, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+21893, 543, 6773}, + /* 2 : VSHUFF32X4 zmmreg|mask|z,zmmreg*,zmmrm512|b32,imm8 [rvmi:fv: evex.nds.512.66.0f3a.w0 23 /r ib ] AVX512,FUTURE */ + /* 241(f3 7d 48) 301 001(23) 120 023 : EVEX,PROT,AVX512,FUTURE */ + {I_VSHUFF32X4, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+21903, 544, 6774}, + /* 3 : VSHUFF32X4 zmmreg|mask|z,zmmrm512|b32,imm8 [r+vmi:fv: evex.nds.512.66.0f3a.w0 23 /r ib ] ND,AVX512,FUTURE */ + /* 240(f3 7d 48) 301 001(23) 110 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VSHUFF32X4, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+21913, 544, 6774}, +}; + +static const struct itemplate instrux_VSHUFF64X2[4] = { + /* 0 : VSHUFF64X2 ymmreg|mask|z,ymmreg*,ymmrm256|b64,imm8 [rvmi:fv: evex.nds.256.66.0f3a.w1 23 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 28) 301 001(23) 120 023 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VSHUFF64X2, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+21923, 543, 6775}, + /* 1 : VSHUFF64X2 ymmreg|mask|z,ymmrm256|b64,imm8 [r+vmi:fv: evex.nds.256.66.0f3a.w1 23 /r ib ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f3 fd 28) 301 001(23) 110 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VSHUFF64X2, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+21933, 543, 6775}, + /* 2 : VSHUFF64X2 zmmreg|mask|z,zmmreg*,zmmrm512|b64,imm8 [rvmi:fv: evex.nds.512.66.0f3a.w1 23 /r ib ] AVX512,FUTURE */ + /* 241(f3 fd 48) 301 001(23) 120 023 : EVEX,PROT,AVX512,FUTURE */ + {I_VSHUFF64X2, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+21943, 544, 6776}, + /* 3 : VSHUFF64X2 zmmreg|mask|z,zmmrm512|b64,imm8 [r+vmi:fv: evex.nds.512.66.0f3a.w1 23 /r ib ] ND,AVX512,FUTURE */ + /* 240(f3 fd 48) 301 001(23) 110 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VSHUFF64X2, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+21953, 544, 6776}, +}; + +static const struct itemplate instrux_VSHUFI32X4[4] = { + /* 0 : VSHUFI32X4 ymmreg|mask|z,ymmreg*,ymmrm256|b32,imm8 [rvmi:fv: evex.nds.256.66.0f3a.w0 43 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 28) 301 001(43) 120 023 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VSHUFI32X4, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+21963, 543, 6777}, + /* 1 : VSHUFI32X4 ymmreg|mask|z,ymmrm256|b32,imm8 [r+vmi:fv: evex.nds.256.66.0f3a.w0 43 /r ib ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f3 7d 28) 301 001(43) 110 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VSHUFI32X4, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+21973, 543, 6777}, + /* 2 : VSHUFI32X4 zmmreg|mask|z,zmmreg*,zmmrm512|b32,imm8 [rvmi:fv: evex.nds.512.66.0f3a.w0 43 /r ib ] AVX512,FUTURE */ + /* 241(f3 7d 48) 301 001(43) 120 023 : EVEX,PROT,AVX512,FUTURE */ + {I_VSHUFI32X4, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+21983, 544, 6778}, + /* 3 : VSHUFI32X4 zmmreg|mask|z,zmmrm512|b32,imm8 [r+vmi:fv: evex.nds.512.66.0f3a.w0 43 /r ib ] ND,AVX512,FUTURE */ + /* 240(f3 7d 48) 301 001(43) 110 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VSHUFI32X4, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+21993, 544, 6778}, +}; + +static const struct itemplate instrux_VSHUFI64X2[4] = { + /* 0 : VSHUFI64X2 ymmreg|mask|z,ymmreg*,ymmrm256|b64,imm8 [rvmi:fv: evex.nds.256.66.0f3a.w1 43 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 28) 301 001(43) 120 023 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VSHUFI64X2, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22003, 543, 6779}, + /* 1 : VSHUFI64X2 ymmreg|mask|z,ymmrm256|b64,imm8 [r+vmi:fv: evex.nds.256.66.0f3a.w1 43 /r ib ] ND,AVX512,AVX512VL,FUTURE */ + /* 240(f3 fd 28) 301 001(43) 110 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VSHUFI64X2, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+22013, 543, 6779}, + /* 2 : VSHUFI64X2 zmmreg|mask|z,zmmreg*,zmmrm512|b64,imm8 [rvmi:fv: evex.nds.512.66.0f3a.w1 43 /r ib ] AVX512,FUTURE */ + /* 241(f3 fd 48) 301 001(43) 120 023 : EVEX,PROT,AVX512,FUTURE */ + {I_VSHUFI64X2, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22023, 544, 6780}, + /* 3 : VSHUFI64X2 zmmreg|mask|z,zmmrm512|b64,imm8 [r+vmi:fv: evex.nds.512.66.0f3a.w1 43 /r ib ] ND,AVX512,FUTURE */ + /* 240(f3 fd 48) 301 001(43) 110 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VSHUFI64X2, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+22033, 544, 6780}, +}; + +static const struct itemplate instrux_RDPKRU[1] = { + /* 0 : RDPKRU void [ 0f 01 ee ] LONG,PROT,PKU,X86_64 */ + /* 355 002(01 ee) : LONG,PROT,PKU,X86_64 */ + {I_RDPKRU, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70162, 568, 6826}, +}; + +static const struct itemplate instrux_WRPKRU[1] = { + /* 0 : WRPKRU void [ 0f 01 ef ] LONG,PROT,PKU,X86_64 */ + /* 355 002(01 ef) : LONG,PROT,PKU,X86_64 */ + {I_WRPKRU, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70168, 568, 6827}, +}; + +static const struct itemplate instrux_PTWRITE[2] = { + /* 0 : PTWRITE rm32 [m: f3 o32 0f ae /4 ] PTWRITE,FUTURE */ + /* 333 321 355 001(ae) 204 : PTWRITE,FUTURE */ + {I_PTWRITE, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+65883, 569, 6833}, + /* 1 : PTWRITE rm64 [m: f3 o64 0f ae /4 ] AR0,SX,LONG,PROT,PTWRITE,X86_64 */ + /* 333 324 355 001(ae) 204 : AR0,SX,LONG,PROT,PTWRITE,X86_64 */ + {I_PTWRITE, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+65890, 570, 6834}, +}; + +static const struct itemplate instrux_CLDEMOTE[1] = { + /* 0 : CLDEMOTE mem [m: np 0f 1c /0 ] CLDEMOTE,FUTURE */ + /* 360 355 001(1c) 200 : CLDEMOTE,FUTURE */ + {I_CLDEMOTE, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70065, 571, 6838}, +}; + +static const struct itemplate instrux_MOVDIRI[4] = { + /* 0 : MOVDIRI mem32,reg32 [mr: np o32 0f38 f9 /r ] MOVDIRI,FUTURE */ + /* 360 321 356 001(f9) 101 : NOAPX,MOVDIRI,FUTURE */ + {I_MOVDIRI, 2, {MEMORY|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65897, 572, 6839}, + /* 1 : MOVDIRI mem64,reg64 [mr: np o64 0f38 f9 /r ] LONG,PROT,MOVDIRI,X86_64 */ + /* 360 324 356 001(f9) 101 : NOAPX,LONG,PROT,MOVDIRI,X86_64 */ + {I_MOVDIRI, 2, {MEMORY|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65904, 573, 6840}, + /* 2 : MOVDIRI mem32,reg32 [mr: evex.nd0.nf0.np.l0.m4.w0 f9 /r ] LONG,PROT,APX,MOVDIRI,X86_64 */ + /* 250(f4 7c 08) 300 001(f9) 101 : LONG,EVEX,PROT,APX,MOVDIRI,X86_64 */ + {I_MOVDIRI, 2, {MEMORY|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44689, 574, 6841}, + /* 3 : MOVDIRI mem64,reg64 [mr: evex.nd0.nf0.np.l0.m4.w1 f9 /r ] LONG,PROT,APX,MOVDIRI,X86_64 */ + /* 250(f4 fc 08) 300 001(f9) 101 : LONG,EVEX,PROT,APX,MOVDIRI,X86_64 */ + {I_MOVDIRI, 2, {MEMORY|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44698, 574, 6842}, +}; + +static const struct itemplate instrux_MOVDIR64B[4] = { + /* 0 : MOVDIR64B reg16,mem512 [rm: a16 66 0f38 f8 /r ] NOLONG,MOVDIR64B,FUTURE */ + /* 310 361 356 001(f8) 110 : NOREX,NOAPX,NOLONG,MOVDIR64B,FUTURE */ + {I_MOVDIR64B, 2, {REG_GPR|BITS16|RN_L16,MEMORY|BITS512|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65911, 575, 6843}, + /* 1 : MOVDIR64B reg32,mem512 [rm: a32 66 0f38 f8 /r ] MOVDIR64B,FUTURE */ + /* 311 361 356 001(f8) 110 : NOAPX,MOVDIR64B,FUTURE */ + {I_MOVDIR64B, 2, {REG_GPR|BITS32|RN_L16,MEMORY|BITS512|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65918, 576, 6844}, + /* 2 : MOVDIR64B reg64,mem512 [rm: a64 66 0f38 f8 /r ] LONG,PROT,MOVDIR64B,X86_64 */ + /* 313 361 356 001(f8) 110 : NOAPX,LONG,PROT,MOVDIR64B,X86_64 */ + {I_MOVDIR64B, 2, {REG_GPR|BITS64|RN_L16,MEMORY|BITS512|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65925, 577, 6845}, + /* 3 : MOVDIR64B reg64,mem512 [rm: evex.nd0.nf0.66.l0.m4.w1 f8 /r ] LONG,PROT,APX,MOVDIR64B,X86_64 */ + /* 250(f4 fd 08) 300 001(f8) 110 : LONG,EVEX,PROT,APX,MOVDIR64B,X86_64 */ + {I_MOVDIR64B, 2, {REG_GPR|BITS64,MEMORY|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+44707, 578, 6846}, +}; + +static const struct itemplate instrux_PCONFIG[2] = { + /* 0 : PCONFIG void [ np 0f 01 c5 ] FL,PCONFIG,FUTURE */ + /* 360 355 002(01 c5) : FL,PCONFIG,FUTURE */ + {I_PCONFIG, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70071, 579, 6847}, + /* 1 : PCONFIG void [ np 0f 01 c5 ] FL,PRIV,PCONFIG,FUTURE */ + /* 360 355 002(01 c5) : FL,PRIV,PCONFIG,FUTURE */ + {I_PCONFIG, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70071, 611, 7007}, +}; + +static const struct itemplate instrux_PBNDKB[1] = { + /* 0 : PBNDKB void [ np 0f 01 c7 ] PBNDKB,FUTURE */ + /* 360 355 002(01 c7) : PBNDKB,FUTURE */ + {I_PBNDKB, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70077, 580, 6850}, +}; + +static const struct itemplate instrux_PREFETCHRST2[1] = { + /* 0 : PREFETCHRST2 mem8 [m: 0f 18 /4 ] MOVRS,FUTURE */ + /* 355 001(18) 204 : MOVRS,FUTURE */ + {I_PREFETCHRST2, 1, {MEMORY|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70270, 581, 6851}, +}; + +static const struct itemplate instrux_GF2P8AFFINEINVQB[1] = { + /* 0 : GF2P8AFFINEINVQB xmmreg,xmmrm128,imm8 [rmi: 66 0f3a cf /r ib ] SSE,GFNI,FUTURE */ + /* 361 357 001(cf) 110 022 : NOAPX,SSE,GFNI,FUTURE */ + {I_GF2P8AFFINEINVQB, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+65932, 582, 6855}, +}; + +static const struct itemplate instrux_VGF2P8AFFINEINVQB[10] = { + /* 0 : VGF2P8AFFINEINVQB xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: vex.nds.128.66.0f3a.w1 cf /r ib ] AVX,GFNI,FUTURE */ + /* 261(003 201) 001(cf) 120 023 : NOAPX,VEX,AVX,GFNI,FUTURE */ + {I_VGF2P8AFFINEINVQB, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+54779, 583, 6856}, + /* 1 : VGF2P8AFFINEINVQB xmmreg,xmmrm128,imm8 [r+vmi: vex.nds.128.66.0f3a.w1 cf /r ib ] ND,AVX,GFNI,FUTURE */ + /* 260(003 201) 001(cf) 110 022 : NOAPX,VEX,AVX,GFNI,FUTURE */ + {I_VGF2P8AFFINEINVQB, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54787, 583, 6856}, + /* 2 : VGF2P8AFFINEINVQB ymmreg,ymmreg*,ymmrm256,imm8 [rvmi: vex.nds.256.66.0f3a.w1 cf /r ib ] AVX,GFNI,FUTURE */ + /* 261(003 205) 001(cf) 120 023 : NOAPX,VEX,AVX,GFNI,FUTURE */ + {I_VGF2P8AFFINEINVQB, 4, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+54795, 583, 6857}, + /* 3 : VGF2P8AFFINEINVQB ymmreg,ymmrm256,imm8 [r+vmi: vex.nds.256.66.0f3a.w1 cf /r ib ] ND,AVX,GFNI,FUTURE */ + /* 260(003 205) 001(cf) 110 022 : NOAPX,VEX,AVX,GFNI,FUTURE */ + {I_VGF2P8AFFINEINVQB, 3, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54803, 583, 6857}, + /* 4 : VGF2P8AFFINEINVQB xmmreg|mask|z,xmmreg*,xmmrm128|b64,imm8 [rvmi:fv: evex.nds.128.66.0f3a.w1 cf /r ib ] AVX512VL,GFNI,FUTURE */ + /* 241(f3 fd 08) 301 001(cf) 120 023 : EVEX,PROT,AVX512VL,GFNI,FUTURE */ + {I_VGF2P8AFFINEINVQB, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22163, 584, 6858}, + /* 5 : VGF2P8AFFINEINVQB xmmreg|mask|z,xmmrm128|b64,imm8 [r+vmi:fv: evex.nds.128.66.0f3a.w1 cf /r ib ] ND,AVX512VL,GFNI,FUTURE */ + /* 240(f3 fd 08) 301 001(cf) 110 022 : EVEX,PROT,AVX512VL,GFNI,FUTURE */ + {I_VGF2P8AFFINEINVQB, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+22173, 584, 6858}, + /* 6 : VGF2P8AFFINEINVQB ymmreg|mask|z,ymmreg*,ymmrm256|b64,imm8 [rvmi:fv: evex.nds.256.66.0f3a.w1 cf /r ib ] AVX512VL,GFNI,FUTURE */ + /* 241(f3 fd 28) 301 001(cf) 120 023 : EVEX,PROT,AVX512VL,GFNI,FUTURE */ + {I_VGF2P8AFFINEINVQB, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22183, 584, 6859}, + /* 7 : VGF2P8AFFINEINVQB ymmreg|mask|z,ymmrm256|b64,imm8 [r+vmi:fv: evex.nds.256.66.0f3a.w1 cf /r ib ] ND,AVX512VL,GFNI,FUTURE */ + /* 240(f3 fd 28) 301 001(cf) 110 022 : EVEX,PROT,AVX512VL,GFNI,FUTURE */ + {I_VGF2P8AFFINEINVQB, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+22193, 584, 6859}, + /* 8 : VGF2P8AFFINEINVQB zmmreg|mask|z,zmmreg*,zmmrm512|b64,imm8 [rvmi:fv: evex.nds.512.66.0f3a.w1 cf /r ib ] AVX512,GFNI,FUTURE */ + /* 241(f3 fd 48) 301 001(cf) 120 023 : EVEX,PROT,AVX512,GFNI,FUTURE */ + {I_VGF2P8AFFINEINVQB, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22203, 585, 6860}, + /* 9 : VGF2P8AFFINEINVQB zmmreg|mask|z,zmmrm512|b64,imm8 [r+vmi:fv: evex.nds.512.66.0f3a.w1 cf /r ib ] ND,AVX512,GFNI,FUTURE */ + /* 240(f3 fd 48) 301 001(cf) 110 022 : EVEX,PROT,AVX512,GFNI,FUTURE */ + {I_VGF2P8AFFINEINVQB, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+22213, 585, 6860}, +}; + +static const struct itemplate instrux_GF2P8AFFINEQB[1] = { + /* 0 : GF2P8AFFINEQB xmmreg,xmmrm128,imm8 [rmi: 66 0f3a ce /r ib ] SSE,GFNI,FUTURE */ + /* 361 357 001(ce) 110 022 : NOAPX,SSE,GFNI,FUTURE */ + {I_GF2P8AFFINEQB, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+65939, 582, 6861}, +}; + +static const struct itemplate instrux_VGF2P8AFFINEQB[10] = { + /* 0 : VGF2P8AFFINEQB xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: vex.nds.128.66.0f3a.w1 ce /r ib ] AVX,GFNI,FUTURE */ + /* 261(003 201) 001(ce) 120 023 : NOAPX,VEX,AVX,GFNI,FUTURE */ + {I_VGF2P8AFFINEQB, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+54811, 583, 6862}, + /* 1 : VGF2P8AFFINEQB xmmreg,xmmrm128,imm8 [r+vmi: vex.nds.128.66.0f3a.w1 ce /r ib ] ND,AVX,GFNI,FUTURE */ + /* 260(003 201) 001(ce) 110 022 : NOAPX,VEX,AVX,GFNI,FUTURE */ + {I_VGF2P8AFFINEQB, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54819, 583, 6862}, + /* 2 : VGF2P8AFFINEQB ymmreg,ymmreg*,ymmrm256,imm8 [rvmi: vex.nds.256.66.0f3a.w1 ce /r ib ] AVX,GFNI,FUTURE */ + /* 261(003 205) 001(ce) 120 023 : NOAPX,VEX,AVX,GFNI,FUTURE */ + {I_VGF2P8AFFINEQB, 4, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+54827, 583, 6863}, + /* 3 : VGF2P8AFFINEQB ymmreg,ymmrm256,imm8 [r+vmi: vex.nds.256.66.0f3a.w1 ce /r ib ] ND,AVX,GFNI,FUTURE */ + /* 260(003 205) 001(ce) 110 022 : NOAPX,VEX,AVX,GFNI,FUTURE */ + {I_VGF2P8AFFINEQB, 3, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54835, 583, 6863}, + /* 4 : VGF2P8AFFINEQB xmmreg|mask|z,xmmreg*,xmmrm128|b64,imm8 [rvmi:fv: evex.nds.128.66.0f3a.w1 ce /r ib ] AVX512VL,GFNI,FUTURE */ + /* 241(f3 fd 08) 301 001(ce) 120 023 : EVEX,PROT,AVX512VL,GFNI,FUTURE */ + {I_VGF2P8AFFINEQB, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22223, 584, 6864}, + /* 5 : VGF2P8AFFINEQB xmmreg|mask|z,xmmrm128|b64,imm8 [r+vmi:fv: evex.nds.128.66.0f3a.w1 ce /r ib ] ND,AVX512VL,GFNI,FUTURE */ + /* 240(f3 fd 08) 301 001(ce) 110 022 : EVEX,PROT,AVX512VL,GFNI,FUTURE */ + {I_VGF2P8AFFINEQB, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+22233, 584, 6864}, + /* 6 : VGF2P8AFFINEQB ymmreg|mask|z,ymmreg*,ymmrm256|b64,imm8 [rvmi:fv: evex.nds.256.66.0f3a.w1 ce /r ib ] AVX512VL,GFNI,FUTURE */ + /* 241(f3 fd 28) 301 001(ce) 120 023 : EVEX,PROT,AVX512VL,GFNI,FUTURE */ + {I_VGF2P8AFFINEQB, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22243, 584, 6865}, + /* 7 : VGF2P8AFFINEQB ymmreg|mask|z,ymmrm256|b64,imm8 [r+vmi:fv: evex.nds.256.66.0f3a.w1 ce /r ib ] ND,AVX512VL,GFNI,FUTURE */ + /* 240(f3 fd 28) 301 001(ce) 110 022 : EVEX,PROT,AVX512VL,GFNI,FUTURE */ + {I_VGF2P8AFFINEQB, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+22253, 584, 6865}, + /* 8 : VGF2P8AFFINEQB zmmreg|mask|z,zmmreg*,zmmrm512|b64,imm8 [rvmi:fv: evex.nds.512.66.0f3a.w1 ce /r ib ] AVX512,GFNI,FUTURE */ + /* 241(f3 fd 48) 301 001(ce) 120 023 : EVEX,PROT,AVX512,GFNI,FUTURE */ + {I_VGF2P8AFFINEQB, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22263, 585, 6866}, + /* 9 : VGF2P8AFFINEQB zmmreg|mask|z,zmmrm512|b64,imm8 [r+vmi:fv: evex.nds.512.66.0f3a.w1 ce /r ib ] ND,AVX512,GFNI,FUTURE */ + /* 240(f3 fd 48) 301 001(ce) 110 022 : EVEX,PROT,AVX512,GFNI,FUTURE */ + {I_VGF2P8AFFINEQB, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+22273, 585, 6866}, +}; + +static const struct itemplate instrux_GF2P8MULB[1] = { + /* 0 : GF2P8MULB xmmreg,xmmrm128 [rm: 66 0f38 cf /r ] SSE,GFNI,FUTURE */ + /* 361 356 001(cf) 110 : NOAPX,SSE,GFNI,FUTURE */ + {I_GF2P8MULB, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+70083, 582, 6867}, +}; + +static const struct itemplate instrux_VGF2P8MULB[10] = { + /* 0 : VGF2P8MULB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38.w0 cf /r ] AVX,GFNI,FUTURE */ + /* 261(002 001) 001(cf) 120 : NOAPX,VEX,AVX,GFNI,FUTURE */ + {I_VGF2P8MULB, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65946, 583, 6868}, + /* 1 : VGF2P8MULB xmmreg,xmmrm128 [r+vm: vex.nds.128.66.0f38.w0 cf /r ] ND,AVX,GFNI,FUTURE */ + /* 260(002 001) 001(cf) 110 : NOAPX,VEX,AVX,GFNI,FUTURE */ + {I_VGF2P8MULB, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65953, 583, 6868}, + /* 2 : VGF2P8MULB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38.w0 cf /r ] AVX,GFNI,FUTURE */ + /* 261(002 005) 001(cf) 120 : NOAPX,VEX,AVX,GFNI,FUTURE */ + {I_VGF2P8MULB, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65960, 583, 6869}, + /* 3 : VGF2P8MULB ymmreg,ymmrm256 [r+vm: vex.nds.256.66.0f38.w0 cf /r ] ND,AVX,GFNI,FUTURE */ + /* 260(002 005) 001(cf) 110 : NOAPX,VEX,AVX,GFNI,FUTURE */ + {I_VGF2P8MULB, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65967, 583, 6869}, + /* 4 : VGF2P8MULB xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f38.w0 cf /r ] AVX512VL,GFNI,FUTURE */ + /* 241(f2 7d 08) 303 001(cf) 120 : EVEX,PROT,AVX512VL,GFNI,FUTURE */ + {I_VGF2P8MULB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+44716, 584, 6870}, + /* 5 : VGF2P8MULB xmmreg|mask|z,xmmrm128 [r+vm:fvm: evex.nds.128.66.0f38.w0 cf /r ] ND,AVX512VL,GFNI,FUTURE */ + /* 240(f2 7d 08) 303 001(cf) 110 : EVEX,PROT,AVX512VL,GFNI,FUTURE */ + {I_VGF2P8MULB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+44725, 584, 6870}, + /* 6 : VGF2P8MULB ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f38.w0 cf /r ] AVX512VL,GFNI,FUTURE */ + /* 241(f2 7d 28) 303 001(cf) 120 : EVEX,PROT,AVX512VL,GFNI,FUTURE */ + {I_VGF2P8MULB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+44734, 584, 6871}, + /* 7 : VGF2P8MULB ymmreg|mask|z,ymmrm256 [r+vm:fvm: evex.nds.256.66.0f38.w0 cf /r ] ND,AVX512VL,GFNI,FUTURE */ + /* 240(f2 7d 28) 303 001(cf) 110 : EVEX,PROT,AVX512VL,GFNI,FUTURE */ + {I_VGF2P8MULB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+44743, 584, 6871}, + /* 8 : VGF2P8MULB zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f38.w0 cf /r ] AVX512,GFNI,FUTURE */ + /* 241(f2 7d 48) 303 001(cf) 120 : EVEX,PROT,AVX512,GFNI,FUTURE */ + {I_VGF2P8MULB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+44752, 585, 6872}, + /* 9 : VGF2P8MULB zmmreg|mask|z,zmmrm512 [r+vm:fvm: evex.nds.512.66.0f38.w0 cf /r ] ND,AVX512,GFNI,FUTURE */ + /* 240(f2 7d 48) 303 001(cf) 110 : EVEX,PROT,AVX512,GFNI,FUTURE */ + {I_VGF2P8MULB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+44761, 585, 6872}, +}; + +static const struct itemplate instrux_VPCOMPRESSB[6] = { + /* 0 : VPCOMPRESSB mem128|mask,xmmreg [mr:t1s8: evex.128.66.0f38.w0 63 /r ] AVX512VL,AVX512VBMI2,FUTURE */ + /* 250(f2 7d 08) 304 001(63) 101 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPCOMPRESSB, 2, {MEMORY|BITS128,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+44770, 586, 6875}, + /* 1 : VPCOMPRESSB mem256|mask,ymmreg [mr:t1s8: evex.256.66.0f38.w0 63 /r ] AVX512VL,AVX512VBMI2,FUTURE */ + /* 250(f2 7d 28) 304 001(63) 101 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPCOMPRESSB, 2, {MEMORY|BITS256,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+44779, 586, 6876}, + /* 2 : VPCOMPRESSB mem512|mask,zmmreg [mr:t1s8: evex.512.66.0f38.w0 63 /r ] AVX512VBMI2,FUTURE */ + /* 250(f2 7d 48) 304 001(63) 101 : EVEX,PROT,AVX512VBMI2,FUTURE */ + {I_VPCOMPRESSB, 2, {MEMORY|BITS512,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+44788, 587, 6877}, + /* 3 : VPCOMPRESSB xmmreg|mask|z,xmmreg [mr: evex.128.66.0f38.w0 63 /r ] AVX512VL,AVX512VBMI2,FUTURE */ + /* 250(f2 7d 08) 300 001(63) 101 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPCOMPRESSB, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+44797, 586, 6878}, + /* 4 : VPCOMPRESSB ymmreg|mask|z,ymmreg [mr: evex.256.66.0f38.w0 63 /r ] AVX512VL,AVX512VBMI2,FUTURE */ + /* 250(f2 7d 28) 300 001(63) 101 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPCOMPRESSB, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+44806, 586, 6879}, + /* 5 : VPCOMPRESSB zmmreg|mask|z,zmmreg [mr: evex.512.66.0f38.w0 63 /r ] AVX512VBMI2,FUTURE */ + /* 250(f2 7d 48) 300 001(63) 101 : EVEX,PROT,AVX512VBMI2,FUTURE */ + {I_VPCOMPRESSB, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+44815, 587, 6880}, +}; + +static const struct itemplate instrux_VPCOMPRESSW[6] = { + /* 0 : VPCOMPRESSW mem128|mask,xmmreg [mr:t1s16: evex.128.66.0f38.w1 63 /r ] AVX512VL,AVX512VBMI2,FUTURE */ + /* 250(f2 fd 08) 305 001(63) 101 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPCOMPRESSW, 2, {MEMORY|BITS128,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+44824, 586, 6881}, + /* 1 : VPCOMPRESSW mem256|mask,ymmreg [mr:t1s16: evex.256.66.0f38.w1 63 /r ] AVX512VL,AVX512VBMI2,FUTURE */ + /* 250(f2 fd 28) 305 001(63) 101 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPCOMPRESSW, 2, {MEMORY|BITS256,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+44833, 586, 6882}, + /* 2 : VPCOMPRESSW mem512|mask,zmmreg [mr:t1s16: evex.512.66.0f38.w1 63 /r ] AVX512VBMI2,FUTURE */ + /* 250(f2 fd 48) 305 001(63) 101 : EVEX,PROT,AVX512VBMI2,FUTURE */ + {I_VPCOMPRESSW, 2, {MEMORY|BITS512,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+44842, 587, 6883}, + /* 3 : VPCOMPRESSW xmmreg|mask|z,xmmreg [mr: evex.128.66.0f38.w1 63 /r ] AVX512VL,AVX512VBMI2,FUTURE */ + /* 250(f2 fd 08) 300 001(63) 101 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPCOMPRESSW, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+44851, 586, 6884}, + /* 4 : VPCOMPRESSW ymmreg|mask|z,ymmreg [mr: evex.256.66.0f38.w1 63 /r ] AVX512VL,AVX512VBMI2,FUTURE */ + /* 250(f2 fd 28) 300 001(63) 101 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPCOMPRESSW, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+44860, 586, 6885}, + /* 5 : VPCOMPRESSW zmmreg|mask|z,zmmreg [mr: evex.512.66.0f38.w1 63 /r ] AVX512VBMI2,FUTURE */ + /* 250(f2 fd 48) 300 001(63) 101 : EVEX,PROT,AVX512VBMI2,FUTURE */ + {I_VPCOMPRESSW, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+44869, 587, 6886}, +}; + +static const struct itemplate instrux_VPEXPANDB[3] = { + /* 0 : VPEXPANDB xmmreg|mask|z,xmmrm128 [rm:t1s8: evex.128.66.0f38.w0 62 /r ] AVX512VL,AVX512VBMI2,FUTURE */ + /* 250(f2 7d 08) 304 001(62) 110 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPEXPANDB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+44878, 586, 6887}, + /* 1 : VPEXPANDB ymmreg|mask|z,ymmrm256 [rm:t1s8: evex.256.66.0f38.w0 62 /r ] AVX512VL,AVX512VBMI2,FUTURE */ + /* 250(f2 7d 28) 304 001(62) 110 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPEXPANDB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+44887, 586, 6888}, + /* 2 : VPEXPANDB zmmreg|mask|z,zmmrm512 [rm:t1s8: evex.512.66.0f38.w0 62 /r ] AVX512VBMI2,FUTURE */ + /* 250(f2 7d 48) 304 001(62) 110 : EVEX,PROT,AVX512VBMI2,FUTURE */ + {I_VPEXPANDB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+44896, 587, 6889}, +}; + +static const struct itemplate instrux_VPEXPANDW[3] = { + /* 0 : VPEXPANDW xmmreg|mask|z,xmmrm128 [rm:t1s16: evex.128.66.0f38.w1 62 /r ] AVX512VL,AVX512VBMI2,FUTURE */ + /* 250(f2 fd 08) 305 001(62) 110 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPEXPANDW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+44905, 586, 6890}, + /* 1 : VPEXPANDW ymmreg|mask|z,ymmrm256 [rm:t1s16: evex.256.66.0f38.w1 62 /r ] AVX512VL,AVX512VBMI2,FUTURE */ + /* 250(f2 fd 28) 305 001(62) 110 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPEXPANDW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+44914, 586, 6891}, + /* 2 : VPEXPANDW zmmreg|mask|z,zmmrm512 [rm:t1s16: evex.512.66.0f38.w1 62 /r ] AVX512VBMI2,FUTURE */ + /* 250(f2 fd 48) 305 001(62) 110 : EVEX,PROT,AVX512VBMI2,FUTURE */ + {I_VPEXPANDW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+44923, 587, 6892}, +}; + +static const struct itemplate instrux_VPSHLDW[6] = { + /* 0 : VPSHLDW xmmreg|mask|z,xmmreg*,xmmrm128,imm8 [rvmi:fvm: evex.nds.128.66.0f3a.w1 70 /r ib ] AVX512VL,AVX512VBMI2,FUTURE */ + /* 241(f3 fd 08) 303 001(70) 120 023 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPSHLDW, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22283, 586, 6893}, + /* 1 : VPSHLDW xmmreg|mask|z,xmmrm128,imm8 [r+vmi:fvm: evex.nds.128.66.0f3a.w1 70 /r ib ] ND,AVX512VL,AVX512VBMI2,FUTURE */ + /* 240(f3 fd 08) 303 001(70) 110 022 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPSHLDW, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22293, 586, 6893}, + /* 2 : VPSHLDW ymmreg|mask|z,ymmreg*,ymmrm256,imm8 [rvmi:fvm: evex.nds.256.66.0f3a.w1 70 /r ib ] AVX512VL,AVX512VBMI2,FUTURE */ + /* 241(f3 fd 28) 303 001(70) 120 023 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPSHLDW, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22303, 586, 6894}, + /* 3 : VPSHLDW ymmreg|mask|z,ymmrm256,imm8 [r+vmi:fvm: evex.nds.256.66.0f3a.w1 70 /r ib ] ND,AVX512VL,AVX512VBMI2,FUTURE */ + /* 240(f3 fd 28) 303 001(70) 110 022 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPSHLDW, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22313, 586, 6894}, + /* 4 : VPSHLDW zmmreg|mask|z,zmmreg*,zmmrm512,imm8 [rvmi:fvm: evex.nds.512.66.0f3a.w1 70 /r ib ] AVX512VBMI2,FUTURE */ + /* 241(f3 fd 48) 303 001(70) 120 023 : EVEX,PROT,AVX512VBMI2,FUTURE */ + {I_VPSHLDW, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22323, 587, 6895}, + /* 5 : VPSHLDW zmmreg|mask|z,zmmrm512,imm8 [r+vmi:fvm: evex.nds.512.66.0f3a.w1 70 /r ib ] ND,AVX512VBMI2,FUTURE */ + /* 240(f3 fd 48) 303 001(70) 110 022 : EVEX,PROT,AVX512VBMI2,FUTURE */ + {I_VPSHLDW, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22333, 587, 6895}, +}; + +static const struct itemplate instrux_VPSHLDD[6] = { + /* 0 : VPSHLDD xmmreg|mask|z,xmmreg*,xmmrm128|b32,imm8 [rvmi:fv: evex.nds.128.66.0f3a.w0 71 /r ib ] AVX512VL,AVX512VBMI2,FUTURE */ + /* 241(f3 7d 08) 301 001(71) 120 023 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPSHLDD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22343, 586, 6896}, + /* 1 : VPSHLDD xmmreg|mask|z,xmmrm128|b32,imm8 [r+vmi:fv: evex.nds.128.66.0f3a.w0 71 /r ib ] ND,AVX512VL,AVX512VBMI2,FUTURE */ + /* 240(f3 7d 08) 301 001(71) 110 022 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPSHLDD, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+22353, 586, 6896}, + /* 2 : VPSHLDD ymmreg|mask|z,ymmreg*,ymmrm256|b32,imm8 [rvmi:fv: evex.nds.256.66.0f3a.w0 71 /r ib ] AVX512VL,AVX512VBMI2,FUTURE */ + /* 241(f3 7d 28) 301 001(71) 120 023 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPSHLDD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22363, 586, 6897}, + /* 3 : VPSHLDD ymmreg|mask|z,ymmrm256|b32,imm8 [r+vmi:fv: evex.nds.256.66.0f3a.w0 71 /r ib ] ND,AVX512VL,AVX512VBMI2,FUTURE */ + /* 240(f3 7d 28) 301 001(71) 110 022 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPSHLDD, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+22373, 586, 6897}, + /* 4 : VPSHLDD zmmreg|mask|z,zmmreg*,zmmrm512|b32,imm8 [rvmi:fv: evex.nds.512.66.0f3a.w0 71 /r ib ] AVX512VBMI2,FUTURE */ + /* 241(f3 7d 48) 301 001(71) 120 023 : EVEX,PROT,AVX512VBMI2,FUTURE */ + {I_VPSHLDD, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22383, 587, 6898}, + /* 5 : VPSHLDD zmmreg|mask|z,zmmrm512|b32,imm8 [r+vmi:fv: evex.nds.512.66.0f3a.w0 71 /r ib ] ND,AVX512VBMI2,FUTURE */ + /* 240(f3 7d 48) 301 001(71) 110 022 : EVEX,PROT,AVX512VBMI2,FUTURE */ + {I_VPSHLDD, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+22393, 587, 6898}, +}; + +static const struct itemplate instrux_VPSHLDQ[6] = { + /* 0 : VPSHLDQ xmmreg|mask|z,xmmreg*,xmmrm128|b64,imm8 [rvmi:fv: evex.nds.128.66.0f3a.w1 71 /r ib ] AVX512VL,AVX512VBMI2,FUTURE */ + /* 241(f3 fd 08) 301 001(71) 120 023 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPSHLDQ, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22403, 586, 6899}, + /* 1 : VPSHLDQ xmmreg|mask|z,xmmrm128|b64,imm8 [r+vmi:fv: evex.nds.128.66.0f3a.w1 71 /r ib ] ND,AVX512VL,AVX512VBMI2,FUTURE */ + /* 240(f3 fd 08) 301 001(71) 110 022 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPSHLDQ, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+22413, 586, 6899}, + /* 2 : VPSHLDQ ymmreg|mask|z,ymmreg*,ymmrm256|b64,imm8 [rvmi:fv: evex.nds.256.66.0f3a.w1 71 /r ib ] AVX512VL,AVX512VBMI2,FUTURE */ + /* 241(f3 fd 28) 301 001(71) 120 023 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPSHLDQ, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22423, 586, 6900}, + /* 3 : VPSHLDQ ymmreg|mask|z,ymmrm256|b64,imm8 [r+vmi:fv: evex.nds.256.66.0f3a.w1 71 /r ib ] ND,AVX512VL,AVX512VBMI2,FUTURE */ + /* 240(f3 fd 28) 301 001(71) 110 022 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPSHLDQ, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+22433, 586, 6900}, + /* 4 : VPSHLDQ zmmreg|mask|z,zmmreg*,zmmrm512|b64,imm8 [rvmi:fv: evex.nds.512.66.0f3a.w1 71 /r ib ] AVX512VBMI2,FUTURE */ + /* 241(f3 fd 48) 301 001(71) 120 023 : EVEX,PROT,AVX512VBMI2,FUTURE */ + {I_VPSHLDQ, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22443, 587, 6901}, + /* 5 : VPSHLDQ zmmreg|mask|z,zmmrm512|b64,imm8 [r+vmi:fv: evex.nds.512.66.0f3a.w1 71 /r ib ] ND,AVX512VBMI2,FUTURE */ + /* 240(f3 fd 48) 301 001(71) 110 022 : EVEX,PROT,AVX512VBMI2,FUTURE */ + {I_VPSHLDQ, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+22453, 587, 6901}, +}; + +static const struct itemplate instrux_VPSHLDVW[6] = { + /* 0 : VPSHLDVW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.dds.128.66.0f38.w1 70 /r ] AVX512VL,AVX512VBMI2,FUTURE */ + /* 241(f2 fd 08) 303 001(70) 120 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPSHLDVW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+44932, 586, 6902}, + /* 1 : VPSHLDVW xmmreg|mask|z,xmmrm128 [r+vm:fvm: evex.dds.128.66.0f38.w1 70 /r ] ND,AVX512VL,AVX512VBMI2,FUTURE */ + /* 240(f2 fd 08) 303 001(70) 110 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPSHLDVW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+44941, 586, 6902}, + /* 2 : VPSHLDVW ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.dds.256.66.0f38.w1 70 /r ] AVX512VL,AVX512VBMI2,FUTURE */ + /* 241(f2 fd 28) 303 001(70) 120 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPSHLDVW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+44950, 586, 6903}, + /* 3 : VPSHLDVW ymmreg|mask|z,ymmrm256 [r+vm:fvm: evex.dds.256.66.0f38.w1 70 /r ] ND,AVX512VL,AVX512VBMI2,FUTURE */ + /* 240(f2 fd 28) 303 001(70) 110 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPSHLDVW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+44959, 586, 6903}, + /* 4 : VPSHLDVW zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.dds.512.66.0f38.w1 70 /r ] AVX512VBMI2,FUTURE */ + /* 241(f2 fd 48) 303 001(70) 120 : EVEX,PROT,AVX512VBMI2,FUTURE */ + {I_VPSHLDVW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+44968, 587, 6904}, + /* 5 : VPSHLDVW zmmreg|mask|z,zmmrm512 [r+vm:fvm: evex.dds.512.66.0f38.w1 70 /r ] ND,AVX512VBMI2,FUTURE */ + /* 240(f2 fd 48) 303 001(70) 110 : EVEX,PROT,AVX512VBMI2,FUTURE */ + {I_VPSHLDVW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+44977, 587, 6904}, +}; + +static const struct itemplate instrux_VPSHLDVD[6] = { + /* 0 : VPSHLDVD xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.dds.128.66.0f38.w0 71 /r ] AVX512VL,AVX512VBMI2,FUTURE */ + /* 241(f2 7d 08) 301 001(71) 120 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPSHLDVD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+44986, 586, 6905}, + /* 1 : VPSHLDVD xmmreg|mask|z,xmmrm128|b32 [r+vm:fv: evex.dds.128.66.0f38.w0 71 /r ] ND,AVX512VL,AVX512VBMI2,FUTURE */ + /* 240(f2 7d 08) 301 001(71) 110 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPSHLDVD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+44995, 586, 6905}, + /* 2 : VPSHLDVD ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.dds.256.66.0f38.w0 71 /r ] AVX512VL,AVX512VBMI2,FUTURE */ + /* 241(f2 7d 28) 301 001(71) 120 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPSHLDVD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+45004, 586, 6906}, + /* 3 : VPSHLDVD ymmreg|mask|z,ymmrm256|b32 [r+vm:fv: evex.dds.256.66.0f38.w0 71 /r ] ND,AVX512VL,AVX512VBMI2,FUTURE */ + /* 240(f2 7d 28) 301 001(71) 110 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPSHLDVD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+45013, 586, 6906}, + /* 4 : VPSHLDVD zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.dds.512.66.0f38.w0 71 /r ] AVX512VBMI2,FUTURE */ + /* 241(f2 7d 48) 301 001(71) 120 : EVEX,PROT,AVX512VBMI2,FUTURE */ + {I_VPSHLDVD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+45022, 587, 6907}, + /* 5 : VPSHLDVD zmmreg|mask|z,zmmrm512|b32 [r+vm:fv: evex.dds.512.66.0f38.w0 71 /r ] ND,AVX512VBMI2,FUTURE */ + /* 240(f2 7d 48) 301 001(71) 110 : EVEX,PROT,AVX512VBMI2,FUTURE */ + {I_VPSHLDVD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+45031, 587, 6907}, +}; + +static const struct itemplate instrux_VPSHLDVQ[6] = { + /* 0 : VPSHLDVQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.dds.128.66.0f38.w1 71 /r ] AVX512VL,AVX512VBMI2,FUTURE */ + /* 241(f2 fd 08) 301 001(71) 120 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPSHLDVQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+45040, 586, 6908}, + /* 1 : VPSHLDVQ xmmreg|mask|z,xmmrm128|b64 [r+vm:fv: evex.dds.128.66.0f38.w1 71 /r ] ND,AVX512VL,AVX512VBMI2,FUTURE */ + /* 240(f2 fd 08) 301 001(71) 110 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPSHLDVQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+45049, 586, 6908}, + /* 2 : VPSHLDVQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.dds.256.66.0f38.w1 71 /r ] AVX512VL,AVX512VBMI2,FUTURE */ + /* 241(f2 fd 28) 301 001(71) 120 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPSHLDVQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+45058, 586, 6909}, + /* 3 : VPSHLDVQ ymmreg|mask|z,ymmrm256|b64 [r+vm:fv: evex.dds.256.66.0f38.w1 71 /r ] ND,AVX512VL,AVX512VBMI2,FUTURE */ + /* 240(f2 fd 28) 301 001(71) 110 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPSHLDVQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+45067, 586, 6909}, + /* 4 : VPSHLDVQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.dds.512.66.0f38.w1 71 /r ] AVX512VBMI2,FUTURE */ + /* 241(f2 fd 48) 301 001(71) 120 : EVEX,PROT,AVX512VBMI2,FUTURE */ + {I_VPSHLDVQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+45076, 587, 6910}, + /* 5 : VPSHLDVQ zmmreg|mask|z,zmmrm512|b64 [r+vm:fv: evex.dds.512.66.0f38.w1 71 /r ] ND,AVX512VBMI2,FUTURE */ + /* 240(f2 fd 48) 301 001(71) 110 : EVEX,PROT,AVX512VBMI2,FUTURE */ + {I_VPSHLDVQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+45085, 587, 6910}, +}; + +static const struct itemplate instrux_VPSHRDW[6] = { + /* 0 : VPSHRDW xmmreg|mask|z,xmmreg*,xmmrm128,imm8 [rvmi:fvm: evex.nds.128.66.0f3a.w1 72 /r ib ] AVX512VL,AVX512VBMI2,FUTURE */ + /* 241(f3 fd 08) 303 001(72) 120 023 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPSHRDW, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22463, 586, 6911}, + /* 1 : VPSHRDW xmmreg|mask|z,xmmrm128,imm8 [r+vmi:fvm: evex.nds.128.66.0f3a.w1 72 /r ib ] ND,AVX512VL,AVX512VBMI2,FUTURE */ + /* 240(f3 fd 08) 303 001(72) 110 022 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPSHRDW, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22473, 586, 6911}, + /* 2 : VPSHRDW ymmreg|mask|z,ymmreg*,ymmrm256,imm8 [rvmi:fvm: evex.nds.256.66.0f3a.w1 72 /r ib ] AVX512VL,AVX512VBMI2,FUTURE */ + /* 241(f3 fd 28) 303 001(72) 120 023 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPSHRDW, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22483, 586, 6912}, + /* 3 : VPSHRDW ymmreg|mask|z,ymmrm256,imm8 [r+vmi:fvm: evex.nds.256.66.0f3a.w1 72 /r ib ] ND,AVX512VL,AVX512VBMI2,FUTURE */ + /* 240(f3 fd 28) 303 001(72) 110 022 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPSHRDW, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22493, 586, 6912}, + /* 4 : VPSHRDW zmmreg|mask|z,zmmreg*,zmmrm512,imm8 [rvmi:fvm: evex.nds.512.66.0f3a.w1 72 /r ib ] AVX512VBMI2,FUTURE */ + /* 241(f3 fd 48) 303 001(72) 120 023 : EVEX,PROT,AVX512VBMI2,FUTURE */ + {I_VPSHRDW, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22503, 587, 6913}, + /* 5 : VPSHRDW zmmreg|mask|z,zmmrm512,imm8 [r+vmi:fvm: evex.nds.512.66.0f3a.w1 72 /r ib ] ND,AVX512VBMI2,FUTURE */ + /* 240(f3 fd 48) 303 001(72) 110 022 : EVEX,PROT,AVX512VBMI2,FUTURE */ + {I_VPSHRDW, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22513, 587, 6913}, +}; + +static const struct itemplate instrux_VPSHRDD[6] = { + /* 0 : VPSHRDD xmmreg|mask|z,xmmreg*,xmmrm128|b32,imm8 [rvmi:fv: evex.nds.128.66.0f3a.w0 73 /r ib ] AVX512VL,AVX512VBMI2,FUTURE */ + /* 241(f3 7d 08) 301 001(73) 120 023 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPSHRDD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22523, 586, 6914}, + /* 1 : VPSHRDD xmmreg|mask|z,xmmrm128|b32,imm8 [r+vmi:fv: evex.nds.128.66.0f3a.w0 73 /r ib ] ND,AVX512VL,AVX512VBMI2,FUTURE */ + /* 240(f3 7d 08) 301 001(73) 110 022 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPSHRDD, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+22533, 586, 6914}, + /* 2 : VPSHRDD ymmreg|mask|z,ymmreg*,ymmrm256|b32,imm8 [rvmi:fv: evex.nds.256.66.0f3a.w0 73 /r ib ] AVX512VL,AVX512VBMI2,FUTURE */ + /* 241(f3 7d 28) 301 001(73) 120 023 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPSHRDD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22543, 586, 6915}, + /* 3 : VPSHRDD ymmreg|mask|z,ymmrm256|b32,imm8 [r+vmi:fv: evex.nds.256.66.0f3a.w0 73 /r ib ] ND,AVX512VL,AVX512VBMI2,FUTURE */ + /* 240(f3 7d 28) 301 001(73) 110 022 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPSHRDD, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+22553, 586, 6915}, + /* 4 : VPSHRDD zmmreg|mask|z,zmmreg*,zmmrm512|b32,imm8 [rvmi:fv: evex.nds.512.66.0f3a.w0 73 /r ib ] AVX512VBMI2,FUTURE */ + /* 241(f3 7d 48) 301 001(73) 120 023 : EVEX,PROT,AVX512VBMI2,FUTURE */ + {I_VPSHRDD, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22563, 587, 6916}, + /* 5 : VPSHRDD zmmreg|mask|z,zmmrm512|b32,imm8 [r+vmi:fv: evex.nds.512.66.0f3a.w0 73 /r ib ] ND,AVX512VBMI2,FUTURE */ + /* 240(f3 7d 48) 301 001(73) 110 022 : EVEX,PROT,AVX512VBMI2,FUTURE */ + {I_VPSHRDD, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+22573, 587, 6916}, +}; + +static const struct itemplate instrux_VPSHRDQ[6] = { + /* 0 : VPSHRDQ xmmreg|mask|z,xmmreg*,xmmrm128|b64,imm8 [rvmi:fv: evex.nds.128.66.0f3a.w1 73 /r ib ] AVX512VL,AVX512VBMI2,FUTURE */ + /* 241(f3 fd 08) 301 001(73) 120 023 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPSHRDQ, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22583, 586, 6917}, + /* 1 : VPSHRDQ xmmreg|mask|z,xmmrm128|b64,imm8 [r+vmi:fv: evex.nds.128.66.0f3a.w1 73 /r ib ] ND,AVX512VL,AVX512VBMI2,FUTURE */ + /* 240(f3 fd 08) 301 001(73) 110 022 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPSHRDQ, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+22593, 586, 6917}, + /* 2 : VPSHRDQ ymmreg|mask|z,ymmreg*,ymmrm256|b64,imm8 [rvmi:fv: evex.nds.256.66.0f3a.w1 73 /r ib ] AVX512VL,AVX512VBMI2,FUTURE */ + /* 241(f3 fd 28) 301 001(73) 120 023 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPSHRDQ, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22603, 586, 6918}, + /* 3 : VPSHRDQ ymmreg|mask|z,ymmrm256|b64,imm8 [r+vmi:fv: evex.nds.256.66.0f3a.w1 73 /r ib ] ND,AVX512VL,AVX512VBMI2,FUTURE */ + /* 240(f3 fd 28) 301 001(73) 110 022 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPSHRDQ, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+22613, 586, 6918}, + /* 4 : VPSHRDQ zmmreg|mask|z,zmmreg*,zmmrm512|b64,imm8 [rvmi:fv: evex.nds.512.66.0f3a.w1 73 /r ib ] AVX512VBMI2,FUTURE */ + /* 241(f3 fd 48) 301 001(73) 120 023 : EVEX,PROT,AVX512VBMI2,FUTURE */ + {I_VPSHRDQ, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22623, 587, 6919}, + /* 5 : VPSHRDQ zmmreg|mask|z,zmmrm512|b64,imm8 [r+vmi:fv: evex.nds.512.66.0f3a.w1 73 /r ib ] ND,AVX512VBMI2,FUTURE */ + /* 240(f3 fd 48) 301 001(73) 110 022 : EVEX,PROT,AVX512VBMI2,FUTURE */ + {I_VPSHRDQ, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+22633, 587, 6919}, +}; + +static const struct itemplate instrux_VPSHRDVW[6] = { + /* 0 : VPSHRDVW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.dds.128.66.0f38.w1 72 /r ] AVX512VL,AVX512VBMI2,FUTURE */ + /* 241(f2 fd 08) 303 001(72) 120 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPSHRDVW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+45094, 586, 6920}, + /* 1 : VPSHRDVW xmmreg|mask|z,xmmrm128 [r+vm:fvm: evex.dds.128.66.0f38.w1 72 /r ] ND,AVX512VL,AVX512VBMI2,FUTURE */ + /* 240(f2 fd 08) 303 001(72) 110 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPSHRDVW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+45103, 586, 6920}, + /* 2 : VPSHRDVW ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.dds.256.66.0f38.w1 72 /r ] AVX512VL,AVX512VBMI2,FUTURE */ + /* 241(f2 fd 28) 303 001(72) 120 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPSHRDVW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+45112, 586, 6921}, + /* 3 : VPSHRDVW ymmreg|mask|z,ymmrm256 [r+vm:fvm: evex.dds.256.66.0f38.w1 72 /r ] ND,AVX512VL,AVX512VBMI2,FUTURE */ + /* 240(f2 fd 28) 303 001(72) 110 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPSHRDVW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+45121, 586, 6921}, + /* 4 : VPSHRDVW zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.dds.512.66.0f38.w1 72 /r ] AVX512VBMI2,FUTURE */ + /* 241(f2 fd 48) 303 001(72) 120 : EVEX,PROT,AVX512VBMI2,FUTURE */ + {I_VPSHRDVW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+45130, 587, 6922}, + /* 5 : VPSHRDVW zmmreg|mask|z,zmmrm512 [r+vm:fvm: evex.dds.512.66.0f38.w1 72 /r ] ND,AVX512VBMI2,FUTURE */ + /* 240(f2 fd 48) 303 001(72) 110 : EVEX,PROT,AVX512VBMI2,FUTURE */ + {I_VPSHRDVW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+45139, 587, 6922}, +}; + +static const struct itemplate instrux_VPSHRDVD[6] = { + /* 0 : VPSHRDVD xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.dds.128.66.0f38.w0 73 /r ] AVX512VL,AVX512VBMI2,FUTURE */ + /* 241(f2 7d 08) 301 001(73) 120 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPSHRDVD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+45148, 586, 6923}, + /* 1 : VPSHRDVD xmmreg|mask|z,xmmrm128|b32 [r+vm:fv: evex.dds.128.66.0f38.w0 73 /r ] ND,AVX512VL,AVX512VBMI2,FUTURE */ + /* 240(f2 7d 08) 301 001(73) 110 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPSHRDVD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+45157, 586, 6923}, + /* 2 : VPSHRDVD ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.dds.256.66.0f38.w0 73 /r ] AVX512VL,AVX512VBMI2,FUTURE */ + /* 241(f2 7d 28) 301 001(73) 120 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPSHRDVD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+45166, 586, 6924}, + /* 3 : VPSHRDVD ymmreg|mask|z,ymmrm256|b32 [r+vm:fv: evex.dds.256.66.0f38.w0 73 /r ] ND,AVX512VL,AVX512VBMI2,FUTURE */ + /* 240(f2 7d 28) 301 001(73) 110 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPSHRDVD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+45175, 586, 6924}, + /* 4 : VPSHRDVD zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.dds.512.66.0f38.w0 73 /r ] AVX512VBMI2,FUTURE */ + /* 241(f2 7d 48) 301 001(73) 120 : EVEX,PROT,AVX512VBMI2,FUTURE */ + {I_VPSHRDVD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+45184, 587, 6925}, + /* 5 : VPSHRDVD zmmreg|mask|z,zmmrm512|b32 [r+vm:fv: evex.dds.512.66.0f38.w0 73 /r ] ND,AVX512VBMI2,FUTURE */ + /* 240(f2 7d 48) 301 001(73) 110 : EVEX,PROT,AVX512VBMI2,FUTURE */ + {I_VPSHRDVD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+45193, 587, 6925}, +}; + +static const struct itemplate instrux_VPSHRDVQ[6] = { + /* 0 : VPSHRDVQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.dds.128.66.0f38.w1 73 /r ] AVX512VL,AVX512VBMI2,FUTURE */ + /* 241(f2 fd 08) 301 001(73) 120 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPSHRDVQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+45202, 586, 6926}, + /* 1 : VPSHRDVQ xmmreg|mask|z,xmmrm128|b64 [r+vm:fv: evex.dds.128.66.0f38.w1 73 /r ] ND,AVX512VL,AVX512VBMI2,FUTURE */ + /* 240(f2 fd 08) 301 001(73) 110 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPSHRDVQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+45211, 586, 6926}, + /* 2 : VPSHRDVQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.dds.256.66.0f38.w1 73 /r ] AVX512VL,AVX512VBMI2,FUTURE */ + /* 241(f2 fd 28) 301 001(73) 120 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPSHRDVQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+45220, 586, 6927}, + /* 3 : VPSHRDVQ ymmreg|mask|z,ymmrm256|b64 [r+vm:fv: evex.dds.256.66.0f38.w1 73 /r ] ND,AVX512VL,AVX512VBMI2,FUTURE */ + /* 240(f2 fd 28) 301 001(73) 110 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPSHRDVQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+45229, 586, 6927}, + /* 4 : VPSHRDVQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.dds.512.66.0f38.w1 73 /r ] AVX512VBMI2,FUTURE */ + /* 241(f2 fd 48) 301 001(73) 120 : EVEX,PROT,AVX512VBMI2,FUTURE */ + {I_VPSHRDVQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+45238, 587, 6928}, + /* 5 : VPSHRDVQ zmmreg|mask|z,zmmrm512|b64 [r+vm:fv: evex.dds.512.66.0f38.w1 73 /r ] ND,AVX512VBMI2,FUTURE */ + /* 240(f2 fd 48) 301 001(73) 110 : EVEX,PROT,AVX512VBMI2,FUTURE */ + {I_VPSHRDVQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+45247, 587, 6928}, +}; + +static const struct itemplate instrux_VPOPCNTB[3] = { + /* 0 : VPOPCNTB xmmreg|mask|z,xmmrm128 [rm:fvm: evex.128.66.0f38.w0 54 /r ] AVX512VL,AVX512BITALG,FUTURE */ + /* 250(f2 7d 08) 303 001(54) 110 : EVEX,PROT,AVX512VL,AVX512BITALG,FUTURE */ + {I_VPOPCNTB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+45472, 590, 6945}, + /* 1 : VPOPCNTB ymmreg|mask|z,ymmrm256 [rm:fvm: evex.256.66.0f38.w0 54 /r ] AVX512VL,AVX512BITALG,FUTURE */ + /* 250(f2 7d 28) 303 001(54) 110 : EVEX,PROT,AVX512VL,AVX512BITALG,FUTURE */ + {I_VPOPCNTB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+45481, 590, 6946}, + /* 2 : VPOPCNTB zmmreg|mask|z,zmmrm512 [rm:fvm: evex.512.66.0f38.w0 54 /r ] AVX512BITALG,FUTURE */ + /* 250(f2 7d 48) 303 001(54) 110 : EVEX,PROT,AVX512BITALG,FUTURE */ + {I_VPOPCNTB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+45490, 591, 6947}, +}; + +static const struct itemplate instrux_VPOPCNTW[3] = { + /* 0 : VPOPCNTW xmmreg|mask|z,xmmrm128 [rm:fvm: evex.128.66.0f38.w1 54 /r ] AVX512VL,AVX512BITALG,FUTURE */ + /* 250(f2 fd 08) 303 001(54) 110 : EVEX,PROT,AVX512VL,AVX512BITALG,FUTURE */ + {I_VPOPCNTW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+45499, 590, 6948}, + /* 1 : VPOPCNTW ymmreg|mask|z,ymmrm256 [rm:fvm: evex.256.66.0f38.w1 54 /r ] AVX512VL,AVX512BITALG,FUTURE */ + /* 250(f2 fd 28) 303 001(54) 110 : EVEX,PROT,AVX512VL,AVX512BITALG,FUTURE */ + {I_VPOPCNTW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+45508, 590, 6949}, + /* 2 : VPOPCNTW zmmreg|mask|z,zmmrm512 [rm:fvm: evex.512.66.0f38.w1 54 /r ] AVX512BITALG,FUTURE */ + /* 250(f2 fd 48) 303 001(54) 110 : EVEX,PROT,AVX512BITALG,FUTURE */ + {I_VPOPCNTW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+45517, 591, 6950}, +}; + +static const struct itemplate instrux_VPOPCNTD[3] = { + /* 0 : VPOPCNTD xmmreg|mask|z,xmmrm128 [rm:fv: evex.128.66.0f38.w0 55 /r ] AVX512VL,AVX512VPOPCNTDQ,FUTURE */ + /* 250(f2 7d 08) 301 001(55) 110 : EVEX,PROT,AVX512VL,AVX512VPOPCNTDQ,FUTURE */ + {I_VPOPCNTD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+45526, 592, 6951}, + /* 1 : VPOPCNTD ymmreg|mask|z,ymmrm256 [rm:fv: evex.256.66.0f38.w0 55 /r ] AVX512VL,AVX512VPOPCNTDQ,FUTURE */ + /* 250(f2 7d 28) 301 001(55) 110 : EVEX,PROT,AVX512VL,AVX512VPOPCNTDQ,FUTURE */ + {I_VPOPCNTD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+45535, 592, 6952}, + /* 2 : VPOPCNTD zmmreg|mask|z,zmmrm512 [rm:fv: evex.512.66.0f38.w0 55 /r ] AVX512VPOPCNTDQ,FUTURE */ + /* 250(f2 7d 48) 301 001(55) 110 : EVEX,PROT,AVX512VPOPCNTDQ,FUTURE */ + {I_VPOPCNTD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+45544, 593, 6953}, +}; + +static const struct itemplate instrux_VPOPCNTQ[3] = { + /* 0 : VPOPCNTQ xmmreg|mask|z,xmmrm128 [rm:fv: evex.128.66.0f38.w1 55 /r ] AVX512VL,AVX512VPOPCNTDQ,FUTURE */ + /* 250(f2 fd 08) 301 001(55) 110 : EVEX,PROT,AVX512VL,AVX512VPOPCNTDQ,FUTURE */ + {I_VPOPCNTQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+45553, 592, 6954}, + /* 1 : VPOPCNTQ ymmreg|mask|z,ymmrm256 [rm:fv: evex.256.66.0f38.w1 55 /r ] AVX512VL,AVX512VPOPCNTDQ,FUTURE */ + /* 250(f2 fd 28) 301 001(55) 110 : EVEX,PROT,AVX512VL,AVX512VPOPCNTDQ,FUTURE */ + {I_VPOPCNTQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+45562, 592, 6955}, + /* 2 : VPOPCNTQ zmmreg|mask|z,zmmrm512 [rm:fv: evex.512.66.0f38.w1 55 /r ] AVX512VPOPCNTDQ,FUTURE */ + /* 250(f2 fd 48) 301 001(55) 110 : EVEX,PROT,AVX512VPOPCNTDQ,FUTURE */ + {I_VPOPCNTQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+45571, 593, 6956}, +}; + +static const struct itemplate instrux_VPSHUFBITQMB[3] = { + /* 0 : VPSHUFBITQMB kreg|mask,xmmreg,xmmrm128 [rvm:fvm: evex.nds.128.66.0f38.w0 8f /r ] AVX512VL,AVX512BITALG,FUTURE */ + /* 241(f2 7d 08) 303 001(8f) 120 : EVEX,PROT,AVX512VL,AVX512BITALG,FUTURE */ + {I_VPSHUFBITQMB, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+45580, 590, 6957}, + /* 1 : VPSHUFBITQMB kreg|mask,ymmreg,ymmrm256 [rvm:fvm: evex.nds.256.66.0f38.w0 8f /r ] AVX512VL,AVX512BITALG,FUTURE */ + /* 241(f2 7d 28) 303 001(8f) 120 : EVEX,PROT,AVX512VL,AVX512BITALG,FUTURE */ + {I_VPSHUFBITQMB, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+45589, 590, 6958}, + /* 2 : VPSHUFBITQMB kreg|mask,zmmreg,zmmrm512 [rvm:fvm: evex.nds.512.66.0f38.w0 8f /r ] AVX512BITALG,FUTURE */ + /* 241(f2 7d 48) 303 001(8f) 120 : EVEX,PROT,AVX512BITALG,FUTURE */ + {I_VPSHUFBITQMB, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+45598, 591, 6959}, +}; + +static const struct itemplate instrux_V4FMADDPS[1] = { + /* 0 : V4FMADDPS zmmreg|mask|z,zmmreg|rs4,mem [rvm:m128: evex.dds.512.f2.0f38.w0 9a /r ] AR0-2,SO,AVX5124FMAPS,FUTURE */ + /* 241(f2 7f 48) 317 001(9a) 120 : AR0,AR1,AR2,SO,EVEX,PROT,AVX5124FMAPS,FUTURE */ + {I_V4FMADDPS, 3, {ZMMREG,ZMMREG|RS4,MEMORY,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+45607, 594, 6962}, +}; + +static const struct itemplate instrux_V4FNMADDPS[1] = { + /* 0 : V4FNMADDPS zmmreg|mask|z,zmmreg|rs4,mem [rvm:m128: evex.dds.512.f2.0f38.w0 aa /r ] AR0-2,SO,AVX5124FMAPS,FUTURE */ + /* 241(f2 7f 48) 317 001(aa) 120 : AR0,AR1,AR2,SO,EVEX,PROT,AVX5124FMAPS,FUTURE */ + {I_V4FNMADDPS, 3, {ZMMREG,ZMMREG|RS4,MEMORY,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+45616, 594, 6963}, +}; + +static const struct itemplate instrux_V4FMADDSS[1] = { + /* 0 : V4FMADDSS xmmreg|mask|z,xmmreg|rs4,mem [rvm:m128: evex.dds.lig.f2.0f38.w0 9b /r ] AR0-2,SO,AVX5124FMAPS,FUTURE */ + /* 241(f2 7f 08) 317 001(9b) 120 : AR0,AR1,AR2,SO,LIG,EVEX,PROT,AVX5124FMAPS,FUTURE */ + {I_V4FMADDSS, 3, {XMMREG,XMMREG|RS4,MEMORY,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+45625, 595, 6964}, +}; + +static const struct itemplate instrux_V4FNMADDSS[1] = { + /* 0 : V4FNMADDSS xmmreg|mask|z,xmmreg|rs4,mem [rvm:m128: evex.dds.lig.f2.0f38.w0 ab /r ] AR0-2,SO,AVX5124FMAPS,FUTURE */ + /* 241(f2 7f 08) 317 001(ab) 120 : AR0,AR1,AR2,SO,LIG,EVEX,PROT,AVX5124FMAPS,FUTURE */ + {I_V4FNMADDSS, 3, {XMMREG,XMMREG|RS4,MEMORY,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+45634, 595, 6965}, +}; + +static const struct itemplate instrux_VP4DPWSSDS[1] = { + /* 0 : VP4DPWSSDS zmmreg|mask|z,zmmreg|rs4,mem [rvm:m128: evex.dds.512.f2.0f38.w0 53 /r ] AR0-2,SO,AVX5124VNNIW,FUTURE */ + /* 241(f2 7f 48) 317 001(53) 120 : AR0,AR1,AR2,SO,EVEX,PROT,AVX5124VNNIW,FUTURE */ + {I_VP4DPWSSDS, 3, {ZMMREG,ZMMREG|RS4,MEMORY,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+45643, 596, 6968}, +}; + +static const struct itemplate instrux_VP4DPWSSD[1] = { + /* 0 : VP4DPWSSD zmmreg|mask|z,zmmreg|rs4,mem [rvm:m128: evex.dds.512.f2.0f38.w0 52 /r ] AR0-2,SO,AVX5124VNNIW,FUTURE */ + /* 241(f2 7f 48) 317 001(52) 120 : AR0,AR1,AR2,SO,EVEX,PROT,AVX5124VNNIW,FUTURE */ + {I_VP4DPWSSD, 3, {ZMMREG,ZMMREG|RS4,MEMORY,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+45652, 596, 6969}, +}; + +static const struct itemplate instrux_ENCLS[1] = { + /* 0 : ENCLS void [ np 0f 01 cf ] SGX,FUTURE */ + /* 360 355 002(01 cf) : SGX,FUTURE */ + {I_ENCLS, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70089, 597, 6972}, +}; + +static const struct itemplate instrux_ENCLU[1] = { + /* 0 : ENCLU void [ np 0f 01 d7 ] SGX,FUTURE */ + /* 360 355 002(01 d7) : SGX,FUTURE */ + {I_ENCLU, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70095, 597, 6973}, +}; + +static const struct itemplate instrux_ENCLV[1] = { + /* 0 : ENCLV void [ np 0f 01 c0 ] SGX,FUTURE */ + /* 360 355 002(01 c0) : SGX,FUTURE */ + {I_ENCLV, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70101, 597, 6974}, +}; + +static const struct itemplate instrux_CLRSSBSY[1] = { + /* 0 : CLRSSBSY mem64 [m: f3 0f ae /6 ] FL,CET,FUTURE */ + /* 333 355 001(ae) 206 : FL,CET,FUTURE */ + {I_CLRSSBSY, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57106, 598, 6977}, +}; + +static const struct itemplate instrux_ENDBR32[1] = { + /* 0 : ENDBR32 void [ f3 0f 1e fb ] CET,FUTURE */ + /* 333 355 002(1e fb) : CET,FUTURE */ + {I_ENDBR32, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70107, 599, 6978}, +}; + +static const struct itemplate instrux_ENDBR64[1] = { + /* 0 : ENDBR64 void [ f3 0f 1e fa ] CET,FUTURE */ + /* 333 355 002(1e fa) : CET,FUTURE */ + {I_ENDBR64, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70113, 599, 6979}, +}; + +static const struct itemplate instrux_INCSSPD[1] = { + /* 0 : INCSSPD reg32 [m: o32 f3 0f ae /5 ] CET,FUTURE */ + /* 321 333 355 001(ae) 205 : CET,FUTURE */ + {I_INCSSPD, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+65974, 599, 6980}, +}; + +static const struct itemplate instrux_INCSSPQ[1] = { + /* 0 : INCSSPQ reg64 [m: o64 f3 0f ae /5 ] LONG,PROT,CET,X86_64 */ + /* 324 333 355 001(ae) 205 : LONG,PROT,CET,X86_64 */ + {I_INCSSPQ, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+65981, 600, 6981}, +}; + +static const struct itemplate instrux_RDSSPD[1] = { + /* 0 : RDSSPD reg32 [m: o32 f3 0f 1e /1 ] CET,FUTURE */ + /* 321 333 355 001(1e) 201 : CET,FUTURE */ + {I_RDSSPD, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+65988, 599, 6982}, +}; + +static const struct itemplate instrux_RDSSPQ[1] = { + /* 0 : RDSSPQ reg64 [m: o64 f3 0f 1e /1 ] LONG,PROT,CET,X86_64 */ + /* 324 333 355 001(1e) 201 : LONG,PROT,CET,X86_64 */ + {I_RDSSPQ, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+65995, 600, 6983}, +}; + +static const struct itemplate instrux_RSTORSSP[1] = { + /* 0 : RSTORSSP mem64 [m: f3 0f 01 /5 ] CET,FUTURE */ + /* 333 355 001(01) 205 : CET,FUTURE */ + {I_RSTORSSP, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70119, 599, 6984}, +}; + +static const struct itemplate instrux_SAVEPREVSSP[1] = { + /* 0 : SAVEPREVSSP void [ f3 0f 01 ea ] CET,FUTURE */ + /* 333 355 002(01 ea) : CET,FUTURE */ + {I_SAVEPREVSSP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70125, 599, 6985}, +}; + +static const struct itemplate instrux_SETSSBSY[1] = { + /* 0 : SETSSBSY void [ f3 0f 01 e8 ] CET,FUTURE */ + /* 333 355 002(01 e8) : CET,FUTURE */ + {I_SETSSBSY, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70131, 599, 6986}, +}; + +static const struct itemplate instrux_WRUSSD[2] = { + /* 0 : WRUSSD mem32,reg32 [mr: o32 66 0f38 f5 /r ] CET,FUTURE */ + /* 321 361 356 001(f5) 101 : NOAPX,CET,FUTURE */ + {I_WRUSSD, 2, {MEMORY|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66002, 601, 6987}, + /* 1 : WRUSSD mem32,reg32 [mr: evex.nf0.nd0.l0.66.m4.w0 65 /r ] LONG,PROT,CET,APX,X86_64 */ + /* 250(f4 7d 08) 300 001(65) 101 : LONG,EVEX,PROT,CET,APX,X86_64 */ + {I_WRUSSD, 2, {MEMORY|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+45661, 602, 6988}, +}; + +static const struct itemplate instrux_WRUSSQ[2] = { + /* 0 : WRUSSQ mem64,reg64 [mr: o64 66 0f38 f5 /r ] LONG,PROT,CET,X86_64 */ + /* 324 361 356 001(f5) 101 : NOAPX,LONG,PROT,CET,X86_64 */ + {I_WRUSSQ, 2, {MEMORY|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66009, 603, 6989}, + /* 1 : WRUSSQ mem64,reg64 [mr: evex.nf0.nd0.l0.66.m4.w1 65 /r ] LONG,PROT,CET,APX,X86_64 */ + /* 250(f4 fd 08) 300 001(65) 101 : LONG,EVEX,PROT,CET,APX,X86_64 */ + {I_WRUSSQ, 2, {MEMORY|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+45670, 602, 6990}, +}; + +static const struct itemplate instrux_WRSSD[2] = { + /* 0 : WRSSD mem32,reg32 [mr: o32 0f38 f6 /r ] CET,FUTURE */ + /* 321 356 001(f6) 101 : NOAPX,CET,FUTURE */ + {I_WRSSD, 2, {MEMORY|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+70137, 601, 6991}, + /* 1 : WRSSD mem32,reg32 [mr: evex.nf0.nd0.l0.m4.w0 66 /r ] LONG,PROT,CET,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(66) 101 : LONG,EVEX,PROT,CET,APX,X86_64 */ + {I_WRSSD, 2, {MEMORY|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+45679, 602, 6992}, +}; + +static const struct itemplate instrux_WRSSQ[2] = { + /* 0 : WRSSQ mem64,reg64 [mr: o64 0f38 f6 /r ] LONG,PROT,CET,X86_64 */ + /* 324 356 001(f6) 101 : NOAPX,LONG,PROT,CET,X86_64 */ + {I_WRSSQ, 2, {MEMORY|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+70143, 603, 6993}, + /* 1 : WRSSQ mem64,reg64 [mr: evex.nf0.nd0.l0.m4.w1 66 /r ] LONG,PROT,CET,APX,X86_64 */ + /* 250(f4 fc 08) 300 001(66) 101 : LONG,EVEX,PROT,CET,APX,X86_64 */ + {I_WRSSQ, 2, {MEMORY|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+45688, 602, 6994}, +}; + +static const struct itemplate instrux_ENQCMD[5] = { + /* 0 : ENQCMD reg16,mem512 [rm: a16 f2 0f38 f8 /r ] AR0-1,SZ,NOREX,NOAPX,NOLONG,FL,ENQCMD,FUTURE */ + /* 310 332 356 001(f8) 110 : AR0,AR1,SZ,NOREX,NOAPX,NOLONG,FL,ENQCMD,FUTURE */ + {I_ENQCMD, 2, {REG_GPR|BITS16|RN_L16,MEMORY|BITS512|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66016, 604, 6997}, + /* 1 : ENQCMD reg32,mem512 [rm: a16 f2 0f38 f8 /r ] ND,AR0-1,SZ,NOREX,NOAPX,NOLONG,FL,ENQCMD,FUTURE */ + /* 310 332 356 001(f8) 110 : AR0,AR1,SZ,NOREX,NOAPX,NOLONG,FL,ENQCMD,FUTURE */ + {I_ENQCMD, 2, {REG_GPR|BITS32|RN_L16,MEMORY|BITS512|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66016, 604, 6998}, + /* 2 : ENQCMD reg32,mem512 [rm: a32 f2 0f38 f8 /r ] AR0-1,SZ,FL,ENQCMD,FUTURE */ + /* 311 332 356 001(f8) 110 : AR0,AR1,SZ,NOAPX,FL,ENQCMD,FUTURE */ + {I_ENQCMD, 2, {REG_GPR|BITS32|RN_L16,MEMORY|BITS512|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66023, 605, 6999}, + /* 3 : ENQCMD reg64,mem512 [rm: a64 f2 0f38 f8 /r ] AR0-1,SZ,LONG,FL,PROT,ENQCMD,X86_64 */ + /* 313 332 356 001(f8) 110 : AR0,AR1,SZ,NOAPX,LONG,FL,PROT,ENQCMD,X86_64 */ + {I_ENQCMD, 2, {REG_GPR|BITS64|RN_L16,MEMORY|BITS512|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66030, 606, 7000}, + /* 4 : ENQCMD reg64,mem512 [rm: evex.nf0.nd0.l0.f2.m4.w1 f8 /r ] AR0-1,SZ,LONG,FL,PRIV,PROT,ENQCMD,APX,X86_64 */ + /* 250(f4 ff 08) 300 001(f8) 110 : AR0,AR1,SZ,LONG,FL,EVEX,PRIV,PROT,ENQCMD,APX,X86_64 */ + {I_ENQCMD, 2, {REG_GPR|BITS64,MEMORY|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+45697, 607, 7001}, +}; + +static const struct itemplate instrux_ENQCMDS[5] = { + /* 0 : ENQCMDS reg16,mem512 [rm: a16 f3 0f38 f8 /r ] AR0-1,SZ,NOREX,NOAPX,NOLONG,FL,PRIV,ENQCMD,FUTURE */ + /* 310 333 356 001(f8) 110 : AR0,AR1,SZ,NOREX,NOAPX,NOLONG,FL,PRIV,ENQCMD,FUTURE */ + {I_ENQCMDS, 2, {REG_GPR|BITS16|RN_L16,MEMORY|BITS512|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66037, 608, 7002}, + /* 1 : ENQCMDS reg32,mem512 [rm: a16 f3 0f38 f8 /r ] ND,AR0-1,SZ,NOREX,NOAPX,NOLONG,FL,PRIV,ENQCMD,FUTURE */ + /* 310 333 356 001(f8) 110 : AR0,AR1,SZ,NOREX,NOAPX,NOLONG,FL,PRIV,ENQCMD,FUTURE */ + {I_ENQCMDS, 2, {REG_GPR|BITS32|RN_L16,MEMORY|BITS512|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66037, 608, 7003}, + /* 2 : ENQCMDS reg32,mem512 [rm: a32 f3 0f38 f8 /r ] AR0-1,SZ,FL,PRIV,ENQCMD,FUTURE */ + /* 311 333 356 001(f8) 110 : AR0,AR1,SZ,NOAPX,FL,PRIV,ENQCMD,FUTURE */ + {I_ENQCMDS, 2, {REG_GPR|BITS32|RN_L16,MEMORY|BITS512|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66044, 609, 7004}, + /* 3 : ENQCMDS reg64,mem512 [rm: a64 f3 0f38 f8 /r ] AR0-1,SZ,LONG,FL,PRIV,PROT,ENQCMD,X86_64 */ + /* 313 333 356 001(f8) 110 : AR0,AR1,SZ,NOAPX,LONG,FL,PRIV,PROT,ENQCMD,X86_64 */ + {I_ENQCMDS, 2, {REG_GPR|BITS64|RN_L16,MEMORY|BITS512|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66051, 610, 7005}, + /* 4 : ENQCMDS reg64,mem512 [rm: evex.nf0.nd0.l0.f3.m4.w1 f8 /r ] AR0-1,SZ,LONG,FL,PRIV,PROT,ENQCMD,APX,X86_64 */ + /* 250(f4 fe 08) 300 001(f8) 110 : AR0,AR1,SZ,LONG,FL,EVEX,PRIV,PROT,ENQCMD,APX,X86_64 */ + {I_ENQCMDS, 2, {REG_GPR|BITS64,MEMORY|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+45706, 607, 7006}, +}; + +static const struct itemplate instrux_XRESLDTRK[1] = { + /* 0 : XRESLDTRK void [ f2 0f 01 e9 ] TSXLDTRK,FUTURE */ + /* 332 355 002(01 e9) : TSXLDTRK,FUTURE */ + {I_XRESLDTRK, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70149, 612, 7008}, +}; + +static const struct itemplate instrux_XSUSLDTRK[1] = { + /* 0 : XSUSLDTRK void [ f2 0f 01 e8 ] TSXLDTRK,FUTURE */ + /* 332 355 002(01 e8) : TSXLDTRK,FUTURE */ + {I_XSUSLDTRK, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70155, 612, 7009}, +}; + +static const struct itemplate instrux_VCVTNE2PS2BF16[6] = { + /* 0 : VCVTNE2PS2BF16 xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.128.f2.0f38.w0 72 /r ] AVX512VL,AVX512BF16,FUTURE */ + /* 241(f2 7f 08) 301 001(72) 120 : EVEX,PROT,AVX512VL,AVX512BF16,FUTURE */ + {I_VCVTNE2PS2BF16, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+45715, 613, 7012}, + /* 1 : VCVTNE2PS2BF16 xmmreg|mask|z,xmmrm128|b32 [r+vm:fv: evex.128.f2.0f38.w0 72 /r ] ND,AVX512VL,AVX512BF16,FUTURE */ + /* 240(f2 7f 08) 301 001(72) 110 : EVEX,PROT,AVX512VL,AVX512BF16,FUTURE */ + {I_VCVTNE2PS2BF16, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+45724, 613, 7012}, + /* 2 : VCVTNE2PS2BF16 ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.256.f2.0f38.w0 72 /r ] AVX512VL,AVX512BF16,FUTURE */ + /* 241(f2 7f 28) 301 001(72) 120 : EVEX,PROT,AVX512VL,AVX512BF16,FUTURE */ + {I_VCVTNE2PS2BF16, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+45733, 613, 7013}, + /* 3 : VCVTNE2PS2BF16 ymmreg|mask|z,ymmrm256|b32 [r+vm:fv: evex.256.f2.0f38.w0 72 /r ] ND,AVX512VL,AVX512BF16,FUTURE */ + /* 240(f2 7f 28) 301 001(72) 110 : EVEX,PROT,AVX512VL,AVX512BF16,FUTURE */ + {I_VCVTNE2PS2BF16, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+45742, 613, 7013}, + /* 4 : VCVTNE2PS2BF16 zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.512.f2.0f38.w0 72 /r ] AVX512BF16,FUTURE */ + /* 241(f2 7f 48) 301 001(72) 120 : EVEX,PROT,AVX512BF16,FUTURE */ + {I_VCVTNE2PS2BF16, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+45751, 614, 7014}, + /* 5 : VCVTNE2PS2BF16 zmmreg|mask|z,zmmrm512|b32 [r+vm:fv: evex.512.f2.0f38.w0 72 /r ] ND,AVX512BF16,FUTURE */ + /* 240(f2 7f 48) 301 001(72) 110 : EVEX,PROT,AVX512BF16,FUTURE */ + {I_VCVTNE2PS2BF16, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+45760, 614, 7014}, +}; + +static const struct itemplate instrux_VDPBF16PS[6] = { + /* 0 : VDPBF16PS xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.128.f3.0f38.w0 52 /r ] AVX512VL,AVX512BF16,FUTURE */ + /* 241(f2 7e 08) 301 001(52) 120 : EVEX,PROT,AVX512VL,AVX512BF16,FUTURE */ + {I_VDPBF16PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+45796, 613, 7018}, + /* 1 : VDPBF16PS xmmreg|mask|z,xmmrm128|b32 [r+vm:fv: evex.128.f3.0f38.w0 52 /r ] ND,AVX512VL,AVX512BF16,FUTURE */ + /* 240(f2 7e 08) 301 001(52) 110 : EVEX,PROT,AVX512VL,AVX512BF16,FUTURE */ + {I_VDPBF16PS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+45805, 613, 7018}, + /* 2 : VDPBF16PS ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.256.f3.0f38.w0 52 /r ] AVX512VL,AVX512BF16,FUTURE */ + /* 241(f2 7e 28) 301 001(52) 120 : EVEX,PROT,AVX512VL,AVX512BF16,FUTURE */ + {I_VDPBF16PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+45814, 613, 7019}, + /* 3 : VDPBF16PS ymmreg|mask|z,ymmrm256|b32 [r+vm:fv: evex.256.f3.0f38.w0 52 /r ] ND,AVX512VL,AVX512BF16,FUTURE */ + /* 240(f2 7e 28) 301 001(52) 110 : EVEX,PROT,AVX512VL,AVX512BF16,FUTURE */ + {I_VDPBF16PS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+45823, 613, 7019}, + /* 4 : VDPBF16PS zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.512.f3.0f38.w0 52 /r ] AVX512BF16,FUTURE */ + /* 241(f2 7e 48) 301 001(52) 120 : EVEX,PROT,AVX512BF16,FUTURE */ + {I_VDPBF16PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+45832, 614, 7020}, + /* 5 : VDPBF16PS zmmreg|mask|z,zmmrm512|b32 [r+vm:fv: evex.512.f3.0f38.w0 52 /r ] ND,AVX512BF16,FUTURE */ + /* 240(f2 7e 48) 301 001(52) 110 : EVEX,PROT,AVX512BF16,FUTURE */ + {I_VDPBF16PS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+45841, 614, 7020}, +}; + +static const struct itemplate instrux_VP2INTERSECTD[3] = { + /* 0 : VP2INTERSECTD kreg|rs2,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.f2.0f38.w0 68 /r ] AVX512VL,AVX512VP2INTERSECT,FUTURE */ + /* 241(f2 7f 08) 301 001(68) 120 : EVEX,PROT,AVX512VL,AVX512VP2INTERSECT,FUTURE */ + {I_VP2INTERSECTD, 3, {OPMASKREG|RS2,XMMREG,RM_XMM|BITS128,0,0}, {0,0,B32,0,0}, nasm_bytecodes+45850, 615, 7023}, + /* 1 : VP2INTERSECTD kreg|rs2,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.f2.0f38.w0 68 /r ] AVX512VL,AVX512VP2INTERSECT,FUTURE */ + /* 241(f2 7f 28) 301 001(68) 120 : EVEX,PROT,AVX512VL,AVX512VP2INTERSECT,FUTURE */ + {I_VP2INTERSECTD, 3, {OPMASKREG|RS2,YMMREG,RM_YMM|BITS256,0,0}, {0,0,B32,0,0}, nasm_bytecodes+45859, 615, 7024}, + /* 2 : VP2INTERSECTD kreg|rs2,zmmreg,zmmrm512|b32 [rvm:fv: evex.nds.512.f2.0f38.w0 68 /r ] AVX512F,AVX512VP2INTERSECT,FUTURE */ + /* 241(f2 7f 48) 301 001(68) 120 : EVEX,PROT,AVX512F,AVX512VP2INTERSECT,FUTURE */ + {I_VP2INTERSECTD, 3, {OPMASKREG|RS2,ZMMREG,RM_ZMM|BITS512,0,0}, {0,0,B32,0,0}, nasm_bytecodes+45868, 616, 7025}, +}; + +static const struct itemplate instrux_VP2INTERSECTQ[3] = { + /* 0 : VP2INTERSECTQ kreg|rs2,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.f2.0f38.w1 68 /r ] AVX512VL,AVX512VP2INTERSECT,FUTURE */ + /* 241(f2 ff 08) 301 001(68) 120 : EVEX,PROT,AVX512VL,AVX512VP2INTERSECT,FUTURE */ + {I_VP2INTERSECTQ, 3, {OPMASKREG|RS2,XMMREG,RM_XMM|BITS128,0,0}, {0,0,B64,0,0}, nasm_bytecodes+45877, 615, 7026}, + /* 1 : VP2INTERSECTQ kreg|rs2,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.f2.0f38.w1 68 /r ] AVX512VL,AVX512VP2INTERSECT,FUTURE */ + /* 241(f2 ff 28) 301 001(68) 120 : EVEX,PROT,AVX512VL,AVX512VP2INTERSECT,FUTURE */ + {I_VP2INTERSECTQ, 3, {OPMASKREG|RS2,YMMREG,RM_YMM|BITS256,0,0}, {0,0,B64,0,0}, nasm_bytecodes+45886, 615, 7027}, + /* 2 : VP2INTERSECTQ kreg|rs2,zmmreg,zmmrm512|b64 [rvm:fv: evex.nds.512.f2.0f38.w1 68 /r ] AVX512F,AVX512VP2INTERSECT,FUTURE */ + /* 241(f2 ff 48) 301 001(68) 120 : EVEX,PROT,AVX512F,AVX512VP2INTERSECT,FUTURE */ + {I_VP2INTERSECTQ, 3, {OPMASKREG|RS2,ZMMREG,RM_ZMM|BITS512,0,0}, {0,0,B64,0,0}, nasm_bytecodes+45895, 616, 7028}, +}; + +static const struct itemplate instrux_LDTILECFG[2] = { + /* 0 : LDTILECFG mem512 [m: vex.128.np.0f38.w0 49 /0 ] AR0,SZ,LONG,PROT,AMXTILE,X86_64 */ + /* 270(002 000) 001(49) 200 : AR0,SZ,NOAPX,LONG,VEX,PROT,AMXTILE,X86_64 */ + {I_LDTILECFG, 1, {MEMORY|BITS512|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+66058, 617, 7032}, + /* 1 : LDTILECFG mem512 [m: evex.128.np.0f38.w0 49 /0 ] AR0,SZ,LONG,PROT,AMXTILE,X86_64,APX */ + /* 250(f2 7c 08) 300 001(49) 200 : AR0,SZ,LONG,EVEX,PROT,AMXTILE,APX,X86_64 */ + {I_LDTILECFG, 1, {MEMORY|BITS512,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45904, 618, 7032}, +}; + +static const struct itemplate instrux_STTILECFG[2] = { + /* 0 : STTILECFG mem512 [m: vex.128.66.0f38.w0 49 /0 ] AR0,SZ,LONG,PROT,AMXTILE,X86_64 */ + /* 270(002 001) 001(49) 200 : AR0,SZ,NOAPX,LONG,VEX,PROT,AMXTILE,X86_64 */ + {I_STTILECFG, 1, {MEMORY|BITS512|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+66065, 617, 7033}, + /* 1 : STTILECFG mem512 [m: evex.128.66.0f38.w0 49 /0 ] AR0,SZ,LONG,PROT,AMXTILE,X86_64,APX */ + /* 250(f2 7d 08) 300 001(49) 200 : AR0,SZ,LONG,EVEX,PROT,AMXTILE,APX,X86_64 */ + {I_STTILECFG, 1, {MEMORY|BITS512,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45913, 618, 7033}, +}; + +static const struct itemplate instrux_TDPBF16PS[1] = { + /* 0 : TDPBF16PS tmmreg,tmmreg,tmmreg [rmv: vex.128.f3.0f38.w0 5c /r ] LONG,PROT,AMXBF16,X86_64 */ + /* 262(002 002) 001(5c) 110 : NOAPX,LONG,VEX,PROT,AMXBF16,X86_64 */ + {I_TDPBF16PS, 3, {TMMREG|RN_L16,TMMREG|RN_L16,TMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+66072, 619, 7034}, +}; + +static const struct itemplate instrux_TDPFP16PS[1] = { + /* 0 : TDPFP16PS tmmreg,tmmreg,tmmreg [rmv: vex.128.f2.0f38.w0 5c /r ] LONG,PROT,AMXFP16,X86_64 */ + /* 262(002 003) 001(5c) 110 : NOAPX,LONG,VEX,PROT,AMXFP16,X86_64 */ + {I_TDPFP16PS, 3, {TMMREG|RN_L16,TMMREG|RN_L16,TMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+66079, 620, 7035}, +}; + +static const struct itemplate instrux_TCMMIMFP16PS[1] = { + /* 0 : TCMMIMFP16PS tmmreg,tmmreg,tmmreg [rmv: vex.128.66.0f38.w0 6c /r ] LONG,PROT,AMXCOMPLEX,X86_64 */ + /* 262(002 001) 001(6c) 110 : NOAPX,LONG,VEX,PROT,AMXCOMPLEX,X86_64 */ + {I_TCMMIMFP16PS, 3, {TMMREG|RN_L16,TMMREG|RN_L16,TMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+66086, 621, 7036}, +}; + +static const struct itemplate instrux_TCMMRLFP16PS[1] = { + /* 0 : TCMMRLFP16PS tmmreg,tmmreg,tmmreg [rmv: vex.128.np.0f38.w0 6c /r ] LONG,PROT,AMXCOMPLEX,X86_64 */ + /* 262(002 000) 001(6c) 110 : NOAPX,LONG,VEX,PROT,AMXCOMPLEX,X86_64 */ + {I_TCMMRLFP16PS, 3, {TMMREG|RN_L16,TMMREG|RN_L16,TMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+66093, 621, 7037}, +}; + +static const struct itemplate instrux_TDPBSSD[1] = { + /* 0 : TDPBSSD tmmreg,tmmreg,tmmreg [rmv: vex.128.f2.0f38.w0 5e /r ] LONG,PROT,AMXINT8,X86_64 */ + /* 262(002 003) 001(5e) 110 : NOAPX,LONG,VEX,PROT,AMXINT8,X86_64 */ + {I_TDPBSSD, 3, {TMMREG|RN_L16,TMMREG|RN_L16,TMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+66100, 622, 7038}, +}; + +static const struct itemplate instrux_TDPBSUD[1] = { + /* 0 : TDPBSUD tmmreg,tmmreg,tmmreg [rmv: vex.128.f3.0f38.w0 5e /r ] LONG,PROT,AMXINT8,X86_64 */ + /* 262(002 002) 001(5e) 110 : NOAPX,LONG,VEX,PROT,AMXINT8,X86_64 */ + {I_TDPBSUD, 3, {TMMREG|RN_L16,TMMREG|RN_L16,TMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+66107, 622, 7039}, +}; + +static const struct itemplate instrux_TDPBUSD[1] = { + /* 0 : TDPBUSD tmmreg,tmmreg,tmmreg [rmv: vex.128.66.0f38.w0 5e /r ] LONG,PROT,AMXINT8,X86_64 */ + /* 262(002 001) 001(5e) 110 : NOAPX,LONG,VEX,PROT,AMXINT8,X86_64 */ + {I_TDPBUSD, 3, {TMMREG|RN_L16,TMMREG|RN_L16,TMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+66114, 622, 7040}, +}; + +static const struct itemplate instrux_TDPBUUD[1] = { + /* 0 : TDPBUUD tmmreg,tmmreg,tmmreg [rmv: vex.128.np.0f38.w0 5e /r ] LONG,PROT,AMXINT8,X86_64 */ + /* 262(002 000) 001(5e) 110 : NOAPX,LONG,VEX,PROT,AMXINT8,X86_64 */ + {I_TDPBUUD, 3, {TMMREG|RN_L16,TMMREG|RN_L16,TMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+66121, 622, 7041}, +}; + +static const struct itemplate instrux_TILELOADD[2] = { + /* 0 : TILELOADD tmmreg,mem [rm: vex.128.f2.0f38.w0 4b /r ] AR1,ANYSIZE,SIB,LONG,MIB,PROT,AMXTILE,APX,X86_64 */ + /* 270(002 003) 001(4b) 110 : AR1,ANYSIZE,NOAPX,SIB,LONG,MIB,VEX,PROT,AMXTILE,APX,X86_64 */ + {I_TILELOADD, 2, {TMMREG|RN_L16,MEMORY|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66128, 623, 7042}, + /* 1 : TILELOADD tmmreg,mem [rm: evex.128.f2.0f38.w0 4b /r ] AR1,ANYSIZE,SIB,LONG,MIB,PROT,AMXTILE,APX,X86_64,APX */ + /* 250(f2 7f 08) 300 001(4b) 110 : AR1,ANYSIZE,SIB,LONG,MIB,EVEX,PROT,AMXTILE,APX,X86_64 */ + {I_TILELOADD, 2, {TMMREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+45922, 624, 7042}, +}; + +static const struct itemplate instrux_TILELOADDT1[2] = { + /* 0 : TILELOADDT1 tmmreg,mem [rm: vex.128.66.0f38.w0 4b /r ] AR1,ANYSIZE,SIB,LONG,MIB,PROT,AMXTILE,APX,X86_64 */ + /* 270(002 001) 001(4b) 110 : AR1,ANYSIZE,NOAPX,SIB,LONG,MIB,VEX,PROT,AMXTILE,APX,X86_64 */ + {I_TILELOADDT1, 2, {TMMREG|RN_L16,MEMORY|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66135, 623, 7043}, + /* 1 : TILELOADDT1 tmmreg,mem [rm: evex.128.66.0f38.w0 4b /r ] AR1,ANYSIZE,SIB,LONG,MIB,PROT,AMXTILE,APX,X86_64,APX */ + /* 250(f2 7d 08) 300 001(4b) 110 : AR1,ANYSIZE,SIB,LONG,MIB,EVEX,PROT,AMXTILE,APX,X86_64 */ + {I_TILELOADDT1, 2, {TMMREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+45931, 624, 7043}, +}; + +static const struct itemplate instrux_TILERELEASE[1] = { + /* 0 : TILERELEASE void [ vex.128.np.0f38.w0 49 c0 ] LONG,PROT,AMXTILE,X86_64 */ + /* 270(002 000) 002(49 c0) : NOAPX,LONG,VEX,PROT,AMXTILE,X86_64 */ + {I_TILERELEASE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+66142, 625, 7044}, +}; + +static const struct itemplate instrux_TILESTORED[2] = { + /* 0 : TILESTORED mem,tmmreg [mr: vex.128.f3.0f38.w0 4b /r ] AR0,ANYSIZE,SIB,LONG,MIB,PROT,AMXTILE,APX,X86_64 */ + /* 270(002 002) 001(4b) 101 : AR0,ANYSIZE,NOAPX,SIB,LONG,MIB,VEX,PROT,AMXTILE,APX,X86_64 */ + {I_TILESTORED, 2, {MEMORY|RN_L16,TMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66149, 626, 7045}, + /* 1 : TILESTORED mem,tmmreg [mr: evex.128.f3.0f38.w0 4b /r ] AR0,ANYSIZE,SIB,LONG,MIB,PROT,AMXTILE,APX,X86_64,APX */ + /* 250(f2 7e 08) 300 001(4b) 101 : AR0,ANYSIZE,SIB,LONG,MIB,EVEX,PROT,AMXTILE,APX,X86_64 */ + {I_TILESTORED, 2, {MEMORY,TMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+45940, 627, 7045}, +}; + +static const struct itemplate instrux_TILEZERO[1] = { + /* 0 : TILEZERO tmmreg [r: vex.128.f2.0f38.w0 49 /3r0 ] LONG,PROT,AMXTILE,X86_64 */ + /* 270(002 003) 001(49) 171(300) : NOAPX,LONG,VEX,PROT,AMXTILE,X86_64 */ + {I_TILEZERO, 1, {TMMREG|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+54843, 625, 7046}, +}; + +static const struct itemplate instrux_TILELOADDRS[2] = { + /* 0 : TILELOADDRS tmmreg,mem [rm: vex.128.f2.0f38.w0 4a /r ] AR1,ANYSIZE,SIB,LONG,MIB,PROT,AMXTILE,AMXMOVRS,APX,X86_64,FUTURE */ + /* 270(002 003) 001(4a) 110 : AR1,ANYSIZE,NOAPX,SIB,LONG,MIB,VEX,PROT,AMXTILE,AMXMOVRS,APX,FUTURE */ + {I_TILELOADDRS, 2, {TMMREG|RN_L16,MEMORY|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66156, 628, 7048}, + /* 1 : TILELOADDRS tmmreg,mem [rm: evex.128.f2.0f38.w0 4a /r ] AR1,ANYSIZE,SIB,LONG,MIB,PROT,AMXTILE,AMXMOVRS,APX,X86_64,FUTURE,APX */ + /* 250(f2 7f 08) 300 001(4a) 110 : AR1,ANYSIZE,SIB,LONG,MIB,EVEX,PROT,AMXTILE,AMXMOVRS,APX,FUTURE */ + {I_TILELOADDRS, 2, {TMMREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+45949, 629, 7048}, +}; + +static const struct itemplate instrux_TILELOADDRST1[2] = { + /* 0 : TILELOADDRST1 tmmreg,mem [rm: vex.128.66.0f38.w0 4a /r ] AR1,ANYSIZE,SIB,LONG,MIB,PROT,AMXTILE,AMXMOVRS,APX,X86_64,FUTURE */ + /* 270(002 001) 001(4a) 110 : AR1,ANYSIZE,NOAPX,SIB,LONG,MIB,VEX,PROT,AMXTILE,AMXMOVRS,APX,FUTURE */ + {I_TILELOADDRST1, 2, {TMMREG|RN_L16,MEMORY|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66163, 628, 7049}, + /* 1 : TILELOADDRST1 tmmreg,mem [rm: evex.128.66.0f38.w0 4a /r ] AR1,ANYSIZE,SIB,LONG,MIB,PROT,AMXTILE,AMXMOVRS,APX,X86_64,FUTURE,APX */ + /* 250(f2 7d 08) 300 001(4a) 110 : AR1,ANYSIZE,SIB,LONG,MIB,EVEX,PROT,AMXTILE,AMXMOVRS,APX,FUTURE */ + {I_TILELOADDRST1, 2, {TMMREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+45958, 629, 7049}, +}; + +static const struct itemplate instrux_T2RPNTLVWZ0[1] = { + /* 0 : T2RPNTLVWZ0 tmmreg,mem [rm: vex.128.np.0f38.w0 6e /r ] SIB,AMXTRANSPOSE,OBSOLETE,NEVER,FUTURE */ + /* 270(002 000) 001(6e) 110 : NOAPX,SIB,VEX,AMXTRANSPOSE,OBSOLETE,NEVER,FUTURE */ + {I_T2RPNTLVWZ0, 2, {TMMREG|RN_L16,MEMORY|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66170, 630, 7051}, +}; + +static const struct itemplate instrux_T2RPNTLVWZ0T1[1] = { + /* 0 : T2RPNTLVWZ0T1 tmmreg,mem [rm: vex.128.np.0f38.w0 6f /r ] SIB,AMXTRANSPOSE,OBSOLETE,NEVER,FUTURE */ + /* 270(002 000) 001(6f) 110 : NOAPX,SIB,VEX,AMXTRANSPOSE,OBSOLETE,NEVER,FUTURE */ + {I_T2RPNTLVWZ0T1, 2, {TMMREG|RN_L16,MEMORY|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66177, 630, 7052}, +}; + +static const struct itemplate instrux_T2RPNTLVWZ1[1] = { + /* 0 : T2RPNTLVWZ1 tmmreg,mem [rm: vex.128.66.0f38.w0 6e /r ] SIB,AMXTRANSPOSE,OBSOLETE,NEVER,FUTURE */ + /* 270(002 001) 001(6e) 110 : NOAPX,SIB,VEX,AMXTRANSPOSE,OBSOLETE,NEVER,FUTURE */ + {I_T2RPNTLVWZ1, 2, {TMMREG|RN_L16,MEMORY|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66184, 630, 7053}, +}; + +static const struct itemplate instrux_T2RPNTLVWZ1T1[1] = { + /* 0 : T2RPNTLVWZ1T1 tmmreg,mem [rm: vex.128.66.0f38.w0 6f /r ] SIB,AMXTRANSPOSE,OBSOLETE,NEVER,FUTURE */ + /* 270(002 001) 001(6f) 110 : NOAPX,SIB,VEX,AMXTRANSPOSE,OBSOLETE,NEVER,FUTURE */ + {I_T2RPNTLVWZ1T1, 2, {TMMREG|RN_L16,MEMORY|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66191, 630, 7054}, +}; + +static const struct itemplate instrux_T2RPNTLVWZ0RS[1] = { + /* 0 : T2RPNTLVWZ0RS tmmreg,mem [rm: vex.128.np.map5.w0 f8 /r ] SIB,AMXTRANSPOSE,OBSOLETE,NEVER,FUTURE */ + /* 270(005 000) 001(f8) 110 : NOAPX,SIB,VEX,AMXTRANSPOSE,OBSOLETE,NEVER,FUTURE */ + {I_T2RPNTLVWZ0RS, 2, {TMMREG|RN_L16,MEMORY|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66198, 630, 7055}, +}; + +static const struct itemplate instrux_T2RPNTLVWZ0RST1[1] = { + /* 0 : T2RPNTLVWZ0RST1 tmmreg,mem [rm: vex.128.np.map5.w0 f9 /r ] SIB,AMXTRANSPOSE,OBSOLETE,NEVER,FUTURE */ + /* 270(005 000) 001(f9) 110 : NOAPX,SIB,VEX,AMXTRANSPOSE,OBSOLETE,NEVER,FUTURE */ + {I_T2RPNTLVWZ0RST1, 2, {TMMREG|RN_L16,MEMORY|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66205, 630, 7056}, +}; + +static const struct itemplate instrux_T2RPNTLVWZ1RS[1] = { + /* 0 : T2RPNTLVWZ1RS tmmreg,mem [rm: vex.128.66.map5.w0 f8 /r ] SIB,AMXTRANSPOSE,OBSOLETE,NEVER,FUTURE */ + /* 270(005 001) 001(f8) 110 : NOAPX,SIB,VEX,AMXTRANSPOSE,OBSOLETE,NEVER,FUTURE */ + {I_T2RPNTLVWZ1RS, 2, {TMMREG|RN_L16,MEMORY|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66212, 630, 7057}, +}; + +static const struct itemplate instrux_T2RPNTLVWZ1RST1[1] = { + /* 0 : T2RPNTLVWZ1RST1 tmmreg,mem [rm: vex.128.66.map5.w0 f9 /r ] SIB,AMXTRANSPOSE,OBSOLETE,NEVER,FUTURE */ + /* 270(005 001) 001(f9) 110 : NOAPX,SIB,VEX,AMXTRANSPOSE,OBSOLETE,NEVER,FUTURE */ + {I_T2RPNTLVWZ1RST1, 2, {TMMREG|RN_L16,MEMORY|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66219, 630, 7058}, +}; + +static const struct itemplate instrux_TCONJTCMMIMFP16PS[1] = { + /* 0 : TCONJTCMMIMFP16PS tmmreg,tmmreg,tmmreg [rmv: vex.128.np.0f38.w0 6b /r ] AMXTRANSPOSE,OBSOLETE,NEVER,FUTURE */ + /* 262(002 000) 001(6b) 110 : NOAPX,VEX,AMXTRANSPOSE,OBSOLETE,NEVER,FUTURE */ + {I_TCONJTCMMIMFP16PS, 3, {TMMREG|RN_L16,TMMREG|RN_L16,TMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+66226, 631, 7059}, +}; + +static const struct itemplate instrux_TCONJTFP16[1] = { + /* 0 : TCONJTFP16 tmmreg,tmmreg [rm: vex.128.66.0f38.w0 6b /r ] AMXTRANSPOSE,OBSOLETE,NEVER,FUTURE */ + /* 270(002 001) 001(6b) 110 : NOAPX,VEX,AMXTRANSPOSE,OBSOLETE,NEVER,FUTURE */ + {I_TCONJTFP16, 2, {TMMREG|RN_L16,TMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66233, 631, 7060}, +}; + +static const struct itemplate instrux_TCVTROWD2PS[2] = { + /* 0 : TCVTROWD2PS zmmreg,tmmreg,reg32 [rmv: evex.512.f3.0f38.w0 4a /r ] AMXAVX512,FUTURE */ + /* 242(f2 7e 48) 300 001(4a) 110 : EVEX,PROT,AMXAVX512,FUTURE */ + {I_TCVTROWD2PS, 3, {ZMMREG,TMMREG,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+45967, 632, 7061}, + /* 1 : TCVTROWD2PS zmmreg,tmmreg,imm8 [rmi: evex.512.f3.0f3a.w0 07 /r ib ] AMXAVX512,FUTURE */ + /* 250(f3 7e 48) 300 001(07) 110 022 : EVEX,PROT,AMXAVX512,FUTURE */ + {I_TCVTROWD2PS, 3, {ZMMREG,TMMREG,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+22643, 632, 7062}, +}; + +static const struct itemplate instrux_TCVTROWPS2BF16H[2] = { + /* 0 : TCVTROWPS2BF16H zmmreg,tmmreg,reg32 [rmv: evex.512.f2.0f38.w0 6d /r ] AMXAVX512,FUTURE */ + /* 242(f2 7f 48) 300 001(6d) 110 : EVEX,PROT,AMXAVX512,FUTURE */ + {I_TCVTROWPS2BF16H, 3, {ZMMREG,TMMREG,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+45976, 632, 7063}, + /* 1 : TCVTROWPS2BF16H zmmreg,tmmreg,imm8 [rmi: evex.512.f2.0f3a.w0 07 /r ib ] AMXAVX512,FUTURE */ + /* 250(f3 7f 48) 300 001(07) 110 022 : EVEX,PROT,AMXAVX512,FUTURE */ + {I_TCVTROWPS2BF16H, 3, {ZMMREG,TMMREG,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+22653, 632, 7064}, +}; + +static const struct itemplate instrux_TCVTROWPS2BF16L[2] = { + /* 0 : TCVTROWPS2BF16L zmmreg,tmmreg,reg32 [rmv: evex.512.f3.0f38.w0 6d /r ] AMXAVX512,FUTURE */ + /* 242(f2 7e 48) 300 001(6d) 110 : EVEX,PROT,AMXAVX512,FUTURE */ + {I_TCVTROWPS2BF16L, 3, {ZMMREG,TMMREG,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+45985, 632, 7065}, + /* 1 : TCVTROWPS2BF16L zmmreg,tmmreg,imm8 [rmi: evex.512.f3.0f3a.w0 77 /r ib ] AMXAVX512,FUTURE */ + /* 250(f3 7e 48) 300 001(77) 110 022 : EVEX,PROT,AMXAVX512,FUTURE */ + {I_TCVTROWPS2BF16L, 3, {ZMMREG,TMMREG,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+22663, 632, 7066}, +}; + +static const struct itemplate instrux_TCVTROWPS2PHH[2] = { + /* 0 : TCVTROWPS2PHH zmmreg,tmmreg,reg32 [rmv: evex.512.np.0f38.w0 6d /r ] AMXAVX512,FUTURE */ + /* 242(f2 7c 48) 300 001(6d) 110 : EVEX,PROT,AMXAVX512,FUTURE */ + {I_TCVTROWPS2PHH, 3, {ZMMREG,TMMREG,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+45994, 632, 7067}, + /* 1 : TCVTROWPS2PHH zmmreg,tmmreg,imm8 [rmi: evex.512.np.0f3a.w0 07 /r ib ] AMXAVX512,FUTURE */ + /* 250(f3 7c 48) 300 001(07) 110 022 : EVEX,PROT,AMXAVX512,FUTURE */ + {I_TCVTROWPS2PHH, 3, {ZMMREG,TMMREG,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+22673, 632, 7068}, +}; + +static const struct itemplate instrux_TCVTROWPS2PHL[2] = { + /* 0 : TCVTROWPS2PHL zmmreg,tmmreg,reg32 [rmv: evex.512.66.0f38.w0 6d /r ] AMXAVX512,FUTURE */ + /* 242(f2 7d 48) 300 001(6d) 110 : EVEX,PROT,AMXAVX512,FUTURE */ + {I_TCVTROWPS2PHL, 3, {ZMMREG,TMMREG,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+46003, 632, 7069}, + /* 1 : TCVTROWPS2PHL zmmreg,tmmreg,imm8 [rmi: evex.512.f2.0f3a.w0 77 /r ib ] AMXAVX512,FUTURE */ + /* 250(f3 7f 48) 300 001(77) 110 022 : EVEX,PROT,AMXAVX512,FUTURE */ + {I_TCVTROWPS2PHL, 3, {ZMMREG,TMMREG,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+22683, 632, 7070}, +}; + +static const struct itemplate instrux_TDPBF8PS[1] = { + /* 0 : TDPBF8PS tmmreg,tmmreg,tmmreg [rmv: vex.128.np.map5.w0 fd /r ] AMXFP8,FUTURE */ + /* 262(005 000) 001(fd) 110 : NOAPX,VEX,AMXFP8,FUTURE */ + {I_TDPBF8PS, 3, {TMMREG|RN_L16,TMMREG|RN_L16,TMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+66240, 633, 7071}, +}; + +static const struct itemplate instrux_TDPBHF8PS[1] = { + /* 0 : TDPBHF8PS tmmreg,tmmreg,tmmreg [rmv: vex.128.f2.map5.w0 fd /r ] AMXFP8,FUTURE */ + /* 262(005 003) 001(fd) 110 : NOAPX,VEX,AMXFP8,FUTURE */ + {I_TDPBHF8PS, 3, {TMMREG|RN_L16,TMMREG|RN_L16,TMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+66247, 633, 7072}, +}; + +static const struct itemplate instrux_TDPHBF8PS[1] = { + /* 0 : TDPHBF8PS tmmreg,tmmreg,tmmreg [rmv: vex.128.f3.map5.w0 fd /r ] AMXFP8,FUTURE */ + /* 262(005 002) 001(fd) 110 : NOAPX,VEX,AMXFP8,FUTURE */ + {I_TDPHBF8PS, 3, {TMMREG|RN_L16,TMMREG|RN_L16,TMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+66254, 633, 7073}, +}; + +static const struct itemplate instrux_TDPHF8PS[1] = { + /* 0 : TDPHF8PS tmmreg,tmmreg,tmmreg [rmv: vex.128.66.map5.w0 fd /r ] AMXFP8,FUTURE */ + /* 262(005 001) 001(fd) 110 : NOAPX,VEX,AMXFP8,FUTURE */ + {I_TDPHF8PS, 3, {TMMREG|RN_L16,TMMREG|RN_L16,TMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+66261, 633, 7074}, +}; + +static const struct itemplate instrux_TILEMOVROW[2] = { + /* 0 : TILEMOVROW zmmreg,tmmreg,imm8 [rmi: evex.512.66.0f3a.w0 07 /r ib ] AMXAVX512,FUTURE */ + /* 250(f3 7d 48) 300 001(07) 110 022 : EVEX,PROT,AMXAVX512,FUTURE */ + {I_TILEMOVROW, 3, {ZMMREG,TMMREG,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+22693, 632, 7075}, + /* 1 : TILEMOVROW zmmreg,tmmreg,reg32 [rmv: evex.512.66.0f38.w0 4a /r ] AMXAVX512,FUTURE */ + /* 242(f2 7d 48) 300 001(4a) 110 : EVEX,PROT,AMXAVX512,FUTURE */ + {I_TILEMOVROW, 3, {ZMMREG,TMMREG,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+46012, 632, 7076}, +}; + +static const struct itemplate instrux_TMMULTF32PS[1] = { + /* 0 : TMMULTF32PS tmmreg,tmmreg,tmmreg [rmv: vex.128.66.0f38.w0 48 /r ] AMXTF32,OBSOLETE,NEVER,FUTURE */ + /* 262(002 001) 001(48) 110 : NOAPX,VEX,AMXTF32,OBSOLETE,NEVER,FUTURE */ + {I_TMMULTF32PS, 3, {TMMREG|RN_L16,TMMREG|RN_L16,TMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+66268, 634, 7077}, +}; + +static const struct itemplate instrux_TTCMMIMFP16PS[1] = { + /* 0 : TTCMMIMFP16PS tmmreg,tmmreg,tmmreg [rmv: vex.128.f2.0f38.w0 6b /r ] AMXTRANSPOSE,OBSOLETE,NEVER,FUTURE */ + /* 262(002 003) 001(6b) 110 : NOAPX,VEX,AMXTRANSPOSE,OBSOLETE,NEVER,FUTURE */ + {I_TTCMMIMFP16PS, 3, {TMMREG|RN_L16,TMMREG|RN_L16,TMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+66275, 631, 7078}, +}; + +static const struct itemplate instrux_TTCMMRLFP16PS[1] = { + /* 0 : TTCMMRLFP16PS tmmreg,tmmreg,tmmreg [rmv: vex.128.f3.0f38.w0 6b /r ] AMXTRANSPOSE,OBSOLETE,NEVER,FUTURE */ + /* 262(002 002) 001(6b) 110 : NOAPX,VEX,AMXTRANSPOSE,OBSOLETE,NEVER,FUTURE */ + {I_TTCMMRLFP16PS, 3, {TMMREG|RN_L16,TMMREG|RN_L16,TMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+66282, 631, 7079}, +}; + +static const struct itemplate instrux_TTDPBF16PS[1] = { + /* 0 : TTDPBF16PS tmmreg,tmmreg,tmmreg [rmv: vex.128.f3.0f38.w0 6c /r ] AMXTRANSPOSE,OBSOLETE,NEVER,FUTURE */ + /* 262(002 002) 001(6c) 110 : NOAPX,VEX,AMXTRANSPOSE,OBSOLETE,NEVER,FUTURE */ + {I_TTDPBF16PS, 3, {TMMREG|RN_L16,TMMREG|RN_L16,TMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+66289, 631, 7080}, +}; + +static const struct itemplate instrux_TTDPFP16PS[1] = { + /* 0 : TTDPFP16PS tmmreg,tmmreg,tmmreg [rmv: vex.128.f2.0f38.w0 6c /r ] AMXTRANSPOSE,OBSOLETE,NEVER,FUTURE */ + /* 262(002 003) 001(6c) 110 : NOAPX,VEX,AMXTRANSPOSE,OBSOLETE,NEVER,FUTURE */ + {I_TTDPFP16PS, 3, {TMMREG|RN_L16,TMMREG|RN_L16,TMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+66296, 631, 7081}, +}; + +static const struct itemplate instrux_TTMMULTF32PS[1] = { + /* 0 : TTMMULTF32PS tmmreg,tmmreg,tmmreg [rmv: vex.128.np.0f38.w0 48 /r ] AMXTRANSPOSE,OBSOLETE,NEVER,FUTURE */ + /* 262(002 000) 001(48) 110 : NOAPX,VEX,AMXTRANSPOSE,OBSOLETE,NEVER,FUTURE */ + {I_TTMMULTF32PS, 3, {TMMREG|RN_L16,TMMREG|RN_L16,TMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+66303, 631, 7082}, +}; + +static const struct itemplate instrux_TTRANSPOSED[1] = { + /* 0 : TTRANSPOSED tmmreg,tmmreg [rm: vex.128.f3.0f38.w0 5f /r ] AMXTRANSPOSE,OBSOLETE,NEVER,FUTURE */ + /* 270(002 002) 001(5f) 110 : NOAPX,VEX,AMXTRANSPOSE,OBSOLETE,NEVER,FUTURE */ + {I_TTRANSPOSED, 2, {TMMREG|RN_L16,TMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66310, 631, 7083}, +}; + +static const struct itemplate instrux_VADDPH[6] = { + /* 0 : VADDPH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.nds.128.np.map5.w0 58 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f5 7c 08) 301 001(58) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VADDPH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+46021, 565, 7086}, + /* 1 : VADDPH xmmreg|mask|z,xmmrm128|b16 [r+vm:fv: evex.nds.128.np.map5.w0 58 /r ] ND,AVX512VL,AVX512FP16,FUTURE */ + /* 240(f5 7c 08) 301 001(58) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VADDPH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+46030, 565, 7086}, + /* 2 : VADDPH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.nds.256.np.map5.w0 58 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f5 7c 28) 301 001(58) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VADDPH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+46039, 565, 7087}, + /* 3 : VADDPH ymmreg|mask|z,ymmrm256|b16 [r+vm:fv: evex.nds.256.np.map5.w0 58 /r ] ND,AVX512VL,AVX512FP16,FUTURE */ + /* 240(f5 7c 28) 301 001(58) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VADDPH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+46048, 565, 7087}, + /* 4 : VADDPH zmmreg|mask|z,zmmreg*,zmmrm512|b16|er [rvm:fv: evex.nds.512.np.map5.w0 58 /r ] AVX512FP16,FUTURE */ + /* 241(f5 7c 48) 301 001(58) 120 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VADDPH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+46057, 566, 7088}, + /* 5 : VADDPH zmmreg|mask|z,zmmrm512|b16|er [r+vm:fv: evex.nds.512.np.map5.w0 58 /r ] ND,AVX512FP16,FUTURE */ + /* 240(f5 7c 48) 301 001(58) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VADDPH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+46066, 566, 7088}, +}; + +static const struct itemplate instrux_VADDSH[2] = { + /* 0 : VADDSH xmmreg|mask|z,xmmreg*,xmmrm16|er [rvm:t1s16:evex.nds.lig.f3.map5.w0 58 /r ] AVX512FP16,FUTURE */ + /* 241(f5 7e 08) 305 001(58) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VADDSH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+46075, 567, 7089}, + /* 1 : VADDSH xmmreg|mask|z,xmmrm16|er [r+vm:t1s16:evex.nds.lig.f3.map5.w0 58 /r ] ND,AVX512FP16,FUTURE */ + /* 240(f5 7e 08) 305 001(58) 110 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VADDSH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+46084, 567, 7089}, +}; + +static const struct itemplate instrux_VCMPPH[6] = { + /* 0 : VCMPPH kreg|mask,xmmreg*,xmmrm128|b16,imm8 [rvmi:fv: evex.nds.128.np.0f3a.w0 C2 /r ib ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f3 7c 08) 301 001(c2) 120 023 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCMPPH, 4, {OPMASKREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK,0,B16,0,0}, nasm_bytecodes+22703, 565, 7090}, + /* 1 : VCMPPH kreg|mask,xmmrm128|b16,imm8 [r+vmi:fv: evex.nds.128.np.0f3a.w0 C2 /r ib ] ND,AVX512VL,AVX512FP16,FUTURE */ + /* 240(f3 7c 08) 301 001(c2) 110 022 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCMPPH, 3, {OPMASKREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK,B16,0,0,0}, nasm_bytecodes+22713, 565, 7090}, + /* 2 : VCMPPH kreg|mask,ymmreg*,ymmrm256|b16,imm8 [rvmi:fv: evex.nds.256.np.0f3a.w0 C2 /r ib ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f3 7c 28) 301 001(c2) 120 023 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCMPPH, 4, {OPMASKREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK,0,B16,0,0}, nasm_bytecodes+22723, 565, 7091}, + /* 3 : VCMPPH kreg|mask,ymmrm256|b16,imm8 [r+vmi:fv: evex.nds.256.np.0f3a.w0 C2 /r ib ] ND,AVX512VL,AVX512FP16,FUTURE */ + /* 240(f3 7c 28) 301 001(c2) 110 022 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCMPPH, 3, {OPMASKREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK,B16,0,0,0}, nasm_bytecodes+22733, 565, 7091}, + /* 4 : VCMPPH kreg|mask,zmmreg*,zmmrm512|b16|sae,imm8 [rvmi:fv: evex.nds.512.np.0f3a.w0 C2 /r ib ] AVX512FP16,FUTURE */ + /* 241(f3 7c 48) 301 001(c2) 120 023 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCMPPH, 4, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK,0,B16|SAE,0,0}, nasm_bytecodes+22743, 566, 7092}, + /* 5 : VCMPPH kreg|mask,zmmrm512|b16|sae,imm8 [r+vmi:fv: evex.nds.512.np.0f3a.w0 C2 /r ib ] ND,AVX512FP16,FUTURE */ + /* 240(f3 7c 48) 301 001(c2) 110 022 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCMPPH, 3, {OPMASKREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK,B16|SAE,0,0,0}, nasm_bytecodes+22753, 566, 7092}, +}; + +static const struct itemplate instrux_VCMPSH[2] = { + /* 0 : VCMPSH kreg|mask,xmmreg*,xmmrm16|sae,imm8 [rvmi:t1s16:evex.nds.lig.f3.0f3a.w0 C2 /r ib ] AVX512FP16,FUTURE */ + /* 241(f3 7e 08) 305 001(c2) 120 023 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCMPSH, 4, {OPMASKREG,XMMREG,RM_XMM|BITS16,IMM_NORMAL|BITS8,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+22763, 567, 7093}, + /* 1 : VCMPSH kreg|mask,xmmrm16|sae,imm8 [r+vmi:t1s16:evex.nds.lig.f3.0f3a.w0 C2 /r ib ] ND,AVX512FP16,FUTURE */ + /* 240(f3 7e 08) 305 001(c2) 110 022 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCMPSH, 3, {OPMASKREG,RM_XMM|BITS16,IMM_NORMAL|BITS8,0,0}, {MASK,SAE,0,0,0}, nasm_bytecodes+22773, 567, 7093}, +}; + +static const struct itemplate instrux_VCOMISH[1] = { + /* 0 : VCOMISH xmmreg,xmmrm16|sae [rm:fv: evex.lig.np.map5.w0 2F /r ] FL,AVX512FP16,FUTURE */ + /* 250(f5 7c 08) 301 001(2f) 110 : LIG,FL,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCOMISH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+46093, 635, 7094}, +}; + +static const struct itemplate instrux_VCVTDQ2PH[3] = { + /* 0 : VCVTDQ2PH xmmreg|mask|z,xmmrm128|b32 [rm:fv: evex.128.np.map5.w0 5B /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7c 08) 301 001(5b) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTDQ2PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+46102, 565, 7095}, + /* 1 : VCVTDQ2PH xmmreg|mask|z,ymmrm256|b32 [rm:fv: evex.256.np.map5.w0 5B /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7c 28) 301 001(5b) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTDQ2PH, 2, {XMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+46111, 565, 7096}, + /* 2 : VCVTDQ2PH ymmreg|mask|z,zmmrm512|b32|er [rm:fv: evex.512.np.map5.w0 5B /r ] AVX512FP16,FUTURE */ + /* 250(f5 7c 48) 301 001(5b) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTDQ2PH, 2, {YMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+46120, 566, 7097}, +}; + +static const struct itemplate instrux_VCVTPD2PH[3] = { + /* 0 : VCVTPD2PH xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.66.map5.w1 5a /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 fd 08) 301 001(5a) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTPD2PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+46129, 565, 7098}, + /* 1 : VCVTPD2PH xmmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.66.map5.w1 5a /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 fd 28) 301 001(5a) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTPD2PH, 2, {XMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+46138, 565, 7099}, + /* 2 : VCVTPD2PH xmmreg|mask|z,zmmrm512|b64|er [rm:fv: evex.512.66.map5.w1 5a /r ] AVX512FP16,FUTURE */ + /* 250(f5 fd 48) 301 001(5a) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTPD2PH, 2, {XMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+46147, 566, 7100}, +}; + +static const struct itemplate instrux_VCVTPH2DQ[3] = { + /* 0 : VCVTPH2DQ xmmreg|mask|z,xmmrm64|b16 [rm:hv: evex.128.66.map5.w0 5B /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7d 08) 302 001(5b) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTPH2DQ, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+46156, 565, 7101}, + /* 1 : VCVTPH2DQ ymmreg|mask|z,xmmrm128|b16 [rm:hv: evex.256.66.map5.w0 5B /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7d 28) 302 001(5b) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTPH2DQ, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+46165, 565, 7102}, + /* 2 : VCVTPH2DQ zmmreg|mask|z,ymmrm256|b16|er [rm:hv: evex.512.66.map5.w0 5B /r ] AVX512FP16,FUTURE */ + /* 250(f5 7d 48) 302 001(5b) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTPH2DQ, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+46174, 566, 7103}, +}; + +static const struct itemplate instrux_VCVTPH2PD[3] = { + /* 0 : VCVTPH2PD xmmreg|mask|z,xmmrm32|b16 [rm:qvm: evex.128.np.map5.w0 5A /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7c 08) 315 001(5a) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTPH2PD, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+46183, 565, 7104}, + /* 1 : VCVTPH2PD ymmreg|mask|z,xmmrm64|b16 [rm:qvm: evex.256.np.map5.w0 5A /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7c 28) 315 001(5a) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTPH2PD, 2, {YMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+46192, 565, 7105}, + /* 2 : VCVTPH2PD zmmreg|mask|z,xmmrm128|b16|sae [rm:qvm: evex.512.np.map5.w0 5A /r ] AVX512FP16,FUTURE */ + /* 250(f5 7c 48) 315 001(5a) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTPH2PD, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+46201, 566, 7106}, +}; + +static const struct itemplate instrux_VCVTPH2PSX[3] = { + /* 0 : VCVTPH2PSX xmmreg|mask|z,xmmrm64|b16 [rm:hv: evex.128.66.map6.w0 13 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f6 7d 08) 302 001(13) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTPH2PSX, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+46210, 565, 7110}, + /* 1 : VCVTPH2PSX ymmreg|mask|z,xmmrm128|b16 [rm:hv: evex.256.66.map6.w0 13 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f6 7d 28) 302 001(13) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTPH2PSX, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+46219, 565, 7111}, + /* 2 : VCVTPH2PSX zmmreg|mask|z,ymmrm256|b16|sae [rm:hv: evex.512.66.map6.w0 13 /r ] AVX512FP16,FUTURE */ + /* 250(f6 7d 48) 302 001(13) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTPH2PSX, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+46228, 566, 7112}, +}; + +static const struct itemplate instrux_VCVTPH2QQ[3] = { + /* 0 : VCVTPH2QQ xmmreg|mask|z,xmmrm32|b16 [rm:qvm: evex.128.66.map5.w0 7b /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7d 08) 315 001(7b) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTPH2QQ, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+46237, 565, 7113}, + /* 1 : VCVTPH2QQ ymmreg|mask|z,xmmrm64|b16 [rm:qvm: evex.256.66.map5.w0 7b /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7d 28) 315 001(7b) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTPH2QQ, 2, {YMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+46246, 565, 7114}, + /* 2 : VCVTPH2QQ zmmreg|mask|z,xmmrm128|b16|er [rm:qvm: evex.512.66.map5.w0 7b /r ] AVX512FP16,FUTURE */ + /* 250(f5 7d 48) 315 001(7b) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTPH2QQ, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+46255, 566, 7115}, +}; + +static const struct itemplate instrux_VCVTPH2UDQ[3] = { + /* 0 : VCVTPH2UDQ xmmreg|mask|z,xmmrm64|b16 [rm:hv: evex.128.map5.w0 79 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7c 08) 302 001(79) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTPH2UDQ, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+46264, 565, 7116}, + /* 1 : VCVTPH2UDQ ymmreg|mask|z,xmmrm128|b16 [rm:hv: evex.256.map5.w0 79 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7c 28) 302 001(79) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTPH2UDQ, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+46273, 565, 7117}, + /* 2 : VCVTPH2UDQ zmmreg|mask|z,ymmrm256|b16|er [rm:hv: evex.512.map5.w0 79 /r ] AVX512FP16,FUTURE */ + /* 250(f5 7c 48) 302 001(79) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTPH2UDQ, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+46282, 566, 7118}, +}; + +static const struct itemplate instrux_VCVTPH2UQQ[3] = { + /* 0 : VCVTPH2UQQ xmmreg|mask|z,xmmrm32|b16 [rm:qvm: evex.128.66.map5.w0 79 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7d 08) 315 001(79) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTPH2UQQ, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+46291, 565, 7119}, + /* 1 : VCVTPH2UQQ ymmreg|mask|z,xmmrm64|b16 [rm:qvm: evex.256.66.map5.w0 79 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7d 28) 315 001(79) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTPH2UQQ, 2, {YMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+46300, 565, 7120}, + /* 2 : VCVTPH2UQQ zmmreg|mask|z,xmmrm128|b16|er [rm:qvm: evex.512.66.map5.w0 79 /r ] AVX512FP16,FUTURE */ + /* 250(f5 7d 48) 315 001(79) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTPH2UQQ, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+46309, 566, 7121}, +}; + +static const struct itemplate instrux_VCVTPH2UW[3] = { + /* 0 : VCVTPH2UW xmmreg|mask|z,xmmrm128|b16 [rm:fv: evex.128.np.map5.w0 7d /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7c 08) 301 001(7d) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTPH2UW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+46318, 565, 7122}, + /* 1 : VCVTPH2UW ymmreg|mask|z,ymmrm256|b16 [rm:fv: evex.256.np.map5.w0 7d /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7c 28) 301 001(7d) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTPH2UW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+46327, 565, 7123}, + /* 2 : VCVTPH2UW zmmreg|mask|z,zmmrm512|b16|er [rm:fv: evex.512.np.map5.w0 7d /r ] AVX512FP16,FUTURE */ + /* 250(f5 7c 48) 301 001(7d) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTPH2UW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+46336, 566, 7124}, +}; + +static const struct itemplate instrux_VCVTPH2W[3] = { + /* 0 : VCVTPH2W xmmreg|mask|z,xmmrm128|b16 [rm:fv: evex.128.66.map5.w0 7d /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7d 08) 301 001(7d) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTPH2W, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+46345, 565, 7125}, + /* 1 : VCVTPH2W ymmreg|mask|z,ymmrm256|b16 [rm:fv: evex.256.66.map5.w0 7d /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7d 28) 301 001(7d) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTPH2W, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+46354, 565, 7126}, + /* 2 : VCVTPH2W zmmreg|mask|z,zmmrm512|b16|er [rm:fv: evex.512.66.map5.w0 7d /r ] AVX512FP16,FUTURE */ + /* 250(f5 7d 48) 301 001(7d) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTPH2W, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+46363, 566, 7127}, +}; + +static const struct itemplate instrux_VCVTPS2PHX[3] = { + /* 0 : VCVTPS2PHX xmmreg|mask|z,xmmrm128|b32 [rm:fv: evex.128.66.map5.w0 1d /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7d 08) 301 001(1d) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTPS2PHX, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+46372, 565, 7134}, + /* 1 : VCVTPS2PHX xmmreg|mask|z,ymmrm256|b32 [rm:fv: evex.256.66.map5.w0 1d /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7d 28) 301 001(1d) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTPS2PHX, 2, {XMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+46381, 565, 7135}, + /* 2 : VCVTPS2PHX ymmreg|mask|z,zmmrm512|b32|er [rm:fv: evex.512.66.map5.w0 1d /r ] AVX512FP16,FUTURE */ + /* 250(f5 7d 48) 301 001(1d) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTPS2PHX, 2, {YMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+46390, 566, 7136}, +}; + +static const struct itemplate instrux_VCVTQQ2PH[3] = { + /* 0 : VCVTQQ2PH xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.np.map5.w1 5b /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 fc 08) 301 001(5b) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTQQ2PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+46399, 565, 7137}, + /* 1 : VCVTQQ2PH xmmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.np.map5.w1 5b /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 fc 28) 301 001(5b) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTQQ2PH, 2, {XMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+46408, 565, 7138}, + /* 2 : VCVTQQ2PH xmmreg|mask|z,zmmrm512|b64|er [rm:fv: evex.512.np.map5.w1 5b /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 fc 48) 301 001(5b) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTQQ2PH, 2, {XMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+46417, 565, 7139}, +}; + +static const struct itemplate instrux_VCVTSD2SH[2] = { + /* 0 : VCVTSD2SH xmmreg|mask|z,xmmreg*,xmmrm64|er [rvm:t1s: evex.nds.lig.f2.map5.w1 5a /r ] AVX512FP16,FUTURE */ + /* 241(f5 ff 08) 306 001(5a) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTSD2SH, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+46426, 567, 7140}, + /* 1 : VCVTSD2SH xmmreg|mask|z,xmmrm64|er [r+vm:t1s: evex.nds.lig.f2.map5.w1 5a /r ] ND,AVX512FP16,FUTURE */ + /* 240(f5 ff 08) 306 001(5a) 110 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTSD2SH, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+46435, 567, 7140}, +}; + +static const struct itemplate instrux_VCVTSH2SD[2] = { + /* 0 : VCVTSH2SD xmmreg,xmmreg*,xmmrm16|sae [rvm:t1s: evex.nds.lig.f3.map5.w0 5a /r ] AVX512FP16,FUTURE */ + /* 241(f5 7e 08) 306 001(5a) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTSH2SD, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {0,0,SAE,0,0}, nasm_bytecodes+46444, 567, 7141}, + /* 1 : VCVTSH2SD xmmreg,xmmrm16|sae [r+vm:t1s: evex.nds.lig.f3.map5.w0 5a /r ] ND,AVX512FP16,FUTURE */ + /* 240(f5 7e 08) 306 001(5a) 110 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTSH2SD, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+46453, 567, 7141}, +}; + +static const struct itemplate instrux_VCVTSH2SI[2] = { + /* 0 : VCVTSH2SI reg32,xmmrm16|er [rm:t1s: evex.lig.f3.map5.w0 2d /r ] AVX512FP16,FUTURE */ + /* 250(f5 7e 08) 306 001(2d) 110 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTSH2SI, 2, {REG_GPR|BITS32,RM_XMM|BITS16,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+46462, 567, 7142}, + /* 1 : VCVTSH2SI reg64,xmmrm16|er [rm:t1s: evex.lig.f3.map5.w1 2d /r ] AVX512FP16,FUTURE */ + /* 250(f5 fe 08) 306 001(2d) 110 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTSH2SI, 2, {REG_GPR|BITS64,RM_XMM|BITS16,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+46471, 567, 7143}, +}; + +static const struct itemplate instrux_VCVTSH2SS[2] = { + /* 0 : VCVTSH2SS xmmreg|mask|z,xmmreg*,xmmrm16|sae [rvm:t1s: evex.nds.lig.map6.w0 13 /r ] AVX512FP16,FUTURE */ + /* 241(f6 7c 08) 306 001(13) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTSH2SS, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+46480, 567, 7144}, + /* 1 : VCVTSH2SS xmmreg|mask|z,xmmrm16|sae [r+vm:t1s: evex.nds.lig.map6.w0 13 /r ] ND,AVX512FP16,FUTURE */ + /* 240(f6 7c 08) 306 001(13) 110 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTSH2SS, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+46489, 567, 7144}, +}; + +static const struct itemplate instrux_VCVTSH2USI[2] = { + /* 0 : VCVTSH2USI reg32,xmmrm16|er [rm:t1s: evex.lig.f3.map5.w0 79 /r ] AVX512FP16,FUTURE */ + /* 250(f5 7e 08) 306 001(79) 110 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTSH2USI, 2, {REG_GPR|BITS32,RM_XMM|BITS16,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+46498, 567, 7145}, + /* 1 : VCVTSH2USI reg64,xmmrm16|er [rm:t1s: evex.lig.f3.map5.w1 79 /r ] AVX512FP16,FUTURE */ + /* 250(f5 fe 08) 306 001(79) 110 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTSH2USI, 2, {REG_GPR|BITS64,RM_XMM|BITS16,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+46507, 567, 7146}, +}; + +static const struct itemplate instrux_VCVTSI2SH[4] = { + /* 0 : VCVTSI2SH xmmreg,xmmreg*,rm32|er [rvm:t1s: evex.nds.lig.f3.map5.w0 2a /r ] AVX512FP16,FUTURE */ + /* 241(f5 7e 08) 306 001(2a) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTSI2SH, 3, {XMMREG,XMMREG,RM_GPR|BITS32,0,0}, {0,0,ER,0,0}, nasm_bytecodes+46516, 567, 7147}, + /* 1 : VCVTSI2SH xmmreg,rm32|er [r+vm:t1s: evex.nds.lig.f3.map5.w0 2a /r ] ND,AVX512FP16,FUTURE */ + /* 240(f5 7e 08) 306 001(2a) 110 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTSI2SH, 2, {XMMREG,RM_GPR|BITS32,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+46525, 567, 7147}, + /* 2 : VCVTSI2SH xmmreg,xmmreg*,rm64|er [rvm:t1s: evex.nds.lig.f3.map5.w1 2a /r ] AVX512FP16,FUTURE */ + /* 241(f5 fe 08) 306 001(2a) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTSI2SH, 3, {XMMREG,XMMREG,RM_GPR|BITS64,0,0}, {0,0,ER,0,0}, nasm_bytecodes+46534, 567, 7148}, + /* 3 : VCVTSI2SH xmmreg,rm64|er [r+vm:t1s: evex.nds.lig.f3.map5.w1 2a /r ] ND,AVX512FP16,FUTURE */ + /* 240(f5 fe 08) 306 001(2a) 110 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTSI2SH, 2, {XMMREG,RM_GPR|BITS64,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+46543, 567, 7148}, +}; + +static const struct itemplate instrux_VCVTSS2SH[2] = { + /* 0 : VCVTSS2SH xmmreg,xmmreg*,xmmrm32|er [rvm:t1s: evex.nds.lig.np.map5 1d /r ] AVX512FP16,FUTURE */ + /* 241(f5 7c 08) 306 001(1d) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTSS2SH, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {0,0,ER,0,0}, nasm_bytecodes+46552, 567, 7149}, + /* 1 : VCVTSS2SH xmmreg,xmmrm32|er [r+vm:t1s: evex.nds.lig.np.map5 1d /r ] ND,AVX512FP16,FUTURE */ + /* 240(f5 7c 08) 306 001(1d) 110 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTSS2SH, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+46561, 567, 7149}, +}; + +static const struct itemplate instrux_VCVTTPH2DQ[3] = { + /* 0 : VCVTTPH2DQ xmmreg|mask|z,xmmrm64|b16 [rm:hv: evex.128.f3.map5.w0 5b /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7e 08) 302 001(5b) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTTPH2DQ, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+46570, 565, 7150}, + /* 1 : VCVTTPH2DQ ymmreg|mask|z,xmmrm128|b16 [rm:hv: evex.256.f3.map5.w0 5b /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7e 28) 302 001(5b) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTTPH2DQ, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+46579, 565, 7151}, + /* 2 : VCVTTPH2DQ zmmreg|mask|z,ymmrm256|b16|sae [rm:hv: evex.512.f3.map5.w0 5b /r ] AVX512FP16,FUTURE */ + /* 250(f5 7e 48) 302 001(5b) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTTPH2DQ, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+46588, 566, 7152}, +}; + +static const struct itemplate instrux_VCVTTPH2QQ[3] = { + /* 0 : VCVTTPH2QQ xmmreg|mask|z,xmmrm32|b16 [rm:t1s: evex.128.66.map5.w0 7a /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7d 08) 306 001(7a) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTTPH2QQ, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+46597, 565, 7153}, + /* 1 : VCVTTPH2QQ ymmreg|mask|z,xmmrm64|b16 [rm:t1s: evex.256.66.map5.w0 7a /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7d 28) 306 001(7a) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTTPH2QQ, 2, {YMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+46606, 565, 7154}, + /* 2 : VCVTTPH2QQ zmmreg|mask|z,xmmrm128|b16|sae [rm:t1s: evex.512.66.map5.w0 7a /r ] AVX512FP16,FUTURE */ + /* 250(f5 7d 48) 306 001(7a) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTTPH2QQ, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+46615, 566, 7155}, +}; + +static const struct itemplate instrux_VCVTTPH2UDQ[3] = { + /* 0 : VCVTTPH2UDQ xmmreg|mask|z,xmmrm64|b16 [rm:hv: evex.128.np.map5.w0 78 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7c 08) 302 001(78) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTTPH2UDQ, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+46624, 565, 7156}, + /* 1 : VCVTTPH2UDQ ymmreg|mask|z,xmmrm128|b16 [rm:hv: evex.256.np.map5.w0 78 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7c 28) 302 001(78) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTTPH2UDQ, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+46633, 565, 7157}, + /* 2 : VCVTTPH2UDQ zmmreg|mask|z,ymmrm256|b16|sae [rm:hv: evex.512.np.map5.w0 78 /r ] AVX512FP16,FUTURE */ + /* 250(f5 7c 48) 302 001(78) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTTPH2UDQ, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+46642, 566, 7158}, +}; + +static const struct itemplate instrux_VCVTTPH2UQQ[3] = { + /* 0 : VCVTTPH2UQQ xmmreg|mask|z,xmmrm32|b16 [rm:t1s: evex.128.66.map5.w0 78 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7d 08) 306 001(78) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTTPH2UQQ, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+46651, 565, 7159}, + /* 1 : VCVTTPH2UQQ ymmreg|mask|z,xmmrm64|b16 [rm:t1s: evex.256.66.map5.w0 78 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7d 28) 306 001(78) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTTPH2UQQ, 2, {YMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+46660, 565, 7160}, + /* 2 : VCVTTPH2UQQ zmmreg|mask|z,xmmrm128|b16|sae [rm:t1s: evex.512.66.map5.w0 78 /r ] AVX512FP16,FUTURE */ + /* 250(f5 7d 48) 306 001(78) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTTPH2UQQ, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+46669, 566, 7161}, +}; + +static const struct itemplate instrux_VCVTTPH2UW[3] = { + /* 0 : VCVTTPH2UW xmmreg|mask|z,xmmrm128|b16 [rm:fv: evex.128.np.map5.w0 7c /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7c 08) 301 001(7c) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTTPH2UW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+46678, 565, 7162}, + /* 1 : VCVTTPH2UW ymmreg|mask|z,ymmrm256|b16 [rm:fv: evex.256.np.map5.w0 7c /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7c 28) 301 001(7c) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTTPH2UW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+46687, 565, 7163}, + /* 2 : VCVTTPH2UW zmmreg|mask|z,zmmrm512|b16|sae [rm:fv: evex.512.np.map5.w0 7c /r ] AVX512FP16,FUTURE */ + /* 250(f5 7c 48) 301 001(7c) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTTPH2UW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+46696, 566, 7164}, +}; + +static const struct itemplate instrux_VCVTTPH2W[3] = { + /* 0 : VCVTTPH2W xmmreg|mask|z,xmmrm128|b16 [rm:fv: evex.128.66.map5.w0 7c /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7d 08) 301 001(7c) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTTPH2W, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+46705, 565, 7165}, + /* 1 : VCVTTPH2W ymmreg|mask|z,ymmrm256|b16 [rm:fv: evex.256.66.map5.w0 7c /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7d 28) 301 001(7c) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTTPH2W, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+46714, 565, 7166}, + /* 2 : VCVTTPH2W zmmreg|mask|z,zmmrm512|b16|sae [rm:fv: evex.512.66.map5.w0 7c /r ] AVX512FP16,FUTURE */ + /* 250(f5 7d 48) 301 001(7c) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTTPH2W, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+46723, 566, 7167}, +}; + +static const struct itemplate instrux_VCVTTSH2SI[2] = { + /* 0 : VCVTTSH2SI reg32,xmmrm16|sae [rm:t1s: evex.lig.f3.map5.w0 2c /r ] AVX512FP16,FUTURE */ + /* 250(f5 7e 08) 306 001(2c) 110 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTTSH2SI, 2, {REG_GPR|BITS32,RM_XMM|BITS16,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+46732, 567, 7168}, + /* 1 : VCVTTSH2SI reg64,xmmrm16|sae [rm:t1s: evex.lig.f3.map5.w1 2c /r ] AVX512FP16,FUTURE */ + /* 250(f5 fe 08) 306 001(2c) 110 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTTSH2SI, 2, {REG_GPR|BITS64,RM_XMM|BITS16,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+46741, 567, 7169}, +}; + +static const struct itemplate instrux_VCVTTSH2USI[2] = { + /* 0 : VCVTTSH2USI reg32,xmmrm16|sae [rm:t1s: evex.lig.f3.map5.w0 78 /r ] AVX512FP16,FUTURE */ + /* 250(f5 7e 08) 306 001(78) 110 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTTSH2USI, 2, {REG_GPR|BITS32,RM_XMM|BITS16,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+46750, 567, 7170}, + /* 1 : VCVTTSH2USI reg64,xmmrm16|sae [rm:t1s: evex.lig.f3.map5.w1 78 /r ] AVX512FP16,FUTURE */ + /* 250(f5 fe 08) 306 001(78) 110 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTTSH2USI, 2, {REG_GPR|BITS64,RM_XMM|BITS16,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+46759, 567, 7171}, +}; + +static const struct itemplate instrux_VCVTUDQ2PH[3] = { + /* 0 : VCVTUDQ2PH xmmreg|mask|z,xmmrm128|b32 [rm:fv: evex.128.f2.map5.w0 7a /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7f 08) 301 001(7a) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTUDQ2PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+46768, 565, 7172}, + /* 1 : VCVTUDQ2PH xmmreg|mask|z,ymmrm256|b32 [rm:fv: evex.256.f2.map5.w0 7a /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7f 28) 301 001(7a) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTUDQ2PH, 2, {XMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+46777, 565, 7173}, + /* 2 : VCVTUDQ2PH ymmreg|mask|z,zmmrm512|b32 [rm:fv: evex.512.f2.map5.w0 7a /r ] AVX512FP16,FUTURE */ + /* 250(f5 7f 48) 301 001(7a) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTUDQ2PH, 2, {YMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+46786, 566, 7174}, +}; + +static const struct itemplate instrux_VCVTUQQ2PH[3] = { + /* 0 : VCVTUQQ2PH xmmreg|mask|z,xmmrm128|b32 [rm:fv: evex.128.f2.map5.w1 7a /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 ff 08) 301 001(7a) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTUQQ2PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+46795, 565, 7175}, + /* 1 : VCVTUQQ2PH xmmreg|mask|z,ymmrm256|b32 [rm:fv: evex.256.f2.map5.w1 7a /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 ff 28) 301 001(7a) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTUQQ2PH, 2, {XMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+46804, 565, 7176}, + /* 2 : VCVTUQQ2PH xmmreg|mask|z,zmmrm512|b32 [rm:fv: evex.512.f2.map5.w1 7a /r ] AVX512FP16,FUTURE */ + /* 250(f5 ff 48) 301 001(7a) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTUQQ2PH, 2, {XMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+46813, 566, 7177}, +}; + +static const struct itemplate instrux_VCVTUSI2SH[4] = { + /* 0 : VCVTUSI2SH xmmreg,xmmreg*,rm32|er [rvm:t1s: evex.nds.lig.f3.map5.w0 7b /r ] AVX512FP16,FUTURE */ + /* 241(f5 7e 08) 306 001(7b) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTUSI2SH, 3, {XMMREG,XMMREG,RM_GPR|BITS32,0,0}, {0,0,ER,0,0}, nasm_bytecodes+46822, 567, 7178}, + /* 1 : VCVTUSI2SH xmmreg,rm32|er [r+vm:t1s: evex.nds.lig.f3.map5.w0 7b /r ] ND,AVX512FP16,FUTURE */ + /* 240(f5 7e 08) 306 001(7b) 110 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTUSI2SH, 2, {XMMREG,RM_GPR|BITS32,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+46831, 567, 7178}, + /* 2 : VCVTUSI2SH xmmreg,xmmreg*,rm64|er [rvm:t1s: evex.nds.lig.f3.map5.w1 7b /r ] AVX512FP16,FUTURE */ + /* 241(f5 fe 08) 306 001(7b) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTUSI2SH, 3, {XMMREG,XMMREG,RM_GPR|BITS64,0,0}, {0,0,ER,0,0}, nasm_bytecodes+46840, 567, 7179}, + /* 3 : VCVTUSI2SH xmmreg,rm64|er [r+vm:t1s: evex.nds.lig.f3.map5.w1 7b /r ] ND,AVX512FP16,FUTURE */ + /* 240(f5 fe 08) 306 001(7b) 110 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTUSI2SH, 2, {XMMREG,RM_GPR|BITS64,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+46849, 567, 7179}, +}; + +static const struct itemplate instrux_VCVTUW2PH[3] = { + /* 0 : VCVTUW2PH xmmreg|mask|z,xmmrm128|b16 [rm:fv: evex.128.f2.map5.w0 7d /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7f 08) 301 001(7d) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTUW2PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+46858, 565, 7180}, + /* 1 : VCVTUW2PH ymmreg|mask|z,ymmrm256|b16 [rm:fv: evex.256.f2.map5.w0 7d /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7f 28) 301 001(7d) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTUW2PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+46867, 565, 7181}, + /* 2 : VCVTUW2PH zmmreg|mask|z,zmmrm512|b16|er [rm:fv: evex.512.f2.map5.w0 7d /r ] AVX512FP16,FUTURE */ + /* 250(f5 7f 48) 301 001(7d) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTUW2PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+46876, 566, 7182}, +}; + +static const struct itemplate instrux_VCVTW2PH[3] = { + /* 0 : VCVTW2PH xmmreg|mask|z,xmmrm128|b16 [rm:fv: evex.128.f3.map5.w0 7d /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7e 08) 301 001(7d) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTW2PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+46885, 565, 7183}, + /* 1 : VCVTW2PH ymmreg|mask|z,ymmrm256|b16 [rm:fv: evex.256.f3.map5.w0 7d /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7e 28) 301 001(7d) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTW2PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+46894, 565, 7184}, + /* 2 : VCVTW2PH zmmreg|mask|z,zmmrm512|b16|er [rm:fv: evex.512.f3.map5.w0 7d /r ] AVX512FP16,FUTURE */ + /* 250(f5 7e 48) 301 001(7d) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTW2PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+46903, 566, 7185}, +}; + +static const struct itemplate instrux_VDIVPH[6] = { + /* 0 : VDIVPH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.nds.128.np.map5 5e /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f5 7c 08) 301 001(5e) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VDIVPH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+46912, 565, 7186}, + /* 1 : VDIVPH xmmreg|mask|z,xmmrm128|b16 [r+vm:fv: evex.nds.128.np.map5 5e /r ] ND,AVX512VL,AVX512FP16,FUTURE */ + /* 240(f5 7c 08) 301 001(5e) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VDIVPH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+46921, 565, 7186}, + /* 2 : VDIVPH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.nds.256.np.map5 5e /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f5 7c 28) 301 001(5e) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VDIVPH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+46930, 565, 7187}, + /* 3 : VDIVPH ymmreg|mask|z,ymmrm256|b16 [r+vm:fv: evex.nds.256.np.map5 5e /r ] ND,AVX512VL,AVX512FP16,FUTURE */ + /* 240(f5 7c 28) 301 001(5e) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VDIVPH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+46939, 565, 7187}, + /* 4 : VDIVPH zmmreg|mask|z,zmmreg*,zmmrm512|b16|er [rvm:fv: evex.nds.512.np.map5 5e /r ] AVX512FP16,FUTURE */ + /* 241(f5 7c 48) 301 001(5e) 120 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VDIVPH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+46948, 566, 7188}, + /* 5 : VDIVPH zmmreg|mask|z,zmmrm512|b16|er [r+vm:fv: evex.nds.512.np.map5 5e /r ] ND,AVX512FP16,FUTURE */ + /* 240(f5 7c 48) 301 001(5e) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VDIVPH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+46957, 566, 7188}, +}; + +static const struct itemplate instrux_VDIVSH[2] = { + /* 0 : VDIVSH xmmreg|mask|z,xmmreg*,xmmrm16|er [rvm:t1s16:evex.nds.lig.f3.map5 5e /r ] AVX512FP16,FUTURE */ + /* 241(f5 7e 08) 305 001(5e) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VDIVSH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+46966, 567, 7189}, + /* 1 : VDIVSH xmmreg|mask|z,xmmrm16|er [r+vm:t1s16:evex.nds.lig.f3.map5 5e /r ] ND,AVX512FP16,FUTURE */ + /* 240(f5 7e 08) 305 001(5e) 110 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VDIVSH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+46975, 567, 7189}, +}; + +static const struct itemplate instrux_VFCMADDCPH[6] = { + /* 0 : VFCMADDCPH xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.f2.map6.w0 56 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7f 08) 301 001(56) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFCMADDCPH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+46984, 565, 7190}, + /* 1 : VFCMADDCPH xmmreg|mask|z,xmmrm128|b32 [r+vm:fv: evex.nds.128.f2.map6.w0 56 /r ] ND,AVX512VL,AVX512FP16,FUTURE */ + /* 240(f6 7f 08) 301 001(56) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFCMADDCPH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+46993, 565, 7190}, + /* 2 : VFCMADDCPH ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.f2.map6.w0 56 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7f 28) 301 001(56) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFCMADDCPH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+47002, 565, 7191}, + /* 3 : VFCMADDCPH ymmreg|mask|z,ymmrm256|b32 [r+vm:fv: evex.nds.256.f2.map6.w0 56 /r ] ND,AVX512VL,AVX512FP16,FUTURE */ + /* 240(f6 7f 28) 301 001(56) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFCMADDCPH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+47011, 565, 7191}, + /* 4 : VFCMADDCPH zmmreg|mask|z,zmmreg*,zmmrm512|b32|er [rvm:fv: evex.nds.512.f2.map6.w0 56 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7f 48) 301 001(56) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFCMADDCPH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+47020, 565, 7192}, + /* 5 : VFCMADDCPH zmmreg|mask|z,zmmrm512|b32|er [r+vm:fv: evex.nds.512.f2.map6.w0 56 /r ] ND,AVX512VL,AVX512FP16,FUTURE */ + /* 240(f6 7f 48) 301 001(56) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFCMADDCPH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+47029, 565, 7192}, +}; + +static const struct itemplate instrux_VFMADDCPH[6] = { + /* 0 : VFMADDCPH xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.f3.map6.w0 56 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7e 08) 301 001(56) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMADDCPH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+47038, 565, 7193}, + /* 1 : VFMADDCPH xmmreg|mask|z,xmmrm128|b32 [r+vm:fv: evex.nds.128.f3.map6.w0 56 /r ] ND,AVX512VL,AVX512FP16,FUTURE */ + /* 240(f6 7e 08) 301 001(56) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMADDCPH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+47047, 565, 7193}, + /* 2 : VFMADDCPH ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.f3.map6.w0 56 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7e 28) 301 001(56) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMADDCPH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+47056, 565, 7194}, + /* 3 : VFMADDCPH ymmreg|mask|z,ymmrm256|b32 [r+vm:fv: evex.nds.256.f3.map6.w0 56 /r ] ND,AVX512VL,AVX512FP16,FUTURE */ + /* 240(f6 7e 28) 301 001(56) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMADDCPH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+47065, 565, 7194}, + /* 4 : VFMADDCPH zmmreg|mask|z,zmmreg*,zmmrm512|b32|er [rvm:fv: evex.nds.512.f3.map6.w0 56 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7e 48) 301 001(56) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMADDCPH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+47074, 565, 7195}, + /* 5 : VFMADDCPH zmmreg|mask|z,zmmrm512|b32|er [r+vm:fv: evex.nds.512.f3.map6.w0 56 /r ] ND,AVX512VL,AVX512FP16,FUTURE */ + /* 240(f6 7e 48) 301 001(56) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMADDCPH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+47083, 565, 7195}, +}; + +static const struct itemplate instrux_VFCMADDCSH[2] = { + /* 0 : VFCMADDCSH xmmreg|mask|z,xmmreg*,xmmrm32|er [rvm:t1s: evex.nds.lig.f2.map6.w0 57 /r ] AVX512FP16,FUTURE */ + /* 241(f6 7f 08) 306 001(57) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFCMADDCSH, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+47092, 567, 7196}, + /* 1 : VFCMADDCSH xmmreg|mask|z,xmmrm32|er [r+vm:t1s: evex.nds.lig.f2.map6.w0 57 /r ] ND,AVX512FP16,FUTURE */ + /* 240(f6 7f 08) 306 001(57) 110 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFCMADDCSH, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+47101, 567, 7196}, +}; + +static const struct itemplate instrux_VFMADDCSH[2] = { + /* 0 : VFMADDCSH xmmreg|mask|z,xmmreg*,xmmrm32|er [rvm:t1s: evex.nds.lig.f3.map6.w0 57 /r ] AVX512FP16,FUTURE */ + /* 241(f6 7e 08) 306 001(57) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFMADDCSH, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+47110, 567, 7197}, + /* 1 : VFMADDCSH xmmreg|mask|z,xmmrm32|er [r+vm:t1s: evex.nds.lig.f3.map6.w0 57 /r ] ND,AVX512FP16,FUTURE */ + /* 240(f6 7e 08) 306 001(57) 110 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFMADDCSH, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+47119, 567, 7197}, +}; + +static const struct itemplate instrux_VFCMULCPH[6] = { + /* 0 : VFCMULCPH xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.f2.map6.w0 d6 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7f 08) 301 001(d6) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFCMULCPH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+47128, 565, 7198}, + /* 1 : VFCMULCPH xmmreg|mask|z,xmmrm128|b32 [r+vm:fv: evex.nds.128.f2.map6.w0 d6 /r ] ND,AVX512VL,AVX512FP16,FUTURE */ + /* 240(f6 7f 08) 301 001(d6) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFCMULCPH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+47137, 565, 7198}, + /* 2 : VFCMULCPH ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.f2.map6.w0 d6 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7f 28) 301 001(d6) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFCMULCPH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+47146, 565, 7199}, + /* 3 : VFCMULCPH ymmreg|mask|z,ymmrm256|b32 [r+vm:fv: evex.nds.256.f2.map6.w0 d6 /r ] ND,AVX512VL,AVX512FP16,FUTURE */ + /* 240(f6 7f 28) 301 001(d6) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFCMULCPH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+47155, 565, 7199}, + /* 4 : VFCMULCPH zmmreg|mask|z,zmmreg*,zmmrm512|b32|er [rvm:fv: evex.nds.512.f2.map6.w0 d6 /r ] AVX512FP16,FUTURE */ + /* 241(f6 7f 48) 301 001(d6) 120 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFCMULCPH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+47164, 566, 7200}, + /* 5 : VFCMULCPH zmmreg|mask|z,zmmrm512|b32|er [r+vm:fv: evex.nds.512.f2.map6.w0 d6 /r ] ND,AVX512FP16,FUTURE */ + /* 240(f6 7f 48) 301 001(d6) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFCMULCPH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+47173, 566, 7200}, +}; + +static const struct itemplate instrux_VFMULCPH[6] = { + /* 0 : VFMULCPH xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.f3.map6.w0 d6 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7e 08) 301 001(d6) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMULCPH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+47182, 565, 7201}, + /* 1 : VFMULCPH xmmreg|mask|z,xmmrm128|b32 [r+vm:fv: evex.nds.128.f3.map6.w0 d6 /r ] ND,AVX512VL,AVX512FP16,FUTURE */ + /* 240(f6 7e 08) 301 001(d6) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMULCPH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+47191, 565, 7201}, + /* 2 : VFMULCPH ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.f3.map6.w0 d6 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7e 28) 301 001(d6) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMULCPH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+47200, 565, 7202}, + /* 3 : VFMULCPH ymmreg|mask|z,ymmrm256|b32 [r+vm:fv: evex.nds.256.f3.map6.w0 d6 /r ] ND,AVX512VL,AVX512FP16,FUTURE */ + /* 240(f6 7e 28) 301 001(d6) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMULCPH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+47209, 565, 7202}, + /* 4 : VFMULCPH zmmreg|mask|z,zmmreg*,zmmrm512|b32|er [rvm:fv: evex.nds.512.f3.map6.w0 d6 /r ] AVX512FP16,FUTURE */ + /* 241(f6 7e 48) 301 001(d6) 120 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFMULCPH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+47218, 566, 7203}, + /* 5 : VFMULCPH zmmreg|mask|z,zmmrm512|b32|er [r+vm:fv: evex.nds.512.f3.map6.w0 d6 /r ] ND,AVX512FP16,FUTURE */ + /* 240(f6 7e 48) 301 001(d6) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFMULCPH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+47227, 566, 7203}, +}; + +static const struct itemplate instrux_VFCMULCSH[2] = { + /* 0 : VFCMULCSH xmmreg|mask|z,xmmreg*,xmmrm32|er [rvm:t1s: evex.nds.lig.f2.map6.w0 d7 /r ] AVX512FP16,FUTURE */ + /* 241(f6 7f 08) 306 001(d7) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFCMULCSH, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+47236, 567, 7204}, + /* 1 : VFCMULCSH xmmreg|mask|z,xmmrm32|er [r+vm:t1s: evex.nds.lig.f2.map6.w0 d7 /r ] ND,AVX512FP16,FUTURE */ + /* 240(f6 7f 08) 306 001(d7) 110 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFCMULCSH, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+47245, 567, 7204}, +}; + +static const struct itemplate instrux_VFMULCSH[2] = { + /* 0 : VFMULCSH xmmreg|mask|z,xmmreg*,xmmrm32|er [rvm:t1s: evex.nds.lig.f3.map6.w0 d7 /r ] AVX512FP16,FUTURE */ + /* 241(f6 7e 08) 306 001(d7) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFMULCSH, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+47254, 567, 7205}, + /* 1 : VFMULCSH xmmreg|mask|z,xmmrm32|er [r+vm:t1s: evex.nds.lig.f3.map6.w0 d7 /r ] ND,AVX512FP16,FUTURE */ + /* 240(f6 7e 08) 306 001(d7) 110 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFMULCSH, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+47263, 567, 7205}, +}; + +static const struct itemplate instrux_VFMADDSUB132PH[6] = { + /* 0 : VFMADDSUB132PH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.nds.128.66.map6.w0 96 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 08) 301 001(96) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMADDSUB132PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+47272, 565, 7206}, + /* 1 : VFMADDSUB132PH xmmreg|mask|z,xmmrm128|b16 [r+vm:fv: evex.nds.128.66.map6.w0 96 /r ] ND,AVX512VL,AVX512FP16,FUTURE */ + /* 240(f6 7d 08) 301 001(96) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMADDSUB132PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+47281, 565, 7206}, + /* 2 : VFMADDSUB132PH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.nds.256.66.map6.w0 96 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 28) 301 001(96) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMADDSUB132PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+47290, 565, 7207}, + /* 3 : VFMADDSUB132PH ymmreg|mask|z,ymmrm256|b16 [r+vm:fv: evex.nds.256.66.map6.w0 96 /r ] ND,AVX512VL,AVX512FP16,FUTURE */ + /* 240(f6 7d 28) 301 001(96) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMADDSUB132PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+47299, 565, 7207}, + /* 4 : VFMADDSUB132PH zmmreg|mask|z,zmmreg*,zmmrm512|b16|er [rvm:fv: evex.nds.512.66.map6.w0 96 /r ] AVX512FP16,FUTURE */ + /* 241(f6 7d 48) 301 001(96) 120 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFMADDSUB132PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+47308, 566, 7208}, + /* 5 : VFMADDSUB132PH zmmreg|mask|z,zmmrm512|b16|er [r+vm:fv: evex.nds.512.66.map6.w0 96 /r ] ND,AVX512FP16,FUTURE */ + /* 240(f6 7d 48) 301 001(96) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFMADDSUB132PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+47317, 566, 7208}, +}; + +static const struct itemplate instrux_VFMADDSUB213PH[6] = { + /* 0 : VFMADDSUB213PH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.nds.128.66.map6.w0 a6 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 08) 301 001(a6) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMADDSUB213PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+47326, 565, 7209}, + /* 1 : VFMADDSUB213PH xmmreg|mask|z,xmmrm128|b16 [r+vm:fv: evex.nds.128.66.map6.w0 a6 /r ] ND,AVX512VL,AVX512FP16,FUTURE */ + /* 240(f6 7d 08) 301 001(a6) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMADDSUB213PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+47335, 565, 7209}, + /* 2 : VFMADDSUB213PH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.nds.256.66.map6.w0 a6 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 28) 301 001(a6) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMADDSUB213PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+47344, 565, 7210}, + /* 3 : VFMADDSUB213PH ymmreg|mask|z,ymmrm256|b16 [r+vm:fv: evex.nds.256.66.map6.w0 a6 /r ] ND,AVX512VL,AVX512FP16,FUTURE */ + /* 240(f6 7d 28) 301 001(a6) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMADDSUB213PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+47353, 565, 7210}, + /* 4 : VFMADDSUB213PH zmmreg|mask|z,zmmreg*,zmmrm512|b16|er [rvm:fv: evex.nds.512.66.map6.w0 a6 /r ] AVX512FP16,FUTURE */ + /* 241(f6 7d 48) 301 001(a6) 120 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFMADDSUB213PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+47362, 566, 7211}, + /* 5 : VFMADDSUB213PH zmmreg|mask|z,zmmrm512|b16|er [r+vm:fv: evex.nds.512.66.map6.w0 a6 /r ] ND,AVX512FP16,FUTURE */ + /* 240(f6 7d 48) 301 001(a6) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFMADDSUB213PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+47371, 566, 7211}, +}; + +static const struct itemplate instrux_VFMADDSUB231PH[6] = { + /* 0 : VFMADDSUB231PH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.nds.128.66.map6.w0 b6 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 08) 301 001(b6) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMADDSUB231PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+47380, 565, 7212}, + /* 1 : VFMADDSUB231PH xmmreg|mask|z,xmmrm128|b16 [r+vm:fv: evex.nds.128.66.map6.w0 b6 /r ] ND,AVX512VL,AVX512FP16,FUTURE */ + /* 240(f6 7d 08) 301 001(b6) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMADDSUB231PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+47389, 565, 7212}, + /* 2 : VFMADDSUB231PH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.nds.256.66.map6.w0 b6 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 28) 301 001(b6) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMADDSUB231PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+47398, 565, 7213}, + /* 3 : VFMADDSUB231PH ymmreg|mask|z,ymmrm256|b16 [r+vm:fv: evex.nds.256.66.map6.w0 b6 /r ] ND,AVX512VL,AVX512FP16,FUTURE */ + /* 240(f6 7d 28) 301 001(b6) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMADDSUB231PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+47407, 565, 7213}, + /* 4 : VFMADDSUB231PH zmmreg|mask|z,zmmreg*,zmmrm512|b16|er [rvm:fv: evex.nds.512.66.map6.w0 b6 /r ] AVX512FP16,FUTURE */ + /* 241(f6 7d 48) 301 001(b6) 120 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFMADDSUB231PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+47416, 566, 7214}, + /* 5 : VFMADDSUB231PH zmmreg|mask|z,zmmrm512|b16|er [r+vm:fv: evex.nds.512.66.map6.w0 b6 /r ] ND,AVX512FP16,FUTURE */ + /* 240(f6 7d 48) 301 001(b6) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFMADDSUB231PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+47425, 566, 7214}, +}; + +static const struct itemplate instrux_VFMSUBADD132PH[6] = { + /* 0 : VFMSUBADD132PH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.nds.128.66.map6.w0 97 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 08) 301 001(97) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMSUBADD132PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+47434, 565, 7215}, + /* 1 : VFMSUBADD132PH xmmreg|mask|z,xmmrm128|b16 [r+vm:fv: evex.nds.128.66.map6.w0 97 /r ] ND,AVX512VL,AVX512FP16,FUTURE */ + /* 240(f6 7d 08) 301 001(97) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMSUBADD132PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+47443, 565, 7215}, + /* 2 : VFMSUBADD132PH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.nds.256.66.map6.w0 97 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 28) 301 001(97) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMSUBADD132PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+47452, 565, 7216}, + /* 3 : VFMSUBADD132PH ymmreg|mask|z,ymmrm256|b16 [r+vm:fv: evex.nds.256.66.map6.w0 97 /r ] ND,AVX512VL,AVX512FP16,FUTURE */ + /* 240(f6 7d 28) 301 001(97) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMSUBADD132PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+47461, 565, 7216}, + /* 4 : VFMSUBADD132PH zmmreg|mask|z,zmmreg*,zmmrm512|b16|er [rvm:fv: evex.nds.512.66.map6.w0 97 /r ] AVX512FP16,FUTURE */ + /* 241(f6 7d 48) 301 001(97) 120 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFMSUBADD132PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+47470, 566, 7217}, + /* 5 : VFMSUBADD132PH zmmreg|mask|z,zmmrm512|b16|er [r+vm:fv: evex.nds.512.66.map6.w0 97 /r ] ND,AVX512FP16,FUTURE */ + /* 240(f6 7d 48) 301 001(97) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFMSUBADD132PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+47479, 566, 7217}, +}; + +static const struct itemplate instrux_VFMSUBADD213PH[6] = { + /* 0 : VFMSUBADD213PH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.nds.128.66.map6.w0 a7 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 08) 301 001(a7) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMSUBADD213PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+47488, 565, 7218}, + /* 1 : VFMSUBADD213PH xmmreg|mask|z,xmmrm128|b16 [r+vm:fv: evex.nds.128.66.map6.w0 a7 /r ] ND,AVX512VL,AVX512FP16,FUTURE */ + /* 240(f6 7d 08) 301 001(a7) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMSUBADD213PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+47497, 565, 7218}, + /* 2 : VFMSUBADD213PH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.nds.256.66.map6.w0 a7 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 28) 301 001(a7) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMSUBADD213PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+47506, 565, 7219}, + /* 3 : VFMSUBADD213PH ymmreg|mask|z,ymmrm256|b16 [r+vm:fv: evex.nds.256.66.map6.w0 a7 /r ] ND,AVX512VL,AVX512FP16,FUTURE */ + /* 240(f6 7d 28) 301 001(a7) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMSUBADD213PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+47515, 565, 7219}, + /* 4 : VFMSUBADD213PH zmmreg|mask|z,zmmreg*,zmmrm512|b16|er [rvm:fv: evex.nds.512.66.map6.w0 a7 /r ] AVX512FP16,FUTURE */ + /* 241(f6 7d 48) 301 001(a7) 120 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFMSUBADD213PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+47524, 566, 7220}, + /* 5 : VFMSUBADD213PH zmmreg|mask|z,zmmrm512|b16|er [r+vm:fv: evex.nds.512.66.map6.w0 a7 /r ] ND,AVX512FP16,FUTURE */ + /* 240(f6 7d 48) 301 001(a7) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFMSUBADD213PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+47533, 566, 7220}, +}; + +static const struct itemplate instrux_VFMSUBADD231PH[6] = { + /* 0 : VFMSUBADD231PH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.nds.128.66.map6.w0 b7 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 08) 301 001(b7) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMSUBADD231PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+47542, 565, 7221}, + /* 1 : VFMSUBADD231PH xmmreg|mask|z,xmmrm128|b16 [r+vm:fv: evex.nds.128.66.map6.w0 b7 /r ] ND,AVX512VL,AVX512FP16,FUTURE */ + /* 240(f6 7d 08) 301 001(b7) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMSUBADD231PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+47551, 565, 7221}, + /* 2 : VFMSUBADD231PH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.nds.256.66.map6.w0 b7 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 28) 301 001(b7) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMSUBADD231PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+47560, 565, 7222}, + /* 3 : VFMSUBADD231PH ymmreg|mask|z,ymmrm256|b16 [r+vm:fv: evex.nds.256.66.map6.w0 b7 /r ] ND,AVX512VL,AVX512FP16,FUTURE */ + /* 240(f6 7d 28) 301 001(b7) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMSUBADD231PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+47569, 565, 7222}, + /* 4 : VFMSUBADD231PH zmmreg|mask|z,zmmreg*,zmmrm512|b16|er [rvm:fv: evex.nds.512.66.map6.w0 b7 /r ] AVX512FP16,FUTURE */ + /* 241(f6 7d 48) 301 001(b7) 120 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFMSUBADD231PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+47578, 566, 7223}, + /* 5 : VFMSUBADD231PH zmmreg|mask|z,zmmrm512|b16|er [r+vm:fv: evex.nds.512.66.map6.w0 b7 /r ] ND,AVX512FP16,FUTURE */ + /* 240(f6 7d 48) 301 001(b7) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFMSUBADD231PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+47587, 566, 7223}, +}; + +static const struct itemplate instrux_VFMADD132PH[6] = { + /* 0 : VFMADD132PH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.nds.128.66.map6.w0 98 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 08) 301 001(98) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMADD132PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+47596, 565, 7224}, + /* 1 : VFMADD132PH xmmreg|mask|z,xmmrm128|b16 [r+vm:fv: evex.nds.128.66.map6.w0 98 /r ] ND,AVX512VL,AVX512FP16,FUTURE */ + /* 240(f6 7d 08) 301 001(98) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMADD132PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+47605, 565, 7224}, + /* 2 : VFMADD132PH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.nds.256.66.map6.w0 98 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 28) 301 001(98) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMADD132PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+47614, 565, 7225}, + /* 3 : VFMADD132PH ymmreg|mask|z,ymmrm256|b16 [r+vm:fv: evex.nds.256.66.map6.w0 98 /r ] ND,AVX512VL,AVX512FP16,FUTURE */ + /* 240(f6 7d 28) 301 001(98) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMADD132PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+47623, 565, 7225}, + /* 4 : VFMADD132PH zmmreg|mask|z,zmmreg*,zmmrm512|b16|er [rvm:fv: evex.nds.512.66.map6.w0 98 /r ] AVX512FP16,FUTURE */ + /* 241(f6 7d 48) 301 001(98) 120 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFMADD132PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+47632, 566, 7226}, + /* 5 : VFMADD132PH zmmreg|mask|z,zmmrm512|b16|er [r+vm:fv: evex.nds.512.66.map6.w0 98 /r ] ND,AVX512FP16,FUTURE */ + /* 240(f6 7d 48) 301 001(98) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFMADD132PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+47641, 566, 7226}, +}; + +static const struct itemplate instrux_VFMADD213PH[6] = { + /* 0 : VFMADD213PH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.nds.128.66.map6.w0 a8 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 08) 301 001(a8) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMADD213PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+47650, 565, 7227}, + /* 1 : VFMADD213PH xmmreg|mask|z,xmmrm128|b16 [r+vm:fv: evex.nds.128.66.map6.w0 a8 /r ] ND,AVX512VL,AVX512FP16,FUTURE */ + /* 240(f6 7d 08) 301 001(a8) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMADD213PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+47659, 565, 7227}, + /* 2 : VFMADD213PH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.nds.256.66.map6.w0 a8 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 28) 301 001(a8) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMADD213PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+47668, 565, 7228}, + /* 3 : VFMADD213PH ymmreg|mask|z,ymmrm256|b16 [r+vm:fv: evex.nds.256.66.map6.w0 a8 /r ] ND,AVX512VL,AVX512FP16,FUTURE */ + /* 240(f6 7d 28) 301 001(a8) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMADD213PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+47677, 565, 7228}, + /* 4 : VFMADD213PH zmmreg|mask|z,zmmreg*,zmmrm512|b16|er [rvm:fv: evex.nds.512.66.map6.w0 a8 /r ] AVX512FP16,FUTURE */ + /* 241(f6 7d 48) 301 001(a8) 120 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFMADD213PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+47686, 566, 7229}, + /* 5 : VFMADD213PH zmmreg|mask|z,zmmrm512|b16|er [r+vm:fv: evex.nds.512.66.map6.w0 a8 /r ] ND,AVX512FP16,FUTURE */ + /* 240(f6 7d 48) 301 001(a8) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFMADD213PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+47695, 566, 7229}, +}; + +static const struct itemplate instrux_VFMADD231PH[6] = { + /* 0 : VFMADD231PH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.nds.128.66.map6.w0 b8 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 08) 301 001(b8) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMADD231PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+47704, 565, 7230}, + /* 1 : VFMADD231PH xmmreg|mask|z,xmmrm128|b16 [r+vm:fv: evex.nds.128.66.map6.w0 b8 /r ] ND,AVX512VL,AVX512FP16,FUTURE */ + /* 240(f6 7d 08) 301 001(b8) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMADD231PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+47713, 565, 7230}, + /* 2 : VFMADD231PH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.nds.256.66.map6.w0 b8 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 28) 301 001(b8) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMADD231PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+47722, 565, 7231}, + /* 3 : VFMADD231PH ymmreg|mask|z,ymmrm256|b16 [r+vm:fv: evex.nds.256.66.map6.w0 b8 /r ] ND,AVX512VL,AVX512FP16,FUTURE */ + /* 240(f6 7d 28) 301 001(b8) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMADD231PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+47731, 565, 7231}, + /* 4 : VFMADD231PH zmmreg|mask|z,zmmreg*,zmmrm512|b16|er [rvm:fv: evex.nds.512.66.map6.w0 b8 /r ] AVX512FP16,FUTURE */ + /* 241(f6 7d 48) 301 001(b8) 120 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFMADD231PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+47740, 566, 7232}, + /* 5 : VFMADD231PH zmmreg|mask|z,zmmrm512|b16|er [r+vm:fv: evex.nds.512.66.map6.w0 b8 /r ] ND,AVX512FP16,FUTURE */ + /* 240(f6 7d 48) 301 001(b8) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFMADD231PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+47749, 566, 7232}, +}; + +static const struct itemplate instrux_VFNMADD132PH[6] = { + /* 0 : VFNMADD132PH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.nds.128.66.map6.w0 9c /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 08) 301 001(9c) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFNMADD132PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+47758, 565, 7233}, + /* 1 : VFNMADD132PH xmmreg|mask|z,xmmrm128|b16 [r+vm:fv: evex.nds.128.66.map6.w0 9c /r ] ND,AVX512VL,AVX512FP16,FUTURE */ + /* 240(f6 7d 08) 301 001(9c) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFNMADD132PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+47767, 565, 7233}, + /* 2 : VFNMADD132PH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.nds.256.66.map6.w0 9c /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 28) 301 001(9c) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFNMADD132PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+47776, 565, 7234}, + /* 3 : VFNMADD132PH ymmreg|mask|z,ymmrm256|b16 [r+vm:fv: evex.nds.256.66.map6.w0 9c /r ] ND,AVX512VL,AVX512FP16,FUTURE */ + /* 240(f6 7d 28) 301 001(9c) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFNMADD132PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+47785, 565, 7234}, + /* 4 : VFNMADD132PH zmmreg|mask|z,zmmreg*,zmmrm512|b16|er [rvm:fv: evex.nds.512.66.map6.w0 9c /r ] AVX512FP16,FUTURE */ + /* 241(f6 7d 48) 301 001(9c) 120 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFNMADD132PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+47794, 566, 7235}, + /* 5 : VFNMADD132PH zmmreg|mask|z,zmmrm512|b16|er [r+vm:fv: evex.nds.512.66.map6.w0 9c /r ] ND,AVX512FP16,FUTURE */ + /* 240(f6 7d 48) 301 001(9c) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFNMADD132PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+47803, 566, 7235}, +}; + +static const struct itemplate instrux_VFNMADD213PH[6] = { + /* 0 : VFNMADD213PH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.nds.128.66.map6.w0 ac /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 08) 301 001(ac) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFNMADD213PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+47812, 565, 7236}, + /* 1 : VFNMADD213PH xmmreg|mask|z,xmmrm128|b16 [r+vm:fv: evex.nds.128.66.map6.w0 ac /r ] ND,AVX512VL,AVX512FP16,FUTURE */ + /* 240(f6 7d 08) 301 001(ac) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFNMADD213PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+47821, 565, 7236}, + /* 2 : VFNMADD213PH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.nds.256.66.map6.w0 ac /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 28) 301 001(ac) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFNMADD213PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+47830, 565, 7237}, + /* 3 : VFNMADD213PH ymmreg|mask|z,ymmrm256|b16 [r+vm:fv: evex.nds.256.66.map6.w0 ac /r ] ND,AVX512VL,AVX512FP16,FUTURE */ + /* 240(f6 7d 28) 301 001(ac) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFNMADD213PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+47839, 565, 7237}, + /* 4 : VFNMADD213PH zmmreg|mask|z,zmmreg*,zmmrm512|b16|er [rvm:fv: evex.nds.512.66.map6.w0 ac /r ] AVX512FP16,FUTURE */ + /* 241(f6 7d 48) 301 001(ac) 120 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFNMADD213PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+47848, 566, 7238}, + /* 5 : VFNMADD213PH zmmreg|mask|z,zmmrm512|b16|er [r+vm:fv: evex.nds.512.66.map6.w0 ac /r ] ND,AVX512FP16,FUTURE */ + /* 240(f6 7d 48) 301 001(ac) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFNMADD213PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+47857, 566, 7238}, +}; + +static const struct itemplate instrux_VFNMADD231PH[6] = { + /* 0 : VFNMADD231PH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.nds.128.66.map6.w0 bc /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 08) 301 001(bc) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFNMADD231PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+47866, 565, 7239}, + /* 1 : VFNMADD231PH xmmreg|mask|z,xmmrm128|b16 [r+vm:fv: evex.nds.128.66.map6.w0 bc /r ] ND,AVX512VL,AVX512FP16,FUTURE */ + /* 240(f6 7d 08) 301 001(bc) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFNMADD231PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+47875, 565, 7239}, + /* 2 : VFNMADD231PH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.nds.256.66.map6.w0 bc /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 28) 301 001(bc) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFNMADD231PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+47884, 565, 7240}, + /* 3 : VFNMADD231PH ymmreg|mask|z,ymmrm256|b16 [r+vm:fv: evex.nds.256.66.map6.w0 bc /r ] ND,AVX512VL,AVX512FP16,FUTURE */ + /* 240(f6 7d 28) 301 001(bc) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFNMADD231PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+47893, 565, 7240}, + /* 4 : VFNMADD231PH zmmreg|mask|z,zmmreg*,zmmrm512|b16|er [rvm:fv: evex.nds.512.66.map6.w0 bc /r ] AVX512FP16,FUTURE */ + /* 241(f6 7d 48) 301 001(bc) 120 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFNMADD231PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+47902, 566, 7241}, + /* 5 : VFNMADD231PH zmmreg|mask|z,zmmrm512|b16|er [r+vm:fv: evex.nds.512.66.map6.w0 bc /r ] ND,AVX512FP16,FUTURE */ + /* 240(f6 7d 48) 301 001(bc) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFNMADD231PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+47911, 566, 7241}, +}; + +static const struct itemplate instrux_VFMADD132SH[2] = { + /* 0 : VFMADD132SH xmmreg|mask|z,xmmreg*,xmmrm16|er [rvm:t1s: evex.nds.lig.66.map6.w0 99 /r ] AVX512FP16,FUTURE */ + /* 241(f6 7d 08) 306 001(99) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFMADD132SH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+47920, 567, 7242}, + /* 1 : VFMADD132SH xmmreg|mask|z,xmmrm16|er [r+vm:t1s: evex.nds.lig.66.map6.w0 99 /r ] ND,AVX512FP16,FUTURE */ + /* 240(f6 7d 08) 306 001(99) 110 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFMADD132SH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+47929, 567, 7242}, +}; + +static const struct itemplate instrux_VFMADD213SH[2] = { + /* 0 : VFMADD213SH xmmreg|mask|z,xmmreg*,xmmrm16|er [rvm:t1s: evex.nds.lig.66.map6.w0 a9 /r ] AVX512FP16,FUTURE */ + /* 241(f6 7d 08) 306 001(a9) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFMADD213SH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+47938, 567, 7243}, + /* 1 : VFMADD213SH xmmreg|mask|z,xmmrm16|er [r+vm:t1s: evex.nds.lig.66.map6.w0 a9 /r ] ND,AVX512FP16,FUTURE */ + /* 240(f6 7d 08) 306 001(a9) 110 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFMADD213SH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+47947, 567, 7243}, +}; + +static const struct itemplate instrux_VFMADD231SH[2] = { + /* 0 : VFMADD231SH xmmreg|mask|z,xmmreg*,xmmrm16|er [rvm:t1s: evex.nds.lig.66.map6.w0 b9 /r ] AVX512FP16,FUTURE */ + /* 241(f6 7d 08) 306 001(b9) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFMADD231SH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+47956, 567, 7244}, + /* 1 : VFMADD231SH xmmreg|mask|z,xmmrm16|er [r+vm:t1s: evex.nds.lig.66.map6.w0 b9 /r ] ND,AVX512FP16,FUTURE */ + /* 240(f6 7d 08) 306 001(b9) 110 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFMADD231SH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+47965, 567, 7244}, +}; + +static const struct itemplate instrux_VFNMADD132SH[2] = { + /* 0 : VFNMADD132SH xmmreg|mask|z,xmmreg*,xmmrm16|er [rvm:t1s: evex.nds.lig.66.map6.w0 9d /r ] AVX512FP16,FUTURE */ + /* 241(f6 7d 08) 306 001(9d) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFNMADD132SH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+47974, 567, 7245}, + /* 1 : VFNMADD132SH xmmreg|mask|z,xmmrm16|er [r+vm:t1s: evex.nds.lig.66.map6.w0 9d /r ] ND,AVX512FP16,FUTURE */ + /* 240(f6 7d 08) 306 001(9d) 110 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFNMADD132SH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+47983, 567, 7245}, +}; + +static const struct itemplate instrux_VFNMADD213SH[2] = { + /* 0 : VFNMADD213SH xmmreg|mask|z,xmmreg*,xmmrm16|er [rvm:t1s: evex.nds.lig.66.map6.w0 ad /r ] AVX512FP16,FUTURE */ + /* 241(f6 7d 08) 306 001(ad) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFNMADD213SH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+47992, 567, 7246}, + /* 1 : VFNMADD213SH xmmreg|mask|z,xmmrm16|er [r+vm:t1s: evex.nds.lig.66.map6.w0 ad /r ] ND,AVX512FP16,FUTURE */ + /* 240(f6 7d 08) 306 001(ad) 110 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFNMADD213SH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+48001, 567, 7246}, +}; + +static const struct itemplate instrux_VFNMADD231SH[2] = { + /* 0 : VFNMADD231SH xmmreg|mask|z,xmmreg*,xmmrm16|er [rvm:t1s: evex.nds.lig.66.map6.w0 bd /r ] AVX512FP16,FUTURE */ + /* 241(f6 7d 08) 306 001(bd) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFNMADD231SH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+48010, 567, 7247}, + /* 1 : VFNMADD231SH xmmreg|mask|z,xmmrm16|er [r+vm:t1s: evex.nds.lig.66.map6.w0 bd /r ] ND,AVX512FP16,FUTURE */ + /* 240(f6 7d 08) 306 001(bd) 110 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFNMADD231SH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+48019, 567, 7247}, +}; + +static const struct itemplate instrux_VFMSUB132PH[6] = { + /* 0 : VFMSUB132PH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.nds.128.66.map6.w0 9a /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 08) 301 001(9a) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMSUB132PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+48028, 565, 7248}, + /* 1 : VFMSUB132PH xmmreg|mask|z,xmmrm128|b16 [r+vm:fv: evex.nds.128.66.map6.w0 9a /r ] ND,AVX512VL,AVX512FP16,FUTURE */ + /* 240(f6 7d 08) 301 001(9a) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMSUB132PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+48037, 565, 7248}, + /* 2 : VFMSUB132PH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.nds.256.66.map6.w0 9a /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 28) 301 001(9a) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMSUB132PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+48046, 565, 7249}, + /* 3 : VFMSUB132PH ymmreg|mask|z,ymmrm256|b16 [r+vm:fv: evex.nds.256.66.map6.w0 9a /r ] ND,AVX512VL,AVX512FP16,FUTURE */ + /* 240(f6 7d 28) 301 001(9a) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMSUB132PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+48055, 565, 7249}, + /* 4 : VFMSUB132PH zmmreg|mask|z,zmmreg*,zmmrm512|b16|er [rvm:fv: evex.nds.512.66.map6.w0 9a /r ] AVX512FP16,FUTURE */ + /* 241(f6 7d 48) 301 001(9a) 120 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFMSUB132PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+48064, 566, 7250}, + /* 5 : VFMSUB132PH zmmreg|mask|z,zmmrm512|b16|er [r+vm:fv: evex.nds.512.66.map6.w0 9a /r ] ND,AVX512FP16,FUTURE */ + /* 240(f6 7d 48) 301 001(9a) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFMSUB132PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+48073, 566, 7250}, +}; + +static const struct itemplate instrux_VFMSUB213PH[6] = { + /* 0 : VFMSUB213PH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.nds.128.66.map6.w0 aa /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 08) 301 001(aa) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMSUB213PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+48082, 565, 7251}, + /* 1 : VFMSUB213PH xmmreg|mask|z,xmmrm128|b16 [r+vm:fv: evex.nds.128.66.map6.w0 aa /r ] ND,AVX512VL,AVX512FP16,FUTURE */ + /* 240(f6 7d 08) 301 001(aa) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMSUB213PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+48091, 565, 7251}, + /* 2 : VFMSUB213PH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.nds.256.66.map6.w0 aa /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 28) 301 001(aa) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMSUB213PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+48100, 565, 7252}, + /* 3 : VFMSUB213PH ymmreg|mask|z,ymmrm256|b16 [r+vm:fv: evex.nds.256.66.map6.w0 aa /r ] ND,AVX512VL,AVX512FP16,FUTURE */ + /* 240(f6 7d 28) 301 001(aa) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMSUB213PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+48109, 565, 7252}, + /* 4 : VFMSUB213PH zmmreg|mask|z,zmmreg*,zmmrm512|b16|er [rvm:fv: evex.nds.512.66.map6.w0 aa /r ] AVX512FP16,FUTURE */ + /* 241(f6 7d 48) 301 001(aa) 120 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFMSUB213PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+48118, 566, 7253}, + /* 5 : VFMSUB213PH zmmreg|mask|z,zmmrm512|b16|er [r+vm:fv: evex.nds.512.66.map6.w0 aa /r ] ND,AVX512FP16,FUTURE */ + /* 240(f6 7d 48) 301 001(aa) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFMSUB213PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+48127, 566, 7253}, +}; + +static const struct itemplate instrux_VFMSUB231PH[6] = { + /* 0 : VFMSUB231PH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.nds.128.66.map6.w0 ba /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 08) 301 001(ba) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMSUB231PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+48136, 565, 7254}, + /* 1 : VFMSUB231PH xmmreg|mask|z,xmmrm128|b16 [r+vm:fv: evex.nds.128.66.map6.w0 ba /r ] ND,AVX512VL,AVX512FP16,FUTURE */ + /* 240(f6 7d 08) 301 001(ba) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMSUB231PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+48145, 565, 7254}, + /* 2 : VFMSUB231PH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.nds.256.66.map6.w0 ba /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 28) 301 001(ba) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMSUB231PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+48154, 565, 7255}, + /* 3 : VFMSUB231PH ymmreg|mask|z,ymmrm256|b16 [r+vm:fv: evex.nds.256.66.map6.w0 ba /r ] ND,AVX512VL,AVX512FP16,FUTURE */ + /* 240(f6 7d 28) 301 001(ba) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMSUB231PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+48163, 565, 7255}, + /* 4 : VFMSUB231PH zmmreg|mask|z,zmmreg*,zmmrm512|b16|er [rvm:fv: evex.nds.512.66.map6.w0 ba /r ] AVX512FP16,FUTURE */ + /* 241(f6 7d 48) 301 001(ba) 120 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFMSUB231PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+48172, 566, 7256}, + /* 5 : VFMSUB231PH zmmreg|mask|z,zmmrm512|b16|er [r+vm:fv: evex.nds.512.66.map6.w0 ba /r ] ND,AVX512FP16,FUTURE */ + /* 240(f6 7d 48) 301 001(ba) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFMSUB231PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+48181, 566, 7256}, +}; + +static const struct itemplate instrux_VFNMSUB132PH[6] = { + /* 0 : VFNMSUB132PH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.nds.128.66.map6.w0 9e /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 08) 301 001(9e) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFNMSUB132PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+48190, 565, 7257}, + /* 1 : VFNMSUB132PH xmmreg|mask|z,xmmrm128|b16 [r+vm:fv: evex.nds.128.66.map6.w0 9e /r ] ND,AVX512VL,AVX512FP16,FUTURE */ + /* 240(f6 7d 08) 301 001(9e) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFNMSUB132PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+48199, 565, 7257}, + /* 2 : VFNMSUB132PH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.nds.256.66.map6.w0 9e /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 28) 301 001(9e) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFNMSUB132PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+48208, 565, 7258}, + /* 3 : VFNMSUB132PH ymmreg|mask|z,ymmrm256|b16 [r+vm:fv: evex.nds.256.66.map6.w0 9e /r ] ND,AVX512VL,AVX512FP16,FUTURE */ + /* 240(f6 7d 28) 301 001(9e) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFNMSUB132PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+48217, 565, 7258}, + /* 4 : VFNMSUB132PH zmmreg|mask|z,zmmreg*,zmmrm512|b16|er [rvm:fv: evex.nds.512.66.map6.w0 9e /r ] AVX512FP16,FUTURE */ + /* 241(f6 7d 48) 301 001(9e) 120 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFNMSUB132PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+48226, 566, 7259}, + /* 5 : VFNMSUB132PH zmmreg|mask|z,zmmrm512|b16|er [r+vm:fv: evex.nds.512.66.map6.w0 9e /r ] ND,AVX512FP16,FUTURE */ + /* 240(f6 7d 48) 301 001(9e) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFNMSUB132PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+48235, 566, 7259}, +}; + +static const struct itemplate instrux_VFNMSUB213PH[6] = { + /* 0 : VFNMSUB213PH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.nds.128.66.map6.w0 ae /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 08) 301 001(ae) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFNMSUB213PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+48244, 565, 7260}, + /* 1 : VFNMSUB213PH xmmreg|mask|z,xmmrm128|b16 [r+vm:fv: evex.nds.128.66.map6.w0 ae /r ] ND,AVX512VL,AVX512FP16,FUTURE */ + /* 240(f6 7d 08) 301 001(ae) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFNMSUB213PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+48253, 565, 7260}, + /* 2 : VFNMSUB213PH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.nds.256.66.map6.w0 ae /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 28) 301 001(ae) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFNMSUB213PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+48262, 565, 7261}, + /* 3 : VFNMSUB213PH ymmreg|mask|z,ymmrm256|b16 [r+vm:fv: evex.nds.256.66.map6.w0 ae /r ] ND,AVX512VL,AVX512FP16,FUTURE */ + /* 240(f6 7d 28) 301 001(ae) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFNMSUB213PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+48271, 565, 7261}, + /* 4 : VFNMSUB213PH zmmreg|mask|z,zmmreg*,zmmrm512|b16|er [rvm:fv: evex.nds.512.66.map6.w0 ae /r ] AVX512FP16,FUTURE */ + /* 241(f6 7d 48) 301 001(ae) 120 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFNMSUB213PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+48280, 566, 7262}, + /* 5 : VFNMSUB213PH zmmreg|mask|z,zmmrm512|b16|er [r+vm:fv: evex.nds.512.66.map6.w0 ae /r ] ND,AVX512FP16,FUTURE */ + /* 240(f6 7d 48) 301 001(ae) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFNMSUB213PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+48289, 566, 7262}, +}; + +static const struct itemplate instrux_VFNMSUB231PH[6] = { + /* 0 : VFNMSUB231PH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.nds.128.66.map6.w0 be /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 08) 301 001(be) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFNMSUB231PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+48298, 565, 7263}, + /* 1 : VFNMSUB231PH xmmreg|mask|z,xmmrm128|b16 [r+vm:fv: evex.nds.128.66.map6.w0 be /r ] ND,AVX512VL,AVX512FP16,FUTURE */ + /* 240(f6 7d 08) 301 001(be) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFNMSUB231PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+48307, 565, 7263}, + /* 2 : VFNMSUB231PH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.nds.256.66.map6.w0 be /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 28) 301 001(be) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFNMSUB231PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+48316, 565, 7264}, + /* 3 : VFNMSUB231PH ymmreg|mask|z,ymmrm256|b16 [r+vm:fv: evex.nds.256.66.map6.w0 be /r ] ND,AVX512VL,AVX512FP16,FUTURE */ + /* 240(f6 7d 28) 301 001(be) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFNMSUB231PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+48325, 565, 7264}, + /* 4 : VFNMSUB231PH zmmreg|mask|z,zmmreg*,zmmrm512|b16|er [rvm:fv: evex.nds.512.66.map6.w0 be /r ] AVX512FP16,FUTURE */ + /* 241(f6 7d 48) 301 001(be) 120 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFNMSUB231PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+48334, 566, 7265}, + /* 5 : VFNMSUB231PH zmmreg|mask|z,zmmrm512|b16|er [r+vm:fv: evex.nds.512.66.map6.w0 be /r ] ND,AVX512FP16,FUTURE */ + /* 240(f6 7d 48) 301 001(be) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFNMSUB231PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+48343, 566, 7265}, +}; + +static const struct itemplate instrux_VFMSUB132SH[2] = { + /* 0 : VFMSUB132SH xmmreg|mask|z,xmmreg*,xmmrm16|er [rvm:t1s: evex.nds.lig.66.map6.w0 9b /r ] AVX512FP16,FUTURE */ + /* 241(f6 7d 08) 306 001(9b) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFMSUB132SH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+48352, 567, 7266}, + /* 1 : VFMSUB132SH xmmreg|mask|z,xmmrm16|er [r+vm:t1s: evex.nds.lig.66.map6.w0 9b /r ] ND,AVX512FP16,FUTURE */ + /* 240(f6 7d 08) 306 001(9b) 110 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFMSUB132SH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+48361, 567, 7266}, +}; + +static const struct itemplate instrux_VFMSUB213SH[2] = { + /* 0 : VFMSUB213SH xmmreg|mask|z,xmmreg*,xmmrm16|er [rvm:t1s: evex.nds.lig.66.map6.w0 ab /r ] AVX512FP16,FUTURE */ + /* 241(f6 7d 08) 306 001(ab) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFMSUB213SH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+48370, 567, 7267}, + /* 1 : VFMSUB213SH xmmreg|mask|z,xmmrm16|er [r+vm:t1s: evex.nds.lig.66.map6.w0 ab /r ] ND,AVX512FP16,FUTURE */ + /* 240(f6 7d 08) 306 001(ab) 110 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFMSUB213SH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+48379, 567, 7267}, +}; + +static const struct itemplate instrux_VFMSUB231SH[2] = { + /* 0 : VFMSUB231SH xmmreg|mask|z,xmmreg*,xmmrm16|er [rvm:t1s: evex.nds.lig.66.map6.w0 bb /r ] AVX512FP16,FUTURE */ + /* 241(f6 7d 08) 306 001(bb) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFMSUB231SH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+48388, 567, 7268}, + /* 1 : VFMSUB231SH xmmreg|mask|z,xmmrm16|er [r+vm:t1s: evex.nds.lig.66.map6.w0 bb /r ] ND,AVX512FP16,FUTURE */ + /* 240(f6 7d 08) 306 001(bb) 110 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFMSUB231SH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+48397, 567, 7268}, +}; + +static const struct itemplate instrux_VFNMSUB132SH[2] = { + /* 0 : VFNMSUB132SH xmmreg|mask|z,xmmreg*,xmmrm16|er [rvm:t1s: evex.nds.lig.66.map6.w0 9f /r ] AVX512FP16,FUTURE */ + /* 241(f6 7d 08) 306 001(9f) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFNMSUB132SH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+48406, 567, 7269}, + /* 1 : VFNMSUB132SH xmmreg|mask|z,xmmrm16|er [r+vm:t1s: evex.nds.lig.66.map6.w0 9f /r ] ND,AVX512FP16,FUTURE */ + /* 240(f6 7d 08) 306 001(9f) 110 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFNMSUB132SH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+48415, 567, 7269}, +}; + +static const struct itemplate instrux_VFNMSUB213SH[2] = { + /* 0 : VFNMSUB213SH xmmreg|mask|z,xmmreg*,xmmrm16|er [rvm:t1s: evex.nds.lig.66.map6.w0 af /r ] AVX512FP16,FUTURE */ + /* 241(f6 7d 08) 306 001(af) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFNMSUB213SH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+48424, 567, 7270}, + /* 1 : VFNMSUB213SH xmmreg|mask|z,xmmrm16|er [r+vm:t1s: evex.nds.lig.66.map6.w0 af /r ] ND,AVX512FP16,FUTURE */ + /* 240(f6 7d 08) 306 001(af) 110 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFNMSUB213SH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+48433, 567, 7270}, +}; + +static const struct itemplate instrux_VFNMSUB231SH[2] = { + /* 0 : VFNMSUB231SH xmmreg|mask|z,xmmreg*,xmmrm16|er [rvm:t1s: evex.nds.lig.66.map6.w0 bf /r ] AVX512FP16,FUTURE */ + /* 241(f6 7d 08) 306 001(bf) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFNMSUB231SH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+48442, 567, 7271}, + /* 1 : VFNMSUB231SH xmmreg|mask|z,xmmrm16|er [r+vm:t1s: evex.nds.lig.66.map6.w0 bf /r ] ND,AVX512FP16,FUTURE */ + /* 240(f6 7d 08) 306 001(bf) 110 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFNMSUB231SH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+48451, 567, 7271}, +}; + +static const struct itemplate instrux_VFPCLASSPH[3] = { + /* 0 : VFPCLASSPH kreg|mask,xmmrm128|b16,imm8 [rmi:fv: evex.128.np.0f3a.w0 66 /r ib ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f3 7c 08) 301 001(66) 110 022 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFPCLASSPH, 3, {OPMASKREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK,B16,0,0,0}, nasm_bytecodes+22783, 565, 7272}, + /* 1 : VFPCLASSPH kreg|mask,ymmrm256|b16,imm8 [rmi:fv: evex.256.np.0f3a.w0 66 /r ib ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f3 7c 28) 301 001(66) 110 022 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFPCLASSPH, 3, {OPMASKREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK,B16,0,0,0}, nasm_bytecodes+22793, 565, 7273}, + /* 2 : VFPCLASSPH kreg|mask,zmmrm512|b16,imm8 [rmi:fv: evex.512.np.0f3a.w0 66 /r ib ] AVX512FP16,FUTURE */ + /* 250(f3 7c 48) 301 001(66) 110 022 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFPCLASSPH, 3, {OPMASKREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK,B16,0,0,0}, nasm_bytecodes+22803, 566, 7274}, +}; + +static const struct itemplate instrux_VFPCLASSSH[1] = { + /* 0 : VFPCLASSSH kreg|mask,xmmrm16,imm8 [rmi:t1s: evex.lig.np.0f3a.w0 67 /r ib ] AVX512FP16,FUTURE */ + /* 250(f3 7c 08) 306 001(67) 110 022 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFPCLASSSH, 3, {OPMASKREG,RM_XMM|BITS16,IMM_NORMAL|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+22813, 567, 7275}, +}; + +static const struct itemplate instrux_VGETEXPPH[3] = { + /* 0 : VGETEXPPH xmmreg|mask|z,xmmrm128|b16 [rm:fv: evex.128.66.map6.w0 42 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f6 7d 08) 301 001(42) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VGETEXPPH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+48460, 565, 7276}, + /* 1 : VGETEXPPH ymmreg|mask|z,ymmrm256|b16 [rm:fv: evex.256.66.map6.w0 42 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f6 7d 28) 301 001(42) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VGETEXPPH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+48469, 565, 7277}, + /* 2 : VGETEXPPH zmmreg|mask|z,zmmrm512|b16|sae [rm:fv: evex.512.66.map6.w0 42 /r ] AVX512FP16,FUTURE */ + /* 250(f6 7d 48) 301 001(42) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VGETEXPPH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+48478, 566, 7278}, +}; + +static const struct itemplate instrux_VGETEXPSH[1] = { + /* 0 : VGETEXPSH xmmreg|mask|z,xmmreg,xmmrm16|sae [rvm:t1s: evex.lig.66.map6.w0 43 /r ] AVX512FP16,FUTURE */ + /* 241(f6 7d 08) 306 001(43) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VGETEXPSH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+48487, 567, 7279}, +}; + +static const struct itemplate instrux_VGETMANTPH[3] = { + /* 0 : VGETMANTPH xmmreg|mask|z,xmmrm128|b16,imm8 [rmi:fv: evex.128.np.0f3a.w0 26 /r ib ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f3 7c 08) 301 001(26) 110 022 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VGETMANTPH, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+22823, 565, 7280}, + /* 1 : VGETMANTPH ymmreg|mask|z,ymmrm256|b16,imm8 [rmi:fv: evex.256.np.0f3a.w0 26 /r ib ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f3 7c 28) 301 001(26) 110 022 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VGETMANTPH, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+22833, 565, 7281}, + /* 2 : VGETMANTPH zmmreg|mask|z,zmmrm512|b16|sae,imm8 [rmi:fv: evex.512.np.0f3a.w0 26 /r ib ] AVX512FP16,FUTURE */ + /* 250(f3 7c 48) 301 001(26) 110 022 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VGETMANTPH, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+22843, 566, 7282}, +}; + +static const struct itemplate instrux_VGETMANTSH[1] = { + /* 0 : VGETMANTSH xmmreg|mask|z,xmmreg,xmmrm16|sae,imm8 [rvmi:t1s: evex.lig.np.0f3a.w0 27 /r ib ] AVX512FP16,FUTURE */ + /* 241(f3 7c 08) 306 001(27) 120 023 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VGETMANTSH, 4, {XMMREG,XMMREG,RM_XMM|BITS16,IMM_NORMAL|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+22853, 567, 7283}, +}; + +static const struct itemplate instrux_VMAXPH[12] = { + /* 0 : VMAXPH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.128.np.map5.w0 5f /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f5 7c 08) 301 001(5f) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VMAXPH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+48496, 565, 7284}, + /* 1 : VMAXPH xmmreg|mask|z,xmmrm128|b16 [r+vm:fv: evex.128.np.map5.w0 5f /r ] ND,AVX512VL,AVX512FP16,FUTURE */ + /* 240(f5 7c 08) 301 001(5f) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VMAXPH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+48505, 565, 7284}, + /* 2 : VMAXPH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.256.np.map5.w0 5f /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f5 7c 28) 301 001(5f) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VMAXPH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+48514, 565, 7285}, + /* 3 : VMAXPH ymmreg|mask|z,ymmrm256|b16 [r+vm:fv: evex.256.np.map5.w0 5f /r ] ND,AVX512VL,AVX512FP16,FUTURE */ + /* 240(f5 7c 28) 301 001(5f) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VMAXPH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+48523, 565, 7285}, + /* 4 : VMAXPH zmmreg|mask|z,zmmreg*,zmmrm512|b16|sae [rvm:fv: evex.512.np.map5.w0 5f /r ] AVX512FP16,FUTURE */ + /* 241(f5 7c 48) 301 001(5f) 120 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VMAXPH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|SAE,0,0}, nasm_bytecodes+48532, 566, 7286}, + /* 5 : VMAXPH zmmreg|mask|z,zmmrm512|b16|sae [r+vm:fv: evex.512.np.map5.w0 5f /r ] ND,AVX512FP16,FUTURE */ + /* 240(f5 7c 48) 301 001(5f) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VMAXPH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+48541, 566, 7286}, + /* 6 : VMAXPH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.128.np.map5.w0 57 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f5 7c 08) 301 001(57) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VMAXPH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49063, 565, 7335}, + /* 7 : VMAXPH xmmreg|mask|z,xmmrm128|b16 [r+vm:fv: evex.128.np.map5.w0 57 /r ] ND,AVX512VL,AVX512FP16,FUTURE */ + /* 240(f5 7c 08) 301 001(57) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VMAXPH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+49072, 565, 7335}, + /* 8 : VMAXPH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.256.np.map5.w0 57 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f5 7c 28) 301 001(57) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VMAXPH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49081, 565, 7336}, + /* 9 : VMAXPH ymmreg|mask|z,ymmrm256|b16 [r+vm:fv: evex.256.np.map5.w0 57 /r ] ND,AVX512VL,AVX512FP16,FUTURE */ + /* 240(f5 7c 28) 301 001(57) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VMAXPH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+49090, 565, 7336}, + /* 10 : VMAXPH zmmreg|mask|z,zmmreg*,zmmrm512|b16|sae [rvm:fv: evex.512.np.map5.w0 57 /r ] AVX512FP16,FUTURE */ + /* 241(f5 7c 48) 301 001(57) 120 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VMAXPH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|SAE,0,0}, nasm_bytecodes+49099, 566, 7337}, + /* 11 : VMAXPH zmmreg|mask|z,zmmrm512|b16|sae [r+vm:fv: evex.512.np.map5.w0 57 /r ] ND,AVX512FP16,FUTURE */ + /* 240(f5 7c 48) 301 001(57) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VMAXPH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+49108, 566, 7337}, +}; + +static const struct itemplate instrux_VMAXSH[3] = { + /* 0 : VMAXSH xmmreg|mask|z,xmmreg,xmmrm16|sae [rvm:t1s: evex.lig.f3.map5.w0 5f /r ] AVX512FP16,FUTURE */ + /* 241(f5 7e 08) 306 001(5f) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VMAXSH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+48550, 567, 7287}, + /* 1 : VMAXSH xmmreg|mask|z,xmmreg*,xmmrm16|sae [rvm:t1s: evex.lig.f3.map5.w0 57 /r ] AVX512FP16,FUTURE */ + /* 241(f5 7e 08) 306 001(57) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VMAXSH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+49117, 567, 7338}, + /* 2 : VMAXSH xmmreg|mask|z,xmmrm16|sae [r+vm:t1s: evex.lig.f3.map5.w0 57 /r ] ND,AVX512FP16,FUTURE */ + /* 240(f5 7e 08) 306 001(57) 110 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VMAXSH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+49126, 567, 7338}, +}; + +static const struct itemplate instrux_VMINPH[12] = { + /* 0 : VMINPH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.128.np.map5.w0 5d /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f5 7c 08) 301 001(5d) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VMINPH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+48559, 565, 7288}, + /* 1 : VMINPH xmmreg|mask|z,xmmrm128|b16 [r+vm:fv: evex.128.np.map5.w0 5d /r ] ND,AVX512VL,AVX512FP16,FUTURE */ + /* 240(f5 7c 08) 301 001(5d) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VMINPH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+48568, 565, 7288}, + /* 2 : VMINPH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.256.np.map5.w0 5d /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f5 7c 28) 301 001(5d) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VMINPH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+48577, 565, 7289}, + /* 3 : VMINPH ymmreg|mask|z,ymmrm256|b16 [r+vm:fv: evex.256.np.map5.w0 5d /r ] ND,AVX512VL,AVX512FP16,FUTURE */ + /* 240(f5 7c 28) 301 001(5d) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VMINPH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+48586, 565, 7289}, + /* 4 : VMINPH zmmreg|mask|z,zmmreg*,zmmrm512|b16|sae [rvm:fv: evex.512.np.map5.w0 5d /r ] AVX512FP16,FUTURE */ + /* 241(f5 7c 48) 301 001(5d) 120 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VMINPH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|SAE,0,0}, nasm_bytecodes+48595, 566, 7290}, + /* 5 : VMINPH zmmreg|mask|z,zmmrm512|b16|sae [r+vm:fv: evex.512.np.map5.w0 5d /r ] ND,AVX512FP16,FUTURE */ + /* 240(f5 7c 48) 301 001(5d) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VMINPH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+48604, 566, 7290}, + /* 6 : VMINPH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.128.np.map5.w0 5d /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f5 7c 08) 301 001(5d) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VMINPH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+48559, 565, 7331}, + /* 7 : VMINPH xmmreg|mask|z,xmmrm128|b16 [r+vm:fv: evex.128.np.map5.w0 5d /r ] ND,AVX512VL,AVX512FP16,FUTURE */ + /* 240(f5 7c 08) 301 001(5d) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VMINPH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+48568, 565, 7331}, + /* 8 : VMINPH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.256.np.map5.w0 5d /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f5 7c 28) 301 001(5d) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VMINPH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+48577, 565, 7332}, + /* 9 : VMINPH ymmreg|mask|z,ymmrm256|b16 [r+vm:fv: evex.256.np.map5.w0 5d /r ] ND,AVX512VL,AVX512FP16,FUTURE */ + /* 240(f5 7c 28) 301 001(5d) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VMINPH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+48586, 565, 7332}, + /* 10 : VMINPH zmmreg|mask|z,zmmreg*,zmmrm512|b16|sae [rvm:fv: evex.512.np.map5.w0 5d /r ] AVX512FP16,FUTURE */ + /* 241(f5 7c 48) 301 001(5d) 120 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VMINPH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|SAE,0,0}, nasm_bytecodes+48595, 566, 7333}, + /* 11 : VMINPH zmmreg|mask|z,zmmrm512|b16|sae [r+vm:fv: evex.512.np.map5.w0 5d /r ] ND,AVX512FP16,FUTURE */ + /* 240(f5 7c 48) 301 001(5d) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VMINPH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+48604, 566, 7333}, +}; + +static const struct itemplate instrux_VMINSH[3] = { + /* 0 : VMINSH xmmreg|mask|z,xmmreg,xmmrm16|sae [rvm:t1s: evex.lig.f3.map5.w0 5d /r ] AVX512FP16,FUTURE */ + /* 241(f5 7e 08) 306 001(5d) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VMINSH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+48613, 567, 7291}, + /* 1 : VMINSH xmmreg|mask|z,xmmreg*,xmmrm16|sae [rvm:t1s: evex.lig.f3.map5.w0 5d /r ] AVX512FP16,FUTURE */ + /* 241(f5 7e 08) 306 001(5d) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VMINSH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+48613, 567, 7334}, + /* 2 : VMINSH xmmreg|mask|z,xmmrm16|sae [r+vm:t1s: evex.lig.f3.map5.w0 5d /r ] ND,AVX512FP16,FUTURE */ + /* 240(f5 7e 08) 306 001(5d) 110 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VMINSH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+49054, 567, 7334}, +}; + +static const struct itemplate instrux_VMOVSH[6] = { + /* 0 : VMOVSH xmmreg|mask|z,mem16 [rm:t1s16: evex.lig.f3.map5.w0 10 /r ] AVX512FP16,FUTURE */ + /* 250(f5 7e 08) 305 001(10) 110 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VMOVSH, 2, {XMMREG,MEMORY|BITS16,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+48622, 567, 7292}, + /* 1 : VMOVSH mem16|mask,xmmreg [mr:t1s16: evex.lig.f3.map5.w0 11 /r ] AVX512FP16,FUTURE */ + /* 250(f5 7e 08) 305 001(11) 101 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VMOVSH, 2, {MEMORY|BITS16,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+48631, 567, 7293}, + /* 2 : VMOVSH xmmreg|mask|z,xmmreg*,xmmreg [rvm: evex.nds.lig.f3.map5.w0 10 /r ] AVX512FP16,FUTURE */ + /* 241(f5 7e 08) 300 001(10) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VMOVSH, 3, {XMMREG,XMMREG,XMMREG,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+48640, 567, 7294}, + /* 3 : VMOVSH xmmreg|mask|z,xmmreg [r+vm: evex.nds.lig.f3.map5.w0 10 /r ] ND,AVX512FP16,FUTURE */ + /* 240(f5 7e 08) 300 001(10) 110 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VMOVSH, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+48649, 567, 7294}, + /* 4 : VMOVSH xmmreg|mask|z,xmmreg*,xmmreg [rvm: evex.nds.lig.f3.map5.w0 11 /r ] AVX512FP16,FUTURE */ + /* 241(f5 7e 08) 300 001(11) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VMOVSH, 3, {XMMREG,XMMREG,XMMREG,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+48658, 567, 7295}, + /* 5 : VMOVSH xmmreg|mask|z,xmmreg [r+vm: evex.nds.lig.f3.map5.w0 11 /r ] ND,AVX512FP16,FUTURE */ + /* 240(f5 7e 08) 300 001(11) 110 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VMOVSH, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+48667, 567, 7295}, +}; + +static const struct itemplate instrux_VMOVW[4] = { + /* 0 : VMOVW xmmreg|mask|z,rm16 [rm:t1s: evex.128.66.map5.wig 6e /r ] AVX512FP16,FUTURE */ + /* 250(f5 7d 08) 306 001(6e) 110 : WIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VMOVW, 2, {XMMREG,RM_GPR|BITS16,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+48676, 636, 7296}, + /* 1 : VMOVW rm16,xmmreg [mr:t1s: evex.128.66.map5.wig 7e /r ] AVX512FP16,FUTURE */ + /* 250(f5 7d 08) 306 001(7e) 101 : WIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VMOVW, 2, {RM_GPR|BITS16,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+48685, 636, 7297}, + /* 2 : VMOVW xmmreg,xmmrm16 [rm:t1s: evex.128.f3.map5.w0 6e /r ] AVX10_2,FUTURE */ + /* 250(f5 7e 08) 306 001(6e) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VMOVW, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+51178, 644, 7644}, + /* 3 : VMOVW xmmrm16,xmmreg [mr:t1s: evex.128.f3.map5.w0 7e /r ] AVX10_2,FUTURE */ + /* 250(f5 7e 08) 306 001(7e) 101 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VMOVW, 2, {RM_XMM|BITS16,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+51187, 644, 7645}, +}; + +static const struct itemplate instrux_VMULPH[6] = { + /* 0 : VMULPH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.nds.128.np.map5.w0 59 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f5 7c 08) 301 001(59) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VMULPH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+48694, 565, 7298}, + /* 1 : VMULPH xmmreg|mask|z,xmmrm128|b16 [r+vm:fv: evex.nds.128.np.map5.w0 59 /r ] ND,AVX512VL,AVX512FP16,FUTURE */ + /* 240(f5 7c 08) 301 001(59) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VMULPH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+48703, 565, 7298}, + /* 2 : VMULPH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.nds.256.np.map5.w0 59 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f5 7c 28) 301 001(59) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VMULPH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+48712, 565, 7299}, + /* 3 : VMULPH ymmreg|mask|z,ymmrm256|b16 [r+vm:fv: evex.nds.256.np.map5.w0 59 /r ] ND,AVX512VL,AVX512FP16,FUTURE */ + /* 240(f5 7c 28) 301 001(59) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VMULPH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+48721, 565, 7299}, + /* 4 : VMULPH zmmreg|mask|z,zmmreg*,zmmrm512|b16 [rvm:fv: evex.nds.512.np.map5.w0 59 /r ] AVX512FP16,FUTURE */ + /* 241(f5 7c 48) 301 001(59) 120 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VMULPH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+48730, 566, 7300}, + /* 5 : VMULPH zmmreg|mask|z,zmmrm512|b16 [r+vm:fv: evex.nds.512.np.map5.w0 59 /r ] ND,AVX512FP16,FUTURE */ + /* 240(f5 7c 48) 301 001(59) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VMULPH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+48739, 566, 7300}, +}; + +static const struct itemplate instrux_VMULSH[2] = { + /* 0 : VMULSH xmmreg|mask|z,xmmreg*,xmmrm16|er [rvm:t1s16:evex.nds.lig.f3.map5.w0 59 /r ] AVX512FP16,FUTURE */ + /* 241(f5 7e 08) 305 001(59) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VMULSH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+48748, 567, 7301}, + /* 1 : VMULSH xmmreg|mask|z,xmmrm16|er [r+vm:t1s16:evex.nds.lig.f3.map5.w0 59 /r ] ND,AVX512FP16,FUTURE */ + /* 240(f5 7e 08) 305 001(59) 110 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VMULSH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+48757, 567, 7301}, +}; + +static const struct itemplate instrux_VRCPPH[3] = { + /* 0 : VRCPPH xmmreg|mask|z,xmmrm128|b16 [rm:fv: evex.128.66.map6.w0 4c /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f6 7d 08) 301 001(4c) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VRCPPH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+48766, 565, 7302}, + /* 1 : VRCPPH ymmreg|mask|z,ymmrm256|b16 [rm:fv: evex.256.66.map6.w0 4c /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f6 7d 28) 301 001(4c) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VRCPPH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+48775, 565, 7303}, + /* 2 : VRCPPH zmmreg|mask|z,zmmrm512|b16 [rm:fv: evex.512.66.map6.w0 4c /r ] AVX512FP16,FUTURE */ + /* 250(f6 7d 48) 301 001(4c) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VRCPPH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+48784, 566, 7304}, +}; + +static const struct itemplate instrux_VRCPSH[2] = { + /* 0 : VRCPSH xmmreg|mask|z,xmmreg*,xmmrm16|sae [rvm:t1s: evex.nds.lig.66.map6.w0 4d /r ] AVX512FP16,FUTURE */ + /* 241(f6 7d 08) 306 001(4d) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VRCPSH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+48793, 567, 7305}, + /* 1 : VRCPSH xmmreg|mask|z,xmmrm16|sae [r+vm:t1s: evex.nds.lig.66.map6.w0 4d /r ] ND,AVX512FP16,FUTURE */ + /* 240(f6 7d 08) 306 001(4d) 110 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VRCPSH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+48802, 567, 7305}, +}; + +static const struct itemplate instrux_VREDUCEPH[3] = { + /* 0 : VREDUCEPH xmmreg|mask|z,xmmrm128|b16,imm8 [rmi:fv: evex.128.np.0f3a.w0 56 /r ib ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f3 7c 08) 301 001(56) 110 022 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VREDUCEPH, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+22863, 565, 7306}, + /* 1 : VREDUCEPH ymmreg|mask|z,ymmrm256|b16,imm8 [rmi:fv: evex.256.np.0f3a.w0 56 /r ib ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f3 7c 28) 301 001(56) 110 022 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VREDUCEPH, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+22873, 565, 7307}, + /* 2 : VREDUCEPH zmmreg|mask|z,zmmrm512|b16|sae,imm8 [rmi:fv: evex.512.np.0f3a.w0 56 /r ib ] AVX512FP16,FUTURE */ + /* 250(f3 7c 48) 301 001(56) 110 022 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VREDUCEPH, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+22883, 566, 7308}, +}; + +static const struct itemplate instrux_VREDUCESH[2] = { + /* 0 : VREDUCESH xmmreg|mask|z,xmmreg*,xmmrm16|sae,imm8 [rvmi:t1s: evex.nds.lig.np.0f3a.w0 57 /r ib ] AVX512FP16,FUTURE */ + /* 241(f3 7c 08) 306 001(57) 120 023 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VREDUCESH, 4, {XMMREG,XMMREG,RM_XMM|BITS16,IMM_NORMAL|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+22893, 567, 7309}, + /* 1 : VREDUCESH xmmreg|mask|z,xmmrm16|sae,imm8 [r+vmi:t1s: evex.nds.lig.np.0f3a.w0 57 /r ib ] ND,AVX512FP16,FUTURE */ + /* 240(f3 7c 08) 306 001(57) 110 022 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VREDUCESH, 3, {XMMREG,RM_XMM|BITS16,IMM_NORMAL|BITS8,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+22903, 567, 7309}, +}; + +static const struct itemplate instrux_VENDSCALEPH[3] = { + /* 0 : VENDSCALEPH xmmreg|mask|z,xmmrm128|b16,imm8 [rmi:fv: evex.128.np.0f3a.w0 08 /r ib ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f3 7c 08) 301 001(08) 110 022 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VENDSCALEPH, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+21563, 565, 7310}, + /* 1 : VENDSCALEPH ymmreg|mask|z,ymmrm256|b16,imm8 [rmi:fv: evex.256.np.0f3a.w0 08 /r ib ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f3 7c 28) 301 001(08) 110 022 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VENDSCALEPH, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+21573, 565, 7311}, + /* 2 : VENDSCALEPH zmmreg|mask|z,zmmrm512|b16|sae,imm8 [rmi:fv: evex.512.np.0f3a.w0 08 /r ib ] AVX512FP16,FUTURE */ + /* 250(f3 7c 48) 301 001(08) 110 022 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VENDSCALEPH, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+21583, 566, 7312}, +}; + +static const struct itemplate instrux_VENDSCALESH[2] = { + /* 0 : VENDSCALESH xmmreg|mask|z,xmmreg*,xmmrm16|sae,imm8 [rvmi:t1s: evex.nds.lig.np.0f3a.w0 0a /r ib ] AVX512FP16,FUTURE */ + /* 241(f3 7c 08) 306 001(0a) 120 023 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VENDSCALESH, 4, {XMMREG,XMMREG,RM_XMM|BITS16,IMM_NORMAL|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+21643, 567, 7313}, + /* 1 : VENDSCALESH xmmreg|mask|z,xmmrm16|sae,imm8 [r+vmi:t1s: evex.nds.lig.np.0f3a.w0 0a /r ib ] ND,AVX512FP16,FUTURE */ + /* 240(f3 7c 08) 306 001(0a) 110 022 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VENDSCALESH, 3, {XMMREG,RM_XMM|BITS16,IMM_NORMAL|BITS8,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+21653, 567, 7313}, +}; + +static const struct itemplate instrux_VRSQRTPH[3] = { + /* 0 : VRSQRTPH xmmreg|mask|z,xmmrm128|b16 [rm:fv: evex.128.66.map6.w0 4e /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f6 7d 08) 301 001(4e) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VRSQRTPH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+48811, 565, 7314}, + /* 1 : VRSQRTPH ymmreg|mask|z,ymmrm256|b16 [rm:fv: evex.256.66.map6.w0 4e /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f6 7d 28) 301 001(4e) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VRSQRTPH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+48820, 565, 7315}, + /* 2 : VRSQRTPH zmmreg|mask|z,zmmrm512|b16|sae [rm:fv: evex.512.66.map6.w0 4e /r ] AVX512FP16,FUTURE */ + /* 250(f6 7d 48) 301 001(4e) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VRSQRTPH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+48829, 566, 7316}, +}; + +static const struct itemplate instrux_VRSQRTSH[2] = { + /* 0 : VRSQRTSH xmmreg|mask|z,xmmreg*,xmmrm16|sae [rvm:t1s: evex.nds.lig.66.map6.w0 4f /r ] AVX512FP16,FUTURE */ + /* 241(f6 7d 08) 306 001(4f) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VRSQRTSH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+48838, 567, 7317}, + /* 1 : VRSQRTSH xmmreg|mask|z,xmmrm16|sae [r+vm:t1s: evex.nds.lig.66.map6.w0 4f /r ] ND,AVX512FP16,FUTURE */ + /* 240(f6 7d 08) 306 001(4f) 110 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VRSQRTSH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+48847, 567, 7317}, +}; + +static const struct itemplate instrux_VSCALEFPH[6] = { + /* 0 : VSCALEFPH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.nds.128.66.map6.w0 2c /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 08) 301 001(2c) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VSCALEFPH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+48856, 565, 7318}, + /* 1 : VSCALEFPH xmmreg|mask|z,xmmrm128|b16 [r+vm:fv: evex.nds.128.66.map6.w0 2c /r ] ND,AVX512VL,AVX512FP16,FUTURE */ + /* 240(f6 7d 08) 301 001(2c) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VSCALEFPH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+48865, 565, 7318}, + /* 2 : VSCALEFPH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.nds.256.66.map6.w0 2c /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 28) 301 001(2c) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VSCALEFPH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+48874, 565, 7319}, + /* 3 : VSCALEFPH ymmreg|mask|z,ymmrm256|b16 [r+vm:fv: evex.nds.256.66.map6.w0 2c /r ] ND,AVX512VL,AVX512FP16,FUTURE */ + /* 240(f6 7d 28) 301 001(2c) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VSCALEFPH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+48883, 565, 7319}, + /* 4 : VSCALEFPH zmmreg|mask|z,zmmreg*,zmmrm512|b16|er [rvm:fv: evex.nds.512.66.map6.w0 2c /r ] AVX512FP16,FUTURE */ + /* 241(f6 7d 48) 301 001(2c) 120 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VSCALEFPH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+48892, 566, 7320}, + /* 5 : VSCALEFPH zmmreg|mask|z,zmmrm512|b16|er [r+vm:fv: evex.nds.512.66.map6.w0 2c /r ] ND,AVX512FP16,FUTURE */ + /* 240(f6 7d 48) 301 001(2c) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VSCALEFPH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+48901, 566, 7320}, +}; + +static const struct itemplate instrux_VSCALEFSH[2] = { + /* 0 : VSCALEFSH xmmreg|mask|z,xmmreg*,xmmrm16|er [rvm:t1s: evex.nds.lig.66.map6.w0 2d /r ] AVX512FP16,FUTURE */ + /* 241(f6 7d 08) 306 001(2d) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VSCALEFSH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+48910, 567, 7321}, + /* 1 : VSCALEFSH xmmreg|mask|z,xmmrm16|er [r+vm:t1s: evex.nds.lig.66.map6.w0 2d /r ] ND,AVX512FP16,FUTURE */ + /* 240(f6 7d 08) 306 001(2d) 110 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VSCALEFSH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+48919, 567, 7321}, +}; + +static const struct itemplate instrux_VSQRTPH[3] = { + /* 0 : VSQRTPH xmmreg|mask|z,xmmrm128|b16 [rm:fv: evex.128.np.map5.w0 51 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7c 08) 301 001(51) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VSQRTPH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+48928, 565, 7322}, + /* 1 : VSQRTPH ymmreg|mask|z,ymmrm256|b16 [rm:fv: evex.256.np.map5.w0 51 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7c 28) 301 001(51) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VSQRTPH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+48937, 565, 7323}, + /* 2 : VSQRTPH zmmreg|mask|z,zmmrm512|b16|er [rm:fv: evex.512.np.map5.w0 51 /r ] AVX512FP16,FUTURE */ + /* 250(f5 7c 48) 301 001(51) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VSQRTPH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+48946, 566, 7324}, +}; + +static const struct itemplate instrux_VSQRTSH[2] = { + /* 0 : VSQRTSH xmmreg|mask|z,xmmreg*,xmmrm16|er [rvm:t1s: evex.nds.lig.f3.map5.w0 51 /r ] AVX512FP16,FUTURE */ + /* 241(f5 7e 08) 306 001(51) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VSQRTSH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+48955, 567, 7325}, + /* 1 : VSQRTSH xmmreg|mask|z,xmmrm16|er [r+vm:t1s: evex.nds.lig.f3.map5.w0 51 /r ] ND,AVX512FP16,FUTURE */ + /* 240(f5 7e 08) 306 001(51) 110 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VSQRTSH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+48964, 567, 7325}, +}; + +static const struct itemplate instrux_VSUBPH[6] = { + /* 0 : VSUBPH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.nds.128.np.map5.w0 5c /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f5 7c 08) 301 001(5c) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VSUBPH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+48973, 565, 7326}, + /* 1 : VSUBPH xmmreg|mask|z,xmmrm128|b16 [r+vm:fv: evex.nds.128.np.map5.w0 5c /r ] ND,AVX512VL,AVX512FP16,FUTURE */ + /* 240(f5 7c 08) 301 001(5c) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VSUBPH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+48982, 565, 7326}, + /* 2 : VSUBPH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.nds.256.np.map5.w0 5c /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f5 7c 28) 301 001(5c) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VSUBPH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+48991, 565, 7327}, + /* 3 : VSUBPH ymmreg|mask|z,ymmrm256|b16 [r+vm:fv: evex.nds.256.np.map5.w0 5c /r ] ND,AVX512VL,AVX512FP16,FUTURE */ + /* 240(f5 7c 28) 301 001(5c) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VSUBPH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+49000, 565, 7327}, + /* 4 : VSUBPH zmmreg|mask|z,zmmreg*,zmmrm512|b16|er [rvm:fv: evex.nds.512.np.map5.w0 5c /r ] AVX512FP16,FUTURE */ + /* 241(f5 7c 48) 301 001(5c) 120 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VSUBPH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+49009, 566, 7328}, + /* 5 : VSUBPH zmmreg|mask|z,zmmrm512|b16|er [r+vm:fv: evex.nds.512.np.map5.w0 5c /r ] ND,AVX512FP16,FUTURE */ + /* 240(f5 7c 48) 301 001(5c) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VSUBPH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+49018, 566, 7328}, +}; + +static const struct itemplate instrux_VSUBSH[2] = { + /* 0 : VSUBSH xmmreg|mask|z,xmmreg*,xmmrm16|er [rvm:t1s16:evex.nds.lig.f3.map5.w0 5c /r ] AVX512FP16,FUTURE */ + /* 241(f5 7e 08) 305 001(5c) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VSUBSH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+49027, 567, 7329}, + /* 1 : VSUBSH xmmreg|mask|z,xmmrm16|er [r+vm:t1s16:evex.nds.lig.f3.map5.w0 5c /r ] ND,AVX512FP16,FUTURE */ + /* 240(f5 7e 08) 305 001(5c) 110 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VSUBSH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,ER,0,0,0}, nasm_bytecodes+49036, 567, 7329}, +}; + +static const struct itemplate instrux_VUCOMISH[1] = { + /* 0 : VUCOMISH xmmreg,xmmrm16|sae [rm:t1s: evex.lig.np.map5.w0 2e /r ] FL,AVX512FP16,FUTURE */ + /* 250(f5 7c 08) 306 001(2e) 110 : LIG,FL,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VUCOMISH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+49045, 635, 7330}, +}; + +static const struct itemplate instrux_AADD[4] = { + /* 0 : AADD mem32,reg32 [mr: o32 np 0f38 fc /r ] AR0-1,SQ,LONG,PROT,RAOINT,X86_64 */ + /* 321 360 356 001(fc) 101 : AR0,AR1,SQ,NOAPX,LONG,PROT,RAOINT,X86_64 */ + {I_AADD, 2, {MEMORY|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66317, 637, 7341}, + /* 1 : AADD mem64,reg64 [mr: o64 np 0f38 fc /r ] AR0-1,SQ,LONG,PROT,RAOINT,X86_64 */ + /* 324 360 356 001(fc) 101 : AR0,AR1,SQ,NOAPX,LONG,PROT,RAOINT,X86_64 */ + {I_AADD, 2, {MEMORY|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66324, 637, 7342}, + /* 2 : AADD mem32,reg32 [mr: evex.nf0.nd0.l0.np.m4.o32 fc /r ] AR0-1,SQ,LONG,PROT,RAOINT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(fc) 101 : AR0,AR1,SQ,WW,LONG,EVEX,PROT,RAOINT,APX,X86_64 */ + {I_AADD, 2, {MEMORY|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+22913, 638, 7343}, + /* 3 : AADD mem64,reg64 [mr: evex.nf0.nd0.l0.np.m4.o64 fc /r ] AR0-1,SQ,LONG,PROT,RAOINT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(fc) 101 : AR0,AR1,SQ,WW,LONG,EVEX,PROT,RAOINT,APX,X86_64 */ + {I_AADD, 2, {MEMORY|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+22923, 638, 7344}, +}; + +static const struct itemplate instrux_AAND[4] = { + /* 0 : AAND mem32,reg32 [mr: o32 66 0f38 fc /r ] AR0-1,SQ,LONG,PROT,RAOINT,X86_64 */ + /* 321 361 356 001(fc) 101 : AR0,AR1,SQ,NOAPX,LONG,PROT,RAOINT,X86_64 */ + {I_AAND, 2, {MEMORY|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66331, 637, 7345}, + /* 1 : AAND mem64,reg64 [mr: o64 66 0f38 fc /r ] AR0-1,SQ,LONG,PROT,RAOINT,X86_64 */ + /* 324 361 356 001(fc) 101 : AR0,AR1,SQ,NOAPX,LONG,PROT,RAOINT,X86_64 */ + {I_AAND, 2, {MEMORY|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66338, 637, 7346}, + /* 2 : AAND mem32,reg32 [mr: evex.nf0.nd0.l0.66.m4.o32 fc /r ] AR0-1,SQ,LONG,PROT,RAOINT,APX,X86_64 */ + /* 250(f4 7d 08) 300 321 001(fc) 101 : AR0,AR1,SQ,WW,LONG,EVEX,PROT,RAOINT,APX,X86_64 */ + {I_AAND, 2, {MEMORY|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+22933, 638, 7347}, + /* 3 : AAND mem64,reg64 [mr: evex.nf0.nd0.l0.66.m4.o64 fc /r ] AR0-1,SQ,LONG,PROT,RAOINT,APX,X86_64 */ + /* 250(f4 fd 08) 300 324 001(fc) 101 : AR0,AR1,SQ,WW,LONG,EVEX,PROT,RAOINT,APX,X86_64 */ + {I_AAND, 2, {MEMORY|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+22943, 638, 7348}, +}; + +static const struct itemplate instrux_AOR[4] = { + /* 0 : AOR mem32,reg32 [mr: o32 f2 0f38 fc /r ] AR0-1,SQ,LONG,PROT,RAOINT,X86_64 */ + /* 321 332 356 001(fc) 101 : AR0,AR1,SQ,NOAPX,LONG,PROT,RAOINT,X86_64 */ + {I_AOR, 2, {MEMORY|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66345, 637, 7349}, + /* 1 : AOR mem64,reg64 [mr: o64 f2 0f38 fc /r ] AR0-1,SQ,LONG,PROT,RAOINT,X86_64 */ + /* 324 332 356 001(fc) 101 : AR0,AR1,SQ,NOAPX,LONG,PROT,RAOINT,X86_64 */ + {I_AOR, 2, {MEMORY|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66352, 637, 7350}, + /* 2 : AOR mem32,reg32 [mr: evex.nf0.nd0.l0.f2.m4.o32 fc /r ] AR0-1,SQ,LONG,PROT,RAOINT,APX,X86_64 */ + /* 250(f4 7f 08) 300 321 001(fc) 101 : AR0,AR1,SQ,WW,LONG,EVEX,PROT,RAOINT,APX,X86_64 */ + {I_AOR, 2, {MEMORY|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+22953, 638, 7351}, + /* 3 : AOR mem64,reg64 [mr: evex.nf0.nd0.l0.f2.m4.o64 fc /r ] AR0-1,SQ,LONG,PROT,RAOINT,APX,X86_64 */ + /* 250(f4 ff 08) 300 324 001(fc) 101 : AR0,AR1,SQ,WW,LONG,EVEX,PROT,RAOINT,APX,X86_64 */ + {I_AOR, 2, {MEMORY|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+22963, 638, 7352}, +}; + +static const struct itemplate instrux_AXOR[4] = { + /* 0 : AXOR mem32,reg32 [mr: o32 f3 0f38 fc /r ] AR0-1,SQ,LONG,PROT,RAOINT,X86_64 */ + /* 321 333 356 001(fc) 101 : AR0,AR1,SQ,NOAPX,LONG,PROT,RAOINT,X86_64 */ + {I_AXOR, 2, {MEMORY|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66359, 637, 7353}, + /* 1 : AXOR mem64,reg64 [mr: o64 f3 0f38 fc /r ] AR0-1,SQ,LONG,PROT,RAOINT,X86_64 */ + /* 324 333 356 001(fc) 101 : AR0,AR1,SQ,NOAPX,LONG,PROT,RAOINT,X86_64 */ + {I_AXOR, 2, {MEMORY|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66366, 637, 7354}, + /* 2 : AXOR mem32,reg32 [mr: evex.nf0.nd0.l0.f3.m4.o32 fc /r ] AR0-1,SQ,LONG,PROT,RAOINT,APX,X86_64 */ + /* 250(f4 7e 08) 300 321 001(fc) 101 : AR0,AR1,SQ,WW,LONG,EVEX,PROT,RAOINT,APX,X86_64 */ + {I_AXOR, 2, {MEMORY|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+22973, 638, 7355}, + /* 3 : AXOR mem64,reg64 [mr: evex.nf0.nd0.l0.f3.m4.o64 fc /r ] AR0-1,SQ,LONG,PROT,RAOINT,APX,X86_64 */ + /* 250(f4 fe 08) 300 324 001(fc) 101 : AR0,AR1,SQ,WW,LONG,EVEX,PROT,RAOINT,APX,X86_64 */ + {I_AXOR, 2, {MEMORY|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+22983, 638, 7356}, +}; + +static const struct itemplate instrux_CLUI[1] = { + /* 0 : CLUI void [ f3 0f 01 ee ] LONG,PROT,UINTR,X86_64 */ + /* 333 355 002(01 ee) : LONG,PROT,UINTR,X86_64 */ + {I_CLUI, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70161, 639, 7359}, +}; + +static const struct itemplate instrux_SENDUIPI[1] = { + /* 0 : SENDUIPI reg64 [m: o64nw f3 0f c7 /6 ] LONG,PROT,UINTR,X86_64 */ + /* 323 333 355 001(c7) 206 : NWSIZE,LONG,PROT,UINTR,X86_64 */ + {I_SENDUIPI, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+66373, 640, 7360}, +}; + +static const struct itemplate instrux_STUI[1] = { + /* 0 : STUI void [ f3 0f 01 ef ] LONG,PROT,UINTR,X86_64 */ + /* 333 355 002(01 ef) : LONG,PROT,UINTR,X86_64 */ + {I_STUI, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70167, 639, 7361}, +}; + +static const struct itemplate instrux_TESTUI[1] = { + /* 0 : TESTUI void [ f3 0f 01 ed ] LONG,FL,PROT,UINTR,X86_64 */ + /* 333 355 002(01 ed) : LONG,FL,PROT,UINTR,X86_64 */ + {I_TESTUI, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70173, 641, 7362}, +}; + +static const struct itemplate instrux_UIRET[1] = { + /* 0 : UIRET void [ f3 0f 01 ec ] LONG,FL,PROT,UINTR,X86_64 */ + /* 333 355 002(01 ec) : LONG,FL,PROT,UINTR,X86_64 */ + {I_UIRET, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70179, 641, 7363}, +}; + +static const struct itemplate instrux_HRESET[2] = { + /* 0 : HRESET imm,reg_eax [i-: f3 0f3a f0 c0 ib ] AR0-1,SB,PRIV,HRESET,FUTURE */ + /* 333 357 002(f0 c0) 020 : AR0,AR1,SB,NOAPX,PRIV,HRESET,FUTURE */ + {I_HRESET, 2, {IMM_NORMAL,REG_EAX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66380, 642, 7368}, + /* 1 : HRESET imm [i: f3 0f3a f0 c0 ib ] ND,AR0,SB,PRIV,HRESET,FUTURE */ + /* 333 357 002(f0 c0) 020 : AR0,SB,NOAPX,PRIV,HRESET,FUTURE */ + {I_HRESET, 1, {IMM_NORMAL,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+66380, 643, 7369}, +}; + +static const struct itemplate instrux_VADDBF16[3] = { + /* 0 : VADDBF16 xmmreg|mask|z,xmmreg,xmmrm128|b16 [rvm:fv: evex.128.66.map5.w0 58 /r ] AVX10_2,FUTURE */ + /* 241(f5 7d 08) 301 001(58) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VADDBF16, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49135, 644, 7372}, + /* 1 : VADDBF16 ymmreg|mask|z,ymmreg,ymmrm256|b16 [rvm:fv: evex.256.66.map5.w0 58 /r ] AVX10_2,FUTURE */ + /* 241(f5 7d 28) 301 001(58) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VADDBF16, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49144, 644, 7373}, + /* 2 : VADDBF16 zmmreg|mask|z,zmmreg,zmmrm512|b16 [rvm:fv: evex.512.66.map5.w0 58 /r ] AVX10_2,FUTURE */ + /* 241(f5 7d 48) 301 001(58) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VADDBF16, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49153, 644, 7374}, +}; + +static const struct itemplate instrux_VCMPBF16[3] = { + /* 0 : VCMPBF16 kreg|mask,xmmreg,xmmrm128|b16,imm8 [rvmi:fv: evex.128.f2.0f3a.w0 c2 /r ib ] AVX10_2,FUTURE */ + /* 241(f3 7f 08) 301 001(c2) 120 023 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCMPBF16, 4, {OPMASKREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK,0,B16,0,0}, nasm_bytecodes+22993, 644, 7375}, + /* 1 : VCMPBF16 kreg|mask,ymmreg,ymmrm256|b16,imm8 [rvmi:fv: evex.256.f2.0f3a.w0 c2 /r ib ] AVX10_2,FUTURE */ + /* 241(f3 7f 28) 301 001(c2) 120 023 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCMPBF16, 4, {OPMASKREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK,0,B16,0,0}, nasm_bytecodes+23003, 644, 7376}, + /* 2 : VCMPBF16 kreg|mask,zmmreg,zmmrm512|b16,imm8 [rvmi:fv: evex.512.f2.0f3a.w0 c2 /r ib ] AVX10_2,FUTURE */ + /* 241(f3 7f 48) 301 001(c2) 120 023 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCMPBF16, 4, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK,0,B16,0,0}, nasm_bytecodes+23013, 644, 7377}, +}; + +static const struct itemplate instrux_VCOMISBF16[1] = { + /* 0 : VCOMISBF16 xmmreg,xmmrm16 [rm:t1s: evex.lig.66.map5.w0 2f /r ] AVX10_2,FUTURE */ + /* 250(f5 7d 08) 306 001(2f) 110 : LIG,EVEX,PROT,AVX10_2,FUTURE */ + {I_VCOMISBF16, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+49162, 645, 7378}, +}; + +static const struct itemplate instrux_VDIVBF16[3] = { + /* 0 : VDIVBF16 xmmreg|mask|z,xmmreg,xmmrm128|b16 [rvm:fv: evex.128.66.map5.w0 5e /r ] AVX10_2,FUTURE */ + /* 241(f5 7d 08) 301 001(5e) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VDIVBF16, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49171, 644, 7379}, + /* 1 : VDIVBF16 ymmreg|mask|z,ymmreg,ymmrm256|b16 [rvm:fv: evex.256.66.map5.w0 5e /r ] AVX10_2,FUTURE */ + /* 241(f5 7d 28) 301 001(5e) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VDIVBF16, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49180, 644, 7380}, + /* 2 : VDIVBF16 zmmreg|mask|z,zmmreg,zmmrm512|b16 [rvm:fv: evex.512.66.map5.w0 5e /r ] AVX10_2,FUTURE */ + /* 241(f5 7d 48) 301 001(5e) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VDIVBF16, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49189, 644, 7381}, +}; + +static const struct itemplate instrux_VFMADD132BF16[3] = { + /* 0 : VFMADD132BF16 xmmreg|mask|z,xmmreg,xmmrm128|b16 [rvm:fv: evex.128.np.map6.w0 98 /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 08) 301 001(98) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFMADD132BF16, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49198, 644, 7382}, + /* 1 : VFMADD132BF16 ymmreg|mask|z,ymmreg,ymmrm256|b16 [rvm:fv: evex.256.np.map6.w0 98 /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 28) 301 001(98) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFMADD132BF16, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49207, 644, 7383}, + /* 2 : VFMADD132BF16 zmmreg|mask|z,zmmreg,zmmrm512|b16 [rvm:fv: evex.512.np.map6.w0 98 /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 48) 301 001(98) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFMADD132BF16, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49216, 644, 7384}, +}; + +static const struct itemplate instrux_VFMADD213BF16[3] = { + /* 0 : VFMADD213BF16 xmmreg|mask|z,xmmreg,xmmrm128|b16 [rvm:fv: evex.128.np.map6.w0 a8 /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 08) 301 001(a8) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFMADD213BF16, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49225, 644, 7385}, + /* 1 : VFMADD213BF16 ymmreg|mask|z,ymmreg,ymmrm256|b16 [rvm:fv: evex.256.np.map6.w0 a8 /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 28) 301 001(a8) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFMADD213BF16, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49234, 644, 7386}, + /* 2 : VFMADD213BF16 zmmreg|mask|z,zmmreg,zmmrm512|b16 [rvm:fv: evex.512.np.map6.w0 a8 /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 48) 301 001(a8) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFMADD213BF16, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49243, 644, 7387}, +}; + +static const struct itemplate instrux_VFMADD231BF16[3] = { + /* 0 : VFMADD231BF16 xmmreg|mask|z,xmmreg,xmmrm128|b16 [rvm:fv: evex.128.np.map6.w0 b8 /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 08) 301 001(b8) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFMADD231BF16, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49252, 644, 7388}, + /* 1 : VFMADD231BF16 ymmreg|mask|z,ymmreg,ymmrm256|b16 [rvm:fv: evex.256.np.map6.w0 b8 /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 28) 301 001(b8) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFMADD231BF16, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49261, 644, 7389}, + /* 2 : VFMADD231BF16 zmmreg|mask|z,zmmreg,zmmrm512|b16 [rvm:fv: evex.512.np.map6.w0 b8 /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 48) 301 001(b8) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFMADD231BF16, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49270, 644, 7390}, +}; + +static const struct itemplate instrux_VFMSUB132BF16[3] = { + /* 0 : VFMSUB132BF16 xmmreg|mask|z,xmmreg,xmmrm128|b16 [rvm:fv: evex.128.np.map6.w0 9a /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 08) 301 001(9a) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFMSUB132BF16, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49279, 644, 7391}, + /* 1 : VFMSUB132BF16 ymmreg|mask|z,ymmreg,ymmrm256|b16 [rvm:fv: evex.256.np.map6.w0 9a /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 28) 301 001(9a) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFMSUB132BF16, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49288, 644, 7392}, + /* 2 : VFMSUB132BF16 zmmreg|mask|z,zmmreg,zmmrm512|b16 [rvm:fv: evex.512.np.map6.w0 9a /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 48) 301 001(9a) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFMSUB132BF16, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49297, 644, 7393}, +}; + +static const struct itemplate instrux_VFMSUB213BF16[3] = { + /* 0 : VFMSUB213BF16 xmmreg|mask|z,xmmreg,xmmrm128|b16 [rvm:fv: evex.128.np.map6.w0 aa /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 08) 301 001(aa) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFMSUB213BF16, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49306, 644, 7394}, + /* 1 : VFMSUB213BF16 ymmreg|mask|z,ymmreg,ymmrm256|b16 [rvm:fv: evex.256.np.map6.w0 aa /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 28) 301 001(aa) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFMSUB213BF16, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49315, 644, 7395}, + /* 2 : VFMSUB213BF16 zmmreg|mask|z,zmmreg,zmmrm512|b16 [rvm:fv: evex.512.np.map6.w0 aa /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 48) 301 001(aa) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFMSUB213BF16, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49324, 644, 7396}, +}; + +static const struct itemplate instrux_VFMSUB231BF16[3] = { + /* 0 : VFMSUB231BF16 xmmreg|mask|z,xmmreg,xmmrm128|b16 [rvm:fv: evex.128.np.map6.w0 ba /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 08) 301 001(ba) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFMSUB231BF16, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49333, 644, 7397}, + /* 1 : VFMSUB231BF16 ymmreg|mask|z,ymmreg,ymmrm256|b16 [rvm:fv: evex.256.np.map6.w0 ba /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 28) 301 001(ba) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFMSUB231BF16, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49342, 644, 7398}, + /* 2 : VFMSUB231BF16 zmmreg|mask|z,zmmreg,zmmrm512|b16 [rvm:fv: evex.512.np.map6.w0 ba /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 48) 301 001(ba) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFMSUB231BF16, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49351, 644, 7399}, +}; + +static const struct itemplate instrux_VFNMADD132BF16[3] = { + /* 0 : VFNMADD132BF16 xmmreg|mask|z,xmmreg,xmmrm128|b16 [rvm:fv: evex.128.np.map6.w0 9c /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 08) 301 001(9c) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFNMADD132BF16, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49360, 644, 7400}, + /* 1 : VFNMADD132BF16 ymmreg|mask|z,ymmreg,ymmrm256|b16 [rvm:fv: evex.256.np.map6.w0 9c /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 28) 301 001(9c) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFNMADD132BF16, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49369, 644, 7401}, + /* 2 : VFNMADD132BF16 zmmreg|mask|z,zmmreg,zmmrm512|b16 [rvm:fv: evex.512.np.map6.w0 9c /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 48) 301 001(9c) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFNMADD132BF16, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49378, 644, 7402}, +}; + +static const struct itemplate instrux_VFNMADD213BF16[3] = { + /* 0 : VFNMADD213BF16 xmmreg|mask|z,xmmreg,xmmrm128|b16 [rvm:fv: evex.128.np.map6.w0 ac /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 08) 301 001(ac) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFNMADD213BF16, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49387, 644, 7403}, + /* 1 : VFNMADD213BF16 ymmreg|mask|z,ymmreg,ymmrm256|b16 [rvm:fv: evex.256.np.map6.w0 ac /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 28) 301 001(ac) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFNMADD213BF16, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49396, 644, 7404}, + /* 2 : VFNMADD213BF16 zmmreg|mask|z,zmmreg,zmmrm512|b16 [rvm:fv: evex.512.np.map6.w0 ac /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 48) 301 001(ac) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFNMADD213BF16, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49405, 644, 7405}, +}; + +static const struct itemplate instrux_VFNMADD231BF16[3] = { + /* 0 : VFNMADD231BF16 xmmreg|mask|z,xmmreg,xmmrm128|b16 [rvm:fv: evex.128.np.map6.w0 bc /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 08) 301 001(bc) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFNMADD231BF16, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49414, 644, 7406}, + /* 1 : VFNMADD231BF16 ymmreg|mask|z,ymmreg,ymmrm256|b16 [rvm:fv: evex.256.np.map6.w0 bc /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 28) 301 001(bc) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFNMADD231BF16, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49423, 644, 7407}, + /* 2 : VFNMADD231BF16 zmmreg|mask|z,zmmreg,zmmrm512|b16 [rvm:fv: evex.512.np.map6.w0 bc /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 48) 301 001(bc) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFNMADD231BF16, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49432, 644, 7408}, +}; + +static const struct itemplate instrux_VFNMSUB132BF16[3] = { + /* 0 : VFNMSUB132BF16 xmmreg|mask|z,xmmreg,xmmrm128|b16 [rvm:fv: evex.128.np.map6.w0 9e /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 08) 301 001(9e) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFNMSUB132BF16, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49441, 644, 7409}, + /* 1 : VFNMSUB132BF16 ymmreg|mask|z,ymmreg,ymmrm256|b16 [rvm:fv: evex.256.np.map6.w0 9e /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 28) 301 001(9e) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFNMSUB132BF16, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49450, 644, 7410}, + /* 2 : VFNMSUB132BF16 zmmreg|mask|z,zmmreg,zmmrm512|b16 [rvm:fv: evex.512.np.map6.w0 9e /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 48) 301 001(9e) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFNMSUB132BF16, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49459, 644, 7411}, +}; + +static const struct itemplate instrux_VFNMSUB213BF16[3] = { + /* 0 : VFNMSUB213BF16 xmmreg|mask|z,xmmreg,xmmrm128|b16 [rvm:fv: evex.128.np.map6.w0 ae /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 08) 301 001(ae) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFNMSUB213BF16, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49468, 644, 7412}, + /* 1 : VFNMSUB213BF16 ymmreg|mask|z,ymmreg,ymmrm256|b16 [rvm:fv: evex.256.np.map6.w0 ae /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 28) 301 001(ae) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFNMSUB213BF16, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49477, 644, 7413}, + /* 2 : VFNMSUB213BF16 zmmreg|mask|z,zmmreg,zmmrm512|b16 [rvm:fv: evex.512.np.map6.w0 ae /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 48) 301 001(ae) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFNMSUB213BF16, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49486, 644, 7414}, +}; + +static const struct itemplate instrux_VFNMSUB231BF16[3] = { + /* 0 : VFNMSUB231BF16 xmmreg|mask|z,xmmreg,xmmrm128|b16 [rvm:fv: evex.128.np.map6.w0 be /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 08) 301 001(be) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFNMSUB231BF16, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49495, 644, 7415}, + /* 1 : VFNMSUB231BF16 ymmreg|mask|z,ymmreg,ymmrm256|b16 [rvm:fv: evex.256.np.map6.w0 be /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 28) 301 001(be) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFNMSUB231BF16, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49504, 644, 7416}, + /* 2 : VFNMSUB231BF16 zmmreg|mask|z,zmmreg,zmmrm512|b16 [rvm:fv: evex.512.np.map6.w0 be /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 48) 301 001(be) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFNMSUB231BF16, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49513, 644, 7417}, +}; + +static const struct itemplate instrux_VFPCLASSBF16[3] = { + /* 0 : VFPCLASSBF16 kreg|mask,xmmrm128|b16,imm8 [rmi:fv: evex.128.f2.0f3a.w0 66 /r ib ] AVX10_2,FUTURE */ + /* 250(f3 7f 08) 301 001(66) 110 022 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFPCLASSBF16, 3, {OPMASKREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK,B16,0,0,0}, nasm_bytecodes+23023, 644, 7418}, + /* 1 : VFPCLASSBF16 kreg|mask,ymmrm256|b16,imm8 [rmi:fv: evex.256.f2.0f3a.w0 66 /r ib ] AVX10_2,FUTURE */ + /* 250(f3 7f 28) 301 001(66) 110 022 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFPCLASSBF16, 3, {OPMASKREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK,B16,0,0,0}, nasm_bytecodes+23033, 644, 7419}, + /* 2 : VFPCLASSBF16 kreg|mask,zmmrm512|b16,imm8 [rmi:fv: evex.512.f2.0f3a.w0 66 /r ib ] AVX10_2,FUTURE */ + /* 250(f3 7f 48) 301 001(66) 110 022 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFPCLASSBF16, 3, {OPMASKREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK,B16,0,0,0}, nasm_bytecodes+23043, 644, 7420}, +}; + +static const struct itemplate instrux_VGETEXPBF16[3] = { + /* 0 : VGETEXPBF16 xmmreg|mask|z,xmmrm128|b16 [rm:fv: evex.128.np.map6.w0 42 /r ] AVX10_2,FUTURE */ + /* 250(f6 7c 08) 301 001(42) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VGETEXPBF16, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+49522, 644, 7421}, + /* 1 : VGETEXPBF16 ymmreg|mask|z,ymmrm256|b16 [rm:fv: evex.256.np.map6.w0 42 /r ] AVX10_2,FUTURE */ + /* 250(f6 7c 28) 301 001(42) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VGETEXPBF16, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+49531, 644, 7422}, + /* 2 : VGETEXPBF16 zmmreg|mask|z,zmmrm512|b16 [rm:fv: evex.512.np.map6.w0 42 /r ] AVX10_2,FUTURE */ + /* 250(f6 7c 48) 301 001(42) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VGETEXPBF16, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+49540, 644, 7423}, +}; + +static const struct itemplate instrux_VGETMANTBF16[3] = { + /* 0 : VGETMANTBF16 xmmreg|mask|z,xmmrm128|b16,imm8 [rmi:fv: evex.128.f2.0f3a.w0 26 /r ib ] AVX10_2,FUTURE */ + /* 250(f3 7f 08) 301 001(26) 110 022 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VGETMANTBF16, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+23053, 644, 7424}, + /* 1 : VGETMANTBF16 ymmreg|mask|z,ymmrm256|b16,imm8 [rmi:fv: evex.256.f2.0f3a.w0 26 /r ib ] AVX10_2,FUTURE */ + /* 250(f3 7f 28) 301 001(26) 110 022 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VGETMANTBF16, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+23063, 644, 7425}, + /* 2 : VGETMANTBF16 zmmreg|mask|z,zmmrm512|b16,imm8 [rmi:fv: evex.512.f2.0f3a.w0 26 /r ib ] AVX10_2,FUTURE */ + /* 250(f3 7f 48) 301 001(26) 110 022 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VGETMANTBF16, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+23073, 644, 7426}, +}; + +static const struct itemplate instrux_VMAXBF16[3] = { + /* 0 : VMAXBF16 xmmreg|mask|z,xmmreg,xmmrm128|b16 [rvm:fv: evex.128.66.map5.w0 5f /r ] AVX10_2,FUTURE */ + /* 241(f5 7d 08) 301 001(5f) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VMAXBF16, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49549, 644, 7427}, + /* 1 : VMAXBF16 ymmreg|mask|z,ymmreg,ymmrm256|b16 [rvm:fv: evex.256.66.map5.w0 5f /r ] AVX10_2,FUTURE */ + /* 241(f5 7d 28) 301 001(5f) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VMAXBF16, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49558, 644, 7428}, + /* 2 : VMAXBF16 zmmreg|mask|z,zmmreg,zmmrm512|b16 [rvm:fv: evex.512.66.map5.w0 5f /r ] AVX10_2,FUTURE */ + /* 241(f5 7d 48) 301 001(5f) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VMAXBF16, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49567, 644, 7429}, +}; + +static const struct itemplate instrux_VMINBF16[3] = { + /* 0 : VMINBF16 xmmreg|mask|z,xmmreg,xmmrm128|b16 [rvm:fv: evex.128.66.map5.w0 5d /r ] AVX10_2,FUTURE */ + /* 241(f5 7d 08) 301 001(5d) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VMINBF16, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49576, 644, 7430}, + /* 1 : VMINBF16 ymmreg|mask|z,ymmreg,ymmrm256|b16 [rvm:fv: evex.256.66.map5.w0 5d /r ] AVX10_2,FUTURE */ + /* 241(f5 7d 28) 301 001(5d) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VMINBF16, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49585, 644, 7431}, + /* 2 : VMINBF16 zmmreg|mask|z,zmmreg,zmmrm512|b16 [rvm:fv: evex.512.66.map5.w0 5d /r ] AVX10_2,FUTURE */ + /* 241(f5 7d 48) 301 001(5d) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VMINBF16, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49594, 644, 7432}, +}; + +static const struct itemplate instrux_VMULBF16[3] = { + /* 0 : VMULBF16 xmmreg|mask|z,xmmreg,xmmrm128|b16 [rvm:fv: evex.128.66.map5.w0 59 /r ] AVX10_2,FUTURE */ + /* 241(f5 7d 08) 301 001(59) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VMULBF16, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49603, 644, 7433}, + /* 1 : VMULBF16 ymmreg|mask|z,ymmreg,ymmrm256|b16 [rvm:fv: evex.256.66.map5.w0 59 /r ] AVX10_2,FUTURE */ + /* 241(f5 7d 28) 301 001(59) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VMULBF16, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49612, 644, 7434}, + /* 2 : VMULBF16 zmmreg|mask|z,zmmreg,zmmrm512|b16 [rvm:fv: evex.512.66.map5.w0 59 /r ] AVX10_2,FUTURE */ + /* 241(f5 7d 48) 301 001(59) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VMULBF16, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49621, 644, 7435}, +}; + +static const struct itemplate instrux_VRCPBF16[3] = { + /* 0 : VRCPBF16 xmmreg|mask|z,xmmrm128|b16 [rm:fv: evex.128.np.map6.w0 4c /r ] AVX10_2,FUTURE */ + /* 250(f6 7c 08) 301 001(4c) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VRCPBF16, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+49630, 644, 7436}, + /* 1 : VRCPBF16 ymmreg|mask|z,ymmrm256|b16 [rm:fv: evex.256.np.map6.w0 4c /r ] AVX10_2,FUTURE */ + /* 250(f6 7c 28) 301 001(4c) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VRCPBF16, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+49639, 644, 7437}, + /* 2 : VRCPBF16 zmmreg|mask|z,zmmrm512|b16 [rm:fv: evex.512.np.map6.w0 4c /r ] AVX10_2,FUTURE */ + /* 250(f6 7c 48) 301 001(4c) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VRCPBF16, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+49648, 644, 7438}, +}; + +static const struct itemplate instrux_VREDUCEBF16[3] = { + /* 0 : VREDUCEBF16 xmmreg|mask|z,xmmrm128|b16,imm8 [rmi:fv: evex.128.f2.0f3a.w0 56 /r ib ] AVX10_2,FUTURE */ + /* 250(f3 7f 08) 301 001(56) 110 022 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VREDUCEBF16, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+23083, 644, 7439}, + /* 1 : VREDUCEBF16 ymmreg|mask|z,ymmrm256|b16,imm8 [rmi:fv: evex.256.f2.0f3a.w0 56 /r ib ] AVX10_2,FUTURE */ + /* 250(f3 7f 28) 301 001(56) 110 022 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VREDUCEBF16, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+23093, 644, 7440}, + /* 2 : VREDUCEBF16 zmmreg|mask|z,zmmrm512|b16,imm8 [rmi:fv: evex.512.f2.0f3a.w0 56 /r ib ] AVX10_2,FUTURE */ + /* 250(f3 7f 48) 301 001(56) 110 022 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VREDUCEBF16, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+23103, 644, 7441}, +}; + +static const struct itemplate instrux_VRNDSCALEBF16[3] = { + /* 0 : VRNDSCALEBF16 xmmreg|mask|z,xmmrm128|b16,imm8 [rmi:fv: evex.128.f2.0f3a.w0 08 /r ib ] AVX10_2,FUTURE */ + /* 250(f3 7f 08) 301 001(08) 110 022 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VRNDSCALEBF16, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+23113, 644, 7442}, + /* 1 : VRNDSCALEBF16 ymmreg|mask|z,ymmrm256|b16,imm8 [rmi:fv: evex.256.f2.0f3a.w0 08 /r ib ] AVX10_2,FUTURE */ + /* 250(f3 7f 28) 301 001(08) 110 022 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VRNDSCALEBF16, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+23123, 644, 7443}, + /* 2 : VRNDSCALEBF16 zmmreg|mask|z,zmmrm512|b16,imm8 [rmi:fv: evex.512.f2.0f3a.w0 08 /r ib ] AVX10_2,FUTURE */ + /* 250(f3 7f 48) 301 001(08) 110 022 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VRNDSCALEBF16, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+23133, 644, 7444}, +}; + +static const struct itemplate instrux_VRSQRTBF16[3] = { + /* 0 : VRSQRTBF16 xmmreg|mask|z,xmmrm128|b16 [rm:fv: evex.128.np.map6.w0 4e /r ] AVX10_2,FUTURE */ + /* 250(f6 7c 08) 301 001(4e) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VRSQRTBF16, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+49657, 644, 7445}, + /* 1 : VRSQRTBF16 ymmreg|mask|z,ymmrm256|b16 [rm:fv: evex.256.np.map6.w0 4e /r ] AVX10_2,FUTURE */ + /* 250(f6 7c 28) 301 001(4e) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VRSQRTBF16, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+49666, 644, 7446}, + /* 2 : VRSQRTBF16 zmmreg|mask|z,zmmrm512|b16 [rm:fv: evex.512.np.map6.w0 4e /r ] AVX10_2,FUTURE */ + /* 250(f6 7c 48) 301 001(4e) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VRSQRTBF16, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+49675, 644, 7447}, +}; + +static const struct itemplate instrux_VSCALEFBF16[3] = { + /* 0 : VSCALEFBF16 xmmreg|mask|z,xmmreg,xmmrm128|b16 [rvm:fv: evex.128.np.map6.w0 2c /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 08) 301 001(2c) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VSCALEFBF16, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49684, 644, 7448}, + /* 1 : VSCALEFBF16 ymmreg|mask|z,ymmreg,ymmrm256|b16 [rvm:fv: evex.256.np.map6.w0 2c /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 28) 301 001(2c) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VSCALEFBF16, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49693, 644, 7449}, + /* 2 : VSCALEFBF16 zmmreg|mask|z,zmmreg,zmmrm512|b16 [rvm:fv: evex.512.np.map6.w0 2c /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 48) 301 001(2c) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VSCALEFBF16, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49702, 644, 7450}, +}; + +static const struct itemplate instrux_VSQRTBF16[3] = { + /* 0 : VSQRTBF16 xmmreg|mask|z,xmmrm128|b16 [rm:fv: evex.128.66.map5.w0 51 /r ] AVX10_2,FUTURE */ + /* 250(f5 7d 08) 301 001(51) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VSQRTBF16, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+49711, 644, 7451}, + /* 1 : VSQRTBF16 ymmreg|mask|z,ymmrm256|b16 [rm:fv: evex.256.66.map5.w0 51 /r ] AVX10_2,FUTURE */ + /* 250(f5 7d 28) 301 001(51) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VSQRTBF16, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+49720, 644, 7452}, + /* 2 : VSQRTBF16 zmmreg|mask|z,zmmrm512|b16 [rm:fv: evex.512.66.map5.w0 51 /r ] AVX10_2,FUTURE */ + /* 250(f5 7d 48) 301 001(51) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VSQRTBF16, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+49729, 644, 7453}, +}; + +static const struct itemplate instrux_VSUBBF16[3] = { + /* 0 : VSUBBF16 xmmreg|mask|z,xmmreg,xmmrm128|b16 [rvm:fv: evex.128.66.map5.w0 5c /r ] AVX10_2,FUTURE */ + /* 241(f5 7d 08) 301 001(5c) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VSUBBF16, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49738, 644, 7454}, + /* 1 : VSUBBF16 ymmreg|mask|z,ymmreg,ymmrm256|b16 [rvm:fv: evex.256.66.map5.w0 5c /r ] AVX10_2,FUTURE */ + /* 241(f5 7d 28) 301 001(5c) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VSUBBF16, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49747, 644, 7455}, + /* 2 : VSUBBF16 zmmreg|mask|z,zmmreg,zmmrm512|b16 [rvm:fv: evex.512.66.map5.w0 5c /r ] AVX10_2,FUTURE */ + /* 241(f5 7d 48) 301 001(5c) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VSUBBF16, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49756, 644, 7456}, +}; + +static const struct itemplate instrux_VCOMXSD[1] = { + /* 0 : VCOMXSD xmmreg,xmmrm64|sae [rm:t1s: evex.lig.f2.0f.w1 2f /r ] AVX10_2,FUTURE */ + /* 250(f1 ff 08) 306 001(2f) 110 : LIG,EVEX,PROT,AVX10_2,FUTURE */ + {I_VCOMXSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+49765, 645, 7459}, +}; + +static const struct itemplate instrux_VCOMXSH[1] = { + /* 0 : VCOMXSH xmmreg,xmmrm16|sae [rm:t1s: evex.lig.f3.map5.w0 2f /r ] AVX10_2,FUTURE */ + /* 250(f5 7e 08) 306 001(2f) 110 : LIG,EVEX,PROT,AVX10_2,FUTURE */ + {I_VCOMXSH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+49774, 645, 7460}, +}; + +static const struct itemplate instrux_VCOMXSS[1] = { + /* 0 : VCOMXSS xmmreg,xmmrm32|sae [rm:t1s: evex.lig.f3.0f.w0 2f /r ] AVX10_2,FUTURE */ + /* 250(f1 7e 08) 306 001(2f) 110 : LIG,EVEX,PROT,AVX10_2,FUTURE */ + {I_VCOMXSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+49783, 645, 7461}, +}; + +static const struct itemplate instrux_VUCOMXSD[1] = { + /* 0 : VUCOMXSD xmmreg,xmmrm64|sae [rm:t1s: evex.lig.f2.0f.w1 2e /r ] AVX10_2,FUTURE */ + /* 250(f1 ff 08) 306 001(2e) 110 : LIG,EVEX,PROT,AVX10_2,FUTURE */ + {I_VUCOMXSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+49792, 645, 7462}, +}; + +static const struct itemplate instrux_VUCOMXSH[1] = { + /* 0 : VUCOMXSH xmmreg,xmmrm16|sae [rm:t1s: evex.lig.f3.map5.w0 2e /r ] AVX10_2,FUTURE */ + /* 250(f5 7e 08) 306 001(2e) 110 : LIG,EVEX,PROT,AVX10_2,FUTURE */ + {I_VUCOMXSH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+49801, 645, 7463}, +}; + +static const struct itemplate instrux_VUCOMXSS[1] = { + /* 0 : VUCOMXSS xmmreg,xmmrm32|sae [rm:t1s: evex.lig.f3.0f.w0 2e /r ] AVX10_2,FUTURE */ + /* 250(f1 7e 08) 306 001(2e) 110 : LIG,EVEX,PROT,AVX10_2,FUTURE */ + {I_VUCOMXSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+49810, 645, 7464}, +}; + +static const struct itemplate instrux_VCVT2PH2BF8[3] = { + /* 0 : VCVT2PH2BF8 xmmreg|mask|z,xmmreg,xmmrm128|b16 [rvm:fv: evex.128.f2.0f38.w0 74 /r ] AVX10_2,FUTURE */ + /* 241(f2 7f 08) 301 001(74) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVT2PH2BF8, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49819, 644, 7467}, + /* 1 : VCVT2PH2BF8 ymmreg|mask|z,ymmreg,ymmrm256|b16 [rvm:fv: evex.256.f2.0f38.w0 74 /r ] AVX10_2,FUTURE */ + /* 241(f2 7f 28) 301 001(74) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVT2PH2BF8, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49828, 644, 7468}, + /* 2 : VCVT2PH2BF8 zmmreg|mask|z,zmmreg,zmmrm512|b16 [rvm:fv: evex.512.f2.0f38.w0 74 /r ] AVX10_2,FUTURE */ + /* 241(f2 7f 48) 301 001(74) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVT2PH2BF8, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49837, 644, 7469}, +}; + +static const struct itemplate instrux_VCVT2PH2BF8S[3] = { + /* 0 : VCVT2PH2BF8S xmmreg|mask|z,xmmreg,xmmrm128|b16 [rvm:fv: evex.128.f2.map5.w0 74 /r ] AVX10_2,FUTURE */ + /* 241(f5 7f 08) 301 001(74) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVT2PH2BF8S, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49846, 644, 7470}, + /* 1 : VCVT2PH2BF8S ymmreg|mask|z,ymmreg,ymmrm256|b16 [rvm:fv: evex.256.f2.map5.w0 74 /r ] AVX10_2,FUTURE */ + /* 241(f5 7f 28) 301 001(74) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVT2PH2BF8S, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49855, 644, 7471}, + /* 2 : VCVT2PH2BF8S zmmreg|mask|z,zmmreg,zmmrm512|b16 [rvm:fv: evex.512.f2.map5.w0 74 /r ] AVX10_2,FUTURE */ + /* 241(f5 7f 48) 301 001(74) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVT2PH2BF8S, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49864, 644, 7472}, +}; + +static const struct itemplate instrux_VCVT2PH2HF8[3] = { + /* 0 : VCVT2PH2HF8 xmmreg|mask|z,xmmreg,xmmrm128|b16 [rvm:fv: evex.128.f2.map5.w0 18 /r ] AVX10_2,FUTURE */ + /* 241(f5 7f 08) 301 001(18) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVT2PH2HF8, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49873, 644, 7473}, + /* 1 : VCVT2PH2HF8 ymmreg|mask|z,ymmreg,ymmrm256|b16 [rvm:fv: evex.256.f2.map5.w0 18 /r ] AVX10_2,FUTURE */ + /* 241(f5 7f 28) 301 001(18) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVT2PH2HF8, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49882, 644, 7474}, + /* 2 : VCVT2PH2HF8 zmmreg|mask|z,zmmreg,zmmrm512|b16 [rvm:fv: evex.512.f2.map5.w0 18 /r ] AVX10_2,FUTURE */ + /* 241(f5 7f 48) 301 001(18) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVT2PH2HF8, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49891, 644, 7475}, +}; + +static const struct itemplate instrux_VCVT2PH2HF8S[3] = { + /* 0 : VCVT2PH2HF8S xmmreg|mask|z,xmmreg,xmmrm128|b16 [rvm:fv: evex.128.f2.map5.w0 1b /r ] AVX10_2,FUTURE */ + /* 241(f5 7f 08) 301 001(1b) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVT2PH2HF8S, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49900, 644, 7476}, + /* 1 : VCVT2PH2HF8S ymmreg|mask|z,ymmreg,ymmrm256|b16 [rvm:fv: evex.256.f2.map5.w0 1b /r ] AVX10_2,FUTURE */ + /* 241(f5 7f 28) 301 001(1b) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVT2PH2HF8S, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49909, 644, 7477}, + /* 2 : VCVT2PH2HF8S zmmreg|mask|z,zmmreg,zmmrm512|b16 [rvm:fv: evex.512.f2.map5.w0 1b /r ] AVX10_2,FUTURE */ + /* 241(f5 7f 48) 301 001(1b) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVT2PH2HF8S, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49918, 644, 7478}, +}; + +static const struct itemplate instrux_VCVTPH2BF8[3] = { + /* 0 : VCVTPH2BF8 xmmreg|mask|z,xmmrm128|b16 [rm:fv: evex.128.f3.0f38.w0 74 /r ] AVX10_2,FUTURE */ + /* 250(f2 7e 08) 301 001(74) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTPH2BF8, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+49927, 644, 7479}, + /* 1 : VCVTPH2BF8 xmmreg|mask|z,ymmrm256|b16 [rm:fv: evex.256.f3.0f38.w0 74 /r ] AVX10_2,FUTURE */ + /* 250(f2 7e 28) 301 001(74) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTPH2BF8, 2, {XMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+49936, 644, 7480}, + /* 2 : VCVTPH2BF8 ymmreg|mask|z,zmmrm512|b16 [rm:fv: evex.512.f3.0f38.w0 74 /r ] AVX10_2,FUTURE */ + /* 250(f2 7e 48) 301 001(74) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTPH2BF8, 2, {YMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+49945, 644, 7481}, +}; + +static const struct itemplate instrux_VCVTPH2BF8S[3] = { + /* 0 : VCVTPH2BF8S xmmreg|mask|z,xmmrm128|b16 [rm:fv: evex.128.f3.map5.w0 74 /r ] AVX10_2,FUTURE */ + /* 250(f5 7e 08) 301 001(74) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTPH2BF8S, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+49954, 644, 7482}, + /* 1 : VCVTPH2BF8S xmmreg|mask|z,ymmrm256|b16 [rm:fv: evex.256.f3.map5.w0 74 /r ] AVX10_2,FUTURE */ + /* 250(f5 7e 28) 301 001(74) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTPH2BF8S, 2, {XMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+49963, 644, 7483}, + /* 2 : VCVTPH2BF8S ymmreg|mask|z,zmmrm512|b16 [rm:fv: evex.512.f3.map5.w0 74 /r ] AVX10_2,FUTURE */ + /* 250(f5 7e 48) 301 001(74) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTPH2BF8S, 2, {YMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+49972, 644, 7484}, +}; + +static const struct itemplate instrux_VCVTPH2HF8[3] = { + /* 0 : VCVTPH2HF8 xmmreg|mask|z,xmmrm128|b16 [rm:fv: evex.128.f3.map5.w0 18 /r ] AVX10_2,FUTURE */ + /* 250(f5 7e 08) 301 001(18) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTPH2HF8, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+49981, 644, 7485}, + /* 1 : VCVTPH2HF8 xmmreg|mask|z,ymmrm256|b16 [rm:fv: evex.256.f3.map5.w0 18 /r ] AVX10_2,FUTURE */ + /* 250(f5 7e 28) 301 001(18) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTPH2HF8, 2, {XMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+49990, 644, 7486}, + /* 2 : VCVTPH2HF8 ymmreg|mask|z,zmmrm512|b16 [rm:fv: evex.512.f3.map5.w0 18 /r ] AVX10_2,FUTURE */ + /* 250(f5 7e 48) 301 001(18) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTPH2HF8, 2, {YMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+49999, 644, 7487}, +}; + +static const struct itemplate instrux_VCVTPH2HF8S[3] = { + /* 0 : VCVTPH2HF8S xmmreg|mask|z,xmmrm128|b16 [rm:fv: evex.128.f3.map5.w0 1b /r ] AVX10_2,FUTURE */ + /* 250(f5 7e 08) 301 001(1b) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTPH2HF8S, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+50008, 644, 7488}, + /* 1 : VCVTPH2HF8S xmmreg|mask|z,ymmrm256|b16 [rm:fv: evex.256.f3.map5.w0 1b /r ] AVX10_2,FUTURE */ + /* 250(f5 7e 28) 301 001(1b) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTPH2HF8S, 2, {XMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+50017, 644, 7489}, + /* 2 : VCVTPH2HF8S ymmreg|mask|z,zmmrm512|b16 [rm:fv: evex.512.f3.map5.w0 1b /r ] AVX10_2,FUTURE */ + /* 250(f5 7e 48) 301 001(1b) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTPH2HF8S, 2, {YMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+50026, 644, 7490}, +}; + +static const struct itemplate instrux_VCVT2PS2PHX[3] = { + /* 0 : VCVT2PS2PHX xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.128.66.0f38.w0 67 /r ] AVX10_2,FUTURE */ + /* 241(f2 7d 08) 301 001(67) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVT2PS2PHX, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50035, 644, 7491}, + /* 1 : VCVT2PS2PHX ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.256.66.0f38.w0 67 /r ] AVX10_2,FUTURE */ + /* 241(f2 7d 28) 301 001(67) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVT2PS2PHX, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50044, 644, 7492}, + /* 2 : VCVT2PS2PHX zmmreg|mask|z,zmmreg,zmmrm512|b32 [rvm:fv: evex.512.66.0f38.w0 67 /r ] AVX10_2,FUTURE */ + /* 241(f2 7d 48) 301 001(67) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVT2PS2PHX, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50053, 644, 7493}, +}; + +static const struct itemplate instrux_VCVTBIASPH2BF8[3] = { + /* 0 : VCVTBIASPH2BF8 xmmreg|mask|z,xmmreg,xmmrm128|b16 [rvm:fv: evex.128.np.0f38.w0 74 /r ] AVX10_2,FUTURE */ + /* 241(f2 7c 08) 301 001(74) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTBIASPH2BF8, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+50062, 644, 7494}, + /* 1 : VCVTBIASPH2BF8 xmmreg|mask|z,ymmreg,ymmrm256|b16 [rvm:fv: evex.256.np.0f38.w0 74 /r ] AVX10_2,FUTURE */ + /* 241(f2 7c 28) 301 001(74) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTBIASPH2BF8, 3, {XMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+50071, 644, 7495}, + /* 2 : VCVTBIASPH2BF8 ymmreg|mask|z,zmmreg,zmmrm512|b16 [rvm:fv: evex.512.np.0f38.w0 74 /r ] AVX10_2,FUTURE */ + /* 241(f2 7c 48) 301 001(74) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTBIASPH2BF8, 3, {YMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+50080, 644, 7496}, +}; + +static const struct itemplate instrux_VCVTBIASPH2BF8S[3] = { + /* 0 : VCVTBIASPH2BF8S xmmreg|mask|z,xmmreg,xmmrm128|b16 [rvm:fv: evex.128.np.map5.w0 74 /r ] AVX10_2,FUTURE */ + /* 241(f5 7c 08) 301 001(74) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTBIASPH2BF8S, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+50089, 644, 7497}, + /* 1 : VCVTBIASPH2BF8S xmmreg|mask|z,ymmreg,ymmrm256|b16 [rvm:fv: evex.256.np.map5.w0 74 /r ] AVX10_2,FUTURE */ + /* 241(f5 7c 28) 301 001(74) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTBIASPH2BF8S, 3, {XMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+50098, 644, 7498}, + /* 2 : VCVTBIASPH2BF8S ymmreg|mask|z,zmmreg,zmmrm512|b16 [rvm:fv: evex.512.np.map5.w0 74 /r ] AVX10_2,FUTURE */ + /* 241(f5 7c 48) 301 001(74) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTBIASPH2BF8S, 3, {YMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+50107, 644, 7499}, +}; + +static const struct itemplate instrux_VCVTBIASPH2HF8[3] = { + /* 0 : VCVTBIASPH2HF8 xmmreg|mask|z,xmmreg,xmmrm128|b16 [rvm:fv: evex.128.np.map5.w0 18 /r ] AVX10_2,FUTURE */ + /* 241(f5 7c 08) 301 001(18) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTBIASPH2HF8, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+50116, 644, 7500}, + /* 1 : VCVTBIASPH2HF8 xmmreg|mask|z,ymmreg,ymmrm256|b16 [rvm:fv: evex.256.np.map5.w0 18 /r ] AVX10_2,FUTURE */ + /* 241(f5 7c 28) 301 001(18) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTBIASPH2HF8, 3, {XMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+50125, 644, 7501}, + /* 2 : VCVTBIASPH2HF8 ymmreg|mask|z,zmmreg,zmmrm512|b16 [rvm:fv: evex.512.np.map5.w0 18 /r ] AVX10_2,FUTURE */ + /* 241(f5 7c 48) 301 001(18) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTBIASPH2HF8, 3, {YMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+50134, 644, 7502}, +}; + +static const struct itemplate instrux_VCVTBIASPH2HF8S[3] = { + /* 0 : VCVTBIASPH2HF8S xmmreg|mask|z,xmmreg,xmmrm128|b16 [rvm:fv: evex.128.np.map5.w0 1b /r ] AVX10_2,FUTURE */ + /* 241(f5 7c 08) 301 001(1b) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTBIASPH2HF8S, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+50143, 644, 7503}, + /* 1 : VCVTBIASPH2HF8S xmmreg|mask|z,ymmreg,ymmrm256|b16 [rvm:fv: evex.256.np.map5.w0 1b /r ] AVX10_2,FUTURE */ + /* 241(f5 7c 28) 301 001(1b) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTBIASPH2HF8S, 3, {XMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+50152, 644, 7504}, + /* 2 : VCVTBIASPH2HF8S ymmreg|mask|z,zmmreg,zmmrm512|b16 [rvm:fv: evex.512.np.map5.w0 1b /r ] AVX10_2,FUTURE */ + /* 241(f5 7c 48) 301 001(1b) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTBIASPH2HF8S, 3, {YMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+50161, 644, 7505}, +}; + +static const struct itemplate instrux_VCVTHF82PH[3] = { + /* 0 : VCVTHF82PH xmmreg|mask|z,xmmrm64 [rm:hv: evex.128.f2.map5.w0 1e /r ] AVX10_2,FUTURE */ + /* 250(f5 7f 08) 302 001(1e) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTHF82PH, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+50170, 644, 7506}, + /* 1 : VCVTHF82PH ymmreg|mask|z,xmmrm128 [rm:hv: evex.256.f2.map5.w0 1e /r ] AVX10_2,FUTURE */ + /* 250(f5 7f 28) 302 001(1e) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTHF82PH, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+50179, 644, 7507}, + /* 2 : VCVTHF82PH zmmreg|mask|z,ymmrm256 [rm:hv: evex.512.f2.map5.w0 1e /r ] AVX10_2,FUTURE */ + /* 250(f5 7f 48) 302 001(1e) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTHF82PH, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+50188, 644, 7508}, +}; + +static const struct itemplate instrux_VDPPHPS[3] = { + /* 0 : VDPPHPS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.128.np.0f38.w0 52 /r ] AVX10_2,FUTURE */ + /* 241(f2 7c 08) 301 001(52) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VDPPHPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50197, 644, 7511}, + /* 1 : VDPPHPS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.256.np.0f38.w0 52 /r ] AVX10_2,FUTURE */ + /* 241(f2 7c 28) 301 001(52) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VDPPHPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50206, 644, 7512}, + /* 2 : VDPPHPS zmmreg|mask|z,zmmreg,zmmrm512|b32 [rvm:fv: evex.512.np.0f38.w0 52 /r ] AVX10_2,FUTURE */ + /* 241(f2 7c 48) 301 001(52) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VDPPHPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50215, 644, 7513}, +}; + +static const struct itemplate instrux_VMINMAXBF16[3] = { + /* 0 : VMINMAXBF16 xmmreg|mask|z,xmmreg,xmmrm128|b16,imm8 [rvmi:fv: evex.128.f2.0f3a.w0 52 /r ib ] AVX10_2,FUTURE */ + /* 241(f3 7f 08) 301 001(52) 120 023 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VMINMAXBF16, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+23173, 644, 7555}, + /* 1 : VMINMAXBF16 ymmreg|mask|z,ymmreg,ymmrm256|b16,imm8 [rvmi:fv: evex.256.f2.0f3a.w0 52 /r ib ] AVX10_2,FUTURE */ + /* 241(f3 7f 28) 301 001(52) 120 023 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VMINMAXBF16, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+23183, 644, 7556}, + /* 2 : VMINMAXBF16 zmmreg|mask|z,zmmreg,zmmrm512|b16,imm8 [rvmi:fv: evex.512.f2.0f3a.w0 52 /r ib ] AVX10_2,FUTURE */ + /* 241(f3 7f 48) 301 001(52) 120 023 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VMINMAXBF16, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+23193, 644, 7557}, +}; + +static const struct itemplate instrux_VMINMAXPD[3] = { + /* 0 : VMINMAXPD xmmreg|mask|z,xmmreg,xmmrm128|b64,imm8 [rvmi:fv: evex.128.66.0f3a.w1 52 /r ib ] AVX10_2,FUTURE */ + /* 241(f3 fd 08) 301 001(52) 120 023 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VMINMAXPD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+23203, 644, 7558}, + /* 1 : VMINMAXPD ymmreg|mask|z,ymmreg,ymmrm256|b64,imm8 [rvmi:fv: evex.256.66.0f3a.w1 52 /r ib ] AVX10_2,FUTURE */ + /* 241(f3 fd 28) 301 001(52) 120 023 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VMINMAXPD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+23213, 644, 7559}, + /* 2 : VMINMAXPD zmmreg|mask|z,zmmreg,zmmrm512|b64|sae,imm8 [rvmi:fv: evex.512.66.0f3a.w1 52 /r ib ] AVX10_2,FUTURE */ + /* 241(f3 fd 48) 301 001(52) 120 023 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VMINMAXPD, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B64|SAE,0,0}, nasm_bytecodes+23223, 644, 7560}, +}; + +static const struct itemplate instrux_VMINMAXPH[3] = { + /* 0 : VMINMAXPH xmmreg|mask|z,xmmreg,xmmrm128|b16,imm8 [rvmi:fv: evex.128.np.0f3a.w0 52 /r ib ] AVX10_2,FUTURE */ + /* 241(f3 7c 08) 301 001(52) 120 023 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VMINMAXPH, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+23233, 644, 7561}, + /* 1 : VMINMAXPH ymmreg|mask|z,ymmreg,ymmrm256|b16,imm8 [rvmi:fv: evex.256.np.0f3a.w0 52 /r ib ] AVX10_2,FUTURE */ + /* 241(f3 7c 28) 301 001(52) 120 023 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VMINMAXPH, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+23243, 644, 7562}, + /* 2 : VMINMAXPH zmmreg|mask|z,zmmreg,zmmrm512|b16|sae,imm8 [rvmi:fv: evex.512.np.0f3a.w0 52 /r ib ] AVX10_2,FUTURE */ + /* 241(f3 7c 48) 301 001(52) 120 023 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VMINMAXPH, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B16|SAE,0,0}, nasm_bytecodes+23253, 644, 7563}, +}; + +static const struct itemplate instrux_VMINMAXPS[3] = { + /* 0 : VMINMAXPS xmmreg|mask|z,xmmreg,xmmrm128|b32,imm8 [rvmi:fv: evex.128.66.0f3a.w0 52 /r ib ] AVX10_2,FUTURE */ + /* 241(f3 7d 08) 301 001(52) 120 023 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VMINMAXPS, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+23263, 644, 7564}, + /* 1 : VMINMAXPS ymmreg|mask|z,ymmreg,ymmrm256|b32,imm8 [rvmi:fv: evex.256.66.0f3a.w0 52 /r ib ] AVX10_2,FUTURE */ + /* 241(f3 7d 28) 301 001(52) 120 023 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VMINMAXPS, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+23273, 644, 7565}, + /* 2 : VMINMAXPS zmmreg|mask|z,zmmreg,zmmrm512|b32|sae,imm8 [rvmi:fv: evex.512.66.0f3a.w0 52 /r ib ] AVX10_2,FUTURE */ + /* 241(f3 7d 48) 301 001(52) 120 023 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VMINMAXPS, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B32|SAE,0,0}, nasm_bytecodes+23283, 644, 7566}, +}; + +static const struct itemplate instrux_VMINMAXSD[1] = { + /* 0 : VMINMAXSD xmmreg|mask|z,xmmreg,xmmrm64|sae,imm8 [rvmi:t1s: evex.lig.66.0f3a.w1 53 /r ib ] AVX10_2,FUTURE */ + /* 241(f3 fd 08) 306 001(53) 120 023 : LIG,EVEX,PROT,AVX10_2,FUTURE */ + {I_VMINMAXSD, 4, {XMMREG,XMMREG,RM_XMM|BITS64,IMM_NORMAL|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+23293, 645, 7567}, +}; + +static const struct itemplate instrux_VMINMAXSH[1] = { + /* 0 : VMINMAXSH xmmreg|mask|z,xmmreg,xmmrm16|sae,imm8 [rvmi:t1s: evex.lig.np.0f3a.w0 53 /r ib ] AVX10_2,FUTURE */ + /* 241(f3 7c 08) 306 001(53) 120 023 : LIG,EVEX,PROT,AVX10_2,FUTURE */ + {I_VMINMAXSH, 4, {XMMREG,XMMREG,RM_XMM|BITS16,IMM_NORMAL|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+23303, 645, 7568}, +}; + +static const struct itemplate instrux_VMINMAXSS[1] = { + /* 0 : VMINMAXSS xmmreg|mask|z,xmmreg,xmmrm32|sae,imm8 [rvmi:t1s: evex.lig.66.0f3a.w0 53 /r ib ] AVX10_2,FUTURE */ + /* 241(f3 7d 08) 306 001(53) 120 023 : LIG,EVEX,PROT,AVX10_2,FUTURE */ + {I_VMINMAXSS, 4, {XMMREG,XMMREG,RM_XMM|BITS32,IMM_NORMAL|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+23313, 645, 7569}, +}; + +static const struct itemplate instrux_VCVTBF162IBS[3] = { + /* 0 : VCVTBF162IBS xmmreg|mask|z,xmmrm128|b16 [rm:fv: evex.128.f2.map5.w0 69 /r ] AVX10_2,FUTURE */ + /* 250(f5 7f 08) 301 001(69) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTBF162IBS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+50548, 644, 7572}, + /* 1 : VCVTBF162IBS ymmreg|mask|z,ymmrm256|b16 [rm:fv: evex.256.f2.map5.w0 69 /r ] AVX10_2,FUTURE */ + /* 250(f5 7f 28) 301 001(69) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTBF162IBS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+50557, 644, 7573}, + /* 2 : VCVTBF162IBS zmmreg|mask|z,zmmrm512|b16 [rm:fv: evex.512.f2.map5.w0 69 /r ] AVX10_2,FUTURE */ + /* 250(f5 7f 48) 301 001(69) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTBF162IBS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+50566, 644, 7574}, +}; + +static const struct itemplate instrux_VCVTBF162IUBS[3] = { + /* 0 : VCVTBF162IUBS xmmreg|mask|z,xmmrm128|b16 [rm:fv: evex.128.f2.map5.w0 6b /r ] AVX10_2,FUTURE */ + /* 250(f5 7f 08) 301 001(6b) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTBF162IUBS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+50575, 644, 7575}, + /* 1 : VCVTBF162IUBS ymmreg|mask|z,ymmrm256|b16 [rm:fv: evex.256.f2.map5.w0 6b /r ] AVX10_2,FUTURE */ + /* 250(f5 7f 28) 301 001(6b) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTBF162IUBS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+50584, 644, 7576}, + /* 2 : VCVTBF162IUBS zmmreg|mask|z,zmmrm512|b16 [rm:fv: evex.512.f2.map5.w0 6b /r ] AVX10_2,FUTURE */ + /* 250(f5 7f 48) 301 001(6b) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTBF162IUBS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+50593, 644, 7577}, +}; + +static const struct itemplate instrux_VCVTTBF162IBS[3] = { + /* 0 : VCVTTBF162IBS xmmreg|mask|z,xmmrm128|b16 [rm:fv: evex.128.f2.map5.w0 68 /r ] AVX10_2,FUTURE */ + /* 250(f5 7f 08) 301 001(68) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTBF162IBS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+50602, 644, 7578}, + /* 1 : VCVTTBF162IBS ymmreg|mask|z,ymmrm256|b16 [rm:fv: evex.256.f2.map5.w0 68 /r ] AVX10_2,FUTURE */ + /* 250(f5 7f 28) 301 001(68) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTBF162IBS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+50611, 644, 7579}, + /* 2 : VCVTTBF162IBS zmmreg|mask|z,zmmrm512|b16 [rm:fv: evex.512.f2.map5.w0 68 /r ] AVX10_2,FUTURE */ + /* 250(f5 7f 48) 301 001(68) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTBF162IBS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+50620, 644, 7580}, +}; + +static const struct itemplate instrux_VCVTTBF162IUBS[3] = { + /* 0 : VCVTTBF162IUBS xmmreg|mask|z,xmmrm128|b16 [rm:fv: evex.128.f2.map5.w0 6a /r ] AVX10_2,FUTURE */ + /* 250(f5 7f 08) 301 001(6a) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTBF162IUBS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+50629, 644, 7581}, + /* 1 : VCVTTBF162IUBS ymmreg|mask|z,ymmrm256|b16 [rm:fv: evex.256.f2.map5.w0 6a /r ] AVX10_2,FUTURE */ + /* 250(f5 7f 28) 301 001(6a) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTBF162IUBS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+50638, 644, 7582}, + /* 2 : VCVTTBF162IUBS zmmreg|mask|z,zmmrm512|b16 [rm:fv: evex.512.f2.map5.w0 6a /r ] AVX10_2,FUTURE */ + /* 250(f5 7f 48) 301 001(6a) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTBF162IUBS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+50647, 644, 7583}, +}; + +static const struct itemplate instrux_VCVTTPD2DQS[3] = { + /* 0 : VCVTTPD2DQS xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.np.map5.w1 6d /r ] AVX10_2,FUTURE */ + /* 250(f5 fc 08) 301 001(6d) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTPD2DQS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+50656, 644, 7584}, + /* 1 : VCVTTPD2DQS xmmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.np.map5.w1 6d /r ] AVX10_2,FUTURE */ + /* 250(f5 fc 28) 301 001(6d) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTPD2DQS, 2, {XMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+50665, 644, 7585}, + /* 2 : VCVTTPD2DQS ymmreg|mask|z,zmmrm512|b64|sae [rm:fv: evex.512.np.map5.w1 6d /r ] AVX10_2,FUTURE */ + /* 250(f5 fc 48) 301 001(6d) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTPD2DQS, 2, {YMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+50674, 644, 7586}, +}; + +static const struct itemplate instrux_VCVTTPD2QQS[3] = { + /* 0 : VCVTTPD2QQS xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.66.map5.w1 6d /r ] AVX10_2,FUTURE */ + /* 250(f5 fd 08) 301 001(6d) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTPD2QQS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+50683, 644, 7587}, + /* 1 : VCVTTPD2QQS ymmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.66.map5.w1 6d /r ] AVX10_2,FUTURE */ + /* 250(f5 fd 28) 301 001(6d) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTPD2QQS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+50692, 644, 7588}, + /* 2 : VCVTTPD2QQS zmmreg|mask|z,zmmrm512|b64|sae [rm:fv: evex.512.66.map5.w1 6d /r ] AVX10_2,FUTURE */ + /* 250(f5 fd 48) 301 001(6d) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTPD2QQS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+50701, 644, 7589}, +}; + +static const struct itemplate instrux_VCVTTPD2UDQS[3] = { + /* 0 : VCVTTPD2UDQS xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.np.map5.w1 6c /r ] AVX10_2,FUTURE */ + /* 250(f5 fc 08) 301 001(6c) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTPD2UDQS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+50710, 644, 7590}, + /* 1 : VCVTTPD2UDQS xmmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.np.map5.w1 6c /r ] AVX10_2,FUTURE */ + /* 250(f5 fc 28) 301 001(6c) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTPD2UDQS, 2, {XMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+50719, 644, 7591}, + /* 2 : VCVTTPD2UDQS ymmreg|mask|z,zmmrm512|b64|sae [rm:fv: evex.512.np.map5.w1 6c /r ] AVX10_2,FUTURE */ + /* 250(f5 fc 48) 301 001(6c) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTPD2UDQS, 2, {YMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+50728, 644, 7592}, +}; + +static const struct itemplate instrux_VCVTTPD2UQQS[3] = { + /* 0 : VCVTTPD2UQQS xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.66.map5.w1 6c /r ] AVX10_2,FUTURE */ + /* 250(f5 fd 08) 301 001(6c) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTPD2UQQS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+50737, 644, 7593}, + /* 1 : VCVTTPD2UQQS ymmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.66.map5.w1 6c /r ] AVX10_2,FUTURE */ + /* 250(f5 fd 28) 301 001(6c) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTPD2UQQS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+50746, 644, 7594}, + /* 2 : VCVTTPD2UQQS zmmreg|mask|z,zmmrm512|b64|sae [rm:fv: evex.512.66.map5.w1 6c /r ] AVX10_2,FUTURE */ + /* 250(f5 fd 48) 301 001(6c) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTPD2UQQS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+50755, 644, 7595}, +}; + +static const struct itemplate instrux_VCVTPH2IBS[3] = { + /* 0 : VCVTPH2IBS xmmreg|mask|z,xmmrm128|b16 [rm:fv: evex.128.np.map5.w0 69 /r ] AVX10_2,FUTURE */ + /* 250(f5 7c 08) 301 001(69) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTPH2IBS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+50764, 644, 7596}, + /* 1 : VCVTPH2IBS ymmreg|mask|z,ymmrm256|b16 [rm:fv: evex.256.np.map5.w0 69 /r ] AVX10_2,FUTURE */ + /* 250(f5 7c 28) 301 001(69) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTPH2IBS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+50773, 644, 7597}, + /* 2 : VCVTPH2IBS zmmreg|mask|z,zmmrm512|b16|er [rm:fv: evex.512.np.map5.w0 69 /r ] AVX10_2,FUTURE */ + /* 250(f5 7c 48) 301 001(69) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTPH2IBS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+50782, 644, 7598}, +}; + +static const struct itemplate instrux_VCVTPH2IUBS[3] = { + /* 0 : VCVTPH2IUBS xmmreg|mask|z,xmmrm128|b16 [rm:fv: evex.128.np.map5.w0 6b /r ] AVX10_2,FUTURE */ + /* 250(f5 7c 08) 301 001(6b) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTPH2IUBS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+50791, 644, 7599}, + /* 1 : VCVTPH2IUBS ymmreg|mask|z,ymmrm256|b16 [rm:fv: evex.256.np.map5.w0 6b /r ] AVX10_2,FUTURE */ + /* 250(f5 7c 28) 301 001(6b) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTPH2IUBS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+50800, 644, 7600}, + /* 2 : VCVTPH2IUBS zmmreg|mask|z,zmmrm512|b16|er [rm:fv: evex.512.np.map5.w0 6b /r ] AVX10_2,FUTURE */ + /* 250(f5 7c 48) 301 001(6b) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTPH2IUBS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+50809, 644, 7601}, +}; + +static const struct itemplate instrux_VCVTTPH2IBS[3] = { + /* 0 : VCVTTPH2IBS xmmreg|mask|z,xmmrm128|b16 [rm:fv: evex.128.np.map5.w0 68 /r ] AVX10_2,FUTURE */ + /* 250(f5 7c 08) 301 001(68) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTPH2IBS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+50818, 644, 7602}, + /* 1 : VCVTTPH2IBS ymmreg|mask|z,ymmrm256|b16 [rm:fv: evex.256.np.map5.w0 68 /r ] AVX10_2,FUTURE */ + /* 250(f5 7c 28) 301 001(68) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTPH2IBS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+50827, 644, 7603}, + /* 2 : VCVTTPH2IBS zmmreg|mask|z,zmmrm512|b16|sae [rm:fv: evex.512.np.map5.w0 68 /r ] AVX10_2,FUTURE */ + /* 250(f5 7c 48) 301 001(68) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTPH2IBS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+50836, 644, 7604}, +}; + +static const struct itemplate instrux_VCVTTPH2IUBS[3] = { + /* 0 : VCVTTPH2IUBS xmmreg|mask|z,xmmrm128|b16 [rm:fv: evex.128.np.map5.w0 6a /r ] AVX10_2,FUTURE */ + /* 250(f5 7c 08) 301 001(6a) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTPH2IUBS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+50845, 644, 7605}, + /* 1 : VCVTTPH2IUBS ymmreg|mask|z,ymmrm256|b16 [rm:fv: evex.256.np.map5.w0 6a /r ] AVX10_2,FUTURE */ + /* 250(f5 7c 28) 301 001(6a) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTPH2IUBS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+50854, 644, 7606}, + /* 2 : VCVTTPH2IUBS zmmreg|mask|z,zmmrm512|b16|sae [rm:fv: evex.512.np.map5.w0 6a /r ] AVX10_2,FUTURE */ + /* 250(f5 7c 48) 301 001(6a) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTPH2IUBS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+50863, 644, 7607}, +}; + +static const struct itemplate instrux_VCVTTPS2DQS[3] = { + /* 0 : VCVTTPS2DQS xmmreg|mask|z,xmmrm128|b32 [rm:fv: evex.128.np.map5.w0 6d /r ] AVX10_2,FUTURE */ + /* 250(f5 7c 08) 301 001(6d) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTPS2DQS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+50872, 644, 7608}, + /* 1 : VCVTTPS2DQS ymmreg|mask|z,ymmrm256|b32 [rm:fv: evex.256.np.map5.w0 6d /r ] AVX10_2,FUTURE */ + /* 250(f5 7c 28) 301 001(6d) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTPS2DQS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+50881, 644, 7609}, + /* 2 : VCVTTPS2DQS zmmreg|mask|z,zmmrm512|b32|sae [rm:fv: evex.512.np.map5.w0 6d /r ] AVX10_2,FUTURE */ + /* 250(f5 7c 48) 301 001(6d) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTPS2DQS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+50890, 644, 7610}, +}; + +static const struct itemplate instrux_VCVTPS2IBS[3] = { + /* 0 : VCVTPS2IBS xmmreg|mask|z,xmmrm128|b32 [rm:fv: evex.128.66.map5.w0 69 /r ] AVX10_2,FUTURE */ + /* 250(f5 7d 08) 301 001(69) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTPS2IBS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+50899, 644, 7611}, + /* 1 : VCVTPS2IBS ymmreg|mask|z,ymmrm256|b32 [rm:fv: evex.256.66.map5.w0 69 /r ] AVX10_2,FUTURE */ + /* 250(f5 7d 28) 301 001(69) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTPS2IBS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+50908, 644, 7612}, + /* 2 : VCVTPS2IBS zmmreg|mask|z,zmmrm512|b32|er [rm:fv: evex.512.66.map5.w0 69 /r ] AVX10_2,FUTURE */ + /* 250(f5 7d 48) 301 001(69) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTPS2IBS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+50917, 644, 7613}, +}; + +static const struct itemplate instrux_VCVTPS2IUBS[3] = { + /* 0 : VCVTPS2IUBS xmmreg|mask|z,xmmrm128|b32 [rm:fv: evex.128.66.map5.w0 6b /r ] AVX10_2,FUTURE */ + /* 250(f5 7d 08) 301 001(6b) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTPS2IUBS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+50926, 644, 7614}, + /* 1 : VCVTPS2IUBS ymmreg|mask|z,ymmrm256|b32 [rm:fv: evex.256.66.map5.w0 6b /r ] AVX10_2,FUTURE */ + /* 250(f5 7d 28) 301 001(6b) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTPS2IUBS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+50935, 644, 7615}, + /* 2 : VCVTPS2IUBS zmmreg|mask|z,zmmrm512|b32|er [rm:fv: evex.512.66.map5.w0 6b /r ] AVX10_2,FUTURE */ + /* 250(f5 7d 48) 301 001(6b) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTPS2IUBS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+50944, 644, 7616}, +}; + +static const struct itemplate instrux_VCVTTPS2IBS[3] = { + /* 0 : VCVTTPS2IBS xmmreg|mask|z,xmmrm128|b32 [rm:fv: evex.128.66.map5.w0 68 /r ] AVX10_2,FUTURE */ + /* 250(f5 7d 08) 301 001(68) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTPS2IBS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+50953, 644, 7617}, + /* 1 : VCVTTPS2IBS ymmreg|mask|z,ymmrm256|b32 [rm:fv: evex.256.66.map5.w0 68 /r ] AVX10_2,FUTURE */ + /* 250(f5 7d 28) 301 001(68) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTPS2IBS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+50962, 644, 7618}, + /* 2 : VCVTTPS2IBS zmmreg|mask|z,zmmrm512|b32|sae [rm:fv: evex.512.66.map5.w0 68 /r ] AVX10_2,FUTURE */ + /* 250(f5 7d 48) 301 001(68) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTPS2IBS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+50971, 644, 7619}, +}; + +static const struct itemplate instrux_VCVTTPS2IUBS[3] = { + /* 0 : VCVTTPS2IUBS xmmreg|mask|z,xmmrm128|b32 [rm:fv: evex.128.66.map5.w0 6a /r ] AVX10_2,FUTURE */ + /* 250(f5 7d 08) 301 001(6a) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTPS2IUBS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+50980, 644, 7620}, + /* 1 : VCVTTPS2IUBS ymmreg|mask|z,ymmrm256|b32 [rm:fv: evex.256.66.map5.w0 6a /r ] AVX10_2,FUTURE */ + /* 250(f5 7d 28) 301 001(6a) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTPS2IUBS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+50989, 644, 7621}, + /* 2 : VCVTTPS2IUBS zmmreg|mask|z,zmmrm512|b32|sae [rm:fv: evex.512.66.map5.w0 6a /r ] AVX10_2,FUTURE */ + /* 250(f5 7d 48) 301 001(6a) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTPS2IUBS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+50998, 644, 7622}, +}; + +static const struct itemplate instrux_VCVTTPS2QQS[3] = { + /* 0 : VCVTTPS2QQS xmmreg|mask|z,xmmrm64|b32 [rm:hv: evex.128.66.map5.w0 6d /r ] AVX10_2,FUTURE */ + /* 250(f5 7d 08) 302 001(6d) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTPS2QQS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+51007, 644, 7623}, + /* 1 : VCVTTPS2QQS ymmreg|mask|z,xmmrm128|b32 [rm:hv: evex.256.66.map5.w0 6d /r ] AVX10_2,FUTURE */ + /* 250(f5 7d 28) 302 001(6d) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTPS2QQS, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+51016, 644, 7624}, + /* 2 : VCVTTPS2QQS zmmreg|mask|z,ymmrm256|b32|sae [rm:hv: evex.512.66.map5.w0 6d /r ] AVX10_2,FUTURE */ + /* 250(f5 7d 48) 302 001(6d) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTPS2QQS, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+51025, 644, 7625}, +}; + +static const struct itemplate instrux_VCVTTPS2UDQS[3] = { + /* 0 : VCVTTPS2UDQS xmmreg|mask|z,xmmrm128|b32 [rm:fv: evex.128.np.map5.w0 6c /r ] AVX10_2,FUTURE */ + /* 250(f5 7c 08) 301 001(6c) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTPS2UDQS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+51034, 644, 7626}, + /* 1 : VCVTTPS2UDQS ymmreg|mask|z,ymmrm256|b32 [rm:fv: evex.256.np.map5.w0 6c /r ] AVX10_2,FUTURE */ + /* 250(f5 7c 28) 301 001(6c) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTPS2UDQS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+51043, 644, 7627}, + /* 2 : VCVTTPS2UDQS zmmreg|mask|z,zmmrm512|b32|sae [rm:fv: evex.512.np.map5.w0 6c /r ] AVX10_2,FUTURE */ + /* 250(f5 7c 48) 301 001(6c) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTPS2UDQS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+51052, 644, 7628}, +}; + +static const struct itemplate instrux_VCVTTPS2UQQS[3] = { + /* 0 : VCVTTPS2UQQS xmmreg|mask|z,xmmrm64|b32 [rm:hv: evex.128.66.map5.w0 6c /r ] AVX10_2,FUTURE */ + /* 250(f5 7d 08) 302 001(6c) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTPS2UQQS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+51061, 644, 7629}, + /* 1 : VCVTTPS2UQQS ymmreg|mask|z,xmmrm128|b32 [rm:hv: evex.256.66.map5.w0 6c /r ] AVX10_2,FUTURE */ + /* 250(f5 7d 28) 302 001(6c) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTPS2UQQS, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+51070, 644, 7630}, + /* 2 : VCVTTPS2UQQS zmmreg|mask|z,ymmrm256|b32|sae [rm:hv: evex.512.66.map5.w0 6c /r ] AVX10_2,FUTURE */ + /* 250(f5 7d 48) 302 001(6c) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTPS2UQQS, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+51079, 644, 7631}, +}; + +static const struct itemplate instrux_VCVTTSD2SIS[2] = { + /* 0 : VCVTTSD2SIS reg32,xmmrm64|sae [rm:t1s: evex.lig.f2.map5.w0 6d /r ] AVX10_2,FUTURE */ + /* 250(f5 7f 08) 306 001(6d) 110 : LIG,EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTSD2SIS, 2, {REG_GPR|BITS32,RM_XMM|BITS64,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+51088, 645, 7632}, + /* 1 : VCVTTSD2SIS reg64,xmmrm64|sae [rm:t1s: evex.lig.f2.map5.w1 6d /r ] LONG,PROT,AVX10_2,X86_64 */ + /* 250(f5 ff 08) 306 001(6d) 110 : LIG,LONG,EVEX,PROT,AVX10_2,X86_64 */ + {I_VCVTTSD2SIS, 2, {REG_GPR|BITS64,RM_XMM|BITS64,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+51097, 647, 7633}, +}; + +static const struct itemplate instrux_VCVTTSD2USIS[2] = { + /* 0 : VCVTTSD2USIS reg32,xmmrm64|sae [rm:t1s: evex.lig.f2.map5.w0 6c /r ] AVX10_2,FUTURE */ + /* 250(f5 7f 08) 306 001(6c) 110 : LIG,EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTSD2USIS, 2, {REG_GPR|BITS32,RM_XMM|BITS64,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+51106, 645, 7634}, + /* 1 : VCVTTSD2USIS reg64,xmmrm64|sae [rm:t1s: evex.lig.f2.map5.w1 6c /r ] LONG,PROT,AVX10_2,X86_64 */ + /* 250(f5 ff 08) 306 001(6c) 110 : LIG,LONG,EVEX,PROT,AVX10_2,X86_64 */ + {I_VCVTTSD2USIS, 2, {REG_GPR|BITS64,RM_XMM|BITS64,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+51115, 647, 7635}, +}; + +static const struct itemplate instrux_VCVTTSS2SIS[2] = { + /* 0 : VCVTTSS2SIS reg32,xmmrm32|sae [rm:t1s: evex.lig.f3.map5.w0 6d /r ] AVX10_2,FUTURE */ + /* 250(f5 7e 08) 306 001(6d) 110 : LIG,EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTSS2SIS, 2, {REG_GPR|BITS32,RM_XMM|BITS32,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+51124, 645, 7636}, + /* 1 : VCVTTSS2SIS reg64,xmmrm32|sae [rm:t1s: evex.lig.f3.map5.w1 6d /r ] LONG,PROT,AVX10_2,X86_64 */ + /* 250(f5 fe 08) 306 001(6d) 110 : LIG,LONG,EVEX,PROT,AVX10_2,X86_64 */ + {I_VCVTTSS2SIS, 2, {REG_GPR|BITS64,RM_XMM|BITS32,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+51133, 647, 7637}, +}; + +static const struct itemplate instrux_VCVTTSS2USIS[2] = { + /* 0 : VCVTTSS2USIS reg32,xmmrm32|sae [rm:t1s: evex.lig.f3.map5.w0 6c /r ] AVX10_2,FUTURE */ + /* 250(f5 7e 08) 306 001(6c) 110 : LIG,EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTSS2USIS, 2, {REG_GPR|BITS32,RM_XMM|BITS32,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+51142, 645, 7638}, + /* 1 : VCVTTSS2USIS reg64,xmmrm32|sae [rm:t1s: evex.lig.f3.map5.w1 6c /r ] LONG,PROT,AVX10_2,X86_64 */ + /* 250(f5 fe 08) 306 001(6c) 110 : LIG,LONG,EVEX,PROT,AVX10_2,X86_64 */ + {I_VCVTTSS2USIS, 2, {REG_GPR|BITS64,RM_XMM|BITS32,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+51151, 647, 7639}, +}; + +static const struct itemplate instrux_VBMACOR16X16X16[2] = { + /* 0 : VBMACOR16X16X16 ymmreg,ymmreg,ymmrm256 [rvm:fv: evex.256.np.map6.w0 80 /r ] AVX512BMM,FUTURE */ + /* 241(f6 7c 28) 301 001(80) 120 : EVEX,PROT,AVX512BMM,FUTURE */ + {I_VBMACOR16X16X16, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+51196, 648, 7648}, + /* 1 : VBMACOR16X16X16 zmmreg,zmmreg,zmmrm512 [rvm:fv: evex.512.np.map6.w0 80 /r ] AVX512BMM,FUTURE */ + /* 241(f6 7c 48) 301 001(80) 120 : EVEX,PROT,AVX512BMM,FUTURE */ + {I_VBMACOR16X16X16, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, NO_DECORATOR, nasm_bytecodes+51205, 648, 7649}, +}; + +static const struct itemplate instrux_VBMACXOR16X16X16[2] = { + /* 0 : VBMACXOR16X16X16 ymmreg,ymmreg,ymmrm256 [rvm:fv: evex.256.np.map6.w1 80 /r ] AVX512BMM,FUTURE */ + /* 241(f6 fc 28) 301 001(80) 120 : EVEX,PROT,AVX512BMM,FUTURE */ + {I_VBMACXOR16X16X16, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+51214, 648, 7650}, + /* 1 : VBMACXOR16X16X16 zmmreg,zmmreg,zmmrm512 [rvm:fv: evex.512.np.map6.w1 80 /r ] AVX512BMM,FUTURE */ + /* 241(f6 fc 48) 301 001(80) 120 : EVEX,PROT,AVX512BMM,FUTURE */ + {I_VBMACXOR16X16X16, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, NO_DECORATOR, nasm_bytecodes+51223, 648, 7651}, +}; + +static const struct itemplate instrux_VBITREV[3] = { + /* 0 : VBITREV xmmreg|mask|z,xmmrm128 [rm:fv: evex.128.np.map6.w0 81 /r ] AVX512BMM,FUTURE */ + /* 250(f6 7c 08) 301 001(81) 110 : EVEX,PROT,AVX512BMM,FUTURE */ + {I_VBITREV, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+51232, 648, 7652}, + /* 1 : VBITREV ymmreg|mask|z,ymmrm256 [rm:fv: evex.256.np.map6.w0 81 /r ] AVX512BMM,FUTURE */ + /* 250(f6 7c 28) 301 001(81) 110 : EVEX,PROT,AVX512BMM,FUTURE */ + {I_VBITREV, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+51241, 648, 7653}, + /* 2 : VBITREV zmmreg|mask|z,zmmrm512 [rm:fv: evex.512.np.map6.w0 81 /r ] AVX512BMM,FUTURE */ + /* 250(f6 7c 48) 301 001(81) 110 : EVEX,PROT,AVX512BMM,FUTURE */ + {I_VBITREV, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+51250, 648, 7654}, +}; + +static const struct itemplate instrux_HINT_NOP[3] = { + /* 0 : HINT_NOP imm,reg16,rm16 [irm: o16 0f ibn /r ] ND,SM1-2,FL,UNDOC,P6 */ + /* 320 355 300 121 : SM1,SM2,FL,UNDOC,P6 */ + {I_HINT_NOP, 3, {IMM_NORMAL,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+72569, 651, 7661}, + /* 1 : HINT_NOP imm,reg32,rm32 [irm: o32 0f ibn /r ] ND,SM1-2,FL,UNDOC,P6 */ + /* 321 355 300 121 : SM1,SM2,FL,UNDOC,P6 */ + {I_HINT_NOP, 3, {IMM_NORMAL,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+72574, 651, 7662}, + /* 2 : HINT_NOP imm,reg64,rm64 [irm: o64 0f ibn /r ] ND,SM1-2,LONG,FL,PROT,UNDOC,X86_64 */ + /* 324 355 300 121 : SM1,SM2,LONG,FL,PROT,UNDOC,X86_64 */ + {I_HINT_NOP, 3, {IMM_NORMAL,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+72579, 652, 7663}, +}; + +static const struct itemplate instrux_HINT_NOP0[3] = { + /* 0 : HINT_NOP0 rm16 [m: o16 0f 18 /0 ] ND,FL,UNDOC,P6 */ + /* 320 355 001(18) 200 : FL,UNDOC,P6 */ + {I_HINT_NOP0, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70185, 653, 7664}, + /* 1 : HINT_NOP0 rm32 [m: o32 0f 18 /0 ] ND,FL,UNDOC,P6 */ + /* 321 355 001(18) 200 : FL,UNDOC,P6 */ + {I_HINT_NOP0, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70191, 653, 7665}, + /* 2 : HINT_NOP0 rm64 [m: o64 0f 18 /0 ] ND,LONG,FL,PROT,UNDOC,X86_64 */ + /* 324 355 001(18) 200 : LONG,FL,PROT,UNDOC,X86_64 */ + {I_HINT_NOP0, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70197, 654, 7666}, +}; + +static const struct itemplate instrux_HINT_NOP1[3] = { + /* 0 : HINT_NOP1 rm16 [m: o16 0f 18 /1 ] ND,FL,UNDOC,P6 */ + /* 320 355 001(18) 201 : FL,UNDOC,P6 */ + {I_HINT_NOP1, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70203, 653, 7667}, + /* 1 : HINT_NOP1 rm32 [m: o32 0f 18 /1 ] ND,FL,UNDOC,P6 */ + /* 321 355 001(18) 201 : FL,UNDOC,P6 */ + {I_HINT_NOP1, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70209, 653, 7668}, + /* 2 : HINT_NOP1 rm64 [m: o64 0f 18 /1 ] ND,LONG,FL,PROT,UNDOC,X86_64 */ + /* 324 355 001(18) 201 : LONG,FL,PROT,UNDOC,X86_64 */ + {I_HINT_NOP1, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70215, 654, 7669}, +}; + +static const struct itemplate instrux_HINT_NOP2[3] = { + /* 0 : HINT_NOP2 rm16 [m: o16 0f 18 /2 ] ND,FL,UNDOC,P6 */ + /* 320 355 001(18) 202 : FL,UNDOC,P6 */ + {I_HINT_NOP2, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70221, 653, 7670}, + /* 1 : HINT_NOP2 rm32 [m: o32 0f 18 /2 ] ND,FL,UNDOC,P6 */ + /* 321 355 001(18) 202 : FL,UNDOC,P6 */ + {I_HINT_NOP2, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70227, 653, 7671}, + /* 2 : HINT_NOP2 rm64 [m: o64 0f 18 /2 ] ND,LONG,FL,PROT,UNDOC,X86_64 */ + /* 324 355 001(18) 202 : LONG,FL,PROT,UNDOC,X86_64 */ + {I_HINT_NOP2, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70233, 654, 7672}, +}; + +static const struct itemplate instrux_HINT_NOP3[3] = { + /* 0 : HINT_NOP3 rm16 [m: o16 0f 18 /3 ] ND,FL,UNDOC,P6 */ + /* 320 355 001(18) 203 : FL,UNDOC,P6 */ + {I_HINT_NOP3, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70239, 653, 7673}, + /* 1 : HINT_NOP3 rm32 [m: o32 0f 18 /3 ] ND,FL,UNDOC,P6 */ + /* 321 355 001(18) 203 : FL,UNDOC,P6 */ + {I_HINT_NOP3, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70245, 653, 7674}, + /* 2 : HINT_NOP3 rm64 [m: o64 0f 18 /3 ] ND,LONG,FL,PROT,UNDOC,X86_64 */ + /* 324 355 001(18) 203 : LONG,FL,PROT,UNDOC,X86_64 */ + {I_HINT_NOP3, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70251, 654, 7675}, +}; + +static const struct itemplate instrux_HINT_NOP4[3] = { + /* 0 : HINT_NOP4 rm16 [m: o16 0f 18 /4 ] ND,FL,UNDOC,P6 */ + /* 320 355 001(18) 204 : FL,UNDOC,P6 */ + {I_HINT_NOP4, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70257, 653, 7676}, + /* 1 : HINT_NOP4 rm32 [m: o32 0f 18 /4 ] ND,FL,UNDOC,P6 */ + /* 321 355 001(18) 204 : FL,UNDOC,P6 */ + {I_HINT_NOP4, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70263, 653, 7677}, + /* 2 : HINT_NOP4 rm64 [m: o64 0f 18 /4 ] ND,LONG,FL,PROT,UNDOC,X86_64 */ + /* 324 355 001(18) 204 : LONG,FL,PROT,UNDOC,X86_64 */ + {I_HINT_NOP4, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70269, 654, 7678}, +}; + +static const struct itemplate instrux_HINT_NOP5[3] = { + /* 0 : HINT_NOP5 rm16 [m: o16 0f 18 /5 ] ND,FL,UNDOC,P6 */ + /* 320 355 001(18) 205 : FL,UNDOC,P6 */ + {I_HINT_NOP5, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70275, 653, 7679}, + /* 1 : HINT_NOP5 rm32 [m: o32 0f 18 /5 ] ND,FL,UNDOC,P6 */ + /* 321 355 001(18) 205 : FL,UNDOC,P6 */ + {I_HINT_NOP5, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70281, 653, 7680}, + /* 2 : HINT_NOP5 rm64 [m: o64 0f 18 /5 ] ND,LONG,FL,PROT,UNDOC,X86_64 */ + /* 324 355 001(18) 205 : LONG,FL,PROT,UNDOC,X86_64 */ + {I_HINT_NOP5, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70287, 654, 7681}, +}; + +static const struct itemplate instrux_HINT_NOP6[3] = { + /* 0 : HINT_NOP6 rm16 [m: o16 0f 18 /6 ] ND,FL,UNDOC,P6 */ + /* 320 355 001(18) 206 : FL,UNDOC,P6 */ + {I_HINT_NOP6, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70293, 653, 7682}, + /* 1 : HINT_NOP6 rm32 [m: o32 0f 18 /6 ] ND,FL,UNDOC,P6 */ + /* 321 355 001(18) 206 : FL,UNDOC,P6 */ + {I_HINT_NOP6, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70299, 653, 7683}, + /* 2 : HINT_NOP6 rm64 [m: o64 0f 18 /6 ] ND,LONG,FL,PROT,UNDOC,X86_64 */ + /* 324 355 001(18) 206 : LONG,FL,PROT,UNDOC,X86_64 */ + {I_HINT_NOP6, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70305, 654, 7684}, +}; + +static const struct itemplate instrux_HINT_NOP7[3] = { + /* 0 : HINT_NOP7 rm16 [m: o16 0f 18 /7 ] ND,FL,UNDOC,P6 */ + /* 320 355 001(18) 207 : FL,UNDOC,P6 */ + {I_HINT_NOP7, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70311, 653, 7685}, + /* 1 : HINT_NOP7 rm32 [m: o32 0f 18 /7 ] ND,FL,UNDOC,P6 */ + /* 321 355 001(18) 207 : FL,UNDOC,P6 */ + {I_HINT_NOP7, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70317, 653, 7686}, + /* 2 : HINT_NOP7 rm64 [m: o64 0f 18 /7 ] ND,LONG,FL,PROT,UNDOC,X86_64 */ + /* 324 355 001(18) 207 : LONG,FL,PROT,UNDOC,X86_64 */ + {I_HINT_NOP7, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70323, 654, 7687}, +}; + +static const struct itemplate instrux_HINT_NOP8[3] = { + /* 0 : HINT_NOP8 rm16 [m: o16 0f 19 /0 ] ND,FL,UNDOC,P6 */ + /* 320 355 001(19) 200 : FL,UNDOC,P6 */ + {I_HINT_NOP8, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70329, 653, 7688}, + /* 1 : HINT_NOP8 rm32 [m: o32 0f 19 /0 ] ND,FL,UNDOC,P6 */ + /* 321 355 001(19) 200 : FL,UNDOC,P6 */ + {I_HINT_NOP8, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70335, 653, 7689}, + /* 2 : HINT_NOP8 rm64 [m: o64 0f 19 /0 ] ND,LONG,FL,PROT,UNDOC,X86_64 */ + /* 324 355 001(19) 200 : LONG,FL,PROT,UNDOC,X86_64 */ + {I_HINT_NOP8, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70341, 654, 7690}, +}; + +static const struct itemplate instrux_HINT_NOP9[3] = { + /* 0 : HINT_NOP9 rm16 [m: o16 0f 19 /1 ] ND,FL,UNDOC,P6 */ + /* 320 355 001(19) 201 : FL,UNDOC,P6 */ + {I_HINT_NOP9, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70347, 653, 7691}, + /* 1 : HINT_NOP9 rm32 [m: o32 0f 19 /1 ] ND,FL,UNDOC,P6 */ + /* 321 355 001(19) 201 : FL,UNDOC,P6 */ + {I_HINT_NOP9, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70353, 653, 7692}, + /* 2 : HINT_NOP9 rm64 [m: o64 0f 19 /1 ] ND,LONG,FL,PROT,UNDOC,X86_64 */ + /* 324 355 001(19) 201 : LONG,FL,PROT,UNDOC,X86_64 */ + {I_HINT_NOP9, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70359, 654, 7693}, +}; + +static const struct itemplate instrux_HINT_NOP10[3] = { + /* 0 : HINT_NOP10 rm16 [m: o16 0f 19 /2 ] ND,FL,UNDOC,P6 */ + /* 320 355 001(19) 202 : FL,UNDOC,P6 */ + {I_HINT_NOP10, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70365, 653, 7694}, + /* 1 : HINT_NOP10 rm32 [m: o32 0f 19 /2 ] ND,FL,UNDOC,P6 */ + /* 321 355 001(19) 202 : FL,UNDOC,P6 */ + {I_HINT_NOP10, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70371, 653, 7695}, + /* 2 : HINT_NOP10 rm64 [m: o64 0f 19 /2 ] ND,LONG,FL,PROT,UNDOC,X86_64 */ + /* 324 355 001(19) 202 : LONG,FL,PROT,UNDOC,X86_64 */ + {I_HINT_NOP10, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70377, 654, 7696}, +}; + +static const struct itemplate instrux_HINT_NOP11[3] = { + /* 0 : HINT_NOP11 rm16 [m: o16 0f 19 /3 ] ND,FL,UNDOC,P6 */ + /* 320 355 001(19) 203 : FL,UNDOC,P6 */ + {I_HINT_NOP11, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70383, 653, 7697}, + /* 1 : HINT_NOP11 rm32 [m: o32 0f 19 /3 ] ND,FL,UNDOC,P6 */ + /* 321 355 001(19) 203 : FL,UNDOC,P6 */ + {I_HINT_NOP11, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70389, 653, 7698}, + /* 2 : HINT_NOP11 rm64 [m: o64 0f 19 /3 ] ND,LONG,FL,PROT,UNDOC,X86_64 */ + /* 324 355 001(19) 203 : LONG,FL,PROT,UNDOC,X86_64 */ + {I_HINT_NOP11, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70395, 654, 7699}, +}; + +static const struct itemplate instrux_HINT_NOP12[3] = { + /* 0 : HINT_NOP12 rm16 [m: o16 0f 19 /4 ] ND,FL,UNDOC,P6 */ + /* 320 355 001(19) 204 : FL,UNDOC,P6 */ + {I_HINT_NOP12, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70401, 653, 7700}, + /* 1 : HINT_NOP12 rm32 [m: o32 0f 19 /4 ] ND,FL,UNDOC,P6 */ + /* 321 355 001(19) 204 : FL,UNDOC,P6 */ + {I_HINT_NOP12, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70407, 653, 7701}, + /* 2 : HINT_NOP12 rm64 [m: o64 0f 19 /4 ] ND,LONG,FL,PROT,UNDOC,X86_64 */ + /* 324 355 001(19) 204 : LONG,FL,PROT,UNDOC,X86_64 */ + {I_HINT_NOP12, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70413, 654, 7702}, +}; + +static const struct itemplate instrux_HINT_NOP13[3] = { + /* 0 : HINT_NOP13 rm16 [m: o16 0f 19 /5 ] ND,FL,UNDOC,P6 */ + /* 320 355 001(19) 205 : FL,UNDOC,P6 */ + {I_HINT_NOP13, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70419, 653, 7703}, + /* 1 : HINT_NOP13 rm32 [m: o32 0f 19 /5 ] ND,FL,UNDOC,P6 */ + /* 321 355 001(19) 205 : FL,UNDOC,P6 */ + {I_HINT_NOP13, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70425, 653, 7704}, + /* 2 : HINT_NOP13 rm64 [m: o64 0f 19 /5 ] ND,LONG,FL,PROT,UNDOC,X86_64 */ + /* 324 355 001(19) 205 : LONG,FL,PROT,UNDOC,X86_64 */ + {I_HINT_NOP13, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70431, 654, 7705}, +}; + +static const struct itemplate instrux_HINT_NOP14[3] = { + /* 0 : HINT_NOP14 rm16 [m: o16 0f 19 /6 ] ND,FL,UNDOC,P6 */ + /* 320 355 001(19) 206 : FL,UNDOC,P6 */ + {I_HINT_NOP14, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70437, 653, 7706}, + /* 1 : HINT_NOP14 rm32 [m: o32 0f 19 /6 ] ND,FL,UNDOC,P6 */ + /* 321 355 001(19) 206 : FL,UNDOC,P6 */ + {I_HINT_NOP14, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70443, 653, 7707}, + /* 2 : HINT_NOP14 rm64 [m: o64 0f 19 /6 ] ND,LONG,FL,PROT,UNDOC,X86_64 */ + /* 324 355 001(19) 206 : LONG,FL,PROT,UNDOC,X86_64 */ + {I_HINT_NOP14, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70449, 654, 7708}, +}; + +static const struct itemplate instrux_HINT_NOP15[3] = { + /* 0 : HINT_NOP15 rm16 [m: o16 0f 19 /7 ] ND,FL,UNDOC,P6 */ + /* 320 355 001(19) 207 : FL,UNDOC,P6 */ + {I_HINT_NOP15, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70455, 653, 7709}, + /* 1 : HINT_NOP15 rm32 [m: o32 0f 19 /7 ] ND,FL,UNDOC,P6 */ + /* 321 355 001(19) 207 : FL,UNDOC,P6 */ + {I_HINT_NOP15, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70461, 653, 7710}, + /* 2 : HINT_NOP15 rm64 [m: o64 0f 19 /7 ] ND,LONG,FL,PROT,UNDOC,X86_64 */ + /* 324 355 001(19) 207 : LONG,FL,PROT,UNDOC,X86_64 */ + {I_HINT_NOP15, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70467, 654, 7711}, +}; + +static const struct itemplate instrux_HINT_NOP16[3] = { + /* 0 : HINT_NOP16 rm16 [m: o16 0f 1a /0 ] ND,FL,UNDOC,P6 */ + /* 320 355 001(1a) 200 : FL,UNDOC,P6 */ + {I_HINT_NOP16, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70473, 653, 7712}, + /* 1 : HINT_NOP16 rm32 [m: o32 0f 1a /0 ] ND,FL,UNDOC,P6 */ + /* 321 355 001(1a) 200 : FL,UNDOC,P6 */ + {I_HINT_NOP16, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70479, 653, 7713}, + /* 2 : HINT_NOP16 rm64 [m: o64 0f 1a /0 ] ND,LONG,FL,PROT,UNDOC,X86_64 */ + /* 324 355 001(1a) 200 : LONG,FL,PROT,UNDOC,X86_64 */ + {I_HINT_NOP16, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70485, 654, 7714}, +}; + +static const struct itemplate instrux_HINT_NOP17[3] = { + /* 0 : HINT_NOP17 rm16 [m: o16 0f 1a /1 ] ND,FL,UNDOC,P6 */ + /* 320 355 001(1a) 201 : FL,UNDOC,P6 */ + {I_HINT_NOP17, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70491, 653, 7715}, + /* 1 : HINT_NOP17 rm32 [m: o32 0f 1a /1 ] ND,FL,UNDOC,P6 */ + /* 321 355 001(1a) 201 : FL,UNDOC,P6 */ + {I_HINT_NOP17, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70497, 653, 7716}, + /* 2 : HINT_NOP17 rm64 [m: o64 0f 1a /1 ] ND,LONG,FL,PROT,UNDOC,X86_64 */ + /* 324 355 001(1a) 201 : LONG,FL,PROT,UNDOC,X86_64 */ + {I_HINT_NOP17, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70503, 654, 7717}, +}; + +static const struct itemplate instrux_HINT_NOP18[3] = { + /* 0 : HINT_NOP18 rm16 [m: o16 0f 1a /2 ] ND,FL,UNDOC,P6 */ + /* 320 355 001(1a) 202 : FL,UNDOC,P6 */ + {I_HINT_NOP18, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70509, 653, 7718}, + /* 1 : HINT_NOP18 rm32 [m: o32 0f 1a /2 ] ND,FL,UNDOC,P6 */ + /* 321 355 001(1a) 202 : FL,UNDOC,P6 */ + {I_HINT_NOP18, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70515, 653, 7719}, + /* 2 : HINT_NOP18 rm64 [m: o64 0f 1a /2 ] ND,LONG,FL,PROT,UNDOC,X86_64 */ + /* 324 355 001(1a) 202 : LONG,FL,PROT,UNDOC,X86_64 */ + {I_HINT_NOP18, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70521, 654, 7720}, +}; + +static const struct itemplate instrux_HINT_NOP19[3] = { + /* 0 : HINT_NOP19 rm16 [m: o16 0f 1a /3 ] ND,FL,UNDOC,P6 */ + /* 320 355 001(1a) 203 : FL,UNDOC,P6 */ + {I_HINT_NOP19, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70527, 653, 7721}, + /* 1 : HINT_NOP19 rm32 [m: o32 0f 1a /3 ] ND,FL,UNDOC,P6 */ + /* 321 355 001(1a) 203 : FL,UNDOC,P6 */ + {I_HINT_NOP19, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70533, 653, 7722}, + /* 2 : HINT_NOP19 rm64 [m: o64 0f 1a /3 ] ND,LONG,FL,PROT,UNDOC,X86_64 */ + /* 324 355 001(1a) 203 : LONG,FL,PROT,UNDOC,X86_64 */ + {I_HINT_NOP19, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70539, 654, 7723}, +}; + +static const struct itemplate instrux_HINT_NOP20[3] = { + /* 0 : HINT_NOP20 rm16 [m: o16 0f 1a /4 ] ND,FL,UNDOC,P6 */ + /* 320 355 001(1a) 204 : FL,UNDOC,P6 */ + {I_HINT_NOP20, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70545, 653, 7724}, + /* 1 : HINT_NOP20 rm32 [m: o32 0f 1a /4 ] ND,FL,UNDOC,P6 */ + /* 321 355 001(1a) 204 : FL,UNDOC,P6 */ + {I_HINT_NOP20, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70551, 653, 7725}, + /* 2 : HINT_NOP20 rm64 [m: o64 0f 1a /4 ] ND,LONG,FL,PROT,UNDOC,X86_64 */ + /* 324 355 001(1a) 204 : LONG,FL,PROT,UNDOC,X86_64 */ + {I_HINT_NOP20, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70557, 654, 7726}, +}; + +static const struct itemplate instrux_HINT_NOP21[3] = { + /* 0 : HINT_NOP21 rm16 [m: o16 0f 1a /5 ] ND,FL,UNDOC,P6 */ + /* 320 355 001(1a) 205 : FL,UNDOC,P6 */ + {I_HINT_NOP21, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70563, 653, 7727}, + /* 1 : HINT_NOP21 rm32 [m: o32 0f 1a /5 ] ND,FL,UNDOC,P6 */ + /* 321 355 001(1a) 205 : FL,UNDOC,P6 */ + {I_HINT_NOP21, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70569, 653, 7728}, + /* 2 : HINT_NOP21 rm64 [m: o64 0f 1a /5 ] ND,LONG,FL,PROT,UNDOC,X86_64 */ + /* 324 355 001(1a) 205 : LONG,FL,PROT,UNDOC,X86_64 */ + {I_HINT_NOP21, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70575, 654, 7729}, +}; + +static const struct itemplate instrux_HINT_NOP22[3] = { + /* 0 : HINT_NOP22 rm16 [m: o16 0f 1a /6 ] ND,FL,UNDOC,P6 */ + /* 320 355 001(1a) 206 : FL,UNDOC,P6 */ + {I_HINT_NOP22, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70581, 653, 7730}, + /* 1 : HINT_NOP22 rm32 [m: o32 0f 1a /6 ] ND,FL,UNDOC,P6 */ + /* 321 355 001(1a) 206 : FL,UNDOC,P6 */ + {I_HINT_NOP22, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70587, 653, 7731}, + /* 2 : HINT_NOP22 rm64 [m: o64 0f 1a /6 ] ND,LONG,FL,PROT,UNDOC,X86_64 */ + /* 324 355 001(1a) 206 : LONG,FL,PROT,UNDOC,X86_64 */ + {I_HINT_NOP22, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70593, 654, 7732}, +}; + +static const struct itemplate instrux_HINT_NOP23[3] = { + /* 0 : HINT_NOP23 rm16 [m: o16 0f 1a /7 ] ND,FL,UNDOC,P6 */ + /* 320 355 001(1a) 207 : FL,UNDOC,P6 */ + {I_HINT_NOP23, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70599, 653, 7733}, + /* 1 : HINT_NOP23 rm32 [m: o32 0f 1a /7 ] ND,FL,UNDOC,P6 */ + /* 321 355 001(1a) 207 : FL,UNDOC,P6 */ + {I_HINT_NOP23, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70605, 653, 7734}, + /* 2 : HINT_NOP23 rm64 [m: o64 0f 1a /7 ] ND,LONG,FL,PROT,UNDOC,X86_64 */ + /* 324 355 001(1a) 207 : LONG,FL,PROT,UNDOC,X86_64 */ + {I_HINT_NOP23, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70611, 654, 7735}, +}; + +static const struct itemplate instrux_HINT_NOP24[3] = { + /* 0 : HINT_NOP24 rm16 [m: o16 0f 1b /0 ] ND,FL,UNDOC,P6 */ + /* 320 355 001(1b) 200 : FL,UNDOC,P6 */ + {I_HINT_NOP24, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70617, 653, 7736}, + /* 1 : HINT_NOP24 rm32 [m: o32 0f 1b /0 ] ND,FL,UNDOC,P6 */ + /* 321 355 001(1b) 200 : FL,UNDOC,P6 */ + {I_HINT_NOP24, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70623, 653, 7737}, + /* 2 : HINT_NOP24 rm64 [m: o64 0f 1b /0 ] ND,LONG,FL,PROT,UNDOC,X86_64 */ + /* 324 355 001(1b) 200 : LONG,FL,PROT,UNDOC,X86_64 */ + {I_HINT_NOP24, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70629, 654, 7738}, +}; + +static const struct itemplate instrux_HINT_NOP25[3] = { + /* 0 : HINT_NOP25 rm16 [m: o16 0f 1b /1 ] ND,FL,UNDOC,P6 */ + /* 320 355 001(1b) 201 : FL,UNDOC,P6 */ + {I_HINT_NOP25, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70635, 653, 7739}, + /* 1 : HINT_NOP25 rm32 [m: o32 0f 1b /1 ] ND,FL,UNDOC,P6 */ + /* 321 355 001(1b) 201 : FL,UNDOC,P6 */ + {I_HINT_NOP25, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70641, 653, 7740}, + /* 2 : HINT_NOP25 rm64 [m: o64 0f 1b /1 ] ND,LONG,FL,PROT,UNDOC,X86_64 */ + /* 324 355 001(1b) 201 : LONG,FL,PROT,UNDOC,X86_64 */ + {I_HINT_NOP25, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70647, 654, 7741}, +}; + +static const struct itemplate instrux_HINT_NOP26[3] = { + /* 0 : HINT_NOP26 rm16 [m: o16 0f 1b /2 ] ND,FL,UNDOC,P6 */ + /* 320 355 001(1b) 202 : FL,UNDOC,P6 */ + {I_HINT_NOP26, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70653, 653, 7742}, + /* 1 : HINT_NOP26 rm32 [m: o32 0f 1b /2 ] ND,FL,UNDOC,P6 */ + /* 321 355 001(1b) 202 : FL,UNDOC,P6 */ + {I_HINT_NOP26, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70659, 653, 7743}, + /* 2 : HINT_NOP26 rm64 [m: o64 0f 1b /2 ] ND,LONG,FL,PROT,UNDOC,X86_64 */ + /* 324 355 001(1b) 202 : LONG,FL,PROT,UNDOC,X86_64 */ + {I_HINT_NOP26, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70665, 654, 7744}, +}; + +static const struct itemplate instrux_HINT_NOP27[3] = { + /* 0 : HINT_NOP27 rm16 [m: o16 0f 1b /3 ] ND,FL,UNDOC,P6 */ + /* 320 355 001(1b) 203 : FL,UNDOC,P6 */ + {I_HINT_NOP27, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70671, 653, 7745}, + /* 1 : HINT_NOP27 rm32 [m: o32 0f 1b /3 ] ND,FL,UNDOC,P6 */ + /* 321 355 001(1b) 203 : FL,UNDOC,P6 */ + {I_HINT_NOP27, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70677, 653, 7746}, + /* 2 : HINT_NOP27 rm64 [m: o64 0f 1b /3 ] ND,LONG,FL,PROT,UNDOC,X86_64 */ + /* 324 355 001(1b) 203 : LONG,FL,PROT,UNDOC,X86_64 */ + {I_HINT_NOP27, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70683, 654, 7747}, +}; + +static const struct itemplate instrux_HINT_NOP28[3] = { + /* 0 : HINT_NOP28 rm16 [m: o16 0f 1b /4 ] ND,FL,UNDOC,P6 */ + /* 320 355 001(1b) 204 : FL,UNDOC,P6 */ + {I_HINT_NOP28, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70689, 653, 7748}, + /* 1 : HINT_NOP28 rm32 [m: o32 0f 1b /4 ] ND,FL,UNDOC,P6 */ + /* 321 355 001(1b) 204 : FL,UNDOC,P6 */ + {I_HINT_NOP28, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70695, 653, 7749}, + /* 2 : HINT_NOP28 rm64 [m: o64 0f 1b /4 ] ND,LONG,FL,PROT,UNDOC,X86_64 */ + /* 324 355 001(1b) 204 : LONG,FL,PROT,UNDOC,X86_64 */ + {I_HINT_NOP28, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70701, 654, 7750}, +}; + +static const struct itemplate instrux_HINT_NOP29[3] = { + /* 0 : HINT_NOP29 rm16 [m: o16 0f 1b /5 ] ND,FL,UNDOC,P6 */ + /* 320 355 001(1b) 205 : FL,UNDOC,P6 */ + {I_HINT_NOP29, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70707, 653, 7751}, + /* 1 : HINT_NOP29 rm32 [m: o32 0f 1b /5 ] ND,FL,UNDOC,P6 */ + /* 321 355 001(1b) 205 : FL,UNDOC,P6 */ + {I_HINT_NOP29, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70713, 653, 7752}, + /* 2 : HINT_NOP29 rm64 [m: o64 0f 1b /5 ] ND,LONG,FL,PROT,UNDOC,X86_64 */ + /* 324 355 001(1b) 205 : LONG,FL,PROT,UNDOC,X86_64 */ + {I_HINT_NOP29, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70719, 654, 7753}, +}; + +static const struct itemplate instrux_HINT_NOP30[3] = { + /* 0 : HINT_NOP30 rm16 [m: o16 0f 1b /6 ] ND,FL,UNDOC,P6 */ + /* 320 355 001(1b) 206 : FL,UNDOC,P6 */ + {I_HINT_NOP30, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70725, 653, 7754}, + /* 1 : HINT_NOP30 rm32 [m: o32 0f 1b /6 ] ND,FL,UNDOC,P6 */ + /* 321 355 001(1b) 206 : FL,UNDOC,P6 */ + {I_HINT_NOP30, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70731, 653, 7755}, + /* 2 : HINT_NOP30 rm64 [m: o64 0f 1b /6 ] ND,LONG,FL,PROT,UNDOC,X86_64 */ + /* 324 355 001(1b) 206 : LONG,FL,PROT,UNDOC,X86_64 */ + {I_HINT_NOP30, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70737, 654, 7756}, +}; + +static const struct itemplate instrux_HINT_NOP31[3] = { + /* 0 : HINT_NOP31 rm16 [m: o16 0f 1b /7 ] ND,FL,UNDOC,P6 */ + /* 320 355 001(1b) 207 : FL,UNDOC,P6 */ + {I_HINT_NOP31, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70743, 653, 7757}, + /* 1 : HINT_NOP31 rm32 [m: o32 0f 1b /7 ] ND,FL,UNDOC,P6 */ + /* 321 355 001(1b) 207 : FL,UNDOC,P6 */ + {I_HINT_NOP31, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70749, 653, 7758}, + /* 2 : HINT_NOP31 rm64 [m: o64 0f 1b /7 ] ND,LONG,FL,PROT,UNDOC,X86_64 */ + /* 324 355 001(1b) 207 : LONG,FL,PROT,UNDOC,X86_64 */ + {I_HINT_NOP31, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70755, 654, 7759}, +}; + +static const struct itemplate instrux_HINT_NOP32[3] = { + /* 0 : HINT_NOP32 rm16 [m: o16 0f 1c /0 ] ND,FL,UNDOC,P6 */ + /* 320 355 001(1c) 200 : FL,UNDOC,P6 */ + {I_HINT_NOP32, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70761, 653, 7760}, + /* 1 : HINT_NOP32 rm32 [m: o32 0f 1c /0 ] ND,FL,UNDOC,P6 */ + /* 321 355 001(1c) 200 : FL,UNDOC,P6 */ + {I_HINT_NOP32, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70767, 653, 7761}, + /* 2 : HINT_NOP32 rm64 [m: o64 0f 1c /0 ] ND,LONG,FL,PROT,UNDOC,X86_64 */ + /* 324 355 001(1c) 200 : LONG,FL,PROT,UNDOC,X86_64 */ + {I_HINT_NOP32, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70773, 654, 7762}, +}; + +static const struct itemplate instrux_HINT_NOP33[3] = { + /* 0 : HINT_NOP33 rm16 [m: o16 0f 1c /1 ] ND,FL,UNDOC,P6 */ + /* 320 355 001(1c) 201 : FL,UNDOC,P6 */ + {I_HINT_NOP33, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70779, 653, 7763}, + /* 1 : HINT_NOP33 rm32 [m: o32 0f 1c /1 ] ND,FL,UNDOC,P6 */ + /* 321 355 001(1c) 201 : FL,UNDOC,P6 */ + {I_HINT_NOP33, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70785, 653, 7764}, + /* 2 : HINT_NOP33 rm64 [m: o64 0f 1c /1 ] ND,LONG,FL,PROT,UNDOC,X86_64 */ + /* 324 355 001(1c) 201 : LONG,FL,PROT,UNDOC,X86_64 */ + {I_HINT_NOP33, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70791, 654, 7765}, +}; + +static const struct itemplate instrux_HINT_NOP34[3] = { + /* 0 : HINT_NOP34 rm16 [m: o16 0f 1c /2 ] ND,FL,UNDOC,P6 */ + /* 320 355 001(1c) 202 : FL,UNDOC,P6 */ + {I_HINT_NOP34, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70797, 653, 7766}, + /* 1 : HINT_NOP34 rm32 [m: o32 0f 1c /2 ] ND,FL,UNDOC,P6 */ + /* 321 355 001(1c) 202 : FL,UNDOC,P6 */ + {I_HINT_NOP34, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70803, 653, 7767}, + /* 2 : HINT_NOP34 rm64 [m: o64 0f 1c /2 ] ND,LONG,FL,PROT,UNDOC,X86_64 */ + /* 324 355 001(1c) 202 : LONG,FL,PROT,UNDOC,X86_64 */ + {I_HINT_NOP34, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70809, 654, 7768}, +}; + +static const struct itemplate instrux_HINT_NOP35[3] = { + /* 0 : HINT_NOP35 rm16 [m: o16 0f 1c /3 ] ND,FL,UNDOC,P6 */ + /* 320 355 001(1c) 203 : FL,UNDOC,P6 */ + {I_HINT_NOP35, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70815, 653, 7769}, + /* 1 : HINT_NOP35 rm32 [m: o32 0f 1c /3 ] ND,FL,UNDOC,P6 */ + /* 321 355 001(1c) 203 : FL,UNDOC,P6 */ + {I_HINT_NOP35, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70821, 653, 7770}, + /* 2 : HINT_NOP35 rm64 [m: o64 0f 1c /3 ] ND,LONG,FL,PROT,UNDOC,X86_64 */ + /* 324 355 001(1c) 203 : LONG,FL,PROT,UNDOC,X86_64 */ + {I_HINT_NOP35, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70827, 654, 7771}, +}; + +static const struct itemplate instrux_HINT_NOP36[3] = { + /* 0 : HINT_NOP36 rm16 [m: o16 0f 1c /4 ] ND,FL,UNDOC,P6 */ + /* 320 355 001(1c) 204 : FL,UNDOC,P6 */ + {I_HINT_NOP36, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70833, 653, 7772}, + /* 1 : HINT_NOP36 rm32 [m: o32 0f 1c /4 ] ND,FL,UNDOC,P6 */ + /* 321 355 001(1c) 204 : FL,UNDOC,P6 */ + {I_HINT_NOP36, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70839, 653, 7773}, + /* 2 : HINT_NOP36 rm64 [m: o64 0f 1c /4 ] ND,LONG,FL,PROT,UNDOC,X86_64 */ + /* 324 355 001(1c) 204 : LONG,FL,PROT,UNDOC,X86_64 */ + {I_HINT_NOP36, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70845, 654, 7774}, +}; + +static const struct itemplate instrux_HINT_NOP37[3] = { + /* 0 : HINT_NOP37 rm16 [m: o16 0f 1c /5 ] ND,FL,UNDOC,P6 */ + /* 320 355 001(1c) 205 : FL,UNDOC,P6 */ + {I_HINT_NOP37, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70851, 653, 7775}, + /* 1 : HINT_NOP37 rm32 [m: o32 0f 1c /5 ] ND,FL,UNDOC,P6 */ + /* 321 355 001(1c) 205 : FL,UNDOC,P6 */ + {I_HINT_NOP37, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70857, 653, 7776}, + /* 2 : HINT_NOP37 rm64 [m: o64 0f 1c /5 ] ND,LONG,FL,PROT,UNDOC,X86_64 */ + /* 324 355 001(1c) 205 : LONG,FL,PROT,UNDOC,X86_64 */ + {I_HINT_NOP37, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70863, 654, 7777}, +}; + +static const struct itemplate instrux_HINT_NOP38[3] = { + /* 0 : HINT_NOP38 rm16 [m: o16 0f 1c /6 ] ND,FL,UNDOC,P6 */ + /* 320 355 001(1c) 206 : FL,UNDOC,P6 */ + {I_HINT_NOP38, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70869, 653, 7778}, + /* 1 : HINT_NOP38 rm32 [m: o32 0f 1c /6 ] ND,FL,UNDOC,P6 */ + /* 321 355 001(1c) 206 : FL,UNDOC,P6 */ + {I_HINT_NOP38, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70875, 653, 7779}, + /* 2 : HINT_NOP38 rm64 [m: o64 0f 1c /6 ] ND,LONG,FL,PROT,UNDOC,X86_64 */ + /* 324 355 001(1c) 206 : LONG,FL,PROT,UNDOC,X86_64 */ + {I_HINT_NOP38, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70881, 654, 7780}, +}; + +static const struct itemplate instrux_HINT_NOP39[3] = { + /* 0 : HINT_NOP39 rm16 [m: o16 0f 1c /7 ] ND,FL,UNDOC,P6 */ + /* 320 355 001(1c) 207 : FL,UNDOC,P6 */ + {I_HINT_NOP39, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70887, 653, 7781}, + /* 1 : HINT_NOP39 rm32 [m: o32 0f 1c /7 ] ND,FL,UNDOC,P6 */ + /* 321 355 001(1c) 207 : FL,UNDOC,P6 */ + {I_HINT_NOP39, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70893, 653, 7782}, + /* 2 : HINT_NOP39 rm64 [m: o64 0f 1c /7 ] ND,LONG,FL,PROT,UNDOC,X86_64 */ + /* 324 355 001(1c) 207 : LONG,FL,PROT,UNDOC,X86_64 */ + {I_HINT_NOP39, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70899, 654, 7783}, +}; + +static const struct itemplate instrux_HINT_NOP40[3] = { + /* 0 : HINT_NOP40 rm16 [m: o16 0f 1d /0 ] ND,FL,UNDOC,P6 */ + /* 320 355 001(1d) 200 : FL,UNDOC,P6 */ + {I_HINT_NOP40, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70905, 653, 7784}, + /* 1 : HINT_NOP40 rm32 [m: o32 0f 1d /0 ] ND,FL,UNDOC,P6 */ + /* 321 355 001(1d) 200 : FL,UNDOC,P6 */ + {I_HINT_NOP40, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70911, 653, 7785}, + /* 2 : HINT_NOP40 rm64 [m: o64 0f 1d /0 ] ND,LONG,FL,PROT,UNDOC,X86_64 */ + /* 324 355 001(1d) 200 : LONG,FL,PROT,UNDOC,X86_64 */ + {I_HINT_NOP40, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70917, 654, 7786}, +}; + +static const struct itemplate instrux_HINT_NOP41[3] = { + /* 0 : HINT_NOP41 rm16 [m: o16 0f 1d /1 ] ND,FL,UNDOC,P6 */ + /* 320 355 001(1d) 201 : FL,UNDOC,P6 */ + {I_HINT_NOP41, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70923, 653, 7787}, + /* 1 : HINT_NOP41 rm32 [m: o32 0f 1d /1 ] ND,FL,UNDOC,P6 */ + /* 321 355 001(1d) 201 : FL,UNDOC,P6 */ + {I_HINT_NOP41, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70929, 653, 7788}, + /* 2 : HINT_NOP41 rm64 [m: o64 0f 1d /1 ] ND,LONG,FL,PROT,UNDOC,X86_64 */ + /* 324 355 001(1d) 201 : LONG,FL,PROT,UNDOC,X86_64 */ + {I_HINT_NOP41, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70935, 654, 7789}, +}; + +static const struct itemplate instrux_HINT_NOP42[3] = { + /* 0 : HINT_NOP42 rm16 [m: o16 0f 1d /2 ] ND,FL,UNDOC,P6 */ + /* 320 355 001(1d) 202 : FL,UNDOC,P6 */ + {I_HINT_NOP42, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70941, 653, 7790}, + /* 1 : HINT_NOP42 rm32 [m: o32 0f 1d /2 ] ND,FL,UNDOC,P6 */ + /* 321 355 001(1d) 202 : FL,UNDOC,P6 */ + {I_HINT_NOP42, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70947, 653, 7791}, + /* 2 : HINT_NOP42 rm64 [m: o64 0f 1d /2 ] ND,LONG,FL,PROT,UNDOC,X86_64 */ + /* 324 355 001(1d) 202 : LONG,FL,PROT,UNDOC,X86_64 */ + {I_HINT_NOP42, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70953, 654, 7792}, +}; + +static const struct itemplate instrux_HINT_NOP43[3] = { + /* 0 : HINT_NOP43 rm16 [m: o16 0f 1d /3 ] ND,FL,UNDOC,P6 */ + /* 320 355 001(1d) 203 : FL,UNDOC,P6 */ + {I_HINT_NOP43, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70959, 653, 7793}, + /* 1 : HINT_NOP43 rm32 [m: o32 0f 1d /3 ] ND,FL,UNDOC,P6 */ + /* 321 355 001(1d) 203 : FL,UNDOC,P6 */ + {I_HINT_NOP43, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70965, 653, 7794}, + /* 2 : HINT_NOP43 rm64 [m: o64 0f 1d /3 ] ND,LONG,FL,PROT,UNDOC,X86_64 */ + /* 324 355 001(1d) 203 : LONG,FL,PROT,UNDOC,X86_64 */ + {I_HINT_NOP43, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70971, 654, 7795}, +}; + +static const struct itemplate instrux_HINT_NOP44[3] = { + /* 0 : HINT_NOP44 rm16 [m: o16 0f 1d /4 ] ND,FL,UNDOC,P6 */ + /* 320 355 001(1d) 204 : FL,UNDOC,P6 */ + {I_HINT_NOP44, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70977, 653, 7796}, + /* 1 : HINT_NOP44 rm32 [m: o32 0f 1d /4 ] ND,FL,UNDOC,P6 */ + /* 321 355 001(1d) 204 : FL,UNDOC,P6 */ + {I_HINT_NOP44, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70983, 653, 7797}, + /* 2 : HINT_NOP44 rm64 [m: o64 0f 1d /4 ] ND,LONG,FL,PROT,UNDOC,X86_64 */ + /* 324 355 001(1d) 204 : LONG,FL,PROT,UNDOC,X86_64 */ + {I_HINT_NOP44, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70989, 654, 7798}, +}; + +static const struct itemplate instrux_HINT_NOP45[3] = { + /* 0 : HINT_NOP45 rm16 [m: o16 0f 1d /5 ] ND,FL,UNDOC,P6 */ + /* 320 355 001(1d) 205 : FL,UNDOC,P6 */ + {I_HINT_NOP45, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70995, 653, 7799}, + /* 1 : HINT_NOP45 rm32 [m: o32 0f 1d /5 ] ND,FL,UNDOC,P6 */ + /* 321 355 001(1d) 205 : FL,UNDOC,P6 */ + {I_HINT_NOP45, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71001, 653, 7800}, + /* 2 : HINT_NOP45 rm64 [m: o64 0f 1d /5 ] ND,LONG,FL,PROT,UNDOC,X86_64 */ + /* 324 355 001(1d) 205 : LONG,FL,PROT,UNDOC,X86_64 */ + {I_HINT_NOP45, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71007, 654, 7801}, +}; + +static const struct itemplate instrux_HINT_NOP46[3] = { + /* 0 : HINT_NOP46 rm16 [m: o16 0f 1d /6 ] ND,FL,UNDOC,P6 */ + /* 320 355 001(1d) 206 : FL,UNDOC,P6 */ + {I_HINT_NOP46, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71013, 653, 7802}, + /* 1 : HINT_NOP46 rm32 [m: o32 0f 1d /6 ] ND,FL,UNDOC,P6 */ + /* 321 355 001(1d) 206 : FL,UNDOC,P6 */ + {I_HINT_NOP46, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71019, 653, 7803}, + /* 2 : HINT_NOP46 rm64 [m: o64 0f 1d /6 ] ND,LONG,FL,PROT,UNDOC,X86_64 */ + /* 324 355 001(1d) 206 : LONG,FL,PROT,UNDOC,X86_64 */ + {I_HINT_NOP46, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71025, 654, 7804}, +}; + +static const struct itemplate instrux_HINT_NOP47[3] = { + /* 0 : HINT_NOP47 rm16 [m: o16 0f 1d /7 ] ND,FL,UNDOC,P6 */ + /* 320 355 001(1d) 207 : FL,UNDOC,P6 */ + {I_HINT_NOP47, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71031, 653, 7805}, + /* 1 : HINT_NOP47 rm32 [m: o32 0f 1d /7 ] ND,FL,UNDOC,P6 */ + /* 321 355 001(1d) 207 : FL,UNDOC,P6 */ + {I_HINT_NOP47, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71037, 653, 7806}, + /* 2 : HINT_NOP47 rm64 [m: o64 0f 1d /7 ] ND,LONG,FL,PROT,UNDOC,X86_64 */ + /* 324 355 001(1d) 207 : LONG,FL,PROT,UNDOC,X86_64 */ + {I_HINT_NOP47, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71043, 654, 7807}, +}; + +static const struct itemplate instrux_HINT_NOP48[3] = { + /* 0 : HINT_NOP48 rm16 [m: o16 0f 1e /0 ] ND,FL,UNDOC,P6 */ + /* 320 355 001(1e) 200 : FL,UNDOC,P6 */ + {I_HINT_NOP48, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71049, 653, 7808}, + /* 1 : HINT_NOP48 rm32 [m: o32 0f 1e /0 ] ND,FL,UNDOC,P6 */ + /* 321 355 001(1e) 200 : FL,UNDOC,P6 */ + {I_HINT_NOP48, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71055, 653, 7809}, + /* 2 : HINT_NOP48 rm64 [m: o64 0f 1e /0 ] ND,LONG,FL,PROT,UNDOC,X86_64 */ + /* 324 355 001(1e) 200 : LONG,FL,PROT,UNDOC,X86_64 */ + {I_HINT_NOP48, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71061, 654, 7810}, +}; + +static const struct itemplate instrux_HINT_NOP49[3] = { + /* 0 : HINT_NOP49 rm16 [m: o16 0f 1e /1 ] ND,FL,UNDOC,P6 */ + /* 320 355 001(1e) 201 : FL,UNDOC,P6 */ + {I_HINT_NOP49, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71067, 653, 7811}, + /* 1 : HINT_NOP49 rm32 [m: o32 0f 1e /1 ] ND,FL,UNDOC,P6 */ + /* 321 355 001(1e) 201 : FL,UNDOC,P6 */ + {I_HINT_NOP49, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71073, 653, 7812}, + /* 2 : HINT_NOP49 rm64 [m: o64 0f 1e /1 ] ND,LONG,FL,PROT,UNDOC,X86_64 */ + /* 324 355 001(1e) 201 : LONG,FL,PROT,UNDOC,X86_64 */ + {I_HINT_NOP49, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71079, 654, 7813}, +}; + +static const struct itemplate instrux_HINT_NOP50[3] = { + /* 0 : HINT_NOP50 rm16 [m: o16 0f 1e /2 ] ND,FL,UNDOC,P6 */ + /* 320 355 001(1e) 202 : FL,UNDOC,P6 */ + {I_HINT_NOP50, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71085, 653, 7814}, + /* 1 : HINT_NOP50 rm32 [m: o32 0f 1e /2 ] ND,FL,UNDOC,P6 */ + /* 321 355 001(1e) 202 : FL,UNDOC,P6 */ + {I_HINT_NOP50, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71091, 653, 7815}, + /* 2 : HINT_NOP50 rm64 [m: o64 0f 1e /2 ] ND,LONG,FL,PROT,UNDOC,X86_64 */ + /* 324 355 001(1e) 202 : LONG,FL,PROT,UNDOC,X86_64 */ + {I_HINT_NOP50, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71097, 654, 7816}, +}; + +static const struct itemplate instrux_HINT_NOP51[3] = { + /* 0 : HINT_NOP51 rm16 [m: o16 0f 1e /3 ] ND,FL,UNDOC,P6 */ + /* 320 355 001(1e) 203 : FL,UNDOC,P6 */ + {I_HINT_NOP51, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71103, 653, 7817}, + /* 1 : HINT_NOP51 rm32 [m: o32 0f 1e /3 ] ND,FL,UNDOC,P6 */ + /* 321 355 001(1e) 203 : FL,UNDOC,P6 */ + {I_HINT_NOP51, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71109, 653, 7818}, + /* 2 : HINT_NOP51 rm64 [m: o64 0f 1e /3 ] ND,LONG,FL,PROT,UNDOC,X86_64 */ + /* 324 355 001(1e) 203 : LONG,FL,PROT,UNDOC,X86_64 */ + {I_HINT_NOP51, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71115, 654, 7819}, +}; + +static const struct itemplate instrux_HINT_NOP52[3] = { + /* 0 : HINT_NOP52 rm16 [m: o16 0f 1e /4 ] ND,FL,UNDOC,P6 */ + /* 320 355 001(1e) 204 : FL,UNDOC,P6 */ + {I_HINT_NOP52, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71121, 653, 7820}, + /* 1 : HINT_NOP52 rm32 [m: o32 0f 1e /4 ] ND,FL,UNDOC,P6 */ + /* 321 355 001(1e) 204 : FL,UNDOC,P6 */ + {I_HINT_NOP52, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71127, 653, 7821}, + /* 2 : HINT_NOP52 rm64 [m: o64 0f 1e /4 ] ND,LONG,FL,PROT,UNDOC,X86_64 */ + /* 324 355 001(1e) 204 : LONG,FL,PROT,UNDOC,X86_64 */ + {I_HINT_NOP52, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71133, 654, 7822}, +}; + +static const struct itemplate instrux_HINT_NOP53[3] = { + /* 0 : HINT_NOP53 rm16 [m: o16 0f 1e /5 ] ND,FL,UNDOC,P6 */ + /* 320 355 001(1e) 205 : FL,UNDOC,P6 */ + {I_HINT_NOP53, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71139, 653, 7823}, + /* 1 : HINT_NOP53 rm32 [m: o32 0f 1e /5 ] ND,FL,UNDOC,P6 */ + /* 321 355 001(1e) 205 : FL,UNDOC,P6 */ + {I_HINT_NOP53, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71145, 653, 7824}, + /* 2 : HINT_NOP53 rm64 [m: o64 0f 1e /5 ] ND,LONG,FL,PROT,UNDOC,X86_64 */ + /* 324 355 001(1e) 205 : LONG,FL,PROT,UNDOC,X86_64 */ + {I_HINT_NOP53, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71151, 654, 7825}, +}; + +static const struct itemplate instrux_HINT_NOP54[3] = { + /* 0 : HINT_NOP54 rm16 [m: o16 0f 1e /6 ] ND,FL,UNDOC,P6 */ + /* 320 355 001(1e) 206 : FL,UNDOC,P6 */ + {I_HINT_NOP54, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71157, 653, 7826}, + /* 1 : HINT_NOP54 rm32 [m: o32 0f 1e /6 ] ND,FL,UNDOC,P6 */ + /* 321 355 001(1e) 206 : FL,UNDOC,P6 */ + {I_HINT_NOP54, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71163, 653, 7827}, + /* 2 : HINT_NOP54 rm64 [m: o64 0f 1e /6 ] ND,LONG,FL,PROT,UNDOC,X86_64 */ + /* 324 355 001(1e) 206 : LONG,FL,PROT,UNDOC,X86_64 */ + {I_HINT_NOP54, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71169, 654, 7828}, +}; + +static const struct itemplate instrux_HINT_NOP55[3] = { + /* 0 : HINT_NOP55 rm16 [m: o16 0f 1e /7 ] ND,FL,UNDOC,P6 */ + /* 320 355 001(1e) 207 : FL,UNDOC,P6 */ + {I_HINT_NOP55, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71175, 653, 7829}, + /* 1 : HINT_NOP55 rm32 [m: o32 0f 1e /7 ] ND,FL,UNDOC,P6 */ + /* 321 355 001(1e) 207 : FL,UNDOC,P6 */ + {I_HINT_NOP55, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71181, 653, 7830}, + /* 2 : HINT_NOP55 rm64 [m: o64 0f 1e /7 ] ND,LONG,FL,PROT,UNDOC,X86_64 */ + /* 324 355 001(1e) 207 : LONG,FL,PROT,UNDOC,X86_64 */ + {I_HINT_NOP55, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71187, 654, 7831}, +}; + +static const struct itemplate instrux_HINT_NOP56[3] = { + /* 0 : HINT_NOP56 rm16 [m: o16 0f 1f /0 ] ND,FL,UNDOC,P6 */ + /* 320 355 001(1f) 200 : FL,UNDOC,P6 */ + {I_HINT_NOP56, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+66399, 653, 7832}, + /* 1 : HINT_NOP56 rm32 [m: o32 0f 1f /0 ] ND,FL,UNDOC,P6 */ + /* 321 355 001(1f) 200 : FL,UNDOC,P6 */ + {I_HINT_NOP56, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+66405, 653, 7833}, + /* 2 : HINT_NOP56 rm64 [m: o64 0f 1f /0 ] ND,LONG,FL,PROT,UNDOC,X86_64 */ + /* 324 355 001(1f) 200 : LONG,FL,PROT,UNDOC,X86_64 */ + {I_HINT_NOP56, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+66411, 654, 7834}, +}; + +static const struct itemplate instrux_HINT_NOP57[3] = { + /* 0 : HINT_NOP57 rm16 [m: o16 0f 1f /1 ] ND,FL,UNDOC,P6 */ + /* 320 355 001(1f) 201 : FL,UNDOC,P6 */ + {I_HINT_NOP57, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71193, 653, 7835}, + /* 1 : HINT_NOP57 rm32 [m: o32 0f 1f /1 ] ND,FL,UNDOC,P6 */ + /* 321 355 001(1f) 201 : FL,UNDOC,P6 */ + {I_HINT_NOP57, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71199, 653, 7836}, + /* 2 : HINT_NOP57 rm64 [m: o64 0f 1f /1 ] ND,LONG,FL,PROT,UNDOC,X86_64 */ + /* 324 355 001(1f) 201 : LONG,FL,PROT,UNDOC,X86_64 */ + {I_HINT_NOP57, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71205, 654, 7837}, +}; + +static const struct itemplate instrux_HINT_NOP58[3] = { + /* 0 : HINT_NOP58 rm16 [m: o16 0f 1f /2 ] ND,FL,UNDOC,P6 */ + /* 320 355 001(1f) 202 : FL,UNDOC,P6 */ + {I_HINT_NOP58, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71211, 653, 7838}, + /* 1 : HINT_NOP58 rm32 [m: o32 0f 1f /2 ] ND,FL,UNDOC,P6 */ + /* 321 355 001(1f) 202 : FL,UNDOC,P6 */ + {I_HINT_NOP58, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71217, 653, 7839}, + /* 2 : HINT_NOP58 rm64 [m: o64 0f 1f /2 ] ND,LONG,FL,PROT,UNDOC,X86_64 */ + /* 324 355 001(1f) 202 : LONG,FL,PROT,UNDOC,X86_64 */ + {I_HINT_NOP58, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71223, 654, 7840}, +}; + +static const struct itemplate instrux_HINT_NOP59[3] = { + /* 0 : HINT_NOP59 rm16 [m: o16 0f 1f /3 ] ND,FL,UNDOC,P6 */ + /* 320 355 001(1f) 203 : FL,UNDOC,P6 */ + {I_HINT_NOP59, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71229, 653, 7841}, + /* 1 : HINT_NOP59 rm32 [m: o32 0f 1f /3 ] ND,FL,UNDOC,P6 */ + /* 321 355 001(1f) 203 : FL,UNDOC,P6 */ + {I_HINT_NOP59, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71235, 653, 7842}, + /* 2 : HINT_NOP59 rm64 [m: o64 0f 1f /3 ] ND,LONG,FL,PROT,UNDOC,X86_64 */ + /* 324 355 001(1f) 203 : LONG,FL,PROT,UNDOC,X86_64 */ + {I_HINT_NOP59, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71241, 654, 7843}, +}; + +static const struct itemplate instrux_HINT_NOP60[3] = { + /* 0 : HINT_NOP60 rm16 [m: o16 0f 1f /4 ] ND,FL,UNDOC,P6 */ + /* 320 355 001(1f) 204 : FL,UNDOC,P6 */ + {I_HINT_NOP60, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71247, 653, 7844}, + /* 1 : HINT_NOP60 rm32 [m: o32 0f 1f /4 ] ND,FL,UNDOC,P6 */ + /* 321 355 001(1f) 204 : FL,UNDOC,P6 */ + {I_HINT_NOP60, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71253, 653, 7845}, + /* 2 : HINT_NOP60 rm64 [m: o64 0f 1f /4 ] ND,LONG,FL,PROT,UNDOC,X86_64 */ + /* 324 355 001(1f) 204 : LONG,FL,PROT,UNDOC,X86_64 */ + {I_HINT_NOP60, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71259, 654, 7846}, +}; + +static const struct itemplate instrux_HINT_NOP61[3] = { + /* 0 : HINT_NOP61 rm16 [m: o16 0f 1f /5 ] ND,FL,UNDOC,P6 */ + /* 320 355 001(1f) 205 : FL,UNDOC,P6 */ + {I_HINT_NOP61, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71265, 653, 7847}, + /* 1 : HINT_NOP61 rm32 [m: o32 0f 1f /5 ] ND,FL,UNDOC,P6 */ + /* 321 355 001(1f) 205 : FL,UNDOC,P6 */ + {I_HINT_NOP61, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71271, 653, 7848}, + /* 2 : HINT_NOP61 rm64 [m: o64 0f 1f /5 ] ND,LONG,FL,PROT,UNDOC,X86_64 */ + /* 324 355 001(1f) 205 : LONG,FL,PROT,UNDOC,X86_64 */ + {I_HINT_NOP61, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71277, 654, 7849}, +}; + +static const struct itemplate instrux_HINT_NOP62[3] = { + /* 0 : HINT_NOP62 rm16 [m: o16 0f 1f /6 ] ND,FL,UNDOC,P6 */ + /* 320 355 001(1f) 206 : FL,UNDOC,P6 */ + {I_HINT_NOP62, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71283, 653, 7850}, + /* 1 : HINT_NOP62 rm32 [m: o32 0f 1f /6 ] ND,FL,UNDOC,P6 */ + /* 321 355 001(1f) 206 : FL,UNDOC,P6 */ + {I_HINT_NOP62, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71289, 653, 7851}, + /* 2 : HINT_NOP62 rm64 [m: o64 0f 1f /6 ] ND,LONG,FL,PROT,UNDOC,X86_64 */ + /* 324 355 001(1f) 206 : LONG,FL,PROT,UNDOC,X86_64 */ + {I_HINT_NOP62, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71295, 654, 7852}, +}; + +static const struct itemplate instrux_HINT_NOP63[3] = { + /* 0 : HINT_NOP63 rm16 [m: o16 0f 1f /7 ] ND,FL,UNDOC,P6 */ + /* 320 355 001(1f) 207 : FL,UNDOC,P6 */ + {I_HINT_NOP63, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71301, 653, 7853}, + /* 1 : HINT_NOP63 rm32 [m: o32 0f 1f /7 ] ND,FL,UNDOC,P6 */ + /* 321 355 001(1f) 207 : FL,UNDOC,P6 */ + {I_HINT_NOP63, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71307, 653, 7854}, + /* 2 : HINT_NOP63 rm64 [m: o64 0f 1f /7 ] ND,LONG,FL,PROT,UNDOC,X86_64 */ + /* 324 355 001(1f) 207 : LONG,FL,PROT,UNDOC,X86_64 */ + {I_HINT_NOP63, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71313, 654, 7855}, +}; + +const struct itemplate_list nasm_instructions[2640] = { + { 0, NULL /* DB */ }, + { 0, NULL /* DW */ }, + { 0, NULL /* DD */ }, + { 0, NULL /* DQ */ }, + { 0, NULL /* DT */ }, + { 0, NULL /* DO */ }, + { 0, NULL /* DY */ }, + { 0, NULL /* DZ */ }, + { 1, instrux_RESB }, + { 1, instrux_RESW }, + { 1, instrux_RESD }, + { 1, instrux_RESQ }, + { 1, instrux_REST }, + { 1, instrux_RESO }, + { 1, instrux_RESY }, + { 1, instrux_RESZ }, + { 0, NULL /* INCBIN */ }, + { 3, instrux_EQU }, + { 7, instrux_NOP }, + { 1, instrux_NOP2 }, + { 84, instrux_MOV }, + { 12, instrux_MOVABS }, + { 8, instrux_MOVRS }, + { 6, instrux_LEA }, + { 80, instrux_ADD }, + { 80, instrux_OR }, + { 64, instrux_ADC }, + { 64, instrux_SBB }, + { 80, instrux_AND }, + { 64, instrux_SUB }, + { 80, instrux_XOR }, + { 19, instrux_CMP }, + { 24, instrux_TEST }, + { 100, instrux_ROL }, + { 100, instrux_ROR }, + { 96, instrux_RCL }, + { 96, instrux_RCR }, + { 136, instrux_SHL }, + { 128, instrux_SAL }, + { 136, instrux_SHR }, + { 128, instrux_SAR }, + { 4, instrux_RORX }, + { 4, instrux_ROLX }, + { 32, instrux_SHLX }, + { 32, instrux_SALX }, + { 32, instrux_SARX }, + { 32, instrux_SHRX }, + { 18, instrux_INC }, + { 18, instrux_DEC }, + { 38, instrux_IMUL }, + { 42, instrux_MUL }, + { 8, instrux_MULX }, + { 8, instrux_IDIV }, + { 8, instrux_DIV }, + { 16, instrux_NEG }, + { 32, instrux_NOT }, + { 6, instrux_ADCX }, + { 6, instrux_ADOX }, + { 26, instrux_SHLD }, + { 26, instrux_SHRD }, + { 6, instrux_BT }, + { 6, instrux_BTC }, + { 6, instrux_BTR }, + { 6, instrux_BTS }, + { 3, instrux_BSF }, + { 3, instrux_BSR }, + { 2, instrux_IBTS }, + { 2, instrux_XBTS }, + { 6, instrux_LZCNT }, + { 6, instrux_TZCNT }, + { 24, instrux_ANDN }, + { 12, instrux_BEXTR }, + { 4, instrux_BLSMSK }, + { 4, instrux_BLSR }, + { 4, instrux_BLSI }, + { 8, instrux_BZHI }, + { 8, instrux_PDEP }, + { 8, instrux_PEXT }, + { 2, instrux_BLCI }, + { 2, instrux_BLCIC }, + { 2, instrux_BLSIC }, + { 2, instrux_BLCFILL }, + { 2, instrux_BLSFILL }, + { 2, instrux_BLCMSK }, + { 2, instrux_BLCS }, + { 2, instrux_TZMSK }, + { 2, instrux_T1MSKC }, + { 1, instrux_AAA }, + { 2, instrux_AAD }, + { 2, instrux_AAM }, + { 1, instrux_AAS }, + { 1, instrux_DAA }, + { 1, instrux_DAS }, + { 6, instrux_BSWAP }, + { 12, instrux_MOVBE }, + { 1, instrux_CBW }, + { 1, instrux_CDQ }, + { 1, instrux_CDQE }, + { 1, instrux_CQO }, + { 1, instrux_CWD }, + { 1, instrux_CWDE }, + { 12, instrux_MOVSX }, + { 4, instrux_MOVSXB }, + { 4, instrux_MOVSXW }, + { 4, instrux_MOVSXD }, + { 9, instrux_MOVZX }, + { 3, instrux_MOVZXB }, + { 3, instrux_MOVZXW }, + { 3, instrux_MOVZXD }, + { 4, instrux_CMPXCHG }, + { 1, instrux_CMPXCHG8B }, + { 1, instrux_CMPXCHG16B }, + { 4, instrux_XADD }, + { 15, instrux_XCHG }, + { 3, instrux_CMPXCHG486 }, + { 2, instrux_JMPABS }, + { 31, instrux_JMP }, + { 12, instrux_JA }, + { 12, instrux_JAE }, + { 12, instrux_JB }, + { 12, instrux_JBE }, + { 12, instrux_JC }, + { 12, instrux_JE }, + { 12, instrux_JG }, + { 12, instrux_JGE }, + { 12, instrux_JL }, + { 12, instrux_JLE }, + { 12, instrux_JNA }, + { 12, instrux_JNAE }, + { 12, instrux_JNB }, + { 12, instrux_JNBE }, + { 12, instrux_JNC }, + { 12, instrux_JNE }, + { 12, instrux_JNG }, + { 12, instrux_JNGE }, + { 12, instrux_JNL }, + { 12, instrux_JNLE }, + { 12, instrux_JNO }, + { 12, instrux_JNP }, + { 12, instrux_JNS }, + { 12, instrux_JNZ }, + { 12, instrux_JO }, + { 12, instrux_JP }, + { 12, instrux_JPE }, + { 12, instrux_JPO }, + { 12, instrux_JS }, + { 12, instrux_JZ }, + { 8, instrux_JCXZ }, + { 3, instrux_JECXZ }, + { 1, instrux_JRCXZ }, + { 9, instrux_LOOP }, + { 2, instrux_LOOPW }, + { 3, instrux_LOOPD }, + { 1, instrux_LOOPQ }, + { 9, instrux_LOOPE }, + { 2, instrux_LOOPEW }, + { 3, instrux_LOOPED }, + { 1, instrux_LOOPEQ }, + { 9, instrux_LOOPNE }, + { 2, instrux_LOOPNEW }, + { 3, instrux_LOOPNED }, + { 1, instrux_LOOPNEQ }, + { 9, instrux_LOOPZ }, + { 2, instrux_LOOPZW }, + { 3, instrux_LOOPZD }, + { 1, instrux_LOOPZQ }, + { 9, instrux_LOOPNZ }, + { 2, instrux_LOOPNZW }, + { 3, instrux_LOOPNZD }, + { 1, instrux_LOOPNZQ }, + { 9, instrux_JMPE }, + { 23, instrux_CALL }, + { 2, instrux_RET }, + { 2, instrux_RETW }, + { 2, instrux_RETD }, + { 2, instrux_RETQ }, + { 2, instrux_RETF }, + { 2, instrux_RETFW }, + { 2, instrux_RETFD }, + { 2, instrux_RETFQ }, + { 2, instrux_RETN }, + { 2, instrux_RETNW }, + { 2, instrux_RETND }, + { 2, instrux_RETNQ }, + { 1, instrux_INT }, + { 1, instrux_INT1 }, + { 1, instrux_INT01 }, + { 1, instrux_ICEBP }, + { 1, instrux_INT3 }, + { 1, instrux_INT03 }, + { 1, instrux_BRKPT }, + { 1, instrux_INTO }, + { 1, instrux_SYSCALL }, + { 1, instrux_SYSENTER }, + { 1, instrux_SYSEXIT }, + { 1, instrux_SYSRET }, + { 1, instrux_IRET }, + { 1, instrux_IRETW }, + { 1, instrux_IRETD }, + { 1, instrux_IRETQ }, + { 1, instrux_ERETS }, + { 1, instrux_ERETU }, + { 1, instrux_CLC }, + { 1, instrux_CLD }, + { 1, instrux_CLI }, + { 1, instrux_CLAC }, + { 1, instrux_STC }, + { 1, instrux_STD }, + { 1, instrux_STI }, + { 1, instrux_STAC }, + { 1, instrux_CMC }, + { 1, instrux_LAHF }, + { 1, instrux_SAHF }, + { 1, instrux_SALC }, + { 1, instrux_PUSHF }, + { 1, instrux_PUSHFW }, + { 1, instrux_PUSHFD }, + { 1, instrux_PUSHFQ }, + { 1, instrux_POPF }, + { 1, instrux_POPFW }, + { 1, instrux_POPFD }, + { 1, instrux_POPFQ }, + { 1, instrux_CMPSB }, + { 1, instrux_CMPSW }, + { 2, instrux_CMPSD }, + { 1, instrux_CMPSQ }, + { 1, instrux_LODSB }, + { 1, instrux_LODSW }, + { 1, instrux_LODSD }, + { 1, instrux_LODSQ }, + { 1, instrux_MOVSB }, + { 1, instrux_MOVSW }, + { 3, instrux_MOVSD }, + { 1, instrux_MOVSQ }, + { 1, instrux_STOSB }, + { 1, instrux_STOSW }, + { 1, instrux_STOSD }, + { 1, instrux_STOSQ }, + { 1, instrux_SCASB }, + { 1, instrux_SCASW }, + { 1, instrux_SCASD }, + { 1, instrux_SCASQ }, + { 1, instrux_INSB }, + { 1, instrux_INSW }, + { 1, instrux_INSD }, + { 1, instrux_OUTSB }, + { 1, instrux_OUTSW }, + { 1, instrux_OUTSD }, + { 2, instrux_LFENCE }, + { 2, instrux_MFENCE }, + { 2, instrux_SFENCE }, + { 1, instrux_SERIALIZE }, + { 1, instrux_CLFLUSH }, + { 1, instrux_CLFLUSHOPT }, + { 1, instrux_CLWB }, + { 1, instrux_PCOMMIT }, + { 4, instrux_CLZERO }, + { 1, instrux_INVD }, + { 1, instrux_WBINVD }, + { 1, instrux_WBNOINVD }, + { 3, instrux_INVPCID }, + { 1, instrux_INVLPG }, + { 4, instrux_INVLPGA }, + { 1, instrux_RDPMC }, + { 1, instrux_RDTSC }, + { 1, instrux_RDTSCP }, + { 3, instrux_RDRAND }, + { 3, instrux_RDSEED }, + { 3, instrux_RDPID }, + { 1, instrux_CLTS }, + { 1, instrux_CPUID }, + { 1, instrux_LMSW }, + { 5, instrux_SMSW }, + { 1, instrux_WRMSR }, + { 3, instrux_RDMSR }, + { 3, instrux_WRMSRNS }, + { 1, instrux_RDMSRLIST }, + { 1, instrux_WRMSRLIST }, + { 4, instrux_URDMSR }, + { 4, instrux_UWRMSR }, + { 6, instrux_UMOV }, + { 1, instrux_BB0_RESET }, + { 1, instrux_BB1_RESET }, + { 1, instrux_CPU_READ }, + { 1, instrux_CPU_WRITE }, + { 1, instrux_DMINT }, + { 1, instrux_RDM }, + { 1, instrux_SMINT }, + { 1, instrux_SMINTOLD }, + { 1, instrux_RSM }, + { 1, instrux_WRSHR }, + { 1, instrux_RDSHR }, + { 1, instrux_RSDC }, + { 1, instrux_RSLDT }, + { 1, instrux_RSTS }, + { 1, instrux_SVDC }, + { 1, instrux_SVLDT }, + { 1, instrux_SVTS }, + { 1, instrux_HLT }, + { 1, instrux_PAUSE }, + { 4, instrux_MONITOR }, + { 1, instrux_MONITORW }, + { 1, instrux_MONITORD }, + { 1, instrux_MONITORQ }, + { 2, instrux_MWAIT }, + { 7, instrux_MONITORX }, + { 2, instrux_MWAITX }, + { 2, instrux_TPAUSE }, + { 3, instrux_UMONITOR }, + { 2, instrux_UMWAIT }, + { 6, instrux_IN }, + { 6, instrux_OUT }, + { 2, instrux_LDS }, + { 2, instrux_LES }, + { 3, instrux_LFS }, + { 3, instrux_LGS }, + { 3, instrux_LSS }, + { 21, instrux_PUSH }, + { 14, instrux_POP }, + { 2, instrux_RDFSBASE }, + { 2, instrux_RDGSBASE }, + { 2, instrux_WRFSBASE }, + { 2, instrux_WRGSBASE }, + { 2, instrux_ARPL }, + { 3, instrux_LAR }, + { 3, instrux_LSL }, + { 1, instrux_VERR }, + { 1, instrux_VERW }, + { 1, instrux_SWAPGS }, + { 1, instrux_LKGS }, + { 3, instrux_LGDT }, + { 3, instrux_LIDT }, + { 4, instrux_LLDT }, + { 4, instrux_LTR }, + { 3, instrux_SGDT }, + { 3, instrux_SIDT }, + { 4, instrux_SLDT }, + { 4, instrux_STR }, + { 1, instrux_LOADALL }, + { 1, instrux_LOADALL286 }, + { 1, instrux_F2XM1 }, + { 1, instrux_FABS }, + { 7, instrux_FADD }, + { 3, instrux_FADDP }, + { 2, instrux_FBLD }, + { 2, instrux_FBSTP }, + { 1, instrux_FCHS }, + { 1, instrux_FCLEX }, + { 3, instrux_FCMOVB }, + { 3, instrux_FCMOVBE }, + { 3, instrux_FCMOVE }, + { 3, instrux_FCMOVNB }, + { 3, instrux_FCMOVNBE }, + { 3, instrux_FCMOVNE }, + { 3, instrux_FCMOVNU }, + { 3, instrux_FCMOVU }, + { 5, instrux_FCOM }, + { 3, instrux_FCOMI }, + { 3, instrux_FCOMIP }, + { 5, instrux_FCOMP }, + { 1, instrux_FCOMPP }, + { 1, instrux_FCOS }, + { 1, instrux_FDECSTP }, + { 1, instrux_FDISI }, + { 7, instrux_FDIV }, + { 3, instrux_FDIVP }, + { 7, instrux_FDIVR }, + { 3, instrux_FDIVRP }, + { 1, instrux_FEMMS }, + { 1, instrux_FENI }, + { 2, instrux_FFREE }, + { 2, instrux_FFREEP }, + { 2, instrux_FIADD }, + { 2, instrux_FICOM }, + { 2, instrux_FICOMP }, + { 2, instrux_FIDIV }, + { 2, instrux_FIDIVR }, + { 3, instrux_FILD }, + { 2, instrux_FIMUL }, + { 1, instrux_FINCSTP }, + { 1, instrux_FINIT }, + { 2, instrux_FIST }, + { 3, instrux_FISTP }, + { 3, instrux_FISTTP }, + { 2, instrux_FISUB }, + { 2, instrux_FISUBR }, + { 5, instrux_FLD }, + { 1, instrux_FLD1 }, + { 1, instrux_FLDCW }, + { 1, instrux_FLDENV }, + { 1, instrux_FLDL2E }, + { 1, instrux_FLDL2T }, + { 1, instrux_FLDLG2 }, + { 1, instrux_FLDLN2 }, + { 1, instrux_FLDPI }, + { 1, instrux_FLDZ }, + { 7, instrux_FMUL }, + { 3, instrux_FMULP }, + { 1, instrux_FNCLEX }, + { 1, instrux_FNDISI }, + { 1, instrux_FNENI }, + { 1, instrux_FNINIT }, + { 1, instrux_FNOP }, + { 1, instrux_FNSAVE }, + { 1, instrux_FNSTCW }, + { 1, instrux_FNSTENV }, + { 2, instrux_FNSTSW }, + { 1, instrux_FPATAN }, + { 1, instrux_FPREM }, + { 1, instrux_FPREM1 }, + { 1, instrux_FPTAN }, + { 1, instrux_FRNDINT }, + { 1, instrux_FRSTOR }, + { 1, instrux_FSAVE }, + { 1, instrux_FSCALE }, + { 1, instrux_FSETPM }, + { 1, instrux_FSIN }, + { 1, instrux_FSINCOS }, + { 1, instrux_FSQRT }, + { 4, instrux_FST }, + { 1, instrux_FSTCW }, + { 1, instrux_FSTENV }, + { 5, instrux_FSTP }, + { 2, instrux_FSTSW }, + { 7, instrux_FSUB }, + { 3, instrux_FSUBP }, + { 7, instrux_FSUBR }, + { 3, instrux_FSUBRP }, + { 1, instrux_FTST }, + { 3, instrux_FUCOM }, + { 3, instrux_FUCOMI }, + { 3, instrux_FUCOMIP }, + { 3, instrux_FUCOMP }, + { 1, instrux_FUCOMPP }, + { 1, instrux_FXAM }, + { 4, instrux_FXCH }, + { 1, instrux_FXTRACT }, + { 1, instrux_FYL2X }, + { 1, instrux_FYL2XP1 }, + { 1, instrux_EMMS }, + { 16, instrux_MOVD }, + { 18, instrux_MOVQ }, + { 2, instrux_PACKSSDW }, + { 2, instrux_PACKSSWB }, + { 2, instrux_PACKUSWB }, + { 2, instrux_PADDB }, + { 2, instrux_PADDD }, + { 2, instrux_PADDSB }, + { 1, instrux_PADDSIW }, + { 2, instrux_PADDSW }, + { 2, instrux_PADDUSB }, + { 2, instrux_PADDUSW }, + { 2, instrux_PADDW }, + { 2, instrux_PAND }, + { 2, instrux_PANDN }, + { 1, instrux_PAVEB }, + { 1, instrux_PAVGUSB }, + { 2, instrux_PCMPEQB }, + { 2, instrux_PCMPEQD }, + { 2, instrux_PCMPEQW }, + { 2, instrux_PCMPGTB }, + { 2, instrux_PCMPGTD }, + { 2, instrux_PCMPGTW }, + { 1, instrux_PDISTIB }, + { 1, instrux_PF2ID }, + { 1, instrux_PFACC }, + { 1, instrux_PFADD }, + { 1, instrux_PFCMPEQ }, + { 1, instrux_PFCMPGE }, + { 1, instrux_PFCMPGT }, + { 1, instrux_PFMAX }, + { 1, instrux_PFMIN }, + { 1, instrux_PFMUL }, + { 1, instrux_PFRCP }, + { 1, instrux_PFRCPIT1 }, + { 1, instrux_PFRCPIT2 }, + { 1, instrux_PFRSQIT1 }, + { 1, instrux_PFRSQRT }, + { 1, instrux_PFSUB }, + { 1, instrux_PFSUBR }, + { 1, instrux_PI2FD }, + { 1, instrux_PMACHRIW }, + { 2, instrux_PMADDWD }, + { 1, instrux_PMAGW }, + { 1, instrux_PMULHRIW }, + { 1, instrux_PMULHRWA }, + { 1, instrux_PMULHRWC }, + { 2, instrux_PMULHW }, + { 2, instrux_PMULLW }, + { 1, instrux_PMVGEZB }, + { 1, instrux_PMVLZB }, + { 1, instrux_PMVNZB }, + { 1, instrux_PMVZB }, + { 2, instrux_POR }, + { 1, instrux_PREFETCH }, + { 1, instrux_PREFETCHW }, + { 4, instrux_PSLLD }, + { 4, instrux_PSLLQ }, + { 4, instrux_PSLLW }, + { 4, instrux_PSRAD }, + { 4, instrux_PSRAW }, + { 4, instrux_PSRLD }, + { 4, instrux_PSRLQ }, + { 4, instrux_PSRLW }, + { 2, instrux_PSUBB }, + { 2, instrux_PSUBD }, + { 2, instrux_PSUBSB }, + { 1, instrux_PSUBSIW }, + { 2, instrux_PSUBSW }, + { 2, instrux_PSUBUSB }, + { 2, instrux_PSUBUSW }, + { 2, instrux_PSUBW }, + { 2, instrux_PUNPCKHBW }, + { 2, instrux_PUNPCKHDQ }, + { 2, instrux_PUNPCKHWD }, + { 2, instrux_PUNPCKLBW }, + { 2, instrux_PUNPCKLDQ }, + { 2, instrux_PUNPCKLWD }, + { 1, instrux_PUSHA }, + { 1, instrux_PUSHAW }, + { 1, instrux_PUSHAD }, + { 1, instrux_POPA }, + { 1, instrux_POPAW }, + { 1, instrux_POPAD }, + { 2, instrux_ENTER }, + { 2, instrux_ENTERW }, + { 2, instrux_ENTERD }, + { 2, instrux_ENTERQ }, + { 1, instrux_LEAVE }, + { 1, instrux_LEAVEW }, + { 1, instrux_LEAVED }, + { 1, instrux_LEAVEQ }, + { 2, instrux_BOUND }, + { 3, instrux_PUSHP }, + { 3, instrux_POPP }, + { 2, instrux_PUSH2 }, + { 2, instrux_PUSH2P }, + { 2, instrux_POP2 }, + { 2, instrux_POP2P }, + { 2, instrux_PXOR }, + { 1, instrux_SKINIT }, + { 4, instrux_UD0 }, + { 4, instrux_UD1 }, + { 4, instrux_UD2B }, + { 4, instrux_UD2 }, + { 4, instrux_UD2A }, + { 1, instrux_UDB }, + { 1, instrux_UDW }, + { 1, instrux_FWAIT }, + { 1, instrux_XLATB }, + { 1, instrux_XLAT }, + { 15, instrux_CCMP }, + { 15, instrux_CCMPA }, + { 15, instrux_CCMPAE }, + { 15, instrux_CCMPB }, + { 15, instrux_CCMPBE }, + { 15, instrux_CCMPC }, + { 15, instrux_CCMPE }, + { 15, instrux_CCMPF }, + { 15, instrux_CCMPG }, + { 15, instrux_CCMPGE }, + { 15, instrux_CCMPL }, + { 15, instrux_CCMPLE }, + { 15, instrux_CCMPNA }, + { 15, instrux_CCMPNAE }, + { 15, instrux_CCMPNB }, + { 15, instrux_CCMPNBE }, + { 15, instrux_CCMPNC }, + { 15, instrux_CCMPNE }, + { 15, instrux_CCMPNG }, + { 15, instrux_CCMPNGE }, + { 15, instrux_CCMPNL }, + { 15, instrux_CCMPNLE }, + { 15, instrux_CCMPNO }, + { 15, instrux_CCMPNS }, + { 15, instrux_CCMPNZ }, + { 15, instrux_CCMPO }, + { 15, instrux_CCMPS }, + { 15, instrux_CCMPT }, + { 15, instrux_CCMPZ }, + { 12, instrux_CTEST }, + { 12, instrux_CTESTA }, + { 12, instrux_CTESTAE }, + { 12, instrux_CTESTB }, + { 12, instrux_CTESTBE }, + { 12, instrux_CTESTC }, + { 12, instrux_CTESTE }, + { 12, instrux_CTESTF }, + { 12, instrux_CTESTG }, + { 12, instrux_CTESTGE }, + { 12, instrux_CTESTL }, + { 12, instrux_CTESTLE }, + { 12, instrux_CTESTNA }, + { 12, instrux_CTESTNAE }, + { 12, instrux_CTESTNB }, + { 12, instrux_CTESTNBE }, + { 12, instrux_CTESTNC }, + { 12, instrux_CTESTNE }, + { 12, instrux_CTESTNG }, + { 12, instrux_CTESTNGE }, + { 12, instrux_CTESTNL }, + { 12, instrux_CTESTNLE }, + { 12, instrux_CTESTNO }, + { 12, instrux_CTESTNS }, + { 12, instrux_CTESTNZ }, + { 12, instrux_CTESTO }, + { 12, instrux_CTESTS }, + { 12, instrux_CTESTT }, + { 12, instrux_CTESTZ }, + { 6, instrux_CMOVA }, + { 6, instrux_CMOVAE }, + { 6, instrux_CMOVB }, + { 6, instrux_CMOVBE }, + { 6, instrux_CMOVC }, + { 6, instrux_CMOVE }, + { 6, instrux_CMOVG }, + { 6, instrux_CMOVGE }, + { 6, instrux_CMOVL }, + { 6, instrux_CMOVLE }, + { 6, instrux_CMOVNA }, + { 6, instrux_CMOVNAE }, + { 6, instrux_CMOVNB }, + { 6, instrux_CMOVNBE }, + { 6, instrux_CMOVNC }, + { 6, instrux_CMOVNE }, + { 6, instrux_CMOVNG }, + { 6, instrux_CMOVNGE }, + { 6, instrux_CMOVNL }, + { 6, instrux_CMOVNLE }, + { 6, instrux_CMOVNO }, + { 6, instrux_CMOVNP }, + { 6, instrux_CMOVNS }, + { 6, instrux_CMOVNZ }, + { 6, instrux_CMOVO }, + { 6, instrux_CMOVP }, + { 6, instrux_CMOVPE }, + { 6, instrux_CMOVPO }, + { 6, instrux_CMOVS }, + { 6, instrux_CMOVZ }, + { 15, instrux_CFCMOVA }, + { 15, instrux_CFCMOVAE }, + { 15, instrux_CFCMOVB }, + { 15, instrux_CFCMOVBE }, + { 15, instrux_CFCMOVC }, + { 15, instrux_CFCMOVE }, + { 15, instrux_CFCMOVG }, + { 15, instrux_CFCMOVGE }, + { 15, instrux_CFCMOVL }, + { 15, instrux_CFCMOVLE }, + { 15, instrux_CFCMOVNA }, + { 15, instrux_CFCMOVNAE }, + { 15, instrux_CFCMOVNB }, + { 15, instrux_CFCMOVNBE }, + { 15, instrux_CFCMOVNC }, + { 15, instrux_CFCMOVNE }, + { 15, instrux_CFCMOVNG }, + { 15, instrux_CFCMOVNGE }, + { 15, instrux_CFCMOVNL }, + { 15, instrux_CFCMOVNLE }, + { 15, instrux_CFCMOVNO }, + { 15, instrux_CFCMOVNP }, + { 15, instrux_CFCMOVNS }, + { 15, instrux_CFCMOVNZ }, + { 15, instrux_CFCMOVO }, + { 15, instrux_CFCMOVP }, + { 15, instrux_CFCMOVPE }, + { 15, instrux_CFCMOVPO }, + { 15, instrux_CFCMOVS }, + { 15, instrux_CFCMOVZ }, + { 4, instrux_SETA }, + { 4, instrux_SETAE }, + { 4, instrux_SETB }, + { 4, instrux_SETBE }, + { 4, instrux_SETC }, + { 4, instrux_SETE }, + { 4, instrux_SETG }, + { 4, instrux_SETGE }, + { 4, instrux_SETL }, + { 4, instrux_SETLE }, + { 4, instrux_SETNA }, + { 4, instrux_SETNAE }, + { 4, instrux_SETNB }, + { 4, instrux_SETNBE }, + { 4, instrux_SETNC }, + { 4, instrux_SETNE }, + { 4, instrux_SETNG }, + { 4, instrux_SETNGE }, + { 4, instrux_SETNL }, + { 4, instrux_SETNLE }, + { 4, instrux_SETNO }, + { 4, instrux_SETNP }, + { 4, instrux_SETNS }, + { 4, instrux_SETNZ }, + { 4, instrux_SETO }, + { 4, instrux_SETP }, + { 4, instrux_SETPE }, + { 4, instrux_SETPO }, + { 4, instrux_SETS }, + { 4, instrux_SETZ }, + { 3, instrux_SETAZU }, + { 3, instrux_SETAEZU }, + { 3, instrux_SETBZU }, + { 3, instrux_SETBEZU }, + { 3, instrux_SETCZU }, + { 3, instrux_SETEZU }, + { 3, instrux_SETGZU }, + { 3, instrux_SETGEZU }, + { 3, instrux_SETLZU }, + { 3, instrux_SETLEZU }, + { 3, instrux_SETNAZU }, + { 3, instrux_SETNAEZU }, + { 3, instrux_SETNBZU }, + { 3, instrux_SETNBEZU }, + { 3, instrux_SETNCZU }, + { 3, instrux_SETNEZU }, + { 3, instrux_SETNGZU }, + { 3, instrux_SETNGEZU }, + { 3, instrux_SETNLZU }, + { 3, instrux_SETNLEZU }, + { 3, instrux_SETNOZU }, + { 3, instrux_SETNPZU }, + { 3, instrux_SETNSZU }, + { 3, instrux_SETNZZU }, + { 3, instrux_SETOZU }, + { 3, instrux_SETPZU }, + { 3, instrux_SETPEZU }, + { 3, instrux_SETPOZU }, + { 3, instrux_SETSZU }, + { 3, instrux_SETZZU }, + { 4, instrux_CMPAXADD }, + { 4, instrux_CMPAEXADD }, + { 4, instrux_CMPBXADD }, + { 4, instrux_CMPBEXADD }, + { 4, instrux_CMPCXADD }, + { 4, instrux_CMPEXADD }, + { 4, instrux_CMPGXADD }, + { 4, instrux_CMPGEXADD }, + { 4, instrux_CMPLXADD }, + { 4, instrux_CMPLEXADD }, + { 4, instrux_CMPNAXADD }, + { 4, instrux_CMPNAEXADD }, + { 4, instrux_CMPNBXADD }, + { 4, instrux_CMPNBEXADD }, + { 4, instrux_CMPNCXADD }, + { 4, instrux_CMPNEXADD }, + { 4, instrux_CMPNGXADD }, + { 4, instrux_CMPNGEXADD }, + { 4, instrux_CMPNLXADD }, + { 4, instrux_CMPNLEXADD }, + { 4, instrux_CMPNOXADD }, + { 4, instrux_CMPNPXADD }, + { 4, instrux_CMPNSXADD }, + { 4, instrux_CMPNZXADD }, + { 4, instrux_CMPOXADD }, + { 4, instrux_CMPPXADD }, + { 4, instrux_CMPPEXADD }, + { 4, instrux_CMPPOXADD }, + { 4, instrux_CMPSXADD }, + { 4, instrux_CMPZXADD }, + { 1, instrux_ADDPS }, + { 1, instrux_ADDSS }, + { 1, instrux_ANDNPS }, + { 1, instrux_ANDPS }, + { 1, instrux_CMPEQPS }, + { 1, instrux_CMPEQSS }, + { 1, instrux_CMPLEPS }, + { 1, instrux_CMPLESS }, + { 1, instrux_CMPLTPS }, + { 1, instrux_CMPLTSS }, + { 1, instrux_CMPNEQPS }, + { 1, instrux_CMPNEQSS }, + { 1, instrux_CMPNLEPS }, + { 1, instrux_CMPNLESS }, + { 1, instrux_CMPNLTPS }, + { 1, instrux_CMPNLTSS }, + { 1, instrux_CMPORDPS }, + { 1, instrux_CMPORDSS }, + { 1, instrux_CMPUNORDPS }, + { 1, instrux_CMPUNORDSS }, + { 1, instrux_CMPPS }, + { 1, instrux_CMPSS }, + { 1, instrux_COMISS }, + { 1, instrux_CVTPI2PS }, + { 1, instrux_CVTPS2PI }, + { 2, instrux_CVTSI2SS }, + { 2, instrux_CVTSS2SI }, + { 1, instrux_CVTTPS2PI }, + { 2, instrux_CVTTSS2SI }, + { 1, instrux_DIVPS }, + { 1, instrux_DIVSS }, + { 1, instrux_LDMXCSR }, + { 1, instrux_MAXPS }, + { 1, instrux_MAXSS }, + { 1, instrux_MINPS }, + { 1, instrux_MINSS }, + { 2, instrux_MOVAPS }, + { 2, instrux_MOVHPS }, + { 1, instrux_MOVLHPS }, + { 2, instrux_MOVLPS }, + { 1, instrux_MOVHLPS }, + { 2, instrux_MOVMSKPS }, + { 1, instrux_MOVNTPS }, + { 2, instrux_MOVSS }, + { 2, instrux_MOVUPS }, + { 1, instrux_MULPS }, + { 1, instrux_MULSS }, + { 1, instrux_ORPS }, + { 1, instrux_RCPPS }, + { 1, instrux_RCPSS }, + { 1, instrux_RSQRTPS }, + { 1, instrux_RSQRTSS }, + { 1, instrux_SHUFPS }, + { 1, instrux_SQRTPS }, + { 1, instrux_SQRTSS }, + { 1, instrux_STMXCSR }, + { 1, instrux_SUBPS }, + { 1, instrux_SUBSS }, + { 1, instrux_UCOMISS }, + { 1, instrux_UNPCKHPS }, + { 1, instrux_UNPCKLPS }, + { 1, instrux_XORPS }, + { 1, instrux_FXRSTOR }, + { 1, instrux_FXRSTOR64 }, + { 1, instrux_FXSAVE }, + { 1, instrux_FXSAVE64 }, + { 1, instrux_XGETBV }, + { 1, instrux_XSETBV }, + { 1, instrux_XSAVE }, + { 1, instrux_XSAVE64 }, + { 1, instrux_XSAVEC }, + { 1, instrux_XSAVEC64 }, + { 1, instrux_XSAVEOPT }, + { 1, instrux_XSAVEOPT64 }, + { 1, instrux_XSAVES }, + { 1, instrux_XSAVES64 }, + { 1, instrux_XRSTOR }, + { 1, instrux_XRSTOR64 }, + { 1, instrux_XRSTORS }, + { 1, instrux_XRSTORS64 }, + { 1, instrux_PREFETCHNTA }, + { 1, instrux_PREFETCHT0 }, + { 1, instrux_PREFETCHT1 }, + { 1, instrux_PREFETCHT2 }, + { 1, instrux_PREFETCHIT0 }, + { 1, instrux_PREFETCHIT1 }, + { 1, instrux_MASKMOVQ }, + { 1, instrux_MOVNTQ }, + { 2, instrux_PAVGB }, + { 2, instrux_PAVGW }, + { 6, instrux_PEXTRW }, + { 8, instrux_PINSRW }, + { 2, instrux_PMAXSW }, + { 2, instrux_PMAXUB }, + { 2, instrux_PMINSW }, + { 2, instrux_PMINUB }, + { 2, instrux_PMOVMSKB }, + { 2, instrux_PMULHUW }, + { 2, instrux_PSADBW }, + { 1, instrux_PSHUFW }, + { 1, instrux_PF2IW }, + { 1, instrux_PFNACC }, + { 1, instrux_PFPNACC }, + { 1, instrux_PI2FW }, + { 1, instrux_PSWAPD }, + { 1, instrux_MASKMOVDQU }, + { 1, instrux_MOVNTDQ }, + { 2, instrux_MOVNTI }, + { 1, instrux_MOVNTPD }, + { 2, instrux_MOVDQA }, + { 2, instrux_MOVDQU }, + { 1, instrux_MOVDQ2Q }, + { 1, instrux_MOVQ2DQ }, + { 2, instrux_PADDQ }, + { 2, instrux_PMULUDQ }, + { 2, instrux_PSHUFD }, + { 2, instrux_PSHUFHW }, + { 2, instrux_PSHUFLW }, + { 1, instrux_PSLLDQ }, + { 1, instrux_PSRLDQ }, + { 2, instrux_PSUBQ }, + { 1, instrux_PUNPCKHQDQ }, + { 1, instrux_PUNPCKLQDQ }, + { 1, instrux_ADDPD }, + { 1, instrux_ADDSD }, + { 1, instrux_ANDNPD }, + { 1, instrux_ANDPD }, + { 1, instrux_CMPEQPD }, + { 1, instrux_CMPEQSD }, + { 1, instrux_CMPLEPD }, + { 1, instrux_CMPLESD }, + { 1, instrux_CMPLTPD }, + { 1, instrux_CMPLTSD }, + { 1, instrux_CMPNEQPD }, + { 1, instrux_CMPNEQSD }, + { 1, instrux_CMPNLEPD }, + { 1, instrux_CMPNLESD }, + { 1, instrux_CMPNLTPD }, + { 1, instrux_CMPNLTSD }, + { 1, instrux_CMPORDPD }, + { 1, instrux_CMPORDSD }, + { 1, instrux_CMPUNORDPD }, + { 1, instrux_CMPUNORDSD }, + { 1, instrux_CMPPD }, + { 1, instrux_COMISD }, + { 1, instrux_CVTDQ2PD }, + { 1, instrux_CVTDQ2PS }, + { 1, instrux_CVTPD2DQ }, + { 1, instrux_CVTPD2PI }, + { 1, instrux_CVTPD2PS }, + { 1, instrux_CVTPI2PD }, + { 1, instrux_CVTPS2DQ }, + { 1, instrux_CVTPS2PD }, + { 2, instrux_CVTSD2SI }, + { 1, instrux_CVTSD2SS }, + { 2, instrux_CVTSI2SD }, + { 1, instrux_CVTSS2SD }, + { 1, instrux_CVTTPD2PI }, + { 1, instrux_CVTTPD2DQ }, + { 1, instrux_CVTTPS2DQ }, + { 2, instrux_CVTTSD2SI }, + { 1, instrux_DIVPD }, + { 1, instrux_DIVSD }, + { 1, instrux_MAXPD }, + { 1, instrux_MAXSD }, + { 1, instrux_MINPD }, + { 1, instrux_MINSD }, + { 2, instrux_MOVAPD }, + { 2, instrux_MOVHPD }, + { 2, instrux_MOVLPD }, + { 2, instrux_MOVMSKPD }, + { 2, instrux_MOVUPD }, + { 1, instrux_MULPD }, + { 1, instrux_MULSD }, + { 1, instrux_ORPD }, + { 1, instrux_SHUFPD }, + { 1, instrux_SQRTPD }, + { 1, instrux_SQRTSD }, + { 1, instrux_SUBPD }, + { 1, instrux_SUBSD }, + { 1, instrux_UCOMISD }, + { 1, instrux_UNPCKHPD }, + { 1, instrux_UNPCKLPD }, + { 1, instrux_XORPD }, + { 1, instrux_ADDSUBPD }, + { 1, instrux_ADDSUBPS }, + { 1, instrux_HADDPD }, + { 1, instrux_HADDPS }, + { 1, instrux_HSUBPD }, + { 1, instrux_HSUBPS }, + { 1, instrux_LDDQU }, + { 1, instrux_MOVDDUP }, + { 1, instrux_MOVSHDUP }, + { 1, instrux_MOVSLDUP }, + { 1, instrux_CLGI }, + { 1, instrux_STGI }, + { 1, instrux_VMCALL }, + { 1, instrux_VMCLEAR }, + { 1, instrux_VMFUNC }, + { 1, instrux_VMLAUNCH }, + { 1, instrux_VMLOAD }, + { 1, instrux_VMMCALL }, + { 1, instrux_VMPTRLD }, + { 1, instrux_VMPTRST }, + { 2, instrux_VMREAD }, + { 1, instrux_VMRESUME }, + { 1, instrux_VMRUN }, + { 1, instrux_VMSAVE }, + { 2, instrux_VMWRITE }, + { 1, instrux_VMXOFF }, + { 1, instrux_VMXON }, + { 3, instrux_INVEPT }, + { 3, instrux_INVVPID }, + { 1, instrux_PVALIDATE }, + { 1, instrux_RMPADJUST }, + { 2, instrux_VMGEXIT }, + { 2, instrux_PABSB }, + { 2, instrux_PABSW }, + { 2, instrux_PABSD }, + { 2, instrux_PALIGNR }, + { 2, instrux_PHADDW }, + { 2, instrux_PHADDD }, + { 2, instrux_PHADDSW }, + { 2, instrux_PHSUBW }, + { 2, instrux_PHSUBD }, + { 2, instrux_PHSUBSW }, + { 2, instrux_PMADDUBSW }, + { 2, instrux_PMULHRSW }, + { 2, instrux_PSHUFB }, + { 2, instrux_PSIGNB }, + { 2, instrux_PSIGNW }, + { 2, instrux_PSIGND }, + { 2, instrux_EXTRQ }, + { 2, instrux_INSERTQ }, + { 1, instrux_MOVNTSD }, + { 1, instrux_MOVNTSS }, + { 1, instrux_BLENDPD }, + { 1, instrux_BLENDPS }, + { 2, instrux_BLENDVPD }, + { 2, instrux_BLENDVPS }, + { 1, instrux_DPPD }, + { 1, instrux_DPPS }, + { 2, instrux_EXTRACTPS }, + { 1, instrux_INSERTPS }, + { 1, instrux_MOVNTDQA }, + { 1, instrux_MPSADBW }, + { 1, instrux_PACKUSDW }, + { 2, instrux_PBLENDVB }, + { 1, instrux_PBLENDW }, + { 1, instrux_PCMPEQQ }, + { 3, instrux_PEXTRB }, + { 1, instrux_PEXTRD }, + { 1, instrux_PEXTRQ }, + { 1, instrux_PHMINPOSUW }, + { 3, instrux_PINSRB }, + { 1, instrux_PINSRD }, + { 1, instrux_PINSRQ }, + { 1, instrux_PMAXSB }, + { 1, instrux_PMAXSD }, + { 1, instrux_PMAXUD }, + { 1, instrux_PMAXUW }, + { 1, instrux_PMINSB }, + { 1, instrux_PMINSD }, + { 1, instrux_PMINUD }, + { 1, instrux_PMINUW }, + { 1, instrux_PMOVSXBW }, + { 1, instrux_PMOVSXBD }, + { 1, instrux_PMOVSXBQ }, + { 1, instrux_PMOVSXWD }, + { 1, instrux_PMOVSXWQ }, + { 1, instrux_PMOVSXDQ }, + { 1, instrux_PMOVZXBW }, + { 1, instrux_PMOVZXBD }, + { 1, instrux_PMOVZXBQ }, + { 1, instrux_PMOVZXWD }, + { 1, instrux_PMOVZXWQ }, + { 1, instrux_PMOVZXDQ }, + { 1, instrux_PMULDQ }, + { 1, instrux_PMULLD }, + { 1, instrux_PTEST }, + { 1, instrux_ROUNDPD }, + { 1, instrux_ROUNDPS }, + { 1, instrux_ROUNDSD }, + { 1, instrux_ROUNDSS }, + { 18, instrux_CRC32 }, + { 1, instrux_PCMPESTRI }, + { 1, instrux_PCMPESTRM }, + { 1, instrux_PCMPISTRI }, + { 1, instrux_PCMPISTRM }, + { 1, instrux_PCMPGTQ }, + { 6, instrux_POPCNT }, + { 1, instrux_GETSEC }, + { 1, instrux_PFRCPV }, + { 1, instrux_PFRSQRTV }, + { 1, instrux_AESENC }, + { 1, instrux_AESENCLAST }, + { 1, instrux_AESDEC }, + { 1, instrux_AESDECLAST }, + { 1, instrux_AESIMC }, + { 1, instrux_AESKEYGENASSIST }, + { 10, instrux_VAESENC }, + { 10, instrux_VAESENCLAST }, + { 10, instrux_VAESDEC }, + { 10, instrux_VAESDECLAST }, + { 1, instrux_VAESIMC }, + { 1, instrux_VAESKEYGENASSIST }, + { 1, instrux_AESDEC128KL }, + { 1, instrux_AESDEC256KL }, + { 1, instrux_AESENC128KL }, + { 1, instrux_AESENC256KL }, + { 1, instrux_ENCODEKEY128 }, + { 1, instrux_ENCODEKEY256 }, + { 1, instrux_LOADIWKEY }, + { 1, instrux_AESDECWIDE128KL }, + { 1, instrux_AESDECWIDE256KL }, + { 1, instrux_AESENCWIDE128KL }, + { 1, instrux_AESENCWIDE256KL }, + { 10, instrux_VADDPD }, + { 10, instrux_VADDPS }, + { 4, instrux_VADDSD }, + { 4, instrux_VADDSS }, + { 4, instrux_VADDSUBPD }, + { 4, instrux_VADDSUBPS }, + { 10, instrux_VANDPD }, + { 10, instrux_VANDPS }, + { 10, instrux_VANDNPD }, + { 10, instrux_VANDNPS }, + { 4, instrux_VBLENDPD }, + { 4, instrux_VBLENDPS }, + { 4, instrux_VBLENDVPD }, + { 4, instrux_VBLENDVPS }, + { 10, instrux_VBROADCASTSS }, + { 6, instrux_VBROADCASTSD }, + { 1, instrux_VBROADCASTF128 }, + { 11, instrux_VCMPEQ_OSPD }, + { 7, instrux_VCMPEQPD }, + { 7, instrux_VCMPLT_OSPD }, + { 7, instrux_VCMPLTPD }, + { 7, instrux_VCMPLE_OSPD }, + { 7, instrux_VCMPLEPD }, + { 7, instrux_VCMPUNORD_QPD }, + { 7, instrux_VCMPUNORDPD }, + { 7, instrux_VCMPNEQ_UQPD }, + { 7, instrux_VCMPNEQPD }, + { 7, instrux_VCMPNLT_USPD }, + { 7, instrux_VCMPNLTPD }, + { 7, instrux_VCMPNLE_USPD }, + { 7, instrux_VCMPNLEPD }, + { 7, instrux_VCMPORD_QPD }, + { 7, instrux_VCMPORDPD }, + { 7, instrux_VCMPEQ_UQPD }, + { 7, instrux_VCMPNGE_USPD }, + { 7, instrux_VCMPNGEPD }, + { 7, instrux_VCMPNGT_USPD }, + { 7, instrux_VCMPNGTPD }, + { 7, instrux_VCMPFALSE_OQPD }, + { 7, instrux_VCMPFALSEPD }, + { 7, instrux_VCMPNEQ_OQPD }, + { 7, instrux_VCMPGE_OSPD }, + { 7, instrux_VCMPGEPD }, + { 7, instrux_VCMPGT_OSPD }, + { 7, instrux_VCMPGTPD }, + { 7, instrux_VCMPTRUE_UQPD }, + { 7, instrux_VCMPTRUEPD }, + { 7, instrux_VCMPLT_OQPD }, + { 7, instrux_VCMPLE_OQPD }, + { 7, instrux_VCMPUNORD_SPD }, + { 7, instrux_VCMPNEQ_USPD }, + { 7, instrux_VCMPNLT_UQPD }, + { 7, instrux_VCMPNLE_UQPD }, + { 7, instrux_VCMPORD_SPD }, + { 7, instrux_VCMPEQ_USPD }, + { 7, instrux_VCMPNGE_UQPD }, + { 7, instrux_VCMPNGT_UQPD }, + { 7, instrux_VCMPFALSE_OSPD }, + { 7, instrux_VCMPNEQ_OSPD }, + { 7, instrux_VCMPGE_OQPD }, + { 7, instrux_VCMPGT_OQPD }, + { 7, instrux_VCMPTRUE_USPD }, + { 7, instrux_VCMPPD }, + { 11, instrux_VCMPEQ_OSPS }, + { 7, instrux_VCMPEQPS }, + { 7, instrux_VCMPLT_OSPS }, + { 7, instrux_VCMPLTPS }, + { 7, instrux_VCMPLE_OSPS }, + { 7, instrux_VCMPLEPS }, + { 7, instrux_VCMPUNORD_QPS }, + { 7, instrux_VCMPUNORDPS }, + { 7, instrux_VCMPNEQ_UQPS }, + { 7, instrux_VCMPNEQPS }, + { 7, instrux_VCMPNLT_USPS }, + { 7, instrux_VCMPNLTPS }, + { 7, instrux_VCMPNLE_USPS }, + { 7, instrux_VCMPNLEPS }, + { 7, instrux_VCMPORD_QPS }, + { 7, instrux_VCMPORDPS }, + { 7, instrux_VCMPEQ_UQPS }, + { 7, instrux_VCMPNGE_USPS }, + { 7, instrux_VCMPNGEPS }, + { 7, instrux_VCMPNGT_USPS }, + { 7, instrux_VCMPNGTPS }, + { 7, instrux_VCMPFALSE_OQPS }, + { 7, instrux_VCMPFALSEPS }, + { 7, instrux_VCMPNEQ_OQPS }, + { 7, instrux_VCMPGE_OSPS }, + { 7, instrux_VCMPGEPS }, + { 7, instrux_VCMPGT_OSPS }, + { 7, instrux_VCMPGTPS }, + { 7, instrux_VCMPTRUE_UQPS }, + { 7, instrux_VCMPTRUEPS }, + { 7, instrux_VCMPLT_OQPS }, + { 7, instrux_VCMPLE_OQPS }, + { 7, instrux_VCMPUNORD_SPS }, + { 7, instrux_VCMPNEQ_USPS }, + { 7, instrux_VCMPNLT_UQPS }, + { 7, instrux_VCMPNLE_UQPS }, + { 7, instrux_VCMPORD_SPS }, + { 7, instrux_VCMPEQ_USPS }, + { 7, instrux_VCMPNGE_UQPS }, + { 7, instrux_VCMPNGT_UQPS }, + { 7, instrux_VCMPFALSE_OSPS }, + { 7, instrux_VCMPNEQ_OSPS }, + { 7, instrux_VCMPGE_OQPS }, + { 7, instrux_VCMPGT_OQPS }, + { 7, instrux_VCMPTRUE_USPS }, + { 7, instrux_VCMPPS }, + { 5, instrux_VCMPEQ_OSSD }, + { 3, instrux_VCMPEQSD }, + { 3, instrux_VCMPLT_OSSD }, + { 3, instrux_VCMPLTSD }, + { 3, instrux_VCMPLE_OSSD }, + { 3, instrux_VCMPLESD }, + { 3, instrux_VCMPUNORD_QSD }, + { 3, instrux_VCMPUNORDSD }, + { 3, instrux_VCMPNEQ_UQSD }, + { 3, instrux_VCMPNEQSD }, + { 3, instrux_VCMPNLT_USSD }, + { 3, instrux_VCMPNLTSD }, + { 3, instrux_VCMPNLE_USSD }, + { 3, instrux_VCMPNLESD }, + { 3, instrux_VCMPORD_QSD }, + { 3, instrux_VCMPORDSD }, + { 3, instrux_VCMPEQ_UQSD }, + { 3, instrux_VCMPNGE_USSD }, + { 3, instrux_VCMPNGESD }, + { 3, instrux_VCMPNGT_USSD }, + { 3, instrux_VCMPNGTSD }, + { 3, instrux_VCMPFALSE_OQSD }, + { 3, instrux_VCMPFALSESD }, + { 3, instrux_VCMPNEQ_OQSD }, + { 3, instrux_VCMPGE_OSSD }, + { 3, instrux_VCMPGESD }, + { 3, instrux_VCMPGT_OSSD }, + { 3, instrux_VCMPGTSD }, + { 3, instrux_VCMPTRUE_UQSD }, + { 3, instrux_VCMPTRUESD }, + { 3, instrux_VCMPLT_OQSD }, + { 3, instrux_VCMPLE_OQSD }, + { 3, instrux_VCMPUNORD_SSD }, + { 3, instrux_VCMPNEQ_USSD }, + { 3, instrux_VCMPNLT_UQSD }, + { 3, instrux_VCMPNLE_UQSD }, + { 3, instrux_VCMPORD_SSD }, + { 3, instrux_VCMPEQ_USSD }, + { 3, instrux_VCMPNGE_UQSD }, + { 3, instrux_VCMPNGT_UQSD }, + { 3, instrux_VCMPFALSE_OSSD }, + { 3, instrux_VCMPNEQ_OSSD }, + { 3, instrux_VCMPGE_OQSD }, + { 3, instrux_VCMPGT_OQSD }, + { 3, instrux_VCMPTRUE_USSD }, + { 3, instrux_VCMPSD }, + { 5, instrux_VCMPEQ_OSSS }, + { 3, instrux_VCMPEQSS }, + { 3, instrux_VCMPLT_OSSS }, + { 3, instrux_VCMPLTSS }, + { 3, instrux_VCMPLE_OSSS }, + { 3, instrux_VCMPLESS }, + { 3, instrux_VCMPUNORD_QSS }, + { 3, instrux_VCMPUNORDSS }, + { 3, instrux_VCMPNEQ_UQSS }, + { 3, instrux_VCMPNEQSS }, + { 3, instrux_VCMPNLT_USSS }, + { 3, instrux_VCMPNLTSS }, + { 3, instrux_VCMPNLE_USSS }, + { 3, instrux_VCMPNLESS }, + { 3, instrux_VCMPORD_QSS }, + { 3, instrux_VCMPORDSS }, + { 3, instrux_VCMPEQ_UQSS }, + { 3, instrux_VCMPNGE_USSS }, + { 3, instrux_VCMPNGESS }, + { 3, instrux_VCMPNGT_USSS }, + { 3, instrux_VCMPNGTSS }, + { 3, instrux_VCMPFALSE_OQSS }, + { 3, instrux_VCMPFALSESS }, + { 3, instrux_VCMPNEQ_OQSS }, + { 3, instrux_VCMPGE_OSSS }, + { 3, instrux_VCMPGESS }, + { 3, instrux_VCMPGT_OSSS }, + { 3, instrux_VCMPGTSS }, + { 3, instrux_VCMPTRUE_UQSS }, + { 3, instrux_VCMPTRUESS }, + { 3, instrux_VCMPLT_OQSS }, + { 3, instrux_VCMPLE_OQSS }, + { 3, instrux_VCMPUNORD_SSS }, + { 3, instrux_VCMPNEQ_USSS }, + { 3, instrux_VCMPNLT_UQSS }, + { 3, instrux_VCMPNLE_UQSS }, + { 3, instrux_VCMPORD_SSS }, + { 3, instrux_VCMPEQ_USSS }, + { 3, instrux_VCMPNGE_UQSS }, + { 3, instrux_VCMPNGT_UQSS }, + { 3, instrux_VCMPFALSE_OSSS }, + { 3, instrux_VCMPNEQ_OSSS }, + { 3, instrux_VCMPGE_OQSS }, + { 3, instrux_VCMPGT_OQSS }, + { 3, instrux_VCMPTRUE_USSS }, + { 3, instrux_VCMPSS }, + { 2, instrux_VCOMISD }, + { 2, instrux_VCOMISS }, + { 5, instrux_VCVTDQ2PD }, + { 5, instrux_VCVTDQ2PS }, + { 7, instrux_VCVTPD2DQ }, + { 7, instrux_VCVTPD2PS }, + { 5, instrux_VCVTPS2DQ }, + { 5, instrux_VCVTPS2PD }, + { 4, instrux_VCVTSD2SI }, + { 4, instrux_VCVTSD2SS }, + { 10, instrux_VCVTSI2SD }, + { 10, instrux_VCVTSI2SS }, + { 4, instrux_VCVTSS2SD }, + { 4, instrux_VCVTSS2SI }, + { 7, instrux_VCVTTPD2DQ }, + { 5, instrux_VCVTTPS2DQ }, + { 4, instrux_VCVTTSD2SI }, + { 4, instrux_VCVTTSS2SI }, + { 10, instrux_VDIVPD }, + { 10, instrux_VDIVPS }, + { 4, instrux_VDIVSD }, + { 4, instrux_VDIVSS }, + { 2, instrux_VDPPD }, + { 4, instrux_VDPPS }, + { 1, instrux_VEXTRACTF128 }, + { 4, instrux_VEXTRACTPS }, + { 4, instrux_VHADDPD }, + { 4, instrux_VHADDPS }, + { 4, instrux_VHSUBPD }, + { 4, instrux_VHSUBPS }, + { 2, instrux_VINSERTF128 }, + { 4, instrux_VINSERTPS }, + { 2, instrux_VLDDQU }, + { 1, instrux_VLDQQU }, + { 1, instrux_VLDMXCSR }, + { 1, instrux_VMASKMOVDQU }, + { 4, instrux_VMASKMOVPS }, + { 4, instrux_VMASKMOVPD }, + { 10, instrux_VMAXPD }, + { 10, instrux_VMAXPS }, + { 4, instrux_VMAXSD }, + { 4, instrux_VMAXSS }, + { 10, instrux_VMINPD }, + { 10, instrux_VMINPS }, + { 4, instrux_VMINSD }, + { 4, instrux_VMINSS }, + { 13, instrux_VMOVAPD }, + { 13, instrux_VMOVAPS }, + { 6, instrux_VMOVD }, + { 8, instrux_VMOVQ }, + { 5, instrux_VMOVDDUP }, + { 4, instrux_VMOVDQA }, + { 2, instrux_VMOVQQA }, + { 4, instrux_VMOVDQU }, + { 2, instrux_VMOVQQU }, + { 4, instrux_VMOVHLPS }, + { 6, instrux_VMOVHPD }, + { 6, instrux_VMOVHPS }, + { 4, instrux_VMOVLHPS }, + { 6, instrux_VMOVLPD }, + { 6, instrux_VMOVLPS }, + { 4, instrux_VMOVMSKPD }, + { 4, instrux_VMOVMSKPS }, + { 5, instrux_VMOVNTDQ }, + { 1, instrux_VMOVNTQQ }, + { 5, instrux_VMOVNTDQA }, + { 5, instrux_VMOVNTPD }, + { 5, instrux_VMOVNTPS }, + { 12, instrux_VMOVSD }, + { 5, instrux_VMOVSHDUP }, + { 5, instrux_VMOVSLDUP }, + { 12, instrux_VMOVSS }, + { 13, instrux_VMOVUPD }, + { 13, instrux_VMOVUPS }, + { 7, instrux_VMPSADBW }, + { 10, instrux_VMULPD }, + { 10, instrux_VMULPS }, + { 4, instrux_VMULSD }, + { 4, instrux_VMULSS }, + { 10, instrux_VORPD }, + { 10, instrux_VORPS }, + { 5, instrux_VPABSB }, + { 5, instrux_VPABSW }, + { 5, instrux_VPABSD }, + { 10, instrux_VPACKSSWB }, + { 10, instrux_VPACKSSDW }, + { 10, instrux_VPACKUSWB }, + { 10, instrux_VPACKUSDW }, + { 10, instrux_VPADDB }, + { 10, instrux_VPADDW }, + { 10, instrux_VPADDD }, + { 10, instrux_VPADDQ }, + { 10, instrux_VPADDSB }, + { 10, instrux_VPADDSW }, + { 10, instrux_VPADDUSB }, + { 10, instrux_VPADDUSW }, + { 10, instrux_VPALIGNR }, + { 4, instrux_VPAND }, + { 4, instrux_VPANDN }, + { 10, instrux_VPAVGB }, + { 10, instrux_VPAVGW }, + { 4, instrux_VPBLENDVB }, + { 4, instrux_VPBLENDW }, + { 1, instrux_VPCMPESTRI }, + { 1, instrux_VPCMPESTRM }, + { 1, instrux_VPCMPISTRI }, + { 1, instrux_VPCMPISTRM }, + { 10, instrux_VPCMPEQB }, + { 10, instrux_VPCMPEQW }, + { 10, instrux_VPCMPEQD }, + { 10, instrux_VPCMPEQQ }, + { 10, instrux_VPCMPGTB }, + { 10, instrux_VPCMPGTW }, + { 10, instrux_VPCMPGTD }, + { 10, instrux_VPCMPGTQ }, + { 15, instrux_VPERMILPD }, + { 15, instrux_VPERMILPS }, + { 2, instrux_VPERM2F128 }, + { 8, instrux_VPEXTRB }, + { 12, instrux_VPEXTRW }, + { 3, instrux_VPEXTRD }, + { 2, instrux_VPEXTRQ }, + { 4, instrux_VPHADDW }, + { 4, instrux_VPHADDD }, + { 4, instrux_VPHADDSW }, + { 1, instrux_VPHMINPOSUW }, + { 4, instrux_VPHSUBW }, + { 4, instrux_VPHSUBD }, + { 4, instrux_VPHSUBSW }, + { 10, instrux_VPINSRB }, + { 10, instrux_VPINSRW }, + { 6, instrux_VPINSRD }, + { 6, instrux_VPINSRQ }, + { 10, instrux_VPMADDWD }, + { 10, instrux_VPMADDUBSW }, + { 10, instrux_VPMAXSB }, + { 10, instrux_VPMAXSW }, + { 10, instrux_VPMAXSD }, + { 10, instrux_VPMAXUB }, + { 10, instrux_VPMAXUW }, + { 10, instrux_VPMAXUD }, + { 10, instrux_VPMINSB }, + { 10, instrux_VPMINSW }, + { 10, instrux_VPMINSD }, + { 10, instrux_VPMINUB }, + { 10, instrux_VPMINUW }, + { 10, instrux_VPMINUD }, + { 4, instrux_VPMOVMSKB }, + { 5, instrux_VPMOVSXBW }, + { 6, instrux_VPMOVSXBD }, + { 6, instrux_VPMOVSXBQ }, + { 5, instrux_VPMOVSXWD }, + { 6, instrux_VPMOVSXWQ }, + { 5, instrux_VPMOVSXDQ }, + { 5, instrux_VPMOVZXBW }, + { 6, instrux_VPMOVZXBD }, + { 6, instrux_VPMOVZXBQ }, + { 5, instrux_VPMOVZXWD }, + { 6, instrux_VPMOVZXWQ }, + { 5, instrux_VPMOVZXDQ }, + { 10, instrux_VPMULHUW }, + { 10, instrux_VPMULHRSW }, + { 10, instrux_VPMULHW }, + { 10, instrux_VPMULLW }, + { 10, instrux_VPMULLD }, + { 10, instrux_VPMULUDQ }, + { 10, instrux_VPMULDQ }, + { 4, instrux_VPOR }, + { 10, instrux_VPSADBW }, + { 10, instrux_VPSHUFB }, + { 5, instrux_VPSHUFD }, + { 5, instrux_VPSHUFHW }, + { 5, instrux_VPSHUFLW }, + { 4, instrux_VPSIGNB }, + { 4, instrux_VPSIGNW }, + { 4, instrux_VPSIGND }, + { 10, instrux_VPSLLDQ }, + { 10, instrux_VPSRLDQ }, + { 20, instrux_VPSLLW }, + { 20, instrux_VPSLLD }, + { 20, instrux_VPSLLQ }, + { 20, instrux_VPSRAW }, + { 20, instrux_VPSRAD }, + { 20, instrux_VPSRLW }, + { 20, instrux_VPSRLD }, + { 20, instrux_VPSRLQ }, + { 2, instrux_VPTEST }, + { 10, instrux_VPSUBB }, + { 10, instrux_VPSUBW }, + { 10, instrux_VPSUBD }, + { 10, instrux_VPSUBQ }, + { 10, instrux_VPSUBSB }, + { 10, instrux_VPSUBSW }, + { 10, instrux_VPSUBUSB }, + { 10, instrux_VPSUBUSW }, + { 10, instrux_VPUNPCKHBW }, + { 10, instrux_VPUNPCKHWD }, + { 10, instrux_VPUNPCKHDQ }, + { 10, instrux_VPUNPCKHQDQ }, + { 10, instrux_VPUNPCKLBW }, + { 10, instrux_VPUNPCKLWD }, + { 10, instrux_VPUNPCKLDQ }, + { 10, instrux_VPUNPCKLQDQ }, + { 4, instrux_VPXOR }, + { 2, instrux_VRCPPS }, + { 2, instrux_VRCPSS }, + { 2, instrux_VRSQRTPS }, + { 2, instrux_VRSQRTSS }, + { 2, instrux_VROUNDPD }, + { 2, instrux_VROUNDPS }, + { 2, instrux_VROUNDSD }, + { 2, instrux_VROUNDSS }, + { 10, instrux_VSHUFPD }, + { 10, instrux_VSHUFPS }, + { 5, instrux_VSQRTPD }, + { 5, instrux_VSQRTPS }, + { 4, instrux_VSQRTSD }, + { 4, instrux_VSQRTSS }, + { 1, instrux_VSTMXCSR }, + { 10, instrux_VSUBPD }, + { 10, instrux_VSUBPS }, + { 4, instrux_VSUBSD }, + { 4, instrux_VSUBSS }, + { 2, instrux_VTESTPS }, + { 2, instrux_VTESTPD }, + { 2, instrux_VUCOMISD }, + { 2, instrux_VUCOMISS }, + { 10, instrux_VUNPCKHPD }, + { 10, instrux_VUNPCKHPS }, + { 10, instrux_VUNPCKLPD }, + { 10, instrux_VUNPCKLPS }, + { 10, instrux_VXORPD }, + { 10, instrux_VXORPS }, + { 1, instrux_VZEROALL }, + { 1, instrux_VZEROUPPER }, + { 1, instrux_PCLMULLQLQDQ }, + { 1, instrux_PCLMULHQLQDQ }, + { 1, instrux_PCLMULLQHQDQ }, + { 1, instrux_PCLMULHQHQDQ }, + { 1, instrux_PCLMULQDQ }, + { 10, instrux_VPCLMULLQLQDQ }, + { 10, instrux_VPCLMULHQLQDQ }, + { 10, instrux_VPCLMULLQHQDQ }, + { 10, instrux_VPCLMULHQHQDQ }, + { 10, instrux_VPCLMULQDQ }, + { 5, instrux_VFMADD132PS }, + { 5, instrux_VFMADD132PD }, + { 2, instrux_VFMADD312PS }, + { 2, instrux_VFMADD312PD }, + { 5, instrux_VFMADD213PS }, + { 5, instrux_VFMADD213PD }, + { 2, instrux_VFMADD123PS }, + { 2, instrux_VFMADD123PD }, + { 5, instrux_VFMADD231PS }, + { 5, instrux_VFMADD231PD }, + { 2, instrux_VFMADD321PS }, + { 2, instrux_VFMADD321PD }, + { 5, instrux_VFMADDSUB132PS }, + { 5, instrux_VFMADDSUB132PD }, + { 2, instrux_VFMADDSUB312PS }, + { 2, instrux_VFMADDSUB312PD }, + { 5, instrux_VFMADDSUB213PS }, + { 5, instrux_VFMADDSUB213PD }, + { 2, instrux_VFMADDSUB123PS }, + { 2, instrux_VFMADDSUB123PD }, + { 5, instrux_VFMADDSUB231PS }, + { 5, instrux_VFMADDSUB231PD }, + { 2, instrux_VFMADDSUB321PS }, + { 2, instrux_VFMADDSUB321PD }, + { 5, instrux_VFMSUB132PS }, + { 5, instrux_VFMSUB132PD }, + { 2, instrux_VFMSUB312PS }, + { 2, instrux_VFMSUB312PD }, + { 5, instrux_VFMSUB213PS }, + { 5, instrux_VFMSUB213PD }, + { 2, instrux_VFMSUB123PS }, + { 2, instrux_VFMSUB123PD }, + { 5, instrux_VFMSUB231PS }, + { 5, instrux_VFMSUB231PD }, + { 2, instrux_VFMSUB321PS }, + { 2, instrux_VFMSUB321PD }, + { 5, instrux_VFMSUBADD132PS }, + { 5, instrux_VFMSUBADD132PD }, + { 2, instrux_VFMSUBADD312PS }, + { 2, instrux_VFMSUBADD312PD }, + { 5, instrux_VFMSUBADD213PS }, + { 5, instrux_VFMSUBADD213PD }, + { 2, instrux_VFMSUBADD123PS }, + { 2, instrux_VFMSUBADD123PD }, + { 5, instrux_VFMSUBADD231PS }, + { 5, instrux_VFMSUBADD231PD }, + { 2, instrux_VFMSUBADD321PS }, + { 2, instrux_VFMSUBADD321PD }, + { 5, instrux_VFNMADD132PS }, + { 5, instrux_VFNMADD132PD }, + { 2, instrux_VFNMADD312PS }, + { 2, instrux_VFNMADD312PD }, + { 5, instrux_VFNMADD213PS }, + { 5, instrux_VFNMADD213PD }, + { 2, instrux_VFNMADD123PS }, + { 2, instrux_VFNMADD123PD }, + { 5, instrux_VFNMADD231PS }, + { 5, instrux_VFNMADD231PD }, + { 2, instrux_VFNMADD321PS }, + { 2, instrux_VFNMADD321PD }, + { 5, instrux_VFNMSUB132PS }, + { 5, instrux_VFNMSUB132PD }, + { 2, instrux_VFNMSUB312PS }, + { 2, instrux_VFNMSUB312PD }, + { 5, instrux_VFNMSUB213PS }, + { 5, instrux_VFNMSUB213PD }, + { 2, instrux_VFNMSUB123PS }, + { 2, instrux_VFNMSUB123PD }, + { 5, instrux_VFNMSUB231PS }, + { 5, instrux_VFNMSUB231PD }, + { 2, instrux_VFNMSUB321PS }, + { 2, instrux_VFNMSUB321PD }, + { 2, instrux_VFMADD132SS }, + { 2, instrux_VFMADD132SD }, + { 1, instrux_VFMADD312SS }, + { 1, instrux_VFMADD312SD }, + { 2, instrux_VFMADD213SS }, + { 2, instrux_VFMADD213SD }, + { 1, instrux_VFMADD123SS }, + { 1, instrux_VFMADD123SD }, + { 2, instrux_VFMADD231SS }, + { 2, instrux_VFMADD231SD }, + { 1, instrux_VFMADD321SS }, + { 1, instrux_VFMADD321SD }, + { 2, instrux_VFMSUB132SS }, + { 2, instrux_VFMSUB132SD }, + { 1, instrux_VFMSUB312SS }, + { 1, instrux_VFMSUB312SD }, + { 2, instrux_VFMSUB213SS }, + { 2, instrux_VFMSUB213SD }, + { 1, instrux_VFMSUB123SS }, + { 1, instrux_VFMSUB123SD }, + { 2, instrux_VFMSUB231SS }, + { 2, instrux_VFMSUB231SD }, + { 1, instrux_VFMSUB321SS }, + { 1, instrux_VFMSUB321SD }, + { 2, instrux_VFNMADD132SS }, + { 2, instrux_VFNMADD132SD }, + { 1, instrux_VFNMADD312SS }, + { 1, instrux_VFNMADD312SD }, + { 2, instrux_VFNMADD213SS }, + { 2, instrux_VFNMADD213SD }, + { 1, instrux_VFNMADD123SS }, + { 1, instrux_VFNMADD123SD }, + { 2, instrux_VFNMADD231SS }, + { 2, instrux_VFNMADD231SD }, + { 1, instrux_VFNMADD321SS }, + { 1, instrux_VFNMADD321SD }, + { 2, instrux_VFNMSUB132SS }, + { 2, instrux_VFNMSUB132SD }, + { 1, instrux_VFNMSUB312SS }, + { 1, instrux_VFNMSUB312SD }, + { 2, instrux_VFNMSUB213SS }, + { 2, instrux_VFNMSUB213SD }, + { 1, instrux_VFNMSUB123SS }, + { 1, instrux_VFNMSUB123SD }, + { 2, instrux_VFNMSUB231SS }, + { 2, instrux_VFNMSUB231SD }, + { 1, instrux_VFNMSUB321SS }, + { 1, instrux_VFNMSUB321SD }, + { 8, instrux_VCVTPH2PS }, + { 14, instrux_VCVTPS2PH }, + { 1, instrux_XSTORE }, + { 1, instrux_XCRYPTECB }, + { 1, instrux_XCRYPTCBC }, + { 1, instrux_XCRYPTCTR }, + { 1, instrux_XCRYPTCFB }, + { 1, instrux_XCRYPTOFB }, + { 1, instrux_MONTMUL }, + { 1, instrux_XSHA1 }, + { 1, instrux_XSHA256 }, + { 2, instrux_LLWPCB }, + { 2, instrux_SLWPCB }, + { 2, instrux_LWPVAL }, + { 2, instrux_LWPINS }, + { 8, instrux_VFMADDPD }, + { 8, instrux_VFMADDPS }, + { 4, instrux_VFMADDSD }, + { 4, instrux_VFMADDSS }, + { 8, instrux_VFMADDSUBPD }, + { 8, instrux_VFMADDSUBPS }, + { 8, instrux_VFMSUBADDPD }, + { 8, instrux_VFMSUBADDPS }, + { 8, instrux_VFMSUBPD }, + { 8, instrux_VFMSUBPS }, + { 4, instrux_VFMSUBSD }, + { 4, instrux_VFMSUBSS }, + { 8, instrux_VFNMADDPD }, + { 8, instrux_VFNMADDPS }, + { 4, instrux_VFNMADDSD }, + { 4, instrux_VFNMADDSS }, + { 8, instrux_VFNMSUBPD }, + { 8, instrux_VFNMSUBPS }, + { 4, instrux_VFNMSUBSD }, + { 4, instrux_VFNMSUBSS }, + { 4, instrux_VFRCZPD }, + { 4, instrux_VFRCZPS }, + { 2, instrux_VFRCZSD }, + { 2, instrux_VFRCZSS }, + { 8, instrux_VPCMOV }, + { 2, instrux_VPCOMB }, + { 2, instrux_VPCOMD }, + { 2, instrux_VPCOMQ }, + { 2, instrux_VPCOMUB }, + { 2, instrux_VPCOMUD }, + { 2, instrux_VPCOMUQ }, + { 2, instrux_VPCOMUW }, + { 2, instrux_VPCOMW }, + { 2, instrux_VPHADDBD }, + { 2, instrux_VPHADDBQ }, + { 2, instrux_VPHADDBW }, + { 2, instrux_VPHADDDQ }, + { 2, instrux_VPHADDUBD }, + { 2, instrux_VPHADDUBQ }, + { 2, instrux_VPHADDUBW }, + { 2, instrux_VPHADDUDQ }, + { 2, instrux_VPHADDUWD }, + { 2, instrux_VPHADDUWQ }, + { 2, instrux_VPHADDWD }, + { 2, instrux_VPHADDWQ }, + { 2, instrux_VPHSUBBW }, + { 2, instrux_VPHSUBDQ }, + { 2, instrux_VPHSUBWD }, + { 2, instrux_VPMACSDD }, + { 2, instrux_VPMACSDQH }, + { 2, instrux_VPMACSDQL }, + { 2, instrux_VPMACSSDD }, + { 2, instrux_VPMACSSDQH }, + { 2, instrux_VPMACSSDQL }, + { 2, instrux_VPMACSSWD }, + { 2, instrux_VPMACSSWW }, + { 2, instrux_VPMACSWD }, + { 2, instrux_VPMACSWW }, + { 2, instrux_VPMADCSSWD }, + { 2, instrux_VPMADCSWD }, + { 4, instrux_VPPERM }, + { 6, instrux_VPROTB }, + { 6, instrux_VPROTD }, + { 6, instrux_VPROTQ }, + { 6, instrux_VPROTW }, + { 4, instrux_VPSHAB }, + { 4, instrux_VPSHAD }, + { 4, instrux_VPSHAQ }, + { 4, instrux_VPSHAW }, + { 4, instrux_VPSHLB }, + { 4, instrux_VPSHLD }, + { 4, instrux_VPSHLQ }, + { 4, instrux_VPSHLW }, + { 1, instrux_VBROADCASTI128 }, + { 4, instrux_VPBLENDD }, + { 19, instrux_VPBROADCASTB }, + { 16, instrux_VPBROADCASTW }, + { 13, instrux_VPBROADCASTD }, + { 13, instrux_VPBROADCASTQ }, + { 6, instrux_VPERMD }, + { 7, instrux_VPERMPD }, + { 6, instrux_VPERMPS }, + { 7, instrux_VPERMQ }, + { 2, instrux_VPERM2I128 }, + { 1, instrux_VEXTRACTI128 }, + { 2, instrux_VINSERTI128 }, + { 6, instrux_VPMASKMOVD }, + { 6, instrux_VPMASKMOVQ }, + { 10, instrux_VPSLLVD }, + { 10, instrux_VPSLLVQ }, + { 10, instrux_VPSRAVD }, + { 10, instrux_VPSRLVD }, + { 10, instrux_VPSRLVQ }, + { 5, instrux_VGATHERDPD }, + { 5, instrux_VGATHERQPD }, + { 5, instrux_VGATHERDPS }, + { 5, instrux_VGATHERQPS }, + { 5, instrux_VPGATHERDD }, + { 5, instrux_VPGATHERQD }, + { 5, instrux_VPGATHERDQ }, + { 5, instrux_VPGATHERQQ }, + { 1, instrux_XABORT }, + { 4, instrux_XBEGIN }, + { 1, instrux_XEND }, + { 1, instrux_XTEST }, + { 1, instrux_PREFETCHWT1 }, + { 1, instrux_BNDMK }, + { 3, instrux_BNDCL }, + { 3, instrux_BNDCU }, + { 3, instrux_BNDCN }, + { 4, instrux_BNDMOV }, + { 3, instrux_BNDLDX }, + { 5, instrux_BNDSTX }, + { 1, instrux_SHA1MSG1 }, + { 1, instrux_SHA1MSG2 }, + { 1, instrux_SHA1NEXTE }, + { 1, instrux_SHA1RNDS4 }, + { 1, instrux_SHA256MSG1 }, + { 1, instrux_SHA256MSG2 }, + { 2, instrux_SHA256RNDS2 }, + { 1, instrux_VSHA512MSG1 }, + { 1, instrux_VSHA512MSG2 }, + { 1, instrux_VSHA512RNDS2 }, + { 1, instrux_VSM3MSG1 }, + { 1, instrux_VSM3MSG2 }, + { 1, instrux_VSM3RNDS2 }, + { 5, instrux_VSM4KEY4 }, + { 5, instrux_VSM4RNDS4 }, + { 2, instrux_VBCSTNEBF16PS }, + { 2, instrux_VBCSTNEBF162PS }, + { 2, instrux_VBCSTNESH2PS }, + { 2, instrux_VCVTNEEBF162PS }, + { 2, instrux_VCVTNEEPH2PS }, + { 2, instrux_VCVTNEOBF162PS }, + { 2, instrux_VCVTNEOPH2PS }, + { 5, instrux_VCVTNEPS2BF16 }, + { 8, instrux_VPDPBUSD }, + { 8, instrux_VPDPBUSDS }, + { 8, instrux_VPDPWSSD }, + { 8, instrux_VPDPWSSDS }, + { 5, instrux_VPDPBSSD }, + { 5, instrux_VPDPBSSDS }, + { 5, instrux_VPDPBSUD }, + { 5, instrux_VPDPBSUDS }, + { 5, instrux_VPDPBUUD }, + { 5, instrux_VPDPBUUDS }, + { 5, instrux_VPDPWSUD }, + { 5, instrux_VPDPWSUDS }, + { 5, instrux_VPDPWUSD }, + { 5, instrux_VPDPWUSDS }, + { 5, instrux_VPDPWUUD }, + { 5, instrux_VPDPWUUDS }, + { 5, instrux_VPMADD52HUQ }, + { 5, instrux_VPMADD52LUQ }, + { 10, instrux_KMOVB }, + { 10, instrux_KMOVW }, + { 8, instrux_KMOVD }, + { 8, instrux_KMOVQ }, + { 36, instrux_KMOV }, + { 10, instrux_MOVB }, + { 10, instrux_MOVW }, + { 4, instrux_KADDB }, + { 4, instrux_KADDW }, + { 4, instrux_KADDD }, + { 4, instrux_KADDQ }, + { 16, instrux_KADD }, + { 4, instrux_ADDB }, + { 4, instrux_ADDW }, + { 4, instrux_ADDD }, + { 4, instrux_ADDQ }, + { 4, instrux_KANDB }, + { 4, instrux_KANDW }, + { 4, instrux_KANDD }, + { 4, instrux_KANDQ }, + { 16, instrux_KAND }, + { 4, instrux_ANDB }, + { 4, instrux_ANDW }, + { 4, instrux_ANDD }, + { 4, instrux_ANDQ }, + { 4, instrux_KANDNB }, + { 4, instrux_KANDNW }, + { 4, instrux_KANDND }, + { 4, instrux_KANDNQ }, + { 16, instrux_KANDN }, + { 4, instrux_ANDNB }, + { 4, instrux_ANDNW }, + { 4, instrux_ANDND }, + { 4, instrux_ANDNQ }, + { 4, instrux_KNOTB }, + { 4, instrux_KNOTW }, + { 4, instrux_KNOTD }, + { 4, instrux_KNOTQ }, + { 16, instrux_KNOT }, + { 4, instrux_NOTB }, + { 4, instrux_NOTW }, + { 4, instrux_NOTD }, + { 4, instrux_NOTQ }, + { 4, instrux_KORB }, + { 4, instrux_KORW }, + { 4, instrux_KORD }, + { 4, instrux_KORQ }, + { 16, instrux_KOR }, + { 4, instrux_ORB }, + { 4, instrux_ORW }, + { 4, instrux_ORD }, + { 4, instrux_ORQ }, + { 2, instrux_KORTESTB }, + { 2, instrux_KORTESTW }, + { 2, instrux_KORTESTD }, + { 2, instrux_KORTESTQ }, + { 8, instrux_KORTEST }, + { 2, instrux_ORTESTB }, + { 2, instrux_ORTESTW }, + { 2, instrux_ORTESTD }, + { 2, instrux_ORTESTQ }, + { 8, instrux_ORTEST }, + { 2, instrux_KSHIFTLB }, + { 2, instrux_KSHIFTLW }, + { 2, instrux_KSHIFTLD }, + { 2, instrux_KSHIFTLQ }, + { 8, instrux_KSHIFTL }, + { 2, instrux_SHIFTLB }, + { 2, instrux_SHIFTLW }, + { 2, instrux_SHIFTLD }, + { 2, instrux_SHIFTLQ }, + { 8, instrux_SHIFTL }, + { 2, instrux_KSHLB }, + { 2, instrux_KSHLW }, + { 2, instrux_KSHLD }, + { 2, instrux_KSHLQ }, + { 8, instrux_KSHL }, + { 2, instrux_SHLB }, + { 2, instrux_SHLW }, + { 2, instrux_SHLQ }, + { 2, instrux_KSHIFTRB }, + { 2, instrux_KSHIFTRW }, + { 2, instrux_KSHIFTRD }, + { 2, instrux_KSHIFTRQ }, + { 8, instrux_KSHIFTR }, + { 2, instrux_SHIFTRB }, + { 2, instrux_SHIFTRW }, + { 2, instrux_SHIFTRD }, + { 2, instrux_SHIFTRQ }, + { 8, instrux_SHIFTR }, + { 2, instrux_KSHRB }, + { 2, instrux_KSHRW }, + { 2, instrux_KSHRD }, + { 2, instrux_KSHRQ }, + { 8, instrux_KSHR }, + { 2, instrux_SHRB }, + { 2, instrux_SHRW }, + { 2, instrux_SHRQ }, + { 2, instrux_KTESTB }, + { 2, instrux_KTESTW }, + { 2, instrux_KTESTD }, + { 2, instrux_KTESTQ }, + { 8, instrux_KTEST }, + { 2, instrux_TESTB }, + { 2, instrux_TESTW }, + { 2, instrux_TESTD }, + { 2, instrux_TESTQ }, + { 4, instrux_KUNPCKBW }, + { 4, instrux_KUNPCKW }, + { 12, instrux_KUNPCK }, + { 4, instrux_UNPCKBW }, + { 4, instrux_UNPCKW }, + { 12, instrux_UNPCK }, + { 4, instrux_KUNPCKWD }, + { 4, instrux_KUNPCKD }, + { 4, instrux_UNPCKWD }, + { 4, instrux_UNPCKD }, + { 4, instrux_KUNPCKDQ }, + { 4, instrux_KUNPCKQ }, + { 4, instrux_UNPCKDQ }, + { 4, instrux_UNPCKQ }, + { 4, instrux_KXNORB }, + { 4, instrux_KXNORW }, + { 4, instrux_KXNORD }, + { 4, instrux_KXNORQ }, + { 16, instrux_KXNOR }, + { 4, instrux_XNORB }, + { 4, instrux_XNORW }, + { 4, instrux_XNORD }, + { 4, instrux_XNORQ }, + { 16, instrux_XNOR }, + { 4, instrux_KXORB }, + { 4, instrux_KXORW }, + { 4, instrux_KXORD }, + { 4, instrux_KXORQ }, + { 16, instrux_KXOR }, + { 4, instrux_XORB }, + { 4, instrux_XORW }, + { 4, instrux_XORD }, + { 4, instrux_XORQ }, + { 6, instrux_VALIGND }, + { 6, instrux_VALIGNQ }, + { 3, instrux_VBLENDMPD }, + { 3, instrux_VBLENDMPS }, + { 2, instrux_VBROADCASTF32X2 }, + { 2, instrux_VBROADCASTF32X4 }, + { 1, instrux_VBROADCASTF32X8 }, + { 2, instrux_VBROADCASTF64X2 }, + { 1, instrux_VBROADCASTF64X4 }, + { 3, instrux_VBROADCASTI32X2 }, + { 2, instrux_VBROADCASTI32X4 }, + { 1, instrux_VBROADCASTI32X8 }, + { 2, instrux_VBROADCASTI64X2 }, + { 1, instrux_VBROADCASTI64X4 }, + { 3, instrux_VCMPEQ_OQPD }, + { 3, instrux_VCMPEQ_OQPS }, + { 1, instrux_VCMPEQ_OQSD }, + { 1, instrux_VCMPEQ_OQSS }, + { 6, instrux_VCOMPRESSPD }, + { 6, instrux_VCOMPRESSPS }, + { 3, instrux_VCVTPD2QQ }, + { 3, instrux_VCVTPD2UDQ }, + { 3, instrux_VCVTPD2UQQ }, + { 3, instrux_VCVTPS2QQ }, + { 3, instrux_VCVTPS2UDQ }, + { 3, instrux_VCVTPS2UQQ }, + { 3, instrux_VCVTQQ2PD }, + { 3, instrux_VCVTQQ2PS }, + { 2, instrux_VCVTSD2USI }, + { 2, instrux_VCVTSS2USI }, + { 3, instrux_VCVTTPD2QQ }, + { 3, instrux_VCVTTPD2UDQ }, + { 3, instrux_VCVTTPD2UQQ }, + { 3, instrux_VCVTTPS2QQ }, + { 3, instrux_VCVTTPS2UDQ }, + { 3, instrux_VCVTTPS2UQQ }, + { 2, instrux_VCVTTSD2USI }, + { 2, instrux_VCVTTSS2USI }, + { 3, instrux_VCVTUDQ2PD }, + { 3, instrux_VCVTUDQ2PS }, + { 3, instrux_VCVTUQQ2PD }, + { 3, instrux_VCVTUQQ2PS }, + { 4, instrux_VCVTUSI2SD }, + { 4, instrux_VCVTUSI2SS }, + { 6, instrux_VDBPSADBW }, + { 1, instrux_VEXP2PD }, + { 1, instrux_VEXP2PS }, + { 6, instrux_VEXPANDPD }, + { 6, instrux_VEXPANDPS }, + { 4, instrux_VEXTRACTF32X4 }, + { 2, instrux_VEXTRACTF32X8 }, + { 4, instrux_VEXTRACTF64X2 }, + { 2, instrux_VEXTRACTF64X4 }, + { 4, instrux_VEXTRACTI32X4 }, + { 2, instrux_VEXTRACTI32X8 }, + { 4, instrux_VEXTRACTI64X2 }, + { 2, instrux_VEXTRACTI64X4 }, + { 6, instrux_VFIXUPIMMPD }, + { 6, instrux_VFIXUPIMMPS }, + { 2, instrux_VFIXUPIMMSD }, + { 2, instrux_VFIXUPIMMSS }, + { 3, instrux_VFPCLASSPD }, + { 3, instrux_VFPCLASSPS }, + { 1, instrux_VFPCLASSSD }, + { 1, instrux_VFPCLASSSS }, + { 1, instrux_VGATHERPF0DPD }, + { 1, instrux_VGATHERPF0DPS }, + { 1, instrux_VGATHERPF0QPD }, + { 1, instrux_VGATHERPF0QPS }, + { 1, instrux_VGATHERPF1DPD }, + { 1, instrux_VGATHERPF1DPS }, + { 1, instrux_VGATHERPF1QPD }, + { 1, instrux_VGATHERPF1QPS }, + { 3, instrux_VGETEXPPD }, + { 3, instrux_VGETEXPPS }, + { 1, instrux_VGETEXPSD }, + { 1, instrux_VGETEXPSS }, + { 3, instrux_VGETMANTPD }, + { 3, instrux_VGETMANTPS }, + { 1, instrux_VGETMANTSD }, + { 1, instrux_VGETMANTSS }, + { 4, instrux_VINSERTF32X4 }, + { 2, instrux_VINSERTF32X8 }, + { 4, instrux_VINSERTF64X2 }, + { 2, instrux_VINSERTF64X4 }, + { 4, instrux_VINSERTI32X4 }, + { 2, instrux_VINSERTI32X8 }, + { 4, instrux_VINSERTI64X2 }, + { 2, instrux_VINSERTI64X4 }, + { 6, instrux_VMOVDQA32 }, + { 6, instrux_VMOVDQA64 }, + { 6, instrux_VMOVDQU16 }, + { 6, instrux_VMOVDQU32 }, + { 6, instrux_VMOVDQU64 }, + { 6, instrux_VMOVDQU8 }, + { 3, instrux_VPABSQ }, + { 6, instrux_VPANDD }, + { 6, instrux_VPANDND }, + { 6, instrux_VPANDNQ }, + { 6, instrux_VPANDQ }, + { 3, instrux_VPBLENDMB }, + { 3, instrux_VPBLENDMD }, + { 3, instrux_VPBLENDMQ }, + { 3, instrux_VPBLENDMW }, + { 3, instrux_VPBROADCASTMB2Q }, + { 3, instrux_VPBROADCASTMW2D }, + { 3, instrux_VPCMPEQUB }, + { 3, instrux_VPCMPEQUD }, + { 3, instrux_VPCMPEQUQ }, + { 3, instrux_VPCMPEQUW }, + { 3, instrux_VPCMPGEB }, + { 3, instrux_VPCMPGED }, + { 3, instrux_VPCMPGEQ }, + { 3, instrux_VPCMPGEUB }, + { 3, instrux_VPCMPGEUD }, + { 3, instrux_VPCMPGEUQ }, + { 3, instrux_VPCMPGEUW }, + { 3, instrux_VPCMPGEW }, + { 3, instrux_VPCMPGTUB }, + { 3, instrux_VPCMPGTUD }, + { 3, instrux_VPCMPGTUQ }, + { 3, instrux_VPCMPGTUW }, + { 3, instrux_VPCMPLEB }, + { 3, instrux_VPCMPLED }, + { 3, instrux_VPCMPLEQ }, + { 3, instrux_VPCMPLEUB }, + { 3, instrux_VPCMPLEUD }, + { 3, instrux_VPCMPLEUQ }, + { 3, instrux_VPCMPLEUW }, + { 3, instrux_VPCMPLEW }, + { 3, instrux_VPCMPLTB }, + { 3, instrux_VPCMPLTD }, + { 3, instrux_VPCMPLTQ }, + { 3, instrux_VPCMPLTUB }, + { 3, instrux_VPCMPLTUD }, + { 3, instrux_VPCMPLTUQ }, + { 3, instrux_VPCMPLTUW }, + { 3, instrux_VPCMPLTW }, + { 3, instrux_VPCMPNEQB }, + { 3, instrux_VPCMPNEQD }, + { 3, instrux_VPCMPNEQQ }, + { 3, instrux_VPCMPNEQUB }, + { 3, instrux_VPCMPNEQUD }, + { 3, instrux_VPCMPNEQUQ }, + { 3, instrux_VPCMPNEQUW }, + { 3, instrux_VPCMPNEQW }, + { 3, instrux_VPCMPNGTB }, + { 3, instrux_VPCMPNGTD }, + { 3, instrux_VPCMPNGTQ }, + { 3, instrux_VPCMPNGTUB }, + { 3, instrux_VPCMPNGTUD }, + { 3, instrux_VPCMPNGTUQ }, + { 3, instrux_VPCMPNGTUW }, + { 3, instrux_VPCMPNGTW }, + { 3, instrux_VPCMPNLEB }, + { 3, instrux_VPCMPNLED }, + { 3, instrux_VPCMPNLEQ }, + { 3, instrux_VPCMPNLEUB }, + { 3, instrux_VPCMPNLEUD }, + { 3, instrux_VPCMPNLEUQ }, + { 3, instrux_VPCMPNLEUW }, + { 3, instrux_VPCMPNLEW }, + { 3, instrux_VPCMPNLTB }, + { 3, instrux_VPCMPNLTD }, + { 3, instrux_VPCMPNLTQ }, + { 3, instrux_VPCMPNLTUB }, + { 3, instrux_VPCMPNLTUD }, + { 3, instrux_VPCMPNLTUQ }, + { 3, instrux_VPCMPNLTUW }, + { 3, instrux_VPCMPNLTW }, + { 3, instrux_VPCMPB }, + { 3, instrux_VPCMPD }, + { 3, instrux_VPCMPQ }, + { 3, instrux_VPCMPUB }, + { 3, instrux_VPCMPUD }, + { 3, instrux_VPCMPUQ }, + { 3, instrux_VPCMPUW }, + { 3, instrux_VPCMPW }, + { 6, instrux_VPCOMPRESSD }, + { 6, instrux_VPCOMPRESSQ }, + { 3, instrux_VPCONFLICTD }, + { 3, instrux_VPCONFLICTQ }, + { 6, instrux_VPERMB }, + { 3, instrux_VPERMI2B }, + { 3, instrux_VPERMI2D }, + { 3, instrux_VPERMI2PD }, + { 3, instrux_VPERMI2PS }, + { 3, instrux_VPERMI2Q }, + { 3, instrux_VPERMI2W }, + { 3, instrux_VPERMT2B }, + { 3, instrux_VPERMT2D }, + { 3, instrux_VPERMT2PD }, + { 3, instrux_VPERMT2PS }, + { 3, instrux_VPERMT2Q }, + { 3, instrux_VPERMT2W }, + { 6, instrux_VPERMW }, + { 6, instrux_VPEXPANDD }, + { 6, instrux_VPEXPANDQ }, + { 3, instrux_VPLZCNTD }, + { 3, instrux_VPLZCNTQ }, + { 6, instrux_VPMAXSQ }, + { 6, instrux_VPMAXUQ }, + { 6, instrux_VPMINSQ }, + { 6, instrux_VPMINUQ }, + { 3, instrux_VPMOVB2M }, + { 3, instrux_VPMOVD2M }, + { 6, instrux_VPMOVDB }, + { 6, instrux_VPMOVDW }, + { 3, instrux_VPMOVM2B }, + { 3, instrux_VPMOVM2D }, + { 3, instrux_VPMOVM2Q }, + { 3, instrux_VPMOVM2W }, + { 3, instrux_VPMOVQ2M }, + { 6, instrux_VPMOVQB }, + { 6, instrux_VPMOVQD }, + { 6, instrux_VPMOVQW }, + { 6, instrux_VPMOVSDB }, + { 6, instrux_VPMOVSDW }, + { 6, instrux_VPMOVSQB }, + { 6, instrux_VPMOVSQD }, + { 6, instrux_VPMOVSQW }, + { 6, instrux_VPMOVSWB }, + { 6, instrux_VPMOVUSDB }, + { 6, instrux_VPMOVUSDW }, + { 6, instrux_VPMOVUSQB }, + { 6, instrux_VPMOVUSQD }, + { 6, instrux_VPMOVUSQW }, + { 6, instrux_VPMOVUSWB }, + { 3, instrux_VPMOVW2M }, + { 6, instrux_VPMOVWB }, + { 6, instrux_VPMULLQ }, + { 6, instrux_VPMULTISHIFTQB }, + { 6, instrux_VPORD }, + { 6, instrux_VPORQ }, + { 6, instrux_VPROLD }, + { 6, instrux_VPROLQ }, + { 6, instrux_VPROLVD }, + { 6, instrux_VPROLVQ }, + { 6, instrux_VPRORD }, + { 6, instrux_VPRORQ }, + { 6, instrux_VPRORVD }, + { 6, instrux_VPRORVQ }, + { 3, instrux_VPSCATTERDD }, + { 3, instrux_VPSCATTERDQ }, + { 3, instrux_VPSCATTERQD }, + { 3, instrux_VPSCATTERQQ }, + { 6, instrux_VPSLLVW }, + { 12, instrux_VPSRAQ }, + { 6, instrux_VPSRAVQ }, + { 6, instrux_VPSRAVW }, + { 6, instrux_VPSRLVW }, + { 3, instrux_VPTERNLOGD }, + { 3, instrux_VPTERNLOGQ }, + { 3, instrux_VPTESTMB }, + { 3, instrux_VPTESTMD }, + { 3, instrux_VPTESTMQ }, + { 3, instrux_VPTESTMW }, + { 3, instrux_VPTESTNMB }, + { 3, instrux_VPTESTNMD }, + { 3, instrux_VPTESTNMQ }, + { 3, instrux_VPTESTNMW }, + { 6, instrux_VPXORD }, + { 6, instrux_VPXORQ }, + { 6, instrux_VRANGEPD }, + { 6, instrux_VRANGEPS }, + { 2, instrux_VRANGESD }, + { 2, instrux_VRANGESS }, + { 3, instrux_VRCP14PD }, + { 3, instrux_VRCP14PS }, + { 2, instrux_VRCP14SD }, + { 2, instrux_VRCP14SS }, + { 1, instrux_VRCP28PD }, + { 1, instrux_VRCP28PS }, + { 2, instrux_VRCP28SD }, + { 2, instrux_VRCP28SS }, + { 3, instrux_VREDUCEPD }, + { 3, instrux_VREDUCEPS }, + { 2, instrux_VREDUCESD }, + { 2, instrux_VREDUCESS }, + { 3, instrux_VRNDSCALEPD }, + { 3, instrux_VRNDSCALEPH }, + { 3, instrux_VRNDSCALEPS }, + { 2, instrux_VRNDSCALESD }, + { 2, instrux_VRNDSCALESH }, + { 2, instrux_VRNDSCALESS }, + { 3, instrux_VRSQRT14PD }, + { 3, instrux_VRSQRT14PS }, + { 2, instrux_VRSQRT14SD }, + { 2, instrux_VRSQRT14SS }, + { 1, instrux_VRSQRT28PD }, + { 1, instrux_VRSQRT28PS }, + { 2, instrux_VRSQRT28SD }, + { 2, instrux_VRSQRT28SS }, + { 6, instrux_VSCALEFPD }, + { 6, instrux_VSCALEFPS }, + { 2, instrux_VSCALEFSD }, + { 2, instrux_VSCALEFSS }, + { 3, instrux_VSCATTERDPD }, + { 3, instrux_VSCATTERDPS }, + { 1, instrux_VSCATTERPF0DPD }, + { 1, instrux_VSCATTERPF0DPS }, + { 1, instrux_VSCATTERPF0QPD }, + { 1, instrux_VSCATTERPF0QPS }, + { 1, instrux_VSCATTERPF1DPD }, + { 1, instrux_VSCATTERPF1DPS }, + { 1, instrux_VSCATTERPF1QPD }, + { 1, instrux_VSCATTERPF1QPS }, + { 3, instrux_VSCATTERQPD }, + { 3, instrux_VSCATTERQPS }, + { 4, instrux_VSHUFF32X4 }, + { 4, instrux_VSHUFF64X2 }, + { 4, instrux_VSHUFI32X4 }, + { 4, instrux_VSHUFI64X2 }, + { 1, instrux_RDPKRU }, + { 1, instrux_WRPKRU }, + { 2, instrux_PTWRITE }, + { 1, instrux_CLDEMOTE }, + { 4, instrux_MOVDIRI }, + { 4, instrux_MOVDIR64B }, + { 2, instrux_PCONFIG }, + { 1, instrux_PBNDKB }, + { 1, instrux_PREFETCHRST2 }, + { 1, instrux_GF2P8AFFINEINVQB }, + { 10, instrux_VGF2P8AFFINEINVQB }, + { 1, instrux_GF2P8AFFINEQB }, + { 10, instrux_VGF2P8AFFINEQB }, + { 1, instrux_GF2P8MULB }, + { 10, instrux_VGF2P8MULB }, + { 6, instrux_VPCOMPRESSB }, + { 6, instrux_VPCOMPRESSW }, + { 3, instrux_VPEXPANDB }, + { 3, instrux_VPEXPANDW }, + { 6, instrux_VPSHLDW }, + { 6, instrux_VPSHLDD }, + { 6, instrux_VPSHLDQ }, + { 6, instrux_VPSHLDVW }, + { 6, instrux_VPSHLDVD }, + { 6, instrux_VPSHLDVQ }, + { 6, instrux_VPSHRDW }, + { 6, instrux_VPSHRDD }, + { 6, instrux_VPSHRDQ }, + { 6, instrux_VPSHRDVW }, + { 6, instrux_VPSHRDVD }, + { 6, instrux_VPSHRDVQ }, + { 3, instrux_VPOPCNTB }, + { 3, instrux_VPOPCNTW }, + { 3, instrux_VPOPCNTD }, + { 3, instrux_VPOPCNTQ }, + { 3, instrux_VPSHUFBITQMB }, + { 1, instrux_V4FMADDPS }, + { 1, instrux_V4FNMADDPS }, + { 1, instrux_V4FMADDSS }, + { 1, instrux_V4FNMADDSS }, + { 1, instrux_VP4DPWSSDS }, + { 1, instrux_VP4DPWSSD }, + { 1, instrux_ENCLS }, + { 1, instrux_ENCLU }, + { 1, instrux_ENCLV }, + { 1, instrux_CLRSSBSY }, + { 1, instrux_ENDBR32 }, + { 1, instrux_ENDBR64 }, + { 1, instrux_INCSSPD }, + { 1, instrux_INCSSPQ }, + { 1, instrux_RDSSPD }, + { 1, instrux_RDSSPQ }, + { 1, instrux_RSTORSSP }, + { 1, instrux_SAVEPREVSSP }, + { 1, instrux_SETSSBSY }, + { 2, instrux_WRUSSD }, + { 2, instrux_WRUSSQ }, + { 2, instrux_WRSSD }, + { 2, instrux_WRSSQ }, + { 5, instrux_ENQCMD }, + { 5, instrux_ENQCMDS }, + { 1, instrux_XRESLDTRK }, + { 1, instrux_XSUSLDTRK }, + { 6, instrux_VCVTNE2PS2BF16 }, + { 6, instrux_VDPBF16PS }, + { 3, instrux_VP2INTERSECTD }, + { 3, instrux_VP2INTERSECTQ }, + { 2, instrux_LDTILECFG }, + { 2, instrux_STTILECFG }, + { 1, instrux_TDPBF16PS }, + { 1, instrux_TDPFP16PS }, + { 1, instrux_TCMMIMFP16PS }, + { 1, instrux_TCMMRLFP16PS }, + { 1, instrux_TDPBSSD }, + { 1, instrux_TDPBSUD }, + { 1, instrux_TDPBUSD }, + { 1, instrux_TDPBUUD }, + { 2, instrux_TILELOADD }, + { 2, instrux_TILELOADDT1 }, + { 1, instrux_TILERELEASE }, + { 2, instrux_TILESTORED }, + { 1, instrux_TILEZERO }, + { 2, instrux_TILELOADDRS }, + { 2, instrux_TILELOADDRST1 }, + { 1, instrux_T2RPNTLVWZ0 }, + { 1, instrux_T2RPNTLVWZ0T1 }, + { 1, instrux_T2RPNTLVWZ1 }, + { 1, instrux_T2RPNTLVWZ1T1 }, + { 1, instrux_T2RPNTLVWZ0RS }, + { 1, instrux_T2RPNTLVWZ0RST1 }, + { 1, instrux_T2RPNTLVWZ1RS }, + { 1, instrux_T2RPNTLVWZ1RST1 }, + { 1, instrux_TCONJTCMMIMFP16PS }, + { 1, instrux_TCONJTFP16 }, + { 2, instrux_TCVTROWD2PS }, + { 2, instrux_TCVTROWPS2BF16H }, + { 2, instrux_TCVTROWPS2BF16L }, + { 2, instrux_TCVTROWPS2PHH }, + { 2, instrux_TCVTROWPS2PHL }, + { 1, instrux_TDPBF8PS }, + { 1, instrux_TDPBHF8PS }, + { 1, instrux_TDPHBF8PS }, + { 1, instrux_TDPHF8PS }, + { 2, instrux_TILEMOVROW }, + { 1, instrux_TMMULTF32PS }, + { 1, instrux_TTCMMIMFP16PS }, + { 1, instrux_TTCMMRLFP16PS }, + { 1, instrux_TTDPBF16PS }, + { 1, instrux_TTDPFP16PS }, + { 1, instrux_TTMMULTF32PS }, + { 1, instrux_TTRANSPOSED }, + { 6, instrux_VADDPH }, + { 2, instrux_VADDSH }, + { 6, instrux_VCMPPH }, + { 2, instrux_VCMPSH }, + { 1, instrux_VCOMISH }, + { 3, instrux_VCVTDQ2PH }, + { 3, instrux_VCVTPD2PH }, + { 3, instrux_VCVTPH2DQ }, + { 3, instrux_VCVTPH2PD }, + { 3, instrux_VCVTPH2PSX }, + { 3, instrux_VCVTPH2QQ }, + { 3, instrux_VCVTPH2UDQ }, + { 3, instrux_VCVTPH2UQQ }, + { 3, instrux_VCVTPH2UW }, + { 3, instrux_VCVTPH2W }, + { 3, instrux_VCVTPS2PHX }, + { 3, instrux_VCVTQQ2PH }, + { 2, instrux_VCVTSD2SH }, + { 2, instrux_VCVTSH2SD }, + { 2, instrux_VCVTSH2SI }, + { 2, instrux_VCVTSH2SS }, + { 2, instrux_VCVTSH2USI }, + { 4, instrux_VCVTSI2SH }, + { 2, instrux_VCVTSS2SH }, + { 3, instrux_VCVTTPH2DQ }, + { 3, instrux_VCVTTPH2QQ }, + { 3, instrux_VCVTTPH2UDQ }, + { 3, instrux_VCVTTPH2UQQ }, + { 3, instrux_VCVTTPH2UW }, + { 3, instrux_VCVTTPH2W }, + { 2, instrux_VCVTTSH2SI }, + { 2, instrux_VCVTTSH2USI }, + { 3, instrux_VCVTUDQ2PH }, + { 3, instrux_VCVTUQQ2PH }, + { 4, instrux_VCVTUSI2SH }, + { 3, instrux_VCVTUW2PH }, + { 3, instrux_VCVTW2PH }, + { 6, instrux_VDIVPH }, + { 2, instrux_VDIVSH }, + { 6, instrux_VFCMADDCPH }, + { 6, instrux_VFMADDCPH }, + { 2, instrux_VFCMADDCSH }, + { 2, instrux_VFMADDCSH }, + { 6, instrux_VFCMULCPH }, + { 6, instrux_VFMULCPH }, + { 2, instrux_VFCMULCSH }, + { 2, instrux_VFMULCSH }, + { 6, instrux_VFMADDSUB132PH }, + { 6, instrux_VFMADDSUB213PH }, + { 6, instrux_VFMADDSUB231PH }, + { 6, instrux_VFMSUBADD132PH }, + { 6, instrux_VFMSUBADD213PH }, + { 6, instrux_VFMSUBADD231PH }, + { 6, instrux_VFMADD132PH }, + { 6, instrux_VFMADD213PH }, + { 6, instrux_VFMADD231PH }, + { 6, instrux_VFNMADD132PH }, + { 6, instrux_VFNMADD213PH }, + { 6, instrux_VFNMADD231PH }, + { 2, instrux_VFMADD132SH }, + { 2, instrux_VFMADD213SH }, + { 2, instrux_VFMADD231SH }, + { 2, instrux_VFNMADD132SH }, + { 2, instrux_VFNMADD213SH }, + { 2, instrux_VFNMADD231SH }, + { 6, instrux_VFMSUB132PH }, + { 6, instrux_VFMSUB213PH }, + { 6, instrux_VFMSUB231PH }, + { 6, instrux_VFNMSUB132PH }, + { 6, instrux_VFNMSUB213PH }, + { 6, instrux_VFNMSUB231PH }, + { 2, instrux_VFMSUB132SH }, + { 2, instrux_VFMSUB213SH }, + { 2, instrux_VFMSUB231SH }, + { 2, instrux_VFNMSUB132SH }, + { 2, instrux_VFNMSUB213SH }, + { 2, instrux_VFNMSUB231SH }, + { 3, instrux_VFPCLASSPH }, + { 1, instrux_VFPCLASSSH }, + { 3, instrux_VGETEXPPH }, + { 1, instrux_VGETEXPSH }, + { 3, instrux_VGETMANTPH }, + { 1, instrux_VGETMANTSH }, + { 12, instrux_VMAXPH }, + { 3, instrux_VMAXSH }, + { 12, instrux_VMINPH }, + { 3, instrux_VMINSH }, + { 6, instrux_VMOVSH }, + { 4, instrux_VMOVW }, + { 6, instrux_VMULPH }, + { 2, instrux_VMULSH }, + { 3, instrux_VRCPPH }, + { 2, instrux_VRCPSH }, + { 3, instrux_VREDUCEPH }, + { 2, instrux_VREDUCESH }, + { 3, instrux_VENDSCALEPH }, + { 2, instrux_VENDSCALESH }, + { 3, instrux_VRSQRTPH }, + { 2, instrux_VRSQRTSH }, + { 6, instrux_VSCALEFPH }, + { 2, instrux_VSCALEFSH }, + { 3, instrux_VSQRTPH }, + { 2, instrux_VSQRTSH }, + { 6, instrux_VSUBPH }, + { 2, instrux_VSUBSH }, + { 1, instrux_VUCOMISH }, + { 4, instrux_AADD }, + { 4, instrux_AAND }, + { 4, instrux_AOR }, + { 4, instrux_AXOR }, + { 1, instrux_CLUI }, + { 1, instrux_SENDUIPI }, + { 1, instrux_STUI }, + { 1, instrux_TESTUI }, + { 1, instrux_UIRET }, + { 2, instrux_HRESET }, + { 3, instrux_VADDBF16 }, + { 3, instrux_VCMPBF16 }, + { 1, instrux_VCOMISBF16 }, + { 3, instrux_VDIVBF16 }, + { 3, instrux_VFMADD132BF16 }, + { 3, instrux_VFMADD213BF16 }, + { 3, instrux_VFMADD231BF16 }, + { 3, instrux_VFMSUB132BF16 }, + { 3, instrux_VFMSUB213BF16 }, + { 3, instrux_VFMSUB231BF16 }, + { 3, instrux_VFNMADD132BF16 }, + { 3, instrux_VFNMADD213BF16 }, + { 3, instrux_VFNMADD231BF16 }, + { 3, instrux_VFNMSUB132BF16 }, + { 3, instrux_VFNMSUB213BF16 }, + { 3, instrux_VFNMSUB231BF16 }, + { 3, instrux_VFPCLASSBF16 }, + { 3, instrux_VGETEXPBF16 }, + { 3, instrux_VGETMANTBF16 }, + { 3, instrux_VMAXBF16 }, + { 3, instrux_VMINBF16 }, + { 3, instrux_VMULBF16 }, + { 3, instrux_VRCPBF16 }, + { 3, instrux_VREDUCEBF16 }, + { 3, instrux_VRNDSCALEBF16 }, + { 3, instrux_VRSQRTBF16 }, + { 3, instrux_VSCALEFBF16 }, + { 3, instrux_VSQRTBF16 }, + { 3, instrux_VSUBBF16 }, + { 1, instrux_VCOMXSD }, + { 1, instrux_VCOMXSH }, + { 1, instrux_VCOMXSS }, + { 1, instrux_VUCOMXSD }, + { 1, instrux_VUCOMXSH }, + { 1, instrux_VUCOMXSS }, + { 3, instrux_VCVT2PH2BF8 }, + { 3, instrux_VCVT2PH2BF8S }, + { 3, instrux_VCVT2PH2HF8 }, + { 3, instrux_VCVT2PH2HF8S }, + { 3, instrux_VCVTPH2BF8 }, + { 3, instrux_VCVTPH2BF8S }, + { 3, instrux_VCVTPH2HF8 }, + { 3, instrux_VCVTPH2HF8S }, + { 3, instrux_VCVT2PS2PHX }, + { 3, instrux_VCVTBIASPH2BF8 }, + { 3, instrux_VCVTBIASPH2BF8S }, + { 3, instrux_VCVTBIASPH2HF8 }, + { 3, instrux_VCVTBIASPH2HF8S }, + { 3, instrux_VCVTHF82PH }, + { 3, instrux_VDPPHPS }, + { 3, instrux_VMINMAXBF16 }, + { 3, instrux_VMINMAXPD }, + { 3, instrux_VMINMAXPH }, + { 3, instrux_VMINMAXPS }, + { 1, instrux_VMINMAXSD }, + { 1, instrux_VMINMAXSH }, + { 1, instrux_VMINMAXSS }, + { 3, instrux_VCVTBF162IBS }, + { 3, instrux_VCVTBF162IUBS }, + { 3, instrux_VCVTTBF162IBS }, + { 3, instrux_VCVTTBF162IUBS }, + { 3, instrux_VCVTTPD2DQS }, + { 3, instrux_VCVTTPD2QQS }, + { 3, instrux_VCVTTPD2UDQS }, + { 3, instrux_VCVTTPD2UQQS }, + { 3, instrux_VCVTPH2IBS }, + { 3, instrux_VCVTPH2IUBS }, + { 3, instrux_VCVTTPH2IBS }, + { 3, instrux_VCVTTPH2IUBS }, + { 3, instrux_VCVTTPS2DQS }, + { 3, instrux_VCVTPS2IBS }, + { 3, instrux_VCVTPS2IUBS }, + { 3, instrux_VCVTTPS2IBS }, + { 3, instrux_VCVTTPS2IUBS }, + { 3, instrux_VCVTTPS2QQS }, + { 3, instrux_VCVTTPS2UDQS }, + { 3, instrux_VCVTTPS2UQQS }, + { 2, instrux_VCVTTSD2SIS }, + { 2, instrux_VCVTTSD2USIS }, + { 2, instrux_VCVTTSS2SIS }, + { 2, instrux_VCVTTSS2USIS }, + { 2, instrux_VBMACOR16X16X16 }, + { 2, instrux_VBMACXOR16X16X16 }, + { 3, instrux_VBITREV }, + { 3, instrux_HINT_NOP }, + { 3, instrux_HINT_NOP0 }, + { 3, instrux_HINT_NOP1 }, + { 3, instrux_HINT_NOP2 }, + { 3, instrux_HINT_NOP3 }, + { 3, instrux_HINT_NOP4 }, + { 3, instrux_HINT_NOP5 }, + { 3, instrux_HINT_NOP6 }, + { 3, instrux_HINT_NOP7 }, + { 3, instrux_HINT_NOP8 }, + { 3, instrux_HINT_NOP9 }, + { 3, instrux_HINT_NOP10 }, + { 3, instrux_HINT_NOP11 }, + { 3, instrux_HINT_NOP12 }, + { 3, instrux_HINT_NOP13 }, + { 3, instrux_HINT_NOP14 }, + { 3, instrux_HINT_NOP15 }, + { 3, instrux_HINT_NOP16 }, + { 3, instrux_HINT_NOP17 }, + { 3, instrux_HINT_NOP18 }, + { 3, instrux_HINT_NOP19 }, + { 3, instrux_HINT_NOP20 }, + { 3, instrux_HINT_NOP21 }, + { 3, instrux_HINT_NOP22 }, + { 3, instrux_HINT_NOP23 }, + { 3, instrux_HINT_NOP24 }, + { 3, instrux_HINT_NOP25 }, + { 3, instrux_HINT_NOP26 }, + { 3, instrux_HINT_NOP27 }, + { 3, instrux_HINT_NOP28 }, + { 3, instrux_HINT_NOP29 }, + { 3, instrux_HINT_NOP30 }, + { 3, instrux_HINT_NOP31 }, + { 3, instrux_HINT_NOP32 }, + { 3, instrux_HINT_NOP33 }, + { 3, instrux_HINT_NOP34 }, + { 3, instrux_HINT_NOP35 }, + { 3, instrux_HINT_NOP36 }, + { 3, instrux_HINT_NOP37 }, + { 3, instrux_HINT_NOP38 }, + { 3, instrux_HINT_NOP39 }, + { 3, instrux_HINT_NOP40 }, + { 3, instrux_HINT_NOP41 }, + { 3, instrux_HINT_NOP42 }, + { 3, instrux_HINT_NOP43 }, + { 3, instrux_HINT_NOP44 }, + { 3, instrux_HINT_NOP45 }, + { 3, instrux_HINT_NOP46 }, + { 3, instrux_HINT_NOP47 }, + { 3, instrux_HINT_NOP48 }, + { 3, instrux_HINT_NOP49 }, + { 3, instrux_HINT_NOP50 }, + { 3, instrux_HINT_NOP51 }, + { 3, instrux_HINT_NOP52 }, + { 3, instrux_HINT_NOP53 }, + { 3, instrux_HINT_NOP54 }, + { 3, instrux_HINT_NOP55 }, + { 3, instrux_HINT_NOP56 }, + { 3, instrux_HINT_NOP57 }, + { 3, instrux_HINT_NOP58 }, + { 3, instrux_HINT_NOP59 }, + { 3, instrux_HINT_NOP60 }, + { 3, instrux_HINT_NOP61 }, + { 3, instrux_HINT_NOP62 }, + { 3, instrux_HINT_NOP63 }, +}; diff --git a/src/x86/insnsb.c b/src/x86/insnsb.c new file mode 100644 index 0000000..6f99b02 --- /dev/null +++ b/src/x86/insnsb.c @@ -0,0 +1,8798 @@ +/* This file auto-generated from insns.dat by insns.pl - don't edit it */ + +#include "nasm.h" +#include "insns.h" + +const uint8_t nasm_bytecodes[73487] = { + /* 0 */ 0250,0363,0177,010,0300,01,0360,0110,0306,0,037,0, + /* 12 */ 0250,0363,0377,010,0300,01,0360,0110,0306,0,077,0, + /* 24 */ 0240,0364,0175,030,0300,0320,01,0203,0210,0276,0, + /* 35 */ 0250,0364,0175,010,0300,0320,01,0203,0200,0275,0, + /* 46 */ 0240,0364,0175,030,0300,0320,01,0203,0200,0275,0, + /* 57 */ 0240,0364,0174,030,0300,0321,01,0203,0210,0276,0, + /* 68 */ 0250,0364,0174,010,0300,0321,01,0203,0200,0275,0, + /* 79 */ 0240,0364,0174,030,0300,0321,01,0203,0200,0275,0, + /* 90 */ 0240,0364,0374,030,0300,0324,01,0203,0210,0276,0, + /* 101 */ 0250,0364,0374,010,0300,0324,01,0203,0200,0275,0, + /* 112 */ 0240,0364,0374,030,0300,0324,01,0203,0200,0275,0, + /* 123 */ 0240,0364,0175,030,0300,0320,01,0201,0210,032,0, + /* 134 */ 0250,0364,0175,010,0300,0320,01,0201,0200,031,0, + /* 145 */ 0240,0364,0175,030,0300,0320,01,0201,0200,031,0, + /* 156 */ 0240,0364,0174,030,0300,0321,01,0201,0210,042,0, + /* 167 */ 0250,0364,0174,010,0300,0321,01,0201,0200,041,0, + /* 178 */ 0240,0364,0174,030,0300,0321,01,0201,0200,041,0, + /* 189 */ 0240,0364,0374,030,0300,0324,01,0201,0210,0256,0, + /* 200 */ 0250,0364,0374,010,0300,0324,01,0201,0200,0255,0, + /* 211 */ 0240,0364,0374,030,0300,0324,01,0201,0200,0255,0, + /* 222 */ 0240,0364,0175,030,0300,0320,01,0203,0211,0276,0, + /* 233 */ 0250,0364,0175,010,0300,0320,01,0203,0201,0275,0, + /* 244 */ 0240,0364,0175,030,0300,0320,01,0203,0201,0275,0, + /* 255 */ 0240,0364,0174,030,0300,0321,01,0203,0211,0276,0, + /* 266 */ 0250,0364,0174,010,0300,0321,01,0203,0201,0275,0, + /* 277 */ 0240,0364,0174,030,0300,0321,01,0203,0201,0275,0, + /* 288 */ 0240,0364,0374,030,0300,0324,01,0203,0211,0276,0, + /* 299 */ 0250,0364,0374,010,0300,0324,01,0203,0201,0275,0, + /* 310 */ 0240,0364,0374,030,0300,0324,01,0203,0201,0275,0, + /* 321 */ 0240,0364,0175,030,0300,0320,01,0201,0211,032,0, + /* 332 */ 0250,0364,0175,010,0300,0320,01,0201,0201,031,0, + /* 343 */ 0240,0364,0175,030,0300,0320,01,0201,0201,031,0, + /* 354 */ 0240,0364,0174,030,0300,0321,01,0201,0211,042,0, + /* 365 */ 0250,0364,0174,010,0300,0321,01,0201,0201,041,0, + /* 376 */ 0240,0364,0174,030,0300,0321,01,0201,0201,041,0, + /* 387 */ 0240,0364,0374,030,0300,0324,01,0201,0211,0256,0, + /* 398 */ 0250,0364,0374,010,0300,0324,01,0201,0201,0255,0, + /* 409 */ 0240,0364,0374,030,0300,0324,01,0201,0201,0255,0, + /* 420 */ 0240,0364,0175,030,0300,0320,01,0203,0212,0276,0, + /* 431 */ 0250,0364,0175,010,0300,0320,01,0203,0202,0275,0, + /* 442 */ 0240,0364,0175,030,0300,0320,01,0203,0202,0275,0, + /* 453 */ 0240,0364,0174,030,0300,0321,01,0203,0212,0276,0, + /* 464 */ 0250,0364,0174,010,0300,0321,01,0203,0202,0275,0, + /* 475 */ 0240,0364,0174,030,0300,0321,01,0203,0202,0275,0, + /* 486 */ 0240,0364,0374,030,0300,0324,01,0203,0212,0276,0, + /* 497 */ 0250,0364,0374,010,0300,0324,01,0203,0202,0275,0, + /* 508 */ 0240,0364,0374,030,0300,0324,01,0203,0202,0275,0, + /* 519 */ 0240,0364,0175,030,0300,0320,01,0201,0212,032,0, + /* 530 */ 0250,0364,0175,010,0300,0320,01,0201,0202,031,0, + /* 541 */ 0240,0364,0175,030,0300,0320,01,0201,0202,031,0, + /* 552 */ 0240,0364,0174,030,0300,0321,01,0201,0212,042,0, + /* 563 */ 0250,0364,0174,010,0300,0321,01,0201,0202,041,0, + /* 574 */ 0240,0364,0174,030,0300,0321,01,0201,0202,041,0, + /* 585 */ 0240,0364,0374,030,0300,0324,01,0201,0212,0256,0, + /* 596 */ 0250,0364,0374,010,0300,0324,01,0201,0202,0255,0, + /* 607 */ 0240,0364,0374,030,0300,0324,01,0201,0202,0255,0, + /* 618 */ 0240,0364,0175,030,0300,0320,01,0203,0213,0276,0, + /* 629 */ 0250,0364,0175,010,0300,0320,01,0203,0203,0275,0, + /* 640 */ 0240,0364,0175,030,0300,0320,01,0203,0203,0275,0, + /* 651 */ 0240,0364,0174,030,0300,0321,01,0203,0213,0276,0, + /* 662 */ 0250,0364,0174,010,0300,0321,01,0203,0203,0275,0, + /* 673 */ 0240,0364,0174,030,0300,0321,01,0203,0203,0275,0, + /* 684 */ 0240,0364,0374,030,0300,0324,01,0203,0213,0276,0, + /* 695 */ 0250,0364,0374,010,0300,0324,01,0203,0203,0275,0, + /* 706 */ 0240,0364,0374,030,0300,0324,01,0203,0203,0275,0, + /* 717 */ 0240,0364,0175,030,0300,0320,01,0201,0213,032,0, + /* 728 */ 0250,0364,0175,010,0300,0320,01,0201,0203,031,0, + /* 739 */ 0240,0364,0175,030,0300,0320,01,0201,0203,031,0, + /* 750 */ 0240,0364,0174,030,0300,0321,01,0201,0213,042,0, + /* 761 */ 0250,0364,0174,010,0300,0321,01,0201,0203,041,0, + /* 772 */ 0240,0364,0174,030,0300,0321,01,0201,0203,041,0, + /* 783 */ 0240,0364,0374,030,0300,0324,01,0201,0213,0256,0, + /* 794 */ 0250,0364,0374,010,0300,0324,01,0201,0203,0255,0, + /* 805 */ 0240,0364,0374,030,0300,0324,01,0201,0203,0255,0, + /* 816 */ 0240,0364,0175,030,0300,0320,01,0203,0214,0276,0, + /* 827 */ 0250,0364,0175,010,0300,0320,01,0203,0204,0275,0, + /* 838 */ 0240,0364,0175,030,0300,0320,01,0203,0204,0275,0, + /* 849 */ 0240,0364,0174,030,0300,0321,01,0203,0214,0276,0, + /* 860 */ 0250,0364,0174,010,0300,0321,01,0203,0204,0275,0, + /* 871 */ 0240,0364,0174,030,0300,0321,01,0203,0204,0275,0, + /* 882 */ 0240,0364,0374,030,0300,0324,01,0203,0214,0276,0, + /* 893 */ 0250,0364,0374,010,0300,0324,01,0203,0204,0275,0, + /* 904 */ 0240,0364,0374,030,0300,0324,01,0203,0204,0275,0, + /* 915 */ 0240,0364,0175,030,0300,0320,01,0201,0214,032,0, + /* 926 */ 0250,0364,0175,010,0300,0320,01,0201,0204,031,0, + /* 937 */ 0240,0364,0175,030,0300,0320,01,0201,0204,031,0, + /* 948 */ 0240,0364,0174,030,0300,0321,01,0201,0214,042,0, + /* 959 */ 0250,0364,0174,010,0300,0321,01,0201,0204,041,0, + /* 970 */ 0240,0364,0174,030,0300,0321,01,0201,0204,041,0, + /* 981 */ 0240,0364,0374,030,0300,0324,01,0201,0214,0256,0, + /* 992 */ 0250,0364,0374,010,0300,0324,01,0201,0204,0255,0, + /* 1003 */ 0240,0364,0374,030,0300,0324,01,0201,0204,0255,0, + /* 1014 */ 0240,0364,0175,030,0300,0320,01,0203,0215,0276,0, + /* 1025 */ 0250,0364,0175,010,0300,0320,01,0203,0205,0275,0, + /* 1036 */ 0240,0364,0175,030,0300,0320,01,0203,0205,0275,0, + /* 1047 */ 0240,0364,0174,030,0300,0321,01,0203,0215,0276,0, + /* 1058 */ 0250,0364,0174,010,0300,0321,01,0203,0205,0275,0, + /* 1069 */ 0240,0364,0174,030,0300,0321,01,0203,0205,0275,0, + /* 1080 */ 0240,0364,0374,030,0300,0324,01,0203,0215,0276,0, + /* 1091 */ 0250,0364,0374,010,0300,0324,01,0203,0205,0275,0, + /* 1102 */ 0240,0364,0374,030,0300,0324,01,0203,0205,0275,0, + /* 1113 */ 0240,0364,0175,030,0300,0320,01,0201,0215,032,0, + /* 1124 */ 0250,0364,0175,010,0300,0320,01,0201,0205,031,0, + /* 1135 */ 0240,0364,0175,030,0300,0320,01,0201,0205,031,0, + /* 1146 */ 0240,0364,0174,030,0300,0321,01,0201,0215,042,0, + /* 1157 */ 0250,0364,0174,010,0300,0321,01,0201,0205,041,0, + /* 1168 */ 0240,0364,0174,030,0300,0321,01,0201,0205,041,0, + /* 1179 */ 0240,0364,0374,030,0300,0324,01,0201,0215,0256,0, + /* 1190 */ 0250,0364,0374,010,0300,0324,01,0201,0205,0255,0, + /* 1201 */ 0240,0364,0374,030,0300,0324,01,0201,0205,0255,0, + /* 1212 */ 0240,0364,0175,030,0300,0320,01,0203,0216,0276,0, + /* 1223 */ 0250,0364,0175,010,0300,0320,01,0203,0206,0275,0, + /* 1234 */ 0240,0364,0175,030,0300,0320,01,0203,0206,0275,0, + /* 1245 */ 0240,0364,0174,030,0300,0321,01,0203,0216,0276,0, + /* 1256 */ 0250,0364,0174,010,0300,0321,01,0203,0206,0275,0, + /* 1267 */ 0240,0364,0174,030,0300,0321,01,0203,0206,0275,0, + /* 1278 */ 0240,0364,0374,030,0300,0324,01,0203,0216,0276,0, + /* 1289 */ 0250,0364,0374,010,0300,0324,01,0203,0206,0275,0, + /* 1300 */ 0240,0364,0374,030,0300,0324,01,0203,0206,0275,0, + /* 1311 */ 0240,0364,0175,030,0300,0320,01,0201,0216,032,0, + /* 1322 */ 0250,0364,0175,010,0300,0320,01,0201,0206,031,0, + /* 1333 */ 0240,0364,0175,030,0300,0320,01,0201,0206,031,0, + /* 1344 */ 0240,0364,0174,030,0300,0321,01,0201,0216,042,0, + /* 1355 */ 0250,0364,0174,010,0300,0321,01,0201,0206,041,0, + /* 1366 */ 0240,0364,0174,030,0300,0321,01,0201,0206,041,0, + /* 1377 */ 0240,0364,0374,030,0300,0324,01,0201,0216,0256,0, + /* 1388 */ 0250,0364,0374,010,0300,0324,01,0201,0206,0255,0, + /* 1399 */ 0240,0364,0374,030,0300,0324,01,0201,0206,0255,0, + /* 1410 */ 0240,0364,0175,030,0300,0320,01,0301,0210,026,0, + /* 1421 */ 0250,0364,0175,010,0300,0320,01,0301,0200,025,0, + /* 1432 */ 0240,0364,0175,030,0300,0320,01,0301,0200,025,0, + /* 1443 */ 0240,0364,0174,030,0300,0321,01,0301,0210,026,0, + /* 1454 */ 0250,0364,0174,010,0300,0321,01,0301,0200,025,0, + /* 1465 */ 0240,0364,0174,030,0300,0321,01,0301,0200,025,0, + /* 1476 */ 0240,0364,0374,030,0300,0324,01,0301,0210,026,0, + /* 1487 */ 0250,0364,0374,010,0300,0324,01,0301,0200,025,0, + /* 1498 */ 0240,0364,0374,030,0300,0324,01,0301,0200,025,0, + /* 1509 */ 0240,0364,0175,030,0300,0320,01,0301,0211,026,0, + /* 1520 */ 0250,0364,0175,010,0300,0320,01,0301,0201,025,0, + /* 1531 */ 0240,0364,0175,030,0300,0320,01,0301,0201,025,0, + /* 1542 */ 0240,0364,0174,030,0300,0321,01,0301,0211,026,0, + /* 1553 */ 0250,0364,0174,010,0300,0321,01,0301,0201,025,0, + /* 1564 */ 0240,0364,0174,030,0300,0321,01,0301,0201,025,0, + /* 1575 */ 0240,0364,0374,030,0300,0324,01,0301,0211,026,0, + /* 1586 */ 0250,0364,0374,010,0300,0324,01,0301,0201,025,0, + /* 1597 */ 0240,0364,0374,030,0300,0324,01,0301,0201,025,0, + /* 1608 */ 0240,0364,0175,030,0300,0320,01,0301,0212,026,0, + /* 1619 */ 0250,0364,0175,010,0300,0320,01,0301,0202,025,0, + /* 1630 */ 0240,0364,0175,030,0300,0320,01,0301,0202,025,0, + /* 1641 */ 0240,0364,0174,030,0300,0321,01,0301,0212,026,0, + /* 1652 */ 0250,0364,0174,010,0300,0321,01,0301,0202,025,0, + /* 1663 */ 0240,0364,0174,030,0300,0321,01,0301,0202,025,0, + /* 1674 */ 0240,0364,0374,030,0300,0324,01,0301,0212,026,0, + /* 1685 */ 0250,0364,0374,010,0300,0324,01,0301,0202,025,0, + /* 1696 */ 0240,0364,0374,030,0300,0324,01,0301,0202,025,0, + /* 1707 */ 0240,0364,0175,030,0300,0320,01,0301,0213,026,0, + /* 1718 */ 0250,0364,0175,010,0300,0320,01,0301,0203,025,0, + /* 1729 */ 0240,0364,0175,030,0300,0320,01,0301,0203,025,0, + /* 1740 */ 0240,0364,0174,030,0300,0321,01,0301,0213,026,0, + /* 1751 */ 0250,0364,0174,010,0300,0321,01,0301,0203,025,0, + /* 1762 */ 0240,0364,0174,030,0300,0321,01,0301,0203,025,0, + /* 1773 */ 0240,0364,0374,030,0300,0324,01,0301,0213,026,0, + /* 1784 */ 0250,0364,0374,010,0300,0324,01,0301,0203,025,0, + /* 1795 */ 0240,0364,0374,030,0300,0324,01,0301,0203,025,0, + /* 1806 */ 0240,0364,0175,030,0300,0320,01,0301,0214,026,0, + /* 1817 */ 0250,0364,0175,010,0300,0320,01,0301,0204,025,0, + /* 1828 */ 0240,0364,0175,030,0300,0320,01,0301,0204,025,0, + /* 1839 */ 0240,0364,0174,030,0300,0321,01,0301,0214,026,0, + /* 1850 */ 0250,0364,0174,010,0300,0321,01,0301,0204,025,0, + /* 1861 */ 0240,0364,0174,030,0300,0321,01,0301,0204,025,0, + /* 1872 */ 0240,0364,0374,030,0300,0324,01,0301,0214,026,0, + /* 1883 */ 0250,0364,0374,010,0300,0324,01,0301,0204,025,0, + /* 1894 */ 0240,0364,0374,030,0300,0324,01,0301,0204,025,0, + /* 1905 */ 0240,0364,0175,030,0300,0320,01,0301,0215,026,0, + /* 1916 */ 0250,0364,0175,010,0300,0320,01,0301,0205,025,0, + /* 1927 */ 0240,0364,0175,030,0300,0320,01,0301,0205,025,0, + /* 1938 */ 0240,0364,0174,030,0300,0321,01,0301,0215,026,0, + /* 1949 */ 0250,0364,0174,010,0300,0321,01,0301,0205,025,0, + /* 1960 */ 0240,0364,0174,030,0300,0321,01,0301,0205,025,0, + /* 1971 */ 0240,0364,0374,030,0300,0324,01,0301,0215,026,0, + /* 1982 */ 0250,0364,0374,010,0300,0324,01,0301,0205,025,0, + /* 1993 */ 0240,0364,0374,030,0300,0324,01,0301,0205,025,0, + /* 2004 */ 0240,0364,0175,030,0300,0320,01,0301,0217,026,0, + /* 2015 */ 0250,0364,0175,010,0300,0320,01,0301,0207,025,0, + /* 2026 */ 0240,0364,0175,030,0300,0320,01,0301,0207,025,0, + /* 2037 */ 0240,0364,0174,030,0300,0321,01,0301,0217,026,0, + /* 2048 */ 0250,0364,0174,010,0300,0321,01,0301,0207,025,0, + /* 2059 */ 0240,0364,0174,030,0300,0321,01,0301,0207,025,0, + /* 2070 */ 0240,0364,0374,030,0300,0324,01,0301,0217,026,0, + /* 2081 */ 0250,0364,0374,010,0300,0324,01,0301,0207,025,0, + /* 2092 */ 0240,0364,0374,030,0300,0324,01,0301,0207,025,0, + /* 2103 */ 0250,0364,0175,010,0300,0320,01,0153,0110,0276,0, + /* 2114 */ 0250,0364,0174,010,0300,0321,01,0153,0110,0276,0, + /* 2125 */ 0250,0364,0374,010,0300,0324,01,0153,0110,0276,0, + /* 2136 */ 0250,0364,0175,010,0300,0320,01,0151,0110,032,0, + /* 2147 */ 0250,0364,0174,010,0300,0321,01,0151,0110,042,0, + /* 2158 */ 0250,0364,0374,010,0300,0324,01,0151,0110,0256,0, + /* 2169 */ 0240,0364,0175,030,0300,0320,01,044,0112,027,0, + /* 2180 */ 0250,0364,0175,010,0300,0320,01,044,0101,026,0, + /* 2191 */ 0240,0364,0175,030,0300,0320,01,044,0101,026,0, + /* 2202 */ 0240,0364,0174,030,0300,0321,01,044,0112,027,0, + /* 2213 */ 0250,0364,0174,010,0300,0321,01,044,0101,026,0, + /* 2224 */ 0240,0364,0174,030,0300,0321,01,044,0101,026,0, + /* 2235 */ 0240,0364,0374,030,0300,0324,01,044,0112,027,0, + /* 2246 */ 0250,0364,0374,010,0300,0324,01,044,0101,026,0, + /* 2257 */ 0240,0364,0374,030,0300,0324,01,044,0101,026,0, + /* 2268 */ 0240,0364,0175,030,0300,0320,01,054,0112,027,0, + /* 2279 */ 0250,0364,0175,010,0300,0320,01,054,0101,026,0, + /* 2290 */ 0240,0364,0175,030,0300,0320,01,054,0101,026,0, + /* 2301 */ 0240,0364,0174,030,0300,0321,01,054,0112,027,0, + /* 2312 */ 0250,0364,0174,010,0300,0321,01,054,0101,026,0, + /* 2323 */ 0240,0364,0174,030,0300,0321,01,054,0101,026,0, + /* 2334 */ 0240,0364,0374,030,0300,0324,01,054,0112,027,0, + /* 2345 */ 0250,0364,0374,010,0300,0324,01,054,0101,026,0, + /* 2356 */ 0240,0364,0374,030,0300,0324,01,054,0101,026,0, + /* 2367 */ 0240,0364,05,013,0300,0320,01,0203,0217,0276,0, + /* 2378 */ 0240,0364,05,07,0300,0320,01,0203,0217,0276,0, + /* 2389 */ 0240,0364,05,03,0300,0320,01,0203,0217,0276,0, + /* 2400 */ 0240,0364,05,02,0300,0320,01,0203,0217,0276,0, + /* 2411 */ 0240,0364,05,06,0300,0320,01,0203,0217,0276,0, + /* 2422 */ 0240,0364,05,04,0300,0320,01,0203,0217,0276,0, + /* 2433 */ 0240,0364,05,017,0300,0320,01,0203,0217,0276,0, + /* 2444 */ 0240,0364,05,015,0300,0320,01,0203,0217,0276,0, + /* 2455 */ 0240,0364,05,014,0300,0320,01,0203,0217,0276,0, + /* 2466 */ 0240,0364,05,016,0300,0320,01,0203,0217,0276,0, + /* 2477 */ 0240,0364,05,05,0300,0320,01,0203,0217,0276,0, + /* 2488 */ 0240,0364,05,01,0300,0320,01,0203,0217,0276,0, + /* 2499 */ 0240,0364,05,011,0300,0320,01,0203,0217,0276,0, + /* 2510 */ 0240,0364,05,0,0300,0320,01,0203,0217,0276,0, + /* 2521 */ 0240,0364,05,010,0300,0320,01,0203,0217,0276,0, + /* 2532 */ 0240,0364,05,012,0300,0320,01,0203,0217,0276,0, + /* 2543 */ 0240,0364,04,013,0300,0321,01,0203,0217,0276,0, + /* 2554 */ 0240,0364,04,07,0300,0321,01,0203,0217,0276,0, + /* 2565 */ 0240,0364,04,03,0300,0321,01,0203,0217,0276,0, + /* 2576 */ 0240,0364,04,02,0300,0321,01,0203,0217,0276,0, + /* 2587 */ 0240,0364,04,06,0300,0321,01,0203,0217,0276,0, + /* 2598 */ 0240,0364,04,04,0300,0321,01,0203,0217,0276,0, + /* 2609 */ 0240,0364,04,017,0300,0321,01,0203,0217,0276,0, + /* 2620 */ 0240,0364,04,015,0300,0321,01,0203,0217,0276,0, + /* 2631 */ 0240,0364,04,014,0300,0321,01,0203,0217,0276,0, + /* 2642 */ 0240,0364,04,016,0300,0321,01,0203,0217,0276,0, + /* 2653 */ 0240,0364,04,05,0300,0321,01,0203,0217,0276,0, + /* 2664 */ 0240,0364,04,01,0300,0321,01,0203,0217,0276,0, + /* 2675 */ 0240,0364,04,011,0300,0321,01,0203,0217,0276,0, + /* 2686 */ 0240,0364,04,0,0300,0321,01,0203,0217,0276,0, + /* 2697 */ 0240,0364,04,010,0300,0321,01,0203,0217,0276,0, + /* 2708 */ 0240,0364,04,012,0300,0321,01,0203,0217,0276,0, + /* 2719 */ 0240,0364,0204,013,0300,0324,01,0203,0217,0276,0, + /* 2730 */ 0240,0364,0204,07,0300,0324,01,0203,0217,0276,0, + /* 2741 */ 0240,0364,0204,03,0300,0324,01,0203,0217,0276,0, + /* 2752 */ 0240,0364,0204,02,0300,0324,01,0203,0217,0276,0, + /* 2763 */ 0240,0364,0204,06,0300,0324,01,0203,0217,0276,0, + /* 2774 */ 0240,0364,0204,04,0300,0324,01,0203,0217,0276,0, + /* 2785 */ 0240,0364,0204,017,0300,0324,01,0203,0217,0276,0, + /* 2796 */ 0240,0364,0204,015,0300,0324,01,0203,0217,0276,0, + /* 2807 */ 0240,0364,0204,014,0300,0324,01,0203,0217,0276,0, + /* 2818 */ 0240,0364,0204,016,0300,0324,01,0203,0217,0276,0, + /* 2829 */ 0240,0364,0204,05,0300,0324,01,0203,0217,0276,0, + /* 2840 */ 0240,0364,0204,01,0300,0324,01,0203,0217,0276,0, + /* 2851 */ 0240,0364,0204,011,0300,0324,01,0203,0217,0276,0, + /* 2862 */ 0240,0364,0204,0,0300,0324,01,0203,0217,0276,0, + /* 2873 */ 0240,0364,0204,010,0300,0324,01,0203,0217,0276,0, + /* 2884 */ 0240,0364,0204,012,0300,0324,01,0203,0217,0276,0, + /* 2895 */ 0240,0364,05,013,0300,0320,01,0201,0217,032,0, + /* 2906 */ 0240,0364,05,07,0300,0320,01,0201,0217,032,0, + /* 2917 */ 0240,0364,05,03,0300,0320,01,0201,0217,032,0, + /* 2928 */ 0240,0364,05,02,0300,0320,01,0201,0217,032,0, + /* 2939 */ 0240,0364,05,06,0300,0320,01,0201,0217,032,0, + /* 2950 */ 0240,0364,05,04,0300,0320,01,0201,0217,032,0, + /* 2961 */ 0240,0364,05,017,0300,0320,01,0201,0217,032,0, + /* 2972 */ 0240,0364,05,015,0300,0320,01,0201,0217,032,0, + /* 2983 */ 0240,0364,05,014,0300,0320,01,0201,0217,032,0, + /* 2994 */ 0240,0364,05,016,0300,0320,01,0201,0217,032,0, + /* 3005 */ 0240,0364,05,05,0300,0320,01,0201,0217,032,0, + /* 3016 */ 0240,0364,05,01,0300,0320,01,0201,0217,032,0, + /* 3027 */ 0240,0364,05,011,0300,0320,01,0201,0217,032,0, + /* 3038 */ 0240,0364,05,0,0300,0320,01,0201,0217,032,0, + /* 3049 */ 0240,0364,05,010,0300,0320,01,0201,0217,032,0, + /* 3060 */ 0240,0364,05,012,0300,0320,01,0201,0217,032,0, + /* 3071 */ 0240,0364,04,013,0300,0321,01,0201,0217,042,0, + /* 3082 */ 0240,0364,04,07,0300,0321,01,0201,0217,042,0, + /* 3093 */ 0240,0364,04,03,0300,0321,01,0201,0217,042,0, + /* 3104 */ 0240,0364,04,02,0300,0321,01,0201,0217,042,0, + /* 3115 */ 0240,0364,04,06,0300,0321,01,0201,0217,042,0, + /* 3126 */ 0240,0364,04,04,0300,0321,01,0201,0217,042,0, + /* 3137 */ 0240,0364,04,017,0300,0321,01,0201,0217,042,0, + /* 3148 */ 0240,0364,04,015,0300,0321,01,0201,0217,042,0, + /* 3159 */ 0240,0364,04,014,0300,0321,01,0201,0217,042,0, + /* 3170 */ 0240,0364,04,016,0300,0321,01,0201,0217,042,0, + /* 3181 */ 0240,0364,04,05,0300,0321,01,0201,0217,042,0, + /* 3192 */ 0240,0364,04,01,0300,0321,01,0201,0217,042,0, + /* 3203 */ 0240,0364,04,011,0300,0321,01,0201,0217,042,0, + /* 3214 */ 0240,0364,04,0,0300,0321,01,0201,0217,042,0, + /* 3225 */ 0240,0364,04,010,0300,0321,01,0201,0217,042,0, + /* 3236 */ 0240,0364,04,012,0300,0321,01,0201,0217,042,0, + /* 3247 */ 0240,0364,0204,013,0300,0324,01,0201,0217,0256,0, + /* 3258 */ 0240,0364,0204,07,0300,0324,01,0201,0217,0256,0, + /* 3269 */ 0240,0364,0204,03,0300,0324,01,0201,0217,0256,0, + /* 3280 */ 0240,0364,0204,02,0300,0324,01,0201,0217,0256,0, + /* 3291 */ 0240,0364,0204,06,0300,0324,01,0201,0217,0256,0, + /* 3302 */ 0240,0364,0204,04,0300,0324,01,0201,0217,0256,0, + /* 3313 */ 0240,0364,0204,017,0300,0324,01,0201,0217,0256,0, + /* 3324 */ 0240,0364,0204,015,0300,0324,01,0201,0217,0256,0, + /* 3335 */ 0240,0364,0204,014,0300,0324,01,0201,0217,0256,0, + /* 3346 */ 0240,0364,0204,016,0300,0324,01,0201,0217,0256,0, + /* 3357 */ 0240,0364,0204,05,0300,0324,01,0201,0217,0256,0, + /* 3368 */ 0240,0364,0204,01,0300,0324,01,0201,0217,0256,0, + /* 3379 */ 0240,0364,0204,011,0300,0324,01,0201,0217,0256,0, + /* 3390 */ 0240,0364,0204,0,0300,0324,01,0201,0217,0256,0, + /* 3401 */ 0240,0364,0204,010,0300,0324,01,0201,0217,0256,0, + /* 3412 */ 0240,0364,0204,012,0300,0324,01,0201,0217,0256,0, + /* 3423 */ 0240,0364,05,013,0300,0320,01,0367,0210,032,0, + /* 3434 */ 0240,0364,05,07,0300,0320,01,0367,0210,032,0, + /* 3445 */ 0240,0364,05,03,0300,0320,01,0367,0210,032,0, + /* 3456 */ 0240,0364,05,02,0300,0320,01,0367,0210,032,0, + /* 3467 */ 0240,0364,05,06,0300,0320,01,0367,0210,032,0, + /* 3478 */ 0240,0364,05,04,0300,0320,01,0367,0210,032,0, + /* 3489 */ 0240,0364,05,017,0300,0320,01,0367,0210,032,0, + /* 3500 */ 0240,0364,05,015,0300,0320,01,0367,0210,032,0, + /* 3511 */ 0240,0364,05,014,0300,0320,01,0367,0210,032,0, + /* 3522 */ 0240,0364,05,016,0300,0320,01,0367,0210,032,0, + /* 3533 */ 0240,0364,05,05,0300,0320,01,0367,0210,032,0, + /* 3544 */ 0240,0364,05,01,0300,0320,01,0367,0210,032,0, + /* 3555 */ 0240,0364,05,011,0300,0320,01,0367,0210,032,0, + /* 3566 */ 0240,0364,05,0,0300,0320,01,0367,0210,032,0, + /* 3577 */ 0240,0364,05,010,0300,0320,01,0367,0210,032,0, + /* 3588 */ 0240,0364,05,012,0300,0320,01,0367,0210,032,0, + /* 3599 */ 0240,0364,04,013,0300,0321,01,0367,0210,042,0, + /* 3610 */ 0240,0364,04,07,0300,0321,01,0367,0210,042,0, + /* 3621 */ 0240,0364,04,03,0300,0321,01,0367,0210,042,0, + /* 3632 */ 0240,0364,04,02,0300,0321,01,0367,0210,042,0, + /* 3643 */ 0240,0364,04,06,0300,0321,01,0367,0210,042,0, + /* 3654 */ 0240,0364,04,04,0300,0321,01,0367,0210,042,0, + /* 3665 */ 0240,0364,04,017,0300,0321,01,0367,0210,042,0, + /* 3676 */ 0240,0364,04,015,0300,0321,01,0367,0210,042,0, + /* 3687 */ 0240,0364,04,014,0300,0321,01,0367,0210,042,0, + /* 3698 */ 0240,0364,04,016,0300,0321,01,0367,0210,042,0, + /* 3709 */ 0240,0364,04,05,0300,0321,01,0367,0210,042,0, + /* 3720 */ 0240,0364,04,01,0300,0321,01,0367,0210,042,0, + /* 3731 */ 0240,0364,04,011,0300,0321,01,0367,0210,042,0, + /* 3742 */ 0240,0364,04,0,0300,0321,01,0367,0210,042,0, + /* 3753 */ 0240,0364,04,010,0300,0321,01,0367,0210,042,0, + /* 3764 */ 0240,0364,04,012,0300,0321,01,0367,0210,042,0, + /* 3775 */ 0240,0364,0204,013,0300,0324,01,0367,0210,0256,0, + /* 3786 */ 0240,0364,0204,07,0300,0324,01,0367,0210,0256,0, + /* 3797 */ 0240,0364,0204,03,0300,0324,01,0367,0210,0256,0, + /* 3808 */ 0240,0364,0204,02,0300,0324,01,0367,0210,0256,0, + /* 3819 */ 0240,0364,0204,06,0300,0324,01,0367,0210,0256,0, + /* 3830 */ 0240,0364,0204,04,0300,0324,01,0367,0210,0256,0, + /* 3841 */ 0240,0364,0204,017,0300,0324,01,0367,0210,0256,0, + /* 3852 */ 0240,0364,0204,015,0300,0324,01,0367,0210,0256,0, + /* 3863 */ 0240,0364,0204,014,0300,0324,01,0367,0210,0256,0, + /* 3874 */ 0240,0364,0204,016,0300,0324,01,0367,0210,0256,0, + /* 3885 */ 0240,0364,0204,05,0300,0324,01,0367,0210,0256,0, + /* 3896 */ 0240,0364,0204,01,0300,0324,01,0367,0210,0256,0, + /* 3907 */ 0240,0364,0204,011,0300,0324,01,0367,0210,0256,0, + /* 3918 */ 0240,0364,0204,0,0300,0324,01,0367,0210,0256,0, + /* 3929 */ 0240,0364,0204,010,0300,0324,01,0367,0210,0256,0, + /* 3940 */ 0240,0364,0204,012,0300,0324,01,0367,0210,0256,0, + /* 3951 */ 0240,0364,05,013,0300,0320,01,0367,0211,032,0, + /* 3962 */ 0240,0364,05,07,0300,0320,01,0367,0211,032,0, + /* 3973 */ 0240,0364,05,03,0300,0320,01,0367,0211,032,0, + /* 3984 */ 0240,0364,05,02,0300,0320,01,0367,0211,032,0, + /* 3995 */ 0240,0364,05,06,0300,0320,01,0367,0211,032,0, + /* 4006 */ 0240,0364,05,04,0300,0320,01,0367,0211,032,0, + /* 4017 */ 0240,0364,05,017,0300,0320,01,0367,0211,032,0, + /* 4028 */ 0240,0364,05,015,0300,0320,01,0367,0211,032,0, + /* 4039 */ 0240,0364,05,014,0300,0320,01,0367,0211,032,0, + /* 4050 */ 0240,0364,05,016,0300,0320,01,0367,0211,032,0, + /* 4061 */ 0240,0364,05,05,0300,0320,01,0367,0211,032,0, + /* 4072 */ 0240,0364,05,01,0300,0320,01,0367,0211,032,0, + /* 4083 */ 0240,0364,05,011,0300,0320,01,0367,0211,032,0, + /* 4094 */ 0240,0364,05,0,0300,0320,01,0367,0211,032,0, + /* 4105 */ 0240,0364,05,010,0300,0320,01,0367,0211,032,0, + /* 4116 */ 0240,0364,05,012,0300,0320,01,0367,0211,032,0, + /* 4127 */ 0240,0364,04,013,0300,0321,01,0367,0211,042,0, + /* 4138 */ 0240,0364,04,07,0300,0321,01,0367,0211,042,0, + /* 4149 */ 0240,0364,04,03,0300,0321,01,0367,0211,042,0, + /* 4160 */ 0240,0364,04,02,0300,0321,01,0367,0211,042,0, + /* 4171 */ 0240,0364,04,06,0300,0321,01,0367,0211,042,0, + /* 4182 */ 0240,0364,04,04,0300,0321,01,0367,0211,042,0, + /* 4193 */ 0240,0364,04,017,0300,0321,01,0367,0211,042,0, + /* 4204 */ 0240,0364,04,015,0300,0321,01,0367,0211,042,0, + /* 4215 */ 0240,0364,04,014,0300,0321,01,0367,0211,042,0, + /* 4226 */ 0240,0364,04,016,0300,0321,01,0367,0211,042,0, + /* 4237 */ 0240,0364,04,05,0300,0321,01,0367,0211,042,0, + /* 4248 */ 0240,0364,04,01,0300,0321,01,0367,0211,042,0, + /* 4259 */ 0240,0364,04,011,0300,0321,01,0367,0211,042,0, + /* 4270 */ 0240,0364,04,0,0300,0321,01,0367,0211,042,0, + /* 4281 */ 0240,0364,04,010,0300,0321,01,0367,0211,042,0, + /* 4292 */ 0240,0364,04,012,0300,0321,01,0367,0211,042,0, + /* 4303 */ 0240,0364,0204,013,0300,0324,01,0367,0211,0256,0, + /* 4314 */ 0240,0364,0204,07,0300,0324,01,0367,0211,0256,0, + /* 4325 */ 0240,0364,0204,03,0300,0324,01,0367,0211,0256,0, + /* 4336 */ 0240,0364,0204,02,0300,0324,01,0367,0211,0256,0, + /* 4347 */ 0240,0364,0204,06,0300,0324,01,0367,0211,0256,0, + /* 4358 */ 0240,0364,0204,04,0300,0324,01,0367,0211,0256,0, + /* 4369 */ 0240,0364,0204,017,0300,0324,01,0367,0211,0256,0, + /* 4380 */ 0240,0364,0204,015,0300,0324,01,0367,0211,0256,0, + /* 4391 */ 0240,0364,0204,014,0300,0324,01,0367,0211,0256,0, + /* 4402 */ 0240,0364,0204,016,0300,0324,01,0367,0211,0256,0, + /* 4413 */ 0240,0364,0204,05,0300,0324,01,0367,0211,0256,0, + /* 4424 */ 0240,0364,0204,01,0300,0324,01,0367,0211,0256,0, + /* 4435 */ 0240,0364,0204,011,0300,0324,01,0367,0211,0256,0, + /* 4446 */ 0240,0364,0204,0,0300,0324,01,0367,0211,0256,0, + /* 4457 */ 0240,0364,0204,010,0300,0324,01,0367,0211,0256,0, + /* 4468 */ 0240,0364,0204,012,0300,0324,01,0367,0211,0256,0, + /* 4479 */ 0241,0363,0175,010,0301,01,0104,0120,01,0,0, + /* 4490 */ 0240,0363,0175,010,0301,01,0104,0110,01,0,0, + /* 4501 */ 0241,0363,0175,010,0301,01,0104,0120,01,01,0, + /* 4512 */ 0240,0363,0175,010,0301,01,0104,0110,01,01,0, + /* 4523 */ 0241,0363,0175,010,0301,01,0104,0120,01,020,0, + /* 4534 */ 0240,0363,0175,010,0301,01,0104,0110,01,020,0, + /* 4545 */ 0241,0363,0175,010,0301,01,0104,0120,01,021,0, + /* 4556 */ 0240,0363,0175,010,0301,01,0104,0110,01,021,0, + /* 4567 */ 0241,0363,0175,050,0301,01,0104,0120,01,0,0, + /* 4578 */ 0240,0363,0175,050,0301,01,0104,0110,01,0,0, + /* 4589 */ 0241,0363,0175,050,0301,01,0104,0120,01,01,0, + /* 4600 */ 0240,0363,0175,050,0301,01,0104,0110,01,01,0, + /* 4611 */ 0241,0363,0175,050,0301,01,0104,0120,01,020,0, + /* 4622 */ 0240,0363,0175,050,0301,01,0104,0110,01,020,0, + /* 4633 */ 0241,0363,0175,050,0301,01,0104,0120,01,021,0, + /* 4644 */ 0240,0363,0175,050,0301,01,0104,0110,01,021,0, + /* 4655 */ 0241,0363,0175,0110,0301,01,0104,0120,01,0,0, + /* 4666 */ 0240,0363,0175,0110,0301,01,0104,0110,01,0,0, + /* 4677 */ 0241,0363,0175,0110,0301,01,0104,0120,01,01,0, + /* 4688 */ 0240,0363,0175,0110,0301,01,0104,0110,01,01,0, + /* 4699 */ 0241,0363,0175,0110,0301,01,0104,0120,01,020,0, + /* 4710 */ 0240,0363,0175,0110,0301,01,0104,0110,01,020,0, + /* 4721 */ 0241,0363,0175,0110,0301,01,0104,0120,01,021,0, + /* 4732 */ 0240,0363,0175,0110,0301,01,0104,0110,01,021,0, + /* 4743 */ 0241,0361,0375,010,0301,01,0302,0120,01,0,0, + /* 4754 */ 0241,0361,0375,050,0301,01,0302,0120,01,0,0, + /* 4765 */ 0241,0361,0375,0110,0301,01,0302,0120,01,0,0, + /* 4776 */ 0241,0361,0174,010,0301,01,0302,0120,01,0,0, + /* 4787 */ 0241,0361,0174,050,0301,01,0302,0120,01,0,0, + /* 4798 */ 0241,0361,0174,0110,0301,01,0302,0120,01,0,0, + /* 4809 */ 0241,0361,0377,010,0306,01,0302,0120,01,0,0, + /* 4820 */ 0241,0361,0176,010,0306,01,0302,0120,01,0,0, + /* 4831 */ 0241,0361,0375,010,0301,01,0302,0120,01,01,0, + /* 4842 */ 0241,0361,0375,050,0301,01,0302,0120,01,01,0, + /* 4853 */ 0241,0361,0375,0110,0301,01,0302,0120,01,01,0, + /* 4864 */ 0241,0361,0174,010,0301,01,0302,0120,01,01,0, + /* 4875 */ 0241,0361,0174,050,0301,01,0302,0120,01,01,0, + /* 4886 */ 0241,0361,0174,0110,0301,01,0302,0120,01,01,0, + /* 4897 */ 0241,0361,0377,010,0306,01,0302,0120,01,01,0, + /* 4908 */ 0241,0361,0176,010,0306,01,0302,0120,01,01,0, + /* 4919 */ 0241,0361,0375,010,0301,01,0302,0120,01,02,0, + /* 4930 */ 0241,0361,0375,050,0301,01,0302,0120,01,02,0, + /* 4941 */ 0241,0361,0375,0110,0301,01,0302,0120,01,02,0, + /* 4952 */ 0241,0361,0174,010,0301,01,0302,0120,01,02,0, + /* 4963 */ 0241,0361,0174,050,0301,01,0302,0120,01,02,0, + /* 4974 */ 0241,0361,0174,0110,0301,01,0302,0120,01,02,0, + /* 4985 */ 0241,0361,0377,010,0306,01,0302,0120,01,02,0, + /* 4996 */ 0241,0361,0176,010,0306,01,0302,0120,01,02,0, + /* 5007 */ 0241,0361,0375,010,0301,01,0302,0120,01,03,0, + /* 5018 */ 0241,0361,0375,050,0301,01,0302,0120,01,03,0, + /* 5029 */ 0241,0361,0375,0110,0301,01,0302,0120,01,03,0, + /* 5040 */ 0241,0361,0174,010,0301,01,0302,0120,01,03,0, + /* 5051 */ 0241,0361,0174,050,0301,01,0302,0120,01,03,0, + /* 5062 */ 0241,0361,0174,0110,0301,01,0302,0120,01,03,0, + /* 5073 */ 0241,0361,0377,010,0306,01,0302,0120,01,03,0, + /* 5084 */ 0241,0361,0176,010,0306,01,0302,0120,01,03,0, + /* 5095 */ 0241,0361,0375,010,0301,01,0302,0120,01,04,0, + /* 5106 */ 0241,0361,0375,050,0301,01,0302,0120,01,04,0, + /* 5117 */ 0241,0361,0375,0110,0301,01,0302,0120,01,04,0, + /* 5128 */ 0241,0361,0174,010,0301,01,0302,0120,01,04,0, + /* 5139 */ 0241,0361,0174,050,0301,01,0302,0120,01,04,0, + /* 5150 */ 0241,0361,0174,0110,0301,01,0302,0120,01,04,0, + /* 5161 */ 0241,0361,0377,010,0306,01,0302,0120,01,04,0, + /* 5172 */ 0241,0361,0176,010,0306,01,0302,0120,01,04,0, + /* 5183 */ 0241,0361,0375,010,0301,01,0302,0120,01,05,0, + /* 5194 */ 0241,0361,0375,050,0301,01,0302,0120,01,05,0, + /* 5205 */ 0241,0361,0375,0110,0301,01,0302,0120,01,05,0, + /* 5216 */ 0241,0361,0174,010,0301,01,0302,0120,01,05,0, + /* 5227 */ 0241,0361,0174,050,0301,01,0302,0120,01,05,0, + /* 5238 */ 0241,0361,0174,0110,0301,01,0302,0120,01,05,0, + /* 5249 */ 0241,0361,0377,010,0306,01,0302,0120,01,05,0, + /* 5260 */ 0241,0361,0176,010,0306,01,0302,0120,01,05,0, + /* 5271 */ 0241,0361,0375,010,0301,01,0302,0120,01,06,0, + /* 5282 */ 0241,0361,0375,050,0301,01,0302,0120,01,06,0, + /* 5293 */ 0241,0361,0375,0110,0301,01,0302,0120,01,06,0, + /* 5304 */ 0241,0361,0174,010,0301,01,0302,0120,01,06,0, + /* 5315 */ 0241,0361,0174,050,0301,01,0302,0120,01,06,0, + /* 5326 */ 0241,0361,0174,0110,0301,01,0302,0120,01,06,0, + /* 5337 */ 0241,0361,0377,010,0306,01,0302,0120,01,06,0, + /* 5348 */ 0241,0361,0176,010,0306,01,0302,0120,01,06,0, + /* 5359 */ 0241,0361,0375,010,0301,01,0302,0120,01,07,0, + /* 5370 */ 0241,0361,0375,050,0301,01,0302,0120,01,07,0, + /* 5381 */ 0241,0361,0375,0110,0301,01,0302,0120,01,07,0, + /* 5392 */ 0241,0361,0174,010,0301,01,0302,0120,01,07,0, + /* 5403 */ 0241,0361,0174,050,0301,01,0302,0120,01,07,0, + /* 5414 */ 0241,0361,0174,0110,0301,01,0302,0120,01,07,0, + /* 5425 */ 0241,0361,0377,010,0306,01,0302,0120,01,07,0, + /* 5436 */ 0241,0361,0176,010,0306,01,0302,0120,01,07,0, + /* 5447 */ 0241,0361,0375,010,0301,01,0302,0120,01,010,0, + /* 5458 */ 0241,0361,0375,050,0301,01,0302,0120,01,010,0, + /* 5469 */ 0241,0361,0375,0110,0301,01,0302,0120,01,010,0, + /* 5480 */ 0241,0361,0174,010,0301,01,0302,0120,01,010,0, + /* 5491 */ 0241,0361,0174,050,0301,01,0302,0120,01,010,0, + /* 5502 */ 0241,0361,0174,0110,0301,01,0302,0120,01,010,0, + /* 5513 */ 0241,0361,0377,010,0306,01,0302,0120,01,010,0, + /* 5524 */ 0241,0361,0176,010,0306,01,0302,0120,01,010,0, + /* 5535 */ 0241,0361,0375,010,0301,01,0302,0120,01,011,0, + /* 5546 */ 0241,0361,0375,050,0301,01,0302,0120,01,011,0, + /* 5557 */ 0241,0361,0375,0110,0301,01,0302,0120,01,011,0, + /* 5568 */ 0241,0361,0174,010,0301,01,0302,0120,01,011,0, + /* 5579 */ 0241,0361,0174,050,0301,01,0302,0120,01,011,0, + /* 5590 */ 0241,0361,0174,0110,0301,01,0302,0120,01,011,0, + /* 5601 */ 0241,0361,0377,010,0306,01,0302,0120,01,011,0, + /* 5612 */ 0241,0361,0176,010,0306,01,0302,0120,01,011,0, + /* 5623 */ 0241,0361,0375,010,0301,01,0302,0120,01,012,0, + /* 5634 */ 0241,0361,0375,050,0301,01,0302,0120,01,012,0, + /* 5645 */ 0241,0361,0375,0110,0301,01,0302,0120,01,012,0, + /* 5656 */ 0241,0361,0174,010,0301,01,0302,0120,01,012,0, + /* 5667 */ 0241,0361,0174,050,0301,01,0302,0120,01,012,0, + /* 5678 */ 0241,0361,0174,0110,0301,01,0302,0120,01,012,0, + /* 5689 */ 0241,0361,0377,010,0306,01,0302,0120,01,012,0, + /* 5700 */ 0241,0361,0176,010,0306,01,0302,0120,01,012,0, + /* 5711 */ 0241,0361,0375,010,0301,01,0302,0120,01,013,0, + /* 5722 */ 0241,0361,0375,050,0301,01,0302,0120,01,013,0, + /* 5733 */ 0241,0361,0375,0110,0301,01,0302,0120,01,013,0, + /* 5744 */ 0241,0361,0174,010,0301,01,0302,0120,01,013,0, + /* 5755 */ 0241,0361,0174,050,0301,01,0302,0120,01,013,0, + /* 5766 */ 0241,0361,0174,0110,0301,01,0302,0120,01,013,0, + /* 5777 */ 0241,0361,0377,010,0306,01,0302,0120,01,013,0, + /* 5788 */ 0241,0361,0176,010,0306,01,0302,0120,01,013,0, + /* 5799 */ 0241,0361,0375,010,0301,01,0302,0120,01,014,0, + /* 5810 */ 0241,0361,0375,050,0301,01,0302,0120,01,014,0, + /* 5821 */ 0241,0361,0375,0110,0301,01,0302,0120,01,014,0, + /* 5832 */ 0241,0361,0174,010,0301,01,0302,0120,01,014,0, + /* 5843 */ 0241,0361,0174,050,0301,01,0302,0120,01,014,0, + /* 5854 */ 0241,0361,0174,0110,0301,01,0302,0120,01,014,0, + /* 5865 */ 0241,0361,0377,010,0306,01,0302,0120,01,014,0, + /* 5876 */ 0241,0361,0176,010,0306,01,0302,0120,01,014,0, + /* 5887 */ 0241,0361,0375,010,0301,01,0302,0120,01,015,0, + /* 5898 */ 0241,0361,0375,050,0301,01,0302,0120,01,015,0, + /* 5909 */ 0241,0361,0375,0110,0301,01,0302,0120,01,015,0, + /* 5920 */ 0241,0361,0174,010,0301,01,0302,0120,01,015,0, + /* 5931 */ 0241,0361,0174,050,0301,01,0302,0120,01,015,0, + /* 5942 */ 0241,0361,0174,0110,0301,01,0302,0120,01,015,0, + /* 5953 */ 0241,0361,0377,010,0306,01,0302,0120,01,015,0, + /* 5964 */ 0241,0361,0176,010,0306,01,0302,0120,01,015,0, + /* 5975 */ 0241,0361,0375,010,0301,01,0302,0120,01,016,0, + /* 5986 */ 0241,0361,0375,050,0301,01,0302,0120,01,016,0, + /* 5997 */ 0241,0361,0375,0110,0301,01,0302,0120,01,016,0, + /* 6008 */ 0241,0361,0174,010,0301,01,0302,0120,01,016,0, + /* 6019 */ 0241,0361,0174,050,0301,01,0302,0120,01,016,0, + /* 6030 */ 0241,0361,0174,0110,0301,01,0302,0120,01,016,0, + /* 6041 */ 0241,0361,0377,010,0306,01,0302,0120,01,016,0, + /* 6052 */ 0241,0361,0176,010,0306,01,0302,0120,01,016,0, + /* 6063 */ 0241,0361,0375,010,0301,01,0302,0120,01,017,0, + /* 6074 */ 0241,0361,0375,050,0301,01,0302,0120,01,017,0, + /* 6085 */ 0241,0361,0375,0110,0301,01,0302,0120,01,017,0, + /* 6096 */ 0241,0361,0174,010,0301,01,0302,0120,01,017,0, + /* 6107 */ 0241,0361,0174,050,0301,01,0302,0120,01,017,0, + /* 6118 */ 0241,0361,0174,0110,0301,01,0302,0120,01,017,0, + /* 6129 */ 0241,0361,0377,010,0306,01,0302,0120,01,017,0, + /* 6140 */ 0241,0361,0176,010,0306,01,0302,0120,01,017,0, + /* 6151 */ 0241,0361,0375,010,0301,01,0302,0120,01,020,0, + /* 6162 */ 0241,0361,0375,050,0301,01,0302,0120,01,020,0, + /* 6173 */ 0241,0361,0375,0110,0301,01,0302,0120,01,020,0, + /* 6184 */ 0241,0361,0174,010,0301,01,0302,0120,01,020,0, + /* 6195 */ 0241,0361,0174,050,0301,01,0302,0120,01,020,0, + /* 6206 */ 0241,0361,0174,0110,0301,01,0302,0120,01,020,0, + /* 6217 */ 0241,0361,0377,010,0306,01,0302,0120,01,020,0, + /* 6228 */ 0241,0361,0176,010,0306,01,0302,0120,01,020,0, + /* 6239 */ 0241,0361,0375,010,0301,01,0302,0120,01,021,0, + /* 6250 */ 0241,0361,0375,050,0301,01,0302,0120,01,021,0, + /* 6261 */ 0241,0361,0375,0110,0301,01,0302,0120,01,021,0, + /* 6272 */ 0241,0361,0174,010,0301,01,0302,0120,01,021,0, + /* 6283 */ 0241,0361,0174,050,0301,01,0302,0120,01,021,0, + /* 6294 */ 0241,0361,0174,0110,0301,01,0302,0120,01,021,0, + /* 6305 */ 0241,0361,0377,010,0306,01,0302,0120,01,021,0, + /* 6316 */ 0241,0361,0176,010,0306,01,0302,0120,01,021,0, + /* 6327 */ 0241,0361,0375,010,0301,01,0302,0120,01,022,0, + /* 6338 */ 0241,0361,0375,050,0301,01,0302,0120,01,022,0, + /* 6349 */ 0241,0361,0375,0110,0301,01,0302,0120,01,022,0, + /* 6360 */ 0241,0361,0174,010,0301,01,0302,0120,01,022,0, + /* 6371 */ 0241,0361,0174,050,0301,01,0302,0120,01,022,0, + /* 6382 */ 0241,0361,0174,0110,0301,01,0302,0120,01,022,0, + /* 6393 */ 0241,0361,0377,010,0306,01,0302,0120,01,022,0, + /* 6404 */ 0241,0361,0176,010,0306,01,0302,0120,01,022,0, + /* 6415 */ 0241,0361,0375,010,0301,01,0302,0120,01,023,0, + /* 6426 */ 0241,0361,0375,050,0301,01,0302,0120,01,023,0, + /* 6437 */ 0241,0361,0375,0110,0301,01,0302,0120,01,023,0, + /* 6448 */ 0241,0361,0174,010,0301,01,0302,0120,01,023,0, + /* 6459 */ 0241,0361,0174,050,0301,01,0302,0120,01,023,0, + /* 6470 */ 0241,0361,0174,0110,0301,01,0302,0120,01,023,0, + /* 6481 */ 0241,0361,0377,010,0306,01,0302,0120,01,023,0, + /* 6492 */ 0241,0361,0176,010,0306,01,0302,0120,01,023,0, + /* 6503 */ 0241,0361,0375,010,0301,01,0302,0120,01,024,0, + /* 6514 */ 0241,0361,0375,050,0301,01,0302,0120,01,024,0, + /* 6525 */ 0241,0361,0375,0110,0301,01,0302,0120,01,024,0, + /* 6536 */ 0241,0361,0174,010,0301,01,0302,0120,01,024,0, + /* 6547 */ 0241,0361,0174,050,0301,01,0302,0120,01,024,0, + /* 6558 */ 0241,0361,0174,0110,0301,01,0302,0120,01,024,0, + /* 6569 */ 0241,0361,0377,010,0306,01,0302,0120,01,024,0, + /* 6580 */ 0241,0361,0176,010,0306,01,0302,0120,01,024,0, + /* 6591 */ 0241,0361,0375,010,0301,01,0302,0120,01,025,0, + /* 6602 */ 0241,0361,0375,050,0301,01,0302,0120,01,025,0, + /* 6613 */ 0241,0361,0375,0110,0301,01,0302,0120,01,025,0, + /* 6624 */ 0241,0361,0174,010,0301,01,0302,0120,01,025,0, + /* 6635 */ 0241,0361,0174,050,0301,01,0302,0120,01,025,0, + /* 6646 */ 0241,0361,0174,0110,0301,01,0302,0120,01,025,0, + /* 6657 */ 0241,0361,0377,010,0306,01,0302,0120,01,025,0, + /* 6668 */ 0241,0361,0176,010,0306,01,0302,0120,01,025,0, + /* 6679 */ 0241,0361,0375,010,0301,01,0302,0120,01,026,0, + /* 6690 */ 0241,0361,0375,050,0301,01,0302,0120,01,026,0, + /* 6701 */ 0241,0361,0375,0110,0301,01,0302,0120,01,026,0, + /* 6712 */ 0241,0361,0174,010,0301,01,0302,0120,01,026,0, + /* 6723 */ 0241,0361,0174,050,0301,01,0302,0120,01,026,0, + /* 6734 */ 0241,0361,0174,0110,0301,01,0302,0120,01,026,0, + /* 6745 */ 0241,0361,0377,010,0306,01,0302,0120,01,026,0, + /* 6756 */ 0241,0361,0176,010,0306,01,0302,0120,01,026,0, + /* 6767 */ 0241,0361,0375,010,0301,01,0302,0120,01,027,0, + /* 6778 */ 0241,0361,0375,050,0301,01,0302,0120,01,027,0, + /* 6789 */ 0241,0361,0375,0110,0301,01,0302,0120,01,027,0, + /* 6800 */ 0241,0361,0174,010,0301,01,0302,0120,01,027,0, + /* 6811 */ 0241,0361,0174,050,0301,01,0302,0120,01,027,0, + /* 6822 */ 0241,0361,0174,0110,0301,01,0302,0120,01,027,0, + /* 6833 */ 0241,0361,0377,010,0306,01,0302,0120,01,027,0, + /* 6844 */ 0241,0361,0176,010,0306,01,0302,0120,01,027,0, + /* 6855 */ 0241,0361,0375,010,0301,01,0302,0120,01,030,0, + /* 6866 */ 0241,0361,0375,050,0301,01,0302,0120,01,030,0, + /* 6877 */ 0241,0361,0375,0110,0301,01,0302,0120,01,030,0, + /* 6888 */ 0241,0361,0174,010,0301,01,0302,0120,01,030,0, + /* 6899 */ 0241,0361,0174,050,0301,01,0302,0120,01,030,0, + /* 6910 */ 0241,0361,0174,0110,0301,01,0302,0120,01,030,0, + /* 6921 */ 0241,0361,0377,010,0306,01,0302,0120,01,030,0, + /* 6932 */ 0241,0361,0176,010,0306,01,0302,0120,01,030,0, + /* 6943 */ 0241,0361,0375,010,0301,01,0302,0120,01,031,0, + /* 6954 */ 0241,0361,0375,050,0301,01,0302,0120,01,031,0, + /* 6965 */ 0241,0361,0375,0110,0301,01,0302,0120,01,031,0, + /* 6976 */ 0241,0361,0174,010,0301,01,0302,0120,01,031,0, + /* 6987 */ 0241,0361,0174,050,0301,01,0302,0120,01,031,0, + /* 6998 */ 0241,0361,0174,0110,0301,01,0302,0120,01,031,0, + /* 7009 */ 0241,0361,0377,010,0306,01,0302,0120,01,031,0, + /* 7020 */ 0241,0361,0176,010,0306,01,0302,0120,01,031,0, + /* 7031 */ 0241,0361,0375,010,0301,01,0302,0120,01,032,0, + /* 7042 */ 0241,0361,0375,050,0301,01,0302,0120,01,032,0, + /* 7053 */ 0241,0361,0375,0110,0301,01,0302,0120,01,032,0, + /* 7064 */ 0241,0361,0174,010,0301,01,0302,0120,01,032,0, + /* 7075 */ 0241,0361,0174,050,0301,01,0302,0120,01,032,0, + /* 7086 */ 0241,0361,0174,0110,0301,01,0302,0120,01,032,0, + /* 7097 */ 0241,0361,0377,010,0306,01,0302,0120,01,032,0, + /* 7108 */ 0241,0361,0176,010,0306,01,0302,0120,01,032,0, + /* 7119 */ 0241,0361,0375,010,0301,01,0302,0120,01,033,0, + /* 7130 */ 0241,0361,0375,050,0301,01,0302,0120,01,033,0, + /* 7141 */ 0241,0361,0375,0110,0301,01,0302,0120,01,033,0, + /* 7152 */ 0241,0361,0174,010,0301,01,0302,0120,01,033,0, + /* 7163 */ 0241,0361,0174,050,0301,01,0302,0120,01,033,0, + /* 7174 */ 0241,0361,0174,0110,0301,01,0302,0120,01,033,0, + /* 7185 */ 0241,0361,0377,010,0306,01,0302,0120,01,033,0, + /* 7196 */ 0241,0361,0176,010,0306,01,0302,0120,01,033,0, + /* 7207 */ 0241,0361,0375,010,0301,01,0302,0120,01,034,0, + /* 7218 */ 0241,0361,0375,050,0301,01,0302,0120,01,034,0, + /* 7229 */ 0241,0361,0375,0110,0301,01,0302,0120,01,034,0, + /* 7240 */ 0241,0361,0174,010,0301,01,0302,0120,01,034,0, + /* 7251 */ 0241,0361,0174,050,0301,01,0302,0120,01,034,0, + /* 7262 */ 0241,0361,0174,0110,0301,01,0302,0120,01,034,0, + /* 7273 */ 0241,0361,0377,010,0306,01,0302,0120,01,034,0, + /* 7284 */ 0241,0361,0176,010,0306,01,0302,0120,01,034,0, + /* 7295 */ 0241,0361,0375,010,0301,01,0302,0120,01,035,0, + /* 7306 */ 0241,0361,0375,050,0301,01,0302,0120,01,035,0, + /* 7317 */ 0241,0361,0375,0110,0301,01,0302,0120,01,035,0, + /* 7328 */ 0241,0361,0174,010,0301,01,0302,0120,01,035,0, + /* 7339 */ 0241,0361,0174,050,0301,01,0302,0120,01,035,0, + /* 7350 */ 0241,0361,0174,0110,0301,01,0302,0120,01,035,0, + /* 7361 */ 0241,0361,0377,010,0306,01,0302,0120,01,035,0, + /* 7372 */ 0241,0361,0176,010,0306,01,0302,0120,01,035,0, + /* 7383 */ 0241,0361,0375,010,0301,01,0302,0120,01,036,0, + /* 7394 */ 0241,0361,0375,050,0301,01,0302,0120,01,036,0, + /* 7405 */ 0241,0361,0375,0110,0301,01,0302,0120,01,036,0, + /* 7416 */ 0241,0361,0174,010,0301,01,0302,0120,01,036,0, + /* 7427 */ 0241,0361,0174,050,0301,01,0302,0120,01,036,0, + /* 7438 */ 0241,0361,0174,0110,0301,01,0302,0120,01,036,0, + /* 7449 */ 0241,0361,0377,010,0306,01,0302,0120,01,036,0, + /* 7460 */ 0241,0361,0176,010,0306,01,0302,0120,01,036,0, + /* 7471 */ 0241,0361,0375,010,0301,01,0302,0120,01,037,0, + /* 7482 */ 0241,0361,0375,050,0301,01,0302,0120,01,037,0, + /* 7493 */ 0241,0361,0375,0110,0301,01,0302,0120,01,037,0, + /* 7504 */ 0241,0361,0174,010,0301,01,0302,0120,01,037,0, + /* 7515 */ 0241,0361,0174,050,0301,01,0302,0120,01,037,0, + /* 7526 */ 0241,0361,0174,0110,0301,01,0302,0120,01,037,0, + /* 7537 */ 0241,0361,0377,010,0306,01,0302,0120,01,037,0, + /* 7548 */ 0241,0361,0176,010,0306,01,0302,0120,01,037,0, + /* 7559 */ 0241,0363,0175,010,0303,01,077,0120,01,0,0, + /* 7570 */ 0241,0363,0175,050,0303,01,077,0120,01,0,0, + /* 7581 */ 0241,0363,0175,0110,0303,01,077,0120,01,0,0, + /* 7592 */ 0241,0363,0175,010,0301,01,037,0120,01,0,0, + /* 7603 */ 0241,0363,0175,050,0301,01,037,0120,01,0,0, + /* 7614 */ 0241,0363,0175,0110,0301,01,037,0120,01,0,0, + /* 7625 */ 0241,0363,0375,010,0301,01,037,0120,01,0,0, + /* 7636 */ 0241,0363,0375,050,0301,01,037,0120,01,0,0, + /* 7647 */ 0241,0363,0375,0110,0301,01,037,0120,01,0,0, + /* 7658 */ 0241,0363,0175,010,0303,01,076,0120,01,0,0, + /* 7669 */ 0241,0363,0175,050,0303,01,076,0120,01,0,0, + /* 7680 */ 0241,0363,0175,0110,0303,01,076,0120,01,0,0, + /* 7691 */ 0241,0363,0175,010,0301,01,036,0120,01,0,0, + /* 7702 */ 0241,0363,0175,050,0301,01,036,0120,01,0,0, + /* 7713 */ 0241,0363,0175,0110,0301,01,036,0120,01,0,0, + /* 7724 */ 0241,0363,0375,010,0301,01,036,0120,01,0,0, + /* 7735 */ 0241,0363,0375,050,0301,01,036,0120,01,0,0, + /* 7746 */ 0241,0363,0375,0110,0301,01,036,0120,01,0,0, + /* 7757 */ 0241,0363,0375,010,0303,01,076,0120,01,0,0, + /* 7768 */ 0241,0363,0375,050,0303,01,076,0120,01,0,0, + /* 7779 */ 0241,0363,0375,0110,0303,01,076,0120,01,0,0, + /* 7790 */ 0241,0363,0375,010,0303,01,077,0120,01,0,0, + /* 7801 */ 0241,0363,0375,050,0303,01,077,0120,01,0,0, + /* 7812 */ 0241,0363,0375,0110,0303,01,077,0120,01,0,0, + /* 7823 */ 0241,0363,0175,010,0303,01,077,0120,01,05,0, + /* 7834 */ 0241,0363,0175,050,0303,01,077,0120,01,05,0, + /* 7845 */ 0241,0363,0175,0110,0303,01,077,0120,01,05,0, + /* 7856 */ 0241,0363,0175,010,0301,01,037,0120,01,05,0, + /* 7867 */ 0241,0363,0175,050,0301,01,037,0120,01,05,0, + /* 7878 */ 0241,0363,0175,0110,0301,01,037,0120,01,05,0, + /* 7889 */ 0241,0363,0375,010,0301,01,037,0120,01,05,0, + /* 7900 */ 0241,0363,0375,050,0301,01,037,0120,01,05,0, + /* 7911 */ 0241,0363,0375,0110,0301,01,037,0120,01,05,0, + /* 7922 */ 0241,0363,0175,010,0303,01,076,0120,01,05,0, + /* 7933 */ 0241,0363,0175,050,0303,01,076,0120,01,05,0, + /* 7944 */ 0241,0363,0175,0110,0303,01,076,0120,01,05,0, + /* 7955 */ 0241,0363,0175,010,0301,01,036,0120,01,05,0, + /* 7966 */ 0241,0363,0175,050,0301,01,036,0120,01,05,0, + /* 7977 */ 0241,0363,0175,0110,0301,01,036,0120,01,05,0, + /* 7988 */ 0241,0363,0375,010,0301,01,036,0120,01,05,0, + /* 7999 */ 0241,0363,0375,050,0301,01,036,0120,01,05,0, + /* 8010 */ 0241,0363,0375,0110,0301,01,036,0120,01,05,0, + /* 8021 */ 0241,0363,0375,010,0303,01,076,0120,01,05,0, + /* 8032 */ 0241,0363,0375,050,0303,01,076,0120,01,05,0, + /* 8043 */ 0241,0363,0375,0110,0303,01,076,0120,01,05,0, + /* 8054 */ 0241,0363,0375,010,0303,01,077,0120,01,05,0, + /* 8065 */ 0241,0363,0375,050,0303,01,077,0120,01,05,0, + /* 8076 */ 0241,0363,0375,0110,0303,01,077,0120,01,05,0, + /* 8087 */ 0241,0363,0175,010,0303,01,077,0120,01,06,0, + /* 8098 */ 0241,0363,0175,050,0303,01,077,0120,01,06,0, + /* 8109 */ 0241,0363,0175,0110,0303,01,077,0120,01,06,0, + /* 8120 */ 0241,0363,0175,010,0301,01,037,0120,01,06,0, + /* 8131 */ 0241,0363,0175,050,0301,01,037,0120,01,06,0, + /* 8142 */ 0241,0363,0175,0110,0301,01,037,0120,01,06,0, + /* 8153 */ 0241,0363,0375,010,0301,01,037,0120,01,06,0, + /* 8164 */ 0241,0363,0375,050,0301,01,037,0120,01,06,0, + /* 8175 */ 0241,0363,0375,0110,0301,01,037,0120,01,06,0, + /* 8186 */ 0241,0363,0175,010,0303,01,076,0120,01,06,0, + /* 8197 */ 0241,0363,0175,050,0303,01,076,0120,01,06,0, + /* 8208 */ 0241,0363,0175,0110,0303,01,076,0120,01,06,0, + /* 8219 */ 0241,0363,0175,010,0301,01,036,0120,01,06,0, + /* 8230 */ 0241,0363,0175,050,0301,01,036,0120,01,06,0, + /* 8241 */ 0241,0363,0175,0110,0301,01,036,0120,01,06,0, + /* 8252 */ 0241,0363,0375,010,0301,01,036,0120,01,06,0, + /* 8263 */ 0241,0363,0375,050,0301,01,036,0120,01,06,0, + /* 8274 */ 0241,0363,0375,0110,0301,01,036,0120,01,06,0, + /* 8285 */ 0241,0363,0375,010,0303,01,076,0120,01,06,0, + /* 8296 */ 0241,0363,0375,050,0303,01,076,0120,01,06,0, + /* 8307 */ 0241,0363,0375,0110,0303,01,076,0120,01,06,0, + /* 8318 */ 0241,0363,0375,010,0303,01,077,0120,01,06,0, + /* 8329 */ 0241,0363,0375,050,0303,01,077,0120,01,06,0, + /* 8340 */ 0241,0363,0375,0110,0303,01,077,0120,01,06,0, + /* 8351 */ 0241,0363,0175,010,0303,01,077,0120,01,02,0, + /* 8362 */ 0241,0363,0175,050,0303,01,077,0120,01,02,0, + /* 8373 */ 0241,0363,0175,0110,0303,01,077,0120,01,02,0, + /* 8384 */ 0241,0363,0175,010,0301,01,037,0120,01,02,0, + /* 8395 */ 0241,0363,0175,050,0301,01,037,0120,01,02,0, + /* 8406 */ 0241,0363,0175,0110,0301,01,037,0120,01,02,0, + /* 8417 */ 0241,0363,0375,010,0301,01,037,0120,01,02,0, + /* 8428 */ 0241,0363,0375,050,0301,01,037,0120,01,02,0, + /* 8439 */ 0241,0363,0375,0110,0301,01,037,0120,01,02,0, + /* 8450 */ 0241,0363,0175,010,0303,01,076,0120,01,02,0, + /* 8461 */ 0241,0363,0175,050,0303,01,076,0120,01,02,0, + /* 8472 */ 0241,0363,0175,0110,0303,01,076,0120,01,02,0, + /* 8483 */ 0241,0363,0175,010,0301,01,036,0120,01,02,0, + /* 8494 */ 0241,0363,0175,050,0301,01,036,0120,01,02,0, + /* 8505 */ 0241,0363,0175,0110,0301,01,036,0120,01,02,0, + /* 8516 */ 0241,0363,0375,010,0301,01,036,0120,01,02,0, + /* 8527 */ 0241,0363,0375,050,0301,01,036,0120,01,02,0, + /* 8538 */ 0241,0363,0375,0110,0301,01,036,0120,01,02,0, + /* 8549 */ 0241,0363,0375,010,0303,01,076,0120,01,02,0, + /* 8560 */ 0241,0363,0375,050,0303,01,076,0120,01,02,0, + /* 8571 */ 0241,0363,0375,0110,0303,01,076,0120,01,02,0, + /* 8582 */ 0241,0363,0375,010,0303,01,077,0120,01,02,0, + /* 8593 */ 0241,0363,0375,050,0303,01,077,0120,01,02,0, + /* 8604 */ 0241,0363,0375,0110,0303,01,077,0120,01,02,0, + /* 8615 */ 0241,0363,0175,010,0303,01,077,0120,01,01,0, + /* 8626 */ 0241,0363,0175,050,0303,01,077,0120,01,01,0, + /* 8637 */ 0241,0363,0175,0110,0303,01,077,0120,01,01,0, + /* 8648 */ 0241,0363,0175,010,0301,01,037,0120,01,01,0, + /* 8659 */ 0241,0363,0175,050,0301,01,037,0120,01,01,0, + /* 8670 */ 0241,0363,0175,0110,0301,01,037,0120,01,01,0, + /* 8681 */ 0241,0363,0375,010,0301,01,037,0120,01,01,0, + /* 8692 */ 0241,0363,0375,050,0301,01,037,0120,01,01,0, + /* 8703 */ 0241,0363,0375,0110,0301,01,037,0120,01,01,0, + /* 8714 */ 0241,0363,0175,010,0303,01,076,0120,01,01,0, + /* 8725 */ 0241,0363,0175,050,0303,01,076,0120,01,01,0, + /* 8736 */ 0241,0363,0175,0110,0303,01,076,0120,01,01,0, + /* 8747 */ 0241,0363,0175,010,0301,01,036,0120,01,01,0, + /* 8758 */ 0241,0363,0175,050,0301,01,036,0120,01,01,0, + /* 8769 */ 0241,0363,0175,0110,0301,01,036,0120,01,01,0, + /* 8780 */ 0241,0363,0375,010,0301,01,036,0120,01,01,0, + /* 8791 */ 0241,0363,0375,050,0301,01,036,0120,01,01,0, + /* 8802 */ 0241,0363,0375,0110,0301,01,036,0120,01,01,0, + /* 8813 */ 0241,0363,0375,010,0303,01,076,0120,01,01,0, + /* 8824 */ 0241,0363,0375,050,0303,01,076,0120,01,01,0, + /* 8835 */ 0241,0363,0375,0110,0303,01,076,0120,01,01,0, + /* 8846 */ 0241,0363,0375,010,0303,01,077,0120,01,01,0, + /* 8857 */ 0241,0363,0375,050,0303,01,077,0120,01,01,0, + /* 8868 */ 0241,0363,0375,0110,0303,01,077,0120,01,01,0, + /* 8879 */ 0241,0363,0175,010,0303,01,077,0120,01,04,0, + /* 8890 */ 0241,0363,0175,050,0303,01,077,0120,01,04,0, + /* 8901 */ 0241,0363,0175,0110,0303,01,077,0120,01,04,0, + /* 8912 */ 0241,0363,0175,010,0301,01,037,0120,01,04,0, + /* 8923 */ 0241,0363,0175,050,0301,01,037,0120,01,04,0, + /* 8934 */ 0241,0363,0175,0110,0301,01,037,0120,01,04,0, + /* 8945 */ 0241,0363,0375,010,0301,01,037,0120,01,04,0, + /* 8956 */ 0241,0363,0375,050,0301,01,037,0120,01,04,0, + /* 8967 */ 0241,0363,0375,0110,0301,01,037,0120,01,04,0, + /* 8978 */ 0241,0363,0175,010,0303,01,076,0120,01,04,0, + /* 8989 */ 0241,0363,0175,050,0303,01,076,0120,01,04,0, + /* 9000 */ 0241,0363,0175,0110,0303,01,076,0120,01,04,0, + /* 9011 */ 0241,0363,0175,010,0301,01,036,0120,01,04,0, + /* 9022 */ 0241,0363,0175,050,0301,01,036,0120,01,04,0, + /* 9033 */ 0241,0363,0175,0110,0301,01,036,0120,01,04,0, + /* 9044 */ 0241,0363,0375,010,0301,01,036,0120,01,04,0, + /* 9055 */ 0241,0363,0375,050,0301,01,036,0120,01,04,0, + /* 9066 */ 0241,0363,0375,0110,0301,01,036,0120,01,04,0, + /* 9077 */ 0241,0363,0375,010,0303,01,076,0120,01,04,0, + /* 9088 */ 0241,0363,0375,050,0303,01,076,0120,01,04,0, + /* 9099 */ 0241,0363,0375,0110,0303,01,076,0120,01,04,0, + /* 9110 */ 0241,0363,0375,010,0303,01,077,0120,01,04,0, + /* 9121 */ 0241,0363,0375,050,0303,01,077,0120,01,04,0, + /* 9132 */ 0241,0363,0375,0110,0303,01,077,0120,01,04,0, + /* 9143 */ 0250,0364,0175,010,0300,0320,01,0213,0110,0, + /* 9153 */ 0250,0364,0174,010,0300,0321,01,0213,0110,0, + /* 9163 */ 0250,0364,0374,010,0300,0324,01,0213,0110,0, + /* 9173 */ 0240,0364,0175,030,0300,0320,01,03,0121,0, + /* 9183 */ 0250,0364,0175,010,0300,0320,01,03,0110,0, + /* 9193 */ 0240,0364,0175,030,0300,0320,01,03,0110,0, + /* 9203 */ 0240,0364,0174,030,0300,0321,01,03,0121,0, + /* 9213 */ 0250,0364,0174,010,0300,0321,01,03,0110,0, + /* 9223 */ 0240,0364,0174,030,0300,0321,01,03,0110,0, + /* 9233 */ 0240,0364,0374,030,0300,0324,01,03,0121,0, + /* 9243 */ 0250,0364,0374,010,0300,0324,01,03,0110,0, + /* 9253 */ 0240,0364,0374,030,0300,0324,01,03,0110,0, + /* 9263 */ 0240,0364,0175,030,0300,0320,01,01,0112,0, + /* 9273 */ 0250,0364,0175,010,0300,0320,01,01,0101,0, + /* 9283 */ 0240,0364,0175,030,0300,0320,01,01,0101,0, + /* 9293 */ 0240,0364,0174,030,0300,0321,01,01,0112,0, + /* 9303 */ 0250,0364,0174,010,0300,0321,01,01,0101,0, + /* 9313 */ 0240,0364,0174,030,0300,0321,01,01,0101,0, + /* 9323 */ 0240,0364,0374,030,0300,0324,01,01,0112,0, + /* 9333 */ 0250,0364,0374,010,0300,0324,01,01,0101,0, + /* 9343 */ 0240,0364,0374,030,0300,0324,01,01,0101,0, + /* 9353 */ 0240,0364,0174,030,0300,01,0200,0210,022,0, + /* 9363 */ 0250,0364,0174,010,0300,01,0200,0200,021,0, + /* 9373 */ 0240,0364,0174,030,0300,01,0200,0200,021,0, + /* 9383 */ 0240,0364,0175,030,0300,0320,01,013,0121,0, + /* 9393 */ 0250,0364,0175,010,0300,0320,01,013,0110,0, + /* 9403 */ 0240,0364,0175,030,0300,0320,01,013,0110,0, + /* 9413 */ 0240,0364,0174,030,0300,0321,01,013,0121,0, + /* 9423 */ 0250,0364,0174,010,0300,0321,01,013,0110,0, + /* 9433 */ 0240,0364,0174,030,0300,0321,01,013,0110,0, + /* 9443 */ 0240,0364,0374,030,0300,0324,01,013,0121,0, + /* 9453 */ 0250,0364,0374,010,0300,0324,01,013,0110,0, + /* 9463 */ 0240,0364,0374,030,0300,0324,01,013,0110,0, + /* 9473 */ 0240,0364,0175,030,0300,0320,01,011,0112,0, + /* 9483 */ 0250,0364,0175,010,0300,0320,01,011,0101,0, + /* 9493 */ 0240,0364,0175,030,0300,0320,01,011,0101,0, + /* 9503 */ 0240,0364,0174,030,0300,0321,01,011,0112,0, + /* 9513 */ 0250,0364,0174,010,0300,0321,01,011,0101,0, + /* 9523 */ 0240,0364,0174,030,0300,0321,01,011,0101,0, + /* 9533 */ 0240,0364,0374,030,0300,0324,01,011,0112,0, + /* 9543 */ 0250,0364,0374,010,0300,0324,01,011,0101,0, + /* 9553 */ 0240,0364,0374,030,0300,0324,01,011,0101,0, + /* 9563 */ 0240,0364,0174,030,0300,01,0200,0211,022,0, + /* 9573 */ 0250,0364,0174,010,0300,01,0200,0201,021,0, + /* 9583 */ 0240,0364,0174,030,0300,01,0200,0201,021,0, + /* 9593 */ 0240,0364,0175,030,0300,0320,01,023,0121,0, + /* 9603 */ 0250,0364,0175,010,0300,0320,01,023,0110,0, + /* 9613 */ 0240,0364,0175,030,0300,0320,01,023,0110,0, + /* 9623 */ 0240,0364,0174,030,0300,0321,01,023,0121,0, + /* 9633 */ 0250,0364,0174,010,0300,0321,01,023,0110,0, + /* 9643 */ 0240,0364,0174,030,0300,0321,01,023,0110,0, + /* 9653 */ 0240,0364,0374,030,0300,0324,01,023,0121,0, + /* 9663 */ 0250,0364,0374,010,0300,0324,01,023,0110,0, + /* 9673 */ 0240,0364,0374,030,0300,0324,01,023,0110,0, + /* 9683 */ 0240,0364,0175,030,0300,0320,01,021,0112,0, + /* 9693 */ 0250,0364,0175,010,0300,0320,01,021,0101,0, + /* 9703 */ 0240,0364,0175,030,0300,0320,01,021,0101,0, + /* 9713 */ 0240,0364,0174,030,0300,0321,01,021,0112,0, + /* 9723 */ 0250,0364,0174,010,0300,0321,01,021,0101,0, + /* 9733 */ 0240,0364,0174,030,0300,0321,01,021,0101,0, + /* 9743 */ 0240,0364,0374,030,0300,0324,01,021,0112,0, + /* 9753 */ 0250,0364,0374,010,0300,0324,01,021,0101,0, + /* 9763 */ 0240,0364,0374,030,0300,0324,01,021,0101,0, + /* 9773 */ 0240,0364,0174,030,0300,01,0200,0212,022,0, + /* 9783 */ 0250,0364,0174,010,0300,01,0200,0202,021,0, + /* 9793 */ 0240,0364,0174,030,0300,01,0200,0202,021,0, + /* 9803 */ 0240,0364,0175,030,0300,0320,01,033,0121,0, + /* 9813 */ 0250,0364,0175,010,0300,0320,01,033,0110,0, + /* 9823 */ 0240,0364,0175,030,0300,0320,01,033,0110,0, + /* 9833 */ 0240,0364,0174,030,0300,0321,01,033,0121,0, + /* 9843 */ 0250,0364,0174,010,0300,0321,01,033,0110,0, + /* 9853 */ 0240,0364,0174,030,0300,0321,01,033,0110,0, + /* 9863 */ 0240,0364,0374,030,0300,0324,01,033,0121,0, + /* 9873 */ 0250,0364,0374,010,0300,0324,01,033,0110,0, + /* 9883 */ 0240,0364,0374,030,0300,0324,01,033,0110,0, + /* 9893 */ 0240,0364,0175,030,0300,0320,01,031,0112,0, + /* 9903 */ 0250,0364,0175,010,0300,0320,01,031,0101,0, + /* 9913 */ 0240,0364,0175,030,0300,0320,01,031,0101,0, + /* 9923 */ 0240,0364,0174,030,0300,0321,01,031,0112,0, + /* 9933 */ 0250,0364,0174,010,0300,0321,01,031,0101,0, + /* 9943 */ 0240,0364,0174,030,0300,0321,01,031,0101,0, + /* 9953 */ 0240,0364,0374,030,0300,0324,01,031,0112,0, + /* 9963 */ 0250,0364,0374,010,0300,0324,01,031,0101,0, + /* 9973 */ 0240,0364,0374,030,0300,0324,01,031,0101,0, + /* 9983 */ 0240,0364,0174,030,0300,01,0200,0213,022,0, + /* 9993 */ 0250,0364,0174,010,0300,01,0200,0203,021,0, + /* 10003 */ 0240,0364,0174,030,0300,01,0200,0203,021,0, + /* 10013 */ 0240,0364,0175,030,0300,0320,01,043,0121,0, + /* 10023 */ 0250,0364,0175,010,0300,0320,01,043,0110,0, + /* 10033 */ 0240,0364,0175,030,0300,0320,01,043,0110,0, + /* 10043 */ 0240,0364,0174,030,0300,0321,01,043,0121,0, + /* 10053 */ 0250,0364,0174,010,0300,0321,01,043,0110,0, + /* 10063 */ 0240,0364,0174,030,0300,0321,01,043,0110,0, + /* 10073 */ 0240,0364,0374,030,0300,0324,01,043,0121,0, + /* 10083 */ 0250,0364,0374,010,0300,0324,01,043,0110,0, + /* 10093 */ 0240,0364,0374,030,0300,0324,01,043,0110,0, + /* 10103 */ 0240,0364,0175,030,0300,0320,01,041,0112,0, + /* 10113 */ 0250,0364,0175,010,0300,0320,01,041,0101,0, + /* 10123 */ 0240,0364,0175,030,0300,0320,01,041,0101,0, + /* 10133 */ 0240,0364,0174,030,0300,0321,01,041,0112,0, + /* 10143 */ 0250,0364,0174,010,0300,0321,01,041,0101,0, + /* 10153 */ 0240,0364,0174,030,0300,0321,01,041,0101,0, + /* 10163 */ 0240,0364,0374,030,0300,0324,01,041,0112,0, + /* 10173 */ 0250,0364,0374,010,0300,0324,01,041,0101,0, + /* 10183 */ 0240,0364,0374,030,0300,0324,01,041,0101,0, + /* 10193 */ 0240,0364,0174,030,0300,01,0200,0214,022,0, + /* 10203 */ 0250,0364,0174,010,0300,01,0200,0204,021,0, + /* 10213 */ 0240,0364,0174,030,0300,01,0200,0204,021,0, + /* 10223 */ 0240,0364,0175,030,0300,0320,01,053,0121,0, + /* 10233 */ 0250,0364,0175,010,0300,0320,01,053,0110,0, + /* 10243 */ 0240,0364,0175,030,0300,0320,01,053,0110,0, + /* 10253 */ 0240,0364,0174,030,0300,0321,01,053,0121,0, + /* 10263 */ 0250,0364,0174,010,0300,0321,01,053,0110,0, + /* 10273 */ 0240,0364,0174,030,0300,0321,01,053,0110,0, + /* 10283 */ 0240,0364,0374,030,0300,0324,01,053,0121,0, + /* 10293 */ 0250,0364,0374,010,0300,0324,01,053,0110,0, + /* 10303 */ 0240,0364,0374,030,0300,0324,01,053,0110,0, + /* 10313 */ 0240,0364,0175,030,0300,0320,01,051,0112,0, + /* 10323 */ 0250,0364,0175,010,0300,0320,01,051,0101,0, + /* 10333 */ 0240,0364,0175,030,0300,0320,01,051,0101,0, + /* 10343 */ 0240,0364,0174,030,0300,0321,01,051,0112,0, + /* 10353 */ 0250,0364,0174,010,0300,0321,01,051,0101,0, + /* 10363 */ 0240,0364,0174,030,0300,0321,01,051,0101,0, + /* 10373 */ 0240,0364,0374,030,0300,0324,01,051,0112,0, + /* 10383 */ 0250,0364,0374,010,0300,0324,01,051,0101,0, + /* 10393 */ 0240,0364,0374,030,0300,0324,01,051,0101,0, + /* 10403 */ 0240,0364,0174,030,0300,01,0200,0215,022,0, + /* 10413 */ 0250,0364,0174,010,0300,01,0200,0205,021,0, + /* 10423 */ 0240,0364,0174,030,0300,01,0200,0205,021,0, + /* 10433 */ 0240,0364,0175,030,0300,0320,01,063,0121,0, + /* 10443 */ 0250,0364,0175,010,0300,0320,01,063,0110,0, + /* 10453 */ 0240,0364,0175,030,0300,0320,01,063,0110,0, + /* 10463 */ 0240,0364,0174,030,0300,0321,01,063,0121,0, + /* 10473 */ 0250,0364,0174,010,0300,0321,01,063,0110,0, + /* 10483 */ 0240,0364,0174,030,0300,0321,01,063,0110,0, + /* 10493 */ 0240,0364,0374,030,0300,0324,01,063,0121,0, + /* 10503 */ 0250,0364,0374,010,0300,0324,01,063,0110,0, + /* 10513 */ 0240,0364,0374,030,0300,0324,01,063,0110,0, + /* 10523 */ 0240,0364,0175,030,0300,0320,01,061,0112,0, + /* 10533 */ 0250,0364,0175,010,0300,0320,01,061,0101,0, + /* 10543 */ 0240,0364,0175,030,0300,0320,01,061,0101,0, + /* 10553 */ 0240,0364,0174,030,0300,0321,01,061,0112,0, + /* 10563 */ 0250,0364,0174,010,0300,0321,01,061,0101,0, + /* 10573 */ 0240,0364,0174,030,0300,0321,01,061,0101,0, + /* 10583 */ 0240,0364,0374,030,0300,0324,01,061,0112,0, + /* 10593 */ 0250,0364,0374,010,0300,0324,01,061,0101,0, + /* 10603 */ 0240,0364,0374,030,0300,0324,01,061,0101,0, + /* 10613 */ 0240,0364,0174,030,0300,01,0200,0216,022,0, + /* 10623 */ 0250,0364,0174,010,0300,01,0200,0206,021,0, + /* 10633 */ 0240,0364,0174,030,0300,01,0200,0206,021,0, + /* 10643 */ 0270,03,03,01,0360,0110,0306,0,037,0, + /* 10653 */ 0270,03,0203,01,0360,0110,0306,0,077,0, + /* 10663 */ 0240,0364,0175,030,0300,0320,01,0321,0210,0, + /* 10673 */ 0250,0364,0175,010,0300,0320,01,0321,0200,0, + /* 10683 */ 0240,0364,0175,030,0300,0320,01,0321,0200,0, + /* 10693 */ 0240,0364,0174,030,0300,0321,01,0321,0210,0, + /* 10703 */ 0250,0364,0174,010,0300,0321,01,0321,0200,0, + /* 10713 */ 0240,0364,0174,030,0300,0321,01,0321,0200,0, + /* 10723 */ 0240,0364,0374,030,0300,0324,01,0321,0210,0, + /* 10733 */ 0250,0364,0374,010,0300,0324,01,0321,0200,0, + /* 10743 */ 0240,0364,0374,030,0300,0324,01,0321,0200,0, + /* 10753 */ 0240,0364,0175,030,0300,0320,01,0323,0210,0, + /* 10763 */ 0250,0364,0175,010,0300,0320,01,0323,0200,0, + /* 10773 */ 0240,0364,0175,030,0300,0320,01,0323,0200,0, + /* 10783 */ 0240,0364,0174,030,0300,0321,01,0323,0210,0, + /* 10793 */ 0250,0364,0174,010,0300,0321,01,0323,0200,0, + /* 10803 */ 0240,0364,0174,030,0300,0321,01,0323,0200,0, + /* 10813 */ 0240,0364,0374,030,0300,0324,01,0323,0210,0, + /* 10823 */ 0250,0364,0374,010,0300,0324,01,0323,0200,0, + /* 10833 */ 0240,0364,0374,030,0300,0324,01,0323,0200,0, + /* 10843 */ 0240,0364,0174,030,0300,01,0300,0210,026,0, + /* 10853 */ 0250,0364,0174,010,0300,01,0300,0200,025,0, + /* 10863 */ 0240,0364,0174,030,0300,01,0300,0200,025,0, + /* 10873 */ 0240,0364,0175,030,0300,0320,01,0321,0211,0, + /* 10883 */ 0250,0364,0175,010,0300,0320,01,0321,0201,0, + /* 10893 */ 0240,0364,0175,030,0300,0320,01,0321,0201,0, + /* 10903 */ 0240,0364,0174,030,0300,0321,01,0321,0211,0, + /* 10913 */ 0250,0364,0174,010,0300,0321,01,0321,0201,0, + /* 10923 */ 0240,0364,0174,030,0300,0321,01,0321,0201,0, + /* 10933 */ 0240,0364,0374,030,0300,0324,01,0321,0211,0, + /* 10943 */ 0250,0364,0374,010,0300,0324,01,0321,0201,0, + /* 10953 */ 0240,0364,0374,030,0300,0324,01,0321,0201,0, + /* 10963 */ 0240,0364,0175,030,0300,0320,01,0323,0211,0, + /* 10973 */ 0250,0364,0175,010,0300,0320,01,0323,0201,0, + /* 10983 */ 0240,0364,0175,030,0300,0320,01,0323,0201,0, + /* 10993 */ 0240,0364,0174,030,0300,0321,01,0323,0211,0, + /* 11003 */ 0250,0364,0174,010,0300,0321,01,0323,0201,0, + /* 11013 */ 0240,0364,0174,030,0300,0321,01,0323,0201,0, + /* 11023 */ 0240,0364,0374,030,0300,0324,01,0323,0211,0, + /* 11033 */ 0250,0364,0374,010,0300,0324,01,0323,0201,0, + /* 11043 */ 0240,0364,0374,030,0300,0324,01,0323,0201,0, + /* 11053 */ 0240,0364,0174,030,0300,01,0300,0211,026,0, + /* 11063 */ 0250,0364,0174,010,0300,01,0300,0201,025,0, + /* 11073 */ 0240,0364,0174,030,0300,01,0300,0201,025,0, + /* 11083 */ 0240,0364,0175,030,0300,0320,01,0321,0212,0, + /* 11093 */ 0250,0364,0175,010,0300,0320,01,0321,0202,0, + /* 11103 */ 0240,0364,0175,030,0300,0320,01,0321,0202,0, + /* 11113 */ 0240,0364,0174,030,0300,0321,01,0321,0212,0, + /* 11123 */ 0250,0364,0174,010,0300,0321,01,0321,0202,0, + /* 11133 */ 0240,0364,0174,030,0300,0321,01,0321,0202,0, + /* 11143 */ 0240,0364,0374,030,0300,0324,01,0321,0212,0, + /* 11153 */ 0250,0364,0374,010,0300,0324,01,0321,0202,0, + /* 11163 */ 0240,0364,0374,030,0300,0324,01,0321,0202,0, + /* 11173 */ 0240,0364,0175,030,0300,0320,01,0323,0212,0, + /* 11183 */ 0250,0364,0175,010,0300,0320,01,0323,0202,0, + /* 11193 */ 0240,0364,0175,030,0300,0320,01,0323,0202,0, + /* 11203 */ 0240,0364,0174,030,0300,0321,01,0323,0212,0, + /* 11213 */ 0250,0364,0174,010,0300,0321,01,0323,0202,0, + /* 11223 */ 0240,0364,0174,030,0300,0321,01,0323,0202,0, + /* 11233 */ 0240,0364,0374,030,0300,0324,01,0323,0212,0, + /* 11243 */ 0250,0364,0374,010,0300,0324,01,0323,0202,0, + /* 11253 */ 0240,0364,0374,030,0300,0324,01,0323,0202,0, + /* 11263 */ 0240,0364,0174,030,0300,01,0300,0212,026,0, + /* 11273 */ 0250,0364,0174,010,0300,01,0300,0202,025,0, + /* 11283 */ 0240,0364,0174,030,0300,01,0300,0202,025,0, + /* 11293 */ 0240,0364,0175,030,0300,0320,01,0321,0213,0, + /* 11303 */ 0250,0364,0175,010,0300,0320,01,0321,0203,0, + /* 11313 */ 0240,0364,0175,030,0300,0320,01,0321,0203,0, + /* 11323 */ 0240,0364,0174,030,0300,0321,01,0321,0213,0, + /* 11333 */ 0250,0364,0174,010,0300,0321,01,0321,0203,0, + /* 11343 */ 0240,0364,0174,030,0300,0321,01,0321,0203,0, + /* 11353 */ 0240,0364,0374,030,0300,0324,01,0321,0213,0, + /* 11363 */ 0250,0364,0374,010,0300,0324,01,0321,0203,0, + /* 11373 */ 0240,0364,0374,030,0300,0324,01,0321,0203,0, + /* 11383 */ 0240,0364,0175,030,0300,0320,01,0323,0213,0, + /* 11393 */ 0250,0364,0175,010,0300,0320,01,0323,0203,0, + /* 11403 */ 0240,0364,0175,030,0300,0320,01,0323,0203,0, + /* 11413 */ 0240,0364,0174,030,0300,0321,01,0323,0213,0, + /* 11423 */ 0250,0364,0174,010,0300,0321,01,0323,0203,0, + /* 11433 */ 0240,0364,0174,030,0300,0321,01,0323,0203,0, + /* 11443 */ 0240,0364,0374,030,0300,0324,01,0323,0213,0, + /* 11453 */ 0250,0364,0374,010,0300,0324,01,0323,0203,0, + /* 11463 */ 0240,0364,0374,030,0300,0324,01,0323,0203,0, + /* 11473 */ 0240,0364,0174,030,0300,01,0300,0213,026,0, + /* 11483 */ 0250,0364,0174,010,0300,01,0300,0203,025,0, + /* 11493 */ 0240,0364,0174,030,0300,01,0300,0203,025,0, + /* 11503 */ 0240,0364,0175,030,0300,0320,01,0321,0214,0, + /* 11513 */ 0250,0364,0175,010,0300,0320,01,0321,0204,0, + /* 11523 */ 0240,0364,0175,030,0300,0320,01,0321,0204,0, + /* 11533 */ 0240,0364,0174,030,0300,0321,01,0321,0214,0, + /* 11543 */ 0250,0364,0174,010,0300,0321,01,0321,0204,0, + /* 11553 */ 0240,0364,0174,030,0300,0321,01,0321,0204,0, + /* 11563 */ 0240,0364,0374,030,0300,0324,01,0321,0214,0, + /* 11573 */ 0250,0364,0374,010,0300,0324,01,0321,0204,0, + /* 11583 */ 0240,0364,0374,030,0300,0324,01,0321,0204,0, + /* 11593 */ 0240,0364,0175,030,0300,0320,01,0323,0214,0, + /* 11603 */ 0250,0364,0175,010,0300,0320,01,0323,0204,0, + /* 11613 */ 0240,0364,0175,030,0300,0320,01,0323,0204,0, + /* 11623 */ 0240,0364,0174,030,0300,0321,01,0323,0214,0, + /* 11633 */ 0250,0364,0174,010,0300,0321,01,0323,0204,0, + /* 11643 */ 0240,0364,0174,030,0300,0321,01,0323,0204,0, + /* 11653 */ 0240,0364,0374,030,0300,0324,01,0323,0214,0, + /* 11663 */ 0250,0364,0374,010,0300,0324,01,0323,0204,0, + /* 11673 */ 0240,0364,0374,030,0300,0324,01,0323,0204,0, + /* 11683 */ 0240,0364,0174,030,0300,01,0300,0214,026,0, + /* 11693 */ 0250,0364,0174,010,0300,01,0300,0204,025,0, + /* 11703 */ 0240,0364,0174,030,0300,01,0300,0204,025,0, + /* 11713 */ 0240,0364,0175,030,0300,0320,01,0321,0215,0, + /* 11723 */ 0250,0364,0175,010,0300,0320,01,0321,0205,0, + /* 11733 */ 0240,0364,0175,030,0300,0320,01,0321,0205,0, + /* 11743 */ 0240,0364,0174,030,0300,0321,01,0321,0215,0, + /* 11753 */ 0250,0364,0174,010,0300,0321,01,0321,0205,0, + /* 11763 */ 0240,0364,0174,030,0300,0321,01,0321,0205,0, + /* 11773 */ 0240,0364,0374,030,0300,0324,01,0321,0215,0, + /* 11783 */ 0250,0364,0374,010,0300,0324,01,0321,0205,0, + /* 11793 */ 0240,0364,0374,030,0300,0324,01,0321,0205,0, + /* 11803 */ 0240,0364,0175,030,0300,0320,01,0323,0215,0, + /* 11813 */ 0250,0364,0175,010,0300,0320,01,0323,0205,0, + /* 11823 */ 0240,0364,0175,030,0300,0320,01,0323,0205,0, + /* 11833 */ 0240,0364,0174,030,0300,0321,01,0323,0215,0, + /* 11843 */ 0250,0364,0174,010,0300,0321,01,0323,0205,0, + /* 11853 */ 0240,0364,0174,030,0300,0321,01,0323,0205,0, + /* 11863 */ 0240,0364,0374,030,0300,0324,01,0323,0215,0, + /* 11873 */ 0250,0364,0374,010,0300,0324,01,0323,0205,0, + /* 11883 */ 0240,0364,0374,030,0300,0324,01,0323,0205,0, + /* 11893 */ 0240,0364,0174,030,0300,01,0300,0215,026,0, + /* 11903 */ 0250,0364,0174,010,0300,01,0300,0205,025,0, + /* 11913 */ 0240,0364,0174,030,0300,01,0300,0205,025,0, + /* 11923 */ 0240,0364,0175,030,0300,0320,01,0321,0217,0, + /* 11933 */ 0250,0364,0175,010,0300,0320,01,0321,0207,0, + /* 11943 */ 0240,0364,0175,030,0300,0320,01,0321,0207,0, + /* 11953 */ 0240,0364,0174,030,0300,0321,01,0321,0217,0, + /* 11963 */ 0250,0364,0174,010,0300,0321,01,0321,0207,0, + /* 11973 */ 0240,0364,0174,030,0300,0321,01,0321,0207,0, + /* 11983 */ 0240,0364,0374,030,0300,0324,01,0321,0217,0, + /* 11993 */ 0250,0364,0374,010,0300,0324,01,0321,0207,0, + /* 12003 */ 0240,0364,0374,030,0300,0324,01,0321,0207,0, + /* 12013 */ 0240,0364,0175,030,0300,0320,01,0323,0217,0, + /* 12023 */ 0250,0364,0175,010,0300,0320,01,0323,0207,0, + /* 12033 */ 0240,0364,0175,030,0300,0320,01,0323,0207,0, + /* 12043 */ 0240,0364,0174,030,0300,0321,01,0323,0217,0, + /* 12053 */ 0250,0364,0174,010,0300,0321,01,0323,0207,0, + /* 12063 */ 0240,0364,0174,030,0300,0321,01,0323,0207,0, + /* 12073 */ 0240,0364,0374,030,0300,0324,01,0323,0217,0, + /* 12083 */ 0250,0364,0374,010,0300,0324,01,0323,0207,0, + /* 12093 */ 0240,0364,0374,030,0300,0324,01,0323,0207,0, + /* 12103 */ 0240,0364,0174,030,0300,01,0300,0217,026,0, + /* 12113 */ 0250,0364,0174,010,0300,01,0300,0207,025,0, + /* 12123 */ 0240,0364,0174,030,0300,01,0300,0207,025,0, + /* 12133 */ 0250,0363,0177,010,0300,01,0360,0110,022,0, + /* 12143 */ 0250,0363,0377,010,0300,01,0360,0110,022,0, + /* 12153 */ 0240,0364,0175,030,0300,0320,01,0377,0210,0, + /* 12163 */ 0250,0364,0175,010,0300,0320,01,0377,0200,0, + /* 12173 */ 0240,0364,0175,030,0300,0320,01,0377,0200,0, + /* 12183 */ 0240,0364,0174,030,0300,0321,01,0377,0210,0, + /* 12193 */ 0250,0364,0174,010,0300,0321,01,0377,0200,0, + /* 12203 */ 0240,0364,0174,030,0300,0321,01,0377,0200,0, + /* 12213 */ 0240,0364,0374,030,0300,0324,01,0377,0210,0, + /* 12223 */ 0250,0364,0374,010,0300,0324,01,0377,0200,0, + /* 12233 */ 0240,0364,0374,030,0300,0324,01,0377,0200,0, + /* 12243 */ 0240,0364,0175,030,0300,0320,01,0377,0211,0, + /* 12253 */ 0250,0364,0175,010,0300,0320,01,0377,0201,0, + /* 12263 */ 0240,0364,0175,030,0300,0320,01,0377,0201,0, + /* 12273 */ 0240,0364,0174,030,0300,0321,01,0377,0211,0, + /* 12283 */ 0250,0364,0174,010,0300,0321,01,0377,0201,0, + /* 12293 */ 0240,0364,0174,030,0300,0321,01,0377,0201,0, + /* 12303 */ 0240,0364,0374,030,0300,0324,01,0377,0211,0, + /* 12313 */ 0250,0364,0374,010,0300,0324,01,0377,0201,0, + /* 12323 */ 0240,0364,0374,030,0300,0324,01,0377,0201,0, + /* 12333 */ 0250,0364,0175,010,0300,0320,01,0367,0205,0, + /* 12343 */ 0250,0364,0174,010,0300,0321,01,0367,0205,0, + /* 12353 */ 0250,0364,0374,010,0300,0324,01,0367,0205,0, + /* 12363 */ 0240,0364,0175,030,0300,0320,01,0257,0121,0, + /* 12373 */ 0250,0364,0175,010,0300,0320,01,0257,0110,0, + /* 12383 */ 0240,0364,0175,030,0300,0320,01,0257,0110,0, + /* 12393 */ 0240,0364,0174,030,0300,0321,01,0257,0121,0, + /* 12403 */ 0250,0364,0174,010,0300,0321,01,0257,0110,0, + /* 12413 */ 0240,0364,0174,030,0300,0321,01,0257,0110,0, + /* 12423 */ 0240,0364,0374,030,0300,0324,01,0257,0121,0, + /* 12433 */ 0250,0364,0374,010,0300,0324,01,0257,0110,0, + /* 12443 */ 0240,0364,0374,030,0300,0324,01,0257,0110,0, + /* 12453 */ 0250,0364,0175,010,0300,0320,01,0367,0204,0, + /* 12463 */ 0250,0364,0174,010,0300,0321,01,0367,0204,0, + /* 12473 */ 0250,0364,0374,010,0300,0324,01,0367,0204,0, + /* 12483 */ 0250,0364,0175,010,0300,0320,01,0367,0207,0, + /* 12493 */ 0250,0364,0174,010,0300,0321,01,0367,0207,0, + /* 12503 */ 0250,0364,0374,010,0300,0324,01,0367,0207,0, + /* 12513 */ 0250,0364,0175,010,0300,0320,01,0367,0206,0, + /* 12523 */ 0250,0364,0174,010,0300,0321,01,0367,0206,0, + /* 12533 */ 0250,0364,0374,010,0300,0324,01,0367,0206,0, + /* 12543 */ 0240,0364,0175,030,0300,0320,01,0367,0213,0, + /* 12553 */ 0250,0364,0175,010,0300,0320,01,0367,0203,0, + /* 12563 */ 0240,0364,0175,030,0300,0320,01,0367,0203,0, + /* 12573 */ 0240,0364,0174,030,0300,0321,01,0367,0213,0, + /* 12583 */ 0250,0364,0174,010,0300,0321,01,0367,0203,0, + /* 12593 */ 0240,0364,0174,030,0300,0321,01,0367,0203,0, + /* 12603 */ 0240,0364,0374,030,0300,0324,01,0367,0213,0, + /* 12613 */ 0250,0364,0374,010,0300,0324,01,0367,0203,0, + /* 12623 */ 0240,0364,0374,030,0300,0324,01,0367,0203,0, + /* 12633 */ 0240,0364,0175,030,0300,0320,01,0367,0212,0, + /* 12643 */ 0250,0364,0175,010,0300,0320,01,0367,0202,0, + /* 12653 */ 0240,0364,0175,030,0300,0320,01,0367,0202,0, + /* 12663 */ 0240,0364,0174,030,0300,0321,01,0367,0212,0, + /* 12673 */ 0250,0364,0174,010,0300,0321,01,0367,0202,0, + /* 12683 */ 0240,0364,0174,030,0300,0321,01,0367,0202,0, + /* 12693 */ 0240,0364,0374,030,0300,0324,01,0367,0212,0, + /* 12703 */ 0250,0364,0374,010,0300,0324,01,0367,0202,0, + /* 12713 */ 0240,0364,0374,030,0300,0324,01,0367,0202,0, + /* 12723 */ 0240,0364,0175,030,0300,0320,01,0245,0112,0, + /* 12733 */ 0250,0364,0175,010,0300,0320,01,0245,0101,0, + /* 12743 */ 0240,0364,0175,030,0300,0320,01,0245,0101,0, + /* 12753 */ 0240,0364,0174,030,0300,0321,01,0245,0112,0, + /* 12763 */ 0250,0364,0174,010,0300,0321,01,0245,0101,0, + /* 12773 */ 0240,0364,0174,030,0300,0321,01,0245,0101,0, + /* 12783 */ 0240,0364,0374,030,0300,0324,01,0245,0112,0, + /* 12793 */ 0250,0364,0374,010,0300,0324,01,0245,0101,0, + /* 12803 */ 0240,0364,0374,030,0300,0324,01,0245,0101,0, + /* 12813 */ 0240,0364,0175,030,0300,0320,01,0255,0112,0, + /* 12823 */ 0250,0364,0175,010,0300,0320,01,0255,0101,0, + /* 12833 */ 0240,0364,0175,030,0300,0320,01,0255,0101,0, + /* 12843 */ 0240,0364,0174,030,0300,0321,01,0255,0112,0, + /* 12853 */ 0250,0364,0174,010,0300,0321,01,0255,0101,0, + /* 12863 */ 0240,0364,0174,030,0300,0321,01,0255,0101,0, + /* 12873 */ 0240,0364,0374,030,0300,0324,01,0255,0112,0, + /* 12883 */ 0250,0364,0374,010,0300,0324,01,0255,0101,0, + /* 12893 */ 0240,0364,0374,030,0300,0324,01,0255,0101,0, + /* 12903 */ 0250,0364,0175,010,0300,0320,01,0365,0110,0, + /* 12913 */ 0250,0364,0174,010,0300,0321,01,0365,0110,0, + /* 12923 */ 0250,0364,0374,010,0300,0324,01,0365,0110,0, + /* 12933 */ 0250,0364,0175,010,0300,0320,01,0364,0110,0, + /* 12943 */ 0250,0364,0174,010,0300,0321,01,0364,0110,0, + /* 12953 */ 0250,0364,0374,010,0300,0324,01,0364,0110,0, + /* 12963 */ 0250,0364,0175,010,0300,0320,01,0140,0110,0, + /* 12973 */ 0250,0364,0174,010,0300,0321,01,0140,0110,0, + /* 12983 */ 0250,0364,0374,010,0300,0324,01,0140,0110,0, + /* 12993 */ 0250,0364,0175,010,0300,0320,01,0141,0101,0, + /* 13003 */ 0250,0364,0174,010,0300,0321,01,0141,0101,0, + /* 13013 */ 0250,0364,0374,010,0300,0324,01,0141,0101,0, + /* 13023 */ 0250,0367,0177,010,0300,01,0366,0200,041,0, + /* 13033 */ 0250,0367,0176,010,0300,01,0366,0210,040,0, + /* 13043 */ 0250,0367,0177,010,0300,01,0370,0200,041,0, + /* 13053 */ 0250,0367,0176,010,0300,01,0370,0210,040,0, + /* 13063 */ 0323,0240,0364,0174,030,0300,01,0377,0216,0, + /* 13073 */ 0323,0240,0364,0374,030,0300,01,0377,0216,0, + /* 13083 */ 0323,0240,0364,0174,030,0300,01,0217,0210,0, + /* 13093 */ 0323,0241,0364,0174,030,0300,01,0217,0200,0, + /* 13103 */ 0323,0240,0364,0374,030,0300,01,0217,0210,0, + /* 13113 */ 0323,0241,0364,0374,030,0300,01,0217,0200,0, + /* 13123 */ 0240,0364,05,013,0300,0320,01,071,0112,0, + /* 13133 */ 0240,0364,05,07,0300,0320,01,071,0112,0, + /* 13143 */ 0240,0364,05,03,0300,0320,01,071,0112,0, + /* 13153 */ 0240,0364,05,02,0300,0320,01,071,0112,0, + /* 13163 */ 0240,0364,05,06,0300,0320,01,071,0112,0, + /* 13173 */ 0240,0364,05,04,0300,0320,01,071,0112,0, + /* 13183 */ 0240,0364,05,017,0300,0320,01,071,0112,0, + /* 13193 */ 0240,0364,05,015,0300,0320,01,071,0112,0, + /* 13203 */ 0240,0364,05,014,0300,0320,01,071,0112,0, + /* 13213 */ 0240,0364,05,016,0300,0320,01,071,0112,0, + /* 13223 */ 0240,0364,05,05,0300,0320,01,071,0112,0, + /* 13233 */ 0240,0364,05,01,0300,0320,01,071,0112,0, + /* 13243 */ 0240,0364,05,011,0300,0320,01,071,0112,0, + /* 13253 */ 0240,0364,05,0,0300,0320,01,071,0112,0, + /* 13263 */ 0240,0364,05,010,0300,0320,01,071,0112,0, + /* 13273 */ 0240,0364,05,012,0300,0320,01,071,0112,0, + /* 13283 */ 0240,0364,04,013,0300,0321,01,071,0112,0, + /* 13293 */ 0240,0364,04,07,0300,0321,01,071,0112,0, + /* 13303 */ 0240,0364,04,03,0300,0321,01,071,0112,0, + /* 13313 */ 0240,0364,04,02,0300,0321,01,071,0112,0, + /* 13323 */ 0240,0364,04,06,0300,0321,01,071,0112,0, + /* 13333 */ 0240,0364,04,04,0300,0321,01,071,0112,0, + /* 13343 */ 0240,0364,04,017,0300,0321,01,071,0112,0, + /* 13353 */ 0240,0364,04,015,0300,0321,01,071,0112,0, + /* 13363 */ 0240,0364,04,014,0300,0321,01,071,0112,0, + /* 13373 */ 0240,0364,04,016,0300,0321,01,071,0112,0, + /* 13383 */ 0240,0364,04,05,0300,0321,01,071,0112,0, + /* 13393 */ 0240,0364,04,01,0300,0321,01,071,0112,0, + /* 13403 */ 0240,0364,04,011,0300,0321,01,071,0112,0, + /* 13413 */ 0240,0364,04,0,0300,0321,01,071,0112,0, + /* 13423 */ 0240,0364,04,010,0300,0321,01,071,0112,0, + /* 13433 */ 0240,0364,04,012,0300,0321,01,071,0112,0, + /* 13443 */ 0240,0364,0204,013,0300,0324,01,071,0112,0, + /* 13453 */ 0240,0364,0204,07,0300,0324,01,071,0112,0, + /* 13463 */ 0240,0364,0204,03,0300,0324,01,071,0112,0, + /* 13473 */ 0240,0364,0204,02,0300,0324,01,071,0112,0, + /* 13483 */ 0240,0364,0204,06,0300,0324,01,071,0112,0, + /* 13493 */ 0240,0364,0204,04,0300,0324,01,071,0112,0, + /* 13503 */ 0240,0364,0204,017,0300,0324,01,071,0112,0, + /* 13513 */ 0240,0364,0204,015,0300,0324,01,071,0112,0, + /* 13523 */ 0240,0364,0204,014,0300,0324,01,071,0112,0, + /* 13533 */ 0240,0364,0204,016,0300,0324,01,071,0112,0, + /* 13543 */ 0240,0364,0204,05,0300,0324,01,071,0112,0, + /* 13553 */ 0240,0364,0204,01,0300,0324,01,071,0112,0, + /* 13563 */ 0240,0364,0204,011,0300,0324,01,071,0112,0, + /* 13573 */ 0240,0364,0204,0,0300,0324,01,071,0112,0, + /* 13583 */ 0240,0364,0204,010,0300,0324,01,071,0112,0, + /* 13593 */ 0240,0364,0204,012,0300,0324,01,071,0112,0, + /* 13603 */ 0240,0364,05,013,0300,0320,01,073,0121,0, + /* 13613 */ 0240,0364,05,07,0300,0320,01,073,0121,0, + /* 13623 */ 0240,0364,05,03,0300,0320,01,073,0121,0, + /* 13633 */ 0240,0364,05,02,0300,0320,01,073,0121,0, + /* 13643 */ 0240,0364,05,06,0300,0320,01,073,0121,0, + /* 13653 */ 0240,0364,05,04,0300,0320,01,073,0121,0, + /* 13663 */ 0240,0364,05,017,0300,0320,01,073,0121,0, + /* 13673 */ 0240,0364,05,015,0300,0320,01,073,0121,0, + /* 13683 */ 0240,0364,05,014,0300,0320,01,073,0121,0, + /* 13693 */ 0240,0364,05,016,0300,0320,01,073,0121,0, + /* 13703 */ 0240,0364,05,05,0300,0320,01,073,0121,0, + /* 13713 */ 0240,0364,05,01,0300,0320,01,073,0121,0, + /* 13723 */ 0240,0364,05,011,0300,0320,01,073,0121,0, + /* 13733 */ 0240,0364,05,0,0300,0320,01,073,0121,0, + /* 13743 */ 0240,0364,05,010,0300,0320,01,073,0121,0, + /* 13753 */ 0240,0364,05,012,0300,0320,01,073,0121,0, + /* 13763 */ 0240,0364,04,013,0300,0321,01,073,0121,0, + /* 13773 */ 0240,0364,04,07,0300,0321,01,073,0121,0, + /* 13783 */ 0240,0364,04,03,0300,0321,01,073,0121,0, + /* 13793 */ 0240,0364,04,02,0300,0321,01,073,0121,0, + /* 13803 */ 0240,0364,04,06,0300,0321,01,073,0121,0, + /* 13813 */ 0240,0364,04,04,0300,0321,01,073,0121,0, + /* 13823 */ 0240,0364,04,017,0300,0321,01,073,0121,0, + /* 13833 */ 0240,0364,04,015,0300,0321,01,073,0121,0, + /* 13843 */ 0240,0364,04,014,0300,0321,01,073,0121,0, + /* 13853 */ 0240,0364,04,016,0300,0321,01,073,0121,0, + /* 13863 */ 0240,0364,04,05,0300,0321,01,073,0121,0, + /* 13873 */ 0240,0364,04,01,0300,0321,01,073,0121,0, + /* 13883 */ 0240,0364,04,011,0300,0321,01,073,0121,0, + /* 13893 */ 0240,0364,04,0,0300,0321,01,073,0121,0, + /* 13903 */ 0240,0364,04,010,0300,0321,01,073,0121,0, + /* 13913 */ 0240,0364,04,012,0300,0321,01,073,0121,0, + /* 13923 */ 0240,0364,0204,013,0300,0324,01,073,0121,0, + /* 13933 */ 0240,0364,0204,07,0300,0324,01,073,0121,0, + /* 13943 */ 0240,0364,0204,03,0300,0324,01,073,0121,0, + /* 13953 */ 0240,0364,0204,02,0300,0324,01,073,0121,0, + /* 13963 */ 0240,0364,0204,06,0300,0324,01,073,0121,0, + /* 13973 */ 0240,0364,0204,04,0300,0324,01,073,0121,0, + /* 13983 */ 0240,0364,0204,017,0300,0324,01,073,0121,0, + /* 13993 */ 0240,0364,0204,015,0300,0324,01,073,0121,0, + /* 14003 */ 0240,0364,0204,014,0300,0324,01,073,0121,0, + /* 14013 */ 0240,0364,0204,016,0300,0324,01,073,0121,0, + /* 14023 */ 0240,0364,0204,05,0300,0324,01,073,0121,0, + /* 14033 */ 0240,0364,0204,01,0300,0324,01,073,0121,0, + /* 14043 */ 0240,0364,0204,011,0300,0324,01,073,0121,0, + /* 14053 */ 0240,0364,0204,0,0300,0324,01,073,0121,0, + /* 14063 */ 0240,0364,0204,010,0300,0324,01,073,0121,0, + /* 14073 */ 0240,0364,0204,012,0300,0324,01,073,0121,0, + /* 14083 */ 0240,0364,04,013,0300,01,0200,0217,022,0, + /* 14093 */ 0240,0364,04,07,0300,01,0200,0217,022,0, + /* 14103 */ 0240,0364,04,03,0300,01,0200,0217,022,0, + /* 14113 */ 0240,0364,04,02,0300,01,0200,0217,022,0, + /* 14123 */ 0240,0364,04,06,0300,01,0200,0217,022,0, + /* 14133 */ 0240,0364,04,04,0300,01,0200,0217,022,0, + /* 14143 */ 0240,0364,04,017,0300,01,0200,0217,022,0, + /* 14153 */ 0240,0364,04,015,0300,01,0200,0217,022,0, + /* 14163 */ 0240,0364,04,014,0300,01,0200,0217,022,0, + /* 14173 */ 0240,0364,04,016,0300,01,0200,0217,022,0, + /* 14183 */ 0240,0364,04,05,0300,01,0200,0217,022,0, + /* 14193 */ 0240,0364,04,01,0300,01,0200,0217,022,0, + /* 14203 */ 0240,0364,04,011,0300,01,0200,0217,022,0, + /* 14213 */ 0240,0364,04,0,0300,01,0200,0217,022,0, + /* 14223 */ 0240,0364,04,010,0300,01,0200,0217,022,0, + /* 14233 */ 0240,0364,04,012,0300,01,0200,0217,022,0, + /* 14243 */ 0240,0364,05,013,0300,0320,01,0205,0112,0, + /* 14253 */ 0240,0364,05,07,0300,0320,01,0205,0112,0, + /* 14263 */ 0240,0364,05,03,0300,0320,01,0205,0112,0, + /* 14273 */ 0240,0364,05,02,0300,0320,01,0205,0112,0, + /* 14283 */ 0240,0364,05,06,0300,0320,01,0205,0112,0, + /* 14293 */ 0240,0364,05,04,0300,0320,01,0205,0112,0, + /* 14303 */ 0240,0364,05,017,0300,0320,01,0205,0112,0, + /* 14313 */ 0240,0364,05,015,0300,0320,01,0205,0112,0, + /* 14323 */ 0240,0364,05,014,0300,0320,01,0205,0112,0, + /* 14333 */ 0240,0364,05,016,0300,0320,01,0205,0112,0, + /* 14343 */ 0240,0364,05,05,0300,0320,01,0205,0112,0, + /* 14353 */ 0240,0364,05,01,0300,0320,01,0205,0112,0, + /* 14363 */ 0240,0364,05,011,0300,0320,01,0205,0112,0, + /* 14373 */ 0240,0364,05,0,0300,0320,01,0205,0112,0, + /* 14383 */ 0240,0364,05,010,0300,0320,01,0205,0112,0, + /* 14393 */ 0240,0364,05,012,0300,0320,01,0205,0112,0, + /* 14403 */ 0240,0364,04,013,0300,0321,01,0205,0112,0, + /* 14413 */ 0240,0364,04,07,0300,0321,01,0205,0112,0, + /* 14423 */ 0240,0364,04,03,0300,0321,01,0205,0112,0, + /* 14433 */ 0240,0364,04,02,0300,0321,01,0205,0112,0, + /* 14443 */ 0240,0364,04,06,0300,0321,01,0205,0112,0, + /* 14453 */ 0240,0364,04,04,0300,0321,01,0205,0112,0, + /* 14463 */ 0240,0364,04,017,0300,0321,01,0205,0112,0, + /* 14473 */ 0240,0364,04,015,0300,0321,01,0205,0112,0, + /* 14483 */ 0240,0364,04,014,0300,0321,01,0205,0112,0, + /* 14493 */ 0240,0364,04,016,0300,0321,01,0205,0112,0, + /* 14503 */ 0240,0364,04,05,0300,0321,01,0205,0112,0, + /* 14513 */ 0240,0364,04,01,0300,0321,01,0205,0112,0, + /* 14523 */ 0240,0364,04,011,0300,0321,01,0205,0112,0, + /* 14533 */ 0240,0364,04,0,0300,0321,01,0205,0112,0, + /* 14543 */ 0240,0364,04,010,0300,0321,01,0205,0112,0, + /* 14553 */ 0240,0364,04,012,0300,0321,01,0205,0112,0, + /* 14563 */ 0240,0364,0204,013,0300,0324,01,0205,0112,0, + /* 14573 */ 0240,0364,0204,07,0300,0324,01,0205,0112,0, + /* 14583 */ 0240,0364,0204,03,0300,0324,01,0205,0112,0, + /* 14593 */ 0240,0364,0204,02,0300,0324,01,0205,0112,0, + /* 14603 */ 0240,0364,0204,06,0300,0324,01,0205,0112,0, + /* 14613 */ 0240,0364,0204,04,0300,0324,01,0205,0112,0, + /* 14623 */ 0240,0364,0204,017,0300,0324,01,0205,0112,0, + /* 14633 */ 0240,0364,0204,015,0300,0324,01,0205,0112,0, + /* 14643 */ 0240,0364,0204,014,0300,0324,01,0205,0112,0, + /* 14653 */ 0240,0364,0204,016,0300,0324,01,0205,0112,0, + /* 14663 */ 0240,0364,0204,05,0300,0324,01,0205,0112,0, + /* 14673 */ 0240,0364,0204,01,0300,0324,01,0205,0112,0, + /* 14683 */ 0240,0364,0204,011,0300,0324,01,0205,0112,0, + /* 14693 */ 0240,0364,0204,0,0300,0324,01,0205,0112,0, + /* 14703 */ 0240,0364,0204,010,0300,0324,01,0205,0112,0, + /* 14713 */ 0240,0364,0204,012,0300,0324,01,0205,0112,0, + /* 14723 */ 0240,0364,04,013,0300,01,0366,0210,022,0, + /* 14733 */ 0240,0364,04,07,0300,01,0366,0210,022,0, + /* 14743 */ 0240,0364,04,03,0300,01,0366,0210,022,0, + /* 14753 */ 0240,0364,04,02,0300,01,0366,0210,022,0, + /* 14763 */ 0240,0364,04,06,0300,01,0366,0210,022,0, + /* 14773 */ 0240,0364,04,04,0300,01,0366,0210,022,0, + /* 14783 */ 0240,0364,04,017,0300,01,0366,0210,022,0, + /* 14793 */ 0240,0364,04,015,0300,01,0366,0210,022,0, + /* 14803 */ 0240,0364,04,014,0300,01,0366,0210,022,0, + /* 14813 */ 0240,0364,04,016,0300,01,0366,0210,022,0, + /* 14823 */ 0240,0364,04,05,0300,01,0366,0210,022,0, + /* 14833 */ 0240,0364,04,01,0300,01,0366,0210,022,0, + /* 14843 */ 0240,0364,04,011,0300,01,0366,0210,022,0, + /* 14853 */ 0240,0364,04,0,0300,01,0366,0210,022,0, + /* 14863 */ 0240,0364,04,010,0300,01,0366,0210,022,0, + /* 14873 */ 0240,0364,04,012,0300,01,0366,0210,022,0, + /* 14883 */ 0240,0364,04,013,0300,01,0366,0211,022,0, + /* 14893 */ 0240,0364,04,07,0300,01,0366,0211,022,0, + /* 14903 */ 0240,0364,04,03,0300,01,0366,0211,022,0, + /* 14913 */ 0240,0364,04,02,0300,01,0366,0211,022,0, + /* 14923 */ 0240,0364,04,06,0300,01,0366,0211,022,0, + /* 14933 */ 0240,0364,04,04,0300,01,0366,0211,022,0, + /* 14943 */ 0240,0364,04,017,0300,01,0366,0211,022,0, + /* 14953 */ 0240,0364,04,015,0300,01,0366,0211,022,0, + /* 14963 */ 0240,0364,04,014,0300,01,0366,0211,022,0, + /* 14973 */ 0240,0364,04,016,0300,01,0366,0211,022,0, + /* 14983 */ 0240,0364,04,05,0300,01,0366,0211,022,0, + /* 14993 */ 0240,0364,04,01,0300,01,0366,0211,022,0, + /* 15003 */ 0240,0364,04,011,0300,01,0366,0211,022,0, + /* 15013 */ 0240,0364,04,0,0300,01,0366,0211,022,0, + /* 15023 */ 0240,0364,04,010,0300,01,0366,0211,022,0, + /* 15033 */ 0240,0364,04,012,0300,01,0366,0211,022,0, + /* 15043 */ 0240,0364,0175,030,0300,0320,01,0107,0121,0, + /* 15053 */ 0240,0364,0175,030,0300,0320,01,0103,0121,0, + /* 15063 */ 0240,0364,0175,030,0300,0320,01,0102,0121,0, + /* 15073 */ 0240,0364,0175,030,0300,0320,01,0106,0121,0, + /* 15083 */ 0240,0364,0175,030,0300,0320,01,0104,0121,0, + /* 15093 */ 0240,0364,0175,030,0300,0320,01,0117,0121,0, + /* 15103 */ 0240,0364,0175,030,0300,0320,01,0115,0121,0, + /* 15113 */ 0240,0364,0175,030,0300,0320,01,0114,0121,0, + /* 15123 */ 0240,0364,0175,030,0300,0320,01,0116,0121,0, + /* 15133 */ 0240,0364,0175,030,0300,0320,01,0105,0121,0, + /* 15143 */ 0240,0364,0175,030,0300,0320,01,0101,0121,0, + /* 15153 */ 0240,0364,0175,030,0300,0320,01,0113,0121,0, + /* 15163 */ 0240,0364,0175,030,0300,0320,01,0111,0121,0, + /* 15173 */ 0240,0364,0175,030,0300,0320,01,0100,0121,0, + /* 15183 */ 0240,0364,0175,030,0300,0320,01,0112,0121,0, + /* 15193 */ 0240,0364,0175,030,0300,0320,01,0110,0121,0, + /* 15203 */ 0240,0364,0174,030,0300,0321,01,0107,0121,0, + /* 15213 */ 0240,0364,0174,030,0300,0321,01,0103,0121,0, + /* 15223 */ 0240,0364,0174,030,0300,0321,01,0102,0121,0, + /* 15233 */ 0240,0364,0174,030,0300,0321,01,0106,0121,0, + /* 15243 */ 0240,0364,0174,030,0300,0321,01,0104,0121,0, + /* 15253 */ 0240,0364,0174,030,0300,0321,01,0117,0121,0, + /* 15263 */ 0240,0364,0174,030,0300,0321,01,0115,0121,0, + /* 15273 */ 0240,0364,0174,030,0300,0321,01,0114,0121,0, + /* 15283 */ 0240,0364,0174,030,0300,0321,01,0116,0121,0, + /* 15293 */ 0240,0364,0174,030,0300,0321,01,0105,0121,0, + /* 15303 */ 0240,0364,0174,030,0300,0321,01,0101,0121,0, + /* 15313 */ 0240,0364,0174,030,0300,0321,01,0113,0121,0, + /* 15323 */ 0240,0364,0174,030,0300,0321,01,0111,0121,0, + /* 15333 */ 0240,0364,0174,030,0300,0321,01,0100,0121,0, + /* 15343 */ 0240,0364,0174,030,0300,0321,01,0112,0121,0, + /* 15353 */ 0240,0364,0174,030,0300,0321,01,0110,0121,0, + /* 15363 */ 0240,0364,0374,030,0300,0324,01,0107,0121,0, + /* 15373 */ 0240,0364,0374,030,0300,0324,01,0103,0121,0, + /* 15383 */ 0240,0364,0374,030,0300,0324,01,0102,0121,0, + /* 15393 */ 0240,0364,0374,030,0300,0324,01,0106,0121,0, + /* 15403 */ 0240,0364,0374,030,0300,0324,01,0104,0121,0, + /* 15413 */ 0240,0364,0374,030,0300,0324,01,0117,0121,0, + /* 15423 */ 0240,0364,0374,030,0300,0324,01,0115,0121,0, + /* 15433 */ 0240,0364,0374,030,0300,0324,01,0114,0121,0, + /* 15443 */ 0240,0364,0374,030,0300,0324,01,0116,0121,0, + /* 15453 */ 0240,0364,0374,030,0300,0324,01,0105,0121,0, + /* 15463 */ 0240,0364,0374,030,0300,0324,01,0101,0121,0, + /* 15473 */ 0240,0364,0374,030,0300,0324,01,0113,0121,0, + /* 15483 */ 0240,0364,0374,030,0300,0324,01,0111,0121,0, + /* 15493 */ 0240,0364,0374,030,0300,0324,01,0100,0121,0, + /* 15503 */ 0240,0364,0374,030,0300,0324,01,0112,0121,0, + /* 15513 */ 0240,0364,0374,030,0300,0324,01,0110,0121,0, + /* 15523 */ 0250,0364,0175,014,0300,0320,01,0107,0101,0, + /* 15533 */ 0250,0364,0175,014,0300,0320,01,0103,0101,0, + /* 15543 */ 0250,0364,0175,014,0300,0320,01,0102,0101,0, + /* 15553 */ 0250,0364,0175,014,0300,0320,01,0106,0101,0, + /* 15563 */ 0250,0364,0175,014,0300,0320,01,0104,0101,0, + /* 15573 */ 0250,0364,0175,014,0300,0320,01,0117,0101,0, + /* 15583 */ 0250,0364,0175,014,0300,0320,01,0115,0101,0, + /* 15593 */ 0250,0364,0175,014,0300,0320,01,0114,0101,0, + /* 15603 */ 0250,0364,0175,014,0300,0320,01,0116,0101,0, + /* 15613 */ 0250,0364,0175,014,0300,0320,01,0105,0101,0, + /* 15623 */ 0250,0364,0175,014,0300,0320,01,0101,0101,0, + /* 15633 */ 0250,0364,0175,014,0300,0320,01,0113,0101,0, + /* 15643 */ 0250,0364,0175,014,0300,0320,01,0111,0101,0, + /* 15653 */ 0250,0364,0175,014,0300,0320,01,0100,0101,0, + /* 15663 */ 0250,0364,0175,014,0300,0320,01,0112,0101,0, + /* 15673 */ 0250,0364,0175,014,0300,0320,01,0110,0101,0, + /* 15683 */ 0250,0364,0174,014,0300,0321,01,0107,0101,0, + /* 15693 */ 0250,0364,0174,014,0300,0321,01,0103,0101,0, + /* 15703 */ 0250,0364,0174,014,0300,0321,01,0102,0101,0, + /* 15713 */ 0250,0364,0174,014,0300,0321,01,0106,0101,0, + /* 15723 */ 0250,0364,0174,014,0300,0321,01,0104,0101,0, + /* 15733 */ 0250,0364,0174,014,0300,0321,01,0117,0101,0, + /* 15743 */ 0250,0364,0174,014,0300,0321,01,0115,0101,0, + /* 15753 */ 0250,0364,0174,014,0300,0321,01,0114,0101,0, + /* 15763 */ 0250,0364,0174,014,0300,0321,01,0116,0101,0, + /* 15773 */ 0250,0364,0174,014,0300,0321,01,0105,0101,0, + /* 15783 */ 0250,0364,0174,014,0300,0321,01,0101,0101,0, + /* 15793 */ 0250,0364,0174,014,0300,0321,01,0113,0101,0, + /* 15803 */ 0250,0364,0174,014,0300,0321,01,0111,0101,0, + /* 15813 */ 0250,0364,0174,014,0300,0321,01,0100,0101,0, + /* 15823 */ 0250,0364,0174,014,0300,0321,01,0112,0101,0, + /* 15833 */ 0250,0364,0174,014,0300,0321,01,0110,0101,0, + /* 15843 */ 0250,0364,0374,014,0300,0324,01,0107,0101,0, + /* 15853 */ 0250,0364,0374,014,0300,0324,01,0103,0101,0, + /* 15863 */ 0250,0364,0374,014,0300,0324,01,0102,0101,0, + /* 15873 */ 0250,0364,0374,014,0300,0324,01,0106,0101,0, + /* 15883 */ 0250,0364,0374,014,0300,0324,01,0104,0101,0, + /* 15893 */ 0250,0364,0374,014,0300,0324,01,0117,0101,0, + /* 15903 */ 0250,0364,0374,014,0300,0324,01,0115,0101,0, + /* 15913 */ 0250,0364,0374,014,0300,0324,01,0114,0101,0, + /* 15923 */ 0250,0364,0374,014,0300,0324,01,0116,0101,0, + /* 15933 */ 0250,0364,0374,014,0300,0324,01,0105,0101,0, + /* 15943 */ 0250,0364,0374,014,0300,0324,01,0101,0101,0, + /* 15953 */ 0250,0364,0374,014,0300,0324,01,0113,0101,0, + /* 15963 */ 0250,0364,0374,014,0300,0324,01,0111,0101,0, + /* 15973 */ 0250,0364,0374,014,0300,0324,01,0100,0101,0, + /* 15983 */ 0250,0364,0374,014,0300,0324,01,0112,0101,0, + /* 15993 */ 0250,0364,0374,014,0300,0324,01,0110,0101,0, + /* 16003 */ 0250,0364,0175,010,0300,0320,01,0107,0110,0, + /* 16013 */ 0250,0364,0175,010,0300,0320,01,0103,0110,0, + /* 16023 */ 0250,0364,0175,010,0300,0320,01,0102,0110,0, + /* 16033 */ 0250,0364,0175,010,0300,0320,01,0106,0110,0, + /* 16043 */ 0250,0364,0175,010,0300,0320,01,0104,0110,0, + /* 16053 */ 0250,0364,0175,010,0300,0320,01,0117,0110,0, + /* 16063 */ 0250,0364,0175,010,0300,0320,01,0115,0110,0, + /* 16073 */ 0250,0364,0175,010,0300,0320,01,0114,0110,0, + /* 16083 */ 0250,0364,0175,010,0300,0320,01,0116,0110,0, + /* 16093 */ 0250,0364,0175,010,0300,0320,01,0105,0110,0, + /* 16103 */ 0250,0364,0175,010,0300,0320,01,0101,0110,0, + /* 16113 */ 0250,0364,0175,010,0300,0320,01,0113,0110,0, + /* 16123 */ 0250,0364,0175,010,0300,0320,01,0111,0110,0, + /* 16133 */ 0250,0364,0175,010,0300,0320,01,0100,0110,0, + /* 16143 */ 0250,0364,0175,010,0300,0320,01,0112,0110,0, + /* 16153 */ 0250,0364,0175,010,0300,0320,01,0110,0110,0, + /* 16163 */ 0250,0364,0174,010,0300,0321,01,0107,0110,0, + /* 16173 */ 0250,0364,0174,010,0300,0321,01,0103,0110,0, + /* 16183 */ 0250,0364,0174,010,0300,0321,01,0102,0110,0, + /* 16193 */ 0250,0364,0174,010,0300,0321,01,0106,0110,0, + /* 16203 */ 0250,0364,0174,010,0300,0321,01,0104,0110,0, + /* 16213 */ 0250,0364,0174,010,0300,0321,01,0117,0110,0, + /* 16223 */ 0250,0364,0174,010,0300,0321,01,0115,0110,0, + /* 16233 */ 0250,0364,0174,010,0300,0321,01,0114,0110,0, + /* 16243 */ 0250,0364,0174,010,0300,0321,01,0116,0110,0, + /* 16253 */ 0250,0364,0174,010,0300,0321,01,0105,0110,0, + /* 16263 */ 0250,0364,0174,010,0300,0321,01,0101,0110,0, + /* 16273 */ 0250,0364,0174,010,0300,0321,01,0113,0110,0, + /* 16283 */ 0250,0364,0174,010,0300,0321,01,0111,0110,0, + /* 16293 */ 0250,0364,0174,010,0300,0321,01,0100,0110,0, + /* 16303 */ 0250,0364,0174,010,0300,0321,01,0112,0110,0, + /* 16313 */ 0250,0364,0174,010,0300,0321,01,0110,0110,0, + /* 16323 */ 0250,0364,0374,010,0300,0324,01,0107,0110,0, + /* 16333 */ 0250,0364,0374,010,0300,0324,01,0103,0110,0, + /* 16343 */ 0250,0364,0374,010,0300,0324,01,0102,0110,0, + /* 16353 */ 0250,0364,0374,010,0300,0324,01,0106,0110,0, + /* 16363 */ 0250,0364,0374,010,0300,0324,01,0104,0110,0, + /* 16373 */ 0250,0364,0374,010,0300,0324,01,0117,0110,0, + /* 16383 */ 0250,0364,0374,010,0300,0324,01,0115,0110,0, + /* 16393 */ 0250,0364,0374,010,0300,0324,01,0114,0110,0, + /* 16403 */ 0250,0364,0374,010,0300,0324,01,0116,0110,0, + /* 16413 */ 0250,0364,0374,010,0300,0324,01,0105,0110,0, + /* 16423 */ 0250,0364,0374,010,0300,0324,01,0101,0110,0, + /* 16433 */ 0250,0364,0374,010,0300,0324,01,0113,0110,0, + /* 16443 */ 0250,0364,0374,010,0300,0324,01,0111,0110,0, + /* 16453 */ 0250,0364,0374,010,0300,0324,01,0100,0110,0, + /* 16463 */ 0250,0364,0374,010,0300,0324,01,0112,0110,0, + /* 16473 */ 0250,0364,0374,010,0300,0324,01,0110,0110,0, + /* 16483 */ 0240,0364,0175,034,0300,0320,01,0107,0121,0, + /* 16493 */ 0240,0364,0175,034,0300,0320,01,0103,0121,0, + /* 16503 */ 0240,0364,0175,034,0300,0320,01,0102,0121,0, + /* 16513 */ 0240,0364,0175,034,0300,0320,01,0106,0121,0, + /* 16523 */ 0240,0364,0175,034,0300,0320,01,0104,0121,0, + /* 16533 */ 0240,0364,0175,034,0300,0320,01,0117,0121,0, + /* 16543 */ 0240,0364,0175,034,0300,0320,01,0115,0121,0, + /* 16553 */ 0240,0364,0175,034,0300,0320,01,0114,0121,0, + /* 16563 */ 0240,0364,0175,034,0300,0320,01,0116,0121,0, + /* 16573 */ 0240,0364,0175,034,0300,0320,01,0105,0121,0, + /* 16583 */ 0240,0364,0175,034,0300,0320,01,0101,0121,0, + /* 16593 */ 0240,0364,0175,034,0300,0320,01,0113,0121,0, + /* 16603 */ 0240,0364,0175,034,0300,0320,01,0111,0121,0, + /* 16613 */ 0240,0364,0175,034,0300,0320,01,0100,0121,0, + /* 16623 */ 0240,0364,0175,034,0300,0320,01,0112,0121,0, + /* 16633 */ 0240,0364,0175,034,0300,0320,01,0110,0121,0, + /* 16643 */ 0250,0364,0175,014,0300,0320,01,0107,0110,0, + /* 16653 */ 0250,0364,0175,014,0300,0320,01,0103,0110,0, + /* 16663 */ 0250,0364,0175,014,0300,0320,01,0102,0110,0, + /* 16673 */ 0250,0364,0175,014,0300,0320,01,0106,0110,0, + /* 16683 */ 0250,0364,0175,014,0300,0320,01,0104,0110,0, + /* 16693 */ 0250,0364,0175,014,0300,0320,01,0117,0110,0, + /* 16703 */ 0250,0364,0175,014,0300,0320,01,0115,0110,0, + /* 16713 */ 0250,0364,0175,014,0300,0320,01,0114,0110,0, + /* 16723 */ 0250,0364,0175,014,0300,0320,01,0116,0110,0, + /* 16733 */ 0250,0364,0175,014,0300,0320,01,0105,0110,0, + /* 16743 */ 0250,0364,0175,014,0300,0320,01,0101,0110,0, + /* 16753 */ 0250,0364,0175,014,0300,0320,01,0113,0110,0, + /* 16763 */ 0250,0364,0175,014,0300,0320,01,0111,0110,0, + /* 16773 */ 0250,0364,0175,014,0300,0320,01,0100,0110,0, + /* 16783 */ 0250,0364,0175,014,0300,0320,01,0112,0110,0, + /* 16793 */ 0250,0364,0175,014,0300,0320,01,0110,0110,0, + /* 16803 */ 0240,0364,0175,034,0300,0320,01,0107,0110,0, + /* 16813 */ 0240,0364,0175,034,0300,0320,01,0103,0110,0, + /* 16823 */ 0240,0364,0175,034,0300,0320,01,0102,0110,0, + /* 16833 */ 0240,0364,0175,034,0300,0320,01,0106,0110,0, + /* 16843 */ 0240,0364,0175,034,0300,0320,01,0104,0110,0, + /* 16853 */ 0240,0364,0175,034,0300,0320,01,0117,0110,0, + /* 16863 */ 0240,0364,0175,034,0300,0320,01,0115,0110,0, + /* 16873 */ 0240,0364,0175,034,0300,0320,01,0114,0110,0, + /* 16883 */ 0240,0364,0175,034,0300,0320,01,0116,0110,0, + /* 16893 */ 0240,0364,0175,034,0300,0320,01,0105,0110,0, + /* 16903 */ 0240,0364,0175,034,0300,0320,01,0101,0110,0, + /* 16913 */ 0240,0364,0175,034,0300,0320,01,0113,0110,0, + /* 16923 */ 0240,0364,0175,034,0300,0320,01,0111,0110,0, + /* 16933 */ 0240,0364,0175,034,0300,0320,01,0100,0110,0, + /* 16943 */ 0240,0364,0175,034,0300,0320,01,0112,0110,0, + /* 16953 */ 0240,0364,0175,034,0300,0320,01,0110,0110,0, + /* 16963 */ 0240,0364,0174,034,0300,0321,01,0107,0121,0, + /* 16973 */ 0240,0364,0174,034,0300,0321,01,0103,0121,0, + /* 16983 */ 0240,0364,0174,034,0300,0321,01,0102,0121,0, + /* 16993 */ 0240,0364,0174,034,0300,0321,01,0106,0121,0, + /* 17003 */ 0240,0364,0174,034,0300,0321,01,0104,0121,0, + /* 17013 */ 0240,0364,0174,034,0300,0321,01,0117,0121,0, + /* 17023 */ 0240,0364,0174,034,0300,0321,01,0115,0121,0, + /* 17033 */ 0240,0364,0174,034,0300,0321,01,0114,0121,0, + /* 17043 */ 0240,0364,0174,034,0300,0321,01,0116,0121,0, + /* 17053 */ 0240,0364,0174,034,0300,0321,01,0105,0121,0, + /* 17063 */ 0240,0364,0174,034,0300,0321,01,0101,0121,0, + /* 17073 */ 0240,0364,0174,034,0300,0321,01,0113,0121,0, + /* 17083 */ 0240,0364,0174,034,0300,0321,01,0111,0121,0, + /* 17093 */ 0240,0364,0174,034,0300,0321,01,0100,0121,0, + /* 17103 */ 0240,0364,0174,034,0300,0321,01,0112,0121,0, + /* 17113 */ 0240,0364,0174,034,0300,0321,01,0110,0121,0, + /* 17123 */ 0250,0364,0174,014,0300,0321,01,0107,0110,0, + /* 17133 */ 0250,0364,0174,014,0300,0321,01,0103,0110,0, + /* 17143 */ 0250,0364,0174,014,0300,0321,01,0102,0110,0, + /* 17153 */ 0250,0364,0174,014,0300,0321,01,0106,0110,0, + /* 17163 */ 0250,0364,0174,014,0300,0321,01,0104,0110,0, + /* 17173 */ 0250,0364,0174,014,0300,0321,01,0117,0110,0, + /* 17183 */ 0250,0364,0174,014,0300,0321,01,0115,0110,0, + /* 17193 */ 0250,0364,0174,014,0300,0321,01,0114,0110,0, + /* 17203 */ 0250,0364,0174,014,0300,0321,01,0116,0110,0, + /* 17213 */ 0250,0364,0174,014,0300,0321,01,0105,0110,0, + /* 17223 */ 0250,0364,0174,014,0300,0321,01,0101,0110,0, + /* 17233 */ 0250,0364,0174,014,0300,0321,01,0113,0110,0, + /* 17243 */ 0250,0364,0174,014,0300,0321,01,0111,0110,0, + /* 17253 */ 0250,0364,0174,014,0300,0321,01,0100,0110,0, + /* 17263 */ 0250,0364,0174,014,0300,0321,01,0112,0110,0, + /* 17273 */ 0250,0364,0174,014,0300,0321,01,0110,0110,0, + /* 17283 */ 0240,0364,0174,034,0300,0321,01,0107,0110,0, + /* 17293 */ 0240,0364,0174,034,0300,0321,01,0103,0110,0, + /* 17303 */ 0240,0364,0174,034,0300,0321,01,0102,0110,0, + /* 17313 */ 0240,0364,0174,034,0300,0321,01,0106,0110,0, + /* 17323 */ 0240,0364,0174,034,0300,0321,01,0104,0110,0, + /* 17333 */ 0240,0364,0174,034,0300,0321,01,0117,0110,0, + /* 17343 */ 0240,0364,0174,034,0300,0321,01,0115,0110,0, + /* 17353 */ 0240,0364,0174,034,0300,0321,01,0114,0110,0, + /* 17363 */ 0240,0364,0174,034,0300,0321,01,0116,0110,0, + /* 17373 */ 0240,0364,0174,034,0300,0321,01,0105,0110,0, + /* 17383 */ 0240,0364,0174,034,0300,0321,01,0101,0110,0, + /* 17393 */ 0240,0364,0174,034,0300,0321,01,0113,0110,0, + /* 17403 */ 0240,0364,0174,034,0300,0321,01,0111,0110,0, + /* 17413 */ 0240,0364,0174,034,0300,0321,01,0100,0110,0, + /* 17423 */ 0240,0364,0174,034,0300,0321,01,0112,0110,0, + /* 17433 */ 0240,0364,0174,034,0300,0321,01,0110,0110,0, + /* 17443 */ 0240,0364,0374,034,0300,0324,01,0107,0121,0, + /* 17453 */ 0240,0364,0374,034,0300,0324,01,0103,0121,0, + /* 17463 */ 0240,0364,0374,034,0300,0324,01,0102,0121,0, + /* 17473 */ 0240,0364,0374,034,0300,0324,01,0106,0121,0, + /* 17483 */ 0240,0364,0374,034,0300,0324,01,0104,0121,0, + /* 17493 */ 0240,0364,0374,034,0300,0324,01,0117,0121,0, + /* 17503 */ 0240,0364,0374,034,0300,0324,01,0115,0121,0, + /* 17513 */ 0240,0364,0374,034,0300,0324,01,0114,0121,0, + /* 17523 */ 0240,0364,0374,034,0300,0324,01,0116,0121,0, + /* 17533 */ 0240,0364,0374,034,0300,0324,01,0105,0121,0, + /* 17543 */ 0240,0364,0374,034,0300,0324,01,0101,0121,0, + /* 17553 */ 0240,0364,0374,034,0300,0324,01,0113,0121,0, + /* 17563 */ 0240,0364,0374,034,0300,0324,01,0111,0121,0, + /* 17573 */ 0240,0364,0374,034,0300,0324,01,0100,0121,0, + /* 17583 */ 0240,0364,0374,034,0300,0324,01,0112,0121,0, + /* 17593 */ 0240,0364,0374,034,0300,0324,01,0110,0121,0, + /* 17603 */ 0250,0364,0374,014,0300,0324,01,0107,0110,0, + /* 17613 */ 0250,0364,0374,014,0300,0324,01,0103,0110,0, + /* 17623 */ 0250,0364,0374,014,0300,0324,01,0102,0110,0, + /* 17633 */ 0250,0364,0374,014,0300,0324,01,0106,0110,0, + /* 17643 */ 0250,0364,0374,014,0300,0324,01,0104,0110,0, + /* 17653 */ 0250,0364,0374,014,0300,0324,01,0117,0110,0, + /* 17663 */ 0250,0364,0374,014,0300,0324,01,0115,0110,0, + /* 17673 */ 0250,0364,0374,014,0300,0324,01,0114,0110,0, + /* 17683 */ 0250,0364,0374,014,0300,0324,01,0116,0110,0, + /* 17693 */ 0250,0364,0374,014,0300,0324,01,0105,0110,0, + /* 17703 */ 0250,0364,0374,014,0300,0324,01,0101,0110,0, + /* 17713 */ 0250,0364,0374,014,0300,0324,01,0113,0110,0, + /* 17723 */ 0250,0364,0374,014,0300,0324,01,0111,0110,0, + /* 17733 */ 0250,0364,0374,014,0300,0324,01,0100,0110,0, + /* 17743 */ 0250,0364,0374,014,0300,0324,01,0112,0110,0, + /* 17753 */ 0250,0364,0374,014,0300,0324,01,0110,0110,0, + /* 17763 */ 0240,0364,0374,034,0300,0324,01,0107,0110,0, + /* 17773 */ 0240,0364,0374,034,0300,0324,01,0103,0110,0, + /* 17783 */ 0240,0364,0374,034,0300,0324,01,0102,0110,0, + /* 17793 */ 0240,0364,0374,034,0300,0324,01,0106,0110,0, + /* 17803 */ 0240,0364,0374,034,0300,0324,01,0104,0110,0, + /* 17813 */ 0240,0364,0374,034,0300,0324,01,0117,0110,0, + /* 17823 */ 0240,0364,0374,034,0300,0324,01,0115,0110,0, + /* 17833 */ 0240,0364,0374,034,0300,0324,01,0114,0110,0, + /* 17843 */ 0240,0364,0374,034,0300,0324,01,0116,0110,0, + /* 17853 */ 0240,0364,0374,034,0300,0324,01,0105,0110,0, + /* 17863 */ 0240,0364,0374,034,0300,0324,01,0101,0110,0, + /* 17873 */ 0240,0364,0374,034,0300,0324,01,0113,0110,0, + /* 17883 */ 0240,0364,0374,034,0300,0324,01,0111,0110,0, + /* 17893 */ 0240,0364,0374,034,0300,0324,01,0100,0110,0, + /* 17903 */ 0240,0364,0374,034,0300,0324,01,0112,0110,0, + /* 17913 */ 0240,0364,0374,034,0300,0324,01,0110,0110,0, + /* 17923 */ 0250,0364,0175,010,0300,0320,01,0361,0110,0, + /* 17933 */ 0250,0364,0174,010,0300,0321,01,0361,0110,0, + /* 17943 */ 0250,0364,0374,010,0300,0324,01,0361,0110,0, + /* 17953 */ 0250,0364,0374,010,0300,0324,01,0360,0110,0, + /* 17963 */ 0250,0364,0175,010,0300,0320,01,0210,0110,0, + /* 17973 */ 0250,0364,0174,010,0300,0321,01,0210,0110,0, + /* 17983 */ 0250,0364,0374,010,0300,0324,01,0210,0110,0, + /* 17993 */ 0241,0363,0175,010,0301,01,0104,0120,023,0, + /* 18003 */ 0240,0363,0175,010,0301,01,0104,0110,022,0, + /* 18013 */ 0241,0363,0175,050,0301,01,0104,0120,023,0, + /* 18023 */ 0240,0363,0175,050,0301,01,0104,0110,022,0, + /* 18033 */ 0241,0363,0175,0110,0301,01,0104,0120,023,0, + /* 18043 */ 0240,0363,0175,0110,0301,01,0104,0110,022,0, + /* 18053 */ 0250,0363,0175,010,0300,01,062,0110,022,0, + /* 18063 */ 0250,0363,0375,010,0300,01,062,0110,022,0, + /* 18073 */ 0250,0363,0175,010,0300,01,063,0110,022,0, + /* 18083 */ 0250,0363,0375,010,0300,01,063,0110,022,0, + /* 18093 */ 0250,0363,0175,010,0300,01,060,0110,022,0, + /* 18103 */ 0250,0363,0375,010,0300,01,060,0110,022,0, + /* 18113 */ 0250,0363,0175,010,0300,01,061,0110,022,0, + /* 18123 */ 0250,0363,0375,010,0300,01,061,0110,022,0, + /* 18133 */ 0241,0363,0175,010,0301,01,03,0120,023,0, + /* 18143 */ 0240,0363,0175,010,0301,01,03,0110,022,0, + /* 18153 */ 0241,0363,0175,050,0301,01,03,0120,023,0, + /* 18163 */ 0240,0363,0175,050,0301,01,03,0110,022,0, + /* 18173 */ 0241,0363,0175,0110,0301,01,03,0120,023,0, + /* 18183 */ 0240,0363,0175,0110,0301,01,03,0110,022,0, + /* 18193 */ 0241,0363,0375,010,0301,01,03,0120,023,0, + /* 18203 */ 0240,0363,0375,010,0301,01,03,0110,022,0, + /* 18213 */ 0241,0363,0375,050,0301,01,03,0120,023,0, + /* 18223 */ 0240,0363,0375,050,0301,01,03,0110,022,0, + /* 18233 */ 0241,0363,0375,0110,0301,01,03,0120,023,0, + /* 18243 */ 0240,0363,0375,0110,0301,01,03,0110,022,0, + /* 18253 */ 0241,0361,0375,010,0301,01,0302,0120,023,0, + /* 18263 */ 0241,0361,0375,050,0301,01,0302,0120,023,0, + /* 18273 */ 0241,0361,0375,0110,0301,01,0302,0120,023,0, + /* 18283 */ 0241,0361,0174,010,0301,01,0302,0120,023,0, + /* 18293 */ 0241,0361,0174,050,0301,01,0302,0120,023,0, + /* 18303 */ 0241,0361,0174,0110,0301,01,0302,0120,023,0, + /* 18313 */ 0241,0361,0377,010,0306,01,0302,0120,023,0, + /* 18323 */ 0241,0361,0176,010,0306,01,0302,0120,023,0, + /* 18333 */ 0250,0363,0175,010,0314,01,035,0101,022,0, + /* 18343 */ 0250,0363,0175,050,0314,01,035,0101,022,0, + /* 18353 */ 0250,0363,0175,0110,0314,01,035,0101,022,0, + /* 18363 */ 0241,0363,0175,010,0303,01,0102,0120,023,0, + /* 18373 */ 0240,0363,0175,010,0303,01,0102,0110,022,0, + /* 18383 */ 0241,0363,0175,050,0303,01,0102,0120,023,0, + /* 18393 */ 0240,0363,0175,050,0303,01,0102,0110,022,0, + /* 18403 */ 0241,0363,0175,0110,0303,01,0102,0120,023,0, + /* 18413 */ 0240,0363,0175,0110,0303,01,0102,0110,022,0, + /* 18423 */ 0250,0363,0175,050,0300,01,031,0101,022,0, + /* 18433 */ 0250,0363,0175,0110,0300,01,031,0101,022,0, + /* 18443 */ 0250,0363,0175,050,0312,01,031,0101,022,0, + /* 18453 */ 0250,0363,0175,0110,0312,01,031,0101,022,0, + /* 18463 */ 0250,0363,0175,0110,0300,01,033,0101,022,0, + /* 18473 */ 0250,0363,0175,0110,0313,01,033,0101,022,0, + /* 18483 */ 0250,0363,0375,050,0300,01,031,0101,022,0, + /* 18493 */ 0250,0363,0375,0110,0300,01,031,0101,022,0, + /* 18503 */ 0250,0363,0375,050,0311,01,031,0101,022,0, + /* 18513 */ 0250,0363,0375,0110,0311,01,031,0101,022,0, + /* 18523 */ 0250,0363,0375,0110,0300,01,033,0101,022,0, + /* 18533 */ 0250,0363,0375,0110,0312,01,033,0101,022,0, + /* 18543 */ 0250,0363,0175,050,0300,01,071,0101,022,0, + /* 18553 */ 0250,0363,0175,0110,0300,01,071,0101,022,0, + /* 18563 */ 0250,0363,0175,050,0312,01,071,0101,022,0, + /* 18573 */ 0250,0363,0175,0110,0312,01,071,0101,022,0, + /* 18583 */ 0250,0363,0175,0110,0300,01,073,0101,022,0, + /* 18593 */ 0250,0363,0175,0110,0313,01,073,0101,022,0, + /* 18603 */ 0250,0363,0375,050,0300,01,071,0101,022,0, + /* 18613 */ 0250,0363,0375,0110,0300,01,071,0101,022,0, + /* 18623 */ 0250,0363,0375,050,0311,01,071,0101,022,0, + /* 18633 */ 0250,0363,0375,0110,0311,01,071,0101,022,0, + /* 18643 */ 0250,0363,0375,0110,0300,01,073,0101,022,0, + /* 18653 */ 0250,0363,0375,0110,0312,01,073,0101,022,0, + /* 18663 */ 0250,0363,0175,010,0306,01,027,0101,022,0, + /* 18673 */ 0241,0363,0375,010,0301,01,0124,0120,023,0, + /* 18683 */ 0240,0363,0375,010,0301,01,0124,0110,022,0, + /* 18693 */ 0241,0363,0375,050,0301,01,0124,0120,023,0, + /* 18703 */ 0240,0363,0375,050,0301,01,0124,0110,022,0, + /* 18713 */ 0241,0363,0375,0110,0301,01,0124,0120,023,0, + /* 18723 */ 0240,0363,0375,0110,0301,01,0124,0110,022,0, + /* 18733 */ 0241,0363,0175,010,0301,01,0124,0120,023,0, + /* 18743 */ 0240,0363,0175,010,0301,01,0124,0110,022,0, + /* 18753 */ 0241,0363,0175,050,0301,01,0124,0120,023,0, + /* 18763 */ 0240,0363,0175,050,0301,01,0124,0110,022,0, + /* 18773 */ 0241,0363,0175,0110,0301,01,0124,0120,023,0, + /* 18783 */ 0240,0363,0175,0110,0301,01,0124,0110,022,0, + /* 18793 */ 0241,0363,0375,010,0306,01,0125,0120,023,0, + /* 18803 */ 0240,0363,0375,010,0306,01,0125,0110,022,0, + /* 18813 */ 0241,0363,0175,010,0306,01,0125,0120,023,0, + /* 18823 */ 0240,0363,0175,010,0306,01,0125,0110,022,0, + /* 18833 */ 0250,0363,0375,010,0301,01,0146,0110,022,0, + /* 18843 */ 0250,0363,0375,050,0301,01,0146,0110,022,0, + /* 18853 */ 0250,0363,0375,0110,0301,01,0146,0110,022,0, + /* 18863 */ 0250,0363,0175,010,0301,01,0146,0110,022,0, + /* 18873 */ 0250,0363,0175,050,0301,01,0146,0110,022,0, + /* 18883 */ 0250,0363,0175,0110,0301,01,0146,0110,022,0, + /* 18893 */ 0250,0363,0375,010,0306,01,0147,0110,022,0, + /* 18903 */ 0250,0363,0175,010,0306,01,0147,0110,022,0, + /* 18913 */ 0374,0250,0362,0375,010,0306,01,0222,0110,0, + /* 18923 */ 0374,0250,0362,0375,050,0306,01,0222,0110,0, + /* 18933 */ 0375,0250,0362,0375,0110,0306,01,0222,0110,0, + /* 18943 */ 0374,0250,0362,0175,010,0306,01,0222,0110,0, + /* 18953 */ 0375,0250,0362,0175,050,0306,01,0222,0110,0, + /* 18963 */ 0376,0250,0362,0175,0110,0306,01,0222,0110,0, + /* 18973 */ 0375,0250,0362,0375,0110,0306,01,0306,0201,0, + /* 18983 */ 0376,0250,0362,0175,0110,0306,01,0306,0201,0, + /* 18993 */ 0376,0250,0362,0375,0110,0306,01,0307,0201,0, + /* 19003 */ 0376,0250,0362,0175,0110,0306,01,0307,0201,0, + /* 19013 */ 0375,0250,0362,0375,0110,0306,01,0306,0202,0, + /* 19023 */ 0376,0250,0362,0175,0110,0306,01,0306,0202,0, + /* 19033 */ 0376,0250,0362,0375,0110,0306,01,0307,0202,0, + /* 19043 */ 0376,0250,0362,0175,0110,0306,01,0307,0202,0, + /* 19053 */ 0374,0250,0362,0375,010,0306,01,0223,0110,0, + /* 19063 */ 0375,0250,0362,0375,050,0306,01,0223,0110,0, + /* 19073 */ 0376,0250,0362,0375,0110,0306,01,0223,0110,0, + /* 19083 */ 0374,0250,0362,0175,010,0306,01,0223,0110,0, + /* 19093 */ 0375,0250,0362,0175,050,0306,01,0223,0110,0, + /* 19103 */ 0376,0250,0362,0175,0110,0306,01,0223,0110,0, + /* 19113 */ 0250,0363,0375,010,0301,01,046,0110,022,0, + /* 19123 */ 0250,0363,0375,050,0301,01,046,0110,022,0, + /* 19133 */ 0250,0363,0375,0110,0301,01,046,0110,022,0, + /* 19143 */ 0250,0363,0175,010,0301,01,046,0110,022,0, + /* 19153 */ 0250,0363,0175,050,0301,01,046,0110,022,0, + /* 19163 */ 0250,0363,0175,0110,0301,01,046,0110,022,0, + /* 19173 */ 0241,0363,0375,010,0306,01,047,0120,023,0, + /* 19183 */ 0241,0363,0175,010,0306,01,047,0120,023,0, + /* 19193 */ 0241,0363,0175,050,0312,01,030,0120,023,0, + /* 19203 */ 0240,0363,0175,050,0312,01,030,0110,022,0, + /* 19213 */ 0241,0363,0175,0110,0312,01,030,0120,023,0, + /* 19223 */ 0240,0363,0175,0110,0312,01,030,0110,022,0, + /* 19233 */ 0241,0363,0175,0110,0313,01,032,0120,023,0, + /* 19243 */ 0240,0363,0175,0110,0313,01,032,0110,022,0, + /* 19253 */ 0241,0363,0375,050,0311,01,030,0120,023,0, + /* 19263 */ 0240,0363,0375,050,0311,01,030,0110,022,0, + /* 19273 */ 0241,0363,0375,0110,0311,01,030,0120,023,0, + /* 19283 */ 0240,0363,0375,0110,0311,01,030,0110,022,0, + /* 19293 */ 0241,0363,0375,0110,0312,01,032,0120,023,0, + /* 19303 */ 0240,0363,0375,0110,0312,01,032,0110,022,0, + /* 19313 */ 0241,0363,0175,050,0312,01,070,0120,023,0, + /* 19323 */ 0240,0363,0175,050,0312,01,070,0110,022,0, + /* 19333 */ 0241,0363,0175,0110,0312,01,070,0120,023,0, + /* 19343 */ 0240,0363,0175,0110,0312,01,070,0110,022,0, + /* 19353 */ 0241,0363,0175,0110,0313,01,072,0120,023,0, + /* 19363 */ 0240,0363,0175,0110,0313,01,072,0110,022,0, + /* 19373 */ 0241,0363,0375,050,0311,01,070,0120,023,0, + /* 19383 */ 0240,0363,0375,050,0311,01,070,0110,022,0, + /* 19393 */ 0241,0363,0375,0110,0311,01,070,0120,023,0, + /* 19403 */ 0240,0363,0375,0110,0311,01,070,0110,022,0, + /* 19413 */ 0241,0363,0375,0110,0312,01,072,0120,023,0, + /* 19423 */ 0240,0363,0375,0110,0312,01,072,0110,022,0, + /* 19433 */ 0241,0363,0175,010,0306,01,041,0120,023,0, + /* 19443 */ 0240,0363,0175,010,0306,01,041,0110,022,0, + /* 19453 */ 0241,0363,0175,010,0303,01,017,0120,023,0, + /* 19463 */ 0240,0363,0175,010,0303,01,017,0110,022,0, + /* 19473 */ 0241,0363,0175,050,0303,01,017,0120,023,0, + /* 19483 */ 0240,0363,0175,050,0303,01,017,0110,022,0, + /* 19493 */ 0241,0363,0175,0110,0303,01,017,0120,023,0, + /* 19503 */ 0240,0363,0175,0110,0303,01,017,0110,022,0, + /* 19513 */ 0241,0363,0175,010,0303,01,077,0120,023,0, + /* 19523 */ 0241,0363,0175,050,0303,01,077,0120,023,0, + /* 19533 */ 0241,0363,0175,0110,0303,01,077,0120,023,0, + /* 19543 */ 0241,0363,0175,010,0301,01,037,0120,023,0, + /* 19553 */ 0241,0363,0175,050,0301,01,037,0120,023,0, + /* 19563 */ 0241,0363,0175,0110,0301,01,037,0120,023,0, + /* 19573 */ 0241,0363,0375,010,0301,01,037,0120,023,0, + /* 19583 */ 0241,0363,0375,050,0301,01,037,0120,023,0, + /* 19593 */ 0241,0363,0375,0110,0301,01,037,0120,023,0, + /* 19603 */ 0241,0363,0175,010,0303,01,076,0120,023,0, + /* 19613 */ 0241,0363,0175,050,0303,01,076,0120,023,0, + /* 19623 */ 0241,0363,0175,0110,0303,01,076,0120,023,0, + /* 19633 */ 0241,0363,0175,010,0301,01,036,0120,023,0, + /* 19643 */ 0241,0363,0175,050,0301,01,036,0120,023,0, + /* 19653 */ 0241,0363,0175,0110,0301,01,036,0120,023,0, + /* 19663 */ 0241,0363,0375,010,0301,01,036,0120,023,0, + /* 19673 */ 0241,0363,0375,050,0301,01,036,0120,023,0, + /* 19683 */ 0241,0363,0375,0110,0301,01,036,0120,023,0, + /* 19693 */ 0241,0363,0375,010,0303,01,076,0120,023,0, + /* 19703 */ 0241,0363,0375,050,0303,01,076,0120,023,0, + /* 19713 */ 0241,0363,0375,0110,0303,01,076,0120,023,0, + /* 19723 */ 0241,0363,0375,010,0303,01,077,0120,023,0, + /* 19733 */ 0241,0363,0375,050,0303,01,077,0120,023,0, + /* 19743 */ 0241,0363,0375,0110,0303,01,077,0120,023,0, + /* 19753 */ 0250,0363,0375,010,0301,01,05,0110,022,0, + /* 19763 */ 0250,0363,0375,050,0301,01,05,0110,022,0, + /* 19773 */ 0250,0363,0375,0110,0301,01,05,0110,022,0, + /* 19783 */ 0250,0363,0175,010,0301,01,04,0110,022,0, + /* 19793 */ 0250,0363,0175,050,0301,01,04,0110,022,0, + /* 19803 */ 0250,0363,0175,0110,0301,01,04,0110,022,0, + /* 19813 */ 0250,0363,0375,050,0301,01,01,0110,022,0, + /* 19823 */ 0250,0363,0375,0110,0301,01,01,0110,022,0, + /* 19833 */ 0250,0363,0375,050,0301,01,0,0110,022,0, + /* 19843 */ 0250,0363,0375,0110,0301,01,0,0110,022,0, + /* 19853 */ 0250,0363,0175,010,0304,01,024,0101,022,0, + /* 19863 */ 0250,0363,0175,010,0306,01,026,0101,022,0, + /* 19873 */ 0250,0363,0375,010,0306,01,026,0101,022,0, + /* 19883 */ 0250,0363,0175,010,0305,01,025,0101,022,0, + /* 19893 */ 0250,0361,0175,010,0300,01,0305,0110,022,0, + /* 19903 */ 0374,0250,0362,0175,010,0306,01,0220,0110,0, + /* 19913 */ 0375,0250,0362,0175,050,0306,01,0220,0110,0, + /* 19923 */ 0376,0250,0362,0175,0110,0306,01,0220,0110,0, + /* 19933 */ 0374,0250,0362,0375,010,0306,01,0220,0110,0, + /* 19943 */ 0374,0250,0362,0375,050,0306,01,0220,0110,0, + /* 19953 */ 0375,0250,0362,0375,0110,0306,01,0220,0110,0, + /* 19963 */ 0374,0250,0362,0175,010,0306,01,0221,0110,0, + /* 19973 */ 0375,0250,0362,0175,050,0306,01,0221,0110,0, + /* 19983 */ 0376,0250,0362,0175,0110,0306,01,0221,0110,0, + /* 19993 */ 0374,0250,0362,0375,010,0306,01,0221,0110,0, + /* 20003 */ 0375,0250,0362,0375,050,0306,01,0221,0110,0, + /* 20013 */ 0376,0250,0362,0375,0110,0306,01,0221,0110,0, + /* 20023 */ 0241,0363,0175,010,0304,01,040,0120,023,0, + /* 20033 */ 0240,0363,0175,010,0304,01,040,0110,022,0, + /* 20043 */ 0241,0363,0175,010,0306,01,042,0120,023,0, + /* 20053 */ 0240,0363,0175,010,0306,01,042,0110,022,0, + /* 20063 */ 0241,0363,0375,010,0306,01,042,0120,023,0, + /* 20073 */ 0240,0363,0375,010,0306,01,042,0110,022,0, + /* 20083 */ 0241,0361,0175,010,0305,01,0304,0120,023,0, + /* 20093 */ 0240,0361,0175,010,0305,01,0304,0110,022,0, + /* 20103 */ 0240,0361,0175,010,0301,01,0162,0211,022,0, + /* 20113 */ 0240,0361,0175,010,0301,01,0162,0201,021,0, + /* 20123 */ 0240,0361,0175,050,0301,01,0162,0211,022,0, + /* 20133 */ 0240,0361,0175,050,0301,01,0162,0201,021,0, + /* 20143 */ 0240,0361,0175,0110,0301,01,0162,0211,022,0, + /* 20153 */ 0240,0361,0175,0110,0301,01,0162,0201,021,0, + /* 20163 */ 0240,0361,0375,010,0301,01,0162,0211,022,0, + /* 20173 */ 0240,0361,0375,010,0301,01,0162,0201,021,0, + /* 20183 */ 0240,0361,0375,050,0301,01,0162,0211,022,0, + /* 20193 */ 0240,0361,0375,050,0301,01,0162,0201,021,0, + /* 20203 */ 0240,0361,0375,0110,0301,01,0162,0211,022,0, + /* 20213 */ 0240,0361,0375,0110,0301,01,0162,0201,021,0, + /* 20223 */ 0240,0361,0175,010,0301,01,0162,0210,022,0, + /* 20233 */ 0240,0361,0175,010,0301,01,0162,0200,021,0, + /* 20243 */ 0240,0361,0175,050,0301,01,0162,0210,022,0, + /* 20253 */ 0240,0361,0175,050,0301,01,0162,0200,021,0, + /* 20263 */ 0240,0361,0175,0110,0301,01,0162,0210,022,0, + /* 20273 */ 0240,0361,0175,0110,0301,01,0162,0200,021,0, + /* 20283 */ 0240,0361,0375,010,0301,01,0162,0210,022,0, + /* 20293 */ 0240,0361,0375,010,0301,01,0162,0200,021,0, + /* 20303 */ 0240,0361,0375,050,0301,01,0162,0210,022,0, + /* 20313 */ 0240,0361,0375,050,0301,01,0162,0200,021,0, + /* 20323 */ 0240,0361,0375,0110,0301,01,0162,0210,022,0, + /* 20333 */ 0240,0361,0375,0110,0301,01,0162,0200,021,0, + /* 20343 */ 0374,0250,0362,0175,010,0306,01,0240,0101,0, + /* 20353 */ 0375,0250,0362,0175,050,0306,01,0240,0101,0, + /* 20363 */ 0376,0250,0362,0175,0110,0306,01,0240,0101,0, + /* 20373 */ 0374,0250,0362,0375,010,0306,01,0240,0101,0, + /* 20383 */ 0374,0250,0362,0375,050,0306,01,0240,0101,0, + /* 20393 */ 0375,0250,0362,0375,0110,0306,01,0240,0101,0, + /* 20403 */ 0374,0250,0362,0175,010,0306,01,0241,0101,0, + /* 20413 */ 0375,0250,0362,0175,050,0306,01,0241,0101,0, + /* 20423 */ 0376,0250,0362,0175,0110,0306,01,0241,0101,0, + /* 20433 */ 0374,0250,0362,0375,010,0306,01,0241,0101,0, + /* 20443 */ 0375,0250,0362,0375,050,0306,01,0241,0101,0, + /* 20453 */ 0376,0250,0362,0375,0110,0306,01,0241,0101,0, + /* 20463 */ 0250,0361,0175,010,0301,01,0160,0110,022,0, + /* 20473 */ 0250,0361,0175,050,0301,01,0160,0110,022,0, + /* 20483 */ 0250,0361,0175,0110,0301,01,0160,0110,022,0, + /* 20493 */ 0250,0361,0176,010,0303,01,0160,0110,022,0, + /* 20503 */ 0250,0361,0176,050,0303,01,0160,0110,022,0, + /* 20513 */ 0250,0361,0176,0110,0303,01,0160,0110,022,0, + /* 20523 */ 0250,0361,0177,010,0303,01,0160,0110,022,0, + /* 20533 */ 0250,0361,0177,050,0303,01,0160,0110,022,0, + /* 20543 */ 0250,0361,0177,0110,0303,01,0160,0110,022,0, + /* 20553 */ 0240,0361,0175,010,0301,01,0162,0216,022,0, + /* 20563 */ 0240,0361,0175,010,0301,01,0162,0206,021,0, + /* 20573 */ 0240,0361,0175,050,0301,01,0162,0216,022,0, + /* 20583 */ 0240,0361,0175,050,0301,01,0162,0206,021,0, + /* 20593 */ 0240,0361,0175,0110,0301,01,0162,0216,022,0, + /* 20603 */ 0240,0361,0175,0110,0301,01,0162,0206,021,0, + /* 20613 */ 0240,0361,0175,010,0303,01,0163,0217,022,0, + /* 20623 */ 0240,0361,0175,010,0303,01,0163,0207,021,0, + /* 20633 */ 0240,0361,0175,050,0303,01,0163,0217,022,0, + /* 20643 */ 0240,0361,0175,050,0303,01,0163,0207,021,0, + /* 20653 */ 0240,0361,0175,0110,0303,01,0163,0217,022,0, + /* 20663 */ 0240,0361,0175,0110,0303,01,0163,0207,021,0, + /* 20673 */ 0240,0361,0375,010,0301,01,0163,0216,022,0, + /* 20683 */ 0240,0361,0375,010,0301,01,0163,0206,021,0, + /* 20693 */ 0240,0361,0375,050,0301,01,0163,0216,022,0, + /* 20703 */ 0240,0361,0375,050,0301,01,0163,0206,021,0, + /* 20713 */ 0240,0361,0375,0110,0301,01,0163,0216,022,0, + /* 20723 */ 0240,0361,0375,0110,0301,01,0163,0206,021,0, + /* 20733 */ 0240,0361,0175,010,0303,01,0161,0216,022,0, + /* 20743 */ 0240,0361,0175,010,0303,01,0161,0206,021,0, + /* 20753 */ 0240,0361,0175,050,0303,01,0161,0216,022,0, + /* 20763 */ 0240,0361,0175,050,0303,01,0161,0206,021,0, + /* 20773 */ 0240,0361,0175,0110,0303,01,0161,0216,022,0, + /* 20783 */ 0240,0361,0175,0110,0303,01,0161,0206,021,0, + /* 20793 */ 0240,0361,0175,010,0301,01,0162,0214,022,0, + /* 20803 */ 0240,0361,0175,010,0301,01,0162,0204,021,0, + /* 20813 */ 0240,0361,0175,050,0301,01,0162,0214,022,0, + /* 20823 */ 0240,0361,0175,050,0301,01,0162,0204,021,0, + /* 20833 */ 0240,0361,0175,0110,0301,01,0162,0214,022,0, + /* 20843 */ 0240,0361,0175,0110,0301,01,0162,0204,021,0, + /* 20853 */ 0240,0361,0375,010,0301,01,0162,0214,022,0, + /* 20863 */ 0240,0361,0375,010,0301,01,0162,0204,021,0, + /* 20873 */ 0240,0361,0375,050,0301,01,0162,0214,022,0, + /* 20883 */ 0240,0361,0375,050,0301,01,0162,0204,021,0, + /* 20893 */ 0240,0361,0375,0110,0301,01,0162,0214,022,0, + /* 20903 */ 0240,0361,0375,0110,0301,01,0162,0204,021,0, + /* 20913 */ 0240,0361,0175,010,0303,01,0161,0214,022,0, + /* 20923 */ 0240,0361,0175,010,0303,01,0161,0204,021,0, + /* 20933 */ 0240,0361,0175,050,0303,01,0161,0214,022,0, + /* 20943 */ 0240,0361,0175,050,0303,01,0161,0204,021,0, + /* 20953 */ 0240,0361,0175,0110,0303,01,0161,0214,022,0, + /* 20963 */ 0240,0361,0175,0110,0303,01,0161,0204,021,0, + /* 20973 */ 0240,0361,0175,010,0301,01,0162,0212,022,0, + /* 20983 */ 0240,0361,0175,010,0301,01,0162,0202,021,0, + /* 20993 */ 0240,0361,0175,050,0301,01,0162,0212,022,0, + /* 21003 */ 0240,0361,0175,050,0301,01,0162,0202,021,0, + /* 21013 */ 0240,0361,0175,0110,0301,01,0162,0212,022,0, + /* 21023 */ 0240,0361,0175,0110,0301,01,0162,0202,021,0, + /* 21033 */ 0240,0361,0175,010,0303,01,0163,0213,022,0, + /* 21043 */ 0240,0361,0175,010,0303,01,0163,0203,021,0, + /* 21053 */ 0240,0361,0175,050,0303,01,0163,0213,022,0, + /* 21063 */ 0240,0361,0175,050,0303,01,0163,0203,021,0, + /* 21073 */ 0240,0361,0175,0110,0303,01,0163,0213,022,0, + /* 21083 */ 0240,0361,0175,0110,0303,01,0163,0203,021,0, + /* 21093 */ 0240,0361,0375,010,0301,01,0163,0212,022,0, + /* 21103 */ 0240,0361,0375,010,0301,01,0163,0202,021,0, + /* 21113 */ 0240,0361,0375,050,0301,01,0163,0212,022,0, + /* 21123 */ 0240,0361,0375,050,0301,01,0163,0202,021,0, + /* 21133 */ 0240,0361,0375,0110,0301,01,0163,0212,022,0, + /* 21143 */ 0240,0361,0375,0110,0301,01,0163,0202,021,0, + /* 21153 */ 0240,0361,0175,010,0303,01,0161,0212,022,0, + /* 21163 */ 0240,0361,0175,010,0303,01,0161,0202,021,0, + /* 21173 */ 0240,0361,0175,050,0303,01,0161,0212,022,0, + /* 21183 */ 0240,0361,0175,050,0303,01,0161,0202,021,0, + /* 21193 */ 0240,0361,0175,0110,0303,01,0161,0212,022,0, + /* 21203 */ 0240,0361,0175,0110,0303,01,0161,0202,021,0, + /* 21213 */ 0241,0363,0175,010,0301,01,045,0120,023,0, + /* 21223 */ 0241,0363,0175,050,0301,01,045,0120,023,0, + /* 21233 */ 0241,0363,0175,0110,0301,01,045,0120,023,0, + /* 21243 */ 0241,0363,0375,010,0301,01,045,0120,023,0, + /* 21253 */ 0241,0363,0375,050,0301,01,045,0120,023,0, + /* 21263 */ 0241,0363,0375,0110,0301,01,045,0120,023,0, + /* 21273 */ 0241,0363,0375,010,0301,01,0120,0120,023,0, + /* 21283 */ 0240,0363,0375,010,0301,01,0120,0110,022,0, + /* 21293 */ 0241,0363,0375,050,0301,01,0120,0120,023,0, + /* 21303 */ 0240,0363,0375,050,0301,01,0120,0110,022,0, + /* 21313 */ 0241,0363,0375,0110,0301,01,0120,0120,023,0, + /* 21323 */ 0240,0363,0375,0110,0301,01,0120,0110,022,0, + /* 21333 */ 0241,0363,0175,010,0301,01,0120,0120,023,0, + /* 21343 */ 0240,0363,0175,010,0301,01,0120,0110,022,0, + /* 21353 */ 0241,0363,0175,050,0301,01,0120,0120,023,0, + /* 21363 */ 0240,0363,0175,050,0301,01,0120,0110,022,0, + /* 21373 */ 0241,0363,0175,0110,0301,01,0120,0120,023,0, + /* 21383 */ 0240,0363,0175,0110,0301,01,0120,0110,022,0, + /* 21393 */ 0241,0363,0375,010,0306,01,0121,0120,023,0, + /* 21403 */ 0240,0363,0375,010,0306,01,0121,0110,022,0, + /* 21413 */ 0241,0363,0175,010,0306,01,0121,0120,023,0, + /* 21423 */ 0240,0363,0175,010,0306,01,0121,0110,022,0, + /* 21433 */ 0250,0363,0375,010,0301,01,0126,0110,022,0, + /* 21443 */ 0250,0363,0375,050,0301,01,0126,0110,022,0, + /* 21453 */ 0250,0363,0375,0110,0301,01,0126,0110,022,0, + /* 21463 */ 0250,0363,0175,010,0301,01,0126,0110,022,0, + /* 21473 */ 0250,0363,0175,050,0301,01,0126,0110,022,0, + /* 21483 */ 0250,0363,0175,0110,0301,01,0126,0110,022,0, + /* 21493 */ 0241,0363,0375,010,0306,01,0127,0120,023,0, + /* 21503 */ 0240,0363,0375,010,0306,01,0127,0110,022,0, + /* 21513 */ 0241,0363,0175,010,0306,01,0127,0120,023,0, + /* 21523 */ 0240,0363,0175,010,0306,01,0127,0110,022,0, + /* 21533 */ 0250,0363,0375,010,0301,01,011,0110,022,0, + /* 21543 */ 0250,0363,0375,050,0301,01,011,0110,022,0, + /* 21553 */ 0250,0363,0375,0110,0301,01,011,0110,022,0, + /* 21563 */ 0250,0363,0174,010,0301,01,010,0110,022,0, + /* 21573 */ 0250,0363,0174,050,0301,01,010,0110,022,0, + /* 21583 */ 0250,0363,0174,0110,0301,01,010,0110,022,0, + /* 21593 */ 0250,0363,0175,010,0301,01,010,0110,022,0, + /* 21603 */ 0250,0363,0175,050,0301,01,010,0110,022,0, + /* 21613 */ 0250,0363,0175,0110,0301,01,010,0110,022,0, + /* 21623 */ 0241,0363,0375,010,0306,01,013,0120,023,0, + /* 21633 */ 0240,0363,0375,010,0306,01,013,0110,022,0, + /* 21643 */ 0241,0363,0174,010,0306,01,012,0120,023,0, + /* 21653 */ 0240,0363,0174,010,0306,01,012,0110,022,0, + /* 21663 */ 0241,0363,0175,010,0306,01,012,0120,023,0, + /* 21673 */ 0240,0363,0175,010,0306,01,012,0110,022,0, + /* 21683 */ 0374,0250,0362,0375,010,0306,01,0242,0101,0, + /* 21693 */ 0374,0250,0362,0375,050,0306,01,0242,0101,0, + /* 21703 */ 0375,0250,0362,0375,0110,0306,01,0242,0101,0, + /* 21713 */ 0374,0250,0362,0175,010,0306,01,0242,0101,0, + /* 21723 */ 0375,0250,0362,0175,050,0306,01,0242,0101,0, + /* 21733 */ 0376,0250,0362,0175,0110,0306,01,0242,0101,0, + /* 21743 */ 0375,0250,0362,0375,0110,0306,01,0306,0205,0, + /* 21753 */ 0376,0250,0362,0175,0110,0306,01,0306,0205,0, + /* 21763 */ 0376,0250,0362,0375,0110,0306,01,0307,0205,0, + /* 21773 */ 0376,0250,0362,0175,0110,0306,01,0307,0205,0, + /* 21783 */ 0375,0250,0362,0375,0110,0306,01,0306,0206,0, + /* 21793 */ 0376,0250,0362,0175,0110,0306,01,0306,0206,0, + /* 21803 */ 0376,0250,0362,0375,0110,0306,01,0307,0206,0, + /* 21813 */ 0376,0250,0362,0175,0110,0306,01,0307,0206,0, + /* 21823 */ 0374,0250,0362,0375,010,0306,01,0243,0101,0, + /* 21833 */ 0375,0250,0362,0375,050,0306,01,0243,0101,0, + /* 21843 */ 0376,0250,0362,0375,0110,0306,01,0243,0101,0, + /* 21853 */ 0374,0250,0362,0175,010,0306,01,0243,0101,0, + /* 21863 */ 0375,0250,0362,0175,050,0306,01,0243,0101,0, + /* 21873 */ 0376,0250,0362,0175,0110,0306,01,0243,0101,0, + /* 21883 */ 0241,0363,0175,050,0301,01,043,0120,023,0, + /* 21893 */ 0240,0363,0175,050,0301,01,043,0110,022,0, + /* 21903 */ 0241,0363,0175,0110,0301,01,043,0120,023,0, + /* 21913 */ 0240,0363,0175,0110,0301,01,043,0110,022,0, + /* 21923 */ 0241,0363,0375,050,0301,01,043,0120,023,0, + /* 21933 */ 0240,0363,0375,050,0301,01,043,0110,022,0, + /* 21943 */ 0241,0363,0375,0110,0301,01,043,0120,023,0, + /* 21953 */ 0240,0363,0375,0110,0301,01,043,0110,022,0, + /* 21963 */ 0241,0363,0175,050,0301,01,0103,0120,023,0, + /* 21973 */ 0240,0363,0175,050,0301,01,0103,0110,022,0, + /* 21983 */ 0241,0363,0175,0110,0301,01,0103,0120,023,0, + /* 21993 */ 0240,0363,0175,0110,0301,01,0103,0110,022,0, + /* 22003 */ 0241,0363,0375,050,0301,01,0103,0120,023,0, + /* 22013 */ 0240,0363,0375,050,0301,01,0103,0110,022,0, + /* 22023 */ 0241,0363,0375,0110,0301,01,0103,0120,023,0, + /* 22033 */ 0240,0363,0375,0110,0301,01,0103,0110,022,0, + /* 22043 */ 0241,0361,0375,010,0301,01,0306,0120,023,0, + /* 22053 */ 0240,0361,0375,010,0301,01,0306,0110,022,0, + /* 22063 */ 0241,0361,0375,050,0301,01,0306,0120,023,0, + /* 22073 */ 0240,0361,0375,050,0301,01,0306,0110,022,0, + /* 22083 */ 0241,0361,0375,0110,0301,01,0306,0120,023,0, + /* 22093 */ 0240,0361,0375,0110,0301,01,0306,0110,022,0, + /* 22103 */ 0241,0361,0174,010,0301,01,0306,0120,023,0, + /* 22113 */ 0240,0361,0174,010,0301,01,0306,0110,022,0, + /* 22123 */ 0241,0361,0174,050,0301,01,0306,0120,023,0, + /* 22133 */ 0240,0361,0174,050,0301,01,0306,0110,022,0, + /* 22143 */ 0241,0361,0174,0110,0301,01,0306,0120,023,0, + /* 22153 */ 0240,0361,0174,0110,0301,01,0306,0110,022,0, + /* 22163 */ 0241,0363,0375,010,0301,01,0317,0120,023,0, + /* 22173 */ 0240,0363,0375,010,0301,01,0317,0110,022,0, + /* 22183 */ 0241,0363,0375,050,0301,01,0317,0120,023,0, + /* 22193 */ 0240,0363,0375,050,0301,01,0317,0110,022,0, + /* 22203 */ 0241,0363,0375,0110,0301,01,0317,0120,023,0, + /* 22213 */ 0240,0363,0375,0110,0301,01,0317,0110,022,0, + /* 22223 */ 0241,0363,0375,010,0301,01,0316,0120,023,0, + /* 22233 */ 0240,0363,0375,010,0301,01,0316,0110,022,0, + /* 22243 */ 0241,0363,0375,050,0301,01,0316,0120,023,0, + /* 22253 */ 0240,0363,0375,050,0301,01,0316,0110,022,0, + /* 22263 */ 0241,0363,0375,0110,0301,01,0316,0120,023,0, + /* 22273 */ 0240,0363,0375,0110,0301,01,0316,0110,022,0, + /* 22283 */ 0241,0363,0375,010,0303,01,0160,0120,023,0, + /* 22293 */ 0240,0363,0375,010,0303,01,0160,0110,022,0, + /* 22303 */ 0241,0363,0375,050,0303,01,0160,0120,023,0, + /* 22313 */ 0240,0363,0375,050,0303,01,0160,0110,022,0, + /* 22323 */ 0241,0363,0375,0110,0303,01,0160,0120,023,0, + /* 22333 */ 0240,0363,0375,0110,0303,01,0160,0110,022,0, + /* 22343 */ 0241,0363,0175,010,0301,01,0161,0120,023,0, + /* 22353 */ 0240,0363,0175,010,0301,01,0161,0110,022,0, + /* 22363 */ 0241,0363,0175,050,0301,01,0161,0120,023,0, + /* 22373 */ 0240,0363,0175,050,0301,01,0161,0110,022,0, + /* 22383 */ 0241,0363,0175,0110,0301,01,0161,0120,023,0, + /* 22393 */ 0240,0363,0175,0110,0301,01,0161,0110,022,0, + /* 22403 */ 0241,0363,0375,010,0301,01,0161,0120,023,0, + /* 22413 */ 0240,0363,0375,010,0301,01,0161,0110,022,0, + /* 22423 */ 0241,0363,0375,050,0301,01,0161,0120,023,0, + /* 22433 */ 0240,0363,0375,050,0301,01,0161,0110,022,0, + /* 22443 */ 0241,0363,0375,0110,0301,01,0161,0120,023,0, + /* 22453 */ 0240,0363,0375,0110,0301,01,0161,0110,022,0, + /* 22463 */ 0241,0363,0375,010,0303,01,0162,0120,023,0, + /* 22473 */ 0240,0363,0375,010,0303,01,0162,0110,022,0, + /* 22483 */ 0241,0363,0375,050,0303,01,0162,0120,023,0, + /* 22493 */ 0240,0363,0375,050,0303,01,0162,0110,022,0, + /* 22503 */ 0241,0363,0375,0110,0303,01,0162,0120,023,0, + /* 22513 */ 0240,0363,0375,0110,0303,01,0162,0110,022,0, + /* 22523 */ 0241,0363,0175,010,0301,01,0163,0120,023,0, + /* 22533 */ 0240,0363,0175,010,0301,01,0163,0110,022,0, + /* 22543 */ 0241,0363,0175,050,0301,01,0163,0120,023,0, + /* 22553 */ 0240,0363,0175,050,0301,01,0163,0110,022,0, + /* 22563 */ 0241,0363,0175,0110,0301,01,0163,0120,023,0, + /* 22573 */ 0240,0363,0175,0110,0301,01,0163,0110,022,0, + /* 22583 */ 0241,0363,0375,010,0301,01,0163,0120,023,0, + /* 22593 */ 0240,0363,0375,010,0301,01,0163,0110,022,0, + /* 22603 */ 0241,0363,0375,050,0301,01,0163,0120,023,0, + /* 22613 */ 0240,0363,0375,050,0301,01,0163,0110,022,0, + /* 22623 */ 0241,0363,0375,0110,0301,01,0163,0120,023,0, + /* 22633 */ 0240,0363,0375,0110,0301,01,0163,0110,022,0, + /* 22643 */ 0250,0363,0176,0110,0300,01,07,0110,022,0, + /* 22653 */ 0250,0363,0177,0110,0300,01,07,0110,022,0, + /* 22663 */ 0250,0363,0176,0110,0300,01,0167,0110,022,0, + /* 22673 */ 0250,0363,0174,0110,0300,01,07,0110,022,0, + /* 22683 */ 0250,0363,0177,0110,0300,01,0167,0110,022,0, + /* 22693 */ 0250,0363,0175,0110,0300,01,07,0110,022,0, + /* 22703 */ 0241,0363,0174,010,0301,01,0302,0120,023,0, + /* 22713 */ 0240,0363,0174,010,0301,01,0302,0110,022,0, + /* 22723 */ 0241,0363,0174,050,0301,01,0302,0120,023,0, + /* 22733 */ 0240,0363,0174,050,0301,01,0302,0110,022,0, + /* 22743 */ 0241,0363,0174,0110,0301,01,0302,0120,023,0, + /* 22753 */ 0240,0363,0174,0110,0301,01,0302,0110,022,0, + /* 22763 */ 0241,0363,0176,010,0305,01,0302,0120,023,0, + /* 22773 */ 0240,0363,0176,010,0305,01,0302,0110,022,0, + /* 22783 */ 0250,0363,0174,010,0301,01,0146,0110,022,0, + /* 22793 */ 0250,0363,0174,050,0301,01,0146,0110,022,0, + /* 22803 */ 0250,0363,0174,0110,0301,01,0146,0110,022,0, + /* 22813 */ 0250,0363,0174,010,0306,01,0147,0110,022,0, + /* 22823 */ 0250,0363,0174,010,0301,01,046,0110,022,0, + /* 22833 */ 0250,0363,0174,050,0301,01,046,0110,022,0, + /* 22843 */ 0250,0363,0174,0110,0301,01,046,0110,022,0, + /* 22853 */ 0241,0363,0174,010,0306,01,047,0120,023,0, + /* 22863 */ 0250,0363,0174,010,0301,01,0126,0110,022,0, + /* 22873 */ 0250,0363,0174,050,0301,01,0126,0110,022,0, + /* 22883 */ 0250,0363,0174,0110,0301,01,0126,0110,022,0, + /* 22893 */ 0241,0363,0174,010,0306,01,0127,0120,023,0, + /* 22903 */ 0240,0363,0174,010,0306,01,0127,0110,022,0, + /* 22913 */ 0250,0364,0174,010,0300,0321,01,0374,0101,0, + /* 22923 */ 0250,0364,0374,010,0300,0324,01,0374,0101,0, + /* 22933 */ 0250,0364,0175,010,0300,0321,01,0374,0101,0, + /* 22943 */ 0250,0364,0375,010,0300,0324,01,0374,0101,0, + /* 22953 */ 0250,0364,0177,010,0300,0321,01,0374,0101,0, + /* 22963 */ 0250,0364,0377,010,0300,0324,01,0374,0101,0, + /* 22973 */ 0250,0364,0176,010,0300,0321,01,0374,0101,0, + /* 22983 */ 0250,0364,0376,010,0300,0324,01,0374,0101,0, + /* 22993 */ 0241,0363,0177,010,0301,01,0302,0120,023,0, + /* 23003 */ 0241,0363,0177,050,0301,01,0302,0120,023,0, + /* 23013 */ 0241,0363,0177,0110,0301,01,0302,0120,023,0, + /* 23023 */ 0250,0363,0177,010,0301,01,0146,0110,022,0, + /* 23033 */ 0250,0363,0177,050,0301,01,0146,0110,022,0, + /* 23043 */ 0250,0363,0177,0110,0301,01,0146,0110,022,0, + /* 23053 */ 0250,0363,0177,010,0301,01,046,0110,022,0, + /* 23063 */ 0250,0363,0177,050,0301,01,046,0110,022,0, + /* 23073 */ 0250,0363,0177,0110,0301,01,046,0110,022,0, + /* 23083 */ 0250,0363,0177,010,0301,01,0126,0110,022,0, + /* 23093 */ 0250,0363,0177,050,0301,01,0126,0110,022,0, + /* 23103 */ 0250,0363,0177,0110,0301,01,0126,0110,022,0, + /* 23113 */ 0250,0363,0177,010,0301,01,010,0110,022,0, + /* 23123 */ 0250,0363,0177,050,0301,01,010,0110,022,0, + /* 23133 */ 0250,0363,0177,0110,0301,01,010,0110,022,0, + /* 23143 */ 0241,0363,0176,010,0303,01,0102,0120,023,0, + /* 23153 */ 0241,0363,0176,050,0303,01,0102,0120,023,0, + /* 23163 */ 0241,0363,0176,0110,0303,01,0102,0120,023,0, + /* 23173 */ 0241,0363,0177,010,0301,01,0122,0120,023,0, + /* 23183 */ 0241,0363,0177,050,0301,01,0122,0120,023,0, + /* 23193 */ 0241,0363,0177,0110,0301,01,0122,0120,023,0, + /* 23203 */ 0241,0363,0375,010,0301,01,0122,0120,023,0, + /* 23213 */ 0241,0363,0375,050,0301,01,0122,0120,023,0, + /* 23223 */ 0241,0363,0375,0110,0301,01,0122,0120,023,0, + /* 23233 */ 0241,0363,0174,010,0301,01,0122,0120,023,0, + /* 23243 */ 0241,0363,0174,050,0301,01,0122,0120,023,0, + /* 23253 */ 0241,0363,0174,0110,0301,01,0122,0120,023,0, + /* 23263 */ 0241,0363,0175,010,0301,01,0122,0120,023,0, + /* 23273 */ 0241,0363,0175,050,0301,01,0122,0120,023,0, + /* 23283 */ 0241,0363,0175,0110,0301,01,0122,0120,023,0, + /* 23293 */ 0241,0363,0375,010,0306,01,0123,0120,023,0, + /* 23303 */ 0241,0363,0174,010,0306,01,0123,0120,023,0, + /* 23313 */ 0241,0363,0175,010,0306,01,0123,0120,023,0, + /* 23323 */ 0250,0364,0174,010,0300,01,0212,0110,0, + /* 23332 */ 0240,0364,0174,030,0300,01,02,0121,0, + /* 23341 */ 0250,0364,0174,010,0300,01,02,0110,0, + /* 23350 */ 0240,0364,0174,030,0300,01,02,0110,0, + /* 23359 */ 0240,0364,0174,030,0300,01,0,0112,0, + /* 23368 */ 0250,0364,0174,010,0300,01,0,0101,0, + /* 23377 */ 0240,0364,0174,030,0300,01,0,0101,0, + /* 23386 */ 0240,0364,0174,030,0300,01,012,0121,0, + /* 23395 */ 0250,0364,0174,010,0300,01,012,0110,0, + /* 23404 */ 0240,0364,0174,030,0300,01,012,0110,0, + /* 23413 */ 0240,0364,0174,030,0300,01,010,0112,0, + /* 23422 */ 0250,0364,0174,010,0300,01,010,0101,0, + /* 23431 */ 0240,0364,0174,030,0300,01,010,0101,0, + /* 23440 */ 0240,0364,0174,030,0300,01,022,0121,0, + /* 23449 */ 0250,0364,0174,010,0300,01,022,0110,0, + /* 23458 */ 0240,0364,0174,030,0300,01,022,0110,0, + /* 23467 */ 0240,0364,0174,030,0300,01,020,0112,0, + /* 23476 */ 0250,0364,0174,010,0300,01,020,0101,0, + /* 23485 */ 0240,0364,0174,030,0300,01,020,0101,0, + /* 23494 */ 0240,0364,0174,030,0300,01,032,0121,0, + /* 23503 */ 0250,0364,0174,010,0300,01,032,0110,0, + /* 23512 */ 0240,0364,0174,030,0300,01,032,0110,0, + /* 23521 */ 0240,0364,0174,030,0300,01,030,0112,0, + /* 23530 */ 0250,0364,0174,010,0300,01,030,0101,0, + /* 23539 */ 0240,0364,0174,030,0300,01,030,0101,0, + /* 23548 */ 0240,0364,0174,030,0300,01,042,0121,0, + /* 23557 */ 0250,0364,0174,010,0300,01,042,0110,0, + /* 23566 */ 0240,0364,0174,030,0300,01,042,0110,0, + /* 23575 */ 0240,0364,0174,030,0300,01,040,0112,0, + /* 23584 */ 0250,0364,0174,010,0300,01,040,0101,0, + /* 23593 */ 0240,0364,0174,030,0300,01,040,0101,0, + /* 23602 */ 0240,0364,0174,030,0300,01,052,0121,0, + /* 23611 */ 0250,0364,0174,010,0300,01,052,0110,0, + /* 23620 */ 0240,0364,0174,030,0300,01,052,0110,0, + /* 23629 */ 0240,0364,0174,030,0300,01,050,0112,0, + /* 23638 */ 0250,0364,0174,010,0300,01,050,0101,0, + /* 23647 */ 0240,0364,0174,030,0300,01,050,0101,0, + /* 23656 */ 0240,0364,0174,030,0300,01,062,0121,0, + /* 23665 */ 0250,0364,0174,010,0300,01,062,0110,0, + /* 23674 */ 0240,0364,0174,030,0300,01,062,0110,0, + /* 23683 */ 0240,0364,0174,030,0300,01,060,0112,0, + /* 23692 */ 0250,0364,0174,010,0300,01,060,0101,0, + /* 23701 */ 0240,0364,0174,030,0300,01,060,0101,0, + /* 23710 */ 0240,0364,0174,030,0300,01,0320,0210,0, + /* 23719 */ 0250,0364,0174,010,0300,01,0320,0200,0, + /* 23728 */ 0240,0364,0174,030,0300,01,0320,0200,0, + /* 23737 */ 0240,0364,0174,030,0300,01,0322,0210,0, + /* 23746 */ 0250,0364,0174,010,0300,01,0322,0200,0, + /* 23755 */ 0240,0364,0174,030,0300,01,0322,0200,0, + /* 23764 */ 0240,0364,0174,030,0300,01,0320,0211,0, + /* 23773 */ 0250,0364,0174,010,0300,01,0320,0201,0, + /* 23782 */ 0240,0364,0174,030,0300,01,0320,0201,0, + /* 23791 */ 0240,0364,0174,030,0300,01,0322,0211,0, + /* 23800 */ 0250,0364,0174,010,0300,01,0322,0201,0, + /* 23809 */ 0240,0364,0174,030,0300,01,0322,0201,0, + /* 23818 */ 0240,0364,0174,030,0300,01,0320,0212,0, + /* 23827 */ 0250,0364,0174,010,0300,01,0320,0202,0, + /* 23836 */ 0240,0364,0174,030,0300,01,0320,0202,0, + /* 23845 */ 0240,0364,0174,030,0300,01,0322,0212,0, + /* 23854 */ 0250,0364,0174,010,0300,01,0322,0202,0, + /* 23863 */ 0240,0364,0174,030,0300,01,0322,0202,0, + /* 23872 */ 0240,0364,0174,030,0300,01,0320,0213,0, + /* 23881 */ 0250,0364,0174,010,0300,01,0320,0203,0, + /* 23890 */ 0240,0364,0174,030,0300,01,0320,0203,0, + /* 23899 */ 0240,0364,0174,030,0300,01,0322,0213,0, + /* 23908 */ 0250,0364,0174,010,0300,01,0322,0203,0, + /* 23917 */ 0240,0364,0174,030,0300,01,0322,0203,0, + /* 23926 */ 0240,0364,0174,030,0300,01,0320,0214,0, + /* 23935 */ 0250,0364,0174,010,0300,01,0320,0204,0, + /* 23944 */ 0240,0364,0174,030,0300,01,0320,0204,0, + /* 23953 */ 0240,0364,0174,030,0300,01,0322,0214,0, + /* 23962 */ 0250,0364,0174,010,0300,01,0322,0204,0, + /* 23971 */ 0240,0364,0174,030,0300,01,0322,0204,0, + /* 23980 */ 0240,0364,0174,030,0300,01,0320,0215,0, + /* 23989 */ 0250,0364,0174,010,0300,01,0320,0205,0, + /* 23998 */ 0240,0364,0174,030,0300,01,0320,0205,0, + /* 24007 */ 0240,0364,0174,030,0300,01,0322,0215,0, + /* 24016 */ 0250,0364,0174,010,0300,01,0322,0205,0, + /* 24025 */ 0240,0364,0174,030,0300,01,0322,0205,0, + /* 24034 */ 0240,0364,0174,030,0300,01,0320,0217,0, + /* 24043 */ 0250,0364,0174,010,0300,01,0320,0207,0, + /* 24052 */ 0240,0364,0174,030,0300,01,0320,0207,0, + /* 24061 */ 0240,0364,0174,030,0300,01,0322,0217,0, + /* 24070 */ 0250,0364,0174,010,0300,01,0322,0207,0, + /* 24079 */ 0240,0364,0174,030,0300,01,0322,0207,0, + /* 24088 */ 0242,0362,0175,010,0300,01,0367,0110,0, + /* 24097 */ 0241,0362,0175,010,0300,01,0367,0100,0, + /* 24106 */ 0242,0362,0176,010,0300,01,0367,0110,0, + /* 24115 */ 0241,0362,0176,010,0300,01,0367,0100,0, + /* 24124 */ 0242,0362,0177,010,0300,01,0367,0110,0, + /* 24133 */ 0241,0362,0177,010,0300,01,0367,0100,0, + /* 24142 */ 0242,0362,0375,010,0300,01,0367,0110,0, + /* 24151 */ 0241,0362,0375,010,0300,01,0367,0100,0, + /* 24160 */ 0242,0362,0376,010,0300,01,0367,0110,0, + /* 24169 */ 0241,0362,0376,010,0300,01,0367,0100,0, + /* 24178 */ 0242,0362,0377,010,0300,01,0367,0110,0, + /* 24187 */ 0241,0362,0377,010,0300,01,0367,0100,0, + /* 24196 */ 0240,0364,0174,030,0300,01,0376,0210,0, + /* 24205 */ 0250,0364,0174,010,0300,01,0376,0200,0, + /* 24214 */ 0240,0364,0174,030,0300,01,0376,0200,0, + /* 24223 */ 0240,0364,0174,030,0300,01,0376,0211,0, + /* 24232 */ 0250,0364,0174,010,0300,01,0376,0201,0, + /* 24241 */ 0240,0364,0174,030,0300,01,0376,0201,0, + /* 24250 */ 0250,0364,0174,010,0300,01,0366,0205,0, + /* 24259 */ 0241,0362,0177,010,0300,01,0366,0120,0, + /* 24268 */ 0240,0362,0177,010,0300,01,0366,0110,0, + /* 24277 */ 0241,0362,0377,010,0300,01,0366,0120,0, + /* 24286 */ 0240,0362,0377,010,0300,01,0366,0110,0, + /* 24295 */ 0250,0364,0174,010,0300,01,0366,0204,0, + /* 24304 */ 0250,0364,0174,010,0300,01,0366,0207,0, + /* 24313 */ 0250,0364,0174,010,0300,01,0366,0206,0, + /* 24322 */ 0240,0364,0174,030,0300,01,0366,0213,0, + /* 24331 */ 0250,0364,0174,010,0300,01,0366,0203,0, + /* 24340 */ 0240,0364,0174,030,0300,01,0366,0203,0, + /* 24349 */ 0240,0364,0174,030,0300,01,0366,0212,0, + /* 24358 */ 0250,0364,0174,010,0300,01,0366,0202,0, + /* 24367 */ 0240,0364,0174,030,0300,01,0366,0202,0, + /* 24376 */ 0240,0364,0175,030,0300,01,0146,0121,0, + /* 24385 */ 0250,0364,0175,010,0300,01,0146,0110,0, + /* 24394 */ 0240,0364,0375,030,0300,01,0146,0121,0, + /* 24403 */ 0250,0364,0375,010,0300,01,0146,0110,0, + /* 24412 */ 0240,0364,0176,030,0300,01,0146,0121,0, + /* 24421 */ 0250,0364,0176,010,0300,01,0146,0110,0, + /* 24430 */ 0240,0364,0376,030,0300,01,0146,0121,0, + /* 24439 */ 0250,0364,0376,010,0300,01,0146,0110,0, + /* 24448 */ 0241,0362,0174,010,0300,01,0362,0120,0, + /* 24457 */ 0240,0362,0174,010,0300,01,0362,0110,0, + /* 24466 */ 0241,0362,0374,010,0300,01,0362,0120,0, + /* 24475 */ 0240,0362,0374,010,0300,01,0362,0110,0, + /* 24484 */ 0242,0362,0174,010,0300,01,0367,0110,0, + /* 24493 */ 0241,0362,0174,010,0300,01,0367,0100,0, + /* 24502 */ 0242,0362,0374,010,0300,01,0367,0110,0, + /* 24511 */ 0241,0362,0374,010,0300,01,0367,0100,0, + /* 24520 */ 0240,0362,0174,010,0300,01,0363,0212,0, + /* 24529 */ 0240,0362,0374,010,0300,01,0363,0212,0, + /* 24538 */ 0240,0362,0174,010,0300,01,0363,0211,0, + /* 24547 */ 0240,0362,0374,010,0300,01,0363,0211,0, + /* 24556 */ 0240,0362,0174,010,0300,01,0363,0213,0, + /* 24565 */ 0240,0362,0374,010,0300,01,0363,0213,0, + /* 24574 */ 0242,0362,0174,010,0300,01,0365,0110,0, + /* 24583 */ 0241,0362,0174,010,0300,01,0365,0100,0, + /* 24592 */ 0242,0362,0374,010,0300,01,0365,0110,0, + /* 24601 */ 0241,0362,0374,010,0300,01,0365,0100,0, + /* 24610 */ 0241,0362,0177,010,0300,01,0365,0120,0, + /* 24619 */ 0240,0362,0177,010,0300,01,0365,0110,0, + /* 24628 */ 0241,0362,0377,010,0300,01,0365,0120,0, + /* 24637 */ 0240,0362,0377,010,0300,01,0365,0110,0, + /* 24646 */ 0241,0362,0176,010,0300,01,0365,0120,0, + /* 24655 */ 0240,0362,0176,010,0300,01,0365,0110,0, + /* 24664 */ 0241,0362,0376,010,0300,01,0365,0120,0, + /* 24673 */ 0240,0362,0376,010,0300,01,0365,0110,0, + /* 24682 */ 0250,0364,0376,010,0300,01,0362,0110,0, + /* 24691 */ 0250,0364,0177,010,0300,01,0370,0101,0, + /* 24700 */ 0250,0364,0176,010,0300,01,0370,0110,0, + /* 24709 */ 0240,0364,04,013,0300,01,070,0112,0, + /* 24718 */ 0240,0364,04,07,0300,01,070,0112,0, + /* 24727 */ 0240,0364,04,03,0300,01,070,0112,0, + /* 24736 */ 0240,0364,04,02,0300,01,070,0112,0, + /* 24745 */ 0240,0364,04,06,0300,01,070,0112,0, + /* 24754 */ 0240,0364,04,04,0300,01,070,0112,0, + /* 24763 */ 0240,0364,04,017,0300,01,070,0112,0, + /* 24772 */ 0240,0364,04,015,0300,01,070,0112,0, + /* 24781 */ 0240,0364,04,014,0300,01,070,0112,0, + /* 24790 */ 0240,0364,04,016,0300,01,070,0112,0, + /* 24799 */ 0240,0364,04,05,0300,01,070,0112,0, + /* 24808 */ 0240,0364,04,01,0300,01,070,0112,0, + /* 24817 */ 0240,0364,04,011,0300,01,070,0112,0, + /* 24826 */ 0240,0364,04,0,0300,01,070,0112,0, + /* 24835 */ 0240,0364,04,010,0300,01,070,0112,0, + /* 24844 */ 0240,0364,04,012,0300,01,070,0112,0, + /* 24853 */ 0240,0364,04,013,0300,01,072,0121,0, + /* 24862 */ 0240,0364,04,07,0300,01,072,0121,0, + /* 24871 */ 0240,0364,04,03,0300,01,072,0121,0, + /* 24880 */ 0240,0364,04,02,0300,01,072,0121,0, + /* 24889 */ 0240,0364,04,06,0300,01,072,0121,0, + /* 24898 */ 0240,0364,04,04,0300,01,072,0121,0, + /* 24907 */ 0240,0364,04,017,0300,01,072,0121,0, + /* 24916 */ 0240,0364,04,015,0300,01,072,0121,0, + /* 24925 */ 0240,0364,04,014,0300,01,072,0121,0, + /* 24934 */ 0240,0364,04,016,0300,01,072,0121,0, + /* 24943 */ 0240,0364,04,05,0300,01,072,0121,0, + /* 24952 */ 0240,0364,04,01,0300,01,072,0121,0, + /* 24961 */ 0240,0364,04,011,0300,01,072,0121,0, + /* 24970 */ 0240,0364,04,0,0300,01,072,0121,0, + /* 24979 */ 0240,0364,04,010,0300,01,072,0121,0, + /* 24988 */ 0240,0364,04,012,0300,01,072,0121,0, + /* 24997 */ 0240,0364,04,013,0300,01,0204,0112,0, + /* 25006 */ 0240,0364,04,07,0300,01,0204,0112,0, + /* 25015 */ 0240,0364,04,03,0300,01,0204,0112,0, + /* 25024 */ 0240,0364,04,02,0300,01,0204,0112,0, + /* 25033 */ 0240,0364,04,06,0300,01,0204,0112,0, + /* 25042 */ 0240,0364,04,04,0300,01,0204,0112,0, + /* 25051 */ 0240,0364,04,017,0300,01,0204,0112,0, + /* 25060 */ 0240,0364,04,015,0300,01,0204,0112,0, + /* 25069 */ 0240,0364,04,014,0300,01,0204,0112,0, + /* 25078 */ 0240,0364,04,016,0300,01,0204,0112,0, + /* 25087 */ 0240,0364,04,05,0300,01,0204,0112,0, + /* 25096 */ 0240,0364,04,01,0300,01,0204,0112,0, + /* 25105 */ 0240,0364,04,011,0300,01,0204,0112,0, + /* 25114 */ 0240,0364,04,0,0300,01,0204,0112,0, + /* 25123 */ 0240,0364,04,010,0300,01,0204,0112,0, + /* 25132 */ 0240,0364,04,012,0300,01,0204,0112,0, + /* 25141 */ 0250,0364,0177,030,0300,01,0107,0200,0, + /* 25150 */ 0250,0364,0177,030,0300,01,0103,0200,0, + /* 25159 */ 0250,0364,0177,030,0300,01,0102,0200,0, + /* 25168 */ 0250,0364,0177,030,0300,01,0106,0200,0, + /* 25177 */ 0250,0364,0177,030,0300,01,0104,0200,0, + /* 25186 */ 0250,0364,0177,030,0300,01,0117,0200,0, + /* 25195 */ 0250,0364,0177,030,0300,01,0115,0200,0, + /* 25204 */ 0250,0364,0177,030,0300,01,0114,0200,0, + /* 25213 */ 0250,0364,0177,030,0300,01,0116,0200,0, + /* 25222 */ 0250,0364,0177,030,0300,01,0105,0200,0, + /* 25231 */ 0250,0364,0177,030,0300,01,0101,0200,0, + /* 25240 */ 0250,0364,0177,030,0300,01,0113,0200,0, + /* 25249 */ 0250,0364,0177,030,0300,01,0111,0200,0, + /* 25258 */ 0250,0364,0177,030,0300,01,0100,0200,0, + /* 25267 */ 0250,0364,0177,030,0300,01,0112,0200,0, + /* 25276 */ 0250,0364,0177,030,0300,01,0110,0200,0, + /* 25285 */ 0250,0364,0177,010,0300,01,0107,0200,0, + /* 25294 */ 0250,0364,0177,010,0300,01,0103,0200,0, + /* 25303 */ 0250,0364,0177,010,0300,01,0102,0200,0, + /* 25312 */ 0250,0364,0177,010,0300,01,0106,0200,0, + /* 25321 */ 0250,0364,0177,010,0300,01,0104,0200,0, + /* 25330 */ 0250,0364,0177,010,0300,01,0117,0200,0, + /* 25339 */ 0250,0364,0177,010,0300,01,0115,0200,0, + /* 25348 */ 0250,0364,0177,010,0300,01,0114,0200,0, + /* 25357 */ 0250,0364,0177,010,0300,01,0116,0200,0, + /* 25366 */ 0250,0364,0177,010,0300,01,0105,0200,0, + /* 25375 */ 0250,0364,0177,010,0300,01,0101,0200,0, + /* 25384 */ 0250,0364,0177,010,0300,01,0113,0200,0, + /* 25393 */ 0250,0364,0177,010,0300,01,0111,0200,0, + /* 25402 */ 0250,0364,0177,010,0300,01,0100,0200,0, + /* 25411 */ 0250,0364,0177,010,0300,01,0112,0200,0, + /* 25420 */ 0250,0364,0177,010,0300,01,0110,0200,0, + /* 25429 */ 0242,0362,0175,010,0300,01,0347,0101,0, + /* 25438 */ 0242,0362,0175,010,0300,01,0343,0101,0, + /* 25447 */ 0242,0362,0175,010,0300,01,0342,0101,0, + /* 25456 */ 0242,0362,0175,010,0300,01,0346,0101,0, + /* 25465 */ 0242,0362,0175,010,0300,01,0344,0101,0, + /* 25474 */ 0242,0362,0175,010,0300,01,0357,0101,0, + /* 25483 */ 0242,0362,0175,010,0300,01,0355,0101,0, + /* 25492 */ 0242,0362,0175,010,0300,01,0354,0101,0, + /* 25501 */ 0242,0362,0175,010,0300,01,0356,0101,0, + /* 25510 */ 0242,0362,0175,010,0300,01,0345,0101,0, + /* 25519 */ 0242,0362,0175,010,0300,01,0341,0101,0, + /* 25528 */ 0242,0362,0175,010,0300,01,0353,0101,0, + /* 25537 */ 0242,0362,0175,010,0300,01,0351,0101,0, + /* 25546 */ 0242,0362,0175,010,0300,01,0340,0101,0, + /* 25555 */ 0242,0362,0175,010,0300,01,0352,0101,0, + /* 25564 */ 0242,0362,0175,010,0300,01,0350,0101,0, + /* 25573 */ 0242,0362,0375,010,0300,01,0347,0101,0, + /* 25582 */ 0242,0362,0375,010,0300,01,0343,0101,0, + /* 25591 */ 0242,0362,0375,010,0300,01,0342,0101,0, + /* 25600 */ 0242,0362,0375,010,0300,01,0346,0101,0, + /* 25609 */ 0242,0362,0375,010,0300,01,0344,0101,0, + /* 25618 */ 0242,0362,0375,010,0300,01,0357,0101,0, + /* 25627 */ 0242,0362,0375,010,0300,01,0355,0101,0, + /* 25636 */ 0242,0362,0375,010,0300,01,0354,0101,0, + /* 25645 */ 0242,0362,0375,010,0300,01,0356,0101,0, + /* 25654 */ 0242,0362,0375,010,0300,01,0345,0101,0, + /* 25663 */ 0242,0362,0375,010,0300,01,0341,0101,0, + /* 25672 */ 0242,0362,0375,010,0300,01,0353,0101,0, + /* 25681 */ 0242,0362,0375,010,0300,01,0351,0101,0, + /* 25690 */ 0242,0362,0375,010,0300,01,0340,0101,0, + /* 25699 */ 0242,0362,0375,010,0300,01,0352,0101,0, + /* 25708 */ 0242,0362,0375,010,0300,01,0350,0101,0, + /* 25717 */ 0250,0364,0376,010,0300,01,0360,0110,0, + /* 25726 */ 0250,0364,0376,010,0300,01,0361,0110,0, + /* 25735 */ 0250,0364,0174,010,0300,01,0360,0110,0, + /* 25744 */ 0241,0362,0175,010,0301,01,0334,0120,0, + /* 25753 */ 0240,0362,0175,010,0301,01,0334,0110,0, + /* 25762 */ 0241,0362,0175,050,0301,01,0334,0120,0, + /* 25771 */ 0240,0362,0175,050,0301,01,0334,0110,0, + /* 25780 */ 0241,0362,0175,010,0301,01,0335,0120,0, + /* 25789 */ 0240,0362,0175,010,0301,01,0335,0110,0, + /* 25798 */ 0241,0362,0175,050,0301,01,0335,0120,0, + /* 25807 */ 0240,0362,0175,050,0301,01,0335,0110,0, + /* 25816 */ 0241,0362,0175,010,0301,01,0336,0120,0, + /* 25825 */ 0240,0362,0175,010,0301,01,0336,0110,0, + /* 25834 */ 0241,0362,0175,050,0301,01,0336,0120,0, + /* 25843 */ 0240,0362,0175,050,0301,01,0336,0110,0, + /* 25852 */ 0241,0362,0175,010,0301,01,0337,0120,0, + /* 25861 */ 0240,0362,0175,010,0301,01,0337,0110,0, + /* 25870 */ 0241,0362,0175,050,0301,01,0337,0120,0, + /* 25879 */ 0240,0362,0175,050,0301,01,0337,0110,0, + /* 25888 */ 0241,0362,0175,0110,0301,01,0334,0120,0, + /* 25897 */ 0240,0362,0175,0110,0301,01,0334,0110,0, + /* 25906 */ 0241,0362,0175,0110,0301,01,0335,0120,0, + /* 25915 */ 0240,0362,0175,0110,0301,01,0335,0110,0, + /* 25924 */ 0241,0362,0175,0110,0301,01,0336,0120,0, + /* 25933 */ 0240,0362,0175,0110,0301,01,0336,0110,0, + /* 25942 */ 0241,0362,0175,0110,0301,01,0337,0120,0, + /* 25951 */ 0240,0362,0175,0110,0301,01,0337,0110,0, + /* 25960 */ 0261,01,01,01,0302,0120,01,020,0, + /* 25969 */ 0260,01,01,01,0302,0110,01,020,0, + /* 25978 */ 0261,01,05,01,0302,0120,01,020,0, + /* 25987 */ 0260,01,05,01,0302,0110,01,020,0, + /* 25996 */ 0261,01,01,01,0302,0120,01,0,0, + /* 26005 */ 0260,01,01,01,0302,0110,01,0,0, + /* 26014 */ 0261,01,05,01,0302,0120,01,0,0, + /* 26023 */ 0260,01,05,01,0302,0110,01,0,0, + /* 26032 */ 0261,01,01,01,0302,0120,01,01,0, + /* 26041 */ 0260,01,01,01,0302,0110,01,01,0, + /* 26050 */ 0261,01,05,01,0302,0120,01,01,0, + /* 26059 */ 0260,01,05,01,0302,0110,01,01,0, + /* 26068 */ 0261,01,01,01,0302,0120,01,02,0, + /* 26077 */ 0260,01,01,01,0302,0110,01,02,0, + /* 26086 */ 0261,01,05,01,0302,0120,01,02,0, + /* 26095 */ 0260,01,05,01,0302,0110,01,02,0, + /* 26104 */ 0261,01,01,01,0302,0120,01,03,0, + /* 26113 */ 0260,01,01,01,0302,0110,01,03,0, + /* 26122 */ 0261,01,05,01,0302,0120,01,03,0, + /* 26131 */ 0260,01,05,01,0302,0110,01,03,0, + /* 26140 */ 0261,01,01,01,0302,0120,01,04,0, + /* 26149 */ 0260,01,01,01,0302,0110,01,04,0, + /* 26158 */ 0261,01,05,01,0302,0120,01,04,0, + /* 26167 */ 0260,01,05,01,0302,0110,01,04,0, + /* 26176 */ 0261,01,01,01,0302,0120,01,05,0, + /* 26185 */ 0260,01,01,01,0302,0110,01,05,0, + /* 26194 */ 0261,01,05,01,0302,0120,01,05,0, + /* 26203 */ 0260,01,05,01,0302,0110,01,05,0, + /* 26212 */ 0261,01,01,01,0302,0120,01,06,0, + /* 26221 */ 0260,01,01,01,0302,0110,01,06,0, + /* 26230 */ 0261,01,05,01,0302,0120,01,06,0, + /* 26239 */ 0260,01,05,01,0302,0110,01,06,0, + /* 26248 */ 0261,01,01,01,0302,0120,01,07,0, + /* 26257 */ 0260,01,01,01,0302,0110,01,07,0, + /* 26266 */ 0261,01,05,01,0302,0120,01,07,0, + /* 26275 */ 0260,01,05,01,0302,0110,01,07,0, + /* 26284 */ 0261,01,01,01,0302,0120,01,010,0, + /* 26293 */ 0260,01,01,01,0302,0110,01,010,0, + /* 26302 */ 0261,01,05,01,0302,0120,01,010,0, + /* 26311 */ 0260,01,05,01,0302,0110,01,010,0, + /* 26320 */ 0261,01,01,01,0302,0120,01,011,0, + /* 26329 */ 0260,01,01,01,0302,0110,01,011,0, + /* 26338 */ 0261,01,05,01,0302,0120,01,011,0, + /* 26347 */ 0260,01,05,01,0302,0110,01,011,0, + /* 26356 */ 0261,01,01,01,0302,0120,01,012,0, + /* 26365 */ 0260,01,01,01,0302,0110,01,012,0, + /* 26374 */ 0261,01,05,01,0302,0120,01,012,0, + /* 26383 */ 0260,01,05,01,0302,0110,01,012,0, + /* 26392 */ 0261,01,01,01,0302,0120,01,013,0, + /* 26401 */ 0260,01,01,01,0302,0110,01,013,0, + /* 26410 */ 0261,01,05,01,0302,0120,01,013,0, + /* 26419 */ 0260,01,05,01,0302,0110,01,013,0, + /* 26428 */ 0261,01,01,01,0302,0120,01,014,0, + /* 26437 */ 0260,01,01,01,0302,0110,01,014,0, + /* 26446 */ 0261,01,05,01,0302,0120,01,014,0, + /* 26455 */ 0260,01,05,01,0302,0110,01,014,0, + /* 26464 */ 0261,01,01,01,0302,0120,01,015,0, + /* 26473 */ 0260,01,01,01,0302,0110,01,015,0, + /* 26482 */ 0261,01,05,01,0302,0120,01,015,0, + /* 26491 */ 0260,01,05,01,0302,0110,01,015,0, + /* 26500 */ 0261,01,01,01,0302,0120,01,016,0, + /* 26509 */ 0260,01,01,01,0302,0110,01,016,0, + /* 26518 */ 0261,01,05,01,0302,0120,01,016,0, + /* 26527 */ 0260,01,05,01,0302,0110,01,016,0, + /* 26536 */ 0261,01,01,01,0302,0120,01,017,0, + /* 26545 */ 0260,01,01,01,0302,0110,01,017,0, + /* 26554 */ 0261,01,05,01,0302,0120,01,017,0, + /* 26563 */ 0260,01,05,01,0302,0110,01,017,0, + /* 26572 */ 0261,01,01,01,0302,0120,01,021,0, + /* 26581 */ 0260,01,01,01,0302,0110,01,021,0, + /* 26590 */ 0261,01,05,01,0302,0120,01,021,0, + /* 26599 */ 0260,01,05,01,0302,0110,01,021,0, + /* 26608 */ 0261,01,01,01,0302,0120,01,022,0, + /* 26617 */ 0260,01,01,01,0302,0110,01,022,0, + /* 26626 */ 0261,01,05,01,0302,0120,01,022,0, + /* 26635 */ 0260,01,05,01,0302,0110,01,022,0, + /* 26644 */ 0261,01,01,01,0302,0120,01,023,0, + /* 26653 */ 0260,01,01,01,0302,0110,01,023,0, + /* 26662 */ 0261,01,05,01,0302,0120,01,023,0, + /* 26671 */ 0260,01,05,01,0302,0110,01,023,0, + /* 26680 */ 0261,01,01,01,0302,0120,01,024,0, + /* 26689 */ 0260,01,01,01,0302,0110,01,024,0, + /* 26698 */ 0261,01,05,01,0302,0120,01,024,0, + /* 26707 */ 0260,01,05,01,0302,0110,01,024,0, + /* 26716 */ 0261,01,01,01,0302,0120,01,025,0, + /* 26725 */ 0260,01,01,01,0302,0110,01,025,0, + /* 26734 */ 0261,01,05,01,0302,0120,01,025,0, + /* 26743 */ 0260,01,05,01,0302,0110,01,025,0, + /* 26752 */ 0261,01,01,01,0302,0120,01,026,0, + /* 26761 */ 0260,01,01,01,0302,0110,01,026,0, + /* 26770 */ 0261,01,05,01,0302,0120,01,026,0, + /* 26779 */ 0260,01,05,01,0302,0110,01,026,0, + /* 26788 */ 0261,01,01,01,0302,0120,01,027,0, + /* 26797 */ 0260,01,01,01,0302,0110,01,027,0, + /* 26806 */ 0261,01,05,01,0302,0120,01,027,0, + /* 26815 */ 0260,01,05,01,0302,0110,01,027,0, + /* 26824 */ 0261,01,01,01,0302,0120,01,030,0, + /* 26833 */ 0260,01,01,01,0302,0110,01,030,0, + /* 26842 */ 0261,01,05,01,0302,0120,01,030,0, + /* 26851 */ 0260,01,05,01,0302,0110,01,030,0, + /* 26860 */ 0261,01,01,01,0302,0120,01,031,0, + /* 26869 */ 0260,01,01,01,0302,0110,01,031,0, + /* 26878 */ 0261,01,05,01,0302,0120,01,031,0, + /* 26887 */ 0260,01,05,01,0302,0110,01,031,0, + /* 26896 */ 0261,01,01,01,0302,0120,01,032,0, + /* 26905 */ 0260,01,01,01,0302,0110,01,032,0, + /* 26914 */ 0261,01,05,01,0302,0120,01,032,0, + /* 26923 */ 0260,01,05,01,0302,0110,01,032,0, + /* 26932 */ 0261,01,01,01,0302,0120,01,033,0, + /* 26941 */ 0260,01,01,01,0302,0110,01,033,0, + /* 26950 */ 0261,01,05,01,0302,0120,01,033,0, + /* 26959 */ 0260,01,05,01,0302,0110,01,033,0, + /* 26968 */ 0261,01,01,01,0302,0120,01,034,0, + /* 26977 */ 0260,01,01,01,0302,0110,01,034,0, + /* 26986 */ 0261,01,05,01,0302,0120,01,034,0, + /* 26995 */ 0260,01,05,01,0302,0110,01,034,0, + /* 27004 */ 0261,01,01,01,0302,0120,01,035,0, + /* 27013 */ 0260,01,01,01,0302,0110,01,035,0, + /* 27022 */ 0261,01,05,01,0302,0120,01,035,0, + /* 27031 */ 0260,01,05,01,0302,0110,01,035,0, + /* 27040 */ 0261,01,01,01,0302,0120,01,036,0, + /* 27049 */ 0260,01,01,01,0302,0110,01,036,0, + /* 27058 */ 0261,01,05,01,0302,0120,01,036,0, + /* 27067 */ 0260,01,05,01,0302,0110,01,036,0, + /* 27076 */ 0261,01,01,01,0302,0120,01,037,0, + /* 27085 */ 0260,01,01,01,0302,0110,01,037,0, + /* 27094 */ 0261,01,05,01,0302,0120,01,037,0, + /* 27103 */ 0260,01,05,01,0302,0110,01,037,0, + /* 27112 */ 0261,01,0,01,0302,0120,01,020,0, + /* 27121 */ 0260,01,0,01,0302,0110,01,020,0, + /* 27130 */ 0261,01,04,01,0302,0120,01,020,0, + /* 27139 */ 0260,01,04,01,0302,0110,01,020,0, + /* 27148 */ 0261,01,0,01,0302,0120,01,0,0, + /* 27157 */ 0260,01,0,01,0302,0110,01,0,0, + /* 27166 */ 0261,01,04,01,0302,0120,01,0,0, + /* 27175 */ 0260,01,04,01,0302,0110,01,0,0, + /* 27184 */ 0261,01,0,01,0302,0120,01,01,0, + /* 27193 */ 0260,01,0,01,0302,0110,01,01,0, + /* 27202 */ 0261,01,04,01,0302,0120,01,01,0, + /* 27211 */ 0260,01,04,01,0302,0110,01,01,0, + /* 27220 */ 0261,01,0,01,0302,0120,01,02,0, + /* 27229 */ 0260,01,0,01,0302,0110,01,02,0, + /* 27238 */ 0261,01,04,01,0302,0120,01,02,0, + /* 27247 */ 0260,01,04,01,0302,0110,01,02,0, + /* 27256 */ 0261,01,0,01,0302,0120,01,03,0, + /* 27265 */ 0260,01,0,01,0302,0110,01,03,0, + /* 27274 */ 0261,01,04,01,0302,0120,01,03,0, + /* 27283 */ 0260,01,04,01,0302,0110,01,03,0, + /* 27292 */ 0261,01,0,01,0302,0120,01,04,0, + /* 27301 */ 0260,01,0,01,0302,0110,01,04,0, + /* 27310 */ 0261,01,04,01,0302,0120,01,04,0, + /* 27319 */ 0260,01,04,01,0302,0110,01,04,0, + /* 27328 */ 0261,01,0,01,0302,0120,01,05,0, + /* 27337 */ 0260,01,0,01,0302,0110,01,05,0, + /* 27346 */ 0261,01,04,01,0302,0120,01,05,0, + /* 27355 */ 0260,01,04,01,0302,0110,01,05,0, + /* 27364 */ 0261,01,0,01,0302,0120,01,06,0, + /* 27373 */ 0260,01,0,01,0302,0110,01,06,0, + /* 27382 */ 0261,01,04,01,0302,0120,01,06,0, + /* 27391 */ 0260,01,04,01,0302,0110,01,06,0, + /* 27400 */ 0261,01,0,01,0302,0120,01,07,0, + /* 27409 */ 0260,01,0,01,0302,0110,01,07,0, + /* 27418 */ 0261,01,04,01,0302,0120,01,07,0, + /* 27427 */ 0260,01,04,01,0302,0110,01,07,0, + /* 27436 */ 0261,01,0,01,0302,0120,01,010,0, + /* 27445 */ 0260,01,0,01,0302,0110,01,010,0, + /* 27454 */ 0261,01,04,01,0302,0120,01,010,0, + /* 27463 */ 0260,01,04,01,0302,0110,01,010,0, + /* 27472 */ 0261,01,0,01,0302,0120,01,011,0, + /* 27481 */ 0260,01,0,01,0302,0110,01,011,0, + /* 27490 */ 0261,01,04,01,0302,0120,01,011,0, + /* 27499 */ 0260,01,04,01,0302,0110,01,011,0, + /* 27508 */ 0261,01,0,01,0302,0120,01,012,0, + /* 27517 */ 0260,01,0,01,0302,0110,01,012,0, + /* 27526 */ 0261,01,04,01,0302,0120,01,012,0, + /* 27535 */ 0260,01,04,01,0302,0110,01,012,0, + /* 27544 */ 0261,01,0,01,0302,0120,01,013,0, + /* 27553 */ 0260,01,0,01,0302,0110,01,013,0, + /* 27562 */ 0261,01,04,01,0302,0120,01,013,0, + /* 27571 */ 0260,01,04,01,0302,0110,01,013,0, + /* 27580 */ 0261,01,0,01,0302,0120,01,014,0, + /* 27589 */ 0260,01,0,01,0302,0110,01,014,0, + /* 27598 */ 0261,01,04,01,0302,0120,01,014,0, + /* 27607 */ 0260,01,04,01,0302,0110,01,014,0, + /* 27616 */ 0261,01,0,01,0302,0120,01,015,0, + /* 27625 */ 0260,01,0,01,0302,0110,01,015,0, + /* 27634 */ 0261,01,04,01,0302,0120,01,015,0, + /* 27643 */ 0260,01,04,01,0302,0110,01,015,0, + /* 27652 */ 0261,01,0,01,0302,0120,01,016,0, + /* 27661 */ 0260,01,0,01,0302,0110,01,016,0, + /* 27670 */ 0261,01,04,01,0302,0120,01,016,0, + /* 27679 */ 0260,01,04,01,0302,0110,01,016,0, + /* 27688 */ 0261,01,0,01,0302,0120,01,017,0, + /* 27697 */ 0260,01,0,01,0302,0110,01,017,0, + /* 27706 */ 0261,01,04,01,0302,0120,01,017,0, + /* 27715 */ 0260,01,04,01,0302,0110,01,017,0, + /* 27724 */ 0261,01,0,01,0302,0120,01,021,0, + /* 27733 */ 0260,01,0,01,0302,0110,01,021,0, + /* 27742 */ 0261,01,04,01,0302,0120,01,021,0, + /* 27751 */ 0260,01,04,01,0302,0110,01,021,0, + /* 27760 */ 0261,01,0,01,0302,0120,01,022,0, + /* 27769 */ 0260,01,0,01,0302,0110,01,022,0, + /* 27778 */ 0261,01,04,01,0302,0120,01,022,0, + /* 27787 */ 0260,01,04,01,0302,0110,01,022,0, + /* 27796 */ 0261,01,0,01,0302,0120,01,023,0, + /* 27805 */ 0260,01,0,01,0302,0110,01,023,0, + /* 27814 */ 0261,01,04,01,0302,0120,01,023,0, + /* 27823 */ 0260,01,04,01,0302,0110,01,023,0, + /* 27832 */ 0261,01,0,01,0302,0120,01,024,0, + /* 27841 */ 0260,01,0,01,0302,0110,01,024,0, + /* 27850 */ 0261,01,04,01,0302,0120,01,024,0, + /* 27859 */ 0260,01,04,01,0302,0110,01,024,0, + /* 27868 */ 0261,01,0,01,0302,0120,01,025,0, + /* 27877 */ 0260,01,0,01,0302,0110,01,025,0, + /* 27886 */ 0261,01,04,01,0302,0120,01,025,0, + /* 27895 */ 0260,01,04,01,0302,0110,01,025,0, + /* 27904 */ 0261,01,0,01,0302,0120,01,026,0, + /* 27913 */ 0260,01,0,01,0302,0110,01,026,0, + /* 27922 */ 0261,01,04,01,0302,0120,01,026,0, + /* 27931 */ 0260,01,04,01,0302,0110,01,026,0, + /* 27940 */ 0261,01,0,01,0302,0120,01,027,0, + /* 27949 */ 0260,01,0,01,0302,0110,01,027,0, + /* 27958 */ 0261,01,04,01,0302,0120,01,027,0, + /* 27967 */ 0260,01,04,01,0302,0110,01,027,0, + /* 27976 */ 0261,01,0,01,0302,0120,01,030,0, + /* 27985 */ 0260,01,0,01,0302,0110,01,030,0, + /* 27994 */ 0261,01,04,01,0302,0120,01,030,0, + /* 28003 */ 0260,01,04,01,0302,0110,01,030,0, + /* 28012 */ 0261,01,0,01,0302,0120,01,031,0, + /* 28021 */ 0260,01,0,01,0302,0110,01,031,0, + /* 28030 */ 0261,01,04,01,0302,0120,01,031,0, + /* 28039 */ 0260,01,04,01,0302,0110,01,031,0, + /* 28048 */ 0261,01,0,01,0302,0120,01,032,0, + /* 28057 */ 0260,01,0,01,0302,0110,01,032,0, + /* 28066 */ 0261,01,04,01,0302,0120,01,032,0, + /* 28075 */ 0260,01,04,01,0302,0110,01,032,0, + /* 28084 */ 0261,01,0,01,0302,0120,01,033,0, + /* 28093 */ 0260,01,0,01,0302,0110,01,033,0, + /* 28102 */ 0261,01,04,01,0302,0120,01,033,0, + /* 28111 */ 0260,01,04,01,0302,0110,01,033,0, + /* 28120 */ 0261,01,0,01,0302,0120,01,034,0, + /* 28129 */ 0260,01,0,01,0302,0110,01,034,0, + /* 28138 */ 0261,01,04,01,0302,0120,01,034,0, + /* 28147 */ 0260,01,04,01,0302,0110,01,034,0, + /* 28156 */ 0261,01,0,01,0302,0120,01,035,0, + /* 28165 */ 0260,01,0,01,0302,0110,01,035,0, + /* 28174 */ 0261,01,04,01,0302,0120,01,035,0, + /* 28183 */ 0260,01,04,01,0302,0110,01,035,0, + /* 28192 */ 0261,01,0,01,0302,0120,01,036,0, + /* 28201 */ 0260,01,0,01,0302,0110,01,036,0, + /* 28210 */ 0261,01,04,01,0302,0120,01,036,0, + /* 28219 */ 0260,01,04,01,0302,0110,01,036,0, + /* 28228 */ 0261,01,0,01,0302,0120,01,037,0, + /* 28237 */ 0260,01,0,01,0302,0110,01,037,0, + /* 28246 */ 0261,01,04,01,0302,0120,01,037,0, + /* 28255 */ 0260,01,04,01,0302,0110,01,037,0, + /* 28264 */ 0261,01,03,01,0302,0120,01,020,0, + /* 28273 */ 0260,01,03,01,0302,0110,01,020,0, + /* 28282 */ 0261,01,03,01,0302,0120,01,0,0, + /* 28291 */ 0260,01,03,01,0302,0110,01,0,0, + /* 28300 */ 0261,01,03,01,0302,0120,01,01,0, + /* 28309 */ 0260,01,03,01,0302,0110,01,01,0, + /* 28318 */ 0261,01,03,01,0302,0120,01,02,0, + /* 28327 */ 0260,01,03,01,0302,0110,01,02,0, + /* 28336 */ 0261,01,03,01,0302,0120,01,03,0, + /* 28345 */ 0260,01,03,01,0302,0110,01,03,0, + /* 28354 */ 0261,01,03,01,0302,0120,01,04,0, + /* 28363 */ 0260,01,03,01,0302,0110,01,04,0, + /* 28372 */ 0261,01,03,01,0302,0120,01,05,0, + /* 28381 */ 0260,01,03,01,0302,0110,01,05,0, + /* 28390 */ 0261,01,03,01,0302,0120,01,06,0, + /* 28399 */ 0260,01,03,01,0302,0110,01,06,0, + /* 28408 */ 0261,01,03,01,0302,0120,01,07,0, + /* 28417 */ 0260,01,03,01,0302,0110,01,07,0, + /* 28426 */ 0261,01,03,01,0302,0120,01,010,0, + /* 28435 */ 0260,01,03,01,0302,0110,01,010,0, + /* 28444 */ 0261,01,03,01,0302,0120,01,011,0, + /* 28453 */ 0260,01,03,01,0302,0110,01,011,0, + /* 28462 */ 0261,01,03,01,0302,0120,01,012,0, + /* 28471 */ 0260,01,03,01,0302,0110,01,012,0, + /* 28480 */ 0261,01,03,01,0302,0120,01,013,0, + /* 28489 */ 0260,01,03,01,0302,0110,01,013,0, + /* 28498 */ 0261,01,03,01,0302,0120,01,014,0, + /* 28507 */ 0260,01,03,01,0302,0110,01,014,0, + /* 28516 */ 0261,01,03,01,0302,0120,01,015,0, + /* 28525 */ 0260,01,03,01,0302,0110,01,015,0, + /* 28534 */ 0261,01,03,01,0302,0120,01,016,0, + /* 28543 */ 0260,01,03,01,0302,0110,01,016,0, + /* 28552 */ 0261,01,03,01,0302,0120,01,017,0, + /* 28561 */ 0260,01,03,01,0302,0110,01,017,0, + /* 28570 */ 0261,01,03,01,0302,0120,01,021,0, + /* 28579 */ 0260,01,03,01,0302,0110,01,021,0, + /* 28588 */ 0261,01,03,01,0302,0120,01,022,0, + /* 28597 */ 0260,01,03,01,0302,0110,01,022,0, + /* 28606 */ 0261,01,03,01,0302,0120,01,023,0, + /* 28615 */ 0260,01,03,01,0302,0110,01,023,0, + /* 28624 */ 0261,01,03,01,0302,0120,01,024,0, + /* 28633 */ 0260,01,03,01,0302,0110,01,024,0, + /* 28642 */ 0261,01,03,01,0302,0120,01,025,0, + /* 28651 */ 0260,01,03,01,0302,0110,01,025,0, + /* 28660 */ 0261,01,03,01,0302,0120,01,026,0, + /* 28669 */ 0260,01,03,01,0302,0110,01,026,0, + /* 28678 */ 0261,01,03,01,0302,0120,01,027,0, + /* 28687 */ 0260,01,03,01,0302,0110,01,027,0, + /* 28696 */ 0261,01,03,01,0302,0120,01,030,0, + /* 28705 */ 0260,01,03,01,0302,0110,01,030,0, + /* 28714 */ 0261,01,03,01,0302,0120,01,031,0, + /* 28723 */ 0260,01,03,01,0302,0110,01,031,0, + /* 28732 */ 0261,01,03,01,0302,0120,01,032,0, + /* 28741 */ 0260,01,03,01,0302,0110,01,032,0, + /* 28750 */ 0261,01,03,01,0302,0120,01,033,0, + /* 28759 */ 0260,01,03,01,0302,0110,01,033,0, + /* 28768 */ 0261,01,03,01,0302,0120,01,034,0, + /* 28777 */ 0260,01,03,01,0302,0110,01,034,0, + /* 28786 */ 0261,01,03,01,0302,0120,01,035,0, + /* 28795 */ 0260,01,03,01,0302,0110,01,035,0, + /* 28804 */ 0261,01,03,01,0302,0120,01,036,0, + /* 28813 */ 0260,01,03,01,0302,0110,01,036,0, + /* 28822 */ 0261,01,03,01,0302,0120,01,037,0, + /* 28831 */ 0260,01,03,01,0302,0110,01,037,0, + /* 28840 */ 0261,01,02,01,0302,0120,01,020,0, + /* 28849 */ 0260,01,02,01,0302,0110,01,020,0, + /* 28858 */ 0261,01,02,01,0302,0120,01,0,0, + /* 28867 */ 0260,01,02,01,0302,0110,01,0,0, + /* 28876 */ 0261,01,02,01,0302,0120,01,01,0, + /* 28885 */ 0260,01,02,01,0302,0110,01,01,0, + /* 28894 */ 0261,01,02,01,0302,0120,01,02,0, + /* 28903 */ 0260,01,02,01,0302,0110,01,02,0, + /* 28912 */ 0261,01,02,01,0302,0120,01,03,0, + /* 28921 */ 0260,01,02,01,0302,0110,01,03,0, + /* 28930 */ 0261,01,02,01,0302,0120,01,04,0, + /* 28939 */ 0260,01,02,01,0302,0110,01,04,0, + /* 28948 */ 0261,01,02,01,0302,0120,01,05,0, + /* 28957 */ 0260,01,02,01,0302,0110,01,05,0, + /* 28966 */ 0261,01,02,01,0302,0120,01,06,0, + /* 28975 */ 0260,01,02,01,0302,0110,01,06,0, + /* 28984 */ 0261,01,02,01,0302,0120,01,07,0, + /* 28993 */ 0260,01,02,01,0302,0110,01,07,0, + /* 29002 */ 0261,01,02,01,0302,0120,01,010,0, + /* 29011 */ 0260,01,02,01,0302,0110,01,010,0, + /* 29020 */ 0261,01,02,01,0302,0120,01,011,0, + /* 29029 */ 0260,01,02,01,0302,0110,01,011,0, + /* 29038 */ 0261,01,02,01,0302,0120,01,012,0, + /* 29047 */ 0260,01,02,01,0302,0110,01,012,0, + /* 29056 */ 0261,01,02,01,0302,0120,01,013,0, + /* 29065 */ 0260,01,02,01,0302,0110,01,013,0, + /* 29074 */ 0261,01,02,01,0302,0120,01,014,0, + /* 29083 */ 0260,01,02,01,0302,0110,01,014,0, + /* 29092 */ 0261,01,02,01,0302,0120,01,015,0, + /* 29101 */ 0260,01,02,01,0302,0110,01,015,0, + /* 29110 */ 0261,01,02,01,0302,0120,01,016,0, + /* 29119 */ 0260,01,02,01,0302,0110,01,016,0, + /* 29128 */ 0261,01,02,01,0302,0120,01,017,0, + /* 29137 */ 0260,01,02,01,0302,0110,01,017,0, + /* 29146 */ 0261,01,02,01,0302,0120,01,021,0, + /* 29155 */ 0260,01,02,01,0302,0110,01,021,0, + /* 29164 */ 0261,01,02,01,0302,0120,01,022,0, + /* 29173 */ 0260,01,02,01,0302,0110,01,022,0, + /* 29182 */ 0261,01,02,01,0302,0120,01,023,0, + /* 29191 */ 0260,01,02,01,0302,0110,01,023,0, + /* 29200 */ 0261,01,02,01,0302,0120,01,024,0, + /* 29209 */ 0260,01,02,01,0302,0110,01,024,0, + /* 29218 */ 0261,01,02,01,0302,0120,01,025,0, + /* 29227 */ 0260,01,02,01,0302,0110,01,025,0, + /* 29236 */ 0261,01,02,01,0302,0120,01,026,0, + /* 29245 */ 0260,01,02,01,0302,0110,01,026,0, + /* 29254 */ 0261,01,02,01,0302,0120,01,027,0, + /* 29263 */ 0260,01,02,01,0302,0110,01,027,0, + /* 29272 */ 0261,01,02,01,0302,0120,01,030,0, + /* 29281 */ 0260,01,02,01,0302,0110,01,030,0, + /* 29290 */ 0261,01,02,01,0302,0120,01,031,0, + /* 29299 */ 0260,01,02,01,0302,0110,01,031,0, + /* 29308 */ 0261,01,02,01,0302,0120,01,032,0, + /* 29317 */ 0260,01,02,01,0302,0110,01,032,0, + /* 29326 */ 0261,01,02,01,0302,0120,01,033,0, + /* 29335 */ 0260,01,02,01,0302,0110,01,033,0, + /* 29344 */ 0261,01,02,01,0302,0120,01,034,0, + /* 29353 */ 0260,01,02,01,0302,0110,01,034,0, + /* 29362 */ 0261,01,02,01,0302,0120,01,035,0, + /* 29371 */ 0260,01,02,01,0302,0110,01,035,0, + /* 29380 */ 0261,01,02,01,0302,0120,01,036,0, + /* 29389 */ 0260,01,02,01,0302,0110,01,036,0, + /* 29398 */ 0261,01,02,01,0302,0120,01,037,0, + /* 29407 */ 0260,01,02,01,0302,0110,01,037,0, + /* 29416 */ 0261,03,01,01,0104,0120,01,0,0, + /* 29425 */ 0260,03,01,01,0104,0110,01,0,0, + /* 29434 */ 0261,03,01,01,0104,0120,01,01,0, + /* 29443 */ 0260,03,01,01,0104,0110,01,01,0, + /* 29452 */ 0261,03,01,01,0104,0120,01,020,0, + /* 29461 */ 0260,03,01,01,0104,0110,01,020,0, + /* 29470 */ 0261,03,01,01,0104,0120,01,021,0, + /* 29479 */ 0260,03,01,01,0104,0110,01,021,0, + /* 29488 */ 0261,03,05,01,0104,0120,01,0,0, + /* 29497 */ 0260,03,05,01,0104,0110,01,0,0, + /* 29506 */ 0261,03,05,01,0104,0120,01,01,0, + /* 29515 */ 0260,03,05,01,0104,0110,01,01,0, + /* 29524 */ 0261,03,05,01,0104,0120,01,020,0, + /* 29533 */ 0260,03,05,01,0104,0110,01,020,0, + /* 29542 */ 0261,03,05,01,0104,0120,01,021,0, + /* 29551 */ 0260,03,05,01,0104,0110,01,021,0, + /* 29560 */ 0241,0362,0176,010,0300,01,0332,0120,0, + /* 29569 */ 0241,0362,0176,050,0300,01,0332,0120,0, + /* 29578 */ 0241,0362,0176,0110,0300,01,0332,0120,0, + /* 29587 */ 0241,0362,0177,010,0300,01,0332,0120,0, + /* 29596 */ 0241,0362,0177,050,0300,01,0332,0120,0, + /* 29605 */ 0241,0362,0177,0110,0300,01,0332,0120,0, + /* 29614 */ 0250,0361,0175,010,0300,01,0220,0110,0, + /* 29623 */ 0250,0361,0174,010,0300,01,0220,0110,0, + /* 29632 */ 0250,0361,0375,010,0300,01,0220,0110,0, + /* 29641 */ 0250,0361,0374,010,0300,01,0220,0110,0, + /* 29650 */ 0250,0361,0175,010,0300,01,0221,0101,0, + /* 29659 */ 0250,0361,0174,010,0300,01,0221,0101,0, + /* 29668 */ 0250,0361,0375,010,0300,01,0221,0101,0, + /* 29677 */ 0250,0361,0374,010,0300,01,0221,0101,0, + /* 29686 */ 0250,0361,0177,010,0300,01,0222,0110,0, + /* 29695 */ 0250,0361,0377,010,0300,01,0222,0110,0, + /* 29704 */ 0250,0361,0177,010,0300,01,0223,0110,0, + /* 29713 */ 0250,0361,0377,010,0300,01,0223,0110,0, + /* 29722 */ 0250,0361,0175,010,0300,01,0222,0110,0, + /* 29731 */ 0250,0361,0174,010,0300,01,0222,0110,0, + /* 29740 */ 0250,0361,0175,010,0300,01,0223,0110,0, + /* 29749 */ 0250,0361,0174,010,0300,01,0223,0110,0, + /* 29758 */ 0241,0361,0175,050,0300,01,0112,0120,0, + /* 29767 */ 0240,0361,0175,050,0300,01,0112,0110,0, + /* 29776 */ 0241,0361,0174,050,0300,01,0112,0120,0, + /* 29785 */ 0240,0361,0174,050,0300,01,0112,0110,0, + /* 29794 */ 0241,0361,0375,050,0300,01,0112,0120,0, + /* 29803 */ 0240,0361,0375,050,0300,01,0112,0110,0, + /* 29812 */ 0241,0361,0374,050,0300,01,0112,0120,0, + /* 29821 */ 0240,0361,0374,050,0300,01,0112,0110,0, + /* 29830 */ 0241,0361,0175,050,0300,01,0101,0120,0, + /* 29839 */ 0240,0361,0175,050,0300,01,0101,0110,0, + /* 29848 */ 0241,0361,0174,050,0300,01,0101,0120,0, + /* 29857 */ 0240,0361,0174,050,0300,01,0101,0110,0, + /* 29866 */ 0241,0361,0375,050,0300,01,0101,0120,0, + /* 29875 */ 0240,0361,0375,050,0300,01,0101,0110,0, + /* 29884 */ 0241,0361,0374,050,0300,01,0101,0120,0, + /* 29893 */ 0240,0361,0374,050,0300,01,0101,0110,0, + /* 29902 */ 0241,0361,0175,050,0300,01,0102,0120,0, + /* 29911 */ 0240,0361,0175,050,0300,01,0102,0110,0, + /* 29920 */ 0241,0361,0174,050,0300,01,0102,0120,0, + /* 29929 */ 0240,0361,0174,050,0300,01,0102,0110,0, + /* 29938 */ 0241,0361,0375,050,0300,01,0102,0120,0, + /* 29947 */ 0240,0361,0375,050,0300,01,0102,0110,0, + /* 29956 */ 0241,0361,0374,050,0300,01,0102,0120,0, + /* 29965 */ 0240,0361,0374,050,0300,01,0102,0110,0, + /* 29974 */ 0250,0361,0175,010,0300,01,0104,0110,0, + /* 29983 */ 0250,0361,0175,010,0300,01,0104,0100,0, + /* 29992 */ 0250,0361,0174,010,0300,01,0104,0110,0, + /* 30001 */ 0250,0361,0174,010,0300,01,0104,0100,0, + /* 30010 */ 0250,0361,0375,010,0300,01,0104,0110,0, + /* 30019 */ 0250,0361,0375,010,0300,01,0104,0100,0, + /* 30028 */ 0250,0361,0374,010,0300,01,0104,0110,0, + /* 30037 */ 0250,0361,0374,010,0300,01,0104,0100,0, + /* 30046 */ 0241,0361,0175,050,0300,01,0105,0120,0, + /* 30055 */ 0240,0361,0175,050,0300,01,0105,0110,0, + /* 30064 */ 0241,0361,0174,050,0300,01,0105,0120,0, + /* 30073 */ 0240,0361,0174,050,0300,01,0105,0110,0, + /* 30082 */ 0241,0361,0375,050,0300,01,0105,0120,0, + /* 30091 */ 0240,0361,0375,050,0300,01,0105,0110,0, + /* 30100 */ 0241,0361,0374,050,0300,01,0105,0120,0, + /* 30109 */ 0240,0361,0374,050,0300,01,0105,0110,0, + /* 30118 */ 0250,0361,0175,010,0300,01,0230,0110,0, + /* 30127 */ 0250,0361,0174,010,0300,01,0230,0110,0, + /* 30136 */ 0250,0361,0375,010,0300,01,0230,0110,0, + /* 30145 */ 0250,0361,0374,010,0300,01,0230,0110,0, + /* 30154 */ 0250,0361,0175,010,0300,01,0231,0110,0, + /* 30163 */ 0250,0361,0174,010,0300,01,0231,0110,0, + /* 30172 */ 0250,0361,0375,010,0300,01,0231,0110,0, + /* 30181 */ 0250,0361,0374,010,0300,01,0231,0110,0, + /* 30190 */ 0241,0361,0175,050,0300,01,0113,0120,0, + /* 30199 */ 0240,0361,0175,050,0300,01,0113,0110,0, + /* 30208 */ 0241,0361,0174,050,0300,01,0113,0120,0, + /* 30217 */ 0240,0361,0174,050,0300,01,0113,0110,0, + /* 30226 */ 0241,0361,0374,050,0300,01,0113,0120,0, + /* 30235 */ 0240,0361,0374,050,0300,01,0113,0110,0, + /* 30244 */ 0241,0361,0175,050,0300,01,0106,0120,0, + /* 30253 */ 0240,0361,0175,050,0300,01,0106,0110,0, + /* 30262 */ 0241,0361,0174,050,0300,01,0106,0120,0, + /* 30271 */ 0240,0361,0174,050,0300,01,0106,0110,0, + /* 30280 */ 0241,0361,0375,050,0300,01,0106,0120,0, + /* 30289 */ 0240,0361,0375,050,0300,01,0106,0110,0, + /* 30298 */ 0241,0361,0374,050,0300,01,0106,0120,0, + /* 30307 */ 0240,0361,0374,050,0300,01,0106,0110,0, + /* 30316 */ 0241,0361,0175,050,0300,01,0107,0120,0, + /* 30325 */ 0240,0361,0175,050,0300,01,0107,0110,0, + /* 30334 */ 0241,0361,0174,050,0300,01,0107,0120,0, + /* 30343 */ 0240,0361,0174,050,0300,01,0107,0110,0, + /* 30352 */ 0241,0361,0375,050,0300,01,0107,0120,0, + /* 30361 */ 0240,0361,0375,050,0300,01,0107,0110,0, + /* 30370 */ 0241,0361,0374,050,0300,01,0107,0120,0, + /* 30379 */ 0240,0361,0374,050,0300,01,0107,0110,0, + /* 30388 */ 0241,0361,0375,010,0301,01,0130,0120,0, + /* 30397 */ 0240,0361,0375,010,0301,01,0130,0110,0, + /* 30406 */ 0241,0361,0375,050,0301,01,0130,0120,0, + /* 30415 */ 0240,0361,0375,050,0301,01,0130,0110,0, + /* 30424 */ 0241,0361,0375,0110,0301,01,0130,0120,0, + /* 30433 */ 0240,0361,0375,0110,0301,01,0130,0110,0, + /* 30442 */ 0241,0361,0174,010,0301,01,0130,0120,0, + /* 30451 */ 0240,0361,0174,010,0301,01,0130,0110,0, + /* 30460 */ 0241,0361,0174,050,0301,01,0130,0120,0, + /* 30469 */ 0240,0361,0174,050,0301,01,0130,0110,0, + /* 30478 */ 0241,0361,0174,0110,0301,01,0130,0120,0, + /* 30487 */ 0240,0361,0174,0110,0301,01,0130,0110,0, + /* 30496 */ 0241,0361,0377,010,0306,01,0130,0120,0, + /* 30505 */ 0240,0361,0377,010,0306,01,0130,0110,0, + /* 30514 */ 0241,0361,0176,010,0306,01,0130,0120,0, + /* 30523 */ 0240,0361,0176,010,0306,01,0130,0110,0, + /* 30532 */ 0241,0361,0375,010,0301,01,0125,0120,0, + /* 30541 */ 0240,0361,0375,010,0301,01,0125,0110,0, + /* 30550 */ 0241,0361,0375,050,0301,01,0125,0120,0, + /* 30559 */ 0240,0361,0375,050,0301,01,0125,0110,0, + /* 30568 */ 0241,0361,0375,0110,0301,01,0125,0120,0, + /* 30577 */ 0240,0361,0375,0110,0301,01,0125,0110,0, + /* 30586 */ 0241,0361,0174,010,0301,01,0125,0120,0, + /* 30595 */ 0240,0361,0174,010,0301,01,0125,0110,0, + /* 30604 */ 0241,0361,0174,050,0301,01,0125,0120,0, + /* 30613 */ 0240,0361,0174,050,0301,01,0125,0110,0, + /* 30622 */ 0241,0361,0174,0110,0301,01,0125,0120,0, + /* 30631 */ 0240,0361,0174,0110,0301,01,0125,0110,0, + /* 30640 */ 0241,0361,0375,010,0301,01,0124,0120,0, + /* 30649 */ 0240,0361,0375,010,0301,01,0124,0110,0, + /* 30658 */ 0241,0361,0375,050,0301,01,0124,0120,0, + /* 30667 */ 0240,0361,0375,050,0301,01,0124,0110,0, + /* 30676 */ 0241,0361,0375,0110,0301,01,0124,0120,0, + /* 30685 */ 0240,0361,0375,0110,0301,01,0124,0110,0, + /* 30694 */ 0241,0361,0174,010,0301,01,0124,0120,0, + /* 30703 */ 0240,0361,0174,010,0301,01,0124,0110,0, + /* 30712 */ 0241,0361,0174,050,0301,01,0124,0120,0, + /* 30721 */ 0240,0361,0174,050,0301,01,0124,0110,0, + /* 30730 */ 0241,0361,0174,0110,0301,01,0124,0120,0, + /* 30739 */ 0240,0361,0174,0110,0301,01,0124,0110,0, + /* 30748 */ 0241,0362,0375,010,0301,01,0145,0120,0, + /* 30757 */ 0241,0362,0375,050,0301,01,0145,0120,0, + /* 30766 */ 0241,0362,0375,0110,0301,01,0145,0120,0, + /* 30775 */ 0241,0362,0175,010,0301,01,0145,0120,0, + /* 30784 */ 0241,0362,0175,050,0301,01,0145,0120,0, + /* 30793 */ 0241,0362,0175,0110,0301,01,0145,0120,0, + /* 30802 */ 0250,0362,0175,050,0311,01,031,0110,0, + /* 30811 */ 0250,0362,0175,0110,0311,01,031,0110,0, + /* 30820 */ 0250,0362,0175,050,0312,01,032,0110,0, + /* 30829 */ 0250,0362,0175,0110,0312,01,032,0110,0, + /* 30838 */ 0250,0362,0175,0110,0313,01,033,0110,0, + /* 30847 */ 0250,0362,0375,050,0311,01,032,0110,0, + /* 30856 */ 0250,0362,0375,0110,0311,01,032,0110,0, + /* 30865 */ 0250,0362,0375,0110,0312,01,033,0110,0, + /* 30874 */ 0250,0362,0175,010,0311,01,0131,0110,0, + /* 30883 */ 0250,0362,0175,050,0311,01,0131,0110,0, + /* 30892 */ 0250,0362,0175,0110,0311,01,0131,0110,0, + /* 30901 */ 0250,0362,0175,050,0312,01,0132,0110,0, + /* 30910 */ 0250,0362,0175,0110,0312,01,0132,0110,0, + /* 30919 */ 0250,0362,0175,0110,0313,01,0133,0110,0, + /* 30928 */ 0250,0362,0375,050,0311,01,0132,0110,0, + /* 30937 */ 0250,0362,0375,0110,0311,01,0132,0110,0, + /* 30946 */ 0250,0362,0375,0110,0312,01,0133,0110,0, + /* 30955 */ 0250,0362,0375,050,0306,01,031,0110,0, + /* 30964 */ 0250,0362,0375,0110,0306,01,031,0110,0, + /* 30973 */ 0250,0362,0375,050,0300,01,031,0110,0, + /* 30982 */ 0250,0362,0375,0110,0300,01,031,0110,0, + /* 30991 */ 0250,0362,0175,010,0306,01,030,0110,0, + /* 31000 */ 0250,0362,0175,050,0306,01,030,0110,0, + /* 31009 */ 0250,0362,0175,0110,0306,01,030,0110,0, + /* 31018 */ 0250,0362,0175,010,0300,01,030,0110,0, + /* 31027 */ 0250,0362,0175,050,0300,01,030,0110,0, + /* 31036 */ 0250,0362,0175,0110,0300,01,030,0110,0, + /* 31045 */ 0250,0361,0375,010,0306,01,057,0110,0, + /* 31054 */ 0250,0361,0174,010,0306,01,057,0110,0, + /* 31063 */ 0250,0362,0375,010,0306,01,0212,0101,0, + /* 31072 */ 0250,0362,0375,050,0306,01,0212,0101,0, + /* 31081 */ 0250,0362,0375,0110,0306,01,0212,0101,0, + /* 31090 */ 0250,0362,0375,010,0300,01,0212,0101,0, + /* 31099 */ 0250,0362,0375,050,0300,01,0212,0101,0, + /* 31108 */ 0250,0362,0375,0110,0300,01,0212,0101,0, + /* 31117 */ 0250,0362,0175,010,0306,01,0212,0101,0, + /* 31126 */ 0250,0362,0175,050,0306,01,0212,0101,0, + /* 31135 */ 0250,0362,0175,0110,0306,01,0212,0101,0, + /* 31144 */ 0250,0362,0175,010,0300,01,0212,0101,0, + /* 31153 */ 0250,0362,0175,050,0300,01,0212,0101,0, + /* 31162 */ 0250,0362,0175,0110,0300,01,0212,0101,0, + /* 31171 */ 0250,0361,0176,010,0302,01,0346,0110,0, + /* 31180 */ 0250,0361,0176,050,0302,01,0346,0110,0, + /* 31189 */ 0250,0361,0176,0110,0302,01,0346,0110,0, + /* 31198 */ 0250,0361,0174,010,0301,01,0133,0110,0, + /* 31207 */ 0250,0361,0174,050,0301,01,0133,0110,0, + /* 31216 */ 0250,0361,0174,0110,0301,01,0133,0110,0, + /* 31225 */ 0250,0361,0377,010,0301,01,0346,0110,0, + /* 31234 */ 0250,0361,0377,050,0301,01,0346,0110,0, + /* 31243 */ 0250,0361,0377,0110,0301,01,0346,0110,0, + /* 31252 */ 0250,0361,0375,010,0301,01,0132,0110,0, + /* 31261 */ 0250,0361,0375,050,0301,01,0132,0110,0, + /* 31270 */ 0250,0361,0375,0110,0301,01,0132,0110,0, + /* 31279 */ 0250,0361,0375,010,0301,01,0173,0110,0, + /* 31288 */ 0250,0361,0375,050,0301,01,0173,0110,0, + /* 31297 */ 0250,0361,0375,0110,0301,01,0173,0110,0, + /* 31306 */ 0250,0361,0374,010,0301,01,0171,0110,0, + /* 31315 */ 0250,0361,0374,050,0301,01,0171,0110,0, + /* 31324 */ 0250,0361,0374,0110,0301,01,0171,0110,0, + /* 31333 */ 0250,0361,0375,010,0301,01,0171,0110,0, + /* 31342 */ 0250,0361,0375,050,0301,01,0171,0110,0, + /* 31351 */ 0250,0361,0375,0110,0301,01,0171,0110,0, + /* 31360 */ 0250,0362,0175,010,0314,01,023,0110,0, + /* 31369 */ 0250,0362,0175,050,0314,01,023,0110,0, + /* 31378 */ 0250,0362,0175,0110,0314,01,023,0110,0, + /* 31387 */ 0250,0361,0175,010,0301,01,0133,0110,0, + /* 31396 */ 0250,0361,0175,050,0301,01,0133,0110,0, + /* 31405 */ 0250,0361,0175,0110,0301,01,0133,0110,0, + /* 31414 */ 0250,0361,0174,010,0302,01,0132,0110,0, + /* 31423 */ 0250,0361,0174,050,0302,01,0132,0110,0, + /* 31432 */ 0250,0361,0174,0110,0302,01,0132,0110,0, + /* 31441 */ 0250,0361,0175,010,0302,01,0173,0110,0, + /* 31450 */ 0250,0361,0175,050,0302,01,0173,0110,0, + /* 31459 */ 0250,0361,0175,0110,0302,01,0173,0110,0, + /* 31468 */ 0250,0361,0174,010,0301,01,0171,0110,0, + /* 31477 */ 0250,0361,0174,050,0301,01,0171,0110,0, + /* 31486 */ 0250,0361,0174,0110,0301,01,0171,0110,0, + /* 31495 */ 0250,0361,0175,010,0302,01,0171,0110,0, + /* 31504 */ 0250,0361,0175,050,0302,01,0171,0110,0, + /* 31513 */ 0250,0361,0175,0110,0302,01,0171,0110,0, + /* 31522 */ 0250,0361,0376,010,0301,01,0346,0110,0, + /* 31531 */ 0250,0361,0376,050,0301,01,0346,0110,0, + /* 31540 */ 0250,0361,0376,0110,0301,01,0346,0110,0, + /* 31549 */ 0250,0361,0374,010,0301,01,0133,0110,0, + /* 31558 */ 0250,0361,0374,050,0301,01,0133,0110,0, + /* 31567 */ 0250,0361,0374,0110,0301,01,0133,0110,0, + /* 31576 */ 0250,0361,0177,010,0310,01,055,0110,0, + /* 31585 */ 0250,0361,0377,010,0310,01,055,0110,0, + /* 31594 */ 0241,0361,0377,010,0306,01,0132,0120,0, + /* 31603 */ 0240,0361,0377,010,0306,01,0132,0110,0, + /* 31612 */ 0250,0361,0177,010,0310,01,0171,0110,0, + /* 31621 */ 0250,0361,0377,010,0310,01,0171,0110,0, + /* 31630 */ 0241,0361,0177,010,0306,01,052,0120,0, + /* 31639 */ 0240,0361,0177,010,0306,01,052,0110,0, + /* 31648 */ 0241,0361,0377,010,0306,01,052,0120,0, + /* 31657 */ 0240,0361,0377,010,0306,01,052,0110,0, + /* 31666 */ 0241,0361,0176,010,0306,01,052,0120,0, + /* 31675 */ 0240,0361,0176,010,0306,01,052,0110,0, + /* 31684 */ 0241,0361,0376,010,0306,01,052,0120,0, + /* 31693 */ 0240,0361,0376,010,0306,01,052,0110,0, + /* 31702 */ 0241,0361,0176,010,0306,01,0132,0120,0, + /* 31711 */ 0240,0361,0176,010,0306,01,0132,0110,0, + /* 31720 */ 0250,0361,0176,010,0307,01,055,0110,0, + /* 31729 */ 0250,0361,0376,010,0307,01,055,0110,0, + /* 31738 */ 0250,0361,0176,010,0307,01,0171,0110,0, + /* 31747 */ 0250,0361,0376,010,0307,01,0171,0110,0, + /* 31756 */ 0250,0361,0375,010,0301,01,0346,0110,0, + /* 31765 */ 0250,0361,0375,050,0301,01,0346,0110,0, + /* 31774 */ 0250,0361,0375,0110,0301,01,0346,0110,0, + /* 31783 */ 0250,0361,0375,010,0301,01,0172,0110,0, + /* 31792 */ 0250,0361,0375,050,0301,01,0172,0110,0, + /* 31801 */ 0250,0361,0375,0110,0301,01,0172,0110,0, + /* 31810 */ 0250,0361,0374,010,0301,01,0170,0110,0, + /* 31819 */ 0250,0361,0374,050,0301,01,0170,0110,0, + /* 31828 */ 0250,0361,0374,0110,0301,01,0170,0110,0, + /* 31837 */ 0250,0361,0375,010,0301,01,0170,0110,0, + /* 31846 */ 0250,0361,0375,050,0301,01,0170,0110,0, + /* 31855 */ 0250,0361,0375,0110,0301,01,0170,0110,0, + /* 31864 */ 0250,0361,0176,010,0301,01,0133,0110,0, + /* 31873 */ 0250,0361,0176,050,0301,01,0133,0110,0, + /* 31882 */ 0250,0361,0176,0110,0301,01,0133,0110,0, + /* 31891 */ 0250,0361,0175,010,0302,01,0172,0110,0, + /* 31900 */ 0250,0361,0175,050,0302,01,0172,0110,0, + /* 31909 */ 0250,0361,0175,0110,0302,01,0172,0110,0, + /* 31918 */ 0250,0361,0174,010,0301,01,0170,0110,0, + /* 31927 */ 0250,0361,0174,050,0301,01,0170,0110,0, + /* 31936 */ 0250,0361,0174,0110,0301,01,0170,0110,0, + /* 31945 */ 0250,0361,0175,010,0302,01,0170,0110,0, + /* 31954 */ 0250,0361,0175,050,0302,01,0170,0110,0, + /* 31963 */ 0250,0361,0175,0110,0302,01,0170,0110,0, + /* 31972 */ 0250,0361,0177,010,0310,01,054,0110,0, + /* 31981 */ 0250,0361,0377,010,0310,01,054,0110,0, + /* 31990 */ 0250,0361,0177,010,0310,01,0170,0110,0, + /* 31999 */ 0250,0361,0377,010,0310,01,0170,0110,0, + /* 32008 */ 0250,0361,0176,010,0307,01,054,0110,0, + /* 32017 */ 0250,0361,0376,010,0307,01,054,0110,0, + /* 32026 */ 0250,0361,0176,010,0307,01,0170,0110,0, + /* 32035 */ 0250,0361,0376,010,0307,01,0170,0110,0, + /* 32044 */ 0250,0361,0176,010,0302,01,0172,0110,0, + /* 32053 */ 0250,0361,0176,050,0302,01,0172,0110,0, + /* 32062 */ 0250,0361,0176,0110,0302,01,0172,0110,0, + /* 32071 */ 0250,0361,0177,010,0301,01,0172,0110,0, + /* 32080 */ 0250,0361,0177,050,0301,01,0172,0110,0, + /* 32089 */ 0250,0361,0177,0110,0301,01,0172,0110,0, + /* 32098 */ 0250,0361,0376,010,0301,01,0172,0110,0, + /* 32107 */ 0250,0361,0376,050,0301,01,0172,0110,0, + /* 32116 */ 0250,0361,0376,0110,0301,01,0172,0110,0, + /* 32125 */ 0250,0361,0377,010,0301,01,0172,0110,0, + /* 32134 */ 0250,0361,0377,050,0301,01,0172,0110,0, + /* 32143 */ 0250,0361,0377,0110,0301,01,0172,0110,0, + /* 32152 */ 0241,0361,0177,010,0306,01,0173,0120,0, + /* 32161 */ 0240,0361,0177,010,0306,01,0173,0110,0, + /* 32170 */ 0241,0361,0377,010,0306,01,0173,0120,0, + /* 32179 */ 0240,0361,0377,010,0306,01,0173,0110,0, + /* 32188 */ 0241,0361,0176,010,0306,01,0173,0120,0, + /* 32197 */ 0240,0361,0176,010,0306,01,0173,0110,0, + /* 32206 */ 0241,0361,0376,010,0306,01,0173,0120,0, + /* 32215 */ 0240,0361,0376,010,0306,01,0173,0110,0, + /* 32224 */ 0241,0361,0375,010,0301,01,0136,0120,0, + /* 32233 */ 0240,0361,0375,010,0301,01,0136,0110,0, + /* 32242 */ 0241,0361,0375,050,0301,01,0136,0120,0, + /* 32251 */ 0240,0361,0375,050,0301,01,0136,0110,0, + /* 32260 */ 0241,0361,0375,0110,0301,01,0136,0120,0, + /* 32269 */ 0240,0361,0375,0110,0301,01,0136,0110,0, + /* 32278 */ 0241,0361,0174,010,0301,01,0136,0120,0, + /* 32287 */ 0240,0361,0174,010,0301,01,0136,0110,0, + /* 32296 */ 0241,0361,0174,050,0301,01,0136,0120,0, + /* 32305 */ 0240,0361,0174,050,0301,01,0136,0110,0, + /* 32314 */ 0241,0361,0174,0110,0301,01,0136,0120,0, + /* 32323 */ 0240,0361,0174,0110,0301,01,0136,0110,0, + /* 32332 */ 0241,0361,0377,010,0306,01,0136,0120,0, + /* 32341 */ 0240,0361,0377,010,0306,01,0136,0110,0, + /* 32350 */ 0241,0361,0176,010,0306,01,0136,0120,0, + /* 32359 */ 0240,0361,0176,010,0306,01,0136,0110,0, + /* 32368 */ 0250,0362,0375,0110,0301,01,0310,0110,0, + /* 32377 */ 0250,0362,0175,0110,0301,01,0310,0110,0, + /* 32386 */ 0250,0362,0375,010,0306,01,0210,0110,0, + /* 32395 */ 0250,0362,0375,050,0306,01,0210,0110,0, + /* 32404 */ 0250,0362,0375,0110,0306,01,0210,0110,0, + /* 32413 */ 0250,0362,0175,010,0306,01,0210,0110,0, + /* 32422 */ 0250,0362,0175,050,0306,01,0210,0110,0, + /* 32431 */ 0250,0362,0175,0110,0306,01,0210,0110,0, + /* 32440 */ 0241,0362,0375,010,0301,01,0230,0120,0, + /* 32449 */ 0241,0362,0375,050,0301,01,0230,0120,0, + /* 32458 */ 0241,0362,0375,0110,0301,01,0230,0120,0, + /* 32467 */ 0241,0362,0175,010,0301,01,0230,0120,0, + /* 32476 */ 0241,0362,0175,050,0301,01,0230,0120,0, + /* 32485 */ 0241,0362,0175,0110,0301,01,0230,0120,0, + /* 32494 */ 0241,0362,0375,010,0306,01,0231,0120,0, + /* 32503 */ 0241,0362,0175,010,0306,01,0231,0120,0, + /* 32512 */ 0241,0362,0375,010,0301,01,0250,0120,0, + /* 32521 */ 0241,0362,0375,050,0301,01,0250,0120,0, + /* 32530 */ 0241,0362,0375,0110,0301,01,0250,0120,0, + /* 32539 */ 0241,0362,0175,010,0301,01,0250,0120,0, + /* 32548 */ 0241,0362,0175,050,0301,01,0250,0120,0, + /* 32557 */ 0241,0362,0175,0110,0301,01,0250,0120,0, + /* 32566 */ 0241,0362,0375,010,0306,01,0251,0120,0, + /* 32575 */ 0241,0362,0175,010,0306,01,0251,0120,0, + /* 32584 */ 0241,0362,0375,010,0301,01,0270,0120,0, + /* 32593 */ 0241,0362,0375,050,0301,01,0270,0120,0, + /* 32602 */ 0241,0362,0375,0110,0301,01,0270,0120,0, + /* 32611 */ 0241,0362,0175,010,0301,01,0270,0120,0, + /* 32620 */ 0241,0362,0175,050,0301,01,0270,0120,0, + /* 32629 */ 0241,0362,0175,0110,0301,01,0270,0120,0, + /* 32638 */ 0241,0362,0375,010,0306,01,0271,0120,0, + /* 32647 */ 0241,0362,0175,010,0306,01,0271,0120,0, + /* 32656 */ 0241,0362,0375,010,0301,01,0226,0120,0, + /* 32665 */ 0241,0362,0375,050,0301,01,0226,0120,0, + /* 32674 */ 0241,0362,0375,0110,0301,01,0226,0120,0, + /* 32683 */ 0241,0362,0175,010,0301,01,0226,0120,0, + /* 32692 */ 0241,0362,0175,050,0301,01,0226,0120,0, + /* 32701 */ 0241,0362,0175,0110,0301,01,0226,0120,0, + /* 32710 */ 0241,0362,0375,010,0301,01,0246,0120,0, + /* 32719 */ 0241,0362,0375,050,0301,01,0246,0120,0, + /* 32728 */ 0241,0362,0375,0110,0301,01,0246,0120,0, + /* 32737 */ 0241,0362,0175,010,0301,01,0246,0120,0, + /* 32746 */ 0241,0362,0175,050,0301,01,0246,0120,0, + /* 32755 */ 0241,0362,0175,0110,0301,01,0246,0120,0, + /* 32764 */ 0241,0362,0375,010,0301,01,0266,0120,0, + /* 32773 */ 0241,0362,0375,050,0301,01,0266,0120,0, + /* 32782 */ 0241,0362,0375,0110,0301,01,0266,0120,0, + /* 32791 */ 0241,0362,0175,010,0301,01,0266,0120,0, + /* 32800 */ 0241,0362,0175,050,0301,01,0266,0120,0, + /* 32809 */ 0241,0362,0175,0110,0301,01,0266,0120,0, + /* 32818 */ 0241,0362,0375,010,0301,01,0232,0120,0, + /* 32827 */ 0241,0362,0375,050,0301,01,0232,0120,0, + /* 32836 */ 0241,0362,0375,0110,0301,01,0232,0120,0, + /* 32845 */ 0241,0362,0175,010,0301,01,0232,0120,0, + /* 32854 */ 0241,0362,0175,050,0301,01,0232,0120,0, + /* 32863 */ 0241,0362,0175,0110,0301,01,0232,0120,0, + /* 32872 */ 0241,0362,0375,010,0306,01,0233,0120,0, + /* 32881 */ 0241,0362,0175,010,0306,01,0233,0120,0, + /* 32890 */ 0241,0362,0375,010,0301,01,0252,0120,0, + /* 32899 */ 0241,0362,0375,050,0301,01,0252,0120,0, + /* 32908 */ 0241,0362,0375,0110,0301,01,0252,0120,0, + /* 32917 */ 0241,0362,0175,010,0301,01,0252,0120,0, + /* 32926 */ 0241,0362,0175,050,0301,01,0252,0120,0, + /* 32935 */ 0241,0362,0175,0110,0301,01,0252,0120,0, + /* 32944 */ 0241,0362,0375,010,0306,01,0253,0120,0, + /* 32953 */ 0241,0362,0175,010,0306,01,0253,0120,0, + /* 32962 */ 0241,0362,0375,010,0301,01,0272,0120,0, + /* 32971 */ 0241,0362,0375,050,0301,01,0272,0120,0, + /* 32980 */ 0241,0362,0375,0110,0301,01,0272,0120,0, + /* 32989 */ 0241,0362,0175,010,0301,01,0272,0120,0, + /* 32998 */ 0241,0362,0175,050,0301,01,0272,0120,0, + /* 33007 */ 0241,0362,0175,0110,0301,01,0272,0120,0, + /* 33016 */ 0241,0362,0375,010,0306,01,0273,0120,0, + /* 33025 */ 0241,0362,0175,010,0306,01,0273,0120,0, + /* 33034 */ 0241,0362,0375,010,0301,01,0227,0120,0, + /* 33043 */ 0241,0362,0375,050,0301,01,0227,0120,0, + /* 33052 */ 0241,0362,0375,0110,0301,01,0227,0120,0, + /* 33061 */ 0241,0362,0175,010,0301,01,0227,0120,0, + /* 33070 */ 0241,0362,0175,050,0301,01,0227,0120,0, + /* 33079 */ 0241,0362,0175,0110,0301,01,0227,0120,0, + /* 33088 */ 0241,0362,0375,010,0301,01,0247,0120,0, + /* 33097 */ 0241,0362,0375,050,0301,01,0247,0120,0, + /* 33106 */ 0241,0362,0375,0110,0301,01,0247,0120,0, + /* 33115 */ 0241,0362,0175,010,0301,01,0247,0120,0, + /* 33124 */ 0241,0362,0175,050,0301,01,0247,0120,0, + /* 33133 */ 0241,0362,0175,0110,0301,01,0247,0120,0, + /* 33142 */ 0241,0362,0375,010,0301,01,0267,0120,0, + /* 33151 */ 0241,0362,0375,050,0301,01,0267,0120,0, + /* 33160 */ 0241,0362,0375,0110,0301,01,0267,0120,0, + /* 33169 */ 0241,0362,0175,010,0301,01,0267,0120,0, + /* 33178 */ 0241,0362,0175,050,0301,01,0267,0120,0, + /* 33187 */ 0241,0362,0175,0110,0301,01,0267,0120,0, + /* 33196 */ 0241,0362,0375,010,0301,01,0234,0120,0, + /* 33205 */ 0241,0362,0375,050,0301,01,0234,0120,0, + /* 33214 */ 0241,0362,0375,0110,0301,01,0234,0120,0, + /* 33223 */ 0241,0362,0175,010,0301,01,0234,0120,0, + /* 33232 */ 0241,0362,0175,050,0301,01,0234,0120,0, + /* 33241 */ 0241,0362,0175,0110,0301,01,0234,0120,0, + /* 33250 */ 0241,0362,0375,010,0306,01,0235,0120,0, + /* 33259 */ 0241,0362,0175,010,0306,01,0235,0120,0, + /* 33268 */ 0241,0362,0375,010,0301,01,0254,0120,0, + /* 33277 */ 0241,0362,0375,050,0301,01,0254,0120,0, + /* 33286 */ 0241,0362,0375,0110,0301,01,0254,0120,0, + /* 33295 */ 0241,0362,0175,010,0301,01,0254,0120,0, + /* 33304 */ 0241,0362,0175,050,0301,01,0254,0120,0, + /* 33313 */ 0241,0362,0175,0110,0301,01,0254,0120,0, + /* 33322 */ 0241,0362,0375,010,0306,01,0255,0120,0, + /* 33331 */ 0241,0362,0175,010,0306,01,0255,0120,0, + /* 33340 */ 0241,0362,0375,010,0301,01,0274,0120,0, + /* 33349 */ 0241,0362,0375,050,0301,01,0274,0120,0, + /* 33358 */ 0241,0362,0375,0110,0301,01,0274,0120,0, + /* 33367 */ 0241,0362,0175,010,0301,01,0274,0120,0, + /* 33376 */ 0241,0362,0175,050,0301,01,0274,0120,0, + /* 33385 */ 0241,0362,0175,0110,0301,01,0274,0120,0, + /* 33394 */ 0241,0362,0375,010,0306,01,0275,0120,0, + /* 33403 */ 0241,0362,0175,010,0306,01,0275,0120,0, + /* 33412 */ 0241,0362,0375,010,0301,01,0236,0120,0, + /* 33421 */ 0241,0362,0375,050,0301,01,0236,0120,0, + /* 33430 */ 0241,0362,0375,0110,0301,01,0236,0120,0, + /* 33439 */ 0241,0362,0175,010,0301,01,0236,0120,0, + /* 33448 */ 0241,0362,0175,050,0301,01,0236,0120,0, + /* 33457 */ 0241,0362,0175,0110,0301,01,0236,0120,0, + /* 33466 */ 0241,0362,0375,010,0306,01,0237,0120,0, + /* 33475 */ 0241,0362,0175,010,0306,01,0237,0120,0, + /* 33484 */ 0241,0362,0375,010,0301,01,0256,0120,0, + /* 33493 */ 0241,0362,0375,050,0301,01,0256,0120,0, + /* 33502 */ 0241,0362,0375,0110,0301,01,0256,0120,0, + /* 33511 */ 0241,0362,0175,010,0301,01,0256,0120,0, + /* 33520 */ 0241,0362,0175,050,0301,01,0256,0120,0, + /* 33529 */ 0241,0362,0175,0110,0301,01,0256,0120,0, + /* 33538 */ 0241,0362,0375,010,0306,01,0257,0120,0, + /* 33547 */ 0241,0362,0175,010,0306,01,0257,0120,0, + /* 33556 */ 0241,0362,0375,010,0301,01,0276,0120,0, + /* 33565 */ 0241,0362,0375,050,0301,01,0276,0120,0, + /* 33574 */ 0241,0362,0375,0110,0301,01,0276,0120,0, + /* 33583 */ 0241,0362,0175,010,0301,01,0276,0120,0, + /* 33592 */ 0241,0362,0175,050,0301,01,0276,0120,0, + /* 33601 */ 0241,0362,0175,0110,0301,01,0276,0120,0, + /* 33610 */ 0241,0362,0375,010,0306,01,0277,0120,0, + /* 33619 */ 0241,0362,0175,010,0306,01,0277,0120,0, + /* 33628 */ 0250,0362,0375,010,0301,01,0102,0110,0, + /* 33637 */ 0250,0362,0375,050,0301,01,0102,0110,0, + /* 33646 */ 0250,0362,0375,0110,0301,01,0102,0110,0, + /* 33655 */ 0250,0362,0175,010,0301,01,0102,0110,0, + /* 33664 */ 0250,0362,0175,050,0301,01,0102,0110,0, + /* 33673 */ 0250,0362,0175,0110,0301,01,0102,0110,0, + /* 33682 */ 0241,0362,0375,010,0306,01,0103,0120,0, + /* 33691 */ 0241,0362,0175,010,0306,01,0103,0120,0, + /* 33700 */ 0241,0361,0375,010,0301,01,0137,0120,0, + /* 33709 */ 0240,0361,0375,010,0301,01,0137,0110,0, + /* 33718 */ 0241,0361,0375,050,0301,01,0137,0120,0, + /* 33727 */ 0240,0361,0375,050,0301,01,0137,0110,0, + /* 33736 */ 0241,0361,0375,0110,0301,01,0137,0120,0, + /* 33745 */ 0240,0361,0375,0110,0301,01,0137,0110,0, + /* 33754 */ 0241,0361,0174,010,0301,01,0137,0120,0, + /* 33763 */ 0240,0361,0174,010,0301,01,0137,0110,0, + /* 33772 */ 0241,0361,0174,050,0301,01,0137,0120,0, + /* 33781 */ 0240,0361,0174,050,0301,01,0137,0110,0, + /* 33790 */ 0241,0361,0174,0110,0301,01,0137,0120,0, + /* 33799 */ 0240,0361,0174,0110,0301,01,0137,0110,0, + /* 33808 */ 0241,0361,0377,010,0306,01,0137,0120,0, + /* 33817 */ 0240,0361,0377,010,0306,01,0137,0110,0, + /* 33826 */ 0241,0361,0176,010,0306,01,0137,0120,0, + /* 33835 */ 0240,0361,0176,010,0306,01,0137,0110,0, + /* 33844 */ 0241,0361,0375,010,0301,01,0135,0120,0, + /* 33853 */ 0240,0361,0375,010,0301,01,0135,0110,0, + /* 33862 */ 0241,0361,0375,050,0301,01,0135,0120,0, + /* 33871 */ 0240,0361,0375,050,0301,01,0135,0110,0, + /* 33880 */ 0241,0361,0375,0110,0301,01,0135,0120,0, + /* 33889 */ 0240,0361,0375,0110,0301,01,0135,0110,0, + /* 33898 */ 0241,0361,0174,010,0301,01,0135,0120,0, + /* 33907 */ 0240,0361,0174,010,0301,01,0135,0110,0, + /* 33916 */ 0241,0361,0174,050,0301,01,0135,0120,0, + /* 33925 */ 0240,0361,0174,050,0301,01,0135,0110,0, + /* 33934 */ 0241,0361,0174,0110,0301,01,0135,0120,0, + /* 33943 */ 0240,0361,0174,0110,0301,01,0135,0110,0, + /* 33952 */ 0241,0361,0377,010,0306,01,0135,0120,0, + /* 33961 */ 0240,0361,0377,010,0306,01,0135,0110,0, + /* 33970 */ 0241,0361,0176,010,0306,01,0135,0120,0, + /* 33979 */ 0240,0361,0176,010,0306,01,0135,0110,0, + /* 33988 */ 0250,0361,0375,010,0303,01,050,0110,0, + /* 33997 */ 0250,0361,0375,050,0303,01,050,0110,0, + /* 34006 */ 0250,0361,0375,0110,0303,01,050,0110,0, + /* 34015 */ 0250,0361,0375,010,0300,01,051,0101,0, + /* 34024 */ 0250,0361,0375,050,0300,01,051,0101,0, + /* 34033 */ 0250,0361,0375,0110,0300,01,051,0101,0, + /* 34042 */ 0250,0361,0375,010,0303,01,051,0101,0, + /* 34051 */ 0250,0361,0375,050,0303,01,051,0101,0, + /* 34060 */ 0250,0361,0375,0110,0303,01,051,0101,0, + /* 34069 */ 0250,0361,0174,010,0303,01,050,0110,0, + /* 34078 */ 0250,0361,0174,050,0303,01,050,0110,0, + /* 34087 */ 0250,0361,0174,0110,0303,01,050,0110,0, + /* 34096 */ 0250,0361,0174,010,0300,01,051,0101,0, + /* 34105 */ 0250,0361,0174,050,0300,01,051,0101,0, + /* 34114 */ 0250,0361,0174,0110,0300,01,051,0101,0, + /* 34123 */ 0250,0361,0174,010,0303,01,051,0101,0, + /* 34132 */ 0250,0361,0174,050,0303,01,051,0101,0, + /* 34141 */ 0250,0361,0174,0110,0303,01,051,0101,0, + /* 34150 */ 0250,0361,0175,010,0306,01,0156,0110,0, + /* 34159 */ 0250,0361,0175,010,0306,01,0176,0101,0, + /* 34168 */ 0250,0361,0377,010,0320,01,022,0110,0, + /* 34177 */ 0250,0361,0377,050,0320,01,022,0110,0, + /* 34186 */ 0250,0361,0377,0110,0320,01,022,0110,0, + /* 34195 */ 0250,0361,0175,010,0303,01,0157,0110,0, + /* 34204 */ 0250,0361,0175,050,0303,01,0157,0110,0, + /* 34213 */ 0250,0361,0175,0110,0303,01,0157,0110,0, + /* 34222 */ 0250,0361,0175,010,0303,01,0177,0101,0, + /* 34231 */ 0250,0361,0175,050,0303,01,0177,0101,0, + /* 34240 */ 0250,0361,0175,0110,0303,01,0177,0101,0, + /* 34249 */ 0250,0361,0375,010,0303,01,0157,0110,0, + /* 34258 */ 0250,0361,0375,050,0303,01,0157,0110,0, + /* 34267 */ 0250,0361,0375,0110,0303,01,0157,0110,0, + /* 34276 */ 0250,0361,0375,010,0303,01,0177,0101,0, + /* 34285 */ 0250,0361,0375,050,0303,01,0177,0101,0, + /* 34294 */ 0250,0361,0375,0110,0303,01,0177,0101,0, + /* 34303 */ 0250,0361,0377,010,0303,01,0157,0110,0, + /* 34312 */ 0250,0361,0377,050,0303,01,0157,0110,0, + /* 34321 */ 0250,0361,0377,0110,0303,01,0157,0110,0, + /* 34330 */ 0250,0361,0377,010,0303,01,0177,0101,0, + /* 34339 */ 0250,0361,0377,050,0303,01,0177,0101,0, + /* 34348 */ 0250,0361,0377,0110,0303,01,0177,0101,0, + /* 34357 */ 0250,0361,0176,010,0303,01,0157,0110,0, + /* 34366 */ 0250,0361,0176,050,0303,01,0157,0110,0, + /* 34375 */ 0250,0361,0176,0110,0303,01,0157,0110,0, + /* 34384 */ 0250,0361,0176,010,0303,01,0177,0101,0, + /* 34393 */ 0250,0361,0176,050,0303,01,0177,0101,0, + /* 34402 */ 0250,0361,0176,0110,0303,01,0177,0101,0, + /* 34411 */ 0250,0361,0376,010,0303,01,0157,0110,0, + /* 34420 */ 0250,0361,0376,050,0303,01,0157,0110,0, + /* 34429 */ 0250,0361,0376,0110,0303,01,0157,0110,0, + /* 34438 */ 0250,0361,0376,010,0303,01,0177,0101,0, + /* 34447 */ 0250,0361,0376,050,0303,01,0177,0101,0, + /* 34456 */ 0250,0361,0376,0110,0303,01,0177,0101,0, + /* 34465 */ 0250,0361,0177,010,0303,01,0157,0110,0, + /* 34474 */ 0250,0361,0177,050,0303,01,0157,0110,0, + /* 34483 */ 0250,0361,0177,0110,0303,01,0157,0110,0, + /* 34492 */ 0250,0361,0177,010,0303,01,0177,0101,0, + /* 34501 */ 0250,0361,0177,050,0303,01,0177,0101,0, + /* 34510 */ 0250,0361,0177,0110,0303,01,0177,0101,0, + /* 34519 */ 0241,0361,0174,010,0300,01,022,0120,0, + /* 34528 */ 0240,0361,0174,010,0300,01,022,0110,0, + /* 34537 */ 0241,0361,0375,010,0306,01,026,0120,0, + /* 34546 */ 0240,0361,0375,010,0306,01,026,0110,0, + /* 34555 */ 0250,0361,0375,010,0306,01,027,0101,0, + /* 34564 */ 0241,0361,0174,010,0311,01,026,0120,0, + /* 34573 */ 0240,0361,0174,010,0311,01,026,0110,0, + /* 34582 */ 0250,0361,0174,010,0311,01,027,0101,0, + /* 34591 */ 0241,0361,0174,010,0300,01,026,0120,0, + /* 34600 */ 0240,0361,0174,010,0300,01,026,0110,0, + /* 34609 */ 0241,0361,0375,010,0306,01,022,0120,0, + /* 34618 */ 0240,0361,0375,010,0306,01,022,0110,0, + /* 34627 */ 0250,0361,0375,010,0306,01,023,0101,0, + /* 34636 */ 0241,0361,0174,010,0311,01,022,0120,0, + /* 34645 */ 0240,0361,0174,010,0311,01,022,0110,0, + /* 34654 */ 0250,0361,0174,010,0311,01,023,0101,0, + /* 34663 */ 0250,0361,0175,010,0303,01,0347,0101,0, + /* 34672 */ 0250,0361,0175,050,0303,01,0347,0101,0, + /* 34681 */ 0250,0361,0175,0110,0303,01,0347,0101,0, + /* 34690 */ 0250,0362,0175,010,0303,01,052,0110,0, + /* 34699 */ 0250,0362,0175,050,0303,01,052,0110,0, + /* 34708 */ 0250,0362,0175,0110,0303,01,052,0110,0, + /* 34717 */ 0250,0361,0375,010,0303,01,053,0101,0, + /* 34726 */ 0250,0361,0375,050,0303,01,053,0101,0, + /* 34735 */ 0250,0361,0375,0110,0303,01,053,0101,0, + /* 34744 */ 0250,0361,0174,010,0303,01,053,0101,0, + /* 34753 */ 0250,0361,0174,050,0303,01,053,0101,0, + /* 34762 */ 0250,0361,0174,0110,0303,01,053,0101,0, + /* 34771 */ 0250,0361,0375,010,0306,01,0156,0110,0, + /* 34780 */ 0250,0361,0375,010,0306,01,0176,0101,0, + /* 34789 */ 0250,0361,0376,010,0306,01,0176,0110,0, + /* 34798 */ 0250,0361,0375,010,0306,01,0326,0101,0, + /* 34807 */ 0250,0361,0377,010,0306,01,020,0110,0, + /* 34816 */ 0250,0361,0377,010,0306,01,021,0101,0, + /* 34825 */ 0241,0361,0377,010,0300,01,020,0120,0, + /* 34834 */ 0240,0361,0377,010,0300,01,020,0110,0, + /* 34843 */ 0241,0361,0377,010,0300,01,021,0102,0, + /* 34852 */ 0240,0361,0377,010,0300,01,021,0101,0, + /* 34861 */ 0250,0361,0176,010,0303,01,026,0110,0, + /* 34870 */ 0250,0361,0176,050,0303,01,026,0110,0, + /* 34879 */ 0250,0361,0176,0110,0303,01,026,0110,0, + /* 34888 */ 0250,0361,0176,010,0303,01,022,0110,0, + /* 34897 */ 0250,0361,0176,050,0303,01,022,0110,0, + /* 34906 */ 0250,0361,0176,0110,0303,01,022,0110,0, + /* 34915 */ 0250,0361,0176,010,0306,01,020,0110,0, + /* 34924 */ 0250,0361,0176,010,0306,01,021,0101,0, + /* 34933 */ 0241,0361,0176,010,0300,01,020,0120,0, + /* 34942 */ 0240,0361,0176,010,0300,01,020,0110,0, + /* 34951 */ 0241,0361,0176,010,0300,01,021,0102,0, + /* 34960 */ 0240,0361,0176,010,0300,01,021,0101,0, + /* 34969 */ 0250,0361,0375,010,0303,01,020,0110,0, + /* 34978 */ 0250,0361,0375,050,0303,01,020,0110,0, + /* 34987 */ 0250,0361,0375,0110,0303,01,020,0110,0, + /* 34996 */ 0250,0361,0375,010,0300,01,021,0101,0, + /* 35005 */ 0250,0361,0375,050,0300,01,021,0101,0, + /* 35014 */ 0250,0361,0375,0110,0300,01,021,0101,0, + /* 35023 */ 0250,0361,0375,010,0303,01,021,0101,0, + /* 35032 */ 0250,0361,0375,050,0303,01,021,0101,0, + /* 35041 */ 0250,0361,0375,0110,0303,01,021,0101,0, + /* 35050 */ 0250,0361,0174,010,0303,01,020,0110,0, + /* 35059 */ 0250,0361,0174,050,0303,01,020,0110,0, + /* 35068 */ 0250,0361,0174,0110,0303,01,020,0110,0, + /* 35077 */ 0250,0361,0174,010,0300,01,021,0101,0, + /* 35086 */ 0250,0361,0174,050,0300,01,021,0101,0, + /* 35095 */ 0250,0361,0174,0110,0300,01,021,0101,0, + /* 35104 */ 0250,0361,0174,010,0303,01,021,0101,0, + /* 35113 */ 0250,0361,0174,050,0303,01,021,0101,0, + /* 35122 */ 0250,0361,0174,0110,0303,01,021,0101,0, + /* 35131 */ 0241,0361,0375,010,0301,01,0131,0120,0, + /* 35140 */ 0240,0361,0375,010,0301,01,0131,0110,0, + /* 35149 */ 0241,0361,0375,050,0301,01,0131,0120,0, + /* 35158 */ 0240,0361,0375,050,0301,01,0131,0110,0, + /* 35167 */ 0241,0361,0375,0110,0301,01,0131,0120,0, + /* 35176 */ 0240,0361,0375,0110,0301,01,0131,0110,0, + /* 35185 */ 0241,0361,0174,010,0301,01,0131,0120,0, + /* 35194 */ 0240,0361,0174,010,0301,01,0131,0110,0, + /* 35203 */ 0241,0361,0174,050,0301,01,0131,0120,0, + /* 35212 */ 0240,0361,0174,050,0301,01,0131,0110,0, + /* 35221 */ 0241,0361,0174,0110,0301,01,0131,0120,0, + /* 35230 */ 0240,0361,0174,0110,0301,01,0131,0110,0, + /* 35239 */ 0241,0361,0377,010,0306,01,0131,0120,0, + /* 35248 */ 0240,0361,0377,010,0306,01,0131,0110,0, + /* 35257 */ 0241,0361,0176,010,0306,01,0131,0120,0, + /* 35266 */ 0240,0361,0176,010,0306,01,0131,0110,0, + /* 35275 */ 0241,0361,0375,010,0301,01,0126,0120,0, + /* 35284 */ 0240,0361,0375,010,0301,01,0126,0110,0, + /* 35293 */ 0241,0361,0375,050,0301,01,0126,0120,0, + /* 35302 */ 0240,0361,0375,050,0301,01,0126,0110,0, + /* 35311 */ 0241,0361,0375,0110,0301,01,0126,0120,0, + /* 35320 */ 0240,0361,0375,0110,0301,01,0126,0110,0, + /* 35329 */ 0241,0361,0174,010,0301,01,0126,0120,0, + /* 35338 */ 0240,0361,0174,010,0301,01,0126,0110,0, + /* 35347 */ 0241,0361,0174,050,0301,01,0126,0120,0, + /* 35356 */ 0240,0361,0174,050,0301,01,0126,0110,0, + /* 35365 */ 0241,0361,0174,0110,0301,01,0126,0120,0, + /* 35374 */ 0240,0361,0174,0110,0301,01,0126,0110,0, + /* 35383 */ 0250,0362,0175,010,0303,01,034,0110,0, + /* 35392 */ 0250,0362,0175,050,0303,01,034,0110,0, + /* 35401 */ 0250,0362,0175,0110,0303,01,034,0110,0, + /* 35410 */ 0250,0362,0175,010,0301,01,036,0110,0, + /* 35419 */ 0250,0362,0175,050,0301,01,036,0110,0, + /* 35428 */ 0250,0362,0175,0110,0301,01,036,0110,0, + /* 35437 */ 0250,0362,0375,010,0301,01,037,0110,0, + /* 35446 */ 0250,0362,0375,050,0301,01,037,0110,0, + /* 35455 */ 0250,0362,0375,0110,0301,01,037,0110,0, + /* 35464 */ 0250,0362,0175,010,0303,01,035,0110,0, + /* 35473 */ 0250,0362,0175,050,0303,01,035,0110,0, + /* 35482 */ 0250,0362,0175,0110,0303,01,035,0110,0, + /* 35491 */ 0241,0361,0175,010,0301,01,0153,0120,0, + /* 35500 */ 0240,0361,0175,010,0301,01,0153,0110,0, + /* 35509 */ 0241,0361,0175,050,0301,01,0153,0120,0, + /* 35518 */ 0240,0361,0175,050,0301,01,0153,0110,0, + /* 35527 */ 0241,0361,0175,0110,0301,01,0153,0120,0, + /* 35536 */ 0240,0361,0175,0110,0301,01,0153,0110,0, + /* 35545 */ 0241,0361,0175,010,0303,01,0143,0120,0, + /* 35554 */ 0240,0361,0175,010,0303,01,0143,0110,0, + /* 35563 */ 0241,0361,0175,050,0303,01,0143,0120,0, + /* 35572 */ 0240,0361,0175,050,0303,01,0143,0110,0, + /* 35581 */ 0241,0361,0175,0110,0303,01,0143,0120,0, + /* 35590 */ 0240,0361,0175,0110,0303,01,0143,0110,0, + /* 35599 */ 0241,0362,0175,010,0301,01,053,0120,0, + /* 35608 */ 0240,0362,0175,010,0301,01,053,0110,0, + /* 35617 */ 0241,0362,0175,050,0301,01,053,0120,0, + /* 35626 */ 0240,0362,0175,050,0301,01,053,0110,0, + /* 35635 */ 0241,0362,0175,0110,0301,01,053,0120,0, + /* 35644 */ 0240,0362,0175,0110,0301,01,053,0110,0, + /* 35653 */ 0241,0361,0175,010,0303,01,0147,0120,0, + /* 35662 */ 0240,0361,0175,010,0303,01,0147,0110,0, + /* 35671 */ 0241,0361,0175,050,0303,01,0147,0120,0, + /* 35680 */ 0240,0361,0175,050,0303,01,0147,0110,0, + /* 35689 */ 0241,0361,0175,0110,0303,01,0147,0120,0, + /* 35698 */ 0240,0361,0175,0110,0303,01,0147,0110,0, + /* 35707 */ 0241,0361,0175,010,0303,01,0374,0120,0, + /* 35716 */ 0240,0361,0175,010,0303,01,0374,0110,0, + /* 35725 */ 0241,0361,0175,050,0303,01,0374,0120,0, + /* 35734 */ 0240,0361,0175,050,0303,01,0374,0110,0, + /* 35743 */ 0241,0361,0175,0110,0303,01,0374,0120,0, + /* 35752 */ 0240,0361,0175,0110,0303,01,0374,0110,0, + /* 35761 */ 0241,0361,0175,010,0301,01,0376,0120,0, + /* 35770 */ 0240,0361,0175,010,0301,01,0376,0110,0, + /* 35779 */ 0241,0361,0175,050,0301,01,0376,0120,0, + /* 35788 */ 0240,0361,0175,050,0301,01,0376,0110,0, + /* 35797 */ 0241,0361,0175,0110,0301,01,0376,0120,0, + /* 35806 */ 0240,0361,0175,0110,0301,01,0376,0110,0, + /* 35815 */ 0241,0361,0375,010,0301,01,0324,0120,0, + /* 35824 */ 0240,0361,0375,010,0301,01,0324,0110,0, + /* 35833 */ 0241,0361,0375,050,0301,01,0324,0120,0, + /* 35842 */ 0240,0361,0375,050,0301,01,0324,0110,0, + /* 35851 */ 0241,0361,0375,0110,0301,01,0324,0120,0, + /* 35860 */ 0240,0361,0375,0110,0301,01,0324,0110,0, + /* 35869 */ 0241,0361,0175,010,0303,01,0354,0120,0, + /* 35878 */ 0240,0361,0175,010,0303,01,0354,0110,0, + /* 35887 */ 0241,0361,0175,050,0303,01,0354,0120,0, + /* 35896 */ 0240,0361,0175,050,0303,01,0354,0110,0, + /* 35905 */ 0241,0361,0175,0110,0303,01,0354,0120,0, + /* 35914 */ 0240,0361,0175,0110,0303,01,0354,0110,0, + /* 35923 */ 0241,0361,0175,010,0303,01,0355,0120,0, + /* 35932 */ 0240,0361,0175,010,0303,01,0355,0110,0, + /* 35941 */ 0241,0361,0175,050,0303,01,0355,0120,0, + /* 35950 */ 0240,0361,0175,050,0303,01,0355,0110,0, + /* 35959 */ 0241,0361,0175,0110,0303,01,0355,0120,0, + /* 35968 */ 0240,0361,0175,0110,0303,01,0355,0110,0, + /* 35977 */ 0241,0361,0175,010,0303,01,0334,0120,0, + /* 35986 */ 0240,0361,0175,010,0303,01,0334,0110,0, + /* 35995 */ 0241,0361,0175,050,0303,01,0334,0120,0, + /* 36004 */ 0240,0361,0175,050,0303,01,0334,0110,0, + /* 36013 */ 0241,0361,0175,0110,0303,01,0334,0120,0, + /* 36022 */ 0240,0361,0175,0110,0303,01,0334,0110,0, + /* 36031 */ 0241,0361,0175,010,0303,01,0335,0120,0, + /* 36040 */ 0240,0361,0175,010,0303,01,0335,0110,0, + /* 36049 */ 0241,0361,0175,050,0303,01,0335,0120,0, + /* 36058 */ 0240,0361,0175,050,0303,01,0335,0110,0, + /* 36067 */ 0241,0361,0175,0110,0303,01,0335,0120,0, + /* 36076 */ 0240,0361,0175,0110,0303,01,0335,0110,0, + /* 36085 */ 0241,0361,0175,010,0303,01,0375,0120,0, + /* 36094 */ 0240,0361,0175,010,0303,01,0375,0110,0, + /* 36103 */ 0241,0361,0175,050,0303,01,0375,0120,0, + /* 36112 */ 0240,0361,0175,050,0303,01,0375,0110,0, + /* 36121 */ 0241,0361,0175,0110,0303,01,0375,0120,0, + /* 36130 */ 0240,0361,0175,0110,0303,01,0375,0110,0, + /* 36139 */ 0241,0361,0175,010,0301,01,0333,0120,0, + /* 36148 */ 0240,0361,0175,010,0301,01,0333,0110,0, + /* 36157 */ 0241,0361,0175,050,0301,01,0333,0120,0, + /* 36166 */ 0240,0361,0175,050,0301,01,0333,0110,0, + /* 36175 */ 0241,0361,0175,0110,0301,01,0333,0120,0, + /* 36184 */ 0240,0361,0175,0110,0301,01,0333,0110,0, + /* 36193 */ 0241,0361,0175,010,0301,01,0337,0120,0, + /* 36202 */ 0240,0361,0175,010,0301,01,0337,0110,0, + /* 36211 */ 0241,0361,0175,050,0301,01,0337,0120,0, + /* 36220 */ 0240,0361,0175,050,0301,01,0337,0110,0, + /* 36229 */ 0241,0361,0175,0110,0301,01,0337,0120,0, + /* 36238 */ 0240,0361,0175,0110,0301,01,0337,0110,0, + /* 36247 */ 0241,0361,0375,010,0301,01,0337,0120,0, + /* 36256 */ 0240,0361,0375,010,0301,01,0337,0110,0, + /* 36265 */ 0241,0361,0375,050,0301,01,0337,0120,0, + /* 36274 */ 0240,0361,0375,050,0301,01,0337,0110,0, + /* 36283 */ 0241,0361,0375,0110,0301,01,0337,0120,0, + /* 36292 */ 0240,0361,0375,0110,0301,01,0337,0110,0, + /* 36301 */ 0241,0361,0375,010,0301,01,0333,0120,0, + /* 36310 */ 0240,0361,0375,010,0301,01,0333,0110,0, + /* 36319 */ 0241,0361,0375,050,0301,01,0333,0120,0, + /* 36328 */ 0240,0361,0375,050,0301,01,0333,0110,0, + /* 36337 */ 0241,0361,0375,0110,0301,01,0333,0120,0, + /* 36346 */ 0240,0361,0375,0110,0301,01,0333,0110,0, + /* 36355 */ 0241,0361,0175,010,0303,01,0340,0120,0, + /* 36364 */ 0240,0361,0175,010,0303,01,0340,0110,0, + /* 36373 */ 0241,0361,0175,050,0303,01,0340,0120,0, + /* 36382 */ 0240,0361,0175,050,0303,01,0340,0110,0, + /* 36391 */ 0241,0361,0175,0110,0303,01,0340,0120,0, + /* 36400 */ 0240,0361,0175,0110,0303,01,0340,0110,0, + /* 36409 */ 0241,0361,0175,010,0303,01,0343,0120,0, + /* 36418 */ 0240,0361,0175,010,0303,01,0343,0110,0, + /* 36427 */ 0241,0361,0175,050,0303,01,0343,0120,0, + /* 36436 */ 0240,0361,0175,050,0303,01,0343,0110,0, + /* 36445 */ 0241,0361,0175,0110,0303,01,0343,0120,0, + /* 36454 */ 0240,0361,0175,0110,0303,01,0343,0110,0, + /* 36463 */ 0241,0362,0175,010,0303,01,0146,0120,0, + /* 36472 */ 0241,0362,0175,050,0303,01,0146,0120,0, + /* 36481 */ 0241,0362,0175,0110,0303,01,0146,0120,0, + /* 36490 */ 0241,0362,0175,010,0301,01,0144,0120,0, + /* 36499 */ 0241,0362,0175,050,0301,01,0144,0120,0, + /* 36508 */ 0241,0362,0175,0110,0301,01,0144,0120,0, + /* 36517 */ 0241,0362,0375,010,0301,01,0144,0120,0, + /* 36526 */ 0241,0362,0375,050,0301,01,0144,0120,0, + /* 36535 */ 0241,0362,0375,0110,0301,01,0144,0120,0, + /* 36544 */ 0241,0362,0375,010,0303,01,0146,0120,0, + /* 36553 */ 0241,0362,0375,050,0303,01,0146,0120,0, + /* 36562 */ 0241,0362,0375,0110,0303,01,0146,0120,0, + /* 36571 */ 0250,0362,0175,010,0304,01,0170,0110,0, + /* 36580 */ 0250,0362,0175,050,0304,01,0170,0110,0, + /* 36589 */ 0250,0362,0175,0110,0304,01,0170,0110,0, + /* 36598 */ 0250,0362,0175,010,0300,01,0172,0110,0, + /* 36607 */ 0250,0362,0175,050,0300,01,0172,0110,0, + /* 36616 */ 0250,0362,0175,0110,0300,01,0172,0110,0, + /* 36625 */ 0250,0362,0175,010,0306,01,0130,0110,0, + /* 36634 */ 0250,0362,0175,050,0306,01,0130,0110,0, + /* 36643 */ 0250,0362,0175,0110,0306,01,0130,0110,0, + /* 36652 */ 0250,0362,0175,010,0300,01,0130,0110,0, + /* 36661 */ 0250,0362,0175,050,0300,01,0130,0110,0, + /* 36670 */ 0250,0362,0175,0110,0300,01,0130,0110,0, + /* 36679 */ 0250,0362,0175,010,0300,01,0174,0110,0, + /* 36688 */ 0250,0362,0175,050,0300,01,0174,0110,0, + /* 36697 */ 0250,0362,0175,0110,0300,01,0174,0110,0, + /* 36706 */ 0250,0362,0376,010,0300,01,052,0110,0, + /* 36715 */ 0250,0362,0376,050,0300,01,052,0110,0, + /* 36724 */ 0250,0362,0376,0110,0300,01,052,0110,0, + /* 36733 */ 0250,0362,0176,010,0300,01,072,0110,0, + /* 36742 */ 0250,0362,0176,050,0300,01,072,0110,0, + /* 36751 */ 0250,0362,0176,0110,0300,01,072,0110,0, + /* 36760 */ 0250,0362,0375,010,0306,01,0131,0110,0, + /* 36769 */ 0250,0362,0375,050,0306,01,0131,0110,0, + /* 36778 */ 0250,0362,0375,0110,0306,01,0131,0110,0, + /* 36787 */ 0250,0362,0375,010,0300,01,0131,0110,0, + /* 36796 */ 0250,0362,0375,050,0300,01,0131,0110,0, + /* 36805 */ 0250,0362,0375,0110,0300,01,0131,0110,0, + /* 36814 */ 0250,0362,0375,010,0300,01,0174,0110,0, + /* 36823 */ 0250,0362,0375,050,0300,01,0174,0110,0, + /* 36832 */ 0250,0362,0375,0110,0300,01,0174,0110,0, + /* 36841 */ 0250,0362,0175,010,0305,01,0171,0110,0, + /* 36850 */ 0250,0362,0175,050,0305,01,0171,0110,0, + /* 36859 */ 0250,0362,0175,0110,0305,01,0171,0110,0, + /* 36868 */ 0250,0362,0175,010,0300,01,0173,0110,0, + /* 36877 */ 0250,0362,0175,050,0300,01,0173,0110,0, + /* 36886 */ 0250,0362,0175,0110,0300,01,0173,0110,0, + /* 36895 */ 0241,0361,0175,010,0303,01,0164,0120,0, + /* 36904 */ 0241,0361,0175,050,0303,01,0164,0120,0, + /* 36913 */ 0241,0361,0175,0110,0303,01,0164,0120,0, + /* 36922 */ 0241,0361,0175,010,0301,01,0166,0120,0, + /* 36931 */ 0241,0361,0175,050,0301,01,0166,0120,0, + /* 36940 */ 0241,0361,0175,0110,0301,01,0166,0120,0, + /* 36949 */ 0241,0362,0375,010,0301,01,051,0120,0, + /* 36958 */ 0241,0362,0375,050,0301,01,051,0120,0, + /* 36967 */ 0241,0362,0375,0110,0301,01,051,0120,0, + /* 36976 */ 0241,0361,0175,010,0303,01,0165,0120,0, + /* 36985 */ 0241,0361,0175,050,0303,01,0165,0120,0, + /* 36994 */ 0241,0361,0175,0110,0303,01,0165,0120,0, + /* 37003 */ 0241,0361,0175,010,0303,01,0144,0120,0, + /* 37012 */ 0241,0361,0175,050,0303,01,0144,0120,0, + /* 37021 */ 0241,0361,0175,0110,0303,01,0144,0120,0, + /* 37030 */ 0241,0361,0175,010,0301,01,0146,0120,0, + /* 37039 */ 0241,0361,0175,050,0301,01,0146,0120,0, + /* 37048 */ 0241,0361,0175,0110,0301,01,0146,0120,0, + /* 37057 */ 0241,0362,0375,010,0301,01,067,0120,0, + /* 37066 */ 0241,0362,0375,050,0301,01,067,0120,0, + /* 37075 */ 0241,0362,0375,0110,0301,01,067,0120,0, + /* 37084 */ 0241,0361,0175,010,0303,01,0145,0120,0, + /* 37093 */ 0241,0361,0175,050,0303,01,0145,0120,0, + /* 37102 */ 0241,0361,0175,0110,0303,01,0145,0120,0, + /* 37111 */ 0250,0362,0175,010,0306,01,0213,0101,0, + /* 37120 */ 0250,0362,0175,050,0306,01,0213,0101,0, + /* 37129 */ 0250,0362,0175,0110,0306,01,0213,0101,0, + /* 37138 */ 0250,0362,0175,010,0300,01,0213,0101,0, + /* 37147 */ 0250,0362,0175,050,0300,01,0213,0101,0, + /* 37156 */ 0250,0362,0175,0110,0300,01,0213,0101,0, + /* 37165 */ 0250,0362,0375,010,0306,01,0213,0101,0, + /* 37174 */ 0250,0362,0375,050,0306,01,0213,0101,0, + /* 37183 */ 0250,0362,0375,0110,0306,01,0213,0101,0, + /* 37192 */ 0250,0362,0375,010,0300,01,0213,0101,0, + /* 37201 */ 0250,0362,0375,050,0300,01,0213,0101,0, + /* 37210 */ 0250,0362,0375,0110,0300,01,0213,0101,0, + /* 37219 */ 0250,0362,0175,010,0301,01,0304,0110,0, + /* 37228 */ 0250,0362,0175,050,0301,01,0304,0110,0, + /* 37237 */ 0250,0362,0175,0110,0301,01,0304,0110,0, + /* 37246 */ 0250,0362,0375,010,0301,01,0304,0110,0, + /* 37255 */ 0250,0362,0375,050,0301,01,0304,0110,0, + /* 37264 */ 0250,0362,0375,0110,0301,01,0304,0110,0, + /* 37273 */ 0241,0362,0175,010,0303,01,0215,0120,0, + /* 37282 */ 0240,0362,0175,010,0303,01,0215,0110,0, + /* 37291 */ 0241,0362,0175,050,0303,01,0215,0120,0, + /* 37300 */ 0240,0362,0175,050,0303,01,0215,0110,0, + /* 37309 */ 0241,0362,0175,0110,0303,01,0215,0120,0, + /* 37318 */ 0240,0362,0175,0110,0303,01,0215,0110,0, + /* 37327 */ 0241,0362,0175,050,0301,01,066,0120,0, + /* 37336 */ 0240,0362,0175,050,0301,01,066,0110,0, + /* 37345 */ 0241,0362,0175,0110,0301,01,066,0120,0, + /* 37354 */ 0240,0362,0175,0110,0301,01,066,0110,0, + /* 37363 */ 0241,0362,0175,010,0303,01,0165,0120,0, + /* 37372 */ 0241,0362,0175,050,0303,01,0165,0120,0, + /* 37381 */ 0241,0362,0175,0110,0303,01,0165,0120,0, + /* 37390 */ 0241,0362,0175,010,0301,01,0166,0120,0, + /* 37399 */ 0241,0362,0175,050,0301,01,0166,0120,0, + /* 37408 */ 0241,0362,0175,0110,0301,01,0166,0120,0, + /* 37417 */ 0241,0362,0375,010,0301,01,0167,0120,0, + /* 37426 */ 0241,0362,0375,050,0301,01,0167,0120,0, + /* 37435 */ 0241,0362,0375,0110,0301,01,0167,0120,0, + /* 37444 */ 0241,0362,0175,010,0301,01,0167,0120,0, + /* 37453 */ 0241,0362,0175,050,0301,01,0167,0120,0, + /* 37462 */ 0241,0362,0175,0110,0301,01,0167,0120,0, + /* 37471 */ 0241,0362,0375,010,0301,01,0166,0120,0, + /* 37480 */ 0241,0362,0375,050,0301,01,0166,0120,0, + /* 37489 */ 0241,0362,0375,0110,0301,01,0166,0120,0, + /* 37498 */ 0241,0362,0375,010,0303,01,0165,0120,0, + /* 37507 */ 0241,0362,0375,050,0303,01,0165,0120,0, + /* 37516 */ 0241,0362,0375,0110,0303,01,0165,0120,0, + /* 37525 */ 0241,0362,0375,010,0301,01,015,0120,0, + /* 37534 */ 0240,0362,0375,010,0301,01,015,0110,0, + /* 37543 */ 0241,0362,0375,050,0301,01,015,0120,0, + /* 37552 */ 0240,0362,0375,050,0301,01,015,0110,0, + /* 37561 */ 0241,0362,0375,0110,0301,01,015,0120,0, + /* 37570 */ 0240,0362,0375,0110,0301,01,015,0110,0, + /* 37579 */ 0241,0362,0175,010,0301,01,014,0120,0, + /* 37588 */ 0240,0362,0175,010,0301,01,014,0110,0, + /* 37597 */ 0241,0362,0175,050,0301,01,014,0120,0, + /* 37606 */ 0240,0362,0175,050,0301,01,014,0110,0, + /* 37615 */ 0241,0362,0175,0110,0301,01,014,0120,0, + /* 37624 */ 0240,0362,0175,0110,0301,01,014,0110,0, + /* 37633 */ 0241,0362,0375,050,0301,01,026,0120,0, + /* 37642 */ 0240,0362,0375,050,0301,01,026,0110,0, + /* 37651 */ 0241,0362,0375,0110,0301,01,026,0120,0, + /* 37660 */ 0240,0362,0375,0110,0301,01,026,0110,0, + /* 37669 */ 0241,0362,0175,050,0301,01,026,0120,0, + /* 37678 */ 0240,0362,0175,050,0301,01,026,0110,0, + /* 37687 */ 0241,0362,0175,0110,0301,01,026,0120,0, + /* 37696 */ 0240,0362,0175,0110,0301,01,026,0110,0, + /* 37705 */ 0241,0362,0375,050,0301,01,066,0120,0, + /* 37714 */ 0240,0362,0375,050,0301,01,066,0110,0, + /* 37723 */ 0241,0362,0375,0110,0301,01,066,0120,0, + /* 37732 */ 0240,0362,0375,0110,0301,01,066,0110,0, + /* 37741 */ 0241,0362,0175,010,0303,01,0175,0120,0, + /* 37750 */ 0241,0362,0175,050,0303,01,0175,0120,0, + /* 37759 */ 0241,0362,0175,0110,0303,01,0175,0120,0, + /* 37768 */ 0241,0362,0175,010,0301,01,0176,0120,0, + /* 37777 */ 0241,0362,0175,050,0301,01,0176,0120,0, + /* 37786 */ 0241,0362,0175,0110,0301,01,0176,0120,0, + /* 37795 */ 0241,0362,0375,010,0301,01,0177,0120,0, + /* 37804 */ 0241,0362,0375,050,0301,01,0177,0120,0, + /* 37813 */ 0241,0362,0375,0110,0301,01,0177,0120,0, + /* 37822 */ 0241,0362,0175,010,0301,01,0177,0120,0, + /* 37831 */ 0241,0362,0175,050,0301,01,0177,0120,0, + /* 37840 */ 0241,0362,0175,0110,0301,01,0177,0120,0, + /* 37849 */ 0241,0362,0375,010,0301,01,0176,0120,0, + /* 37858 */ 0241,0362,0375,050,0301,01,0176,0120,0, + /* 37867 */ 0241,0362,0375,0110,0301,01,0176,0120,0, + /* 37876 */ 0241,0362,0375,010,0303,01,0175,0120,0, + /* 37885 */ 0241,0362,0375,050,0303,01,0175,0120,0, + /* 37894 */ 0241,0362,0375,0110,0303,01,0175,0120,0, + /* 37903 */ 0241,0362,0375,010,0303,01,0215,0120,0, + /* 37912 */ 0240,0362,0375,010,0303,01,0215,0110,0, + /* 37921 */ 0241,0362,0375,050,0303,01,0215,0120,0, + /* 37930 */ 0240,0362,0375,050,0303,01,0215,0110,0, + /* 37939 */ 0241,0362,0375,0110,0303,01,0215,0120,0, + /* 37948 */ 0240,0362,0375,0110,0303,01,0215,0110,0, + /* 37957 */ 0250,0362,0175,010,0306,01,0211,0110,0, + /* 37966 */ 0250,0362,0175,050,0306,01,0211,0110,0, + /* 37975 */ 0250,0362,0175,0110,0306,01,0211,0110,0, + /* 37984 */ 0250,0362,0375,010,0306,01,0211,0110,0, + /* 37993 */ 0250,0362,0375,050,0306,01,0211,0110,0, + /* 38002 */ 0250,0362,0375,0110,0306,01,0211,0110,0, + /* 38011 */ 0250,0362,0175,010,0301,01,0104,0110,0, + /* 38020 */ 0250,0362,0175,050,0301,01,0104,0110,0, + /* 38029 */ 0250,0362,0175,0110,0301,01,0104,0110,0, + /* 38038 */ 0250,0362,0375,010,0301,01,0104,0110,0, + /* 38047 */ 0250,0362,0375,050,0301,01,0104,0110,0, + /* 38056 */ 0250,0362,0375,0110,0301,01,0104,0110,0, + /* 38065 */ 0241,0362,0375,010,0301,01,0265,0120,0, + /* 38074 */ 0241,0362,0375,050,0301,01,0265,0120,0, + /* 38083 */ 0241,0362,0375,0110,0301,01,0265,0120,0, + /* 38092 */ 0241,0362,0375,010,0301,01,0264,0120,0, + /* 38101 */ 0241,0362,0375,050,0301,01,0264,0120,0, + /* 38110 */ 0241,0362,0375,0110,0301,01,0264,0120,0, + /* 38119 */ 0241,0362,0175,010,0303,01,04,0120,0, + /* 38128 */ 0240,0362,0175,010,0303,01,04,0110,0, + /* 38137 */ 0241,0362,0175,050,0303,01,04,0120,0, + /* 38146 */ 0240,0362,0175,050,0303,01,04,0110,0, + /* 38155 */ 0241,0362,0175,0110,0303,01,04,0120,0, + /* 38164 */ 0240,0362,0175,0110,0303,01,04,0110,0, + /* 38173 */ 0241,0361,0175,010,0303,01,0365,0120,0, + /* 38182 */ 0240,0361,0175,010,0303,01,0365,0110,0, + /* 38191 */ 0241,0361,0175,050,0303,01,0365,0120,0, + /* 38200 */ 0240,0361,0175,050,0303,01,0365,0110,0, + /* 38209 */ 0241,0361,0175,0110,0303,01,0365,0120,0, + /* 38218 */ 0240,0361,0175,0110,0303,01,0365,0110,0, + /* 38227 */ 0241,0362,0175,010,0303,01,074,0120,0, + /* 38236 */ 0240,0362,0175,010,0303,01,074,0110,0, + /* 38245 */ 0241,0362,0175,050,0303,01,074,0120,0, + /* 38254 */ 0240,0362,0175,050,0303,01,074,0110,0, + /* 38263 */ 0241,0362,0175,0110,0303,01,074,0120,0, + /* 38272 */ 0240,0362,0175,0110,0303,01,074,0110,0, + /* 38281 */ 0241,0362,0175,010,0301,01,075,0120,0, + /* 38290 */ 0240,0362,0175,010,0301,01,075,0110,0, + /* 38299 */ 0241,0362,0175,050,0301,01,075,0120,0, + /* 38308 */ 0240,0362,0175,050,0301,01,075,0110,0, + /* 38317 */ 0241,0362,0175,0110,0301,01,075,0120,0, + /* 38326 */ 0240,0362,0175,0110,0301,01,075,0110,0, + /* 38335 */ 0241,0362,0375,010,0301,01,075,0120,0, + /* 38344 */ 0240,0362,0375,010,0301,01,075,0110,0, + /* 38353 */ 0241,0362,0375,050,0301,01,075,0120,0, + /* 38362 */ 0240,0362,0375,050,0301,01,075,0110,0, + /* 38371 */ 0241,0362,0375,0110,0301,01,075,0120,0, + /* 38380 */ 0240,0362,0375,0110,0301,01,075,0110,0, + /* 38389 */ 0241,0361,0175,010,0303,01,0356,0120,0, + /* 38398 */ 0240,0361,0175,010,0303,01,0356,0110,0, + /* 38407 */ 0241,0361,0175,050,0303,01,0356,0120,0, + /* 38416 */ 0240,0361,0175,050,0303,01,0356,0110,0, + /* 38425 */ 0241,0361,0175,0110,0303,01,0356,0120,0, + /* 38434 */ 0240,0361,0175,0110,0303,01,0356,0110,0, + /* 38443 */ 0241,0361,0175,010,0303,01,0336,0120,0, + /* 38452 */ 0240,0361,0175,010,0303,01,0336,0110,0, + /* 38461 */ 0241,0361,0175,050,0303,01,0336,0120,0, + /* 38470 */ 0240,0361,0175,050,0303,01,0336,0110,0, + /* 38479 */ 0241,0361,0175,0110,0303,01,0336,0120,0, + /* 38488 */ 0240,0361,0175,0110,0303,01,0336,0110,0, + /* 38497 */ 0241,0362,0175,010,0301,01,077,0120,0, + /* 38506 */ 0240,0362,0175,010,0301,01,077,0110,0, + /* 38515 */ 0241,0362,0175,050,0301,01,077,0120,0, + /* 38524 */ 0240,0362,0175,050,0301,01,077,0110,0, + /* 38533 */ 0241,0362,0175,0110,0301,01,077,0120,0, + /* 38542 */ 0240,0362,0175,0110,0301,01,077,0110,0, + /* 38551 */ 0241,0362,0375,010,0301,01,077,0120,0, + /* 38560 */ 0240,0362,0375,010,0301,01,077,0110,0, + /* 38569 */ 0241,0362,0375,050,0301,01,077,0120,0, + /* 38578 */ 0240,0362,0375,050,0301,01,077,0110,0, + /* 38587 */ 0241,0362,0375,0110,0301,01,077,0120,0, + /* 38596 */ 0240,0362,0375,0110,0301,01,077,0110,0, + /* 38605 */ 0241,0362,0175,010,0303,01,076,0120,0, + /* 38614 */ 0240,0362,0175,010,0303,01,076,0110,0, + /* 38623 */ 0241,0362,0175,050,0303,01,076,0120,0, + /* 38632 */ 0240,0362,0175,050,0303,01,076,0110,0, + /* 38641 */ 0241,0362,0175,0110,0303,01,076,0120,0, + /* 38650 */ 0240,0362,0175,0110,0303,01,076,0110,0, + /* 38659 */ 0241,0362,0175,010,0303,01,070,0120,0, + /* 38668 */ 0240,0362,0175,010,0303,01,070,0110,0, + /* 38677 */ 0241,0362,0175,050,0303,01,070,0120,0, + /* 38686 */ 0240,0362,0175,050,0303,01,070,0110,0, + /* 38695 */ 0241,0362,0175,0110,0303,01,070,0120,0, + /* 38704 */ 0240,0362,0175,0110,0303,01,070,0110,0, + /* 38713 */ 0241,0362,0175,010,0301,01,071,0120,0, + /* 38722 */ 0240,0362,0175,010,0301,01,071,0110,0, + /* 38731 */ 0241,0362,0175,050,0301,01,071,0120,0, + /* 38740 */ 0240,0362,0175,050,0301,01,071,0110,0, + /* 38749 */ 0241,0362,0175,0110,0301,01,071,0120,0, + /* 38758 */ 0240,0362,0175,0110,0301,01,071,0110,0, + /* 38767 */ 0241,0362,0375,010,0301,01,071,0120,0, + /* 38776 */ 0240,0362,0375,010,0301,01,071,0110,0, + /* 38785 */ 0241,0362,0375,050,0301,01,071,0120,0, + /* 38794 */ 0240,0362,0375,050,0301,01,071,0110,0, + /* 38803 */ 0241,0362,0375,0110,0301,01,071,0120,0, + /* 38812 */ 0240,0362,0375,0110,0301,01,071,0110,0, + /* 38821 */ 0241,0361,0175,010,0303,01,0352,0120,0, + /* 38830 */ 0240,0361,0175,010,0303,01,0352,0110,0, + /* 38839 */ 0241,0361,0175,050,0303,01,0352,0120,0, + /* 38848 */ 0240,0361,0175,050,0303,01,0352,0110,0, + /* 38857 */ 0241,0361,0175,0110,0303,01,0352,0120,0, + /* 38866 */ 0240,0361,0175,0110,0303,01,0352,0110,0, + /* 38875 */ 0241,0361,0175,010,0303,01,0332,0120,0, + /* 38884 */ 0240,0361,0175,010,0303,01,0332,0110,0, + /* 38893 */ 0241,0361,0175,050,0303,01,0332,0120,0, + /* 38902 */ 0240,0361,0175,050,0303,01,0332,0110,0, + /* 38911 */ 0241,0361,0175,0110,0303,01,0332,0120,0, + /* 38920 */ 0240,0361,0175,0110,0303,01,0332,0110,0, + /* 38929 */ 0241,0362,0175,010,0301,01,073,0120,0, + /* 38938 */ 0240,0362,0175,010,0301,01,073,0110,0, + /* 38947 */ 0241,0362,0175,050,0301,01,073,0120,0, + /* 38956 */ 0240,0362,0175,050,0301,01,073,0110,0, + /* 38965 */ 0241,0362,0175,0110,0301,01,073,0120,0, + /* 38974 */ 0240,0362,0175,0110,0301,01,073,0110,0, + /* 38983 */ 0241,0362,0375,010,0301,01,073,0120,0, + /* 38992 */ 0240,0362,0375,010,0301,01,073,0110,0, + /* 39001 */ 0241,0362,0375,050,0301,01,073,0120,0, + /* 39010 */ 0240,0362,0375,050,0301,01,073,0110,0, + /* 39019 */ 0241,0362,0375,0110,0301,01,073,0120,0, + /* 39028 */ 0240,0362,0375,0110,0301,01,073,0110,0, + /* 39037 */ 0241,0362,0175,010,0303,01,072,0120,0, + /* 39046 */ 0240,0362,0175,010,0303,01,072,0110,0, + /* 39055 */ 0241,0362,0175,050,0303,01,072,0120,0, + /* 39064 */ 0240,0362,0175,050,0303,01,072,0110,0, + /* 39073 */ 0241,0362,0175,0110,0303,01,072,0120,0, + /* 39082 */ 0240,0362,0175,0110,0303,01,072,0110,0, + /* 39091 */ 0250,0362,0176,010,0300,01,051,0110,0, + /* 39100 */ 0250,0362,0176,050,0300,01,051,0110,0, + /* 39109 */ 0250,0362,0176,0110,0300,01,051,0110,0, + /* 39118 */ 0250,0362,0176,010,0300,01,071,0110,0, + /* 39127 */ 0250,0362,0176,050,0300,01,071,0110,0, + /* 39136 */ 0250,0362,0176,0110,0300,01,071,0110,0, + /* 39145 */ 0250,0362,0176,010,0300,01,061,0101,0, + /* 39154 */ 0250,0362,0176,050,0300,01,061,0101,0, + /* 39163 */ 0250,0362,0176,0110,0300,01,061,0101,0, + /* 39172 */ 0250,0362,0176,010,0315,01,061,0101,0, + /* 39181 */ 0250,0362,0176,050,0315,01,061,0101,0, + /* 39190 */ 0250,0362,0176,0110,0315,01,061,0101,0, + /* 39199 */ 0250,0362,0176,010,0300,01,063,0101,0, + /* 39208 */ 0250,0362,0176,050,0300,01,063,0101,0, + /* 39217 */ 0250,0362,0176,0110,0300,01,063,0101,0, + /* 39226 */ 0250,0362,0176,010,0314,01,063,0101,0, + /* 39235 */ 0250,0362,0176,050,0314,01,063,0101,0, + /* 39244 */ 0250,0362,0176,0110,0314,01,063,0101,0, + /* 39253 */ 0250,0362,0176,010,0300,01,050,0110,0, + /* 39262 */ 0250,0362,0176,050,0300,01,050,0110,0, + /* 39271 */ 0250,0362,0176,0110,0300,01,050,0110,0, + /* 39280 */ 0250,0362,0176,010,0300,01,070,0110,0, + /* 39289 */ 0250,0362,0176,050,0300,01,070,0110,0, + /* 39298 */ 0250,0362,0176,0110,0300,01,070,0110,0, + /* 39307 */ 0250,0362,0376,010,0300,01,070,0110,0, + /* 39316 */ 0250,0362,0376,050,0300,01,070,0110,0, + /* 39325 */ 0250,0362,0376,0110,0300,01,070,0110,0, + /* 39334 */ 0250,0362,0376,010,0300,01,050,0110,0, + /* 39343 */ 0250,0362,0376,050,0300,01,050,0110,0, + /* 39352 */ 0250,0362,0376,0110,0300,01,050,0110,0, + /* 39361 */ 0250,0362,0376,010,0300,01,071,0110,0, + /* 39370 */ 0250,0362,0376,050,0300,01,071,0110,0, + /* 39379 */ 0250,0362,0376,0110,0300,01,071,0110,0, + /* 39388 */ 0250,0362,0176,010,0300,01,062,0101,0, + /* 39397 */ 0250,0362,0176,050,0300,01,062,0101,0, + /* 39406 */ 0250,0362,0176,0110,0300,01,062,0101,0, + /* 39415 */ 0250,0362,0176,010,0316,01,062,0101,0, + /* 39424 */ 0250,0362,0176,050,0316,01,062,0101,0, + /* 39433 */ 0250,0362,0176,0110,0316,01,062,0101,0, + /* 39442 */ 0250,0362,0176,010,0300,01,065,0101,0, + /* 39451 */ 0250,0362,0176,050,0300,01,065,0101,0, + /* 39460 */ 0250,0362,0176,0110,0300,01,065,0101,0, + /* 39469 */ 0250,0362,0176,010,0314,01,065,0101,0, + /* 39478 */ 0250,0362,0176,050,0314,01,065,0101,0, + /* 39487 */ 0250,0362,0176,0110,0314,01,065,0101,0, + /* 39496 */ 0250,0362,0176,010,0300,01,064,0101,0, + /* 39505 */ 0250,0362,0176,050,0300,01,064,0101,0, + /* 39514 */ 0250,0362,0176,0110,0300,01,064,0101,0, + /* 39523 */ 0250,0362,0176,010,0315,01,064,0101,0, + /* 39532 */ 0250,0362,0176,050,0315,01,064,0101,0, + /* 39541 */ 0250,0362,0176,0110,0315,01,064,0101,0, + /* 39550 */ 0250,0362,0176,010,0300,01,041,0101,0, + /* 39559 */ 0250,0362,0176,050,0300,01,041,0101,0, + /* 39568 */ 0250,0362,0176,0110,0300,01,041,0101,0, + /* 39577 */ 0250,0362,0176,010,0315,01,041,0101,0, + /* 39586 */ 0250,0362,0176,050,0315,01,041,0101,0, + /* 39595 */ 0250,0362,0176,0110,0315,01,041,0101,0, + /* 39604 */ 0250,0362,0176,010,0300,01,043,0101,0, + /* 39613 */ 0250,0362,0176,050,0300,01,043,0101,0, + /* 39622 */ 0250,0362,0176,0110,0300,01,043,0101,0, + /* 39631 */ 0250,0362,0176,010,0314,01,043,0101,0, + /* 39640 */ 0250,0362,0176,050,0314,01,043,0101,0, + /* 39649 */ 0250,0362,0176,0110,0314,01,043,0101,0, + /* 39658 */ 0250,0362,0176,010,0300,01,042,0101,0, + /* 39667 */ 0250,0362,0176,050,0300,01,042,0101,0, + /* 39676 */ 0250,0362,0176,0110,0300,01,042,0101,0, + /* 39685 */ 0250,0362,0176,010,0316,01,042,0101,0, + /* 39694 */ 0250,0362,0176,050,0316,01,042,0101,0, + /* 39703 */ 0250,0362,0176,0110,0316,01,042,0101,0, + /* 39712 */ 0250,0362,0176,010,0300,01,045,0101,0, + /* 39721 */ 0250,0362,0176,050,0300,01,045,0101,0, + /* 39730 */ 0250,0362,0176,0110,0300,01,045,0101,0, + /* 39739 */ 0250,0362,0176,010,0314,01,045,0101,0, + /* 39748 */ 0250,0362,0176,050,0314,01,045,0101,0, + /* 39757 */ 0250,0362,0176,0110,0314,01,045,0101,0, + /* 39766 */ 0250,0362,0176,010,0300,01,044,0101,0, + /* 39775 */ 0250,0362,0176,050,0300,01,044,0101,0, + /* 39784 */ 0250,0362,0176,0110,0300,01,044,0101,0, + /* 39793 */ 0250,0362,0176,010,0315,01,044,0101,0, + /* 39802 */ 0250,0362,0176,050,0315,01,044,0101,0, + /* 39811 */ 0250,0362,0176,0110,0315,01,044,0101,0, + /* 39820 */ 0250,0362,0176,010,0300,01,040,0101,0, + /* 39829 */ 0250,0362,0176,050,0300,01,040,0101,0, + /* 39838 */ 0250,0362,0176,0110,0300,01,040,0101,0, + /* 39847 */ 0250,0362,0176,010,0314,01,040,0101,0, + /* 39856 */ 0250,0362,0176,050,0314,01,040,0101,0, + /* 39865 */ 0250,0362,0176,0110,0314,01,040,0101,0, + /* 39874 */ 0250,0362,0175,010,0315,01,041,0110,0, + /* 39883 */ 0250,0362,0175,050,0315,01,041,0110,0, + /* 39892 */ 0250,0362,0175,0110,0315,01,041,0110,0, + /* 39901 */ 0250,0362,0175,010,0316,01,042,0110,0, + /* 39910 */ 0250,0362,0175,050,0316,01,042,0110,0, + /* 39919 */ 0250,0362,0175,0110,0316,01,042,0110,0, + /* 39928 */ 0250,0362,0175,010,0314,01,040,0110,0, + /* 39937 */ 0250,0362,0175,050,0314,01,040,0110,0, + /* 39946 */ 0250,0362,0175,0110,0314,01,040,0110,0, + /* 39955 */ 0250,0362,0175,010,0314,01,045,0110,0, + /* 39964 */ 0250,0362,0175,050,0314,01,045,0110,0, + /* 39973 */ 0250,0362,0175,0110,0314,01,045,0110,0, + /* 39982 */ 0250,0362,0175,010,0314,01,043,0110,0, + /* 39991 */ 0250,0362,0175,050,0314,01,043,0110,0, + /* 40000 */ 0250,0362,0175,0110,0314,01,043,0110,0, + /* 40009 */ 0250,0362,0175,010,0315,01,044,0110,0, + /* 40018 */ 0250,0362,0175,050,0315,01,044,0110,0, + /* 40027 */ 0250,0362,0175,0110,0315,01,044,0110,0, + /* 40036 */ 0250,0362,0176,010,0300,01,021,0101,0, + /* 40045 */ 0250,0362,0176,050,0300,01,021,0101,0, + /* 40054 */ 0250,0362,0176,0110,0300,01,021,0101,0, + /* 40063 */ 0250,0362,0176,010,0315,01,021,0101,0, + /* 40072 */ 0250,0362,0176,050,0315,01,021,0101,0, + /* 40081 */ 0250,0362,0176,0110,0315,01,021,0101,0, + /* 40090 */ 0250,0362,0176,010,0300,01,023,0101,0, + /* 40099 */ 0250,0362,0176,050,0300,01,023,0101,0, + /* 40108 */ 0250,0362,0176,0110,0300,01,023,0101,0, + /* 40117 */ 0250,0362,0176,010,0314,01,023,0101,0, + /* 40126 */ 0250,0362,0176,050,0314,01,023,0101,0, + /* 40135 */ 0250,0362,0176,0110,0314,01,023,0101,0, + /* 40144 */ 0250,0362,0176,010,0300,01,022,0101,0, + /* 40153 */ 0250,0362,0176,050,0300,01,022,0101,0, + /* 40162 */ 0250,0362,0176,0110,0300,01,022,0101,0, + /* 40171 */ 0250,0362,0176,010,0316,01,022,0101,0, + /* 40180 */ 0250,0362,0176,050,0316,01,022,0101,0, + /* 40189 */ 0250,0362,0176,0110,0316,01,022,0101,0, + /* 40198 */ 0250,0362,0176,010,0300,01,025,0101,0, + /* 40207 */ 0250,0362,0176,050,0300,01,025,0101,0, + /* 40216 */ 0250,0362,0176,0110,0300,01,025,0101,0, + /* 40225 */ 0250,0362,0176,010,0314,01,025,0101,0, + /* 40234 */ 0250,0362,0176,050,0314,01,025,0101,0, + /* 40243 */ 0250,0362,0176,0110,0314,01,025,0101,0, + /* 40252 */ 0250,0362,0176,010,0300,01,024,0101,0, + /* 40261 */ 0250,0362,0176,050,0300,01,024,0101,0, + /* 40270 */ 0250,0362,0176,0110,0300,01,024,0101,0, + /* 40279 */ 0250,0362,0176,010,0315,01,024,0101,0, + /* 40288 */ 0250,0362,0176,050,0315,01,024,0101,0, + /* 40297 */ 0250,0362,0176,0110,0315,01,024,0101,0, + /* 40306 */ 0250,0362,0176,010,0300,01,020,0101,0, + /* 40315 */ 0250,0362,0176,050,0300,01,020,0101,0, + /* 40324 */ 0250,0362,0176,0110,0300,01,020,0101,0, + /* 40333 */ 0250,0362,0176,010,0314,01,020,0101,0, + /* 40342 */ 0250,0362,0176,050,0314,01,020,0101,0, + /* 40351 */ 0250,0362,0176,0110,0314,01,020,0101,0, + /* 40360 */ 0250,0362,0376,010,0300,01,051,0110,0, + /* 40369 */ 0250,0362,0376,050,0300,01,051,0110,0, + /* 40378 */ 0250,0362,0376,0110,0300,01,051,0110,0, + /* 40387 */ 0250,0362,0176,010,0300,01,060,0101,0, + /* 40396 */ 0250,0362,0176,050,0300,01,060,0101,0, + /* 40405 */ 0250,0362,0176,0110,0300,01,060,0101,0, + /* 40414 */ 0250,0362,0176,010,0314,01,060,0101,0, + /* 40423 */ 0250,0362,0176,050,0314,01,060,0101,0, + /* 40432 */ 0250,0362,0176,0110,0314,01,060,0101,0, + /* 40441 */ 0250,0362,0175,010,0315,01,061,0110,0, + /* 40450 */ 0250,0362,0175,050,0315,01,061,0110,0, + /* 40459 */ 0250,0362,0175,0110,0315,01,061,0110,0, + /* 40468 */ 0250,0362,0175,010,0316,01,062,0110,0, + /* 40477 */ 0250,0362,0175,050,0316,01,062,0110,0, + /* 40486 */ 0250,0362,0175,0110,0316,01,062,0110,0, + /* 40495 */ 0250,0362,0175,010,0314,01,060,0110,0, + /* 40504 */ 0250,0362,0175,050,0314,01,060,0110,0, + /* 40513 */ 0250,0362,0175,0110,0314,01,060,0110,0, + /* 40522 */ 0250,0362,0175,010,0314,01,065,0110,0, + /* 40531 */ 0250,0362,0175,050,0314,01,065,0110,0, + /* 40540 */ 0250,0362,0175,0110,0314,01,065,0110,0, + /* 40549 */ 0250,0362,0175,010,0314,01,063,0110,0, + /* 40558 */ 0250,0362,0175,050,0314,01,063,0110,0, + /* 40567 */ 0250,0362,0175,0110,0314,01,063,0110,0, + /* 40576 */ 0250,0362,0175,010,0315,01,064,0110,0, + /* 40585 */ 0250,0362,0175,050,0315,01,064,0110,0, + /* 40594 */ 0250,0362,0175,0110,0315,01,064,0110,0, + /* 40603 */ 0241,0362,0375,010,0301,01,050,0120,0, + /* 40612 */ 0240,0362,0375,010,0301,01,050,0110,0, + /* 40621 */ 0241,0362,0375,050,0301,01,050,0120,0, + /* 40630 */ 0240,0362,0375,050,0301,01,050,0110,0, + /* 40639 */ 0241,0362,0375,0110,0301,01,050,0120,0, + /* 40648 */ 0240,0362,0375,0110,0301,01,050,0110,0, + /* 40657 */ 0241,0362,0175,010,0303,01,013,0120,0, + /* 40666 */ 0240,0362,0175,010,0303,01,013,0110,0, + /* 40675 */ 0241,0362,0175,050,0303,01,013,0120,0, + /* 40684 */ 0240,0362,0175,050,0303,01,013,0110,0, + /* 40693 */ 0241,0362,0175,0110,0303,01,013,0120,0, + /* 40702 */ 0240,0362,0175,0110,0303,01,013,0110,0, + /* 40711 */ 0241,0361,0175,010,0303,01,0344,0120,0, + /* 40720 */ 0240,0361,0175,010,0303,01,0344,0110,0, + /* 40729 */ 0241,0361,0175,050,0303,01,0344,0120,0, + /* 40738 */ 0240,0361,0175,050,0303,01,0344,0110,0, + /* 40747 */ 0241,0361,0175,0110,0303,01,0344,0120,0, + /* 40756 */ 0240,0361,0175,0110,0303,01,0344,0110,0, + /* 40765 */ 0241,0361,0175,010,0303,01,0345,0120,0, + /* 40774 */ 0240,0361,0175,010,0303,01,0345,0110,0, + /* 40783 */ 0241,0361,0175,050,0303,01,0345,0120,0, + /* 40792 */ 0240,0361,0175,050,0303,01,0345,0110,0, + /* 40801 */ 0241,0361,0175,0110,0303,01,0345,0120,0, + /* 40810 */ 0240,0361,0175,0110,0303,01,0345,0110,0, + /* 40819 */ 0241,0362,0175,010,0301,01,0100,0120,0, + /* 40828 */ 0240,0362,0175,010,0301,01,0100,0110,0, + /* 40837 */ 0241,0362,0175,050,0301,01,0100,0120,0, + /* 40846 */ 0240,0362,0175,050,0301,01,0100,0110,0, + /* 40855 */ 0241,0362,0175,0110,0301,01,0100,0120,0, + /* 40864 */ 0240,0362,0175,0110,0301,01,0100,0110,0, + /* 40873 */ 0241,0362,0375,010,0301,01,0100,0120,0, + /* 40882 */ 0240,0362,0375,010,0301,01,0100,0110,0, + /* 40891 */ 0241,0362,0375,050,0301,01,0100,0120,0, + /* 40900 */ 0240,0362,0375,050,0301,01,0100,0110,0, + /* 40909 */ 0241,0362,0375,0110,0301,01,0100,0120,0, + /* 40918 */ 0240,0362,0375,0110,0301,01,0100,0110,0, + /* 40927 */ 0241,0361,0175,010,0303,01,0325,0120,0, + /* 40936 */ 0240,0361,0175,010,0303,01,0325,0110,0, + /* 40945 */ 0241,0361,0175,050,0303,01,0325,0120,0, + /* 40954 */ 0240,0361,0175,050,0303,01,0325,0110,0, + /* 40963 */ 0241,0361,0175,0110,0303,01,0325,0120,0, + /* 40972 */ 0240,0361,0175,0110,0303,01,0325,0110,0, + /* 40981 */ 0241,0362,0375,010,0301,01,0203,0120,0, + /* 40990 */ 0240,0362,0375,010,0301,01,0203,0110,0, + /* 40999 */ 0241,0362,0375,050,0301,01,0203,0120,0, + /* 41008 */ 0240,0362,0375,050,0301,01,0203,0110,0, + /* 41017 */ 0241,0362,0375,0110,0301,01,0203,0120,0, + /* 41026 */ 0240,0362,0375,0110,0301,01,0203,0110,0, + /* 41035 */ 0241,0361,0375,010,0301,01,0364,0120,0, + /* 41044 */ 0240,0361,0375,010,0301,01,0364,0110,0, + /* 41053 */ 0241,0361,0375,050,0301,01,0364,0120,0, + /* 41062 */ 0240,0361,0375,050,0301,01,0364,0110,0, + /* 41071 */ 0241,0361,0375,0110,0301,01,0364,0120,0, + /* 41080 */ 0240,0361,0375,0110,0301,01,0364,0110,0, + /* 41089 */ 0241,0361,0175,010,0301,01,0353,0120,0, + /* 41098 */ 0240,0361,0175,010,0301,01,0353,0110,0, + /* 41107 */ 0241,0361,0175,050,0301,01,0353,0120,0, + /* 41116 */ 0240,0361,0175,050,0301,01,0353,0110,0, + /* 41125 */ 0241,0361,0175,0110,0301,01,0353,0120,0, + /* 41134 */ 0240,0361,0175,0110,0301,01,0353,0110,0, + /* 41143 */ 0241,0361,0375,010,0301,01,0353,0120,0, + /* 41152 */ 0240,0361,0375,010,0301,01,0353,0110,0, + /* 41161 */ 0241,0361,0375,050,0301,01,0353,0120,0, + /* 41170 */ 0240,0361,0375,050,0301,01,0353,0110,0, + /* 41179 */ 0241,0361,0375,0110,0301,01,0353,0120,0, + /* 41188 */ 0240,0361,0375,0110,0301,01,0353,0110,0, + /* 41197 */ 0241,0362,0175,010,0301,01,025,0120,0, + /* 41206 */ 0240,0362,0175,010,0301,01,025,0110,0, + /* 41215 */ 0241,0362,0175,050,0301,01,025,0120,0, + /* 41224 */ 0240,0362,0175,050,0301,01,025,0110,0, + /* 41233 */ 0241,0362,0175,0110,0301,01,025,0120,0, + /* 41242 */ 0240,0362,0175,0110,0301,01,025,0110,0, + /* 41251 */ 0241,0362,0375,010,0301,01,025,0120,0, + /* 41260 */ 0240,0362,0375,010,0301,01,025,0110,0, + /* 41269 */ 0241,0362,0375,050,0301,01,025,0120,0, + /* 41278 */ 0240,0362,0375,050,0301,01,025,0110,0, + /* 41287 */ 0241,0362,0375,0110,0301,01,025,0120,0, + /* 41296 */ 0240,0362,0375,0110,0301,01,025,0110,0, + /* 41305 */ 0241,0362,0175,010,0301,01,024,0120,0, + /* 41314 */ 0240,0362,0175,010,0301,01,024,0110,0, + /* 41323 */ 0241,0362,0175,050,0301,01,024,0120,0, + /* 41332 */ 0240,0362,0175,050,0301,01,024,0110,0, + /* 41341 */ 0241,0362,0175,0110,0301,01,024,0120,0, + /* 41350 */ 0240,0362,0175,0110,0301,01,024,0110,0, + /* 41359 */ 0241,0362,0375,010,0301,01,024,0120,0, + /* 41368 */ 0240,0362,0375,010,0301,01,024,0110,0, + /* 41377 */ 0241,0362,0375,050,0301,01,024,0120,0, + /* 41386 */ 0240,0362,0375,050,0301,01,024,0110,0, + /* 41395 */ 0241,0362,0375,0110,0301,01,024,0120,0, + /* 41404 */ 0240,0362,0375,0110,0301,01,024,0110,0, + /* 41413 */ 0241,0361,0175,010,0303,01,0366,0120,0, + /* 41422 */ 0240,0361,0175,010,0303,01,0366,0110,0, + /* 41431 */ 0241,0361,0175,050,0303,01,0366,0120,0, + /* 41440 */ 0240,0361,0175,050,0303,01,0366,0110,0, + /* 41449 */ 0241,0361,0175,0110,0303,01,0366,0120,0, + /* 41458 */ 0240,0361,0175,0110,0303,01,0366,0110,0, + /* 41467 */ 0241,0362,0175,010,0303,01,0,0120,0, + /* 41476 */ 0240,0362,0175,010,0303,01,0,0110,0, + /* 41485 */ 0241,0362,0175,050,0303,01,0,0120,0, + /* 41494 */ 0240,0362,0175,050,0303,01,0,0110,0, + /* 41503 */ 0241,0362,0175,0110,0303,01,0,0120,0, + /* 41512 */ 0240,0362,0175,0110,0303,01,0,0110,0, + /* 41521 */ 0241,0361,0175,010,0317,01,0362,0120,0, + /* 41530 */ 0240,0361,0175,010,0317,01,0362,0110,0, + /* 41539 */ 0241,0361,0175,050,0317,01,0362,0120,0, + /* 41548 */ 0240,0361,0175,050,0317,01,0362,0110,0, + /* 41557 */ 0241,0361,0175,0110,0317,01,0362,0120,0, + /* 41566 */ 0240,0361,0175,0110,0317,01,0362,0110,0, + /* 41575 */ 0241,0361,0375,010,0317,01,0363,0120,0, + /* 41584 */ 0240,0361,0375,010,0317,01,0363,0110,0, + /* 41593 */ 0241,0361,0375,050,0317,01,0363,0120,0, + /* 41602 */ 0240,0361,0375,050,0317,01,0363,0110,0, + /* 41611 */ 0241,0361,0375,0110,0317,01,0363,0120,0, + /* 41620 */ 0240,0361,0375,0110,0317,01,0363,0110,0, + /* 41629 */ 0241,0362,0175,010,0301,01,0107,0120,0, + /* 41638 */ 0240,0362,0175,010,0301,01,0107,0110,0, + /* 41647 */ 0241,0362,0175,050,0301,01,0107,0120,0, + /* 41656 */ 0240,0362,0175,050,0301,01,0107,0110,0, + /* 41665 */ 0241,0362,0175,0110,0301,01,0107,0120,0, + /* 41674 */ 0240,0362,0175,0110,0301,01,0107,0110,0, + /* 41683 */ 0241,0362,0375,010,0301,01,0107,0120,0, + /* 41692 */ 0240,0362,0375,010,0301,01,0107,0110,0, + /* 41701 */ 0241,0362,0375,050,0301,01,0107,0120,0, + /* 41710 */ 0240,0362,0375,050,0301,01,0107,0110,0, + /* 41719 */ 0241,0362,0375,0110,0301,01,0107,0120,0, + /* 41728 */ 0240,0362,0375,0110,0301,01,0107,0110,0, + /* 41737 */ 0241,0362,0375,010,0303,01,022,0120,0, + /* 41746 */ 0240,0362,0375,010,0303,01,022,0110,0, + /* 41755 */ 0241,0362,0375,050,0303,01,022,0120,0, + /* 41764 */ 0240,0362,0375,050,0303,01,022,0110,0, + /* 41773 */ 0241,0362,0375,0110,0303,01,022,0120,0, + /* 41782 */ 0240,0362,0375,0110,0303,01,022,0110,0, + /* 41791 */ 0241,0361,0175,010,0317,01,0361,0120,0, + /* 41800 */ 0240,0361,0175,010,0317,01,0361,0110,0, + /* 41809 */ 0241,0361,0175,050,0317,01,0361,0120,0, + /* 41818 */ 0240,0361,0175,050,0317,01,0361,0110,0, + /* 41827 */ 0241,0361,0175,0110,0317,01,0361,0120,0, + /* 41836 */ 0240,0361,0175,0110,0317,01,0361,0110,0, + /* 41845 */ 0241,0361,0175,010,0317,01,0342,0120,0, + /* 41854 */ 0240,0361,0175,010,0317,01,0342,0110,0, + /* 41863 */ 0241,0361,0175,050,0317,01,0342,0120,0, + /* 41872 */ 0240,0361,0175,050,0317,01,0342,0110,0, + /* 41881 */ 0241,0361,0175,0110,0317,01,0342,0120,0, + /* 41890 */ 0240,0361,0175,0110,0317,01,0342,0110,0, + /* 41899 */ 0241,0361,0375,010,0317,01,0342,0120,0, + /* 41908 */ 0240,0361,0375,010,0317,01,0342,0110,0, + /* 41917 */ 0241,0361,0375,050,0317,01,0342,0120,0, + /* 41926 */ 0240,0361,0375,050,0317,01,0342,0110,0, + /* 41935 */ 0241,0361,0375,0110,0317,01,0342,0120,0, + /* 41944 */ 0240,0361,0375,0110,0317,01,0342,0110,0, + /* 41953 */ 0241,0362,0175,010,0301,01,0106,0120,0, + /* 41962 */ 0240,0362,0175,010,0301,01,0106,0110,0, + /* 41971 */ 0241,0362,0175,050,0301,01,0106,0120,0, + /* 41980 */ 0240,0362,0175,050,0301,01,0106,0110,0, + /* 41989 */ 0241,0362,0175,0110,0301,01,0106,0120,0, + /* 41998 */ 0240,0362,0175,0110,0301,01,0106,0110,0, + /* 42007 */ 0241,0362,0375,010,0301,01,0106,0120,0, + /* 42016 */ 0240,0362,0375,010,0301,01,0106,0110,0, + /* 42025 */ 0241,0362,0375,050,0301,01,0106,0120,0, + /* 42034 */ 0240,0362,0375,050,0301,01,0106,0110,0, + /* 42043 */ 0241,0362,0375,0110,0301,01,0106,0120,0, + /* 42052 */ 0240,0362,0375,0110,0301,01,0106,0110,0, + /* 42061 */ 0241,0362,0375,010,0303,01,021,0120,0, + /* 42070 */ 0240,0362,0375,010,0303,01,021,0110,0, + /* 42079 */ 0241,0362,0375,050,0303,01,021,0120,0, + /* 42088 */ 0240,0362,0375,050,0303,01,021,0110,0, + /* 42097 */ 0241,0362,0375,0110,0303,01,021,0120,0, + /* 42106 */ 0240,0362,0375,0110,0303,01,021,0110,0, + /* 42115 */ 0241,0361,0175,010,0317,01,0341,0120,0, + /* 42124 */ 0240,0361,0175,010,0317,01,0341,0110,0, + /* 42133 */ 0241,0361,0175,050,0317,01,0341,0120,0, + /* 42142 */ 0240,0361,0175,050,0317,01,0341,0110,0, + /* 42151 */ 0241,0361,0175,0110,0317,01,0341,0120,0, + /* 42160 */ 0240,0361,0175,0110,0317,01,0341,0110,0, + /* 42169 */ 0241,0361,0175,010,0317,01,0322,0120,0, + /* 42178 */ 0240,0361,0175,010,0317,01,0322,0110,0, + /* 42187 */ 0241,0361,0175,050,0317,01,0322,0120,0, + /* 42196 */ 0240,0361,0175,050,0317,01,0322,0110,0, + /* 42205 */ 0241,0361,0175,0110,0317,01,0322,0120,0, + /* 42214 */ 0240,0361,0175,0110,0317,01,0322,0110,0, + /* 42223 */ 0241,0361,0375,010,0317,01,0323,0120,0, + /* 42232 */ 0240,0361,0375,010,0317,01,0323,0110,0, + /* 42241 */ 0241,0361,0375,050,0317,01,0323,0120,0, + /* 42250 */ 0240,0361,0375,050,0317,01,0323,0110,0, + /* 42259 */ 0241,0361,0375,0110,0317,01,0323,0120,0, + /* 42268 */ 0240,0361,0375,0110,0317,01,0323,0110,0, + /* 42277 */ 0241,0362,0175,010,0301,01,0105,0120,0, + /* 42286 */ 0240,0362,0175,010,0301,01,0105,0110,0, + /* 42295 */ 0241,0362,0175,050,0301,01,0105,0120,0, + /* 42304 */ 0240,0362,0175,050,0301,01,0105,0110,0, + /* 42313 */ 0241,0362,0175,0110,0301,01,0105,0120,0, + /* 42322 */ 0240,0362,0175,0110,0301,01,0105,0110,0, + /* 42331 */ 0241,0362,0375,010,0301,01,0105,0120,0, + /* 42340 */ 0240,0362,0375,010,0301,01,0105,0110,0, + /* 42349 */ 0241,0362,0375,050,0301,01,0105,0120,0, + /* 42358 */ 0240,0362,0375,050,0301,01,0105,0110,0, + /* 42367 */ 0241,0362,0375,0110,0301,01,0105,0120,0, + /* 42376 */ 0240,0362,0375,0110,0301,01,0105,0110,0, + /* 42385 */ 0241,0362,0375,010,0303,01,020,0120,0, + /* 42394 */ 0240,0362,0375,010,0303,01,020,0110,0, + /* 42403 */ 0241,0362,0375,050,0303,01,020,0120,0, + /* 42412 */ 0240,0362,0375,050,0303,01,020,0110,0, + /* 42421 */ 0241,0362,0375,0110,0303,01,020,0120,0, + /* 42430 */ 0240,0362,0375,0110,0303,01,020,0110,0, + /* 42439 */ 0241,0361,0175,010,0317,01,0321,0120,0, + /* 42448 */ 0240,0361,0175,010,0317,01,0321,0110,0, + /* 42457 */ 0241,0361,0175,050,0317,01,0321,0120,0, + /* 42466 */ 0240,0361,0175,050,0317,01,0321,0110,0, + /* 42475 */ 0241,0361,0175,0110,0317,01,0321,0120,0, + /* 42484 */ 0240,0361,0175,0110,0317,01,0321,0110,0, + /* 42493 */ 0241,0361,0175,010,0303,01,0370,0120,0, + /* 42502 */ 0240,0361,0175,010,0303,01,0370,0110,0, + /* 42511 */ 0241,0361,0175,050,0303,01,0370,0120,0, + /* 42520 */ 0240,0361,0175,050,0303,01,0370,0110,0, + /* 42529 */ 0241,0361,0175,0110,0303,01,0370,0120,0, + /* 42538 */ 0240,0361,0175,0110,0303,01,0370,0110,0, + /* 42547 */ 0241,0361,0175,010,0301,01,0372,0120,0, + /* 42556 */ 0240,0361,0175,010,0301,01,0372,0110,0, + /* 42565 */ 0241,0361,0175,050,0301,01,0372,0120,0, + /* 42574 */ 0240,0361,0175,050,0301,01,0372,0110,0, + /* 42583 */ 0241,0361,0175,0110,0301,01,0372,0120,0, + /* 42592 */ 0240,0361,0175,0110,0301,01,0372,0110,0, + /* 42601 */ 0241,0361,0375,010,0301,01,0373,0120,0, + /* 42610 */ 0240,0361,0375,010,0301,01,0373,0110,0, + /* 42619 */ 0241,0361,0375,050,0301,01,0373,0120,0, + /* 42628 */ 0240,0361,0375,050,0301,01,0373,0110,0, + /* 42637 */ 0241,0361,0375,0110,0301,01,0373,0120,0, + /* 42646 */ 0240,0361,0375,0110,0301,01,0373,0110,0, + /* 42655 */ 0241,0361,0175,010,0303,01,0350,0120,0, + /* 42664 */ 0240,0361,0175,010,0303,01,0350,0110,0, + /* 42673 */ 0241,0361,0175,050,0303,01,0350,0120,0, + /* 42682 */ 0240,0361,0175,050,0303,01,0350,0110,0, + /* 42691 */ 0241,0361,0175,0110,0303,01,0350,0120,0, + /* 42700 */ 0240,0361,0175,0110,0303,01,0350,0110,0, + /* 42709 */ 0241,0361,0175,010,0303,01,0351,0120,0, + /* 42718 */ 0240,0361,0175,010,0303,01,0351,0110,0, + /* 42727 */ 0241,0361,0175,050,0303,01,0351,0120,0, + /* 42736 */ 0240,0361,0175,050,0303,01,0351,0110,0, + /* 42745 */ 0241,0361,0175,0110,0303,01,0351,0120,0, + /* 42754 */ 0240,0361,0175,0110,0303,01,0351,0110,0, + /* 42763 */ 0241,0361,0175,010,0303,01,0330,0120,0, + /* 42772 */ 0240,0361,0175,010,0303,01,0330,0110,0, + /* 42781 */ 0241,0361,0175,050,0303,01,0330,0120,0, + /* 42790 */ 0240,0361,0175,050,0303,01,0330,0110,0, + /* 42799 */ 0241,0361,0175,0110,0303,01,0330,0120,0, + /* 42808 */ 0240,0361,0175,0110,0303,01,0330,0110,0, + /* 42817 */ 0241,0361,0175,010,0303,01,0331,0120,0, + /* 42826 */ 0240,0361,0175,010,0303,01,0331,0110,0, + /* 42835 */ 0241,0361,0175,050,0303,01,0331,0120,0, + /* 42844 */ 0240,0361,0175,050,0303,01,0331,0110,0, + /* 42853 */ 0241,0361,0175,0110,0303,01,0331,0120,0, + /* 42862 */ 0240,0361,0175,0110,0303,01,0331,0110,0, + /* 42871 */ 0241,0361,0175,010,0303,01,0371,0120,0, + /* 42880 */ 0240,0361,0175,010,0303,01,0371,0110,0, + /* 42889 */ 0241,0361,0175,050,0303,01,0371,0120,0, + /* 42898 */ 0240,0361,0175,050,0303,01,0371,0110,0, + /* 42907 */ 0241,0361,0175,0110,0303,01,0371,0120,0, + /* 42916 */ 0240,0361,0175,0110,0303,01,0371,0110,0, + /* 42925 */ 0241,0362,0175,010,0303,01,046,0120,0, + /* 42934 */ 0241,0362,0175,050,0303,01,046,0120,0, + /* 42943 */ 0241,0362,0175,0110,0303,01,046,0120,0, + /* 42952 */ 0241,0362,0175,010,0301,01,047,0120,0, + /* 42961 */ 0241,0362,0175,050,0301,01,047,0120,0, + /* 42970 */ 0241,0362,0175,0110,0301,01,047,0120,0, + /* 42979 */ 0241,0362,0375,010,0301,01,047,0120,0, + /* 42988 */ 0241,0362,0375,050,0301,01,047,0120,0, + /* 42997 */ 0241,0362,0375,0110,0301,01,047,0120,0, + /* 43006 */ 0241,0362,0375,010,0303,01,046,0120,0, + /* 43015 */ 0241,0362,0375,050,0303,01,046,0120,0, + /* 43024 */ 0241,0362,0375,0110,0303,01,046,0120,0, + /* 43033 */ 0241,0362,0176,010,0303,01,046,0120,0, + /* 43042 */ 0241,0362,0176,050,0303,01,046,0120,0, + /* 43051 */ 0241,0362,0176,0110,0303,01,046,0120,0, + /* 43060 */ 0241,0362,0176,010,0301,01,047,0120,0, + /* 43069 */ 0241,0362,0176,050,0301,01,047,0120,0, + /* 43078 */ 0241,0362,0176,0110,0301,01,047,0120,0, + /* 43087 */ 0241,0362,0376,010,0301,01,047,0120,0, + /* 43096 */ 0241,0362,0376,050,0301,01,047,0120,0, + /* 43105 */ 0241,0362,0376,0110,0301,01,047,0120,0, + /* 43114 */ 0241,0362,0376,010,0303,01,046,0120,0, + /* 43123 */ 0241,0362,0376,050,0303,01,046,0120,0, + /* 43132 */ 0241,0362,0376,0110,0303,01,046,0120,0, + /* 43141 */ 0241,0361,0175,010,0303,01,0150,0120,0, + /* 43150 */ 0240,0361,0175,010,0303,01,0150,0110,0, + /* 43159 */ 0241,0361,0175,050,0303,01,0150,0120,0, + /* 43168 */ 0240,0361,0175,050,0303,01,0150,0110,0, + /* 43177 */ 0241,0361,0175,0110,0303,01,0150,0120,0, + /* 43186 */ 0240,0361,0175,0110,0303,01,0150,0110,0, + /* 43195 */ 0241,0361,0175,010,0301,01,0152,0120,0, + /* 43204 */ 0240,0361,0175,010,0301,01,0152,0110,0, + /* 43213 */ 0241,0361,0175,050,0301,01,0152,0120,0, + /* 43222 */ 0240,0361,0175,050,0301,01,0152,0110,0, + /* 43231 */ 0241,0361,0175,0110,0301,01,0152,0120,0, + /* 43240 */ 0240,0361,0175,0110,0301,01,0152,0110,0, + /* 43249 */ 0241,0361,0375,010,0301,01,0155,0120,0, + /* 43258 */ 0240,0361,0375,010,0301,01,0155,0110,0, + /* 43267 */ 0241,0361,0375,050,0301,01,0155,0120,0, + /* 43276 */ 0240,0361,0375,050,0301,01,0155,0110,0, + /* 43285 */ 0241,0361,0375,0110,0301,01,0155,0120,0, + /* 43294 */ 0240,0361,0375,0110,0301,01,0155,0110,0, + /* 43303 */ 0241,0361,0175,010,0303,01,0151,0120,0, + /* 43312 */ 0240,0361,0175,010,0303,01,0151,0110,0, + /* 43321 */ 0241,0361,0175,050,0303,01,0151,0120,0, + /* 43330 */ 0240,0361,0175,050,0303,01,0151,0110,0, + /* 43339 */ 0241,0361,0175,0110,0303,01,0151,0120,0, + /* 43348 */ 0240,0361,0175,0110,0303,01,0151,0110,0, + /* 43357 */ 0241,0361,0175,010,0303,01,0140,0120,0, + /* 43366 */ 0240,0361,0175,010,0303,01,0140,0110,0, + /* 43375 */ 0241,0361,0175,050,0303,01,0140,0120,0, + /* 43384 */ 0240,0361,0175,050,0303,01,0140,0110,0, + /* 43393 */ 0241,0361,0175,0110,0303,01,0140,0120,0, + /* 43402 */ 0240,0361,0175,0110,0303,01,0140,0110,0, + /* 43411 */ 0241,0361,0175,010,0301,01,0142,0120,0, + /* 43420 */ 0240,0361,0175,010,0301,01,0142,0110,0, + /* 43429 */ 0241,0361,0175,050,0301,01,0142,0120,0, + /* 43438 */ 0240,0361,0175,050,0301,01,0142,0110,0, + /* 43447 */ 0241,0361,0175,0110,0301,01,0142,0120,0, + /* 43456 */ 0240,0361,0175,0110,0301,01,0142,0110,0, + /* 43465 */ 0241,0361,0375,010,0301,01,0154,0120,0, + /* 43474 */ 0240,0361,0375,010,0301,01,0154,0110,0, + /* 43483 */ 0241,0361,0375,050,0301,01,0154,0120,0, + /* 43492 */ 0240,0361,0375,050,0301,01,0154,0110,0, + /* 43501 */ 0241,0361,0375,0110,0301,01,0154,0120,0, + /* 43510 */ 0240,0361,0375,0110,0301,01,0154,0110,0, + /* 43519 */ 0241,0361,0175,010,0303,01,0141,0120,0, + /* 43528 */ 0240,0361,0175,010,0303,01,0141,0110,0, + /* 43537 */ 0241,0361,0175,050,0303,01,0141,0120,0, + /* 43546 */ 0240,0361,0175,050,0303,01,0141,0110,0, + /* 43555 */ 0241,0361,0175,0110,0303,01,0141,0120,0, + /* 43564 */ 0240,0361,0175,0110,0303,01,0141,0110,0, + /* 43573 */ 0241,0361,0175,010,0301,01,0357,0120,0, + /* 43582 */ 0240,0361,0175,010,0301,01,0357,0110,0, + /* 43591 */ 0241,0361,0175,050,0301,01,0357,0120,0, + /* 43600 */ 0240,0361,0175,050,0301,01,0357,0110,0, + /* 43609 */ 0241,0361,0175,0110,0301,01,0357,0120,0, + /* 43618 */ 0240,0361,0175,0110,0301,01,0357,0110,0, + /* 43627 */ 0241,0361,0375,010,0301,01,0357,0120,0, + /* 43636 */ 0240,0361,0375,010,0301,01,0357,0110,0, + /* 43645 */ 0241,0361,0375,050,0301,01,0357,0120,0, + /* 43654 */ 0240,0361,0375,050,0301,01,0357,0110,0, + /* 43663 */ 0241,0361,0375,0110,0301,01,0357,0120,0, + /* 43672 */ 0240,0361,0375,0110,0301,01,0357,0110,0, + /* 43681 */ 0250,0362,0375,010,0301,01,0114,0110,0, + /* 43690 */ 0250,0362,0375,050,0301,01,0114,0110,0, + /* 43699 */ 0250,0362,0375,0110,0301,01,0114,0110,0, + /* 43708 */ 0250,0362,0175,010,0301,01,0114,0110,0, + /* 43717 */ 0250,0362,0175,050,0301,01,0114,0110,0, + /* 43726 */ 0250,0362,0175,0110,0301,01,0114,0110,0, + /* 43735 */ 0241,0362,0375,010,0306,01,0115,0120,0, + /* 43744 */ 0240,0362,0375,010,0306,01,0115,0110,0, + /* 43753 */ 0241,0362,0175,010,0306,01,0115,0120,0, + /* 43762 */ 0240,0362,0175,010,0306,01,0115,0110,0, + /* 43771 */ 0250,0362,0375,0110,0301,01,0312,0110,0, + /* 43780 */ 0250,0362,0175,0110,0301,01,0312,0110,0, + /* 43789 */ 0241,0362,0375,010,0306,01,0313,0120,0, + /* 43798 */ 0240,0362,0375,010,0306,01,0313,0110,0, + /* 43807 */ 0241,0362,0175,010,0306,01,0313,0120,0, + /* 43816 */ 0240,0362,0175,010,0306,01,0313,0110,0, + /* 43825 */ 0250,0362,0375,010,0301,01,0116,0110,0, + /* 43834 */ 0250,0362,0375,050,0301,01,0116,0110,0, + /* 43843 */ 0250,0362,0375,0110,0301,01,0116,0110,0, + /* 43852 */ 0250,0362,0175,010,0301,01,0116,0110,0, + /* 43861 */ 0250,0362,0175,050,0301,01,0116,0110,0, + /* 43870 */ 0250,0362,0175,0110,0301,01,0116,0110,0, + /* 43879 */ 0241,0362,0375,010,0306,01,0117,0120,0, + /* 43888 */ 0240,0362,0375,010,0306,01,0117,0110,0, + /* 43897 */ 0241,0362,0175,010,0306,01,0117,0120,0, + /* 43906 */ 0240,0362,0175,010,0306,01,0117,0110,0, + /* 43915 */ 0250,0362,0375,0110,0301,01,0314,0110,0, + /* 43924 */ 0250,0362,0175,0110,0301,01,0314,0110,0, + /* 43933 */ 0241,0362,0375,010,0306,01,0315,0120,0, + /* 43942 */ 0240,0362,0375,010,0306,01,0315,0110,0, + /* 43951 */ 0241,0362,0175,010,0306,01,0315,0120,0, + /* 43960 */ 0240,0362,0175,010,0306,01,0315,0110,0, + /* 43969 */ 0241,0362,0375,010,0301,01,054,0120,0, + /* 43978 */ 0240,0362,0375,010,0301,01,054,0110,0, + /* 43987 */ 0241,0362,0375,050,0301,01,054,0120,0, + /* 43996 */ 0240,0362,0375,050,0301,01,054,0110,0, + /* 44005 */ 0241,0362,0375,0110,0301,01,054,0120,0, + /* 44014 */ 0240,0362,0375,0110,0301,01,054,0110,0, + /* 44023 */ 0241,0362,0175,010,0301,01,054,0120,0, + /* 44032 */ 0240,0362,0175,010,0301,01,054,0110,0, + /* 44041 */ 0241,0362,0175,050,0301,01,054,0120,0, + /* 44050 */ 0240,0362,0175,050,0301,01,054,0110,0, + /* 44059 */ 0241,0362,0175,0110,0301,01,054,0120,0, + /* 44068 */ 0240,0362,0175,0110,0301,01,054,0110,0, + /* 44077 */ 0241,0362,0375,010,0306,01,055,0120,0, + /* 44086 */ 0240,0362,0375,010,0306,01,055,0110,0, + /* 44095 */ 0241,0362,0175,010,0306,01,055,0120,0, + /* 44104 */ 0240,0362,0175,010,0306,01,055,0110,0, + /* 44113 */ 0250,0361,0375,010,0301,01,0121,0110,0, + /* 44122 */ 0250,0361,0375,050,0301,01,0121,0110,0, + /* 44131 */ 0250,0361,0375,0110,0301,01,0121,0110,0, + /* 44140 */ 0250,0361,0174,010,0301,01,0121,0110,0, + /* 44149 */ 0250,0361,0174,050,0301,01,0121,0110,0, + /* 44158 */ 0250,0361,0174,0110,0301,01,0121,0110,0, + /* 44167 */ 0241,0361,0377,010,0306,01,0121,0120,0, + /* 44176 */ 0240,0361,0377,010,0306,01,0121,0110,0, + /* 44185 */ 0241,0361,0176,010,0306,01,0121,0120,0, + /* 44194 */ 0240,0361,0176,010,0306,01,0121,0110,0, + /* 44203 */ 0241,0361,0375,010,0301,01,0134,0120,0, + /* 44212 */ 0240,0361,0375,010,0301,01,0134,0110,0, + /* 44221 */ 0241,0361,0375,050,0301,01,0134,0120,0, + /* 44230 */ 0240,0361,0375,050,0301,01,0134,0110,0, + /* 44239 */ 0241,0361,0375,0110,0301,01,0134,0120,0, + /* 44248 */ 0240,0361,0375,0110,0301,01,0134,0110,0, + /* 44257 */ 0241,0361,0174,010,0301,01,0134,0120,0, + /* 44266 */ 0240,0361,0174,010,0301,01,0134,0110,0, + /* 44275 */ 0241,0361,0174,050,0301,01,0134,0120,0, + /* 44284 */ 0240,0361,0174,050,0301,01,0134,0110,0, + /* 44293 */ 0241,0361,0174,0110,0301,01,0134,0120,0, + /* 44302 */ 0240,0361,0174,0110,0301,01,0134,0110,0, + /* 44311 */ 0241,0361,0377,010,0306,01,0134,0120,0, + /* 44320 */ 0240,0361,0377,010,0306,01,0134,0110,0, + /* 44329 */ 0241,0361,0176,010,0306,01,0134,0120,0, + /* 44338 */ 0240,0361,0176,010,0306,01,0134,0110,0, + /* 44347 */ 0250,0361,0375,010,0306,01,056,0110,0, + /* 44356 */ 0250,0361,0174,010,0306,01,056,0110,0, + /* 44365 */ 0241,0361,0375,010,0301,01,025,0120,0, + /* 44374 */ 0240,0361,0375,010,0301,01,025,0110,0, + /* 44383 */ 0241,0361,0375,050,0301,01,025,0120,0, + /* 44392 */ 0240,0361,0375,050,0301,01,025,0110,0, + /* 44401 */ 0241,0361,0375,0110,0301,01,025,0120,0, + /* 44410 */ 0240,0361,0375,0110,0301,01,025,0110,0, + /* 44419 */ 0241,0361,0174,010,0301,01,025,0120,0, + /* 44428 */ 0240,0361,0174,010,0301,01,025,0110,0, + /* 44437 */ 0241,0361,0174,050,0301,01,025,0120,0, + /* 44446 */ 0240,0361,0174,050,0301,01,025,0110,0, + /* 44455 */ 0241,0361,0174,0110,0301,01,025,0120,0, + /* 44464 */ 0240,0361,0174,0110,0301,01,025,0110,0, + /* 44473 */ 0241,0361,0375,010,0301,01,024,0120,0, + /* 44482 */ 0240,0361,0375,010,0301,01,024,0110,0, + /* 44491 */ 0241,0361,0375,050,0301,01,024,0120,0, + /* 44500 */ 0240,0361,0375,050,0301,01,024,0110,0, + /* 44509 */ 0241,0361,0375,0110,0301,01,024,0120,0, + /* 44518 */ 0240,0361,0375,0110,0301,01,024,0110,0, + /* 44527 */ 0241,0361,0174,010,0301,01,024,0120,0, + /* 44536 */ 0240,0361,0174,010,0301,01,024,0110,0, + /* 44545 */ 0241,0361,0174,050,0301,01,024,0120,0, + /* 44554 */ 0240,0361,0174,050,0301,01,024,0110,0, + /* 44563 */ 0241,0361,0174,0110,0301,01,024,0120,0, + /* 44572 */ 0240,0361,0174,0110,0301,01,024,0110,0, + /* 44581 */ 0241,0361,0375,010,0301,01,0127,0120,0, + /* 44590 */ 0240,0361,0375,010,0301,01,0127,0110,0, + /* 44599 */ 0241,0361,0375,050,0301,01,0127,0120,0, + /* 44608 */ 0240,0361,0375,050,0301,01,0127,0110,0, + /* 44617 */ 0241,0361,0375,0110,0301,01,0127,0120,0, + /* 44626 */ 0240,0361,0375,0110,0301,01,0127,0110,0, + /* 44635 */ 0241,0361,0174,010,0301,01,0127,0120,0, + /* 44644 */ 0240,0361,0174,010,0301,01,0127,0110,0, + /* 44653 */ 0241,0361,0174,050,0301,01,0127,0120,0, + /* 44662 */ 0240,0361,0174,050,0301,01,0127,0110,0, + /* 44671 */ 0241,0361,0174,0110,0301,01,0127,0120,0, + /* 44680 */ 0240,0361,0174,0110,0301,01,0127,0110,0, + /* 44689 */ 0250,0364,0174,010,0300,01,0371,0101,0, + /* 44698 */ 0250,0364,0374,010,0300,01,0371,0101,0, + /* 44707 */ 0250,0364,0375,010,0300,01,0370,0110,0, + /* 44716 */ 0241,0362,0175,010,0303,01,0317,0120,0, + /* 44725 */ 0240,0362,0175,010,0303,01,0317,0110,0, + /* 44734 */ 0241,0362,0175,050,0303,01,0317,0120,0, + /* 44743 */ 0240,0362,0175,050,0303,01,0317,0110,0, + /* 44752 */ 0241,0362,0175,0110,0303,01,0317,0120,0, + /* 44761 */ 0240,0362,0175,0110,0303,01,0317,0110,0, + /* 44770 */ 0250,0362,0175,010,0304,01,0143,0101,0, + /* 44779 */ 0250,0362,0175,050,0304,01,0143,0101,0, + /* 44788 */ 0250,0362,0175,0110,0304,01,0143,0101,0, + /* 44797 */ 0250,0362,0175,010,0300,01,0143,0101,0, + /* 44806 */ 0250,0362,0175,050,0300,01,0143,0101,0, + /* 44815 */ 0250,0362,0175,0110,0300,01,0143,0101,0, + /* 44824 */ 0250,0362,0375,010,0305,01,0143,0101,0, + /* 44833 */ 0250,0362,0375,050,0305,01,0143,0101,0, + /* 44842 */ 0250,0362,0375,0110,0305,01,0143,0101,0, + /* 44851 */ 0250,0362,0375,010,0300,01,0143,0101,0, + /* 44860 */ 0250,0362,0375,050,0300,01,0143,0101,0, + /* 44869 */ 0250,0362,0375,0110,0300,01,0143,0101,0, + /* 44878 */ 0250,0362,0175,010,0304,01,0142,0110,0, + /* 44887 */ 0250,0362,0175,050,0304,01,0142,0110,0, + /* 44896 */ 0250,0362,0175,0110,0304,01,0142,0110,0, + /* 44905 */ 0250,0362,0375,010,0305,01,0142,0110,0, + /* 44914 */ 0250,0362,0375,050,0305,01,0142,0110,0, + /* 44923 */ 0250,0362,0375,0110,0305,01,0142,0110,0, + /* 44932 */ 0241,0362,0375,010,0303,01,0160,0120,0, + /* 44941 */ 0240,0362,0375,010,0303,01,0160,0110,0, + /* 44950 */ 0241,0362,0375,050,0303,01,0160,0120,0, + /* 44959 */ 0240,0362,0375,050,0303,01,0160,0110,0, + /* 44968 */ 0241,0362,0375,0110,0303,01,0160,0120,0, + /* 44977 */ 0240,0362,0375,0110,0303,01,0160,0110,0, + /* 44986 */ 0241,0362,0175,010,0301,01,0161,0120,0, + /* 44995 */ 0240,0362,0175,010,0301,01,0161,0110,0, + /* 45004 */ 0241,0362,0175,050,0301,01,0161,0120,0, + /* 45013 */ 0240,0362,0175,050,0301,01,0161,0110,0, + /* 45022 */ 0241,0362,0175,0110,0301,01,0161,0120,0, + /* 45031 */ 0240,0362,0175,0110,0301,01,0161,0110,0, + /* 45040 */ 0241,0362,0375,010,0301,01,0161,0120,0, + /* 45049 */ 0240,0362,0375,010,0301,01,0161,0110,0, + /* 45058 */ 0241,0362,0375,050,0301,01,0161,0120,0, + /* 45067 */ 0240,0362,0375,050,0301,01,0161,0110,0, + /* 45076 */ 0241,0362,0375,0110,0301,01,0161,0120,0, + /* 45085 */ 0240,0362,0375,0110,0301,01,0161,0110,0, + /* 45094 */ 0241,0362,0375,010,0303,01,0162,0120,0, + /* 45103 */ 0240,0362,0375,010,0303,01,0162,0110,0, + /* 45112 */ 0241,0362,0375,050,0303,01,0162,0120,0, + /* 45121 */ 0240,0362,0375,050,0303,01,0162,0110,0, + /* 45130 */ 0241,0362,0375,0110,0303,01,0162,0120,0, + /* 45139 */ 0240,0362,0375,0110,0303,01,0162,0110,0, + /* 45148 */ 0241,0362,0175,010,0301,01,0163,0120,0, + /* 45157 */ 0240,0362,0175,010,0301,01,0163,0110,0, + /* 45166 */ 0241,0362,0175,050,0301,01,0163,0120,0, + /* 45175 */ 0240,0362,0175,050,0301,01,0163,0110,0, + /* 45184 */ 0241,0362,0175,0110,0301,01,0163,0120,0, + /* 45193 */ 0240,0362,0175,0110,0301,01,0163,0110,0, + /* 45202 */ 0241,0362,0375,010,0301,01,0163,0120,0, + /* 45211 */ 0240,0362,0375,010,0301,01,0163,0110,0, + /* 45220 */ 0241,0362,0375,050,0301,01,0163,0120,0, + /* 45229 */ 0240,0362,0375,050,0301,01,0163,0110,0, + /* 45238 */ 0241,0362,0375,0110,0301,01,0163,0120,0, + /* 45247 */ 0240,0362,0375,0110,0301,01,0163,0110,0, + /* 45256 */ 0241,0362,0175,010,0301,01,0120,0120,0, + /* 45265 */ 0240,0362,0175,010,0301,01,0120,0110,0, + /* 45274 */ 0241,0362,0175,050,0301,01,0120,0120,0, + /* 45283 */ 0240,0362,0175,050,0301,01,0120,0110,0, + /* 45292 */ 0241,0362,0175,0110,0301,01,0120,0120,0, + /* 45301 */ 0240,0362,0175,0110,0301,01,0120,0110,0, + /* 45310 */ 0241,0362,0175,010,0301,01,0121,0120,0, + /* 45319 */ 0240,0362,0175,010,0301,01,0121,0110,0, + /* 45328 */ 0241,0362,0175,050,0301,01,0121,0120,0, + /* 45337 */ 0240,0362,0175,050,0301,01,0121,0110,0, + /* 45346 */ 0241,0362,0175,0110,0301,01,0121,0120,0, + /* 45355 */ 0240,0362,0175,0110,0301,01,0121,0110,0, + /* 45364 */ 0241,0362,0175,010,0301,01,0122,0120,0, + /* 45373 */ 0240,0362,0175,010,0301,01,0122,0110,0, + /* 45382 */ 0241,0362,0175,050,0301,01,0122,0120,0, + /* 45391 */ 0240,0362,0175,050,0301,01,0122,0110,0, + /* 45400 */ 0241,0362,0175,0110,0301,01,0122,0120,0, + /* 45409 */ 0240,0362,0175,0110,0301,01,0122,0110,0, + /* 45418 */ 0241,0362,0175,010,0301,01,0123,0120,0, + /* 45427 */ 0240,0362,0175,010,0301,01,0123,0110,0, + /* 45436 */ 0241,0362,0175,050,0301,01,0123,0120,0, + /* 45445 */ 0240,0362,0175,050,0301,01,0123,0110,0, + /* 45454 */ 0241,0362,0175,0110,0301,01,0123,0120,0, + /* 45463 */ 0240,0362,0175,0110,0301,01,0123,0110,0, + /* 45472 */ 0250,0362,0175,010,0303,01,0124,0110,0, + /* 45481 */ 0250,0362,0175,050,0303,01,0124,0110,0, + /* 45490 */ 0250,0362,0175,0110,0303,01,0124,0110,0, + /* 45499 */ 0250,0362,0375,010,0303,01,0124,0110,0, + /* 45508 */ 0250,0362,0375,050,0303,01,0124,0110,0, + /* 45517 */ 0250,0362,0375,0110,0303,01,0124,0110,0, + /* 45526 */ 0250,0362,0175,010,0301,01,0125,0110,0, + /* 45535 */ 0250,0362,0175,050,0301,01,0125,0110,0, + /* 45544 */ 0250,0362,0175,0110,0301,01,0125,0110,0, + /* 45553 */ 0250,0362,0375,010,0301,01,0125,0110,0, + /* 45562 */ 0250,0362,0375,050,0301,01,0125,0110,0, + /* 45571 */ 0250,0362,0375,0110,0301,01,0125,0110,0, + /* 45580 */ 0241,0362,0175,010,0303,01,0217,0120,0, + /* 45589 */ 0241,0362,0175,050,0303,01,0217,0120,0, + /* 45598 */ 0241,0362,0175,0110,0303,01,0217,0120,0, + /* 45607 */ 0241,0362,0177,0110,0317,01,0232,0120,0, + /* 45616 */ 0241,0362,0177,0110,0317,01,0252,0120,0, + /* 45625 */ 0241,0362,0177,010,0317,01,0233,0120,0, + /* 45634 */ 0241,0362,0177,010,0317,01,0253,0120,0, + /* 45643 */ 0241,0362,0177,0110,0317,01,0123,0120,0, + /* 45652 */ 0241,0362,0177,0110,0317,01,0122,0120,0, + /* 45661 */ 0250,0364,0175,010,0300,01,0145,0101,0, + /* 45670 */ 0250,0364,0375,010,0300,01,0145,0101,0, + /* 45679 */ 0250,0364,0174,010,0300,01,0146,0101,0, + /* 45688 */ 0250,0364,0374,010,0300,01,0146,0101,0, + /* 45697 */ 0250,0364,0377,010,0300,01,0370,0110,0, + /* 45706 */ 0250,0364,0376,010,0300,01,0370,0110,0, + /* 45715 */ 0241,0362,0177,010,0301,01,0162,0120,0, + /* 45724 */ 0240,0362,0177,010,0301,01,0162,0110,0, + /* 45733 */ 0241,0362,0177,050,0301,01,0162,0120,0, + /* 45742 */ 0240,0362,0177,050,0301,01,0162,0110,0, + /* 45751 */ 0241,0362,0177,0110,0301,01,0162,0120,0, + /* 45760 */ 0240,0362,0177,0110,0301,01,0162,0110,0, + /* 45769 */ 0250,0362,0176,010,0301,01,0162,0110,0, + /* 45778 */ 0250,0362,0176,050,0301,01,0162,0110,0, + /* 45787 */ 0250,0362,0176,0110,0301,01,0162,0110,0, + /* 45796 */ 0241,0362,0176,010,0301,01,0122,0120,0, + /* 45805 */ 0240,0362,0176,010,0301,01,0122,0110,0, + /* 45814 */ 0241,0362,0176,050,0301,01,0122,0120,0, + /* 45823 */ 0240,0362,0176,050,0301,01,0122,0110,0, + /* 45832 */ 0241,0362,0176,0110,0301,01,0122,0120,0, + /* 45841 */ 0240,0362,0176,0110,0301,01,0122,0110,0, + /* 45850 */ 0241,0362,0177,010,0301,01,0150,0120,0, + /* 45859 */ 0241,0362,0177,050,0301,01,0150,0120,0, + /* 45868 */ 0241,0362,0177,0110,0301,01,0150,0120,0, + /* 45877 */ 0241,0362,0377,010,0301,01,0150,0120,0, + /* 45886 */ 0241,0362,0377,050,0301,01,0150,0120,0, + /* 45895 */ 0241,0362,0377,0110,0301,01,0150,0120,0, + /* 45904 */ 0250,0362,0174,010,0300,01,0111,0200,0, + /* 45913 */ 0250,0362,0175,010,0300,01,0111,0200,0, + /* 45922 */ 0250,0362,0177,010,0300,01,0113,0110,0, + /* 45931 */ 0250,0362,0175,010,0300,01,0113,0110,0, + /* 45940 */ 0250,0362,0176,010,0300,01,0113,0101,0, + /* 45949 */ 0250,0362,0177,010,0300,01,0112,0110,0, + /* 45958 */ 0250,0362,0175,010,0300,01,0112,0110,0, + /* 45967 */ 0242,0362,0176,0110,0300,01,0112,0110,0, + /* 45976 */ 0242,0362,0177,0110,0300,01,0155,0110,0, + /* 45985 */ 0242,0362,0176,0110,0300,01,0155,0110,0, + /* 45994 */ 0242,0362,0174,0110,0300,01,0155,0110,0, + /* 46003 */ 0242,0362,0175,0110,0300,01,0155,0110,0, + /* 46012 */ 0242,0362,0175,0110,0300,01,0112,0110,0, + /* 46021 */ 0241,0365,0174,010,0301,01,0130,0120,0, + /* 46030 */ 0240,0365,0174,010,0301,01,0130,0110,0, + /* 46039 */ 0241,0365,0174,050,0301,01,0130,0120,0, + /* 46048 */ 0240,0365,0174,050,0301,01,0130,0110,0, + /* 46057 */ 0241,0365,0174,0110,0301,01,0130,0120,0, + /* 46066 */ 0240,0365,0174,0110,0301,01,0130,0110,0, + /* 46075 */ 0241,0365,0176,010,0305,01,0130,0120,0, + /* 46084 */ 0240,0365,0176,010,0305,01,0130,0110,0, + /* 46093 */ 0250,0365,0174,010,0301,01,057,0110,0, + /* 46102 */ 0250,0365,0174,010,0301,01,0133,0110,0, + /* 46111 */ 0250,0365,0174,050,0301,01,0133,0110,0, + /* 46120 */ 0250,0365,0174,0110,0301,01,0133,0110,0, + /* 46129 */ 0250,0365,0375,010,0301,01,0132,0110,0, + /* 46138 */ 0250,0365,0375,050,0301,01,0132,0110,0, + /* 46147 */ 0250,0365,0375,0110,0301,01,0132,0110,0, + /* 46156 */ 0250,0365,0175,010,0302,01,0133,0110,0, + /* 46165 */ 0250,0365,0175,050,0302,01,0133,0110,0, + /* 46174 */ 0250,0365,0175,0110,0302,01,0133,0110,0, + /* 46183 */ 0250,0365,0174,010,0315,01,0132,0110,0, + /* 46192 */ 0250,0365,0174,050,0315,01,0132,0110,0, + /* 46201 */ 0250,0365,0174,0110,0315,01,0132,0110,0, + /* 46210 */ 0250,0366,0175,010,0302,01,023,0110,0, + /* 46219 */ 0250,0366,0175,050,0302,01,023,0110,0, + /* 46228 */ 0250,0366,0175,0110,0302,01,023,0110,0, + /* 46237 */ 0250,0365,0175,010,0315,01,0173,0110,0, + /* 46246 */ 0250,0365,0175,050,0315,01,0173,0110,0, + /* 46255 */ 0250,0365,0175,0110,0315,01,0173,0110,0, + /* 46264 */ 0250,0365,0174,010,0302,01,0171,0110,0, + /* 46273 */ 0250,0365,0174,050,0302,01,0171,0110,0, + /* 46282 */ 0250,0365,0174,0110,0302,01,0171,0110,0, + /* 46291 */ 0250,0365,0175,010,0315,01,0171,0110,0, + /* 46300 */ 0250,0365,0175,050,0315,01,0171,0110,0, + /* 46309 */ 0250,0365,0175,0110,0315,01,0171,0110,0, + /* 46318 */ 0250,0365,0174,010,0301,01,0175,0110,0, + /* 46327 */ 0250,0365,0174,050,0301,01,0175,0110,0, + /* 46336 */ 0250,0365,0174,0110,0301,01,0175,0110,0, + /* 46345 */ 0250,0365,0175,010,0301,01,0175,0110,0, + /* 46354 */ 0250,0365,0175,050,0301,01,0175,0110,0, + /* 46363 */ 0250,0365,0175,0110,0301,01,0175,0110,0, + /* 46372 */ 0250,0365,0175,010,0301,01,035,0110,0, + /* 46381 */ 0250,0365,0175,050,0301,01,035,0110,0, + /* 46390 */ 0250,0365,0175,0110,0301,01,035,0110,0, + /* 46399 */ 0250,0365,0374,010,0301,01,0133,0110,0, + /* 46408 */ 0250,0365,0374,050,0301,01,0133,0110,0, + /* 46417 */ 0250,0365,0374,0110,0301,01,0133,0110,0, + /* 46426 */ 0241,0365,0377,010,0306,01,0132,0120,0, + /* 46435 */ 0240,0365,0377,010,0306,01,0132,0110,0, + /* 46444 */ 0241,0365,0176,010,0306,01,0132,0120,0, + /* 46453 */ 0240,0365,0176,010,0306,01,0132,0110,0, + /* 46462 */ 0250,0365,0176,010,0306,01,055,0110,0, + /* 46471 */ 0250,0365,0376,010,0306,01,055,0110,0, + /* 46480 */ 0241,0366,0174,010,0306,01,023,0120,0, + /* 46489 */ 0240,0366,0174,010,0306,01,023,0110,0, + /* 46498 */ 0250,0365,0176,010,0306,01,0171,0110,0, + /* 46507 */ 0250,0365,0376,010,0306,01,0171,0110,0, + /* 46516 */ 0241,0365,0176,010,0306,01,052,0120,0, + /* 46525 */ 0240,0365,0176,010,0306,01,052,0110,0, + /* 46534 */ 0241,0365,0376,010,0306,01,052,0120,0, + /* 46543 */ 0240,0365,0376,010,0306,01,052,0110,0, + /* 46552 */ 0241,0365,0174,010,0306,01,035,0120,0, + /* 46561 */ 0240,0365,0174,010,0306,01,035,0110,0, + /* 46570 */ 0250,0365,0176,010,0302,01,0133,0110,0, + /* 46579 */ 0250,0365,0176,050,0302,01,0133,0110,0, + /* 46588 */ 0250,0365,0176,0110,0302,01,0133,0110,0, + /* 46597 */ 0250,0365,0175,010,0306,01,0172,0110,0, + /* 46606 */ 0250,0365,0175,050,0306,01,0172,0110,0, + /* 46615 */ 0250,0365,0175,0110,0306,01,0172,0110,0, + /* 46624 */ 0250,0365,0174,010,0302,01,0170,0110,0, + /* 46633 */ 0250,0365,0174,050,0302,01,0170,0110,0, + /* 46642 */ 0250,0365,0174,0110,0302,01,0170,0110,0, + /* 46651 */ 0250,0365,0175,010,0306,01,0170,0110,0, + /* 46660 */ 0250,0365,0175,050,0306,01,0170,0110,0, + /* 46669 */ 0250,0365,0175,0110,0306,01,0170,0110,0, + /* 46678 */ 0250,0365,0174,010,0301,01,0174,0110,0, + /* 46687 */ 0250,0365,0174,050,0301,01,0174,0110,0, + /* 46696 */ 0250,0365,0174,0110,0301,01,0174,0110,0, + /* 46705 */ 0250,0365,0175,010,0301,01,0174,0110,0, + /* 46714 */ 0250,0365,0175,050,0301,01,0174,0110,0, + /* 46723 */ 0250,0365,0175,0110,0301,01,0174,0110,0, + /* 46732 */ 0250,0365,0176,010,0306,01,054,0110,0, + /* 46741 */ 0250,0365,0376,010,0306,01,054,0110,0, + /* 46750 */ 0250,0365,0176,010,0306,01,0170,0110,0, + /* 46759 */ 0250,0365,0376,010,0306,01,0170,0110,0, + /* 46768 */ 0250,0365,0177,010,0301,01,0172,0110,0, + /* 46777 */ 0250,0365,0177,050,0301,01,0172,0110,0, + /* 46786 */ 0250,0365,0177,0110,0301,01,0172,0110,0, + /* 46795 */ 0250,0365,0377,010,0301,01,0172,0110,0, + /* 46804 */ 0250,0365,0377,050,0301,01,0172,0110,0, + /* 46813 */ 0250,0365,0377,0110,0301,01,0172,0110,0, + /* 46822 */ 0241,0365,0176,010,0306,01,0173,0120,0, + /* 46831 */ 0240,0365,0176,010,0306,01,0173,0110,0, + /* 46840 */ 0241,0365,0376,010,0306,01,0173,0120,0, + /* 46849 */ 0240,0365,0376,010,0306,01,0173,0110,0, + /* 46858 */ 0250,0365,0177,010,0301,01,0175,0110,0, + /* 46867 */ 0250,0365,0177,050,0301,01,0175,0110,0, + /* 46876 */ 0250,0365,0177,0110,0301,01,0175,0110,0, + /* 46885 */ 0250,0365,0176,010,0301,01,0175,0110,0, + /* 46894 */ 0250,0365,0176,050,0301,01,0175,0110,0, + /* 46903 */ 0250,0365,0176,0110,0301,01,0175,0110,0, + /* 46912 */ 0241,0365,0174,010,0301,01,0136,0120,0, + /* 46921 */ 0240,0365,0174,010,0301,01,0136,0110,0, + /* 46930 */ 0241,0365,0174,050,0301,01,0136,0120,0, + /* 46939 */ 0240,0365,0174,050,0301,01,0136,0110,0, + /* 46948 */ 0241,0365,0174,0110,0301,01,0136,0120,0, + /* 46957 */ 0240,0365,0174,0110,0301,01,0136,0110,0, + /* 46966 */ 0241,0365,0176,010,0305,01,0136,0120,0, + /* 46975 */ 0240,0365,0176,010,0305,01,0136,0110,0, + /* 46984 */ 0241,0366,0177,010,0301,01,0126,0120,0, + /* 46993 */ 0240,0366,0177,010,0301,01,0126,0110,0, + /* 47002 */ 0241,0366,0177,050,0301,01,0126,0120,0, + /* 47011 */ 0240,0366,0177,050,0301,01,0126,0110,0, + /* 47020 */ 0241,0366,0177,0110,0301,01,0126,0120,0, + /* 47029 */ 0240,0366,0177,0110,0301,01,0126,0110,0, + /* 47038 */ 0241,0366,0176,010,0301,01,0126,0120,0, + /* 47047 */ 0240,0366,0176,010,0301,01,0126,0110,0, + /* 47056 */ 0241,0366,0176,050,0301,01,0126,0120,0, + /* 47065 */ 0240,0366,0176,050,0301,01,0126,0110,0, + /* 47074 */ 0241,0366,0176,0110,0301,01,0126,0120,0, + /* 47083 */ 0240,0366,0176,0110,0301,01,0126,0110,0, + /* 47092 */ 0241,0366,0177,010,0306,01,0127,0120,0, + /* 47101 */ 0240,0366,0177,010,0306,01,0127,0110,0, + /* 47110 */ 0241,0366,0176,010,0306,01,0127,0120,0, + /* 47119 */ 0240,0366,0176,010,0306,01,0127,0110,0, + /* 47128 */ 0241,0366,0177,010,0301,01,0326,0120,0, + /* 47137 */ 0240,0366,0177,010,0301,01,0326,0110,0, + /* 47146 */ 0241,0366,0177,050,0301,01,0326,0120,0, + /* 47155 */ 0240,0366,0177,050,0301,01,0326,0110,0, + /* 47164 */ 0241,0366,0177,0110,0301,01,0326,0120,0, + /* 47173 */ 0240,0366,0177,0110,0301,01,0326,0110,0, + /* 47182 */ 0241,0366,0176,010,0301,01,0326,0120,0, + /* 47191 */ 0240,0366,0176,010,0301,01,0326,0110,0, + /* 47200 */ 0241,0366,0176,050,0301,01,0326,0120,0, + /* 47209 */ 0240,0366,0176,050,0301,01,0326,0110,0, + /* 47218 */ 0241,0366,0176,0110,0301,01,0326,0120,0, + /* 47227 */ 0240,0366,0176,0110,0301,01,0326,0110,0, + /* 47236 */ 0241,0366,0177,010,0306,01,0327,0120,0, + /* 47245 */ 0240,0366,0177,010,0306,01,0327,0110,0, + /* 47254 */ 0241,0366,0176,010,0306,01,0327,0120,0, + /* 47263 */ 0240,0366,0176,010,0306,01,0327,0110,0, + /* 47272 */ 0241,0366,0175,010,0301,01,0226,0120,0, + /* 47281 */ 0240,0366,0175,010,0301,01,0226,0110,0, + /* 47290 */ 0241,0366,0175,050,0301,01,0226,0120,0, + /* 47299 */ 0240,0366,0175,050,0301,01,0226,0110,0, + /* 47308 */ 0241,0366,0175,0110,0301,01,0226,0120,0, + /* 47317 */ 0240,0366,0175,0110,0301,01,0226,0110,0, + /* 47326 */ 0241,0366,0175,010,0301,01,0246,0120,0, + /* 47335 */ 0240,0366,0175,010,0301,01,0246,0110,0, + /* 47344 */ 0241,0366,0175,050,0301,01,0246,0120,0, + /* 47353 */ 0240,0366,0175,050,0301,01,0246,0110,0, + /* 47362 */ 0241,0366,0175,0110,0301,01,0246,0120,0, + /* 47371 */ 0240,0366,0175,0110,0301,01,0246,0110,0, + /* 47380 */ 0241,0366,0175,010,0301,01,0266,0120,0, + /* 47389 */ 0240,0366,0175,010,0301,01,0266,0110,0, + /* 47398 */ 0241,0366,0175,050,0301,01,0266,0120,0, + /* 47407 */ 0240,0366,0175,050,0301,01,0266,0110,0, + /* 47416 */ 0241,0366,0175,0110,0301,01,0266,0120,0, + /* 47425 */ 0240,0366,0175,0110,0301,01,0266,0110,0, + /* 47434 */ 0241,0366,0175,010,0301,01,0227,0120,0, + /* 47443 */ 0240,0366,0175,010,0301,01,0227,0110,0, + /* 47452 */ 0241,0366,0175,050,0301,01,0227,0120,0, + /* 47461 */ 0240,0366,0175,050,0301,01,0227,0110,0, + /* 47470 */ 0241,0366,0175,0110,0301,01,0227,0120,0, + /* 47479 */ 0240,0366,0175,0110,0301,01,0227,0110,0, + /* 47488 */ 0241,0366,0175,010,0301,01,0247,0120,0, + /* 47497 */ 0240,0366,0175,010,0301,01,0247,0110,0, + /* 47506 */ 0241,0366,0175,050,0301,01,0247,0120,0, + /* 47515 */ 0240,0366,0175,050,0301,01,0247,0110,0, + /* 47524 */ 0241,0366,0175,0110,0301,01,0247,0120,0, + /* 47533 */ 0240,0366,0175,0110,0301,01,0247,0110,0, + /* 47542 */ 0241,0366,0175,010,0301,01,0267,0120,0, + /* 47551 */ 0240,0366,0175,010,0301,01,0267,0110,0, + /* 47560 */ 0241,0366,0175,050,0301,01,0267,0120,0, + /* 47569 */ 0240,0366,0175,050,0301,01,0267,0110,0, + /* 47578 */ 0241,0366,0175,0110,0301,01,0267,0120,0, + /* 47587 */ 0240,0366,0175,0110,0301,01,0267,0110,0, + /* 47596 */ 0241,0366,0175,010,0301,01,0230,0120,0, + /* 47605 */ 0240,0366,0175,010,0301,01,0230,0110,0, + /* 47614 */ 0241,0366,0175,050,0301,01,0230,0120,0, + /* 47623 */ 0240,0366,0175,050,0301,01,0230,0110,0, + /* 47632 */ 0241,0366,0175,0110,0301,01,0230,0120,0, + /* 47641 */ 0240,0366,0175,0110,0301,01,0230,0110,0, + /* 47650 */ 0241,0366,0175,010,0301,01,0250,0120,0, + /* 47659 */ 0240,0366,0175,010,0301,01,0250,0110,0, + /* 47668 */ 0241,0366,0175,050,0301,01,0250,0120,0, + /* 47677 */ 0240,0366,0175,050,0301,01,0250,0110,0, + /* 47686 */ 0241,0366,0175,0110,0301,01,0250,0120,0, + /* 47695 */ 0240,0366,0175,0110,0301,01,0250,0110,0, + /* 47704 */ 0241,0366,0175,010,0301,01,0270,0120,0, + /* 47713 */ 0240,0366,0175,010,0301,01,0270,0110,0, + /* 47722 */ 0241,0366,0175,050,0301,01,0270,0120,0, + /* 47731 */ 0240,0366,0175,050,0301,01,0270,0110,0, + /* 47740 */ 0241,0366,0175,0110,0301,01,0270,0120,0, + /* 47749 */ 0240,0366,0175,0110,0301,01,0270,0110,0, + /* 47758 */ 0241,0366,0175,010,0301,01,0234,0120,0, + /* 47767 */ 0240,0366,0175,010,0301,01,0234,0110,0, + /* 47776 */ 0241,0366,0175,050,0301,01,0234,0120,0, + /* 47785 */ 0240,0366,0175,050,0301,01,0234,0110,0, + /* 47794 */ 0241,0366,0175,0110,0301,01,0234,0120,0, + /* 47803 */ 0240,0366,0175,0110,0301,01,0234,0110,0, + /* 47812 */ 0241,0366,0175,010,0301,01,0254,0120,0, + /* 47821 */ 0240,0366,0175,010,0301,01,0254,0110,0, + /* 47830 */ 0241,0366,0175,050,0301,01,0254,0120,0, + /* 47839 */ 0240,0366,0175,050,0301,01,0254,0110,0, + /* 47848 */ 0241,0366,0175,0110,0301,01,0254,0120,0, + /* 47857 */ 0240,0366,0175,0110,0301,01,0254,0110,0, + /* 47866 */ 0241,0366,0175,010,0301,01,0274,0120,0, + /* 47875 */ 0240,0366,0175,010,0301,01,0274,0110,0, + /* 47884 */ 0241,0366,0175,050,0301,01,0274,0120,0, + /* 47893 */ 0240,0366,0175,050,0301,01,0274,0110,0, + /* 47902 */ 0241,0366,0175,0110,0301,01,0274,0120,0, + /* 47911 */ 0240,0366,0175,0110,0301,01,0274,0110,0, + /* 47920 */ 0241,0366,0175,010,0306,01,0231,0120,0, + /* 47929 */ 0240,0366,0175,010,0306,01,0231,0110,0, + /* 47938 */ 0241,0366,0175,010,0306,01,0251,0120,0, + /* 47947 */ 0240,0366,0175,010,0306,01,0251,0110,0, + /* 47956 */ 0241,0366,0175,010,0306,01,0271,0120,0, + /* 47965 */ 0240,0366,0175,010,0306,01,0271,0110,0, + /* 47974 */ 0241,0366,0175,010,0306,01,0235,0120,0, + /* 47983 */ 0240,0366,0175,010,0306,01,0235,0110,0, + /* 47992 */ 0241,0366,0175,010,0306,01,0255,0120,0, + /* 48001 */ 0240,0366,0175,010,0306,01,0255,0110,0, + /* 48010 */ 0241,0366,0175,010,0306,01,0275,0120,0, + /* 48019 */ 0240,0366,0175,010,0306,01,0275,0110,0, + /* 48028 */ 0241,0366,0175,010,0301,01,0232,0120,0, + /* 48037 */ 0240,0366,0175,010,0301,01,0232,0110,0, + /* 48046 */ 0241,0366,0175,050,0301,01,0232,0120,0, + /* 48055 */ 0240,0366,0175,050,0301,01,0232,0110,0, + /* 48064 */ 0241,0366,0175,0110,0301,01,0232,0120,0, + /* 48073 */ 0240,0366,0175,0110,0301,01,0232,0110,0, + /* 48082 */ 0241,0366,0175,010,0301,01,0252,0120,0, + /* 48091 */ 0240,0366,0175,010,0301,01,0252,0110,0, + /* 48100 */ 0241,0366,0175,050,0301,01,0252,0120,0, + /* 48109 */ 0240,0366,0175,050,0301,01,0252,0110,0, + /* 48118 */ 0241,0366,0175,0110,0301,01,0252,0120,0, + /* 48127 */ 0240,0366,0175,0110,0301,01,0252,0110,0, + /* 48136 */ 0241,0366,0175,010,0301,01,0272,0120,0, + /* 48145 */ 0240,0366,0175,010,0301,01,0272,0110,0, + /* 48154 */ 0241,0366,0175,050,0301,01,0272,0120,0, + /* 48163 */ 0240,0366,0175,050,0301,01,0272,0110,0, + /* 48172 */ 0241,0366,0175,0110,0301,01,0272,0120,0, + /* 48181 */ 0240,0366,0175,0110,0301,01,0272,0110,0, + /* 48190 */ 0241,0366,0175,010,0301,01,0236,0120,0, + /* 48199 */ 0240,0366,0175,010,0301,01,0236,0110,0, + /* 48208 */ 0241,0366,0175,050,0301,01,0236,0120,0, + /* 48217 */ 0240,0366,0175,050,0301,01,0236,0110,0, + /* 48226 */ 0241,0366,0175,0110,0301,01,0236,0120,0, + /* 48235 */ 0240,0366,0175,0110,0301,01,0236,0110,0, + /* 48244 */ 0241,0366,0175,010,0301,01,0256,0120,0, + /* 48253 */ 0240,0366,0175,010,0301,01,0256,0110,0, + /* 48262 */ 0241,0366,0175,050,0301,01,0256,0120,0, + /* 48271 */ 0240,0366,0175,050,0301,01,0256,0110,0, + /* 48280 */ 0241,0366,0175,0110,0301,01,0256,0120,0, + /* 48289 */ 0240,0366,0175,0110,0301,01,0256,0110,0, + /* 48298 */ 0241,0366,0175,010,0301,01,0276,0120,0, + /* 48307 */ 0240,0366,0175,010,0301,01,0276,0110,0, + /* 48316 */ 0241,0366,0175,050,0301,01,0276,0120,0, + /* 48325 */ 0240,0366,0175,050,0301,01,0276,0110,0, + /* 48334 */ 0241,0366,0175,0110,0301,01,0276,0120,0, + /* 48343 */ 0240,0366,0175,0110,0301,01,0276,0110,0, + /* 48352 */ 0241,0366,0175,010,0306,01,0233,0120,0, + /* 48361 */ 0240,0366,0175,010,0306,01,0233,0110,0, + /* 48370 */ 0241,0366,0175,010,0306,01,0253,0120,0, + /* 48379 */ 0240,0366,0175,010,0306,01,0253,0110,0, + /* 48388 */ 0241,0366,0175,010,0306,01,0273,0120,0, + /* 48397 */ 0240,0366,0175,010,0306,01,0273,0110,0, + /* 48406 */ 0241,0366,0175,010,0306,01,0237,0120,0, + /* 48415 */ 0240,0366,0175,010,0306,01,0237,0110,0, + /* 48424 */ 0241,0366,0175,010,0306,01,0257,0120,0, + /* 48433 */ 0240,0366,0175,010,0306,01,0257,0110,0, + /* 48442 */ 0241,0366,0175,010,0306,01,0277,0120,0, + /* 48451 */ 0240,0366,0175,010,0306,01,0277,0110,0, + /* 48460 */ 0250,0366,0175,010,0301,01,0102,0110,0, + /* 48469 */ 0250,0366,0175,050,0301,01,0102,0110,0, + /* 48478 */ 0250,0366,0175,0110,0301,01,0102,0110,0, + /* 48487 */ 0241,0366,0175,010,0306,01,0103,0120,0, + /* 48496 */ 0241,0365,0174,010,0301,01,0137,0120,0, + /* 48505 */ 0240,0365,0174,010,0301,01,0137,0110,0, + /* 48514 */ 0241,0365,0174,050,0301,01,0137,0120,0, + /* 48523 */ 0240,0365,0174,050,0301,01,0137,0110,0, + /* 48532 */ 0241,0365,0174,0110,0301,01,0137,0120,0, + /* 48541 */ 0240,0365,0174,0110,0301,01,0137,0110,0, + /* 48550 */ 0241,0365,0176,010,0306,01,0137,0120,0, + /* 48559 */ 0241,0365,0174,010,0301,01,0135,0120,0, + /* 48568 */ 0240,0365,0174,010,0301,01,0135,0110,0, + /* 48577 */ 0241,0365,0174,050,0301,01,0135,0120,0, + /* 48586 */ 0240,0365,0174,050,0301,01,0135,0110,0, + /* 48595 */ 0241,0365,0174,0110,0301,01,0135,0120,0, + /* 48604 */ 0240,0365,0174,0110,0301,01,0135,0110,0, + /* 48613 */ 0241,0365,0176,010,0306,01,0135,0120,0, + /* 48622 */ 0250,0365,0176,010,0305,01,020,0110,0, + /* 48631 */ 0250,0365,0176,010,0305,01,021,0101,0, + /* 48640 */ 0241,0365,0176,010,0300,01,020,0120,0, + /* 48649 */ 0240,0365,0176,010,0300,01,020,0110,0, + /* 48658 */ 0241,0365,0176,010,0300,01,021,0120,0, + /* 48667 */ 0240,0365,0176,010,0300,01,021,0110,0, + /* 48676 */ 0250,0365,0175,010,0306,01,0156,0110,0, + /* 48685 */ 0250,0365,0175,010,0306,01,0176,0101,0, + /* 48694 */ 0241,0365,0174,010,0301,01,0131,0120,0, + /* 48703 */ 0240,0365,0174,010,0301,01,0131,0110,0, + /* 48712 */ 0241,0365,0174,050,0301,01,0131,0120,0, + /* 48721 */ 0240,0365,0174,050,0301,01,0131,0110,0, + /* 48730 */ 0241,0365,0174,0110,0301,01,0131,0120,0, + /* 48739 */ 0240,0365,0174,0110,0301,01,0131,0110,0, + /* 48748 */ 0241,0365,0176,010,0305,01,0131,0120,0, + /* 48757 */ 0240,0365,0176,010,0305,01,0131,0110,0, + /* 48766 */ 0250,0366,0175,010,0301,01,0114,0110,0, + /* 48775 */ 0250,0366,0175,050,0301,01,0114,0110,0, + /* 48784 */ 0250,0366,0175,0110,0301,01,0114,0110,0, + /* 48793 */ 0241,0366,0175,010,0306,01,0115,0120,0, + /* 48802 */ 0240,0366,0175,010,0306,01,0115,0110,0, + /* 48811 */ 0250,0366,0175,010,0301,01,0116,0110,0, + /* 48820 */ 0250,0366,0175,050,0301,01,0116,0110,0, + /* 48829 */ 0250,0366,0175,0110,0301,01,0116,0110,0, + /* 48838 */ 0241,0366,0175,010,0306,01,0117,0120,0, + /* 48847 */ 0240,0366,0175,010,0306,01,0117,0110,0, + /* 48856 */ 0241,0366,0175,010,0301,01,054,0120,0, + /* 48865 */ 0240,0366,0175,010,0301,01,054,0110,0, + /* 48874 */ 0241,0366,0175,050,0301,01,054,0120,0, + /* 48883 */ 0240,0366,0175,050,0301,01,054,0110,0, + /* 48892 */ 0241,0366,0175,0110,0301,01,054,0120,0, + /* 48901 */ 0240,0366,0175,0110,0301,01,054,0110,0, + /* 48910 */ 0241,0366,0175,010,0306,01,055,0120,0, + /* 48919 */ 0240,0366,0175,010,0306,01,055,0110,0, + /* 48928 */ 0250,0365,0174,010,0301,01,0121,0110,0, + /* 48937 */ 0250,0365,0174,050,0301,01,0121,0110,0, + /* 48946 */ 0250,0365,0174,0110,0301,01,0121,0110,0, + /* 48955 */ 0241,0365,0176,010,0306,01,0121,0120,0, + /* 48964 */ 0240,0365,0176,010,0306,01,0121,0110,0, + /* 48973 */ 0241,0365,0174,010,0301,01,0134,0120,0, + /* 48982 */ 0240,0365,0174,010,0301,01,0134,0110,0, + /* 48991 */ 0241,0365,0174,050,0301,01,0134,0120,0, + /* 49000 */ 0240,0365,0174,050,0301,01,0134,0110,0, + /* 49009 */ 0241,0365,0174,0110,0301,01,0134,0120,0, + /* 49018 */ 0240,0365,0174,0110,0301,01,0134,0110,0, + /* 49027 */ 0241,0365,0176,010,0305,01,0134,0120,0, + /* 49036 */ 0240,0365,0176,010,0305,01,0134,0110,0, + /* 49045 */ 0250,0365,0174,010,0306,01,056,0110,0, + /* 49054 */ 0240,0365,0176,010,0306,01,0135,0110,0, + /* 49063 */ 0241,0365,0174,010,0301,01,0127,0120,0, + /* 49072 */ 0240,0365,0174,010,0301,01,0127,0110,0, + /* 49081 */ 0241,0365,0174,050,0301,01,0127,0120,0, + /* 49090 */ 0240,0365,0174,050,0301,01,0127,0110,0, + /* 49099 */ 0241,0365,0174,0110,0301,01,0127,0120,0, + /* 49108 */ 0240,0365,0174,0110,0301,01,0127,0110,0, + /* 49117 */ 0241,0365,0176,010,0306,01,0127,0120,0, + /* 49126 */ 0240,0365,0176,010,0306,01,0127,0110,0, + /* 49135 */ 0241,0365,0175,010,0301,01,0130,0120,0, + /* 49144 */ 0241,0365,0175,050,0301,01,0130,0120,0, + /* 49153 */ 0241,0365,0175,0110,0301,01,0130,0120,0, + /* 49162 */ 0250,0365,0175,010,0306,01,057,0110,0, + /* 49171 */ 0241,0365,0175,010,0301,01,0136,0120,0, + /* 49180 */ 0241,0365,0175,050,0301,01,0136,0120,0, + /* 49189 */ 0241,0365,0175,0110,0301,01,0136,0120,0, + /* 49198 */ 0241,0366,0174,010,0301,01,0230,0120,0, + /* 49207 */ 0241,0366,0174,050,0301,01,0230,0120,0, + /* 49216 */ 0241,0366,0174,0110,0301,01,0230,0120,0, + /* 49225 */ 0241,0366,0174,010,0301,01,0250,0120,0, + /* 49234 */ 0241,0366,0174,050,0301,01,0250,0120,0, + /* 49243 */ 0241,0366,0174,0110,0301,01,0250,0120,0, + /* 49252 */ 0241,0366,0174,010,0301,01,0270,0120,0, + /* 49261 */ 0241,0366,0174,050,0301,01,0270,0120,0, + /* 49270 */ 0241,0366,0174,0110,0301,01,0270,0120,0, + /* 49279 */ 0241,0366,0174,010,0301,01,0232,0120,0, + /* 49288 */ 0241,0366,0174,050,0301,01,0232,0120,0, + /* 49297 */ 0241,0366,0174,0110,0301,01,0232,0120,0, + /* 49306 */ 0241,0366,0174,010,0301,01,0252,0120,0, + /* 49315 */ 0241,0366,0174,050,0301,01,0252,0120,0, + /* 49324 */ 0241,0366,0174,0110,0301,01,0252,0120,0, + /* 49333 */ 0241,0366,0174,010,0301,01,0272,0120,0, + /* 49342 */ 0241,0366,0174,050,0301,01,0272,0120,0, + /* 49351 */ 0241,0366,0174,0110,0301,01,0272,0120,0, + /* 49360 */ 0241,0366,0174,010,0301,01,0234,0120,0, + /* 49369 */ 0241,0366,0174,050,0301,01,0234,0120,0, + /* 49378 */ 0241,0366,0174,0110,0301,01,0234,0120,0, + /* 49387 */ 0241,0366,0174,010,0301,01,0254,0120,0, + /* 49396 */ 0241,0366,0174,050,0301,01,0254,0120,0, + /* 49405 */ 0241,0366,0174,0110,0301,01,0254,0120,0, + /* 49414 */ 0241,0366,0174,010,0301,01,0274,0120,0, + /* 49423 */ 0241,0366,0174,050,0301,01,0274,0120,0, + /* 49432 */ 0241,0366,0174,0110,0301,01,0274,0120,0, + /* 49441 */ 0241,0366,0174,010,0301,01,0236,0120,0, + /* 49450 */ 0241,0366,0174,050,0301,01,0236,0120,0, + /* 49459 */ 0241,0366,0174,0110,0301,01,0236,0120,0, + /* 49468 */ 0241,0366,0174,010,0301,01,0256,0120,0, + /* 49477 */ 0241,0366,0174,050,0301,01,0256,0120,0, + /* 49486 */ 0241,0366,0174,0110,0301,01,0256,0120,0, + /* 49495 */ 0241,0366,0174,010,0301,01,0276,0120,0, + /* 49504 */ 0241,0366,0174,050,0301,01,0276,0120,0, + /* 49513 */ 0241,0366,0174,0110,0301,01,0276,0120,0, + /* 49522 */ 0250,0366,0174,010,0301,01,0102,0110,0, + /* 49531 */ 0250,0366,0174,050,0301,01,0102,0110,0, + /* 49540 */ 0250,0366,0174,0110,0301,01,0102,0110,0, + /* 49549 */ 0241,0365,0175,010,0301,01,0137,0120,0, + /* 49558 */ 0241,0365,0175,050,0301,01,0137,0120,0, + /* 49567 */ 0241,0365,0175,0110,0301,01,0137,0120,0, + /* 49576 */ 0241,0365,0175,010,0301,01,0135,0120,0, + /* 49585 */ 0241,0365,0175,050,0301,01,0135,0120,0, + /* 49594 */ 0241,0365,0175,0110,0301,01,0135,0120,0, + /* 49603 */ 0241,0365,0175,010,0301,01,0131,0120,0, + /* 49612 */ 0241,0365,0175,050,0301,01,0131,0120,0, + /* 49621 */ 0241,0365,0175,0110,0301,01,0131,0120,0, + /* 49630 */ 0250,0366,0174,010,0301,01,0114,0110,0, + /* 49639 */ 0250,0366,0174,050,0301,01,0114,0110,0, + /* 49648 */ 0250,0366,0174,0110,0301,01,0114,0110,0, + /* 49657 */ 0250,0366,0174,010,0301,01,0116,0110,0, + /* 49666 */ 0250,0366,0174,050,0301,01,0116,0110,0, + /* 49675 */ 0250,0366,0174,0110,0301,01,0116,0110,0, + /* 49684 */ 0241,0366,0174,010,0301,01,054,0120,0, + /* 49693 */ 0241,0366,0174,050,0301,01,054,0120,0, + /* 49702 */ 0241,0366,0174,0110,0301,01,054,0120,0, + /* 49711 */ 0250,0365,0175,010,0301,01,0121,0110,0, + /* 49720 */ 0250,0365,0175,050,0301,01,0121,0110,0, + /* 49729 */ 0250,0365,0175,0110,0301,01,0121,0110,0, + /* 49738 */ 0241,0365,0175,010,0301,01,0134,0120,0, + /* 49747 */ 0241,0365,0175,050,0301,01,0134,0120,0, + /* 49756 */ 0241,0365,0175,0110,0301,01,0134,0120,0, + /* 49765 */ 0250,0361,0377,010,0306,01,057,0110,0, + /* 49774 */ 0250,0365,0176,010,0306,01,057,0110,0, + /* 49783 */ 0250,0361,0176,010,0306,01,057,0110,0, + /* 49792 */ 0250,0361,0377,010,0306,01,056,0110,0, + /* 49801 */ 0250,0365,0176,010,0306,01,056,0110,0, + /* 49810 */ 0250,0361,0176,010,0306,01,056,0110,0, + /* 49819 */ 0241,0362,0177,010,0301,01,0164,0120,0, + /* 49828 */ 0241,0362,0177,050,0301,01,0164,0120,0, + /* 49837 */ 0241,0362,0177,0110,0301,01,0164,0120,0, + /* 49846 */ 0241,0365,0177,010,0301,01,0164,0120,0, + /* 49855 */ 0241,0365,0177,050,0301,01,0164,0120,0, + /* 49864 */ 0241,0365,0177,0110,0301,01,0164,0120,0, + /* 49873 */ 0241,0365,0177,010,0301,01,030,0120,0, + /* 49882 */ 0241,0365,0177,050,0301,01,030,0120,0, + /* 49891 */ 0241,0365,0177,0110,0301,01,030,0120,0, + /* 49900 */ 0241,0365,0177,010,0301,01,033,0120,0, + /* 49909 */ 0241,0365,0177,050,0301,01,033,0120,0, + /* 49918 */ 0241,0365,0177,0110,0301,01,033,0120,0, + /* 49927 */ 0250,0362,0176,010,0301,01,0164,0110,0, + /* 49936 */ 0250,0362,0176,050,0301,01,0164,0110,0, + /* 49945 */ 0250,0362,0176,0110,0301,01,0164,0110,0, + /* 49954 */ 0250,0365,0176,010,0301,01,0164,0110,0, + /* 49963 */ 0250,0365,0176,050,0301,01,0164,0110,0, + /* 49972 */ 0250,0365,0176,0110,0301,01,0164,0110,0, + /* 49981 */ 0250,0365,0176,010,0301,01,030,0110,0, + /* 49990 */ 0250,0365,0176,050,0301,01,030,0110,0, + /* 49999 */ 0250,0365,0176,0110,0301,01,030,0110,0, + /* 50008 */ 0250,0365,0176,010,0301,01,033,0110,0, + /* 50017 */ 0250,0365,0176,050,0301,01,033,0110,0, + /* 50026 */ 0250,0365,0176,0110,0301,01,033,0110,0, + /* 50035 */ 0241,0362,0175,010,0301,01,0147,0120,0, + /* 50044 */ 0241,0362,0175,050,0301,01,0147,0120,0, + /* 50053 */ 0241,0362,0175,0110,0301,01,0147,0120,0, + /* 50062 */ 0241,0362,0174,010,0301,01,0164,0120,0, + /* 50071 */ 0241,0362,0174,050,0301,01,0164,0120,0, + /* 50080 */ 0241,0362,0174,0110,0301,01,0164,0120,0, + /* 50089 */ 0241,0365,0174,010,0301,01,0164,0120,0, + /* 50098 */ 0241,0365,0174,050,0301,01,0164,0120,0, + /* 50107 */ 0241,0365,0174,0110,0301,01,0164,0120,0, + /* 50116 */ 0241,0365,0174,010,0301,01,030,0120,0, + /* 50125 */ 0241,0365,0174,050,0301,01,030,0120,0, + /* 50134 */ 0241,0365,0174,0110,0301,01,030,0120,0, + /* 50143 */ 0241,0365,0174,010,0301,01,033,0120,0, + /* 50152 */ 0241,0365,0174,050,0301,01,033,0120,0, + /* 50161 */ 0241,0365,0174,0110,0301,01,033,0120,0, + /* 50170 */ 0250,0365,0177,010,0302,01,036,0110,0, + /* 50179 */ 0250,0365,0177,050,0302,01,036,0110,0, + /* 50188 */ 0250,0365,0177,0110,0302,01,036,0110,0, + /* 50197 */ 0241,0362,0174,010,0301,01,0122,0120,0, + /* 50206 */ 0241,0362,0174,050,0301,01,0122,0120,0, + /* 50215 */ 0241,0362,0174,0110,0301,01,0122,0120,0, + /* 50224 */ 0241,0362,0177,010,0301,01,0120,0120,0, + /* 50233 */ 0241,0362,0177,050,0301,01,0120,0120,0, + /* 50242 */ 0241,0362,0177,0110,0301,01,0120,0120,0, + /* 50251 */ 0241,0362,0177,010,0301,01,0121,0120,0, + /* 50260 */ 0241,0362,0177,050,0301,01,0121,0120,0, + /* 50269 */ 0241,0362,0177,0110,0301,01,0121,0120,0, + /* 50278 */ 0241,0362,0176,010,0301,01,0120,0120,0, + /* 50287 */ 0241,0362,0176,050,0301,01,0120,0120,0, + /* 50296 */ 0241,0362,0176,0110,0301,01,0120,0120,0, + /* 50305 */ 0241,0362,0176,010,0301,01,0121,0120,0, + /* 50314 */ 0241,0362,0176,050,0301,01,0121,0120,0, + /* 50323 */ 0241,0362,0176,0110,0301,01,0121,0120,0, + /* 50332 */ 0241,0362,0174,010,0301,01,0120,0120,0, + /* 50341 */ 0241,0362,0174,050,0301,01,0120,0120,0, + /* 50350 */ 0241,0362,0174,0110,0301,01,0120,0120,0, + /* 50359 */ 0241,0362,0174,010,0301,01,0121,0120,0, + /* 50368 */ 0241,0362,0174,050,0301,01,0121,0120,0, + /* 50377 */ 0241,0362,0174,0110,0301,01,0121,0120,0, + /* 50386 */ 0241,0362,0176,010,0301,01,0322,0120,0, + /* 50395 */ 0241,0362,0176,050,0301,01,0322,0120,0, + /* 50404 */ 0241,0362,0176,0110,0301,01,0322,0120,0, + /* 50413 */ 0241,0362,0176,010,0301,01,0323,0120,0, + /* 50422 */ 0241,0362,0176,050,0301,01,0323,0120,0, + /* 50431 */ 0241,0362,0176,0110,0301,01,0323,0120,0, + /* 50440 */ 0241,0362,0175,010,0301,01,0322,0120,0, + /* 50449 */ 0241,0362,0175,050,0301,01,0322,0120,0, + /* 50458 */ 0241,0362,0175,0110,0301,01,0322,0120,0, + /* 50467 */ 0241,0362,0175,010,0301,01,0323,0120,0, + /* 50476 */ 0241,0362,0175,050,0301,01,0323,0120,0, + /* 50485 */ 0241,0362,0175,0110,0301,01,0323,0120,0, + /* 50494 */ 0241,0362,0174,010,0301,01,0322,0120,0, + /* 50503 */ 0241,0362,0174,050,0301,01,0322,0120,0, + /* 50512 */ 0241,0362,0174,0110,0301,01,0322,0120,0, + /* 50521 */ 0241,0362,0174,010,0301,01,0323,0120,0, + /* 50530 */ 0241,0362,0174,050,0301,01,0323,0120,0, + /* 50539 */ 0241,0362,0174,0110,0301,01,0323,0120,0, + /* 50548 */ 0250,0365,0177,010,0301,01,0151,0110,0, + /* 50557 */ 0250,0365,0177,050,0301,01,0151,0110,0, + /* 50566 */ 0250,0365,0177,0110,0301,01,0151,0110,0, + /* 50575 */ 0250,0365,0177,010,0301,01,0153,0110,0, + /* 50584 */ 0250,0365,0177,050,0301,01,0153,0110,0, + /* 50593 */ 0250,0365,0177,0110,0301,01,0153,0110,0, + /* 50602 */ 0250,0365,0177,010,0301,01,0150,0110,0, + /* 50611 */ 0250,0365,0177,050,0301,01,0150,0110,0, + /* 50620 */ 0250,0365,0177,0110,0301,01,0150,0110,0, + /* 50629 */ 0250,0365,0177,010,0301,01,0152,0110,0, + /* 50638 */ 0250,0365,0177,050,0301,01,0152,0110,0, + /* 50647 */ 0250,0365,0177,0110,0301,01,0152,0110,0, + /* 50656 */ 0250,0365,0374,010,0301,01,0155,0110,0, + /* 50665 */ 0250,0365,0374,050,0301,01,0155,0110,0, + /* 50674 */ 0250,0365,0374,0110,0301,01,0155,0110,0, + /* 50683 */ 0250,0365,0375,010,0301,01,0155,0110,0, + /* 50692 */ 0250,0365,0375,050,0301,01,0155,0110,0, + /* 50701 */ 0250,0365,0375,0110,0301,01,0155,0110,0, + /* 50710 */ 0250,0365,0374,010,0301,01,0154,0110,0, + /* 50719 */ 0250,0365,0374,050,0301,01,0154,0110,0, + /* 50728 */ 0250,0365,0374,0110,0301,01,0154,0110,0, + /* 50737 */ 0250,0365,0375,010,0301,01,0154,0110,0, + /* 50746 */ 0250,0365,0375,050,0301,01,0154,0110,0, + /* 50755 */ 0250,0365,0375,0110,0301,01,0154,0110,0, + /* 50764 */ 0250,0365,0174,010,0301,01,0151,0110,0, + /* 50773 */ 0250,0365,0174,050,0301,01,0151,0110,0, + /* 50782 */ 0250,0365,0174,0110,0301,01,0151,0110,0, + /* 50791 */ 0250,0365,0174,010,0301,01,0153,0110,0, + /* 50800 */ 0250,0365,0174,050,0301,01,0153,0110,0, + /* 50809 */ 0250,0365,0174,0110,0301,01,0153,0110,0, + /* 50818 */ 0250,0365,0174,010,0301,01,0150,0110,0, + /* 50827 */ 0250,0365,0174,050,0301,01,0150,0110,0, + /* 50836 */ 0250,0365,0174,0110,0301,01,0150,0110,0, + /* 50845 */ 0250,0365,0174,010,0301,01,0152,0110,0, + /* 50854 */ 0250,0365,0174,050,0301,01,0152,0110,0, + /* 50863 */ 0250,0365,0174,0110,0301,01,0152,0110,0, + /* 50872 */ 0250,0365,0174,010,0301,01,0155,0110,0, + /* 50881 */ 0250,0365,0174,050,0301,01,0155,0110,0, + /* 50890 */ 0250,0365,0174,0110,0301,01,0155,0110,0, + /* 50899 */ 0250,0365,0175,010,0301,01,0151,0110,0, + /* 50908 */ 0250,0365,0175,050,0301,01,0151,0110,0, + /* 50917 */ 0250,0365,0175,0110,0301,01,0151,0110,0, + /* 50926 */ 0250,0365,0175,010,0301,01,0153,0110,0, + /* 50935 */ 0250,0365,0175,050,0301,01,0153,0110,0, + /* 50944 */ 0250,0365,0175,0110,0301,01,0153,0110,0, + /* 50953 */ 0250,0365,0175,010,0301,01,0150,0110,0, + /* 50962 */ 0250,0365,0175,050,0301,01,0150,0110,0, + /* 50971 */ 0250,0365,0175,0110,0301,01,0150,0110,0, + /* 50980 */ 0250,0365,0175,010,0301,01,0152,0110,0, + /* 50989 */ 0250,0365,0175,050,0301,01,0152,0110,0, + /* 50998 */ 0250,0365,0175,0110,0301,01,0152,0110,0, + /* 51007 */ 0250,0365,0175,010,0302,01,0155,0110,0, + /* 51016 */ 0250,0365,0175,050,0302,01,0155,0110,0, + /* 51025 */ 0250,0365,0175,0110,0302,01,0155,0110,0, + /* 51034 */ 0250,0365,0174,010,0301,01,0154,0110,0, + /* 51043 */ 0250,0365,0174,050,0301,01,0154,0110,0, + /* 51052 */ 0250,0365,0174,0110,0301,01,0154,0110,0, + /* 51061 */ 0250,0365,0175,010,0302,01,0154,0110,0, + /* 51070 */ 0250,0365,0175,050,0302,01,0154,0110,0, + /* 51079 */ 0250,0365,0175,0110,0302,01,0154,0110,0, + /* 51088 */ 0250,0365,0177,010,0306,01,0155,0110,0, + /* 51097 */ 0250,0365,0377,010,0306,01,0155,0110,0, + /* 51106 */ 0250,0365,0177,010,0306,01,0154,0110,0, + /* 51115 */ 0250,0365,0377,010,0306,01,0154,0110,0, + /* 51124 */ 0250,0365,0176,010,0306,01,0155,0110,0, + /* 51133 */ 0250,0365,0376,010,0306,01,0155,0110,0, + /* 51142 */ 0250,0365,0176,010,0306,01,0154,0110,0, + /* 51151 */ 0250,0365,0376,010,0306,01,0154,0110,0, + /* 51160 */ 0250,0361,0176,010,0306,01,0176,0110,0, + /* 51169 */ 0250,0361,0175,010,0306,01,0326,0101,0, + /* 51178 */ 0250,0365,0176,010,0306,01,0156,0110,0, + /* 51187 */ 0250,0365,0176,010,0306,01,0176,0101,0, + /* 51196 */ 0241,0366,0174,050,0301,01,0200,0120,0, + /* 51205 */ 0241,0366,0174,0110,0301,01,0200,0120,0, + /* 51214 */ 0241,0366,0374,050,0301,01,0200,0120,0, + /* 51223 */ 0241,0366,0374,0110,0301,01,0200,0120,0, + /* 51232 */ 0250,0366,0174,010,0301,01,0201,0110,0, + /* 51241 */ 0250,0366,0174,050,0301,01,0201,0110,0, + /* 51250 */ 0250,0366,0174,0110,0301,01,0201,0110,0, + /* 51259 */ 0270,03,03,01,0360,0110,022,0, + /* 51267 */ 0270,03,0203,01,0360,0110,022,0, + /* 51275 */ 0333,0364,0317,0356,01,0366,0110,0, + /* 51283 */ 0333,0364,0324,0356,01,0366,0110,0, + /* 51291 */ 0270,0112,0,01,020,0110,042,0, + /* 51299 */ 0270,0112,0,01,020,0100,041,0, + /* 51307 */ 0270,0112,0200,01,020,0110,042,0, + /* 51315 */ 0270,0112,0200,01,020,0100,041,0, + /* 51323 */ 0333,0364,0321,0355,01,0307,0207,0, + /* 51331 */ 0333,0364,0324,0355,01,0307,0207,0, + /* 51339 */ 0270,07,03,01,0366,0200,041,0, + /* 51347 */ 0270,07,02,01,0366,0210,040,0, + /* 51355 */ 0270,07,03,01,0370,0200,041,0, + /* 51363 */ 0270,07,02,01,0370,0210,040,0, + /* 51371 */ 0327,0342,01,0310,030,01,0,0, + /* 51379 */ 0327,0320,01,0310,030,01,0,0, + /* 51387 */ 0327,0321,01,0310,030,01,0,0, + /* 51395 */ 0327,0324,01,0310,030,01,0,0, + /* 51403 */ 0360,0355,01,0302,0110,01,0,0, + /* 51411 */ 0333,0355,01,0302,0110,01,0,0, + /* 51419 */ 0360,0355,01,0302,0110,01,02,0, + /* 51427 */ 0333,0355,01,0302,0110,01,02,0, + /* 51435 */ 0360,0355,01,0302,0110,01,01,0, + /* 51443 */ 0333,0355,01,0302,0110,01,01,0, + /* 51451 */ 0360,0355,01,0302,0110,01,04,0, + /* 51459 */ 0333,0355,01,0302,0110,01,04,0, + /* 51467 */ 0360,0355,01,0302,0110,01,06,0, + /* 51475 */ 0333,0355,01,0302,0110,01,06,0, + /* 51483 */ 0360,0355,01,0302,0110,01,05,0, + /* 51491 */ 0333,0355,01,0302,0110,01,05,0, + /* 51499 */ 0360,0355,01,0302,0110,01,07,0, + /* 51507 */ 0333,0355,01,0302,0110,01,07,0, + /* 51515 */ 0360,0355,01,0302,0110,01,03,0, + /* 51523 */ 0333,0355,01,0302,0110,01,03,0, + /* 51531 */ 0361,0355,01,0302,0110,01,0,0, + /* 51539 */ 0332,0355,01,0302,0110,01,0,0, + /* 51547 */ 0361,0355,01,0302,0110,01,02,0, + /* 51555 */ 0332,0355,01,0302,0110,01,02,0, + /* 51563 */ 0361,0355,01,0302,0110,01,01,0, + /* 51571 */ 0332,0355,01,0302,0110,01,01,0, + /* 51579 */ 0361,0355,01,0302,0110,01,04,0, + /* 51587 */ 0332,0355,01,0302,0110,01,04,0, + /* 51595 */ 0361,0355,01,0302,0110,01,06,0, + /* 51603 */ 0332,0355,01,0302,0110,01,06,0, + /* 51611 */ 0361,0355,01,0302,0110,01,05,0, + /* 51619 */ 0332,0355,01,0302,0110,01,05,0, + /* 51627 */ 0361,0355,01,0302,0110,01,07,0, + /* 51635 */ 0332,0355,01,0302,0110,01,07,0, + /* 51643 */ 0361,0355,01,0302,0110,01,03,0, + /* 51651 */ 0332,0355,01,0302,0110,01,03,0, + /* 51659 */ 0361,0355,01,0170,0200,025,026,0, + /* 51667 */ 0332,0355,01,0170,0110,026,027,0, + /* 51675 */ 0324,0361,0357,01,027,0101,026,0, + /* 51683 */ 0323,0361,0357,01,024,0101,026,0, + /* 51691 */ 0317,0361,0357,01,026,0101,026,0, + /* 51699 */ 0324,0361,0357,01,026,0101,026,0, + /* 51707 */ 0324,0361,0357,01,025,0101,026,0, + /* 51715 */ 0325,0361,0357,01,040,0110,026,0, + /* 51723 */ 0317,0361,0357,01,042,0110,026,0, + /* 51731 */ 0324,0361,0357,01,042,0110,026,0, + /* 51739 */ 0270,03,01,01,0337,0110,022,0, + /* 51747 */ 0261,03,01,01,015,0120,023,0, + /* 51755 */ 0260,03,01,01,015,0110,022,0, + /* 51763 */ 0261,03,05,01,015,0120,023,0, + /* 51771 */ 0260,03,05,01,015,0110,022,0, + /* 51779 */ 0261,03,01,01,014,0120,023,0, + /* 51787 */ 0260,03,01,01,014,0110,022,0, + /* 51795 */ 0261,03,05,01,014,0120,023,0, + /* 51803 */ 0260,03,05,01,014,0110,022,0, + /* 51811 */ 0261,03,01,01,0113,0120,0177,0, + /* 51819 */ 0260,03,01,01,0113,0110,0176,0, + /* 51827 */ 0261,03,05,01,0113,0120,0177,0, + /* 51835 */ 0260,03,05,01,0113,0110,0176,0, + /* 51843 */ 0261,03,01,01,0112,0120,0177,0, + /* 51851 */ 0260,03,01,01,0112,0110,0176,0, + /* 51859 */ 0261,03,05,01,0112,0120,0177,0, + /* 51867 */ 0260,03,05,01,0112,0110,0176,0, + /* 51875 */ 0261,01,01,01,0302,0120,023,0, + /* 51883 */ 0260,01,01,01,0302,0110,022,0, + /* 51891 */ 0261,01,05,01,0302,0120,023,0, + /* 51899 */ 0260,01,05,01,0302,0110,022,0, + /* 51907 */ 0261,01,0,01,0302,0120,023,0, + /* 51915 */ 0260,01,0,01,0302,0110,022,0, + /* 51923 */ 0261,01,04,01,0302,0120,023,0, + /* 51931 */ 0260,01,04,01,0302,0110,022,0, + /* 51939 */ 0261,01,03,01,0302,0120,023,0, + /* 51947 */ 0260,01,03,01,0302,0110,022,0, + /* 51955 */ 0261,01,02,01,0302,0120,023,0, + /* 51963 */ 0260,01,02,01,0302,0110,022,0, + /* 51971 */ 0261,03,01,01,0101,0120,023,0, + /* 51979 */ 0260,03,01,01,0101,0110,022,0, + /* 51987 */ 0261,03,01,01,0100,0120,023,0, + /* 51995 */ 0260,03,01,01,0100,0110,022,0, + /* 52003 */ 0261,03,05,01,0100,0120,023,0, + /* 52011 */ 0260,03,05,01,0100,0110,022,0, + /* 52019 */ 0270,03,05,01,031,0101,022,0, + /* 52027 */ 0270,03,01,01,027,0101,022,0, + /* 52035 */ 0261,03,05,01,030,0120,023,0, + /* 52043 */ 0260,03,05,01,030,0110,022,0, + /* 52051 */ 0261,03,01,01,041,0120,023,0, + /* 52059 */ 0260,03,01,01,041,0110,022,0, + /* 52067 */ 0261,03,01,01,0102,0120,023,0, + /* 52075 */ 0260,03,01,01,0102,0110,022,0, + /* 52083 */ 0261,03,01,01,017,0120,023,0, + /* 52091 */ 0260,03,01,01,017,0110,022,0, + /* 52099 */ 0261,03,01,01,0114,0120,0177,0, + /* 52107 */ 0260,03,01,01,0114,0110,0176,0, + /* 52115 */ 0261,03,01,01,016,0120,023,0, + /* 52123 */ 0260,03,01,01,016,0110,022,0, + /* 52131 */ 0270,03,01,01,0141,0110,022,0, + /* 52139 */ 0270,03,01,01,0140,0110,022,0, + /* 52147 */ 0270,03,01,01,0143,0110,022,0, + /* 52155 */ 0270,03,01,01,0142,0110,022,0, + /* 52163 */ 0270,03,01,01,05,0110,022,0, + /* 52171 */ 0270,03,05,01,05,0110,022,0, + /* 52179 */ 0270,03,01,01,04,0110,022,0, + /* 52187 */ 0270,03,05,01,04,0110,022,0, + /* 52195 */ 0261,03,05,01,06,0120,023,0, + /* 52203 */ 0260,03,05,01,06,0110,022,0, + /* 52211 */ 0270,03,01,01,024,0101,022,0, + /* 52219 */ 0270,01,01,01,0305,0110,022,0, + /* 52227 */ 0270,03,01,01,025,0101,022,0, + /* 52235 */ 0270,03,01,01,026,0101,022,0, + /* 52243 */ 0270,03,0201,01,026,0101,022,0, + /* 52251 */ 0261,03,01,01,040,0120,023,0, + /* 52259 */ 0260,03,01,01,040,0110,022,0, + /* 52267 */ 0261,01,01,01,0304,0120,023,0, + /* 52275 */ 0260,01,01,01,0304,0110,022,0, + /* 52283 */ 0261,03,01,01,042,0120,023,0, + /* 52291 */ 0260,03,01,01,042,0110,022,0, + /* 52299 */ 0261,03,0201,01,042,0120,023,0, + /* 52307 */ 0260,03,0201,01,042,0110,022,0, + /* 52315 */ 0270,01,01,01,0160,0110,022,0, + /* 52323 */ 0270,01,02,01,0160,0110,022,0, + /* 52331 */ 0270,01,03,01,0160,0110,022,0, + /* 52339 */ 0260,01,01,01,0163,0217,022,0, + /* 52347 */ 0260,01,01,01,0163,0207,021,0, + /* 52355 */ 0260,01,01,01,0163,0213,022,0, + /* 52363 */ 0260,01,01,01,0163,0203,021,0, + /* 52371 */ 0260,01,01,01,0161,0216,022,0, + /* 52379 */ 0260,01,01,01,0161,0206,021,0, + /* 52387 */ 0260,01,01,01,0162,0216,022,0, + /* 52395 */ 0260,01,01,01,0162,0206,021,0, + /* 52403 */ 0260,01,01,01,0163,0216,022,0, + /* 52411 */ 0260,01,01,01,0163,0206,021,0, + /* 52419 */ 0260,01,01,01,0161,0214,022,0, + /* 52427 */ 0260,01,01,01,0161,0204,021,0, + /* 52435 */ 0260,01,01,01,0162,0214,022,0, + /* 52443 */ 0260,01,01,01,0162,0204,021,0, + /* 52451 */ 0260,01,01,01,0161,0212,022,0, + /* 52459 */ 0260,01,01,01,0161,0202,021,0, + /* 52467 */ 0260,01,01,01,0162,0212,022,0, + /* 52475 */ 0260,01,01,01,0162,0202,021,0, + /* 52483 */ 0260,01,01,01,0163,0212,022,0, + /* 52491 */ 0260,01,01,01,0163,0202,021,0, + /* 52499 */ 0270,03,01,01,011,0110,022,0, + /* 52507 */ 0270,03,05,01,011,0110,022,0, + /* 52515 */ 0270,03,01,01,010,0110,022,0, + /* 52523 */ 0270,03,05,01,010,0110,022,0, + /* 52531 */ 0261,03,01,01,013,0120,023,0, + /* 52539 */ 0260,03,01,01,013,0110,022,0, + /* 52547 */ 0261,03,01,01,012,0120,023,0, + /* 52555 */ 0260,03,01,01,012,0110,022,0, + /* 52563 */ 0261,01,01,01,0306,0120,023,0, + /* 52571 */ 0260,01,01,01,0306,0110,022,0, + /* 52579 */ 0261,01,05,01,0306,0120,023,0, + /* 52587 */ 0260,01,05,01,0306,0110,022,0, + /* 52595 */ 0261,01,0,01,0306,0120,023,0, + /* 52603 */ 0260,01,0,01,0306,0110,022,0, + /* 52611 */ 0261,01,04,01,0306,0120,023,0, + /* 52619 */ 0260,01,04,01,0306,0110,022,0, + /* 52627 */ 0361,0357,01,0104,0110,01,0,0, + /* 52635 */ 0361,0357,01,0104,0110,01,01,0, + /* 52643 */ 0361,0357,01,0104,0110,01,020,0, + /* 52651 */ 0361,0357,01,0104,0110,01,021,0, + /* 52659 */ 0261,03,01,01,0104,0120,023,0, + /* 52667 */ 0260,03,01,01,0104,0110,022,0, + /* 52675 */ 0261,03,05,01,0104,0120,023,0, + /* 52683 */ 0260,03,05,01,0104,0110,022,0, + /* 52691 */ 0270,03,05,01,035,0101,022,0, + /* 52699 */ 0270,03,01,01,035,0101,022,0, + /* 52707 */ 0260,0112,0,01,022,0211,042,0, + /* 52715 */ 0260,0112,0200,01,022,0211,042,0, + /* 52723 */ 0260,0112,0,01,022,0210,042,0, + /* 52731 */ 0260,0112,0200,01,022,0210,042,0, + /* 52739 */ 0261,03,01,01,0151,0120,0177,0, + /* 52747 */ 0260,03,01,01,0151,0110,0176,0, + /* 52755 */ 0261,03,05,01,0151,0120,0177,0, + /* 52763 */ 0260,03,05,01,0151,0110,0176,0, + /* 52771 */ 0261,03,0201,01,0151,0130,0176,0, + /* 52779 */ 0260,03,0201,01,0151,0120,0175,0, + /* 52787 */ 0261,03,0205,01,0151,0130,0176,0, + /* 52795 */ 0260,03,0205,01,0151,0120,0175,0, + /* 52803 */ 0261,03,01,01,0150,0120,0177,0, + /* 52811 */ 0260,03,01,01,0150,0110,0176,0, + /* 52819 */ 0261,03,05,01,0150,0120,0177,0, + /* 52827 */ 0260,03,05,01,0150,0110,0176,0, + /* 52835 */ 0261,03,0201,01,0150,0130,0176,0, + /* 52843 */ 0260,03,0201,01,0150,0120,0175,0, + /* 52851 */ 0261,03,0205,01,0150,0130,0176,0, + /* 52859 */ 0260,03,0205,01,0150,0120,0175,0, + /* 52867 */ 0261,03,01,01,0153,0120,0177,0, + /* 52875 */ 0260,03,01,01,0153,0110,0176,0, + /* 52883 */ 0261,03,0201,01,0153,0130,0176,0, + /* 52891 */ 0260,03,0201,01,0153,0120,0175,0, + /* 52899 */ 0261,03,01,01,0152,0120,0177,0, + /* 52907 */ 0260,03,01,01,0152,0110,0176,0, + /* 52915 */ 0261,03,0201,01,0152,0130,0176,0, + /* 52923 */ 0260,03,0201,01,0152,0120,0175,0, + /* 52931 */ 0261,03,01,01,0135,0120,0177,0, + /* 52939 */ 0260,03,01,01,0135,0110,0176,0, + /* 52947 */ 0261,03,05,01,0135,0120,0177,0, + /* 52955 */ 0260,03,05,01,0135,0110,0176,0, + /* 52963 */ 0261,03,0201,01,0135,0130,0176,0, + /* 52971 */ 0260,03,0201,01,0135,0120,0175,0, + /* 52979 */ 0261,03,0205,01,0135,0130,0176,0, + /* 52987 */ 0260,03,0205,01,0135,0120,0175,0, + /* 52995 */ 0261,03,01,01,0134,0120,0177,0, + /* 53003 */ 0260,03,01,01,0134,0110,0176,0, + /* 53011 */ 0261,03,05,01,0134,0120,0177,0, + /* 53019 */ 0260,03,05,01,0134,0110,0176,0, + /* 53027 */ 0261,03,0201,01,0134,0130,0176,0, + /* 53035 */ 0260,03,0201,01,0134,0120,0175,0, + /* 53043 */ 0261,03,0205,01,0134,0130,0176,0, + /* 53051 */ 0260,03,0205,01,0134,0120,0175,0, + /* 53059 */ 0261,03,01,01,0137,0120,0177,0, + /* 53067 */ 0260,03,01,01,0137,0110,0176,0, + /* 53075 */ 0261,03,05,01,0137,0120,0177,0, + /* 53083 */ 0260,03,05,01,0137,0110,0176,0, + /* 53091 */ 0261,03,0201,01,0137,0130,0176,0, + /* 53099 */ 0260,03,0201,01,0137,0120,0175,0, + /* 53107 */ 0261,03,0205,01,0137,0130,0176,0, + /* 53115 */ 0260,03,0205,01,0137,0120,0175,0, + /* 53123 */ 0261,03,01,01,0136,0120,0177,0, + /* 53131 */ 0260,03,01,01,0136,0110,0176,0, + /* 53139 */ 0261,03,05,01,0136,0120,0177,0, + /* 53147 */ 0260,03,05,01,0136,0110,0176,0, + /* 53155 */ 0261,03,0201,01,0136,0130,0176,0, + /* 53163 */ 0260,03,0201,01,0136,0120,0175,0, + /* 53171 */ 0261,03,0205,01,0136,0130,0176,0, + /* 53179 */ 0260,03,0205,01,0136,0120,0175,0, + /* 53187 */ 0261,03,01,01,0155,0120,0177,0, + /* 53195 */ 0260,03,01,01,0155,0110,0176,0, + /* 53203 */ 0261,03,05,01,0155,0120,0177,0, + /* 53211 */ 0260,03,05,01,0155,0110,0176,0, + /* 53219 */ 0261,03,0201,01,0155,0130,0176,0, + /* 53227 */ 0260,03,0201,01,0155,0120,0175,0, + /* 53235 */ 0261,03,0205,01,0155,0130,0176,0, + /* 53243 */ 0260,03,0205,01,0155,0120,0175,0, + /* 53251 */ 0261,03,01,01,0154,0120,0177,0, + /* 53259 */ 0260,03,01,01,0154,0110,0176,0, + /* 53267 */ 0261,03,05,01,0154,0120,0177,0, + /* 53275 */ 0260,03,05,01,0154,0110,0176,0, + /* 53283 */ 0261,03,0201,01,0154,0130,0176,0, + /* 53291 */ 0260,03,0201,01,0154,0120,0175,0, + /* 53299 */ 0261,03,0205,01,0154,0130,0176,0, + /* 53307 */ 0260,03,0205,01,0154,0120,0175,0, + /* 53315 */ 0261,03,01,01,0157,0120,0177,0, + /* 53323 */ 0260,03,01,01,0157,0110,0176,0, + /* 53331 */ 0261,03,0201,01,0157,0130,0176,0, + /* 53339 */ 0260,03,0201,01,0157,0120,0175,0, + /* 53347 */ 0261,03,01,01,0156,0120,0177,0, + /* 53355 */ 0260,03,01,01,0156,0110,0176,0, + /* 53363 */ 0261,03,0201,01,0156,0130,0176,0, + /* 53371 */ 0260,03,0201,01,0156,0120,0175,0, + /* 53379 */ 0261,03,01,01,0171,0120,0177,0, + /* 53387 */ 0260,03,01,01,0171,0110,0176,0, + /* 53395 */ 0261,03,05,01,0171,0120,0177,0, + /* 53403 */ 0260,03,05,01,0171,0110,0176,0, + /* 53411 */ 0261,03,0201,01,0171,0130,0176,0, + /* 53419 */ 0260,03,0201,01,0171,0120,0175,0, + /* 53427 */ 0261,03,0205,01,0171,0130,0176,0, + /* 53435 */ 0260,03,0205,01,0171,0120,0175,0, + /* 53443 */ 0261,03,01,01,0170,0120,0177,0, + /* 53451 */ 0260,03,01,01,0170,0110,0176,0, + /* 53459 */ 0261,03,05,01,0170,0120,0177,0, + /* 53467 */ 0260,03,05,01,0170,0110,0176,0, + /* 53475 */ 0261,03,0201,01,0170,0130,0176,0, + /* 53483 */ 0260,03,0201,01,0170,0120,0175,0, + /* 53491 */ 0261,03,0205,01,0170,0130,0176,0, + /* 53499 */ 0260,03,0205,01,0170,0120,0175,0, + /* 53507 */ 0261,03,01,01,0173,0120,0177,0, + /* 53515 */ 0260,03,01,01,0173,0110,0176,0, + /* 53523 */ 0261,03,0201,01,0173,0130,0176,0, + /* 53531 */ 0260,03,0201,01,0173,0120,0175,0, + /* 53539 */ 0261,03,01,01,0172,0120,0177,0, + /* 53547 */ 0260,03,01,01,0172,0110,0176,0, + /* 53555 */ 0261,03,0201,01,0172,0130,0176,0, + /* 53563 */ 0260,03,0201,01,0172,0120,0175,0, + /* 53571 */ 0261,03,01,01,0175,0120,0177,0, + /* 53579 */ 0260,03,01,01,0175,0110,0176,0, + /* 53587 */ 0261,03,05,01,0175,0120,0177,0, + /* 53595 */ 0260,03,05,01,0175,0110,0176,0, + /* 53603 */ 0261,03,0201,01,0175,0130,0176,0, + /* 53611 */ 0260,03,0201,01,0175,0120,0175,0, + /* 53619 */ 0261,03,0205,01,0175,0130,0176,0, + /* 53627 */ 0260,03,0205,01,0175,0120,0175,0, + /* 53635 */ 0261,03,01,01,0174,0120,0177,0, + /* 53643 */ 0260,03,01,01,0174,0110,0176,0, + /* 53651 */ 0261,03,05,01,0174,0120,0177,0, + /* 53659 */ 0260,03,05,01,0174,0110,0176,0, + /* 53667 */ 0261,03,0201,01,0174,0130,0176,0, + /* 53675 */ 0260,03,0201,01,0174,0120,0175,0, + /* 53683 */ 0261,03,0205,01,0174,0130,0176,0, + /* 53691 */ 0260,03,0205,01,0174,0120,0175,0, + /* 53699 */ 0261,03,01,01,0177,0120,0177,0, + /* 53707 */ 0260,03,01,01,0177,0110,0176,0, + /* 53715 */ 0261,03,0201,01,0177,0130,0176,0, + /* 53723 */ 0260,03,0201,01,0177,0120,0175,0, + /* 53731 */ 0261,03,01,01,0176,0120,0177,0, + /* 53739 */ 0260,03,01,01,0176,0110,0176,0, + /* 53747 */ 0261,03,0201,01,0176,0130,0176,0, + /* 53755 */ 0260,03,0201,01,0176,0120,0175,0, + /* 53763 */ 0261,0110,0,01,0242,0120,0177,0, + /* 53771 */ 0260,0110,0,01,0242,0110,0176,0, + /* 53779 */ 0261,0110,04,01,0242,0120,0177,0, + /* 53787 */ 0260,0110,04,01,0242,0110,0176,0, + /* 53795 */ 0261,0110,0200,01,0242,0130,0176,0, + /* 53803 */ 0260,0110,0200,01,0242,0120,0175,0, + /* 53811 */ 0261,0110,0204,01,0242,0130,0176,0, + /* 53819 */ 0260,0110,0204,01,0242,0120,0175,0, + /* 53827 */ 0261,0110,0,01,0314,0120,023,0, + /* 53835 */ 0260,0110,0,01,0314,0110,022,0, + /* 53843 */ 0261,0110,0,01,0316,0120,023,0, + /* 53851 */ 0260,0110,0,01,0316,0110,022,0, + /* 53859 */ 0261,0110,0,01,0317,0120,023,0, + /* 53867 */ 0260,0110,0,01,0317,0110,022,0, + /* 53875 */ 0261,0110,0,01,0354,0120,023,0, + /* 53883 */ 0260,0110,0,01,0354,0110,022,0, + /* 53891 */ 0261,0110,0,01,0356,0120,023,0, + /* 53899 */ 0260,0110,0,01,0356,0110,022,0, + /* 53907 */ 0261,0110,0,01,0357,0120,023,0, + /* 53915 */ 0260,0110,0,01,0357,0110,022,0, + /* 53923 */ 0261,0110,0,01,0355,0120,023,0, + /* 53931 */ 0260,0110,0,01,0355,0110,022,0, + /* 53939 */ 0261,0110,0,01,0315,0120,023,0, + /* 53947 */ 0260,0110,0,01,0315,0110,022,0, + /* 53955 */ 0261,0110,0,01,0236,0120,0177,0, + /* 53963 */ 0260,0110,0,01,0236,0110,0176,0, + /* 53971 */ 0261,0110,0,01,0237,0120,0177,0, + /* 53979 */ 0260,0110,0,01,0237,0110,0176,0, + /* 53987 */ 0261,0110,0,01,0227,0120,0177,0, + /* 53995 */ 0260,0110,0,01,0227,0110,0176,0, + /* 54003 */ 0261,0110,0,01,0216,0120,0177,0, + /* 54011 */ 0260,0110,0,01,0216,0110,0176,0, + /* 54019 */ 0261,0110,0,01,0217,0120,0177,0, + /* 54027 */ 0260,0110,0,01,0217,0110,0176,0, + /* 54035 */ 0261,0110,0,01,0207,0120,0177,0, + /* 54043 */ 0260,0110,0,01,0207,0110,0176,0, + /* 54051 */ 0261,0110,0,01,0206,0120,0177,0, + /* 54059 */ 0260,0110,0,01,0206,0110,0176,0, + /* 54067 */ 0261,0110,0,01,0205,0120,0177,0, + /* 54075 */ 0260,0110,0,01,0205,0110,0176,0, + /* 54083 */ 0261,0110,0,01,0226,0120,0177,0, + /* 54091 */ 0260,0110,0,01,0226,0110,0176,0, + /* 54099 */ 0261,0110,0,01,0225,0120,0177,0, + /* 54107 */ 0260,0110,0,01,0225,0110,0176,0, + /* 54115 */ 0261,0110,0,01,0246,0120,0177,0, + /* 54123 */ 0260,0110,0,01,0246,0110,0176,0, + /* 54131 */ 0261,0110,0,01,0266,0120,0177,0, + /* 54139 */ 0260,0110,0,01,0266,0110,0176,0, + /* 54147 */ 0261,0110,0200,01,0243,0130,0176,0, + /* 54155 */ 0260,0110,0200,01,0243,0120,0175,0, + /* 54163 */ 0261,0110,0,01,0243,0120,0177,0, + /* 54171 */ 0260,0110,0,01,0243,0110,0176,0, + /* 54179 */ 0270,0110,0,01,0300,0110,022,0, + /* 54187 */ 0270,0110,0,01,0300,0100,021,0, + /* 54195 */ 0270,0110,0,01,0302,0110,022,0, + /* 54203 */ 0270,0110,0,01,0302,0100,021,0, + /* 54211 */ 0270,0110,0,01,0303,0110,022,0, + /* 54219 */ 0270,0110,0,01,0303,0100,021,0, + /* 54227 */ 0270,0110,0,01,0301,0110,022,0, + /* 54235 */ 0270,0110,0,01,0301,0100,021,0, + /* 54243 */ 0261,03,05,01,0102,0120,023,0, + /* 54251 */ 0260,03,05,01,0102,0110,022,0, + /* 54259 */ 0261,03,05,01,017,0120,023,0, + /* 54267 */ 0260,03,05,01,017,0110,022,0, + /* 54275 */ 0261,03,05,01,0114,0120,0177,0, + /* 54283 */ 0260,03,05,01,0114,0110,0176,0, + /* 54291 */ 0261,03,05,01,016,0120,023,0, + /* 54299 */ 0260,03,05,01,016,0110,022,0, + /* 54307 */ 0270,01,05,01,0160,0110,022,0, + /* 54315 */ 0270,01,06,01,0160,0110,022,0, + /* 54323 */ 0270,01,07,01,0160,0110,022,0, + /* 54331 */ 0260,01,05,01,0163,0217,022,0, + /* 54339 */ 0260,01,05,01,0163,0207,021,0, + /* 54347 */ 0260,01,05,01,0161,0216,022,0, + /* 54355 */ 0260,01,05,01,0161,0206,021,0, + /* 54363 */ 0260,01,05,01,0162,0216,022,0, + /* 54371 */ 0260,01,05,01,0162,0206,021,0, + /* 54379 */ 0260,01,05,01,0163,0216,022,0, + /* 54387 */ 0260,01,05,01,0163,0206,021,0, + /* 54395 */ 0260,01,05,01,0161,0214,022,0, + /* 54403 */ 0260,01,05,01,0161,0204,021,0, + /* 54411 */ 0260,01,05,01,0162,0214,022,0, + /* 54419 */ 0260,01,05,01,0162,0204,021,0, + /* 54427 */ 0260,01,05,01,0163,0213,022,0, + /* 54435 */ 0260,01,05,01,0163,0203,021,0, + /* 54443 */ 0260,01,05,01,0161,0212,022,0, + /* 54451 */ 0260,01,05,01,0161,0202,021,0, + /* 54459 */ 0260,01,05,01,0162,0212,022,0, + /* 54467 */ 0260,01,05,01,0162,0202,021,0, + /* 54475 */ 0260,01,05,01,0163,0212,022,0, + /* 54483 */ 0260,01,05,01,0163,0202,021,0, + /* 54491 */ 0261,03,01,01,02,0120,023,0, + /* 54499 */ 0260,03,01,01,02,0110,022,0, + /* 54507 */ 0261,03,05,01,02,0120,023,0, + /* 54515 */ 0260,03,05,01,02,0110,022,0, + /* 54523 */ 0270,03,0205,01,01,0110,022,0, + /* 54531 */ 0270,03,0205,01,0,0110,022,0, + /* 54539 */ 0261,03,05,01,0106,0120,023,0, + /* 54547 */ 0260,03,05,01,0106,0110,022,0, + /* 54555 */ 0270,03,05,01,071,0101,022,0, + /* 54563 */ 0261,03,05,01,070,0120,023,0, + /* 54571 */ 0260,03,05,01,070,0110,022,0, + /* 54579 */ 0374,0262,02,0201,01,0222,0110,0, + /* 54587 */ 0374,0262,02,0201,01,0223,0110,0, + /* 54595 */ 0374,0262,02,0205,01,0222,0110,0, + /* 54603 */ 0375,0262,02,0205,01,0223,0110,0, + /* 54611 */ 0374,0262,02,01,01,0222,0110,0, + /* 54619 */ 0374,0262,02,01,01,0223,0110,0, + /* 54627 */ 0375,0262,02,05,01,0222,0110,0, + /* 54635 */ 0375,0262,02,05,01,0223,0110,0, + /* 54643 */ 0374,0262,02,01,01,0220,0110,0, + /* 54651 */ 0374,0262,02,01,01,0221,0110,0, + /* 54659 */ 0375,0262,02,05,01,0220,0110,0, + /* 54667 */ 0375,0262,02,05,01,0221,0110,0, + /* 54675 */ 0374,0262,02,0201,01,0220,0110,0, + /* 54683 */ 0374,0262,02,0201,01,0221,0110,0, + /* 54691 */ 0374,0262,02,0205,01,0220,0110,0, + /* 54699 */ 0375,0262,02,0205,01,0221,0110,0, + /* 54707 */ 0261,03,01,01,0336,0120,023,0, + /* 54715 */ 0270,03,01,01,062,0110,022,0, + /* 54723 */ 0270,03,0201,01,062,0110,022,0, + /* 54731 */ 0270,03,01,01,063,0110,022,0, + /* 54739 */ 0270,03,0201,01,063,0110,022,0, + /* 54747 */ 0270,03,01,01,060,0110,022,0, + /* 54755 */ 0270,03,0201,01,060,0110,022,0, + /* 54763 */ 0270,03,01,01,061,0110,022,0, + /* 54771 */ 0270,03,0201,01,061,0110,022,0, + /* 54779 */ 0261,03,0201,01,0317,0120,023,0, + /* 54787 */ 0260,03,0201,01,0317,0110,022,0, + /* 54795 */ 0261,03,0205,01,0317,0120,023,0, + /* 54803 */ 0260,03,0205,01,0317,0110,022,0, + /* 54811 */ 0261,03,0201,01,0316,0120,023,0, + /* 54819 */ 0260,03,0201,01,0316,0110,022,0, + /* 54827 */ 0261,03,0205,01,0316,0120,023,0, + /* 54835 */ 0260,03,0205,01,0316,0110,022,0, + /* 54843 */ 0270,02,03,01,0111,0171,0300,0, + /* 54851 */ 0271,0320,01,0307,0200,031,0, + /* 54858 */ 0271,0321,01,0307,0200,041,0, + /* 54865 */ 0271,0324,01,0307,0200,0255,0, + /* 54872 */ 0320,0331,0356,01,0213,0110,0, + /* 54879 */ 0321,0331,0356,01,0213,0110,0, + /* 54886 */ 0324,0331,0356,01,0213,0110,0, + /* 54893 */ 0273,0320,01,0203,0200,0275,0, + /* 54900 */ 0273,0320,01,0201,0200,031,0, + /* 54907 */ 0273,0321,01,0203,0200,0275,0, + /* 54914 */ 0273,0321,01,0201,0200,041,0, + /* 54921 */ 0273,0324,01,0203,0200,0275,0, + /* 54928 */ 0273,0324,01,0201,0200,0255,0, + /* 54935 */ 0273,0320,01,0203,0201,0275,0, + /* 54942 */ 0273,0320,01,0201,0201,031,0, + /* 54949 */ 0273,0321,01,0203,0201,0275,0, + /* 54956 */ 0273,0321,01,0201,0201,041,0, + /* 54963 */ 0273,0324,01,0203,0201,0275,0, + /* 54970 */ 0273,0324,01,0201,0201,0255,0, + /* 54977 */ 0273,0320,01,0203,0202,0275,0, + /* 54984 */ 0273,0320,01,0201,0202,031,0, + /* 54991 */ 0273,0321,01,0203,0202,0275,0, + /* 54998 */ 0273,0321,01,0201,0202,041,0, + /* 55005 */ 0273,0324,01,0203,0202,0275,0, + /* 55012 */ 0273,0324,01,0201,0202,0255,0, + /* 55019 */ 0273,0320,01,0203,0203,0275,0, + /* 55026 */ 0273,0320,01,0201,0203,031,0, + /* 55033 */ 0273,0321,01,0203,0203,0275,0, + /* 55040 */ 0273,0321,01,0201,0203,041,0, + /* 55047 */ 0273,0324,01,0203,0203,0275,0, + /* 55054 */ 0273,0324,01,0201,0203,0255,0, + /* 55061 */ 0273,0320,01,0203,0204,0275,0, + /* 55068 */ 0273,0320,01,0201,0204,031,0, + /* 55075 */ 0273,0321,01,0203,0204,0275,0, + /* 55082 */ 0273,0321,01,0201,0204,041,0, + /* 55089 */ 0273,0324,01,0203,0204,0275,0, + /* 55096 */ 0273,0324,01,0201,0204,0255,0, + /* 55103 */ 0273,0320,01,0203,0205,0275,0, + /* 55110 */ 0273,0320,01,0201,0205,031,0, + /* 55117 */ 0273,0321,01,0203,0205,0275,0, + /* 55124 */ 0273,0321,01,0201,0205,041,0, + /* 55131 */ 0273,0324,01,0203,0205,0275,0, + /* 55138 */ 0273,0324,01,0201,0205,0255,0, + /* 55145 */ 0273,0320,01,0203,0206,0275,0, + /* 55152 */ 0273,0320,01,0201,0206,031,0, + /* 55159 */ 0273,0321,01,0203,0206,0275,0, + /* 55166 */ 0273,0321,01,0201,0206,041,0, + /* 55173 */ 0273,0324,01,0203,0206,0275,0, + /* 55180 */ 0273,0324,01,0201,0206,0255,0, + /* 55187 */ 0273,0320,01,0203,0207,0275,0, + /* 55194 */ 0273,0320,01,0201,0207,031,0, + /* 55201 */ 0273,0321,01,0203,0207,0275,0, + /* 55208 */ 0273,0321,01,0201,0207,041,0, + /* 55215 */ 0273,0324,01,0203,0207,0275,0, + /* 55222 */ 0273,0324,01,0201,0207,0255,0, + /* 55229 */ 0262,02,01,01,0367,0110,0, + /* 55236 */ 0261,02,01,01,0367,0100,0, + /* 55243 */ 0262,02,02,01,0367,0110,0, + /* 55250 */ 0261,02,02,01,0367,0100,0, + /* 55257 */ 0262,02,03,01,0367,0110,0, + /* 55264 */ 0261,02,03,01,0367,0100,0, + /* 55271 */ 0262,02,0201,01,0367,0110,0, + /* 55278 */ 0261,02,0201,01,0367,0100,0, + /* 55285 */ 0262,02,0202,01,0367,0110,0, + /* 55292 */ 0261,02,0202,01,0367,0100,0, + /* 55299 */ 0262,02,0203,01,0367,0110,0, + /* 55306 */ 0261,02,0203,01,0367,0100,0, + /* 55313 */ 0261,02,03,01,0366,0120,0, + /* 55320 */ 0260,02,03,01,0366,0110,0, + /* 55327 */ 0261,02,0203,01,0366,0120,0, + /* 55334 */ 0260,02,0203,01,0366,0110,0, + /* 55341 */ 0361,0317,0356,01,0366,0110,0, + /* 55348 */ 0361,0324,0356,01,0366,0110,0, + /* 55355 */ 0320,0355,01,0244,0101,026,0, + /* 55362 */ 0321,0355,01,0244,0101,026,0, + /* 55369 */ 0324,0355,01,0244,0101,026,0, + /* 55376 */ 0320,0355,01,0254,0101,026,0, + /* 55383 */ 0321,0355,01,0254,0101,026,0, + /* 55390 */ 0324,0355,01,0254,0101,026,0, + /* 55397 */ 0320,0355,01,0272,0204,025,0, + /* 55404 */ 0321,0355,01,0272,0204,025,0, + /* 55411 */ 0324,0355,01,0272,0204,025,0, + /* 55418 */ 0320,0355,01,0272,0207,025,0, + /* 55425 */ 0321,0355,01,0272,0207,025,0, + /* 55432 */ 0324,0355,01,0272,0207,025,0, + /* 55439 */ 0320,0355,01,0272,0206,025,0, + /* 55446 */ 0321,0355,01,0272,0206,025,0, + /* 55453 */ 0324,0355,01,0272,0206,025,0, + /* 55460 */ 0320,0355,01,0272,0205,025,0, + /* 55467 */ 0321,0355,01,0272,0205,025,0, + /* 55474 */ 0324,0355,01,0272,0205,025,0, + /* 55481 */ 0320,0326,0355,01,0274,0110,0, + /* 55488 */ 0321,0326,0355,01,0274,0110,0, + /* 55495 */ 0324,0326,0355,01,0274,0110,0, + /* 55502 */ 0320,0326,0355,01,0275,0110,0, + /* 55509 */ 0321,0326,0355,01,0275,0110,0, + /* 55516 */ 0324,0326,0355,01,0275,0110,0, + /* 55523 */ 0320,0333,0355,01,0275,0110,0, + /* 55530 */ 0321,0333,0355,01,0275,0110,0, + /* 55537 */ 0324,0333,0355,01,0275,0110,0, + /* 55544 */ 0320,0333,0355,01,0274,0110,0, + /* 55551 */ 0321,0333,0355,01,0274,0110,0, + /* 55558 */ 0324,0333,0355,01,0274,0110,0, + /* 55565 */ 0261,02,0,01,0362,0120,0, + /* 55572 */ 0260,02,0,01,0362,0110,0, + /* 55579 */ 0261,02,0200,01,0362,0120,0, + /* 55586 */ 0260,02,0200,01,0362,0110,0, + /* 55593 */ 0262,02,0,01,0367,0110,0, + /* 55600 */ 0261,02,0,01,0367,0100,0, + /* 55607 */ 0262,02,0200,01,0367,0110,0, + /* 55614 */ 0261,02,0200,01,0367,0100,0, + /* 55621 */ 0260,02,0,01,0363,0212,0, + /* 55628 */ 0260,02,0200,01,0363,0212,0, + /* 55635 */ 0260,02,0,01,0363,0211,0, + /* 55642 */ 0260,02,0200,01,0363,0211,0, + /* 55649 */ 0260,02,0,01,0363,0213,0, + /* 55656 */ 0260,02,0200,01,0363,0213,0, + /* 55663 */ 0262,02,0,01,0365,0110,0, + /* 55670 */ 0261,02,0,01,0365,0100,0, + /* 55677 */ 0262,02,0200,01,0365,0110,0, + /* 55684 */ 0261,02,0200,01,0365,0100,0, + /* 55691 */ 0261,02,03,01,0365,0120,0, + /* 55698 */ 0260,02,03,01,0365,0110,0, + /* 55705 */ 0261,02,0203,01,0365,0120,0, + /* 55712 */ 0260,02,0203,01,0365,0110,0, + /* 55719 */ 0261,02,02,01,0365,0120,0, + /* 55726 */ 0260,02,02,01,0365,0110,0, + /* 55733 */ 0261,02,0202,01,0365,0120,0, + /* 55740 */ 0260,02,0202,01,0365,0110,0, + /* 55747 */ 0260,0111,0,01,02,0216,0, + /* 55754 */ 0260,0111,0200,01,02,0216,0, + /* 55761 */ 0260,0111,0,01,01,0215,0, + /* 55768 */ 0260,0111,0200,01,01,0215,0, + /* 55775 */ 0260,0111,0,01,01,0216,0, + /* 55782 */ 0260,0111,0200,01,01,0216,0, + /* 55789 */ 0260,0111,0,01,01,0211,0, + /* 55796 */ 0260,0111,0200,01,01,0211,0, + /* 55803 */ 0260,0111,0,01,01,0212,0, + /* 55810 */ 0260,0111,0200,01,01,0212,0, + /* 55817 */ 0260,0111,0,01,02,0211,0, + /* 55824 */ 0260,0111,0200,01,02,0211,0, + /* 55831 */ 0260,0111,0,01,01,0213,0, + /* 55838 */ 0260,0111,0200,01,01,0213,0, + /* 55845 */ 0260,0111,0,01,01,0214,0, + /* 55852 */ 0260,0111,0200,01,01,0214,0, + /* 55859 */ 0260,0111,0,01,01,0217,0, + /* 55866 */ 0260,0111,0200,01,01,0217,0, + /* 55873 */ 0320,0331,0356,01,0360,0110,0, + /* 55880 */ 0321,0331,0356,01,0360,0110,0, + /* 55887 */ 0324,0331,0356,01,0360,0110,0, + /* 55894 */ 0320,0331,0356,01,0361,0101,0, + /* 55901 */ 0321,0331,0356,01,0361,0101,0, + /* 55908 */ 0324,0331,0356,01,0361,0101,0, + /* 55915 */ 0273,0320,0355,01,0261,0101,0, + /* 55922 */ 0273,0321,0355,01,0261,0101,0, + /* 55929 */ 0273,0324,0355,01,0261,0101,0, + /* 55936 */ 0273,0317,0355,01,0307,0201,0, + /* 55943 */ 0273,0320,0355,01,0301,0101,0, + /* 55950 */ 0273,0321,0355,01,0301,0101,0, + /* 55957 */ 0273,0324,0355,01,0301,0101,0, + /* 55964 */ 0313,0360,0350,01,0241,054,0, + /* 55971 */ 0371,0327,0320,01,0353,050,0, + /* 55978 */ 0371,0327,0321,01,0353,050,0, + /* 55985 */ 0371,0327,0324,01,0353,050,0, + /* 55992 */ 0370,0327,0320,01,0167,050,0, + /* 55999 */ 0370,0327,0320,01,0163,050,0, + /* 56006 */ 0370,0327,0320,01,0162,050,0, + /* 56013 */ 0370,0327,0320,01,0166,050,0, + /* 56020 */ 0370,0327,0320,01,0164,050,0, + /* 56027 */ 0370,0327,0320,01,0177,050,0, + /* 56034 */ 0370,0327,0320,01,0175,050,0, + /* 56041 */ 0370,0327,0320,01,0174,050,0, + /* 56048 */ 0370,0327,0320,01,0176,050,0, + /* 56055 */ 0370,0327,0320,01,0165,050,0, + /* 56062 */ 0370,0327,0320,01,0161,050,0, + /* 56069 */ 0370,0327,0320,01,0173,050,0, + /* 56076 */ 0370,0327,0320,01,0171,050,0, + /* 56083 */ 0370,0327,0320,01,0160,050,0, + /* 56090 */ 0370,0327,0320,01,0172,050,0, + /* 56097 */ 0370,0327,0320,01,0170,050,0, + /* 56104 */ 0370,0327,0321,01,0167,050,0, + /* 56111 */ 0370,0327,0321,01,0163,050,0, + /* 56118 */ 0370,0327,0321,01,0162,050,0, + /* 56125 */ 0370,0327,0321,01,0166,050,0, + /* 56132 */ 0370,0327,0321,01,0164,050,0, + /* 56139 */ 0370,0327,0321,01,0177,050,0, + /* 56146 */ 0370,0327,0321,01,0175,050,0, + /* 56153 */ 0370,0327,0321,01,0174,050,0, + /* 56160 */ 0370,0327,0321,01,0176,050,0, + /* 56167 */ 0370,0327,0321,01,0165,050,0, + /* 56174 */ 0370,0327,0321,01,0161,050,0, + /* 56181 */ 0370,0327,0321,01,0173,050,0, + /* 56188 */ 0370,0327,0321,01,0171,050,0, + /* 56195 */ 0370,0327,0321,01,0160,050,0, + /* 56202 */ 0370,0327,0321,01,0172,050,0, + /* 56209 */ 0370,0327,0321,01,0170,050,0, + /* 56216 */ 0370,0327,0324,01,0167,050,0, + /* 56223 */ 0370,0327,0324,01,0163,050,0, + /* 56230 */ 0370,0327,0324,01,0162,050,0, + /* 56237 */ 0370,0327,0324,01,0166,050,0, + /* 56244 */ 0370,0327,0324,01,0164,050,0, + /* 56251 */ 0370,0327,0324,01,0177,050,0, + /* 56258 */ 0370,0327,0324,01,0175,050,0, + /* 56265 */ 0370,0327,0324,01,0174,050,0, + /* 56272 */ 0370,0327,0324,01,0176,050,0, + /* 56279 */ 0370,0327,0324,01,0165,050,0, + /* 56286 */ 0370,0327,0324,01,0161,050,0, + /* 56293 */ 0370,0327,0324,01,0173,050,0, + /* 56300 */ 0370,0327,0324,01,0171,050,0, + /* 56307 */ 0370,0327,0324,01,0160,050,0, + /* 56314 */ 0370,0327,0324,01,0172,050,0, + /* 56321 */ 0370,0327,0324,01,0170,050,0, + /* 56328 */ 0327,0320,0355,01,0207,064,0, + /* 56335 */ 0327,0320,0355,01,0203,064,0, + /* 56342 */ 0327,0320,0355,01,0202,064,0, + /* 56349 */ 0327,0320,0355,01,0206,064,0, + /* 56356 */ 0327,0320,0355,01,0204,064,0, + /* 56363 */ 0327,0320,0355,01,0217,064,0, + /* 56370 */ 0327,0320,0355,01,0215,064,0, + /* 56377 */ 0327,0320,0355,01,0214,064,0, + /* 56384 */ 0327,0320,0355,01,0216,064,0, + /* 56391 */ 0327,0320,0355,01,0205,064,0, + /* 56398 */ 0327,0320,0355,01,0201,064,0, + /* 56405 */ 0327,0320,0355,01,0213,064,0, + /* 56412 */ 0327,0320,0355,01,0211,064,0, + /* 56419 */ 0327,0320,0355,01,0200,064,0, + /* 56426 */ 0327,0320,0355,01,0212,064,0, + /* 56433 */ 0327,0320,0355,01,0210,064,0, + /* 56440 */ 0327,0321,0355,01,0207,064,0, + /* 56447 */ 0327,0321,0355,01,0203,064,0, + /* 56454 */ 0327,0321,0355,01,0202,064,0, + /* 56461 */ 0327,0321,0355,01,0206,064,0, + /* 56468 */ 0327,0321,0355,01,0204,064,0, + /* 56475 */ 0327,0321,0355,01,0217,064,0, + /* 56482 */ 0327,0321,0355,01,0215,064,0, + /* 56489 */ 0327,0321,0355,01,0214,064,0, + /* 56496 */ 0327,0321,0355,01,0216,064,0, + /* 56503 */ 0327,0321,0355,01,0205,064,0, + /* 56510 */ 0327,0321,0355,01,0201,064,0, + /* 56517 */ 0327,0321,0355,01,0213,064,0, + /* 56524 */ 0327,0321,0355,01,0211,064,0, + /* 56531 */ 0327,0321,0355,01,0200,064,0, + /* 56538 */ 0327,0321,0355,01,0212,064,0, + /* 56545 */ 0327,0321,0355,01,0210,064,0, + /* 56552 */ 0327,0324,0355,01,0207,064,0, + /* 56559 */ 0327,0324,0355,01,0203,064,0, + /* 56566 */ 0327,0324,0355,01,0202,064,0, + /* 56573 */ 0327,0324,0355,01,0206,064,0, + /* 56580 */ 0327,0324,0355,01,0204,064,0, + /* 56587 */ 0327,0324,0355,01,0217,064,0, + /* 56594 */ 0327,0324,0355,01,0215,064,0, + /* 56601 */ 0327,0324,0355,01,0214,064,0, + /* 56608 */ 0327,0324,0355,01,0216,064,0, + /* 56615 */ 0327,0324,0355,01,0205,064,0, + /* 56622 */ 0327,0324,0355,01,0201,064,0, + /* 56629 */ 0327,0324,0355,01,0213,064,0, + /* 56636 */ 0327,0324,0355,01,0211,064,0, + /* 56643 */ 0327,0324,0355,01,0200,064,0, + /* 56650 */ 0327,0324,0355,01,0212,064,0, + /* 56657 */ 0327,0324,0355,01,0210,064,0, + /* 56664 */ 01,0166,0373,01,0351,064,0, + /* 56671 */ 01,0162,0373,01,0351,064,0, + /* 56678 */ 01,0163,0373,01,0351,064,0, + /* 56685 */ 01,0167,0373,01,0351,064,0, + /* 56692 */ 01,0165,0373,01,0351,064,0, + /* 56699 */ 01,0176,0373,01,0351,064,0, + /* 56706 */ 01,0174,0373,01,0351,064,0, + /* 56713 */ 01,0175,0373,01,0351,064,0, + /* 56720 */ 01,0177,0373,01,0351,064,0, + /* 56727 */ 01,0164,0373,01,0351,064,0, + /* 56734 */ 01,0160,0373,01,0351,064,0, + /* 56741 */ 01,0172,0373,01,0351,064,0, + /* 56748 */ 01,0170,0373,01,0351,064,0, + /* 56755 */ 01,0161,0373,01,0351,064,0, + /* 56762 */ 01,0173,0373,01,0351,064,0, + /* 56769 */ 01,0171,0373,01,0351,064,0, + /* 56776 */ 0310,0327,0320,01,0343,050,0, + /* 56783 */ 0311,0327,0320,01,0343,050,0, + /* 56790 */ 0310,0327,0321,01,0343,050,0, + /* 56797 */ 0311,0327,0321,01,0343,050,0, + /* 56804 */ 0311,0327,0324,01,0343,050,0, + /* 56811 */ 0313,0327,0324,01,0343,050,0, + /* 56818 */ 0312,0327,0320,01,0342,050,0, + /* 56825 */ 0310,0327,0320,01,0342,050,0, + /* 56832 */ 0311,0327,0320,01,0342,050,0, + /* 56839 */ 0312,0327,0321,01,0342,050,0, + /* 56846 */ 0310,0327,0321,01,0342,050,0, + /* 56853 */ 0311,0327,0321,01,0342,050,0, + /* 56860 */ 0312,0327,0324,01,0342,050,0, + /* 56867 */ 0311,0327,0324,01,0342,050,0, + /* 56874 */ 0313,0327,0324,01,0342,050,0, + /* 56881 */ 0312,0327,0320,01,0341,050,0, + /* 56888 */ 0310,0327,0320,01,0341,050,0, + /* 56895 */ 0311,0327,0320,01,0341,050,0, + /* 56902 */ 0312,0327,0321,01,0341,050,0, + /* 56909 */ 0310,0327,0321,01,0341,050,0, + /* 56916 */ 0311,0327,0321,01,0341,050,0, + /* 56923 */ 0312,0327,0324,01,0341,050,0, + /* 56930 */ 0311,0327,0324,01,0341,050,0, + /* 56937 */ 0313,0327,0324,01,0341,050,0, + /* 56944 */ 0312,0327,0320,01,0340,050,0, + /* 56951 */ 0310,0327,0320,01,0340,050,0, + /* 56958 */ 0311,0327,0320,01,0340,050,0, + /* 56965 */ 0312,0327,0321,01,0340,050,0, + /* 56972 */ 0310,0327,0321,01,0340,050,0, + /* 56979 */ 0311,0327,0321,01,0340,050,0, + /* 56986 */ 0312,0327,0324,01,0340,050,0, + /* 56993 */ 0311,0327,0324,01,0340,050,0, + /* 57000 */ 0313,0327,0324,01,0340,050,0, + /* 57007 */ 0331,0320,0355,01,0270,030,0, + /* 57014 */ 0331,0321,0355,01,0270,040,0, + /* 57021 */ 0331,0324,0355,01,0270,054,0, + /* 57028 */ 0331,0320,0355,01,0,0206,0, + /* 57035 */ 0331,0321,0355,01,0,0206,0, + /* 57042 */ 0331,0324,0355,01,0,0206,0, + /* 57049 */ 0332,0355,02,070,0370,0101,0, + /* 57056 */ 0333,0355,02,070,0370,0110,0, + /* 57063 */ 0360,0320,0355,01,021,0101,0, + /* 57070 */ 0360,0321,0355,01,021,0101,0, + /* 57077 */ 0360,0320,0355,01,023,0110,0, + /* 57084 */ 0360,0321,0355,01,023,0110,0, + /* 57091 */ 0310,0333,0355,01,0256,0206,0, + /* 57098 */ 0311,0333,0355,01,0256,0206,0, + /* 57105 */ 0313,0333,0355,01,0256,0206,0, + /* 57112 */ 0317,0333,0355,01,0256,0200,0, + /* 57119 */ 0324,0333,0355,01,0256,0200,0, + /* 57126 */ 0317,0333,0355,01,0256,0201,0, + /* 57133 */ 0324,0333,0355,01,0256,0201,0, + /* 57140 */ 0317,0333,0355,01,0256,0202,0, + /* 57147 */ 0324,0333,0355,01,0256,0202,0, + /* 57154 */ 0317,0333,0355,01,0256,0203,0, + /* 57161 */ 0324,0333,0355,01,0256,0203,0, + /* 57168 */ 0337,0321,0355,01,02,0110,0, + /* 57175 */ 0337,0324,0355,01,02,0110,0, + /* 57182 */ 0337,0321,0355,01,03,0110,0, + /* 57189 */ 0337,0324,0355,01,03,0110,0, + /* 57196 */ 0327,0320,0355,01,01,0202,0, + /* 57203 */ 0327,0321,0355,01,01,0202,0, + /* 57210 */ 0327,0324,0355,01,01,0202,0, + /* 57217 */ 0327,0320,0355,01,01,0203,0, + /* 57224 */ 0327,0321,0355,01,01,0203,0, + /* 57231 */ 0327,0324,0355,01,01,0203,0, + /* 57238 */ 0336,0320,0355,01,0,0202,0, + /* 57245 */ 0336,0321,0355,01,0,0202,0, + /* 57252 */ 0336,0324,0355,01,0,0202,0, + /* 57259 */ 0336,0320,0355,01,0,0203,0, + /* 57266 */ 0336,0321,0355,01,0,0203,0, + /* 57273 */ 0336,0324,0355,01,0,0203,0, + /* 57280 */ 0327,0320,0355,01,01,0200,0, + /* 57287 */ 0327,0321,0355,01,01,0200,0, + /* 57294 */ 0327,0324,0355,01,01,0200,0, + /* 57301 */ 0327,0320,0355,01,01,0201,0, + /* 57308 */ 0327,0321,0355,01,01,0201,0, + /* 57315 */ 0327,0324,0355,01,01,0201,0, + /* 57322 */ 0337,0321,0355,01,0,0200,0, + /* 57329 */ 0337,0324,0355,01,0,0200,0, + /* 57336 */ 0337,0321,0355,01,0,0201,0, + /* 57343 */ 0337,0324,0355,01,0,0201,0, + /* 57350 */ 0360,0324,0355,01,0156,0110,0, + /* 57357 */ 0360,0324,0355,01,0176,0101,0, + /* 57364 */ 0355,01,017,0110,01,0277,0, + /* 57371 */ 0355,01,017,0110,01,035,0, + /* 57378 */ 0355,01,017,0110,01,0256,0, + /* 57385 */ 0355,01,017,0110,01,0236,0, + /* 57392 */ 0355,01,017,0110,01,0260,0, + /* 57399 */ 0355,01,017,0110,01,0220,0, + /* 57406 */ 0355,01,017,0110,01,0240,0, + /* 57413 */ 0355,01,017,0110,01,0244,0, + /* 57420 */ 0355,01,017,0110,01,0224,0, + /* 57427 */ 0355,01,017,0110,01,0264,0, + /* 57434 */ 0355,01,017,0110,01,0226,0, + /* 57441 */ 0355,01,017,0110,01,0246,0, + /* 57448 */ 0355,01,017,0110,01,0266,0, + /* 57455 */ 0355,01,017,0110,01,0247,0, + /* 57462 */ 0355,01,017,0110,01,0227,0, + /* 57469 */ 0355,01,017,0110,01,0232,0, + /* 57476 */ 0355,01,017,0110,01,0252,0, + /* 57483 */ 0355,01,017,0110,01,015,0, + /* 57490 */ 0355,01,017,0110,01,0267,0, + /* 57497 */ 0360,0355,01,0162,0206,025,0, + /* 57504 */ 0360,0355,01,0163,0206,025,0, + /* 57511 */ 0360,0355,01,0161,0206,025,0, + /* 57518 */ 0360,0355,01,0162,0204,025,0, + /* 57525 */ 0360,0355,01,0161,0204,025,0, + /* 57532 */ 0360,0355,01,0162,0202,025,0, + /* 57539 */ 0360,0355,01,0163,0202,025,0, + /* 57546 */ 0360,0355,01,0161,0202,025,0, + /* 57553 */ 0327,0342,01,0310,030,025,0, + /* 57560 */ 0327,0320,01,0310,030,025,0, + /* 57567 */ 0327,0321,01,0310,030,025,0, + /* 57574 */ 0327,0324,01,0310,030,025,0, + /* 57581 */ 0262,02,01,01,0347,0101,0, + /* 57588 */ 0262,02,01,01,0343,0101,0, + /* 57595 */ 0262,02,01,01,0342,0101,0, + /* 57602 */ 0262,02,01,01,0346,0101,0, + /* 57609 */ 0262,02,01,01,0344,0101,0, + /* 57616 */ 0262,02,01,01,0357,0101,0, + /* 57623 */ 0262,02,01,01,0355,0101,0, + /* 57630 */ 0262,02,01,01,0354,0101,0, + /* 57637 */ 0262,02,01,01,0356,0101,0, + /* 57644 */ 0262,02,01,01,0345,0101,0, + /* 57651 */ 0262,02,01,01,0341,0101,0, + /* 57658 */ 0262,02,01,01,0353,0101,0, + /* 57665 */ 0262,02,01,01,0351,0101,0, + /* 57672 */ 0262,02,01,01,0340,0101,0, + /* 57679 */ 0262,02,01,01,0352,0101,0, + /* 57686 */ 0262,02,01,01,0350,0101,0, + /* 57693 */ 0262,02,0201,01,0347,0101,0, + /* 57700 */ 0262,02,0201,01,0343,0101,0, + /* 57707 */ 0262,02,0201,01,0342,0101,0, + /* 57714 */ 0262,02,0201,01,0346,0101,0, + /* 57721 */ 0262,02,0201,01,0344,0101,0, + /* 57728 */ 0262,02,0201,01,0357,0101,0, + /* 57735 */ 0262,02,0201,01,0355,0101,0, + /* 57742 */ 0262,02,0201,01,0354,0101,0, + /* 57749 */ 0262,02,0201,01,0356,0101,0, + /* 57756 */ 0262,02,0201,01,0345,0101,0, + /* 57763 */ 0262,02,0201,01,0341,0101,0, + /* 57770 */ 0262,02,0201,01,0353,0101,0, + /* 57777 */ 0262,02,0201,01,0351,0101,0, + /* 57784 */ 0262,02,0201,01,0340,0101,0, + /* 57791 */ 0262,02,0201,01,0352,0101,0, + /* 57798 */ 0262,02,0201,01,0350,0101,0, + /* 57805 */ 0360,0355,01,0302,0110,026,0, + /* 57812 */ 0333,0355,01,0302,0110,026,0, + /* 57819 */ 0324,0333,0355,01,052,0110,0, + /* 57826 */ 0324,0333,0355,01,055,0110,0, + /* 57833 */ 0324,0333,0355,01,054,0110,0, + /* 57840 */ 0360,0324,0355,01,0120,0110,0, + /* 57847 */ 0360,0355,01,0306,0110,026,0, + /* 57854 */ 0324,0360,0355,01,0256,0201,0, + /* 57861 */ 0324,0360,0355,01,0256,0200,0, + /* 57868 */ 0324,0360,0355,01,0256,0204,0, + /* 57875 */ 0324,0360,0355,01,0307,0204,0, + /* 57882 */ 0324,0360,0355,01,0256,0206,0, + /* 57889 */ 0324,0360,0355,01,0307,0205,0, + /* 57896 */ 0324,0360,0355,01,0256,0205,0, + /* 57903 */ 0324,0360,0355,01,0307,0203,0, + /* 57910 */ 0360,0355,01,0305,0110,026,0, + /* 57917 */ 0360,0355,01,0304,0110,026,0, + /* 57924 */ 0360,0355,01,0160,0110,022,0, + /* 57931 */ 0355,01,017,0110,01,034,0, + /* 57938 */ 0355,01,017,0110,01,0212,0, + /* 57945 */ 0355,01,017,0110,01,0216,0, + /* 57952 */ 0355,01,017,0110,01,014,0, + /* 57959 */ 0355,01,017,0110,01,0273,0, + /* 57966 */ 0324,0360,0355,01,0303,0101,0, + /* 57973 */ 0361,0317,0355,01,0176,0101,0, + /* 57980 */ 0361,0317,0355,01,0156,0110,0, + /* 57987 */ 0361,0324,0355,01,0156,0110,0, + /* 57994 */ 0361,0324,0355,01,0176,0101,0, + /* 58001 */ 0361,0355,01,0305,0110,026,0, + /* 58008 */ 0361,0355,01,0304,0110,026,0, + /* 58015 */ 0361,0355,01,0160,0110,022,0, + /* 58022 */ 0333,0355,01,0160,0110,022,0, + /* 58029 */ 0332,0355,01,0160,0110,022,0, + /* 58036 */ 0361,0355,01,0163,0207,025,0, + /* 58043 */ 0361,0355,01,0161,0206,025,0, + /* 58050 */ 0361,0355,01,0162,0206,025,0, + /* 58057 */ 0361,0355,01,0163,0206,025,0, + /* 58064 */ 0361,0355,01,0161,0204,025,0, + /* 58071 */ 0361,0355,01,0162,0204,025,0, + /* 58078 */ 0361,0355,01,0163,0203,025,0, + /* 58085 */ 0361,0355,01,0161,0202,025,0, + /* 58092 */ 0361,0355,01,0162,0202,025,0, + /* 58099 */ 0361,0355,01,0163,0202,025,0, + /* 58106 */ 0361,0355,01,0302,0110,026,0, + /* 58113 */ 0332,0355,01,0302,0110,026,0, + /* 58120 */ 0317,0332,0355,01,055,0110,0, + /* 58127 */ 0324,0332,0355,01,055,0110,0, + /* 58134 */ 0317,0332,0355,01,052,0110,0, + /* 58141 */ 0324,0332,0355,01,052,0110,0, + /* 58148 */ 0317,0332,0355,01,054,0110,0, + /* 58155 */ 0324,0332,0355,01,054,0110,0, + /* 58162 */ 0361,0324,0355,01,0120,0110,0, + /* 58169 */ 0361,0355,01,0306,0110,026,0, + /* 58176 */ 0323,0360,0355,01,0170,0101,0, + /* 58183 */ 0323,0360,0355,01,0171,0110,0, + /* 58190 */ 0323,0361,0356,01,0200,0110,0, + /* 58197 */ 0323,0361,0356,01,0201,0110,0, + /* 58204 */ 0360,0357,01,017,0110,026,0, + /* 58211 */ 0361,0357,01,017,0110,026,0, + /* 58218 */ 0361,0357,01,015,0110,026,0, + /* 58225 */ 0361,0357,01,014,0110,026,0, + /* 58232 */ 0361,0357,01,0101,0110,026,0, + /* 58239 */ 0361,0357,01,0100,0110,026,0, + /* 58246 */ 0361,0357,01,041,0110,026,0, + /* 58253 */ 0361,0357,01,0102,0110,026,0, + /* 58260 */ 0361,0357,01,016,0110,026,0, + /* 58267 */ 0361,0357,01,011,0110,026,0, + /* 58274 */ 0361,0357,01,010,0110,026,0, + /* 58281 */ 0361,0357,01,013,0110,026,0, + /* 58288 */ 0361,0357,01,012,0110,026,0, + /* 58295 */ 0320,0332,0356,01,0361,0110,0, + /* 58302 */ 0321,0332,0356,01,0361,0110,0, + /* 58309 */ 0324,0332,0356,01,0361,0110,0, + /* 58316 */ 0324,0332,0356,01,0360,0110,0, + /* 58323 */ 0361,0357,01,0141,0110,026,0, + /* 58330 */ 0361,0357,01,0140,0110,026,0, + /* 58337 */ 0361,0357,01,0143,0110,026,0, + /* 58344 */ 0361,0357,01,0142,0110,026,0, + /* 58351 */ 0320,0333,0355,01,0270,0110,0, + /* 58358 */ 0321,0333,0355,01,0270,0110,0, + /* 58365 */ 0324,0333,0355,01,0270,0110,0, + /* 58372 */ 0355,01,017,0110,01,0206,0, + /* 58379 */ 0355,01,017,0110,01,0207,0, + /* 58386 */ 0361,0357,01,0337,0110,022,0, + /* 58393 */ 0261,02,01,01,0334,0120,0, + /* 58400 */ 0260,02,01,01,0334,0110,0, + /* 58407 */ 0261,02,01,01,0335,0120,0, + /* 58414 */ 0260,02,01,01,0335,0110,0, + /* 58421 */ 0261,02,01,01,0336,0120,0, + /* 58428 */ 0260,02,01,01,0336,0110,0, + /* 58435 */ 0261,02,01,01,0337,0120,0, + /* 58442 */ 0260,02,01,01,0337,0110,0, + /* 58449 */ 0270,02,01,01,0333,0110,0, + /* 58456 */ 0261,02,05,01,0334,0120,0, + /* 58463 */ 0260,02,05,01,0334,0110,0, + /* 58470 */ 0261,02,05,01,0335,0120,0, + /* 58477 */ 0260,02,05,01,0335,0110,0, + /* 58484 */ 0261,02,05,01,0336,0120,0, + /* 58491 */ 0260,02,05,01,0336,0110,0, + /* 58498 */ 0261,02,05,01,0337,0120,0, + /* 58505 */ 0260,02,05,01,0337,0110,0, + /* 58512 */ 0261,01,01,01,0130,0120,0, + /* 58519 */ 0260,01,01,01,0130,0110,0, + /* 58526 */ 0261,01,05,01,0130,0120,0, + /* 58533 */ 0260,01,05,01,0130,0110,0, + /* 58540 */ 0261,01,0,01,0130,0120,0, + /* 58547 */ 0260,01,0,01,0130,0110,0, + /* 58554 */ 0261,01,04,01,0130,0120,0, + /* 58561 */ 0260,01,04,01,0130,0110,0, + /* 58568 */ 0261,01,03,01,0130,0120,0, + /* 58575 */ 0260,01,03,01,0130,0110,0, + /* 58582 */ 0261,01,02,01,0130,0120,0, + /* 58589 */ 0260,01,02,01,0130,0110,0, + /* 58596 */ 0261,01,01,01,0320,0120,0, + /* 58603 */ 0260,01,01,01,0320,0110,0, + /* 58610 */ 0261,01,05,01,0320,0120,0, + /* 58617 */ 0260,01,05,01,0320,0110,0, + /* 58624 */ 0261,01,03,01,0320,0120,0, + /* 58631 */ 0260,01,03,01,0320,0110,0, + /* 58638 */ 0261,01,07,01,0320,0120,0, + /* 58645 */ 0260,01,07,01,0320,0110,0, + /* 58652 */ 0261,01,01,01,0124,0120,0, + /* 58659 */ 0260,01,01,01,0124,0110,0, + /* 58666 */ 0261,01,05,01,0124,0120,0, + /* 58673 */ 0260,01,05,01,0124,0110,0, + /* 58680 */ 0261,01,0,01,0124,0120,0, + /* 58687 */ 0260,01,0,01,0124,0110,0, + /* 58694 */ 0261,01,04,01,0124,0120,0, + /* 58701 */ 0260,01,04,01,0124,0110,0, + /* 58708 */ 0261,01,01,01,0125,0120,0, + /* 58715 */ 0260,01,01,01,0125,0110,0, + /* 58722 */ 0261,01,05,01,0125,0120,0, + /* 58729 */ 0260,01,05,01,0125,0110,0, + /* 58736 */ 0261,01,0,01,0125,0120,0, + /* 58743 */ 0260,01,0,01,0125,0110,0, + /* 58750 */ 0261,01,04,01,0125,0120,0, + /* 58757 */ 0260,01,04,01,0125,0110,0, + /* 58764 */ 0270,02,01,01,030,0110,0, + /* 58771 */ 0270,02,05,01,030,0110,0, + /* 58778 */ 0270,02,05,01,031,0110,0, + /* 58785 */ 0270,02,05,01,032,0110,0, + /* 58792 */ 0270,01,01,01,057,0110,0, + /* 58799 */ 0270,01,0,01,057,0110,0, + /* 58806 */ 0270,01,02,01,0346,0110,0, + /* 58813 */ 0270,01,06,01,0346,0110,0, + /* 58820 */ 0270,01,0,01,0133,0110,0, + /* 58827 */ 0270,01,04,01,0133,0110,0, + /* 58834 */ 0270,01,03,01,0346,0110,0, + /* 58841 */ 0270,01,07,01,0346,0110,0, + /* 58848 */ 0270,01,01,01,0132,0110,0, + /* 58855 */ 0270,01,05,01,0132,0110,0, + /* 58862 */ 0270,01,01,01,0133,0110,0, + /* 58869 */ 0270,01,05,01,0133,0110,0, + /* 58876 */ 0270,01,0,01,0132,0110,0, + /* 58883 */ 0270,01,04,01,0132,0110,0, + /* 58890 */ 0270,01,03,01,055,0110,0, + /* 58897 */ 0270,01,0203,01,055,0110,0, + /* 58904 */ 0261,01,03,01,0132,0120,0, + /* 58911 */ 0260,01,03,01,0132,0110,0, + /* 58918 */ 0261,01,03,01,052,0120,0, + /* 58925 */ 0260,01,03,01,052,0110,0, + /* 58932 */ 0261,01,0203,01,052,0120,0, + /* 58939 */ 0260,01,0203,01,052,0110,0, + /* 58946 */ 0261,01,02,01,052,0120,0, + /* 58953 */ 0260,01,02,01,052,0110,0, + /* 58960 */ 0261,01,0202,01,052,0120,0, + /* 58967 */ 0260,01,0202,01,052,0110,0, + /* 58974 */ 0261,01,02,01,0132,0120,0, + /* 58981 */ 0260,01,02,01,0132,0110,0, + /* 58988 */ 0270,01,02,01,055,0110,0, + /* 58995 */ 0270,01,0202,01,055,0110,0, + /* 59002 */ 0270,01,01,01,0346,0110,0, + /* 59009 */ 0270,01,05,01,0346,0110,0, + /* 59016 */ 0270,01,02,01,0133,0110,0, + /* 59023 */ 0270,01,06,01,0133,0110,0, + /* 59030 */ 0270,01,03,01,054,0110,0, + /* 59037 */ 0270,01,0203,01,054,0110,0, + /* 59044 */ 0270,01,02,01,054,0110,0, + /* 59051 */ 0270,01,0202,01,054,0110,0, + /* 59058 */ 0261,01,01,01,0136,0120,0, + /* 59065 */ 0260,01,01,01,0136,0110,0, + /* 59072 */ 0261,01,05,01,0136,0120,0, + /* 59079 */ 0260,01,05,01,0136,0110,0, + /* 59086 */ 0261,01,0,01,0136,0120,0, + /* 59093 */ 0260,01,0,01,0136,0110,0, + /* 59100 */ 0261,01,04,01,0136,0120,0, + /* 59107 */ 0260,01,04,01,0136,0110,0, + /* 59114 */ 0261,01,03,01,0136,0120,0, + /* 59121 */ 0260,01,03,01,0136,0110,0, + /* 59128 */ 0261,01,02,01,0136,0120,0, + /* 59135 */ 0260,01,02,01,0136,0110,0, + /* 59142 */ 0261,01,01,01,0174,0120,0, + /* 59149 */ 0260,01,01,01,0174,0110,0, + /* 59156 */ 0261,01,05,01,0174,0120,0, + /* 59163 */ 0260,01,05,01,0174,0110,0, + /* 59170 */ 0261,01,03,01,0174,0120,0, + /* 59177 */ 0260,01,03,01,0174,0110,0, + /* 59184 */ 0261,01,07,01,0174,0120,0, + /* 59191 */ 0260,01,07,01,0174,0110,0, + /* 59198 */ 0261,01,01,01,0175,0120,0, + /* 59205 */ 0260,01,01,01,0175,0110,0, + /* 59212 */ 0261,01,05,01,0175,0120,0, + /* 59219 */ 0260,01,05,01,0175,0110,0, + /* 59226 */ 0261,01,03,01,0175,0120,0, + /* 59233 */ 0260,01,03,01,0175,0110,0, + /* 59240 */ 0261,01,07,01,0175,0120,0, + /* 59247 */ 0260,01,07,01,0175,0110,0, + /* 59254 */ 0270,01,03,01,0360,0110,0, + /* 59261 */ 0270,01,07,01,0360,0110,0, + /* 59268 */ 0270,01,0,01,0256,0202,0, + /* 59275 */ 0270,01,01,01,0367,0110,0, + /* 59282 */ 0261,02,01,01,054,0120,0, + /* 59289 */ 0261,02,05,01,054,0120,0, + /* 59296 */ 0261,02,01,01,056,0102,0, + /* 59303 */ 0261,02,05,01,056,0102,0, + /* 59310 */ 0261,02,01,01,055,0120,0, + /* 59317 */ 0261,02,05,01,055,0120,0, + /* 59324 */ 0261,02,01,01,057,0102,0, + /* 59331 */ 0261,02,05,01,057,0102,0, + /* 59338 */ 0261,01,01,01,0137,0120,0, + /* 59345 */ 0260,01,01,01,0137,0110,0, + /* 59352 */ 0261,01,05,01,0137,0120,0, + /* 59359 */ 0260,01,05,01,0137,0110,0, + /* 59366 */ 0261,01,0,01,0137,0120,0, + /* 59373 */ 0260,01,0,01,0137,0110,0, + /* 59380 */ 0261,01,04,01,0137,0120,0, + /* 59387 */ 0260,01,04,01,0137,0110,0, + /* 59394 */ 0261,01,03,01,0137,0120,0, + /* 59401 */ 0260,01,03,01,0137,0110,0, + /* 59408 */ 0261,01,02,01,0137,0120,0, + /* 59415 */ 0260,01,02,01,0137,0110,0, + /* 59422 */ 0261,01,01,01,0135,0120,0, + /* 59429 */ 0260,01,01,01,0135,0110,0, + /* 59436 */ 0261,01,05,01,0135,0120,0, + /* 59443 */ 0260,01,05,01,0135,0110,0, + /* 59450 */ 0261,01,0,01,0135,0120,0, + /* 59457 */ 0260,01,0,01,0135,0110,0, + /* 59464 */ 0261,01,04,01,0135,0120,0, + /* 59471 */ 0260,01,04,01,0135,0110,0, + /* 59478 */ 0261,01,03,01,0135,0120,0, + /* 59485 */ 0260,01,03,01,0135,0110,0, + /* 59492 */ 0261,01,02,01,0135,0120,0, + /* 59499 */ 0260,01,02,01,0135,0110,0, + /* 59506 */ 0270,01,01,01,050,0110,0, + /* 59513 */ 0270,01,01,01,051,0101,0, + /* 59520 */ 0270,01,05,01,050,0110,0, + /* 59527 */ 0270,01,05,01,051,0101,0, + /* 59534 */ 0270,01,0,01,050,0110,0, + /* 59541 */ 0270,01,0,01,051,0101,0, + /* 59548 */ 0270,01,04,01,050,0110,0, + /* 59555 */ 0270,01,04,01,051,0101,0, + /* 59562 */ 0270,01,01,01,0156,0110,0, + /* 59569 */ 0270,01,01,01,0176,0101,0, + /* 59576 */ 0270,01,02,01,0176,0110,0, + /* 59583 */ 0270,01,01,01,0326,0101,0, + /* 59590 */ 0270,01,0201,01,0156,0110,0, + /* 59597 */ 0270,01,0201,01,0176,0101,0, + /* 59604 */ 0270,01,03,01,022,0110,0, + /* 59611 */ 0270,01,07,01,022,0110,0, + /* 59618 */ 0270,01,01,01,0157,0110,0, + /* 59625 */ 0270,01,01,01,0177,0101,0, + /* 59632 */ 0270,01,05,01,0157,0110,0, + /* 59639 */ 0270,01,05,01,0177,0101,0, + /* 59646 */ 0270,01,02,01,0157,0110,0, + /* 59653 */ 0270,01,02,01,0177,0101,0, + /* 59660 */ 0270,01,06,01,0157,0110,0, + /* 59667 */ 0270,01,06,01,0177,0101,0, + /* 59674 */ 0261,01,0,01,022,0120,0, + /* 59681 */ 0260,01,0,01,022,0110,0, + /* 59688 */ 0261,01,01,01,026,0120,0, + /* 59695 */ 0260,01,01,01,026,0110,0, + /* 59702 */ 0270,01,01,01,027,0101,0, + /* 59709 */ 0261,01,0,01,026,0120,0, + /* 59716 */ 0260,01,0,01,026,0110,0, + /* 59723 */ 0270,01,0,01,027,0101,0, + /* 59730 */ 0261,01,01,01,022,0120,0, + /* 59737 */ 0260,01,01,01,022,0110,0, + /* 59744 */ 0270,01,01,01,023,0101,0, + /* 59751 */ 0270,01,0,01,023,0101,0, + /* 59758 */ 0270,01,01,01,0120,0110,0, + /* 59765 */ 0270,01,05,01,0120,0110,0, + /* 59772 */ 0270,01,0,01,0120,0110,0, + /* 59779 */ 0270,01,04,01,0120,0110,0, + /* 59786 */ 0270,01,01,01,0347,0101,0, + /* 59793 */ 0270,01,05,01,0347,0101,0, + /* 59800 */ 0270,02,01,01,052,0110,0, + /* 59807 */ 0270,01,01,01,053,0101,0, + /* 59814 */ 0270,01,05,01,053,0101,0, + /* 59821 */ 0270,01,0,01,053,0101,0, + /* 59828 */ 0270,01,04,01,053,0101,0, + /* 59835 */ 0261,01,03,01,020,0120,0, + /* 59842 */ 0260,01,03,01,020,0110,0, + /* 59849 */ 0270,01,03,01,020,0110,0, + /* 59856 */ 0261,01,03,01,021,0102,0, + /* 59863 */ 0260,01,03,01,021,0101,0, + /* 59870 */ 0270,01,03,01,021,0101,0, + /* 59877 */ 0270,01,02,01,026,0110,0, + /* 59884 */ 0270,01,06,01,026,0110,0, + /* 59891 */ 0270,01,02,01,022,0110,0, + /* 59898 */ 0270,01,06,01,022,0110,0, + /* 59905 */ 0261,01,02,01,020,0120,0, + /* 59912 */ 0260,01,02,01,020,0110,0, + /* 59919 */ 0270,01,02,01,020,0110,0, + /* 59926 */ 0261,01,02,01,021,0102,0, + /* 59933 */ 0260,01,02,01,021,0101,0, + /* 59940 */ 0270,01,02,01,021,0101,0, + /* 59947 */ 0270,01,01,01,020,0110,0, + /* 59954 */ 0270,01,01,01,021,0101,0, + /* 59961 */ 0270,01,05,01,020,0110,0, + /* 59968 */ 0270,01,05,01,021,0101,0, + /* 59975 */ 0270,01,0,01,020,0110,0, + /* 59982 */ 0270,01,0,01,021,0101,0, + /* 59989 */ 0270,01,04,01,020,0110,0, + /* 59996 */ 0270,01,04,01,021,0101,0, + /* 60003 */ 0261,01,01,01,0131,0120,0, + /* 60010 */ 0260,01,01,01,0131,0110,0, + /* 60017 */ 0261,01,05,01,0131,0120,0, + /* 60024 */ 0260,01,05,01,0131,0110,0, + /* 60031 */ 0261,01,0,01,0131,0120,0, + /* 60038 */ 0260,01,0,01,0131,0110,0, + /* 60045 */ 0261,01,04,01,0131,0120,0, + /* 60052 */ 0260,01,04,01,0131,0110,0, + /* 60059 */ 0261,01,03,01,0131,0120,0, + /* 60066 */ 0260,01,03,01,0131,0110,0, + /* 60073 */ 0261,01,02,01,0131,0120,0, + /* 60080 */ 0260,01,02,01,0131,0110,0, + /* 60087 */ 0261,01,01,01,0126,0120,0, + /* 60094 */ 0260,01,01,01,0126,0110,0, + /* 60101 */ 0261,01,05,01,0126,0120,0, + /* 60108 */ 0260,01,05,01,0126,0110,0, + /* 60115 */ 0261,01,0,01,0126,0120,0, + /* 60122 */ 0260,01,0,01,0126,0110,0, + /* 60129 */ 0261,01,04,01,0126,0120,0, + /* 60136 */ 0260,01,04,01,0126,0110,0, + /* 60143 */ 0270,02,01,01,034,0110,0, + /* 60150 */ 0270,02,01,01,035,0110,0, + /* 60157 */ 0270,02,01,01,036,0110,0, + /* 60164 */ 0261,01,01,01,0143,0120,0, + /* 60171 */ 0260,01,01,01,0143,0110,0, + /* 60178 */ 0261,01,01,01,0153,0120,0, + /* 60185 */ 0260,01,01,01,0153,0110,0, + /* 60192 */ 0261,01,01,01,0147,0120,0, + /* 60199 */ 0260,01,01,01,0147,0110,0, + /* 60206 */ 0261,02,01,01,053,0120,0, + /* 60213 */ 0260,02,01,01,053,0110,0, + /* 60220 */ 0261,01,01,01,0374,0120,0, + /* 60227 */ 0260,01,01,01,0374,0110,0, + /* 60234 */ 0261,01,01,01,0375,0120,0, + /* 60241 */ 0260,01,01,01,0375,0110,0, + /* 60248 */ 0261,01,01,01,0376,0120,0, + /* 60255 */ 0260,01,01,01,0376,0110,0, + /* 60262 */ 0261,01,01,01,0324,0120,0, + /* 60269 */ 0260,01,01,01,0324,0110,0, + /* 60276 */ 0261,01,01,01,0354,0120,0, + /* 60283 */ 0260,01,01,01,0354,0110,0, + /* 60290 */ 0261,01,01,01,0355,0120,0, + /* 60297 */ 0260,01,01,01,0355,0110,0, + /* 60304 */ 0261,01,01,01,0334,0120,0, + /* 60311 */ 0260,01,01,01,0334,0110,0, + /* 60318 */ 0261,01,01,01,0335,0120,0, + /* 60325 */ 0260,01,01,01,0335,0110,0, + /* 60332 */ 0261,01,01,01,0333,0120,0, + /* 60339 */ 0260,01,01,01,0333,0110,0, + /* 60346 */ 0261,01,01,01,0337,0120,0, + /* 60353 */ 0260,01,01,01,0337,0110,0, + /* 60360 */ 0261,01,01,01,0340,0120,0, + /* 60367 */ 0260,01,01,01,0340,0110,0, + /* 60374 */ 0261,01,01,01,0343,0120,0, + /* 60381 */ 0260,01,01,01,0343,0110,0, + /* 60388 */ 0261,01,01,01,0164,0120,0, + /* 60395 */ 0260,01,01,01,0164,0110,0, + /* 60402 */ 0261,01,01,01,0165,0120,0, + /* 60409 */ 0260,01,01,01,0165,0110,0, + /* 60416 */ 0261,01,01,01,0166,0120,0, + /* 60423 */ 0260,01,01,01,0166,0110,0, + /* 60430 */ 0261,02,01,01,051,0120,0, + /* 60437 */ 0260,02,01,01,051,0110,0, + /* 60444 */ 0261,01,01,01,0144,0120,0, + /* 60451 */ 0260,01,01,01,0144,0110,0, + /* 60458 */ 0261,01,01,01,0145,0120,0, + /* 60465 */ 0260,01,01,01,0145,0110,0, + /* 60472 */ 0261,01,01,01,0146,0120,0, + /* 60479 */ 0260,01,01,01,0146,0110,0, + /* 60486 */ 0261,02,01,01,067,0120,0, + /* 60493 */ 0260,02,01,01,067,0110,0, + /* 60500 */ 0261,02,01,01,015,0120,0, + /* 60507 */ 0260,02,01,01,015,0110,0, + /* 60514 */ 0261,02,05,01,015,0120,0, + /* 60521 */ 0260,02,05,01,015,0110,0, + /* 60528 */ 0261,02,01,01,014,0120,0, + /* 60535 */ 0260,02,01,01,014,0110,0, + /* 60542 */ 0261,02,05,01,014,0120,0, + /* 60549 */ 0260,02,05,01,014,0110,0, + /* 60556 */ 0261,02,01,01,01,0120,0, + /* 60563 */ 0260,02,01,01,01,0110,0, + /* 60570 */ 0261,02,01,01,02,0120,0, + /* 60577 */ 0260,02,01,01,02,0110,0, + /* 60584 */ 0261,02,01,01,03,0120,0, + /* 60591 */ 0260,02,01,01,03,0110,0, + /* 60598 */ 0270,02,01,01,0101,0110,0, + /* 60605 */ 0261,02,01,01,05,0120,0, + /* 60612 */ 0260,02,01,01,05,0110,0, + /* 60619 */ 0261,02,01,01,06,0120,0, + /* 60626 */ 0260,02,01,01,06,0110,0, + /* 60633 */ 0261,02,01,01,07,0120,0, + /* 60640 */ 0260,02,01,01,07,0110,0, + /* 60647 */ 0261,01,01,01,0365,0120,0, + /* 60654 */ 0260,01,01,01,0365,0110,0, + /* 60661 */ 0261,02,01,01,04,0120,0, + /* 60668 */ 0260,02,01,01,04,0110,0, + /* 60675 */ 0261,02,01,01,074,0120,0, + /* 60682 */ 0260,02,01,01,074,0110,0, + /* 60689 */ 0261,01,01,01,0356,0120,0, + /* 60696 */ 0260,01,01,01,0356,0110,0, + /* 60703 */ 0261,02,01,01,075,0120,0, + /* 60710 */ 0260,02,01,01,075,0110,0, + /* 60717 */ 0261,01,01,01,0336,0120,0, + /* 60724 */ 0260,01,01,01,0336,0110,0, + /* 60731 */ 0261,02,01,01,076,0120,0, + /* 60738 */ 0260,02,01,01,076,0110,0, + /* 60745 */ 0261,02,01,01,077,0120,0, + /* 60752 */ 0260,02,01,01,077,0110,0, + /* 60759 */ 0261,02,01,01,070,0120,0, + /* 60766 */ 0260,02,01,01,070,0110,0, + /* 60773 */ 0261,01,01,01,0352,0120,0, + /* 60780 */ 0260,01,01,01,0352,0110,0, + /* 60787 */ 0261,02,01,01,071,0120,0, + /* 60794 */ 0260,02,01,01,071,0110,0, + /* 60801 */ 0261,01,01,01,0332,0120,0, + /* 60808 */ 0260,01,01,01,0332,0110,0, + /* 60815 */ 0261,02,01,01,072,0120,0, + /* 60822 */ 0260,02,01,01,072,0110,0, + /* 60829 */ 0261,02,01,01,073,0120,0, + /* 60836 */ 0260,02,01,01,073,0110,0, + /* 60843 */ 0270,01,01,01,0327,0110,0, + /* 60850 */ 0270,02,01,01,040,0110,0, + /* 60857 */ 0270,02,01,01,041,0110,0, + /* 60864 */ 0270,02,01,01,042,0110,0, + /* 60871 */ 0270,02,01,01,043,0110,0, + /* 60878 */ 0270,02,01,01,044,0110,0, + /* 60885 */ 0270,02,01,01,045,0110,0, + /* 60892 */ 0270,02,01,01,060,0110,0, + /* 60899 */ 0270,02,01,01,061,0110,0, + /* 60906 */ 0270,02,01,01,062,0110,0, + /* 60913 */ 0270,02,01,01,063,0110,0, + /* 60920 */ 0270,02,01,01,064,0110,0, + /* 60927 */ 0270,02,01,01,065,0110,0, + /* 60934 */ 0261,01,01,01,0344,0120,0, + /* 60941 */ 0260,01,01,01,0344,0110,0, + /* 60948 */ 0261,02,01,01,013,0120,0, + /* 60955 */ 0260,02,01,01,013,0110,0, + /* 60962 */ 0261,01,01,01,0345,0120,0, + /* 60969 */ 0260,01,01,01,0345,0110,0, + /* 60976 */ 0261,01,01,01,0325,0120,0, + /* 60983 */ 0260,01,01,01,0325,0110,0, + /* 60990 */ 0261,02,01,01,0100,0120,0, + /* 60997 */ 0260,02,01,01,0100,0110,0, + /* 61004 */ 0261,01,01,01,0364,0120,0, + /* 61011 */ 0260,01,01,01,0364,0110,0, + /* 61018 */ 0261,02,01,01,050,0120,0, + /* 61025 */ 0260,02,01,01,050,0110,0, + /* 61032 */ 0261,01,01,01,0353,0120,0, + /* 61039 */ 0260,01,01,01,0353,0110,0, + /* 61046 */ 0261,01,01,01,0366,0120,0, + /* 61053 */ 0260,01,01,01,0366,0110,0, + /* 61060 */ 0261,02,01,01,0,0120,0, + /* 61067 */ 0260,02,01,01,0,0110,0, + /* 61074 */ 0261,02,01,01,010,0120,0, + /* 61081 */ 0260,02,01,01,010,0110,0, + /* 61088 */ 0261,02,01,01,011,0120,0, + /* 61095 */ 0260,02,01,01,011,0110,0, + /* 61102 */ 0261,02,01,01,012,0120,0, + /* 61109 */ 0260,02,01,01,012,0110,0, + /* 61116 */ 0261,01,01,01,0361,0120,0, + /* 61123 */ 0260,01,01,01,0361,0110,0, + /* 61130 */ 0261,01,01,01,0362,0120,0, + /* 61137 */ 0260,01,01,01,0362,0110,0, + /* 61144 */ 0261,01,01,01,0363,0120,0, + /* 61151 */ 0260,01,01,01,0363,0110,0, + /* 61158 */ 0261,01,01,01,0341,0120,0, + /* 61165 */ 0260,01,01,01,0341,0110,0, + /* 61172 */ 0261,01,01,01,0342,0120,0, + /* 61179 */ 0260,01,01,01,0342,0110,0, + /* 61186 */ 0261,01,01,01,0321,0120,0, + /* 61193 */ 0260,01,01,01,0321,0110,0, + /* 61200 */ 0261,01,01,01,0322,0120,0, + /* 61207 */ 0260,01,01,01,0322,0110,0, + /* 61214 */ 0261,01,01,01,0323,0120,0, + /* 61221 */ 0260,01,01,01,0323,0110,0, + /* 61228 */ 0270,02,01,01,027,0110,0, + /* 61235 */ 0270,02,05,01,027,0110,0, + /* 61242 */ 0261,01,01,01,0370,0120,0, + /* 61249 */ 0260,01,01,01,0370,0110,0, + /* 61256 */ 0261,01,01,01,0371,0120,0, + /* 61263 */ 0260,01,01,01,0371,0110,0, + /* 61270 */ 0261,01,01,01,0372,0120,0, + /* 61277 */ 0260,01,01,01,0372,0110,0, + /* 61284 */ 0261,01,01,01,0373,0120,0, + /* 61291 */ 0260,01,01,01,0373,0110,0, + /* 61298 */ 0261,01,01,01,0350,0120,0, + /* 61305 */ 0260,01,01,01,0350,0110,0, + /* 61312 */ 0261,01,01,01,0351,0120,0, + /* 61319 */ 0260,01,01,01,0351,0110,0, + /* 61326 */ 0261,01,01,01,0330,0120,0, + /* 61333 */ 0260,01,01,01,0330,0110,0, + /* 61340 */ 0261,01,01,01,0331,0120,0, + /* 61347 */ 0260,01,01,01,0331,0110,0, + /* 61354 */ 0261,01,01,01,0150,0120,0, + /* 61361 */ 0260,01,01,01,0150,0110,0, + /* 61368 */ 0261,01,01,01,0151,0120,0, + /* 61375 */ 0260,01,01,01,0151,0110,0, + /* 61382 */ 0261,01,01,01,0152,0120,0, + /* 61389 */ 0260,01,01,01,0152,0110,0, + /* 61396 */ 0261,01,01,01,0155,0120,0, + /* 61403 */ 0260,01,01,01,0155,0110,0, + /* 61410 */ 0261,01,01,01,0140,0120,0, + /* 61417 */ 0260,01,01,01,0140,0110,0, + /* 61424 */ 0261,01,01,01,0141,0120,0, + /* 61431 */ 0260,01,01,01,0141,0110,0, + /* 61438 */ 0261,01,01,01,0142,0120,0, + /* 61445 */ 0260,01,01,01,0142,0110,0, + /* 61452 */ 0261,01,01,01,0154,0120,0, + /* 61459 */ 0260,01,01,01,0154,0110,0, + /* 61466 */ 0261,01,01,01,0357,0120,0, + /* 61473 */ 0260,01,01,01,0357,0110,0, + /* 61480 */ 0270,01,0,01,0123,0110,0, + /* 61487 */ 0270,01,04,01,0123,0110,0, + /* 61494 */ 0261,01,02,01,0123,0120,0, + /* 61501 */ 0260,01,02,01,0123,0110,0, + /* 61508 */ 0270,01,0,01,0122,0110,0, + /* 61515 */ 0270,01,04,01,0122,0110,0, + /* 61522 */ 0261,01,02,01,0122,0120,0, + /* 61529 */ 0260,01,02,01,0122,0110,0, + /* 61536 */ 0270,01,01,01,0121,0110,0, + /* 61543 */ 0270,01,05,01,0121,0110,0, + /* 61550 */ 0270,01,0,01,0121,0110,0, + /* 61557 */ 0270,01,04,01,0121,0110,0, + /* 61564 */ 0261,01,03,01,0121,0120,0, + /* 61571 */ 0260,01,03,01,0121,0110,0, + /* 61578 */ 0261,01,02,01,0121,0120,0, + /* 61585 */ 0260,01,02,01,0121,0110,0, + /* 61592 */ 0270,01,0,01,0256,0203,0, + /* 61599 */ 0261,01,01,01,0134,0120,0, + /* 61606 */ 0260,01,01,01,0134,0110,0, + /* 61613 */ 0261,01,05,01,0134,0120,0, + /* 61620 */ 0260,01,05,01,0134,0110,0, + /* 61627 */ 0261,01,0,01,0134,0120,0, + /* 61634 */ 0260,01,0,01,0134,0110,0, + /* 61641 */ 0261,01,04,01,0134,0120,0, + /* 61648 */ 0260,01,04,01,0134,0110,0, + /* 61655 */ 0261,01,03,01,0134,0120,0, + /* 61662 */ 0260,01,03,01,0134,0110,0, + /* 61669 */ 0261,01,02,01,0134,0120,0, + /* 61676 */ 0260,01,02,01,0134,0110,0, + /* 61683 */ 0270,02,01,01,016,0110,0, + /* 61690 */ 0270,02,05,01,016,0110,0, + /* 61697 */ 0270,02,01,01,017,0110,0, + /* 61704 */ 0270,02,05,01,017,0110,0, + /* 61711 */ 0270,01,01,01,056,0110,0, + /* 61718 */ 0270,01,0,01,056,0110,0, + /* 61725 */ 0261,01,01,01,025,0120,0, + /* 61732 */ 0260,01,01,01,025,0110,0, + /* 61739 */ 0261,01,05,01,025,0120,0, + /* 61746 */ 0260,01,05,01,025,0110,0, + /* 61753 */ 0261,01,0,01,025,0120,0, + /* 61760 */ 0260,01,0,01,025,0110,0, + /* 61767 */ 0261,01,04,01,025,0120,0, + /* 61774 */ 0260,01,04,01,025,0110,0, + /* 61781 */ 0261,01,01,01,024,0120,0, + /* 61788 */ 0260,01,01,01,024,0110,0, + /* 61795 */ 0261,01,05,01,024,0120,0, + /* 61802 */ 0260,01,05,01,024,0110,0, + /* 61809 */ 0261,01,0,01,024,0120,0, + /* 61816 */ 0260,01,0,01,024,0110,0, + /* 61823 */ 0261,01,04,01,024,0120,0, + /* 61830 */ 0260,01,04,01,024,0110,0, + /* 61837 */ 0261,01,01,01,0127,0120,0, + /* 61844 */ 0260,01,01,01,0127,0110,0, + /* 61851 */ 0261,01,05,01,0127,0120,0, + /* 61858 */ 0260,01,05,01,0127,0110,0, + /* 61865 */ 0261,01,0,01,0127,0120,0, + /* 61872 */ 0260,01,0,01,0127,0110,0, + /* 61879 */ 0261,01,04,01,0127,0120,0, + /* 61886 */ 0260,01,04,01,0127,0110,0, + /* 61893 */ 0361,0357,01,0104,0110,022,0, + /* 61900 */ 0261,02,01,01,0230,0120,0, + /* 61907 */ 0261,02,05,01,0230,0120,0, + /* 61914 */ 0261,02,0201,01,0230,0120,0, + /* 61921 */ 0261,02,0205,01,0230,0120,0, + /* 61928 */ 0261,02,01,01,0250,0120,0, + /* 61935 */ 0261,02,05,01,0250,0120,0, + /* 61942 */ 0261,02,0201,01,0250,0120,0, + /* 61949 */ 0261,02,0205,01,0250,0120,0, + /* 61956 */ 0261,02,01,01,0270,0120,0, + /* 61963 */ 0261,02,05,01,0270,0120,0, + /* 61970 */ 0261,02,0201,01,0270,0120,0, + /* 61977 */ 0261,02,0205,01,0270,0120,0, + /* 61984 */ 0261,02,01,01,0226,0120,0, + /* 61991 */ 0261,02,05,01,0226,0120,0, + /* 61998 */ 0261,02,0201,01,0226,0120,0, + /* 62005 */ 0261,02,0205,01,0226,0120,0, + /* 62012 */ 0261,02,01,01,0246,0120,0, + /* 62019 */ 0261,02,05,01,0246,0120,0, + /* 62026 */ 0261,02,0201,01,0246,0120,0, + /* 62033 */ 0261,02,0205,01,0246,0120,0, + /* 62040 */ 0261,02,01,01,0266,0120,0, + /* 62047 */ 0261,02,05,01,0266,0120,0, + /* 62054 */ 0261,02,0201,01,0266,0120,0, + /* 62061 */ 0261,02,0205,01,0266,0120,0, + /* 62068 */ 0261,02,01,01,0232,0120,0, + /* 62075 */ 0261,02,05,01,0232,0120,0, + /* 62082 */ 0261,02,0201,01,0232,0120,0, + /* 62089 */ 0261,02,0205,01,0232,0120,0, + /* 62096 */ 0261,02,01,01,0252,0120,0, + /* 62103 */ 0261,02,05,01,0252,0120,0, + /* 62110 */ 0261,02,0201,01,0252,0120,0, + /* 62117 */ 0261,02,0205,01,0252,0120,0, + /* 62124 */ 0261,02,01,01,0272,0120,0, + /* 62131 */ 0261,02,05,01,0272,0120,0, + /* 62138 */ 0261,02,0201,01,0272,0120,0, + /* 62145 */ 0261,02,0205,01,0272,0120,0, + /* 62152 */ 0261,02,01,01,0227,0120,0, + /* 62159 */ 0261,02,05,01,0227,0120,0, + /* 62166 */ 0261,02,0201,01,0227,0120,0, + /* 62173 */ 0261,02,0205,01,0227,0120,0, + /* 62180 */ 0261,02,01,01,0247,0120,0, + /* 62187 */ 0261,02,05,01,0247,0120,0, + /* 62194 */ 0261,02,0201,01,0247,0120,0, + /* 62201 */ 0261,02,0205,01,0247,0120,0, + /* 62208 */ 0261,02,01,01,0267,0120,0, + /* 62215 */ 0261,02,05,01,0267,0120,0, + /* 62222 */ 0261,02,0201,01,0267,0120,0, + /* 62229 */ 0261,02,0205,01,0267,0120,0, + /* 62236 */ 0261,02,01,01,0234,0120,0, + /* 62243 */ 0261,02,05,01,0234,0120,0, + /* 62250 */ 0261,02,0201,01,0234,0120,0, + /* 62257 */ 0261,02,0205,01,0234,0120,0, + /* 62264 */ 0261,02,01,01,0254,0120,0, + /* 62271 */ 0261,02,05,01,0254,0120,0, + /* 62278 */ 0261,02,0201,01,0254,0120,0, + /* 62285 */ 0261,02,0205,01,0254,0120,0, + /* 62292 */ 0261,02,01,01,0274,0120,0, + /* 62299 */ 0261,02,05,01,0274,0120,0, + /* 62306 */ 0261,02,0201,01,0274,0120,0, + /* 62313 */ 0261,02,0205,01,0274,0120,0, + /* 62320 */ 0261,02,01,01,0236,0120,0, + /* 62327 */ 0261,02,05,01,0236,0120,0, + /* 62334 */ 0261,02,0201,01,0236,0120,0, + /* 62341 */ 0261,02,0205,01,0236,0120,0, + /* 62348 */ 0261,02,01,01,0256,0120,0, + /* 62355 */ 0261,02,05,01,0256,0120,0, + /* 62362 */ 0261,02,0201,01,0256,0120,0, + /* 62369 */ 0261,02,0205,01,0256,0120,0, + /* 62376 */ 0261,02,01,01,0276,0120,0, + /* 62383 */ 0261,02,05,01,0276,0120,0, + /* 62390 */ 0261,02,0201,01,0276,0120,0, + /* 62397 */ 0261,02,0205,01,0276,0120,0, + /* 62404 */ 0261,02,01,01,0231,0120,0, + /* 62411 */ 0261,02,0201,01,0231,0120,0, + /* 62418 */ 0261,02,01,01,0251,0120,0, + /* 62425 */ 0261,02,0201,01,0251,0120,0, + /* 62432 */ 0261,02,01,01,0271,0120,0, + /* 62439 */ 0261,02,0201,01,0271,0120,0, + /* 62446 */ 0261,02,01,01,0233,0120,0, + /* 62453 */ 0261,02,0201,01,0233,0120,0, + /* 62460 */ 0261,02,01,01,0253,0120,0, + /* 62467 */ 0261,02,0201,01,0253,0120,0, + /* 62474 */ 0261,02,01,01,0273,0120,0, + /* 62481 */ 0261,02,0201,01,0273,0120,0, + /* 62488 */ 0261,02,01,01,0235,0120,0, + /* 62495 */ 0261,02,0201,01,0235,0120,0, + /* 62502 */ 0261,02,01,01,0255,0120,0, + /* 62509 */ 0261,02,0201,01,0255,0120,0, + /* 62516 */ 0261,02,01,01,0275,0120,0, + /* 62523 */ 0261,02,0201,01,0275,0120,0, + /* 62530 */ 0261,02,01,01,0237,0120,0, + /* 62537 */ 0261,02,0201,01,0237,0120,0, + /* 62544 */ 0261,02,01,01,0257,0120,0, + /* 62551 */ 0261,02,0201,01,0257,0120,0, + /* 62558 */ 0261,02,01,01,0277,0120,0, + /* 62565 */ 0261,02,0201,01,0277,0120,0, + /* 62572 */ 0270,02,05,01,023,0110,0, + /* 62579 */ 0270,02,01,01,023,0110,0, + /* 62586 */ 0270,0111,0,01,022,0200,0, + /* 62593 */ 0270,0111,0200,01,022,0200,0, + /* 62600 */ 0270,0111,0,01,022,0201,0, + /* 62607 */ 0270,0111,0200,01,022,0201,0, + /* 62614 */ 0270,0111,0,01,0201,0110,0, + /* 62621 */ 0270,0111,0,01,0201,0100,0, + /* 62628 */ 0270,0111,04,01,0201,0110,0, + /* 62635 */ 0270,0111,04,01,0201,0100,0, + /* 62642 */ 0270,0111,0,01,0200,0110,0, + /* 62649 */ 0270,0111,0,01,0200,0100,0, + /* 62656 */ 0270,0111,04,01,0200,0110,0, + /* 62663 */ 0270,0111,04,01,0200,0100,0, + /* 62670 */ 0270,0111,0,01,0203,0110,0, + /* 62677 */ 0270,0111,0,01,0203,0100,0, + /* 62684 */ 0270,0111,0,01,0202,0110,0, + /* 62691 */ 0270,0111,0,01,0202,0100,0, + /* 62698 */ 0270,0111,0,01,0302,0110,0, + /* 62705 */ 0270,0111,0,01,0302,0100,0, + /* 62712 */ 0270,0111,0,01,0303,0110,0, + /* 62719 */ 0270,0111,0,01,0303,0100,0, + /* 62726 */ 0270,0111,0,01,0301,0110,0, + /* 62733 */ 0270,0111,0,01,0301,0100,0, + /* 62740 */ 0270,0111,0,01,0313,0110,0, + /* 62747 */ 0270,0111,0,01,0313,0100,0, + /* 62754 */ 0270,0111,0,01,0322,0110,0, + /* 62761 */ 0270,0111,0,01,0322,0100,0, + /* 62768 */ 0270,0111,0,01,0323,0110,0, + /* 62775 */ 0270,0111,0,01,0323,0100,0, + /* 62782 */ 0270,0111,0,01,0321,0110,0, + /* 62789 */ 0270,0111,0,01,0321,0100,0, + /* 62796 */ 0270,0111,0,01,0333,0110,0, + /* 62803 */ 0270,0111,0,01,0333,0100,0, + /* 62810 */ 0270,0111,0,01,0326,0110,0, + /* 62817 */ 0270,0111,0,01,0326,0100,0, + /* 62824 */ 0270,0111,0,01,0327,0110,0, + /* 62831 */ 0270,0111,0,01,0327,0100,0, + /* 62838 */ 0270,0111,0,01,0306,0110,0, + /* 62845 */ 0270,0111,0,01,0306,0100,0, + /* 62852 */ 0270,0111,0,01,0307,0110,0, + /* 62859 */ 0270,0111,0,01,0307,0100,0, + /* 62866 */ 0270,0111,0,01,0341,0110,0, + /* 62873 */ 0270,0111,0,01,0341,0100,0, + /* 62880 */ 0270,0111,0,01,0343,0110,0, + /* 62887 */ 0270,0111,0,01,0343,0100,0, + /* 62894 */ 0270,0111,0,01,0342,0110,0, + /* 62901 */ 0270,0111,0,01,0342,0100,0, + /* 62908 */ 0262,0111,0,01,0220,0110,0, + /* 62915 */ 0261,0111,0,01,0220,0100,0, + /* 62922 */ 0261,0111,0200,01,0220,0120,0, + /* 62929 */ 0260,0111,0200,01,0220,0110,0, + /* 62936 */ 0262,0111,0,01,0222,0110,0, + /* 62943 */ 0261,0111,0,01,0222,0100,0, + /* 62950 */ 0261,0111,0200,01,0222,0120,0, + /* 62957 */ 0260,0111,0200,01,0222,0110,0, + /* 62964 */ 0262,0111,0,01,0223,0110,0, + /* 62971 */ 0261,0111,0,01,0223,0100,0, + /* 62978 */ 0261,0111,0200,01,0223,0120,0, + /* 62985 */ 0260,0111,0200,01,0223,0110,0, + /* 62992 */ 0262,0111,0,01,0221,0110,0, + /* 62999 */ 0261,0111,0,01,0221,0100,0, + /* 63006 */ 0261,0111,0200,01,0221,0120,0, + /* 63013 */ 0260,0111,0200,01,0221,0110,0, + /* 63020 */ 0262,0111,0,01,0230,0110,0, + /* 63027 */ 0261,0111,0,01,0230,0100,0, + /* 63034 */ 0261,0111,0200,01,0230,0120,0, + /* 63041 */ 0260,0111,0200,01,0230,0110,0, + /* 63048 */ 0262,0111,0,01,0232,0110,0, + /* 63055 */ 0261,0111,0,01,0232,0100,0, + /* 63062 */ 0261,0111,0200,01,0232,0120,0, + /* 63069 */ 0260,0111,0200,01,0232,0110,0, + /* 63076 */ 0262,0111,0,01,0233,0110,0, + /* 63083 */ 0261,0111,0,01,0233,0100,0, + /* 63090 */ 0261,0111,0200,01,0233,0120,0, + /* 63097 */ 0260,0111,0200,01,0233,0110,0, + /* 63104 */ 0262,0111,0,01,0231,0110,0, + /* 63111 */ 0261,0111,0,01,0231,0100,0, + /* 63118 */ 0261,0111,0200,01,0231,0120,0, + /* 63125 */ 0260,0111,0200,01,0231,0110,0, + /* 63132 */ 0262,0111,0,01,0224,0110,0, + /* 63139 */ 0261,0111,0,01,0224,0100,0, + /* 63146 */ 0261,0111,0200,01,0224,0120,0, + /* 63153 */ 0260,0111,0200,01,0224,0110,0, + /* 63160 */ 0262,0111,0,01,0226,0110,0, + /* 63167 */ 0261,0111,0,01,0226,0100,0, + /* 63174 */ 0261,0111,0200,01,0226,0120,0, + /* 63181 */ 0260,0111,0200,01,0226,0110,0, + /* 63188 */ 0262,0111,0,01,0227,0110,0, + /* 63195 */ 0261,0111,0,01,0227,0100,0, + /* 63202 */ 0261,0111,0200,01,0227,0120,0, + /* 63209 */ 0260,0111,0200,01,0227,0110,0, + /* 63216 */ 0262,0111,0,01,0225,0110,0, + /* 63223 */ 0261,0111,0,01,0225,0100,0, + /* 63230 */ 0261,0111,0200,01,0225,0120,0, + /* 63237 */ 0260,0111,0200,01,0225,0110,0, + /* 63244 */ 0270,02,05,01,034,0110,0, + /* 63251 */ 0270,02,05,01,035,0110,0, + /* 63258 */ 0270,02,05,01,036,0110,0, + /* 63265 */ 0261,01,05,01,0143,0120,0, + /* 63272 */ 0260,01,05,01,0143,0110,0, + /* 63279 */ 0261,01,05,01,0153,0120,0, + /* 63286 */ 0260,01,05,01,0153,0110,0, + /* 63293 */ 0261,02,05,01,053,0120,0, + /* 63300 */ 0260,02,05,01,053,0110,0, + /* 63307 */ 0261,01,05,01,0147,0120,0, + /* 63314 */ 0260,01,05,01,0147,0110,0, + /* 63321 */ 0261,01,05,01,0374,0120,0, + /* 63328 */ 0260,01,05,01,0374,0110,0, + /* 63335 */ 0261,01,05,01,0375,0120,0, + /* 63342 */ 0260,01,05,01,0375,0110,0, + /* 63349 */ 0261,01,05,01,0376,0120,0, + /* 63356 */ 0260,01,05,01,0376,0110,0, + /* 63363 */ 0261,01,05,01,0324,0120,0, + /* 63370 */ 0260,01,05,01,0324,0110,0, + /* 63377 */ 0261,01,05,01,0354,0120,0, + /* 63384 */ 0260,01,05,01,0354,0110,0, + /* 63391 */ 0261,01,05,01,0355,0120,0, + /* 63398 */ 0260,01,05,01,0355,0110,0, + /* 63405 */ 0261,01,05,01,0334,0120,0, + /* 63412 */ 0260,01,05,01,0334,0110,0, + /* 63419 */ 0261,01,05,01,0335,0120,0, + /* 63426 */ 0260,01,05,01,0335,0110,0, + /* 63433 */ 0261,01,05,01,0333,0120,0, + /* 63440 */ 0260,01,05,01,0333,0110,0, + /* 63447 */ 0261,01,05,01,0337,0120,0, + /* 63454 */ 0260,01,05,01,0337,0110,0, + /* 63461 */ 0261,01,05,01,0340,0120,0, + /* 63468 */ 0260,01,05,01,0340,0110,0, + /* 63475 */ 0261,01,05,01,0343,0120,0, + /* 63482 */ 0260,01,05,01,0343,0110,0, + /* 63489 */ 0261,01,05,01,0164,0120,0, + /* 63496 */ 0260,01,05,01,0164,0110,0, + /* 63503 */ 0261,01,05,01,0165,0120,0, + /* 63510 */ 0260,01,05,01,0165,0110,0, + /* 63517 */ 0261,01,05,01,0166,0120,0, + /* 63524 */ 0260,01,05,01,0166,0110,0, + /* 63531 */ 0261,02,05,01,051,0120,0, + /* 63538 */ 0260,02,05,01,051,0110,0, + /* 63545 */ 0261,01,05,01,0144,0120,0, + /* 63552 */ 0260,01,05,01,0144,0110,0, + /* 63559 */ 0261,01,05,01,0145,0120,0, + /* 63566 */ 0260,01,05,01,0145,0110,0, + /* 63573 */ 0261,01,05,01,0146,0120,0, + /* 63580 */ 0260,01,05,01,0146,0110,0, + /* 63587 */ 0261,02,05,01,067,0120,0, + /* 63594 */ 0260,02,05,01,067,0110,0, + /* 63601 */ 0261,02,05,01,01,0120,0, + /* 63608 */ 0260,02,05,01,01,0110,0, + /* 63615 */ 0261,02,05,01,02,0120,0, + /* 63622 */ 0260,02,05,01,02,0110,0, + /* 63629 */ 0261,02,05,01,03,0120,0, + /* 63636 */ 0260,02,05,01,03,0110,0, + /* 63643 */ 0261,02,05,01,05,0120,0, + /* 63650 */ 0260,02,05,01,05,0110,0, + /* 63657 */ 0261,02,05,01,06,0120,0, + /* 63664 */ 0260,02,05,01,06,0110,0, + /* 63671 */ 0261,02,05,01,07,0120,0, + /* 63678 */ 0260,02,05,01,07,0110,0, + /* 63685 */ 0261,02,05,01,04,0120,0, + /* 63692 */ 0260,02,05,01,04,0110,0, + /* 63699 */ 0261,01,05,01,0365,0120,0, + /* 63706 */ 0260,01,05,01,0365,0110,0, + /* 63713 */ 0261,02,05,01,074,0120,0, + /* 63720 */ 0260,02,05,01,074,0110,0, + /* 63727 */ 0261,01,05,01,0356,0120,0, + /* 63734 */ 0260,01,05,01,0356,0110,0, + /* 63741 */ 0261,02,05,01,075,0120,0, + /* 63748 */ 0260,02,05,01,075,0110,0, + /* 63755 */ 0261,01,05,01,0336,0120,0, + /* 63762 */ 0260,01,05,01,0336,0110,0, + /* 63769 */ 0261,02,05,01,076,0120,0, + /* 63776 */ 0260,02,05,01,076,0110,0, + /* 63783 */ 0261,02,05,01,077,0120,0, + /* 63790 */ 0260,02,05,01,077,0110,0, + /* 63797 */ 0261,02,05,01,070,0120,0, + /* 63804 */ 0260,02,05,01,070,0110,0, + /* 63811 */ 0261,01,05,01,0352,0120,0, + /* 63818 */ 0260,01,05,01,0352,0110,0, + /* 63825 */ 0261,02,05,01,071,0120,0, + /* 63832 */ 0260,02,05,01,071,0110,0, + /* 63839 */ 0261,01,05,01,0332,0120,0, + /* 63846 */ 0260,01,05,01,0332,0110,0, + /* 63853 */ 0261,02,05,01,072,0120,0, + /* 63860 */ 0260,02,05,01,072,0110,0, + /* 63867 */ 0261,02,05,01,073,0120,0, + /* 63874 */ 0260,02,05,01,073,0110,0, + /* 63881 */ 0270,01,05,01,0327,0110,0, + /* 63888 */ 0270,02,05,01,040,0110,0, + /* 63895 */ 0270,02,05,01,041,0110,0, + /* 63902 */ 0270,02,05,01,042,0110,0, + /* 63909 */ 0270,02,05,01,043,0110,0, + /* 63916 */ 0270,02,05,01,044,0110,0, + /* 63923 */ 0270,02,05,01,045,0110,0, + /* 63930 */ 0270,02,05,01,060,0110,0, + /* 63937 */ 0270,02,05,01,061,0110,0, + /* 63944 */ 0270,02,05,01,062,0110,0, + /* 63951 */ 0270,02,05,01,063,0110,0, + /* 63958 */ 0270,02,05,01,064,0110,0, + /* 63965 */ 0270,02,05,01,065,0110,0, + /* 63972 */ 0261,02,05,01,050,0120,0, + /* 63979 */ 0260,02,05,01,050,0110,0, + /* 63986 */ 0261,02,05,01,013,0120,0, + /* 63993 */ 0260,02,05,01,013,0110,0, + /* 64000 */ 0261,01,05,01,0344,0120,0, + /* 64007 */ 0260,01,05,01,0344,0110,0, + /* 64014 */ 0261,01,05,01,0345,0120,0, + /* 64021 */ 0260,01,05,01,0345,0110,0, + /* 64028 */ 0261,01,05,01,0325,0120,0, + /* 64035 */ 0260,01,05,01,0325,0110,0, + /* 64042 */ 0261,02,05,01,0100,0120,0, + /* 64049 */ 0260,02,05,01,0100,0110,0, + /* 64056 */ 0261,01,05,01,0364,0120,0, + /* 64063 */ 0260,01,05,01,0364,0110,0, + /* 64070 */ 0261,01,05,01,0353,0120,0, + /* 64077 */ 0260,01,05,01,0353,0110,0, + /* 64084 */ 0261,01,05,01,0366,0120,0, + /* 64091 */ 0260,01,05,01,0366,0110,0, + /* 64098 */ 0261,02,05,01,0,0120,0, + /* 64105 */ 0260,02,05,01,0,0110,0, + /* 64112 */ 0261,02,05,01,010,0120,0, + /* 64119 */ 0260,02,05,01,010,0110,0, + /* 64126 */ 0261,02,05,01,011,0120,0, + /* 64133 */ 0260,02,05,01,011,0110,0, + /* 64140 */ 0261,02,05,01,012,0120,0, + /* 64147 */ 0260,02,05,01,012,0110,0, + /* 64154 */ 0261,01,05,01,0361,0120,0, + /* 64161 */ 0260,01,05,01,0361,0110,0, + /* 64168 */ 0261,01,05,01,0362,0120,0, + /* 64175 */ 0260,01,05,01,0362,0110,0, + /* 64182 */ 0261,01,05,01,0363,0120,0, + /* 64189 */ 0260,01,05,01,0363,0110,0, + /* 64196 */ 0261,01,05,01,0341,0120,0, + /* 64203 */ 0260,01,05,01,0341,0110,0, + /* 64210 */ 0261,01,05,01,0342,0120,0, + /* 64217 */ 0260,01,05,01,0342,0110,0, + /* 64224 */ 0261,01,05,01,0321,0120,0, + /* 64231 */ 0260,01,05,01,0321,0110,0, + /* 64238 */ 0261,01,05,01,0322,0120,0, + /* 64245 */ 0260,01,05,01,0322,0110,0, + /* 64252 */ 0261,01,05,01,0323,0120,0, + /* 64259 */ 0260,01,05,01,0323,0110,0, + /* 64266 */ 0261,01,05,01,0370,0120,0, + /* 64273 */ 0260,01,05,01,0370,0110,0, + /* 64280 */ 0261,01,05,01,0371,0120,0, + /* 64287 */ 0260,01,05,01,0371,0110,0, + /* 64294 */ 0261,01,05,01,0372,0120,0, + /* 64301 */ 0260,01,05,01,0372,0110,0, + /* 64308 */ 0261,01,05,01,0373,0120,0, + /* 64315 */ 0260,01,05,01,0373,0110,0, + /* 64322 */ 0261,01,05,01,0350,0120,0, + /* 64329 */ 0260,01,05,01,0350,0110,0, + /* 64336 */ 0261,01,05,01,0351,0120,0, + /* 64343 */ 0260,01,05,01,0351,0110,0, + /* 64350 */ 0261,01,05,01,0330,0120,0, + /* 64357 */ 0260,01,05,01,0330,0110,0, + /* 64364 */ 0261,01,05,01,0331,0120,0, + /* 64371 */ 0260,01,05,01,0331,0110,0, + /* 64378 */ 0261,01,05,01,0150,0120,0, + /* 64385 */ 0260,01,05,01,0150,0110,0, + /* 64392 */ 0261,01,05,01,0151,0120,0, + /* 64399 */ 0260,01,05,01,0151,0110,0, + /* 64406 */ 0261,01,05,01,0152,0120,0, + /* 64413 */ 0260,01,05,01,0152,0110,0, + /* 64420 */ 0261,01,05,01,0155,0120,0, + /* 64427 */ 0260,01,05,01,0155,0110,0, + /* 64434 */ 0261,01,05,01,0140,0120,0, + /* 64441 */ 0260,01,05,01,0140,0110,0, + /* 64448 */ 0261,01,05,01,0141,0120,0, + /* 64455 */ 0260,01,05,01,0141,0110,0, + /* 64462 */ 0261,01,05,01,0142,0120,0, + /* 64469 */ 0260,01,05,01,0142,0110,0, + /* 64476 */ 0261,01,05,01,0154,0120,0, + /* 64483 */ 0260,01,05,01,0154,0110,0, + /* 64490 */ 0261,01,05,01,0357,0120,0, + /* 64497 */ 0260,01,05,01,0357,0110,0, + /* 64504 */ 0270,02,05,01,052,0110,0, + /* 64511 */ 0270,02,05,01,0132,0110,0, + /* 64518 */ 0270,02,01,01,0170,0110,0, + /* 64525 */ 0270,02,05,01,0170,0110,0, + /* 64532 */ 0270,02,01,01,0171,0110,0, + /* 64539 */ 0270,02,05,01,0171,0110,0, + /* 64546 */ 0270,02,01,01,0130,0110,0, + /* 64553 */ 0270,02,05,01,0130,0110,0, + /* 64560 */ 0270,02,01,01,0131,0110,0, + /* 64567 */ 0270,02,05,01,0131,0110,0, + /* 64574 */ 0261,02,05,01,066,0120,0, + /* 64581 */ 0260,02,05,01,066,0110,0, + /* 64588 */ 0261,02,05,01,026,0120,0, + /* 64595 */ 0260,02,05,01,026,0110,0, + /* 64602 */ 0261,02,01,01,0214,0120,0, + /* 64609 */ 0260,02,01,01,0214,0110,0, + /* 64616 */ 0261,02,05,01,0214,0120,0, + /* 64623 */ 0260,02,05,01,0214,0110,0, + /* 64630 */ 0261,02,0201,01,0214,0120,0, + /* 64637 */ 0260,02,0201,01,0214,0110,0, + /* 64644 */ 0261,02,0205,01,0214,0120,0, + /* 64651 */ 0260,02,0205,01,0214,0110,0, + /* 64658 */ 0261,02,01,01,0216,0102,0, + /* 64665 */ 0261,02,05,01,0216,0102,0, + /* 64672 */ 0261,02,0201,01,0216,0102,0, + /* 64679 */ 0261,02,0205,01,0216,0102,0, + /* 64686 */ 0261,02,01,01,0107,0120,0, + /* 64693 */ 0260,02,01,01,0107,0110,0, + /* 64700 */ 0261,02,0201,01,0107,0120,0, + /* 64707 */ 0260,02,0201,01,0107,0110,0, + /* 64714 */ 0261,02,05,01,0107,0120,0, + /* 64721 */ 0260,02,05,01,0107,0110,0, + /* 64728 */ 0261,02,0205,01,0107,0120,0, + /* 64735 */ 0260,02,0205,01,0107,0110,0, + /* 64742 */ 0261,02,01,01,0106,0120,0, + /* 64749 */ 0260,02,01,01,0106,0110,0, + /* 64756 */ 0261,02,05,01,0106,0120,0, + /* 64763 */ 0260,02,05,01,0106,0110,0, + /* 64770 */ 0261,02,01,01,0105,0120,0, + /* 64777 */ 0260,02,01,01,0105,0110,0, + /* 64784 */ 0261,02,0201,01,0105,0120,0, + /* 64791 */ 0260,02,0201,01,0105,0110,0, + /* 64798 */ 0261,02,05,01,0105,0120,0, + /* 64805 */ 0260,02,05,01,0105,0110,0, + /* 64812 */ 0261,02,0205,01,0105,0120,0, + /* 64819 */ 0260,02,0205,01,0105,0110,0, + /* 64826 */ 0327,0320,02,0307,0370,064,0, + /* 64833 */ 0327,0321,02,0307,0370,064,0, + /* 64840 */ 0327,0324,02,0307,0370,064,0, + /* 64847 */ 0323,0333,0355,01,032,0110,0, + /* 64854 */ 0323,0332,0355,01,032,0110,0, + /* 64861 */ 0323,0332,0355,01,033,0110,0, + /* 64868 */ 0270,02,07,01,0314,0110,0, + /* 64875 */ 0270,02,07,01,0315,0110,0, + /* 64882 */ 0261,02,07,01,0313,0120,0, + /* 64889 */ 0261,02,0,01,0332,0120,0, + /* 64896 */ 0261,02,01,01,0332,0120,0, + /* 64903 */ 0261,02,02,01,0332,0120,0, + /* 64910 */ 0261,02,06,01,0332,0120,0, + /* 64917 */ 0261,02,03,01,0332,0120,0, + /* 64924 */ 0261,02,07,01,0332,0120,0, + /* 64931 */ 0270,02,02,01,0261,0110,0, + /* 64938 */ 0270,02,06,01,0261,0110,0, + /* 64945 */ 0270,02,01,01,0261,0110,0, + /* 64952 */ 0270,02,05,01,0261,0110,0, + /* 64959 */ 0270,02,02,01,0260,0110,0, + /* 64966 */ 0270,02,06,01,0260,0110,0, + /* 64973 */ 0270,02,01,01,0260,0110,0, + /* 64980 */ 0270,02,05,01,0260,0110,0, + /* 64987 */ 0270,02,03,01,0260,0110,0, + /* 64994 */ 0270,02,07,01,0260,0110,0, + /* 65001 */ 0270,02,0,01,0260,0110,0, + /* 65008 */ 0270,02,04,01,0260,0110,0, + /* 65015 */ 0270,02,02,01,0162,0110,0, + /* 65022 */ 0270,02,06,01,0162,0110,0, + /* 65029 */ 0261,02,01,01,0120,0120,0, + /* 65036 */ 0261,02,05,01,0120,0120,0, + /* 65043 */ 0261,02,01,01,0121,0120,0, + /* 65050 */ 0261,02,05,01,0121,0120,0, + /* 65057 */ 0261,02,01,01,0122,0120,0, + /* 65064 */ 0261,02,05,01,0122,0120,0, + /* 65071 */ 0261,02,01,01,0123,0120,0, + /* 65078 */ 0261,02,05,01,0123,0120,0, + /* 65085 */ 0261,02,03,01,0120,0120,0, + /* 65092 */ 0261,02,07,01,0120,0120,0, + /* 65099 */ 0261,02,03,01,0121,0120,0, + /* 65106 */ 0261,02,07,01,0121,0120,0, + /* 65113 */ 0261,02,02,01,0120,0120,0, + /* 65120 */ 0261,02,06,01,0120,0120,0, + /* 65127 */ 0261,02,02,01,0121,0120,0, + /* 65134 */ 0261,02,06,01,0121,0120,0, + /* 65141 */ 0261,02,0,01,0120,0120,0, + /* 65148 */ 0261,02,04,01,0120,0120,0, + /* 65155 */ 0261,02,0,01,0121,0120,0, + /* 65162 */ 0261,02,04,01,0121,0120,0, + /* 65169 */ 0261,02,02,01,0322,0120,0, + /* 65176 */ 0261,02,06,01,0322,0120,0, + /* 65183 */ 0261,02,02,01,0323,0120,0, + /* 65190 */ 0261,02,06,01,0323,0120,0, + /* 65197 */ 0261,02,01,01,0322,0120,0, + /* 65204 */ 0261,02,05,01,0322,0120,0, + /* 65211 */ 0261,02,01,01,0323,0120,0, + /* 65218 */ 0261,02,05,01,0323,0120,0, + /* 65225 */ 0261,02,0,01,0322,0120,0, + /* 65232 */ 0261,02,04,01,0322,0120,0, + /* 65239 */ 0261,02,0,01,0323,0120,0, + /* 65246 */ 0261,02,04,01,0323,0120,0, + /* 65253 */ 0261,02,0201,01,0265,0120,0, + /* 65260 */ 0261,02,0205,01,0265,0120,0, + /* 65267 */ 0261,02,0201,01,0264,0120,0, + /* 65274 */ 0261,02,0205,01,0264,0120,0, + /* 65281 */ 0270,01,01,01,0220,0110,0, + /* 65288 */ 0270,01,0,01,0220,0110,0, + /* 65295 */ 0270,01,0201,01,0220,0110,0, + /* 65302 */ 0270,01,0200,01,0220,0110,0, + /* 65309 */ 0270,01,01,01,0221,0101,0, + /* 65316 */ 0270,01,0,01,0221,0101,0, + /* 65323 */ 0270,01,0201,01,0221,0101,0, + /* 65330 */ 0270,01,0200,01,0221,0101,0, + /* 65337 */ 0270,01,03,01,0222,0110,0, + /* 65344 */ 0270,01,0203,01,0222,0110,0, + /* 65351 */ 0270,01,03,01,0223,0110,0, + /* 65358 */ 0270,01,0203,01,0223,0110,0, + /* 65365 */ 0270,01,01,01,0222,0110,0, + /* 65372 */ 0270,01,0,01,0222,0110,0, + /* 65379 */ 0270,01,01,01,0223,0110,0, + /* 65386 */ 0270,01,0,01,0223,0110,0, + /* 65393 */ 0261,01,05,01,0112,0120,0, + /* 65400 */ 0260,01,05,01,0112,0110,0, + /* 65407 */ 0261,01,04,01,0112,0120,0, + /* 65414 */ 0260,01,04,01,0112,0110,0, + /* 65421 */ 0261,01,0205,01,0112,0120,0, + /* 65428 */ 0260,01,0205,01,0112,0110,0, + /* 65435 */ 0261,01,0204,01,0112,0120,0, + /* 65442 */ 0260,01,0204,01,0112,0110,0, + /* 65449 */ 0261,01,05,01,0101,0120,0, + /* 65456 */ 0260,01,05,01,0101,0110,0, + /* 65463 */ 0261,01,04,01,0101,0120,0, + /* 65470 */ 0260,01,04,01,0101,0110,0, + /* 65477 */ 0261,01,0205,01,0101,0120,0, + /* 65484 */ 0260,01,0205,01,0101,0110,0, + /* 65491 */ 0261,01,0204,01,0101,0120,0, + /* 65498 */ 0260,01,0204,01,0101,0110,0, + /* 65505 */ 0261,01,05,01,0102,0120,0, + /* 65512 */ 0260,01,05,01,0102,0110,0, + /* 65519 */ 0261,01,04,01,0102,0120,0, + /* 65526 */ 0260,01,04,01,0102,0110,0, + /* 65533 */ 0261,01,0205,01,0102,0120,0, + /* 65540 */ 0260,01,0205,01,0102,0110,0, + /* 65547 */ 0261,01,0204,01,0102,0120,0, + /* 65554 */ 0260,01,0204,01,0102,0110,0, + /* 65561 */ 0270,01,01,01,0104,0110,0, + /* 65568 */ 0270,01,01,01,0104,0100,0, + /* 65575 */ 0270,01,0,01,0104,0110,0, + /* 65582 */ 0270,01,0,01,0104,0100,0, + /* 65589 */ 0270,01,0201,01,0104,0110,0, + /* 65596 */ 0270,01,0201,01,0104,0100,0, + /* 65603 */ 0270,01,0200,01,0104,0110,0, + /* 65610 */ 0270,01,0200,01,0104,0100,0, + /* 65617 */ 0261,01,05,01,0105,0120,0, + /* 65624 */ 0260,01,05,01,0105,0110,0, + /* 65631 */ 0261,01,04,01,0105,0120,0, + /* 65638 */ 0260,01,04,01,0105,0110,0, + /* 65645 */ 0261,01,0205,01,0105,0120,0, + /* 65652 */ 0260,01,0205,01,0105,0110,0, + /* 65659 */ 0261,01,0204,01,0105,0120,0, + /* 65666 */ 0260,01,0204,01,0105,0110,0, + /* 65673 */ 0270,01,01,01,0230,0110,0, + /* 65680 */ 0270,01,0,01,0230,0110,0, + /* 65687 */ 0270,01,0201,01,0230,0110,0, + /* 65694 */ 0270,01,0200,01,0230,0110,0, + /* 65701 */ 0270,01,01,01,0231,0110,0, + /* 65708 */ 0270,01,0,01,0231,0110,0, + /* 65715 */ 0270,01,0201,01,0231,0110,0, + /* 65722 */ 0270,01,0200,01,0231,0110,0, + /* 65729 */ 0261,01,05,01,0113,0120,0, + /* 65736 */ 0260,01,05,01,0113,0110,0, + /* 65743 */ 0261,01,04,01,0113,0120,0, + /* 65750 */ 0260,01,04,01,0113,0110,0, + /* 65757 */ 0261,01,0204,01,0113,0120,0, + /* 65764 */ 0260,01,0204,01,0113,0110,0, + /* 65771 */ 0261,01,05,01,0106,0120,0, + /* 65778 */ 0260,01,05,01,0106,0110,0, + /* 65785 */ 0261,01,04,01,0106,0120,0, + /* 65792 */ 0260,01,04,01,0106,0110,0, + /* 65799 */ 0261,01,0205,01,0106,0120,0, + /* 65806 */ 0260,01,0205,01,0106,0110,0, + /* 65813 */ 0261,01,0204,01,0106,0120,0, + /* 65820 */ 0260,01,0204,01,0106,0110,0, + /* 65827 */ 0261,01,05,01,0107,0120,0, + /* 65834 */ 0260,01,05,01,0107,0110,0, + /* 65841 */ 0261,01,04,01,0107,0120,0, + /* 65848 */ 0260,01,04,01,0107,0110,0, + /* 65855 */ 0261,01,0205,01,0107,0120,0, + /* 65862 */ 0260,01,0205,01,0107,0110,0, + /* 65869 */ 0261,01,0204,01,0107,0120,0, + /* 65876 */ 0260,01,0204,01,0107,0110,0, + /* 65883 */ 0333,0321,0355,01,0256,0204,0, + /* 65890 */ 0333,0324,0355,01,0256,0204,0, + /* 65897 */ 0360,0321,0356,01,0371,0101,0, + /* 65904 */ 0360,0324,0356,01,0371,0101,0, + /* 65911 */ 0310,0361,0356,01,0370,0110,0, + /* 65918 */ 0311,0361,0356,01,0370,0110,0, + /* 65925 */ 0313,0361,0356,01,0370,0110,0, + /* 65932 */ 0361,0357,01,0317,0110,022,0, + /* 65939 */ 0361,0357,01,0316,0110,022,0, + /* 65946 */ 0261,02,01,01,0317,0120,0, + /* 65953 */ 0260,02,01,01,0317,0110,0, + /* 65960 */ 0261,02,05,01,0317,0120,0, + /* 65967 */ 0260,02,05,01,0317,0110,0, + /* 65974 */ 0321,0333,0355,01,0256,0205,0, + /* 65981 */ 0324,0333,0355,01,0256,0205,0, + /* 65988 */ 0321,0333,0355,01,036,0201,0, + /* 65995 */ 0324,0333,0355,01,036,0201,0, + /* 66002 */ 0321,0361,0356,01,0365,0101,0, + /* 66009 */ 0324,0361,0356,01,0365,0101,0, + /* 66016 */ 0310,0332,0356,01,0370,0110,0, + /* 66023 */ 0311,0332,0356,01,0370,0110,0, + /* 66030 */ 0313,0332,0356,01,0370,0110,0, + /* 66037 */ 0310,0333,0356,01,0370,0110,0, + /* 66044 */ 0311,0333,0356,01,0370,0110,0, + /* 66051 */ 0313,0333,0356,01,0370,0110,0, + /* 66058 */ 0270,02,0,01,0111,0200,0, + /* 66065 */ 0270,02,01,01,0111,0200,0, + /* 66072 */ 0262,02,02,01,0134,0110,0, + /* 66079 */ 0262,02,03,01,0134,0110,0, + /* 66086 */ 0262,02,01,01,0154,0110,0, + /* 66093 */ 0262,02,0,01,0154,0110,0, + /* 66100 */ 0262,02,03,01,0136,0110,0, + /* 66107 */ 0262,02,02,01,0136,0110,0, + /* 66114 */ 0262,02,01,01,0136,0110,0, + /* 66121 */ 0262,02,0,01,0136,0110,0, + /* 66128 */ 0270,02,03,01,0113,0110,0, + /* 66135 */ 0270,02,01,01,0113,0110,0, + /* 66142 */ 0270,02,0,02,0111,0300,0, + /* 66149 */ 0270,02,02,01,0113,0101,0, + /* 66156 */ 0270,02,03,01,0112,0110,0, + /* 66163 */ 0270,02,01,01,0112,0110,0, + /* 66170 */ 0270,02,0,01,0156,0110,0, + /* 66177 */ 0270,02,0,01,0157,0110,0, + /* 66184 */ 0270,02,01,01,0156,0110,0, + /* 66191 */ 0270,02,01,01,0157,0110,0, + /* 66198 */ 0270,05,0,01,0370,0110,0, + /* 66205 */ 0270,05,0,01,0371,0110,0, + /* 66212 */ 0270,05,01,01,0370,0110,0, + /* 66219 */ 0270,05,01,01,0371,0110,0, + /* 66226 */ 0262,02,0,01,0153,0110,0, + /* 66233 */ 0270,02,01,01,0153,0110,0, + /* 66240 */ 0262,05,0,01,0375,0110,0, + /* 66247 */ 0262,05,03,01,0375,0110,0, + /* 66254 */ 0262,05,02,01,0375,0110,0, + /* 66261 */ 0262,05,01,01,0375,0110,0, + /* 66268 */ 0262,02,01,01,0110,0110,0, + /* 66275 */ 0262,02,03,01,0153,0110,0, + /* 66282 */ 0262,02,02,01,0153,0110,0, + /* 66289 */ 0262,02,02,01,0154,0110,0, + /* 66296 */ 0262,02,03,01,0154,0110,0, + /* 66303 */ 0262,02,0,01,0110,0110,0, + /* 66310 */ 0270,02,02,01,0137,0110,0, + /* 66317 */ 0321,0360,0356,01,0374,0101,0, + /* 66324 */ 0324,0360,0356,01,0374,0101,0, + /* 66331 */ 0321,0361,0356,01,0374,0101,0, + /* 66338 */ 0324,0361,0356,01,0374,0101,0, + /* 66345 */ 0321,0332,0356,01,0374,0101,0, + /* 66352 */ 0324,0332,0356,01,0374,0101,0, + /* 66359 */ 0321,0333,0356,01,0374,0101,0, + /* 66366 */ 0324,0333,0356,01,0374,0101,0, + /* 66373 */ 0323,0333,0355,01,0307,0206,0, + /* 66380 */ 0333,0357,02,0360,0300,020,0, + /* 66387 */ 0330,0314,0326,01,0220,0, + /* 66393 */ 0314,0326,0361,01,0220,0, + /* 66399 */ 0320,0355,01,037,0200,0, + /* 66405 */ 0321,0355,01,037,0200,0, + /* 66411 */ 0324,0355,01,037,0200,0, + /* 66417 */ 0271,0320,01,0211,0101,0, + /* 66423 */ 0271,0321,01,0211,0101,0, + /* 66429 */ 0271,0324,01,0211,0101,0, + /* 66435 */ 0271,01,0306,0200,021,0, + /* 66441 */ 0331,0356,01,0212,0110,0, + /* 66447 */ 0273,0320,01,01,0101,0, + /* 66453 */ 0273,0321,01,01,0101,0, + /* 66459 */ 0273,0324,01,01,0101,0, + /* 66465 */ 0273,01,0200,0200,021,0, + /* 66471 */ 0273,0320,01,011,0101,0, + /* 66477 */ 0273,0321,01,011,0101,0, + /* 66483 */ 0273,0324,01,011,0101,0, + /* 66489 */ 0273,01,0200,0201,021,0, + /* 66495 */ 0273,0320,01,021,0101,0, + /* 66501 */ 0273,0321,01,021,0101,0, + /* 66507 */ 0273,0324,01,021,0101,0, + /* 66513 */ 0273,01,0200,0202,021,0, + /* 66519 */ 0273,0320,01,031,0101,0, + /* 66525 */ 0273,0321,01,031,0101,0, + /* 66531 */ 0273,0324,01,031,0101,0, + /* 66537 */ 0273,01,0200,0203,021,0, + /* 66543 */ 0273,0320,01,041,0101,0, + /* 66549 */ 0273,0321,01,041,0101,0, + /* 66555 */ 0273,0324,01,041,0101,0, + /* 66561 */ 0273,01,0200,0204,021,0, + /* 66567 */ 0273,0320,01,051,0101,0, + /* 66573 */ 0273,0321,01,051,0101,0, + /* 66579 */ 0273,0324,01,051,0101,0, + /* 66585 */ 0273,01,0200,0205,021,0, + /* 66591 */ 0273,0320,01,061,0101,0, + /* 66597 */ 0273,0321,01,061,0101,0, + /* 66603 */ 0273,0324,01,061,0101,0, + /* 66609 */ 0273,01,0200,0206,021,0, + /* 66615 */ 0273,0320,01,071,0101,0, + /* 66621 */ 0273,0321,01,071,0101,0, + /* 66627 */ 0273,0324,01,071,0101,0, + /* 66633 */ 0273,01,0200,0207,021,0, + /* 66639 */ 0320,01,0367,0200,031,0, + /* 66645 */ 0321,01,0367,0200,041,0, + /* 66651 */ 0324,01,0367,0200,0255,0, + /* 66657 */ 0273,0320,01,0377,0200,0, + /* 66663 */ 0273,0321,01,0377,0200,0, + /* 66669 */ 0273,0324,01,0377,0200,0, + /* 66675 */ 0273,0320,01,0377,0201,0, + /* 66681 */ 0273,0321,01,0377,0201,0, + /* 66687 */ 0273,0324,01,0377,0201,0, + /* 66693 */ 0320,0355,01,0257,0110,0, + /* 66699 */ 0321,0355,01,0257,0110,0, + /* 66705 */ 0324,0355,01,0257,0110,0, + /* 66711 */ 0320,01,0153,0100,0275,0, + /* 66717 */ 0321,01,0153,0100,0275,0, + /* 66723 */ 0324,01,0153,0100,0275,0, + /* 66729 */ 0320,01,0151,0100,031,0, + /* 66735 */ 0321,01,0151,0100,041,0, + /* 66741 */ 0324,01,0151,0100,0255,0, + /* 66747 */ 0273,0320,01,0367,0203,0, + /* 66753 */ 0273,0321,01,0367,0203,0, + /* 66759 */ 0273,0324,01,0367,0203,0, + /* 66765 */ 0273,0320,01,0367,0202,0, + /* 66771 */ 0273,0321,01,0367,0202,0, + /* 66777 */ 0273,0324,01,0367,0202,0, + /* 66783 */ 0320,0355,01,0245,0101,0, + /* 66789 */ 0321,0355,01,0245,0101,0, + /* 66795 */ 0324,0355,01,0245,0101,0, + /* 66801 */ 0320,0355,01,0255,0101,0, + /* 66807 */ 0321,0355,01,0255,0101,0, + /* 66813 */ 0324,0355,01,0255,0101,0, + /* 66819 */ 0320,0355,01,0243,0101,0, + /* 66825 */ 0321,0355,01,0243,0101,0, + /* 66831 */ 0324,0355,01,0243,0101,0, + /* 66837 */ 0320,0355,01,0273,0101,0, + /* 66843 */ 0321,0355,01,0273,0101,0, + /* 66849 */ 0324,0355,01,0273,0101,0, + /* 66855 */ 0320,0355,01,0263,0101,0, + /* 66861 */ 0321,0355,01,0263,0101,0, + /* 66867 */ 0324,0355,01,0263,0101,0, + /* 66873 */ 0320,0355,01,0253,0101,0, + /* 66879 */ 0321,0355,01,0253,0101,0, + /* 66885 */ 0324,0355,01,0253,0101,0, + /* 66891 */ 0320,0355,01,0247,0101,0, + /* 66897 */ 0321,0355,01,0247,0101,0, + /* 66903 */ 0320,0355,01,0246,0101,0, + /* 66909 */ 0321,0355,01,0246,0101,0, + /* 66915 */ 0320,0355,01,0276,0110,0, + /* 66921 */ 0321,0355,01,0276,0110,0, + /* 66927 */ 0324,0355,01,0276,0110,0, + /* 66933 */ 0320,0355,01,0277,0110,0, + /* 66939 */ 0321,0355,01,0277,0110,0, + /* 66945 */ 0324,0355,01,0277,0110,0, + /* 66951 */ 0320,0355,01,0266,0110,0, + /* 66957 */ 0321,0355,01,0266,0110,0, + /* 66963 */ 0324,0355,01,0266,0110,0, + /* 66969 */ 0320,0355,01,0267,0110,0, + /* 66975 */ 0321,0355,01,0267,0110,0, + /* 66981 */ 0324,0355,01,0267,0110,0, + /* 66987 */ 0327,0320,01,0213,0110,0, + /* 66993 */ 0327,0321,01,0213,0110,0, + /* 66999 */ 0327,0324,01,0213,0110,0, + /* 67005 */ 0273,0355,01,0260,0101,0, + /* 67011 */ 0324,0355,01,0307,0201,0, + /* 67017 */ 0273,0355,01,0300,0101,0, + /* 67023 */ 0272,0320,01,0207,0110,0, + /* 67029 */ 0272,0321,01,0207,0110,0, + /* 67035 */ 0272,0324,01,0207,0110,0, + /* 67041 */ 0272,0320,01,0207,0101,0, + /* 67047 */ 0272,0321,01,0207,0101,0, + /* 67053 */ 0272,0324,01,0207,0101,0, + /* 67059 */ 0327,0320,01,0351,064,0, + /* 67065 */ 0327,0321,01,0351,064,0, + /* 67071 */ 0327,0324,01,0351,064,0, + /* 67077 */ 0327,0320,01,0377,0204,0, + /* 67083 */ 0327,0321,01,0377,0204,0, + /* 67089 */ 0327,0324,01,0377,0204,0, + /* 67095 */ 0320,01,0352,034,074,0, + /* 67101 */ 0321,01,0352,034,074,0, + /* 67107 */ 0320,01,0352,031,030,0, + /* 67113 */ 0321,01,0352,041,030,0, + /* 67119 */ 0327,0320,01,0350,064,0, + /* 67125 */ 0327,0321,01,0350,064,0, + /* 67131 */ 0327,0324,01,0350,064,0, + /* 67137 */ 0327,0320,01,0377,0202,0, + /* 67143 */ 0327,0321,01,0377,0202,0, + /* 67149 */ 0327,0324,01,0377,0202,0, + /* 67155 */ 0320,01,0232,034,074,0, + /* 67161 */ 0321,01,0232,034,074,0, + /* 67167 */ 0320,01,0232,031,030,0, + /* 67173 */ 0321,01,0232,041,030,0, + /* 67179 */ 0327,0322,01,0302,030,0, + /* 67185 */ 0327,0320,01,0302,030,0, + /* 67191 */ 0327,0321,01,0302,030,0, + /* 67197 */ 0327,0324,01,0302,030,0, + /* 67203 */ 0332,0355,02,01,0312,0, + /* 67209 */ 0333,0355,02,01,0312,0, + /* 67215 */ 0360,0355,02,01,0312,0, + /* 67221 */ 0360,0355,02,01,0313,0, + /* 67227 */ 0360,0355,02,0256,0350,0, + /* 67233 */ 0360,0355,02,0256,0360,0, + /* 67239 */ 0360,0355,02,0256,0370,0, + /* 67245 */ 0360,0355,02,01,0350,0, + /* 67251 */ 0360,0355,01,0256,0207,0, + /* 67257 */ 0361,0355,01,0256,0207,0, + /* 67263 */ 0361,0355,01,0256,0206,0, + /* 67269 */ 0361,0355,02,0256,0370,0, + /* 67275 */ 0310,0355,02,01,0374,0, + /* 67281 */ 0311,0355,02,01,0374,0, + /* 67287 */ 0313,0355,02,01,0374,0, + /* 67293 */ 0361,0356,01,0202,0110,0, + /* 67299 */ 0310,0355,02,01,0337,0, + /* 67305 */ 0311,0355,02,01,0337,0, + /* 67311 */ 0313,0355,02,01,0337,0, + /* 67317 */ 0312,0355,02,01,0337,0, + /* 67323 */ 0320,0355,01,0307,0206,0, + /* 67329 */ 0321,0355,01,0307,0206,0, + /* 67335 */ 0324,0355,01,0307,0206,0, + /* 67341 */ 0320,0355,01,0307,0207,0, + /* 67347 */ 0333,0355,01,0307,0207,0, + /* 67353 */ 0323,0355,01,01,0204,0, + /* 67359 */ 0320,0355,01,01,0204,0, + /* 67365 */ 0321,0355,01,01,0204,0, + /* 67371 */ 0324,0355,01,01,0204,0, + /* 67377 */ 0334,0355,01,040,0101,0, + /* 67383 */ 0334,0355,01,042,0110,0, + /* 67389 */ 0323,0355,01,040,0101,0, + /* 67395 */ 0323,0355,01,042,0110,0, + /* 67401 */ 0323,0355,01,041,0101,0, + /* 67407 */ 0323,0355,01,043,0110,0, + /* 67413 */ 0360,0355,02,01,0306,0, + /* 67419 */ 0332,0355,02,01,0306,0, + /* 67425 */ 0333,0355,02,01,0306,0, + /* 67431 */ 0360,0355,01,020,0101,0, + /* 67437 */ 0360,0355,01,022,0110,0, + /* 67443 */ 0321,0355,01,067,0200,0, + /* 67449 */ 0321,0355,01,066,0200,0, + /* 67455 */ 0312,0355,02,01,0310,0, + /* 67461 */ 0310,0355,02,01,0310,0, + /* 67467 */ 0311,0355,02,01,0310,0, + /* 67473 */ 0313,0355,02,01,0310,0, + /* 67479 */ 0312,0355,02,01,0372,0, + /* 67485 */ 0310,0355,02,01,0372,0, + /* 67491 */ 0311,0355,02,01,0372,0, + /* 67497 */ 0313,0355,02,01,0372,0, + /* 67503 */ 0332,0355,01,0256,0206,0, + /* 67509 */ 0337,0321,01,0214,0101,0, + /* 67515 */ 0337,0324,01,0214,0101,0, + /* 67521 */ 0336,0320,01,0216,0110,0, + /* 67527 */ 0336,0321,01,0216,0110,0, + /* 67533 */ 0336,0324,01,0216,0110,0, + /* 67539 */ 0320,0355,01,0264,0110,0, + /* 67545 */ 0321,0355,01,0264,0110,0, + /* 67551 */ 0324,0355,01,0264,0110,0, + /* 67557 */ 0320,0355,01,0265,0110,0, + /* 67563 */ 0321,0355,01,0265,0110,0, + /* 67569 */ 0324,0355,01,0265,0110,0, + /* 67575 */ 0320,0355,01,0262,0110,0, + /* 67581 */ 0321,0355,01,0262,0110,0, + /* 67587 */ 0324,0355,01,0262,0110,0, + /* 67593 */ 0336,0320,01,0143,0101,0, + /* 67599 */ 0336,0321,01,0143,0101,0, + /* 67605 */ 0320,0355,01,02,0110,0, + /* 67611 */ 0320,0355,01,03,0110,0, + /* 67617 */ 0332,0355,01,0,0206,0, + /* 67623 */ 0320,0355,01,0,0200,0, + /* 67629 */ 0320,0355,01,0,0201,0, + /* 67635 */ 0360,0355,01,0156,0110,0, + /* 67641 */ 0360,0355,01,0176,0101,0, + /* 67647 */ 0360,0355,01,0157,0110,0, + /* 67653 */ 0360,0355,01,0177,0101,0, + /* 67659 */ 0360,0355,01,0153,0110,0, + /* 67665 */ 0360,0355,01,0143,0110,0, + /* 67671 */ 0360,0355,01,0147,0110,0, + /* 67677 */ 0360,0355,01,0374,0110,0, + /* 67683 */ 0360,0355,01,0376,0110,0, + /* 67689 */ 0360,0355,01,0354,0110,0, + /* 67695 */ 0360,0355,01,0355,0110,0, + /* 67701 */ 0360,0355,01,0334,0110,0, + /* 67707 */ 0360,0355,01,0335,0110,0, + /* 67713 */ 0360,0355,01,0375,0110,0, + /* 67719 */ 0360,0355,01,0333,0110,0, + /* 67725 */ 0360,0355,01,0337,0110,0, + /* 67731 */ 0360,0355,01,0164,0110,0, + /* 67737 */ 0360,0355,01,0166,0110,0, + /* 67743 */ 0360,0355,01,0165,0110,0, + /* 67749 */ 0360,0355,01,0144,0110,0, + /* 67755 */ 0360,0355,01,0146,0110,0, + /* 67761 */ 0360,0355,01,0145,0110,0, + /* 67767 */ 0360,0355,01,0365,0110,0, + /* 67773 */ 0360,0355,01,0345,0110,0, + /* 67779 */ 0360,0355,01,0325,0110,0, + /* 67785 */ 0360,0355,01,0353,0110,0, + /* 67791 */ 0360,0355,01,0362,0110,0, + /* 67797 */ 0360,0355,01,0363,0110,0, + /* 67803 */ 0360,0355,01,0361,0110,0, + /* 67809 */ 0360,0355,01,0342,0110,0, + /* 67815 */ 0360,0355,01,0341,0110,0, + /* 67821 */ 0360,0355,01,0322,0110,0, + /* 67827 */ 0360,0355,01,0323,0110,0, + /* 67833 */ 0360,0355,01,0321,0110,0, + /* 67839 */ 0360,0355,01,0370,0110,0, + /* 67845 */ 0360,0355,01,0372,0110,0, + /* 67851 */ 0360,0355,01,0350,0110,0, + /* 67857 */ 0360,0355,01,0351,0110,0, + /* 67863 */ 0360,0355,01,0330,0110,0, + /* 67869 */ 0360,0355,01,0331,0110,0, + /* 67875 */ 0360,0355,01,0371,0110,0, + /* 67881 */ 0360,0355,01,0150,0110,0, + /* 67887 */ 0360,0355,01,0152,0110,0, + /* 67893 */ 0360,0355,01,0151,0110,0, + /* 67899 */ 0360,0355,01,0140,0110,0, + /* 67905 */ 0360,0355,01,0142,0110,0, + /* 67911 */ 0360,0355,01,0141,0110,0, + /* 67917 */ 0327,0320,01,0377,0206,0, + /* 67923 */ 0327,0321,01,0377,0206,0, + /* 67929 */ 0327,0324,01,0377,0206,0, + /* 67935 */ 0327,0330,01,0152,0274,0, + /* 67941 */ 0327,0320,01,0152,0274,0, + /* 67947 */ 0327,0321,01,0152,0274,0, + /* 67953 */ 0327,0324,01,0152,0274,0, + /* 67959 */ 0327,0320,01,0150,030,0, + /* 67965 */ 0327,0321,01,0150,040,0, + /* 67971 */ 0327,0324,01,0150,0254,0, + /* 67977 */ 0327,0320,01,0217,0200,0, + /* 67983 */ 0327,0321,01,0217,0200,0, + /* 67989 */ 0327,0324,01,0217,0200,0, + /* 67995 */ 0323,0347,0350,010,0120,0, + /* 68001 */ 0323,0347,0350,010,0130,0, + /* 68007 */ 0360,0355,01,0357,0110,0, + /* 68013 */ 0320,0355,01,0377,0110,0, + /* 68019 */ 0321,0355,01,0377,0110,0, + /* 68025 */ 0324,0355,01,0377,0110,0, + /* 68031 */ 0320,0355,01,0271,0110,0, + /* 68037 */ 0321,0355,01,0271,0110,0, + /* 68043 */ 0324,0355,01,0271,0110,0, + /* 68049 */ 0320,0355,01,013,0110,0, + /* 68055 */ 0321,0355,01,013,0110,0, + /* 68061 */ 0324,0355,01,013,0110,0, + /* 68067 */ 0320,0355,01,0107,0110,0, + /* 68073 */ 0320,0355,01,0103,0110,0, + /* 68079 */ 0320,0355,01,0102,0110,0, + /* 68085 */ 0320,0355,01,0106,0110,0, + /* 68091 */ 0320,0355,01,0104,0110,0, + /* 68097 */ 0320,0355,01,0117,0110,0, + /* 68103 */ 0320,0355,01,0115,0110,0, + /* 68109 */ 0320,0355,01,0114,0110,0, + /* 68115 */ 0320,0355,01,0116,0110,0, + /* 68121 */ 0320,0355,01,0105,0110,0, + /* 68127 */ 0320,0355,01,0101,0110,0, + /* 68133 */ 0320,0355,01,0113,0110,0, + /* 68139 */ 0320,0355,01,0111,0110,0, + /* 68145 */ 0320,0355,01,0100,0110,0, + /* 68151 */ 0320,0355,01,0112,0110,0, + /* 68157 */ 0320,0355,01,0110,0110,0, + /* 68163 */ 0321,0355,01,0107,0110,0, + /* 68169 */ 0321,0355,01,0103,0110,0, + /* 68175 */ 0321,0355,01,0102,0110,0, + /* 68181 */ 0321,0355,01,0106,0110,0, + /* 68187 */ 0321,0355,01,0104,0110,0, + /* 68193 */ 0321,0355,01,0117,0110,0, + /* 68199 */ 0321,0355,01,0115,0110,0, + /* 68205 */ 0321,0355,01,0114,0110,0, + /* 68211 */ 0321,0355,01,0116,0110,0, + /* 68217 */ 0321,0355,01,0105,0110,0, + /* 68223 */ 0321,0355,01,0101,0110,0, + /* 68229 */ 0321,0355,01,0113,0110,0, + /* 68235 */ 0321,0355,01,0111,0110,0, + /* 68241 */ 0321,0355,01,0100,0110,0, + /* 68247 */ 0321,0355,01,0112,0110,0, + /* 68253 */ 0321,0355,01,0110,0110,0, + /* 68259 */ 0324,0355,01,0107,0110,0, + /* 68265 */ 0324,0355,01,0103,0110,0, + /* 68271 */ 0324,0355,01,0102,0110,0, + /* 68277 */ 0324,0355,01,0106,0110,0, + /* 68283 */ 0324,0355,01,0104,0110,0, + /* 68289 */ 0324,0355,01,0117,0110,0, + /* 68295 */ 0324,0355,01,0115,0110,0, + /* 68301 */ 0324,0355,01,0114,0110,0, + /* 68307 */ 0324,0355,01,0116,0110,0, + /* 68313 */ 0324,0355,01,0105,0110,0, + /* 68319 */ 0324,0355,01,0101,0110,0, + /* 68325 */ 0324,0355,01,0113,0110,0, + /* 68331 */ 0324,0355,01,0111,0110,0, + /* 68337 */ 0324,0355,01,0100,0110,0, + /* 68343 */ 0324,0355,01,0112,0110,0, + /* 68349 */ 0324,0355,01,0110,0110,0, + /* 68355 */ 0360,0355,01,0130,0110,0, + /* 68361 */ 0333,0355,01,0130,0110,0, + /* 68367 */ 0360,0355,01,0125,0110,0, + /* 68373 */ 0360,0355,01,0124,0110,0, + /* 68379 */ 0360,0355,01,057,0110,0, + /* 68385 */ 0360,0355,01,052,0110,0, + /* 68391 */ 0360,0355,01,055,0110,0, + /* 68397 */ 0360,0355,01,054,0110,0, + /* 68403 */ 0360,0355,01,0136,0110,0, + /* 68409 */ 0333,0355,01,0136,0110,0, + /* 68415 */ 0360,0355,01,0256,0202,0, + /* 68421 */ 0360,0355,01,0137,0110,0, + /* 68427 */ 0333,0355,01,0137,0110,0, + /* 68433 */ 0360,0355,01,0135,0110,0, + /* 68439 */ 0333,0355,01,0135,0110,0, + /* 68445 */ 0360,0355,01,050,0110,0, + /* 68451 */ 0360,0355,01,051,0101,0, + /* 68457 */ 0360,0355,01,026,0110,0, + /* 68463 */ 0360,0355,01,027,0101,0, + /* 68469 */ 0360,0355,01,023,0101,0, + /* 68475 */ 0360,0355,01,0120,0110,0, + /* 68481 */ 0360,0355,01,053,0101,0, + /* 68487 */ 0333,0355,01,020,0110,0, + /* 68493 */ 0333,0355,01,021,0101,0, + /* 68499 */ 0360,0355,01,020,0110,0, + /* 68505 */ 0360,0355,01,021,0101,0, + /* 68511 */ 0360,0355,01,0131,0110,0, + /* 68517 */ 0333,0355,01,0131,0110,0, + /* 68523 */ 0360,0355,01,0126,0110,0, + /* 68529 */ 0360,0355,01,0123,0110,0, + /* 68535 */ 0333,0355,01,0123,0110,0, + /* 68541 */ 0360,0355,01,0122,0110,0, + /* 68547 */ 0333,0355,01,0122,0110,0, + /* 68553 */ 0360,0355,01,0121,0110,0, + /* 68559 */ 0333,0355,01,0121,0110,0, + /* 68565 */ 0360,0355,01,0256,0203,0, + /* 68571 */ 0360,0355,01,0134,0110,0, + /* 68577 */ 0333,0355,01,0134,0110,0, + /* 68583 */ 0360,0355,01,056,0110,0, + /* 68589 */ 0360,0355,01,025,0110,0, + /* 68595 */ 0360,0355,01,024,0110,0, + /* 68601 */ 0360,0355,01,0127,0110,0, + /* 68607 */ 0360,0355,01,0367,0110,0, + /* 68613 */ 0360,0355,01,0347,0101,0, + /* 68619 */ 0360,0355,01,0340,0110,0, + /* 68625 */ 0360,0355,01,0343,0110,0, + /* 68631 */ 0360,0355,01,0356,0110,0, + /* 68637 */ 0360,0355,01,0336,0110,0, + /* 68643 */ 0360,0355,01,0352,0110,0, + /* 68649 */ 0360,0355,01,0332,0110,0, + /* 68655 */ 0360,0355,01,0327,0110,0, + /* 68661 */ 0360,0355,01,0344,0110,0, + /* 68667 */ 0360,0355,01,0366,0110,0, + /* 68673 */ 0361,0355,01,0367,0110,0, + /* 68679 */ 0361,0355,01,0347,0101,0, + /* 68685 */ 0361,0355,01,053,0101,0, + /* 68691 */ 0361,0355,01,0157,0110,0, + /* 68697 */ 0361,0355,01,0177,0101,0, + /* 68703 */ 0333,0355,01,0157,0110,0, + /* 68709 */ 0333,0355,01,0177,0101,0, + /* 68715 */ 0332,0355,01,0326,0110,0, + /* 68721 */ 0333,0355,01,0176,0110,0, + /* 68727 */ 0361,0355,01,0326,0101,0, + /* 68733 */ 0333,0355,01,0326,0110,0, + /* 68739 */ 0361,0355,01,0143,0110,0, + /* 68745 */ 0361,0355,01,0153,0110,0, + /* 68751 */ 0361,0355,01,0147,0110,0, + /* 68757 */ 0361,0355,01,0374,0110,0, + /* 68763 */ 0361,0355,01,0375,0110,0, + /* 68769 */ 0361,0355,01,0376,0110,0, + /* 68775 */ 0360,0355,01,0324,0110,0, + /* 68781 */ 0361,0355,01,0324,0110,0, + /* 68787 */ 0361,0355,01,0354,0110,0, + /* 68793 */ 0361,0355,01,0355,0110,0, + /* 68799 */ 0361,0355,01,0334,0110,0, + /* 68805 */ 0361,0355,01,0335,0110,0, + /* 68811 */ 0361,0355,01,0333,0110,0, + /* 68817 */ 0361,0355,01,0337,0110,0, + /* 68823 */ 0361,0355,01,0340,0110,0, + /* 68829 */ 0361,0355,01,0343,0110,0, + /* 68835 */ 0361,0355,01,0164,0110,0, + /* 68841 */ 0361,0355,01,0165,0110,0, + /* 68847 */ 0361,0355,01,0166,0110,0, + /* 68853 */ 0361,0355,01,0144,0110,0, + /* 68859 */ 0361,0355,01,0145,0110,0, + /* 68865 */ 0361,0355,01,0146,0110,0, + /* 68871 */ 0361,0355,01,0365,0110,0, + /* 68877 */ 0361,0355,01,0356,0110,0, + /* 68883 */ 0361,0355,01,0336,0110,0, + /* 68889 */ 0361,0355,01,0352,0110,0, + /* 68895 */ 0361,0355,01,0332,0110,0, + /* 68901 */ 0361,0355,01,0327,0110,0, + /* 68907 */ 0361,0355,01,0344,0110,0, + /* 68913 */ 0361,0355,01,0345,0110,0, + /* 68919 */ 0361,0355,01,0325,0110,0, + /* 68925 */ 0360,0355,01,0364,0110,0, + /* 68931 */ 0361,0355,01,0364,0110,0, + /* 68937 */ 0361,0355,01,0353,0110,0, + /* 68943 */ 0361,0355,01,0366,0110,0, + /* 68949 */ 0361,0355,01,0361,0110,0, + /* 68955 */ 0361,0355,01,0362,0110,0, + /* 68961 */ 0361,0355,01,0363,0110,0, + /* 68967 */ 0361,0355,01,0341,0110,0, + /* 68973 */ 0361,0355,01,0342,0110,0, + /* 68979 */ 0361,0355,01,0321,0110,0, + /* 68985 */ 0361,0355,01,0322,0110,0, + /* 68991 */ 0361,0355,01,0323,0110,0, + /* 68997 */ 0361,0355,01,0370,0110,0, + /* 69003 */ 0361,0355,01,0371,0110,0, + /* 69009 */ 0361,0355,01,0372,0110,0, + /* 69015 */ 0360,0355,01,0373,0110,0, + /* 69021 */ 0361,0355,01,0373,0110,0, + /* 69027 */ 0361,0355,01,0350,0110,0, + /* 69033 */ 0361,0355,01,0351,0110,0, + /* 69039 */ 0361,0355,01,0330,0110,0, + /* 69045 */ 0361,0355,01,0331,0110,0, + /* 69051 */ 0361,0355,01,0150,0110,0, + /* 69057 */ 0361,0355,01,0151,0110,0, + /* 69063 */ 0361,0355,01,0152,0110,0, + /* 69069 */ 0361,0355,01,0155,0110,0, + /* 69075 */ 0361,0355,01,0140,0110,0, + /* 69081 */ 0361,0355,01,0141,0110,0, + /* 69087 */ 0361,0355,01,0142,0110,0, + /* 69093 */ 0361,0355,01,0154,0110,0, + /* 69099 */ 0361,0355,01,0357,0110,0, + /* 69105 */ 0361,0355,01,0130,0110,0, + /* 69111 */ 0332,0355,01,0130,0110,0, + /* 69117 */ 0361,0355,01,0125,0110,0, + /* 69123 */ 0361,0355,01,0124,0110,0, + /* 69129 */ 0361,0355,01,057,0110,0, + /* 69135 */ 0333,0355,01,0346,0110,0, + /* 69141 */ 0360,0355,01,0133,0110,0, + /* 69147 */ 0332,0355,01,0346,0110,0, + /* 69153 */ 0361,0355,01,055,0110,0, + /* 69159 */ 0361,0355,01,0132,0110,0, + /* 69165 */ 0361,0355,01,052,0110,0, + /* 69171 */ 0361,0355,01,0133,0110,0, + /* 69177 */ 0360,0355,01,0132,0110,0, + /* 69183 */ 0332,0355,01,0132,0110,0, + /* 69189 */ 0333,0355,01,0132,0110,0, + /* 69195 */ 0361,0355,01,054,0110,0, + /* 69201 */ 0361,0355,01,0346,0110,0, + /* 69207 */ 0333,0355,01,0133,0110,0, + /* 69213 */ 0361,0355,01,0136,0110,0, + /* 69219 */ 0332,0355,01,0136,0110,0, + /* 69225 */ 0361,0355,01,0137,0110,0, + /* 69231 */ 0332,0355,01,0137,0110,0, + /* 69237 */ 0361,0355,01,0135,0110,0, + /* 69243 */ 0332,0355,01,0135,0110,0, + /* 69249 */ 0361,0355,01,050,0110,0, + /* 69255 */ 0361,0355,01,051,0101,0, + /* 69261 */ 0361,0355,01,027,0101,0, + /* 69267 */ 0361,0355,01,026,0110,0, + /* 69273 */ 0361,0355,01,023,0101,0, + /* 69279 */ 0361,0355,01,022,0110,0, + /* 69285 */ 0361,0355,01,0120,0110,0, + /* 69291 */ 0332,0355,01,020,0110,0, + /* 69297 */ 0332,0355,01,021,0101,0, + /* 69303 */ 0361,0355,01,020,0110,0, + /* 69309 */ 0361,0355,01,021,0101,0, + /* 69315 */ 0361,0355,01,0131,0110,0, + /* 69321 */ 0332,0355,01,0131,0110,0, + /* 69327 */ 0361,0355,01,0126,0110,0, + /* 69333 */ 0361,0355,01,0121,0110,0, + /* 69339 */ 0332,0355,01,0121,0110,0, + /* 69345 */ 0361,0355,01,0134,0110,0, + /* 69351 */ 0332,0355,01,0134,0110,0, + /* 69357 */ 0361,0355,01,056,0110,0, + /* 69363 */ 0361,0355,01,025,0110,0, + /* 69369 */ 0361,0355,01,024,0110,0, + /* 69375 */ 0361,0355,01,0127,0110,0, + /* 69381 */ 0361,0355,01,0320,0110,0, + /* 69387 */ 0332,0355,01,0320,0110,0, + /* 69393 */ 0361,0355,01,0174,0110,0, + /* 69399 */ 0332,0355,01,0174,0110,0, + /* 69405 */ 0361,0355,01,0175,0110,0, + /* 69411 */ 0332,0355,01,0175,0110,0, + /* 69417 */ 0332,0355,01,0360,0110,0, + /* 69423 */ 0332,0355,01,022,0110,0, + /* 69429 */ 0333,0355,01,026,0110,0, + /* 69435 */ 0333,0355,01,022,0110,0, + /* 69441 */ 0361,0355,01,0307,0206,0, + /* 69447 */ 0360,0355,01,0307,0206,0, + /* 69453 */ 0360,0355,01,0307,0207,0, + /* 69459 */ 0332,0355,02,01,0377,0, + /* 69465 */ 0333,0355,02,01,0376,0, + /* 69471 */ 0332,0355,02,01,0301,0, + /* 69477 */ 0333,0355,02,01,0301,0, + /* 69483 */ 0360,0356,01,034,0110,0, + /* 69489 */ 0361,0356,01,034,0110,0, + /* 69495 */ 0360,0356,01,035,0110,0, + /* 69501 */ 0361,0356,01,035,0110,0, + /* 69507 */ 0360,0356,01,036,0110,0, + /* 69513 */ 0361,0356,01,036,0110,0, + /* 69519 */ 0360,0356,01,01,0110,0, + /* 69525 */ 0361,0356,01,01,0110,0, + /* 69531 */ 0360,0356,01,02,0110,0, + /* 69537 */ 0361,0356,01,02,0110,0, + /* 69543 */ 0360,0356,01,03,0110,0, + /* 69549 */ 0361,0356,01,03,0110,0, + /* 69555 */ 0360,0356,01,05,0110,0, + /* 69561 */ 0361,0356,01,05,0110,0, + /* 69567 */ 0360,0356,01,06,0110,0, + /* 69573 */ 0361,0356,01,06,0110,0, + /* 69579 */ 0360,0356,01,07,0110,0, + /* 69585 */ 0361,0356,01,07,0110,0, + /* 69591 */ 0360,0356,01,04,0110,0, + /* 69597 */ 0361,0356,01,04,0110,0, + /* 69603 */ 0360,0356,01,013,0110,0, + /* 69609 */ 0361,0356,01,013,0110,0, + /* 69615 */ 0360,0356,01,0,0110,0, + /* 69621 */ 0361,0356,01,0,0110,0, + /* 69627 */ 0360,0356,01,010,0110,0, + /* 69633 */ 0361,0356,01,010,0110,0, + /* 69639 */ 0360,0356,01,011,0110,0, + /* 69645 */ 0361,0356,01,011,0110,0, + /* 69651 */ 0360,0356,01,012,0110,0, + /* 69657 */ 0361,0356,01,012,0110,0, + /* 69663 */ 0361,0355,01,0171,0110,0, + /* 69669 */ 0332,0355,01,0171,0110,0, + /* 69675 */ 0332,0355,01,053,0101,0, + /* 69681 */ 0333,0355,01,053,0101,0, + /* 69687 */ 0361,0356,01,025,0110,0, + /* 69693 */ 0361,0356,01,024,0110,0, + /* 69699 */ 0361,0356,01,052,0110,0, + /* 69705 */ 0361,0356,01,053,0110,0, + /* 69711 */ 0361,0356,01,020,0110,0, + /* 69717 */ 0361,0356,01,051,0110,0, + /* 69723 */ 0361,0356,01,0101,0110,0, + /* 69729 */ 0361,0356,01,074,0110,0, + /* 69735 */ 0361,0356,01,075,0110,0, + /* 69741 */ 0361,0356,01,077,0110,0, + /* 69747 */ 0361,0356,01,076,0110,0, + /* 69753 */ 0361,0356,01,070,0110,0, + /* 69759 */ 0361,0356,01,071,0110,0, + /* 69765 */ 0361,0356,01,073,0110,0, + /* 69771 */ 0361,0356,01,072,0110,0, + /* 69777 */ 0361,0356,01,040,0110,0, + /* 69783 */ 0361,0356,01,041,0110,0, + /* 69789 */ 0361,0356,01,042,0110,0, + /* 69795 */ 0361,0356,01,043,0110,0, + /* 69801 */ 0361,0356,01,044,0110,0, + /* 69807 */ 0361,0356,01,045,0110,0, + /* 69813 */ 0361,0356,01,060,0110,0, + /* 69819 */ 0361,0356,01,061,0110,0, + /* 69825 */ 0361,0356,01,062,0110,0, + /* 69831 */ 0361,0356,01,063,0110,0, + /* 69837 */ 0361,0356,01,064,0110,0, + /* 69843 */ 0361,0356,01,065,0110,0, + /* 69849 */ 0361,0356,01,050,0110,0, + /* 69855 */ 0361,0356,01,0100,0110,0, + /* 69861 */ 0361,0356,01,027,0110,0, + /* 69867 */ 0361,0356,01,067,0110,0, + /* 69873 */ 0361,0356,01,0334,0110,0, + /* 69879 */ 0361,0356,01,0335,0110,0, + /* 69885 */ 0361,0356,01,0336,0110,0, + /* 69891 */ 0361,0356,01,0337,0110,0, + /* 69897 */ 0361,0356,01,0333,0110,0, + /* 69903 */ 0333,0356,01,0335,0110,0, + /* 69909 */ 0333,0356,01,0337,0110,0, + /* 69915 */ 0333,0356,01,0334,0110,0, + /* 69921 */ 0333,0356,01,0336,0110,0, + /* 69927 */ 0333,0356,01,0372,0110,0, + /* 69933 */ 0333,0356,01,0373,0110,0, + /* 69939 */ 0333,0356,01,0330,0201,0, + /* 69945 */ 0333,0356,01,0330,0203,0, + /* 69951 */ 0333,0356,01,0330,0200,0, + /* 69957 */ 0333,0356,01,0330,0202,0, + /* 69963 */ 0270,01,04,01,0167,0, + /* 69969 */ 0270,01,0,01,0167,0, + /* 69975 */ 0333,0355,02,0247,0310,0, + /* 69981 */ 0333,0355,02,0247,0320,0, + /* 69987 */ 0333,0355,02,0247,0330,0, + /* 69993 */ 0333,0355,02,0247,0340,0, + /* 69999 */ 0333,0355,02,0247,0350,0, + /* 70005 */ 0333,0355,02,0246,0300,0, + /* 70011 */ 0333,0355,02,0246,0310,0, + /* 70017 */ 0333,0355,02,0246,0320,0, + /* 70023 */ 0333,0355,01,033,0110,0, + /* 70029 */ 0361,0355,01,032,0110,0, + /* 70035 */ 0361,0355,01,033,0101,0, + /* 70041 */ 0355,01,032,016,0110,0, + /* 70047 */ 0355,01,033,015,0102,0, + /* 70053 */ 0355,01,033,016,0101,0, + /* 70059 */ 0357,01,0314,0110,022,0, + /* 70065 */ 0360,0355,01,034,0200,0, + /* 70071 */ 0360,0355,02,01,0305,0, + /* 70077 */ 0360,0355,02,01,0307,0, + /* 70083 */ 0361,0356,01,0317,0110,0, + /* 70089 */ 0360,0355,02,01,0317,0, + /* 70095 */ 0360,0355,02,01,0327,0, + /* 70101 */ 0360,0355,02,01,0300,0, + /* 70107 */ 0333,0355,02,036,0373,0, + /* 70113 */ 0333,0355,02,036,0372,0, + /* 70119 */ 0333,0355,01,01,0205,0, + /* 70125 */ 0333,0355,02,01,0352,0, + /* 70131 */ 0333,0355,02,01,0350,0, + /* 70137 */ 0321,0356,01,0366,0101,0, + /* 70143 */ 0324,0356,01,0366,0101,0, + /* 70149 */ 0332,0355,02,01,0351,0, + /* 70155 */ 0332,0355,02,01,0350,0, + /* 70161 */ 0333,0355,02,01,0356,0, + /* 70167 */ 0333,0355,02,01,0357,0, + /* 70173 */ 0333,0355,02,01,0355,0, + /* 70179 */ 0333,0355,02,01,0354,0, + /* 70185 */ 0320,0355,01,030,0200,0, + /* 70191 */ 0321,0355,01,030,0200,0, + /* 70197 */ 0324,0355,01,030,0200,0, + /* 70203 */ 0320,0355,01,030,0201,0, + /* 70209 */ 0321,0355,01,030,0201,0, + /* 70215 */ 0324,0355,01,030,0201,0, + /* 70221 */ 0320,0355,01,030,0202,0, + /* 70227 */ 0321,0355,01,030,0202,0, + /* 70233 */ 0324,0355,01,030,0202,0, + /* 70239 */ 0320,0355,01,030,0203,0, + /* 70245 */ 0321,0355,01,030,0203,0, + /* 70251 */ 0324,0355,01,030,0203,0, + /* 70257 */ 0320,0355,01,030,0204,0, + /* 70263 */ 0321,0355,01,030,0204,0, + /* 70269 */ 0324,0355,01,030,0204,0, + /* 70275 */ 0320,0355,01,030,0205,0, + /* 70281 */ 0321,0355,01,030,0205,0, + /* 70287 */ 0324,0355,01,030,0205,0, + /* 70293 */ 0320,0355,01,030,0206,0, + /* 70299 */ 0321,0355,01,030,0206,0, + /* 70305 */ 0324,0355,01,030,0206,0, + /* 70311 */ 0320,0355,01,030,0207,0, + /* 70317 */ 0321,0355,01,030,0207,0, + /* 70323 */ 0324,0355,01,030,0207,0, + /* 70329 */ 0320,0355,01,031,0200,0, + /* 70335 */ 0321,0355,01,031,0200,0, + /* 70341 */ 0324,0355,01,031,0200,0, + /* 70347 */ 0320,0355,01,031,0201,0, + /* 70353 */ 0321,0355,01,031,0201,0, + /* 70359 */ 0324,0355,01,031,0201,0, + /* 70365 */ 0320,0355,01,031,0202,0, + /* 70371 */ 0321,0355,01,031,0202,0, + /* 70377 */ 0324,0355,01,031,0202,0, + /* 70383 */ 0320,0355,01,031,0203,0, + /* 70389 */ 0321,0355,01,031,0203,0, + /* 70395 */ 0324,0355,01,031,0203,0, + /* 70401 */ 0320,0355,01,031,0204,0, + /* 70407 */ 0321,0355,01,031,0204,0, + /* 70413 */ 0324,0355,01,031,0204,0, + /* 70419 */ 0320,0355,01,031,0205,0, + /* 70425 */ 0321,0355,01,031,0205,0, + /* 70431 */ 0324,0355,01,031,0205,0, + /* 70437 */ 0320,0355,01,031,0206,0, + /* 70443 */ 0321,0355,01,031,0206,0, + /* 70449 */ 0324,0355,01,031,0206,0, + /* 70455 */ 0320,0355,01,031,0207,0, + /* 70461 */ 0321,0355,01,031,0207,0, + /* 70467 */ 0324,0355,01,031,0207,0, + /* 70473 */ 0320,0355,01,032,0200,0, + /* 70479 */ 0321,0355,01,032,0200,0, + /* 70485 */ 0324,0355,01,032,0200,0, + /* 70491 */ 0320,0355,01,032,0201,0, + /* 70497 */ 0321,0355,01,032,0201,0, + /* 70503 */ 0324,0355,01,032,0201,0, + /* 70509 */ 0320,0355,01,032,0202,0, + /* 70515 */ 0321,0355,01,032,0202,0, + /* 70521 */ 0324,0355,01,032,0202,0, + /* 70527 */ 0320,0355,01,032,0203,0, + /* 70533 */ 0321,0355,01,032,0203,0, + /* 70539 */ 0324,0355,01,032,0203,0, + /* 70545 */ 0320,0355,01,032,0204,0, + /* 70551 */ 0321,0355,01,032,0204,0, + /* 70557 */ 0324,0355,01,032,0204,0, + /* 70563 */ 0320,0355,01,032,0205,0, + /* 70569 */ 0321,0355,01,032,0205,0, + /* 70575 */ 0324,0355,01,032,0205,0, + /* 70581 */ 0320,0355,01,032,0206,0, + /* 70587 */ 0321,0355,01,032,0206,0, + /* 70593 */ 0324,0355,01,032,0206,0, + /* 70599 */ 0320,0355,01,032,0207,0, + /* 70605 */ 0321,0355,01,032,0207,0, + /* 70611 */ 0324,0355,01,032,0207,0, + /* 70617 */ 0320,0355,01,033,0200,0, + /* 70623 */ 0321,0355,01,033,0200,0, + /* 70629 */ 0324,0355,01,033,0200,0, + /* 70635 */ 0320,0355,01,033,0201,0, + /* 70641 */ 0321,0355,01,033,0201,0, + /* 70647 */ 0324,0355,01,033,0201,0, + /* 70653 */ 0320,0355,01,033,0202,0, + /* 70659 */ 0321,0355,01,033,0202,0, + /* 70665 */ 0324,0355,01,033,0202,0, + /* 70671 */ 0320,0355,01,033,0203,0, + /* 70677 */ 0321,0355,01,033,0203,0, + /* 70683 */ 0324,0355,01,033,0203,0, + /* 70689 */ 0320,0355,01,033,0204,0, + /* 70695 */ 0321,0355,01,033,0204,0, + /* 70701 */ 0324,0355,01,033,0204,0, + /* 70707 */ 0320,0355,01,033,0205,0, + /* 70713 */ 0321,0355,01,033,0205,0, + /* 70719 */ 0324,0355,01,033,0205,0, + /* 70725 */ 0320,0355,01,033,0206,0, + /* 70731 */ 0321,0355,01,033,0206,0, + /* 70737 */ 0324,0355,01,033,0206,0, + /* 70743 */ 0320,0355,01,033,0207,0, + /* 70749 */ 0321,0355,01,033,0207,0, + /* 70755 */ 0324,0355,01,033,0207,0, + /* 70761 */ 0320,0355,01,034,0200,0, + /* 70767 */ 0321,0355,01,034,0200,0, + /* 70773 */ 0324,0355,01,034,0200,0, + /* 70779 */ 0320,0355,01,034,0201,0, + /* 70785 */ 0321,0355,01,034,0201,0, + /* 70791 */ 0324,0355,01,034,0201,0, + /* 70797 */ 0320,0355,01,034,0202,0, + /* 70803 */ 0321,0355,01,034,0202,0, + /* 70809 */ 0324,0355,01,034,0202,0, + /* 70815 */ 0320,0355,01,034,0203,0, + /* 70821 */ 0321,0355,01,034,0203,0, + /* 70827 */ 0324,0355,01,034,0203,0, + /* 70833 */ 0320,0355,01,034,0204,0, + /* 70839 */ 0321,0355,01,034,0204,0, + /* 70845 */ 0324,0355,01,034,0204,0, + /* 70851 */ 0320,0355,01,034,0205,0, + /* 70857 */ 0321,0355,01,034,0205,0, + /* 70863 */ 0324,0355,01,034,0205,0, + /* 70869 */ 0320,0355,01,034,0206,0, + /* 70875 */ 0321,0355,01,034,0206,0, + /* 70881 */ 0324,0355,01,034,0206,0, + /* 70887 */ 0320,0355,01,034,0207,0, + /* 70893 */ 0321,0355,01,034,0207,0, + /* 70899 */ 0324,0355,01,034,0207,0, + /* 70905 */ 0320,0355,01,035,0200,0, + /* 70911 */ 0321,0355,01,035,0200,0, + /* 70917 */ 0324,0355,01,035,0200,0, + /* 70923 */ 0320,0355,01,035,0201,0, + /* 70929 */ 0321,0355,01,035,0201,0, + /* 70935 */ 0324,0355,01,035,0201,0, + /* 70941 */ 0320,0355,01,035,0202,0, + /* 70947 */ 0321,0355,01,035,0202,0, + /* 70953 */ 0324,0355,01,035,0202,0, + /* 70959 */ 0320,0355,01,035,0203,0, + /* 70965 */ 0321,0355,01,035,0203,0, + /* 70971 */ 0324,0355,01,035,0203,0, + /* 70977 */ 0320,0355,01,035,0204,0, + /* 70983 */ 0321,0355,01,035,0204,0, + /* 70989 */ 0324,0355,01,035,0204,0, + /* 70995 */ 0320,0355,01,035,0205,0, + /* 71001 */ 0321,0355,01,035,0205,0, + /* 71007 */ 0324,0355,01,035,0205,0, + /* 71013 */ 0320,0355,01,035,0206,0, + /* 71019 */ 0321,0355,01,035,0206,0, + /* 71025 */ 0324,0355,01,035,0206,0, + /* 71031 */ 0320,0355,01,035,0207,0, + /* 71037 */ 0321,0355,01,035,0207,0, + /* 71043 */ 0324,0355,01,035,0207,0, + /* 71049 */ 0320,0355,01,036,0200,0, + /* 71055 */ 0321,0355,01,036,0200,0, + /* 71061 */ 0324,0355,01,036,0200,0, + /* 71067 */ 0320,0355,01,036,0201,0, + /* 71073 */ 0321,0355,01,036,0201,0, + /* 71079 */ 0324,0355,01,036,0201,0, + /* 71085 */ 0320,0355,01,036,0202,0, + /* 71091 */ 0321,0355,01,036,0202,0, + /* 71097 */ 0324,0355,01,036,0202,0, + /* 71103 */ 0320,0355,01,036,0203,0, + /* 71109 */ 0321,0355,01,036,0203,0, + /* 71115 */ 0324,0355,01,036,0203,0, + /* 71121 */ 0320,0355,01,036,0204,0, + /* 71127 */ 0321,0355,01,036,0204,0, + /* 71133 */ 0324,0355,01,036,0204,0, + /* 71139 */ 0320,0355,01,036,0205,0, + /* 71145 */ 0321,0355,01,036,0205,0, + /* 71151 */ 0324,0355,01,036,0205,0, + /* 71157 */ 0320,0355,01,036,0206,0, + /* 71163 */ 0321,0355,01,036,0206,0, + /* 71169 */ 0324,0355,01,036,0206,0, + /* 71175 */ 0320,0355,01,036,0207,0, + /* 71181 */ 0321,0355,01,036,0207,0, + /* 71187 */ 0324,0355,01,036,0207,0, + /* 71193 */ 0320,0355,01,037,0201,0, + /* 71199 */ 0321,0355,01,037,0201,0, + /* 71205 */ 0324,0355,01,037,0201,0, + /* 71211 */ 0320,0355,01,037,0202,0, + /* 71217 */ 0321,0355,01,037,0202,0, + /* 71223 */ 0324,0355,01,037,0202,0, + /* 71229 */ 0320,0355,01,037,0203,0, + /* 71235 */ 0321,0355,01,037,0203,0, + /* 71241 */ 0324,0355,01,037,0203,0, + /* 71247 */ 0320,0355,01,037,0204,0, + /* 71253 */ 0321,0355,01,037,0204,0, + /* 71259 */ 0324,0355,01,037,0204,0, + /* 71265 */ 0320,0355,01,037,0205,0, + /* 71271 */ 0321,0355,01,037,0205,0, + /* 71277 */ 0324,0355,01,037,0205,0, + /* 71283 */ 0320,0355,01,037,0206,0, + /* 71289 */ 0321,0355,01,037,0206,0, + /* 71295 */ 0324,0355,01,037,0206,0, + /* 71301 */ 0320,0355,01,037,0207,0, + /* 71307 */ 0321,0355,01,037,0207,0, + /* 71313 */ 0324,0355,01,037,0207,0, + /* 71319 */ 0320,01,0241,045,0, + /* 71324 */ 0321,01,0241,045,0, + /* 71329 */ 0324,01,0241,045,0, + /* 71334 */ 0320,01,0243,044,0, + /* 71339 */ 0321,01,0243,044,0, + /* 71344 */ 0324,01,0243,044,0, + /* 71349 */ 0271,01,0210,0101,0, + /* 71354 */ 0321,010,0270,0265,0, + /* 71359 */ 0320,010,0270,031,0, + /* 71364 */ 0321,010,0270,041,0, + /* 71369 */ 0324,010,0270,055,0, + /* 71374 */ 0320,01,0215,0110,0, + /* 71379 */ 0321,01,0215,0110,0, + /* 71384 */ 0324,01,0215,0110,0, + /* 71389 */ 0273,01,0,0101,0, + /* 71394 */ 0320,01,05,031,0, + /* 71399 */ 0321,01,05,041,0, + /* 71404 */ 0324,01,05,0255,0, + /* 71409 */ 0273,01,010,0101,0, + /* 71414 */ 0320,01,015,031,0, + /* 71419 */ 0321,01,015,041,0, + /* 71424 */ 0324,01,015,0255,0, + /* 71429 */ 0273,01,020,0101,0, + /* 71434 */ 0320,01,025,031,0, + /* 71439 */ 0321,01,025,041,0, + /* 71444 */ 0324,01,025,0255,0, + /* 71449 */ 0273,01,030,0101,0, + /* 71454 */ 0320,01,035,031,0, + /* 71459 */ 0321,01,035,041,0, + /* 71464 */ 0324,01,035,0255,0, + /* 71469 */ 0273,01,040,0101,0, + /* 71474 */ 0320,01,045,031,0, + /* 71479 */ 0321,01,045,041,0, + /* 71484 */ 0324,01,045,0255,0, + /* 71489 */ 0273,01,050,0101,0, + /* 71494 */ 0320,01,055,031,0, + /* 71499 */ 0321,01,055,041,0, + /* 71504 */ 0324,01,055,0255,0, + /* 71509 */ 0273,01,060,0101,0, + /* 71514 */ 0320,01,065,031,0, + /* 71519 */ 0321,01,065,041,0, + /* 71524 */ 0324,01,065,0255,0, + /* 71529 */ 0273,01,070,0101,0, + /* 71534 */ 0320,01,073,0110,0, + /* 71539 */ 0321,01,073,0110,0, + /* 71544 */ 0324,01,073,0110,0, + /* 71549 */ 0320,01,075,031,0, + /* 71554 */ 0321,01,075,041,0, + /* 71559 */ 0324,01,075,0255,0, + /* 71564 */ 0320,01,0205,0101,0, + /* 71569 */ 0321,01,0205,0101,0, + /* 71574 */ 0324,01,0205,0101,0, + /* 71579 */ 0320,01,0205,0110,0, + /* 71584 */ 0321,01,0205,0110,0, + /* 71589 */ 0324,01,0205,0110,0, + /* 71594 */ 0320,01,0251,031,0, + /* 71599 */ 0321,01,0251,041,0, + /* 71604 */ 0324,01,0251,0255,0, + /* 71609 */ 01,0366,0200,021,0, + /* 71614 */ 0273,01,0376,0200,0, + /* 71619 */ 0273,01,0376,0201,0, + /* 71624 */ 0273,01,0366,0203,0, + /* 71629 */ 0273,01,0366,0202,0, + /* 71634 */ 0321,0355,010,0310,0, + /* 71639 */ 0324,0355,010,0310,0, + /* 71644 */ 0320,01,0143,0110,0, + /* 71649 */ 0321,01,0143,0110,0, + /* 71654 */ 0324,01,0143,0110,0, + /* 71659 */ 0272,01,0206,0110,0, + /* 71664 */ 0272,01,0206,0101,0, + /* 71669 */ 0320,01,0377,0205,0, + /* 71674 */ 0321,01,0377,0205,0, + /* 71679 */ 0324,01,0377,0205,0, + /* 71684 */ 0320,01,0377,0203,0, + /* 71689 */ 0321,01,0377,0203,0, + /* 71694 */ 0324,01,0377,0203,0, + /* 71699 */ 0327,0322,01,0303,0, + /* 71704 */ 0327,0320,01,0303,0, + /* 71709 */ 0327,0321,01,0303,0, + /* 71714 */ 0327,0324,01,0303,0, + /* 71719 */ 0322,01,0312,030,0, + /* 71724 */ 0320,01,0312,030,0, + /* 71729 */ 0321,01,0312,030,0, + /* 71734 */ 0324,01,0312,030,0, + /* 71739 */ 0327,0322,01,0234,0, + /* 71744 */ 0327,0320,01,0234,0, + /* 71749 */ 0327,0321,01,0234,0, + /* 71754 */ 0327,0324,01,0234,0, + /* 71759 */ 0327,0322,01,0235,0, + /* 71764 */ 0327,0320,01,0235,0, + /* 71769 */ 0327,0321,01,0235,0, + /* 71774 */ 0327,0324,01,0235,0, + /* 71779 */ 0335,0320,01,0247,0, + /* 71784 */ 0335,0321,01,0247,0, + /* 71789 */ 0335,0324,01,0247,0, + /* 71794 */ 0335,0320,01,0257,0, + /* 71799 */ 0335,0321,01,0257,0, + /* 71804 */ 0335,0324,01,0257,0, + /* 71809 */ 0360,0355,01,011,0, + /* 71814 */ 0333,0355,01,011,0, + /* 71819 */ 0355,01,01,0207,0, + /* 71824 */ 0355,02,01,0371,0, + /* 71829 */ 0355,01,01,0206,0, + /* 71834 */ 0355,01,044,0101,0, + /* 71839 */ 0355,01,046,0110,0, + /* 71844 */ 0355,01,0173,0200,0, + /* 71849 */ 0355,01,0175,0200,0, + /* 71854 */ 0355,01,0172,0200,0, + /* 71859 */ 0355,01,0174,0200,0, + /* 71864 */ 0330,0333,01,0220,0, + /* 71869 */ 0355,02,01,0311,0, + /* 71874 */ 0355,02,01,0373,0, + /* 71879 */ 0320,01,0345,025,0, + /* 71884 */ 0321,01,0345,025,0, + /* 71889 */ 0320,01,0347,024,0, + /* 71894 */ 0321,01,0347,024,0, + /* 71899 */ 0320,01,0214,0101,0, + /* 71904 */ 0320,01,0305,0110,0, + /* 71909 */ 0321,01,0305,0110,0, + /* 71914 */ 0320,01,0304,0110,0, + /* 71919 */ 0321,01,0304,0110,0, + /* 71924 */ 0355,01,0,0204,0, + /* 71929 */ 0355,01,0,0205,0, + /* 71934 */ 0355,02,01,0370,0, + /* 71939 */ 01,0334,010,0300,0, + /* 71944 */ 01,0330,010,0300,0, + /* 71949 */ 01,0330,011,0300,0, + /* 71954 */ 01,0336,010,0300,0, + /* 71959 */ 0341,02,0333,0342,0, + /* 71964 */ 01,0332,010,0300,0, + /* 71969 */ 01,0332,011,0300,0, + /* 71974 */ 01,0332,010,0320,0, + /* 71979 */ 01,0332,011,0320,0, + /* 71984 */ 01,0332,010,0310,0, + /* 71989 */ 01,0332,011,0310,0, + /* 71994 */ 01,0333,010,0300,0, + /* 71999 */ 01,0333,011,0300,0, + /* 72004 */ 01,0333,010,0320,0, + /* 72009 */ 01,0333,011,0320,0, + /* 72014 */ 01,0333,010,0310,0, + /* 72019 */ 01,0333,011,0310,0, + /* 72024 */ 01,0333,010,0330,0, + /* 72029 */ 01,0333,011,0330,0, + /* 72034 */ 01,0332,010,0330,0, + /* 72039 */ 01,0332,011,0330,0, + /* 72044 */ 01,0330,010,0320,0, + /* 72049 */ 01,0330,011,0320,0, + /* 72054 */ 01,0333,010,0360,0, + /* 72059 */ 01,0333,011,0360,0, + /* 72064 */ 01,0337,010,0360,0, + /* 72069 */ 01,0337,011,0360,0, + /* 72074 */ 01,0330,010,0330,0, + /* 72079 */ 01,0330,011,0330,0, + /* 72084 */ 0341,02,0333,0341,0, + /* 72089 */ 01,0334,010,0370,0, + /* 72094 */ 01,0330,010,0360,0, + /* 72099 */ 01,0330,011,0360,0, + /* 72104 */ 01,0336,010,0370,0, + /* 72109 */ 01,0334,010,0360,0, + /* 72114 */ 01,0330,010,0370,0, + /* 72119 */ 01,0330,011,0370,0, + /* 72124 */ 01,0336,010,0360,0, + /* 72129 */ 0341,02,0333,0340,0, + /* 72134 */ 01,0335,010,0300,0, + /* 72139 */ 01,0337,010,0300,0, + /* 72144 */ 0341,02,0333,0343,0, + /* 72149 */ 01,0331,010,0300,0, + /* 72154 */ 01,0334,010,0310,0, + /* 72159 */ 01,0330,010,0310,0, + /* 72164 */ 01,0330,011,0310,0, + /* 72169 */ 01,0336,010,0310,0, + /* 72174 */ 0341,01,0335,0206,0, + /* 72179 */ 01,0335,010,0320,0, + /* 72184 */ 0341,01,0331,0207,0, + /* 72189 */ 0341,01,0331,0206,0, + /* 72194 */ 01,0335,010,0330,0, + /* 72199 */ 0341,01,0335,0207,0, + /* 72204 */ 0341,02,0337,0340,0, + /* 72209 */ 01,0334,010,0350,0, + /* 72214 */ 01,0330,010,0340,0, + /* 72219 */ 01,0330,011,0340,0, + /* 72224 */ 01,0336,010,0350,0, + /* 72229 */ 01,0334,010,0340,0, + /* 72234 */ 01,0330,010,0350,0, + /* 72239 */ 01,0330,011,0350,0, + /* 72244 */ 01,0336,010,0340,0, + /* 72249 */ 01,0335,010,0340,0, + /* 72254 */ 01,0335,011,0340,0, + /* 72259 */ 01,0333,010,0350,0, + /* 72264 */ 01,0333,011,0350,0, + /* 72269 */ 01,0337,010,0350,0, + /* 72274 */ 01,0337,011,0350,0, + /* 72279 */ 01,0335,010,0350,0, + /* 72284 */ 01,0335,011,0350,0, + /* 72289 */ 01,0331,010,0310,0, + /* 72294 */ 01,0331,011,0310,0, + /* 72299 */ 0355,01,015,0200,0, + /* 72304 */ 0355,01,015,0201,0, + /* 72309 */ 0327,0320,010,0120,0, + /* 72314 */ 0327,0321,010,0120,0, + /* 72319 */ 0327,0324,010,0120,0, + /* 72324 */ 0327,0320,010,0130,0, + /* 72329 */ 0327,0321,010,0130,0, + /* 72334 */ 0327,0324,010,0130,0, + /* 72339 */ 0327,0342,01,0311,0, + /* 72344 */ 0327,0320,01,0311,0, + /* 72349 */ 0327,0321,01,0311,0, + /* 72354 */ 0327,0324,01,0311,0, + /* 72359 */ 0320,01,0142,0110,0, + /* 72364 */ 0321,01,0142,0110,0, + /* 72369 */ 0355,02,01,0336,0, + /* 72374 */ 0355,01,0227,0200,0, + /* 72379 */ 0355,01,0223,0200,0, + /* 72384 */ 0355,01,0222,0200,0, + /* 72389 */ 0355,01,0226,0200,0, + /* 72394 */ 0355,01,0224,0200,0, + /* 72399 */ 0355,01,0237,0200,0, + /* 72404 */ 0355,01,0235,0200,0, + /* 72409 */ 0355,01,0234,0200,0, + /* 72414 */ 0355,01,0236,0200,0, + /* 72419 */ 0355,01,0225,0200,0, + /* 72424 */ 0355,01,0221,0200,0, + /* 72429 */ 0355,01,0233,0200,0, + /* 72434 */ 0355,01,0231,0200,0, + /* 72439 */ 0355,01,0220,0200,0, + /* 72444 */ 0355,01,0232,0200,0, + /* 72449 */ 0355,01,0230,0200,0, + /* 72454 */ 0355,02,01,0320,0, + /* 72459 */ 0355,02,01,0321,0, + /* 72464 */ 0355,02,01,0335,0, + /* 72469 */ 0355,02,01,0334,0, + /* 72474 */ 0355,02,01,0324,0, + /* 72479 */ 0355,02,01,0302,0, + /* 72484 */ 0355,02,01,0332,0, + /* 72489 */ 0355,02,01,0331,0, + /* 72494 */ 0355,02,01,0303,0, + /* 72499 */ 0355,02,01,0330,0, + /* 72504 */ 0355,02,01,0333,0, + /* 72509 */ 0355,02,01,0304,0, + /* 72514 */ 0355,02,0247,0300,0, + /* 72519 */ 02,0306,0370,020,0, + /* 72524 */ 0355,02,01,0325,0, + /* 72529 */ 0355,02,01,0326,0, + /* 72534 */ 0355,01,015,0202,0, + /* 72539 */ 0356,01,0311,0110,0, + /* 72544 */ 0356,01,0312,0110,0, + /* 72549 */ 0356,01,0310,0110,0, + /* 72554 */ 0356,01,0314,0110,0, + /* 72559 */ 0356,01,0315,0110,0, + /* 72564 */ 0356,01,0313,0110,0, + /* 72569 */ 0320,0355,0300,0121,0, + /* 72574 */ 0321,0355,0300,0121,0, + /* 72579 */ 0324,0355,0300,0121,0, + /* 72584 */ 01,0240,045,0, + /* 72588 */ 01,0242,044,0, + /* 72592 */ 010,0260,021,0, + /* 72596 */ 01,04,021,0, + /* 72600 */ 01,014,021,0, + /* 72604 */ 01,024,021,0, + /* 72608 */ 01,034,021,0, + /* 72612 */ 01,044,021,0, + /* 72616 */ 01,054,021,0, + /* 72620 */ 01,064,021,0, + /* 72624 */ 01,074,021,0, + /* 72628 */ 01,0204,0101,0, + /* 72632 */ 01,0204,0110,0, + /* 72636 */ 01,0250,021,0, + /* 72640 */ 0320,010,0100,0, + /* 72644 */ 0321,010,0100,0, + /* 72648 */ 0320,010,0110,0, + /* 72652 */ 0321,010,0110,0, + /* 72656 */ 02,0325,012,0, + /* 72660 */ 01,0325,024,0, + /* 72664 */ 02,0324,012,0, + /* 72668 */ 01,0324,024,0, + /* 72672 */ 02,0206,0304,0, + /* 72676 */ 02,0206,0315,0, + /* 72680 */ 02,0206,0326,0, + /* 72684 */ 02,0206,0337,0, + /* 72688 */ 0320,01,0230,0, + /* 72692 */ 0321,01,0231,0, + /* 72696 */ 0324,01,0230,0, + /* 72700 */ 0324,01,0231,0, + /* 72704 */ 0320,01,0231,0, + /* 72708 */ 0321,01,0230,0, + /* 72712 */ 0320,011,0220,0, + /* 72716 */ 0324,011,0220,0, + /* 72720 */ 0320,010,0220,0, + /* 72724 */ 0324,010,0220,0, + /* 72728 */ 0321,011,0220,0, + /* 72732 */ 0321,010,0220,0, + /* 72736 */ 0321,01,0220,0, + /* 72740 */ 0322,01,0313,0, + /* 72744 */ 0320,01,0313,0, + /* 72748 */ 0321,01,0313,0, + /* 72752 */ 0324,01,0313,0, + /* 72756 */ 01,0315,024,0, + /* 72760 */ 0355,01,05,0, + /* 72764 */ 0355,01,064,0, + /* 72768 */ 0355,01,065,0, + /* 72772 */ 0355,01,07,0, + /* 72776 */ 0322,01,0317,0, + /* 72780 */ 0320,01,0317,0, + /* 72784 */ 0321,01,0317,0, + /* 72788 */ 0324,01,0317,0, + /* 72792 */ 0335,01,0246,0, + /* 72796 */ 0320,01,0255,0, + /* 72800 */ 0321,01,0255,0, + /* 72804 */ 0324,01,0255,0, + /* 72808 */ 0320,01,0245,0, + /* 72812 */ 0321,01,0245,0, + /* 72816 */ 0324,01,0245,0, + /* 72820 */ 0320,01,0253,0, + /* 72824 */ 0321,01,0253,0, + /* 72828 */ 0324,01,0253,0, + /* 72832 */ 0335,01,0256,0, + /* 72836 */ 0320,01,0155,0, + /* 72840 */ 0321,01,0155,0, + /* 72844 */ 0320,01,0157,0, + /* 72848 */ 0321,01,0157,0, + /* 72852 */ 0355,01,010,0, + /* 72856 */ 0355,01,063,0, + /* 72860 */ 0355,01,061,0, + /* 72864 */ 0355,01,06,0, + /* 72868 */ 0355,01,0242,0, + /* 72872 */ 0355,01,060,0, + /* 72876 */ 0355,01,062,0, + /* 72880 */ 0355,01,072,0, + /* 72884 */ 0355,01,073,0, + /* 72888 */ 0355,01,075,0, + /* 72892 */ 0355,01,074,0, + /* 72896 */ 0355,01,071,0, + /* 72900 */ 0355,01,070,0, + /* 72904 */ 0355,01,0176,0, + /* 72908 */ 0355,01,0252,0, + /* 72912 */ 01,0344,025,0, + /* 72916 */ 0320,01,0355,0, + /* 72920 */ 0321,01,0355,0, + /* 72924 */ 01,0346,024,0, + /* 72928 */ 0320,01,0357,0, + /* 72932 */ 0321,01,0357,0, + /* 72936 */ 0355,01,0240,0, + /* 72940 */ 0355,01,0250,0, + /* 72944 */ 0355,01,0241,0, + /* 72948 */ 0355,01,0251,0, + /* 72952 */ 02,0331,0360,0, + /* 72956 */ 02,0331,0341,0, + /* 72960 */ 01,0334,0200,0, + /* 72964 */ 02,0336,0301,0, + /* 72968 */ 01,0337,0204,0, + /* 72972 */ 01,0337,0206,0, + /* 72976 */ 02,0331,0340,0, + /* 72980 */ 02,0332,0301,0, + /* 72984 */ 02,0332,0321,0, + /* 72988 */ 02,0332,0311,0, + /* 72992 */ 02,0333,0301,0, + /* 72996 */ 02,0333,0321,0, + /* 73000 */ 02,0333,0311,0, + /* 73004 */ 02,0333,0331,0, + /* 73008 */ 02,0332,0331,0, + /* 73012 */ 01,0334,0202,0, + /* 73016 */ 02,0330,0321,0, + /* 73020 */ 02,0333,0361,0, + /* 73024 */ 02,0337,0361,0, + /* 73028 */ 01,0334,0203,0, + /* 73032 */ 02,0330,0331,0, + /* 73036 */ 02,0336,0331,0, + /* 73040 */ 02,0331,0377,0, + /* 73044 */ 02,0331,0366,0, + /* 73048 */ 01,0330,0206,0, + /* 73052 */ 01,0334,0206,0, + /* 73056 */ 02,0336,0371,0, + /* 73060 */ 01,0330,0207,0, + /* 73064 */ 01,0334,0207,0, + /* 73068 */ 02,0336,0361,0, + /* 73072 */ 0355,01,016,0, + /* 73076 */ 02,0335,0301,0, + /* 73080 */ 02,0337,0301,0, + /* 73084 */ 01,0332,0200,0, + /* 73088 */ 01,0336,0200,0, + /* 73092 */ 01,0332,0202,0, + /* 73096 */ 01,0336,0202,0, + /* 73100 */ 01,0332,0203,0, + /* 73104 */ 01,0336,0203,0, + /* 73108 */ 01,0332,0206,0, + /* 73112 */ 01,0336,0206,0, + /* 73116 */ 01,0332,0207,0, + /* 73120 */ 01,0336,0207,0, + /* 73124 */ 01,0333,0200,0, + /* 73128 */ 01,0337,0200,0, + /* 73132 */ 01,0337,0205,0, + /* 73136 */ 01,0332,0201,0, + /* 73140 */ 01,0336,0201,0, + /* 73144 */ 02,0331,0367,0, + /* 73148 */ 01,0333,0202,0, + /* 73152 */ 01,0337,0202,0, + /* 73156 */ 01,0333,0203,0, + /* 73160 */ 01,0337,0203,0, + /* 73164 */ 01,0337,0207,0, + /* 73168 */ 01,0337,0201,0, + /* 73172 */ 01,0333,0201,0, + /* 73176 */ 01,0335,0201,0, + /* 73180 */ 01,0332,0204,0, + /* 73184 */ 01,0336,0204,0, + /* 73188 */ 01,0332,0205,0, + /* 73192 */ 01,0336,0205,0, + /* 73196 */ 01,0331,0200,0, + /* 73200 */ 01,0335,0200,0, + /* 73204 */ 01,0333,0205,0, + /* 73208 */ 02,0331,0301,0, + /* 73212 */ 02,0331,0350,0, + /* 73216 */ 01,0331,0205,0, + /* 73220 */ 01,0331,0204,0, + /* 73224 */ 02,0331,0352,0, + /* 73228 */ 02,0331,0351,0, + /* 73232 */ 02,0331,0354,0, + /* 73236 */ 02,0331,0355,0, + /* 73240 */ 02,0331,0353,0, + /* 73244 */ 02,0331,0356,0, + /* 73248 */ 01,0334,0201,0, + /* 73252 */ 02,0336,0311,0, + /* 73256 */ 02,0331,0320,0, + /* 73260 */ 02,0331,0363,0, + /* 73264 */ 02,0331,0370,0, + /* 73268 */ 02,0331,0365,0, + /* 73272 */ 02,0331,0362,0, + /* 73276 */ 02,0331,0374,0, + /* 73280 */ 01,0335,0204,0, + /* 73284 */ 02,0331,0375,0, + /* 73288 */ 02,0333,0344,0, + /* 73292 */ 02,0331,0376,0, + /* 73296 */ 02,0331,0373,0, + /* 73300 */ 02,0331,0372,0, + /* 73304 */ 01,0331,0202,0, + /* 73308 */ 01,0335,0202,0, + /* 73312 */ 02,0335,0321,0, + /* 73316 */ 01,0331,0203,0, + /* 73320 */ 01,0335,0203,0, + /* 73324 */ 01,0333,0207,0, + /* 73328 */ 02,0335,0331,0, + /* 73332 */ 01,0330,0204,0, + /* 73336 */ 01,0334,0204,0, + /* 73340 */ 02,0336,0351,0, + /* 73344 */ 01,0330,0205,0, + /* 73348 */ 01,0334,0205,0, + /* 73352 */ 02,0336,0341,0, + /* 73356 */ 02,0331,0344,0, + /* 73360 */ 02,0335,0341,0, + /* 73364 */ 02,0333,0351,0, + /* 73368 */ 02,0337,0351,0, + /* 73372 */ 02,0335,0351,0, + /* 73376 */ 02,0332,0351,0, + /* 73380 */ 02,0331,0345,0, + /* 73384 */ 02,0331,0311,0, + /* 73388 */ 02,0331,0364,0, + /* 73392 */ 02,0331,0361,0, + /* 73396 */ 02,0331,0371,0, + /* 73400 */ 0355,01,0167,0, + /* 73404 */ 0342,01,0140,0, + /* 73408 */ 0320,01,0140,0, + /* 73412 */ 0321,01,0140,0, + /* 73416 */ 0342,01,0141,0, + /* 73420 */ 0320,01,0141,0, + /* 73424 */ 0321,01,0141,0, + /* 73428 */ 0355,01,0377,0, + /* 73432 */ 0355,01,0271,0, + /* 73436 */ 0355,01,013,0, + /* 73440 */ 02,0377,0377,0, + /* 73444 */ 0355,01,067,0, + /* 73448 */ 01,077,0, + /* 73451 */ 01,047,0, + /* 73454 */ 01,057,0, + /* 73457 */ 01,0361,0, + /* 73460 */ 01,0314,0, + /* 73463 */ 01,0316,0, + /* 73466 */ 01,0375,0, + /* 73469 */ 01,0365,0, + /* 73472 */ 01,0237,0, + /* 73475 */ 01,0254,0, + /* 73478 */ 01,0154,0, + /* 73481 */ 01,0156,0, + /* 73484 */ 01,0364,0, +}; + +/* + * Bytecode frequencies (including reuse): + * + * 0:12320 | 40: 6 | 100: 219 | 140: 0 | 200: 404 | 240: 2649 | 300: 6 | 340: 8 + * 1:13358 | 41: 52 | 101: 834 | 141: 0 | 201: 166 | 241: 1933 | 301: 0 | 341: 10 + * 2: 182 | 42: 104 | 102: 14 | 142: 0 | 202: 182 | 242: 134 | 302: 0 | 342: 5 + * 3: 0 | 43: 0 | 103: 0 | 143: 0 | 203: 161 | 243: 0 | 303: 0 | 343: 0 + * 4: 0 | 44: 8 | 104: 0 | 144: 0 | 204: 244 | 244: 0 | 304: 0 | 344: 0 + * 5: 0 | 45: 8 | 105: 0 | 145: 0 | 205: 150 | 245: 0 | 305: 0 | 345: 0 + * 6: 0 | 46: 0 | 106: 0 | 146: 0 | 206: 121 | 246: 0 | 306: 8 | 346: 0 + * 7: 0 | 47: 0 | 107: 0 | 147: 0 | 207: 141 | 247: 0 | 307: 0 | 347: 2 + * 10: 83 | 50: 304 | 110: 4250 | 150: 0 | 210: 167 | 250: 2071 | 310: 36 | 350: 5 + * 11: 26 | 51: 0 | 111: 0 | 151: 0 | 211: 167 | 251: 0 | 311: 46 | 351: 0 + * 12: 0 | 52: 0 | 112: 272 | 152: 1 | 212: 56 | 252: 0 | 312: 18 | 352: 0 + * 13: 0 | 53: 0 | 113: 0 | 153: 0 | 213: 46 | 253: 0 | 313: 25 | 353: 0 + * 14: 0 | 54: 4 | 114: 0 | 154: 0 | 214: 70 | 254: 1 | 314: 1 | 354: 0 + * 15: 2 | 55: 3 | 115: 0 | 155: 0 | 215: 33 | 255: 36 | 315: 0 | 355: 1241 + * 16: 4 | 56: 0 | 116: 0 | 156: 0 | 216: 34 | 256: 98 | 316: 0 | 356: 142 + * 17: 0 | 57: 0 | 117: 0 | 157: 0 | 217: 234 | 257: 0 | 317: 16 | 357: 43 + * 20: 3 | 60: 0 | 120: 2949 | 160: 0 | 220: 0 | 260: 920 | 320: 1128 | 360: 198 + * 21: 105 | 61: 0 | 121: 340 | 161: 0 | 221: 0 | 261: 1180 | 321: 1148 | 361: 256 + * 22: 635 | 62: 0 | 122: 0 | 162: 0 | 222: 0 | 262: 175 | 322: 9 | 362: 0 + * 23: 218 | 63: 0 | 123: 0 | 163: 0 | 223: 0 | 263: 0 | 323: 32 | 363: 0 + * 24: 6 | 64: 162 | 124: 0 | 164: 0 | 224: 0 | 264: 0 | 324: 1216 | 364: 4 + * 25: 134 | 65: 0 | 125: 0 | 165: 0 | 225: 0 | 265: 1 | 325: 1 | 365: 0 + * 26: 101 | 66: 0 | 126: 0 | 166: 0 | 226: 0 | 266: 0 | 326: 8 | 366: 0 + * 27: 7 | 67: 0 | 127: 0 | 167: 0 | 227: 0 | 267: 0 | 327: 521 | 367: 0 + * 30: 38 | 70: 0 | 130: 35 | 170: 0 | 230: 0 | 270: 533 | 330: 3 | 370: 120 + * 31: 46 | 71: 0 | 131: 0 | 171: 1 | 231: 0 | 271: 8 | 331: 19 | 371: 4 + * 32: 98 | 72: 0 | 132: 0 | 172: 0 | 232: 0 | 272: 8 | 332: 68 | 372: 0 + * 33: 0 | 73: 0 | 133: 0 | 173: 0 | 233: 0 | 273: 113 | 333: 119 | 373: 30 + * 34: 4 | 74: 4 | 134: 0 | 174: 0 | 234: 0 | 274: 4 | 334: 2 | 374: 30 + * 35: 0 | 75: 0 | 135: 0 | 175: 35 | 235: 0 | 275: 72 | 335: 8 | 375: 26 + * 36: 0 | 76: 0 | 136: 0 | 176: 88 | 236: 0 | 276: 120 | 336: 11 | 376: 24 + * 37: 0 | 77: 0 | 137: 0 | 177: 53 | 237: 0 | 277: 0 | 337: 10 | 377: 0 + */ diff --git a/src/x86/insnsd.c b/src/x86/insnsd.c new file mode 100644 index 0000000..e4846a4 --- /dev/null +++ b/src/x86/insnsd.c @@ -0,0 +1,44697 @@ +/* This file auto-generated from insns.dat by insns.pl - don't edit it */ + +#include "nasm.h" +#include "insns.h" + +static const struct itemplate instrux[] = { + /* 0 : NOP void [ osz norexb nof3 90 ] BESTDIS,8086 */ + /* 330 314 326 001(90) : BESTDIS,8086 */ + {I_NOP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+66387, 2, 47}, + /* 1 : NOP rm16 [m: o16 0f 1f /0 ] BESTDIS,P6 */ + /* 320 355 001(1f) 200 : BESTDIS,P6 */ + {I_NOP, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+66399, 4, 49}, + /* 2 : NOP rm32 [m: o32 0f 1f /0 ] BESTDIS,P6 */ + /* 321 355 001(1f) 200 : BESTDIS,P6 */ + {I_NOP, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+66405, 4, 50}, + /* 3 : NOP rm64 [m: o64 0f 1f /0 ] LONG,BESTDIS,PROT,X86_64 */ + /* 324 355 001(1f) 200 : LONG,BESTDIS,PROT,X86_64 */ + {I_NOP, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+66411, 5, 51}, + /* 4 : MOV reg_al,mem_offs [-i: o8 a0 iwdq ] SM0-1,NOAPX,8086 */ + /* 001(a0) 045 : SM0,SM1,NOAPX,8086 */ + {I_MOV, 2, {REG_AL|RN_L16,MEM_OFFS,0,0,0}, NO_DECORATOR, nasm_bytecodes+72584, 6, 54}, + /* 5 : MOV reg_ax,mem_offs [-i: o16 a1 iwdq ] SM0-1,NOAPX,8086 */ + /* 320 001(a1) 045 : SM0,SM1,NOAPX,8086 */ + {I_MOV, 2, {REG_AX|RN_L16,MEM_OFFS,0,0,0}, NO_DECORATOR, nasm_bytecodes+71319, 6, 55}, + /* 6 : MOV reg_eax,mem_offs [-i: o32 a1 iwdq ] SM0-1,NOAPX,ZU,386 */ + /* 321 001(a1) 045 : SM0,SM1,NOAPX,ZU,386 */ + {I_MOV, 2, {REG_EAX|RN_L16,MEM_OFFS,0,0,0}, NO_DECORATOR, nasm_bytecodes+71324, 7, 56}, + /* 7 : MOV reg_rax,mem_offs [-i: o64 a1 iwdq ] SM0-1,NOAPX,ZU,LONG,PROT,X86_64 */ + /* 324 001(a1) 045 : SM0,SM1,NOAPX,ZU,LONG,PROT,X86_64 */ + {I_MOV, 2, {REG_RAX|RN_L16,MEM_OFFS,0,0,0}, NO_DECORATOR, nasm_bytecodes+71329, 8, 57}, + /* 8 : MOV mem_offs,reg_al [i-: o8 a2 iwdq ] SM0-1,NOAPX,NOHLE,8086 */ + /* 001(a2) 044 : SM0,SM1,NOAPX,NOHLE,8086 */ + {I_MOV, 2, {MEM_OFFS,REG_AL|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+72588, 9, 58}, + /* 9 : MOV mem_offs,reg_ax [i-: o16 a3 iwdq ] SM0-1,NOAPX,NOHLE,8086 */ + /* 320 001(a3) 044 : SM0,SM1,NOAPX,NOHLE,8086 */ + {I_MOV, 2, {MEM_OFFS,REG_AX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+71334, 9, 59}, + /* 10 : MOV mem_offs,reg_eax [i-: o32 a3 iwdq ] SM0-1,NOAPX,NOHLE,386 */ + /* 321 001(a3) 044 : SM0,SM1,NOAPX,NOHLE,386 */ + {I_MOV, 2, {MEM_OFFS,REG_EAX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+71339, 10, 60}, + /* 11 : MOV mem_offs,reg_rax [i-: o64 a3 iwdq ] SM0-1,NOAPX,LONG,NOHLE,PROT,X86_64 */ + /* 324 001(a3) 044 : SM0,SM1,NOAPX,LONG,NOHLE,PROT,X86_64 */ + {I_MOV, 2, {MEM_OFFS,REG_RAX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+71344, 11, 61}, + /* 12 : MOV rm8,reg8 [mr: hlexr o8 88 /r ] SM0-1,8086 */ + /* 271 001(88) 101 : SM0,SM1,8086 */ + {I_MOV, 2, {RM_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+71349, 12, 70}, + /* 13 : MOV rm16,reg16 [mr: hlexr o16 89 /r ] SM0-1,8086 */ + /* 271 320 001(89) 101 : SM0,SM1,8086 */ + {I_MOV, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66417, 12, 71}, + /* 14 : MOV rm32,reg32 [mr: hlexr o32 89 /r ] SM0-1,386 */ + /* 271 321 001(89) 101 : SM0,SM1,386 */ + {I_MOV, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+66423, 13, 72}, + /* 15 : MOV rm64,reg64 [mr: hlexr o64 89 /r ] SM0-1,LONG,PROT,X86_64 */ + /* 271 324 001(89) 101 : SM0,SM1,LONG,PROT,X86_64 */ + {I_MOV, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+66429, 14, 73}, + /* 16 : MOV reg8,rm8 [rm: o8 8a /r ] SM0-1,8086 */ + /* 001(8a) 110 : SM0,SM1,8086 */ + {I_MOV, 2, {REG_GPR|BITS8,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+66443, 12, 74}, + /* 17 : MOV reg16,rm16 [rm: o16 8b /r ] SM0-1,8086 */ + /* 320 001(8b) 110 : SM0,SM1,8086 */ + {I_MOV, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66988, 12, 75}, + /* 18 : MOV reg32,rm32 [rm: o32 8b /r ] SM0-1,386 */ + /* 321 001(8b) 110 : SM0,SM1,386 */ + {I_MOV, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+66994, 13, 76}, + /* 19 : MOV reg64,rm64 [rm: o64 8b /r ] SM0-1,LONG,PROT,X86_64 */ + /* 324 001(8b) 110 : SM0,SM1,LONG,PROT,X86_64 */ + {I_MOV, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+67000, 14, 77}, + /* 20 : MOV reg8,imm8 [ri: o8 b0+r ib ] SM0-1,8086 */ + /* 010 260(021 : SM0,SM1,8086 */ + {I_MOV, 2, {REG_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+72592, 12, 80}, + /* 21 : MOV reg16,imm16 [ri: o16 b8+r iw ] SM0-1,8086 */ + /* 320 010 270(031 : SM0,SM1,8086 */ + {I_MOV, 2, {REG_GPR|BITS16,IMM_NORMAL|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+71359, 12, 81}, + /* 22 : MOV reg32,imm32 [ri: o32 b8+r id ] SM0-1,386 */ + /* 321 010 270(041 : SM0,SM1,386 */ + {I_MOV, 2, {REG_GPR|BITS32,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+71364, 13, 82}, + /* 23 : MOV reg64,imm64 [ri: o64 b8+r iq ] SM0-1,LONG,PROT,X86_64 */ + /* 324 010 270(055 : SM0,SM1,LONG,PROT,X86_64 */ + {I_MOV, 2, {REG_GPR|BITS64,IMM_NORMAL|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+71369, 14, 83}, + /* 24 : MOV rm8,imm8 [mi: hlexr o8 c6 /0 ib ] SM0-1,8086 */ + /* 271 001(c6) 200 021 : SM0,SM1,8086 */ + {I_MOV, 2, {RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+66435, 12, 92}, + /* 25 : MOV rm16,imm16 [mi: hlexr o16 c7 /0 iw ] SM0-1,8086 */ + /* 271 320 001(c7) 200 031 : SM0,SM1,8086 */ + {I_MOV, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+54851, 12, 93}, + /* 26 : MOV rm32,imm32 [mi: hlexr o32 c7 /0 id ] SM0-1,386 */ + /* 271 321 001(c7) 200 041 : SM0,SM1,386 */ + {I_MOV, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+54858, 13, 94}, + /* 27 : MOV rm64,sdword64 [mi: hlexr o64 c7 /0 id,s ] SM0-1,LONG,PROT,X86_64 */ + /* 271 324 001(c7) 200 255 : SM0,SM1,LONG,PROT,X86_64 */ + {I_MOV, 2, {RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+54865, 14, 95}, + /* 28 : MOVRS reg8,mem8 [rm: o8 norep 0f38 8a /r ] SM0-1,FUTURE */ + /* 331 356 001(8a) 110 : SM0,SM1,NOAPX,FUTURE */ + {I_MOVRS, 2, {REG_GPR|BITS8|RN_L16,MEMORY|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66441, 17, 96}, + /* 29 : MOVRS reg16,mem16 [rm: o16 norep 0f38 8b /r ] SM0-1,FUTURE */ + /* 320 331 356 001(8b) 110 : SM0,SM1,NOAPX,FUTURE */ + {I_MOVRS, 2, {REG_GPR|BITS16|RN_L16,MEMORY|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+54872, 17, 97}, + /* 30 : MOVRS reg32,mem32 [rm: o32 norep 0f38 8b /r ] SM0-1,FUTURE */ + /* 321 331 356 001(8b) 110 : SM0,SM1,NOAPX,FUTURE */ + {I_MOVRS, 2, {REG_GPR|BITS32|RN_L16,MEMORY|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+54879, 17, 98}, + /* 31 : MOVRS reg64,mem64 [rm: o64 norep 0f38 8b /r ] SM0-1,LONG,PROT,X86_64,FUTURE */ + /* 324 331 356 001(8b) 110 : SM0,SM1,NOAPX,LONG,PROT,FUTURE */ + {I_MOVRS, 2, {REG_GPR|BITS64|RN_L16,MEMORY|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+54886, 18, 99}, + /* 32 : MOVRS reg8,mem8 [rm: evex.nf0.nd0.l0.m4.o8 8a /r ] SM0-1,FUTURE */ + /* 250(f4 7c 08) 300 001(8a) 110 : SM0,SM1,WIG,EVEX,PROT,FUTURE */ + {I_MOVRS, 2, {REG_GPR|BITS8,MEMORY|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+23323, 19, 100}, + /* 33 : MOVRS reg16,mem16 [rm: evex.nf0.nd0.l0.m4.o16 8b /r ] SM0-1,FUTURE */ + /* 250(f4 7d 08) 300 320 001(8b) 110 : SM0,SM1,EVEX,PROT,FUTURE */ + {I_MOVRS, 2, {REG_GPR|BITS16,MEMORY|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+9143, 20, 101}, + /* 34 : MOVRS reg32,mem32 [rm: evex.nf0.nd0.l0.m4.o32 8b /r ] SM0-1,FUTURE */ + /* 250(f4 7c 08) 300 321 001(8b) 110 : SM0,SM1,WW,EVEX,PROT,FUTURE */ + {I_MOVRS, 2, {REG_GPR|BITS32,MEMORY|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+9153, 21, 102}, + /* 35 : MOVRS reg64,mem64 [rm: evex.nf0.nd0.l0.m4.o64 8b /r ] SM0-1,LONG,PROT,X86_64,FUTURE */ + /* 250(f4 fc 08) 300 324 001(8b) 110 : SM0,SM1,WW,LONG,EVEX,PROT,FUTURE */ + {I_MOVRS, 2, {REG_GPR|BITS64,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+9163, 22, 103}, + /* 36 : LEA reg16,mem [rm: o16 8d /r ] 8086 */ + /* 320 001(8d) 110 : 8086 */ + {I_LEA, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+71374, 23, 106}, + /* 37 : LEA reg32,mem [rm: o32 8d /r ] 386 */ + /* 321 001(8d) 110 : 386 */ + {I_LEA, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+71379, 3, 107}, + /* 38 : LEA reg64,mem [rm: o64 8d /r ] LONG,PROT,X86_64 */ + /* 324 001(8d) 110 : LONG,PROT,X86_64 */ + {I_LEA, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+71384, 24, 108}, + /* 39 : ADD rm8,reg8 [mr: hle o8 00 /r ] SM0-1,LOCK,FL,8086 */ + /* 273 001(00) 101 : SM0,SM1,LOCK,FL,8086 */ + {I_ADD, 2, {RM_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+71389, 25, 114}, + /* 40 : ADD rm16,reg16 [mr: hle o16 01 /r ] SM0-1,LOCK,FL,8086 */ + /* 273 320 001(01) 101 : SM0,SM1,LOCK,FL,8086 */ + {I_ADD, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66447, 25, 115}, + /* 41 : ADD rm32,reg32 [mr: hle o32 01 /r ] SM0-1,LOCK,FL,386 */ + /* 273 321 001(01) 101 : SM0,SM1,LOCK,FL,386 */ + {I_ADD, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+66453, 26, 116}, + /* 42 : ADD rm64,reg64 [mr: hle o64 01 /r ] SM0-1,LOCK,LONG,FL,PROT,X86_64 */ + /* 273 324 001(01) 101 : SM0,SM1,LOCK,LONG,FL,PROT,X86_64 */ + {I_ADD, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+66459, 27, 117}, + /* 43 : ADD reg8,rm8 [rm: o8 02 /r ] SM0-1,FL,8086 */ + /* 001(02) 110 : SM0,SM1,FL,8086 */ + {I_ADD, 2, {REG_GPR|BITS8,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+69539, 28, 118}, + /* 44 : ADD reg16,rm16 [rm: o16 03 /r ] SM0-1,FL,8086 */ + /* 320 001(03) 110 : SM0,SM1,FL,8086 */ + {I_ADD, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+9198, 28, 119}, + /* 45 : ADD reg32,rm32 [rm: o32 03 /r ] SM0-1,FL,386 */ + /* 321 001(03) 110 : SM0,SM1,FL,386 */ + {I_ADD, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+9228, 29, 120}, + /* 46 : ADD reg64,rm64 [rm: o64 03 /r ] SM0-1,LONG,FL,PROT,X86_64 */ + /* 324 001(03) 110 : SM0,SM1,LONG,FL,PROT,X86_64 */ + {I_ADD, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+9258, 30, 121}, + /* 47 : ADD reg_al,imm8 [-i: o8 04 ib ] SM0-1,FL,8086 */ + /* 001(04) 021 : SM0,SM1,FL,8086 */ + {I_ADD, 2, {REG_AL,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+72596, 28, 122}, + /* 48 : ADD rm8,imm8 [mi: hle 80 /0 ib ] SM0-1,LOCK,FL,8086 */ + /* 273 001(80) 200 021 : SM0,SM1,LOCK,FL,8086 */ + {I_ADD, 2, {RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+66465, 25, 123}, + /* 49 : ADD rm16,sbyteword16 [mi: hle o16 83 /0 ib,s ] SM0-1,LOCK,FL,8086 */ + /* 273 320 001(83) 200 275 : SM0,SM1,LOCK,FL,8086 */ + {I_ADD, 2, {RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+54893, 25, 124}, + /* 50 : ADD reg_ax,imm16 [-i: o16 05 iw ] SM0-1,FL,8086 */ + /* 320 001(05) 031 : SM0,SM1,FL,8086 */ + {I_ADD, 2, {REG_AX,IMM_NORMAL|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+71394, 28, 125}, + /* 51 : ADD rm16,imm16 [mi: hle o16 81 /0 iw ] SM0-1,LOCK,FL,8086 */ + /* 273 320 001(81) 200 031 : SM0,SM1,LOCK,FL,8086 */ + {I_ADD, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+54900, 25, 126}, + /* 52 : ADD rm32,sbytedword32 [mi: hle o32 83 /0 ib,s ] SM0-1,ZU,LOCK,FL,386 */ + /* 273 321 001(83) 200 275 : SM0,SM1,ZU,LOCK,FL,386 */ + {I_ADD, 2, {RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+54907, 31, 127}, + /* 53 : ADD reg_eax,imm32 [-i: o32 05 id ] SM0-1,ZU,FL,386 */ + /* 321 001(05) 041 : SM0,SM1,ZU,FL,386 */ + {I_ADD, 2, {REG_EAX,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+71399, 32, 128}, + /* 54 : ADD rm32,imm32 [mi: hle o32 81 /0 id ] SM0-1,ZU,LOCK,FL,386 */ + /* 273 321 001(81) 200 041 : SM0,SM1,ZU,LOCK,FL,386 */ + {I_ADD, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+54914, 31, 129}, + /* 55 : ADD rm64,sbytedword64 [mi: hle o64 83 /0 ib,s ] SM0-1,ZU,LOCK,LONG,FL,PROT,X86_64 */ + /* 273 324 001(83) 200 275 : SM0,SM1,ZU,LOCK,LONG,FL,PROT,X86_64 */ + {I_ADD, 2, {RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+54921, 33, 130}, + /* 56 : ADD reg_rax,sdword64 [-i: o64 05 id,s ] SM0-1,ZU,LONG,FL,PROT,X86_64 */ + /* 324 001(05) 255 : SM0,SM1,ZU,LONG,FL,PROT,X86_64 */ + {I_ADD, 2, {REG_RAX,SDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+71404, 34, 131}, + /* 57 : ADD rm64,sdword64 [mi: hle o64 81 /0 id,s ] SM0-1,ZU,LOCK,LONG,FL,PROT,X86_64 */ + /* 273 324 001(81) 200 255 : SM0,SM1,ZU,LOCK,LONG,FL,PROT,X86_64 */ + {I_ADD, 2, {RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+54928, 33, 132}, + /* 58 : ADD reg8?,reg8,rm8 [vrm: evex.nd1.nf.l0.m4.o8 02 /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(02) 121 : SM0,SM1,SM2,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 3, {REG_GPR|BITS8,REG_GPR|BITS8,RM_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+23332, 35, 133}, + /* 59 : ADD reg8,rm8 [rm: evex.nd0.nf.l0.m4.o8 02 /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(02) 110 : SM0,SM1,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 2, {REG_GPR|BITS8,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+23341, 36, 133}, + /* 60 : ADD reg16?,reg16,rm16 [vrm: evex.nd1.nf.l0.m4.o16 03 /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(03) 121 : SM0,SM1,SM2,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+9173, 38, 134}, + /* 61 : ADD reg16,rm16 [rm: evex.nd0.nf.l0.m4.o16 03 /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(03) 110 : SM0,SM1,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+9183, 39, 134}, + /* 62 : ADD reg32?,reg32,rm32 [vrm: evex.nd1.nf.l0.m4.o32 03 /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(03) 121 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+9203, 41, 135}, + /* 63 : ADD reg32,rm32 [rm: evex.nd0.nf.l0.m4.o32 03 /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(03) 110 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+9213, 42, 135}, + /* 64 : ADD reg64?,reg64,rm64 [vrm: evex.nd1.nf.l0.m4.o64 03 /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(03) 121 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+9233, 41, 136}, + /* 65 : ADD reg64,rm64 [rm: evex.nd0.nf.l0.m4.o64 03 /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(03) 110 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+9243, 42, 136}, + /* 66 : ADD reg8?,rm8,reg8 [vmr: evex.nd1.nf.l0.m4.o8 00 /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(00) 112 : SM0,SM1,SM2,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 3, {REG_GPR|BITS8,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+23359, 35, 137}, + /* 67 : ADD rm8,reg8 [mr: evex.nd0.nf.l0.m4.o8 00 /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(00) 101 : SM0,SM1,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 2, {RM_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+23368, 36, 137}, + /* 68 : ADD reg16?,rm16,reg16 [vmr: evex.nd1.nf.l0.m4.o16 01 /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(01) 112 : SM0,SM1,SM2,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 3, {REG_GPR|BITS16,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+9263, 38, 138}, + /* 69 : ADD rm16,reg16 [mr: evex.nd0.nf.l0.m4.o16 01 /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(01) 101 : SM0,SM1,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+9273, 39, 138}, + /* 70 : ADD reg32?,rm32,reg32 [vmr: evex.nd1.nf.l0.m4.o32 01 /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(01) 112 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+9293, 41, 139}, + /* 71 : ADD rm32,reg32 [mr: evex.nd0.nf.l0.m4.o32 01 /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(01) 101 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+9303, 42, 139}, + /* 72 : ADD reg64?,rm64,reg64 [vmr: evex.nd1.nf.l0.m4.o64 01 /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(01) 112 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+9323, 41, 140}, + /* 73 : ADD rm64,reg64 [mr: evex.nd0.nf.l0.m4.o64 01 /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(01) 101 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+9333, 42, 140}, + /* 74 : ADD reg16?,rm16,sbyteword16 [vmi: evex.nd1.nf.l0.m4.o16 83 /0 ib,s ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(83) 210 276 : SM0,SM1,SM2,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 3, {REG_GPR|BITS16,RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+24, 38, 141}, + /* 75 : ADD rm16,sbyteword16 [mi: evex.nd0.nf.l0.m4.o16 83 /0 ib,s ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(83) 200 275 : SM0,SM1,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 2, {RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+35, 39, 141}, + /* 76 : ADD reg32?,rm32,sbytedword32 [vmi: evex.nd1.nf.l0.m4.o32 83 /0 ib,s ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(83) 210 276 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 3, {REG_GPR|BITS32,RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+57, 41, 142}, + /* 77 : ADD rm32,sbytedword32 [mi: evex.nd0.nf.l0.m4.o32 83 /0 ib,s ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(83) 200 275 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 2, {RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+68, 42, 142}, + /* 78 : ADD reg64?,rm64,sbytedword64 [vmi: evex.nd1.nf.l0.m4.o64 83 /0 ib,s ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(83) 210 276 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 3, {REG_GPR|BITS64,RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+90, 41, 143}, + /* 79 : ADD rm64,sbytedword64 [mi: evex.nd0.nf.l0.m4.o64 83 /0 ib,s ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(83) 200 275 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 2, {RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+101, 42, 143}, + /* 80 : ADD reg8?,rm8,imm8 [vmi: evex.nd1.nf.l0.m4.o8 80 /0 ib ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(80) 210 022 : SM0,SM1,SM2,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 3, {REG_GPR|BITS8,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+9353, 35, 144}, + /* 81 : ADD rm8,imm8 [mi: evex.nd0.nf.l0.m4.o8 80 /0 ib ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(80) 200 021 : SM0,SM1,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 2, {RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+9363, 36, 144}, + /* 82 : ADD reg16?,rm16,imm16 [vmi: evex.nd1.nf.l0.m4.o16 81 /0 iw ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(81) 210 032 : SM0,SM1,SM2,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 3, {REG_GPR|BITS16,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+123, 38, 145}, + /* 83 : ADD rm16,imm16 [mi: evex.nd0.nf.l0.m4.o16 81 /0 iw ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(81) 200 031 : SM0,SM1,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+134, 39, 145}, + /* 84 : ADD reg32?,rm32,imm32 [vmi: evex.nd1.nf.l0.m4.o32 81 /0 id ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(81) 210 042 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 3, {REG_GPR|BITS32,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+156, 41, 146}, + /* 85 : ADD rm32,imm32 [mi: evex.nd0.nf.l0.m4.o32 81 /0 id ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(81) 200 041 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+167, 42, 146}, + /* 86 : ADD reg64?,rm64,sdword64 [vmi: evex.nd1.nf.l0.m4.o64 81 /0 id,s ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(81) 210 256 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 3, {REG_GPR|BITS64,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+189, 41, 147}, + /* 87 : ADD rm64,sdword64 [mi: evex.nd0.nf.l0.m4.o64 81 /0 id,s ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(81) 200 255 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADD, 2, {RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+200, 42, 147}, + /* 88 : OR rm8,reg8 [mr: hle o8 08 /r ] SM0-1,LOCK,FL,8086 */ + /* 273 001(08) 101 : SM0,SM1,LOCK,FL,8086 */ + {I_OR, 2, {RM_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+71409, 25, 148}, + /* 89 : OR rm16,reg16 [mr: hle o16 09 /r ] SM0-1,LOCK,FL,8086 */ + /* 273 320 001(09) 101 : SM0,SM1,LOCK,FL,8086 */ + {I_OR, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66471, 25, 149}, + /* 90 : OR rm32,reg32 [mr: hle o32 09 /r ] SM0-1,LOCK,FL,386 */ + /* 273 321 001(09) 101 : SM0,SM1,LOCK,FL,386 */ + {I_OR, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+66477, 26, 150}, + /* 91 : OR rm64,reg64 [mr: hle o64 09 /r ] SM0-1,LOCK,LONG,FL,PROT,X86_64 */ + /* 273 324 001(09) 101 : SM0,SM1,LOCK,LONG,FL,PROT,X86_64 */ + {I_OR, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+66483, 27, 151}, + /* 92 : OR reg8,rm8 [rm: o8 0a /r ] SM0-1,FL,8086 */ + /* 001(0a) 110 : SM0,SM1,FL,8086 */ + {I_OR, 2, {REG_GPR|BITS8,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+69659, 28, 152}, + /* 93 : OR reg16,rm16 [rm: o16 0b /r ] SM0-1,FL,8086 */ + /* 320 001(0b) 110 : SM0,SM1,FL,8086 */ + {I_OR, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+9408, 28, 153}, + /* 94 : OR reg32,rm32 [rm: o32 0b /r ] SM0-1,FL,386 */ + /* 321 001(0b) 110 : SM0,SM1,FL,386 */ + {I_OR, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+9438, 29, 154}, + /* 95 : OR reg64,rm64 [rm: o64 0b /r ] SM0-1,LONG,FL,PROT,X86_64 */ + /* 324 001(0b) 110 : SM0,SM1,LONG,FL,PROT,X86_64 */ + {I_OR, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+9468, 30, 155}, + /* 96 : OR reg_al,imm8 [-i: o8 0c ib ] SM0-1,FL,8086 */ + /* 001(0c) 021 : SM0,SM1,FL,8086 */ + {I_OR, 2, {REG_AL,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+72600, 28, 156}, + /* 97 : OR rm8,imm8 [mi: hle 80 /1 ib ] SM0-1,LOCK,FL,8086 */ + /* 273 001(80) 201 021 : SM0,SM1,LOCK,FL,8086 */ + {I_OR, 2, {RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+66489, 25, 157}, + /* 98 : OR rm16,sbyteword16 [mi: hle o16 83 /1 ib,s ] SM0-1,LOCK,FL,8086 */ + /* 273 320 001(83) 201 275 : SM0,SM1,LOCK,FL,8086 */ + {I_OR, 2, {RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+54935, 25, 158}, + /* 99 : OR reg_ax,imm16 [-i: o16 0d iw ] SM0-1,FL,8086 */ + /* 320 001(0d) 031 : SM0,SM1,FL,8086 */ + {I_OR, 2, {REG_AX,IMM_NORMAL|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+71414, 28, 159}, + /* 100 : OR rm16,imm16 [mi: hle o16 81 /1 iw ] SM0-1,LOCK,FL,8086 */ + /* 273 320 001(81) 201 031 : SM0,SM1,LOCK,FL,8086 */ + {I_OR, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+54942, 25, 160}, + /* 101 : OR rm32,sbytedword32 [mi: hle o32 83 /1 ib,s ] SM0-1,ZU,LOCK,FL,386 */ + /* 273 321 001(83) 201 275 : SM0,SM1,ZU,LOCK,FL,386 */ + {I_OR, 2, {RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+54949, 31, 161}, + /* 102 : OR reg_eax,imm32 [-i: o32 0d id ] SM0-1,ZU,FL,386 */ + /* 321 001(0d) 041 : SM0,SM1,ZU,FL,386 */ + {I_OR, 2, {REG_EAX,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+71419, 32, 162}, + /* 103 : OR rm32,imm32 [mi: hle o32 81 /1 id ] SM0-1,ZU,LOCK,FL,386 */ + /* 273 321 001(81) 201 041 : SM0,SM1,ZU,LOCK,FL,386 */ + {I_OR, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+54956, 31, 163}, + /* 104 : OR rm64,sbytedword64 [mi: hle o64 83 /1 ib,s ] SM0-1,ZU,LOCK,LONG,FL,PROT,X86_64 */ + /* 273 324 001(83) 201 275 : SM0,SM1,ZU,LOCK,LONG,FL,PROT,X86_64 */ + {I_OR, 2, {RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+54963, 33, 164}, + /* 105 : OR reg_rax,sdword64 [-i: o64 0d id,s ] SM0-1,ZU,LONG,FL,PROT,X86_64 */ + /* 324 001(0d) 255 : SM0,SM1,ZU,LONG,FL,PROT,X86_64 */ + {I_OR, 2, {REG_RAX,SDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+71424, 34, 165}, + /* 106 : OR rm64,sdword64 [mi: hle o64 81 /1 id,s ] SM0-1,ZU,LOCK,LONG,FL,PROT,X86_64 */ + /* 273 324 001(81) 201 255 : SM0,SM1,ZU,LOCK,LONG,FL,PROT,X86_64 */ + {I_OR, 2, {RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+54970, 33, 166}, + /* 107 : OR reg8?,reg8,rm8 [vrm: evex.nd1.nf.l0.m4.o8 0a /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(0a) 121 : SM0,SM1,SM2,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 3, {REG_GPR|BITS8,REG_GPR|BITS8,RM_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+23386, 35, 167}, + /* 108 : OR reg8,rm8 [rm: evex.nd0.nf.l0.m4.o8 0a /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(0a) 110 : SM0,SM1,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 2, {REG_GPR|BITS8,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+23395, 36, 167}, + /* 109 : OR reg16?,reg16,rm16 [vrm: evex.nd1.nf.l0.m4.o16 0b /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(0b) 121 : SM0,SM1,SM2,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+9383, 38, 168}, + /* 110 : OR reg16,rm16 [rm: evex.nd0.nf.l0.m4.o16 0b /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(0b) 110 : SM0,SM1,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+9393, 39, 168}, + /* 111 : OR reg32?,reg32,rm32 [vrm: evex.nd1.nf.l0.m4.o32 0b /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(0b) 121 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+9413, 41, 169}, + /* 112 : OR reg32,rm32 [rm: evex.nd0.nf.l0.m4.o32 0b /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(0b) 110 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+9423, 42, 169}, + /* 113 : OR reg64?,reg64,rm64 [vrm: evex.nd1.nf.l0.m4.o64 0b /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(0b) 121 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+9443, 41, 170}, + /* 114 : OR reg64,rm64 [rm: evex.nd0.nf.l0.m4.o64 0b /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(0b) 110 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+9453, 42, 170}, + /* 115 : OR reg8?,rm8,reg8 [vmr: evex.nd1.nf.l0.m4.o8 08 /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(08) 112 : SM0,SM1,SM2,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 3, {REG_GPR|BITS8,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+23413, 35, 171}, + /* 116 : OR rm8,reg8 [mr: evex.nd0.nf.l0.m4.o8 08 /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(08) 101 : SM0,SM1,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 2, {RM_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+23422, 36, 171}, + /* 117 : OR reg16?,rm16,reg16 [vmr: evex.nd1.nf.l0.m4.o16 09 /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(09) 112 : SM0,SM1,SM2,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 3, {REG_GPR|BITS16,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+9473, 38, 172}, + /* 118 : OR rm16,reg16 [mr: evex.nd0.nf.l0.m4.o16 09 /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(09) 101 : SM0,SM1,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+9483, 39, 172}, + /* 119 : OR reg32?,rm32,reg32 [vmr: evex.nd1.nf.l0.m4.o32 09 /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(09) 112 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+9503, 41, 173}, + /* 120 : OR rm32,reg32 [mr: evex.nd0.nf.l0.m4.o32 09 /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(09) 101 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+9513, 42, 173}, + /* 121 : OR reg64?,rm64,reg64 [vmr: evex.nd1.nf.l0.m4.o64 09 /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(09) 112 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+9533, 41, 174}, + /* 122 : OR rm64,reg64 [mr: evex.nd0.nf.l0.m4.o64 09 /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(09) 101 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+9543, 42, 174}, + /* 123 : OR reg16?,rm16,sbyteword16 [vmi: evex.nd1.nf.l0.m4.o16 83 /1 ib,s ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(83) 211 276 : SM0,SM1,SM2,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 3, {REG_GPR|BITS16,RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+222, 38, 175}, + /* 124 : OR rm16,sbyteword16 [mi: evex.nd0.nf.l0.m4.o16 83 /1 ib,s ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(83) 201 275 : SM0,SM1,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 2, {RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+233, 39, 175}, + /* 125 : OR reg32?,rm32,sbytedword32 [vmi: evex.nd1.nf.l0.m4.o32 83 /1 ib,s ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(83) 211 276 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 3, {REG_GPR|BITS32,RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+255, 41, 176}, + /* 126 : OR rm32,sbytedword32 [mi: evex.nd0.nf.l0.m4.o32 83 /1 ib,s ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(83) 201 275 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 2, {RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+266, 42, 176}, + /* 127 : OR reg64?,rm64,sbytedword64 [vmi: evex.nd1.nf.l0.m4.o64 83 /1 ib,s ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(83) 211 276 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 3, {REG_GPR|BITS64,RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+288, 41, 177}, + /* 128 : OR rm64,sbytedword64 [mi: evex.nd0.nf.l0.m4.o64 83 /1 ib,s ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(83) 201 275 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 2, {RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+299, 42, 177}, + /* 129 : OR reg8?,rm8,imm8 [vmi: evex.nd1.nf.l0.m4.o8 80 /1 ib ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(80) 211 022 : SM0,SM1,SM2,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 3, {REG_GPR|BITS8,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+9563, 35, 178}, + /* 130 : OR rm8,imm8 [mi: evex.nd0.nf.l0.m4.o8 80 /1 ib ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(80) 201 021 : SM0,SM1,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 2, {RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+9573, 36, 178}, + /* 131 : OR reg16?,rm16,imm16 [vmi: evex.nd1.nf.l0.m4.o16 81 /1 iw ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(81) 211 032 : SM0,SM1,SM2,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 3, {REG_GPR|BITS16,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+321, 38, 179}, + /* 132 : OR rm16,imm16 [mi: evex.nd0.nf.l0.m4.o16 81 /1 iw ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(81) 201 031 : SM0,SM1,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+332, 39, 179}, + /* 133 : OR reg32?,rm32,imm32 [vmi: evex.nd1.nf.l0.m4.o32 81 /1 id ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(81) 211 042 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 3, {REG_GPR|BITS32,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+354, 41, 180}, + /* 134 : OR rm32,imm32 [mi: evex.nd0.nf.l0.m4.o32 81 /1 id ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(81) 201 041 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+365, 42, 180}, + /* 135 : OR reg64?,rm64,sdword64 [vmi: evex.nd1.nf.l0.m4.o64 81 /1 id,s ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(81) 211 256 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 3, {REG_GPR|BITS64,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+387, 41, 181}, + /* 136 : OR rm64,sdword64 [mi: evex.nd0.nf.l0.m4.o64 81 /1 id,s ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(81) 201 255 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_OR, 2, {RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+398, 42, 181}, + /* 137 : ADC rm8,reg8 [mr: hle o8 10 /r ] SM0-1,LOCK,FL,8086 */ + /* 273 001(10) 101 : SM0,SM1,LOCK,FL,8086 */ + {I_ADC, 2, {RM_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+71429, 25, 182}, + /* 138 : ADC rm16,reg16 [mr: hle o16 11 /r ] SM0-1,LOCK,FL,8086 */ + /* 273 320 001(11) 101 : SM0,SM1,LOCK,FL,8086 */ + {I_ADC, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66495, 25, 183}, + /* 139 : ADC rm32,reg32 [mr: hle o32 11 /r ] SM0-1,LOCK,FL,386 */ + /* 273 321 001(11) 101 : SM0,SM1,LOCK,FL,386 */ + {I_ADC, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+66501, 26, 184}, + /* 140 : ADC rm64,reg64 [mr: hle o64 11 /r ] SM0-1,LOCK,LONG,FL,PROT,X86_64 */ + /* 273 324 001(11) 101 : SM0,SM1,LOCK,LONG,FL,PROT,X86_64 */ + {I_ADC, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+66507, 27, 185}, + /* 141 : ADC reg8,rm8 [rm: o8 12 /r ] SM0-1,FL,8086 */ + /* 001(12) 110 : SM0,SM1,FL,8086 */ + {I_ADC, 2, {REG_GPR|BITS8,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+69437, 28, 186}, + /* 142 : ADC reg16,rm16 [rm: o16 13 /r ] SM0-1,FL,8086 */ + /* 320 001(13) 110 : SM0,SM1,FL,8086 */ + {I_ADC, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+9618, 28, 187}, + /* 143 : ADC reg32,rm32 [rm: o32 13 /r ] SM0-1,FL,386 */ + /* 321 001(13) 110 : SM0,SM1,FL,386 */ + {I_ADC, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+9648, 29, 188}, + /* 144 : ADC reg64,rm64 [rm: o64 13 /r ] SM0-1,LONG,FL,PROT,X86_64 */ + /* 324 001(13) 110 : SM0,SM1,LONG,FL,PROT,X86_64 */ + {I_ADC, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+9678, 30, 189}, + /* 145 : ADC reg_al,imm8 [-i: o8 14 ib ] SM0-1,FL,8086 */ + /* 001(14) 021 : SM0,SM1,FL,8086 */ + {I_ADC, 2, {REG_AL,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+72604, 28, 190}, + /* 146 : ADC rm8,imm8 [mi: hle 80 /2 ib ] SM0-1,LOCK,FL,8086 */ + /* 273 001(80) 202 021 : SM0,SM1,LOCK,FL,8086 */ + {I_ADC, 2, {RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+66513, 25, 191}, + /* 147 : ADC rm16,sbyteword16 [mi: hle o16 83 /2 ib,s ] SM0-1,LOCK,FL,8086 */ + /* 273 320 001(83) 202 275 : SM0,SM1,LOCK,FL,8086 */ + {I_ADC, 2, {RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+54977, 25, 192}, + /* 148 : ADC reg_ax,imm16 [-i: o16 15 iw ] SM0-1,FL,8086 */ + /* 320 001(15) 031 : SM0,SM1,FL,8086 */ + {I_ADC, 2, {REG_AX,IMM_NORMAL|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+71434, 28, 193}, + /* 149 : ADC rm16,imm16 [mi: hle o16 81 /2 iw ] SM0-1,LOCK,FL,8086 */ + /* 273 320 001(81) 202 031 : SM0,SM1,LOCK,FL,8086 */ + {I_ADC, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+54984, 25, 194}, + /* 150 : ADC rm32,sbytedword32 [mi: hle o32 83 /2 ib,s ] SM0-1,ZU,LOCK,FL,386 */ + /* 273 321 001(83) 202 275 : SM0,SM1,ZU,LOCK,FL,386 */ + {I_ADC, 2, {RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+54991, 31, 195}, + /* 151 : ADC reg_eax,imm32 [-i: o32 15 id ] SM0-1,ZU,FL,386 */ + /* 321 001(15) 041 : SM0,SM1,ZU,FL,386 */ + {I_ADC, 2, {REG_EAX,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+71439, 32, 196}, + /* 152 : ADC rm32,imm32 [mi: hle o32 81 /2 id ] SM0-1,ZU,LOCK,FL,386 */ + /* 273 321 001(81) 202 041 : SM0,SM1,ZU,LOCK,FL,386 */ + {I_ADC, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+54998, 31, 197}, + /* 153 : ADC rm64,sbytedword64 [mi: hle o64 83 /2 ib,s ] SM0-1,ZU,LOCK,LONG,FL,PROT,X86_64 */ + /* 273 324 001(83) 202 275 : SM0,SM1,ZU,LOCK,LONG,FL,PROT,X86_64 */ + {I_ADC, 2, {RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+55005, 33, 198}, + /* 154 : ADC reg_rax,sdword64 [-i: o64 15 id,s ] SM0-1,ZU,LONG,FL,PROT,X86_64 */ + /* 324 001(15) 255 : SM0,SM1,ZU,LONG,FL,PROT,X86_64 */ + {I_ADC, 2, {REG_RAX,SDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+71444, 34, 199}, + /* 155 : ADC rm64,sdword64 [mi: hle o64 81 /2 id,s ] SM0-1,ZU,LOCK,LONG,FL,PROT,X86_64 */ + /* 273 324 001(81) 202 255 : SM0,SM1,ZU,LOCK,LONG,FL,PROT,X86_64 */ + {I_ADC, 2, {RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+55012, 33, 200}, + /* 156 : ADC reg8?,reg8,rm8 [vrm: evex.nd1..l0.m4.o8 12 /r ] SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(12) 121 : SM0,SM1,SM2,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 3, {REG_GPR|BITS8,REG_GPR|BITS8,RM_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+23440, 44, 201}, + /* 157 : ADC reg8,rm8 [rm: evex.nd0..l0.m4.o8 12 /r ] SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(12) 110 : SM0,SM1,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 2, {REG_GPR|BITS8,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+23449, 45, 201}, + /* 158 : ADC reg16?,reg16,rm16 [vrm: evex.nd1..l0.m4.o16 13 /r ] SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(13) 121 : SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+9593, 47, 202}, + /* 159 : ADC reg16,rm16 [rm: evex.nd0..l0.m4.o16 13 /r ] SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(13) 110 : SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+9603, 48, 202}, + /* 160 : ADC reg32?,reg32,rm32 [vrm: evex.nd1..l0.m4.o32 13 /r ] SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(13) 121 : SM0,SM1,SM2,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+9623, 50, 203}, + /* 161 : ADC reg32,rm32 [rm: evex.nd0..l0.m4.o32 13 /r ] SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(13) 110 : SM0,SM1,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+9633, 51, 203}, + /* 162 : ADC reg64?,reg64,rm64 [vrm: evex.nd1..l0.m4.o64 13 /r ] SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(13) 121 : SM0,SM1,SM2,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+9653, 50, 204}, + /* 163 : ADC reg64,rm64 [rm: evex.nd0..l0.m4.o64 13 /r ] SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(13) 110 : SM0,SM1,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+9663, 51, 204}, + /* 164 : ADC reg8?,rm8,reg8 [vmr: evex.nd1..l0.m4.o8 10 /r ] SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(10) 112 : SM0,SM1,SM2,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 3, {REG_GPR|BITS8,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+23467, 44, 205}, + /* 165 : ADC rm8,reg8 [mr: evex.nd0..l0.m4.o8 10 /r ] SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(10) 101 : SM0,SM1,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 2, {RM_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+23476, 45, 205}, + /* 166 : ADC reg16?,rm16,reg16 [vmr: evex.nd1..l0.m4.o16 11 /r ] SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(11) 112 : SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 3, {REG_GPR|BITS16,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+9683, 47, 206}, + /* 167 : ADC rm16,reg16 [mr: evex.nd0..l0.m4.o16 11 /r ] SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(11) 101 : SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+9693, 48, 206}, + /* 168 : ADC reg32?,rm32,reg32 [vmr: evex.nd1..l0.m4.o32 11 /r ] SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(11) 112 : SM0,SM1,SM2,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+9713, 50, 207}, + /* 169 : ADC rm32,reg32 [mr: evex.nd0..l0.m4.o32 11 /r ] SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(11) 101 : SM0,SM1,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+9723, 51, 207}, + /* 170 : ADC reg64?,rm64,reg64 [vmr: evex.nd1..l0.m4.o64 11 /r ] SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(11) 112 : SM0,SM1,SM2,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+9743, 50, 208}, + /* 171 : ADC rm64,reg64 [mr: evex.nd0..l0.m4.o64 11 /r ] SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(11) 101 : SM0,SM1,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+9753, 51, 208}, + /* 172 : ADC reg16?,rm16,sbyteword16 [vmi: evex.nd1..l0.m4.o16 83 /2 ib,s ] SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(83) 212 276 : SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 3, {REG_GPR|BITS16,RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+420, 47, 209}, + /* 173 : ADC rm16,sbyteword16 [mi: evex.nd0..l0.m4.o16 83 /2 ib,s ] SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(83) 202 275 : SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 2, {RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+431, 48, 209}, + /* 174 : ADC reg32?,rm32,sbytedword32 [vmi: evex.nd1..l0.m4.o32 83 /2 ib,s ] SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(83) 212 276 : SM0,SM1,SM2,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 3, {REG_GPR|BITS32,RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+453, 50, 210}, + /* 175 : ADC rm32,sbytedword32 [mi: evex.nd0..l0.m4.o32 83 /2 ib,s ] SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(83) 202 275 : SM0,SM1,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 2, {RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+464, 51, 210}, + /* 176 : ADC reg64?,rm64,sbytedword64 [vmi: evex.nd1..l0.m4.o64 83 /2 ib,s ] SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(83) 212 276 : SM0,SM1,SM2,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 3, {REG_GPR|BITS64,RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+486, 50, 211}, + /* 177 : ADC rm64,sbytedword64 [mi: evex.nd0..l0.m4.o64 83 /2 ib,s ] SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(83) 202 275 : SM0,SM1,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 2, {RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+497, 51, 211}, + /* 178 : ADC reg8?,rm8,imm8 [vmi: evex.nd1..l0.m4.o8 80 /2 ib ] SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(80) 212 022 : SM0,SM1,SM2,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 3, {REG_GPR|BITS8,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+9773, 44, 212}, + /* 179 : ADC rm8,imm8 [mi: evex.nd0..l0.m4.o8 80 /2 ib ] SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(80) 202 021 : SM0,SM1,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 2, {RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+9783, 45, 212}, + /* 180 : ADC reg16?,rm16,imm16 [vmi: evex.nd1..l0.m4.o16 81 /2 iw ] SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(81) 212 032 : SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 3, {REG_GPR|BITS16,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+519, 47, 213}, + /* 181 : ADC rm16,imm16 [mi: evex.nd0..l0.m4.o16 81 /2 iw ] SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(81) 202 031 : SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+530, 48, 213}, + /* 182 : ADC reg32?,rm32,imm32 [vmi: evex.nd1..l0.m4.o32 81 /2 id ] SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(81) 212 042 : SM0,SM1,SM2,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 3, {REG_GPR|BITS32,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+552, 50, 214}, + /* 183 : ADC rm32,imm32 [mi: evex.nd0..l0.m4.o32 81 /2 id ] SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(81) 202 041 : SM0,SM1,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+563, 51, 214}, + /* 184 : ADC reg64?,rm64,sdword64 [vmi: evex.nd1..l0.m4.o64 81 /2 id,s ] SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(81) 212 256 : SM0,SM1,SM2,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 3, {REG_GPR|BITS64,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+585, 50, 215}, + /* 185 : ADC rm64,sdword64 [mi: evex.nd0..l0.m4.o64 81 /2 id,s ] SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(81) 202 255 : SM0,SM1,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ADC, 2, {RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+596, 51, 215}, + /* 186 : SBB rm8,reg8 [mr: hle o8 18 /r ] SM0-1,LOCK,FL,8086 */ + /* 273 001(18) 101 : SM0,SM1,LOCK,FL,8086 */ + {I_SBB, 2, {RM_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+71449, 25, 216}, + /* 187 : SBB rm16,reg16 [mr: hle o16 19 /r ] SM0-1,LOCK,FL,8086 */ + /* 273 320 001(19) 101 : SM0,SM1,LOCK,FL,8086 */ + {I_SBB, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66519, 25, 217}, + /* 188 : SBB rm32,reg32 [mr: hle o32 19 /r ] SM0-1,LOCK,FL,386 */ + /* 273 321 001(19) 101 : SM0,SM1,LOCK,FL,386 */ + {I_SBB, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+66525, 26, 218}, + /* 189 : SBB rm64,reg64 [mr: hle o64 19 /r ] SM0-1,LOCK,LONG,FL,PROT,X86_64 */ + /* 273 324 001(19) 101 : SM0,SM1,LOCK,LONG,FL,PROT,X86_64 */ + {I_SBB, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+66531, 27, 219}, + /* 190 : SBB reg8,rm8 [rm: o8 1a /r ] SM0-1,FL,8086 */ + /* 001(1a) 110 : SM0,SM1,FL,8086 */ + {I_SBB, 2, {REG_GPR|BITS8,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+70031, 28, 220}, + /* 191 : SBB reg16,rm16 [rm: o16 1b /r ] SM0-1,FL,8086 */ + /* 320 001(1b) 110 : SM0,SM1,FL,8086 */ + {I_SBB, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+9828, 28, 221}, + /* 192 : SBB reg32,rm32 [rm: o32 1b /r ] SM0-1,FL,386 */ + /* 321 001(1b) 110 : SM0,SM1,FL,386 */ + {I_SBB, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+9858, 29, 222}, + /* 193 : SBB reg64,rm64 [rm: o64 1b /r ] SM0-1,LONG,FL,PROT,X86_64 */ + /* 324 001(1b) 110 : SM0,SM1,LONG,FL,PROT,X86_64 */ + {I_SBB, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+9888, 30, 223}, + /* 194 : SBB reg_al,imm8 [-i: o8 1c ib ] SM0-1,FL,8086 */ + /* 001(1c) 021 : SM0,SM1,FL,8086 */ + {I_SBB, 2, {REG_AL,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+72608, 28, 224}, + /* 195 : SBB rm8,imm8 [mi: hle 80 /3 ib ] SM0-1,LOCK,FL,8086 */ + /* 273 001(80) 203 021 : SM0,SM1,LOCK,FL,8086 */ + {I_SBB, 2, {RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+66537, 25, 225}, + /* 196 : SBB rm16,sbyteword16 [mi: hle o16 83 /3 ib,s ] SM0-1,LOCK,FL,8086 */ + /* 273 320 001(83) 203 275 : SM0,SM1,LOCK,FL,8086 */ + {I_SBB, 2, {RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+55019, 25, 226}, + /* 197 : SBB reg_ax,imm16 [-i: o16 1d iw ] SM0-1,FL,8086 */ + /* 320 001(1d) 031 : SM0,SM1,FL,8086 */ + {I_SBB, 2, {REG_AX,IMM_NORMAL|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+71454, 28, 227}, + /* 198 : SBB rm16,imm16 [mi: hle o16 81 /3 iw ] SM0-1,LOCK,FL,8086 */ + /* 273 320 001(81) 203 031 : SM0,SM1,LOCK,FL,8086 */ + {I_SBB, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55026, 25, 228}, + /* 199 : SBB rm32,sbytedword32 [mi: hle o32 83 /3 ib,s ] SM0-1,ZU,LOCK,FL,386 */ + /* 273 321 001(83) 203 275 : SM0,SM1,ZU,LOCK,FL,386 */ + {I_SBB, 2, {RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+55033, 31, 229}, + /* 200 : SBB reg_eax,imm32 [-i: o32 1d id ] SM0-1,ZU,FL,386 */ + /* 321 001(1d) 041 : SM0,SM1,ZU,FL,386 */ + {I_SBB, 2, {REG_EAX,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+71459, 32, 230}, + /* 201 : SBB rm32,imm32 [mi: hle o32 81 /3 id ] SM0-1,ZU,LOCK,FL,386 */ + /* 273 321 001(81) 203 041 : SM0,SM1,ZU,LOCK,FL,386 */ + {I_SBB, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+55040, 31, 231}, + /* 202 : SBB rm64,sbytedword64 [mi: hle o64 83 /3 ib,s ] SM0-1,ZU,LOCK,LONG,FL,PROT,X86_64 */ + /* 273 324 001(83) 203 275 : SM0,SM1,ZU,LOCK,LONG,FL,PROT,X86_64 */ + {I_SBB, 2, {RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+55047, 33, 232}, + /* 203 : SBB reg_rax,sdword64 [-i: o64 1d id,s ] SM0-1,ZU,LONG,FL,PROT,X86_64 */ + /* 324 001(1d) 255 : SM0,SM1,ZU,LONG,FL,PROT,X86_64 */ + {I_SBB, 2, {REG_RAX,SDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+71464, 34, 233}, + /* 204 : SBB rm64,sdword64 [mi: hle o64 81 /3 id,s ] SM0-1,ZU,LOCK,LONG,FL,PROT,X86_64 */ + /* 273 324 001(81) 203 255 : SM0,SM1,ZU,LOCK,LONG,FL,PROT,X86_64 */ + {I_SBB, 2, {RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+55054, 33, 234}, + /* 205 : SBB reg8?,reg8,rm8 [vrm: evex.nd1..l0.m4.o8 1a /r ] SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(1a) 121 : SM0,SM1,SM2,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 3, {REG_GPR|BITS8,REG_GPR|BITS8,RM_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+23494, 44, 235}, + /* 206 : SBB reg8,rm8 [rm: evex.nd0..l0.m4.o8 1a /r ] SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(1a) 110 : SM0,SM1,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 2, {REG_GPR|BITS8,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+23503, 45, 235}, + /* 207 : SBB reg16?,reg16,rm16 [vrm: evex.nd1..l0.m4.o16 1b /r ] SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(1b) 121 : SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+9803, 47, 236}, + /* 208 : SBB reg16,rm16 [rm: evex.nd0..l0.m4.o16 1b /r ] SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(1b) 110 : SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+9813, 48, 236}, + /* 209 : SBB reg32?,reg32,rm32 [vrm: evex.nd1..l0.m4.o32 1b /r ] SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(1b) 121 : SM0,SM1,SM2,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+9833, 50, 237}, + /* 210 : SBB reg32,rm32 [rm: evex.nd0..l0.m4.o32 1b /r ] SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(1b) 110 : SM0,SM1,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+9843, 51, 237}, + /* 211 : SBB reg64?,reg64,rm64 [vrm: evex.nd1..l0.m4.o64 1b /r ] SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(1b) 121 : SM0,SM1,SM2,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+9863, 50, 238}, + /* 212 : SBB reg64,rm64 [rm: evex.nd0..l0.m4.o64 1b /r ] SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(1b) 110 : SM0,SM1,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+9873, 51, 238}, + /* 213 : SBB reg8?,rm8,reg8 [vmr: evex.nd1..l0.m4.o8 18 /r ] SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(18) 112 : SM0,SM1,SM2,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 3, {REG_GPR|BITS8,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+23521, 44, 239}, + /* 214 : SBB rm8,reg8 [mr: evex.nd0..l0.m4.o8 18 /r ] SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(18) 101 : SM0,SM1,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 2, {RM_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+23530, 45, 239}, + /* 215 : SBB reg16?,rm16,reg16 [vmr: evex.nd1..l0.m4.o16 19 /r ] SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(19) 112 : SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 3, {REG_GPR|BITS16,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+9893, 47, 240}, + /* 216 : SBB rm16,reg16 [mr: evex.nd0..l0.m4.o16 19 /r ] SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(19) 101 : SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+9903, 48, 240}, + /* 217 : SBB reg32?,rm32,reg32 [vmr: evex.nd1..l0.m4.o32 19 /r ] SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(19) 112 : SM0,SM1,SM2,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+9923, 50, 241}, + /* 218 : SBB rm32,reg32 [mr: evex.nd0..l0.m4.o32 19 /r ] SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(19) 101 : SM0,SM1,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+9933, 51, 241}, + /* 219 : SBB reg64?,rm64,reg64 [vmr: evex.nd1..l0.m4.o64 19 /r ] SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(19) 112 : SM0,SM1,SM2,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+9953, 50, 242}, + /* 220 : SBB rm64,reg64 [mr: evex.nd0..l0.m4.o64 19 /r ] SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(19) 101 : SM0,SM1,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+9963, 51, 242}, + /* 221 : SBB reg16?,rm16,sbyteword16 [vmi: evex.nd1..l0.m4.o16 83 /3 ib,s ] SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(83) 213 276 : SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 3, {REG_GPR|BITS16,RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+618, 47, 243}, + /* 222 : SBB rm16,sbyteword16 [mi: evex.nd0..l0.m4.o16 83 /3 ib,s ] SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(83) 203 275 : SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 2, {RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+629, 48, 243}, + /* 223 : SBB reg32?,rm32,sbytedword32 [vmi: evex.nd1..l0.m4.o32 83 /3 ib,s ] SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(83) 213 276 : SM0,SM1,SM2,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 3, {REG_GPR|BITS32,RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+651, 50, 244}, + /* 224 : SBB rm32,sbytedword32 [mi: evex.nd0..l0.m4.o32 83 /3 ib,s ] SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(83) 203 275 : SM0,SM1,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 2, {RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+662, 51, 244}, + /* 225 : SBB reg64?,rm64,sbytedword64 [vmi: evex.nd1..l0.m4.o64 83 /3 ib,s ] SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(83) 213 276 : SM0,SM1,SM2,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 3, {REG_GPR|BITS64,RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+684, 50, 245}, + /* 226 : SBB rm64,sbytedword64 [mi: evex.nd0..l0.m4.o64 83 /3 ib,s ] SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(83) 203 275 : SM0,SM1,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 2, {RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+695, 51, 245}, + /* 227 : SBB reg8?,rm8,imm8 [vmi: evex.nd1..l0.m4.o8 80 /3 ib ] SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(80) 213 022 : SM0,SM1,SM2,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 3, {REG_GPR|BITS8,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+9983, 44, 246}, + /* 228 : SBB rm8,imm8 [mi: evex.nd0..l0.m4.o8 80 /3 ib ] SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(80) 203 021 : SM0,SM1,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 2, {RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+9993, 45, 246}, + /* 229 : SBB reg16?,rm16,imm16 [vmi: evex.nd1..l0.m4.o16 81 /3 iw ] SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(81) 213 032 : SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 3, {REG_GPR|BITS16,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+717, 47, 247}, + /* 230 : SBB rm16,imm16 [mi: evex.nd0..l0.m4.o16 81 /3 iw ] SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(81) 203 031 : SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+728, 48, 247}, + /* 231 : SBB reg32?,rm32,imm32 [vmi: evex.nd1..l0.m4.o32 81 /3 id ] SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(81) 213 042 : SM0,SM1,SM2,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 3, {REG_GPR|BITS32,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+750, 50, 248}, + /* 232 : SBB rm32,imm32 [mi: evex.nd0..l0.m4.o32 81 /3 id ] SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(81) 203 041 : SM0,SM1,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+761, 51, 248}, + /* 233 : SBB reg64?,rm64,sdword64 [vmi: evex.nd1..l0.m4.o64 81 /3 id,s ] SM0,SM1,SM2,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(81) 213 256 : SM0,SM1,SM2,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 3, {REG_GPR|BITS64,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+783, 50, 249}, + /* 234 : SBB rm64,sdword64 [mi: evex.nd0..l0.m4.o64 81 /3 id,s ] SM0,SM1,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(81) 203 255 : SM0,SM1,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SBB, 2, {RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+794, 51, 249}, + /* 235 : AND rm8,reg8 [mr: hle o8 20 /r ] SM0-1,LOCK,FL,8086 */ + /* 273 001(20) 101 : SM0,SM1,LOCK,FL,8086 */ + {I_AND, 2, {RM_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+71469, 25, 250}, + /* 236 : AND rm16,reg16 [mr: hle o16 21 /r ] SM0-1,LOCK,FL,8086 */ + /* 273 320 001(21) 101 : SM0,SM1,LOCK,FL,8086 */ + {I_AND, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66543, 25, 251}, + /* 237 : AND rm32,reg32 [mr: hle o32 21 /r ] SM0-1,LOCK,FL,386 */ + /* 273 321 001(21) 101 : SM0,SM1,LOCK,FL,386 */ + {I_AND, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+66549, 26, 252}, + /* 238 : AND rm64,reg64 [mr: hle o64 21 /r ] SM0-1,LOCK,LONG,FL,PROT,X86_64 */ + /* 273 324 001(21) 101 : SM0,SM1,LOCK,LONG,FL,PROT,X86_64 */ + {I_AND, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+66555, 27, 253}, + /* 239 : AND reg8,rm8 [rm: o8 22 /r ] SM0-1,FL,8086 */ + /* 001(22) 110 : SM0,SM1,FL,8086 */ + {I_AND, 2, {REG_GPR|BITS8,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+69791, 28, 254}, + /* 240 : AND reg16,rm16 [rm: o16 23 /r ] SM0-1,FL,8086 */ + /* 320 001(23) 110 : SM0,SM1,FL,8086 */ + {I_AND, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+10038, 28, 255}, + /* 241 : AND reg32,rm32 [rm: o32 23 /r ] SM0-1,FL,386 */ + /* 321 001(23) 110 : SM0,SM1,FL,386 */ + {I_AND, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+10068, 29, 256}, + /* 242 : AND reg64,rm64 [rm: o64 23 /r ] SM0-1,LONG,FL,PROT,X86_64 */ + /* 324 001(23) 110 : SM0,SM1,LONG,FL,PROT,X86_64 */ + {I_AND, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+10098, 30, 257}, + /* 243 : AND reg_al,imm8 [-i: o8 24 ib ] SM0-1,FL,8086 */ + /* 001(24) 021 : SM0,SM1,FL,8086 */ + {I_AND, 2, {REG_AL,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+72612, 28, 258}, + /* 244 : AND rm8,imm8 [mi: hle 80 /4 ib ] SM0-1,LOCK,FL,8086 */ + /* 273 001(80) 204 021 : SM0,SM1,LOCK,FL,8086 */ + {I_AND, 2, {RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+66561, 25, 259}, + /* 245 : AND rm16,sbyteword16 [mi: hle o16 83 /4 ib,s ] SM0-1,LOCK,FL,8086 */ + /* 273 320 001(83) 204 275 : SM0,SM1,LOCK,FL,8086 */ + {I_AND, 2, {RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+55061, 25, 260}, + /* 246 : AND reg_ax,imm16 [-i: o16 25 iw ] SM0-1,FL,8086 */ + /* 320 001(25) 031 : SM0,SM1,FL,8086 */ + {I_AND, 2, {REG_AX,IMM_NORMAL|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+71474, 28, 261}, + /* 247 : AND rm16,imm16 [mi: hle o16 81 /4 iw ] SM0-1,LOCK,FL,8086 */ + /* 273 320 001(81) 204 031 : SM0,SM1,LOCK,FL,8086 */ + {I_AND, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55068, 25, 262}, + /* 248 : AND rm32,sbytedword32 [mi: hle o32 83 /4 ib,s ] SM0-1,ZU,LOCK,FL,386 */ + /* 273 321 001(83) 204 275 : SM0,SM1,ZU,LOCK,FL,386 */ + {I_AND, 2, {RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+55075, 31, 263}, + /* 249 : AND reg_eax,imm32 [-i: o32 25 id ] SM0-1,ZU,FL,386 */ + /* 321 001(25) 041 : SM0,SM1,ZU,FL,386 */ + {I_AND, 2, {REG_EAX,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+71479, 32, 264}, + /* 250 : AND rm32,imm32 [mi: hle o32 81 /4 id ] SM0-1,ZU,LOCK,FL,386 */ + /* 273 321 001(81) 204 041 : SM0,SM1,ZU,LOCK,FL,386 */ + {I_AND, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+55082, 31, 265}, + /* 251 : AND rm64,sbytedword64 [mi: hle o64 83 /4 ib,s ] SM0-1,ZU,LOCK,LONG,FL,PROT,X86_64 */ + /* 273 324 001(83) 204 275 : SM0,SM1,ZU,LOCK,LONG,FL,PROT,X86_64 */ + {I_AND, 2, {RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+55089, 33, 266}, + /* 252 : AND reg_rax,sdword64 [-i: o64 25 id,s ] SM0-1,ZU,LONG,FL,PROT,X86_64 */ + /* 324 001(25) 255 : SM0,SM1,ZU,LONG,FL,PROT,X86_64 */ + {I_AND, 2, {REG_RAX,SDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+71484, 34, 267}, + /* 253 : AND rm64,sdword64 [mi: hle o64 81 /4 id,s ] SM0-1,ZU,LOCK,LONG,FL,PROT,X86_64 */ + /* 273 324 001(81) 204 255 : SM0,SM1,ZU,LOCK,LONG,FL,PROT,X86_64 */ + {I_AND, 2, {RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+55096, 33, 268}, + /* 254 : AND reg8?,reg8,rm8 [vrm: evex.nd1.nf.l0.m4.o8 22 /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(22) 121 : SM0,SM1,SM2,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 3, {REG_GPR|BITS8,REG_GPR|BITS8,RM_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+23548, 35, 269}, + /* 255 : AND reg8,rm8 [rm: evex.nd0.nf.l0.m4.o8 22 /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(22) 110 : SM0,SM1,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 2, {REG_GPR|BITS8,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+23557, 36, 269}, + /* 256 : AND reg16?,reg16,rm16 [vrm: evex.nd1.nf.l0.m4.o16 23 /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(23) 121 : SM0,SM1,SM2,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+10013, 38, 270}, + /* 257 : AND reg16,rm16 [rm: evex.nd0.nf.l0.m4.o16 23 /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(23) 110 : SM0,SM1,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+10023, 39, 270}, + /* 258 : AND reg32?,reg32,rm32 [vrm: evex.nd1.nf.l0.m4.o32 23 /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(23) 121 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+10043, 41, 271}, + /* 259 : AND reg32,rm32 [rm: evex.nd0.nf.l0.m4.o32 23 /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(23) 110 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+10053, 42, 271}, + /* 260 : AND reg64?,reg64,rm64 [vrm: evex.nd1.nf.l0.m4.o64 23 /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(23) 121 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+10073, 41, 272}, + /* 261 : AND reg64,rm64 [rm: evex.nd0.nf.l0.m4.o64 23 /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(23) 110 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+10083, 42, 272}, + /* 262 : AND reg8?,rm8,reg8 [vmr: evex.nd1.nf.l0.m4.o8 20 /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(20) 112 : SM0,SM1,SM2,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 3, {REG_GPR|BITS8,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+23575, 35, 273}, + /* 263 : AND rm8,reg8 [mr: evex.nd0.nf.l0.m4.o8 20 /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(20) 101 : SM0,SM1,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 2, {RM_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+23584, 36, 273}, + /* 264 : AND reg16?,rm16,reg16 [vmr: evex.nd1.nf.l0.m4.o16 21 /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(21) 112 : SM0,SM1,SM2,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 3, {REG_GPR|BITS16,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+10103, 38, 274}, + /* 265 : AND rm16,reg16 [mr: evex.nd0.nf.l0.m4.o16 21 /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(21) 101 : SM0,SM1,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+10113, 39, 274}, + /* 266 : AND reg32?,rm32,reg32 [vmr: evex.nd1.nf.l0.m4.o32 21 /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(21) 112 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+10133, 41, 275}, + /* 267 : AND rm32,reg32 [mr: evex.nd0.nf.l0.m4.o32 21 /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(21) 101 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+10143, 42, 275}, + /* 268 : AND reg64?,rm64,reg64 [vmr: evex.nd1.nf.l0.m4.o64 21 /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(21) 112 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+10163, 41, 276}, + /* 269 : AND rm64,reg64 [mr: evex.nd0.nf.l0.m4.o64 21 /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(21) 101 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+10173, 42, 276}, + /* 270 : AND reg16?,rm16,sbyteword16 [vmi: evex.nd1.nf.l0.m4.o16 83 /4 ib,s ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(83) 214 276 : SM0,SM1,SM2,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 3, {REG_GPR|BITS16,RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+816, 38, 277}, + /* 271 : AND rm16,sbyteword16 [mi: evex.nd0.nf.l0.m4.o16 83 /4 ib,s ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(83) 204 275 : SM0,SM1,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 2, {RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+827, 39, 277}, + /* 272 : AND reg32?,rm32,sbytedword32 [vmi: evex.nd1.nf.l0.m4.o32 83 /4 ib,s ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(83) 214 276 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 3, {REG_GPR|BITS32,RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+849, 41, 278}, + /* 273 : AND rm32,sbytedword32 [mi: evex.nd0.nf.l0.m4.o32 83 /4 ib,s ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(83) 204 275 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 2, {RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+860, 42, 278}, + /* 274 : AND reg64?,rm64,sbytedword64 [vmi: evex.nd1.nf.l0.m4.o64 83 /4 ib,s ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(83) 214 276 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 3, {REG_GPR|BITS64,RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+882, 41, 279}, + /* 275 : AND rm64,sbytedword64 [mi: evex.nd0.nf.l0.m4.o64 83 /4 ib,s ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(83) 204 275 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 2, {RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+893, 42, 279}, + /* 276 : AND reg8?,rm8,imm8 [vmi: evex.nd1.nf.l0.m4.o8 80 /4 ib ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(80) 214 022 : SM0,SM1,SM2,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 3, {REG_GPR|BITS8,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+10193, 35, 280}, + /* 277 : AND rm8,imm8 [mi: evex.nd0.nf.l0.m4.o8 80 /4 ib ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(80) 204 021 : SM0,SM1,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 2, {RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+10203, 36, 280}, + /* 278 : AND reg16?,rm16,imm16 [vmi: evex.nd1.nf.l0.m4.o16 81 /4 iw ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(81) 214 032 : SM0,SM1,SM2,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 3, {REG_GPR|BITS16,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+915, 38, 281}, + /* 279 : AND rm16,imm16 [mi: evex.nd0.nf.l0.m4.o16 81 /4 iw ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(81) 204 031 : SM0,SM1,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+926, 39, 281}, + /* 280 : AND reg32?,rm32,imm32 [vmi: evex.nd1.nf.l0.m4.o32 81 /4 id ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(81) 214 042 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 3, {REG_GPR|BITS32,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+948, 41, 282}, + /* 281 : AND rm32,imm32 [mi: evex.nd0.nf.l0.m4.o32 81 /4 id ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(81) 204 041 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+959, 42, 282}, + /* 282 : AND reg64?,rm64,sdword64 [vmi: evex.nd1.nf.l0.m4.o64 81 /4 id,s ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(81) 214 256 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 3, {REG_GPR|BITS64,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+981, 41, 283}, + /* 283 : AND rm64,sdword64 [mi: evex.nd0.nf.l0.m4.o64 81 /4 id,s ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(81) 204 255 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_AND, 2, {RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+992, 42, 283}, + /* 284 : SUB rm8,reg8 [mr: hle o8 28 /r ] SM0-1,LOCK,FL,8086 */ + /* 273 001(28) 101 : SM0,SM1,LOCK,FL,8086 */ + {I_SUB, 2, {RM_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+71489, 25, 284}, + /* 285 : SUB rm16,reg16 [mr: hle o16 29 /r ] SM0-1,LOCK,FL,8086 */ + /* 273 320 001(29) 101 : SM0,SM1,LOCK,FL,8086 */ + {I_SUB, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66567, 25, 285}, + /* 286 : SUB rm32,reg32 [mr: hle o32 29 /r ] SM0-1,LOCK,FL,386 */ + /* 273 321 001(29) 101 : SM0,SM1,LOCK,FL,386 */ + {I_SUB, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+66573, 26, 286}, + /* 287 : SUB rm64,reg64 [mr: hle o64 29 /r ] SM0-1,LOCK,LONG,FL,PROT,X86_64 */ + /* 273 324 001(29) 101 : SM0,SM1,LOCK,LONG,FL,PROT,X86_64 */ + {I_SUB, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+66579, 27, 287}, + /* 288 : SUB reg8,rm8 [rm: o8 2a /r ] SM0-1,FL,8086 */ + /* 001(2a) 110 : SM0,SM1,FL,8086 */ + {I_SUB, 2, {REG_GPR|BITS8,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+69701, 28, 288}, + /* 289 : SUB reg16,rm16 [rm: o16 2b /r ] SM0-1,FL,8086 */ + /* 320 001(2b) 110 : SM0,SM1,FL,8086 */ + {I_SUB, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+10248, 28, 289}, + /* 290 : SUB reg32,rm32 [rm: o32 2b /r ] SM0-1,FL,386 */ + /* 321 001(2b) 110 : SM0,SM1,FL,386 */ + {I_SUB, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+10278, 29, 290}, + /* 291 : SUB reg64,rm64 [rm: o64 2b /r ] SM0-1,LONG,FL,PROT,X86_64 */ + /* 324 001(2b) 110 : SM0,SM1,LONG,FL,PROT,X86_64 */ + {I_SUB, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+10308, 30, 291}, + /* 292 : SUB reg_al,imm8 [-i: o8 2c ib ] SM0-1,FL,8086 */ + /* 001(2c) 021 : SM0,SM1,FL,8086 */ + {I_SUB, 2, {REG_AL,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+72616, 28, 292}, + /* 293 : SUB rm8,imm8 [mi: hle 80 /5 ib ] SM0-1,LOCK,FL,8086 */ + /* 273 001(80) 205 021 : SM0,SM1,LOCK,FL,8086 */ + {I_SUB, 2, {RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+66585, 25, 293}, + /* 294 : SUB rm16,sbyteword16 [mi: hle o16 83 /5 ib,s ] SM0-1,LOCK,FL,8086 */ + /* 273 320 001(83) 205 275 : SM0,SM1,LOCK,FL,8086 */ + {I_SUB, 2, {RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+55103, 25, 294}, + /* 295 : SUB reg_ax,imm16 [-i: o16 2d iw ] SM0-1,FL,8086 */ + /* 320 001(2d) 031 : SM0,SM1,FL,8086 */ + {I_SUB, 2, {REG_AX,IMM_NORMAL|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+71494, 28, 295}, + /* 296 : SUB rm16,imm16 [mi: hle o16 81 /5 iw ] SM0-1,LOCK,FL,8086 */ + /* 273 320 001(81) 205 031 : SM0,SM1,LOCK,FL,8086 */ + {I_SUB, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55110, 25, 296}, + /* 297 : SUB rm32,sbytedword32 [mi: hle o32 83 /5 ib,s ] SM0-1,ZU,LOCK,FL,386 */ + /* 273 321 001(83) 205 275 : SM0,SM1,ZU,LOCK,FL,386 */ + {I_SUB, 2, {RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+55117, 31, 297}, + /* 298 : SUB reg_eax,imm32 [-i: o32 2d id ] SM0-1,ZU,FL,386 */ + /* 321 001(2d) 041 : SM0,SM1,ZU,FL,386 */ + {I_SUB, 2, {REG_EAX,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+71499, 32, 298}, + /* 299 : SUB rm32,imm32 [mi: hle o32 81 /5 id ] SM0-1,ZU,LOCK,FL,386 */ + /* 273 321 001(81) 205 041 : SM0,SM1,ZU,LOCK,FL,386 */ + {I_SUB, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+55124, 31, 299}, + /* 300 : SUB rm64,sbytedword64 [mi: hle o64 83 /5 ib,s ] SM0-1,ZU,LOCK,LONG,FL,PROT,X86_64 */ + /* 273 324 001(83) 205 275 : SM0,SM1,ZU,LOCK,LONG,FL,PROT,X86_64 */ + {I_SUB, 2, {RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+55131, 33, 300}, + /* 301 : SUB reg_rax,sdword64 [-i: o64 2d id,s ] SM0-1,ZU,LONG,FL,PROT,X86_64 */ + /* 324 001(2d) 255 : SM0,SM1,ZU,LONG,FL,PROT,X86_64 */ + {I_SUB, 2, {REG_RAX,SDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+71504, 34, 301}, + /* 302 : SUB rm64,sdword64 [mi: hle o64 81 /5 id,s ] SM0-1,ZU,LOCK,LONG,FL,PROT,X86_64 */ + /* 273 324 001(81) 205 255 : SM0,SM1,ZU,LOCK,LONG,FL,PROT,X86_64 */ + {I_SUB, 2, {RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+55138, 33, 302}, + /* 303 : SUB reg8?,reg8,rm8 [vrm: evex.nd1.nf.l0.m4.o8 2a /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(2a) 121 : SM0,SM1,SM2,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 3, {REG_GPR|BITS8,REG_GPR|BITS8,RM_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+23602, 35, 303}, + /* 304 : SUB reg8,rm8 [rm: evex.nd0.nf.l0.m4.o8 2a /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(2a) 110 : SM0,SM1,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 2, {REG_GPR|BITS8,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+23611, 36, 303}, + /* 305 : SUB reg16?,reg16,rm16 [vrm: evex.nd1.nf.l0.m4.o16 2b /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(2b) 121 : SM0,SM1,SM2,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+10223, 38, 304}, + /* 306 : SUB reg16,rm16 [rm: evex.nd0.nf.l0.m4.o16 2b /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(2b) 110 : SM0,SM1,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+10233, 39, 304}, + /* 307 : SUB reg32?,reg32,rm32 [vrm: evex.nd1.nf.l0.m4.o32 2b /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(2b) 121 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+10253, 41, 305}, + /* 308 : SUB reg32,rm32 [rm: evex.nd0.nf.l0.m4.o32 2b /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(2b) 110 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+10263, 42, 305}, + /* 309 : SUB reg64?,reg64,rm64 [vrm: evex.nd1.nf.l0.m4.o64 2b /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(2b) 121 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+10283, 41, 306}, + /* 310 : SUB reg64,rm64 [rm: evex.nd0.nf.l0.m4.o64 2b /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(2b) 110 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+10293, 42, 306}, + /* 311 : SUB reg8?,rm8,reg8 [vmr: evex.nd1.nf.l0.m4.o8 28 /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(28) 112 : SM0,SM1,SM2,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 3, {REG_GPR|BITS8,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+23629, 35, 307}, + /* 312 : SUB rm8,reg8 [mr: evex.nd0.nf.l0.m4.o8 28 /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(28) 101 : SM0,SM1,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 2, {RM_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+23638, 36, 307}, + /* 313 : SUB reg16?,rm16,reg16 [vmr: evex.nd1.nf.l0.m4.o16 29 /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(29) 112 : SM0,SM1,SM2,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 3, {REG_GPR|BITS16,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+10313, 38, 308}, + /* 314 : SUB rm16,reg16 [mr: evex.nd0.nf.l0.m4.o16 29 /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(29) 101 : SM0,SM1,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+10323, 39, 308}, + /* 315 : SUB reg32?,rm32,reg32 [vmr: evex.nd1.nf.l0.m4.o32 29 /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(29) 112 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+10343, 41, 309}, + /* 316 : SUB rm32,reg32 [mr: evex.nd0.nf.l0.m4.o32 29 /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(29) 101 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+10353, 42, 309}, + /* 317 : SUB reg64?,rm64,reg64 [vmr: evex.nd1.nf.l0.m4.o64 29 /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(29) 112 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+10373, 41, 310}, + /* 318 : SUB rm64,reg64 [mr: evex.nd0.nf.l0.m4.o64 29 /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(29) 101 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+10383, 42, 310}, + /* 319 : SUB reg16?,rm16,sbyteword16 [vmi: evex.nd1.nf.l0.m4.o16 83 /5 ib,s ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(83) 215 276 : SM0,SM1,SM2,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 3, {REG_GPR|BITS16,RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+1014, 38, 311}, + /* 320 : SUB rm16,sbyteword16 [mi: evex.nd0.nf.l0.m4.o16 83 /5 ib,s ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(83) 205 275 : SM0,SM1,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 2, {RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+1025, 39, 311}, + /* 321 : SUB reg32?,rm32,sbytedword32 [vmi: evex.nd1.nf.l0.m4.o32 83 /5 ib,s ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(83) 215 276 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 3, {REG_GPR|BITS32,RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+1047, 41, 312}, + /* 322 : SUB rm32,sbytedword32 [mi: evex.nd0.nf.l0.m4.o32 83 /5 ib,s ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(83) 205 275 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 2, {RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+1058, 42, 312}, + /* 323 : SUB reg64?,rm64,sbytedword64 [vmi: evex.nd1.nf.l0.m4.o64 83 /5 ib,s ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(83) 215 276 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 3, {REG_GPR|BITS64,RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+1080, 41, 313}, + /* 324 : SUB rm64,sbytedword64 [mi: evex.nd0.nf.l0.m4.o64 83 /5 ib,s ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(83) 205 275 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 2, {RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+1091, 42, 313}, + /* 325 : SUB reg8?,rm8,imm8 [vmi: evex.nd1.nf.l0.m4.o8 80 /5 ib ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(80) 215 022 : SM0,SM1,SM2,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 3, {REG_GPR|BITS8,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+10403, 35, 314}, + /* 326 : SUB rm8,imm8 [mi: evex.nd0.nf.l0.m4.o8 80 /5 ib ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(80) 205 021 : SM0,SM1,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 2, {RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+10413, 36, 314}, + /* 327 : SUB reg16?,rm16,imm16 [vmi: evex.nd1.nf.l0.m4.o16 81 /5 iw ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(81) 215 032 : SM0,SM1,SM2,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 3, {REG_GPR|BITS16,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+1113, 38, 315}, + /* 328 : SUB rm16,imm16 [mi: evex.nd0.nf.l0.m4.o16 81 /5 iw ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(81) 205 031 : SM0,SM1,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+1124, 39, 315}, + /* 329 : SUB reg32?,rm32,imm32 [vmi: evex.nd1.nf.l0.m4.o32 81 /5 id ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(81) 215 042 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 3, {REG_GPR|BITS32,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+1146, 41, 316}, + /* 330 : SUB rm32,imm32 [mi: evex.nd0.nf.l0.m4.o32 81 /5 id ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(81) 205 041 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+1157, 42, 316}, + /* 331 : SUB reg64?,rm64,sdword64 [vmi: evex.nd1.nf.l0.m4.o64 81 /5 id,s ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(81) 215 256 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 3, {REG_GPR|BITS64,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+1179, 41, 317}, + /* 332 : SUB rm64,sdword64 [mi: evex.nd0.nf.l0.m4.o64 81 /5 id,s ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(81) 205 255 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SUB, 2, {RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+1190, 42, 317}, + /* 333 : XOR rm8,reg8 [mr: hle o8 30 /r ] SM0-1,LOCK,FL,8086 */ + /* 273 001(30) 101 : SM0,SM1,LOCK,FL,8086 */ + {I_XOR, 2, {RM_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+71509, 25, 318}, + /* 334 : XOR rm16,reg16 [mr: hle o16 31 /r ] SM0-1,LOCK,FL,8086 */ + /* 273 320 001(31) 101 : SM0,SM1,LOCK,FL,8086 */ + {I_XOR, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66591, 25, 319}, + /* 335 : XOR rm32,reg32 [mr: hle o32 31 /r ] SM0-1,LOCK,FL,386 */ + /* 273 321 001(31) 101 : SM0,SM1,LOCK,FL,386 */ + {I_XOR, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+66597, 26, 320}, + /* 336 : XOR rm64,reg64 [mr: hle o64 31 /r ] SM0-1,LOCK,LONG,FL,PROT,X86_64 */ + /* 273 324 001(31) 101 : SM0,SM1,LOCK,LONG,FL,PROT,X86_64 */ + {I_XOR, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+66603, 27, 321}, + /* 337 : XOR reg8,rm8 [rm: o8 32 /r ] SM0-1,FL,8086 */ + /* 001(32) 110 : SM0,SM1,FL,8086 */ + {I_XOR, 2, {REG_GPR|BITS8,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+69827, 28, 322}, + /* 338 : XOR reg16,rm16 [rm: o16 33 /r ] SM0-1,FL,8086 */ + /* 320 001(33) 110 : SM0,SM1,FL,8086 */ + {I_XOR, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+10458, 28, 323}, + /* 339 : XOR reg32,rm32 [rm: o32 33 /r ] SM0-1,FL,386 */ + /* 321 001(33) 110 : SM0,SM1,FL,386 */ + {I_XOR, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+10488, 29, 324}, + /* 340 : XOR reg64,rm64 [rm: o64 33 /r ] SM0-1,LONG,FL,PROT,X86_64 */ + /* 324 001(33) 110 : SM0,SM1,LONG,FL,PROT,X86_64 */ + {I_XOR, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+10518, 30, 325}, + /* 341 : XOR reg_al,imm8 [-i: o8 34 ib ] SM0-1,FL,8086 */ + /* 001(34) 021 : SM0,SM1,FL,8086 */ + {I_XOR, 2, {REG_AL,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+72620, 28, 326}, + /* 342 : XOR rm8,imm8 [mi: hle 80 /6 ib ] SM0-1,LOCK,FL,8086 */ + /* 273 001(80) 206 021 : SM0,SM1,LOCK,FL,8086 */ + {I_XOR, 2, {RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+66609, 25, 327}, + /* 343 : XOR rm16,sbyteword16 [mi: hle o16 83 /6 ib,s ] SM0-1,LOCK,FL,8086 */ + /* 273 320 001(83) 206 275 : SM0,SM1,LOCK,FL,8086 */ + {I_XOR, 2, {RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+55145, 25, 328}, + /* 344 : XOR reg_ax,imm16 [-i: o16 35 iw ] SM0-1,FL,8086 */ + /* 320 001(35) 031 : SM0,SM1,FL,8086 */ + {I_XOR, 2, {REG_AX,IMM_NORMAL|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+71514, 28, 329}, + /* 345 : XOR rm16,imm16 [mi: hle o16 81 /6 iw ] SM0-1,LOCK,FL,8086 */ + /* 273 320 001(81) 206 031 : SM0,SM1,LOCK,FL,8086 */ + {I_XOR, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55152, 25, 330}, + /* 346 : XOR rm32,sbytedword32 [mi: hle o32 83 /6 ib,s ] SM0-1,ZU,LOCK,FL,386 */ + /* 273 321 001(83) 206 275 : SM0,SM1,ZU,LOCK,FL,386 */ + {I_XOR, 2, {RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+55159, 31, 331}, + /* 347 : XOR reg_eax,imm32 [-i: o32 35 id ] SM0-1,ZU,FL,386 */ + /* 321 001(35) 041 : SM0,SM1,ZU,FL,386 */ + {I_XOR, 2, {REG_EAX,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+71519, 32, 332}, + /* 348 : XOR rm32,imm32 [mi: hle o32 81 /6 id ] SM0-1,ZU,LOCK,FL,386 */ + /* 273 321 001(81) 206 041 : SM0,SM1,ZU,LOCK,FL,386 */ + {I_XOR, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+55166, 31, 333}, + /* 349 : XOR rm64,sbytedword64 [mi: hle o64 83 /6 ib,s ] SM0-1,ZU,LOCK,LONG,FL,PROT,X86_64 */ + /* 273 324 001(83) 206 275 : SM0,SM1,ZU,LOCK,LONG,FL,PROT,X86_64 */ + {I_XOR, 2, {RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+55173, 33, 334}, + /* 350 : XOR reg_rax,sdword64 [-i: o64 35 id,s ] SM0-1,ZU,LONG,FL,PROT,X86_64 */ + /* 324 001(35) 255 : SM0,SM1,ZU,LONG,FL,PROT,X86_64 */ + {I_XOR, 2, {REG_RAX,SDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+71524, 34, 335}, + /* 351 : XOR rm64,sdword64 [mi: hle o64 81 /6 id,s ] SM0-1,ZU,LOCK,LONG,FL,PROT,X86_64 */ + /* 273 324 001(81) 206 255 : SM0,SM1,ZU,LOCK,LONG,FL,PROT,X86_64 */ + {I_XOR, 2, {RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+55180, 33, 336}, + /* 352 : XOR reg8?,reg8,rm8 [vrm: evex.nd1.nf.l0.m4.o8 32 /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(32) 121 : SM0,SM1,SM2,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 3, {REG_GPR|BITS8,REG_GPR|BITS8,RM_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+23656, 35, 337}, + /* 353 : XOR reg8,rm8 [rm: evex.nd0.nf.l0.m4.o8 32 /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(32) 110 : SM0,SM1,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 2, {REG_GPR|BITS8,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+23665, 36, 337}, + /* 354 : XOR reg16?,reg16,rm16 [vrm: evex.nd1.nf.l0.m4.o16 33 /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(33) 121 : SM0,SM1,SM2,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+10433, 38, 338}, + /* 355 : XOR reg16,rm16 [rm: evex.nd0.nf.l0.m4.o16 33 /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(33) 110 : SM0,SM1,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+10443, 39, 338}, + /* 356 : XOR reg32?,reg32,rm32 [vrm: evex.nd1.nf.l0.m4.o32 33 /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(33) 121 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+10463, 41, 339}, + /* 357 : XOR reg32,rm32 [rm: evex.nd0.nf.l0.m4.o32 33 /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(33) 110 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+10473, 42, 339}, + /* 358 : XOR reg64?,reg64,rm64 [vrm: evex.nd1.nf.l0.m4.o64 33 /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(33) 121 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+10493, 41, 340}, + /* 359 : XOR reg64,rm64 [rm: evex.nd0.nf.l0.m4.o64 33 /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(33) 110 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+10503, 42, 340}, + /* 360 : XOR reg8?,rm8,reg8 [vmr: evex.nd1.nf.l0.m4.o8 30 /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(30) 112 : SM0,SM1,SM2,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 3, {REG_GPR|BITS8,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+23683, 35, 341}, + /* 361 : XOR rm8,reg8 [mr: evex.nd0.nf.l0.m4.o8 30 /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(30) 101 : SM0,SM1,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 2, {RM_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+23692, 36, 341}, + /* 362 : XOR reg16?,rm16,reg16 [vmr: evex.nd1.nf.l0.m4.o16 31 /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(31) 112 : SM0,SM1,SM2,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 3, {REG_GPR|BITS16,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+10523, 38, 342}, + /* 363 : XOR rm16,reg16 [mr: evex.nd0.nf.l0.m4.o16 31 /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(31) 101 : SM0,SM1,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+10533, 39, 342}, + /* 364 : XOR reg32?,rm32,reg32 [vmr: evex.nd1.nf.l0.m4.o32 31 /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(31) 112 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+10553, 41, 343}, + /* 365 : XOR rm32,reg32 [mr: evex.nd0.nf.l0.m4.o32 31 /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(31) 101 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+10563, 42, 343}, + /* 366 : XOR reg64?,rm64,reg64 [vmr: evex.nd1.nf.l0.m4.o64 31 /r ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(31) 112 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+10583, 41, 344}, + /* 367 : XOR rm64,reg64 [mr: evex.nd0.nf.l0.m4.o64 31 /r ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(31) 101 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+10593, 42, 344}, + /* 368 : XOR reg16?,rm16,sbyteword16 [vmi: evex.nd1.nf.l0.m4.o16 83 /6 ib,s ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(83) 216 276 : SM0,SM1,SM2,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 3, {REG_GPR|BITS16,RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+1212, 38, 345}, + /* 369 : XOR rm16,sbyteword16 [mi: evex.nd0.nf.l0.m4.o16 83 /6 ib,s ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(83) 206 275 : SM0,SM1,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 2, {RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+1223, 39, 345}, + /* 370 : XOR reg32?,rm32,sbytedword32 [vmi: evex.nd1.nf.l0.m4.o32 83 /6 ib,s ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(83) 216 276 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 3, {REG_GPR|BITS32,RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+1245, 41, 346}, + /* 371 : XOR rm32,sbytedword32 [mi: evex.nd0.nf.l0.m4.o32 83 /6 ib,s ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(83) 206 275 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 2, {RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+1256, 42, 346}, + /* 372 : XOR reg64?,rm64,sbytedword64 [vmi: evex.nd1.nf.l0.m4.o64 83 /6 ib,s ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(83) 216 276 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 3, {REG_GPR|BITS64,RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+1278, 41, 347}, + /* 373 : XOR rm64,sbytedword64 [mi: evex.nd0.nf.l0.m4.o64 83 /6 ib,s ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(83) 206 275 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 2, {RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+1289, 42, 347}, + /* 374 : XOR reg8?,rm8,imm8 [vmi: evex.nd1.nf.l0.m4.o8 80 /6 ib ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(80) 216 022 : SM0,SM1,SM2,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 3, {REG_GPR|BITS8,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+10613, 35, 348}, + /* 375 : XOR rm8,imm8 [mi: evex.nd0.nf.l0.m4.o8 80 /6 ib ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(80) 206 021 : SM0,SM1,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 2, {RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+10623, 36, 348}, + /* 376 : XOR reg16?,rm16,imm16 [vmi: evex.nd1.nf.l0.m4.o16 81 /6 iw ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(81) 216 032 : SM0,SM1,SM2,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 3, {REG_GPR|BITS16,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+1311, 38, 349}, + /* 377 : XOR rm16,imm16 [mi: evex.nd0.nf.l0.m4.o16 81 /6 iw ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(81) 206 031 : SM0,SM1,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+1322, 39, 349}, + /* 378 : XOR reg32?,rm32,imm32 [vmi: evex.nd1.nf.l0.m4.o32 81 /6 id ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(81) 216 042 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 3, {REG_GPR|BITS32,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+1344, 41, 350}, + /* 379 : XOR rm32,imm32 [mi: evex.nd0.nf.l0.m4.o32 81 /6 id ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(81) 206 041 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+1355, 42, 350}, + /* 380 : XOR reg64?,rm64,sdword64 [vmi: evex.nd1.nf.l0.m4.o64 81 /6 id,s ] SM0,SM1,SM2,NF,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(81) 216 256 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 3, {REG_GPR|BITS64,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+1377, 41, 351}, + /* 381 : XOR rm64,sdword64 [mi: evex.nd0.nf.l0.m4.o64 81 /6 id,s ] SM0,SM1,NF,LONG,FL,EVEX,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(81) 206 255 : SM0,SM1,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_XOR, 2, {RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+1388, 42, 351}, + /* 382 : CMP rm8,reg8 [mr: hle o8 38 /r ] SM0-1,FL,8086 */ + /* 273 001(38) 101 : SM0,SM1,FL,8086 */ + {I_CMP, 2, {RM_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+71529, 28, 352}, + /* 383 : CMP rm16,reg16 [mr: hle o16 39 /r ] SM0-1,FL,8086 */ + /* 273 320 001(39) 101 : SM0,SM1,FL,8086 */ + {I_CMP, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66615, 28, 353}, + /* 384 : CMP rm32,reg32 [mr: hle o32 39 /r ] SM0-1,FL,386 */ + /* 273 321 001(39) 101 : SM0,SM1,FL,386 */ + {I_CMP, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+66621, 29, 354}, + /* 385 : CMP rm64,reg64 [mr: hle o64 39 /r ] SM0-1,LONG,FL,PROT,X86_64 */ + /* 273 324 001(39) 101 : SM0,SM1,LONG,FL,PROT,X86_64 */ + {I_CMP, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+66627, 30, 355}, + /* 386 : CMP reg8,rm8 [rm: o8 3a /r ] SM0-1,FL,8086 */ + /* 001(3a) 110 : SM0,SM1,FL,8086 */ + {I_CMP, 2, {REG_GPR|BITS8,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+69773, 28, 356}, + /* 387 : CMP reg16,rm16 [rm: o16 3b /r ] SM0-1,FL,8086 */ + /* 320 001(3b) 110 : SM0,SM1,FL,8086 */ + {I_CMP, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+71534, 28, 357}, + /* 388 : CMP reg32,rm32 [rm: o32 3b /r ] SM0-1,FL,386 */ + /* 321 001(3b) 110 : SM0,SM1,FL,386 */ + {I_CMP, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+71539, 29, 358}, + /* 389 : CMP reg64,rm64 [rm: o64 3b /r ] SM0-1,LONG,FL,PROT,X86_64 */ + /* 324 001(3b) 110 : SM0,SM1,LONG,FL,PROT,X86_64 */ + {I_CMP, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+71544, 30, 359}, + /* 390 : CMP reg_al,imm8 [-i: o8 3c ib ] SM0-1,FL,8086 */ + /* 001(3c) 021 : SM0,SM1,FL,8086 */ + {I_CMP, 2, {REG_AL,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+72624, 28, 360}, + /* 391 : CMP rm8,imm8 [mi: hle 80 /7 ib ] SM0-1,FL,8086 */ + /* 273 001(80) 207 021 : SM0,SM1,FL,8086 */ + {I_CMP, 2, {RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+66633, 28, 361}, + /* 392 : CMP rm16,sbyteword16 [mi: hle o16 83 /7 ib,s ] SM0-1,FL,8086 */ + /* 273 320 001(83) 207 275 : SM0,SM1,FL,8086 */ + {I_CMP, 2, {RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+55187, 28, 362}, + /* 393 : CMP reg_ax,imm16 [-i: o16 3d iw ] SM0-1,FL,8086 */ + /* 320 001(3d) 031 : SM0,SM1,FL,8086 */ + {I_CMP, 2, {REG_AX,IMM_NORMAL|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+71549, 28, 363}, + /* 394 : CMP rm16,imm16 [mi: hle o16 81 /7 iw ] SM0-1,FL,8086 */ + /* 273 320 001(81) 207 031 : SM0,SM1,FL,8086 */ + {I_CMP, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55194, 28, 364}, + /* 395 : CMP rm32,sbytedword32 [mi: hle o32 83 /7 ib,s ] SM0-1,ZU,FL,386 */ + /* 273 321 001(83) 207 275 : SM0,SM1,ZU,FL,386 */ + {I_CMP, 2, {RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+55201, 32, 365}, + /* 396 : CMP reg_eax,imm32 [-i: o32 3d id ] SM0-1,ZU,FL,386 */ + /* 321 001(3d) 041 : SM0,SM1,ZU,FL,386 */ + {I_CMP, 2, {REG_EAX,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+71554, 32, 366}, + /* 397 : CMP rm32,imm32 [mi: hle o32 81 /7 id ] SM0-1,ZU,FL,386 */ + /* 273 321 001(81) 207 041 : SM0,SM1,ZU,FL,386 */ + {I_CMP, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+55208, 32, 367}, + /* 398 : CMP rm64,sbytedword64 [mi: hle o64 83 /7 ib,s ] SM0-1,ZU,LONG,FL,PROT,X86_64 */ + /* 273 324 001(83) 207 275 : SM0,SM1,ZU,LONG,FL,PROT,X86_64 */ + {I_CMP, 2, {RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+55215, 34, 368}, + /* 399 : CMP reg_rax,sdword64 [-i: o64 3d id,s ] SM0-1,ZU,LONG,FL,PROT,X86_64 */ + /* 324 001(3d) 255 : SM0,SM1,ZU,LONG,FL,PROT,X86_64 */ + {I_CMP, 2, {REG_RAX,SDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+71559, 34, 369}, + /* 400 : CMP rm64,sdword64 [mi: hle o64 81 /7 id,s ] SM0-1,ZU,LONG,FL,PROT,X86_64 */ + /* 273 324 001(81) 207 255 : SM0,SM1,ZU,LONG,FL,PROT,X86_64 */ + {I_CMP, 2, {RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+55222, 34, 370}, + /* 401 : TEST rm8,reg8 [mr: o8 84 /r ] SM0-1,FL,8086 */ + /* 001(84) 101 : SM0,SM1,FL,8086 */ + {I_TEST, 2, {RM_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+72628, 28, 373}, + /* 402 : TEST rm16,reg16 [mr: o16 85 /r ] SM0-1,FL,8086 */ + /* 320 001(85) 101 : SM0,SM1,FL,8086 */ + {I_TEST, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+71564, 28, 374}, + /* 403 : TEST rm32,reg32 [mr: o32 85 /r ] SM0-1,FL,386 */ + /* 321 001(85) 101 : SM0,SM1,FL,386 */ + {I_TEST, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+71569, 29, 375}, + /* 404 : TEST rm64,reg64 [mr: o64 85 /r ] SM0-1,LONG,FL,PROT,X86_64 */ + /* 324 001(85) 101 : SM0,SM1,LONG,FL,PROT,X86_64 */ + {I_TEST, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+71574, 30, 376}, + /* 405 : TEST reg_al,imm8 [-i: o8 a8 ib ] SM0-1,NOAPX,FL,8086 */ + /* 001(a8) 021 : SM0,SM1,NOAPX,FL,8086 */ + {I_TEST, 2, {REG_AL|RN_L16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+72636, 53, 381}, + /* 406 : TEST reg_ax,imm16 [-i: o16 a9 iw ] SM0-1,NOAPX,FL,8086 */ + /* 320 001(a9) 031 : SM0,SM1,NOAPX,FL,8086 */ + {I_TEST, 2, {REG_AX|RN_L16,IMM_NORMAL|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+71594, 53, 382}, + /* 407 : TEST reg_eax,imm32 [-i: o32 a9 id ] SM0-1,NOAPX,FL,386 */ + /* 321 001(a9) 041 : SM0,SM1,NOAPX,FL,386 */ + {I_TEST, 2, {REG_EAX|RN_L16,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+71599, 54, 383}, + /* 408 : TEST reg_rax,sdword64 [-i: o64 a9 id,s ] SM0-1,NOAPX,LONG,FL,PROT,X86_64 */ + /* 324 001(a9) 255 : SM0,SM1,NOAPX,LONG,FL,PROT,X86_64 */ + {I_TEST, 2, {REG_RAX|RN_L16,SDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+71604, 55, 384}, + /* 409 : TEST rm8,imm8 [mi: o8 f6 /0 ib ] SM0-1,FL,8086 */ + /* 001(f6) 200 021 : SM0,SM1,FL,8086 */ + {I_TEST, 2, {RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+71609, 28, 385}, + /* 410 : TEST rm16,imm16 [mi: o16 f7 /0 iw ] SM0-1,FL,8086 */ + /* 320 001(f7) 200 031 : SM0,SM1,FL,8086 */ + {I_TEST, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66639, 28, 386}, + /* 411 : TEST rm32,imm32 [mi: o32 f7 /0 id ] SM0-1,FL,386 */ + /* 321 001(f7) 200 041 : SM0,SM1,FL,386 */ + {I_TEST, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+66645, 29, 387}, + /* 412 : TEST rm64,sdword64 [mi: o64 f7 /0 id,s ] SM0-1,LONG,FL,PROT,X86_64 */ + /* 324 001(f7) 200 255 : SM0,SM1,LONG,FL,PROT,X86_64 */ + {I_TEST, 2, {RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+66651, 30, 388}, + /* 413 : ROL rm8,unity [m-: o8 d0 /0 ] FL,8086 */ + /* 001(d0) 200 : FL,8086 */ + {I_ROL, 2, {RM_GPR|BITS8,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+23733, 56, 391}, + /* 414 : ROL rm16,unity [m-: o16 d1 /0 ] FL,8086 */ + /* 320 001(d1) 200 : FL,8086 */ + {I_ROL, 2, {RM_GPR|BITS16,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+10688, 56, 392}, + /* 415 : ROL rm32,unity [m-: o32 d1 /0 ] FL,386 */ + /* 321 001(d1) 200 : FL,386 */ + {I_ROL, 2, {RM_GPR|BITS32,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+10718, 57, 393}, + /* 416 : ROL rm64,unity [m-: o64 d1 /0 ] LONG,FL,PROT,X86_64 */ + /* 324 001(d1) 200 : LONG,FL,PROT,X86_64 */ + {I_ROL, 2, {RM_GPR|BITS64,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+10748, 58, 394}, + /* 417 : ROL rm8,reg_cl [m-: o8 d2 /0 ] FL,8086 */ + /* 001(d2) 200 : FL,8086 */ + {I_ROL, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+23760, 56, 395}, + /* 418 : ROL rm16,reg_cl [m-: o16 d3 /0 ] FL,8086 */ + /* 320 001(d3) 200 : FL,8086 */ + {I_ROL, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+10778, 56, 396}, + /* 419 : ROL rm32,reg_cl [m-: o32 d3 /0 ] FL,386 */ + /* 321 001(d3) 200 : FL,386 */ + {I_ROL, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+10808, 57, 397}, + /* 420 : ROL rm64,reg_cl [m-: o64 d3 /0 ] LONG,FL,PROT,X86_64 */ + /* 324 001(d3) 200 : LONG,FL,PROT,X86_64 */ + {I_ROL, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+10838, 58, 398}, + /* 421 : ROL rm8,imm8 [mi: o8 c0 /0 ib,u ] FL,186 */ + /* 001(c0) 200 025 : FL,186 */ + {I_ROL, 2, {RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+10868, 59, 411}, + /* 422 : ROL rm16,imm8 [mi: o16 c1 /0 ib,u ] FL,186 */ + /* 320 001(c1) 200 025 : FL,186 */ + {I_ROL, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1437, 59, 412}, + /* 423 : ROL rm32,imm8 [mi: o32 c1 /0 ib,u ] FL,386 */ + /* 321 001(c1) 200 025 : FL,386 */ + {I_ROL, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1470, 57, 413}, + /* 424 : ROL rm64,imm8 [mi: o64 c1 /0 ib,u ] LONG,FL,PROT,X86_64 */ + /* 324 001(c1) 200 025 : LONG,FL,PROT,X86_64 */ + {I_ROL, 2, {RM_GPR|BITS64,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1503, 58, 414}, + /* 425 : ROR rm8,unity [m-: o8 d0 /1 ] FL,8086 */ + /* 001(d0) 201 : FL,8086 */ + {I_ROR, 2, {RM_GPR|BITS8,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+23787, 56, 415}, + /* 426 : ROR rm16,unity [m-: o16 d1 /1 ] FL,8086 */ + /* 320 001(d1) 201 : FL,8086 */ + {I_ROR, 2, {RM_GPR|BITS16,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+10898, 56, 416}, + /* 427 : ROR rm32,unity [m-: o32 d1 /1 ] FL,386 */ + /* 321 001(d1) 201 : FL,386 */ + {I_ROR, 2, {RM_GPR|BITS32,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+10928, 57, 417}, + /* 428 : ROR rm64,unity [m-: o64 d1 /1 ] LONG,FL,PROT,X86_64 */ + /* 324 001(d1) 201 : LONG,FL,PROT,X86_64 */ + {I_ROR, 2, {RM_GPR|BITS64,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+10958, 58, 418}, + /* 429 : ROR rm8,reg_cl [m-: o8 d2 /1 ] FL,8086 */ + /* 001(d2) 201 : FL,8086 */ + {I_ROR, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+23814, 56, 419}, + /* 430 : ROR rm16,reg_cl [m-: o16 d3 /1 ] FL,8086 */ + /* 320 001(d3) 201 : FL,8086 */ + {I_ROR, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+10988, 56, 420}, + /* 431 : ROR rm32,reg_cl [m-: o32 d3 /1 ] FL,386 */ + /* 321 001(d3) 201 : FL,386 */ + {I_ROR, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11018, 57, 421}, + /* 432 : ROR rm64,reg_cl [m-: o64 d3 /1 ] LONG,FL,PROT,X86_64 */ + /* 324 001(d3) 201 : LONG,FL,PROT,X86_64 */ + {I_ROR, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11048, 58, 422}, + /* 433 : ROR rm8,imm8 [mi: o8 c0 /1 ib,u ] FL,186 */ + /* 001(c0) 201 025 : FL,186 */ + {I_ROR, 2, {RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+11078, 59, 435}, + /* 434 : ROR rm16,imm8 [mi: o16 c1 /1 ib,u ] FL,186 */ + /* 320 001(c1) 201 025 : FL,186 */ + {I_ROR, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1536, 59, 436}, + /* 435 : ROR rm32,imm8 [mi: o32 c1 /1 ib,u ] FL,386 */ + /* 321 001(c1) 201 025 : FL,386 */ + {I_ROR, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1569, 57, 437}, + /* 436 : ROR rm64,imm8 [mi: o64 c1 /1 ib,u ] LONG,FL,PROT,X86_64 */ + /* 324 001(c1) 201 025 : LONG,FL,PROT,X86_64 */ + {I_ROR, 2, {RM_GPR|BITS64,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1602, 58, 438}, + /* 437 : RCL rm8,unity [m-: o8 d0 /2 ] FL,8086 */ + /* 001(d0) 202 : FL,8086 */ + {I_RCL, 2, {RM_GPR|BITS8,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+23841, 56, 439}, + /* 438 : RCL rm16,unity [m-: o16 d1 /2 ] FL,8086 */ + /* 320 001(d1) 202 : FL,8086 */ + {I_RCL, 2, {RM_GPR|BITS16,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11108, 56, 440}, + /* 439 : RCL rm32,unity [m-: o32 d1 /2 ] FL,386 */ + /* 321 001(d1) 202 : FL,386 */ + {I_RCL, 2, {RM_GPR|BITS32,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11138, 57, 441}, + /* 440 : RCL rm64,unity [m-: o64 d1 /2 ] LONG,FL,PROT,X86_64 */ + /* 324 001(d1) 202 : LONG,FL,PROT,X86_64 */ + {I_RCL, 2, {RM_GPR|BITS64,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11168, 58, 442}, + /* 441 : RCL rm8,reg_cl [m-: o8 d2 /2 ] FL,8086 */ + /* 001(d2) 202 : FL,8086 */ + {I_RCL, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+23868, 56, 443}, + /* 442 : RCL rm16,reg_cl [m-: o16 d3 /2 ] FL,8086 */ + /* 320 001(d3) 202 : FL,8086 */ + {I_RCL, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11198, 56, 444}, + /* 443 : RCL rm32,reg_cl [m-: o32 d3 /2 ] FL,386 */ + /* 321 001(d3) 202 : FL,386 */ + {I_RCL, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11228, 57, 445}, + /* 444 : RCL rm64,reg_cl [m-: o64 d3 /2 ] LONG,FL,PROT,X86_64 */ + /* 324 001(d3) 202 : LONG,FL,PROT,X86_64 */ + {I_RCL, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11258, 58, 446}, + /* 445 : RCL rm8,imm8 [mi: o8 c0 /2 ib,u ] FL,186 */ + /* 001(c0) 202 025 : FL,186 */ + {I_RCL, 2, {RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+11288, 59, 459}, + /* 446 : RCL rm16,imm8 [mi: o16 c1 /2 ib,u ] FL,186 */ + /* 320 001(c1) 202 025 : FL,186 */ + {I_RCL, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1635, 59, 460}, + /* 447 : RCL rm32,imm8 [mi: o32 c1 /2 ib,u ] FL,386 */ + /* 321 001(c1) 202 025 : FL,386 */ + {I_RCL, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1668, 57, 461}, + /* 448 : RCL rm64,imm8 [mi: o64 c1 /2 ib,u ] LONG,FL,PROT,X86_64 */ + /* 324 001(c1) 202 025 : LONG,FL,PROT,X86_64 */ + {I_RCL, 2, {RM_GPR|BITS64,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1701, 58, 462}, + /* 449 : RCR rm8,unity [m-: o8 d0 /3 ] FL,8086 */ + /* 001(d0) 203 : FL,8086 */ + {I_RCR, 2, {RM_GPR|BITS8,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+23895, 56, 463}, + /* 450 : RCR rm16,unity [m-: o16 d1 /3 ] FL,8086 */ + /* 320 001(d1) 203 : FL,8086 */ + {I_RCR, 2, {RM_GPR|BITS16,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11318, 56, 464}, + /* 451 : RCR rm32,unity [m-: o32 d1 /3 ] FL,386 */ + /* 321 001(d1) 203 : FL,386 */ + {I_RCR, 2, {RM_GPR|BITS32,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11348, 57, 465}, + /* 452 : RCR rm64,unity [m-: o64 d1 /3 ] LONG,FL,PROT,X86_64 */ + /* 324 001(d1) 203 : LONG,FL,PROT,X86_64 */ + {I_RCR, 2, {RM_GPR|BITS64,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11378, 58, 466}, + /* 453 : RCR rm8,reg_cl [m-: o8 d2 /3 ] FL,8086 */ + /* 001(d2) 203 : FL,8086 */ + {I_RCR, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+23922, 56, 467}, + /* 454 : RCR rm16,reg_cl [m-: o16 d3 /3 ] FL,8086 */ + /* 320 001(d3) 203 : FL,8086 */ + {I_RCR, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11408, 56, 468}, + /* 455 : RCR rm32,reg_cl [m-: o32 d3 /3 ] FL,386 */ + /* 321 001(d3) 203 : FL,386 */ + {I_RCR, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11438, 57, 469}, + /* 456 : RCR rm64,reg_cl [m-: o64 d3 /3 ] LONG,FL,PROT,X86_64 */ + /* 324 001(d3) 203 : LONG,FL,PROT,X86_64 */ + {I_RCR, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11468, 58, 470}, + /* 457 : RCR rm8,imm8 [mi: o8 c0 /3 ib,u ] FL,186 */ + /* 001(c0) 203 025 : FL,186 */ + {I_RCR, 2, {RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+11498, 59, 483}, + /* 458 : RCR rm16,imm8 [mi: o16 c1 /3 ib,u ] FL,186 */ + /* 320 001(c1) 203 025 : FL,186 */ + {I_RCR, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1734, 59, 484}, + /* 459 : RCR rm32,imm8 [mi: o32 c1 /3 ib,u ] FL,386 */ + /* 321 001(c1) 203 025 : FL,386 */ + {I_RCR, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1767, 57, 485}, + /* 460 : RCR rm64,imm8 [mi: o64 c1 /3 ib,u ] LONG,FL,PROT,X86_64 */ + /* 324 001(c1) 203 025 : LONG,FL,PROT,X86_64 */ + {I_RCR, 2, {RM_GPR|BITS64,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1800, 58, 486}, + /* 461 : SHL rm8,unity [m-: o8 d0 /4 ] FL,8086 */ + /* 001(d0) 204 : FL,8086 */ + {I_SHL, 2, {RM_GPR|BITS8,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+23949, 56, 487}, + /* 462 : SHL rm16,unity [m-: o16 d1 /4 ] FL,8086 */ + /* 320 001(d1) 204 : FL,8086 */ + {I_SHL, 2, {RM_GPR|BITS16,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11528, 56, 488}, + /* 463 : SHL rm32,unity [m-: o32 d1 /4 ] FL,386 */ + /* 321 001(d1) 204 : FL,386 */ + {I_SHL, 2, {RM_GPR|BITS32,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11558, 57, 489}, + /* 464 : SHL rm64,unity [m-: o64 d1 /4 ] LONG,FL,PROT,X86_64 */ + /* 324 001(d1) 204 : LONG,FL,PROT,X86_64 */ + {I_SHL, 2, {RM_GPR|BITS64,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11588, 58, 490}, + /* 465 : SHL rm8,reg_cl [m-: o8 d2 /4 ] FL,8086 */ + /* 001(d2) 204 : FL,8086 */ + {I_SHL, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+23976, 56, 491}, + /* 466 : SHL rm16,reg_cl [m-: o16 d3 /4 ] FL,8086 */ + /* 320 001(d3) 204 : FL,8086 */ + {I_SHL, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11618, 56, 492}, + /* 467 : SHL rm32,reg_cl [m-: o32 d3 /4 ] FL,386 */ + /* 321 001(d3) 204 : FL,386 */ + {I_SHL, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11648, 57, 493}, + /* 468 : SHL rm64,reg_cl [m-: o64 d3 /4 ] LONG,FL,PROT,X86_64 */ + /* 324 001(d3) 204 : LONG,FL,PROT,X86_64 */ + {I_SHL, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11678, 58, 494}, + /* 469 : SHL rm8,imm8 [mi: o8 c0 /4 ib,u ] FL,186 */ + /* 001(c0) 204 025 : FL,186 */ + {I_SHL, 2, {RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+11708, 59, 507}, + /* 470 : SHL rm16,imm8 [mi: o16 c1 /4 ib,u ] FL,186 */ + /* 320 001(c1) 204 025 : FL,186 */ + {I_SHL, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1833, 59, 508}, + /* 471 : SHL rm32,imm8 [mi: o32 c1 /4 ib,u ] FL,386 */ + /* 321 001(c1) 204 025 : FL,386 */ + {I_SHL, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1866, 57, 509}, + /* 472 : SHL rm64,imm8 [mi: o64 c1 /4 ib,u ] LONG,FL,PROT,X86_64 */ + /* 324 001(c1) 204 025 : LONG,FL,PROT,X86_64 */ + {I_SHL, 2, {RM_GPR|BITS64,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1899, 58, 510}, + /* 473 : SAL rm8,unity [m-: o8 d0 /4 ] FL,8086 */ + /* 001(d0) 204 : FL,8086 */ + {I_SAL, 2, {RM_GPR|BITS8,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+23949, 56, 511}, + /* 474 : SAL rm16,unity [m-: o16 d1 /4 ] FL,8086 */ + /* 320 001(d1) 204 : FL,8086 */ + {I_SAL, 2, {RM_GPR|BITS16,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11528, 56, 512}, + /* 475 : SAL rm32,unity [m-: o32 d1 /4 ] FL,386 */ + /* 321 001(d1) 204 : FL,386 */ + {I_SAL, 2, {RM_GPR|BITS32,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11558, 57, 513}, + /* 476 : SAL rm64,unity [m-: o64 d1 /4 ] LONG,FL,PROT,X86_64 */ + /* 324 001(d1) 204 : LONG,FL,PROT,X86_64 */ + {I_SAL, 2, {RM_GPR|BITS64,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11588, 58, 514}, + /* 477 : SAL rm8,reg_cl [m-: o8 d2 /4 ] FL,8086 */ + /* 001(d2) 204 : FL,8086 */ + {I_SAL, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+23976, 56, 515}, + /* 478 : SAL rm16,reg_cl [m-: o16 d3 /4 ] FL,8086 */ + /* 320 001(d3) 204 : FL,8086 */ + {I_SAL, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11618, 56, 516}, + /* 479 : SAL rm32,reg_cl [m-: o32 d3 /4 ] FL,386 */ + /* 321 001(d3) 204 : FL,386 */ + {I_SAL, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11648, 57, 517}, + /* 480 : SAL rm64,reg_cl [m-: o64 d3 /4 ] LONG,FL,PROT,X86_64 */ + /* 324 001(d3) 204 : LONG,FL,PROT,X86_64 */ + {I_SAL, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11678, 58, 518}, + /* 481 : SAL rm8,imm8 [mi: o8 c0 /4 ib,u ] FL,186 */ + /* 001(c0) 204 025 : FL,186 */ + {I_SAL, 2, {RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+11708, 59, 531}, + /* 482 : SAL rm16,imm8 [mi: o16 c1 /4 ib,u ] FL,186 */ + /* 320 001(c1) 204 025 : FL,186 */ + {I_SAL, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1833, 59, 532}, + /* 483 : SAL rm32,imm8 [mi: o32 c1 /4 ib,u ] FL,386 */ + /* 321 001(c1) 204 025 : FL,386 */ + {I_SAL, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1866, 57, 533}, + /* 484 : SAL rm64,imm8 [mi: o64 c1 /4 ib,u ] LONG,FL,PROT,X86_64 */ + /* 324 001(c1) 204 025 : LONG,FL,PROT,X86_64 */ + {I_SAL, 2, {RM_GPR|BITS64,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1899, 58, 534}, + /* 485 : SHR rm8,unity [m-: o8 d0 /5 ] FL,8086 */ + /* 001(d0) 205 : FL,8086 */ + {I_SHR, 2, {RM_GPR|BITS8,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+24003, 56, 535}, + /* 486 : SHR rm16,unity [m-: o16 d1 /5 ] FL,8086 */ + /* 320 001(d1) 205 : FL,8086 */ + {I_SHR, 2, {RM_GPR|BITS16,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11738, 56, 536}, + /* 487 : SHR rm32,unity [m-: o32 d1 /5 ] FL,386 */ + /* 321 001(d1) 205 : FL,386 */ + {I_SHR, 2, {RM_GPR|BITS32,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11768, 57, 537}, + /* 488 : SHR rm64,unity [m-: o64 d1 /5 ] LONG,FL,PROT,X86_64 */ + /* 324 001(d1) 205 : LONG,FL,PROT,X86_64 */ + {I_SHR, 2, {RM_GPR|BITS64,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11798, 58, 538}, + /* 489 : SHR rm8,reg_cl [m-: o8 d2 /5 ] FL,8086 */ + /* 001(d2) 205 : FL,8086 */ + {I_SHR, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+24030, 56, 539}, + /* 490 : SHR rm16,reg_cl [m-: o16 d3 /5 ] FL,8086 */ + /* 320 001(d3) 205 : FL,8086 */ + {I_SHR, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11828, 56, 540}, + /* 491 : SHR rm32,reg_cl [m-: o32 d3 /5 ] FL,386 */ + /* 321 001(d3) 205 : FL,386 */ + {I_SHR, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11858, 57, 541}, + /* 492 : SHR rm64,reg_cl [m-: o64 d3 /5 ] LONG,FL,PROT,X86_64 */ + /* 324 001(d3) 205 : LONG,FL,PROT,X86_64 */ + {I_SHR, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11888, 58, 542}, + /* 493 : SHR rm8,imm8 [mi: o8 c0 /5 ib,u ] FL,186 */ + /* 001(c0) 205 025 : FL,186 */ + {I_SHR, 2, {RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+11918, 59, 555}, + /* 494 : SHR rm16,imm8 [mi: o16 c1 /5 ib,u ] FL,186 */ + /* 320 001(c1) 205 025 : FL,186 */ + {I_SHR, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1932, 59, 556}, + /* 495 : SHR rm32,imm8 [mi: o32 c1 /5 ib,u ] FL,386 */ + /* 321 001(c1) 205 025 : FL,386 */ + {I_SHR, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1965, 57, 557}, + /* 496 : SHR rm64,imm8 [mi: o64 c1 /5 ib,u ] LONG,FL,PROT,X86_64 */ + /* 324 001(c1) 205 025 : LONG,FL,PROT,X86_64 */ + {I_SHR, 2, {RM_GPR|BITS64,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1998, 58, 558}, + /* 497 : SAR rm8,unity [m-: o8 d0 /7 ] FL,8086 */ + /* 001(d0) 207 : FL,8086 */ + {I_SAR, 2, {RM_GPR|BITS8,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+24057, 56, 559}, + /* 498 : SAR rm16,unity [m-: o16 d1 /7 ] FL,8086 */ + /* 320 001(d1) 207 : FL,8086 */ + {I_SAR, 2, {RM_GPR|BITS16,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11948, 56, 560}, + /* 499 : SAR rm32,unity [m-: o32 d1 /7 ] FL,386 */ + /* 321 001(d1) 207 : FL,386 */ + {I_SAR, 2, {RM_GPR|BITS32,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11978, 57, 561}, + /* 500 : SAR rm64,unity [m-: o64 d1 /7 ] LONG,FL,PROT,X86_64 */ + /* 324 001(d1) 207 : LONG,FL,PROT,X86_64 */ + {I_SAR, 2, {RM_GPR|BITS64,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+12008, 58, 562}, + /* 501 : SAR rm8,reg_cl [m-: o8 d2 /7 ] FL,8086 */ + /* 001(d2) 207 : FL,8086 */ + {I_SAR, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+24084, 56, 563}, + /* 502 : SAR rm16,reg_cl [m-: o16 d3 /7 ] FL,8086 */ + /* 320 001(d3) 207 : FL,8086 */ + {I_SAR, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+12038, 56, 564}, + /* 503 : SAR rm32,reg_cl [m-: o32 d3 /7 ] FL,386 */ + /* 321 001(d3) 207 : FL,386 */ + {I_SAR, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+12068, 57, 565}, + /* 504 : SAR rm64,reg_cl [m-: o64 d3 /7 ] LONG,FL,PROT,X86_64 */ + /* 324 001(d3) 207 : LONG,FL,PROT,X86_64 */ + {I_SAR, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+12098, 58, 566}, + /* 505 : SAR rm8,imm8 [mi: o8 c0 /7 ib,u ] FL,186 */ + /* 001(c0) 207 025 : FL,186 */ + {I_SAR, 2, {RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+12128, 59, 579}, + /* 506 : SAR rm16,imm8 [mi: o16 c1 /7 ib,u ] FL,186 */ + /* 320 001(c1) 207 025 : FL,186 */ + {I_SAR, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+2031, 59, 580}, + /* 507 : SAR rm32,imm8 [mi: o32 c1 /7 ib,u ] FL,386 */ + /* 321 001(c1) 207 025 : FL,386 */ + {I_SAR, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+2064, 57, 581}, + /* 508 : SAR rm64,imm8 [mi: o64 c1 /7 ib,u ] LONG,FL,PROT,X86_64 */ + /* 324 001(c1) 207 025 : LONG,FL,PROT,X86_64 */ + {I_SAR, 2, {RM_GPR|BITS64,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+2097, 58, 582}, + /* 509 : RORX reg32,rm32,imm8 [rmi: vex.lz.f2.0f3a.w0 f0 /r ib ] SM0-1,BMI2,FUTURE */ + /* 270(003 003) 001(f0) 110 022 : SM0,SM1,NOAPX,VEX,BMI2,FUTURE */ + {I_RORX, 3, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+51259, 60, 585}, + /* 510 : SHLX reg32,rm32*,reg32 [rmv: vex.lz.66.0f38.w0 f7 /r ] SM0,SM1,BMI2,FUTURE */ + /* 262(002 001) 001(f7) 110 : SM0,SM1,NOAPX,VEX,BMI2,FUTURE */ + {I_SHLX, 3, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55229, 60, 595}, + /* 511 : SARX reg32,rm32*,reg32 [rmv: vex.lz.f3.0f38.w0 f7 /r ] SM0,SM1,BMI2,FUTURE */ + /* 262(002 002) 001(f7) 110 : SM0,SM1,NOAPX,VEX,BMI2,FUTURE */ + {I_SARX, 3, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55243, 60, 597}, + /* 512 : SHRX reg32,rm32*,reg32 [rmv: vex.lz.f2.0f38.w0 f7 /r ] SM0,SM1,BMI2,FUTURE */ + /* 262(002 003) 001(f7) 110 : SM0,SM1,NOAPX,VEX,BMI2,FUTURE */ + {I_SHRX, 3, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55257, 60, 598}, + /* 513 : RORX reg64,rm64,imm8 [rmi: vex.lz.f2.0f3a.w1 f0 /r ib ] SM0-1,BMI2,FUTURE */ + /* 270(003 203) 001(f0) 110 022 : SM0,SM1,NOAPX,VEX,BMI2,FUTURE */ + {I_RORX, 3, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+51267, 60, 603}, + /* 514 : SHLX reg64,rm64*,reg64 [rmv: vex.lz.66.0f38.w1 f7 /r ] SM0,SM1,BMI2,FUTURE */ + /* 262(002 201) 001(f7) 110 : SM0,SM1,NOAPX,VEX,BMI2,FUTURE */ + {I_SHLX, 3, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55271, 60, 617}, + /* 515 : SARX reg64,rm64*,reg64 [rmv: vex.lz.f3.0f38.w1 f7 /r ] SM0,SM1,BMI2,FUTURE */ + /* 262(002 202) 001(f7) 110 : SM0,SM1,NOAPX,VEX,BMI2,FUTURE */ + {I_SARX, 3, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55285, 60, 619}, + /* 516 : SHRX reg64,rm64*,reg64 [rmv: vex.lz.f2.0f38.w1 f7 /r ] SM0,SM1,BMI2,FUTURE */ + /* 262(002 203) 001(f7) 110 : SM0,SM1,NOAPX,VEX,BMI2,FUTURE */ + {I_SHRX, 3, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55299, 60, 620}, + /* 517 : ROL reg8?,rm8,unity [vm-: evex.nd1.nf.l0.m4.o8 d0 /0 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d0) 210 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 3, {REG_GPR|BITS8,RM_GPR|BITS8,UNITY|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+23710, 37, 659}, + /* 518 : ROL rm8,unity [m-: evex.nd0.nf.l0.m4.o8 d0 /0 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(d0) 200 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 2, {RM_GPR|BITS8,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+23719, 64, 659}, + /* 519 : ROL reg16?,rm16,unity [vm-: evex.nd1.nf.l0.m4.o16 d1 /0 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d1) 210 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 3, {REG_GPR|BITS16,RM_GPR|BITS16,UNITY|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+10663, 40, 660}, + /* 520 : ROL rm16,unity [m-: evex.nd0.nf.l0.m4.o16 d1 /0 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(d1) 200 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 2, {RM_GPR|BITS16,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+10673, 66, 660}, + /* 521 : ROL reg32?,rm32,unity [vm-: evex.nd1.nf.l0.m4.o32 d1 /0 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d1) 210 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 3, {REG_GPR|BITS32,RM_GPR|BITS32,UNITY|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+10693, 43, 661}, + /* 522 : ROL rm32,unity [m-: evex.nd0.nf.l0.m4.o32 d1 /0 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(d1) 200 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 2, {RM_GPR|BITS32,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+10703, 68, 661}, + /* 523 : ROL reg64?,rm64,unity [vm-: evex.nd1.nf.l0.m4.o64 d1 /0 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d1) 210 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 3, {REG_GPR|BITS64,RM_GPR|BITS64,UNITY|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+10723, 43, 662}, + /* 524 : ROL rm64,unity [m-: evex.nd0.nf.l0.m4.o64 d1 /0 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(d1) 200 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 2, {RM_GPR|BITS64,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+10733, 68, 662}, + /* 525 : ROL reg8?,rm8,reg_cl [vm-: evex.nd1.nf.l0.m4.o8 d2 /0 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d2) 210 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 3, {REG_GPR|BITS8,RM_GPR|BITS8,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+23737, 37, 663}, + /* 526 : ROL rm8,reg_cl [m-: evex.nd0.nf.l0.m4.o8 d2 /0 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(d2) 200 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+23746, 64, 663}, + /* 527 : ROL reg16?,rm16,reg_cl [vm-: evex.nd1.nf.l0.m4.o16 d3 /0 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d3) 210 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 3, {REG_GPR|BITS16,RM_GPR|BITS16,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+10753, 40, 664}, + /* 528 : ROL rm16,reg_cl [m-: evex.nd0.nf.l0.m4.o16 d3 /0 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(d3) 200 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+10763, 66, 664}, + /* 529 : ROL reg32?,rm32,reg_cl [vm-: evex.nd1.nf.l0.m4.o32 d3 /0 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d3) 210 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+10783, 43, 665}, + /* 530 : ROL rm32,reg_cl [m-: evex.nd0.nf.l0.m4.o32 d3 /0 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(d3) 200 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+10793, 68, 665}, + /* 531 : ROL reg64?,rm64,reg_cl [vm-: evex.nd1.nf.l0.m4.o64 d3 /0 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d3) 210 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+10813, 43, 666}, + /* 532 : ROL rm64,reg_cl [m-: evex.nd0.nf.l0.m4.o64 d3 /0 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(d3) 200 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+10823, 68, 666}, + /* 533 : ROL reg8?,rm8,imm8 [vmi: evex.nd1.nf.l0.m4.o8 c0 /0 ib,u ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(c0) 210 026 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 3, {REG_GPR|BITS8,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+10843, 37, 679}, + /* 534 : ROL rm8,imm8 [mi: evex.nd0.nf.l0.m4.o8 c0 /0 ib,u ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(c0) 200 025 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 2, {RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+10853, 64, 679}, + /* 535 : ROL reg16?,rm16,imm8 [vmi: evex.nd1.nf.l0.m4.o16 c1 /0 ib,u ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(c1) 210 026 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 3, {REG_GPR|BITS16,RM_GPR|BITS16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+1410, 40, 680}, + /* 536 : ROL rm16,imm8 [mi: evex.nd0.nf.l0.m4.o16 c1 /0 ib,u ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(c1) 200 025 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1421, 66, 680}, + /* 537 : ROL reg32?,rm32,imm8 [vmi: evex.nd1.nf.l0.m4.o32 c1 /0 ib,u ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(c1) 210 026 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 3, {REG_GPR|BITS32,RM_GPR|BITS32,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+1443, 43, 681}, + /* 538 : ROL rm32,imm8 [mi: evex.nd0.nf.l0.m4.o32 c1 /0 ib,u ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(c1) 200 025 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1454, 68, 681}, + /* 539 : ROL reg64?,rm64,imm8 [vmi: evex.nd1.nf.l0.m4.o64 c1 /0 ib,u ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(c1) 210 026 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 3, {REG_GPR|BITS64,RM_GPR|BITS64,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+1476, 43, 682}, + /* 540 : ROL rm64,imm8 [mi: evex.nd0.nf.l0.m4.o64 c1 /0 ib,u ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(c1) 200 025 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROL, 2, {RM_GPR|BITS64,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1487, 68, 682}, + /* 541 : ROR reg8?,rm8,unity [vm-: evex.nd1.nf.l0.m4.o8 d0 /1 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d0) 211 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 3, {REG_GPR|BITS8,RM_GPR|BITS8,UNITY|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+23764, 37, 683}, + /* 542 : ROR rm8,unity [m-: evex.nd0.nf.l0.m4.o8 d0 /1 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(d0) 201 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 2, {RM_GPR|BITS8,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+23773, 64, 683}, + /* 543 : ROR reg16?,rm16,unity [vm-: evex.nd1.nf.l0.m4.o16 d1 /1 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d1) 211 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 3, {REG_GPR|BITS16,RM_GPR|BITS16,UNITY|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+10873, 40, 684}, + /* 544 : ROR rm16,unity [m-: evex.nd0.nf.l0.m4.o16 d1 /1 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(d1) 201 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 2, {RM_GPR|BITS16,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+10883, 66, 684}, + /* 545 : ROR reg32?,rm32,unity [vm-: evex.nd1.nf.l0.m4.o32 d1 /1 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d1) 211 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 3, {REG_GPR|BITS32,RM_GPR|BITS32,UNITY|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+10903, 43, 685}, + /* 546 : ROR rm32,unity [m-: evex.nd0.nf.l0.m4.o32 d1 /1 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(d1) 201 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 2, {RM_GPR|BITS32,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+10913, 68, 685}, + /* 547 : ROR reg64?,rm64,unity [vm-: evex.nd1.nf.l0.m4.o64 d1 /1 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d1) 211 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 3, {REG_GPR|BITS64,RM_GPR|BITS64,UNITY|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+10933, 43, 686}, + /* 548 : ROR rm64,unity [m-: evex.nd0.nf.l0.m4.o64 d1 /1 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(d1) 201 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 2, {RM_GPR|BITS64,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+10943, 68, 686}, + /* 549 : ROR reg8?,rm8,reg_cl [vm-: evex.nd1.nf.l0.m4.o8 d2 /1 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d2) 211 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 3, {REG_GPR|BITS8,RM_GPR|BITS8,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+23791, 37, 687}, + /* 550 : ROR rm8,reg_cl [m-: evex.nd0.nf.l0.m4.o8 d2 /1 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(d2) 201 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+23800, 64, 687}, + /* 551 : ROR reg16?,rm16,reg_cl [vm-: evex.nd1.nf.l0.m4.o16 d3 /1 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d3) 211 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 3, {REG_GPR|BITS16,RM_GPR|BITS16,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+10963, 40, 688}, + /* 552 : ROR rm16,reg_cl [m-: evex.nd0.nf.l0.m4.o16 d3 /1 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(d3) 201 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+10973, 66, 688}, + /* 553 : ROR reg32?,rm32,reg_cl [vm-: evex.nd1.nf.l0.m4.o32 d3 /1 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d3) 211 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+10993, 43, 689}, + /* 554 : ROR rm32,reg_cl [m-: evex.nd0.nf.l0.m4.o32 d3 /1 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(d3) 201 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11003, 68, 689}, + /* 555 : ROR reg64?,rm64,reg_cl [vm-: evex.nd1.nf.l0.m4.o64 d3 /1 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d3) 211 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+11023, 43, 690}, + /* 556 : ROR rm64,reg_cl [m-: evex.nd0.nf.l0.m4.o64 d3 /1 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(d3) 201 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11033, 68, 690}, + /* 557 : ROR reg8?,rm8,imm8 [vmi: evex.nd1.nf.l0.m4.o8 c0 /1 ib,u ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(c0) 211 026 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 3, {REG_GPR|BITS8,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+11053, 37, 703}, + /* 558 : ROR rm8,imm8 [mi: evex.nd0.nf.l0.m4.o8 c0 /1 ib,u ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(c0) 201 025 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 2, {RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+11063, 64, 703}, + /* 559 : ROR reg16?,rm16,imm8 [vmi: evex.nd1.nf.l0.m4.o16 c1 /1 ib,u ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(c1) 211 026 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 3, {REG_GPR|BITS16,RM_GPR|BITS16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+1509, 40, 704}, + /* 560 : ROR rm16,imm8 [mi: evex.nd0.nf.l0.m4.o16 c1 /1 ib,u ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(c1) 201 025 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1520, 66, 704}, + /* 561 : ROR reg32?,rm32,imm8 [vmi: evex.nd1.nf.l0.m4.o32 c1 /1 ib,u ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(c1) 211 026 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 3, {REG_GPR|BITS32,RM_GPR|BITS32,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+1542, 43, 705}, + /* 562 : ROR rm32,imm8 [mi: evex.nd0.nf.l0.m4.o32 c1 /1 ib,u ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(c1) 201 025 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1553, 68, 705}, + /* 563 : ROR reg64?,rm64,imm8 [vmi: evex.nd1.nf.l0.m4.o64 c1 /1 ib,u ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(c1) 211 026 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 3, {REG_GPR|BITS64,RM_GPR|BITS64,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+1575, 43, 706}, + /* 564 : ROR rm64,imm8 [mi: evex.nd0.nf.l0.m4.o64 c1 /1 ib,u ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(c1) 201 025 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_ROR, 2, {RM_GPR|BITS64,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1586, 68, 706}, + /* 565 : RCL reg8?,rm8,unity [vm-: evex.nd1.nf.l0.m4.o8 d0 /2 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d0) 212 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 3, {REG_GPR|BITS8,RM_GPR|BITS8,UNITY|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+23818, 37, 707}, + /* 566 : RCL rm8,unity [m-: evex.nd0.nf.l0.m4.o8 d0 /2 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(d0) 202 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 2, {RM_GPR|BITS8,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+23827, 64, 707}, + /* 567 : RCL reg16?,rm16,unity [vm-: evex.nd1.nf.l0.m4.o16 d1 /2 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d1) 212 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 3, {REG_GPR|BITS16,RM_GPR|BITS16,UNITY|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+11083, 40, 708}, + /* 568 : RCL rm16,unity [m-: evex.nd0.nf.l0.m4.o16 d1 /2 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(d1) 202 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 2, {RM_GPR|BITS16,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11093, 66, 708}, + /* 569 : RCL reg32?,rm32,unity [vm-: evex.nd1.nf.l0.m4.o32 d1 /2 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d1) 212 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 3, {REG_GPR|BITS32,RM_GPR|BITS32,UNITY|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+11113, 43, 709}, + /* 570 : RCL rm32,unity [m-: evex.nd0.nf.l0.m4.o32 d1 /2 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(d1) 202 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 2, {RM_GPR|BITS32,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11123, 68, 709}, + /* 571 : RCL reg64?,rm64,unity [vm-: evex.nd1.nf.l0.m4.o64 d1 /2 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d1) 212 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 3, {REG_GPR|BITS64,RM_GPR|BITS64,UNITY|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+11143, 43, 710}, + /* 572 : RCL rm64,unity [m-: evex.nd0.nf.l0.m4.o64 d1 /2 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(d1) 202 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 2, {RM_GPR|BITS64,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11153, 68, 710}, + /* 573 : RCL reg8?,rm8,reg_cl [vm-: evex.nd1.nf.l0.m4.o8 d2 /2 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d2) 212 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 3, {REG_GPR|BITS8,RM_GPR|BITS8,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+23845, 37, 711}, + /* 574 : RCL rm8,reg_cl [m-: evex.nd0.nf.l0.m4.o8 d2 /2 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(d2) 202 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+23854, 64, 711}, + /* 575 : RCL reg16?,rm16,reg_cl [vm-: evex.nd1.nf.l0.m4.o16 d3 /2 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d3) 212 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 3, {REG_GPR|BITS16,RM_GPR|BITS16,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+11173, 40, 712}, + /* 576 : RCL rm16,reg_cl [m-: evex.nd0.nf.l0.m4.o16 d3 /2 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(d3) 202 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11183, 66, 712}, + /* 577 : RCL reg32?,rm32,reg_cl [vm-: evex.nd1.nf.l0.m4.o32 d3 /2 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d3) 212 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+11203, 43, 713}, + /* 578 : RCL rm32,reg_cl [m-: evex.nd0.nf.l0.m4.o32 d3 /2 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(d3) 202 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11213, 68, 713}, + /* 579 : RCL reg64?,rm64,reg_cl [vm-: evex.nd1.nf.l0.m4.o64 d3 /2 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d3) 212 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+11233, 43, 714}, + /* 580 : RCL rm64,reg_cl [m-: evex.nd0.nf.l0.m4.o64 d3 /2 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(d3) 202 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11243, 68, 714}, + /* 581 : RCL reg8?,rm8,imm8 [vmi: evex.nd1.nf.l0.m4.o8 c0 /2 ib,u ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(c0) 212 026 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 3, {REG_GPR|BITS8,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+11263, 37, 727}, + /* 582 : RCL rm8,imm8 [mi: evex.nd0.nf.l0.m4.o8 c0 /2 ib,u ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(c0) 202 025 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 2, {RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+11273, 64, 727}, + /* 583 : RCL reg16?,rm16,imm8 [vmi: evex.nd1.nf.l0.m4.o16 c1 /2 ib,u ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(c1) 212 026 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 3, {REG_GPR|BITS16,RM_GPR|BITS16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+1608, 40, 728}, + /* 584 : RCL rm16,imm8 [mi: evex.nd0.nf.l0.m4.o16 c1 /2 ib,u ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(c1) 202 025 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1619, 66, 728}, + /* 585 : RCL reg32?,rm32,imm8 [vmi: evex.nd1.nf.l0.m4.o32 c1 /2 ib,u ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(c1) 212 026 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 3, {REG_GPR|BITS32,RM_GPR|BITS32,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+1641, 43, 729}, + /* 586 : RCL rm32,imm8 [mi: evex.nd0.nf.l0.m4.o32 c1 /2 ib,u ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(c1) 202 025 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1652, 68, 729}, + /* 587 : RCL reg64?,rm64,imm8 [vmi: evex.nd1.nf.l0.m4.o64 c1 /2 ib,u ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(c1) 212 026 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 3, {REG_GPR|BITS64,RM_GPR|BITS64,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+1674, 43, 730}, + /* 588 : RCL rm64,imm8 [mi: evex.nd0.nf.l0.m4.o64 c1 /2 ib,u ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(c1) 202 025 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCL, 2, {RM_GPR|BITS64,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1685, 68, 730}, + /* 589 : RCR reg8?,rm8,unity [vm-: evex.nd1.nf.l0.m4.o8 d0 /3 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d0) 213 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 3, {REG_GPR|BITS8,RM_GPR|BITS8,UNITY|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+23872, 37, 731}, + /* 590 : RCR rm8,unity [m-: evex.nd0.nf.l0.m4.o8 d0 /3 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(d0) 203 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 2, {RM_GPR|BITS8,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+23881, 64, 731}, + /* 591 : RCR reg16?,rm16,unity [vm-: evex.nd1.nf.l0.m4.o16 d1 /3 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d1) 213 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 3, {REG_GPR|BITS16,RM_GPR|BITS16,UNITY|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+11293, 40, 732}, + /* 592 : RCR rm16,unity [m-: evex.nd0.nf.l0.m4.o16 d1 /3 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(d1) 203 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 2, {RM_GPR|BITS16,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11303, 66, 732}, + /* 593 : RCR reg32?,rm32,unity [vm-: evex.nd1.nf.l0.m4.o32 d1 /3 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d1) 213 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 3, {REG_GPR|BITS32,RM_GPR|BITS32,UNITY|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+11323, 43, 733}, + /* 594 : RCR rm32,unity [m-: evex.nd0.nf.l0.m4.o32 d1 /3 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(d1) 203 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 2, {RM_GPR|BITS32,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11333, 68, 733}, + /* 595 : RCR reg64?,rm64,unity [vm-: evex.nd1.nf.l0.m4.o64 d1 /3 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d1) 213 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 3, {REG_GPR|BITS64,RM_GPR|BITS64,UNITY|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+11353, 43, 734}, + /* 596 : RCR rm64,unity [m-: evex.nd0.nf.l0.m4.o64 d1 /3 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(d1) 203 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 2, {RM_GPR|BITS64,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11363, 68, 734}, + /* 597 : RCR reg8?,rm8,reg_cl [vm-: evex.nd1.nf.l0.m4.o8 d2 /3 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d2) 213 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 3, {REG_GPR|BITS8,RM_GPR|BITS8,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+23899, 37, 735}, + /* 598 : RCR rm8,reg_cl [m-: evex.nd0.nf.l0.m4.o8 d2 /3 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(d2) 203 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+23908, 64, 735}, + /* 599 : RCR reg16?,rm16,reg_cl [vm-: evex.nd1.nf.l0.m4.o16 d3 /3 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d3) 213 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 3, {REG_GPR|BITS16,RM_GPR|BITS16,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+11383, 40, 736}, + /* 600 : RCR rm16,reg_cl [m-: evex.nd0.nf.l0.m4.o16 d3 /3 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(d3) 203 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11393, 66, 736}, + /* 601 : RCR reg32?,rm32,reg_cl [vm-: evex.nd1.nf.l0.m4.o32 d3 /3 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d3) 213 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+11413, 43, 737}, + /* 602 : RCR rm32,reg_cl [m-: evex.nd0.nf.l0.m4.o32 d3 /3 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(d3) 203 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11423, 68, 737}, + /* 603 : RCR reg64?,rm64,reg_cl [vm-: evex.nd1.nf.l0.m4.o64 d3 /3 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d3) 213 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+11443, 43, 738}, + /* 604 : RCR rm64,reg_cl [m-: evex.nd0.nf.l0.m4.o64 d3 /3 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(d3) 203 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11453, 68, 738}, + /* 605 : RCR reg8?,rm8,imm8 [vmi: evex.nd1.nf.l0.m4.o8 c0 /3 ib,u ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(c0) 213 026 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 3, {REG_GPR|BITS8,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+11473, 37, 751}, + /* 606 : RCR rm8,imm8 [mi: evex.nd0.nf.l0.m4.o8 c0 /3 ib,u ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(c0) 203 025 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 2, {RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+11483, 64, 751}, + /* 607 : RCR reg16?,rm16,imm8 [vmi: evex.nd1.nf.l0.m4.o16 c1 /3 ib,u ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(c1) 213 026 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 3, {REG_GPR|BITS16,RM_GPR|BITS16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+1707, 40, 752}, + /* 608 : RCR rm16,imm8 [mi: evex.nd0.nf.l0.m4.o16 c1 /3 ib,u ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(c1) 203 025 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1718, 66, 752}, + /* 609 : RCR reg32?,rm32,imm8 [vmi: evex.nd1.nf.l0.m4.o32 c1 /3 ib,u ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(c1) 213 026 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 3, {REG_GPR|BITS32,RM_GPR|BITS32,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+1740, 43, 753}, + /* 610 : RCR rm32,imm8 [mi: evex.nd0.nf.l0.m4.o32 c1 /3 ib,u ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(c1) 203 025 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1751, 68, 753}, + /* 611 : RCR reg64?,rm64,imm8 [vmi: evex.nd1.nf.l0.m4.o64 c1 /3 ib,u ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(c1) 213 026 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 3, {REG_GPR|BITS64,RM_GPR|BITS64,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+1773, 43, 754}, + /* 612 : RCR rm64,imm8 [mi: evex.nd0.nf.l0.m4.o64 c1 /3 ib,u ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(c1) 203 025 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_RCR, 2, {RM_GPR|BITS64,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1784, 68, 754}, + /* 613 : SHL reg8?,rm8,unity [vm-: evex.nd1.nf.l0.m4.o8 d0 /4 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d0) 214 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 3, {REG_GPR|BITS8,RM_GPR|BITS8,UNITY|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+23926, 37, 755}, + /* 614 : SHL rm8,unity [m-: evex.nd0.nf.l0.m4.o8 d0 /4 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(d0) 204 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 2, {RM_GPR|BITS8,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+23935, 64, 755}, + /* 615 : SHL reg16?,rm16,unity [vm-: evex.nd1.nf.l0.m4.o16 d1 /4 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d1) 214 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 3, {REG_GPR|BITS16,RM_GPR|BITS16,UNITY|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+11503, 40, 756}, + /* 616 : SHL rm16,unity [m-: evex.nd0.nf.l0.m4.o16 d1 /4 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(d1) 204 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 2, {RM_GPR|BITS16,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11513, 66, 756}, + /* 617 : SHL reg32?,rm32,unity [vm-: evex.nd1.nf.l0.m4.o32 d1 /4 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d1) 214 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 3, {REG_GPR|BITS32,RM_GPR|BITS32,UNITY|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+11533, 43, 757}, + /* 618 : SHL rm32,unity [m-: evex.nd0.nf.l0.m4.o32 d1 /4 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(d1) 204 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 2, {RM_GPR|BITS32,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11543, 68, 757}, + /* 619 : SHL reg64?,rm64,unity [vm-: evex.nd1.nf.l0.m4.o64 d1 /4 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d1) 214 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 3, {REG_GPR|BITS64,RM_GPR|BITS64,UNITY|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+11563, 43, 758}, + /* 620 : SHL rm64,unity [m-: evex.nd0.nf.l0.m4.o64 d1 /4 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(d1) 204 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 2, {RM_GPR|BITS64,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11573, 68, 758}, + /* 621 : SHL reg8?,rm8,reg_cl [vm-: evex.nd1.nf.l0.m4.o8 d2 /4 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d2) 214 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 3, {REG_GPR|BITS8,RM_GPR|BITS8,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+23953, 37, 759}, + /* 622 : SHL rm8,reg_cl [m-: evex.nd0.nf.l0.m4.o8 d2 /4 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(d2) 204 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+23962, 64, 759}, + /* 623 : SHL reg16?,rm16,reg_cl [vm-: evex.nd1.nf.l0.m4.o16 d3 /4 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d3) 214 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 3, {REG_GPR|BITS16,RM_GPR|BITS16,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+11593, 40, 760}, + /* 624 : SHL rm16,reg_cl [m-: evex.nd0.nf.l0.m4.o16 d3 /4 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(d3) 204 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11603, 66, 760}, + /* 625 : SHL reg32?,rm32,reg_cl [vm-: evex.nd1.nf.l0.m4.o32 d3 /4 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d3) 214 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+11623, 43, 761}, + /* 626 : SHL rm32,reg_cl [m-: evex.nd0.nf.l0.m4.o32 d3 /4 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(d3) 204 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11633, 68, 761}, + /* 627 : SHL reg64?,rm64,reg_cl [vm-: evex.nd1.nf.l0.m4.o64 d3 /4 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d3) 214 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+11653, 43, 762}, + /* 628 : SHL rm64,reg_cl [m-: evex.nd0.nf.l0.m4.o64 d3 /4 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(d3) 204 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11663, 68, 762}, + /* 629 : SHL reg8?,rm8,imm8 [vmi: evex.nd1.nf.l0.m4.o8 c0 /4 ib,u ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(c0) 214 026 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 3, {REG_GPR|BITS8,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+11683, 37, 775}, + /* 630 : SHL rm8,imm8 [mi: evex.nd0.nf.l0.m4.o8 c0 /4 ib,u ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(c0) 204 025 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 2, {RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+11693, 64, 775}, + /* 631 : SHL reg16?,rm16,imm8 [vmi: evex.nd1.nf.l0.m4.o16 c1 /4 ib,u ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(c1) 214 026 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 3, {REG_GPR|BITS16,RM_GPR|BITS16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+1806, 40, 776}, + /* 632 : SHL rm16,imm8 [mi: evex.nd0.nf.l0.m4.o16 c1 /4 ib,u ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(c1) 204 025 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1817, 66, 776}, + /* 633 : SHL reg32?,rm32,imm8 [vmi: evex.nd1.nf.l0.m4.o32 c1 /4 ib,u ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(c1) 214 026 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 3, {REG_GPR|BITS32,RM_GPR|BITS32,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+1839, 43, 777}, + /* 634 : SHL rm32,imm8 [mi: evex.nd0.nf.l0.m4.o32 c1 /4 ib,u ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(c1) 204 025 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1850, 68, 777}, + /* 635 : SHL reg64?,rm64,imm8 [vmi: evex.nd1.nf.l0.m4.o64 c1 /4 ib,u ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(c1) 214 026 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 3, {REG_GPR|BITS64,RM_GPR|BITS64,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+1872, 43, 778}, + /* 636 : SHL rm64,imm8 [mi: evex.nd0.nf.l0.m4.o64 c1 /4 ib,u ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(c1) 204 025 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHL, 2, {RM_GPR|BITS64,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1883, 68, 778}, + /* 637 : SAL reg8?,rm8,unity [vm-: evex.nd1.nf.l0.m4.o8 d0 /4 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d0) 214 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 3, {REG_GPR|BITS8,RM_GPR|BITS8,UNITY|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+23926, 37, 779}, + /* 638 : SAL rm8,unity [m-: evex.nd0.nf.l0.m4.o8 d0 /4 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(d0) 204 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 2, {RM_GPR|BITS8,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+23935, 64, 779}, + /* 639 : SAL reg16?,rm16,unity [vm-: evex.nd1.nf.l0.m4.o16 d1 /4 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d1) 214 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 3, {REG_GPR|BITS16,RM_GPR|BITS16,UNITY|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+11503, 40, 780}, + /* 640 : SAL rm16,unity [m-: evex.nd0.nf.l0.m4.o16 d1 /4 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(d1) 204 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 2, {RM_GPR|BITS16,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11513, 66, 780}, + /* 641 : SAL reg32?,rm32,unity [vm-: evex.nd1.nf.l0.m4.o32 d1 /4 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d1) 214 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 3, {REG_GPR|BITS32,RM_GPR|BITS32,UNITY|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+11533, 43, 781}, + /* 642 : SAL rm32,unity [m-: evex.nd0.nf.l0.m4.o32 d1 /4 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(d1) 204 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 2, {RM_GPR|BITS32,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11543, 68, 781}, + /* 643 : SAL reg64?,rm64,unity [vm-: evex.nd1.nf.l0.m4.o64 d1 /4 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d1) 214 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 3, {REG_GPR|BITS64,RM_GPR|BITS64,UNITY|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+11563, 43, 782}, + /* 644 : SAL rm64,unity [m-: evex.nd0.nf.l0.m4.o64 d1 /4 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(d1) 204 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 2, {RM_GPR|BITS64,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11573, 68, 782}, + /* 645 : SAL reg8?,rm8,reg_cl [vm-: evex.nd1.nf.l0.m4.o8 d2 /4 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d2) 214 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 3, {REG_GPR|BITS8,RM_GPR|BITS8,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+23953, 37, 783}, + /* 646 : SAL rm8,reg_cl [m-: evex.nd0.nf.l0.m4.o8 d2 /4 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(d2) 204 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+23962, 64, 783}, + /* 647 : SAL reg16?,rm16,reg_cl [vm-: evex.nd1.nf.l0.m4.o16 d3 /4 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d3) 214 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 3, {REG_GPR|BITS16,RM_GPR|BITS16,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+11593, 40, 784}, + /* 648 : SAL rm16,reg_cl [m-: evex.nd0.nf.l0.m4.o16 d3 /4 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(d3) 204 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11603, 66, 784}, + /* 649 : SAL reg32?,rm32,reg_cl [vm-: evex.nd1.nf.l0.m4.o32 d3 /4 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d3) 214 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+11623, 43, 785}, + /* 650 : SAL rm32,reg_cl [m-: evex.nd0.nf.l0.m4.o32 d3 /4 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(d3) 204 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11633, 68, 785}, + /* 651 : SAL reg64?,rm64,reg_cl [vm-: evex.nd1.nf.l0.m4.o64 d3 /4 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d3) 214 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+11653, 43, 786}, + /* 652 : SAL rm64,reg_cl [m-: evex.nd0.nf.l0.m4.o64 d3 /4 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(d3) 204 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11663, 68, 786}, + /* 653 : SAL reg8?,rm8,imm8 [vmi: evex.nd1.nf.l0.m4.o8 c0 /4 ib,u ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(c0) 214 026 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 3, {REG_GPR|BITS8,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+11683, 37, 799}, + /* 654 : SAL rm8,imm8 [mi: evex.nd0.nf.l0.m4.o8 c0 /4 ib,u ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(c0) 204 025 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 2, {RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+11693, 64, 799}, + /* 655 : SAL reg16?,rm16,imm8 [vmi: evex.nd1.nf.l0.m4.o16 c1 /4 ib,u ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(c1) 214 026 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 3, {REG_GPR|BITS16,RM_GPR|BITS16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+1806, 40, 800}, + /* 656 : SAL rm16,imm8 [mi: evex.nd0.nf.l0.m4.o16 c1 /4 ib,u ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(c1) 204 025 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1817, 66, 800}, + /* 657 : SAL reg32?,rm32,imm8 [vmi: evex.nd1.nf.l0.m4.o32 c1 /4 ib,u ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(c1) 214 026 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 3, {REG_GPR|BITS32,RM_GPR|BITS32,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+1839, 43, 801}, + /* 658 : SAL rm32,imm8 [mi: evex.nd0.nf.l0.m4.o32 c1 /4 ib,u ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(c1) 204 025 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1850, 68, 801}, + /* 659 : SAL reg64?,rm64,imm8 [vmi: evex.nd1.nf.l0.m4.o64 c1 /4 ib,u ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(c1) 214 026 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 3, {REG_GPR|BITS64,RM_GPR|BITS64,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+1872, 43, 802}, + /* 660 : SAL rm64,imm8 [mi: evex.nd0.nf.l0.m4.o64 c1 /4 ib,u ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(c1) 204 025 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAL, 2, {RM_GPR|BITS64,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1883, 68, 802}, + /* 661 : SHR reg8?,rm8,unity [vm-: evex.nd1.nf.l0.m4.o8 d0 /5 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d0) 215 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 3, {REG_GPR|BITS8,RM_GPR|BITS8,UNITY|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+23980, 37, 803}, + /* 662 : SHR rm8,unity [m-: evex.nd0.nf.l0.m4.o8 d0 /5 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(d0) 205 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 2, {RM_GPR|BITS8,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+23989, 64, 803}, + /* 663 : SHR reg16?,rm16,unity [vm-: evex.nd1.nf.l0.m4.o16 d1 /5 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d1) 215 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 3, {REG_GPR|BITS16,RM_GPR|BITS16,UNITY|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+11713, 40, 804}, + /* 664 : SHR rm16,unity [m-: evex.nd0.nf.l0.m4.o16 d1 /5 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(d1) 205 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 2, {RM_GPR|BITS16,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11723, 66, 804}, + /* 665 : SHR reg32?,rm32,unity [vm-: evex.nd1.nf.l0.m4.o32 d1 /5 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d1) 215 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 3, {REG_GPR|BITS32,RM_GPR|BITS32,UNITY|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+11743, 43, 805}, + /* 666 : SHR rm32,unity [m-: evex.nd0.nf.l0.m4.o32 d1 /5 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(d1) 205 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 2, {RM_GPR|BITS32,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11753, 68, 805}, + /* 667 : SHR reg64?,rm64,unity [vm-: evex.nd1.nf.l0.m4.o64 d1 /5 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d1) 215 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 3, {REG_GPR|BITS64,RM_GPR|BITS64,UNITY|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+11773, 43, 806}, + /* 668 : SHR rm64,unity [m-: evex.nd0.nf.l0.m4.o64 d1 /5 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(d1) 205 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 2, {RM_GPR|BITS64,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11783, 68, 806}, + /* 669 : SHR reg8?,rm8,reg_cl [vm-: evex.nd1.nf.l0.m4.o8 d2 /5 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d2) 215 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 3, {REG_GPR|BITS8,RM_GPR|BITS8,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+24007, 37, 807}, + /* 670 : SHR rm8,reg_cl [m-: evex.nd0.nf.l0.m4.o8 d2 /5 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(d2) 205 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+24016, 64, 807}, + /* 671 : SHR reg16?,rm16,reg_cl [vm-: evex.nd1.nf.l0.m4.o16 d3 /5 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d3) 215 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 3, {REG_GPR|BITS16,RM_GPR|BITS16,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+11803, 40, 808}, + /* 672 : SHR rm16,reg_cl [m-: evex.nd0.nf.l0.m4.o16 d3 /5 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(d3) 205 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11813, 66, 808}, + /* 673 : SHR reg32?,rm32,reg_cl [vm-: evex.nd1.nf.l0.m4.o32 d3 /5 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d3) 215 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+11833, 43, 809}, + /* 674 : SHR rm32,reg_cl [m-: evex.nd0.nf.l0.m4.o32 d3 /5 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(d3) 205 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11843, 68, 809}, + /* 675 : SHR reg64?,rm64,reg_cl [vm-: evex.nd1.nf.l0.m4.o64 d3 /5 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d3) 215 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+11863, 43, 810}, + /* 676 : SHR rm64,reg_cl [m-: evex.nd0.nf.l0.m4.o64 d3 /5 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(d3) 205 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11873, 68, 810}, + /* 677 : SHR reg8?,rm8,imm8 [vmi: evex.nd1.nf.l0.m4.o8 c0 /5 ib,u ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(c0) 215 026 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 3, {REG_GPR|BITS8,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+11893, 37, 823}, + /* 678 : SHR rm8,imm8 [mi: evex.nd0.nf.l0.m4.o8 c0 /5 ib,u ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(c0) 205 025 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 2, {RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+11903, 64, 823}, + /* 679 : SHR reg16?,rm16,imm8 [vmi: evex.nd1.nf.l0.m4.o16 c1 /5 ib,u ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(c1) 215 026 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 3, {REG_GPR|BITS16,RM_GPR|BITS16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+1905, 40, 824}, + /* 680 : SHR rm16,imm8 [mi: evex.nd0.nf.l0.m4.o16 c1 /5 ib,u ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(c1) 205 025 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1916, 66, 824}, + /* 681 : SHR reg32?,rm32,imm8 [vmi: evex.nd1.nf.l0.m4.o32 c1 /5 ib,u ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(c1) 215 026 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 3, {REG_GPR|BITS32,RM_GPR|BITS32,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+1938, 43, 825}, + /* 682 : SHR rm32,imm8 [mi: evex.nd0.nf.l0.m4.o32 c1 /5 ib,u ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(c1) 205 025 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1949, 68, 825}, + /* 683 : SHR reg64?,rm64,imm8 [vmi: evex.nd1.nf.l0.m4.o64 c1 /5 ib,u ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(c1) 215 026 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 3, {REG_GPR|BITS64,RM_GPR|BITS64,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+1971, 43, 826}, + /* 684 : SHR rm64,imm8 [mi: evex.nd0.nf.l0.m4.o64 c1 /5 ib,u ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(c1) 205 025 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SHR, 2, {RM_GPR|BITS64,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+1982, 68, 826}, + /* 685 : SAR reg8?,rm8,unity [vm-: evex.nd1.nf.l0.m4.o8 d0 /7 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d0) 217 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 3, {REG_GPR|BITS8,RM_GPR|BITS8,UNITY|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+24034, 37, 827}, + /* 686 : SAR rm8,unity [m-: evex.nd0.nf.l0.m4.o8 d0 /7 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(d0) 207 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 2, {RM_GPR|BITS8,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+24043, 64, 827}, + /* 687 : SAR reg16?,rm16,unity [vm-: evex.nd1.nf.l0.m4.o16 d1 /7 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d1) 217 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 3, {REG_GPR|BITS16,RM_GPR|BITS16,UNITY|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+11923, 40, 828}, + /* 688 : SAR rm16,unity [m-: evex.nd0.nf.l0.m4.o16 d1 /7 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(d1) 207 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 2, {RM_GPR|BITS16,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11933, 66, 828}, + /* 689 : SAR reg32?,rm32,unity [vm-: evex.nd1.nf.l0.m4.o32 d1 /7 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d1) 217 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 3, {REG_GPR|BITS32,RM_GPR|BITS32,UNITY|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+11953, 43, 829}, + /* 690 : SAR rm32,unity [m-: evex.nd0.nf.l0.m4.o32 d1 /7 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(d1) 207 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 2, {RM_GPR|BITS32,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11963, 68, 829}, + /* 691 : SAR reg64?,rm64,unity [vm-: evex.nd1.nf.l0.m4.o64 d1 /7 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d1) 217 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 3, {REG_GPR|BITS64,RM_GPR|BITS64,UNITY|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+11983, 43, 830}, + /* 692 : SAR rm64,unity [m-: evex.nd0.nf.l0.m4.o64 d1 /7 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(d1) 207 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 2, {RM_GPR|BITS64,UNITY|IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+11993, 68, 830}, + /* 693 : SAR reg8?,rm8,reg_cl [vm-: evex.nd1.nf.l0.m4.o8 d2 /7 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(d2) 217 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 3, {REG_GPR|BITS8,RM_GPR|BITS8,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+24061, 37, 831}, + /* 694 : SAR rm8,reg_cl [m-: evex.nd0.nf.l0.m4.o8 d2 /7 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(d2) 207 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+24070, 64, 831}, + /* 695 : SAR reg16?,rm16,reg_cl [vm-: evex.nd1.nf.l0.m4.o16 d3 /7 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(d3) 217 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 3, {REG_GPR|BITS16,RM_GPR|BITS16,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+12013, 40, 832}, + /* 696 : SAR rm16,reg_cl [m-: evex.nd0.nf.l0.m4.o16 d3 /7 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(d3) 207 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+12023, 66, 832}, + /* 697 : SAR reg32?,rm32,reg_cl [vm-: evex.nd1.nf.l0.m4.o32 d3 /7 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(d3) 217 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+12043, 43, 833}, + /* 698 : SAR rm32,reg_cl [m-: evex.nd0.nf.l0.m4.o32 d3 /7 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(d3) 207 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+12053, 68, 833}, + /* 699 : SAR reg64?,rm64,reg_cl [vm-: evex.nd1.nf.l0.m4.o64 d3 /7 ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(d3) 217 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+12073, 43, 834}, + /* 700 : SAR rm64,reg_cl [m-: evex.nd0.nf.l0.m4.o64 d3 /7 ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(d3) 207 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, NO_DECORATOR, nasm_bytecodes+12083, 68, 834}, + /* 701 : SAR reg8?,rm8,imm8 [vmi: evex.nd1.nf.l0.m4.o8 c0 /7 ib,u ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(c0) 217 026 : SM0,SM1,NF,NF_E,ZU,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 3, {REG_GPR|BITS8,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+12103, 37, 847}, + /* 702 : SAR rm8,imm8 [mi: evex.nd0.nf.l0.m4.o8 c0 /7 ib,u ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(c0) 207 025 : SM0,NF,NF_E,WIG,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 2, {RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+12113, 64, 847}, + /* 703 : SAR reg16?,rm16,imm8 [vmi: evex.nd1.nf.l0.m4.o16 c1 /7 ib,u ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(c1) 217 026 : SM0,SM1,NF,NF_E,ZU,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 3, {REG_GPR|BITS16,RM_GPR|BITS16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+2004, 40, 848}, + /* 704 : SAR rm16,imm8 [mi: evex.nd0.nf.l0.m4.o16 c1 /7 ib,u ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(c1) 207 025 : SM0,NF,NF_E,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+2015, 66, 848}, + /* 705 : SAR reg32?,rm32,imm8 [vmi: evex.nd1.nf.l0.m4.o32 c1 /7 ib,u ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(c1) 217 026 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 3, {REG_GPR|BITS32,RM_GPR|BITS32,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+2037, 43, 849}, + /* 706 : SAR rm32,imm8 [mi: evex.nd0.nf.l0.m4.o32 c1 /7 ib,u ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(c1) 207 025 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+2048, 68, 849}, + /* 707 : SAR reg64?,rm64,imm8 [vmi: evex.nd1.nf.l0.m4.o64 c1 /7 ib,u ] SM0,SM1,NF,ZU,LONG,FL,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(c1) 217 026 : SM0,SM1,NF,NF_E,ZU,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 3, {REG_GPR|BITS64,RM_GPR|BITS64,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+2070, 43, 850}, + /* 708 : SAR rm64,imm8 [mi: evex.nd0.nf.l0.m4.o64 c1 /7 ib,u ] SM0,NF,LONG,FL,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(c1) 207 025 : SM0,NF,NF_E,WW,LONG,FL,EVEX,PROT,APX,X86_64 */ + {I_SAR, 2, {RM_GPR|BITS64,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+2081, 68, 850}, + /* 709 : RORX reg32,rm32,imm8 [rmi: evex.lz.f2.0f3a.w0 f0 /r ib ] SM0-1,LONG,PROT,BMI2,APX,X86_64 */ + /* 250(f3 7f 08) 300 001(f0) 110 022 : SM0,SM1,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_RORX, 3, {REG_GPR|BITS32,RM_GPR|BITS32,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+12133, 70, 851}, + /* 710 : SHLX reg32,rm32*,reg32 [rmv: evex.lz.66.0f38.w0 f7 /r ] SM0,SM1,LONG,PROT,BMI2,APX,X86_64 */ + /* 242(f2 7d 08) 300 001(f7) 110 : SM0,SM1,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SHLX, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+24088, 70, 861}, + /* 711 : SARX reg32,rm32*,reg32 [rmv: evex.lz.f3.0f38.w0 f7 /r ] SM0,SM1,LONG,PROT,BMI2,APX,X86_64 */ + /* 242(f2 7e 08) 300 001(f7) 110 : SM0,SM1,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SARX, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+24106, 70, 863}, + /* 712 : SHRX reg32,rm32*,reg32 [rmv: evex.lz.f2.0f38.w0 f7 /r ] SM0,SM1,LONG,PROT,BMI2,APX,X86_64 */ + /* 242(f2 7f 08) 300 001(f7) 110 : SM0,SM1,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SHRX, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+24124, 70, 864}, + /* 713 : RORX reg64,rm64,imm8 [rmi: evex.lz.f2.0f3a.w1 f0 /r ib ] SM0-1,LONG,PROT,BMI2,APX,X86_64 */ + /* 250(f3 ff 08) 300 001(f0) 110 022 : SM0,SM1,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_RORX, 3, {REG_GPR|BITS64,RM_GPR|BITS64,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+12143, 70, 869}, + /* 714 : SHLX reg64,rm64*,reg64 [rmv: evex.lz.66.0f38.w1 f7 /r ] SM0,SM1,LONG,PROT,BMI2,APX,X86_64 */ + /* 242(f2 fd 08) 300 001(f7) 110 : SM0,SM1,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SHLX, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+24142, 70, 883}, + /* 715 : SARX reg64,rm64*,reg64 [rmv: evex.lz.f3.0f38.w1 f7 /r ] SM0,SM1,LONG,PROT,BMI2,APX,X86_64 */ + /* 242(f2 fe 08) 300 001(f7) 110 : SM0,SM1,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SARX, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+24160, 70, 885}, + /* 716 : SHRX reg64,rm64*,reg64 [rmv: evex.lz.f2.0f38.w1 f7 /r ] SM0,SM1,LONG,PROT,BMI2,APX,X86_64 */ + /* 242(f2 ff 08) 300 001(f7) 110 : SM0,SM1,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_SHRX, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+24178, 70, 886}, + /* 717 : INC reg16 [r: o16 40+r ] NOREX,NOAPX,NOLONG,FL,8086 */ + /* 320 010 100 : NOREX,NOAPX,NOLONG,FL,8086 */ + {I_INC, 1, {REG_GPR|BITS16|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72640, 74, 925}, + /* 718 : INC reg32 [r: o32 40+r ] NOREX,NOAPX,NOLONG,FL,386 */ + /* 321 010 100 : NOREX,NOAPX,NOLONG,FL,386 */ + {I_INC, 1, {REG_GPR|BITS32|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72644, 75, 926}, + /* 719 : INC rm8 [m: hle o8 fe /0 ] LOCK,FL,8086 */ + /* 273 001(fe) 200 : LOCK,FL,8086 */ + {I_INC, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71614, 76, 927}, + /* 720 : INC rm16 [m: hle o16 ff /0 ] LOCK,FL,8086 */ + /* 273 320 001(ff) 200 : LOCK,FL,8086 */ + {I_INC, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+66657, 76, 928}, + /* 721 : INC rm32 [m: hle o32 ff /0 ] LOCK,FL,386 */ + /* 273 321 001(ff) 200 : LOCK,FL,386 */ + {I_INC, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+66663, 77, 929}, + /* 722 : INC rm64 [m: hle o64 ff /0 ] LOCK,LONG,FL,PROT,X86_64 */ + /* 273 324 001(ff) 200 : LOCK,LONG,FL,PROT,X86_64 */ + {I_INC, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+66669, 78, 930}, + /* 723 : INC reg8?,rm8 [vm: evex.nf.nd1.l0.m4.o8 fe /0 ] NF,ZU,LOCK,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(fe) 210 : NF,NF_E,ZU,WIG,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_INC, 2, {REG_GPR|BITS8,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+24196, 79, 931}, + /* 724 : INC rm8 [m: evex.nf.nd0.l0.m4.o8 fe /0 ] NF,LOCK,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(fe) 200 : NF,NF_E,WIG,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_INC, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+24205, 80, 931}, + /* 725 : INC reg16?,rm16 [vm: evex.nf.nd1.l0.m4.o16 ff /0 ] NF,ZU,LOCK,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(ff) 210 : NF,NF_E,ZU,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_INC, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+12153, 81, 932}, + /* 726 : INC rm16 [m: evex.nf.nd0.l0.m4.o16 ff /0 ] NF,LOCK,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(ff) 200 : NF,NF_E,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_INC, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12163, 82, 932}, + /* 727 : INC reg32?,rm32 [vm: evex.nf.nd1.l0.m4.o32 ff /0 ] NF,ZU,LOCK,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(ff) 210 : NF,NF_E,ZU,WW,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_INC, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+12183, 83, 933}, + /* 728 : INC rm32 [m: evex.nf.nd0.l0.m4.o32 ff /0 ] NF,LOCK,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(ff) 200 : NF,NF_E,WW,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_INC, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12193, 84, 933}, + /* 729 : INC reg64?,rm64 [vm: evex.nf.nd1.l0.m4.o64 ff /0 ] NF,ZU,LOCK,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(ff) 210 : NF,NF_E,ZU,WW,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_INC, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+12213, 83, 934}, + /* 730 : INC rm64 [m: evex.nf.nd0.l0.m4.o64 ff /0 ] NF,LOCK,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(ff) 200 : NF,NF_E,WW,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_INC, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12223, 84, 934}, + /* 731 : DEC reg16 [r: o16 48+r ] NOREX,NOAPX,NOLONG,FL,8086 */ + /* 320 010 110 : NOREX,NOAPX,NOLONG,FL,8086 */ + {I_DEC, 1, {REG_GPR|BITS16|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72648, 74, 935}, + /* 732 : DEC reg32 [r: o32 48+r ] NOREX,NOAPX,NOLONG,FL,386 */ + /* 321 010 110 : NOREX,NOAPX,NOLONG,FL,386 */ + {I_DEC, 1, {REG_GPR|BITS32|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72652, 75, 936}, + /* 733 : DEC rm8 [m: hle o8 fe /1 ] LOCK,FL,8086 */ + /* 273 001(fe) 201 : LOCK,FL,8086 */ + {I_DEC, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71619, 76, 937}, + /* 734 : DEC rm16 [m: hle o16 ff /1 ] LOCK,FL,8086 */ + /* 273 320 001(ff) 201 : LOCK,FL,8086 */ + {I_DEC, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+66675, 76, 938}, + /* 735 : DEC rm32 [m: hle o32 ff /1 ] LOCK,FL,386 */ + /* 273 321 001(ff) 201 : LOCK,FL,386 */ + {I_DEC, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+66681, 77, 939}, + /* 736 : DEC rm64 [m: hle o64 ff /1 ] LOCK,LONG,FL,PROT,X86_64 */ + /* 273 324 001(ff) 201 : LOCK,LONG,FL,PROT,X86_64 */ + {I_DEC, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+66687, 78, 940}, + /* 737 : DEC reg8?,rm8 [vm: evex.nf.nd1.l0.m4.o8 fe /1 ] NF,ZU,LOCK,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(fe) 211 : NF,NF_E,ZU,WIG,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_DEC, 2, {REG_GPR|BITS8,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+24223, 79, 941}, + /* 738 : DEC rm8 [m: evex.nf.nd0.l0.m4.o8 fe /1 ] NF,LOCK,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(fe) 201 : NF,NF_E,WIG,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_DEC, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+24232, 80, 941}, + /* 739 : DEC reg16?,rm16 [vm: evex.nf.nd1.l0.m4.o16 ff /1 ] NF,ZU,LOCK,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(ff) 211 : NF,NF_E,ZU,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_DEC, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+12243, 81, 942}, + /* 740 : DEC rm16 [m: evex.nf.nd0.l0.m4.o16 ff /1 ] NF,LOCK,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(ff) 201 : NF,NF_E,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_DEC, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12253, 82, 942}, + /* 741 : DEC reg32?,rm32 [vm: evex.nf.nd1.l0.m4.o32 ff /1 ] NF,ZU,LOCK,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(ff) 211 : NF,NF_E,ZU,WW,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_DEC, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+12273, 83, 943}, + /* 742 : DEC rm32 [m: evex.nf.nd0.l0.m4.o32 ff /1 ] NF,LOCK,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(ff) 201 : NF,NF_E,WW,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_DEC, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12283, 84, 943}, + /* 743 : DEC reg64?,rm64 [vm: evex.nf.nd1.l0.m4.o64 ff /1 ] NF,ZU,LOCK,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(ff) 211 : NF,NF_E,ZU,WW,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_DEC, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+12303, 83, 944}, + /* 744 : DEC rm64 [m: evex.nf.nd0.l0.m4.o64 ff /1 ] NF,LOCK,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(ff) 201 : NF,NF_E,WW,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_DEC, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12313, 84, 944}, + /* 745 : IMUL rm8 [m: o8 f6 /5 ] FL,8086 */ + /* 001(f6) 205 : FL,8086 */ + {I_IMUL, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+24255, 56, 946}, + /* 746 : IMUL rm16 [m: o16 f7 /5 ] FL,8086 */ + /* 320 001(f7) 205 : FL,8086 */ + {I_IMUL, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12338, 56, 947}, + /* 747 : IMUL rm32 [m: o32 f7 /5 ] FL,386 */ + /* 321 001(f7) 205 : FL,386 */ + {I_IMUL, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12348, 57, 948}, + /* 748 : IMUL rm64 [m: o64 f7 /5 ] LONG,FL,PROT,X86_64 */ + /* 324 001(f7) 205 : LONG,FL,PROT,X86_64 */ + {I_IMUL, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12358, 58, 949}, + /* 749 : IMUL rm8 [m: evex.nf.nd0.l0.m4.o8 f6 /5 ] SM0,NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(f6) 205 : SM0,NF,NF_E,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_IMUL, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+24250, 85, 950}, + /* 750 : IMUL rm16 [m: evex.nf.nd0.l0.m4.o16 f7 /5 ] SM0,NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(f7) 205 : SM0,NF,NF_E,LONG,EVEX,PROT,APX,X86_64 */ + {I_IMUL, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12333, 86, 951}, + /* 751 : IMUL rm32 [m: evex.nf.nd0.l0.m4.o32 f7 /5 ] SM0,NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(f7) 205 : SM0,NF,NF_E,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_IMUL, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12343, 87, 952}, + /* 752 : IMUL rm64 [m: evex.nf.nd0.l0.m4.o64 f7 /5 ] SM0,NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(f7) 205 : SM0,NF,NF_E,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_IMUL, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12353, 87, 953}, + /* 753 : IMUL reg16,rm16 [rm: o16 0f af /r ] SM0-1,FL,386 */ + /* 320 355 001(af) 110 : SM0,SM1,FL,386 */ + {I_IMUL, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66693, 29, 954}, + /* 754 : IMUL reg32,rm32 [rm: o32 0f af /r ] SM0-1,FL,386 */ + /* 321 355 001(af) 110 : SM0,SM1,FL,386 */ + {I_IMUL, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+66699, 29, 955}, + /* 755 : IMUL reg64,rm64 [rm: o64 0f af /r ] SM0-1,LONG,FL,PROT,X86_64 */ + /* 324 355 001(af) 110 : SM0,SM1,LONG,FL,PROT,X86_64 */ + {I_IMUL, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+66705, 30, 956}, + /* 756 : IMUL reg16,rm16*,sbyteword16 [rmi: o16 6b /r ib,s ] SM0,SM1,SM2,FL,186 */ + /* 320 001(6b) 110 276 : SM0,SM1,SM2,FL,186 */ + {I_IMUL, 3, {REG_GPR|BITS16,RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2108, 88, 957}, + /* 757 : IMUL reg32,rm32*,sbytedword32 [rmi: o32 6b /r ib,s ] SM0,SM1,SM2,FL,386 */ + /* 321 001(6b) 110 276 : SM0,SM1,SM2,FL,386 */ + {I_IMUL, 3, {REG_GPR|BITS32,RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2119, 90, 958}, + /* 758 : IMUL reg64,rm64*,sbytedword64 [rmi: o64 6b /r ib,s ] SM0,SM1,SM2,LONG,FL,PROT,X86_64 */ + /* 324 001(6b) 110 276 : SM0,SM1,SM2,LONG,FL,PROT,X86_64 */ + {I_IMUL, 3, {REG_GPR|BITS64,RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2130, 91, 959}, + /* 759 : IMUL reg16,rm16*,imm16 [rmi: o16 69 /r iw ] SM0,SM1,SM2,FL,186 */ + /* 320 001(69) 110 032 : SM0,SM1,SM2,FL,186 */ + {I_IMUL, 3, {REG_GPR|BITS16,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+2141, 88, 960}, + /* 760 : IMUL reg32,rm32*,imm32 [rmi: o32 69 /r id ] SM0,SM1,SM2,FL,386 */ + /* 321 001(69) 110 042 : SM0,SM1,SM2,FL,386 */ + {I_IMUL, 3, {REG_GPR|BITS32,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+2152, 90, 961}, + /* 761 : IMUL reg64,rm64*,sdword64 [rmi: o64 69 /r id,s ] SM0,SM1,SM2,LONG,FL,PROT,X86_64 */ + /* 324 001(69) 110 256 : SM0,SM1,SM2,LONG,FL,PROT,X86_64 */ + {I_IMUL, 3, {REG_GPR|BITS64,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2163, 91, 962}, + /* 762 : IMUL reg16?,reg16,rm16 [vrm: evex.nf.nd1.l0.m4.o16 af /r ] SM0,SM1,SM2,NF,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(af) 121 : SM0,SM1,SM2,NF,NF_E,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_IMUL, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+12363, 92, 963}, + /* 763 : IMUL reg16,rm16 [rm: evex.nf.nd0.l0.m4.o16 af /r ] SM0,SM1,NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(af) 110 : SM0,SM1,NF,NF_E,LONG,EVEX,PROT,APX,X86_64 */ + {I_IMUL, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+12373, 93, 963}, + /* 764 : IMUL reg32?,reg32,rm32 [vrm: evex.nf.nd1.l0.m4.o32 af /r ] SM0,SM1,SM2,NF,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(af) 121 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_IMUL, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+12393, 95, 964}, + /* 765 : IMUL reg32,rm32 [rm: evex.nf.nd0.l0.m4.o32 af /r ] SM0,SM1,NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(af) 110 : SM0,SM1,NF,NF_E,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_IMUL, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+12403, 96, 964}, + /* 766 : IMUL reg64?,reg64,rm64 [vrm: evex.nf.nd1.l0.m4.o64 af /r ] SM0,SM1,SM2,NF,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(af) 121 : SM0,SM1,SM2,NF,NF_E,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_IMUL, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+12423, 95, 965}, + /* 767 : IMUL reg64,rm64 [rm: evex.nf.nd0.l0.m4.o64 af /r ] SM0,SM1,NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(af) 110 : SM0,SM1,NF,NF_E,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_IMUL, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+12433, 96, 965}, + /* 768 : IMUL reg16,rm16,sbyteword16 [rmi: evex.nf.zu.l0.m4.o16 6b /r ib,s ] SM0-2,NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(6b) 110 276 : SM0,SM1,SM2,NF,NF_E,ZU,ZU_E,LONG,EVEX,PROT,APX,X86_64 */ + {I_IMUL, 3, {REG_GPR|BITS16,RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2103, 98, 966}, + /* 769 : IMUL reg32,rm32,sbytedword32 [rmi: evex.nf.zu.l0.m4.o32 6b /r ib,s ] SM0-2,NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(6b) 110 276 : SM0,SM1,SM2,NF,NF_E,ZU,ZU_E,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_IMUL, 3, {REG_GPR|BITS32,RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2114, 99, 967}, + /* 770 : IMUL reg64,rm64,sbytedword64 [rmi: evex.nf.zu.l0.m4.o64 6b /r ib,s ] SM0-2,NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(6b) 110 276 : SM0,SM1,SM2,NF,NF_E,ZU,ZU_E,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_IMUL, 3, {REG_GPR|BITS64,RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2125, 99, 968}, + /* 771 : IMUL reg16,rm16,imm16 [rmi: evex.nf.zu.l0.m4.o16 69 /r iw ] SM0-2,NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(69) 110 032 : SM0,SM1,SM2,NF,NF_E,ZU,ZU_E,LONG,EVEX,PROT,APX,X86_64 */ + {I_IMUL, 3, {REG_GPR|BITS16,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+2136, 98, 969}, + /* 772 : IMUL reg32,rm32,imm32 [rmi: evex.nf.zu.l0.m4.o32 69 /r id ] SM0-2,NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(69) 110 042 : SM0,SM1,SM2,NF,NF_E,ZU,ZU_E,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_IMUL, 3, {REG_GPR|BITS32,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+2147, 99, 970}, + /* 773 : IMUL reg64,rm64,sdword64 [rmi: evex.nf.zu.l0.m4.o64 69 /r id,s ] SM0-2,NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(69) 110 256 : SM0,SM1,SM2,NF,NF_E,ZU,ZU_E,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_IMUL, 3, {REG_GPR|BITS64,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2158, 99, 971}, + /* 774 : MUL rm8 [m: o8 f6 /4 ] FL,8086 */ + /* 001(f6) 204 : FL,8086 */ + {I_MUL, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+24300, 56, 973}, + /* 775 : MUL rm16 [m: o16 f7 /4 ] FL,8086 */ + /* 320 001(f7) 204 : FL,8086 */ + {I_MUL, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12458, 56, 974}, + /* 776 : MUL rm32 [m: o32 f7 /4 ] FL,386 */ + /* 321 001(f7) 204 : FL,386 */ + {I_MUL, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12468, 57, 975}, + /* 777 : MUL rm64 [m: o64 f7 /4 ] LONG,FL,PROT,X86_64 */ + /* 324 001(f7) 204 : LONG,FL,PROT,X86_64 */ + {I_MUL, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12478, 58, 976}, + /* 778 : MULX reg32,reg32*,rm32 [rvm: vex.ndd.lz.f2.0f38.w0 f6 /r ] BMI2,FUTURE */ + /* 261(002 003) 001(f6) 120 : NOAPX,VEX,BMI2,FUTURE */ + {I_MULX, 3, {REG_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55313, 100, 977}, + /* 779 : MULX reg32,reg32*,rm32 [rvm: evex.ndd.lz.f2.0f38.w0 f6 /r ] BMI2,FUTURE,APX */ + /* 241(f2 7f 08) 300 001(f6) 120 : LONG,EVEX,PROT,BMI2,APX,FUTURE */ + {I_MULX, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+24259, 101, 977}, + /* 780 : MULX reg64,reg64*,rm64 [rvm: vex.ndd.lz.f2.0f38.w1 f6 /r ] LONG,PROT,BMI2,X86_64 */ + /* 261(002 203) 001(f6) 120 : NOAPX,LONG,VEX,PROT,BMI2,X86_64 */ + {I_MULX, 3, {REG_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55327, 102, 978}, + /* 781 : MULX reg64,reg64*,rm64 [rvm: evex.ndd.lz.f2.0f38.w1 f6 /r ] LONG,PROT,BMI2,X86_64,APX */ + /* 241(f2 ff 08) 300 001(f6) 120 : LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_MULX, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+24277, 103, 978}, + /* 782 : MUL rm8 [m: evex.nf.nd0.l0.m4.o8 f6 /4 ] SM0,NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(f6) 204 : SM0,NF,NF_E,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_MUL, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+24295, 85, 981}, + /* 783 : MUL rm16 [m: evex.nf.nd0.l0.m4.o16 f7 /4 ] SM0,NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(f7) 204 : SM0,NF,NF_E,LONG,EVEX,PROT,APX,X86_64 */ + {I_MUL, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12453, 86, 982}, + /* 784 : MUL rm32 [m: evex.nf.nd0.l0.m4.o32 f7 /4 ] SM0,NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(f7) 204 : SM0,NF,NF_E,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_MUL, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12463, 87, 983}, + /* 785 : MUL rm64 [m: evex.nf.nd0.l0.m4.o64 f7 /4 ] SM0,NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(f7) 204 : SM0,NF,NF_E,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_MUL, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12473, 87, 984}, + /* 786 : IDIV rm8 [m: o8 f6 /7 ] FL,8086 */ + /* 001(f6) 207 : FL,8086 */ + {I_IDIV, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+24309, 56, 1006}, + /* 787 : IDIV rm16 [m: o16 f7 /7 ] FL,8086 */ + /* 320 001(f7) 207 : FL,8086 */ + {I_IDIV, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12488, 56, 1007}, + /* 788 : IDIV rm32 [m: o32 f7 /7 ] FL,386 */ + /* 321 001(f7) 207 : FL,386 */ + {I_IDIV, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12498, 57, 1008}, + /* 789 : IDIV rm64 [m: o64 f7 /7 ] LONG,FL,PROT,X86_64 */ + /* 324 001(f7) 207 : LONG,FL,PROT,X86_64 */ + {I_IDIV, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12508, 58, 1009}, + /* 790 : IDIV rm8 [m: evex.nf.nd0.l0.m4.o8 f6 /7 ] NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(f6) 207 : NF,NF_E,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_IDIV, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+24304, 106, 1010}, + /* 791 : IDIV rm16 [m: evex.nf.nd0.l0.m4.o16 f7 /7 ] NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(f7) 207 : NF,NF_E,LONG,EVEX,PROT,APX,X86_64 */ + {I_IDIV, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12483, 107, 1011}, + /* 792 : IDIV rm32 [m: evex.nf.nd0.l0.m4.o32 f7 /7 ] NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(f7) 207 : NF,NF_E,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_IDIV, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12493, 108, 1012}, + /* 793 : IDIV rm64 [m: evex.nf.nd0.l0.m4.o64 f7 /7 ] NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(f7) 207 : NF,NF_E,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_IDIV, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12503, 108, 1013}, + /* 794 : DIV rm8 [m: o8 f6 /6 ] FL,8086 */ + /* 001(f6) 206 : FL,8086 */ + {I_DIV, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+24318, 56, 1014}, + /* 795 : DIV rm16 [m: o16 f7 /6 ] FL,8086 */ + /* 320 001(f7) 206 : FL,8086 */ + {I_DIV, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12518, 56, 1015}, + /* 796 : DIV rm32 [m: o32 f7 /6 ] FL,386 */ + /* 321 001(f7) 206 : FL,386 */ + {I_DIV, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12528, 57, 1016}, + /* 797 : DIV rm64 [m: o64 f7 /6 ] LONG,FL,PROT,X86_64 */ + /* 324 001(f7) 206 : LONG,FL,PROT,X86_64 */ + {I_DIV, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12538, 58, 1017}, + /* 798 : DIV rm8 [m: evex.nf.nd0.l0.m4.o8 f6 /6 ] NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(f6) 206 : NF,NF_E,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_DIV, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+24313, 106, 1018}, + /* 799 : DIV rm16 [m: evex.nf.nd0.l0.m4.o16 f7 /6 ] NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(f7) 206 : NF,NF_E,LONG,EVEX,PROT,APX,X86_64 */ + {I_DIV, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12513, 107, 1019}, + /* 800 : DIV rm32 [m: evex.nf.nd0.l0.m4.o32 f7 /6 ] NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(f7) 206 : NF,NF_E,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_DIV, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12523, 108, 1020}, + /* 801 : DIV rm64 [m: evex.nf.nd0.l0.m4.o64 f7 /6 ] NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(f7) 206 : NF,NF_E,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_DIV, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12533, 108, 1021}, + /* 802 : NEG rm8 [m: hle o8 f6 /3 ] LOCK,FL,8086 */ + /* 273 001(f6) 203 : LOCK,FL,8086 */ + {I_NEG, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71624, 76, 1023}, + /* 803 : NEG rm16 [m: hle o16 f7 /3 ] LOCK,FL,8086 */ + /* 273 320 001(f7) 203 : LOCK,FL,8086 */ + {I_NEG, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+66747, 76, 1024}, + /* 804 : NEG rm32 [m: hle o32 f7 /3 ] LOCK,FL,386 */ + /* 273 321 001(f7) 203 : LOCK,FL,386 */ + {I_NEG, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+66753, 77, 1025}, + /* 805 : NEG rm64 [m: hle o64 f7 /3 ] LOCK,LONG,FL,PROT,X86_64 */ + /* 273 324 001(f7) 203 : LOCK,LONG,FL,PROT,X86_64 */ + {I_NEG, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+66759, 78, 1026}, + /* 806 : NEG reg8?,rm8 [vm: evex.nf.nd1.l0.m4.o8 f6 /3 ] NF,ZU,LOCK,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(f6) 213 : NF,NF_E,ZU,WIG,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_NEG, 2, {REG_GPR|BITS8,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+24322, 79, 1027}, + /* 807 : NEG rm8 [m: evex.nf.nd0.l0.m4.o8 f6 /3 ] NF,LOCK,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(f6) 203 : NF,NF_E,WIG,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_NEG, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+24331, 80, 1027}, + /* 808 : NEG reg16?,rm16 [vm: evex.nf.nd1.l0.m4.o16 f7 /3 ] NF,ZU,LOCK,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(f7) 213 : NF,NF_E,ZU,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_NEG, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+12543, 81, 1028}, + /* 809 : NEG rm16 [m: evex.nf.nd0.l0.m4.o16 f7 /3 ] NF,LOCK,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(f7) 203 : NF,NF_E,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_NEG, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12553, 82, 1028}, + /* 810 : NEG reg32?,rm32 [vm: evex.nf.nd1.l0.m4.o32 f7 /3 ] NF,ZU,LOCK,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(f7) 213 : NF,NF_E,ZU,WW,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_NEG, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+12573, 83, 1029}, + /* 811 : NEG rm32 [m: evex.nf.nd0.l0.m4.o32 f7 /3 ] NF,LOCK,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(f7) 203 : NF,NF_E,WW,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_NEG, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12583, 84, 1029}, + /* 812 : NEG reg64?,rm64 [vm: evex.nf.nd1.l0.m4.o64 f7 /3 ] NF,ZU,LOCK,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(f7) 213 : NF,NF_E,ZU,WW,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_NEG, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+12603, 83, 1030}, + /* 813 : NEG rm64 [m: evex.nf.nd0.l0.m4.o64 f7 /3 ] NF,LOCK,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(f7) 203 : NF,NF_E,WW,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_NEG, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12613, 84, 1030}, + /* 814 : NOT rm8 [m: hle o8 f6 /2 ] LOCK,8086 */ + /* 273 001(f6) 202 : LOCK,8086 */ + {I_NOT, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71629, 109, 1031}, + /* 815 : NOT rm16 [m: hle o16 f7 /2 ] LOCK,8086 */ + /* 273 320 001(f7) 202 : LOCK,8086 */ + {I_NOT, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+66765, 109, 1032}, + /* 816 : NOT rm32 [m: hle o32 f7 /2 ] LOCK,386 */ + /* 273 321 001(f7) 202 : LOCK,386 */ + {I_NOT, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+66771, 110, 1033}, + /* 817 : NOT rm64 [m: hle o64 f7 /2 ] LOCK,LONG,PROT,X86_64 */ + /* 273 324 001(f7) 202 : LOCK,LONG,PROT,X86_64 */ + {I_NOT, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+66777, 111, 1034}, + /* 818 : NOT reg8?,rm8 [vm: evex.nf0.nd1.l0.m4.o8 f6 /2 ] ZU,LOCK,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 001(f6) 212 : ZU,WIG,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_NOT, 2, {REG_GPR|BITS8,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+24349, 112, 1035}, + /* 819 : NOT rm8 [m: evex.nf0.nd0.l0.m4.o8 f6 /2 ] LOCK,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(f6) 202 : WIG,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_NOT, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+24358, 113, 1035}, + /* 820 : NOT reg16?,rm16 [vm: evex.nf0.nd1.l0.m4.o16 f7 /2 ] ZU,LOCK,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(f7) 212 : ZU,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_NOT, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+12633, 114, 1036}, + /* 821 : NOT rm16 [m: evex.nf0.nd0.l0.m4.o16 f7 /2 ] LOCK,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(f7) 202 : LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_NOT, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12643, 115, 1036}, + /* 822 : NOT reg32?,rm32 [vm: evex.nf0.nd1.l0.m4.o32 f7 /2 ] ZU,LOCK,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(f7) 212 : ZU,WW,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_NOT, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+12663, 116, 1037}, + /* 823 : NOT rm32 [m: evex.nf0.nd0.l0.m4.o32 f7 /2 ] LOCK,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(f7) 202 : WW,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_NOT, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12673, 117, 1037}, + /* 824 : NOT reg64?,rm64 [vm: evex.nf0.nd1.l0.m4.o64 f7 /2 ] ZU,LOCK,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(f7) 212 : ZU,WW,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_NOT, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+12693, 116, 1038}, + /* 825 : NOT rm64 [m: evex.nf0.nd0.l0.m4.o64 f7 /2 ] LOCK,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(f7) 202 : WW,LOCK,LONG,EVEX,PROT,APX,X86_64 */ + {I_NOT, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+12703, 117, 1038}, + /* 826 : ADCX reg32,rm32 [rm: 66 w0 0f38 f6 /r ] ZU,FL,ADX,FUTURE */ + /* 361 317 356 001(f6) 110 : NOAPX,ZU,FL,ADX,FUTURE */ + {I_ADCX, 2, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55341, 118, 1041}, + /* 827 : ADCX reg64,rm64 [rm: 66 w1 0f38 f6 /r ] ZU,LONG,FL,PROT,ADX,X86_64 */ + /* 361 324 356 001(f6) 110 : NOAPX,ZU,LONG,FL,PROT,ADX,X86_64 */ + {I_ADCX, 2, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55348, 119, 1042}, + /* 828 : ADCX reg32?,reg32,rm32 [vrm: evex.nd1.l0.66.m4.w0 66 /r ] ZU,LONG,FL,PROT,APX,ADX,X86_64 */ + /* 240(f4 7d 18) 300 001(66) 121 : ZU,LONG,FL,EVEX,PROT,APX,ADX,X86_64 */ + {I_ADCX, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+24376, 120, 1043}, + /* 829 : ADCX reg32,rm32 [rm: evex.nd0.l0.66.m4.w0 66 /r ] ZU,LONG,FL,PROT,APX,ADX,X86_64 */ + /* 250(f4 7d 08) 300 001(66) 110 : ZU,LONG,FL,EVEX,PROT,APX,ADX,X86_64 */ + {I_ADCX, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+24385, 120, 1043}, + /* 830 : ADCX reg64?,reg64,rm64 [vrm: evex.nd1.l0.66.m4.w1 66 /r ] ZU,LONG,FL,PROT,APX,ADX,X86_64 */ + /* 240(f4 fd 18) 300 001(66) 121 : ZU,LONG,FL,EVEX,PROT,APX,ADX,X86_64 */ + {I_ADCX, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+24394, 120, 1044}, + /* 831 : ADCX reg64,rm64 [rm: evex.nd0.l0.66.m4.w1 66 /r ] ZU,LONG,FL,PROT,APX,ADX,X86_64 */ + /* 250(f4 fd 08) 300 001(66) 110 : ZU,LONG,FL,EVEX,PROT,APX,ADX,X86_64 */ + {I_ADCX, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+24403, 120, 1044}, + /* 832 : ADOX reg32,rm32 [rm: f3 !osp w0 0f38 f6 /r ] ZU,FL,ADX,FUTURE */ + /* 333 364 317 356 001(f6) 110 : NOAPX,ZU,FL,ADX,FUTURE */ + {I_ADOX, 2, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+51275, 118, 1045}, + /* 833 : ADOX reg64,rm64 [rm: f3 !osp w1 0f38 f6 /r ] ZU,LONG,FL,PROT,ADX,X86_64 */ + /* 333 364 324 356 001(f6) 110 : NOAPX,ZU,LONG,FL,PROT,ADX,X86_64 */ + {I_ADOX, 2, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+51283, 119, 1046}, + /* 834 : ADOX reg32?,reg32,rm32 [vrm: evex.nd1.l0.f3.m4.w0 66 /r ] ZU,LONG,FL,PROT,APX,ADX,X86_64 */ + /* 240(f4 7e 18) 300 001(66) 121 : ZU,LONG,FL,EVEX,PROT,APX,ADX,X86_64 */ + {I_ADOX, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+24412, 120, 1047}, + /* 835 : ADOX reg32,rm32 [rm: evex.nd0.l0.f3.m4.w0 66 /r ] ZU,LONG,FL,PROT,APX,ADX,X86_64 */ + /* 250(f4 7e 08) 300 001(66) 110 : ZU,LONG,FL,EVEX,PROT,APX,ADX,X86_64 */ + {I_ADOX, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+24421, 120, 1047}, + /* 836 : ADOX reg64?,reg64,rm64 [vrm: evex.nd1.l0.f3.m4.w1 66 /r ] ZU,LONG,FL,PROT,APX,ADX,X86_64 */ + /* 240(f4 fe 18) 300 001(66) 121 : ZU,LONG,FL,EVEX,PROT,APX,ADX,X86_64 */ + {I_ADOX, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+24430, 120, 1048}, + /* 837 : ADOX reg64,rm64 [rm: evex.nd0.l0.f3.m4.w1 66 /r ] ZU,LONG,FL,PROT,APX,ADX,X86_64 */ + /* 250(f4 fe 08) 300 001(66) 110 : ZU,LONG,FL,EVEX,PROT,APX,ADX,X86_64 */ + {I_ADOX, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+24439, 120, 1048}, + /* 838 : SHLD rm16,reg16,imm8 [mri: o16 0f a4 /r ib,u ] SM0-1,FL,386 */ + /* 320 355 001(a4) 101 026 : SM0,SM1,FL,386 */ + {I_SHLD, 3, {RM_GPR|BITS16,REG_GPR|BITS16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+55355, 29, 1051}, + /* 839 : SHLD rm32,reg32,imm8 [mri: o32 0f a4 /r ib,u ] SM0-1,FL,386 */ + /* 321 355 001(a4) 101 026 : SM0,SM1,FL,386 */ + {I_SHLD, 3, {RM_GPR|BITS32,REG_GPR|BITS32,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+55362, 29, 1052}, + /* 840 : SHLD rm64,reg64,imm8 [mri: o64 0f a4 /r ib,u ] SM0-1,LONG,FL,PROT,X86_64 */ + /* 324 355 001(a4) 101 026 : SM0,SM1,LONG,FL,PROT,X86_64 */ + {I_SHLD, 3, {RM_GPR|BITS64,REG_GPR|BITS64,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+55369, 30, 1053}, + /* 841 : SHLD rm16,reg16,reg_cl [mr-: o16 0f a5 /r ] SM0-1,FL,386 */ + /* 320 355 001(a5) 101 : SM0,SM1,FL,386 */ + {I_SHLD, 3, {RM_GPR|BITS16,REG_GPR|BITS16,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+66783, 29, 1054}, + /* 842 : SHLD rm32,reg32,reg_cl [mr-: o32 0f a5 /r ] SM0-1,FL,386 */ + /* 321 355 001(a5) 101 : SM0,SM1,FL,386 */ + {I_SHLD, 3, {RM_GPR|BITS32,REG_GPR|BITS32,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+66789, 29, 1055}, + /* 843 : SHLD rm64,reg64,reg_cl [mr-: o64 0f a5 /r ] SM0-1,LONG,FL,PROT,X86_64 */ + /* 324 355 001(a5) 101 : SM0,SM1,LONG,FL,PROT,X86_64 */ + {I_SHLD, 3, {RM_GPR|BITS64,REG_GPR|BITS64,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+66795, 30, 1056}, + /* 844 : SHLD reg16?,rm16,reg16,imm8 [vmri: evex.nd1.nf.l0.m4.o16 24 /r ib,u ] SM0,SM1,NF,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(24) 112 027 : SM0,SM1,NF,NF_E,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_SHLD, 4, {REG_GPR|BITS16,RM_GPR|BITS16,REG_GPR|BITS16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+2169, 94, 1057}, + /* 845 : SHLD rm16,reg16,imm8 [mri: evex.nd0.nf.l0.m4.o16 24 /r ib,u ] SM0,NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(24) 101 026 : SM0,NF,NF_E,LONG,EVEX,PROT,APX,X86_64 */ + {I_SHLD, 3, {RM_GPR|BITS16,REG_GPR|BITS16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+2180, 86, 1057}, + /* 846 : SHLD reg32?,rm32,reg32,imm8 [vmri: evex.nd1.nf.l0.m4.o32 24 /r ib,u ] SM0,SM1,NF,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(24) 112 027 : SM0,SM1,NF,NF_E,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_SHLD, 4, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS32,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+2202, 97, 1058}, + /* 847 : SHLD rm32,reg32,imm8 [mri: evex.nd0.nf.l0.m4.o32 24 /r ib,u ] SM0,NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(24) 101 026 : SM0,NF,NF_E,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_SHLD, 3, {RM_GPR|BITS32,REG_GPR|BITS32,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+2213, 87, 1058}, + /* 848 : SHLD reg64?,rm64,reg64,imm8 [vmri: evex.nd1.nf.l0.m4.o64 24 /r ib,u ] SM0,SM1,NF,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(24) 112 027 : SM0,SM1,NF,NF_E,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_SHLD, 4, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS64,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+2235, 97, 1059}, + /* 849 : SHLD rm64,reg64,imm8 [mri: evex.nd0.nf.l0.m4.o64 24 /r ib,u ] SM0,NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(24) 101 026 : SM0,NF,NF_E,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_SHLD, 3, {RM_GPR|BITS64,REG_GPR|BITS64,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+2246, 87, 1059}, + /* 850 : SHLD reg16?,rm16,reg16,reg_cl [vmr-: evex.nd1.nf.l0.m4.o16 a5 /r ] SM0,SM1,NF,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(a5) 112 : SM0,SM1,NF,NF_E,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_SHLD, 4, {REG_GPR|BITS16,RM_GPR|BITS16,REG_GPR|BITS16,REG_CL,0}, NO_DECORATOR, nasm_bytecodes+12723, 94, 1060}, + /* 851 : SHLD rm16,reg16,reg_cl [mr-: evex.nd0.nf.l0.m4.o16 a5 /r ] SM0,NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(a5) 101 : SM0,NF,NF_E,LONG,EVEX,PROT,APX,X86_64 */ + {I_SHLD, 3, {RM_GPR|BITS16,REG_GPR|BITS16,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+12733, 86, 1060}, + /* 852 : SHLD reg32?,rm32,reg32,reg_cl [vmr-: evex.nd1.nf.l0.m4.o32 a5 /r ] SM0,SM1,NF,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(a5) 112 : SM0,SM1,NF,NF_E,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_SHLD, 4, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS32,REG_CL,0}, NO_DECORATOR, nasm_bytecodes+12753, 97, 1061}, + /* 853 : SHLD rm32,reg32,reg_cl [mr-: evex.nd0.nf.l0.m4.o32 a5 /r ] SM0,NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(a5) 101 : SM0,NF,NF_E,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_SHLD, 3, {RM_GPR|BITS32,REG_GPR|BITS32,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+12763, 87, 1061}, + /* 854 : SHLD reg64?,rm64,reg64,reg_cl [vmr-: evex.nd1.nf.l0.m4.o64 a5 /r ] SM0,SM1,NF,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(a5) 112 : SM0,SM1,NF,NF_E,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_SHLD, 4, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS64,REG_CL,0}, NO_DECORATOR, nasm_bytecodes+12783, 97, 1062}, + /* 855 : SHLD rm64,reg64,reg_cl [mr-: evex.nd0.nf.l0.m4.o64 a5 /r ] SM0,NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(a5) 101 : SM0,NF,NF_E,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_SHLD, 3, {RM_GPR|BITS64,REG_GPR|BITS64,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+12793, 87, 1062}, + /* 856 : SHRD rm16,reg16,imm8 [mri: o16 0f ac /r ib,u ] SM0-1,FL,386 */ + /* 320 355 001(ac) 101 026 : SM0,SM1,FL,386 */ + {I_SHRD, 3, {RM_GPR|BITS16,REG_GPR|BITS16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+55376, 29, 1063}, + /* 857 : SHRD rm32,reg32,imm8 [mri: o32 0f ac /r ib,u ] SM0-1,FL,386 */ + /* 321 355 001(ac) 101 026 : SM0,SM1,FL,386 */ + {I_SHRD, 3, {RM_GPR|BITS32,REG_GPR|BITS32,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+55383, 29, 1064}, + /* 858 : SHRD rm64,reg64,imm8 [mri: o64 0f ac /r ib,u ] SM0-1,LONG,FL,PROT,X86_64 */ + /* 324 355 001(ac) 101 026 : SM0,SM1,LONG,FL,PROT,X86_64 */ + {I_SHRD, 3, {RM_GPR|BITS64,REG_GPR|BITS64,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+55390, 30, 1065}, + /* 859 : SHRD rm16,reg16,reg_cl [mr-: o16 0f ad /r ] SM0-1,FL,386 */ + /* 320 355 001(ad) 101 : SM0,SM1,FL,386 */ + {I_SHRD, 3, {RM_GPR|BITS16,REG_GPR|BITS16,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+66801, 29, 1066}, + /* 860 : SHRD rm32,reg32,reg_cl [mr-: o32 0f ad /r ] SM0-1,FL,386 */ + /* 321 355 001(ad) 101 : SM0,SM1,FL,386 */ + {I_SHRD, 3, {RM_GPR|BITS32,REG_GPR|BITS32,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+66807, 29, 1067}, + /* 861 : SHRD rm64,reg64,reg_cl [mr-: o64 0f ad /r ] SM0-1,LONG,FL,PROT,X86_64 */ + /* 324 355 001(ad) 101 : SM0,SM1,LONG,FL,PROT,X86_64 */ + {I_SHRD, 3, {RM_GPR|BITS64,REG_GPR|BITS64,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+66813, 30, 1068}, + /* 862 : SHRD reg16?,rm16,reg16,imm8 [vmri: evex.nd1.nf.l0.m4.o16 2c /r ib,u ] SM0,SM1,NF,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(2c) 112 027 : SM0,SM1,NF,NF_E,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_SHRD, 4, {REG_GPR|BITS16,RM_GPR|BITS16,REG_GPR|BITS16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+2268, 94, 1069}, + /* 863 : SHRD rm16,reg16,imm8 [mri: evex.nd0.nf.l0.m4.o16 2c /r ib,u ] SM0,NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(2c) 101 026 : SM0,NF,NF_E,LONG,EVEX,PROT,APX,X86_64 */ + {I_SHRD, 3, {RM_GPR|BITS16,REG_GPR|BITS16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+2279, 86, 1069}, + /* 864 : SHRD reg32?,rm32,reg32,imm8 [vmri: evex.nd1.nf.l0.m4.o32 2c /r ib,u ] SM0,SM1,NF,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(2c) 112 027 : SM0,SM1,NF,NF_E,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_SHRD, 4, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS32,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+2301, 97, 1070}, + /* 865 : SHRD rm32,reg32,imm8 [mri: evex.nd0.nf.l0.m4.o32 2c /r ib,u ] SM0,NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(2c) 101 026 : SM0,NF,NF_E,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_SHRD, 3, {RM_GPR|BITS32,REG_GPR|BITS32,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+2312, 87, 1070}, + /* 866 : SHRD reg64?,rm64,reg64,imm8 [vmri: evex.nd1.nf.l0.m4.o64 2c /r ib,u ] SM0,SM1,NF,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(2c) 112 027 : SM0,SM1,NF,NF_E,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_SHRD, 4, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS64,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+2334, 97, 1071}, + /* 867 : SHRD rm64,reg64,imm8 [mri: evex.nd0.nf.l0.m4.o64 2c /r ib,u ] SM0,NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(2c) 101 026 : SM0,NF,NF_E,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_SHRD, 3, {RM_GPR|BITS64,REG_GPR|BITS64,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+2345, 87, 1071}, + /* 868 : SHRD reg16?,rm16,reg16,reg_cl [vmr-: evex.nd1.nf.l0.m4.o16 ad /r ] SM0,SM1,NF,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(ad) 112 : SM0,SM1,NF,NF_E,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_SHRD, 4, {REG_GPR|BITS16,RM_GPR|BITS16,REG_GPR|BITS16,REG_CL,0}, NO_DECORATOR, nasm_bytecodes+12813, 94, 1072}, + /* 869 : SHRD rm16,reg16,reg_cl [mr-: evex.nd0.nf.l0.m4.o16 ad /r ] SM0,NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(ad) 101 : SM0,NF,NF_E,LONG,EVEX,PROT,APX,X86_64 */ + {I_SHRD, 3, {RM_GPR|BITS16,REG_GPR|BITS16,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+12823, 86, 1072}, + /* 870 : SHRD reg32?,rm32,reg32,reg_cl [vmr-: evex.nd1.nf.l0.m4.o32 ad /r ] SM0,SM1,NF,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(ad) 112 : SM0,SM1,NF,NF_E,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_SHRD, 4, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS32,REG_CL,0}, NO_DECORATOR, nasm_bytecodes+12843, 97, 1073}, + /* 871 : SHRD rm32,reg32,reg_cl [mr-: evex.nd0.nf.l0.m4.o32 ad /r ] SM0,NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(ad) 101 : SM0,NF,NF_E,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_SHRD, 3, {RM_GPR|BITS32,REG_GPR|BITS32,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+12853, 87, 1073}, + /* 872 : SHRD reg64?,rm64,reg64,reg_cl [vmr-: evex.nd1.nf.l0.m4.o64 ad /r ] SM0,SM1,NF,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(ad) 112 : SM0,SM1,NF,NF_E,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_SHRD, 4, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS64,REG_CL,0}, NO_DECORATOR, nasm_bytecodes+12873, 97, 1074}, + /* 873 : SHRD rm64,reg64,reg_cl [mr-: evex.nd0.nf.l0.m4.o64 ad /r ] SM0,NF,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(ad) 101 : SM0,NF,NF_E,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_SHRD, 3, {RM_GPR|BITS64,REG_GPR|BITS64,REG_CL,0,0}, NO_DECORATOR, nasm_bytecodes+12883, 87, 1074}, + /* 874 : BT rm16,reg16 [mr: o16 0f a3 /r ] SM0-1,FL,386 */ + /* 320 355 001(a3) 101 : SM0,SM1,FL,386 */ + {I_BT, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66819, 29, 1077}, + /* 875 : BT rm32,reg32 [mr: o32 0f a3 /r ] SM0-1,FL,386 */ + /* 321 355 001(a3) 101 : SM0,SM1,FL,386 */ + {I_BT, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+66825, 29, 1078}, + /* 876 : BT rm64,reg64 [mr: o64 0f a3 /r ] SM0-1,LONG,FL,PROT,X86_64 */ + /* 324 355 001(a3) 101 : SM0,SM1,LONG,FL,PROT,X86_64 */ + {I_BT, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+66831, 30, 1079}, + /* 877 : BT rm16,imm8 [mi: o16 0f ba /4 ib,u ] FL,386 */ + /* 320 355 001(ba) 204 025 : FL,386 */ + {I_BT, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+55397, 57, 1080}, + /* 878 : BT rm32,imm8 [mi: o32 0f ba /4 ib,u ] FL,386 */ + /* 321 355 001(ba) 204 025 : FL,386 */ + {I_BT, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+55404, 57, 1081}, + /* 879 : BT rm64,imm8 [mi: o64 0f ba /4 ib,u ] LONG,FL,PROT,X86_64 */ + /* 324 355 001(ba) 204 025 : LONG,FL,PROT,X86_64 */ + {I_BT, 2, {RM_GPR|BITS64,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+55411, 58, 1082}, + /* 880 : BTC rm16,reg16 [mr: o16 0f bb /r ] SM0-1,LOCK,FL,386 */ + /* 320 355 001(bb) 101 : SM0,SM1,LOCK,FL,386 */ + {I_BTC, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66837, 26, 1083}, + /* 881 : BTC rm32,reg32 [mr: o32 0f bb /r ] SM0-1,LOCK,FL,386 */ + /* 321 355 001(bb) 101 : SM0,SM1,LOCK,FL,386 */ + {I_BTC, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+66843, 26, 1084}, + /* 882 : BTC rm64,reg64 [mr: o64 0f bb /r ] SM0-1,LOCK,LONG,FL,PROT,X86_64 */ + /* 324 355 001(bb) 101 : SM0,SM1,LOCK,LONG,FL,PROT,X86_64 */ + {I_BTC, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+66849, 27, 1085}, + /* 883 : BTC rm16,imm8 [mi: o16 0f ba /7 ib,u ] LOCK,FL,386 */ + /* 320 355 001(ba) 207 025 : LOCK,FL,386 */ + {I_BTC, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+55418, 77, 1086}, + /* 884 : BTC rm32,imm8 [mi: o32 0f ba /7 ib,u ] LOCK,FL,386 */ + /* 321 355 001(ba) 207 025 : LOCK,FL,386 */ + {I_BTC, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+55425, 77, 1087}, + /* 885 : BTC rm64,imm8 [mi: o64 0f ba /7 ib,u ] LOCK,LONG,FL,PROT,X86_64 */ + /* 324 355 001(ba) 207 025 : LOCK,LONG,FL,PROT,X86_64 */ + {I_BTC, 2, {RM_GPR|BITS64,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+55432, 78, 1088}, + /* 886 : BTR rm16,reg16 [mr: o16 0f b3 /r ] SM0-1,LOCK,FL,386 */ + /* 320 355 001(b3) 101 : SM0,SM1,LOCK,FL,386 */ + {I_BTR, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66855, 26, 1089}, + /* 887 : BTR rm32,reg32 [mr: o32 0f b3 /r ] SM0-1,LOCK,FL,386 */ + /* 321 355 001(b3) 101 : SM0,SM1,LOCK,FL,386 */ + {I_BTR, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+66861, 26, 1090}, + /* 888 : BTR rm64,reg64 [mr: o64 0f b3 /r ] SM0-1,LOCK,LONG,FL,PROT,X86_64 */ + /* 324 355 001(b3) 101 : SM0,SM1,LOCK,LONG,FL,PROT,X86_64 */ + {I_BTR, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+66867, 27, 1091}, + /* 889 : BTR rm16,imm8 [mi: o16 0f ba /6 ib,u ] LOCK,FL,386 */ + /* 320 355 001(ba) 206 025 : LOCK,FL,386 */ + {I_BTR, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+55439, 77, 1092}, + /* 890 : BTR rm32,imm8 [mi: o32 0f ba /6 ib,u ] LOCK,FL,386 */ + /* 321 355 001(ba) 206 025 : LOCK,FL,386 */ + {I_BTR, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+55446, 77, 1093}, + /* 891 : BTR rm64,imm8 [mi: o64 0f ba /6 ib,u ] LOCK,LONG,FL,PROT,X86_64 */ + /* 324 355 001(ba) 206 025 : LOCK,LONG,FL,PROT,X86_64 */ + {I_BTR, 2, {RM_GPR|BITS64,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+55453, 78, 1094}, + /* 892 : BTS rm16,reg16 [mr: o16 0f ab /r ] SM0-1,LOCK,FL,386 */ + /* 320 355 001(ab) 101 : SM0,SM1,LOCK,FL,386 */ + {I_BTS, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66873, 26, 1095}, + /* 893 : BTS rm32,reg32 [mr: o32 0f ab /r ] SM0-1,LOCK,FL,386 */ + /* 321 355 001(ab) 101 : SM0,SM1,LOCK,FL,386 */ + {I_BTS, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+66879, 26, 1096}, + /* 894 : BTS rm64,reg64 [mr: o64 0f ab /r ] SM0-1,LOCK,LONG,FL,PROT,X86_64 */ + /* 324 355 001(ab) 101 : SM0,SM1,LOCK,LONG,FL,PROT,X86_64 */ + {I_BTS, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+66885, 27, 1097}, + /* 895 : BTS rm16,imm8 [mi: o16 0f ba /5 ib,u ] LOCK,FL,386 */ + /* 320 355 001(ba) 205 025 : LOCK,FL,386 */ + {I_BTS, 2, {RM_GPR|BITS16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+55460, 77, 1098}, + /* 896 : BTS rm32,imm8 [mi: o32 0f ba /5 ib,u ] LOCK,FL,386 */ + /* 321 355 001(ba) 205 025 : LOCK,FL,386 */ + {I_BTS, 2, {RM_GPR|BITS32,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+55467, 77, 1099}, + /* 897 : BTS rm64,imm8 [mi: o64 0f ba /5 ib,u ] LOCK,LONG,FL,PROT,X86_64 */ + /* 324 355 001(ba) 205 025 : LOCK,LONG,FL,PROT,X86_64 */ + {I_BTS, 2, {RM_GPR|BITS64,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+55474, 78, 1100}, + /* 898 : BSF reg16,rm16 [rm: o16 nof3 0f bc /r ] SM0-1,386 */ + /* 320 326 355 001(bc) 110 : SM0,SM1,386 */ + {I_BSF, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55481, 13, 1102}, + /* 899 : BSF reg32,rm32 [rm: o32 nof3 0f bc /r ] SM0-1,386 */ + /* 321 326 355 001(bc) 110 : SM0,SM1,386 */ + {I_BSF, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+55488, 13, 1103}, + /* 900 : BSF reg64,rm64 [rm: o64 nof3 0f bc /r ] SM0-1,LONG,PROT,X86_64 */ + /* 324 326 355 001(bc) 110 : SM0,SM1,LONG,PROT,X86_64 */ + {I_BSF, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+55495, 14, 1104}, + /* 901 : BSR reg16,rm16 [rm: o16 nof3 0f bd /r ] SM0-1,386 */ + /* 320 326 355 001(bd) 110 : SM0,SM1,386 */ + {I_BSR, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55502, 13, 1105}, + /* 902 : BSR reg32,rm32 [rm: o32 nof3 0f bd /r ] SM0-1,386 */ + /* 321 326 355 001(bd) 110 : SM0,SM1,386 */ + {I_BSR, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+55509, 13, 1106}, + /* 903 : BSR reg64,rm64 [rm: o64 nof3 0f bd /r ] SM0-1,LONG,PROT,X86_64 */ + /* 324 326 355 001(bd) 110 : SM0,SM1,LONG,PROT,X86_64 */ + {I_BSR, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+55516, 14, 1107}, + /* 904 : LZCNT reg16,rm16 [rm: o16 f3i 0f bd /r ] SM0-1,FL,LZCNT,FUTURE */ + /* 320 333 355 001(bd) 110 : SM0,SM1,FL,LZCNT,FUTURE */ + {I_LZCNT, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55523, 124, 1116}, + /* 905 : LZCNT reg32,rm32 [rm: o32 f3i 0f bd /r ] SM0-1,FL,LZCNT,FUTURE */ + /* 321 333 355 001(bd) 110 : SM0,SM1,FL,LZCNT,FUTURE */ + {I_LZCNT, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+55530, 124, 1117}, + /* 906 : LZCNT reg64,rm64 [rm: o64 f3i 0f bd /r ] SM0-1,LONG,FL,PROT,LZCNT,X86_64 */ + /* 324 333 355 001(bd) 110 : SM0,SM1,LONG,FL,PROT,LZCNT,X86_64 */ + {I_LZCNT, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+55537, 125, 1118}, + /* 907 : LZCNT reg16,rm16 [rm: evex.nd0.nf.l0.m4.o16 f5 /r ] SM0-1,NF,LONG,PROT,APX,LZCNT,X86_64 */ + /* 250(f4 7d 08) 300 320 001(f5) 110 : SM0,SM1,NF,NF_E,LONG,EVEX,PROT,APX,LZCNT,X86_64 */ + {I_LZCNT, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+12903, 126, 1119}, + /* 908 : LZCNT reg32,rm32 [rm: evex.nd0.nf.l0.m4.o32 f5 /r ] SM0-1,NF,LONG,PROT,APX,LZCNT,X86_64 */ + /* 250(f4 7c 08) 300 321 001(f5) 110 : SM0,SM1,NF,NF_E,WW,LONG,EVEX,PROT,APX,LZCNT,X86_64 */ + {I_LZCNT, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+12913, 127, 1120}, + /* 909 : LZCNT reg64,rm64 [rm: evex.nd0.nf.l0.m4.o64 f5 /r ] SM0-1,NF,LONG,PROT,APX,LZCNT,X86_64 */ + /* 250(f4 fc 08) 300 324 001(f5) 110 : SM0,SM1,NF,NF_E,WW,LONG,EVEX,PROT,APX,LZCNT,X86_64 */ + {I_LZCNT, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+12923, 127, 1121}, + /* 910 : TZCNT reg16,rm16 [rm: o16 f3i 0f bc /r ] SM0-1,FL,BMI1,FUTURE */ + /* 320 333 355 001(bc) 110 : SM0,SM1,FL,BMI1,FUTURE */ + {I_TZCNT, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55544, 128, 1122}, + /* 911 : TZCNT reg32,rm32 [rm: o32 f3i 0f bc /r ] SM0-1,FL,BMI1,FUTURE */ + /* 321 333 355 001(bc) 110 : SM0,SM1,FL,BMI1,FUTURE */ + {I_TZCNT, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+55551, 128, 1123}, + /* 912 : TZCNT reg64,rm64 [rm: o64 f3i 0f bc /r ] SM0-1,LONG,FL,PROT,BMI1,X86_64 */ + /* 324 333 355 001(bc) 110 : SM0,SM1,LONG,FL,PROT,BMI1,X86_64 */ + {I_TZCNT, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+55558, 129, 1124}, + /* 913 : TZCNT reg16,rm16 [rm: evex.nd0.nf.l0.m4.o16 f4 /r ] SM0-1,NF,LONG,PROT,BMI1,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(f4) 110 : SM0,SM1,NF,NF_E,LONG,EVEX,PROT,BMI1,APX,X86_64 */ + {I_TZCNT, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+12933, 130, 1125}, + /* 914 : TZCNT reg32,rm32 [rm: evex.nd0.nf.l0.m4.o32 f4 /r ] SM0-1,NF,LONG,PROT,BMI1,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(f4) 110 : SM0,SM1,NF,NF_E,WW,LONG,EVEX,PROT,BMI1,APX,X86_64 */ + {I_TZCNT, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+12943, 131, 1126}, + /* 915 : TZCNT reg64,rm64 [rm: evex.nd0.nf.l0.m4.o64 f4 /r ] SM0-1,NF,LONG,PROT,BMI1,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(f4) 110 : SM0,SM1,NF,NF_E,WW,LONG,EVEX,PROT,BMI1,APX,X86_64 */ + {I_TZCNT, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+12953, 131, 1127}, + /* 916 : ANDN reg32,reg32*,rm32 [rvm: vex.nds.lz.0f38.w0 f2 /r ] SM0,SM1,SM2,FL,BMI1,FUTURE */ + /* 261(002 000) 001(f2) 120 : SM0,SM1,SM2,NOAPX,FL,VEX,BMI1,FUTURE */ + {I_ANDN, 3, {REG_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55565, 132, 1129}, + /* 917 : ANDN reg64,reg64*,rm64 [rvm: vex.nds.lz.0f38.w1 f2 /r ] SM0,SM1,SM2,LONG,FL,PROT,BMI1,X86_64 */ + /* 261(002 200) 001(f2) 120 : SM0,SM1,SM2,NOAPX,LONG,FL,VEX,PROT,BMI1,X86_64 */ + {I_ANDN, 3, {REG_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55579, 134, 1130}, + /* 918 : ANDN reg32,reg32*,rm32 [rvm: evex.np.nf.lz.0f38.w0 f2 /r ] SM0,SM1,SM2,NF,LONG,PROT,BMI1,APX,X86_64 */ + /* 241(f2 7c 08) 300 001(f2) 120 : SM0,SM1,SM2,NF,NF_E,LONG,EVEX,PROT,BMI1,APX,X86_64 */ + {I_ANDN, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+24448, 136, 1131}, + /* 919 : ANDN reg64,reg64*,rm64 [rvm: evex.np.nf.lz.0f38.w1 f2 /r ] SM0,SM1,SM2,NF,LONG,PROT,BMI1,APX,X86_64 */ + /* 241(f2 fc 08) 300 001(f2) 120 : SM0,SM1,SM2,NF,NF_E,LONG,EVEX,PROT,BMI1,APX,X86_64 */ + {I_ANDN, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+24466, 136, 1132}, + /* 920 : BEXTR reg32,rm32*,reg32 [rmv: vex.nds.lz.0f38.w0 f7 /r ] SM0,SM1,SM2,FL,BMI1,FUTURE */ + /* 262(002 000) 001(f7) 110 : SM0,SM1,SM2,NOAPX,FL,VEX,BMI1,FUTURE */ + {I_BEXTR, 3, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55593, 132, 1133}, + /* 921 : BEXTR reg64,rm64*,reg64 [rmv: vex.nds.lz.0f38.w1 f7 /r ] SM0,SM1,SM2,LONG,FL,PROT,BMI1,X86_64 */ + /* 262(002 200) 001(f7) 110 : SM0,SM1,SM2,NOAPX,LONG,FL,VEX,PROT,BMI1,X86_64 */ + {I_BEXTR, 3, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55607, 134, 1134}, + /* 922 : BEXTR reg32,rm32*,reg32 [rmv: evex.np.nf.lz.0f38.w0 f7 /r ] SM0,SM1,SM2,NF,LONG,PROT,BMI1,APX,X86_64 */ + /* 242(f2 7c 08) 300 001(f7) 110 : SM0,SM1,SM2,NF,NF_E,LONG,EVEX,PROT,BMI1,APX,X86_64 */ + {I_BEXTR, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+24484, 136, 1135}, + /* 923 : BEXTR reg64,rm64*,reg64 [rmv: evex.np.nf.lz.0f38.w1 f7 /r ] SM0,SM1,SM2,NF,LONG,PROT,BMI1,APX,X86_64 */ + /* 242(f2 fc 08) 300 001(f7) 110 : SM0,SM1,SM2,NF,NF_E,LONG,EVEX,PROT,BMI1,APX,X86_64 */ + {I_BEXTR, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+24502, 136, 1136}, + /* 924 : BLSMSK reg32,rm32 [vm: vex.ndd.lz.0f38.w0 f3 /2 ] SM0-1,FL,BMI1,FUTURE */ + /* 260(002 000) 001(f3) 212 : SM0,SM1,NOAPX,FL,VEX,BMI1,FUTURE */ + {I_BLSMSK, 2, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55621, 133, 1137}, + /* 925 : BLSMSK reg64,rm64 [vm: vex.ndd.lz.0f38.w1 f3 /2 ] SM0-1,LONG,FL,PROT,BMI1,X86_64 */ + /* 260(002 200) 001(f3) 212 : SM0,SM1,NOAPX,LONG,FL,VEX,PROT,BMI1,X86_64 */ + {I_BLSMSK, 2, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55628, 135, 1138}, + /* 926 : BLSMSK reg32,rm32 [vm: evex.np.nf.lz.0f38.w0 f3 /2 ] SM0-1,NF,LONG,PROT,BMI1,APX,X86_64 */ + /* 240(f2 7c 08) 300 001(f3) 212 : SM0,SM1,NF,NF_E,LONG,EVEX,PROT,BMI1,APX,X86_64 */ + {I_BLSMSK, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+24520, 130, 1139}, + /* 927 : BLSMSK reg64,rm64 [vm: evex.np.nf.lz.0f38.w1 f3 /2 ] SM0-1,NF,LONG,PROT,BMI1,APX,X86_64 */ + /* 240(f2 fc 08) 300 001(f3) 212 : SM0,SM1,NF,NF_E,LONG,EVEX,PROT,BMI1,APX,X86_64 */ + {I_BLSMSK, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+24529, 130, 1140}, + /* 928 : BLSR reg32,rm32 [vm: vex.ndd.lz.0f38.w0 f3 /1 ] SM0-1,FL,BMI1,FUTURE */ + /* 260(002 000) 001(f3) 211 : SM0,SM1,NOAPX,FL,VEX,BMI1,FUTURE */ + {I_BLSR, 2, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55635, 133, 1141}, + /* 929 : BLSR reg64,rm64 [vm: vex.ndd.lz.0f38.w1 f3 /1 ] SM0-1,LONG,FL,PROT,BMI1,X86_64 */ + /* 260(002 200) 001(f3) 211 : SM0,SM1,NOAPX,LONG,FL,VEX,PROT,BMI1,X86_64 */ + {I_BLSR, 2, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55642, 135, 1142}, + /* 930 : BLSR reg32,rm32 [vm: evex.np.nf.lz.0f38.w0 f3 /1 ] SM0-1,NF,LONG,PROT,BMI1,APX,X86_64 */ + /* 240(f2 7c 08) 300 001(f3) 211 : SM0,SM1,NF,NF_E,LONG,EVEX,PROT,BMI1,APX,X86_64 */ + {I_BLSR, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+24538, 130, 1143}, + /* 931 : BLSR reg64,rm64 [vm: evex.np.nf.lz.0f38.w1 f3 /1 ] SM0-1,NF,LONG,PROT,BMI1,APX,X86_64 */ + /* 240(f2 fc 08) 300 001(f3) 211 : SM0,SM1,NF,NF_E,LONG,EVEX,PROT,BMI1,APX,X86_64 */ + {I_BLSR, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+24547, 130, 1144}, + /* 932 : BLSI reg32,rm32 [vm: vex.ndd.lz.0f38.w0 f3 /3 ] SM0-1,FL,BMI1,FUTURE */ + /* 260(002 000) 001(f3) 213 : SM0,SM1,NOAPX,FL,VEX,BMI1,FUTURE */ + {I_BLSI, 2, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55649, 133, 1145}, + /* 933 : BLSI reg64,rm64 [vm: vex.ndd.lz.0f38.w1 f3 /3 ] SM0-1,LONG,FL,PROT,BMI1,X86_64 */ + /* 260(002 200) 001(f3) 213 : SM0,SM1,NOAPX,LONG,FL,VEX,PROT,BMI1,X86_64 */ + {I_BLSI, 2, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55656, 135, 1146}, + /* 934 : BLSI reg32,rm32 [vm: evex.np.nf.lz.0f38.w0 f3 /3 ] SM0-1,NF,LONG,PROT,BMI1,APX,X86_64 */ + /* 240(f2 7c 08) 300 001(f3) 213 : SM0,SM1,NF,NF_E,LONG,EVEX,PROT,BMI1,APX,X86_64 */ + {I_BLSI, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+24556, 130, 1147}, + /* 935 : BLSI reg64,rm64 [vm: evex.np.nf.lz.0f38.w1 f3 /3 ] SM0-1,NF,LONG,PROT,BMI1,APX,X86_64 */ + /* 240(f2 fc 08) 300 001(f3) 213 : SM0,SM1,NF,NF_E,LONG,EVEX,PROT,BMI1,APX,X86_64 */ + {I_BLSI, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+24565, 130, 1148}, + /* 936 : BZHI reg32,rm32*,reg32 [rmv: vex.nds.lz.0f38.w0 f5 /r ] SM0,SM1,SM2,FL,BMI2,FUTURE */ + /* 262(002 000) 001(f5) 110 : SM0,SM1,SM2,NOAPX,FL,VEX,BMI2,FUTURE */ + {I_BZHI, 3, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55663, 137, 1149}, + /* 937 : BZHI reg64,rm64*,reg64 [rmv: vex.nds.lz.0f38.w1 f5 /r ] SM0,SM1,SM2,LONG,FL,PROT,BMI2,X86_64 */ + /* 262(002 200) 001(f5) 110 : SM0,SM1,SM2,NOAPX,LONG,FL,VEX,PROT,BMI2,X86_64 */ + {I_BZHI, 3, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55677, 139, 1150}, + /* 938 : BZHI reg32,rm32*,reg32 [rmv: evex.np.nf.lz.0f38.w0 f5 /r ] SM0,SM1,SM2,NF,LONG,PROT,BMI1,APX,X86_64 */ + /* 242(f2 7c 08) 300 001(f5) 110 : SM0,SM1,SM2,NF,NF_E,LONG,EVEX,PROT,BMI1,APX,X86_64 */ + {I_BZHI, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+24574, 136, 1151}, + /* 939 : BZHI reg64,rm64*,reg64 [rmv: evex.np.nf.lz.0f38.w1 f5 /r ] SM0,SM1,SM2,NF,LONG,PROT,BMI1,APX,X86_64 */ + /* 242(f2 fc 08) 300 001(f5) 110 : SM0,SM1,SM2,NF,NF_E,LONG,EVEX,PROT,BMI1,APX,X86_64 */ + {I_BZHI, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+24592, 136, 1152}, + /* 940 : PDEP reg32,reg32*,rm32 [rvm: vex.nds.lz.f2.0f38.w0 f5 /r ] SM0,SM1,SM2,BMI2,FUTURE */ + /* 261(002 003) 001(f5) 120 : SM0,SM1,SM2,NOAPX,VEX,BMI2,FUTURE */ + {I_PDEP, 3, {REG_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55691, 141, 1153}, + /* 941 : PDEP reg32,reg32*,rm32 [rvm: evex.nds.lz.f2.0f38.w0 f5 /r ] SM0,SM1,SM2,BMI2,FUTURE,APX */ + /* 241(f2 7f 08) 300 001(f5) 120 : SM0,SM1,SM2,LONG,EVEX,PROT,BMI2,APX,FUTURE */ + {I_PDEP, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+24610, 142, 1153}, + /* 942 : PDEP reg64,reg64*,rm64 [rvm: vex.nds.lz.f2.0f38.w1 f5 /r ] SM0,SM1,SM2,LONG,PROT,BMI2,X86_64 */ + /* 261(002 203) 001(f5) 120 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,BMI2,X86_64 */ + {I_PDEP, 3, {REG_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55705, 144, 1154}, + /* 943 : PDEP reg64,reg64*,rm64 [rvm: evex.nds.lz.f2.0f38.w1 f5 /r ] SM0,SM1,SM2,LONG,PROT,BMI2,X86_64,APX */ + /* 241(f2 ff 08) 300 001(f5) 120 : SM0,SM1,SM2,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_PDEP, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+24628, 145, 1154}, + /* 944 : PEXT reg32,reg32*,rm32 [rvm: vex.nds.lz.f3.0f38.w0 f5 /r ] SM0,SM1,SM2,BMI2,FUTURE */ + /* 261(002 002) 001(f5) 120 : SM0,SM1,SM2,NOAPX,VEX,BMI2,FUTURE */ + {I_PEXT, 3, {REG_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55719, 141, 1155}, + /* 945 : PEXT reg32,reg32*,rm32 [rvm: evex.nds.lz.f3.0f38.w0 f5 /r ] SM0,SM1,SM2,BMI2,FUTURE,APX */ + /* 241(f2 7e 08) 300 001(f5) 120 : SM0,SM1,SM2,LONG,EVEX,PROT,BMI2,APX,FUTURE */ + {I_PEXT, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+24646, 142, 1155}, + /* 946 : PEXT reg64,reg64*,rm64 [rvm: vex.nds.lz.f3.0f38.w1 f5 /r ] SM0,SM1,SM2,LONG,PROT,BMI2,X86_64 */ + /* 261(002 202) 001(f5) 120 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,BMI2,X86_64 */ + {I_PEXT, 3, {REG_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+55733, 144, 1156}, + /* 947 : PEXT reg64,reg64*,rm64 [rvm: evex.nds.lz.f3.0f38.w1 f5 /r ] SM0,SM1,SM2,LONG,PROT,BMI2,X86_64,APX */ + /* 241(f2 fe 08) 300 001(f5) 120 : SM0,SM1,SM2,LONG,EVEX,PROT,BMI2,APX,X86_64 */ + {I_PEXT, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+24664, 145, 1156}, + /* 948 : BEXTR reg32,rm32*,imm32 [rmi: xop.m10.lz.w0 10 /r id ] SM0,SM1,FL,TBM,OBSOLETE,FUTURE,AMD */ + /* 270(112 000) 001(10) 110 042 : SM0,SM1,NOAPX,FL,VEX,TBM,OBSOLETE,FUTURE,AMD */ + {I_BEXTR, 3, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+51291, 147, 1159}, + /* 949 : BEXTR reg64,rm64*,imm32 [rmi: xop.m10.lz.w1 10 /r id ] SM0,SM1,LONG,FL,PROT,TBM,OBSOLETE,X86_64,AMD */ + /* 270(112 200) 001(10) 110 042 : SM0,SM1,NOAPX,LONG,FL,VEX,PROT,TBM,OBSOLETE,X86_64,AMD */ + {I_BEXTR, 3, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+51307, 149, 1160}, + /* 950 : BLCI reg32,rm32 [vm: xop.ndd.lz.m9.w0 02 /6 ] SM0-1,FL,TBM,OBSOLETE,FUTURE,AMD */ + /* 260(111 000) 001(02) 216 : SM0,SM1,NOAPX,FL,VEX,TBM,OBSOLETE,FUTURE,AMD */ + {I_BLCI, 2, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55747, 147, 1161}, + /* 951 : BLCI reg64,rm64 [vm: xop.ndd.lz.m9.w1 02 /6 ] SM0-1,LONG,FL,PROT,TBM,OBSOLETE,X86_64,AMD */ + /* 260(111 200) 001(02) 216 : SM0,SM1,NOAPX,LONG,FL,VEX,PROT,TBM,OBSOLETE,X86_64,AMD */ + {I_BLCI, 2, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55754, 149, 1162}, + /* 952 : BLCIC reg32,rm32 [vm: xop.ndd.lz.m9.w0 01 /5 ] SM0-1,FL,TBM,OBSOLETE,FUTURE,AMD */ + /* 260(111 000) 001(01) 215 : SM0,SM1,NOAPX,FL,VEX,TBM,OBSOLETE,FUTURE,AMD */ + {I_BLCIC, 2, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55761, 147, 1163}, + /* 953 : BLCIC reg64,rm64 [vm: xop.ndd.lz.m9.w1 01 /5 ] SM0-1,LONG,FL,PROT,TBM,OBSOLETE,X86_64,AMD */ + /* 260(111 200) 001(01) 215 : SM0,SM1,NOAPX,LONG,FL,VEX,PROT,TBM,OBSOLETE,X86_64,AMD */ + {I_BLCIC, 2, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55768, 149, 1164}, + /* 954 : BLSIC reg32,rm32 [vm: xop.ndd.lz.m9.w0 01 /6 ] SM0-1,FL,TBM,OBSOLETE,FUTURE,AMD */ + /* 260(111 000) 001(01) 216 : SM0,SM1,NOAPX,FL,VEX,TBM,OBSOLETE,FUTURE,AMD */ + {I_BLSIC, 2, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55775, 147, 1165}, + /* 955 : BLSIC reg64,rm64 [vm: xop.ndd.lz.m9.w1 01 /6 ] SM0-1,LONG,FL,PROT,TBM,OBSOLETE,X86_64,AMD */ + /* 260(111 200) 001(01) 216 : SM0,SM1,NOAPX,LONG,FL,VEX,PROT,TBM,OBSOLETE,X86_64,AMD */ + {I_BLSIC, 2, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55782, 149, 1166}, + /* 956 : BLCFILL reg32,rm32 [vm: xop.ndd.lz.m9.w0 01 /1 ] SM0-1,TBM,OBSOLETE,FUTURE,AMD */ + /* 260(111 000) 001(01) 211 : SM0,SM1,NOAPX,VEX,TBM,OBSOLETE,FUTURE,AMD */ + {I_BLCFILL, 2, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55789, 151, 1167}, + /* 957 : BLCFILL reg64,rm64 [vm: xop.ndd.lz.m9.w1 01 /1 ] SM0-1,LONG,PROT,TBM,OBSOLETE,X86_64,AMD */ + /* 260(111 200) 001(01) 211 : SM0,SM1,NOAPX,LONG,VEX,PROT,TBM,OBSOLETE,X86_64,AMD */ + {I_BLCFILL, 2, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55796, 152, 1168}, + /* 958 : BLSFILL reg32,rm32 [vm: xop.ndd.lz.m9.w0 01 /2 ] TBM,OBSOLETE,FUTURE,AMD */ + /* 260(111 000) 001(01) 212 : NOAPX,VEX,TBM,OBSOLETE,FUTURE,AMD */ + {I_BLSFILL, 2, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55803, 153, 1169}, + /* 959 : BLSFILL reg64,rm64 [vm: xop.ndd.lz.m9.w1 01 /2 ] LONG,PROT,TBM,OBSOLETE,X86_64,AMD */ + /* 260(111 200) 001(01) 212 : NOAPX,LONG,VEX,PROT,TBM,OBSOLETE,X86_64,AMD */ + {I_BLSFILL, 2, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55810, 154, 1170}, + /* 960 : BLCMSK reg32,rm32 [vm: xop.ndd.lz.m9.w0 02 /1 ] FL,TBM,OBSOLETE,FUTURE,AMD */ + /* 260(111 000) 001(02) 211 : NOAPX,FL,VEX,TBM,OBSOLETE,FUTURE,AMD */ + {I_BLCMSK, 2, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55817, 155, 1171}, + /* 961 : BLCMSK reg64,rm64 [vm: xop.ndd.lz.m9.w1 02 /1 ] LONG,FL,PROT,TBM,OBSOLETE,X86_64,AMD */ + /* 260(111 200) 001(02) 211 : NOAPX,LONG,FL,VEX,PROT,TBM,OBSOLETE,X86_64,AMD */ + {I_BLCMSK, 2, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55824, 156, 1172}, + /* 962 : BLCS reg32,rm32 [vm: xop.ndd.lz.m9.w0 01 /3 ] TBM,OBSOLETE,FUTURE,AMD */ + /* 260(111 000) 001(01) 213 : NOAPX,VEX,TBM,OBSOLETE,FUTURE,AMD */ + {I_BLCS, 2, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55831, 153, 1173}, + /* 963 : BLCS reg64,rm64 [vm: xop.ndd.lz.m9.w1 01 /3 ] LONG,PROT,TBM,OBSOLETE,X86_64,AMD */ + /* 260(111 200) 001(01) 213 : NOAPX,LONG,VEX,PROT,TBM,OBSOLETE,X86_64,AMD */ + {I_BLCS, 2, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55838, 154, 1174}, + /* 964 : TZMSK reg32,rm32 [vm: xop.ndd.lz.m9.w0 01 /4 ] TBM,OBSOLETE,FUTURE,AMD */ + /* 260(111 000) 001(01) 214 : NOAPX,VEX,TBM,OBSOLETE,FUTURE,AMD */ + {I_TZMSK, 2, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55845, 153, 1175}, + /* 965 : TZMSK reg64,rm64 [vm: xop.ndd.lz.m9.w1 01 /4 ] LONG,PROT,TBM,OBSOLETE,X86_64,AMD */ + /* 260(111 200) 001(01) 214 : NOAPX,LONG,VEX,PROT,TBM,OBSOLETE,X86_64,AMD */ + {I_TZMSK, 2, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55852, 154, 1176}, + /* 966 : T1MSKC reg32,rm32 [vm: xop.ndd.lz.m9.w0 01 /7 ] TBM,OBSOLETE,FUTURE,AMD */ + /* 260(111 000) 001(01) 217 : NOAPX,VEX,TBM,OBSOLETE,FUTURE,AMD */ + {I_T1MSKC, 2, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55859, 153, 1177}, + /* 967 : T1MSKC reg64,rm64 [vm: xop.ndd.lz.m9.w1 01 /7 ] LONG,PROT,TBM,OBSOLETE,X86_64,AMD */ + /* 260(111 200) 001(01) 217 : NOAPX,LONG,VEX,PROT,TBM,OBSOLETE,X86_64,AMD */ + {I_T1MSKC, 2, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55866, 154, 1178}, + /* 968 : AAA void [ 37 ] NOREX,NOAPX,NOLONG,FL,8086 */ + /* 001(37) : NOREX,NOAPX,NOLONG,FL,8086 */ + {I_AAA, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73445, 74, 1181}, + /* 969 : AAD void [ d5 0a ] NOREX,NOAPX,NOLONG,FL,8086 */ + /* 002(d5 0a) : NOREX,NOAPX,NOLONG,FL,8086 */ + {I_AAD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72656, 74, 1182}, + /* 970 : AAD imm8 [i: d5 ib,u ] AR0,SB,NOREX,NOAPX,NOLONG,FL,8086 */ + /* 001(d5) 024 : AR0,SB,NOREX,NOAPX,NOLONG,FL,8086 */ + {I_AAD, 1, {IMM_NORMAL|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72660, 157, 1183}, + /* 971 : AAM void [ d4 0a ] NOREX,NOAPX,NOLONG,FL,8086 */ + /* 002(d4 0a) : NOREX,NOAPX,NOLONG,FL,8086 */ + {I_AAM, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72664, 74, 1184}, + /* 972 : AAM imm8 [i: d4 ib,u ] AR0,SB,NOREX,NOAPX,NOLONG,FL,8086 */ + /* 001(d4) 024 : AR0,SB,NOREX,NOAPX,NOLONG,FL,8086 */ + {I_AAM, 1, {IMM_NORMAL|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72668, 157, 1185}, + /* 973 : AAS void [ 3f ] NOREX,NOAPX,NOLONG,FL,8086 */ + /* 001(3f) : NOREX,NOAPX,NOLONG,FL,8086 */ + {I_AAS, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73448, 74, 1186}, + /* 974 : DAA void [ 27 ] NOREX,NOAPX,NOLONG,FL,8086 */ + /* 001(27) : NOREX,NOAPX,NOLONG,FL,8086 */ + {I_DAA, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73451, 74, 1187}, + /* 975 : DAS void [ 2f ] NOREX,NOAPX,NOLONG,FL,8086 */ + /* 001(2f) : NOREX,NOAPX,NOLONG,FL,8086 */ + {I_DAS, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73454, 74, 1188}, + /* 976 : BSWAP reg32 [r: o32 0f c8+r ] 486 */ + /* 321 355 010 310 : 486 */ + {I_BSWAP, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71634, 158, 1191}, + /* 977 : BSWAP reg64 [r: o64 0f c8+r ] LONG,PROT,X86_64 */ + /* 324 355 010 310 : LONG,PROT,X86_64 */ + {I_BSWAP, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71639, 24, 1192}, + /* 978 : MOVBE reg16,mem16 [rm: o16 norep 0f38 f0 /r ] SM0-1,MOVBE,NEHALEM */ + /* 320 331 356 001(f0) 110 : SM0,SM1,NOAPX,MOVBE,NEHALEM */ + {I_MOVBE, 2, {REG_GPR|BITS16|RN_L16,MEMORY|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55873, 160, 1197}, + /* 979 : MOVBE reg32,mem32 [rm: o32 norep 0f38 f0 /r ] SM0-1,MOVBE,NEHALEM */ + /* 321 331 356 001(f0) 110 : SM0,SM1,NOAPX,MOVBE,NEHALEM */ + {I_MOVBE, 2, {REG_GPR|BITS32|RN_L16,MEMORY|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55880, 160, 1198}, + /* 980 : MOVBE reg64,mem64 [rm: o64 norep 0f38 f0 /r ] SM0-1,LONG,PROT,MOVBE,X86_64,NEHALEM */ + /* 324 331 356 001(f0) 110 : SM0,SM1,NOAPX,LONG,PROT,MOVBE,NEHALEM */ + {I_MOVBE, 2, {REG_GPR|BITS64|RN_L16,MEMORY|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55887, 161, 1199}, + /* 981 : MOVBE mem16,reg16 [mr: o16 norep 0f38 f1 /r ] SM0-1,MOVBE,NEHALEM */ + /* 320 331 356 001(f1) 101 : SM0,SM1,NOAPX,MOVBE,NEHALEM */ + {I_MOVBE, 2, {MEMORY|BITS16|RN_L16,REG_GPR|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55894, 160, 1200}, + /* 982 : MOVBE mem32,reg32 [mr: o32 norep 0f38 f1 /r ] SM0-1,MOVBE,NEHALEM */ + /* 321 331 356 001(f1) 101 : SM0,SM1,NOAPX,MOVBE,NEHALEM */ + {I_MOVBE, 2, {MEMORY|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55901, 160, 1201}, + /* 983 : MOVBE mem64,reg64 [mr: o64 norep 0f38 f1 /r ] SM0-1,LONG,PROT,MOVBE,X86_64,NEHALEM */ + /* 324 331 356 001(f1) 101 : SM0,SM1,NOAPX,LONG,PROT,MOVBE,NEHALEM */ + {I_MOVBE, 2, {MEMORY|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55908, 161, 1202}, + /* 984 : MOVBE reg16,mem16 [rm: evex.nd0.nf0.l0.m4.o16 60 /r ] SM0-1,LONG,PROT,APX,MOVBE,X86_64,NEHALEM */ + /* 250(f4 7d 08) 300 320 001(60) 110 : SM0,SM1,LONG,EVEX,PROT,APX,MOVBE,NEHALEM */ + {I_MOVBE, 2, {REG_GPR|BITS16,MEMORY|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+12963, 162, 1203}, + /* 985 : MOVBE reg32,mem32 [rm: evex.nd0.nf0.l0.m4.o32 60 /r ] SM0-1,LONG,PROT,APX,MOVBE,X86_64,NEHALEM */ + /* 250(f4 7c 08) 300 321 001(60) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,MOVBE,NEHALEM */ + {I_MOVBE, 2, {REG_GPR|BITS32,MEMORY|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+12973, 163, 1204}, + /* 986 : MOVBE reg64,mem64 [rm: evex.nd0.nf0.l0.m4.o64 60 /r ] SM0-1,LONG,PROT,APX,MOVBE,X86_64,NEHALEM */ + /* 250(f4 fc 08) 300 324 001(60) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,MOVBE,NEHALEM */ + {I_MOVBE, 2, {REG_GPR|BITS64,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+12983, 163, 1205}, + /* 987 : MOVBE mem16,reg16 [mr: evex.nd0.nf0.l0.m4.o16 61 /r ] SM0-1,LONG,PROT,APX,MOVBE,X86_64,NEHALEM */ + /* 250(f4 7d 08) 300 320 001(61) 101 : SM0,SM1,LONG,EVEX,PROT,APX,MOVBE,NEHALEM */ + {I_MOVBE, 2, {MEMORY|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+12993, 162, 1206}, + /* 988 : MOVBE mem32,reg32 [mr: evex.nd0.nf0.l0.m4.o32 61 /r ] SM0-1,LONG,PROT,APX,MOVBE,X86_64,NEHALEM */ + /* 250(f4 7c 08) 300 321 001(61) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,MOVBE,NEHALEM */ + {I_MOVBE, 2, {MEMORY|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+13003, 163, 1207}, + /* 989 : MOVBE mem64,reg64 [mr: evex.nd0.nf0.l0.m4.o64 61 /r ] SM0-1,LONG,PROT,APX,MOVBE,X86_64,NEHALEM */ + /* 250(f4 fc 08) 300 324 001(61) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,MOVBE,NEHALEM */ + {I_MOVBE, 2, {MEMORY|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+13013, 163, 1208}, + /* 990 : CBW void [ o16 98 ] 8086 */ + /* 320 001(98) : 8086 */ + {I_CBW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72688, 23, 1211}, + /* 991 : CDQ void [ o32 99 ] 386 */ + /* 321 001(99) : 386 */ + {I_CDQ, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72692, 3, 1212}, + /* 992 : CDQE void [ o64 98 ] LONG,PROT,X86_64 */ + /* 324 001(98) : LONG,PROT,X86_64 */ + {I_CDQE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72696, 24, 1213}, + /* 993 : CQO void [ o64 99 ] LONG,PROT,X86_64 */ + /* 324 001(99) : LONG,PROT,X86_64 */ + {I_CQO, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72700, 24, 1214}, + /* 994 : CWD void [ o16 99 ] 8086 */ + /* 320 001(99) : 8086 */ + {I_CWD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72704, 23, 1215}, + /* 995 : CWDE void [ o32 98 ] 386 */ + /* 321 001(98) : 386 */ + {I_CWDE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72708, 3, 1216}, + /* 996 : MOVSX reg16,rm8 [rm: o16 0f be /r ] AR0-1,SX,386 */ + /* 320 355 001(be) 110 : AR0,AR1,SX,386 */ + {I_MOVSX, 2, {REG_GPR|BITS16,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+66915, 167, 1223}, + /* 997 : MOVSX reg32,rm8 [rm: o32 0f be /r ] AR0-1,SX,386 */ + /* 321 355 001(be) 110 : AR0,AR1,SX,386 */ + {I_MOVSX, 2, {REG_GPR|BITS32,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+66921, 167, 1224}, + /* 998 : MOVSX reg64,rm8 [rm: o64 0f be /r ] AR0-1,SX,LONG,PROT,X86_64 */ + /* 324 355 001(be) 110 : AR0,AR1,SX,LONG,PROT,X86_64 */ + {I_MOVSX, 2, {REG_GPR|BITS64,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+66927, 168, 1225}, + /* 999 : MOVSX reg16,rm16 [rm: o16 0f bf /r ] AR0-1,SX,386 */ + /* 320 355 001(bf) 110 : AR0,AR1,SX,386 */ + {I_MOVSX, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66933, 167, 1229}, + /* 1000 : MOVSX reg32,rm16 [rm: o32 0f bf /r ] AR0-1,SX,386 */ + /* 321 355 001(bf) 110 : AR0,AR1,SX,386 */ + {I_MOVSX, 2, {REG_GPR|BITS32,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66939, 167, 1230}, + /* 1001 : MOVSX reg64,rm16 [rm: o64 0f bf /r ] AR0-1,SX,LONG,PROT,X86_64 */ + /* 324 355 001(bf) 110 : AR0,AR1,SX,LONG,PROT,X86_64 */ + {I_MOVSX, 2, {REG_GPR|BITS64,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66945, 168, 1231}, + /* 1002 : MOVSXD reg16,rm32 [rm: o16 63 /r ] LONG,PROT,X86_64 */ + /* 320 001(63) 110 : LONG,PROT,X86_64 */ + {I_MOVSXD, 2, {REG_GPR|BITS16,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+71644, 24, 1238}, + /* 1003 : MOVSXD reg32,rm32 [rm: o32 63 /r ] LONG,PROT,X86_64 */ + /* 321 001(63) 110 : LONG,PROT,X86_64 */ + {I_MOVSXD, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+71649, 24, 1239}, + /* 1004 : MOVSXD reg64,rm32 [rm: o64 63 /r ] LONG,PROT,X86_64 */ + /* 324 001(63) 110 : LONG,PROT,X86_64 */ + {I_MOVSXD, 2, {REG_GPR|BITS64,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+71654, 24, 1240}, + /* 1005 : MOVZX reg16,rm8 [rm: o16 0f b6 /r ] AR0-1,SX,386 */ + /* 320 355 001(b6) 110 : AR0,AR1,SX,386 */ + {I_MOVZX, 2, {REG_GPR|BITS16,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+66951, 167, 1242}, + /* 1006 : MOVZX reg32,rm8 [rm: o32 0f b6 /r ] AR0-1,SX,386 */ + /* 321 355 001(b6) 110 : AR0,AR1,SX,386 */ + {I_MOVZX, 2, {REG_GPR|BITS32,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+66957, 167, 1243}, + /* 1007 : MOVZX reg64,rm8 [rm: o64 0f b6 /r ] AR0-1,SX,LONG,PROT,X86_64 */ + /* 324 355 001(b6) 110 : AR0,AR1,SX,LONG,PROT,X86_64 */ + {I_MOVZX, 2, {REG_GPR|BITS64,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+66963, 168, 1244}, + /* 1008 : MOVZX reg16,rm16 [rm: o16 0f b7 /r ] AR0-1,SX,386 */ + /* 320 355 001(b7) 110 : AR0,AR1,SX,386 */ + {I_MOVZX, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66969, 167, 1248}, + /* 1009 : MOVZX reg32,rm16 [rm: o32 0f b7 /r ] AR0-1,SX,386 */ + /* 321 355 001(b7) 110 : AR0,AR1,SX,386 */ + {I_MOVZX, 2, {REG_GPR|BITS32,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66975, 167, 1249}, + /* 1010 : MOVZX reg64,rm16 [rm: o64 0f b7 /r ] AR0-1,SX,LONG,PROT,X86_64 */ + /* 324 355 001(b7) 110 : AR0,AR1,SX,LONG,PROT,X86_64 */ + {I_MOVZX, 2, {REG_GPR|BITS64,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66981, 168, 1250}, + /* 1011 : CMPXCHG rm8,reg8 [mr: hle o8 0f b0 /r ] SM0-1,LOCK,FL,PENT */ + /* 273 355 001(b0) 101 : SM0,SM1,LOCK,FL,PENT */ + {I_CMPXCHG, 2, {RM_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+67005, 175, 1262}, + /* 1012 : CMPXCHG rm16,reg16 [mr: hle o16 0f b1 /r ] SM0-1,LOCK,FL,PENT */ + /* 273 320 355 001(b1) 101 : SM0,SM1,LOCK,FL,PENT */ + {I_CMPXCHG, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55915, 175, 1263}, + /* 1013 : CMPXCHG rm32,reg32 [mr: hle o32 0f b1 /r ] SM0-1,LOCK,FL,PENT */ + /* 273 321 355 001(b1) 101 : SM0,SM1,LOCK,FL,PENT */ + {I_CMPXCHG, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+55922, 175, 1264}, + /* 1014 : CMPXCHG rm64,reg64 [mr: hle o64 0f b1 /r ] SM0-1,LOCK,LONG,FL,PROT,X86_64 */ + /* 273 324 355 001(b1) 101 : SM0,SM1,LOCK,LONG,FL,PROT,X86_64 */ + {I_CMPXCHG, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+55929, 27, 1265}, + /* 1015 : CMPXCHG8B mem64 [m: hle norexw 0f c7 /1 ] LOCK,FL,PENT */ + /* 273 317 355 001(c7) 201 : LOCK,FL,PENT */ + {I_CMPXCHG8B, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+55936, 176, 1266}, + /* 1016 : CMPXCHG16B mem128 [m: o64 0f c7 /1 ] LOCK,LONG,FL,PROT,X86_64 */ + /* 324 355 001(c7) 201 : LOCK,LONG,FL,PROT,X86_64 */ + {I_CMPXCHG16B, 1, {MEMORY|BITS128,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67011, 78, 1267}, + /* 1017 : XADD rm8,reg8 [mr: hle o8 0f c0 /r ] SM0-1,LOCK,FL,486 */ + /* 273 355 001(c0) 101 : SM0,SM1,LOCK,FL,486 */ + {I_XADD, 2, {RM_GPR|BITS8,REG_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+67017, 177, 1269}, + /* 1018 : XADD rm16,reg16 [mr: hle o16 0f c1 /r ] SM0-1,LOCK,FL,486 */ + /* 273 320 355 001(c1) 101 : SM0,SM1,LOCK,FL,486 */ + {I_XADD, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+55943, 177, 1270}, + /* 1019 : XADD rm32,reg32 [mr: hle o32 0f c1 /r ] SM0-1,LOCK,FL,486 */ + /* 273 321 355 001(c1) 101 : SM0,SM1,LOCK,FL,486 */ + {I_XADD, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+55950, 177, 1271}, + /* 1020 : XADD rm64,reg64 [mr: hle o64 0f c1 /r ] SM0-1,LOCK,LONG,FL,PROT,X86_64 */ + /* 273 324 355 001(c1) 101 : SM0,SM1,LOCK,LONG,FL,PROT,X86_64 */ + {I_XADD, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+55957, 27, 1272}, + /* 1021 : XCHG reg_ax,reg16 [-r: o16 90+r ] 8086 */ + /* 320 011 220 : 8086 */ + {I_XCHG, 2, {REG_AX,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+72712, 23, 1274}, + /* 1022 : XCHG reg_rax,reg64 [-r: o64 90+r ] ZU,LONG,PROT,X86_64 */ + /* 324 011 220 : ZU,LONG,PROT,X86_64 */ + {I_XCHG, 2, {REG_RAX,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+72716, 178, 1275}, + /* 1023 : XCHG reg_eax,reg32na [-r: o32 90+r ] ZU,386 */ + /* 321 011 220 : ZU,386 */ + {I_XCHG, 2, {REG_EAX,REG_NA|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+72728, 179, 1279}, + /* 1024 : XCHG reg8,rm8 [rm: hlenl o8 86 /r ] SM0-1,LOCK1,8086 */ + /* 272 001(86) 110 : SM0,SM1,LOCK1,8086 */ + {I_XCHG, 2, {REG_GPR|BITS8,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+71659, 181, 1282}, + /* 1025 : XCHG reg16,rm16 [rm: hlenl o16 87 /r ] SM0-1,LOCK1,8086 */ + /* 272 320 001(87) 110 : SM0,SM1,LOCK1,8086 */ + {I_XCHG, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+67023, 181, 1283}, + /* 1026 : XCHG reg32,rm32 [rm: hlenl o32 87 /r ] SM0-1,LOCK1,386 */ + /* 272 321 001(87) 110 : SM0,SM1,LOCK1,386 */ + {I_XCHG, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+67029, 182, 1284}, + /* 1027 : XCHG reg64,rm64 [rm: hlenl o64 87 /r ] SM0-1,LOCK1,LONG,PROT,X86_64 */ + /* 272 324 001(87) 110 : SM0,SM1,LOCK1,LONG,PROT,X86_64 */ + {I_XCHG, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+67035, 183, 1285}, + /* 1028 : JMPABS imm64|near [i: a64 np rex2 a1 iq ] LONG,PROT,APX,X86_64 */ + /* 313 360 350 001(a1) 054 : LONG,REX2,PROT,APX,X86_64 */ + {I_JMPABS, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+55964, 188, 1298}, + /* 1029 : JMP imm16|near [i: jmp8 nw o16 eb rel8 ] AR0,OSIZE,JMP_RELAX,NOREX,NOAPX,NOLONG,8086 */ + /* 371 327 320 001(eb) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,NOREX,NOAPX,NOLONG,8086 */ + {I_JMP, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+55971, 191, 1306}, + /* 1030 : JMP imm32|near [i: jmp8 nw o32 eb rel8 ] AR0,OSIZE,JMP_RELAX,NOREX,NOAPX,NOLONG,8086 */ + /* 371 327 321 001(eb) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,NOREX,NOAPX,NOLONG,8086 */ + {I_JMP, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+55978, 191, 1307}, + /* 1031 : JMP imm64|near [i: jmp8 nw o64 eb rel8 ] AR0,OSIZE,JMP_RELAX,NOAPX,LONG,PROT,X86_64 */ + /* 371 327 324 001(eb) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,NOAPX,LONG,PROT,X86_64 */ + {I_JMP, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+55985, 192, 1308}, + /* 1032 : JMP imm16|near [i: nw o16 e9 rel ] AR0,OSIZE,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 320 001(e9) 064 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JMP, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67059, 194, 1310}, + /* 1033 : JMP imm32|near [i: nw o32 e9 rel ] AR0,OSIZE,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 321 001(e9) 064 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JMP, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67065, 194, 1311}, + /* 1034 : JMP imm64|near [i: nw o64 e9 rel ] AR0,OSIZE,LONG,BND,PROT,X86_64 */ + /* 327 324 001(e9) 064 : AR0,NWSIZE,OSIZE,LONG,BND,PROT,X86_64 */ + {I_JMP, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67071, 195, 1312}, + /* 1035 : JMP rm16|near [m: nw o16 ff /4 ] AR0,OSIZE,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 320 001(ff) 204 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JMP, 1, {RM_GPR|BITS16|RN_L16|NEAR|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67077, 194, 1314}, + /* 1036 : JMP rm32|near [m: nw o32 ff /4 ] AR0,OSIZE,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 321 001(ff) 204 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JMP, 1, {RM_GPR|BITS32|RN_L16|NEAR|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67083, 197, 1315}, + /* 1037 : JMP rm64|near [m: nw o64 ff /4 ] AR0,OSIZE,LONG,BND,PROT,X86_64 */ + /* 327 324 001(ff) 204 : AR0,NWSIZE,OSIZE,LONG,BND,PROT,X86_64 */ + {I_JMP, 1, {RM_GPR|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67089, 195, 1316}, + /* 1038 : JMP imm16:imm16 [ji: o16 ea iw iw ] AR1,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + /* 320 001(ea) 031 030 : AR1,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + {I_JMP, 2, {IMM_NORMAL|BITS16|COLON,IMM_NORMAL|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+67107, 202, 1326}, + /* 1039 : JMP imm16:imm32 [ji: o32 ea id iw ] AR1,OSIZE,NOREX,NOAPX,NOLONG,386 */ + /* 321 001(ea) 041 030 : AR1,OSIZE,NOREX,NOAPX,NOLONG,386 */ + {I_JMP, 2, {IMM_NORMAL|BITS16|COLON,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+67113, 203, 1327}, + /* 1040 : JMP mem16|far [m: o16 ff /5 ] AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + /* 320 001(ff) 205 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + {I_JMP, 1, {MEMORY|BITS16|RN_L16|FAR|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71669, 189, 1332}, + /* 1041 : JMP mem32|far [m: o32 ff /5 ] AR0,NWSIZE,OSIZE,386 */ + /* 321 001(ff) 205 : AR0,NWSIZE,OSIZE,386 */ + {I_JMP, 1, {MEMORY|BITS32|FAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71674, 204, 1333}, + /* 1042 : JMP mem64|far [m: o64 ff /5 ] AR0,NWSIZE,OSIZE,LONG,386,X86_64 */ + /* 324 001(ff) 205 : AR0,NWSIZE,OSIZE,LONG,PROT,X86_64 */ + {I_JMP, 1, {MEMORY|BITS64|FAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71679, 205, 1334}, + /* 1043 : JMP rm16 [m: nw o16 ff /4 ] AR0,OSIZE,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 320 001(ff) 204 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JMP, 1, {RM_GPR|BITS16|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67077, 194, 1337}, + /* 1044 : JMP rm32 [m: nw o32 ff /4 ] AR0,OSIZE,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 321 001(ff) 204 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JMP, 1, {RM_GPR|BITS32|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67083, 197, 1338}, + /* 1045 : JMP rm64 [m: nw o64 ff /4 ] AR0,OSIZE,LONG,BND,PROT,X86_64 */ + /* 327 324 001(ff) 204 : AR0,NWSIZE,OSIZE,LONG,BND,PROT,X86_64 */ + {I_JMP, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67089, 195, 1339}, + /* 1046 : JA imm16|near [i: jcc8 nw o16 77 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 370 327 320 001(77) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JA, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+55992, 208, 1344}, + /* 1047 : JC imm16|near [i: jcc8 nw o16 72 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 370 327 320 001(72) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JC, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56006, 208, 1344}, + /* 1048 : JG imm16|near [i: jcc8 nw o16 7f rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 370 327 320 001(7f) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JG, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56027, 208, 1344}, + /* 1049 : JL imm16|near [i: jcc8 nw o16 7c rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 370 327 320 001(7c) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JL, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56041, 208, 1344}, + /* 1050 : JNA imm16|near [i: jcc8 nw o16 76 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 370 327 320 001(76) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JNA, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56013, 208, 1344}, + /* 1051 : JNC imm16|near [i: jcc8 nw o16 73 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 370 327 320 001(73) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JNC, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+55999, 208, 1344}, + /* 1052 : JNG imm16|near [i: jcc8 nw o16 7e rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 370 327 320 001(7e) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JNG, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56048, 208, 1344}, + /* 1053 : JNL imm16|near [i: jcc8 nw o16 7d rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 370 327 320 001(7d) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JNL, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56034, 208, 1344}, + /* 1054 : JNO imm16|near [i: jcc8 nw o16 71 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 370 327 320 001(71) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JNO, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56062, 208, 1344}, + /* 1055 : JNS imm16|near [i: jcc8 nw o16 79 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 370 327 320 001(79) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JNS, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56076, 208, 1344}, + /* 1056 : JNZ imm16|near [i: jcc8 nw o16 75 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 370 327 320 001(75) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JNZ, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56055, 208, 1344}, + /* 1057 : JO imm16|near [i: jcc8 nw o16 70 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 370 327 320 001(70) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JO, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56083, 208, 1344}, + /* 1058 : JPE imm16|near [i: jcc8 nw o16 7a rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 370 327 320 001(7a) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JPE, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56090, 208, 1344}, + /* 1059 : JPO imm16|near [i: jcc8 nw o16 7b rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 370 327 320 001(7b) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JPO, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56069, 208, 1344}, + /* 1060 : JS imm16|near [i: jcc8 nw o16 78 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 370 327 320 001(78) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JS, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56097, 208, 1344}, + /* 1061 : JZ imm16|near [i: jcc8 nw o16 74 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 370 327 320 001(74) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JZ, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56020, 208, 1344}, + /* 1062 : JA imm32|near [i: jcc8 nw o32 77 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 370 327 321 001(77) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JA, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56104, 208, 1345}, + /* 1063 : JC imm32|near [i: jcc8 nw o32 72 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 370 327 321 001(72) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JC, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56118, 208, 1345}, + /* 1064 : JG imm32|near [i: jcc8 nw o32 7f rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 370 327 321 001(7f) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JG, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56139, 208, 1345}, + /* 1065 : JL imm32|near [i: jcc8 nw o32 7c rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 370 327 321 001(7c) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JL, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56153, 208, 1345}, + /* 1066 : JNA imm32|near [i: jcc8 nw o32 76 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 370 327 321 001(76) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JNA, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56125, 208, 1345}, + /* 1067 : JNC imm32|near [i: jcc8 nw o32 73 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 370 327 321 001(73) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JNC, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56111, 208, 1345}, + /* 1068 : JNG imm32|near [i: jcc8 nw o32 7e rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 370 327 321 001(7e) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JNG, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56160, 208, 1345}, + /* 1069 : JNL imm32|near [i: jcc8 nw o32 7d rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 370 327 321 001(7d) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JNL, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56146, 208, 1345}, + /* 1070 : JNO imm32|near [i: jcc8 nw o32 71 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 370 327 321 001(71) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JNO, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56174, 208, 1345}, + /* 1071 : JNS imm32|near [i: jcc8 nw o32 79 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 370 327 321 001(79) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JNS, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56188, 208, 1345}, + /* 1072 : JNZ imm32|near [i: jcc8 nw o32 75 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 370 327 321 001(75) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JNZ, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56167, 208, 1345}, + /* 1073 : JO imm32|near [i: jcc8 nw o32 70 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 370 327 321 001(70) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JO, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56195, 208, 1345}, + /* 1074 : JPE imm32|near [i: jcc8 nw o32 7a rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 370 327 321 001(7a) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JPE, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56202, 208, 1345}, + /* 1075 : JPO imm32|near [i: jcc8 nw o32 7b rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 370 327 321 001(7b) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JPO, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56181, 208, 1345}, + /* 1076 : JS imm32|near [i: jcc8 nw o32 78 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 370 327 321 001(78) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JS, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56209, 208, 1345}, + /* 1077 : JZ imm32|near [i: jcc8 nw o32 74 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 370 327 321 001(74) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_JZ, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56132, 208, 1345}, + /* 1078 : JA imm64|near [i: jcc8 nw o64 77 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 370 327 324 001(77) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JA, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56216, 209, 1346}, + /* 1079 : JC imm64|near [i: jcc8 nw o64 72 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 370 327 324 001(72) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JC, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56230, 209, 1346}, + /* 1080 : JG imm64|near [i: jcc8 nw o64 7f rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 370 327 324 001(7f) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JG, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56251, 209, 1346}, + /* 1081 : JL imm64|near [i: jcc8 nw o64 7c rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 370 327 324 001(7c) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JL, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56265, 209, 1346}, + /* 1082 : JNA imm64|near [i: jcc8 nw o64 76 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 370 327 324 001(76) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNA, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56237, 209, 1346}, + /* 1083 : JNC imm64|near [i: jcc8 nw o64 73 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 370 327 324 001(73) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNC, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56223, 209, 1346}, + /* 1084 : JNG imm64|near [i: jcc8 nw o64 7e rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 370 327 324 001(7e) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNG, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56272, 209, 1346}, + /* 1085 : JNL imm64|near [i: jcc8 nw o64 7d rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 370 327 324 001(7d) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNL, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56258, 209, 1346}, + /* 1086 : JNO imm64|near [i: jcc8 nw o64 71 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 370 327 324 001(71) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNO, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56286, 209, 1346}, + /* 1087 : JNS imm64|near [i: jcc8 nw o64 79 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 370 327 324 001(79) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNS, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56300, 209, 1346}, + /* 1088 : JNZ imm64|near [i: jcc8 nw o64 75 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 370 327 324 001(75) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNZ, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56279, 209, 1346}, + /* 1089 : JO imm64|near [i: jcc8 nw o64 70 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 370 327 324 001(70) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JO, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56307, 209, 1346}, + /* 1090 : JPE imm64|near [i: jcc8 nw o64 7a rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 370 327 324 001(7a) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JPE, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56314, 209, 1346}, + /* 1091 : JPO imm64|near [i: jcc8 nw o64 7b rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 370 327 324 001(7b) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JPO, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56293, 209, 1346}, + /* 1092 : JS imm64|near [i: jcc8 nw o64 78 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 370 327 324 001(78) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JS, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56321, 209, 1346}, + /* 1093 : JZ imm64|near [i: jcc8 nw o64 74 rel8 ] AR0,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 370 327 324 001(74) 050 : AR0,NWSIZE,OSIZE,JMP_RELAX,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JZ, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56244, 209, 1346}, + /* 1094 : JA imm16|near [i: nw o16 0f 87 rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 320 355 001(87) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JA, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56328, 211, 1348}, + /* 1095 : JC imm16|near [i: nw o16 0f 82 rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 320 355 001(82) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JC, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56342, 211, 1348}, + /* 1096 : JG imm16|near [i: nw o16 0f 8f rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 320 355 001(8f) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JG, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56363, 211, 1348}, + /* 1097 : JL imm16|near [i: nw o16 0f 8c rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 320 355 001(8c) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JL, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56377, 211, 1348}, + /* 1098 : JNA imm16|near [i: nw o16 0f 86 rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 320 355 001(86) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JNA, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56349, 211, 1348}, + /* 1099 : JNC imm16|near [i: nw o16 0f 83 rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 320 355 001(83) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JNC, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56335, 211, 1348}, + /* 1100 : JNG imm16|near [i: nw o16 0f 8e rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 320 355 001(8e) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JNG, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56384, 211, 1348}, + /* 1101 : JNL imm16|near [i: nw o16 0f 8d rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 320 355 001(8d) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JNL, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56370, 211, 1348}, + /* 1102 : JNO imm16|near [i: nw o16 0f 81 rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 320 355 001(81) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JNO, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56398, 211, 1348}, + /* 1103 : JNS imm16|near [i: nw o16 0f 89 rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 320 355 001(89) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JNS, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56412, 211, 1348}, + /* 1104 : JNZ imm16|near [i: nw o16 0f 85 rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 320 355 001(85) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JNZ, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56391, 211, 1348}, + /* 1105 : JO imm16|near [i: nw o16 0f 80 rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 320 355 001(80) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JO, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56419, 211, 1348}, + /* 1106 : JPE imm16|near [i: nw o16 0f 8a rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 320 355 001(8a) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JPE, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56426, 211, 1348}, + /* 1107 : JPO imm16|near [i: nw o16 0f 8b rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 320 355 001(8b) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JPO, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56405, 211, 1348}, + /* 1108 : JS imm16|near [i: nw o16 0f 88 rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 320 355 001(88) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JS, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56433, 211, 1348}, + /* 1109 : JZ imm16|near [i: nw o16 0f 84 rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 320 355 001(84) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JZ, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56356, 211, 1348}, + /* 1110 : JA imm32|near [i: nw o32 0f 87 rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 321 355 001(87) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JA, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56440, 211, 1349}, + /* 1111 : JC imm32|near [i: nw o32 0f 82 rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 321 355 001(82) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JC, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56454, 211, 1349}, + /* 1112 : JG imm32|near [i: nw o32 0f 8f rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 321 355 001(8f) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JG, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56475, 211, 1349}, + /* 1113 : JL imm32|near [i: nw o32 0f 8c rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 321 355 001(8c) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JL, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56489, 211, 1349}, + /* 1114 : JNA imm32|near [i: nw o32 0f 86 rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 321 355 001(86) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JNA, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56461, 211, 1349}, + /* 1115 : JNC imm32|near [i: nw o32 0f 83 rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 321 355 001(83) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JNC, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56447, 211, 1349}, + /* 1116 : JNG imm32|near [i: nw o32 0f 8e rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 321 355 001(8e) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JNG, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56496, 211, 1349}, + /* 1117 : JNL imm32|near [i: nw o32 0f 8d rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 321 355 001(8d) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JNL, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56482, 211, 1349}, + /* 1118 : JNO imm32|near [i: nw o32 0f 81 rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 321 355 001(81) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JNO, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56510, 211, 1349}, + /* 1119 : JNS imm32|near [i: nw o32 0f 89 rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 321 355 001(89) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JNS, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56524, 211, 1349}, + /* 1120 : JNZ imm32|near [i: nw o32 0f 85 rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 321 355 001(85) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JNZ, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56503, 211, 1349}, + /* 1121 : JO imm32|near [i: nw o32 0f 80 rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 321 355 001(80) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JO, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56531, 211, 1349}, + /* 1122 : JPE imm32|near [i: nw o32 0f 8a rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 321 355 001(8a) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JPE, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56538, 211, 1349}, + /* 1123 : JPO imm32|near [i: nw o32 0f 8b rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 321 355 001(8b) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JPO, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56517, 211, 1349}, + /* 1124 : JS imm32|near [i: nw o32 0f 88 rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 321 355 001(88) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JS, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56545, 211, 1349}, + /* 1125 : JZ imm32|near [i: nw o32 0f 84 rel ] AR0,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 321 355 001(84) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOREX,NOAPX,NOLONG,BND,386 */ + {I_JZ, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56468, 211, 1349}, + /* 1126 : JA imm64|near [i: nw o64 0f 87 rel ] AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 355 001(87) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JA, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56552, 207, 1350}, + /* 1127 : JC imm64|near [i: nw o64 0f 82 rel ] AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 355 001(82) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JC, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56566, 207, 1350}, + /* 1128 : JG imm64|near [i: nw o64 0f 8f rel ] AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 355 001(8f) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JG, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56587, 207, 1350}, + /* 1129 : JL imm64|near [i: nw o64 0f 8c rel ] AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 355 001(8c) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JL, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56601, 207, 1350}, + /* 1130 : JNA imm64|near [i: nw o64 0f 86 rel ] AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 355 001(86) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNA, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56573, 207, 1350}, + /* 1131 : JNC imm64|near [i: nw o64 0f 83 rel ] AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 355 001(83) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNC, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56559, 207, 1350}, + /* 1132 : JNG imm64|near [i: nw o64 0f 8e rel ] AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 355 001(8e) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNG, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56608, 207, 1350}, + /* 1133 : JNL imm64|near [i: nw o64 0f 8d rel ] AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 355 001(8d) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNL, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56594, 207, 1350}, + /* 1134 : JNO imm64|near [i: nw o64 0f 81 rel ] AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 355 001(81) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNO, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56622, 207, 1350}, + /* 1135 : JNS imm64|near [i: nw o64 0f 89 rel ] AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 355 001(89) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNS, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56636, 207, 1350}, + /* 1136 : JNZ imm64|near [i: nw o64 0f 85 rel ] AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 355 001(85) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JNZ, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56615, 207, 1350}, + /* 1137 : JO imm64|near [i: nw o64 0f 80 rel ] AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 355 001(80) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JO, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56643, 207, 1350}, + /* 1138 : JPE imm64|near [i: nw o64 0f 8a rel ] AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 355 001(8a) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JPE, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56650, 207, 1350}, + /* 1139 : JPO imm64|near [i: nw o64 0f 8b rel ] AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 355 001(8b) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JPO, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56629, 207, 1350}, + /* 1140 : JS imm64|near [i: nw o64 0f 88 rel ] AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 355 001(88) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JS, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56657, 207, 1350}, + /* 1141 : JZ imm64|near [i: nw o64 0f 84 rel ] AR0,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 355 001(84) 064 : AR0,NWSIZE,OSIZE,JCC_HINT,NOAPX,LONG,BND,PROT,X86_64 */ + {I_JZ, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56580, 207, 1350}, + /* 1142 : JCXZ imm16|near|short [i: a16 nw o16 e3 rel8 ] AR0,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + /* 310 327 320 001(e3) 050 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + {I_JCXZ, 1, {IMM_NORMAL|BITS16|NEAR|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56776, 189, 1358}, + /* 1143 : JECXZ imm16|near|short [i: a32 nw o16 e3 rel8 ] AR0,OSIZE,NOREX,NOAPX,NOLONG,386 */ + /* 311 327 320 001(e3) 050 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,386 */ + {I_JECXZ, 1, {IMM_NORMAL|BITS16|NEAR|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56783, 214, 1359}, + /* 1144 : JCXZ imm32|near|short [i: a16 nw o32 e3 rel8 ] AR0,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + /* 310 327 321 001(e3) 050 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + {I_JCXZ, 1, {IMM_NORMAL|BITS32|NEAR|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56790, 189, 1360}, + /* 1145 : JECXZ imm32|near|short [i: a32 nw o32 e3 rel8 ] AR0,OSIZE,NOREX,NOAPX,NOLONG,386 */ + /* 311 327 321 001(e3) 050 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,386 */ + {I_JECXZ, 1, {IMM_NORMAL|BITS32|NEAR|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56797, 214, 1361}, + /* 1146 : JECXZ imm64|near|short [i: a32 nw o64 e3 rel8 ] AR0,OSIZE,NOAPX,LONG,PROT,X86_64 */ + /* 311 327 324 001(e3) 050 : AR0,NWSIZE,OSIZE,NOAPX,LONG,PROT,X86_64 */ + {I_JECXZ, 1, {IMM_NORMAL|BITS64|NEAR|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56804, 190, 1362}, + /* 1147 : JRCXZ imm64|near|short [i: a64 nw o64 e3 rel8 ] AR0,OSIZE,NOAPX,LONG,PROT,X86_64 */ + /* 313 327 324 001(e3) 050 : AR0,NWSIZE,OSIZE,NOAPX,LONG,PROT,X86_64 */ + {I_JRCXZ, 1, {IMM_NORMAL|BITS64|NEAR|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56811, 190, 1363}, + /* 1148 : LOOP imm16|near|short [i: asm nw o16 e2 rel8 ] AR0,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + /* 312 327 320 001(e2) 050 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + {I_LOOP, 1, {IMM_NORMAL|BITS16|NEAR|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56818, 189, 1371}, + /* 1149 : LOOP imm32|near|short [i: asm nw o32 e2 rel8 ] AR0,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + /* 312 327 321 001(e2) 050 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + {I_LOOP, 1, {IMM_NORMAL|BITS32|NEAR|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56839, 189, 1374}, + /* 1150 : LOOP imm64|near|short [i: asm nw o64 e2 rel8 ] AR0,OSIZE,NOAPX,LONG,PROT,X86_64 */ + /* 312 327 324 001(e2) 050 : AR0,NWSIZE,OSIZE,NOAPX,LONG,PROT,X86_64 */ + {I_LOOP, 1, {IMM_NORMAL|BITS64|NEAR|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56860, 190, 1377}, + /* 1151 : LOOPE imm16|near|short [i: asm nw o16 e1 rel8 ] AR0,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + /* 312 327 320 001(e1) 050 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + {I_LOOPE, 1, {IMM_NORMAL|BITS16|NEAR|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56881, 189, 1380}, + /* 1152 : LOOPE imm32|near|short [i: asm nw o32 e1 rel8 ] AR0,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + /* 312 327 321 001(e1) 050 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + {I_LOOPE, 1, {IMM_NORMAL|BITS32|NEAR|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56902, 189, 1383}, + /* 1153 : LOOPE imm64|near|short [i: asm nw o64 e1 rel8 ] AR0,OSIZE,NOAPX,LONG,PROT,X86_64 */ + /* 312 327 324 001(e1) 050 : AR0,NWSIZE,OSIZE,NOAPX,LONG,PROT,X86_64 */ + {I_LOOPE, 1, {IMM_NORMAL|BITS64|NEAR|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56923, 190, 1386}, + /* 1154 : LOOPNE imm16|near|short [i: asm nw o16 e0 rel8 ] AR0,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + /* 312 327 320 001(e0) 050 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + {I_LOOPNE, 1, {IMM_NORMAL|BITS16|NEAR|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56944, 189, 1389}, + /* 1155 : LOOPNE imm32|near|short [i: asm nw o32 e0 rel8 ] AR0,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + /* 312 327 321 001(e0) 050 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + {I_LOOPNE, 1, {IMM_NORMAL|BITS32|NEAR|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56965, 189, 1392}, + /* 1156 : LOOPNE imm64|near|short [i: asm nw o64 e0 rel8 ] AR0,OSIZE,NOAPX,LONG,PROT,X86_64 */ + /* 312 327 324 001(e0) 050 : AR0,NWSIZE,OSIZE,NOAPX,LONG,PROT,X86_64 */ + {I_LOOPNE, 1, {IMM_NORMAL|BITS64|NEAR|SHORT,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+56986, 190, 1395}, + /* 1157 : LOOP imm16|near|short,reg_cx [i-: a16 nw o16 e2 rel8 ] AR0-1,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + /* 310 327 320 001(e2) 050 : AR0,AR1,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + {I_LOOP, 2, {IMM_NORMAL|BITS16|NEAR|SHORT,REG_CX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+56825, 215, 1416}, + /* 1158 : LOOP imm16|near|short,reg_ecx [i-: a32 nw o16 e2 rel8 ] AR0-1,OSIZE,NOREX,NOAPX,NOLONG,386 */ + /* 311 327 320 001(e2) 050 : AR0,AR1,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,386 */ + {I_LOOP, 2, {IMM_NORMAL|BITS16|NEAR|SHORT,REG_ECX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+56832, 216, 1417}, + /* 1159 : LOOP imm32|near|short,reg_cx [i-: a16 nw o32 e2 rel8 ] AR0-1,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + /* 310 327 321 001(e2) 050 : AR0,AR1,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + {I_LOOP, 2, {IMM_NORMAL|BITS32|NEAR|SHORT,REG_CX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+56846, 215, 1418}, + /* 1160 : LOOP imm32|near|short,reg_ecx [i-: a32 nw o32 e2 rel8 ] AR0-1,OSIZE,NOREX,NOAPX,NOLONG,386 */ + /* 311 327 321 001(e2) 050 : AR0,AR1,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,386 */ + {I_LOOP, 2, {IMM_NORMAL|BITS32|NEAR|SHORT,REG_ECX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+56853, 216, 1419}, + /* 1161 : LOOP imm64|near|short,reg_ecx [i-: a32 nw o64 e2 rel8 ] AR0-1,OSIZE,NOAPX,LONG,PROT,X86_64 */ + /* 311 327 324 001(e2) 050 : AR0,AR1,NWSIZE,OSIZE,NOAPX,LONG,PROT,X86_64 */ + {I_LOOP, 2, {IMM_NORMAL|BITS64|NEAR|SHORT,REG_ECX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+56867, 217, 1420}, + /* 1162 : LOOP imm64|near|short,reg_rcx [i-: a64 nw o64 e2 rel8 ] AR0-1,OSIZE,NOAPX,LONG,PROT,X86_64 */ + /* 313 327 324 001(e2) 050 : AR0,AR1,NWSIZE,OSIZE,NOAPX,LONG,PROT,X86_64 */ + {I_LOOP, 2, {IMM_NORMAL|BITS64|NEAR|SHORT,REG_RCX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+56874, 217, 1421}, + /* 1163 : LOOPE imm16|near|short,reg_cx [i-: a16 nw o16 e1 rel8 ] AR0-1,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + /* 310 327 320 001(e1) 050 : AR0,AR1,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + {I_LOOPE, 2, {IMM_NORMAL|BITS16|NEAR|SHORT,REG_CX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+56888, 215, 1422}, + /* 1164 : LOOPE imm16|near|short,reg_ecx [i-: a32 nw o16 e1 rel8 ] AR0-1,OSIZE,NOREX,NOAPX,NOLONG,386 */ + /* 311 327 320 001(e1) 050 : AR0,AR1,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,386 */ + {I_LOOPE, 2, {IMM_NORMAL|BITS16|NEAR|SHORT,REG_ECX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+56895, 216, 1423}, + /* 1165 : LOOPE imm32|near|short,reg_cx [i-: a16 nw o32 e1 rel8 ] AR0-1,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + /* 310 327 321 001(e1) 050 : AR0,AR1,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + {I_LOOPE, 2, {IMM_NORMAL|BITS32|NEAR|SHORT,REG_CX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+56909, 215, 1424}, + /* 1166 : LOOPE imm32|near|short,reg_ecx [i-: a32 nw o32 e1 rel8 ] AR0-1,OSIZE,NOREX,NOAPX,NOLONG,386 */ + /* 311 327 321 001(e1) 050 : AR0,AR1,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,386 */ + {I_LOOPE, 2, {IMM_NORMAL|BITS32|NEAR|SHORT,REG_ECX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+56916, 216, 1425}, + /* 1167 : LOOPE imm64|near|short,reg_ecx [i-: a32 nw o64 e1 rel8 ] AR0-1,OSIZE,NOAPX,LONG,PROT,X86_64 */ + /* 311 327 324 001(e1) 050 : AR0,AR1,NWSIZE,OSIZE,NOAPX,LONG,PROT,X86_64 */ + {I_LOOPE, 2, {IMM_NORMAL|BITS64|NEAR|SHORT,REG_ECX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+56930, 217, 1426}, + /* 1168 : LOOPE imm64|near|short,reg_rcx [i-: a64 nw o64 e1 rel8 ] AR0-1,OSIZE,NOAPX,LONG,PROT,X86_64 */ + /* 313 327 324 001(e1) 050 : AR0,AR1,NWSIZE,OSIZE,NOAPX,LONG,PROT,X86_64 */ + {I_LOOPE, 2, {IMM_NORMAL|BITS64|NEAR|SHORT,REG_RCX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+56937, 217, 1427}, + /* 1169 : LOOPNE imm16|near|short,reg_cx [i-: a16 nw o16 e0 rel8 ] AR0-1,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + /* 310 327 320 001(e0) 050 : AR0,AR1,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + {I_LOOPNE, 2, {IMM_NORMAL|BITS16|NEAR|SHORT,REG_CX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+56951, 215, 1428}, + /* 1170 : LOOPNE imm16|near|short,reg_ecx [i-: a32 nw o16 e0 rel8 ] AR0-1,OSIZE,NOREX,NOAPX,NOLONG,386 */ + /* 311 327 320 001(e0) 050 : AR0,AR1,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,386 */ + {I_LOOPNE, 2, {IMM_NORMAL|BITS16|NEAR|SHORT,REG_ECX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+56958, 216, 1429}, + /* 1171 : LOOPNE imm32|near|short,reg_cx [i-: a16 nw o32 e0 rel8 ] AR0-1,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + /* 310 327 321 001(e0) 050 : AR0,AR1,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + {I_LOOPNE, 2, {IMM_NORMAL|BITS32|NEAR|SHORT,REG_CX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+56972, 215, 1430}, + /* 1172 : LOOPNE imm32|near|short,reg_ecx [i-: a32 nw o32 e0 rel8 ] AR0-1,OSIZE,NOREX,NOAPX,NOLONG,386 */ + /* 311 327 321 001(e0) 050 : AR0,AR1,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,386 */ + {I_LOOPNE, 2, {IMM_NORMAL|BITS32|NEAR|SHORT,REG_ECX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+56979, 216, 1431}, + /* 1173 : LOOPNE imm64|near|short,reg_ecx [i-: a32 nw o64 e0 rel8 ] AR0-1,OSIZE,NOAPX,LONG,PROT,X86_64 */ + /* 311 327 324 001(e0) 050 : AR0,AR1,NWSIZE,OSIZE,NOAPX,LONG,PROT,X86_64 */ + {I_LOOPNE, 2, {IMM_NORMAL|BITS64|NEAR|SHORT,REG_ECX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+56993, 217, 1432}, + /* 1174 : LOOPNE imm64|near|short,reg_rcx [i-: a64 nw o64 e0 rel8 ] AR0-1,OSIZE,NOAPX,LONG,PROT,X86_64 */ + /* 313 327 324 001(e0) 050 : AR0,AR1,NWSIZE,OSIZE,NOAPX,LONG,PROT,X86_64 */ + {I_LOOPNE, 2, {IMM_NORMAL|BITS64|NEAR|SHORT,REG_RCX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+57000, 217, 1433}, + /* 1175 : LOOPZ imm16|near|short,reg_cx [i-: a16 nw o16 e1 rel8 ] AR0-1,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + /* 310 327 320 001(e1) 050 : AR0,AR1,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + {I_LOOPZ, 2, {IMM_NORMAL|BITS16|NEAR|SHORT,REG_CX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+56888, 215, 1434}, + /* 1176 : LOOPZ imm16|near|short,reg_ecx [i-: a32 nw o16 e1 rel8 ] AR0-1,OSIZE,NOREX,NOAPX,NOLONG,386 */ + /* 311 327 320 001(e1) 050 : AR0,AR1,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,386 */ + {I_LOOPZ, 2, {IMM_NORMAL|BITS16|NEAR|SHORT,REG_ECX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+56895, 216, 1435}, + /* 1177 : LOOPZ imm32|near|short,reg_cx [i-: a16 nw o32 e1 rel8 ] AR0-1,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + /* 310 327 321 001(e1) 050 : AR0,AR1,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + {I_LOOPZ, 2, {IMM_NORMAL|BITS32|NEAR|SHORT,REG_CX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+56909, 215, 1436}, + /* 1178 : LOOPZ imm32|near|short,reg_ecx [i-: a32 nw o32 e1 rel8 ] AR0-1,OSIZE,NOREX,NOAPX,NOLONG,386 */ + /* 311 327 321 001(e1) 050 : AR0,AR1,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,386 */ + {I_LOOPZ, 2, {IMM_NORMAL|BITS32|NEAR|SHORT,REG_ECX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+56916, 216, 1437}, + /* 1179 : LOOPZ imm64|near|short,reg_ecx [i-: a32 nw o64 e1 rel8 ] AR0-1,OSIZE,NOAPX,LONG,PROT,X86_64 */ + /* 311 327 324 001(e1) 050 : AR0,AR1,NWSIZE,OSIZE,NOAPX,LONG,PROT,X86_64 */ + {I_LOOPZ, 2, {IMM_NORMAL|BITS64|NEAR|SHORT,REG_ECX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+56930, 217, 1438}, + /* 1180 : LOOPZ imm64|near|short,reg_rcx [i-: a64 nw o64 e1 rel8 ] AR0-1,OSIZE,NOAPX,LONG,PROT,X86_64 */ + /* 313 327 324 001(e1) 050 : AR0,AR1,NWSIZE,OSIZE,NOAPX,LONG,PROT,X86_64 */ + {I_LOOPZ, 2, {IMM_NORMAL|BITS64|NEAR|SHORT,REG_RCX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+56937, 217, 1439}, + /* 1181 : LOOPNZ imm16|near|short,reg_cx [i-: a16 nw o16 e0 rel8 ] AR0-1,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + /* 310 327 320 001(e0) 050 : AR0,AR1,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + {I_LOOPNZ, 2, {IMM_NORMAL|BITS16|NEAR|SHORT,REG_CX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+56951, 215, 1440}, + /* 1182 : LOOPNZ imm16|near|short,reg_ecx [i-: a32 nw o16 e0 rel8 ] AR0-1,OSIZE,NOREX,NOAPX,NOLONG,386 */ + /* 311 327 320 001(e0) 050 : AR0,AR1,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,386 */ + {I_LOOPNZ, 2, {IMM_NORMAL|BITS16|NEAR|SHORT,REG_ECX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+56958, 216, 1441}, + /* 1183 : LOOPNZ imm32|near|short,reg_cx [i-: a16 nw o32 e0 rel8 ] AR0-1,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + /* 310 327 321 001(e0) 050 : AR0,AR1,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + {I_LOOPNZ, 2, {IMM_NORMAL|BITS32|NEAR|SHORT,REG_CX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+56972, 215, 1442}, + /* 1184 : LOOPNZ imm32|near|short,reg_ecx [i-: a32 nw o32 e0 rel8 ] AR0-1,OSIZE,NOREX,NOAPX,NOLONG,386 */ + /* 311 327 321 001(e0) 050 : AR0,AR1,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,386 */ + {I_LOOPNZ, 2, {IMM_NORMAL|BITS32|NEAR|SHORT,REG_ECX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+56979, 216, 1443}, + /* 1185 : LOOPNZ imm64|near|short,reg_ecx [i-: a32 nw o64 e0 rel8 ] AR0-1,OSIZE,NOAPX,LONG,PROT,X86_64 */ + /* 311 327 324 001(e0) 050 : AR0,AR1,NWSIZE,OSIZE,NOAPX,LONG,PROT,X86_64 */ + {I_LOOPNZ, 2, {IMM_NORMAL|BITS64|NEAR|SHORT,REG_ECX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+56993, 217, 1444}, + /* 1186 : LOOPNZ imm64|near|short,reg_rcx [i-: a64 nw o64 e0 rel8 ] AR0-1,OSIZE,NOAPX,LONG,PROT,X86_64 */ + /* 313 327 324 001(e0) 050 : AR0,AR1,NWSIZE,OSIZE,NOAPX,LONG,PROT,X86_64 */ + {I_LOOPNZ, 2, {IMM_NORMAL|BITS64|NEAR|SHORT,REG_RCX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+57000, 217, 1445}, + /* 1187 : JMPE imm16|near [i: norep o16 0f b8 iw ] AR0,OSIZE,IA64 */ + /* 331 320 355 001(b8) 030 : AR0,OSIZE,IA64 */ + {I_JMPE, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57007, 218, 1456}, + /* 1188 : JMPE imm32|near [i: norep o32 0f b8 id ] AR0,OSIZE,IA64 */ + /* 331 321 355 001(b8) 040 : AR0,OSIZE,IA64 */ + {I_JMPE, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57014, 218, 1457}, + /* 1189 : JMPE sdword64|near [i: norep o64 0f b8 iq ] AR0,OSIZE,LONG,IA64,X86_64 */ + /* 331 324 355 001(b8) 054 : AR0,OSIZE,LONG,PROT,X86_64 */ + {I_JMPE, 1, {SDWORD|BITS64|IMM_NORMAL|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57021, 219, 1458}, + /* 1190 : JMPE rm16|near [m: norep o16 0f 00 /6 ] AR0,OSIZE,IA64 */ + /* 331 320 355 001(00) 206 : AR0,OSIZE,IA64 */ + {I_JMPE, 1, {RM_GPR|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57028, 218, 1459}, + /* 1191 : JMPE rm32|near [m: norep o32 0f 00 /6 ] AR0,OSIZE,IA64 */ + /* 331 321 355 001(00) 206 : AR0,OSIZE,IA64 */ + {I_JMPE, 1, {RM_GPR|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57035, 218, 1460}, + /* 1192 : JMPE rm64|near [m: norep o64 0f 00 /6 ] AR0,OSIZE,LONG,PROT,X86_64 */ + /* 331 324 355 001(00) 206 : AR0,OSIZE,LONG,PROT,X86_64 */ + {I_JMPE, 1, {RM_GPR|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57042, 219, 1461}, + /* 1193 : JMPE rm16 [m: norep o16 0f 00 /6 ] AR0,OSIZE,IA64 */ + /* 331 320 355 001(00) 206 : AR0,OSIZE,IA64 */ + {I_JMPE, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57028, 218, 1462}, + /* 1194 : JMPE rm32 [m: norep o32 0f 00 /6 ] AR0,OSIZE,IA64 */ + /* 331 321 355 001(00) 206 : AR0,OSIZE,IA64 */ + {I_JMPE, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57035, 218, 1463}, + /* 1195 : JMPE rm64 [m: norep o64 0f 00 /6 ] AR0,OSIZE,LONG,PROT,X86_64 */ + /* 331 324 355 001(00) 206 : AR0,OSIZE,LONG,PROT,X86_64 */ + {I_JMPE, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57042, 219, 1464}, + /* 1196 : CALL imm16|near [i: nw o16 e8 rel ] AR0,OSIZE,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 320 001(e8) 064 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_CALL, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67119, 194, 1467}, + /* 1197 : CALL imm32|near [i: nw o32 e8 rel ] AR0,OSIZE,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 321 001(e8) 064 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_CALL, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67125, 194, 1468}, + /* 1198 : CALL imm64|near [i: nw o64 e8 rel ] AR0,OSIZE,NOAPX,LONG,BND,PROT,X86_64 */ + /* 327 324 001(e8) 064 : AR0,NWSIZE,OSIZE,NOAPX,LONG,BND,PROT,X86_64 */ + {I_CALL, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67131, 220, 1469}, + /* 1199 : CALL rm16|near [m: nw o16 ff /2 ] AR0,OSIZE,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 320 001(ff) 202 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_CALL, 1, {RM_GPR|BITS16|RN_L16|NEAR|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67137, 194, 1471}, + /* 1200 : CALL rm32|near [m: nw o32 ff /2 ] AR0,OSIZE,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 321 001(ff) 202 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,BND,386 */ + {I_CALL, 1, {RM_GPR|BITS32|RN_L16|NEAR|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67143, 197, 1472}, + /* 1201 : CALL rm64|near [m: nw o64 ff /2 ] LONG,BND,PROT,X86_64 */ + /* 327 324 001(ff) 202 : NWSIZE,LONG,BND,PROT,X86_64 */ + {I_CALL, 1, {RM_GPR|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67149, 222, 1473}, + /* 1202 : CALL imm16:imm16 [ji: o16 9a iw iw ] AR1,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + /* 320 001(9a) 031 030 : AR1,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + {I_CALL, 2, {IMM_NORMAL|BITS16|COLON,IMM_NORMAL|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+67167, 202, 1483}, + /* 1203 : CALL imm16:imm32 [ji: o32 9a id iw ] AR1,OSIZE,NOREX,NOAPX,NOLONG,386 */ + /* 321 001(9a) 041 030 : AR1,OSIZE,NOREX,NOAPX,NOLONG,386 */ + {I_CALL, 2, {IMM_NORMAL|BITS16|COLON,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+67173, 203, 1484}, + /* 1204 : CALL mem16|far [m: o16 ff /3 ] AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + /* 320 001(ff) 203 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,8086 */ + {I_CALL, 1, {MEMORY|BITS16|RN_L16|FAR|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71684, 189, 1489}, + /* 1205 : CALL mem32|far [m: o32 ff /3 ] AR0,NWSIZE,OSIZE,386 */ + /* 321 001(ff) 203 : AR0,NWSIZE,OSIZE,386 */ + {I_CALL, 1, {MEMORY|BITS32|FAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71689, 204, 1490}, + /* 1206 : CALL mem64|far [m: o64 ff /3 ] AR0,NWSIZE,OSIZE,LONG,386,X86_64 */ + /* 324 001(ff) 203 : AR0,NWSIZE,OSIZE,LONG,PROT,X86_64 */ + {I_CALL, 1, {MEMORY|BITS64|FAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71694, 205, 1491}, + /* 1207 : CALL rm16 [m: nw o16 ff /2 ] AR0,OSIZE,NOREX,NOAPX,NOLONG,BND,8086 */ + /* 327 320 001(ff) 202 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,BND,8086 */ + {I_CALL, 1, {RM_GPR|BITS16|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67137, 194, 1494}, + /* 1208 : CALL rm32 [m: nw o32 ff /2 ] AR0,OSIZE,NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 321 001(ff) 202 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,BND,386 */ + {I_CALL, 1, {RM_GPR|BITS32|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67143, 197, 1495}, + /* 1209 : CALL rm64 [m: nw o64 ff /2 ] LONG,BND,PROT,X86_64 */ + /* 327 324 001(ff) 202 : NWSIZE,LONG,BND,PROT,X86_64 */ + {I_CALL, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67149, 222, 1496}, + /* 1210 : RET void [ nw odf c3 ] BND,8086 */ + /* 327 322 001(c3) : NWSIZE,BND,8086 */ + {I_RET, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71699, 223, 1498}, + /* 1211 : RETW void [ nw o16 c3 ] BND,8086 */ + /* 327 320 001(c3) : NWSIZE,BND,8086 */ + {I_RETW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71704, 223, 1499}, + /* 1212 : RETD void [ nw o32 c3 ] NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 321 001(c3) : NWSIZE,NOREX,NOAPX,NOLONG,BND,386 */ + {I_RETD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71709, 224, 1500}, + /* 1213 : RETQ void [ nw o64 c3 ] LONG,BND,386,X86_64 */ + /* 327 324 001(c3) : NWSIZE,LONG,BND,PROT,X86_64 */ + {I_RETQ, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71714, 222, 1501}, + /* 1214 : RET imm16 [i: nw odf c2 iw ] BND,8086 */ + /* 327 322 001(c2) 030 : NWSIZE,BND,8086 */ + {I_RET, 1, {IMM_NORMAL|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67179, 223, 1502}, + /* 1215 : RETW imm16 [i: nw o16 c2 iw ] BND,8086 */ + /* 327 320 001(c2) 030 : NWSIZE,BND,8086 */ + {I_RETW, 1, {IMM_NORMAL|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67185, 223, 1503}, + /* 1216 : RETD imm16 [i: nw o32 c2 iw ] NOREX,NOAPX,NOLONG,BND,386 */ + /* 327 321 001(c2) 030 : NWSIZE,NOREX,NOAPX,NOLONG,BND,386 */ + {I_RETD, 1, {IMM_NORMAL|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67191, 224, 1504}, + /* 1217 : RETQ imm16 [i: nw o64 c2 iw ] LONG,BND,386,X86_64 */ + /* 327 324 001(c2) 030 : NWSIZE,LONG,BND,PROT,X86_64 */ + {I_RETQ, 1, {IMM_NORMAL|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67197, 222, 1505}, + /* 1218 : RETF void [ odf cb ] 8086 */ + /* 322 001(cb) : 8086 */ + {I_RETF, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72740, 23, 1506}, + /* 1219 : RETFW void [ o16 cb ] 8086 */ + /* 320 001(cb) : 8086 */ + {I_RETFW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72744, 23, 1507}, + /* 1220 : RETFD void [ o32 cb ] 386 */ + /* 321 001(cb) : 386 */ + {I_RETFD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72748, 3, 1508}, + /* 1221 : RETFQ void [ o64 cb ] LONG,386,X86_64 */ + /* 324 001(cb) : LONG,PROT,X86_64 */ + {I_RETFQ, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72752, 24, 1509}, + /* 1222 : RETF imm16 [i: odf ca iw ] 8086 */ + /* 322 001(ca) 030 : 8086 */ + {I_RETF, 1, {IMM_NORMAL|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71719, 23, 1510}, + /* 1223 : RETFW imm16 [i: o16 ca iw ] 8086 */ + /* 320 001(ca) 030 : 8086 */ + {I_RETFW, 1, {IMM_NORMAL|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71724, 23, 1511}, + /* 1224 : RETFD imm16 [i: o32 ca iw ] 386 */ + /* 321 001(ca) 030 : 386 */ + {I_RETFD, 1, {IMM_NORMAL|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71729, 3, 1512}, + /* 1225 : RETFQ imm16 [i: o64 ca iw ] LONG,386,X86_64 */ + /* 324 001(ca) 030 : LONG,PROT,X86_64 */ + {I_RETFQ, 1, {IMM_NORMAL|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71734, 24, 1513}, + /* 1226 : INT imm8 [i: cd ib,u ] 8086 */ + /* 001(cd) 024 : 8086 */ + {I_INT, 1, {IMM_NORMAL|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72756, 23, 1524}, + /* 1227 : INT1 void [ f1 ] 386 */ + /* 001(f1) : 386 */ + {I_INT1, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73457, 3, 1525}, + /* 1228 : INT3 void [ cc ] 8086 */ + /* 001(cc) : 8086 */ + {I_INT3, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73460, 23, 1528}, + /* 1229 : INTO void [ ce ] NOREX,NOAPX,NOLONG,8086 */ + /* 001(ce) : NOREX,NOAPX,NOLONG,8086 */ + {I_INTO, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73463, 225, 1531}, + /* 1230 : SYSCALL void [ 0f 05 ] P6,AMD */ + /* 355 001(05) : P6,AMD */ + {I_SYSCALL, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72760, 226, 1533}, + /* 1231 : SYSENTER void [ 0f 34 ] NOAPX,P6 */ + /* 355 001(34) : NOAPX,P6 */ + {I_SYSENTER, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72764, 227, 1534}, + /* 1232 : SYSEXIT void [ 0f 35 ] NOAPX,PRIV,P6 */ + /* 355 001(35) : NOAPX,PRIV,P6 */ + {I_SYSEXIT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72768, 228, 1536}, + /* 1233 : SYSRET void [ 0f 07 ] PRIV,P6,AMD */ + /* 355 001(07) : PRIV,P6,AMD */ + {I_SYSRET, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72772, 229, 1537}, + /* 1234 : IRET void [ odf cf ] FL,8086 */ + /* 322 001(cf) : FL,8086 */ + {I_IRET, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72776, 56, 1539}, + /* 1235 : IRETW void [ o16 cf ] FL,8086 */ + /* 320 001(cf) : FL,8086 */ + {I_IRETW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72780, 56, 1540}, + /* 1236 : IRETD void [ o32 cf ] FL,386 */ + /* 321 001(cf) : FL,386 */ + {I_IRETD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72784, 57, 1541}, + /* 1237 : IRETQ void [ o64 cf ] LONG,FL,386,X86_64 */ + /* 324 001(cf) : LONG,FL,PROT,X86_64 */ + {I_IRETQ, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72788, 58, 1542}, + /* 1238 : ERETS void [ f2 0f 01 ca ] LONG,PRIV,PROT,FRED,X86_64 */ + /* 332 355 002(01 ca) : LONG,PRIV,PROT,FRED,X86_64 */ + {I_ERETS, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67203, 230, 1544}, + /* 1239 : ERETU void [ f3 0f 01 ca ] LONG,PRIV,PROT,FRED,X86_64 */ + /* 333 355 002(01 ca) : LONG,PRIV,PROT,FRED,X86_64 */ + {I_ERETU, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67209, 230, 1545}, + /* 1240 : CLC void [ f8 ] FL,8086 */ + /* 001(f8) : FL,8086 */ + {I_CLC, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71936, 56, 1548}, + /* 1241 : CLD void [ fc ] FL,8086 */ + /* 001(fc) : FL,8086 */ + {I_CLD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67290, 56, 1549}, + /* 1242 : CLI void [ fa ] FL,8086 */ + /* 001(fa) : FL,8086 */ + {I_CLI, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67500, 56, 1550}, + /* 1243 : CLAC void [ np 0f 01 ca ] FL,PRIV,SMAP,FUTURE */ + /* 360 355 002(01 ca) : FL,PRIV,SMAP,FUTURE */ + {I_CLAC, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67215, 231, 1551}, + /* 1244 : STC void [ f9 ] FL,8086 */ + /* 001(f9) : FL,8086 */ + {I_STC, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71826, 56, 1553}, + /* 1245 : STD void [ fd ] FL,8086 */ + /* 001(fd) : FL,8086 */ + {I_STD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73466, 56, 1554}, + /* 1246 : STI void [ fb ] FL,8086 */ + /* 001(fb) : FL,8086 */ + {I_STI, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71876, 56, 1555}, + /* 1247 : STAC void [ np 0f 01 cb ] FL,PRIV,SMAP,FUTURE */ + /* 360 355 002(01 cb) : FL,PRIV,SMAP,FUTURE */ + {I_STAC, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67221, 231, 1556}, + /* 1248 : CMC void [ f5 ] FL,8086 */ + /* 001(f5) : FL,8086 */ + {I_CMC, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73469, 56, 1558}, + /* 1249 : LAHF void [ 9f ] 8086 */ + /* 001(9f) : 8086 */ + {I_LAHF, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73472, 23, 1560}, + /* 1250 : SAHF void [ 9e ] FL,8086 */ + /* 001(9e) : FL,8086 */ + {I_SAHF, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57389, 56, 1561}, + /* 1251 : SALC void [ d6 ] NOREX,NOAPX,NOLONG,UNDOC,8086 */ + /* 001(d6) : NOREX,NOAPX,NOLONG,UNDOC,8086 */ + {I_SALC, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72531, 232, 1562}, + /* 1252 : PUSHF void [ nw odf 9c ] 8086 */ + /* 327 322 001(9c) : NWSIZE,8086 */ + {I_PUSHF, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71739, 233, 1564}, + /* 1253 : PUSHFW void [ nw o16 9c ] 8086 */ + /* 327 320 001(9c) : NWSIZE,8086 */ + {I_PUSHFW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71744, 233, 1565}, + /* 1254 : PUSHFD void [ nw o32 9c ] 386 */ + /* 327 321 001(9c) : NWSIZE,386 */ + {I_PUSHFD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71749, 234, 1566}, + /* 1255 : PUSHFQ void [ nw o64 9c ] LONG,386,X86_64 */ + /* 327 324 001(9c) : NWSIZE,LONG,PROT,X86_64 */ + {I_PUSHFQ, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71754, 235, 1567}, + /* 1256 : POPF void [ nw odf 9d ] FL,8086 */ + /* 327 322 001(9d) : NWSIZE,FL,8086 */ + {I_POPF, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71759, 236, 1568}, + /* 1257 : POPFW void [ nw o16 9d ] FL,8086 */ + /* 327 320 001(9d) : NWSIZE,FL,8086 */ + {I_POPFW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71764, 236, 1569}, + /* 1258 : POPFD void [ nw o32 9d ] FL,386 */ + /* 327 321 001(9d) : NWSIZE,FL,386 */ + {I_POPFD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71769, 237, 1570}, + /* 1259 : POPFQ void [ nw o64 9d ] LONG,FL,386,X86_64 */ + /* 327 324 001(9d) : NWSIZE,LONG,FL,PROT,X86_64 */ + {I_POPFQ, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71774, 238, 1571}, + /* 1260 : CMPSB void [ repe o8 a6 ] NOAPX,FL,8086 */ + /* 335 001(a6) : NOAPX,FL,8086 */ + {I_CMPSB, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72792, 239, 1574}, + /* 1261 : CMPSW void [ repe o16 a7 ] NOAPX,FL,8086 */ + /* 335 320 001(a7) : NOAPX,FL,8086 */ + {I_CMPSW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71779, 239, 1575}, + /* 1262 : CMPSD void [ repe o32 a7 ] NOAPX,FL,386 */ + /* 335 321 001(a7) : NOAPX,FL,386 */ + {I_CMPSD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71784, 240, 1576}, + /* 1263 : CMPSQ void [ repe o64 a7 ] NOAPX,LONG,FL,386,X86_64 */ + /* 335 324 001(a7) : NOAPX,LONG,FL,PROT,X86_64 */ + {I_CMPSQ, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71789, 241, 1577}, + /* 1264 : LODSB void [ o8 ac ] NOAPX,8086 */ + /* 001(ac) : NOAPX,8086 */ + {I_LODSB, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73475, 242, 1578}, + /* 1265 : LODSW void [ o16 ad ] NOAPX,8086 */ + /* 320 001(ad) : NOAPX,8086 */ + {I_LODSW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72796, 242, 1579}, + /* 1266 : LODSD void [ o32 ad ] NOAPX,386 */ + /* 321 001(ad) : NOAPX,386 */ + {I_LODSD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72800, 243, 1580}, + /* 1267 : LODSQ void [ o64 ad ] NOAPX,LONG,386,X86_64 */ + /* 324 001(ad) : NOAPX,LONG,PROT,X86_64 */ + {I_LODSQ, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72804, 244, 1581}, + /* 1268 : MOVSB void [ o8 a4 ] NOAPX,8086 */ + /* 001(a4) : NOAPX,8086 */ + {I_MOVSB, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57417, 242, 1582}, + /* 1269 : MOVSW void [ o16 a5 ] NOAPX,8086 */ + /* 320 001(a5) : NOAPX,8086 */ + {I_MOVSW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72808, 242, 1583}, + /* 1270 : MOVSD void [ o32 a5 ] NOAPX,386 */ + /* 321 001(a5) : NOAPX,386 */ + {I_MOVSD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72812, 243, 1584}, + /* 1271 : MOVSQ void [ o64 a5 ] NOAPX,LONG,386,X86_64 */ + /* 324 001(a5) : NOAPX,LONG,PROT,X86_64 */ + {I_MOVSQ, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72816, 244, 1585}, + /* 1272 : STOSB void [ o8 aa ] NOAPX,8086 */ + /* 001(aa) : NOAPX,8086 */ + {I_STOSB, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72909, 242, 1586}, + /* 1273 : STOSW void [ o16 ab ] NOAPX,8086 */ + /* 320 001(ab) : NOAPX,8086 */ + {I_STOSW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72820, 242, 1587}, + /* 1274 : STOSD void [ o32 ab ] NOAPX,386 */ + /* 321 001(ab) : NOAPX,386 */ + {I_STOSD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72824, 243, 1588}, + /* 1275 : STOSQ void [ o64 ab ] NOAPX,LONG,386,X86_64 */ + /* 324 001(ab) : NOAPX,LONG,PROT,X86_64 */ + {I_STOSQ, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72828, 244, 1589}, + /* 1276 : SCASB void [ repe o8 ae ] NOAPX,FL,8086 */ + /* 335 001(ae) : NOAPX,FL,8086 */ + {I_SCASB, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72832, 239, 1590}, + /* 1277 : SCASW void [ repe o16 af ] NOAPX,FL,8086 */ + /* 335 320 001(af) : NOAPX,FL,8086 */ + {I_SCASW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71794, 239, 1591}, + /* 1278 : SCASD void [ repe o32 af ] NOAPX,FL,386 */ + /* 335 321 001(af) : NOAPX,FL,386 */ + {I_SCASD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71799, 240, 1592}, + /* 1279 : SCASQ void [ repe o64 af ] NOAPX,LONG,FL,386,X86_64 */ + /* 335 324 001(af) : NOAPX,LONG,FL,PROT,X86_64 */ + {I_SCASQ, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71804, 241, 1593}, + /* 1280 : INSB void [ o8 6c ] 186 */ + /* 001(6c) : 186 */ + {I_INSB, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73478, 245, 1594}, + /* 1281 : INSW void [ o16 6d ] 186 */ + /* 320 001(6d) : 186 */ + {I_INSW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72836, 245, 1595}, + /* 1282 : INSD void [ o32 6d ] 386 */ + /* 321 001(6d) : 386 */ + {I_INSD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72840, 3, 1596}, + /* 1283 : OUTSB void [ o8 6e ] 186 */ + /* 001(6e) : 186 */ + {I_OUTSB, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73481, 245, 1597}, + /* 1284 : OUTSW void [ o16 6f ] 186 */ + /* 320 001(6f) : 186 */ + {I_OUTSW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72844, 245, 1598}, + /* 1285 : OUTSD void [ o32 6f ] 386 */ + /* 321 001(6f) : 386 */ + {I_OUTSD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72848, 3, 1599}, + /* 1286 : LFENCE void [ np 0f ae e8 ] LONG,PROT,X86_64,AMD */ + /* 360 355 002(ae e8) : LONG,PROT,X86_64,AMD */ + {I_LFENCE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67227, 246, 1602}, + /* 1287 : MFENCE void [ np 0f ae f0 ] LONG,PROT,X86_64,AMD */ + /* 360 355 002(ae f0) : LONG,PROT,X86_64,AMD */ + {I_MFENCE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67233, 246, 1603}, + /* 1288 : SFENCE void [ np 0f ae f8 ] LONG,PROT,X86_64,AMD */ + /* 360 355 002(ae f8) : LONG,PROT,X86_64,AMD */ + {I_SFENCE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67239, 246, 1604}, + /* 1289 : SERIALIZE void [ np 0f 01 e8 ] SERIALIZE,FUTURE */ + /* 360 355 002(01 e8) : SERIALIZE,FUTURE */ + {I_SERIALIZE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67245, 247, 1605}, + /* 1290 : CLFLUSH mem [m: np 0f ae /7 ] SSE2,WILLAMETTE */ + /* 360 355 001(ae) 207 : SSE2,WILLAMETTE */ + {I_CLFLUSH, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67251, 248, 1608}, + /* 1291 : CLFLUSHOPT mem [m: 66 0f ae /7 ] CLFLUSHOPT,FUTURE */ + /* 361 355 001(ae) 207 : CLFLUSHOPT,FUTURE */ + {I_CLFLUSHOPT, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67257, 249, 1609}, + /* 1292 : CLWB mem [m: 66 0f ae /6 ] CLWB,FUTURE */ + /* 361 355 001(ae) 206 : CLWB,FUTURE */ + {I_CLWB, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67263, 250, 1610}, + /* 1293 : PCOMMIT void [ 66 0f ae f8 ] OBSOLETE,NEVER,NOP,FUTURE */ + /* 361 355 002(ae f8) : OBSOLETE,NEVER,NOP,FUTURE */ + {I_PCOMMIT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67269, 251, 1613}, + /* 1294 : CLZERO reg_ax [-: a16 0f 01 fc ] NOLONG,CLZERO,FUTURE,AMD */ + /* 310 355 002(01 fc) : NOREX,NOAPX,NOLONG,CLZERO,FUTURE,AMD */ + {I_CLZERO, 1, {REG_AX|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67275, 252, 1616}, + /* 1295 : CLZERO reg_eax [-: a32 0f 01 fc ] CLZERO,FUTURE,AMD */ + /* 311 355 002(01 fc) : CLZERO,FUTURE,AMD */ + {I_CLZERO, 1, {REG_EAX,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67281, 253, 1617}, + /* 1296 : CLZERO reg_rax [-: a64 0f 01 fc ] LONG,PROT,CLZERO,X86_64,AMD */ + /* 313 355 002(01 fc) : LONG,PROT,CLZERO,X86_64,AMD */ + {I_CLZERO, 1, {REG_RAX,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67287, 254, 1618}, + /* 1297 : INVD void [ 0f 08 ] PRIV,486 */ + /* 355 001(08) : PRIV,486 */ + {I_INVD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72852, 255, 1621}, + /* 1298 : WBINVD void [ np 0f 09 ] PRIV,486 */ + /* 360 355 001(09) : PRIV,486 */ + {I_WBINVD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71809, 255, 1622}, + /* 1299 : WBNOINVD void [ f3 0f 09 ] PRIV,WBNOINVD,FUTURE */ + /* 333 355 001(09) : PRIV,WBNOINVD,FUTURE */ + {I_WBNOINVD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71814, 256, 1623}, + /* 1300 : INVPCID reg32,mem128 [rm: 66 0f38 82 /r ] NOREX,NOAPX,NOLONG,PRIV,INVPCID,FUTURE */ + /* 361 356 001(82) 110 : NOREX,NOAPX,NOLONG,PRIV,INVPCID,FUTURE */ + {I_INVPCID, 2, {REG_GPR|BITS32|RN_L16,MEMORY|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+67293, 257, 1625}, + /* 1301 : INVPCID reg64,mem128 [rm: 66 0f38 82 /r ] LONG,PRIV,PROT,INVPCID,X86_64 */ + /* 361 356 001(82) 110 : NOAPX,LONG,PRIV,PROT,INVPCID,X86_64 */ + {I_INVPCID, 2, {REG_GPR|BITS64|RN_L16,MEMORY|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+67293, 258, 1626}, + /* 1302 : INVPCID reg64,mem128 [rm: evex.nf0.nd0.l0.f3.m4.w1 f2 /r ] LONG,PRIV,PROT,APX,INVPCID,X86_64 */ + /* 250(f4 fe 08) 300 001(f2) 110 : LONG,EVEX,PRIV,PROT,APX,INVPCID,X86_64 */ + {I_INVPCID, 2, {REG_GPR|BITS64,MEMORY|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+24682, 259, 1627}, + /* 1303 : INVLPG mem [m: 0f 01 /7 ] PRIV,486 */ + /* 355 001(01) 207 : PRIV,486 */ + {I_INVLPG, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71819, 255, 1628}, + /* 1304 : INVLPGA reg_ax,reg_ecx [--: a16 0f 01 df ] NOLONG,X86_64,AMD */ + /* 310 355 002(01 df) : NOREX,NOAPX,NOLONG,X86_64,AMD */ + {I_INVLPGA, 2, {REG_AX|RN_L16,REG_ECX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+67299, 260, 1629}, + /* 1305 : INVLPGA reg_eax,reg_ecx [--: a32 0f 01 df ] X86_64,AMD */ + /* 311 355 002(01 df) : X86_64,AMD */ + {I_INVLPGA, 2, {REG_EAX,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67305, 261, 1630}, + /* 1306 : INVLPGA reg_rax,reg_ecx [--: a64 0f 01 df ] LONG,PROT,X86_64,AMD */ + /* 313 355 002(01 df) : LONG,PROT,X86_64,AMD */ + {I_INVLPGA, 2, {REG_RAX,REG_ECX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67311, 246, 1631}, + /* 1307 : RDPMC void [ 0f 33 ] NOAPX,P6 */ + /* 355 001(33) : NOAPX,P6 */ + {I_RDPMC, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72856, 227, 1635}, + /* 1308 : RDTSC void [ 0f 31 ] NOAPX,PENT */ + /* 355 001(31) : NOAPX,PENT */ + {I_RDTSC, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72860, 262, 1636}, + /* 1309 : RDTSCP void [ 0f 01 f9 ] X86_64 */ + /* 355 002(01 f9) : X86_64 */ + {I_RDTSCP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71824, 263, 1637}, + /* 1310 : RDRAND reg16 [m: o16 0f c7 /6 ] FL,RDRAND,FUTURE */ + /* 320 355 001(c7) 206 : FL,RDRAND,FUTURE */ + {I_RDRAND, 1, {REG_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67323, 264, 1638}, + /* 1311 : RDRAND reg32 [m: o32 0f c7 /6 ] FL,RDRAND,FUTURE */ + /* 321 355 001(c7) 206 : FL,RDRAND,FUTURE */ + {I_RDRAND, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67329, 264, 1639}, + /* 1312 : RDRAND reg64 [m: o64 0f c7 /6 ] LONG,FL,PROT,RDRAND,X86_64 */ + /* 324 355 001(c7) 206 : LONG,FL,PROT,RDRAND,X86_64 */ + {I_RDRAND, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67335, 265, 1640}, + /* 1313 : RDSEED reg16 [m: o16 0f c7 /7 ] FL,RDSEED,FUTURE */ + /* 320 355 001(c7) 207 : FL,RDSEED,FUTURE */ + {I_RDSEED, 1, {REG_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67341, 266, 1641}, + /* 1314 : RDSEED reg32 [m: o32 0f c7 /7 ] FL,RDSEED,FUTURE */ + /* 321 355 001(c7) 207 : FL,RDSEED,FUTURE */ + {I_RDSEED, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+51325, 266, 1642}, + /* 1315 : RDSEED reg64 [m: o64 0f c7 /7 ] LONG,FL,PROT,RDSEED,X86_64 */ + /* 324 355 001(c7) 207 : LONG,FL,PROT,RDSEED,X86_64 */ + {I_RDSEED, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+51333, 267, 1643}, + /* 1316 : RDPID reg32 [m: f3 !osp o32 0f c7 /7 ] RDPID,FUTURE */ + /* 333 364 321 355 001(c7) 207 : RDPID,FUTURE */ + {I_RDPID, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+51323, 269, 1645}, + /* 1317 : RDPID reg64 [m: f3 !osp o64 0f c7 /7 ] LONG,PROT,RDPID,X86_64 */ + /* 333 364 324 355 001(c7) 207 : LONG,PROT,RDPID,X86_64 */ + {I_RDPID, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+51331, 270, 1646}, + /* 1318 : CLTS void [ 0f 06 ] PRIV,286 */ + /* 355 001(06) : PRIV,286 */ + {I_CLTS, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72864, 271, 1649}, + /* 1319 : CPUID void [ 0f a2 ] PENT */ + /* 355 001(a2) : PENT */ + {I_CPUID, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72868, 272, 1650}, + /* 1320 : LMSW rm16 [m: 0f 01 /6 ] PRIV,286 */ + /* 355 001(01) 206 : PRIV,286 */ + {I_LMSW, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71829, 271, 1651}, + /* 1321 : SMSW rm16 [m: 0f 01 /4 ] 286 */ + /* 355 001(01) 204 : 286 */ + {I_SMSW, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67372, 273, 1652}, + /* 1322 : SMSW reg16 [m: o16 0f 01 /4 ] 286 */ + /* 320 355 001(01) 204 : 286 */ + {I_SMSW, 1, {REG_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67359, 273, 1654}, + /* 1323 : SMSW reg32 [m: o32 0f 01 /4 ] 386 */ + /* 321 355 001(01) 204 : 386 */ + {I_SMSW, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67365, 3, 1655}, + /* 1324 : SMSW reg64 [m: o64 0f 01 /4 ] LONG,PROT,X86_64 */ + /* 324 355 001(01) 204 : LONG,PROT,X86_64 */ + {I_SMSW, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67371, 24, 1656}, + /* 1325 : MOV reg32,reg_creg [mr: rex.l 0f 20 /r ] NOREX,NOAPX,NOLONG,PRIV,386 */ + /* 334 355 001(20) 101 : NOREX,NOAPX,NOLONG,PRIV,386 */ + {I_MOV, 2, {REG_GPR|BITS32|RN_L16,REG_CREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+67377, 274, 1658}, + /* 1326 : MOV reg_creg,reg32 [rm: rex.l 0f 22 /r ] NOREX,NOAPX,NOLONG,PRIV,386 */ + /* 334 355 001(22) 110 : NOREX,NOAPX,NOLONG,PRIV,386 */ + {I_MOV, 2, {REG_CREG|RN_L16,REG_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+67383, 274, 1659}, + /* 1327 : MOV reg64,reg_creg [mr: o64nw 0f 20 /r ] LONG,PRIV,PROT,X86_64 */ + /* 323 355 001(20) 101 : NWSIZE,LONG,PRIV,PROT,X86_64 */ + {I_MOV, 2, {REG_GPR|BITS64,REG_CREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+67389, 275, 1660}, + /* 1328 : MOV reg_creg,reg64 [rm: o64nw 0f 22 /r ] LONG,PRIV,PROT,X86_64 */ + /* 323 355 001(22) 110 : NWSIZE,LONG,PRIV,PROT,X86_64 */ + {I_MOV, 2, {REG_CREG,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+67395, 275, 1661}, + /* 1329 : MOV reg32,reg_dreg [mr: 0f 21 /r ] NOREX,NOAPX,NOLONG,PRIV,386 */ + /* 355 001(21) 101 : NOREX,NOAPX,NOLONG,PRIV,386 */ + {I_MOV, 2, {REG_GPR|BITS32|RN_L16,REG_DREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+67402, 274, 1662}, + /* 1330 : MOV reg_dreg,reg32 [rm: 0f 23 /r ] NOREX,NOAPX,NOLONG,PRIV,386 */ + /* 355 001(23) 110 : NOREX,NOAPX,NOLONG,PRIV,386 */ + {I_MOV, 2, {REG_DREG|RN_L16,REG_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+67408, 274, 1663}, + /* 1331 : MOV reg64,reg_dreg [mr: o64nw 0f 21 /r ] LONG,PRIV,PROT,X86_64 */ + /* 323 355 001(21) 101 : NWSIZE,LONG,PRIV,PROT,X86_64 */ + {I_MOV, 2, {REG_GPR|BITS64,REG_DREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+67401, 275, 1664}, + /* 1332 : MOV reg_dreg,reg64 [rm: o64nw 0f 23 /r ] LONG,PRIV,PROT,X86_64 */ + /* 323 355 001(23) 110 : NWSIZE,LONG,PRIV,PROT,X86_64 */ + {I_MOV, 2, {REG_DREG,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+67407, 275, 1665}, + /* 1333 : WRMSR void [ 0f 30 ] NOAPX,PRIV,PENT */ + /* 355 001(30) : NOAPX,PRIV,PENT */ + {I_WRMSR, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72872, 277, 1669}, + /* 1334 : RDMSR void [ 0f 32 ] NOAPX,PRIV,PENT */ + /* 355 001(32) : NOAPX,PRIV,PENT */ + {I_RDMSR, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72876, 277, 1670}, + /* 1335 : RDMSR reg64,imm32 [mi: vex.128.f2.m7.w0 f6 /0 id ] LONG,PRIV,PROT,MSR_IMM,X86_64,FUTURE */ + /* 270(007 003) 001(f6) 200 041 : NOAPX,LONG,VEX,PRIV,PROT,MSR_IMM,FUTURE */ + {I_RDMSR, 2, {REG_GPR|BITS64|RN_L16,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+51339, 278, 1671}, + /* 1336 : RDMSR reg64,imm32 [mi: evex.128.f2.m7.w0 f6 /0 id ] LONG,PRIV,PROT,MSR_IMM,X86_64,FUTURE,APX */ + /* 250(f7 7f 08) 300 001(f6) 200 041 : LONG,EVEX,PRIV,PROT,APX,MSR_IMM,FUTURE */ + {I_RDMSR, 2, {REG_GPR|BITS64,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+13023, 279, 1671}, + /* 1337 : WRMSRNS void [ np 0f 01 c6 ] PRIV,WRMSRNS,FUTURE */ + /* 360 355 002(01 c6) : PRIV,WRMSRNS,FUTURE */ + {I_WRMSRNS, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67413, 280, 1672}, + /* 1338 : WRMSRNS imm32,reg64 [im: vex.128.f3.m7.w0 f6 /0 id ] LONG,PRIV,PROT,MSR_IMM,X86_64,FUTURE */ + /* 270(007 002) 001(f6) 210 040 : NOAPX,LONG,VEX,PRIV,PROT,MSR_IMM,FUTURE */ + {I_WRMSRNS, 2, {IMM_NORMAL|BITS32,REG_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+51347, 278, 1673}, + /* 1339 : WRMSRNS imm32,reg64 [im: evex.128.f3.m7.w0 f6 /0 id ] LONG,PRIV,PROT,MSR_IMM,X86_64,FUTURE,APX */ + /* 250(f7 7e 08) 300 001(f6) 210 040 : LONG,EVEX,PRIV,PROT,APX,MSR_IMM,FUTURE */ + {I_WRMSRNS, 2, {IMM_NORMAL|BITS32,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+13033, 279, 1673}, + /* 1340 : RDMSRLIST void [ f2 0f 01 c6 ] LONG,PRIV,PROT,MSRLIST,X86_64 */ + /* 332 355 002(01 c6) : LONG,PRIV,PROT,MSRLIST,X86_64 */ + {I_RDMSRLIST, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67419, 281, 1674}, + /* 1341 : WRMSRLIST void [ f3 0f 01 c6 ] LONG,PRIV,PROT,MSRLIST,X86_64 */ + /* 333 355 002(01 c6) : LONG,PRIV,PROT,MSRLIST,X86_64 */ + {I_WRMSRLIST, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67425, 281, 1675}, + /* 1342 : URDMSR reg64,reg64 [mr: f2 0f 38 f8 /r ] NOAPX,FUTURE */ + /* 332 355 002(38 f8) 101 : NOAPX,FUTURE */ + {I_URDMSR, 2, {REG_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+57049, 282, 1677}, + /* 1343 : URDMSR reg64,reg64 [mr: evex.nf0.nd0.l0.f2.m4.w0 f8 /r ] LONG,PROT,APX,X86_64,FUTURE */ + /* 250(f4 7f 08) 300 001(f8) 101 : LONG,EVEX,PROT,APX,FUTURE */ + {I_URDMSR, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+24691, 283, 1678}, + /* 1344 : URDMSR reg64,imm32 [mi: vex.128.f2.m7.w0 f8 /0 id ] FUTURE */ + /* 270(007 003) 001(f8) 200 041 : NOAPX,VEX,FUTURE */ + {I_URDMSR, 2, {REG_GPR|BITS64|RN_L16,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+51355, 284, 1679}, + /* 1345 : URDMSR reg64,imm32 [mi: evex.128.f2.m7.w0 f8 /0 id ] FUTURE,APX */ + /* 250(f7 7f 08) 300 001(f8) 200 041 : LONG,EVEX,PROT,APX,FUTURE */ + {I_URDMSR, 2, {REG_GPR|BITS64,IMM_NORMAL|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+13043, 283, 1679}, + /* 1346 : UWRMSR reg64,reg64 [rm: f3 0f 38 f8 /r ] NOAPX,FUTURE */ + /* 333 355 002(38 f8) 110 : NOAPX,FUTURE */ + {I_UWRMSR, 2, {REG_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+57056, 282, 1680}, + /* 1347 : UWRMSR reg64,reg64 [rm: evex.nf0.nd0.l0.f3.m4.w0 f8 /r ] LONG,PROT,APX,X86_64,FUTURE */ + /* 250(f4 7e 08) 300 001(f8) 110 : LONG,EVEX,PROT,APX,FUTURE */ + {I_UWRMSR, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+24700, 283, 1681}, + /* 1348 : UWRMSR imm32,reg64 [im: vex.128.f3.m7.w0 f8 /0 id ] FUTURE */ + /* 270(007 002) 001(f8) 210 040 : NOAPX,VEX,FUTURE */ + {I_UWRMSR, 2, {IMM_NORMAL|BITS32,REG_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+51363, 284, 1682}, + /* 1349 : UWRMSR imm32,reg64 [im: evex.128.f3.m7.w0 f8 /0 id ] FUTURE,APX */ + /* 250(f7 7e 08) 300 001(f8) 210 040 : LONG,EVEX,PROT,APX,FUTURE */ + {I_UWRMSR, 2, {IMM_NORMAL|BITS32,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+13053, 283, 1682}, + /* 1350 : RSM void [ 0f aa ] FL,SMM,PENT */ + /* 355 001(aa) : FL,SMM,PENT */ + {I_RSM, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72908, 289, 1702}, + /* 1351 : HLT void [ f4 ] PRIV,8086 */ + /* 001(f4) : PRIV,8086 */ + {I_HLT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73484, 292, 1715}, + /* 1352 : PAUSE void [ osz f3i 90 ] 8086 */ + /* 330 333 001(90) : 8086 */ + {I_PAUSE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71864, 23, 1717}, + /* 1353 : MONITOR void [ asm 0f 01 c8 ] MONITOR,PRESCOTT */ + /* 312 355 002(01 c8) : MONITOR,PRESCOTT */ + {I_MONITOR, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67455, 293, 1719}, + /* 1354 : MONITORW void [ a16 0f 01 c8 ] NOLONG,MONITOR,PRESCOTT */ + /* 310 355 002(01 c8) : NOREX,NOAPX,NOLONG,MONITOR,PRESCOTT */ + {I_MONITORW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67461, 294, 1720}, + /* 1355 : MONITORD void [ a32 0f 01 c8 ] MONITOR,PRESCOTT */ + /* 311 355 002(01 c8) : MONITOR,PRESCOTT */ + {I_MONITORD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67467, 293, 1721}, + /* 1356 : MONITORQ void [ a64 0f 01 c8 ] LONG,MONITOR,PRESCOTT,X86_64 */ + /* 313 355 002(01 c8) : LONG,PROT,MONITOR,X86_64 */ + {I_MONITORQ, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67473, 295, 1722}, + /* 1357 : MWAIT void [ 0f 01 c9 ] MONITOR,PRESCOTT */ + /* 355 002(01 c9) : MONITOR,PRESCOTT */ + {I_MWAIT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71869, 293, 1726}, + /* 1358 : MONITORX void [ asm 0f 01 fa ] MONITORX,FUTURE,AMD */ + /* 312 355 002(01 fa) : MONITORX,FUTURE,AMD */ + {I_MONITORX, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67479, 296, 1729}, + /* 1359 : MONITORX void [ a16 0f 01 fa ] NOLONG,MONITORX,FUTURE,AMD */ + /* 310 355 002(01 fa) : NOREX,NOAPX,NOLONG,MONITORX,FUTURE,AMD */ + {I_MONITORX, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67485, 297, 1730}, + /* 1360 : MONITORX void [ a32 0f 01 fa ] MONITORX,FUTURE,AMD */ + /* 311 355 002(01 fa) : MONITORX,FUTURE,AMD */ + {I_MONITORX, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67491, 296, 1731}, + /* 1361 : MONITORX void [ a64 0f 01 fa ] LONG,MONITORX,X86_64,FUTURE,AMD */ + /* 313 355 002(01 fa) : LONG,PROT,MONITORX,FUTURE,AMD */ + {I_MONITORX, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67497, 298, 1732}, + /* 1362 : MWAITX void [ 0f 01 fb ] MONITORX,FUTURE,AMD */ + /* 355 002(01 fb) : MONITORX,FUTURE,AMD */ + {I_MWAITX, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71874, 296, 1736}, + /* 1363 : TPAUSE reg32 [m: 66 0f ae /6 ] FL,WAITPKG,FUTURE */ + /* 361 355 001(ae) 206 : FL,WAITPKG,FUTURE */ + {I_TPAUSE, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67263, 300, 1739}, + /* 1364 : UMONITOR reg16 [m: a16 f3 0f ae /6 ] NOLONG,WAITPKG,FUTURE */ + /* 310 333 355 001(ae) 206 : NOREX,NOAPX,NOLONG,WAITPKG,FUTURE */ + {I_UMONITOR, 1, {REG_GPR|BITS16|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57091, 301, 1741}, + /* 1365 : UMONITOR reg32 [m: a32 f3 0f ae /6 ] WAITPKG,FUTURE */ + /* 311 333 355 001(ae) 206 : WAITPKG,FUTURE */ + {I_UMONITOR, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57098, 302, 1742}, + /* 1366 : UMONITOR reg64 [m: a64 f3 0f ae /6 ] LONG,PROT,WAITPKG,X86_64 */ + /* 313 333 355 001(ae) 206 : LONG,PROT,WAITPKG,X86_64 */ + {I_UMONITOR, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57105, 303, 1743}, + /* 1367 : UMWAIT reg32 [m: f2 0f ae /6 ] WAITPKG,FUTURE */ + /* 332 355 001(ae) 206 : WAITPKG,FUTURE */ + {I_UMWAIT, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67503, 302, 1744}, + /* 1368 : IN reg_al,imm8 [-i: o8 e4 ib,u ] NOAPX,8086 */ + /* 001(e4) 025 : NOAPX,8086 */ + {I_IN, 2, {REG_AL|RN_L16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+72912, 242, 1748}, + /* 1369 : IN reg_ax,imm8 [-i: o16 e5 ib,u ] NOAPX,8086 */ + /* 320 001(e5) 025 : NOAPX,8086 */ + {I_IN, 2, {REG_AX|RN_L16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+71879, 242, 1749}, + /* 1370 : IN reg_eax,imm8 [-i: o32 e5 ib,u ] NOAPX,ZU,386 */ + /* 321 001(e5) 025 : NOAPX,ZU,386 */ + {I_IN, 2, {REG_EAX|RN_L16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+71884, 304, 1750}, + /* 1371 : IN reg_al,reg_dx [--: o8 ec ] NOAPX,8086 */ + /* 001(ec) : NOAPX,8086 */ + {I_IN, 2, {REG_AL|RN_L16,REG_DX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+70182, 242, 1751}, + /* 1372 : IN reg_ax,reg_dx [--: o16 ed ] NOAPX,8086 */ + /* 320 001(ed) : NOAPX,8086 */ + {I_IN, 2, {REG_AX|RN_L16,REG_DX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+72916, 242, 1752}, + /* 1373 : IN reg_eax,reg_dx [--: o32 ed ] NOAPX,ZU,386 */ + /* 321 001(ed) : NOAPX,ZU,386 */ + {I_IN, 2, {REG_EAX|RN_L16,REG_DX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+72920, 304, 1753}, + /* 1374 : OUT imm8,reg_al [i-: o8 e6 ib,u ] NOAPX,8086 */ + /* 001(e6) 024 : NOAPX,8086 */ + {I_OUT, 2, {IMM_NORMAL|BITS8,REG_AL|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+72924, 242, 1754}, + /* 1375 : OUT imm8,reg_ax [i-: o16 e7 ib,u ] NOAPX,8086 */ + /* 320 001(e7) 024 : NOAPX,8086 */ + {I_OUT, 2, {IMM_NORMAL|BITS8,REG_AX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+71889, 242, 1755}, + /* 1376 : OUT imm8,reg_eax [i-: o32 e7 ib,u ] NOAPX,386 */ + /* 321 001(e7) 024 : NOAPX,386 */ + {I_OUT, 2, {IMM_NORMAL|BITS8,REG_EAX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+71894, 243, 1756}, + /* 1377 : OUT reg_dx,reg_al [--: o8 ee ] NOAPX,8086 */ + /* 001(ee) : NOAPX,8086 */ + {I_OUT, 2, {REG_DX|RN_L16,REG_AL|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+70164, 242, 1757}, + /* 1378 : OUT reg_dx,reg_ax [--: o16 ef ] NOAPX,8086 */ + /* 320 001(ef) : NOAPX,8086 */ + {I_OUT, 2, {REG_DX|RN_L16,REG_AX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+72928, 242, 1758}, + /* 1379 : OUT reg_dx,reg_eax [--: o32 ef ] NOAPX,386 */ + /* 321 001(ef) : NOAPX,386 */ + {I_OUT, 2, {REG_DX|RN_L16,REG_EAX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+72932, 243, 1759}, + /* 1380 : MOV mem16,reg_sreg [mr: 8c /r ] 8086 */ + /* 001(8c) 101 : 8086 */ + {I_MOV, 2, {MEMORY|BITS16,REG_SREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+71900, 23, 1762}, + /* 1381 : MOV reg16,reg_sreg [mr: o16 8c /r ] 8086 */ + /* 320 001(8c) 101 : 8086 */ + {I_MOV, 2, {REG_GPR|BITS16,REG_SREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+71899, 23, 1763}, + /* 1382 : MOV reg32,reg_sreg [mr: optd o32 8c /r ] 386 */ + /* 337 321 001(8c) 101 : 386 */ + {I_MOV, 2, {REG_GPR|BITS32,REG_SREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+67509, 3, 1764}, + /* 1383 : MOV reg64,reg_sreg [mr: optd o64 8c /r ] LONG,386,X86_64 */ + /* 337 324 001(8c) 101 : LONG,PROT,X86_64 */ + {I_MOV, 2, {REG_GPR|BITS64,REG_SREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+67515, 24, 1765}, + /* 1384 : MOV reg_sreg,mem16 [rm: 8e /r ] 8086 */ + /* 001(8e) 110 : 8086 */ + {I_MOV, 2, {REG_SREG,MEMORY|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+67535, 23, 1766}, + /* 1385 : MOV reg_sreg,reg16 [rm: optw o16 8e /r ] 8086 */ + /* 336 320 001(8e) 110 : 8086 */ + {I_MOV, 2, {REG_SREG,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+67521, 23, 1767}, + /* 1386 : MOV reg_sreg,reg32 [rm: optw o32 8e /r ] 386 */ + /* 336 321 001(8e) 110 : 386 */ + {I_MOV, 2, {REG_SREG,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+67527, 3, 1768}, + /* 1387 : MOV reg_sreg,reg64 [rm: optw o64 8e /r ] LONG,386,X86_64 */ + /* 336 324 001(8e) 110 : LONG,PROT,X86_64 */ + {I_MOV, 2, {REG_SREG,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+67533, 24, 1769}, + /* 1388 : LDS reg16,mem16 [rm: o16 c5 /r ] NOREX,NOAPX,NOLONG,8086 */ + /* 320 001(c5) 110 : NOREX,NOAPX,NOLONG,8086 */ + {I_LDS, 2, {REG_GPR|BITS16|RN_L16,MEMORY|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+71904, 225, 1771}, + /* 1389 : LDS reg32,mem32 [rm: o32 c5 /r ] NOREX,NOAPX,NOLONG,386 */ + /* 321 001(c5) 110 : NOREX,NOAPX,NOLONG,386 */ + {I_LDS, 2, {REG_GPR|BITS32|RN_L16,MEMORY|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+71909, 305, 1772}, + /* 1390 : LES reg16,mem16 [rm: o16 c4 /r ] NOREX,NOAPX,NOLONG,8086 */ + /* 320 001(c4) 110 : NOREX,NOAPX,NOLONG,8086 */ + {I_LES, 2, {REG_GPR|BITS16|RN_L16,MEMORY|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+71914, 225, 1773}, + /* 1391 : LES reg32,mem32 [rm: o32 c4 /r ] NOREX,NOAPX,NOLONG,386 */ + /* 321 001(c4) 110 : NOREX,NOAPX,NOLONG,386 */ + {I_LES, 2, {REG_GPR|BITS32|RN_L16,MEMORY|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+71919, 305, 1774}, + /* 1392 : LFS reg16,mem16 [rm: o16 0f b4 /r ] SM0-1,386 */ + /* 320 355 001(b4) 110 : SM0,SM1,386 */ + {I_LFS, 2, {REG_GPR|BITS16,MEMORY|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+67539, 13, 1775}, + /* 1393 : LFS reg32,mem32 [rm: o32 0f b4 /r ] SM0-1,386 */ + /* 321 355 001(b4) 110 : SM0,SM1,386 */ + {I_LFS, 2, {REG_GPR|BITS32,MEMORY|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+67545, 13, 1776}, + /* 1394 : LFS reg64,mem64 [rm: o64 0f b4 /r ] SM0-1,LONG,PROT,X86_64 */ + /* 324 355 001(b4) 110 : SM0,SM1,LONG,PROT,X86_64 */ + {I_LFS, 2, {REG_GPR|BITS64,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+67551, 14, 1777}, + /* 1395 : LGS reg16,mem16 [rm: o16 0f b5 /r ] SM0-1,386 */ + /* 320 355 001(b5) 110 : SM0,SM1,386 */ + {I_LGS, 2, {REG_GPR|BITS16,MEMORY|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+67557, 13, 1778}, + /* 1396 : LGS reg32,mem32 [rm: o32 0f b5 /r ] SM0-1,386 */ + /* 321 355 001(b5) 110 : SM0,SM1,386 */ + {I_LGS, 2, {REG_GPR|BITS32,MEMORY|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+67563, 13, 1779}, + /* 1397 : LGS reg64,mem64 [rm: o64 0f b5 /r ] SM0-1,LONG,PROT,X86_64 */ + /* 324 355 001(b5) 110 : SM0,SM1,LONG,PROT,X86_64 */ + {I_LGS, 2, {REG_GPR|BITS64,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+67569, 14, 1780}, + /* 1398 : LSS reg16,mem16 [rm: o16 0f b2 /r ] SM0-1,386 */ + /* 320 355 001(b2) 110 : SM0,SM1,386 */ + {I_LSS, 2, {REG_GPR|BITS16,MEMORY|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+67575, 13, 1781}, + /* 1399 : LSS reg32,mem32 [rm: o32 0f b2 /r ] SM0-1,386 */ + /* 321 355 001(b2) 110 : SM0,SM1,386 */ + {I_LSS, 2, {REG_GPR|BITS32,MEMORY|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+67581, 13, 1782}, + /* 1400 : LSS reg64,mem64 [rm: o64 0f b2 /r ] SM0-1,LONG,PROT,X86_64 */ + /* 324 355 001(b2) 110 : SM0,SM1,LONG,PROT,X86_64 */ + {I_LSS, 2, {REG_GPR|BITS64,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+67587, 14, 1783}, + /* 1401 : PUSH reg_es [-: 06 ] NOREX,NOAPX,NOLONG,8086 */ + /* 001(06) : NOREX,NOAPX,NOLONG,8086 */ + {I_PUSH, 1, {REG_ES|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72865, 225, 1785}, + /* 1402 : PUSH reg_cs [-: 0e ] NOREX,NOAPX,NOLONG,8086 */ + /* 001(0e) : NOREX,NOAPX,NOLONG,8086 */ + {I_PUSH, 1, {REG_CS|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73073, 225, 1786}, + /* 1403 : PUSH reg_ss [-: 16 ] NOREX,NOAPX,NOLONG,8086 */ + /* 001(16) : NOREX,NOAPX,NOLONG,8086 */ + {I_PUSH, 1, {REG_SS|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+29251, 225, 1787}, + /* 1404 : PUSH reg_ds [-: 1e ] NOREX,NOAPX,NOLONG,8086 */ + /* 001(1e) : NOREX,NOAPX,NOLONG,8086 */ + {I_PUSH, 1, {REG_DS|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+29395, 225, 1788}, + /* 1405 : PUSH reg_fs [-: 0f a0 ] 386 */ + /* 355 001(a0) : 386 */ + {I_PUSH, 1, {REG_FS,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72936, 3, 1789}, + /* 1406 : PUSH reg_gs [-: 0f a8 ] 386 */ + /* 355 001(a8) : 386 */ + {I_PUSH, 1, {REG_GS,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72940, 3, 1790}, + /* 1407 : POP reg_es [-: 07 ] NOREX,NOAPX,NOLONG,8086 */ + /* 001(07) : NOREX,NOAPX,NOLONG,8086 */ + {I_POP, 1, {REG_ES|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72773, 225, 1792}, + /* 1408 : POP reg_ss [-: 17 ] NOREX,NOAPX,NOLONG,8086 */ + /* 001(17) : NOREX,NOAPX,NOLONG,8086 */ + {I_POP, 1, {REG_SS|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+29269, 225, 1794}, + /* 1409 : POP reg_ds [-: 1f ] NOREX,NOAPX,NOLONG,8086 */ + /* 001(1f) : NOREX,NOAPX,NOLONG,8086 */ + {I_POP, 1, {REG_DS|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+29413, 225, 1795}, + /* 1410 : POP reg_fs [-: 0f a1 ] 386 */ + /* 355 001(a1) : 386 */ + {I_POP, 1, {REG_FS,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72944, 3, 1796}, + /* 1411 : POP reg_gs [-: 0f a9 ] 386 */ + /* 355 001(a9) : 386 */ + {I_POP, 1, {REG_GS,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72948, 3, 1797}, + /* 1412 : RDFSBASE reg32 [m: w0 f3 0f ae /0 ] LONG,PROT,X86_64 */ + /* 317 333 355 001(ae) 200 : LONG,PROT,X86_64 */ + {I_RDFSBASE, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57112, 24, 1799}, + /* 1413 : RDFSBASE reg64 [m: w1 f3 0f ae /0 ] LONG,PROT,X86_64 */ + /* 324 333 355 001(ae) 200 : LONG,PROT,X86_64 */ + {I_RDFSBASE, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57119, 24, 1800}, + /* 1414 : RDGSBASE reg32 [m: w0 f3 0f ae /1 ] LONG,PROT,X86_64 */ + /* 317 333 355 001(ae) 201 : LONG,PROT,X86_64 */ + {I_RDGSBASE, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57126, 24, 1801}, + /* 1415 : RDGSBASE reg64 [m: w1 f3 0f ae /1 ] LONG,PROT,X86_64 */ + /* 324 333 355 001(ae) 201 : LONG,PROT,X86_64 */ + {I_RDGSBASE, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57133, 24, 1802}, + /* 1416 : WRFSBASE reg32 [m: w0 f3 0f ae /2 ] LONG,PROT,X86_64 */ + /* 317 333 355 001(ae) 202 : LONG,PROT,X86_64 */ + {I_WRFSBASE, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57140, 24, 1803}, + /* 1417 : WRFSBASE reg64 [m: w1 f3 0f ae /2 ] LONG,PROT,X86_64 */ + /* 324 333 355 001(ae) 202 : LONG,PROT,X86_64 */ + {I_WRFSBASE, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57147, 24, 1804}, + /* 1418 : WRGSBASE reg32 [m: w0 f3 0f ae /3 ] LONG,PROT,X86_64 */ + /* 317 333 355 001(ae) 203 : LONG,PROT,X86_64 */ + {I_WRGSBASE, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57154, 24, 1805}, + /* 1419 : WRGSBASE reg64 [m: w1 f3 0f ae /3 ] LONG,PROT,X86_64 */ + /* 324 333 355 001(ae) 203 : LONG,PROT,X86_64 */ + {I_WRGSBASE, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57161, 24, 1806}, + /* 1420 : ARPL rm16,reg16 [mr: optw o16 63 /r ] SM0-1,NOREX,NOAPX,NOLONG,FL,PROT,286 */ + /* 336 320 001(63) 101 : SM0,SM1,NOREX,NOAPX,NOLONG,FL,PROT,286 */ + {I_ARPL, 2, {RM_GPR|BITS16|RN_L16,REG_GPR|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+67593, 307, 1808}, + /* 1421 : ARPL rm16,reg32 [mr: optw o32 63 /r ] SM0-1,NOREX,NOAPX,NOLONG,FL,PROT,386 */ + /* 336 321 001(63) 101 : SM0,SM1,NOREX,NOAPX,NOLONG,FL,PROT,386 */ + {I_ARPL, 2, {RM_GPR|BITS16|RN_L16,REG_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+67599, 308, 1809}, + /* 1422 : LAR reg16,rm_sel [rm: o16 0f 02 /r ] FL,PROT,286 */ + /* 320 355 001(02) 110 : FL,PROT,286 */ + {I_LAR, 2, {REG_GPR|BITS16,RM_SEL,0,0,0}, NO_DECORATOR, nasm_bytecodes+67605, 309, 1810}, + /* 1423 : LAR reg32,rm_sel [rm: optd o32 0f 02 /r ] FL,PROT,386 */ + /* 337 321 355 001(02) 110 : FL,PROT,386 */ + {I_LAR, 2, {REG_GPR|BITS32,RM_SEL,0,0,0}, NO_DECORATOR, nasm_bytecodes+57168, 310, 1811}, + /* 1424 : LAR reg64,rm_sel [rm: optd o64 0f 02 /r ] LONG,FL,PROT,X86_64 */ + /* 337 324 355 001(02) 110 : LONG,FL,PROT,X86_64 */ + {I_LAR, 2, {REG_GPR|BITS64,RM_SEL,0,0,0}, NO_DECORATOR, nasm_bytecodes+57175, 58, 1812}, + /* 1425 : LSL reg16,rm_sel [rm: o16 0f 03 /r ] PROT,286 */ + /* 320 355 001(03) 110 : PROT,286 */ + {I_LSL, 2, {REG_GPR|BITS16,RM_SEL,0,0,0}, NO_DECORATOR, nasm_bytecodes+67611, 311, 1813}, + /* 1426 : LSL reg32,rm_sel [rm: optd o32 0f 03 /r ] PROT,386 */ + /* 337 321 355 001(03) 110 : PROT,386 */ + {I_LSL, 2, {REG_GPR|BITS32,RM_SEL,0,0,0}, NO_DECORATOR, nasm_bytecodes+57182, 312, 1814}, + /* 1427 : LSL reg64,rm_sel [rm: optd o64 0f 03 /r ] LONG,PROT,X86_64 */ + /* 337 324 355 001(03) 110 : LONG,PROT,X86_64 */ + {I_LSL, 2, {REG_GPR|BITS64,RM_SEL,0,0,0}, NO_DECORATOR, nasm_bytecodes+57189, 24, 1815}, + /* 1428 : VERR rm_sel [m: 0f 00 /4 ] FL,PROT,286 */ + /* 355 001(00) 204 : FL,PROT,286 */ + {I_VERR, 1, {RM_SEL,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71924, 309, 1817}, + /* 1429 : VERW rm_sel [m: 0f 00 /5 ] FL,PROT,286 */ + /* 355 001(00) 205 : FL,PROT,286 */ + {I_VERW, 1, {RM_SEL,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71929, 309, 1818}, + /* 1430 : SWAPGS void [ 0f 01 f8 ] LONG,PROT,X86_64 */ + /* 355 002(01 f8) : LONG,PROT,X86_64 */ + {I_SWAPGS, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71934, 24, 1821}, + /* 1431 : LKGS rm_sel [m: f2 0f 00 /6 ] LONG,PRIV,PROT,LKGS,X86_64 */ + /* 332 355 001(00) 206 : LONG,PRIV,PROT,LKGS,X86_64 */ + {I_LKGS, 1, {RM_SEL,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67617, 313, 1822}, + /* 1432 : LGDT mem16 [m: nw o16 0f 01 /2 ] AR0,OSIZE,PRIV,286 */ + /* 327 320 355 001(01) 202 : AR0,NWSIZE,OSIZE,PRIV,286 */ + {I_LGDT, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57196, 314, 1824}, + /* 1433 : LGDT mem32 [m: nw o32 0f 01 /2 ] AR0,OSIZE,PRIV,386 */ + /* 327 321 355 001(01) 202 : AR0,NWSIZE,OSIZE,PRIV,386 */ + {I_LGDT, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57203, 315, 1825}, + /* 1434 : LGDT mem64 [m: nw o64 0f 01 /2 ] AR0,OSIZE,LONG,PRIV,386,X86_64 */ + /* 327 324 355 001(01) 202 : AR0,NWSIZE,OSIZE,LONG,PRIV,PROT,X86_64 */ + {I_LGDT, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57210, 316, 1826}, + /* 1435 : LIDT mem16 [m: nw o16 0f 01 /3 ] AR0,OSIZE,PRIV,286 */ + /* 327 320 355 001(01) 203 : AR0,NWSIZE,OSIZE,PRIV,286 */ + {I_LIDT, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57217, 314, 1827}, + /* 1436 : LIDT mem32 [m: nw o32 0f 01 /3 ] AR0,OSIZE,PRIV,386 */ + /* 327 321 355 001(01) 203 : AR0,NWSIZE,OSIZE,PRIV,386 */ + {I_LIDT, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57224, 315, 1828}, + /* 1437 : LIDT mem64 [m: nw o64 0f 01 /3 ] AR0,OSIZE,LONG,PRIV,386,X86_64 */ + /* 327 324 355 001(01) 203 : AR0,NWSIZE,OSIZE,LONG,PRIV,PROT,X86_64 */ + {I_LIDT, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57231, 316, 1829}, + /* 1438 : LLDT mem16 [m: 0f 00 /2 ] PRIV,PROT,286 */ + /* 355 001(00) 202 : PRIV,PROT,286 */ + {I_LLDT, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57254, 317, 1830}, + /* 1439 : LLDT reg16 [m: optw o16 0f 00 /2 ] PRIV,PROT,286 */ + /* 336 320 355 001(00) 202 : PRIV,PROT,286 */ + {I_LLDT, 1, {REG_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57238, 317, 1831}, + /* 1440 : LLDT reg32 [m: optw o32 0f 00 /2 ] PRIV,PROT,386 */ + /* 336 321 355 001(00) 202 : PRIV,PROT,386 */ + {I_LLDT, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57245, 318, 1832}, + /* 1441 : LLDT reg64 [m: optw o64 0f 00 /2 ] LONG,PRIV,PROT,386,X86_64 */ + /* 336 324 355 001(00) 202 : LONG,PRIV,PROT,X86_64 */ + {I_LLDT, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57252, 319, 1833}, + /* 1442 : LTR mem16 [m: 0f 00 /3 ] PRIV,PROT,286 */ + /* 355 001(00) 203 : PRIV,PROT,286 */ + {I_LTR, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57275, 317, 1834}, + /* 1443 : LTR reg16 [m: optw o16 0f 00 /3 ] PRIV,PROT,286 */ + /* 336 320 355 001(00) 203 : PRIV,PROT,286 */ + {I_LTR, 1, {REG_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57259, 317, 1835}, + /* 1444 : LTR reg32 [m: optw o32 0f 00 /3 ] PRIV,PROT,386 */ + /* 336 321 355 001(00) 203 : PRIV,PROT,386 */ + {I_LTR, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57266, 318, 1836}, + /* 1445 : LTR reg64 [m: optw o64 0f 00 /3 ] LONG,PRIV,PROT,386,X86_64 */ + /* 336 324 355 001(00) 203 : LONG,PRIV,PROT,X86_64 */ + {I_LTR, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57273, 319, 1837}, + /* 1446 : SGDT mem16 [m: nw o16 0f 01 /0 ] AR0,OSIZE,286 */ + /* 327 320 355 001(01) 200 : AR0,NWSIZE,OSIZE,286 */ + {I_SGDT, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57280, 320, 1839}, + /* 1447 : SGDT mem32 [m: nw o32 0f 01 /0 ] AR0,OSIZE,386 */ + /* 327 321 355 001(01) 200 : AR0,NWSIZE,OSIZE,386 */ + {I_SGDT, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57287, 204, 1840}, + /* 1448 : SGDT mem64 [m: nw o64 0f 01 /0 ] AR0,OSIZE,LONG,386,X86_64 */ + /* 327 324 355 001(01) 200 : AR0,NWSIZE,OSIZE,LONG,PROT,X86_64 */ + {I_SGDT, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57294, 205, 1841}, + /* 1449 : SIDT mem16 [m: nw o16 0f 01 /1 ] AR0,OSIZE,286 */ + /* 327 320 355 001(01) 201 : AR0,NWSIZE,OSIZE,286 */ + {I_SIDT, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57301, 320, 1842}, + /* 1450 : SIDT mem32 [m: nw o32 0f 01 /1 ] AR0,OSIZE,386 */ + /* 327 321 355 001(01) 201 : AR0,NWSIZE,OSIZE,386 */ + {I_SIDT, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57308, 204, 1843}, + /* 1451 : SIDT mem64 [m: nw o64 0f 01 /1 ] AR0,OSIZE,LONG,386,X86_64 */ + /* 327 324 355 001(01) 201 : AR0,NWSIZE,OSIZE,LONG,PROT,X86_64 */ + {I_SIDT, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57315, 205, 1844}, + /* 1452 : SLDT mem16 [m: 0f 00 /0 ] PROT,286 */ + /* 355 001(00) 200 : PROT,286 */ + {I_SLDT, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67624, 311, 1845}, + /* 1453 : SLDT reg16 [m: o16 0f 00 /0 ] PROT,286 */ + /* 320 355 001(00) 200 : PROT,286 */ + {I_SLDT, 1, {REG_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67623, 311, 1846}, + /* 1454 : SLDT reg32 [m: optd o32 0f 00 /0 ] PROT,386 */ + /* 337 321 355 001(00) 200 : PROT,386 */ + {I_SLDT, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57322, 312, 1847}, + /* 1455 : SLDT reg64 [m: optd o64 0f 00 /0 ] LONG,PROT,386,X86_64 */ + /* 337 324 355 001(00) 200 : LONG,PROT,X86_64 */ + {I_SLDT, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57329, 24, 1848}, + /* 1456 : STR mem16 [m: 0f 00 /1 ] PROT,286 */ + /* 355 001(00) 201 : PROT,286 */ + {I_STR, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67630, 311, 1849}, + /* 1457 : STR reg16 [m: o16 0f 00 /1 ] PROT,286 */ + /* 320 355 001(00) 201 : PROT,286 */ + {I_STR, 1, {REG_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67629, 311, 1850}, + /* 1458 : STR reg32 [m: optd o32 0f 00 /1 ] PROT,386 */ + /* 337 321 355 001(00) 201 : PROT,386 */ + {I_STR, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57336, 312, 1851}, + /* 1459 : STR reg64 [m: optd o64 0f 00 /1 ] LONG,PROT,386,X86_64 */ + /* 337 324 355 001(00) 201 : LONG,PROT,X86_64 */ + {I_STR, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57343, 24, 1852}, + /* 1460 : F2XM1 void [ d9 f0 ] FPU,8086 */ + /* 002(d9 f0) : FPU,8086 */ + {I_F2XM1, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72952, 323, 1858}, + /* 1461 : FABS void [ d9 e1 ] FPU,8086 */ + /* 002(d9 e1) : FPU,8086 */ + {I_FABS, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72956, 323, 1859}, + /* 1462 : FADD mem32 [m: d8 /0 ] FPU,8086 */ + /* 001(d8) 200 : FPU,8086 */ + {I_FADD, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+69953, 323, 1860}, + /* 1463 : FADD mem64 [m: dc /0 ] FPU,8086 */ + /* 001(dc) 200 : FPU,8086 */ + {I_FADD, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72960, 323, 1861}, + /* 1464 : FADD fpureg|to [r: dc c0+r ] FPU,8086 */ + /* 001(dc) 010 300 : FPU,8086 */ + {I_FADD, 1, {FPUREG|TO,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71939, 323, 1862}, + /* 1465 : FADD fpureg [r: d8 c0+r ] FPU,8086 */ + /* 001(d8) 010 300 : FPU,8086 */ + {I_FADD, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71944, 323, 1863}, + /* 1466 : FADD fpureg,fpu0 [r-: dc c0+r ] FPU,8086 */ + /* 001(dc) 010 300 : FPU,8086 */ + {I_FADD, 2, {FPUREG,FPUREG|RN_ZERO,0,0,0}, NO_DECORATOR, nasm_bytecodes+71939, 323, 1864}, + /* 1467 : FADD fpu0,fpureg [-r: d8 c0+r ] FPU,8086 */ + /* 001(d8) 011 300 : FPU,8086 */ + {I_FADD, 2, {FPUREG|RN_ZERO,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+71949, 323, 1865}, + /* 1468 : FADDP fpureg [r: de c0+r ] FPU,8086 */ + /* 001(de) 010 300 : FPU,8086 */ + {I_FADDP, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71954, 323, 1867}, + /* 1469 : FADDP fpureg,fpu0 [r-: de c0+r ] FPU,8086 */ + /* 001(de) 010 300 : FPU,8086 */ + {I_FADDP, 2, {FPUREG,FPUREG|RN_ZERO,0,0,0}, NO_DECORATOR, nasm_bytecodes+71954, 323, 1868}, + /* 1470 : FBLD mem80 [m: df /4 ] FPU,8086 */ + /* 001(df) 204 : FPU,8086 */ + {I_FBLD, 1, {MEMORY|BITS80,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72968, 323, 1870}, + /* 1471 : FBLD mem [m: df /4 ] FPU,8086 */ + /* 001(df) 204 : FPU,8086 */ + {I_FBLD, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72968, 323, 1871}, + /* 1472 : FBSTP mem80 [m: df /6 ] FPU,8086 */ + /* 001(df) 206 : FPU,8086 */ + {I_FBSTP, 1, {MEMORY|BITS80,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72972, 323, 1872}, + /* 1473 : FBSTP mem [m: df /6 ] FPU,8086 */ + /* 001(df) 206 : FPU,8086 */ + {I_FBSTP, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72972, 323, 1873}, + /* 1474 : FCHS void [ d9 e0 ] FPU,8086 */ + /* 002(d9 e0) : FPU,8086 */ + {I_FCHS, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72976, 323, 1874}, + /* 1475 : FCLEX void [ wait db e2 ] FPU,8086 */ + /* 341 002(db e2) : FPU,8086 */ + {I_FCLEX, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71959, 323, 1875}, + /* 1476 : FCMOVB fpureg [r: da c0+r ] FPU,P6 */ + /* 001(da) 010 300 : FPU,P6 */ + {I_FCMOVB, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71964, 324, 1876}, + /* 1477 : FCMOVB fpu0,fpureg [-r: da c0+r ] FPU,P6 */ + /* 001(da) 011 300 : FPU,P6 */ + {I_FCMOVB, 2, {FPUREG|RN_ZERO,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+71969, 324, 1877}, + /* 1478 : FCMOVBE fpureg [r: da d0+r ] FPU,P6 */ + /* 001(da) 010 320 : FPU,P6 */ + {I_FCMOVBE, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71974, 324, 1879}, + /* 1479 : FCMOVBE fpu0,fpureg [-r: da d0+r ] FPU,P6 */ + /* 001(da) 011 320 : FPU,P6 */ + {I_FCMOVBE, 2, {FPUREG|RN_ZERO,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+71979, 324, 1880}, + /* 1480 : FCMOVE fpureg [r: da c8+r ] FPU,P6 */ + /* 001(da) 010 310 : FPU,P6 */ + {I_FCMOVE, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71984, 324, 1882}, + /* 1481 : FCMOVE fpu0,fpureg [-r: da c8+r ] FPU,P6 */ + /* 001(da) 011 310 : FPU,P6 */ + {I_FCMOVE, 2, {FPUREG|RN_ZERO,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+71989, 324, 1883}, + /* 1482 : FCMOVNB fpureg [r: db c0+r ] FPU,P6 */ + /* 001(db) 010 300 : FPU,P6 */ + {I_FCMOVNB, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71994, 324, 1885}, + /* 1483 : FCMOVNB fpu0,fpureg [-r: db c0+r ] FPU,P6 */ + /* 001(db) 011 300 : FPU,P6 */ + {I_FCMOVNB, 2, {FPUREG|RN_ZERO,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+71999, 324, 1886}, + /* 1484 : FCMOVNBE fpureg [r: db d0+r ] FPU,P6 */ + /* 001(db) 010 320 : FPU,P6 */ + {I_FCMOVNBE, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72004, 324, 1888}, + /* 1485 : FCMOVNBE fpu0,fpureg [-r: db d0+r ] FPU,P6 */ + /* 001(db) 011 320 : FPU,P6 */ + {I_FCMOVNBE, 2, {FPUREG|RN_ZERO,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+72009, 324, 1889}, + /* 1486 : FCMOVNE fpureg [r: db c8+r ] FPU,P6 */ + /* 001(db) 010 310 : FPU,P6 */ + {I_FCMOVNE, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72014, 324, 1891}, + /* 1487 : FCMOVNE fpu0,fpureg [-r: db c8+r ] FPU,P6 */ + /* 001(db) 011 310 : FPU,P6 */ + {I_FCMOVNE, 2, {FPUREG|RN_ZERO,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+72019, 324, 1892}, + /* 1488 : FCMOVNU fpureg [r: db d8+r ] FPU,P6 */ + /* 001(db) 010 330 : FPU,P6 */ + {I_FCMOVNU, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72024, 324, 1894}, + /* 1489 : FCMOVNU fpu0,fpureg [-r: db d8+r ] FPU,P6 */ + /* 001(db) 011 330 : FPU,P6 */ + {I_FCMOVNU, 2, {FPUREG|RN_ZERO,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+72029, 324, 1895}, + /* 1490 : FCMOVU fpureg [r: da d8+r ] FPU,P6 */ + /* 001(da) 010 330 : FPU,P6 */ + {I_FCMOVU, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72034, 324, 1897}, + /* 1491 : FCMOVU fpu0,fpureg [-r: da d8+r ] FPU,P6 */ + /* 001(da) 011 330 : FPU,P6 */ + {I_FCMOVU, 2, {FPUREG|RN_ZERO,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+72039, 324, 1898}, + /* 1492 : FCOM mem32 [m: d8 /2 ] FPU,8086 */ + /* 001(d8) 202 : FPU,8086 */ + {I_FCOM, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+69959, 323, 1900}, + /* 1493 : FCOM mem64 [m: dc /2 ] FPU,8086 */ + /* 001(dc) 202 : FPU,8086 */ + {I_FCOM, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73012, 323, 1901}, + /* 1494 : FCOM fpureg [r: d8 d0+r ] FPU,8086 */ + /* 001(d8) 010 320 : FPU,8086 */ + {I_FCOM, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72044, 323, 1902}, + /* 1495 : FCOM fpu0,fpureg [-r: d8 d0+r ] FPU,8086 */ + /* 001(d8) 011 320 : FPU,8086 */ + {I_FCOM, 2, {FPUREG|RN_ZERO,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+72049, 323, 1903}, + /* 1496 : FCOMI fpureg [r: db f0+r ] FL,FPU,P6 */ + /* 001(db) 010 360 : FL,FPU,P6 */ + {I_FCOMI, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72054, 325, 1905}, + /* 1497 : FCOMI fpu0,fpureg [-r: db f0+r ] FL,FPU,P6 */ + /* 001(db) 011 360 : FL,FPU,P6 */ + {I_FCOMI, 2, {FPUREG|RN_ZERO,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+72059, 325, 1906}, + /* 1498 : FCOMIP fpureg [r: df f0+r ] FL,FPU,P6 */ + /* 001(df) 010 360 : FL,FPU,P6 */ + {I_FCOMIP, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72064, 325, 1908}, + /* 1499 : FCOMIP fpu0,fpureg [-r: df f0+r ] FL,FPU,P6 */ + /* 001(df) 011 360 : FL,FPU,P6 */ + {I_FCOMIP, 2, {FPUREG|RN_ZERO,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+72069, 325, 1909}, + /* 1500 : FCOMP mem32 [m: d8 /3 ] FPU,8086 */ + /* 001(d8) 203 : FPU,8086 */ + {I_FCOMP, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+69947, 323, 1911}, + /* 1501 : FCOMP mem64 [m: dc /3 ] FPU,8086 */ + /* 001(dc) 203 : FPU,8086 */ + {I_FCOMP, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73028, 323, 1912}, + /* 1502 : FCOMP fpureg [r: d8 d8+r ] FPU,8086 */ + /* 001(d8) 010 330 : FPU,8086 */ + {I_FCOMP, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72074, 323, 1913}, + /* 1503 : FCOMP fpu0,fpureg [-r: d8 d8+r ] FPU,8086 */ + /* 001(d8) 011 330 : FPU,8086 */ + {I_FCOMP, 2, {FPUREG|RN_ZERO,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+72079, 323, 1914}, + /* 1504 : FCOMPP void [ de d9 ] FPU,8086 */ + /* 002(de d9) : FPU,8086 */ + {I_FCOMPP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73036, 323, 1916}, + /* 1505 : FCOS void [ d9 ff ] FPU,386 */ + /* 002(d9 ff) : FPU,386 */ + {I_FCOS, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73040, 326, 1917}, + /* 1506 : FDECSTP void [ d9 f6 ] FPU,8086 */ + /* 002(d9 f6) : FPU,8086 */ + {I_FDECSTP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73044, 323, 1918}, + /* 1507 : FDISI void [ wait db e1 ] FPU,8086 */ + /* 341 002(db e1) : FPU,8086 */ + {I_FDISI, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72084, 323, 1919}, + /* 1508 : FDIV mem32 [m: d8 /6 ] FPU,8086 */ + /* 001(d8) 206 : FPU,8086 */ + {I_FDIV, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73048, 323, 1920}, + /* 1509 : FDIV mem64 [m: dc /6 ] FPU,8086 */ + /* 001(dc) 206 : FPU,8086 */ + {I_FDIV, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73052, 323, 1921}, + /* 1510 : FDIV fpureg|to [r: dc f8+r ] FPU,8086 */ + /* 001(dc) 010 370 : FPU,8086 */ + {I_FDIV, 1, {FPUREG|TO,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72089, 323, 1922}, + /* 1511 : FDIV fpureg [r: d8 f0+r ] FPU,8086 */ + /* 001(d8) 010 360 : FPU,8086 */ + {I_FDIV, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72094, 323, 1923}, + /* 1512 : FDIV fpureg,fpu0 [r-: dc f8+r ] FPU,8086 */ + /* 001(dc) 010 370 : FPU,8086 */ + {I_FDIV, 2, {FPUREG,FPUREG|RN_ZERO,0,0,0}, NO_DECORATOR, nasm_bytecodes+72089, 323, 1924}, + /* 1513 : FDIV fpu0,fpureg [-r: d8 f0+r ] FPU,8086 */ + /* 001(d8) 011 360 : FPU,8086 */ + {I_FDIV, 2, {FPUREG|RN_ZERO,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+72099, 323, 1925}, + /* 1514 : FDIVP fpureg [r: de f8+r ] FPU,8086 */ + /* 001(de) 010 370 : FPU,8086 */ + {I_FDIVP, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72104, 323, 1927}, + /* 1515 : FDIVP fpureg,fpu0 [r-: de f8+r ] FPU,8086 */ + /* 001(de) 010 370 : FPU,8086 */ + {I_FDIVP, 2, {FPUREG,FPUREG|RN_ZERO,0,0,0}, NO_DECORATOR, nasm_bytecodes+72104, 323, 1928}, + /* 1516 : FDIVR mem32 [m: d8 /7 ] FPU,8086 */ + /* 001(d8) 207 : FPU,8086 */ + {I_FDIVR, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73060, 323, 1930}, + /* 1517 : FDIVR mem64 [m: dc /7 ] FPU,8086 */ + /* 001(dc) 207 : FPU,8086 */ + {I_FDIVR, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73064, 323, 1931}, + /* 1518 : FDIVR fpureg|to [r: dc f0+r ] FPU,8086 */ + /* 001(dc) 010 360 : FPU,8086 */ + {I_FDIVR, 1, {FPUREG|TO,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72109, 323, 1932}, + /* 1519 : FDIVR fpureg,fpu0 [r-: dc f0+r ] FPU,8086 */ + /* 001(dc) 010 360 : FPU,8086 */ + {I_FDIVR, 2, {FPUREG,FPUREG|RN_ZERO,0,0,0}, NO_DECORATOR, nasm_bytecodes+72109, 323, 1933}, + /* 1520 : FDIVR fpureg [r: d8 f8+r ] FPU,8086 */ + /* 001(d8) 010 370 : FPU,8086 */ + {I_FDIVR, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72114, 323, 1934}, + /* 1521 : FDIVR fpu0,fpureg [-r: d8 f8+r ] FPU,8086 */ + /* 001(d8) 011 370 : FPU,8086 */ + {I_FDIVR, 2, {FPUREG|RN_ZERO,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+72119, 323, 1935}, + /* 1522 : FDIVRP fpureg [r: de f0+r ] FPU,8086 */ + /* 001(de) 010 360 : FPU,8086 */ + {I_FDIVRP, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72124, 323, 1937}, + /* 1523 : FDIVRP fpureg,fpu0 [r-: de f0+r ] FPU,8086 */ + /* 001(de) 010 360 : FPU,8086 */ + {I_FDIVRP, 2, {FPUREG,FPUREG|RN_ZERO,0,0,0}, NO_DECORATOR, nasm_bytecodes+72124, 323, 1938}, + /* 1524 : FEMMS void [ 0f 0e ] 3DNOW,PENT */ + /* 355 001(0e) : 3DNOW,PENT */ + {I_FEMMS, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73072, 327, 1940}, + /* 1525 : FENI void [ wait db e0 ] FPU,8086 */ + /* 341 002(db e0) : FPU,8086 */ + {I_FENI, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72129, 323, 1941}, + /* 1526 : FFREE fpureg [r: dd c0+r ] FPU,8086 */ + /* 001(dd) 010 300 : FPU,8086 */ + {I_FFREE, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72134, 323, 1942}, + /* 1527 : FFREE void [ dd c1 ] FPU,8086 */ + /* 002(dd c1) : FPU,8086 */ + {I_FFREE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73076, 323, 1943}, + /* 1528 : FFREEP fpureg [r: df c0+r ] UNDOC,FPU,286 */ + /* 001(df) 010 300 : UNDOC,FPU,286 */ + {I_FFREEP, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72139, 328, 1944}, + /* 1529 : FFREEP void [ df c1 ] UNDOC,FPU,286 */ + /* 002(df c1) : UNDOC,FPU,286 */ + {I_FFREEP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73080, 328, 1945}, + /* 1530 : FIADD mem32 [m: da /0 ] FPU,8086 */ + /* 001(da) 200 : FPU,8086 */ + {I_FIADD, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73084, 323, 1946}, + /* 1531 : FIADD mem16 [m: de /0 ] FPU,8086 */ + /* 001(de) 200 : FPU,8086 */ + {I_FIADD, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73088, 323, 1947}, + /* 1532 : FICOM mem32 [m: da /2 ] FPU,8086 */ + /* 001(da) 202 : FPU,8086 */ + {I_FICOM, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73092, 323, 1948}, + /* 1533 : FICOM mem16 [m: de /2 ] FPU,8086 */ + /* 001(de) 202 : FPU,8086 */ + {I_FICOM, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73096, 323, 1949}, + /* 1534 : FICOMP mem32 [m: da /3 ] FPU,8086 */ + /* 001(da) 203 : FPU,8086 */ + {I_FICOMP, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73100, 323, 1950}, + /* 1535 : FICOMP mem16 [m: de /3 ] FPU,8086 */ + /* 001(de) 203 : FPU,8086 */ + {I_FICOMP, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73104, 323, 1951}, + /* 1536 : FIDIV mem32 [m: da /6 ] FPU,8086 */ + /* 001(da) 206 : FPU,8086 */ + {I_FIDIV, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73108, 323, 1952}, + /* 1537 : FIDIV mem16 [m: de /6 ] FPU,8086 */ + /* 001(de) 206 : FPU,8086 */ + {I_FIDIV, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73112, 323, 1953}, + /* 1538 : FIDIVR mem32 [m: da /7 ] FPU,8086 */ + /* 001(da) 207 : FPU,8086 */ + {I_FIDIVR, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73116, 323, 1954}, + /* 1539 : FIDIVR mem16 [m: de /7 ] FPU,8086 */ + /* 001(de) 207 : FPU,8086 */ + {I_FIDIVR, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73120, 323, 1955}, + /* 1540 : FILD mem32 [m: db /0 ] FPU,8086 */ + /* 001(db) 200 : FPU,8086 */ + {I_FILD, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73124, 323, 1956}, + /* 1541 : FILD mem16 [m: df /0 ] FPU,8086 */ + /* 001(df) 200 : FPU,8086 */ + {I_FILD, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73128, 323, 1957}, + /* 1542 : FILD mem64 [m: df /5 ] FPU,8086 */ + /* 001(df) 205 : FPU,8086 */ + {I_FILD, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73132, 323, 1958}, + /* 1543 : FIMUL mem32 [m: da /1 ] FPU,8086 */ + /* 001(da) 201 : FPU,8086 */ + {I_FIMUL, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73136, 323, 1959}, + /* 1544 : FIMUL mem16 [m: de /1 ] FPU,8086 */ + /* 001(de) 201 : FPU,8086 */ + {I_FIMUL, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73140, 323, 1960}, + /* 1545 : FINCSTP void [ d9 f7 ] FPU,8086 */ + /* 002(d9 f7) : FPU,8086 */ + {I_FINCSTP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73144, 323, 1961}, + /* 1546 : FINIT void [ wait db e3 ] FPU,8086 */ + /* 341 002(db e3) : FPU,8086 */ + {I_FINIT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72144, 323, 1962}, + /* 1547 : FIST mem32 [m: db /2 ] FPU,8086 */ + /* 001(db) 202 : FPU,8086 */ + {I_FIST, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73148, 323, 1963}, + /* 1548 : FIST mem16 [m: df /2 ] FPU,8086 */ + /* 001(df) 202 : FPU,8086 */ + {I_FIST, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73152, 323, 1964}, + /* 1549 : FISTP mem32 [m: db /3 ] FPU,8086 */ + /* 001(db) 203 : FPU,8086 */ + {I_FISTP, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73156, 323, 1965}, + /* 1550 : FISTP mem16 [m: df /3 ] FPU,8086 */ + /* 001(df) 203 : FPU,8086 */ + {I_FISTP, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73160, 323, 1966}, + /* 1551 : FISTP mem64 [m: df /7 ] FPU,8086 */ + /* 001(df) 207 : FPU,8086 */ + {I_FISTP, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73164, 323, 1967}, + /* 1552 : FISTTP mem16 [m: df /1 ] FPU,PRESCOTT */ + /* 001(df) 201 : FPU,PRESCOTT */ + {I_FISTTP, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73168, 329, 1968}, + /* 1553 : FISTTP mem32 [m: db /1 ] FPU,PRESCOTT */ + /* 001(db) 201 : FPU,PRESCOTT */ + {I_FISTTP, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73172, 329, 1969}, + /* 1554 : FISTTP mem64 [m: dd /1 ] FPU,PRESCOTT */ + /* 001(dd) 201 : FPU,PRESCOTT */ + {I_FISTTP, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73176, 329, 1970}, + /* 1555 : FISUB mem32 [m: da /4 ] FPU,8086 */ + /* 001(da) 204 : FPU,8086 */ + {I_FISUB, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73180, 323, 1971}, + /* 1556 : FISUB mem16 [m: de /4 ] FPU,8086 */ + /* 001(de) 204 : FPU,8086 */ + {I_FISUB, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73184, 323, 1972}, + /* 1557 : FISUBR mem32 [m: da /5 ] FPU,8086 */ + /* 001(da) 205 : FPU,8086 */ + {I_FISUBR, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73188, 323, 1973}, + /* 1558 : FISUBR mem16 [m: de /5 ] FPU,8086 */ + /* 001(de) 205 : FPU,8086 */ + {I_FISUBR, 1, {MEMORY|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73192, 323, 1974}, + /* 1559 : FLD mem32 [m: d9 /0 ] FPU,8086 */ + /* 001(d9) 200 : FPU,8086 */ + {I_FLD, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73196, 323, 1975}, + /* 1560 : FLD mem64 [m: dd /0 ] FPU,8086 */ + /* 001(dd) 200 : FPU,8086 */ + {I_FLD, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73200, 323, 1976}, + /* 1561 : FLD mem80 [m: db /5 ] FPU,8086 */ + /* 001(db) 205 : FPU,8086 */ + {I_FLD, 1, {MEMORY|BITS80,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73204, 323, 1977}, + /* 1562 : FLD fpureg [r: d9 c0+r ] FPU,8086 */ + /* 001(d9) 010 300 : FPU,8086 */ + {I_FLD, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72149, 323, 1978}, + /* 1563 : FLD1 void [ d9 e8 ] FPU,8086 */ + /* 002(d9 e8) : FPU,8086 */ + {I_FLD1, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73212, 323, 1980}, + /* 1564 : FLDCW mem [m: d9 /5 ] AR0,SW,FPU,8086 */ + /* 001(d9) 205 : AR0,SW,FPU,8086 */ + {I_FLDCW, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73216, 330, 1981}, + /* 1565 : FLDENV mem [m: d9 /4 ] FPU,8086 */ + /* 001(d9) 204 : FPU,8086 */ + {I_FLDENV, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73220, 323, 1982}, + /* 1566 : FLDL2E void [ d9 ea ] FPU,8086 */ + /* 002(d9 ea) : FPU,8086 */ + {I_FLDL2E, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73224, 323, 1983}, + /* 1567 : FLDL2T void [ d9 e9 ] FPU,8086 */ + /* 002(d9 e9) : FPU,8086 */ + {I_FLDL2T, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73228, 323, 1984}, + /* 1568 : FLDLG2 void [ d9 ec ] FPU,8086 */ + /* 002(d9 ec) : FPU,8086 */ + {I_FLDLG2, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73232, 323, 1985}, + /* 1569 : FLDLN2 void [ d9 ed ] FPU,8086 */ + /* 002(d9 ed) : FPU,8086 */ + {I_FLDLN2, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73236, 323, 1986}, + /* 1570 : FLDPI void [ d9 eb ] FPU,8086 */ + /* 002(d9 eb) : FPU,8086 */ + {I_FLDPI, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73240, 323, 1987}, + /* 1571 : FLDZ void [ d9 ee ] FPU,8086 */ + /* 002(d9 ee) : FPU,8086 */ + {I_FLDZ, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73244, 323, 1988}, + /* 1572 : FMUL mem32 [m: d8 /1 ] FPU,8086 */ + /* 001(d8) 201 : FPU,8086 */ + {I_FMUL, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+69941, 323, 1989}, + /* 1573 : FMUL mem64 [m: dc /1 ] FPU,8086 */ + /* 001(dc) 201 : FPU,8086 */ + {I_FMUL, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73248, 323, 1990}, + /* 1574 : FMUL fpureg|to [r: dc c8+r ] FPU,8086 */ + /* 001(dc) 010 310 : FPU,8086 */ + {I_FMUL, 1, {FPUREG|TO,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72154, 323, 1991}, + /* 1575 : FMUL fpureg,fpu0 [r-: dc c8+r ] FPU,8086 */ + /* 001(dc) 010 310 : FPU,8086 */ + {I_FMUL, 2, {FPUREG,FPUREG|RN_ZERO,0,0,0}, NO_DECORATOR, nasm_bytecodes+72154, 323, 1992}, + /* 1576 : FMUL fpureg [r: d8 c8+r ] FPU,8086 */ + /* 001(d8) 010 310 : FPU,8086 */ + {I_FMUL, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72159, 323, 1993}, + /* 1577 : FMUL fpu0,fpureg [-r: d8 c8+r ] FPU,8086 */ + /* 001(d8) 011 310 : FPU,8086 */ + {I_FMUL, 2, {FPUREG|RN_ZERO,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+72164, 323, 1994}, + /* 1578 : FMULP fpureg [r: de c8+r ] FPU,8086 */ + /* 001(de) 010 310 : FPU,8086 */ + {I_FMULP, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72169, 323, 1996}, + /* 1579 : FMULP fpureg,fpu0 [r-: de c8+r ] FPU,8086 */ + /* 001(de) 010 310 : FPU,8086 */ + {I_FMULP, 2, {FPUREG,FPUREG|RN_ZERO,0,0,0}, NO_DECORATOR, nasm_bytecodes+72169, 323, 1997}, + /* 1580 : FNCLEX void [ db e2 ] FPU,8086 */ + /* 002(db e2) : FPU,8086 */ + {I_FNCLEX, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+71960, 323, 1999}, + /* 1581 : FNDISI void [ db e1 ] FPU,8086 */ + /* 002(db e1) : FPU,8086 */ + {I_FNDISI, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72085, 323, 2000}, + /* 1582 : FNENI void [ db e0 ] FPU,8086 */ + /* 002(db e0) : FPU,8086 */ + {I_FNENI, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72130, 323, 2001}, + /* 1583 : FNINIT void [ db e3 ] FPU,8086 */ + /* 002(db e3) : FPU,8086 */ + {I_FNINIT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72145, 323, 2002}, + /* 1584 : FNOP void [ d9 d0 ] FPU,8086 */ + /* 002(d9 d0) : FPU,8086 */ + {I_FNOP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73256, 323, 2003}, + /* 1585 : FNSAVE mem [m: dd /6 ] FPU,8086 */ + /* 001(dd) 206 : FPU,8086 */ + {I_FNSAVE, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72175, 323, 2004}, + /* 1586 : FNSTCW mem [m: d9 /7 ] AR0,SW,FPU,8086 */ + /* 001(d9) 207 : AR0,SW,FPU,8086 */ + {I_FNSTCW, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72185, 330, 2005}, + /* 1587 : FNSTENV mem [m: d9 /6 ] FPU,8086 */ + /* 001(d9) 206 : FPU,8086 */ + {I_FNSTENV, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72190, 323, 2006}, + /* 1588 : FNSTSW mem [m: dd /7 ] AR0,SW,FPU,8086 */ + /* 001(dd) 207 : AR0,SW,FPU,8086 */ + {I_FNSTSW, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72200, 330, 2007}, + /* 1589 : FNSTSW reg_ax [-: df e0 ] FPU,286 */ + /* 002(df e0) : FPU,286 */ + {I_FNSTSW, 1, {REG_AX,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72205, 331, 2008}, + /* 1590 : FPATAN void [ d9 f3 ] FPU,8086 */ + /* 002(d9 f3) : FPU,8086 */ + {I_FPATAN, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73260, 323, 2009}, + /* 1591 : FPREM void [ d9 f8 ] FPU,8086 */ + /* 002(d9 f8) : FPU,8086 */ + {I_FPREM, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73264, 323, 2010}, + /* 1592 : FPREM1 void [ d9 f5 ] FPU,386 */ + /* 002(d9 f5) : FPU,386 */ + {I_FPREM1, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73268, 326, 2011}, + /* 1593 : FPTAN void [ d9 f2 ] FPU,8086 */ + /* 002(d9 f2) : FPU,8086 */ + {I_FPTAN, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73272, 323, 2012}, + /* 1594 : FRNDINT void [ d9 fc ] FPU,8086 */ + /* 002(d9 fc) : FPU,8086 */ + {I_FRNDINT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73276, 323, 2013}, + /* 1595 : FRSTOR mem [m: dd /4 ] FPU,8086 */ + /* 001(dd) 204 : FPU,8086 */ + {I_FRSTOR, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73280, 323, 2014}, + /* 1596 : FSAVE mem [m: wait dd /6 ] FPU,8086 */ + /* 341 001(dd) 206 : FPU,8086 */ + {I_FSAVE, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72174, 323, 2015}, + /* 1597 : FSCALE void [ d9 fd ] FPU,8086 */ + /* 002(d9 fd) : FPU,8086 */ + {I_FSCALE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73284, 323, 2016}, + /* 1598 : FSETPM void [ db e4 ] FPU,286 */ + /* 002(db e4) : FPU,286 */ + {I_FSETPM, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73288, 331, 2017}, + /* 1599 : FSIN void [ d9 fe ] FPU,386 */ + /* 002(d9 fe) : FPU,386 */ + {I_FSIN, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73292, 326, 2018}, + /* 1600 : FSINCOS void [ d9 fb ] FPU,386 */ + /* 002(d9 fb) : FPU,386 */ + {I_FSINCOS, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73296, 326, 2019}, + /* 1601 : FSQRT void [ d9 fa ] FPU,8086 */ + /* 002(d9 fa) : FPU,8086 */ + {I_FSQRT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73300, 323, 2020}, + /* 1602 : FST mem32 [m: d9 /2 ] FPU,8086 */ + /* 001(d9) 202 : FPU,8086 */ + {I_FST, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73304, 323, 2021}, + /* 1603 : FST mem64 [m: dd /2 ] FPU,8086 */ + /* 001(dd) 202 : FPU,8086 */ + {I_FST, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73308, 323, 2022}, + /* 1604 : FST fpureg [r: dd d0+r ] FPU,8086 */ + /* 001(dd) 010 320 : FPU,8086 */ + {I_FST, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72179, 323, 2023}, + /* 1605 : FSTCW mem [m: wait d9 /7 ] AR0,SW,FPU,8086 */ + /* 341 001(d9) 207 : AR0,SW,FPU,8086 */ + {I_FSTCW, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72184, 330, 2025}, + /* 1606 : FSTENV mem [m: wait d9 /6 ] FPU,8086 */ + /* 341 001(d9) 206 : FPU,8086 */ + {I_FSTENV, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72189, 323, 2026}, + /* 1607 : FSTP mem32 [m: d9 /3 ] FPU,8086 */ + /* 001(d9) 203 : FPU,8086 */ + {I_FSTP, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73316, 323, 2027}, + /* 1608 : FSTP mem64 [m: dd /3 ] FPU,8086 */ + /* 001(dd) 203 : FPU,8086 */ + {I_FSTP, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73320, 323, 2028}, + /* 1609 : FSTP mem80 [m: db /7 ] FPU,8086 */ + /* 001(db) 207 : FPU,8086 */ + {I_FSTP, 1, {MEMORY|BITS80,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73324, 323, 2029}, + /* 1610 : FSTP fpureg [r: dd d8+r ] FPU,8086 */ + /* 001(dd) 010 330 : FPU,8086 */ + {I_FSTP, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72194, 323, 2030}, + /* 1611 : FSTSW mem [m: wait dd /7 ] AR0,SW,FPU,8086 */ + /* 341 001(dd) 207 : AR0,SW,FPU,8086 */ + {I_FSTSW, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72199, 330, 2032}, + /* 1612 : FSTSW reg_ax [-: wait df e0 ] FPU,286 */ + /* 341 002(df e0) : FPU,286 */ + {I_FSTSW, 1, {REG_AX,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72204, 331, 2033}, + /* 1613 : FSUB mem32 [m: d8 /4 ] FPU,8086 */ + /* 001(d8) 204 : FPU,8086 */ + {I_FSUB, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73332, 323, 2034}, + /* 1614 : FSUB mem64 [m: dc /4 ] FPU,8086 */ + /* 001(dc) 204 : FPU,8086 */ + {I_FSUB, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73336, 323, 2035}, + /* 1615 : FSUB fpureg|to [r: dc e8+r ] FPU,8086 */ + /* 001(dc) 010 350 : FPU,8086 */ + {I_FSUB, 1, {FPUREG|TO,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72209, 323, 2036}, + /* 1616 : FSUB fpureg,fpu0 [r-: dc e8+r ] FPU,8086 */ + /* 001(dc) 010 350 : FPU,8086 */ + {I_FSUB, 2, {FPUREG,FPUREG|RN_ZERO,0,0,0}, NO_DECORATOR, nasm_bytecodes+72209, 323, 2037}, + /* 1617 : FSUB fpureg [r: d8 e0+r ] FPU,8086 */ + /* 001(d8) 010 340 : FPU,8086 */ + {I_FSUB, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72214, 323, 2038}, + /* 1618 : FSUB fpu0,fpureg [-r: d8 e0+r ] FPU,8086 */ + /* 001(d8) 011 340 : FPU,8086 */ + {I_FSUB, 2, {FPUREG|RN_ZERO,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+72219, 323, 2039}, + /* 1619 : FSUBP fpureg [r: de e8+r ] FPU,8086 */ + /* 001(de) 010 350 : FPU,8086 */ + {I_FSUBP, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72224, 323, 2041}, + /* 1620 : FSUBP fpureg,fpu0 [r-: de e8+r ] FPU,8086 */ + /* 001(de) 010 350 : FPU,8086 */ + {I_FSUBP, 2, {FPUREG,FPUREG|RN_ZERO,0,0,0}, NO_DECORATOR, nasm_bytecodes+72224, 323, 2042}, + /* 1621 : FSUBR mem32 [m: d8 /5 ] FPU,8086 */ + /* 001(d8) 205 : FPU,8086 */ + {I_FSUBR, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73344, 323, 2044}, + /* 1622 : FSUBR mem64 [m: dc /5 ] FPU,8086 */ + /* 001(dc) 205 : FPU,8086 */ + {I_FSUBR, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73348, 323, 2045}, + /* 1623 : FSUBR fpureg|to [r: dc e0+r ] FPU,8086 */ + /* 001(dc) 010 340 : FPU,8086 */ + {I_FSUBR, 1, {FPUREG|TO,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72229, 323, 2046}, + /* 1624 : FSUBR fpureg,fpu0 [r-: dc e0+r ] FPU,8086 */ + /* 001(dc) 010 340 : FPU,8086 */ + {I_FSUBR, 2, {FPUREG,FPUREG|RN_ZERO,0,0,0}, NO_DECORATOR, nasm_bytecodes+72229, 323, 2047}, + /* 1625 : FSUBR fpureg [r: d8 e8+r ] FPU,8086 */ + /* 001(d8) 010 350 : FPU,8086 */ + {I_FSUBR, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72234, 323, 2048}, + /* 1626 : FSUBR fpu0,fpureg [-r: d8 e8+r ] FPU,8086 */ + /* 001(d8) 011 350 : FPU,8086 */ + {I_FSUBR, 2, {FPUREG|RN_ZERO,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+72239, 323, 2049}, + /* 1627 : FSUBRP fpureg [r: de e0+r ] FPU,8086 */ + /* 001(de) 010 340 : FPU,8086 */ + {I_FSUBRP, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72244, 323, 2051}, + /* 1628 : FSUBRP fpureg,fpu0 [r-: de e0+r ] FPU,8086 */ + /* 001(de) 010 340 : FPU,8086 */ + {I_FSUBRP, 2, {FPUREG,FPUREG|RN_ZERO,0,0,0}, NO_DECORATOR, nasm_bytecodes+72244, 323, 2052}, + /* 1629 : FTST void [ d9 e4 ] FPU,8086 */ + /* 002(d9 e4) : FPU,8086 */ + {I_FTST, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73356, 323, 2054}, + /* 1630 : FUCOM fpureg [r: dd e0+r ] FPU,386 */ + /* 001(dd) 010 340 : FPU,386 */ + {I_FUCOM, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72249, 326, 2055}, + /* 1631 : FUCOM fpu0,fpureg [-r: dd e0+r ] FPU,386 */ + /* 001(dd) 011 340 : FPU,386 */ + {I_FUCOM, 2, {FPUREG|RN_ZERO,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+72254, 326, 2056}, + /* 1632 : FUCOMI fpureg [r: db e8+r ] FL,FPU,P6 */ + /* 001(db) 010 350 : FL,FPU,P6 */ + {I_FUCOMI, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72259, 325, 2058}, + /* 1633 : FUCOMI fpu0,fpureg [-r: db e8+r ] FL,FPU,P6 */ + /* 001(db) 011 350 : FL,FPU,P6 */ + {I_FUCOMI, 2, {FPUREG|RN_ZERO,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+72264, 325, 2059}, + /* 1634 : FUCOMIP fpureg [r: df e8+r ] FL,FPU,P6 */ + /* 001(df) 010 350 : FL,FPU,P6 */ + {I_FUCOMIP, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72269, 325, 2061}, + /* 1635 : FUCOMIP fpu0,fpureg [-r: df e8+r ] FL,FPU,P6 */ + /* 001(df) 011 350 : FL,FPU,P6 */ + {I_FUCOMIP, 2, {FPUREG|RN_ZERO,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+72274, 325, 2062}, + /* 1636 : FUCOMP fpureg [r: dd e8+r ] FPU,386 */ + /* 001(dd) 010 350 : FPU,386 */ + {I_FUCOMP, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72279, 326, 2064}, + /* 1637 : FUCOMP fpu0,fpureg [-r: dd e8+r ] FPU,386 */ + /* 001(dd) 011 350 : FPU,386 */ + {I_FUCOMP, 2, {FPUREG|RN_ZERO,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+72284, 326, 2065}, + /* 1638 : FUCOMPP void [ da e9 ] FPU,386 */ + /* 002(da e9) : FPU,386 */ + {I_FUCOMPP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73376, 326, 2067}, + /* 1639 : FXAM void [ d9 e5 ] FPU,8086 */ + /* 002(d9 e5) : FPU,8086 */ + {I_FXAM, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73380, 323, 2068}, + /* 1640 : FXCH fpureg [r: d9 c8+r ] FPU,8086 */ + /* 001(d9) 010 310 : FPU,8086 */ + {I_FXCH, 1, {FPUREG,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72289, 323, 2069}, + /* 1641 : FXCH fpureg,fpu0 [r-: d9 c8+r ] FPU,8086 */ + /* 001(d9) 010 310 : FPU,8086 */ + {I_FXCH, 2, {FPUREG,FPUREG|RN_ZERO,0,0,0}, NO_DECORATOR, nasm_bytecodes+72289, 323, 2070}, + /* 1642 : FXCH fpu0,fpureg [-r: d9 c8+r ] FPU,8086 */ + /* 001(d9) 011 310 : FPU,8086 */ + {I_FXCH, 2, {FPUREG|RN_ZERO,FPUREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+72294, 323, 2071}, + /* 1643 : FXTRACT void [ d9 f4 ] FPU,8086 */ + /* 002(d9 f4) : FPU,8086 */ + {I_FXTRACT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73388, 323, 2073}, + /* 1644 : FYL2X void [ d9 f1 ] FPU,8086 */ + /* 002(d9 f1) : FPU,8086 */ + {I_FYL2X, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73392, 323, 2074}, + /* 1645 : FYL2XP1 void [ d9 f9 ] FPU,8086 */ + /* 002(d9 f9) : FPU,8086 */ + {I_FYL2XP1, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73396, 323, 2075}, + /* 1646 : EMMS void [ 0f 77 ] MMX,PENT */ + /* 355 001(77) : MMX,PENT */ + {I_EMMS, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73400, 332, 2078}, + /* 1647 : MOVD mmxreg,rm32 [rm: np 0f 6e /r ] MMX,PENT */ + /* 360 355 001(6e) 110 : MMX,PENT */ + {I_MOVD, 2, {MMXREG,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+67635, 332, 2079}, + /* 1648 : MOVD rm32,mmxreg [mr: np 0f 7e /r ] MMX,PENT */ + /* 360 355 001(7e) 101 : MMX,PENT */ + {I_MOVD, 2, {RM_GPR|BITS32,MMXREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+67641, 332, 2080}, + /* 1649 : MOVQ mmxreg,mmxrm64 [rm: np 0f 6f /r ] MMX,PENT */ + /* 360 355 001(6f) 110 : MMX,PENT */ + {I_MOVQ, 2, {MMXREG,RM_MMX|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+67647, 332, 2083}, + /* 1650 : MOVQ mmxrm64,mmxreg [mr: np 0f 7f /r ] MMX,PENT */ + /* 360 355 001(7f) 101 : MMX,PENT */ + {I_MOVQ, 2, {RM_MMX|BITS64,MMXREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+67653, 332, 2084}, + /* 1651 : MOVQ mmxreg,rm64 [rm: np o64 0f 6e /r ] LONG,PROT,MMX,X86_64 */ + /* 360 324 355 001(6e) 110 : LONG,PROT,MMX,X86_64 */ + {I_MOVQ, 2, {MMXREG,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+57350, 333, 2085}, + /* 1652 : MOVQ rm64,mmxreg [mr: np o64 0f 7e /r ] LONG,PROT,MMX,X86_64 */ + /* 360 324 355 001(7e) 101 : LONG,PROT,MMX,X86_64 */ + {I_MOVQ, 2, {RM_GPR|BITS64,MMXREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+57357, 333, 2086}, + /* 1653 : PACKSSDW mmxreg,mmxrm [rm: np 0f 6b /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(6b) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PACKSSDW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67659, 334, 2087}, + /* 1654 : PACKSSWB mmxreg,mmxrm [rm: np 0f 63 /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(63) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PACKSSWB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67665, 334, 2088}, + /* 1655 : PACKUSWB mmxreg,mmxrm [rm: np 0f 67 /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(67) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PACKUSWB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67671, 334, 2089}, + /* 1656 : PADDB mmxreg,mmxrm [rm: np 0f fc /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(fc) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PADDB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67677, 334, 2090}, + /* 1657 : PADDD mmxreg,mmxrm [rm: np 0f fe /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(fe) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PADDD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67683, 334, 2091}, + /* 1658 : PADDSB mmxreg,mmxrm [rm: np 0f ec /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(ec) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PADDSB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67689, 334, 2092}, + /* 1659 : PADDSIW mmxreg,mmxrm [rm: 0f 51 /r ] AR0-1,SQ,MMX,PENT,CYRIX */ + /* 355 001(51) 110 : AR0,AR1,SQ,MMX,PENT,CYRIX */ + {I_PADDSIW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+69340, 335, 2093}, + /* 1660 : PADDSW mmxreg,mmxrm [rm: np 0f ed /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(ed) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PADDSW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67695, 334, 2094}, + /* 1661 : PADDUSB mmxreg,mmxrm [rm: np 0f dc /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(dc) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PADDUSB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67701, 334, 2095}, + /* 1662 : PADDUSW mmxreg,mmxrm [rm: np 0f dd /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(dd) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PADDUSW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67707, 334, 2096}, + /* 1663 : PADDW mmxreg,mmxrm [rm: np 0f fd /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(fd) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PADDW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67713, 334, 2097}, + /* 1664 : PAND mmxreg,mmxrm [rm: np 0f db /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(db) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PAND, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67719, 334, 2098}, + /* 1665 : PANDN mmxreg,mmxrm [rm: np 0f df /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(df) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PANDN, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67725, 334, 2099}, + /* 1666 : PAVEB mmxreg,mmxrm [rm: 0f 50 /r ] AR0-1,SQ,MMX,PENT,CYRIX */ + /* 355 001(50) 110 : AR0,AR1,SQ,MMX,PENT,CYRIX */ + {I_PAVEB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+69286, 335, 2100}, + /* 1667 : PAVGUSB mmxreg,mmxrm [rm: 0f 0f /r bf ] AR0-1,SQ,3DNOW,PENT */ + /* 355 001(0f) 110 001(bf) : AR0,AR1,SQ,3DNOW,PENT */ + {I_PAVGUSB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+57364, 336, 2101}, + /* 1668 : PCMPEQB mmxreg,mmxrm [rm: np 0f 74 /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(74) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PCMPEQB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67731, 334, 2102}, + /* 1669 : PCMPEQD mmxreg,mmxrm [rm: np 0f 76 /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(76) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PCMPEQD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67737, 334, 2103}, + /* 1670 : PCMPEQW mmxreg,mmxrm [rm: np 0f 75 /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(75) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PCMPEQW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67743, 334, 2104}, + /* 1671 : PCMPGTB mmxreg,mmxrm [rm: np 0f 64 /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(64) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PCMPGTB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67749, 334, 2105}, + /* 1672 : PCMPGTD mmxreg,mmxrm [rm: np 0f 66 /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(66) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PCMPGTD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67755, 334, 2106}, + /* 1673 : PCMPGTW mmxreg,mmxrm [rm: np 0f 65 /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(65) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PCMPGTW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67761, 334, 2107}, + /* 1674 : PDISTIB mmxreg,mem [rm: 0f 54 /r ] AR0-1,SQ,MMX,PENT,CYRIX */ + /* 355 001(54) 110 : AR0,AR1,SQ,MMX,PENT,CYRIX */ + {I_PDISTIB, 2, {MMXREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+69124, 335, 2108}, + /* 1675 : PF2ID mmxreg,mmxrm [rm: 0f 0f /r 1d ] AR0-1,SQ,3DNOW,PENT */ + /* 355 001(0f) 110 001(1d) : AR0,AR1,SQ,3DNOW,PENT */ + {I_PF2ID, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+57371, 336, 2109}, + /* 1676 : PFACC mmxreg,mmxrm [rm: 0f 0f /r ae ] AR0-1,SQ,3DNOW,PENT */ + /* 355 001(0f) 110 001(ae) : AR0,AR1,SQ,3DNOW,PENT */ + {I_PFACC, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+57378, 336, 2110}, + /* 1677 : PFADD mmxreg,mmxrm [rm: 0f 0f /r 9e ] AR0-1,SQ,3DNOW,PENT */ + /* 355 001(0f) 110 001(9e) : AR0,AR1,SQ,3DNOW,PENT */ + {I_PFADD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+57385, 336, 2111}, + /* 1678 : PFCMPEQ mmxreg,mmxrm [rm: 0f 0f /r b0 ] AR0-1,SQ,3DNOW,PENT */ + /* 355 001(0f) 110 001(b0) : AR0,AR1,SQ,3DNOW,PENT */ + {I_PFCMPEQ, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+57392, 336, 2112}, + /* 1679 : PFCMPGE mmxreg,mmxrm [rm: 0f 0f /r 90 ] AR0-1,SQ,3DNOW,PENT */ + /* 355 001(0f) 110 001(90) : AR0,AR1,SQ,3DNOW,PENT */ + {I_PFCMPGE, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+57399, 336, 2113}, + /* 1680 : PFCMPGT mmxreg,mmxrm [rm: 0f 0f /r a0 ] AR0-1,SQ,3DNOW,PENT */ + /* 355 001(0f) 110 001(a0) : AR0,AR1,SQ,3DNOW,PENT */ + {I_PFCMPGT, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+57406, 336, 2114}, + /* 1681 : PFMAX mmxreg,mmxrm [rm: 0f 0f /r a4 ] AR0-1,SQ,3DNOW,PENT */ + /* 355 001(0f) 110 001(a4) : AR0,AR1,SQ,3DNOW,PENT */ + {I_PFMAX, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+57413, 336, 2115}, + /* 1682 : PFMIN mmxreg,mmxrm [rm: 0f 0f /r 94 ] AR0-1,SQ,3DNOW,PENT */ + /* 355 001(0f) 110 001(94) : AR0,AR1,SQ,3DNOW,PENT */ + {I_PFMIN, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+57420, 336, 2116}, + /* 1683 : PFMUL mmxreg,mmxrm [rm: 0f 0f /r b4 ] AR0-1,SQ,3DNOW,PENT */ + /* 355 001(0f) 110 001(b4) : AR0,AR1,SQ,3DNOW,PENT */ + {I_PFMUL, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+57427, 336, 2117}, + /* 1684 : PFRCP mmxreg,mmxrm [rm: 0f 0f /r 96 ] AR0-1,SQ,3DNOW,PENT */ + /* 355 001(0f) 110 001(96) : AR0,AR1,SQ,3DNOW,PENT */ + {I_PFRCP, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+57434, 336, 2118}, + /* 1685 : PFRCPIT1 mmxreg,mmxrm [rm: 0f 0f /r a6 ] AR0-1,SQ,3DNOW,PENT */ + /* 355 001(0f) 110 001(a6) : AR0,AR1,SQ,3DNOW,PENT */ + {I_PFRCPIT1, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+57441, 336, 2119}, + /* 1686 : PFRCPIT2 mmxreg,mmxrm [rm: 0f 0f /r b6 ] AR0-1,SQ,3DNOW,PENT */ + /* 355 001(0f) 110 001(b6) : AR0,AR1,SQ,3DNOW,PENT */ + {I_PFRCPIT2, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+57448, 336, 2120}, + /* 1687 : PFRSQIT1 mmxreg,mmxrm [rm: 0f 0f /r a7 ] AR0-1,SQ,3DNOW,PENT */ + /* 355 001(0f) 110 001(a7) : AR0,AR1,SQ,3DNOW,PENT */ + {I_PFRSQIT1, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+57455, 336, 2121}, + /* 1688 : PFRSQRT mmxreg,mmxrm [rm: 0f 0f /r 97 ] AR0-1,SQ,3DNOW,PENT */ + /* 355 001(0f) 110 001(97) : AR0,AR1,SQ,3DNOW,PENT */ + {I_PFRSQRT, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+57462, 336, 2122}, + /* 1689 : PFSUB mmxreg,mmxrm [rm: 0f 0f /r 9a ] AR0-1,SQ,3DNOW,PENT */ + /* 355 001(0f) 110 001(9a) : AR0,AR1,SQ,3DNOW,PENT */ + {I_PFSUB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+57469, 336, 2123}, + /* 1690 : PFSUBR mmxreg,mmxrm [rm: 0f 0f /r aa ] AR0-1,SQ,3DNOW,PENT */ + /* 355 001(0f) 110 001(aa) : AR0,AR1,SQ,3DNOW,PENT */ + {I_PFSUBR, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+57476, 336, 2124}, + /* 1691 : PI2FD mmxreg,mmxrm [rm: 0f 0f /r 0d ] AR0-1,SQ,3DNOW,PENT */ + /* 355 001(0f) 110 001(0d) : AR0,AR1,SQ,3DNOW,PENT */ + {I_PI2FD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+57483, 336, 2125}, + /* 1692 : PMACHRIW mmxreg,mem [rm: 0f 5e /r ] AR0-1,SQ,MMX,PENT,CYRIX */ + /* 355 001(5e) 110 : AR0,AR1,SQ,MMX,PENT,CYRIX */ + {I_PMACHRIW, 2, {MMXREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+69220, 335, 2126}, + /* 1693 : PMADDWD mmxreg,mmxrm [rm: np 0f f5 /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(f5) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PMADDWD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67767, 334, 2127}, + /* 1694 : PMAGW mmxreg,mmxrm [rm: 0f 52 /r ] AR0-1,SQ,MMX,PENT,CYRIX */ + /* 355 001(52) 110 : AR0,AR1,SQ,MMX,PENT,CYRIX */ + {I_PMAGW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+68548, 335, 2128}, + /* 1695 : PMULHRIW mmxreg,mmxrm [rm: 0f 5d /r ] AR0-1,SQ,MMX,PENT,CYRIX */ + /* 355 001(5d) 110 : AR0,AR1,SQ,MMX,PENT,CYRIX */ + {I_PMULHRIW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+69244, 335, 2129}, + /* 1696 : PMULHRWA mmxreg,mmxrm [rm: 0f 0f /r b7 ] AR0-1,SQ,3DNOW,PENT */ + /* 355 001(0f) 110 001(b7) : AR0,AR1,SQ,3DNOW,PENT */ + {I_PMULHRWA, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+57490, 336, 2130}, + /* 1697 : PMULHRWC mmxreg,mmxrm [rm: 0f 59 /r ] AR0-1,SQ,MMX,PENT,CYRIX */ + /* 355 001(59) 110 : AR0,AR1,SQ,MMX,PENT,CYRIX */ + {I_PMULHRWC, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+69322, 335, 2131}, + /* 1698 : PMULHW mmxreg,mmxrm [rm: np 0f e5 /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(e5) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PMULHW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67773, 334, 2132}, + /* 1699 : PMULLW mmxreg,mmxrm [rm: np 0f d5 /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(d5) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PMULLW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67779, 334, 2133}, + /* 1700 : PMVGEZB mmxreg,mem [rm: 0f 5c /r ] AR0-1,SQ,MMX,PENT,CYRIX */ + /* 355 001(5c) 110 : AR0,AR1,SQ,MMX,PENT,CYRIX */ + {I_PMVGEZB, 2, {MMXREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+69352, 335, 2134}, + /* 1701 : PMVLZB mmxreg,mem [rm: 0f 5b /r ] AR0-1,SQ,MMX,PENT,CYRIX */ + /* 355 001(5b) 110 : AR0,AR1,SQ,MMX,PENT,CYRIX */ + {I_PMVLZB, 2, {MMXREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+69208, 335, 2135}, + /* 1702 : PMVNZB mmxreg,mem [rm: 0f 5a /r ] AR0-1,SQ,MMX,PENT,CYRIX */ + /* 355 001(5a) 110 : AR0,AR1,SQ,MMX,PENT,CYRIX */ + {I_PMVNZB, 2, {MMXREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+69190, 335, 2136}, + /* 1703 : PMVZB mmxreg,mem [rm: 0f 58 /r ] AR0-1,SQ,MMX,PENT,CYRIX */ + /* 355 001(58) 110 : AR0,AR1,SQ,MMX,PENT,CYRIX */ + {I_PMVZB, 2, {MMXREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+69112, 335, 2137}, + /* 1704 : POR mmxreg,mmxrm [rm: np 0f eb /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(eb) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_POR, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67785, 334, 2138}, + /* 1705 : PREFETCH mem [m: 0f 0d /0 ] AR0,SQ,3DNOW,PENT */ + /* 355 001(0d) 200 : AR0,SQ,3DNOW,PENT */ + {I_PREFETCH, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72299, 337, 2139}, + /* 1706 : PREFETCHW mem [m: 0f 0d /1 ] AR0,SQ,3DNOW,PENT */ + /* 355 001(0d) 201 : AR0,SQ,3DNOW,PENT */ + {I_PREFETCHW, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72304, 337, 2140}, + /* 1707 : PSLLD mmxreg,mmxrm [rm: np 0f f2 /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(f2) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PSLLD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67791, 334, 2141}, + /* 1708 : PSLLD mmxreg,imm [mi: np 0f 72 /6 ib,u ] MMX,PENT */ + /* 360 355 001(72) 206 025 : MMX,PENT */ + {I_PSLLD, 2, {MMXREG,IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+57497, 332, 2142}, + /* 1709 : PSLLQ mmxreg,mmxrm [rm: np 0f f3 /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(f3) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PSLLQ, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67797, 334, 2143}, + /* 1710 : PSLLQ mmxreg,imm [mi: np 0f 73 /6 ib,u ] MMX,PENT */ + /* 360 355 001(73) 206 025 : MMX,PENT */ + {I_PSLLQ, 2, {MMXREG,IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+57504, 332, 2144}, + /* 1711 : PSLLW mmxreg,mmxrm [rm: np 0f f1 /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(f1) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PSLLW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67803, 334, 2145}, + /* 1712 : PSLLW mmxreg,imm [mi: np 0f 71 /6 ib,u ] MMX,PENT */ + /* 360 355 001(71) 206 025 : MMX,PENT */ + {I_PSLLW, 2, {MMXREG,IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+57511, 332, 2146}, + /* 1713 : PSRAD mmxreg,mmxrm [rm: np 0f e2 /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(e2) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PSRAD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67809, 334, 2147}, + /* 1714 : PSRAD mmxreg,imm [mi: np 0f 72 /4 ib,u ] MMX,PENT */ + /* 360 355 001(72) 204 025 : MMX,PENT */ + {I_PSRAD, 2, {MMXREG,IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+57518, 332, 2148}, + /* 1715 : PSRAW mmxreg,mmxrm [rm: np 0f e1 /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(e1) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PSRAW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67815, 334, 2149}, + /* 1716 : PSRAW mmxreg,imm [mi: np 0f 71 /4 ib,u ] MMX,PENT */ + /* 360 355 001(71) 204 025 : MMX,PENT */ + {I_PSRAW, 2, {MMXREG,IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+57525, 332, 2150}, + /* 1717 : PSRLD mmxreg,mmxrm [rm: np 0f d2 /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(d2) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PSRLD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67821, 334, 2151}, + /* 1718 : PSRLD mmxreg,imm [mi: np 0f 72 /2 ib,u ] MMX,PENT */ + /* 360 355 001(72) 202 025 : MMX,PENT */ + {I_PSRLD, 2, {MMXREG,IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+57532, 332, 2152}, + /* 1719 : PSRLQ mmxreg,mmxrm [rm: np 0f d3 /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(d3) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PSRLQ, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67827, 334, 2153}, + /* 1720 : PSRLQ mmxreg,imm [mi: np 0f 73 /2 ib,u ] MMX,PENT */ + /* 360 355 001(73) 202 025 : MMX,PENT */ + {I_PSRLQ, 2, {MMXREG,IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+57539, 332, 2154}, + /* 1721 : PSRLW mmxreg,mmxrm [rm: np 0f d1 /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(d1) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PSRLW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67833, 334, 2155}, + /* 1722 : PSRLW mmxreg,imm [mi: np 0f 71 /2 ib,u ] MMX,PENT */ + /* 360 355 001(71) 202 025 : MMX,PENT */ + {I_PSRLW, 2, {MMXREG,IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+57546, 332, 2156}, + /* 1723 : PSUBB mmxreg,mmxrm [rm: np 0f f8 /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(f8) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PSUBB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67839, 334, 2157}, + /* 1724 : PSUBD mmxreg,mmxrm [rm: np 0f fa /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(fa) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PSUBD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67845, 334, 2158}, + /* 1725 : PSUBSB mmxreg,mmxrm [rm: np 0f e8 /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(e8) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PSUBSB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67851, 334, 2159}, + /* 1726 : PSUBSIW mmxreg,mmxrm [rm: 0f 55 /r ] AR0-1,SQ,MMX,PENT,CYRIX */ + /* 355 001(55) 110 : AR0,AR1,SQ,MMX,PENT,CYRIX */ + {I_PSUBSIW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+69118, 335, 2160}, + /* 1727 : PSUBSW mmxreg,mmxrm [rm: np 0f e9 /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(e9) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PSUBSW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67857, 334, 2161}, + /* 1728 : PSUBUSB mmxreg,mmxrm [rm: np 0f d8 /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(d8) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PSUBUSB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67863, 334, 2162}, + /* 1729 : PSUBUSW mmxreg,mmxrm [rm: np 0f d9 /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(d9) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PSUBUSW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67869, 334, 2163}, + /* 1730 : PSUBW mmxreg,mmxrm [rm: np 0f f9 /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(f9) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PSUBW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67875, 334, 2164}, + /* 1731 : PUNPCKHBW mmxreg,mmxrm [rm: np 0f 68 /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(68) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PUNPCKHBW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67881, 334, 2165}, + /* 1732 : PUNPCKHDQ mmxreg,mmxrm [rm: np 0f 6a /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(6a) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PUNPCKHDQ, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67887, 334, 2166}, + /* 1733 : PUNPCKHWD mmxreg,mmxrm [rm: np 0f 69 /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(69) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PUNPCKHWD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67893, 334, 2167}, + /* 1734 : PUNPCKLBW mmxreg,mmxrm [rm: np 0f 60 /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(60) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PUNPCKLBW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67899, 334, 2168}, + /* 1735 : PUNPCKLDQ mmxreg,mmxrm [rm: np 0f 62 /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(62) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PUNPCKLDQ, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67905, 334, 2169}, + /* 1736 : PUNPCKLWD mmxreg,mmxrm [rm: np 0f 61 /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(61) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PUNPCKLWD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+67911, 334, 2170}, + /* 1737 : PUSH reg16 [r: nw o16 50+r ] 8086 */ + /* 327 320 010 120 : NWSIZE,8086 */ + {I_PUSH, 1, {REG_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72309, 233, 2173}, + /* 1738 : PUSH reg32 [r: nw o32 50+r ] 386 */ + /* 327 321 010 120 : NWSIZE,386 */ + {I_PUSH, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72314, 234, 2174}, + /* 1739 : PUSH reg64 [r: nw o64 50+r ] LONG,PROT,X86_64 */ + /* 327 324 010 120 : NWSIZE,LONG,PROT,X86_64 */ + {I_PUSH, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72319, 235, 2175}, + /* 1740 : PUSH rm16 [m: nw o16 ff /6 ] AR0,OSIZE,8086 */ + /* 327 320 001(ff) 206 : AR0,NWSIZE,OSIZE,8086 */ + {I_PUSH, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67917, 338, 2176}, + /* 1741 : PUSH rm32 [m: nw o32 ff /6 ] AR0,OSIZE,386 */ + /* 327 321 001(ff) 206 : AR0,NWSIZE,OSIZE,386 */ + {I_PUSH, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67923, 204, 2177}, + /* 1742 : PUSH rm64 [m: nw o64 ff /6 ] AR0,OSIZE,LONG,PROT,X86_64 */ + /* 327 324 001(ff) 206 : AR0,NWSIZE,OSIZE,LONG,PROT,X86_64 */ + {I_PUSH, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67929, 205, 2178}, + /* 1743 : PUSH sbyteword16 [i: nw o16 6a ib,s ] AR0,OSIZE,186 */ + /* 327 320 001(6a) 274 : AR0,NWSIZE,OSIZE,186 */ + {I_PUSH, 1, {SBYTEWORD|BITS16|IMM_NORMAL,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67941, 340, 2180}, + /* 1744 : PUSH sbytedword32 [i: nw o32 6a ib,s ] AR0,OSIZE,386 */ + /* 327 321 001(6a) 274 : AR0,NWSIZE,OSIZE,386 */ + {I_PUSH, 1, {SBYTEDWORD|BITS32|IMM_NORMAL,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67947, 204, 2181}, + /* 1745 : PUSH sbytedword64 [i: nw o64 6a ib,s ] AR0,OSIZE,LONG,386,X86_64 */ + /* 327 324 001(6a) 274 : AR0,NWSIZE,OSIZE,LONG,PROT,X86_64 */ + {I_PUSH, 1, {SBYTEDWORD|BITS64|IMM_NORMAL,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67953, 205, 2182}, + /* 1746 : PUSH imm16 [i: nw o16 68 iw ] AR0,OSIZE,186 */ + /* 327 320 001(68) 030 : AR0,NWSIZE,OSIZE,186 */ + {I_PUSH, 1, {IMM_NORMAL|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67959, 340, 2183}, + /* 1747 : PUSH imm32 [i: nw o32 68 id ] AR0,OSIZE,NOREX,NOAPX,NOLONG,386 */ + /* 327 321 001(68) 040 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,386 */ + {I_PUSH, 1, {IMM_NORMAL|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67965, 214, 2184}, + /* 1748 : PUSH sdword64 [i: nw o64 68 id,s ] AR0,OSIZE,LONG,386,X86_64 */ + /* 327 324 001(68) 254 : AR0,NWSIZE,OSIZE,LONG,PROT,X86_64 */ + {I_PUSH, 1, {SDWORD|BITS64|IMM_NORMAL,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67971, 205, 2185}, + /* 1749 : POP reg16 [r: nw o16 58+r ] 8086 */ + /* 327 320 010 130 : NWSIZE,8086 */ + {I_POP, 1, {REG_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72324, 233, 2187}, + /* 1750 : POP reg32 [r: nw o32 58+r ] 386 */ + /* 327 321 010 130 : NWSIZE,386 */ + {I_POP, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72329, 234, 2188}, + /* 1751 : POP reg64 [r: nw o64 58+r ] LONG,PROT,X86_64 */ + /* 327 324 010 130 : NWSIZE,LONG,PROT,X86_64 */ + {I_POP, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72334, 235, 2189}, + /* 1752 : POP rm16 [m: nw o16 8f /0 ] AR0,OSIZE,8086 */ + /* 327 320 001(8f) 200 : AR0,NWSIZE,OSIZE,8086 */ + {I_POP, 1, {RM_GPR|BITS16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67977, 338, 2190}, + /* 1753 : POP rm32 [m: nw o32 8f /0 ] AR0,OSIZE,386 */ + /* 327 321 001(8f) 200 : AR0,NWSIZE,OSIZE,386 */ + {I_POP, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67983, 204, 2191}, + /* 1754 : POP rm64 [m: nw o64 8f /0 ] AR0,OSIZE,LONG,PROT,X86_64 */ + /* 327 324 001(8f) 200 : AR0,NWSIZE,OSIZE,LONG,PROT,X86_64 */ + {I_POP, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67989, 205, 2192}, + /* 1755 : PUSHA void [ osm 60 ] NOREX,NOAPX,NOLONG,186 */ + /* 342 001(60) : NOREX,NOAPX,NOLONG,186 */ + {I_PUSHA, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73404, 341, 2194}, + /* 1756 : PUSHAW void [ o16 60 ] NOREX,NOAPX,NOLONG,186 */ + /* 320 001(60) : NOREX,NOAPX,NOLONG,186 */ + {I_PUSHAW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73408, 341, 2195}, + /* 1757 : PUSHAD void [ o32 60 ] NOREX,NOAPX,NOLONG,386 */ + /* 321 001(60) : NOREX,NOAPX,NOLONG,386 */ + {I_PUSHAD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73412, 305, 2196}, + /* 1758 : POPA void [ osm 61 ] NOREX,NOAPX,NOLONG,186 */ + /* 342 001(61) : NOREX,NOAPX,NOLONG,186 */ + {I_POPA, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73416, 341, 2197}, + /* 1759 : POPAW void [ o16 61 ] NOREX,NOAPX,NOLONG,186 */ + /* 320 001(61) : NOREX,NOAPX,NOLONG,186 */ + {I_POPAW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73420, 341, 2198}, + /* 1760 : POPAD void [ o32 61 ] NOREX,NOAPX,NOLONG,386 */ + /* 321 001(61) : NOREX,NOAPX,NOLONG,386 */ + {I_POPAD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73424, 305, 2199}, + /* 1761 : ENTER imm16,imm8 [ij: nw osm c8 iw ib,u ] 186 */ + /* 327 342 001(c8) 030 025 : NWSIZE,186 */ + {I_ENTER, 2, {IMM_NORMAL|BITS16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+57553, 342, 2201}, + /* 1762 : ENTERW imm16,imm8 [ij: nw o16 c8 iw ib,u ] 186 */ + /* 327 320 001(c8) 030 025 : NWSIZE,186 */ + {I_ENTERW, 2, {IMM_NORMAL|BITS16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+57560, 342, 2202}, + /* 1763 : ENTERD imm16,imm8 [ij: nw o32 c8 iw ib,u ] 386 */ + /* 327 321 001(c8) 030 025 : NWSIZE,386 */ + {I_ENTERD, 2, {IMM_NORMAL|BITS16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+57567, 234, 2203}, + /* 1764 : ENTERQ imm16,imm8 [ij: nw o64 c8 iw ib,u ] LONG,386,X86_64 */ + /* 327 324 001(c8) 030 025 : NWSIZE,LONG,PROT,X86_64 */ + {I_ENTERQ, 2, {IMM_NORMAL|BITS16,IMM_NORMAL|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+57574, 235, 2204}, + /* 1765 : LEAVE void [ nw osm c9 ] 186 */ + /* 327 342 001(c9) : NWSIZE,186 */ + {I_LEAVE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72339, 342, 2209}, + /* 1766 : LEAVEW void [ nw o16 c9 ] 186 */ + /* 327 320 001(c9) : NWSIZE,186 */ + {I_LEAVEW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72344, 342, 2210}, + /* 1767 : LEAVED void [ nw o32 c9 ] 386 */ + /* 327 321 001(c9) : NWSIZE,386 */ + {I_LEAVED, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72349, 234, 2211}, + /* 1768 : LEAVEQ void [ nw o64 c9 ] LONG,386,X86_64 */ + /* 327 324 001(c9) : NWSIZE,LONG,PROT,X86_64 */ + {I_LEAVEQ, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72354, 235, 2212}, + /* 1769 : BOUND reg16,mem [rm: o16 62 /r ] NOREX,NOAPX,NOLONG,186 */ + /* 320 001(62) 110 : NOREX,NOAPX,NOLONG,186 */ + {I_BOUND, 2, {REG_GPR|BITS16|RN_L16,MEMORY|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+72359, 341, 2214}, + /* 1770 : BOUND reg32,mem [rm: o32 62 /r ] NOREX,NOAPX,NOLONG,386 */ + /* 321 001(62) 110 : NOREX,NOAPX,NOLONG,386 */ + {I_BOUND, 2, {REG_GPR|BITS32|RN_L16,MEMORY|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+72364, 305, 2215}, + /* 1771 : PUSHP reg64 [r: o64nw rex.w rex2 50+r ] LONG,PROT,APX,X86_64 */ + /* 323 347 350 010 120 : NWSIZE,LONG,REX2,PROT,APX,X86_64 */ + {I_PUSHP, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67995, 343, 2218}, + /* 1772 : POPP reg64 [r: o64nw rex.w rex2 58+r ] LONG,PROT,APX,X86_64 */ + /* 323 347 350 010 130 : NWSIZE,LONG,REX2,PROT,APX,X86_64 */ + {I_POPP, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+68001, 343, 2219}, + /* 1773 : PUSH2 reg64,reg64 [vm: o64nw evex.nd1.l0.np.m4.w0 ff /6 ] LONG,PROT,APX,X86_64 */ + /* 323 240(f4 7c 18) 300 001(ff) 216 : NWSIZE,LONG,EVEX,PROT,APX,X86_64 */ + {I_PUSH2, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+13063, 344, 2225}, + /* 1774 : PUSH2P reg64,reg64 [vm: o64nw evex.nd1.l0.np.m4.w1 ff /6 ] LONG,PROT,APX,X86_64 */ + /* 323 240(f4 fc 18) 300 001(ff) 216 : NWSIZE,LONG,EVEX,PROT,APX,X86_64 */ + {I_PUSH2P, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+13073, 344, 2227}, + /* 1775 : POP2 reg64,reg64 [vm: o64nw evex.nd1.l0.np.m4.w0 8f /0 ] LONG,PROT,APX,X86_64 */ + /* 323 240(f4 7c 18) 300 001(8f) 210 : NWSIZE,LONG,EVEX,PROT,APX,X86_64 */ + {I_POP2, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+13083, 344, 2234}, + /* 1776 : POP2P reg64,reg64 [vm: o64nw evex.nd1.l0.np.m4.w1 8f /0 ] LONG,PROT,APX,X86_64 */ + /* 323 240(f4 fc 18) 300 001(8f) 210 : NWSIZE,LONG,EVEX,PROT,APX,X86_64 */ + {I_POP2P, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+13103, 344, 2236}, + /* 1777 : PXOR mmxreg,mmxrm [rm: np 0f ef /r ] AR0-1,SQ,MMX,PENT */ + /* 360 355 001(ef) 110 : AR0,AR1,SQ,MMX,PENT */ + {I_PXOR, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+68007, 334, 2241}, + /* 1778 : SKINIT void [ 0f 01 de ] LONG,PROT,X86_64 */ + /* 355 002(01 de) : LONG,PROT,X86_64 */ + {I_SKINIT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72369, 24, 2242}, + /* 1779 : UD0 reg16,rm16 [rm: o16 0f ff /r ] SM0-1,186 */ + /* 320 355 001(ff) 110 : SM0,SM1,186 */ + {I_UD0, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+68013, 345, 2246}, + /* 1780 : UD0 reg32,rm32 [rm: o32 0f ff /r ] SM0-1,386 */ + /* 321 355 001(ff) 110 : SM0,SM1,386 */ + {I_UD0, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68019, 13, 2247}, + /* 1781 : UD0 reg64,rm64 [rm: o64 0f ff /r ] SM0-1,LONG,PROT,X86_64 */ + /* 324 355 001(ff) 110 : SM0,SM1,LONG,PROT,X86_64 */ + {I_UD0, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+68025, 14, 2248}, + /* 1782 : UD0 void [ 0f ff ] 186 */ + /* 355 001(ff) : 186 */ + {I_UD0, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73428, 245, 2249}, + /* 1783 : UD1 reg16,rm16 [rm: o16 0f b9 /r ] SM0-1,186 */ + /* 320 355 001(b9) 110 : SM0,SM1,186 */ + {I_UD1, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+68031, 345, 2250}, + /* 1784 : UD1 reg32,rm32 [rm: o32 0f b9 /r ] SM0-1,386 */ + /* 321 355 001(b9) 110 : SM0,SM1,386 */ + {I_UD1, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68037, 13, 2251}, + /* 1785 : UD1 reg64,rm64 [rm: o64 0f b9 /r ] SM0-1,LONG,PROT,X86_64 */ + /* 324 355 001(b9) 110 : SM0,SM1,LONG,PROT,X86_64 */ + {I_UD1, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+68043, 14, 2252}, + /* 1786 : UD1 void [ 0f b9 ] 186 */ + /* 355 001(b9) : 186 */ + {I_UD1, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73432, 245, 2253}, + /* 1787 : UD2 void [ 0f 0b ] 186 */ + /* 355 001(0b) : 186 */ + {I_UD2, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73436, 245, 2259}, + /* 1788 : UDB void [ d6 ] LONG,PROT,X86_64 */ + /* 001(d6) : LONG,PROT,X86_64 */ + {I_UDB, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72531, 24, 2268}, + /* 1789 : UDW void [ ff ff ] UNDOC,186 */ + /* 002(ff ff) : UNDOC,186 */ + {I_UDW, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73440, 346, 2271}, + /* 1790 : FWAIT void [ wait ] 8086 */ + /* 341 : 8086 */ + {I_FWAIT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73362, 23, 2273}, + /* 1791 : XLATB void [ d7 ] 8086 */ + /* 001(d7) : 8086 */ + {I_XLATB, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70098, 23, 2275}, + /* 1792 : CCMPA spec4,rm8,reg8 [wmr: evex.scc7.dfv.l0.m4.o8 38 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 07) 300 001(38) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24718, 347, 2278}, + /* 1793 : CCMPC spec4,rm8,reg8 [wmr: evex.scc2.dfv.l0.m4.o8 38 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 02) 300 001(38) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24736, 347, 2278}, + /* 1794 : CCMPF spec4,rm8,reg8 [wmr: evex.scc11.dfv.l0.m4.o8 38 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0b) 300 001(38) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPF, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24709, 347, 2278}, + /* 1795 : CCMPG spec4,rm8,reg8 [wmr: evex.scc15.dfv.l0.m4.o8 38 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0f) 300 001(38) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24763, 347, 2278}, + /* 1796 : CCMPL spec4,rm8,reg8 [wmr: evex.scc12.dfv.l0.m4.o8 38 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0c) 300 001(38) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24781, 347, 2278}, + /* 1797 : CCMPNA spec4,rm8,reg8 [wmr: evex.scc6.dfv.l0.m4.o8 38 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 06) 300 001(38) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24745, 347, 2278}, + /* 1798 : CCMPNC spec4,rm8,reg8 [wmr: evex.scc3.dfv.l0.m4.o8 38 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 03) 300 001(38) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24727, 347, 2278}, + /* 1799 : CCMPNG spec4,rm8,reg8 [wmr: evex.scc14.dfv.l0.m4.o8 38 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0e) 300 001(38) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24790, 347, 2278}, + /* 1800 : CCMPNL spec4,rm8,reg8 [wmr: evex.scc13.dfv.l0.m4.o8 38 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0d) 300 001(38) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24772, 347, 2278}, + /* 1801 : CCMPNO spec4,rm8,reg8 [wmr: evex.scc1.dfv.l0.m4.o8 38 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 01) 300 001(38) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24808, 347, 2278}, + /* 1802 : CCMPNS spec4,rm8,reg8 [wmr: evex.scc9.dfv.l0.m4.o8 38 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 09) 300 001(38) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24817, 347, 2278}, + /* 1803 : CCMPNZ spec4,rm8,reg8 [wmr: evex.scc5.dfv.l0.m4.o8 38 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 05) 300 001(38) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24799, 347, 2278}, + /* 1804 : CCMPO spec4,rm8,reg8 [wmr: evex.scc0.dfv.l0.m4.o8 38 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 00) 300 001(38) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24826, 347, 2278}, + /* 1805 : CCMPS spec4,rm8,reg8 [wmr: evex.scc8.dfv.l0.m4.o8 38 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 08) 300 001(38) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24835, 347, 2278}, + /* 1806 : CCMPT spec4,rm8,reg8 [wmr: evex.scc10.dfv.l0.m4.o8 38 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0a) 300 001(38) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPT, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24844, 347, 2278}, + /* 1807 : CCMPZ spec4,rm8,reg8 [wmr: evex.scc4.dfv.l0.m4.o8 38 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 04) 300 001(38) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24754, 347, 2278}, + /* 1808 : CCMPA spec4,rm16,reg16 [wmr: evex.scc7.dfv.l0.m4.o16 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 07) 300 320 001(39) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13133, 348, 2279}, + /* 1809 : CCMPC spec4,rm16,reg16 [wmr: evex.scc2.dfv.l0.m4.o16 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 02) 300 320 001(39) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13153, 348, 2279}, + /* 1810 : CCMPF spec4,rm16,reg16 [wmr: evex.scc11.dfv.l0.m4.o16 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0b) 300 320 001(39) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPF, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13123, 348, 2279}, + /* 1811 : CCMPG spec4,rm16,reg16 [wmr: evex.scc15.dfv.l0.m4.o16 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0f) 300 320 001(39) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13183, 348, 2279}, + /* 1812 : CCMPL spec4,rm16,reg16 [wmr: evex.scc12.dfv.l0.m4.o16 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0c) 300 320 001(39) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13203, 348, 2279}, + /* 1813 : CCMPNA spec4,rm16,reg16 [wmr: evex.scc6.dfv.l0.m4.o16 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 06) 300 320 001(39) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13163, 348, 2279}, + /* 1814 : CCMPNC spec4,rm16,reg16 [wmr: evex.scc3.dfv.l0.m4.o16 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 03) 300 320 001(39) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13143, 348, 2279}, + /* 1815 : CCMPNG spec4,rm16,reg16 [wmr: evex.scc14.dfv.l0.m4.o16 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0e) 300 320 001(39) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13213, 348, 2279}, + /* 1816 : CCMPNL spec4,rm16,reg16 [wmr: evex.scc13.dfv.l0.m4.o16 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0d) 300 320 001(39) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13193, 348, 2279}, + /* 1817 : CCMPNO spec4,rm16,reg16 [wmr: evex.scc1.dfv.l0.m4.o16 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 01) 300 320 001(39) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13233, 348, 2279}, + /* 1818 : CCMPNS spec4,rm16,reg16 [wmr: evex.scc9.dfv.l0.m4.o16 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 09) 300 320 001(39) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13243, 348, 2279}, + /* 1819 : CCMPNZ spec4,rm16,reg16 [wmr: evex.scc5.dfv.l0.m4.o16 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 05) 300 320 001(39) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13223, 348, 2279}, + /* 1820 : CCMPO spec4,rm16,reg16 [wmr: evex.scc0.dfv.l0.m4.o16 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 00) 300 320 001(39) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13253, 348, 2279}, + /* 1821 : CCMPS spec4,rm16,reg16 [wmr: evex.scc8.dfv.l0.m4.o16 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 08) 300 320 001(39) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13263, 348, 2279}, + /* 1822 : CCMPT spec4,rm16,reg16 [wmr: evex.scc10.dfv.l0.m4.o16 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0a) 300 320 001(39) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPT, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13273, 348, 2279}, + /* 1823 : CCMPZ spec4,rm16,reg16 [wmr: evex.scc4.dfv.l0.m4.o16 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 04) 300 320 001(39) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13173, 348, 2279}, + /* 1824 : CCMPA spec4,rm32,reg32 [wmr: evex.scc7.dfv.l0.m4.o32 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 07) 300 321 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13293, 349, 2280}, + /* 1825 : CCMPC spec4,rm32,reg32 [wmr: evex.scc2.dfv.l0.m4.o32 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 02) 300 321 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13313, 349, 2280}, + /* 1826 : CCMPF spec4,rm32,reg32 [wmr: evex.scc11.dfv.l0.m4.o32 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0b) 300 321 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPF, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13283, 349, 2280}, + /* 1827 : CCMPG spec4,rm32,reg32 [wmr: evex.scc15.dfv.l0.m4.o32 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0f) 300 321 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13343, 349, 2280}, + /* 1828 : CCMPL spec4,rm32,reg32 [wmr: evex.scc12.dfv.l0.m4.o32 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0c) 300 321 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13363, 349, 2280}, + /* 1829 : CCMPNA spec4,rm32,reg32 [wmr: evex.scc6.dfv.l0.m4.o32 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 06) 300 321 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13323, 349, 2280}, + /* 1830 : CCMPNC spec4,rm32,reg32 [wmr: evex.scc3.dfv.l0.m4.o32 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 03) 300 321 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13303, 349, 2280}, + /* 1831 : CCMPNG spec4,rm32,reg32 [wmr: evex.scc14.dfv.l0.m4.o32 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0e) 300 321 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13373, 349, 2280}, + /* 1832 : CCMPNL spec4,rm32,reg32 [wmr: evex.scc13.dfv.l0.m4.o32 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0d) 300 321 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13353, 349, 2280}, + /* 1833 : CCMPNO spec4,rm32,reg32 [wmr: evex.scc1.dfv.l0.m4.o32 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 01) 300 321 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13393, 349, 2280}, + /* 1834 : CCMPNS spec4,rm32,reg32 [wmr: evex.scc9.dfv.l0.m4.o32 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 09) 300 321 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13403, 349, 2280}, + /* 1835 : CCMPNZ spec4,rm32,reg32 [wmr: evex.scc5.dfv.l0.m4.o32 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 05) 300 321 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13383, 349, 2280}, + /* 1836 : CCMPO spec4,rm32,reg32 [wmr: evex.scc0.dfv.l0.m4.o32 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 00) 300 321 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13413, 349, 2280}, + /* 1837 : CCMPS spec4,rm32,reg32 [wmr: evex.scc8.dfv.l0.m4.o32 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 08) 300 321 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13423, 349, 2280}, + /* 1838 : CCMPT spec4,rm32,reg32 [wmr: evex.scc10.dfv.l0.m4.o32 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0a) 300 321 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPT, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13433, 349, 2280}, + /* 1839 : CCMPZ spec4,rm32,reg32 [wmr: evex.scc4.dfv.l0.m4.o32 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 04) 300 321 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13333, 349, 2280}, + /* 1840 : CCMPA spec4,rm64,reg64 [wmr: evex.scc7.dfv.l0.m4.o64 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 07) 300 324 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+13453, 349, 2281}, + /* 1841 : CCMPC spec4,rm64,reg64 [wmr: evex.scc2.dfv.l0.m4.o64 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 02) 300 324 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+13473, 349, 2281}, + /* 1842 : CCMPF spec4,rm64,reg64 [wmr: evex.scc11.dfv.l0.m4.o64 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0b) 300 324 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPF, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+13443, 349, 2281}, + /* 1843 : CCMPG spec4,rm64,reg64 [wmr: evex.scc15.dfv.l0.m4.o64 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0f) 300 324 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+13503, 349, 2281}, + /* 1844 : CCMPL spec4,rm64,reg64 [wmr: evex.scc12.dfv.l0.m4.o64 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0c) 300 324 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+13523, 349, 2281}, + /* 1845 : CCMPNA spec4,rm64,reg64 [wmr: evex.scc6.dfv.l0.m4.o64 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 06) 300 324 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+13483, 349, 2281}, + /* 1846 : CCMPNC spec4,rm64,reg64 [wmr: evex.scc3.dfv.l0.m4.o64 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 03) 300 324 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+13463, 349, 2281}, + /* 1847 : CCMPNG spec4,rm64,reg64 [wmr: evex.scc14.dfv.l0.m4.o64 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0e) 300 324 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+13533, 349, 2281}, + /* 1848 : CCMPNL spec4,rm64,reg64 [wmr: evex.scc13.dfv.l0.m4.o64 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0d) 300 324 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+13513, 349, 2281}, + /* 1849 : CCMPNO spec4,rm64,reg64 [wmr: evex.scc1.dfv.l0.m4.o64 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 01) 300 324 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+13553, 349, 2281}, + /* 1850 : CCMPNS spec4,rm64,reg64 [wmr: evex.scc9.dfv.l0.m4.o64 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 09) 300 324 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+13563, 349, 2281}, + /* 1851 : CCMPNZ spec4,rm64,reg64 [wmr: evex.scc5.dfv.l0.m4.o64 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 05) 300 324 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+13543, 349, 2281}, + /* 1852 : CCMPO spec4,rm64,reg64 [wmr: evex.scc0.dfv.l0.m4.o64 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 00) 300 324 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+13573, 349, 2281}, + /* 1853 : CCMPS spec4,rm64,reg64 [wmr: evex.scc8.dfv.l0.m4.o64 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 08) 300 324 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+13583, 349, 2281}, + /* 1854 : CCMPT spec4,rm64,reg64 [wmr: evex.scc10.dfv.l0.m4.o64 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0a) 300 324 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPT, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+13593, 349, 2281}, + /* 1855 : CCMPZ spec4,rm64,reg64 [wmr: evex.scc4.dfv.l0.m4.o64 39 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 04) 300 324 001(39) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+13493, 349, 2281}, + /* 1856 : CCMPA spec4,reg8,rm8 [wrm: evex.scc7.dfv.l0.m4.o8 3a /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 07) 300 001(3a) 121 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPA, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS8,RM_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24862, 347, 2282}, + /* 1857 : CCMPC spec4,reg8,rm8 [wrm: evex.scc2.dfv.l0.m4.o8 3a /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 02) 300 001(3a) 121 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPC, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS8,RM_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24880, 347, 2282}, + /* 1858 : CCMPF spec4,reg8,rm8 [wrm: evex.scc11.dfv.l0.m4.o8 3a /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0b) 300 001(3a) 121 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPF, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS8,RM_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24853, 347, 2282}, + /* 1859 : CCMPG spec4,reg8,rm8 [wrm: evex.scc15.dfv.l0.m4.o8 3a /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0f) 300 001(3a) 121 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPG, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS8,RM_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24907, 347, 2282}, + /* 1860 : CCMPL spec4,reg8,rm8 [wrm: evex.scc12.dfv.l0.m4.o8 3a /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0c) 300 001(3a) 121 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPL, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS8,RM_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24925, 347, 2282}, + /* 1861 : CCMPNA spec4,reg8,rm8 [wrm: evex.scc6.dfv.l0.m4.o8 3a /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 06) 300 001(3a) 121 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNA, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS8,RM_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24889, 347, 2282}, + /* 1862 : CCMPNC spec4,reg8,rm8 [wrm: evex.scc3.dfv.l0.m4.o8 3a /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 03) 300 001(3a) 121 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNC, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS8,RM_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24871, 347, 2282}, + /* 1863 : CCMPNG spec4,reg8,rm8 [wrm: evex.scc14.dfv.l0.m4.o8 3a /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0e) 300 001(3a) 121 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNG, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS8,RM_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24934, 347, 2282}, + /* 1864 : CCMPNL spec4,reg8,rm8 [wrm: evex.scc13.dfv.l0.m4.o8 3a /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0d) 300 001(3a) 121 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNL, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS8,RM_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24916, 347, 2282}, + /* 1865 : CCMPNO spec4,reg8,rm8 [wrm: evex.scc1.dfv.l0.m4.o8 3a /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 01) 300 001(3a) 121 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNO, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS8,RM_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24952, 347, 2282}, + /* 1866 : CCMPNS spec4,reg8,rm8 [wrm: evex.scc9.dfv.l0.m4.o8 3a /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 09) 300 001(3a) 121 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNS, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS8,RM_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24961, 347, 2282}, + /* 1867 : CCMPNZ spec4,reg8,rm8 [wrm: evex.scc5.dfv.l0.m4.o8 3a /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 05) 300 001(3a) 121 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNZ, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS8,RM_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24943, 347, 2282}, + /* 1868 : CCMPO spec4,reg8,rm8 [wrm: evex.scc0.dfv.l0.m4.o8 3a /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 00) 300 001(3a) 121 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPO, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS8,RM_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24970, 347, 2282}, + /* 1869 : CCMPS spec4,reg8,rm8 [wrm: evex.scc8.dfv.l0.m4.o8 3a /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 08) 300 001(3a) 121 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPS, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS8,RM_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24979, 347, 2282}, + /* 1870 : CCMPT spec4,reg8,rm8 [wrm: evex.scc10.dfv.l0.m4.o8 3a /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0a) 300 001(3a) 121 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPT, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS8,RM_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24988, 347, 2282}, + /* 1871 : CCMPZ spec4,reg8,rm8 [wrm: evex.scc4.dfv.l0.m4.o8 3a /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 04) 300 001(3a) 121 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPZ, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS8,RM_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24898, 347, 2282}, + /* 1872 : CCMPA spec4,reg16,rm16 [wrm: evex.scc7.dfv.l0.m4.o16 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 07) 300 320 001(3b) 121 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPA, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13613, 348, 2283}, + /* 1873 : CCMPC spec4,reg16,rm16 [wrm: evex.scc2.dfv.l0.m4.o16 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 02) 300 320 001(3b) 121 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPC, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13633, 348, 2283}, + /* 1874 : CCMPF spec4,reg16,rm16 [wrm: evex.scc11.dfv.l0.m4.o16 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0b) 300 320 001(3b) 121 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPF, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13603, 348, 2283}, + /* 1875 : CCMPG spec4,reg16,rm16 [wrm: evex.scc15.dfv.l0.m4.o16 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0f) 300 320 001(3b) 121 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPG, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13663, 348, 2283}, + /* 1876 : CCMPL spec4,reg16,rm16 [wrm: evex.scc12.dfv.l0.m4.o16 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0c) 300 320 001(3b) 121 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPL, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13683, 348, 2283}, + /* 1877 : CCMPNA spec4,reg16,rm16 [wrm: evex.scc6.dfv.l0.m4.o16 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 06) 300 320 001(3b) 121 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNA, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13643, 348, 2283}, + /* 1878 : CCMPNC spec4,reg16,rm16 [wrm: evex.scc3.dfv.l0.m4.o16 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 03) 300 320 001(3b) 121 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNC, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13623, 348, 2283}, + /* 1879 : CCMPNG spec4,reg16,rm16 [wrm: evex.scc14.dfv.l0.m4.o16 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0e) 300 320 001(3b) 121 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNG, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13693, 348, 2283}, + /* 1880 : CCMPNL spec4,reg16,rm16 [wrm: evex.scc13.dfv.l0.m4.o16 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0d) 300 320 001(3b) 121 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNL, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13673, 348, 2283}, + /* 1881 : CCMPNO spec4,reg16,rm16 [wrm: evex.scc1.dfv.l0.m4.o16 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 01) 300 320 001(3b) 121 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNO, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13713, 348, 2283}, + /* 1882 : CCMPNS spec4,reg16,rm16 [wrm: evex.scc9.dfv.l0.m4.o16 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 09) 300 320 001(3b) 121 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNS, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13723, 348, 2283}, + /* 1883 : CCMPNZ spec4,reg16,rm16 [wrm: evex.scc5.dfv.l0.m4.o16 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 05) 300 320 001(3b) 121 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNZ, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13703, 348, 2283}, + /* 1884 : CCMPO spec4,reg16,rm16 [wrm: evex.scc0.dfv.l0.m4.o16 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 00) 300 320 001(3b) 121 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPO, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13733, 348, 2283}, + /* 1885 : CCMPS spec4,reg16,rm16 [wrm: evex.scc8.dfv.l0.m4.o16 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 08) 300 320 001(3b) 121 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPS, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13743, 348, 2283}, + /* 1886 : CCMPT spec4,reg16,rm16 [wrm: evex.scc10.dfv.l0.m4.o16 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0a) 300 320 001(3b) 121 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPT, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13753, 348, 2283}, + /* 1887 : CCMPZ spec4,reg16,rm16 [wrm: evex.scc4.dfv.l0.m4.o16 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 04) 300 320 001(3b) 121 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPZ, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+13653, 348, 2283}, + /* 1888 : CCMPA spec4,reg32,rm32 [wrm: evex.scc7.dfv.l0.m4.o32 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 07) 300 321 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPA, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13773, 349, 2284}, + /* 1889 : CCMPC spec4,reg32,rm32 [wrm: evex.scc2.dfv.l0.m4.o32 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 02) 300 321 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPC, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13793, 349, 2284}, + /* 1890 : CCMPF spec4,reg32,rm32 [wrm: evex.scc11.dfv.l0.m4.o32 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0b) 300 321 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPF, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13763, 349, 2284}, + /* 1891 : CCMPG spec4,reg32,rm32 [wrm: evex.scc15.dfv.l0.m4.o32 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0f) 300 321 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPG, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13823, 349, 2284}, + /* 1892 : CCMPL spec4,reg32,rm32 [wrm: evex.scc12.dfv.l0.m4.o32 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0c) 300 321 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPL, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13843, 349, 2284}, + /* 1893 : CCMPNA spec4,reg32,rm32 [wrm: evex.scc6.dfv.l0.m4.o32 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 06) 300 321 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNA, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13803, 349, 2284}, + /* 1894 : CCMPNC spec4,reg32,rm32 [wrm: evex.scc3.dfv.l0.m4.o32 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 03) 300 321 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNC, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13783, 349, 2284}, + /* 1895 : CCMPNG spec4,reg32,rm32 [wrm: evex.scc14.dfv.l0.m4.o32 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0e) 300 321 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNG, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13853, 349, 2284}, + /* 1896 : CCMPNL spec4,reg32,rm32 [wrm: evex.scc13.dfv.l0.m4.o32 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0d) 300 321 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNL, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13833, 349, 2284}, + /* 1897 : CCMPNO spec4,reg32,rm32 [wrm: evex.scc1.dfv.l0.m4.o32 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 01) 300 321 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNO, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13873, 349, 2284}, + /* 1898 : CCMPNS spec4,reg32,rm32 [wrm: evex.scc9.dfv.l0.m4.o32 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 09) 300 321 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNS, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13883, 349, 2284}, + /* 1899 : CCMPNZ spec4,reg32,rm32 [wrm: evex.scc5.dfv.l0.m4.o32 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 05) 300 321 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNZ, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13863, 349, 2284}, + /* 1900 : CCMPO spec4,reg32,rm32 [wrm: evex.scc0.dfv.l0.m4.o32 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 00) 300 321 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPO, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13893, 349, 2284}, + /* 1901 : CCMPS spec4,reg32,rm32 [wrm: evex.scc8.dfv.l0.m4.o32 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 08) 300 321 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPS, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13903, 349, 2284}, + /* 1902 : CCMPT spec4,reg32,rm32 [wrm: evex.scc10.dfv.l0.m4.o32 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0a) 300 321 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPT, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13913, 349, 2284}, + /* 1903 : CCMPZ spec4,reg32,rm32 [wrm: evex.scc4.dfv.l0.m4.o32 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 04) 300 321 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPZ, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+13813, 349, 2284}, + /* 1904 : CCMPA spec4,reg64,rm64 [wrm: evex.scc7.dfv.l0.m4.o64 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 07) 300 324 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPA, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+13933, 349, 2285}, + /* 1905 : CCMPC spec4,reg64,rm64 [wrm: evex.scc2.dfv.l0.m4.o64 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 02) 300 324 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPC, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+13953, 349, 2285}, + /* 1906 : CCMPF spec4,reg64,rm64 [wrm: evex.scc11.dfv.l0.m4.o64 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0b) 300 324 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPF, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+13923, 349, 2285}, + /* 1907 : CCMPG spec4,reg64,rm64 [wrm: evex.scc15.dfv.l0.m4.o64 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0f) 300 324 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPG, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+13983, 349, 2285}, + /* 1908 : CCMPL spec4,reg64,rm64 [wrm: evex.scc12.dfv.l0.m4.o64 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0c) 300 324 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPL, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+14003, 349, 2285}, + /* 1909 : CCMPNA spec4,reg64,rm64 [wrm: evex.scc6.dfv.l0.m4.o64 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 06) 300 324 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNA, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+13963, 349, 2285}, + /* 1910 : CCMPNC spec4,reg64,rm64 [wrm: evex.scc3.dfv.l0.m4.o64 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 03) 300 324 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNC, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+13943, 349, 2285}, + /* 1911 : CCMPNG spec4,reg64,rm64 [wrm: evex.scc14.dfv.l0.m4.o64 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0e) 300 324 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNG, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+14013, 349, 2285}, + /* 1912 : CCMPNL spec4,reg64,rm64 [wrm: evex.scc13.dfv.l0.m4.o64 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0d) 300 324 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNL, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+13993, 349, 2285}, + /* 1913 : CCMPNO spec4,reg64,rm64 [wrm: evex.scc1.dfv.l0.m4.o64 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 01) 300 324 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNO, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+14033, 349, 2285}, + /* 1914 : CCMPNS spec4,reg64,rm64 [wrm: evex.scc9.dfv.l0.m4.o64 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 09) 300 324 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNS, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+14043, 349, 2285}, + /* 1915 : CCMPNZ spec4,reg64,rm64 [wrm: evex.scc5.dfv.l0.m4.o64 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 05) 300 324 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNZ, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+14023, 349, 2285}, + /* 1916 : CCMPO spec4,reg64,rm64 [wrm: evex.scc0.dfv.l0.m4.o64 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 00) 300 324 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPO, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+14053, 349, 2285}, + /* 1917 : CCMPS spec4,reg64,rm64 [wrm: evex.scc8.dfv.l0.m4.o64 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 08) 300 324 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPS, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+14063, 349, 2285}, + /* 1918 : CCMPT spec4,reg64,rm64 [wrm: evex.scc10.dfv.l0.m4.o64 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0a) 300 324 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPT, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+14073, 349, 2285}, + /* 1919 : CCMPZ spec4,reg64,rm64 [wrm: evex.scc4.dfv.l0.m4.o64 3b /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 04) 300 324 001(3b) 121 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPZ, 3, {IMMEDIATE|FOURBITS,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+13973, 349, 2285}, + /* 1920 : CCMPA spec4,rm16,sbyteword16 [wmi: evex.scc7.dfv.l0.m4.o16 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 07) 300 320 001(83) 217 276 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2378, 348, 2286}, + /* 1921 : CCMPC spec4,rm16,sbyteword16 [wmi: evex.scc2.dfv.l0.m4.o16 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 02) 300 320 001(83) 217 276 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2400, 348, 2286}, + /* 1922 : CCMPF spec4,rm16,sbyteword16 [wmi: evex.scc11.dfv.l0.m4.o16 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0b) 300 320 001(83) 217 276 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPF, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2367, 348, 2286}, + /* 1923 : CCMPG spec4,rm16,sbyteword16 [wmi: evex.scc15.dfv.l0.m4.o16 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0f) 300 320 001(83) 217 276 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2433, 348, 2286}, + /* 1924 : CCMPL spec4,rm16,sbyteword16 [wmi: evex.scc12.dfv.l0.m4.o16 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0c) 300 320 001(83) 217 276 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2455, 348, 2286}, + /* 1925 : CCMPNA spec4,rm16,sbyteword16 [wmi: evex.scc6.dfv.l0.m4.o16 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 06) 300 320 001(83) 217 276 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2411, 348, 2286}, + /* 1926 : CCMPNC spec4,rm16,sbyteword16 [wmi: evex.scc3.dfv.l0.m4.o16 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 03) 300 320 001(83) 217 276 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2389, 348, 2286}, + /* 1927 : CCMPNG spec4,rm16,sbyteword16 [wmi: evex.scc14.dfv.l0.m4.o16 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0e) 300 320 001(83) 217 276 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2466, 348, 2286}, + /* 1928 : CCMPNL spec4,rm16,sbyteword16 [wmi: evex.scc13.dfv.l0.m4.o16 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0d) 300 320 001(83) 217 276 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2444, 348, 2286}, + /* 1929 : CCMPNO spec4,rm16,sbyteword16 [wmi: evex.scc1.dfv.l0.m4.o16 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 01) 300 320 001(83) 217 276 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2488, 348, 2286}, + /* 1930 : CCMPNS spec4,rm16,sbyteword16 [wmi: evex.scc9.dfv.l0.m4.o16 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 09) 300 320 001(83) 217 276 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2499, 348, 2286}, + /* 1931 : CCMPNZ spec4,rm16,sbyteword16 [wmi: evex.scc5.dfv.l0.m4.o16 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 05) 300 320 001(83) 217 276 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2477, 348, 2286}, + /* 1932 : CCMPO spec4,rm16,sbyteword16 [wmi: evex.scc0.dfv.l0.m4.o16 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 00) 300 320 001(83) 217 276 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2510, 348, 2286}, + /* 1933 : CCMPS spec4,rm16,sbyteword16 [wmi: evex.scc8.dfv.l0.m4.o16 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 08) 300 320 001(83) 217 276 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2521, 348, 2286}, + /* 1934 : CCMPT spec4,rm16,sbyteword16 [wmi: evex.scc10.dfv.l0.m4.o16 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0a) 300 320 001(83) 217 276 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPT, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2532, 348, 2286}, + /* 1935 : CCMPZ spec4,rm16,sbyteword16 [wmi: evex.scc4.dfv.l0.m4.o16 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 04) 300 320 001(83) 217 276 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,SBYTEWORD|BITS16|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2422, 348, 2286}, + /* 1936 : CCMPA spec4,rm32,sbytedword32 [wmi: evex.scc7.dfv.l0.m4.o32 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 07) 300 321 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2554, 349, 2287}, + /* 1937 : CCMPC spec4,rm32,sbytedword32 [wmi: evex.scc2.dfv.l0.m4.o32 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 02) 300 321 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2576, 349, 2287}, + /* 1938 : CCMPF spec4,rm32,sbytedword32 [wmi: evex.scc11.dfv.l0.m4.o32 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0b) 300 321 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPF, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2543, 349, 2287}, + /* 1939 : CCMPG spec4,rm32,sbytedword32 [wmi: evex.scc15.dfv.l0.m4.o32 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0f) 300 321 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2609, 349, 2287}, + /* 1940 : CCMPL spec4,rm32,sbytedword32 [wmi: evex.scc12.dfv.l0.m4.o32 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0c) 300 321 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2631, 349, 2287}, + /* 1941 : CCMPNA spec4,rm32,sbytedword32 [wmi: evex.scc6.dfv.l0.m4.o32 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 06) 300 321 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2587, 349, 2287}, + /* 1942 : CCMPNC spec4,rm32,sbytedword32 [wmi: evex.scc3.dfv.l0.m4.o32 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 03) 300 321 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2565, 349, 2287}, + /* 1943 : CCMPNG spec4,rm32,sbytedword32 [wmi: evex.scc14.dfv.l0.m4.o32 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0e) 300 321 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2642, 349, 2287}, + /* 1944 : CCMPNL spec4,rm32,sbytedword32 [wmi: evex.scc13.dfv.l0.m4.o32 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0d) 300 321 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2620, 349, 2287}, + /* 1945 : CCMPNO spec4,rm32,sbytedword32 [wmi: evex.scc1.dfv.l0.m4.o32 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 01) 300 321 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2664, 349, 2287}, + /* 1946 : CCMPNS spec4,rm32,sbytedword32 [wmi: evex.scc9.dfv.l0.m4.o32 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 09) 300 321 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2675, 349, 2287}, + /* 1947 : CCMPNZ spec4,rm32,sbytedword32 [wmi: evex.scc5.dfv.l0.m4.o32 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 05) 300 321 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2653, 349, 2287}, + /* 1948 : CCMPO spec4,rm32,sbytedword32 [wmi: evex.scc0.dfv.l0.m4.o32 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 00) 300 321 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2686, 349, 2287}, + /* 1949 : CCMPS spec4,rm32,sbytedword32 [wmi: evex.scc8.dfv.l0.m4.o32 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 08) 300 321 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2697, 349, 2287}, + /* 1950 : CCMPT spec4,rm32,sbytedword32 [wmi: evex.scc10.dfv.l0.m4.o32 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0a) 300 321 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPT, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2708, 349, 2287}, + /* 1951 : CCMPZ spec4,rm32,sbytedword32 [wmi: evex.scc4.dfv.l0.m4.o32 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 04) 300 321 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,SBYTEDWORD|BITS32|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2598, 349, 2287}, + /* 1952 : CCMPA spec4,rm64,sbytedword64 [wmi: evex.scc7.dfv.l0.m4.o64 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 07) 300 324 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2730, 349, 2288}, + /* 1953 : CCMPC spec4,rm64,sbytedword64 [wmi: evex.scc2.dfv.l0.m4.o64 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 02) 300 324 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2752, 349, 2288}, + /* 1954 : CCMPF spec4,rm64,sbytedword64 [wmi: evex.scc11.dfv.l0.m4.o64 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0b) 300 324 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPF, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2719, 349, 2288}, + /* 1955 : CCMPG spec4,rm64,sbytedword64 [wmi: evex.scc15.dfv.l0.m4.o64 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0f) 300 324 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2785, 349, 2288}, + /* 1956 : CCMPL spec4,rm64,sbytedword64 [wmi: evex.scc12.dfv.l0.m4.o64 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0c) 300 324 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2807, 349, 2288}, + /* 1957 : CCMPNA spec4,rm64,sbytedword64 [wmi: evex.scc6.dfv.l0.m4.o64 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 06) 300 324 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2763, 349, 2288}, + /* 1958 : CCMPNC spec4,rm64,sbytedword64 [wmi: evex.scc3.dfv.l0.m4.o64 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 03) 300 324 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2741, 349, 2288}, + /* 1959 : CCMPNG spec4,rm64,sbytedword64 [wmi: evex.scc14.dfv.l0.m4.o64 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0e) 300 324 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2818, 349, 2288}, + /* 1960 : CCMPNL spec4,rm64,sbytedword64 [wmi: evex.scc13.dfv.l0.m4.o64 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0d) 300 324 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2796, 349, 2288}, + /* 1961 : CCMPNO spec4,rm64,sbytedword64 [wmi: evex.scc1.dfv.l0.m4.o64 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 01) 300 324 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2840, 349, 2288}, + /* 1962 : CCMPNS spec4,rm64,sbytedword64 [wmi: evex.scc9.dfv.l0.m4.o64 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 09) 300 324 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2851, 349, 2288}, + /* 1963 : CCMPNZ spec4,rm64,sbytedword64 [wmi: evex.scc5.dfv.l0.m4.o64 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 05) 300 324 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2829, 349, 2288}, + /* 1964 : CCMPO spec4,rm64,sbytedword64 [wmi: evex.scc0.dfv.l0.m4.o64 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 00) 300 324 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2862, 349, 2288}, + /* 1965 : CCMPS spec4,rm64,sbytedword64 [wmi: evex.scc8.dfv.l0.m4.o64 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 08) 300 324 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2873, 349, 2288}, + /* 1966 : CCMPT spec4,rm64,sbytedword64 [wmi: evex.scc10.dfv.l0.m4.o64 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0a) 300 324 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPT, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2884, 349, 2288}, + /* 1967 : CCMPZ spec4,rm64,sbytedword64 [wmi: evex.scc4.dfv.l0.m4.o64 83 /7 ib,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 04) 300 324 001(83) 217 276 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SBYTEDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+2774, 349, 2288}, + /* 1968 : CCMPA spec4,rm8,imm8 [wmi: evex.scc7.dfv.l0.m4.o8 80 /7 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 07) 300 001(80) 217 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14093, 347, 2289}, + /* 1969 : CCMPC spec4,rm8,imm8 [wmi: evex.scc2.dfv.l0.m4.o8 80 /7 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 02) 300 001(80) 217 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14113, 347, 2289}, + /* 1970 : CCMPF spec4,rm8,imm8 [wmi: evex.scc11.dfv.l0.m4.o8 80 /7 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0b) 300 001(80) 217 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPF, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14083, 347, 2289}, + /* 1971 : CCMPG spec4,rm8,imm8 [wmi: evex.scc15.dfv.l0.m4.o8 80 /7 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0f) 300 001(80) 217 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14143, 347, 2289}, + /* 1972 : CCMPL spec4,rm8,imm8 [wmi: evex.scc12.dfv.l0.m4.o8 80 /7 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0c) 300 001(80) 217 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14163, 347, 2289}, + /* 1973 : CCMPNA spec4,rm8,imm8 [wmi: evex.scc6.dfv.l0.m4.o8 80 /7 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 06) 300 001(80) 217 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14123, 347, 2289}, + /* 1974 : CCMPNC spec4,rm8,imm8 [wmi: evex.scc3.dfv.l0.m4.o8 80 /7 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 03) 300 001(80) 217 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14103, 347, 2289}, + /* 1975 : CCMPNG spec4,rm8,imm8 [wmi: evex.scc14.dfv.l0.m4.o8 80 /7 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0e) 300 001(80) 217 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14173, 347, 2289}, + /* 1976 : CCMPNL spec4,rm8,imm8 [wmi: evex.scc13.dfv.l0.m4.o8 80 /7 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0d) 300 001(80) 217 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14153, 347, 2289}, + /* 1977 : CCMPNO spec4,rm8,imm8 [wmi: evex.scc1.dfv.l0.m4.o8 80 /7 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 01) 300 001(80) 217 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14193, 347, 2289}, + /* 1978 : CCMPNS spec4,rm8,imm8 [wmi: evex.scc9.dfv.l0.m4.o8 80 /7 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 09) 300 001(80) 217 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14203, 347, 2289}, + /* 1979 : CCMPNZ spec4,rm8,imm8 [wmi: evex.scc5.dfv.l0.m4.o8 80 /7 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 05) 300 001(80) 217 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14183, 347, 2289}, + /* 1980 : CCMPO spec4,rm8,imm8 [wmi: evex.scc0.dfv.l0.m4.o8 80 /7 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 00) 300 001(80) 217 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14213, 347, 2289}, + /* 1981 : CCMPS spec4,rm8,imm8 [wmi: evex.scc8.dfv.l0.m4.o8 80 /7 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 08) 300 001(80) 217 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14223, 347, 2289}, + /* 1982 : CCMPT spec4,rm8,imm8 [wmi: evex.scc10.dfv.l0.m4.o8 80 /7 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0a) 300 001(80) 217 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPT, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14233, 347, 2289}, + /* 1983 : CCMPZ spec4,rm8,imm8 [wmi: evex.scc4.dfv.l0.m4.o8 80 /7 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 04) 300 001(80) 217 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14133, 347, 2289}, + /* 1984 : CCMPA spec4,rm16,imm16 [wmi: evex.scc7.dfv.l0.m4.o16 81 /7 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 07) 300 320 001(81) 217 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+2906, 348, 2290}, + /* 1985 : CCMPC spec4,rm16,imm16 [wmi: evex.scc2.dfv.l0.m4.o16 81 /7 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 02) 300 320 001(81) 217 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+2928, 348, 2290}, + /* 1986 : CCMPF spec4,rm16,imm16 [wmi: evex.scc11.dfv.l0.m4.o16 81 /7 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0b) 300 320 001(81) 217 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPF, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+2895, 348, 2290}, + /* 1987 : CCMPG spec4,rm16,imm16 [wmi: evex.scc15.dfv.l0.m4.o16 81 /7 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0f) 300 320 001(81) 217 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+2961, 348, 2290}, + /* 1988 : CCMPL spec4,rm16,imm16 [wmi: evex.scc12.dfv.l0.m4.o16 81 /7 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0c) 300 320 001(81) 217 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+2983, 348, 2290}, + /* 1989 : CCMPNA spec4,rm16,imm16 [wmi: evex.scc6.dfv.l0.m4.o16 81 /7 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 06) 300 320 001(81) 217 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+2939, 348, 2290}, + /* 1990 : CCMPNC spec4,rm16,imm16 [wmi: evex.scc3.dfv.l0.m4.o16 81 /7 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 03) 300 320 001(81) 217 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+2917, 348, 2290}, + /* 1991 : CCMPNG spec4,rm16,imm16 [wmi: evex.scc14.dfv.l0.m4.o16 81 /7 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0e) 300 320 001(81) 217 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+2994, 348, 2290}, + /* 1992 : CCMPNL spec4,rm16,imm16 [wmi: evex.scc13.dfv.l0.m4.o16 81 /7 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0d) 300 320 001(81) 217 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+2972, 348, 2290}, + /* 1993 : CCMPNO spec4,rm16,imm16 [wmi: evex.scc1.dfv.l0.m4.o16 81 /7 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 01) 300 320 001(81) 217 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3016, 348, 2290}, + /* 1994 : CCMPNS spec4,rm16,imm16 [wmi: evex.scc9.dfv.l0.m4.o16 81 /7 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 09) 300 320 001(81) 217 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3027, 348, 2290}, + /* 1995 : CCMPNZ spec4,rm16,imm16 [wmi: evex.scc5.dfv.l0.m4.o16 81 /7 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 05) 300 320 001(81) 217 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3005, 348, 2290}, + /* 1996 : CCMPO spec4,rm16,imm16 [wmi: evex.scc0.dfv.l0.m4.o16 81 /7 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 00) 300 320 001(81) 217 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3038, 348, 2290}, + /* 1997 : CCMPS spec4,rm16,imm16 [wmi: evex.scc8.dfv.l0.m4.o16 81 /7 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 08) 300 320 001(81) 217 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3049, 348, 2290}, + /* 1998 : CCMPT spec4,rm16,imm16 [wmi: evex.scc10.dfv.l0.m4.o16 81 /7 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0a) 300 320 001(81) 217 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPT, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3060, 348, 2290}, + /* 1999 : CCMPZ spec4,rm16,imm16 [wmi: evex.scc4.dfv.l0.m4.o16 81 /7 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 04) 300 320 001(81) 217 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+2950, 348, 2290}, + /* 2000 : CCMPA spec4,rm32,imm32 [wmi: evex.scc7.dfv.l0.m4.o32 81 /7 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 07) 300 321 001(81) 217 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3082, 349, 2291}, + /* 2001 : CCMPC spec4,rm32,imm32 [wmi: evex.scc2.dfv.l0.m4.o32 81 /7 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 02) 300 321 001(81) 217 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3104, 349, 2291}, + /* 2002 : CCMPF spec4,rm32,imm32 [wmi: evex.scc11.dfv.l0.m4.o32 81 /7 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0b) 300 321 001(81) 217 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPF, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3071, 349, 2291}, + /* 2003 : CCMPG spec4,rm32,imm32 [wmi: evex.scc15.dfv.l0.m4.o32 81 /7 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0f) 300 321 001(81) 217 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3137, 349, 2291}, + /* 2004 : CCMPL spec4,rm32,imm32 [wmi: evex.scc12.dfv.l0.m4.o32 81 /7 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0c) 300 321 001(81) 217 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3159, 349, 2291}, + /* 2005 : CCMPNA spec4,rm32,imm32 [wmi: evex.scc6.dfv.l0.m4.o32 81 /7 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 06) 300 321 001(81) 217 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3115, 349, 2291}, + /* 2006 : CCMPNC spec4,rm32,imm32 [wmi: evex.scc3.dfv.l0.m4.o32 81 /7 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 03) 300 321 001(81) 217 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3093, 349, 2291}, + /* 2007 : CCMPNG spec4,rm32,imm32 [wmi: evex.scc14.dfv.l0.m4.o32 81 /7 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0e) 300 321 001(81) 217 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3170, 349, 2291}, + /* 2008 : CCMPNL spec4,rm32,imm32 [wmi: evex.scc13.dfv.l0.m4.o32 81 /7 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0d) 300 321 001(81) 217 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3148, 349, 2291}, + /* 2009 : CCMPNO spec4,rm32,imm32 [wmi: evex.scc1.dfv.l0.m4.o32 81 /7 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 01) 300 321 001(81) 217 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3192, 349, 2291}, + /* 2010 : CCMPNS spec4,rm32,imm32 [wmi: evex.scc9.dfv.l0.m4.o32 81 /7 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 09) 300 321 001(81) 217 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3203, 349, 2291}, + /* 2011 : CCMPNZ spec4,rm32,imm32 [wmi: evex.scc5.dfv.l0.m4.o32 81 /7 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 05) 300 321 001(81) 217 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3181, 349, 2291}, + /* 2012 : CCMPO spec4,rm32,imm32 [wmi: evex.scc0.dfv.l0.m4.o32 81 /7 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 00) 300 321 001(81) 217 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3214, 349, 2291}, + /* 2013 : CCMPS spec4,rm32,imm32 [wmi: evex.scc8.dfv.l0.m4.o32 81 /7 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 08) 300 321 001(81) 217 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3225, 349, 2291}, + /* 2014 : CCMPT spec4,rm32,imm32 [wmi: evex.scc10.dfv.l0.m4.o32 81 /7 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0a) 300 321 001(81) 217 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPT, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3236, 349, 2291}, + /* 2015 : CCMPZ spec4,rm32,imm32 [wmi: evex.scc4.dfv.l0.m4.o32 81 /7 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 04) 300 321 001(81) 217 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3126, 349, 2291}, + /* 2016 : CCMPA spec4,rm64,sdword64 [wmi: evex.scc7.dfv.l0.m4.o64 81 /7 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 07) 300 324 001(81) 217 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3258, 349, 2292}, + /* 2017 : CCMPC spec4,rm64,sdword64 [wmi: evex.scc2.dfv.l0.m4.o64 81 /7 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 02) 300 324 001(81) 217 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3280, 349, 2292}, + /* 2018 : CCMPF spec4,rm64,sdword64 [wmi: evex.scc11.dfv.l0.m4.o64 81 /7 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0b) 300 324 001(81) 217 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPF, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3247, 349, 2292}, + /* 2019 : CCMPG spec4,rm64,sdword64 [wmi: evex.scc15.dfv.l0.m4.o64 81 /7 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0f) 300 324 001(81) 217 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3313, 349, 2292}, + /* 2020 : CCMPL spec4,rm64,sdword64 [wmi: evex.scc12.dfv.l0.m4.o64 81 /7 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0c) 300 324 001(81) 217 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3335, 349, 2292}, + /* 2021 : CCMPNA spec4,rm64,sdword64 [wmi: evex.scc6.dfv.l0.m4.o64 81 /7 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 06) 300 324 001(81) 217 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3291, 349, 2292}, + /* 2022 : CCMPNC spec4,rm64,sdword64 [wmi: evex.scc3.dfv.l0.m4.o64 81 /7 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 03) 300 324 001(81) 217 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3269, 349, 2292}, + /* 2023 : CCMPNG spec4,rm64,sdword64 [wmi: evex.scc14.dfv.l0.m4.o64 81 /7 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0e) 300 324 001(81) 217 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3346, 349, 2292}, + /* 2024 : CCMPNL spec4,rm64,sdword64 [wmi: evex.scc13.dfv.l0.m4.o64 81 /7 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0d) 300 324 001(81) 217 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3324, 349, 2292}, + /* 2025 : CCMPNO spec4,rm64,sdword64 [wmi: evex.scc1.dfv.l0.m4.o64 81 /7 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 01) 300 324 001(81) 217 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3368, 349, 2292}, + /* 2026 : CCMPNS spec4,rm64,sdword64 [wmi: evex.scc9.dfv.l0.m4.o64 81 /7 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 09) 300 324 001(81) 217 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3379, 349, 2292}, + /* 2027 : CCMPNZ spec4,rm64,sdword64 [wmi: evex.scc5.dfv.l0.m4.o64 81 /7 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 05) 300 324 001(81) 217 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPNZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3357, 349, 2292}, + /* 2028 : CCMPO spec4,rm64,sdword64 [wmi: evex.scc0.dfv.l0.m4.o64 81 /7 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 00) 300 324 001(81) 217 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3390, 349, 2292}, + /* 2029 : CCMPS spec4,rm64,sdword64 [wmi: evex.scc8.dfv.l0.m4.o64 81 /7 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 08) 300 324 001(81) 217 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3401, 349, 2292}, + /* 2030 : CCMPT spec4,rm64,sdword64 [wmi: evex.scc10.dfv.l0.m4.o64 81 /7 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0a) 300 324 001(81) 217 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPT, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3412, 349, 2292}, + /* 2031 : CCMPZ spec4,rm64,sdword64 [wmi: evex.scc4.dfv.l0.m4.o64 81 /7 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 04) 300 324 001(81) 217 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CCMPZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3302, 349, 2292}, + /* 2032 : CTESTA spec4,rm8,reg8 [wmr: evex.scc7.dfv.l0.m4.o8 84 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 07) 300 001(84) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+25006, 347, 2294}, + /* 2033 : CTESTC spec4,rm8,reg8 [wmr: evex.scc2.dfv.l0.m4.o8 84 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 02) 300 001(84) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+25024, 347, 2294}, + /* 2034 : CTESTF spec4,rm8,reg8 [wmr: evex.scc11.dfv.l0.m4.o8 84 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0b) 300 001(84) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTF, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+24997, 347, 2294}, + /* 2035 : CTESTG spec4,rm8,reg8 [wmr: evex.scc15.dfv.l0.m4.o8 84 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0f) 300 001(84) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+25051, 347, 2294}, + /* 2036 : CTESTL spec4,rm8,reg8 [wmr: evex.scc12.dfv.l0.m4.o8 84 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0c) 300 001(84) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+25069, 347, 2294}, + /* 2037 : CTESTNA spec4,rm8,reg8 [wmr: evex.scc6.dfv.l0.m4.o8 84 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 06) 300 001(84) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+25033, 347, 2294}, + /* 2038 : CTESTNC spec4,rm8,reg8 [wmr: evex.scc3.dfv.l0.m4.o8 84 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 03) 300 001(84) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+25015, 347, 2294}, + /* 2039 : CTESTNG spec4,rm8,reg8 [wmr: evex.scc14.dfv.l0.m4.o8 84 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0e) 300 001(84) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+25078, 347, 2294}, + /* 2040 : CTESTNL spec4,rm8,reg8 [wmr: evex.scc13.dfv.l0.m4.o8 84 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0d) 300 001(84) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+25060, 347, 2294}, + /* 2041 : CTESTNO spec4,rm8,reg8 [wmr: evex.scc1.dfv.l0.m4.o8 84 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 01) 300 001(84) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+25096, 347, 2294}, + /* 2042 : CTESTNS spec4,rm8,reg8 [wmr: evex.scc9.dfv.l0.m4.o8 84 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 09) 300 001(84) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+25105, 347, 2294}, + /* 2043 : CTESTNZ spec4,rm8,reg8 [wmr: evex.scc5.dfv.l0.m4.o8 84 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 05) 300 001(84) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+25087, 347, 2294}, + /* 2044 : CTESTO spec4,rm8,reg8 [wmr: evex.scc0.dfv.l0.m4.o8 84 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 00) 300 001(84) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+25114, 347, 2294}, + /* 2045 : CTESTS spec4,rm8,reg8 [wmr: evex.scc8.dfv.l0.m4.o8 84 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 08) 300 001(84) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+25123, 347, 2294}, + /* 2046 : CTESTT spec4,rm8,reg8 [wmr: evex.scc10.dfv.l0.m4.o8 84 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0a) 300 001(84) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTT, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+25132, 347, 2294}, + /* 2047 : CTESTZ spec4,rm8,reg8 [wmr: evex.scc4.dfv.l0.m4.o8 84 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 04) 300 001(84) 112 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,REG_GPR|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+25042, 347, 2294}, + /* 2048 : CTESTA spec4,rm16,reg16 [wmr: evex.scc7.dfv.l0.m4.o16 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 07) 300 320 001(85) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+14253, 348, 2295}, + /* 2049 : CTESTC spec4,rm16,reg16 [wmr: evex.scc2.dfv.l0.m4.o16 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 02) 300 320 001(85) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+14273, 348, 2295}, + /* 2050 : CTESTF spec4,rm16,reg16 [wmr: evex.scc11.dfv.l0.m4.o16 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0b) 300 320 001(85) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTF, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+14243, 348, 2295}, + /* 2051 : CTESTG spec4,rm16,reg16 [wmr: evex.scc15.dfv.l0.m4.o16 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0f) 300 320 001(85) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+14303, 348, 2295}, + /* 2052 : CTESTL spec4,rm16,reg16 [wmr: evex.scc12.dfv.l0.m4.o16 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0c) 300 320 001(85) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+14323, 348, 2295}, + /* 2053 : CTESTNA spec4,rm16,reg16 [wmr: evex.scc6.dfv.l0.m4.o16 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 06) 300 320 001(85) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+14283, 348, 2295}, + /* 2054 : CTESTNC spec4,rm16,reg16 [wmr: evex.scc3.dfv.l0.m4.o16 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 03) 300 320 001(85) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+14263, 348, 2295}, + /* 2055 : CTESTNG spec4,rm16,reg16 [wmr: evex.scc14.dfv.l0.m4.o16 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0e) 300 320 001(85) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+14333, 348, 2295}, + /* 2056 : CTESTNL spec4,rm16,reg16 [wmr: evex.scc13.dfv.l0.m4.o16 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0d) 300 320 001(85) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+14313, 348, 2295}, + /* 2057 : CTESTNO spec4,rm16,reg16 [wmr: evex.scc1.dfv.l0.m4.o16 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 01) 300 320 001(85) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+14353, 348, 2295}, + /* 2058 : CTESTNS spec4,rm16,reg16 [wmr: evex.scc9.dfv.l0.m4.o16 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 09) 300 320 001(85) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+14363, 348, 2295}, + /* 2059 : CTESTNZ spec4,rm16,reg16 [wmr: evex.scc5.dfv.l0.m4.o16 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 05) 300 320 001(85) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+14343, 348, 2295}, + /* 2060 : CTESTO spec4,rm16,reg16 [wmr: evex.scc0.dfv.l0.m4.o16 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 00) 300 320 001(85) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+14373, 348, 2295}, + /* 2061 : CTESTS spec4,rm16,reg16 [wmr: evex.scc8.dfv.l0.m4.o16 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 08) 300 320 001(85) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+14383, 348, 2295}, + /* 2062 : CTESTT spec4,rm16,reg16 [wmr: evex.scc10.dfv.l0.m4.o16 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0a) 300 320 001(85) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTT, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+14393, 348, 2295}, + /* 2063 : CTESTZ spec4,rm16,reg16 [wmr: evex.scc4.dfv.l0.m4.o16 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 04) 300 320 001(85) 112 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,REG_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+14293, 348, 2295}, + /* 2064 : CTESTA spec4,rm32,reg32 [wmr: evex.scc7.dfv.l0.m4.o32 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 07) 300 321 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+14413, 349, 2296}, + /* 2065 : CTESTC spec4,rm32,reg32 [wmr: evex.scc2.dfv.l0.m4.o32 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 02) 300 321 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+14433, 349, 2296}, + /* 2066 : CTESTF spec4,rm32,reg32 [wmr: evex.scc11.dfv.l0.m4.o32 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0b) 300 321 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTF, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+14403, 349, 2296}, + /* 2067 : CTESTG spec4,rm32,reg32 [wmr: evex.scc15.dfv.l0.m4.o32 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0f) 300 321 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+14463, 349, 2296}, + /* 2068 : CTESTL spec4,rm32,reg32 [wmr: evex.scc12.dfv.l0.m4.o32 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0c) 300 321 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+14483, 349, 2296}, + /* 2069 : CTESTNA spec4,rm32,reg32 [wmr: evex.scc6.dfv.l0.m4.o32 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 06) 300 321 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+14443, 349, 2296}, + /* 2070 : CTESTNC spec4,rm32,reg32 [wmr: evex.scc3.dfv.l0.m4.o32 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 03) 300 321 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+14423, 349, 2296}, + /* 2071 : CTESTNG spec4,rm32,reg32 [wmr: evex.scc14.dfv.l0.m4.o32 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0e) 300 321 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+14493, 349, 2296}, + /* 2072 : CTESTNL spec4,rm32,reg32 [wmr: evex.scc13.dfv.l0.m4.o32 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0d) 300 321 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+14473, 349, 2296}, + /* 2073 : CTESTNO spec4,rm32,reg32 [wmr: evex.scc1.dfv.l0.m4.o32 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 01) 300 321 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+14513, 349, 2296}, + /* 2074 : CTESTNS spec4,rm32,reg32 [wmr: evex.scc9.dfv.l0.m4.o32 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 09) 300 321 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+14523, 349, 2296}, + /* 2075 : CTESTNZ spec4,rm32,reg32 [wmr: evex.scc5.dfv.l0.m4.o32 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 05) 300 321 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+14503, 349, 2296}, + /* 2076 : CTESTO spec4,rm32,reg32 [wmr: evex.scc0.dfv.l0.m4.o32 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 00) 300 321 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+14533, 349, 2296}, + /* 2077 : CTESTS spec4,rm32,reg32 [wmr: evex.scc8.dfv.l0.m4.o32 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 08) 300 321 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+14543, 349, 2296}, + /* 2078 : CTESTT spec4,rm32,reg32 [wmr: evex.scc10.dfv.l0.m4.o32 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0a) 300 321 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTT, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+14553, 349, 2296}, + /* 2079 : CTESTZ spec4,rm32,reg32 [wmr: evex.scc4.dfv.l0.m4.o32 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 04) 300 321 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+14453, 349, 2296}, + /* 2080 : CTESTA spec4,rm64,reg64 [wmr: evex.scc7.dfv.l0.m4.o64 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 07) 300 324 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+14573, 349, 2297}, + /* 2081 : CTESTC spec4,rm64,reg64 [wmr: evex.scc2.dfv.l0.m4.o64 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 02) 300 324 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+14593, 349, 2297}, + /* 2082 : CTESTF spec4,rm64,reg64 [wmr: evex.scc11.dfv.l0.m4.o64 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0b) 300 324 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTF, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+14563, 349, 2297}, + /* 2083 : CTESTG spec4,rm64,reg64 [wmr: evex.scc15.dfv.l0.m4.o64 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0f) 300 324 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+14623, 349, 2297}, + /* 2084 : CTESTL spec4,rm64,reg64 [wmr: evex.scc12.dfv.l0.m4.o64 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0c) 300 324 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+14643, 349, 2297}, + /* 2085 : CTESTNA spec4,rm64,reg64 [wmr: evex.scc6.dfv.l0.m4.o64 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 06) 300 324 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+14603, 349, 2297}, + /* 2086 : CTESTNC spec4,rm64,reg64 [wmr: evex.scc3.dfv.l0.m4.o64 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 03) 300 324 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+14583, 349, 2297}, + /* 2087 : CTESTNG spec4,rm64,reg64 [wmr: evex.scc14.dfv.l0.m4.o64 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0e) 300 324 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+14653, 349, 2297}, + /* 2088 : CTESTNL spec4,rm64,reg64 [wmr: evex.scc13.dfv.l0.m4.o64 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0d) 300 324 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+14633, 349, 2297}, + /* 2089 : CTESTNO spec4,rm64,reg64 [wmr: evex.scc1.dfv.l0.m4.o64 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 01) 300 324 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+14673, 349, 2297}, + /* 2090 : CTESTNS spec4,rm64,reg64 [wmr: evex.scc9.dfv.l0.m4.o64 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 09) 300 324 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+14683, 349, 2297}, + /* 2091 : CTESTNZ spec4,rm64,reg64 [wmr: evex.scc5.dfv.l0.m4.o64 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 05) 300 324 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+14663, 349, 2297}, + /* 2092 : CTESTO spec4,rm64,reg64 [wmr: evex.scc0.dfv.l0.m4.o64 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 00) 300 324 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+14693, 349, 2297}, + /* 2093 : CTESTS spec4,rm64,reg64 [wmr: evex.scc8.dfv.l0.m4.o64 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 08) 300 324 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+14703, 349, 2297}, + /* 2094 : CTESTT spec4,rm64,reg64 [wmr: evex.scc10.dfv.l0.m4.o64 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0a) 300 324 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTT, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+14713, 349, 2297}, + /* 2095 : CTESTZ spec4,rm64,reg64 [wmr: evex.scc4.dfv.l0.m4.o64 85 /r ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 04) 300 324 001(85) 112 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+14613, 349, 2297}, + /* 2096 : CTESTA spec4,rm8,imm8 [wmi: evex.scc7.dfv.l0.m4.o8 f6 /0 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 07) 300 001(f6) 210 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14733, 347, 2298}, + /* 2097 : CTESTC spec4,rm8,imm8 [wmi: evex.scc2.dfv.l0.m4.o8 f6 /0 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 02) 300 001(f6) 210 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14753, 347, 2298}, + /* 2098 : CTESTF spec4,rm8,imm8 [wmi: evex.scc11.dfv.l0.m4.o8 f6 /0 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0b) 300 001(f6) 210 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTF, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14723, 347, 2298}, + /* 2099 : CTESTG spec4,rm8,imm8 [wmi: evex.scc15.dfv.l0.m4.o8 f6 /0 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0f) 300 001(f6) 210 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14783, 347, 2298}, + /* 2100 : CTESTL spec4,rm8,imm8 [wmi: evex.scc12.dfv.l0.m4.o8 f6 /0 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0c) 300 001(f6) 210 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14803, 347, 2298}, + /* 2101 : CTESTNA spec4,rm8,imm8 [wmi: evex.scc6.dfv.l0.m4.o8 f6 /0 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 06) 300 001(f6) 210 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14763, 347, 2298}, + /* 2102 : CTESTNC spec4,rm8,imm8 [wmi: evex.scc3.dfv.l0.m4.o8 f6 /0 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 03) 300 001(f6) 210 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14743, 347, 2298}, + /* 2103 : CTESTNG spec4,rm8,imm8 [wmi: evex.scc14.dfv.l0.m4.o8 f6 /0 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0e) 300 001(f6) 210 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14813, 347, 2298}, + /* 2104 : CTESTNL spec4,rm8,imm8 [wmi: evex.scc13.dfv.l0.m4.o8 f6 /0 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0d) 300 001(f6) 210 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14793, 347, 2298}, + /* 2105 : CTESTNO spec4,rm8,imm8 [wmi: evex.scc1.dfv.l0.m4.o8 f6 /0 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 01) 300 001(f6) 210 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14833, 347, 2298}, + /* 2106 : CTESTNS spec4,rm8,imm8 [wmi: evex.scc9.dfv.l0.m4.o8 f6 /0 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 09) 300 001(f6) 210 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14843, 347, 2298}, + /* 2107 : CTESTNZ spec4,rm8,imm8 [wmi: evex.scc5.dfv.l0.m4.o8 f6 /0 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 05) 300 001(f6) 210 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14823, 347, 2298}, + /* 2108 : CTESTO spec4,rm8,imm8 [wmi: evex.scc0.dfv.l0.m4.o8 f6 /0 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 00) 300 001(f6) 210 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14853, 347, 2298}, + /* 2109 : CTESTS spec4,rm8,imm8 [wmi: evex.scc8.dfv.l0.m4.o8 f6 /0 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 08) 300 001(f6) 210 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14863, 347, 2298}, + /* 2110 : CTESTT spec4,rm8,imm8 [wmi: evex.scc10.dfv.l0.m4.o8 f6 /0 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0a) 300 001(f6) 210 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTT, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14873, 347, 2298}, + /* 2111 : CTESTZ spec4,rm8,imm8 [wmi: evex.scc4.dfv.l0.m4.o8 f6 /0 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 04) 300 001(f6) 210 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14773, 347, 2298}, + /* 2112 : CTESTA spec4,rm16,imm16 [wmi: evex.scc7.dfv.l0.m4.o16 f7 /0 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 07) 300 320 001(f7) 210 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3434, 348, 2299}, + /* 2113 : CTESTC spec4,rm16,imm16 [wmi: evex.scc2.dfv.l0.m4.o16 f7 /0 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 02) 300 320 001(f7) 210 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3456, 348, 2299}, + /* 2114 : CTESTF spec4,rm16,imm16 [wmi: evex.scc11.dfv.l0.m4.o16 f7 /0 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0b) 300 320 001(f7) 210 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTF, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3423, 348, 2299}, + /* 2115 : CTESTG spec4,rm16,imm16 [wmi: evex.scc15.dfv.l0.m4.o16 f7 /0 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0f) 300 320 001(f7) 210 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3489, 348, 2299}, + /* 2116 : CTESTL spec4,rm16,imm16 [wmi: evex.scc12.dfv.l0.m4.o16 f7 /0 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0c) 300 320 001(f7) 210 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3511, 348, 2299}, + /* 2117 : CTESTNA spec4,rm16,imm16 [wmi: evex.scc6.dfv.l0.m4.o16 f7 /0 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 06) 300 320 001(f7) 210 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3467, 348, 2299}, + /* 2118 : CTESTNC spec4,rm16,imm16 [wmi: evex.scc3.dfv.l0.m4.o16 f7 /0 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 03) 300 320 001(f7) 210 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3445, 348, 2299}, + /* 2119 : CTESTNG spec4,rm16,imm16 [wmi: evex.scc14.dfv.l0.m4.o16 f7 /0 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0e) 300 320 001(f7) 210 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3522, 348, 2299}, + /* 2120 : CTESTNL spec4,rm16,imm16 [wmi: evex.scc13.dfv.l0.m4.o16 f7 /0 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0d) 300 320 001(f7) 210 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3500, 348, 2299}, + /* 2121 : CTESTNO spec4,rm16,imm16 [wmi: evex.scc1.dfv.l0.m4.o16 f7 /0 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 01) 300 320 001(f7) 210 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3544, 348, 2299}, + /* 2122 : CTESTNS spec4,rm16,imm16 [wmi: evex.scc9.dfv.l0.m4.o16 f7 /0 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 09) 300 320 001(f7) 210 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3555, 348, 2299}, + /* 2123 : CTESTNZ spec4,rm16,imm16 [wmi: evex.scc5.dfv.l0.m4.o16 f7 /0 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 05) 300 320 001(f7) 210 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3533, 348, 2299}, + /* 2124 : CTESTO spec4,rm16,imm16 [wmi: evex.scc0.dfv.l0.m4.o16 f7 /0 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 00) 300 320 001(f7) 210 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3566, 348, 2299}, + /* 2125 : CTESTS spec4,rm16,imm16 [wmi: evex.scc8.dfv.l0.m4.o16 f7 /0 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 08) 300 320 001(f7) 210 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3577, 348, 2299}, + /* 2126 : CTESTT spec4,rm16,imm16 [wmi: evex.scc10.dfv.l0.m4.o16 f7 /0 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0a) 300 320 001(f7) 210 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTT, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3588, 348, 2299}, + /* 2127 : CTESTZ spec4,rm16,imm16 [wmi: evex.scc4.dfv.l0.m4.o16 f7 /0 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 04) 300 320 001(f7) 210 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3478, 348, 2299}, + /* 2128 : CTESTA spec4,rm32,imm32 [wmi: evex.scc7.dfv.l0.m4.o32 f7 /0 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 07) 300 321 001(f7) 210 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3610, 349, 2300}, + /* 2129 : CTESTC spec4,rm32,imm32 [wmi: evex.scc2.dfv.l0.m4.o32 f7 /0 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 02) 300 321 001(f7) 210 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3632, 349, 2300}, + /* 2130 : CTESTF spec4,rm32,imm32 [wmi: evex.scc11.dfv.l0.m4.o32 f7 /0 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0b) 300 321 001(f7) 210 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTF, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3599, 349, 2300}, + /* 2131 : CTESTG spec4,rm32,imm32 [wmi: evex.scc15.dfv.l0.m4.o32 f7 /0 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0f) 300 321 001(f7) 210 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3665, 349, 2300}, + /* 2132 : CTESTL spec4,rm32,imm32 [wmi: evex.scc12.dfv.l0.m4.o32 f7 /0 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0c) 300 321 001(f7) 210 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3687, 349, 2300}, + /* 2133 : CTESTNA spec4,rm32,imm32 [wmi: evex.scc6.dfv.l0.m4.o32 f7 /0 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 06) 300 321 001(f7) 210 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3643, 349, 2300}, + /* 2134 : CTESTNC spec4,rm32,imm32 [wmi: evex.scc3.dfv.l0.m4.o32 f7 /0 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 03) 300 321 001(f7) 210 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3621, 349, 2300}, + /* 2135 : CTESTNG spec4,rm32,imm32 [wmi: evex.scc14.dfv.l0.m4.o32 f7 /0 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0e) 300 321 001(f7) 210 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3698, 349, 2300}, + /* 2136 : CTESTNL spec4,rm32,imm32 [wmi: evex.scc13.dfv.l0.m4.o32 f7 /0 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0d) 300 321 001(f7) 210 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3676, 349, 2300}, + /* 2137 : CTESTNO spec4,rm32,imm32 [wmi: evex.scc1.dfv.l0.m4.o32 f7 /0 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 01) 300 321 001(f7) 210 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3720, 349, 2300}, + /* 2138 : CTESTNS spec4,rm32,imm32 [wmi: evex.scc9.dfv.l0.m4.o32 f7 /0 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 09) 300 321 001(f7) 210 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3731, 349, 2300}, + /* 2139 : CTESTNZ spec4,rm32,imm32 [wmi: evex.scc5.dfv.l0.m4.o32 f7 /0 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 05) 300 321 001(f7) 210 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3709, 349, 2300}, + /* 2140 : CTESTO spec4,rm32,imm32 [wmi: evex.scc0.dfv.l0.m4.o32 f7 /0 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 00) 300 321 001(f7) 210 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3742, 349, 2300}, + /* 2141 : CTESTS spec4,rm32,imm32 [wmi: evex.scc8.dfv.l0.m4.o32 f7 /0 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 08) 300 321 001(f7) 210 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3753, 349, 2300}, + /* 2142 : CTESTT spec4,rm32,imm32 [wmi: evex.scc10.dfv.l0.m4.o32 f7 /0 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0a) 300 321 001(f7) 210 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTT, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3764, 349, 2300}, + /* 2143 : CTESTZ spec4,rm32,imm32 [wmi: evex.scc4.dfv.l0.m4.o32 f7 /0 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 04) 300 321 001(f7) 210 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+3654, 349, 2300}, + /* 2144 : CTESTA spec4,rm64,sdword64 [wmi: evex.scc7.dfv.l0.m4.o64 f7 /0 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 07) 300 324 001(f7) 210 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3786, 349, 2301}, + /* 2145 : CTESTC spec4,rm64,sdword64 [wmi: evex.scc2.dfv.l0.m4.o64 f7 /0 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 02) 300 324 001(f7) 210 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3808, 349, 2301}, + /* 2146 : CTESTF spec4,rm64,sdword64 [wmi: evex.scc11.dfv.l0.m4.o64 f7 /0 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0b) 300 324 001(f7) 210 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTF, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3775, 349, 2301}, + /* 2147 : CTESTG spec4,rm64,sdword64 [wmi: evex.scc15.dfv.l0.m4.o64 f7 /0 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0f) 300 324 001(f7) 210 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3841, 349, 2301}, + /* 2148 : CTESTL spec4,rm64,sdword64 [wmi: evex.scc12.dfv.l0.m4.o64 f7 /0 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0c) 300 324 001(f7) 210 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3863, 349, 2301}, + /* 2149 : CTESTNA spec4,rm64,sdword64 [wmi: evex.scc6.dfv.l0.m4.o64 f7 /0 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 06) 300 324 001(f7) 210 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3819, 349, 2301}, + /* 2150 : CTESTNC spec4,rm64,sdword64 [wmi: evex.scc3.dfv.l0.m4.o64 f7 /0 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 03) 300 324 001(f7) 210 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3797, 349, 2301}, + /* 2151 : CTESTNG spec4,rm64,sdword64 [wmi: evex.scc14.dfv.l0.m4.o64 f7 /0 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0e) 300 324 001(f7) 210 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3874, 349, 2301}, + /* 2152 : CTESTNL spec4,rm64,sdword64 [wmi: evex.scc13.dfv.l0.m4.o64 f7 /0 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0d) 300 324 001(f7) 210 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3852, 349, 2301}, + /* 2153 : CTESTNO spec4,rm64,sdword64 [wmi: evex.scc1.dfv.l0.m4.o64 f7 /0 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 01) 300 324 001(f7) 210 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3896, 349, 2301}, + /* 2154 : CTESTNS spec4,rm64,sdword64 [wmi: evex.scc9.dfv.l0.m4.o64 f7 /0 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 09) 300 324 001(f7) 210 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3907, 349, 2301}, + /* 2155 : CTESTNZ spec4,rm64,sdword64 [wmi: evex.scc5.dfv.l0.m4.o64 f7 /0 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 05) 300 324 001(f7) 210 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3885, 349, 2301}, + /* 2156 : CTESTO spec4,rm64,sdword64 [wmi: evex.scc0.dfv.l0.m4.o64 f7 /0 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 00) 300 324 001(f7) 210 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3918, 349, 2301}, + /* 2157 : CTESTS spec4,rm64,sdword64 [wmi: evex.scc8.dfv.l0.m4.o64 f7 /0 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 08) 300 324 001(f7) 210 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3929, 349, 2301}, + /* 2158 : CTESTT spec4,rm64,sdword64 [wmi: evex.scc10.dfv.l0.m4.o64 f7 /0 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0a) 300 324 001(f7) 210 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTT, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3940, 349, 2301}, + /* 2159 : CTESTZ spec4,rm64,sdword64 [wmi: evex.scc4.dfv.l0.m4.o64 f7 /0 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 04) 300 324 001(f7) 210 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+3830, 349, 2301}, + /* 2160 : CTESTA spec4,rm8,imm8 [wmi: evex.scc7.dfv.l0.m4.o8 f6 /1 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 07) 300 001(f6) 211 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14893, 347, 2302}, + /* 2161 : CTESTC spec4,rm8,imm8 [wmi: evex.scc2.dfv.l0.m4.o8 f6 /1 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 02) 300 001(f6) 211 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14913, 347, 2302}, + /* 2162 : CTESTF spec4,rm8,imm8 [wmi: evex.scc11.dfv.l0.m4.o8 f6 /1 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0b) 300 001(f6) 211 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTF, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14883, 347, 2302}, + /* 2163 : CTESTG spec4,rm8,imm8 [wmi: evex.scc15.dfv.l0.m4.o8 f6 /1 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0f) 300 001(f6) 211 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14943, 347, 2302}, + /* 2164 : CTESTL spec4,rm8,imm8 [wmi: evex.scc12.dfv.l0.m4.o8 f6 /1 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0c) 300 001(f6) 211 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14963, 347, 2302}, + /* 2165 : CTESTNA spec4,rm8,imm8 [wmi: evex.scc6.dfv.l0.m4.o8 f6 /1 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 06) 300 001(f6) 211 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14923, 347, 2302}, + /* 2166 : CTESTNC spec4,rm8,imm8 [wmi: evex.scc3.dfv.l0.m4.o8 f6 /1 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 03) 300 001(f6) 211 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14903, 347, 2302}, + /* 2167 : CTESTNG spec4,rm8,imm8 [wmi: evex.scc14.dfv.l0.m4.o8 f6 /1 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0e) 300 001(f6) 211 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14973, 347, 2302}, + /* 2168 : CTESTNL spec4,rm8,imm8 [wmi: evex.scc13.dfv.l0.m4.o8 f6 /1 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0d) 300 001(f6) 211 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14953, 347, 2302}, + /* 2169 : CTESTNO spec4,rm8,imm8 [wmi: evex.scc1.dfv.l0.m4.o8 f6 /1 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 01) 300 001(f6) 211 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14993, 347, 2302}, + /* 2170 : CTESTNS spec4,rm8,imm8 [wmi: evex.scc9.dfv.l0.m4.o8 f6 /1 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 09) 300 001(f6) 211 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15003, 347, 2302}, + /* 2171 : CTESTNZ spec4,rm8,imm8 [wmi: evex.scc5.dfv.l0.m4.o8 f6 /1 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 05) 300 001(f6) 211 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14983, 347, 2302}, + /* 2172 : CTESTO spec4,rm8,imm8 [wmi: evex.scc0.dfv.l0.m4.o8 f6 /1 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 00) 300 001(f6) 211 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15013, 347, 2302}, + /* 2173 : CTESTS spec4,rm8,imm8 [wmi: evex.scc8.dfv.l0.m4.o8 f6 /1 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 08) 300 001(f6) 211 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15023, 347, 2302}, + /* 2174 : CTESTT spec4,rm8,imm8 [wmi: evex.scc10.dfv.l0.m4.o8 f6 /1 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0a) 300 001(f6) 211 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTT, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+15033, 347, 2302}, + /* 2175 : CTESTZ spec4,rm8,imm8 [wmi: evex.scc4.dfv.l0.m4.o8 f6 /1 ib ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 04) 300 001(f6) 211 022 : SM1,SM2,WIG,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+14933, 347, 2302}, + /* 2176 : CTESTA spec4,rm16,imm16 [wmi: evex.scc7.dfv.l0.m4.o16 f7 /1 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 07) 300 320 001(f7) 211 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3962, 348, 2303}, + /* 2177 : CTESTC spec4,rm16,imm16 [wmi: evex.scc2.dfv.l0.m4.o16 f7 /1 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 02) 300 320 001(f7) 211 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3984, 348, 2303}, + /* 2178 : CTESTF spec4,rm16,imm16 [wmi: evex.scc11.dfv.l0.m4.o16 f7 /1 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0b) 300 320 001(f7) 211 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTF, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3951, 348, 2303}, + /* 2179 : CTESTG spec4,rm16,imm16 [wmi: evex.scc15.dfv.l0.m4.o16 f7 /1 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0f) 300 320 001(f7) 211 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+4017, 348, 2303}, + /* 2180 : CTESTL spec4,rm16,imm16 [wmi: evex.scc12.dfv.l0.m4.o16 f7 /1 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0c) 300 320 001(f7) 211 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+4039, 348, 2303}, + /* 2181 : CTESTNA spec4,rm16,imm16 [wmi: evex.scc6.dfv.l0.m4.o16 f7 /1 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 06) 300 320 001(f7) 211 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3995, 348, 2303}, + /* 2182 : CTESTNC spec4,rm16,imm16 [wmi: evex.scc3.dfv.l0.m4.o16 f7 /1 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 03) 300 320 001(f7) 211 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+3973, 348, 2303}, + /* 2183 : CTESTNG spec4,rm16,imm16 [wmi: evex.scc14.dfv.l0.m4.o16 f7 /1 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0e) 300 320 001(f7) 211 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+4050, 348, 2303}, + /* 2184 : CTESTNL spec4,rm16,imm16 [wmi: evex.scc13.dfv.l0.m4.o16 f7 /1 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0d) 300 320 001(f7) 211 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+4028, 348, 2303}, + /* 2185 : CTESTNO spec4,rm16,imm16 [wmi: evex.scc1.dfv.l0.m4.o16 f7 /1 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 01) 300 320 001(f7) 211 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+4072, 348, 2303}, + /* 2186 : CTESTNS spec4,rm16,imm16 [wmi: evex.scc9.dfv.l0.m4.o16 f7 /1 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 09) 300 320 001(f7) 211 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+4083, 348, 2303}, + /* 2187 : CTESTNZ spec4,rm16,imm16 [wmi: evex.scc5.dfv.l0.m4.o16 f7 /1 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 05) 300 320 001(f7) 211 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+4061, 348, 2303}, + /* 2188 : CTESTO spec4,rm16,imm16 [wmi: evex.scc0.dfv.l0.m4.o16 f7 /1 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 00) 300 320 001(f7) 211 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+4094, 348, 2303}, + /* 2189 : CTESTS spec4,rm16,imm16 [wmi: evex.scc8.dfv.l0.m4.o16 f7 /1 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 08) 300 320 001(f7) 211 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+4105, 348, 2303}, + /* 2190 : CTESTT spec4,rm16,imm16 [wmi: evex.scc10.dfv.l0.m4.o16 f7 /1 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 0a) 300 320 001(f7) 211 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTT, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+4116, 348, 2303}, + /* 2191 : CTESTZ spec4,rm16,imm16 [wmi: evex.scc4.dfv.l0.m4.o16 f7 /1 iw ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 05 04) 300 320 001(f7) 211 032 : SM1,SM2,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS16,IMM_NORMAL|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+4006, 348, 2303}, + /* 2192 : CTESTA spec4,rm32,imm32 [wmi: evex.scc7.dfv.l0.m4.o32 f7 /1 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 07) 300 321 001(f7) 211 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+4138, 349, 2304}, + /* 2193 : CTESTC spec4,rm32,imm32 [wmi: evex.scc2.dfv.l0.m4.o32 f7 /1 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 02) 300 321 001(f7) 211 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+4160, 349, 2304}, + /* 2194 : CTESTF spec4,rm32,imm32 [wmi: evex.scc11.dfv.l0.m4.o32 f7 /1 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0b) 300 321 001(f7) 211 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTF, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+4127, 349, 2304}, + /* 2195 : CTESTG spec4,rm32,imm32 [wmi: evex.scc15.dfv.l0.m4.o32 f7 /1 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0f) 300 321 001(f7) 211 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+4193, 349, 2304}, + /* 2196 : CTESTL spec4,rm32,imm32 [wmi: evex.scc12.dfv.l0.m4.o32 f7 /1 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0c) 300 321 001(f7) 211 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+4215, 349, 2304}, + /* 2197 : CTESTNA spec4,rm32,imm32 [wmi: evex.scc6.dfv.l0.m4.o32 f7 /1 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 06) 300 321 001(f7) 211 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+4171, 349, 2304}, + /* 2198 : CTESTNC spec4,rm32,imm32 [wmi: evex.scc3.dfv.l0.m4.o32 f7 /1 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 03) 300 321 001(f7) 211 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+4149, 349, 2304}, + /* 2199 : CTESTNG spec4,rm32,imm32 [wmi: evex.scc14.dfv.l0.m4.o32 f7 /1 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0e) 300 321 001(f7) 211 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+4226, 349, 2304}, + /* 2200 : CTESTNL spec4,rm32,imm32 [wmi: evex.scc13.dfv.l0.m4.o32 f7 /1 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0d) 300 321 001(f7) 211 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+4204, 349, 2304}, + /* 2201 : CTESTNO spec4,rm32,imm32 [wmi: evex.scc1.dfv.l0.m4.o32 f7 /1 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 01) 300 321 001(f7) 211 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+4248, 349, 2304}, + /* 2202 : CTESTNS spec4,rm32,imm32 [wmi: evex.scc9.dfv.l0.m4.o32 f7 /1 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 09) 300 321 001(f7) 211 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+4259, 349, 2304}, + /* 2203 : CTESTNZ spec4,rm32,imm32 [wmi: evex.scc5.dfv.l0.m4.o32 f7 /1 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 05) 300 321 001(f7) 211 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+4237, 349, 2304}, + /* 2204 : CTESTO spec4,rm32,imm32 [wmi: evex.scc0.dfv.l0.m4.o32 f7 /1 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 00) 300 321 001(f7) 211 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+4270, 349, 2304}, + /* 2205 : CTESTS spec4,rm32,imm32 [wmi: evex.scc8.dfv.l0.m4.o32 f7 /1 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 08) 300 321 001(f7) 211 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+4281, 349, 2304}, + /* 2206 : CTESTT spec4,rm32,imm32 [wmi: evex.scc10.dfv.l0.m4.o32 f7 /1 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 0a) 300 321 001(f7) 211 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTT, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+4292, 349, 2304}, + /* 2207 : CTESTZ spec4,rm32,imm32 [wmi: evex.scc4.dfv.l0.m4.o32 f7 /1 id ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 04 04) 300 321 001(f7) 211 042 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS32,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+4182, 349, 2304}, + /* 2208 : CTESTA spec4,rm64,sdword64 [wmi: evex.scc7.dfv.l0.m4.o64 f7 /1 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 07) 300 324 001(f7) 211 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+4314, 349, 2305}, + /* 2209 : CTESTC spec4,rm64,sdword64 [wmi: evex.scc2.dfv.l0.m4.o64 f7 /1 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 02) 300 324 001(f7) 211 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+4336, 349, 2305}, + /* 2210 : CTESTF spec4,rm64,sdword64 [wmi: evex.scc11.dfv.l0.m4.o64 f7 /1 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0b) 300 324 001(f7) 211 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTF, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+4303, 349, 2305}, + /* 2211 : CTESTG spec4,rm64,sdword64 [wmi: evex.scc15.dfv.l0.m4.o64 f7 /1 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0f) 300 324 001(f7) 211 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+4369, 349, 2305}, + /* 2212 : CTESTL spec4,rm64,sdword64 [wmi: evex.scc12.dfv.l0.m4.o64 f7 /1 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0c) 300 324 001(f7) 211 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+4391, 349, 2305}, + /* 2213 : CTESTNA spec4,rm64,sdword64 [wmi: evex.scc6.dfv.l0.m4.o64 f7 /1 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 06) 300 324 001(f7) 211 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNA, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+4347, 349, 2305}, + /* 2214 : CTESTNC spec4,rm64,sdword64 [wmi: evex.scc3.dfv.l0.m4.o64 f7 /1 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 03) 300 324 001(f7) 211 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNC, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+4325, 349, 2305}, + /* 2215 : CTESTNG spec4,rm64,sdword64 [wmi: evex.scc14.dfv.l0.m4.o64 f7 /1 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0e) 300 324 001(f7) 211 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNG, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+4402, 349, 2305}, + /* 2216 : CTESTNL spec4,rm64,sdword64 [wmi: evex.scc13.dfv.l0.m4.o64 f7 /1 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0d) 300 324 001(f7) 211 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNL, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+4380, 349, 2305}, + /* 2217 : CTESTNO spec4,rm64,sdword64 [wmi: evex.scc1.dfv.l0.m4.o64 f7 /1 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 01) 300 324 001(f7) 211 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+4424, 349, 2305}, + /* 2218 : CTESTNS spec4,rm64,sdword64 [wmi: evex.scc9.dfv.l0.m4.o64 f7 /1 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 09) 300 324 001(f7) 211 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+4435, 349, 2305}, + /* 2219 : CTESTNZ spec4,rm64,sdword64 [wmi: evex.scc5.dfv.l0.m4.o64 f7 /1 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 05) 300 324 001(f7) 211 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTNZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+4413, 349, 2305}, + /* 2220 : CTESTO spec4,rm64,sdword64 [wmi: evex.scc0.dfv.l0.m4.o64 f7 /1 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 00) 300 324 001(f7) 211 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTO, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+4446, 349, 2305}, + /* 2221 : CTESTS spec4,rm64,sdword64 [wmi: evex.scc8.dfv.l0.m4.o64 f7 /1 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 08) 300 324 001(f7) 211 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTS, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+4457, 349, 2305}, + /* 2222 : CTESTT spec4,rm64,sdword64 [wmi: evex.scc10.dfv.l0.m4.o64 f7 /1 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 0a) 300 324 001(f7) 211 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTT, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+4468, 349, 2305}, + /* 2223 : CTESTZ spec4,rm64,sdword64 [wmi: evex.scc4.dfv.l0.m4.o64 f7 /1 id,s ] SM1-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 84 04) 300 324 001(f7) 211 256 : SM1,SM2,WW,LONG,SCC,DFV,EVEX,PROT,APX,X86_64 */ + {I_CTESTZ, 3, {IMMEDIATE|FOURBITS,RM_GPR|BITS64,SDWORD|BITS64|IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+4358, 349, 2305}, + /* 2224 : CMOVA reg16,rm16 [rm: o16 0f 47 /r ] SM0-1,P6 */ + /* 320 355 001(47) 110 : SM0,SM1,P6 */ + {I_CMOVA, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+68067, 350, 2308}, + /* 2225 : CMOVC reg16,rm16 [rm: o16 0f 42 /r ] SM0-1,P6 */ + /* 320 355 001(42) 110 : SM0,SM1,P6 */ + {I_CMOVC, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+68079, 350, 2308}, + /* 2226 : CMOVG reg16,rm16 [rm: o16 0f 4f /r ] SM0-1,P6 */ + /* 320 355 001(4f) 110 : SM0,SM1,P6 */ + {I_CMOVG, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+68097, 350, 2308}, + /* 2227 : CMOVL reg16,rm16 [rm: o16 0f 4c /r ] SM0-1,P6 */ + /* 320 355 001(4c) 110 : SM0,SM1,P6 */ + {I_CMOVL, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+68109, 350, 2308}, + /* 2228 : CMOVNA reg16,rm16 [rm: o16 0f 46 /r ] SM0-1,P6 */ + /* 320 355 001(46) 110 : SM0,SM1,P6 */ + {I_CMOVNA, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+68085, 350, 2308}, + /* 2229 : CMOVNC reg16,rm16 [rm: o16 0f 43 /r ] SM0-1,P6 */ + /* 320 355 001(43) 110 : SM0,SM1,P6 */ + {I_CMOVNC, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+68073, 350, 2308}, + /* 2230 : CMOVNG reg16,rm16 [rm: o16 0f 4e /r ] SM0-1,P6 */ + /* 320 355 001(4e) 110 : SM0,SM1,P6 */ + {I_CMOVNG, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+68115, 350, 2308}, + /* 2231 : CMOVNL reg16,rm16 [rm: o16 0f 4d /r ] SM0-1,P6 */ + /* 320 355 001(4d) 110 : SM0,SM1,P6 */ + {I_CMOVNL, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+68103, 350, 2308}, + /* 2232 : CMOVNO reg16,rm16 [rm: o16 0f 41 /r ] SM0-1,P6 */ + /* 320 355 001(41) 110 : SM0,SM1,P6 */ + {I_CMOVNO, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+68127, 350, 2308}, + /* 2233 : CMOVNS reg16,rm16 [rm: o16 0f 49 /r ] SM0-1,P6 */ + /* 320 355 001(49) 110 : SM0,SM1,P6 */ + {I_CMOVNS, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+68139, 350, 2308}, + /* 2234 : CMOVNZ reg16,rm16 [rm: o16 0f 45 /r ] SM0-1,P6 */ + /* 320 355 001(45) 110 : SM0,SM1,P6 */ + {I_CMOVNZ, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+68121, 350, 2308}, + /* 2235 : CMOVO reg16,rm16 [rm: o16 0f 40 /r ] SM0-1,P6 */ + /* 320 355 001(40) 110 : SM0,SM1,P6 */ + {I_CMOVO, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+68145, 350, 2308}, + /* 2236 : CMOVPE reg16,rm16 [rm: o16 0f 4a /r ] SM0-1,P6 */ + /* 320 355 001(4a) 110 : SM0,SM1,P6 */ + {I_CMOVPE, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+68151, 350, 2308}, + /* 2237 : CMOVPO reg16,rm16 [rm: o16 0f 4b /r ] SM0-1,P6 */ + /* 320 355 001(4b) 110 : SM0,SM1,P6 */ + {I_CMOVPO, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+68133, 350, 2308}, + /* 2238 : CMOVS reg16,rm16 [rm: o16 0f 48 /r ] SM0-1,P6 */ + /* 320 355 001(48) 110 : SM0,SM1,P6 */ + {I_CMOVS, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+68157, 350, 2308}, + /* 2239 : CMOVZ reg16,rm16 [rm: o16 0f 44 /r ] SM0-1,P6 */ + /* 320 355 001(44) 110 : SM0,SM1,P6 */ + {I_CMOVZ, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+68091, 350, 2308}, + /* 2240 : CMOVA reg32,rm32 [rm: o32 0f 47 /r ] SM0-1,P6 */ + /* 321 355 001(47) 110 : SM0,SM1,P6 */ + {I_CMOVA, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68163, 350, 2309}, + /* 2241 : CMOVC reg32,rm32 [rm: o32 0f 42 /r ] SM0-1,P6 */ + /* 321 355 001(42) 110 : SM0,SM1,P6 */ + {I_CMOVC, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68175, 350, 2309}, + /* 2242 : CMOVG reg32,rm32 [rm: o32 0f 4f /r ] SM0-1,P6 */ + /* 321 355 001(4f) 110 : SM0,SM1,P6 */ + {I_CMOVG, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68193, 350, 2309}, + /* 2243 : CMOVL reg32,rm32 [rm: o32 0f 4c /r ] SM0-1,P6 */ + /* 321 355 001(4c) 110 : SM0,SM1,P6 */ + {I_CMOVL, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68205, 350, 2309}, + /* 2244 : CMOVNA reg32,rm32 [rm: o32 0f 46 /r ] SM0-1,P6 */ + /* 321 355 001(46) 110 : SM0,SM1,P6 */ + {I_CMOVNA, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68181, 350, 2309}, + /* 2245 : CMOVNC reg32,rm32 [rm: o32 0f 43 /r ] SM0-1,P6 */ + /* 321 355 001(43) 110 : SM0,SM1,P6 */ + {I_CMOVNC, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68169, 350, 2309}, + /* 2246 : CMOVNG reg32,rm32 [rm: o32 0f 4e /r ] SM0-1,P6 */ + /* 321 355 001(4e) 110 : SM0,SM1,P6 */ + {I_CMOVNG, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68211, 350, 2309}, + /* 2247 : CMOVNL reg32,rm32 [rm: o32 0f 4d /r ] SM0-1,P6 */ + /* 321 355 001(4d) 110 : SM0,SM1,P6 */ + {I_CMOVNL, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68199, 350, 2309}, + /* 2248 : CMOVNO reg32,rm32 [rm: o32 0f 41 /r ] SM0-1,P6 */ + /* 321 355 001(41) 110 : SM0,SM1,P6 */ + {I_CMOVNO, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68223, 350, 2309}, + /* 2249 : CMOVNS reg32,rm32 [rm: o32 0f 49 /r ] SM0-1,P6 */ + /* 321 355 001(49) 110 : SM0,SM1,P6 */ + {I_CMOVNS, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68235, 350, 2309}, + /* 2250 : CMOVNZ reg32,rm32 [rm: o32 0f 45 /r ] SM0-1,P6 */ + /* 321 355 001(45) 110 : SM0,SM1,P6 */ + {I_CMOVNZ, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68217, 350, 2309}, + /* 2251 : CMOVO reg32,rm32 [rm: o32 0f 40 /r ] SM0-1,P6 */ + /* 321 355 001(40) 110 : SM0,SM1,P6 */ + {I_CMOVO, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68241, 350, 2309}, + /* 2252 : CMOVPE reg32,rm32 [rm: o32 0f 4a /r ] SM0-1,P6 */ + /* 321 355 001(4a) 110 : SM0,SM1,P6 */ + {I_CMOVPE, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68247, 350, 2309}, + /* 2253 : CMOVPO reg32,rm32 [rm: o32 0f 4b /r ] SM0-1,P6 */ + /* 321 355 001(4b) 110 : SM0,SM1,P6 */ + {I_CMOVPO, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68229, 350, 2309}, + /* 2254 : CMOVS reg32,rm32 [rm: o32 0f 48 /r ] SM0-1,P6 */ + /* 321 355 001(48) 110 : SM0,SM1,P6 */ + {I_CMOVS, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68253, 350, 2309}, + /* 2255 : CMOVZ reg32,rm32 [rm: o32 0f 44 /r ] SM0-1,P6 */ + /* 321 355 001(44) 110 : SM0,SM1,P6 */ + {I_CMOVZ, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68187, 350, 2309}, + /* 2256 : CMOVA reg64,rm64 [rm: o64 0f 47 /r ] SM0-1,LONG,PROT,X86_64 */ + /* 324 355 001(47) 110 : SM0,SM1,LONG,PROT,X86_64 */ + {I_CMOVA, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+68259, 14, 2310}, + /* 2257 : CMOVC reg64,rm64 [rm: o64 0f 42 /r ] SM0-1,LONG,PROT,X86_64 */ + /* 324 355 001(42) 110 : SM0,SM1,LONG,PROT,X86_64 */ + {I_CMOVC, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+68271, 14, 2310}, + /* 2258 : CMOVG reg64,rm64 [rm: o64 0f 4f /r ] SM0-1,LONG,PROT,X86_64 */ + /* 324 355 001(4f) 110 : SM0,SM1,LONG,PROT,X86_64 */ + {I_CMOVG, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+68289, 14, 2310}, + /* 2259 : CMOVL reg64,rm64 [rm: o64 0f 4c /r ] SM0-1,LONG,PROT,X86_64 */ + /* 324 355 001(4c) 110 : SM0,SM1,LONG,PROT,X86_64 */ + {I_CMOVL, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+68301, 14, 2310}, + /* 2260 : CMOVNA reg64,rm64 [rm: o64 0f 46 /r ] SM0-1,LONG,PROT,X86_64 */ + /* 324 355 001(46) 110 : SM0,SM1,LONG,PROT,X86_64 */ + {I_CMOVNA, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+68277, 14, 2310}, + /* 2261 : CMOVNC reg64,rm64 [rm: o64 0f 43 /r ] SM0-1,LONG,PROT,X86_64 */ + /* 324 355 001(43) 110 : SM0,SM1,LONG,PROT,X86_64 */ + {I_CMOVNC, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+68265, 14, 2310}, + /* 2262 : CMOVNG reg64,rm64 [rm: o64 0f 4e /r ] SM0-1,LONG,PROT,X86_64 */ + /* 324 355 001(4e) 110 : SM0,SM1,LONG,PROT,X86_64 */ + {I_CMOVNG, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+68307, 14, 2310}, + /* 2263 : CMOVNL reg64,rm64 [rm: o64 0f 4d /r ] SM0-1,LONG,PROT,X86_64 */ + /* 324 355 001(4d) 110 : SM0,SM1,LONG,PROT,X86_64 */ + {I_CMOVNL, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+68295, 14, 2310}, + /* 2264 : CMOVNO reg64,rm64 [rm: o64 0f 41 /r ] SM0-1,LONG,PROT,X86_64 */ + /* 324 355 001(41) 110 : SM0,SM1,LONG,PROT,X86_64 */ + {I_CMOVNO, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+68319, 14, 2310}, + /* 2265 : CMOVNS reg64,rm64 [rm: o64 0f 49 /r ] SM0-1,LONG,PROT,X86_64 */ + /* 324 355 001(49) 110 : SM0,SM1,LONG,PROT,X86_64 */ + {I_CMOVNS, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+68331, 14, 2310}, + /* 2266 : CMOVNZ reg64,rm64 [rm: o64 0f 45 /r ] SM0-1,LONG,PROT,X86_64 */ + /* 324 355 001(45) 110 : SM0,SM1,LONG,PROT,X86_64 */ + {I_CMOVNZ, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+68313, 14, 2310}, + /* 2267 : CMOVO reg64,rm64 [rm: o64 0f 40 /r ] SM0-1,LONG,PROT,X86_64 */ + /* 324 355 001(40) 110 : SM0,SM1,LONG,PROT,X86_64 */ + {I_CMOVO, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+68337, 14, 2310}, + /* 2268 : CMOVPE reg64,rm64 [rm: o64 0f 4a /r ] SM0-1,LONG,PROT,X86_64 */ + /* 324 355 001(4a) 110 : SM0,SM1,LONG,PROT,X86_64 */ + {I_CMOVPE, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+68343, 14, 2310}, + /* 2269 : CMOVPO reg64,rm64 [rm: o64 0f 4b /r ] SM0-1,LONG,PROT,X86_64 */ + /* 324 355 001(4b) 110 : SM0,SM1,LONG,PROT,X86_64 */ + {I_CMOVPO, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+68325, 14, 2310}, + /* 2270 : CMOVS reg64,rm64 [rm: o64 0f 48 /r ] SM0-1,LONG,PROT,X86_64 */ + /* 324 355 001(48) 110 : SM0,SM1,LONG,PROT,X86_64 */ + {I_CMOVS, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+68349, 14, 2310}, + /* 2271 : CMOVZ reg64,rm64 [rm: o64 0f 44 /r ] SM0-1,LONG,PROT,X86_64 */ + /* 324 355 001(44) 110 : SM0,SM1,LONG,PROT,X86_64 */ + {I_CMOVZ, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+68283, 14, 2310}, + /* 2272 : CMOVA reg16,reg16,rm16 [vrm: evex.nf0.nd1.l0.m4.o16 47 /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(47) 121 : SM0,SM1,SM2,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVA, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+15043, 351, 2311}, + /* 2273 : CMOVC reg16,reg16,rm16 [vrm: evex.nf0.nd1.l0.m4.o16 42 /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(42) 121 : SM0,SM1,SM2,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVC, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+15063, 351, 2311}, + /* 2274 : CMOVG reg16,reg16,rm16 [vrm: evex.nf0.nd1.l0.m4.o16 4f /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(4f) 121 : SM0,SM1,SM2,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVG, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+15093, 351, 2311}, + /* 2275 : CMOVL reg16,reg16,rm16 [vrm: evex.nf0.nd1.l0.m4.o16 4c /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(4c) 121 : SM0,SM1,SM2,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVL, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+15113, 351, 2311}, + /* 2276 : CMOVNA reg16,reg16,rm16 [vrm: evex.nf0.nd1.l0.m4.o16 46 /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(46) 121 : SM0,SM1,SM2,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVNA, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+15073, 351, 2311}, + /* 2277 : CMOVNC reg16,reg16,rm16 [vrm: evex.nf0.nd1.l0.m4.o16 43 /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(43) 121 : SM0,SM1,SM2,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVNC, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+15053, 351, 2311}, + /* 2278 : CMOVNG reg16,reg16,rm16 [vrm: evex.nf0.nd1.l0.m4.o16 4e /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(4e) 121 : SM0,SM1,SM2,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVNG, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+15123, 351, 2311}, + /* 2279 : CMOVNL reg16,reg16,rm16 [vrm: evex.nf0.nd1.l0.m4.o16 4d /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(4d) 121 : SM0,SM1,SM2,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVNL, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+15103, 351, 2311}, + /* 2280 : CMOVNO reg16,reg16,rm16 [vrm: evex.nf0.nd1.l0.m4.o16 41 /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(41) 121 : SM0,SM1,SM2,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVNO, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+15143, 351, 2311}, + /* 2281 : CMOVNS reg16,reg16,rm16 [vrm: evex.nf0.nd1.l0.m4.o16 49 /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(49) 121 : SM0,SM1,SM2,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVNS, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+15163, 351, 2311}, + /* 2282 : CMOVNZ reg16,reg16,rm16 [vrm: evex.nf0.nd1.l0.m4.o16 45 /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(45) 121 : SM0,SM1,SM2,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVNZ, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+15133, 351, 2311}, + /* 2283 : CMOVO reg16,reg16,rm16 [vrm: evex.nf0.nd1.l0.m4.o16 40 /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(40) 121 : SM0,SM1,SM2,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVO, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+15173, 351, 2311}, + /* 2284 : CMOVPE reg16,reg16,rm16 [vrm: evex.nf0.nd1.l0.m4.o16 4a /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(4a) 121 : SM0,SM1,SM2,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVPE, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+15183, 351, 2311}, + /* 2285 : CMOVPO reg16,reg16,rm16 [vrm: evex.nf0.nd1.l0.m4.o16 4b /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(4b) 121 : SM0,SM1,SM2,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVPO, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+15153, 351, 2311}, + /* 2286 : CMOVS reg16,reg16,rm16 [vrm: evex.nf0.nd1.l0.m4.o16 48 /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(48) 121 : SM0,SM1,SM2,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVS, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+15193, 351, 2311}, + /* 2287 : CMOVZ reg16,reg16,rm16 [vrm: evex.nf0.nd1.l0.m4.o16 44 /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 18) 300 320 001(44) 121 : SM0,SM1,SM2,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVZ, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+15083, 351, 2311}, + /* 2288 : CMOVA reg32,reg32,rm32 [vrm: evex.nf0.nd1.l0.m4.o32 47 /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(47) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVA, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+15203, 352, 2312}, + /* 2289 : CMOVC reg32,reg32,rm32 [vrm: evex.nf0.nd1.l0.m4.o32 42 /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(42) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVC, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+15223, 352, 2312}, + /* 2290 : CMOVG reg32,reg32,rm32 [vrm: evex.nf0.nd1.l0.m4.o32 4f /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(4f) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVG, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+15253, 352, 2312}, + /* 2291 : CMOVL reg32,reg32,rm32 [vrm: evex.nf0.nd1.l0.m4.o32 4c /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(4c) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVL, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+15273, 352, 2312}, + /* 2292 : CMOVNA reg32,reg32,rm32 [vrm: evex.nf0.nd1.l0.m4.o32 46 /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(46) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVNA, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+15233, 352, 2312}, + /* 2293 : CMOVNC reg32,reg32,rm32 [vrm: evex.nf0.nd1.l0.m4.o32 43 /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(43) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVNC, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+15213, 352, 2312}, + /* 2294 : CMOVNG reg32,reg32,rm32 [vrm: evex.nf0.nd1.l0.m4.o32 4e /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(4e) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVNG, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+15283, 352, 2312}, + /* 2295 : CMOVNL reg32,reg32,rm32 [vrm: evex.nf0.nd1.l0.m4.o32 4d /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(4d) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVNL, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+15263, 352, 2312}, + /* 2296 : CMOVNO reg32,reg32,rm32 [vrm: evex.nf0.nd1.l0.m4.o32 41 /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(41) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVNO, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+15303, 352, 2312}, + /* 2297 : CMOVNS reg32,reg32,rm32 [vrm: evex.nf0.nd1.l0.m4.o32 49 /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(49) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVNS, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+15323, 352, 2312}, + /* 2298 : CMOVNZ reg32,reg32,rm32 [vrm: evex.nf0.nd1.l0.m4.o32 45 /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(45) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVNZ, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+15293, 352, 2312}, + /* 2299 : CMOVO reg32,reg32,rm32 [vrm: evex.nf0.nd1.l0.m4.o32 40 /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(40) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVO, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+15333, 352, 2312}, + /* 2300 : CMOVPE reg32,reg32,rm32 [vrm: evex.nf0.nd1.l0.m4.o32 4a /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(4a) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVPE, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+15343, 352, 2312}, + /* 2301 : CMOVPO reg32,reg32,rm32 [vrm: evex.nf0.nd1.l0.m4.o32 4b /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(4b) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVPO, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+15313, 352, 2312}, + /* 2302 : CMOVS reg32,reg32,rm32 [vrm: evex.nf0.nd1.l0.m4.o32 48 /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(48) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVS, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+15353, 352, 2312}, + /* 2303 : CMOVZ reg32,reg32,rm32 [vrm: evex.nf0.nd1.l0.m4.o32 44 /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 18) 300 321 001(44) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVZ, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+15243, 352, 2312}, + /* 2304 : CMOVA reg64,reg64,rm64 [vrm: evex.nf0.nd1.l0.m4.o64 47 /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(47) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVA, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+15363, 352, 2313}, + /* 2305 : CMOVC reg64,reg64,rm64 [vrm: evex.nf0.nd1.l0.m4.o64 42 /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(42) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVC, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+15383, 352, 2313}, + /* 2306 : CMOVG reg64,reg64,rm64 [vrm: evex.nf0.nd1.l0.m4.o64 4f /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(4f) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVG, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+15413, 352, 2313}, + /* 2307 : CMOVL reg64,reg64,rm64 [vrm: evex.nf0.nd1.l0.m4.o64 4c /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(4c) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVL, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+15433, 352, 2313}, + /* 2308 : CMOVNA reg64,reg64,rm64 [vrm: evex.nf0.nd1.l0.m4.o64 46 /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(46) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVNA, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+15393, 352, 2313}, + /* 2309 : CMOVNC reg64,reg64,rm64 [vrm: evex.nf0.nd1.l0.m4.o64 43 /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(43) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVNC, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+15373, 352, 2313}, + /* 2310 : CMOVNG reg64,reg64,rm64 [vrm: evex.nf0.nd1.l0.m4.o64 4e /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(4e) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVNG, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+15443, 352, 2313}, + /* 2311 : CMOVNL reg64,reg64,rm64 [vrm: evex.nf0.nd1.l0.m4.o64 4d /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(4d) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVNL, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+15423, 352, 2313}, + /* 2312 : CMOVNO reg64,reg64,rm64 [vrm: evex.nf0.nd1.l0.m4.o64 41 /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(41) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVNO, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+15463, 352, 2313}, + /* 2313 : CMOVNS reg64,reg64,rm64 [vrm: evex.nf0.nd1.l0.m4.o64 49 /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(49) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVNS, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+15483, 352, 2313}, + /* 2314 : CMOVNZ reg64,reg64,rm64 [vrm: evex.nf0.nd1.l0.m4.o64 45 /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(45) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVNZ, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+15453, 352, 2313}, + /* 2315 : CMOVO reg64,reg64,rm64 [vrm: evex.nf0.nd1.l0.m4.o64 40 /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(40) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVO, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+15493, 352, 2313}, + /* 2316 : CMOVPE reg64,reg64,rm64 [vrm: evex.nf0.nd1.l0.m4.o64 4a /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(4a) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVPE, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+15503, 352, 2313}, + /* 2317 : CMOVPO reg64,reg64,rm64 [vrm: evex.nf0.nd1.l0.m4.o64 4b /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(4b) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVPO, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+15473, 352, 2313}, + /* 2318 : CMOVS reg64,reg64,rm64 [vrm: evex.nf0.nd1.l0.m4.o64 48 /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(48) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVS, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+15513, 352, 2313}, + /* 2319 : CMOVZ reg64,reg64,rm64 [vrm: evex.nf0.nd1.l0.m4.o64 44 /r ] SM0-2,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 18) 300 324 001(44) 121 : SM0,SM1,SM2,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CMOVZ, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+15403, 352, 2313}, + /* 2320 : CFCMOVA rm16,reg16 [mr: evex.nf1.nd0.l0.m4.o16 47 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 0c) 300 320 001(47) 101 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVA, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+15523, 353, 2314}, + /* 2321 : CFCMOVC rm16,reg16 [mr: evex.nf1.nd0.l0.m4.o16 42 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 0c) 300 320 001(42) 101 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVC, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+15543, 353, 2314}, + /* 2322 : CFCMOVG rm16,reg16 [mr: evex.nf1.nd0.l0.m4.o16 4f /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 0c) 300 320 001(4f) 101 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVG, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+15573, 353, 2314}, + /* 2323 : CFCMOVL rm16,reg16 [mr: evex.nf1.nd0.l0.m4.o16 4c /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 0c) 300 320 001(4c) 101 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVL, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+15593, 353, 2314}, + /* 2324 : CFCMOVNA rm16,reg16 [mr: evex.nf1.nd0.l0.m4.o16 46 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 0c) 300 320 001(46) 101 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNA, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+15553, 353, 2314}, + /* 2325 : CFCMOVNC rm16,reg16 [mr: evex.nf1.nd0.l0.m4.o16 43 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 0c) 300 320 001(43) 101 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNC, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+15533, 353, 2314}, + /* 2326 : CFCMOVNG rm16,reg16 [mr: evex.nf1.nd0.l0.m4.o16 4e /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 0c) 300 320 001(4e) 101 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNG, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+15603, 353, 2314}, + /* 2327 : CFCMOVNL rm16,reg16 [mr: evex.nf1.nd0.l0.m4.o16 4d /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 0c) 300 320 001(4d) 101 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNL, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+15583, 353, 2314}, + /* 2328 : CFCMOVNO rm16,reg16 [mr: evex.nf1.nd0.l0.m4.o16 41 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 0c) 300 320 001(41) 101 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNO, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+15623, 353, 2314}, + /* 2329 : CFCMOVNS rm16,reg16 [mr: evex.nf1.nd0.l0.m4.o16 49 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 0c) 300 320 001(49) 101 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNS, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+15643, 353, 2314}, + /* 2330 : CFCMOVNZ rm16,reg16 [mr: evex.nf1.nd0.l0.m4.o16 45 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 0c) 300 320 001(45) 101 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNZ, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+15613, 353, 2314}, + /* 2331 : CFCMOVO rm16,reg16 [mr: evex.nf1.nd0.l0.m4.o16 40 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 0c) 300 320 001(40) 101 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVO, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+15653, 353, 2314}, + /* 2332 : CFCMOVPE rm16,reg16 [mr: evex.nf1.nd0.l0.m4.o16 4a /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 0c) 300 320 001(4a) 101 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVPE, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+15663, 353, 2314}, + /* 2333 : CFCMOVPO rm16,reg16 [mr: evex.nf1.nd0.l0.m4.o16 4b /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 0c) 300 320 001(4b) 101 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVPO, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+15633, 353, 2314}, + /* 2334 : CFCMOVS rm16,reg16 [mr: evex.nf1.nd0.l0.m4.o16 48 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 0c) 300 320 001(48) 101 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVS, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+15673, 353, 2314}, + /* 2335 : CFCMOVZ rm16,reg16 [mr: evex.nf1.nd0.l0.m4.o16 44 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 0c) 300 320 001(44) 101 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVZ, 2, {RM_GPR|BITS16,REG_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+15563, 353, 2314}, + /* 2336 : CFCMOVA rm32,reg32 [mr: evex.nf1.nd0.l0.m4.o32 47 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 0c) 300 321 001(47) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVA, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+15683, 354, 2315}, + /* 2337 : CFCMOVC rm32,reg32 [mr: evex.nf1.nd0.l0.m4.o32 42 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 0c) 300 321 001(42) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVC, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+15703, 354, 2315}, + /* 2338 : CFCMOVG rm32,reg32 [mr: evex.nf1.nd0.l0.m4.o32 4f /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 0c) 300 321 001(4f) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVG, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+15733, 354, 2315}, + /* 2339 : CFCMOVL rm32,reg32 [mr: evex.nf1.nd0.l0.m4.o32 4c /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 0c) 300 321 001(4c) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVL, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+15753, 354, 2315}, + /* 2340 : CFCMOVNA rm32,reg32 [mr: evex.nf1.nd0.l0.m4.o32 46 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 0c) 300 321 001(46) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNA, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+15713, 354, 2315}, + /* 2341 : CFCMOVNC rm32,reg32 [mr: evex.nf1.nd0.l0.m4.o32 43 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 0c) 300 321 001(43) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNC, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+15693, 354, 2315}, + /* 2342 : CFCMOVNG rm32,reg32 [mr: evex.nf1.nd0.l0.m4.o32 4e /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 0c) 300 321 001(4e) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNG, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+15763, 354, 2315}, + /* 2343 : CFCMOVNL rm32,reg32 [mr: evex.nf1.nd0.l0.m4.o32 4d /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 0c) 300 321 001(4d) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNL, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+15743, 354, 2315}, + /* 2344 : CFCMOVNO rm32,reg32 [mr: evex.nf1.nd0.l0.m4.o32 41 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 0c) 300 321 001(41) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNO, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+15783, 354, 2315}, + /* 2345 : CFCMOVNS rm32,reg32 [mr: evex.nf1.nd0.l0.m4.o32 49 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 0c) 300 321 001(49) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNS, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+15803, 354, 2315}, + /* 2346 : CFCMOVNZ rm32,reg32 [mr: evex.nf1.nd0.l0.m4.o32 45 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 0c) 300 321 001(45) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNZ, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+15773, 354, 2315}, + /* 2347 : CFCMOVO rm32,reg32 [mr: evex.nf1.nd0.l0.m4.o32 40 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 0c) 300 321 001(40) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVO, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+15813, 354, 2315}, + /* 2348 : CFCMOVPE rm32,reg32 [mr: evex.nf1.nd0.l0.m4.o32 4a /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 0c) 300 321 001(4a) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVPE, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+15823, 354, 2315}, + /* 2349 : CFCMOVPO rm32,reg32 [mr: evex.nf1.nd0.l0.m4.o32 4b /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 0c) 300 321 001(4b) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVPO, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+15793, 354, 2315}, + /* 2350 : CFCMOVS rm32,reg32 [mr: evex.nf1.nd0.l0.m4.o32 48 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 0c) 300 321 001(48) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVS, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+15833, 354, 2315}, + /* 2351 : CFCMOVZ rm32,reg32 [mr: evex.nf1.nd0.l0.m4.o32 44 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 0c) 300 321 001(44) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVZ, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+15723, 354, 2315}, + /* 2352 : CFCMOVA rm64,reg64 [mr: evex.nf1.nd0.l0.m4.o64 47 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 0c) 300 324 001(47) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVA, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+15843, 354, 2316}, + /* 2353 : CFCMOVC rm64,reg64 [mr: evex.nf1.nd0.l0.m4.o64 42 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 0c) 300 324 001(42) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVC, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+15863, 354, 2316}, + /* 2354 : CFCMOVG rm64,reg64 [mr: evex.nf1.nd0.l0.m4.o64 4f /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 0c) 300 324 001(4f) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVG, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+15893, 354, 2316}, + /* 2355 : CFCMOVL rm64,reg64 [mr: evex.nf1.nd0.l0.m4.o64 4c /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 0c) 300 324 001(4c) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVL, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+15913, 354, 2316}, + /* 2356 : CFCMOVNA rm64,reg64 [mr: evex.nf1.nd0.l0.m4.o64 46 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 0c) 300 324 001(46) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNA, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+15873, 354, 2316}, + /* 2357 : CFCMOVNC rm64,reg64 [mr: evex.nf1.nd0.l0.m4.o64 43 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 0c) 300 324 001(43) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNC, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+15853, 354, 2316}, + /* 2358 : CFCMOVNG rm64,reg64 [mr: evex.nf1.nd0.l0.m4.o64 4e /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 0c) 300 324 001(4e) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNG, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+15923, 354, 2316}, + /* 2359 : CFCMOVNL rm64,reg64 [mr: evex.nf1.nd0.l0.m4.o64 4d /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 0c) 300 324 001(4d) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNL, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+15903, 354, 2316}, + /* 2360 : CFCMOVNO rm64,reg64 [mr: evex.nf1.nd0.l0.m4.o64 41 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 0c) 300 324 001(41) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNO, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+15943, 354, 2316}, + /* 2361 : CFCMOVNS rm64,reg64 [mr: evex.nf1.nd0.l0.m4.o64 49 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 0c) 300 324 001(49) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNS, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+15963, 354, 2316}, + /* 2362 : CFCMOVNZ rm64,reg64 [mr: evex.nf1.nd0.l0.m4.o64 45 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 0c) 300 324 001(45) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNZ, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+15933, 354, 2316}, + /* 2363 : CFCMOVO rm64,reg64 [mr: evex.nf1.nd0.l0.m4.o64 40 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 0c) 300 324 001(40) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVO, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+15973, 354, 2316}, + /* 2364 : CFCMOVPE rm64,reg64 [mr: evex.nf1.nd0.l0.m4.o64 4a /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 0c) 300 324 001(4a) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVPE, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+15983, 354, 2316}, + /* 2365 : CFCMOVPO rm64,reg64 [mr: evex.nf1.nd0.l0.m4.o64 4b /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 0c) 300 324 001(4b) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVPO, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+15953, 354, 2316}, + /* 2366 : CFCMOVS rm64,reg64 [mr: evex.nf1.nd0.l0.m4.o64 48 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 0c) 300 324 001(48) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVS, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+15993, 354, 2316}, + /* 2367 : CFCMOVZ rm64,reg64 [mr: evex.nf1.nd0.l0.m4.o64 44 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 0c) 300 324 001(44) 101 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVZ, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+15883, 354, 2316}, + /* 2368 : CFCMOVA reg16,rm16 [rm: evex.nf0.nd0.l0.m4.o16 47 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(47) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVA, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16003, 353, 2317}, + /* 2369 : CFCMOVC reg16,rm16 [rm: evex.nf0.nd0.l0.m4.o16 42 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(42) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVC, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16023, 353, 2317}, + /* 2370 : CFCMOVG reg16,rm16 [rm: evex.nf0.nd0.l0.m4.o16 4f /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(4f) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVG, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16053, 353, 2317}, + /* 2371 : CFCMOVL reg16,rm16 [rm: evex.nf0.nd0.l0.m4.o16 4c /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(4c) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVL, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16073, 353, 2317}, + /* 2372 : CFCMOVNA reg16,rm16 [rm: evex.nf0.nd0.l0.m4.o16 46 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(46) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNA, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16033, 353, 2317}, + /* 2373 : CFCMOVNC reg16,rm16 [rm: evex.nf0.nd0.l0.m4.o16 43 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(43) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNC, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16013, 353, 2317}, + /* 2374 : CFCMOVNG reg16,rm16 [rm: evex.nf0.nd0.l0.m4.o16 4e /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(4e) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNG, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16083, 353, 2317}, + /* 2375 : CFCMOVNL reg16,rm16 [rm: evex.nf0.nd0.l0.m4.o16 4d /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(4d) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNL, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16063, 353, 2317}, + /* 2376 : CFCMOVNO reg16,rm16 [rm: evex.nf0.nd0.l0.m4.o16 41 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(41) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNO, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16103, 353, 2317}, + /* 2377 : CFCMOVNS reg16,rm16 [rm: evex.nf0.nd0.l0.m4.o16 49 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(49) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNS, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16123, 353, 2317}, + /* 2378 : CFCMOVNZ reg16,rm16 [rm: evex.nf0.nd0.l0.m4.o16 45 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(45) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNZ, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16093, 353, 2317}, + /* 2379 : CFCMOVO reg16,rm16 [rm: evex.nf0.nd0.l0.m4.o16 40 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(40) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVO, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16133, 353, 2317}, + /* 2380 : CFCMOVPE reg16,rm16 [rm: evex.nf0.nd0.l0.m4.o16 4a /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(4a) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVPE, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16143, 353, 2317}, + /* 2381 : CFCMOVPO reg16,rm16 [rm: evex.nf0.nd0.l0.m4.o16 4b /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(4b) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVPO, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16113, 353, 2317}, + /* 2382 : CFCMOVS reg16,rm16 [rm: evex.nf0.nd0.l0.m4.o16 48 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(48) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVS, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16153, 353, 2317}, + /* 2383 : CFCMOVZ reg16,rm16 [rm: evex.nf0.nd0.l0.m4.o16 44 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(44) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVZ, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16043, 353, 2317}, + /* 2384 : CFCMOVA reg32,rm32 [rm: evex.nf0.nd0.l0.m4.o32 47 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(47) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVA, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+16163, 354, 2318}, + /* 2385 : CFCMOVC reg32,rm32 [rm: evex.nf0.nd0.l0.m4.o32 42 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(42) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVC, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+16183, 354, 2318}, + /* 2386 : CFCMOVG reg32,rm32 [rm: evex.nf0.nd0.l0.m4.o32 4f /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(4f) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVG, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+16213, 354, 2318}, + /* 2387 : CFCMOVL reg32,rm32 [rm: evex.nf0.nd0.l0.m4.o32 4c /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(4c) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVL, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+16233, 354, 2318}, + /* 2388 : CFCMOVNA reg32,rm32 [rm: evex.nf0.nd0.l0.m4.o32 46 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(46) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNA, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+16193, 354, 2318}, + /* 2389 : CFCMOVNC reg32,rm32 [rm: evex.nf0.nd0.l0.m4.o32 43 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(43) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNC, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+16173, 354, 2318}, + /* 2390 : CFCMOVNG reg32,rm32 [rm: evex.nf0.nd0.l0.m4.o32 4e /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(4e) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNG, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+16243, 354, 2318}, + /* 2391 : CFCMOVNL reg32,rm32 [rm: evex.nf0.nd0.l0.m4.o32 4d /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(4d) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNL, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+16223, 354, 2318}, + /* 2392 : CFCMOVNO reg32,rm32 [rm: evex.nf0.nd0.l0.m4.o32 41 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(41) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNO, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+16263, 354, 2318}, + /* 2393 : CFCMOVNS reg32,rm32 [rm: evex.nf0.nd0.l0.m4.o32 49 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(49) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNS, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+16283, 354, 2318}, + /* 2394 : CFCMOVNZ reg32,rm32 [rm: evex.nf0.nd0.l0.m4.o32 45 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(45) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNZ, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+16253, 354, 2318}, + /* 2395 : CFCMOVO reg32,rm32 [rm: evex.nf0.nd0.l0.m4.o32 40 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(40) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVO, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+16293, 354, 2318}, + /* 2396 : CFCMOVPE reg32,rm32 [rm: evex.nf0.nd0.l0.m4.o32 4a /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(4a) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVPE, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+16303, 354, 2318}, + /* 2397 : CFCMOVPO reg32,rm32 [rm: evex.nf0.nd0.l0.m4.o32 4b /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(4b) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVPO, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+16273, 354, 2318}, + /* 2398 : CFCMOVS reg32,rm32 [rm: evex.nf0.nd0.l0.m4.o32 48 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(48) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVS, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+16313, 354, 2318}, + /* 2399 : CFCMOVZ reg32,rm32 [rm: evex.nf0.nd0.l0.m4.o32 44 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(44) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVZ, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+16203, 354, 2318}, + /* 2400 : CFCMOVA reg64,rm64 [rm: evex.nf0.nd0.l0.m4.o64 47 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(47) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVA, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+16323, 354, 2319}, + /* 2401 : CFCMOVC reg64,rm64 [rm: evex.nf0.nd0.l0.m4.o64 42 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(42) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVC, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+16343, 354, 2319}, + /* 2402 : CFCMOVG reg64,rm64 [rm: evex.nf0.nd0.l0.m4.o64 4f /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(4f) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVG, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+16373, 354, 2319}, + /* 2403 : CFCMOVL reg64,rm64 [rm: evex.nf0.nd0.l0.m4.o64 4c /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(4c) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVL, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+16393, 354, 2319}, + /* 2404 : CFCMOVNA reg64,rm64 [rm: evex.nf0.nd0.l0.m4.o64 46 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(46) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNA, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+16353, 354, 2319}, + /* 2405 : CFCMOVNC reg64,rm64 [rm: evex.nf0.nd0.l0.m4.o64 43 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(43) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNC, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+16333, 354, 2319}, + /* 2406 : CFCMOVNG reg64,rm64 [rm: evex.nf0.nd0.l0.m4.o64 4e /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(4e) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNG, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+16403, 354, 2319}, + /* 2407 : CFCMOVNL reg64,rm64 [rm: evex.nf0.nd0.l0.m4.o64 4d /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(4d) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNL, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+16383, 354, 2319}, + /* 2408 : CFCMOVNO reg64,rm64 [rm: evex.nf0.nd0.l0.m4.o64 41 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(41) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNO, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+16423, 354, 2319}, + /* 2409 : CFCMOVNS reg64,rm64 [rm: evex.nf0.nd0.l0.m4.o64 49 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(49) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNS, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+16443, 354, 2319}, + /* 2410 : CFCMOVNZ reg64,rm64 [rm: evex.nf0.nd0.l0.m4.o64 45 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(45) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNZ, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+16413, 354, 2319}, + /* 2411 : CFCMOVO reg64,rm64 [rm: evex.nf0.nd0.l0.m4.o64 40 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(40) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVO, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+16453, 354, 2319}, + /* 2412 : CFCMOVPE reg64,rm64 [rm: evex.nf0.nd0.l0.m4.o64 4a /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(4a) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVPE, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+16463, 354, 2319}, + /* 2413 : CFCMOVPO reg64,rm64 [rm: evex.nf0.nd0.l0.m4.o64 4b /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(4b) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVPO, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+16433, 354, 2319}, + /* 2414 : CFCMOVS reg64,rm64 [rm: evex.nf0.nd0.l0.m4.o64 48 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(48) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVS, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+16473, 354, 2319}, + /* 2415 : CFCMOVZ reg64,rm64 [rm: evex.nf0.nd0.l0.m4.o64 44 /r ] SM0-1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(44) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVZ, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+16363, 354, 2319}, + /* 2416 : CFCMOVA reg16?,reg16,rm16 [vrm: evex.nf1.nd1.l0.m4.o16 47 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 1c) 300 320 001(47) 121 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVA, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+16483, 355, 2320}, + /* 2417 : CFCMOVC reg16?,reg16,rm16 [vrm: evex.nf1.nd1.l0.m4.o16 42 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 1c) 300 320 001(42) 121 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVC, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+16503, 355, 2320}, + /* 2418 : CFCMOVG reg16?,reg16,rm16 [vrm: evex.nf1.nd1.l0.m4.o16 4f /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 1c) 300 320 001(4f) 121 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVG, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+16533, 355, 2320}, + /* 2419 : CFCMOVL reg16?,reg16,rm16 [vrm: evex.nf1.nd1.l0.m4.o16 4c /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 1c) 300 320 001(4c) 121 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVL, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+16553, 355, 2320}, + /* 2420 : CFCMOVNA reg16?,reg16,rm16 [vrm: evex.nf1.nd1.l0.m4.o16 46 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 1c) 300 320 001(46) 121 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNA, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+16513, 355, 2320}, + /* 2421 : CFCMOVNC reg16?,reg16,rm16 [vrm: evex.nf1.nd1.l0.m4.o16 43 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 1c) 300 320 001(43) 121 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNC, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+16493, 355, 2320}, + /* 2422 : CFCMOVNG reg16?,reg16,rm16 [vrm: evex.nf1.nd1.l0.m4.o16 4e /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 1c) 300 320 001(4e) 121 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNG, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+16563, 355, 2320}, + /* 2423 : CFCMOVNL reg16?,reg16,rm16 [vrm: evex.nf1.nd1.l0.m4.o16 4d /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 1c) 300 320 001(4d) 121 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNL, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+16543, 355, 2320}, + /* 2424 : CFCMOVNO reg16?,reg16,rm16 [vrm: evex.nf1.nd1.l0.m4.o16 41 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 1c) 300 320 001(41) 121 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNO, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+16583, 355, 2320}, + /* 2425 : CFCMOVNS reg16?,reg16,rm16 [vrm: evex.nf1.nd1.l0.m4.o16 49 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 1c) 300 320 001(49) 121 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNS, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+16603, 355, 2320}, + /* 2426 : CFCMOVNZ reg16?,reg16,rm16 [vrm: evex.nf1.nd1.l0.m4.o16 45 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 1c) 300 320 001(45) 121 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNZ, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+16573, 355, 2320}, + /* 2427 : CFCMOVO reg16?,reg16,rm16 [vrm: evex.nf1.nd1.l0.m4.o16 40 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 1c) 300 320 001(40) 121 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVO, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+16613, 355, 2320}, + /* 2428 : CFCMOVPE reg16?,reg16,rm16 [vrm: evex.nf1.nd1.l0.m4.o16 4a /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 1c) 300 320 001(4a) 121 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVPE, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+16623, 355, 2320}, + /* 2429 : CFCMOVPO reg16?,reg16,rm16 [vrm: evex.nf1.nd1.l0.m4.o16 4b /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 1c) 300 320 001(4b) 121 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVPO, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+16593, 355, 2320}, + /* 2430 : CFCMOVS reg16?,reg16,rm16 [vrm: evex.nf1.nd1.l0.m4.o16 48 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 1c) 300 320 001(48) 121 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVS, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+16633, 355, 2320}, + /* 2431 : CFCMOVZ reg16?,reg16,rm16 [vrm: evex.nf1.nd1.l0.m4.o16 44 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7d 1c) 300 320 001(44) 121 : SM0,SM1,SM2,ZU,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVZ, 3, {REG_GPR|BITS16,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+16523, 355, 2320}, + /* 2432 : CFCMOVA reg16,rm16 [rm: evex.nf1.nd0.l0.m4.o16 47 /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 0c) 300 320 001(47) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVA, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16643, 353, 2320}, + /* 2433 : CFCMOVC reg16,rm16 [rm: evex.nf1.nd0.l0.m4.o16 42 /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 0c) 300 320 001(42) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVC, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16663, 353, 2320}, + /* 2434 : CFCMOVG reg16,rm16 [rm: evex.nf1.nd0.l0.m4.o16 4f /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 0c) 300 320 001(4f) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVG, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16693, 353, 2320}, + /* 2435 : CFCMOVL reg16,rm16 [rm: evex.nf1.nd0.l0.m4.o16 4c /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 0c) 300 320 001(4c) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVL, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16713, 353, 2320}, + /* 2436 : CFCMOVNA reg16,rm16 [rm: evex.nf1.nd0.l0.m4.o16 46 /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 0c) 300 320 001(46) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNA, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16673, 353, 2320}, + /* 2437 : CFCMOVNC reg16,rm16 [rm: evex.nf1.nd0.l0.m4.o16 43 /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 0c) 300 320 001(43) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNC, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16653, 353, 2320}, + /* 2438 : CFCMOVNG reg16,rm16 [rm: evex.nf1.nd0.l0.m4.o16 4e /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 0c) 300 320 001(4e) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNG, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16723, 353, 2320}, + /* 2439 : CFCMOVNL reg16,rm16 [rm: evex.nf1.nd0.l0.m4.o16 4d /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 0c) 300 320 001(4d) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNL, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16703, 353, 2320}, + /* 2440 : CFCMOVNO reg16,rm16 [rm: evex.nf1.nd0.l0.m4.o16 41 /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 0c) 300 320 001(41) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNO, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16743, 353, 2320}, + /* 2441 : CFCMOVNS reg16,rm16 [rm: evex.nf1.nd0.l0.m4.o16 49 /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 0c) 300 320 001(49) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNS, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16763, 353, 2320}, + /* 2442 : CFCMOVNZ reg16,rm16 [rm: evex.nf1.nd0.l0.m4.o16 45 /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 0c) 300 320 001(45) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNZ, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16733, 353, 2320}, + /* 2443 : CFCMOVO reg16,rm16 [rm: evex.nf1.nd0.l0.m4.o16 40 /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 0c) 300 320 001(40) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVO, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16773, 353, 2320}, + /* 2444 : CFCMOVPE reg16,rm16 [rm: evex.nf1.nd0.l0.m4.o16 4a /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 0c) 300 320 001(4a) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVPE, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16783, 353, 2320}, + /* 2445 : CFCMOVPO reg16,rm16 [rm: evex.nf1.nd0.l0.m4.o16 4b /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 0c) 300 320 001(4b) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVPO, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16753, 353, 2320}, + /* 2446 : CFCMOVS reg16,rm16 [rm: evex.nf1.nd0.l0.m4.o16 48 /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 0c) 300 320 001(48) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVS, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16793, 353, 2320}, + /* 2447 : CFCMOVZ reg16,rm16 [rm: evex.nf1.nd0.l0.m4.o16 44 /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7d 0c) 300 320 001(44) 110 : SM0,SM1,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVZ, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+16683, 353, 2320}, + /* 2448 : CFCMOVA reg32?,reg32,rm32 [vrm: evex.nf1.nd1.l0.m4.o32 47 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 1c) 300 321 001(47) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVA, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+16963, 357, 2321}, + /* 2449 : CFCMOVC reg32?,reg32,rm32 [vrm: evex.nf1.nd1.l0.m4.o32 42 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 1c) 300 321 001(42) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVC, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+16983, 357, 2321}, + /* 2450 : CFCMOVG reg32?,reg32,rm32 [vrm: evex.nf1.nd1.l0.m4.o32 4f /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 1c) 300 321 001(4f) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVG, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+17013, 357, 2321}, + /* 2451 : CFCMOVL reg32?,reg32,rm32 [vrm: evex.nf1.nd1.l0.m4.o32 4c /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 1c) 300 321 001(4c) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVL, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+17033, 357, 2321}, + /* 2452 : CFCMOVNA reg32?,reg32,rm32 [vrm: evex.nf1.nd1.l0.m4.o32 46 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 1c) 300 321 001(46) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNA, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+16993, 357, 2321}, + /* 2453 : CFCMOVNC reg32?,reg32,rm32 [vrm: evex.nf1.nd1.l0.m4.o32 43 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 1c) 300 321 001(43) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNC, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+16973, 357, 2321}, + /* 2454 : CFCMOVNG reg32?,reg32,rm32 [vrm: evex.nf1.nd1.l0.m4.o32 4e /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 1c) 300 321 001(4e) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNG, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+17043, 357, 2321}, + /* 2455 : CFCMOVNL reg32?,reg32,rm32 [vrm: evex.nf1.nd1.l0.m4.o32 4d /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 1c) 300 321 001(4d) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNL, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+17023, 357, 2321}, + /* 2456 : CFCMOVNO reg32?,reg32,rm32 [vrm: evex.nf1.nd1.l0.m4.o32 41 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 1c) 300 321 001(41) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNO, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+17063, 357, 2321}, + /* 2457 : CFCMOVNS reg32?,reg32,rm32 [vrm: evex.nf1.nd1.l0.m4.o32 49 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 1c) 300 321 001(49) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNS, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+17083, 357, 2321}, + /* 2458 : CFCMOVNZ reg32?,reg32,rm32 [vrm: evex.nf1.nd1.l0.m4.o32 45 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 1c) 300 321 001(45) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNZ, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+17053, 357, 2321}, + /* 2459 : CFCMOVO reg32?,reg32,rm32 [vrm: evex.nf1.nd1.l0.m4.o32 40 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 1c) 300 321 001(40) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVO, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+17093, 357, 2321}, + /* 2460 : CFCMOVPE reg32?,reg32,rm32 [vrm: evex.nf1.nd1.l0.m4.o32 4a /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 1c) 300 321 001(4a) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVPE, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+17103, 357, 2321}, + /* 2461 : CFCMOVPO reg32?,reg32,rm32 [vrm: evex.nf1.nd1.l0.m4.o32 4b /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 1c) 300 321 001(4b) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVPO, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+17073, 357, 2321}, + /* 2462 : CFCMOVS reg32?,reg32,rm32 [vrm: evex.nf1.nd1.l0.m4.o32 48 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 1c) 300 321 001(48) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVS, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+17113, 357, 2321}, + /* 2463 : CFCMOVZ reg32?,reg32,rm32 [vrm: evex.nf1.nd1.l0.m4.o32 44 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 7c 1c) 300 321 001(44) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVZ, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+17003, 357, 2321}, + /* 2464 : CFCMOVA reg32,rm32 [rm: evex.nf1.nd0.l0.m4.o32 47 /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 0c) 300 321 001(47) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVA, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17123, 354, 2321}, + /* 2465 : CFCMOVC reg32,rm32 [rm: evex.nf1.nd0.l0.m4.o32 42 /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 0c) 300 321 001(42) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVC, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17143, 354, 2321}, + /* 2466 : CFCMOVG reg32,rm32 [rm: evex.nf1.nd0.l0.m4.o32 4f /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 0c) 300 321 001(4f) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVG, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17173, 354, 2321}, + /* 2467 : CFCMOVL reg32,rm32 [rm: evex.nf1.nd0.l0.m4.o32 4c /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 0c) 300 321 001(4c) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVL, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17193, 354, 2321}, + /* 2468 : CFCMOVNA reg32,rm32 [rm: evex.nf1.nd0.l0.m4.o32 46 /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 0c) 300 321 001(46) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNA, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17153, 354, 2321}, + /* 2469 : CFCMOVNC reg32,rm32 [rm: evex.nf1.nd0.l0.m4.o32 43 /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 0c) 300 321 001(43) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNC, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17133, 354, 2321}, + /* 2470 : CFCMOVNG reg32,rm32 [rm: evex.nf1.nd0.l0.m4.o32 4e /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 0c) 300 321 001(4e) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNG, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17203, 354, 2321}, + /* 2471 : CFCMOVNL reg32,rm32 [rm: evex.nf1.nd0.l0.m4.o32 4d /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 0c) 300 321 001(4d) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNL, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17183, 354, 2321}, + /* 2472 : CFCMOVNO reg32,rm32 [rm: evex.nf1.nd0.l0.m4.o32 41 /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 0c) 300 321 001(41) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNO, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17223, 354, 2321}, + /* 2473 : CFCMOVNS reg32,rm32 [rm: evex.nf1.nd0.l0.m4.o32 49 /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 0c) 300 321 001(49) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNS, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17243, 354, 2321}, + /* 2474 : CFCMOVNZ reg32,rm32 [rm: evex.nf1.nd0.l0.m4.o32 45 /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 0c) 300 321 001(45) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNZ, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17213, 354, 2321}, + /* 2475 : CFCMOVO reg32,rm32 [rm: evex.nf1.nd0.l0.m4.o32 40 /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 0c) 300 321 001(40) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVO, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17253, 354, 2321}, + /* 2476 : CFCMOVPE reg32,rm32 [rm: evex.nf1.nd0.l0.m4.o32 4a /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 0c) 300 321 001(4a) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVPE, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17263, 354, 2321}, + /* 2477 : CFCMOVPO reg32,rm32 [rm: evex.nf1.nd0.l0.m4.o32 4b /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 0c) 300 321 001(4b) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVPO, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17233, 354, 2321}, + /* 2478 : CFCMOVS reg32,rm32 [rm: evex.nf1.nd0.l0.m4.o32 48 /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 0c) 300 321 001(48) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVS, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17273, 354, 2321}, + /* 2479 : CFCMOVZ reg32,rm32 [rm: evex.nf1.nd0.l0.m4.o32 44 /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 7c 0c) 300 321 001(44) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVZ, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17163, 354, 2321}, + /* 2480 : CFCMOVA reg64?,reg64,rm64 [vrm: evex.nf1.nd1.l0.m4.o64 47 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 1c) 300 324 001(47) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVA, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+17443, 357, 2322}, + /* 2481 : CFCMOVC reg64?,reg64,rm64 [vrm: evex.nf1.nd1.l0.m4.o64 42 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 1c) 300 324 001(42) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVC, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+17463, 357, 2322}, + /* 2482 : CFCMOVG reg64?,reg64,rm64 [vrm: evex.nf1.nd1.l0.m4.o64 4f /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 1c) 300 324 001(4f) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVG, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+17493, 357, 2322}, + /* 2483 : CFCMOVL reg64?,reg64,rm64 [vrm: evex.nf1.nd1.l0.m4.o64 4c /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 1c) 300 324 001(4c) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVL, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+17513, 357, 2322}, + /* 2484 : CFCMOVNA reg64?,reg64,rm64 [vrm: evex.nf1.nd1.l0.m4.o64 46 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 1c) 300 324 001(46) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNA, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+17473, 357, 2322}, + /* 2485 : CFCMOVNC reg64?,reg64,rm64 [vrm: evex.nf1.nd1.l0.m4.o64 43 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 1c) 300 324 001(43) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNC, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+17453, 357, 2322}, + /* 2486 : CFCMOVNG reg64?,reg64,rm64 [vrm: evex.nf1.nd1.l0.m4.o64 4e /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 1c) 300 324 001(4e) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNG, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+17523, 357, 2322}, + /* 2487 : CFCMOVNL reg64?,reg64,rm64 [vrm: evex.nf1.nd1.l0.m4.o64 4d /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 1c) 300 324 001(4d) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNL, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+17503, 357, 2322}, + /* 2488 : CFCMOVNO reg64?,reg64,rm64 [vrm: evex.nf1.nd1.l0.m4.o64 41 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 1c) 300 324 001(41) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNO, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+17543, 357, 2322}, + /* 2489 : CFCMOVNS reg64?,reg64,rm64 [vrm: evex.nf1.nd1.l0.m4.o64 49 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 1c) 300 324 001(49) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNS, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+17563, 357, 2322}, + /* 2490 : CFCMOVNZ reg64?,reg64,rm64 [vrm: evex.nf1.nd1.l0.m4.o64 45 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 1c) 300 324 001(45) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNZ, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+17533, 357, 2322}, + /* 2491 : CFCMOVO reg64?,reg64,rm64 [vrm: evex.nf1.nd1.l0.m4.o64 40 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 1c) 300 324 001(40) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVO, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+17573, 357, 2322}, + /* 2492 : CFCMOVPE reg64?,reg64,rm64 [vrm: evex.nf1.nd1.l0.m4.o64 4a /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 1c) 300 324 001(4a) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVPE, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+17583, 357, 2322}, + /* 2493 : CFCMOVPO reg64?,reg64,rm64 [vrm: evex.nf1.nd1.l0.m4.o64 4b /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 1c) 300 324 001(4b) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVPO, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+17553, 357, 2322}, + /* 2494 : CFCMOVS reg64?,reg64,rm64 [vrm: evex.nf1.nd1.l0.m4.o64 48 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 1c) 300 324 001(48) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVS, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+17593, 357, 2322}, + /* 2495 : CFCMOVZ reg64?,reg64,rm64 [vrm: evex.nf1.nd1.l0.m4.o64 44 /r ] SM0,SM1,SM2,ZU,LONG,PROT,APX,X86_64 */ + /* 240(f4 fc 1c) 300 324 001(44) 121 : SM0,SM1,SM2,ZU,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVZ, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+17483, 357, 2322}, + /* 2496 : CFCMOVA reg64,rm64 [rm: evex.nf1.nd0.l0.m4.o64 47 /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 0c) 300 324 001(47) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVA, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17603, 354, 2322}, + /* 2497 : CFCMOVC reg64,rm64 [rm: evex.nf1.nd0.l0.m4.o64 42 /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 0c) 300 324 001(42) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVC, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17623, 354, 2322}, + /* 2498 : CFCMOVG reg64,rm64 [rm: evex.nf1.nd0.l0.m4.o64 4f /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 0c) 300 324 001(4f) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVG, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17653, 354, 2322}, + /* 2499 : CFCMOVL reg64,rm64 [rm: evex.nf1.nd0.l0.m4.o64 4c /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 0c) 300 324 001(4c) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVL, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17673, 354, 2322}, + /* 2500 : CFCMOVNA reg64,rm64 [rm: evex.nf1.nd0.l0.m4.o64 46 /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 0c) 300 324 001(46) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNA, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17633, 354, 2322}, + /* 2501 : CFCMOVNC reg64,rm64 [rm: evex.nf1.nd0.l0.m4.o64 43 /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 0c) 300 324 001(43) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNC, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17613, 354, 2322}, + /* 2502 : CFCMOVNG reg64,rm64 [rm: evex.nf1.nd0.l0.m4.o64 4e /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 0c) 300 324 001(4e) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNG, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17683, 354, 2322}, + /* 2503 : CFCMOVNL reg64,rm64 [rm: evex.nf1.nd0.l0.m4.o64 4d /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 0c) 300 324 001(4d) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNL, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17663, 354, 2322}, + /* 2504 : CFCMOVNO reg64,rm64 [rm: evex.nf1.nd0.l0.m4.o64 41 /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 0c) 300 324 001(41) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNO, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17703, 354, 2322}, + /* 2505 : CFCMOVNS reg64,rm64 [rm: evex.nf1.nd0.l0.m4.o64 49 /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 0c) 300 324 001(49) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNS, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17723, 354, 2322}, + /* 2506 : CFCMOVNZ reg64,rm64 [rm: evex.nf1.nd0.l0.m4.o64 45 /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 0c) 300 324 001(45) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVNZ, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17693, 354, 2322}, + /* 2507 : CFCMOVO reg64,rm64 [rm: evex.nf1.nd0.l0.m4.o64 40 /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 0c) 300 324 001(40) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVO, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17733, 354, 2322}, + /* 2508 : CFCMOVPE reg64,rm64 [rm: evex.nf1.nd0.l0.m4.o64 4a /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 0c) 300 324 001(4a) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVPE, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17743, 354, 2322}, + /* 2509 : CFCMOVPO reg64,rm64 [rm: evex.nf1.nd0.l0.m4.o64 4b /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 0c) 300 324 001(4b) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVPO, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17713, 354, 2322}, + /* 2510 : CFCMOVS reg64,rm64 [rm: evex.nf1.nd0.l0.m4.o64 48 /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 0c) 300 324 001(48) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVS, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17753, 354, 2322}, + /* 2511 : CFCMOVZ reg64,rm64 [rm: evex.nf1.nd0.l0.m4.o64 44 /r ] SM0,SM1,LONG,PROT,APX,X86_64 */ + /* 250(f4 fc 0c) 300 324 001(44) 110 : SM0,SM1,WW,LONG,EVEX,PROT,APX,X86_64 */ + {I_CFCMOVZ, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17643, 354, 2322}, + /* 2512 : SETA rm8 [m: 0f 97 /0 ] AR0,SB,386 */ + /* 355 001(97) 200 : AR0,SB,386 */ + {I_SETA, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72374, 359, 2324}, + /* 2513 : SETC rm8 [m: 0f 92 /0 ] AR0,SB,386 */ + /* 355 001(92) 200 : AR0,SB,386 */ + {I_SETC, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72384, 359, 2324}, + /* 2514 : SETG rm8 [m: 0f 9f /0 ] AR0,SB,386 */ + /* 355 001(9f) 200 : AR0,SB,386 */ + {I_SETG, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72399, 359, 2324}, + /* 2515 : SETL rm8 [m: 0f 9c /0 ] AR0,SB,386 */ + /* 355 001(9c) 200 : AR0,SB,386 */ + {I_SETL, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72409, 359, 2324}, + /* 2516 : SETNA rm8 [m: 0f 96 /0 ] AR0,SB,386 */ + /* 355 001(96) 200 : AR0,SB,386 */ + {I_SETNA, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72389, 359, 2324}, + /* 2517 : SETNC rm8 [m: 0f 93 /0 ] AR0,SB,386 */ + /* 355 001(93) 200 : AR0,SB,386 */ + {I_SETNC, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72379, 359, 2324}, + /* 2518 : SETNG rm8 [m: 0f 9e /0 ] AR0,SB,386 */ + /* 355 001(9e) 200 : AR0,SB,386 */ + {I_SETNG, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72414, 359, 2324}, + /* 2519 : SETNL rm8 [m: 0f 9d /0 ] AR0,SB,386 */ + /* 355 001(9d) 200 : AR0,SB,386 */ + {I_SETNL, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72404, 359, 2324}, + /* 2520 : SETNO rm8 [m: 0f 91 /0 ] AR0,SB,386 */ + /* 355 001(91) 200 : AR0,SB,386 */ + {I_SETNO, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72424, 359, 2324}, + /* 2521 : SETNS rm8 [m: 0f 99 /0 ] AR0,SB,386 */ + /* 355 001(99) 200 : AR0,SB,386 */ + {I_SETNS, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72434, 359, 2324}, + /* 2522 : SETNZ rm8 [m: 0f 95 /0 ] AR0,SB,386 */ + /* 355 001(95) 200 : AR0,SB,386 */ + {I_SETNZ, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72419, 359, 2324}, + /* 2523 : SETO rm8 [m: 0f 90 /0 ] AR0,SB,386 */ + /* 355 001(90) 200 : AR0,SB,386 */ + {I_SETO, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72439, 359, 2324}, + /* 2524 : SETPE rm8 [m: 0f 9a /0 ] AR0,SB,386 */ + /* 355 001(9a) 200 : AR0,SB,386 */ + {I_SETPE, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72444, 359, 2324}, + /* 2525 : SETPO rm8 [m: 0f 9b /0 ] AR0,SB,386 */ + /* 355 001(9b) 200 : AR0,SB,386 */ + {I_SETPO, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72429, 359, 2324}, + /* 2526 : SETS rm8 [m: 0f 98 /0 ] AR0,SB,386 */ + /* 355 001(98) 200 : AR0,SB,386 */ + {I_SETS, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72449, 359, 2324}, + /* 2527 : SETZ rm8 [m: 0f 94 /0 ] AR0,SB,386 */ + /* 355 001(94) 200 : AR0,SB,386 */ + {I_SETZ, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72394, 359, 2324}, + /* 2528 : SETA reg64 [m: evex.nd1.l0.f2.m4.wig 47 /0 ] ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(47) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETA, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25141, 360, 2325}, + /* 2529 : SETC reg64 [m: evex.nd1.l0.f2.m4.wig 42 /0 ] ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(42) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETC, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25159, 360, 2325}, + /* 2530 : SETG reg64 [m: evex.nd1.l0.f2.m4.wig 4f /0 ] ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(4f) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETG, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25186, 360, 2325}, + /* 2531 : SETL reg64 [m: evex.nd1.l0.f2.m4.wig 4c /0 ] ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(4c) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETL, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25204, 360, 2325}, + /* 2532 : SETNA reg64 [m: evex.nd1.l0.f2.m4.wig 46 /0 ] ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(46) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNA, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25168, 360, 2325}, + /* 2533 : SETNC reg64 [m: evex.nd1.l0.f2.m4.wig 43 /0 ] ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(43) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNC, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25150, 360, 2325}, + /* 2534 : SETNG reg64 [m: evex.nd1.l0.f2.m4.wig 4e /0 ] ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(4e) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNG, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25213, 360, 2325}, + /* 2535 : SETNL reg64 [m: evex.nd1.l0.f2.m4.wig 4d /0 ] ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(4d) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNL, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25195, 360, 2325}, + /* 2536 : SETNO reg64 [m: evex.nd1.l0.f2.m4.wig 41 /0 ] ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(41) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNO, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25231, 360, 2325}, + /* 2537 : SETNS reg64 [m: evex.nd1.l0.f2.m4.wig 49 /0 ] ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(49) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNS, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25249, 360, 2325}, + /* 2538 : SETNZ reg64 [m: evex.nd1.l0.f2.m4.wig 45 /0 ] ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(45) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNZ, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25222, 360, 2325}, + /* 2539 : SETO reg64 [m: evex.nd1.l0.f2.m4.wig 40 /0 ] ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(40) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETO, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25258, 360, 2325}, + /* 2540 : SETPE reg64 [m: evex.nd1.l0.f2.m4.wig 4a /0 ] ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(4a) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETPE, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25267, 360, 2325}, + /* 2541 : SETPO reg64 [m: evex.nd1.l0.f2.m4.wig 4b /0 ] ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(4b) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETPO, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25240, 360, 2325}, + /* 2542 : SETS reg64 [m: evex.nd1.l0.f2.m4.wig 48 /0 ] ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(48) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETS, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25276, 360, 2325}, + /* 2543 : SETZ reg64 [m: evex.nd1.l0.f2.m4.wig 44 /0 ] ZU,LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 18) 300 001(44) 200 : ZU,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETZ, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25177, 360, 2325}, + /* 2544 : SETA rm8 [m: evex.zu.l0.f2.m4.wig 47 /0 ] LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 08) 300 001(47) 200 : ZU,ZU_E,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETA, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25285, 361, 2329}, + /* 2545 : SETC rm8 [m: evex.zu.l0.f2.m4.wig 42 /0 ] LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 08) 300 001(42) 200 : ZU,ZU_E,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETC, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25303, 361, 2329}, + /* 2546 : SETG rm8 [m: evex.zu.l0.f2.m4.wig 4f /0 ] LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 08) 300 001(4f) 200 : ZU,ZU_E,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETG, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25330, 361, 2329}, + /* 2547 : SETL rm8 [m: evex.zu.l0.f2.m4.wig 4c /0 ] LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 08) 300 001(4c) 200 : ZU,ZU_E,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETL, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25348, 361, 2329}, + /* 2548 : SETNA rm8 [m: evex.zu.l0.f2.m4.wig 46 /0 ] LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 08) 300 001(46) 200 : ZU,ZU_E,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNA, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25312, 361, 2329}, + /* 2549 : SETNC rm8 [m: evex.zu.l0.f2.m4.wig 43 /0 ] LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 08) 300 001(43) 200 : ZU,ZU_E,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNC, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25294, 361, 2329}, + /* 2550 : SETNG rm8 [m: evex.zu.l0.f2.m4.wig 4e /0 ] LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 08) 300 001(4e) 200 : ZU,ZU_E,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNG, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25357, 361, 2329}, + /* 2551 : SETNL rm8 [m: evex.zu.l0.f2.m4.wig 4d /0 ] LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 08) 300 001(4d) 200 : ZU,ZU_E,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNL, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25339, 361, 2329}, + /* 2552 : SETNO rm8 [m: evex.zu.l0.f2.m4.wig 41 /0 ] LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 08) 300 001(41) 200 : ZU,ZU_E,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNO, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25375, 361, 2329}, + /* 2553 : SETNS rm8 [m: evex.zu.l0.f2.m4.wig 49 /0 ] LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 08) 300 001(49) 200 : ZU,ZU_E,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNS, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25393, 361, 2329}, + /* 2554 : SETNZ rm8 [m: evex.zu.l0.f2.m4.wig 45 /0 ] LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 08) 300 001(45) 200 : ZU,ZU_E,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETNZ, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25366, 361, 2329}, + /* 2555 : SETO rm8 [m: evex.zu.l0.f2.m4.wig 40 /0 ] LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 08) 300 001(40) 200 : ZU,ZU_E,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETO, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25402, 361, 2329}, + /* 2556 : SETPE rm8 [m: evex.zu.l0.f2.m4.wig 4a /0 ] LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 08) 300 001(4a) 200 : ZU,ZU_E,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETPE, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25411, 361, 2329}, + /* 2557 : SETPO rm8 [m: evex.zu.l0.f2.m4.wig 4b /0 ] LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 08) 300 001(4b) 200 : ZU,ZU_E,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETPO, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25384, 361, 2329}, + /* 2558 : SETS rm8 [m: evex.zu.l0.f2.m4.wig 48 /0 ] LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 08) 300 001(48) 200 : ZU,ZU_E,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETS, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25420, 361, 2329}, + /* 2559 : SETZ rm8 [m: evex.zu.l0.f2.m4.wig 44 /0 ] LONG,PROT,APX,X86_64 */ + /* 250(f4 7f 08) 300 001(44) 200 : ZU,ZU_E,WIG,LONG,EVEX,PROT,APX,X86_64 */ + {I_SETZ, 1, {RM_GPR|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+25321, 361, 2329}, + /* 2560 : CMPAXADD mem32,reg32,reg32 [mrv: vex.128.66.0f38.w0 e7 /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64 */ + /* 262(002 001) 001(e7) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPAXADD, 3, {MEMORY|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57581, 362, 2332}, + /* 2561 : CMPCXADD mem32,reg32,reg32 [mrv: vex.128.66.0f38.w0 e2 /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64 */ + /* 262(002 001) 001(e2) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPCXADD, 3, {MEMORY|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57595, 362, 2332}, + /* 2562 : CMPGXADD mem32,reg32,reg32 [mrv: vex.128.66.0f38.w0 ef /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64 */ + /* 262(002 001) 001(ef) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPGXADD, 3, {MEMORY|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57616, 362, 2332}, + /* 2563 : CMPLXADD mem32,reg32,reg32 [mrv: vex.128.66.0f38.w0 ec /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64 */ + /* 262(002 001) 001(ec) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPLXADD, 3, {MEMORY|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57630, 362, 2332}, + /* 2564 : CMPNAXADD mem32,reg32,reg32 [mrv: vex.128.66.0f38.w0 e6 /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64 */ + /* 262(002 001) 001(e6) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPNAXADD, 3, {MEMORY|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57602, 362, 2332}, + /* 2565 : CMPNCXADD mem32,reg32,reg32 [mrv: vex.128.66.0f38.w0 e3 /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64 */ + /* 262(002 001) 001(e3) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPNCXADD, 3, {MEMORY|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57588, 362, 2332}, + /* 2566 : CMPNGXADD mem32,reg32,reg32 [mrv: vex.128.66.0f38.w0 ee /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64 */ + /* 262(002 001) 001(ee) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPNGXADD, 3, {MEMORY|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57637, 362, 2332}, + /* 2567 : CMPNLXADD mem32,reg32,reg32 [mrv: vex.128.66.0f38.w0 ed /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64 */ + /* 262(002 001) 001(ed) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPNLXADD, 3, {MEMORY|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57623, 362, 2332}, + /* 2568 : CMPNOXADD mem32,reg32,reg32 [mrv: vex.128.66.0f38.w0 e1 /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64 */ + /* 262(002 001) 001(e1) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPNOXADD, 3, {MEMORY|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57651, 362, 2332}, + /* 2569 : CMPNSXADD mem32,reg32,reg32 [mrv: vex.128.66.0f38.w0 e9 /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64 */ + /* 262(002 001) 001(e9) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPNSXADD, 3, {MEMORY|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57665, 362, 2332}, + /* 2570 : CMPNZXADD mem32,reg32,reg32 [mrv: vex.128.66.0f38.w0 e5 /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64 */ + /* 262(002 001) 001(e5) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPNZXADD, 3, {MEMORY|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57644, 362, 2332}, + /* 2571 : CMPOXADD mem32,reg32,reg32 [mrv: vex.128.66.0f38.w0 e0 /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64 */ + /* 262(002 001) 001(e0) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPOXADD, 3, {MEMORY|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57672, 362, 2332}, + /* 2572 : CMPPEXADD mem32,reg32,reg32 [mrv: vex.128.66.0f38.w0 ea /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64 */ + /* 262(002 001) 001(ea) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPPEXADD, 3, {MEMORY|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57679, 362, 2332}, + /* 2573 : CMPPOXADD mem32,reg32,reg32 [mrv: vex.128.66.0f38.w0 eb /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64 */ + /* 262(002 001) 001(eb) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPPOXADD, 3, {MEMORY|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57658, 362, 2332}, + /* 2574 : CMPSXADD mem32,reg32,reg32 [mrv: vex.128.66.0f38.w0 e8 /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64 */ + /* 262(002 001) 001(e8) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPSXADD, 3, {MEMORY|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57686, 362, 2332}, + /* 2575 : CMPZXADD mem32,reg32,reg32 [mrv: vex.128.66.0f38.w0 e4 /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64 */ + /* 262(002 001) 001(e4) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPZXADD, 3, {MEMORY|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57609, 362, 2332}, + /* 2576 : CMPAXADD mem64,reg64,reg64 [mrv: vex.128.66.0f38.w1 e7 /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64 */ + /* 262(002 201) 001(e7) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPAXADD, 3, {MEMORY|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57693, 362, 2333}, + /* 2577 : CMPCXADD mem64,reg64,reg64 [mrv: vex.128.66.0f38.w1 e2 /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64 */ + /* 262(002 201) 001(e2) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPCXADD, 3, {MEMORY|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57707, 362, 2333}, + /* 2578 : CMPGXADD mem64,reg64,reg64 [mrv: vex.128.66.0f38.w1 ef /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64 */ + /* 262(002 201) 001(ef) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPGXADD, 3, {MEMORY|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57728, 362, 2333}, + /* 2579 : CMPLXADD mem64,reg64,reg64 [mrv: vex.128.66.0f38.w1 ec /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64 */ + /* 262(002 201) 001(ec) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPLXADD, 3, {MEMORY|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57742, 362, 2333}, + /* 2580 : CMPNAXADD mem64,reg64,reg64 [mrv: vex.128.66.0f38.w1 e6 /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64 */ + /* 262(002 201) 001(e6) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPNAXADD, 3, {MEMORY|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57714, 362, 2333}, + /* 2581 : CMPNCXADD mem64,reg64,reg64 [mrv: vex.128.66.0f38.w1 e3 /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64 */ + /* 262(002 201) 001(e3) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPNCXADD, 3, {MEMORY|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57700, 362, 2333}, + /* 2582 : CMPNGXADD mem64,reg64,reg64 [mrv: vex.128.66.0f38.w1 ee /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64 */ + /* 262(002 201) 001(ee) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPNGXADD, 3, {MEMORY|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57749, 362, 2333}, + /* 2583 : CMPNLXADD mem64,reg64,reg64 [mrv: vex.128.66.0f38.w1 ed /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64 */ + /* 262(002 201) 001(ed) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPNLXADD, 3, {MEMORY|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57735, 362, 2333}, + /* 2584 : CMPNOXADD mem64,reg64,reg64 [mrv: vex.128.66.0f38.w1 e1 /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64 */ + /* 262(002 201) 001(e1) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPNOXADD, 3, {MEMORY|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57763, 362, 2333}, + /* 2585 : CMPNSXADD mem64,reg64,reg64 [mrv: vex.128.66.0f38.w1 e9 /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64 */ + /* 262(002 201) 001(e9) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPNSXADD, 3, {MEMORY|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57777, 362, 2333}, + /* 2586 : CMPNZXADD mem64,reg64,reg64 [mrv: vex.128.66.0f38.w1 e5 /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64 */ + /* 262(002 201) 001(e5) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPNZXADD, 3, {MEMORY|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57756, 362, 2333}, + /* 2587 : CMPOXADD mem64,reg64,reg64 [mrv: vex.128.66.0f38.w1 e0 /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64 */ + /* 262(002 201) 001(e0) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPOXADD, 3, {MEMORY|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57784, 362, 2333}, + /* 2588 : CMPPEXADD mem64,reg64,reg64 [mrv: vex.128.66.0f38.w1 ea /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64 */ + /* 262(002 201) 001(ea) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPPEXADD, 3, {MEMORY|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57791, 362, 2333}, + /* 2589 : CMPPOXADD mem64,reg64,reg64 [mrv: vex.128.66.0f38.w1 eb /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64 */ + /* 262(002 201) 001(eb) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPPOXADD, 3, {MEMORY|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57770, 362, 2333}, + /* 2590 : CMPSXADD mem64,reg64,reg64 [mrv: vex.128.66.0f38.w1 e8 /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64 */ + /* 262(002 201) 001(e8) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPSXADD, 3, {MEMORY|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57798, 362, 2333}, + /* 2591 : CMPZXADD mem64,reg64,reg64 [mrv: vex.128.66.0f38.w1 e4 /r ] SM0-2,LONG,PROT,CMPCCXADD,X86_64 */ + /* 262(002 201) 001(e4) 101 : SM0,SM1,SM2,NOAPX,LONG,VEX,PROT,CMPCCXADD,X86_64 */ + {I_CMPZXADD, 3, {MEMORY|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+57721, 362, 2333}, + /* 2592 : CMPAXADD mem32,reg32,reg32 [mrv: evex.nf0.128.66.0f38.w0 e7 /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64 */ + /* 242(f2 7d 08) 300 001(e7) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPAXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+25429, 363, 2334}, + /* 2593 : CMPCXADD mem32,reg32,reg32 [mrv: evex.nf0.128.66.0f38.w0 e2 /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64 */ + /* 242(f2 7d 08) 300 001(e2) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPCXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+25447, 363, 2334}, + /* 2594 : CMPGXADD mem32,reg32,reg32 [mrv: evex.nf0.128.66.0f38.w0 ef /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64 */ + /* 242(f2 7d 08) 300 001(ef) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPGXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+25474, 363, 2334}, + /* 2595 : CMPLXADD mem32,reg32,reg32 [mrv: evex.nf0.128.66.0f38.w0 ec /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64 */ + /* 242(f2 7d 08) 300 001(ec) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPLXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+25492, 363, 2334}, + /* 2596 : CMPNAXADD mem32,reg32,reg32 [mrv: evex.nf0.128.66.0f38.w0 e6 /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64 */ + /* 242(f2 7d 08) 300 001(e6) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPNAXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+25456, 363, 2334}, + /* 2597 : CMPNCXADD mem32,reg32,reg32 [mrv: evex.nf0.128.66.0f38.w0 e3 /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64 */ + /* 242(f2 7d 08) 300 001(e3) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPNCXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+25438, 363, 2334}, + /* 2598 : CMPNGXADD mem32,reg32,reg32 [mrv: evex.nf0.128.66.0f38.w0 ee /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64 */ + /* 242(f2 7d 08) 300 001(ee) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPNGXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+25501, 363, 2334}, + /* 2599 : CMPNLXADD mem32,reg32,reg32 [mrv: evex.nf0.128.66.0f38.w0 ed /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64 */ + /* 242(f2 7d 08) 300 001(ed) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPNLXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+25483, 363, 2334}, + /* 2600 : CMPNOXADD mem32,reg32,reg32 [mrv: evex.nf0.128.66.0f38.w0 e1 /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64 */ + /* 242(f2 7d 08) 300 001(e1) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPNOXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+25519, 363, 2334}, + /* 2601 : CMPNSXADD mem32,reg32,reg32 [mrv: evex.nf0.128.66.0f38.w0 e9 /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64 */ + /* 242(f2 7d 08) 300 001(e9) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPNSXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+25537, 363, 2334}, + /* 2602 : CMPNZXADD mem32,reg32,reg32 [mrv: evex.nf0.128.66.0f38.w0 e5 /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64 */ + /* 242(f2 7d 08) 300 001(e5) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPNZXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+25510, 363, 2334}, + /* 2603 : CMPOXADD mem32,reg32,reg32 [mrv: evex.nf0.128.66.0f38.w0 e0 /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64 */ + /* 242(f2 7d 08) 300 001(e0) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPOXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+25546, 363, 2334}, + /* 2604 : CMPPEXADD mem32,reg32,reg32 [mrv: evex.nf0.128.66.0f38.w0 ea /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64 */ + /* 242(f2 7d 08) 300 001(ea) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPPEXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+25555, 363, 2334}, + /* 2605 : CMPPOXADD mem32,reg32,reg32 [mrv: evex.nf0.128.66.0f38.w0 eb /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64 */ + /* 242(f2 7d 08) 300 001(eb) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPPOXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+25528, 363, 2334}, + /* 2606 : CMPSXADD mem32,reg32,reg32 [mrv: evex.nf0.128.66.0f38.w0 e8 /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64 */ + /* 242(f2 7d 08) 300 001(e8) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPSXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+25564, 363, 2334}, + /* 2607 : CMPZXADD mem32,reg32,reg32 [mrv: evex.nf0.128.66.0f38.w0 e4 /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64 */ + /* 242(f2 7d 08) 300 001(e4) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPZXADD, 3, {MEMORY|BITS32,REG_GPR|BITS32,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+25465, 363, 2334}, + /* 2608 : CMPAXADD mem64,reg64,reg64 [mrv: evex.nf0.128.66.0f38.w1 e7 /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64 */ + /* 242(f2 fd 08) 300 001(e7) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPAXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+25573, 363, 2335}, + /* 2609 : CMPCXADD mem64,reg64,reg64 [mrv: evex.nf0.128.66.0f38.w1 e2 /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64 */ + /* 242(f2 fd 08) 300 001(e2) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPCXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+25591, 363, 2335}, + /* 2610 : CMPGXADD mem64,reg64,reg64 [mrv: evex.nf0.128.66.0f38.w1 ef /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64 */ + /* 242(f2 fd 08) 300 001(ef) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPGXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+25618, 363, 2335}, + /* 2611 : CMPLXADD mem64,reg64,reg64 [mrv: evex.nf0.128.66.0f38.w1 ec /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64 */ + /* 242(f2 fd 08) 300 001(ec) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPLXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+25636, 363, 2335}, + /* 2612 : CMPNAXADD mem64,reg64,reg64 [mrv: evex.nf0.128.66.0f38.w1 e6 /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64 */ + /* 242(f2 fd 08) 300 001(e6) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPNAXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+25600, 363, 2335}, + /* 2613 : CMPNCXADD mem64,reg64,reg64 [mrv: evex.nf0.128.66.0f38.w1 e3 /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64 */ + /* 242(f2 fd 08) 300 001(e3) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPNCXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+25582, 363, 2335}, + /* 2614 : CMPNGXADD mem64,reg64,reg64 [mrv: evex.nf0.128.66.0f38.w1 ee /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64 */ + /* 242(f2 fd 08) 300 001(ee) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPNGXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+25645, 363, 2335}, + /* 2615 : CMPNLXADD mem64,reg64,reg64 [mrv: evex.nf0.128.66.0f38.w1 ed /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64 */ + /* 242(f2 fd 08) 300 001(ed) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPNLXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+25627, 363, 2335}, + /* 2616 : CMPNOXADD mem64,reg64,reg64 [mrv: evex.nf0.128.66.0f38.w1 e1 /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64 */ + /* 242(f2 fd 08) 300 001(e1) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPNOXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+25663, 363, 2335}, + /* 2617 : CMPNSXADD mem64,reg64,reg64 [mrv: evex.nf0.128.66.0f38.w1 e9 /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64 */ + /* 242(f2 fd 08) 300 001(e9) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPNSXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+25681, 363, 2335}, + /* 2618 : CMPNZXADD mem64,reg64,reg64 [mrv: evex.nf0.128.66.0f38.w1 e5 /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64 */ + /* 242(f2 fd 08) 300 001(e5) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPNZXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+25654, 363, 2335}, + /* 2619 : CMPOXADD mem64,reg64,reg64 [mrv: evex.nf0.128.66.0f38.w1 e0 /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64 */ + /* 242(f2 fd 08) 300 001(e0) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPOXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+25690, 363, 2335}, + /* 2620 : CMPPEXADD mem64,reg64,reg64 [mrv: evex.nf0.128.66.0f38.w1 ea /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64 */ + /* 242(f2 fd 08) 300 001(ea) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPPEXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+25699, 363, 2335}, + /* 2621 : CMPPOXADD mem64,reg64,reg64 [mrv: evex.nf0.128.66.0f38.w1 eb /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64 */ + /* 242(f2 fd 08) 300 001(eb) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPPOXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+25672, 363, 2335}, + /* 2622 : CMPSXADD mem64,reg64,reg64 [mrv: evex.nf0.128.66.0f38.w1 e8 /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64 */ + /* 242(f2 fd 08) 300 001(e8) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPSXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+25708, 363, 2335}, + /* 2623 : CMPZXADD mem64,reg64,reg64 [mrv: evex.nf0.128.66.0f38.w1 e4 /r ] SM0-2,LONG,PROT,CMPCCXADD,APX,X86_64 */ + /* 242(f2 fd 08) 300 001(e4) 101 : SM0,SM1,SM2,LONG,EVEX,PROT,CMPCCXADD,APX,X86_64 */ + {I_CMPZXADD, 3, {MEMORY|BITS64,REG_GPR|BITS64,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+25609, 363, 2335}, + /* 2624 : ADDPS xmmreg,xmmrm128 [rm: np 0f 58 /r ] SSE,KATMAI */ + /* 360 355 001(58) 110 : SSE,KATMAI */ + {I_ADDPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+68355, 364, 2338}, + /* 2625 : ADDSS xmmreg,xmmrm32 [rm: f3 0f 58 /r ] SSE,KATMAI */ + /* 333 355 001(58) 110 : SSE,KATMAI */ + {I_ADDSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68361, 364, 2339}, + /* 2626 : ANDNPS xmmreg,xmmrm128 [rm: np 0f 55 /r ] SSE,KATMAI */ + /* 360 355 001(55) 110 : SSE,KATMAI */ + {I_ANDNPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+68367, 364, 2340}, + /* 2627 : ANDPS xmmreg,xmmrm128 [rm: np 0f 54 /r ] SSE,KATMAI */ + /* 360 355 001(54) 110 : SSE,KATMAI */ + {I_ANDPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+68373, 364, 2341}, + /* 2628 : CMPEQPS xmmreg,xmmrm128 [rm: np 0f c2 /r 00 ] SSE,KATMAI */ + /* 360 355 001(c2) 110 001(00) : SSE,KATMAI */ + {I_CMPEQPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+51403, 364, 2342}, + /* 2629 : CMPEQSS xmmreg,xmmrm32 [rm: f3 0f c2 /r 00 ] SSE,KATMAI */ + /* 333 355 001(c2) 110 001(00) : SSE,KATMAI */ + {I_CMPEQSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+51411, 364, 2343}, + /* 2630 : CMPLEPS xmmreg,xmmrm128 [rm: np 0f c2 /r 02 ] SSE,KATMAI */ + /* 360 355 001(c2) 110 001(02) : SSE,KATMAI */ + {I_CMPLEPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+51419, 364, 2344}, + /* 2631 : CMPLESS xmmreg,xmmrm32 [rm: f3 0f c2 /r 02 ] SSE,KATMAI */ + /* 333 355 001(c2) 110 001(02) : SSE,KATMAI */ + {I_CMPLESS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+51427, 364, 2345}, + /* 2632 : CMPLTPS xmmreg,xmmrm128 [rm: np 0f c2 /r 01 ] SSE,KATMAI */ + /* 360 355 001(c2) 110 001(01) : SSE,KATMAI */ + {I_CMPLTPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+51435, 364, 2346}, + /* 2633 : CMPLTSS xmmreg,xmmrm32 [rm: f3 0f c2 /r 01 ] SSE,KATMAI */ + /* 333 355 001(c2) 110 001(01) : SSE,KATMAI */ + {I_CMPLTSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+51443, 364, 2347}, + /* 2634 : CMPNEQPS xmmreg,xmmrm128 [rm: np 0f c2 /r 04 ] SSE,KATMAI */ + /* 360 355 001(c2) 110 001(04) : SSE,KATMAI */ + {I_CMPNEQPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+51451, 364, 2348}, + /* 2635 : CMPNEQSS xmmreg,xmmrm32 [rm: f3 0f c2 /r 04 ] SSE,KATMAI */ + /* 333 355 001(c2) 110 001(04) : SSE,KATMAI */ + {I_CMPNEQSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+51459, 364, 2349}, + /* 2636 : CMPNLEPS xmmreg,xmmrm128 [rm: np 0f c2 /r 06 ] SSE,KATMAI */ + /* 360 355 001(c2) 110 001(06) : SSE,KATMAI */ + {I_CMPNLEPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+51467, 364, 2350}, + /* 2637 : CMPNLESS xmmreg,xmmrm32 [rm: f3 0f c2 /r 06 ] SSE,KATMAI */ + /* 333 355 001(c2) 110 001(06) : SSE,KATMAI */ + {I_CMPNLESS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+51475, 364, 2351}, + /* 2638 : CMPNLTPS xmmreg,xmmrm128 [rm: np 0f c2 /r 05 ] SSE,KATMAI */ + /* 360 355 001(c2) 110 001(05) : SSE,KATMAI */ + {I_CMPNLTPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+51483, 364, 2352}, + /* 2639 : CMPNLTSS xmmreg,xmmrm32 [rm: f3 0f c2 /r 05 ] SSE,KATMAI */ + /* 333 355 001(c2) 110 001(05) : SSE,KATMAI */ + {I_CMPNLTSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+51491, 364, 2353}, + /* 2640 : CMPORDPS xmmreg,xmmrm128 [rm: np 0f c2 /r 07 ] SSE,KATMAI */ + /* 360 355 001(c2) 110 001(07) : SSE,KATMAI */ + {I_CMPORDPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+51499, 364, 2354}, + /* 2641 : CMPORDSS xmmreg,xmmrm32 [rm: f3 0f c2 /r 07 ] SSE,KATMAI */ + /* 333 355 001(c2) 110 001(07) : SSE,KATMAI */ + {I_CMPORDSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+51507, 364, 2355}, + /* 2642 : CMPUNORDPS xmmreg,xmmrm128 [rm: np 0f c2 /r 03 ] SSE,KATMAI */ + /* 360 355 001(c2) 110 001(03) : SSE,KATMAI */ + {I_CMPUNORDPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+51515, 364, 2356}, + /* 2643 : CMPUNORDSS xmmreg,xmmrm32 [rm: f3 0f c2 /r 03 ] SSE,KATMAI */ + /* 333 355 001(c2) 110 001(03) : SSE,KATMAI */ + {I_CMPUNORDSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+51523, 364, 2357}, + /* 2644 : CMPPS xmmreg,xmmrm128,imm8 [rmi: np 0f c2 /r ib,u ] SSE,KATMAI */ + /* 360 355 001(c2) 110 026 : SSE,KATMAI */ + {I_CMPPS, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+57805, 364, 2360}, + /* 2645 : CMPSS xmmreg,xmmrm32,imm8 [rmi: f3 0f c2 /r ib,u ] SSE,KATMAI */ + /* 333 355 001(c2) 110 026 : SSE,KATMAI */ + {I_CMPSS, 3, {XMMREG,RM_XMM|BITS32,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+57812, 364, 2361}, + /* 2646 : COMISS xmmreg,xmmrm32 [rm: np 0f 2f /r ] FL,SSE,KATMAI */ + /* 360 355 001(2f) 110 : FL,SSE,KATMAI */ + {I_COMISS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68379, 365, 2362}, + /* 2647 : CVTPI2PS xmmreg,mmxrm64 [rm: np 0f 2a /r ] MMX,SSE,KATMAI */ + /* 360 355 001(2a) 110 : MMX,SSE,KATMAI */ + {I_CVTPI2PS, 2, {XMMREG,RM_MMX|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+68385, 366, 2363}, + /* 2648 : CVTPS2PI mmxreg,xmmrm64 [rm: np 0f 2d /r ] MMX,SSE,KATMAI */ + /* 360 355 001(2d) 110 : MMX,SSE,KATMAI */ + {I_CVTPS2PI, 2, {MMXREG,RM_XMM|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+68391, 366, 2364}, + /* 2649 : CVTSI2SS xmmreg,rm32 [rm: f3 0f 2a /r ] SSE,KATMAI */ + /* 333 355 001(2a) 110 : SSE,KATMAI */ + {I_CVTSI2SS, 2, {XMMREG,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+57820, 364, 2365}, + /* 2650 : CVTSI2SS xmmreg,rm64 [rm: o64 f3 0f 2a /r ] AR1,SX,LONG,PROT,SSE,X86_64 */ + /* 324 333 355 001(2a) 110 : AR1,SX,LONG,PROT,SSE,X86_64 */ + {I_CVTSI2SS, 2, {XMMREG,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+57819, 367, 2366}, + /* 2651 : CVTSS2SI reg32,xmmrm32 [rm: f3 0f 2d /r ] SSE,KATMAI */ + /* 333 355 001(2d) 110 : SSE,KATMAI */ + {I_CVTSS2SI, 2, {REG_GPR|BITS32,RM_XMM|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+57827, 364, 2367}, + /* 2652 : CVTSS2SI reg64,xmmrm32 [rm: o64 f3 0f 2d /r ] LONG,PROT,SSE,X86_64 */ + /* 324 333 355 001(2d) 110 : LONG,PROT,SSE,X86_64 */ + {I_CVTSS2SI, 2, {REG_GPR|BITS64,RM_XMM|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+57826, 368, 2368}, + /* 2653 : CVTTPS2PI mmxreg,xmmrm64 [rm: np 0f 2c /r ] MMX,SSE,KATMAI */ + /* 360 355 001(2c) 110 : MMX,SSE,KATMAI */ + {I_CVTTPS2PI, 2, {MMXREG,RM_XMM|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+68397, 366, 2369}, + /* 2654 : CVTTSS2SI reg32,xmmrm32 [rm: f3 0f 2c /r ] SSE,KATMAI */ + /* 333 355 001(2c) 110 : SSE,KATMAI */ + {I_CVTTSS2SI, 2, {REG_GPR|BITS32,RM_XMM|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+57834, 364, 2370}, + /* 2655 : CVTTSS2SI reg64,xmmrm32 [rm: o64 f3 0f 2c /r ] LONG,PROT,SSE,X86_64 */ + /* 324 333 355 001(2c) 110 : LONG,PROT,SSE,X86_64 */ + {I_CVTTSS2SI, 2, {REG_GPR|BITS64,RM_XMM|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+57833, 368, 2371}, + /* 2656 : DIVPS xmmreg,xmmrm128 [rm: np 0f 5e /r ] SSE,KATMAI */ + /* 360 355 001(5e) 110 : SSE,KATMAI */ + {I_DIVPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+68403, 364, 2372}, + /* 2657 : DIVSS xmmreg,xmmrm32 [rm: f3 0f 5e /r ] SSE,KATMAI */ + /* 333 355 001(5e) 110 : SSE,KATMAI */ + {I_DIVSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68409, 364, 2373}, + /* 2658 : LDMXCSR mem32 [m: np 0f ae /2 ] SSE,KATMAI */ + /* 360 355 001(ae) 202 : SSE,KATMAI */ + {I_LDMXCSR, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+68415, 364, 2374}, + /* 2659 : MAXPS xmmreg,xmmrm128 [rm: np 0f 5f /r ] SSE,KATMAI */ + /* 360 355 001(5f) 110 : SSE,KATMAI */ + {I_MAXPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+68421, 364, 2375}, + /* 2660 : MAXSS xmmreg,xmmrm32 [rm: f3 0f 5f /r ] SSE,KATMAI */ + /* 333 355 001(5f) 110 : SSE,KATMAI */ + {I_MAXSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68427, 364, 2376}, + /* 2661 : MINPS xmmreg,xmmrm128 [rm: np 0f 5d /r ] SSE,KATMAI */ + /* 360 355 001(5d) 110 : SSE,KATMAI */ + {I_MINPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+68433, 364, 2377}, + /* 2662 : MINSS xmmreg,xmmrm32 [rm: f3 0f 5d /r ] SSE,KATMAI */ + /* 333 355 001(5d) 110 : SSE,KATMAI */ + {I_MINSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68439, 364, 2378}, + /* 2663 : MOVAPS xmmreg,xmmrm128 [rm: np 0f 28 /r ] SSE,KATMAI */ + /* 360 355 001(28) 110 : SSE,KATMAI */ + {I_MOVAPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+68445, 364, 2379}, + /* 2664 : MOVAPS xmmrm128,xmmreg [mr: np 0f 29 /r ] SSE,KATMAI */ + /* 360 355 001(29) 101 : SSE,KATMAI */ + {I_MOVAPS, 2, {RM_XMM|BITS128,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+68451, 364, 2380}, + /* 2665 : MOVHPS xmmreg,mem64 [rm: np 0f 16 /r ] SSE,KATMAI */ + /* 360 355 001(16) 110 : SSE,KATMAI */ + {I_MOVHPS, 2, {XMMREG,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+68457, 364, 2381}, + /* 2666 : MOVHPS mem64,xmmreg [mr: np 0f 17 /r ] SSE,KATMAI */ + /* 360 355 001(17) 101 : SSE,KATMAI */ + {I_MOVHPS, 2, {MEMORY|BITS64,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+68463, 364, 2382}, + /* 2667 : MOVLHPS xmmreg,xmmreg [rm: np 0f 16 /r ] SSE,KATMAI */ + /* 360 355 001(16) 110 : SSE,KATMAI */ + {I_MOVLHPS, 2, {XMMREG,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+68457, 364, 2383}, + /* 2668 : MOVLPS xmmreg,mem64 [rm: np 0f 12 /r ] SSE,KATMAI */ + /* 360 355 001(12) 110 : SSE,KATMAI */ + {I_MOVLPS, 2, {XMMREG,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+67437, 364, 2384}, + /* 2669 : MOVLPS mem64,xmmreg [mr: np 0f 13 /r ] SSE,KATMAI */ + /* 360 355 001(13) 101 : SSE,KATMAI */ + {I_MOVLPS, 2, {MEMORY|BITS64,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+68469, 364, 2385}, + /* 2670 : MOVHLPS xmmreg,xmmreg [rm: np 0f 12 /r ] SSE,KATMAI */ + /* 360 355 001(12) 110 : SSE,KATMAI */ + {I_MOVHLPS, 2, {XMMREG,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+67437, 364, 2386}, + /* 2671 : MOVMSKPS reg32,xmmreg [rm: np 0f 50 /r ] SSE,KATMAI */ + /* 360 355 001(50) 110 : SSE,KATMAI */ + {I_MOVMSKPS, 2, {REG_GPR|BITS32,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+68475, 364, 2387}, + /* 2672 : MOVMSKPS reg64,xmmreg [rm: np o64 0f 50 /r ] LONG,PROT,SSE,X86_64 */ + /* 360 324 355 001(50) 110 : LONG,PROT,SSE,X86_64 */ + {I_MOVMSKPS, 2, {REG_GPR|BITS64,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+57840, 368, 2388}, + /* 2673 : MOVNTPS mem128,xmmreg [mr: np 0f 2b /r ] SSE,KATMAI */ + /* 360 355 001(2b) 101 : SSE,KATMAI */ + {I_MOVNTPS, 2, {MEMORY|BITS128,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+68481, 364, 2389}, + /* 2674 : MOVSS xmmreg,xmmrm32 [rm: f3 0f 10 /r ] SSE,KATMAI */ + /* 333 355 001(10) 110 : SSE,KATMAI */ + {I_MOVSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68487, 364, 2390}, + /* 2675 : MOVSS xmmrm32,xmmreg [mr: f3 0f 11 /r ] SSE,KATMAI */ + /* 333 355 001(11) 101 : SSE,KATMAI */ + {I_MOVSS, 2, {RM_XMM|BITS32,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+68493, 364, 2391}, + /* 2676 : MOVUPS xmmreg,xmmrm128 [rm: np 0f 10 /r ] SSE,KATMAI */ + /* 360 355 001(10) 110 : SSE,KATMAI */ + {I_MOVUPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+68499, 364, 2392}, + /* 2677 : MOVUPS xmmrm128,xmmreg [mr: np 0f 11 /r ] SSE,KATMAI */ + /* 360 355 001(11) 101 : SSE,KATMAI */ + {I_MOVUPS, 2, {RM_XMM|BITS128,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+68505, 364, 2393}, + /* 2678 : MULPS xmmreg,xmmrm128 [rm: np 0f 59 /r ] SSE,KATMAI */ + /* 360 355 001(59) 110 : SSE,KATMAI */ + {I_MULPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+68511, 364, 2394}, + /* 2679 : MULSS xmmreg,xmmrm32 [rm: f3 0f 59 /r ] SSE,KATMAI */ + /* 333 355 001(59) 110 : SSE,KATMAI */ + {I_MULSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68517, 364, 2395}, + /* 2680 : ORPS xmmreg,xmmrm128 [rm: np 0f 56 /r ] SSE,KATMAI */ + /* 360 355 001(56) 110 : SSE,KATMAI */ + {I_ORPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+68523, 364, 2396}, + /* 2681 : RCPPS xmmreg,xmmrm128 [rm: np 0f 53 /r ] SSE,KATMAI */ + /* 360 355 001(53) 110 : SSE,KATMAI */ + {I_RCPPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+68529, 364, 2397}, + /* 2682 : RCPSS xmmreg,xmmrm32 [rm: f3 0f 53 /r ] SSE,KATMAI */ + /* 333 355 001(53) 110 : SSE,KATMAI */ + {I_RCPSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68535, 364, 2398}, + /* 2683 : RSQRTPS xmmreg,xmmrm128 [rm: np 0f 52 /r ] SSE,KATMAI */ + /* 360 355 001(52) 110 : SSE,KATMAI */ + {I_RSQRTPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+68541, 364, 2399}, + /* 2684 : RSQRTSS xmmreg,xmmrm32 [rm: f3 0f 52 /r ] SSE,KATMAI */ + /* 333 355 001(52) 110 : SSE,KATMAI */ + {I_RSQRTSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68547, 364, 2400}, + /* 2685 : SHUFPS xmmreg,xmmrm128,imm8 [rmi: np 0f c6 /r ib,u ] SSE,KATMAI */ + /* 360 355 001(c6) 110 026 : SSE,KATMAI */ + {I_SHUFPS, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+57847, 364, 2401}, + /* 2686 : SQRTPS xmmreg,xmmrm128 [rm: np 0f 51 /r ] SSE,KATMAI */ + /* 360 355 001(51) 110 : SSE,KATMAI */ + {I_SQRTPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+68553, 364, 2402}, + /* 2687 : SQRTSS xmmreg,xmmrm32 [rm: f3 0f 51 /r ] SSE,KATMAI */ + /* 333 355 001(51) 110 : SSE,KATMAI */ + {I_SQRTSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68559, 364, 2403}, + /* 2688 : STMXCSR mem32 [m: np 0f ae /3 ] SSE,KATMAI */ + /* 360 355 001(ae) 203 : SSE,KATMAI */ + {I_STMXCSR, 1, {MEMORY|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+68565, 364, 2404}, + /* 2689 : SUBPS xmmreg,xmmrm128 [rm: np 0f 5c /r ] SSE,KATMAI */ + /* 360 355 001(5c) 110 : SSE,KATMAI */ + {I_SUBPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+68571, 364, 2405}, + /* 2690 : SUBSS xmmreg,xmmrm32 [rm: f3 0f 5c /r ] SSE,KATMAI */ + /* 333 355 001(5c) 110 : SSE,KATMAI */ + {I_SUBSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68577, 364, 2406}, + /* 2691 : UCOMISS xmmreg,xmmrm32 [rm: np 0f 2e /r ] FL,SSE,KATMAI */ + /* 360 355 001(2e) 110 : FL,SSE,KATMAI */ + {I_UCOMISS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+68583, 365, 2407}, + /* 2692 : UNPCKHPS xmmreg,xmmrm128 [rm: np 0f 15 /r ] SSE,KATMAI */ + /* 360 355 001(15) 110 : SSE,KATMAI */ + {I_UNPCKHPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+68589, 364, 2408}, + /* 2693 : UNPCKLPS xmmreg,xmmrm128 [rm: np 0f 14 /r ] SSE,KATMAI */ + /* 360 355 001(14) 110 : SSE,KATMAI */ + {I_UNPCKLPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+68595, 364, 2409}, + /* 2694 : XORPS xmmreg,xmmrm128 [rm: np 0f 57 /r ] SSE,KATMAI */ + /* 360 355 001(57) 110 : SSE,KATMAI */ + {I_XORPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+68601, 364, 2410}, + /* 2695 : FXRSTOR mem [m: np 0f ae /1 ] FPU,SSE,P6 */ + /* 360 355 001(ae) 201 : FPU,SSE,P6 */ + {I_FXRSTOR, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57855, 369, 2413}, + /* 2696 : FXRSTOR64 mem [m: o64 np 0f ae /1 ] LONG,PROT,FPU,SSE,X86_64 */ + /* 324 360 355 001(ae) 201 : LONG,PROT,FPU,SSE,X86_64 */ + {I_FXRSTOR64, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57854, 370, 2414}, + /* 2697 : FXSAVE mem [m: np 0f ae /0 ] FPU,SSE,P6 */ + /* 360 355 001(ae) 200 : FPU,SSE,P6 */ + {I_FXSAVE, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57862, 369, 2415}, + /* 2698 : FXSAVE64 mem [m: o64 np 0f ae /0 ] LONG,PROT,FPU,SSE,X86_64 */ + /* 324 360 355 001(ae) 200 : LONG,PROT,FPU,SSE,X86_64 */ + {I_FXSAVE64, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57861, 370, 2416}, + /* 2699 : XGETBV void [ 0f 01 d0 ] NEHALEM */ + /* 355 002(01 d0) : NEHALEM */ + {I_XGETBV, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72454, 371, 2421}, + /* 2700 : XSETBV void [ 0f 01 d1 ] PRIV,NEHALEM */ + /* 355 002(01 d1) : PRIV,NEHALEM */ + {I_XSETBV, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72459, 372, 2422}, + /* 2701 : XSAVE mem [m: np 0f ae /4 ] NOAPX,NEHALEM */ + /* 360 355 001(ae) 204 : NOAPX,NEHALEM */ + {I_XSAVE, 1, {MEMORY|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57869, 373, 2423}, + /* 2702 : XSAVE64 mem [m: o64 np 0f ae /4 ] NOAPX,LONG,PROT,X86_64,NEHALEM */ + /* 324 360 355 001(ae) 204 : NOAPX,LONG,PROT,NEHALEM */ + {I_XSAVE64, 1, {MEMORY|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57868, 374, 2424}, + /* 2703 : XSAVEC mem [m: np 0f c7 /4 ] NOAPX,FUTURE */ + /* 360 355 001(c7) 204 : NOAPX,FUTURE */ + {I_XSAVEC, 1, {MEMORY|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57876, 282, 2425}, + /* 2704 : XSAVEC64 mem [m: o64 np 0f c7 /4 ] NOAPX,LONG,PROT,X86_64 */ + /* 324 360 355 001(c7) 204 : NOAPX,LONG,PROT,X86_64 */ + {I_XSAVEC64, 1, {MEMORY|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57875, 244, 2426}, + /* 2705 : XSAVEOPT mem [m: np 0f ae /6 ] NOAPX,FUTURE */ + /* 360 355 001(ae) 206 : NOAPX,FUTURE */ + {I_XSAVEOPT, 1, {MEMORY|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57883, 282, 2427}, + /* 2706 : XSAVEOPT64 mem [m: o64 np 0f ae /6 ] NOAPX,LONG,PROT,X86_64 */ + /* 324 360 355 001(ae) 206 : NOAPX,LONG,PROT,X86_64 */ + {I_XSAVEOPT64, 1, {MEMORY|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57882, 244, 2428}, + /* 2707 : XSAVES mem [m: np 0f c7 /5 ] NOAPX,FUTURE */ + /* 360 355 001(c7) 205 : NOAPX,FUTURE */ + {I_XSAVES, 1, {MEMORY|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57890, 282, 2429}, + /* 2708 : XSAVES64 mem [m: o64 np 0f c7 /5 ] NOAPX,LONG,PROT,X86_64 */ + /* 324 360 355 001(c7) 205 : NOAPX,LONG,PROT,X86_64 */ + {I_XSAVES64, 1, {MEMORY|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57889, 244, 2430}, + /* 2709 : XRSTOR mem [m: np 0f ae /5 ] NOAPX,NEHALEM */ + /* 360 355 001(ae) 205 : NOAPX,NEHALEM */ + {I_XRSTOR, 1, {MEMORY|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57897, 373, 2431}, + /* 2710 : XRSTOR64 mem [m: o64 np 0f ae /5 ] NOAPX,LONG,PROT,X86_64,NEHALEM */ + /* 324 360 355 001(ae) 205 : NOAPX,LONG,PROT,NEHALEM */ + {I_XRSTOR64, 1, {MEMORY|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57896, 374, 2432}, + /* 2711 : XRSTORS mem [m: np 0f c7 /3 ] NOAPX,FUTURE */ + /* 360 355 001(c7) 203 : NOAPX,FUTURE */ + {I_XRSTORS, 1, {MEMORY|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57904, 282, 2433}, + /* 2712 : XRSTORS64 mem [m: o64 np 0f c7 /3 ] NOAPX,LONG,PROT,X86_64 */ + /* 324 360 355 001(c7) 203 : NOAPX,LONG,PROT,X86_64 */ + {I_XRSTORS64, 1, {MEMORY|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57903, 244, 2434}, + /* 2713 : PREFETCHNTA mem8 [m: 0f 18 /0 ] AR0,SB,KATMAI */ + /* 355 001(18) 200 : AR0,SB,KATMAI */ + {I_PREFETCHNTA, 1, {MEMORY|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70198, 375, 2439}, + /* 2714 : PREFETCHT0 mem8 [m: 0f 18 /1 ] AR0,SB,KATMAI */ + /* 355 001(18) 201 : AR0,SB,KATMAI */ + {I_PREFETCHT0, 1, {MEMORY|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70216, 375, 2440}, + /* 2715 : PREFETCHT1 mem8 [m: 0f 18 /2 ] AR0,SB,KATMAI */ + /* 355 001(18) 202 : AR0,SB,KATMAI */ + {I_PREFETCHT1, 1, {MEMORY|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70234, 375, 2441}, + /* 2716 : PREFETCHT2 mem8 [m: 0f 18 /3 ] AR0,SB,KATMAI */ + /* 355 001(18) 203 : AR0,SB,KATMAI */ + {I_PREFETCHT2, 1, {MEMORY|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70252, 375, 2442}, + /* 2717 : PREFETCHIT0 mem8 [m: 0f 18 /7 ] AR0,SB,PREFETCHI,FUTURE */ + /* 355 001(18) 207 : AR0,SB,PREFETCHI,FUTURE */ + {I_PREFETCHIT0, 1, {MEMORY|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70324, 376, 2443}, + /* 2718 : PREFETCHIT1 mem8 [m: 0f 18 /6 ] AR0,SB,PREFETCHI,FUTURE */ + /* 355 001(18) 206 : AR0,SB,PREFETCHI,FUTURE */ + {I_PREFETCHIT1, 1, {MEMORY|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70306, 376, 2444}, + /* 2719 : SFENCE void [ np 0f ae f8 ] KATMAI */ + /* 360 355 002(ae f8) : KATMAI */ + {I_SFENCE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67239, 377, 2445}, + /* 2720 : MASKMOVQ mmxreg,mmxreg [rm: np 0f f7 /r ] MMX,KATMAI */ + /* 360 355 001(f7) 110 : MMX,KATMAI */ + {I_MASKMOVQ, 2, {MMXREG,MMXREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+68607, 378, 2448}, + /* 2721 : MOVNTQ mem,mmxreg [mr: np 0f e7 /r ] AR0-1,SQ,MMX,KATMAI */ + /* 360 355 001(e7) 101 : AR0,AR1,SQ,MMX,KATMAI */ + {I_MOVNTQ, 2, {MEMORY,MMXREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+68613, 379, 2449}, + /* 2722 : PAVGB mmxreg,mmxrm [rm: np 0f e0 /r ] AR0-1,SQ,MMX,KATMAI */ + /* 360 355 001(e0) 110 : AR0,AR1,SQ,MMX,KATMAI */ + {I_PAVGB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+68619, 379, 2450}, + /* 2723 : PAVGW mmxreg,mmxrm [rm: np 0f e3 /r ] AR0-1,SQ,MMX,KATMAI */ + /* 360 355 001(e3) 110 : AR0,AR1,SQ,MMX,KATMAI */ + {I_PAVGW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+68625, 379, 2451}, + /* 2724 : PEXTRW reg32,mmxreg,imm [rmi: np 0f c5 /r ib,u ] AR2,SB,MMX,KATMAI */ + /* 360 355 001(c5) 110 026 : AR2,SB,MMX,KATMAI */ + {I_PEXTRW, 3, {REG_GPR|BITS32,MMXREG,IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+57910, 380, 2452}, + /* 2725 : PINSRW mmxreg,mem,imm [rmi: np 0f c4 /r ib,u ] AR2,SB,MMX,KATMAI */ + /* 360 355 001(c4) 110 026 : AR2,SB,MMX,KATMAI */ + {I_PINSRW, 3, {MMXREG,MEMORY,IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+57917, 380, 2455}, + /* 2726 : PINSRW mmxreg,rm16,imm [rmi: np 0f c4 /r ib,u ] AR2,SB,MMX,KATMAI */ + /* 360 355 001(c4) 110 026 : AR2,SB,MMX,KATMAI */ + {I_PINSRW, 3, {MMXREG,RM_GPR|BITS16,IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+57917, 380, 2456}, + /* 2727 : PINSRW mmxreg,reg32,imm [rmi: np 0f c4 /r ib,u ] AR2,SB,MMX,KATMAI */ + /* 360 355 001(c4) 110 026 : AR2,SB,MMX,KATMAI */ + {I_PINSRW, 3, {MMXREG,REG_GPR|BITS32,IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+57917, 380, 2457}, + /* 2728 : PMAXSW mmxreg,mmxrm [rm: np 0f ee /r ] AR0-1,SQ,MMX,KATMAI */ + /* 360 355 001(ee) 110 : AR0,AR1,SQ,MMX,KATMAI */ + {I_PMAXSW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+68631, 379, 2458}, + /* 2729 : PMAXUB mmxreg,mmxrm [rm: np 0f de /r ] AR0-1,SQ,MMX,KATMAI */ + /* 360 355 001(de) 110 : AR0,AR1,SQ,MMX,KATMAI */ + {I_PMAXUB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+68637, 379, 2459}, + /* 2730 : PMINSW mmxreg,mmxrm [rm: np 0f ea /r ] AR0-1,SQ,MMX,KATMAI */ + /* 360 355 001(ea) 110 : AR0,AR1,SQ,MMX,KATMAI */ + {I_PMINSW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+68643, 379, 2460}, + /* 2731 : PMINUB mmxreg,mmxrm [rm: np 0f da /r ] AR0-1,SQ,MMX,KATMAI */ + /* 360 355 001(da) 110 : AR0,AR1,SQ,MMX,KATMAI */ + {I_PMINUB, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+68649, 379, 2461}, + /* 2732 : PMOVMSKB reg32,mmxreg [rm: np 0f d7 /r ] MMX,KATMAI */ + /* 360 355 001(d7) 110 : MMX,KATMAI */ + {I_PMOVMSKB, 2, {REG_GPR|BITS32,MMXREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+68655, 378, 2462}, + /* 2733 : PMULHUW mmxreg,mmxrm [rm: np 0f e4 /r ] AR0-1,SQ,MMX,KATMAI */ + /* 360 355 001(e4) 110 : AR0,AR1,SQ,MMX,KATMAI */ + {I_PMULHUW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+68661, 379, 2463}, + /* 2734 : PSADBW mmxreg,mmxrm [rm: np 0f f6 /r ] AR0-1,SQ,MMX,KATMAI */ + /* 360 355 001(f6) 110 : AR0,AR1,SQ,MMX,KATMAI */ + {I_PSADBW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+68667, 379, 2464}, + /* 2735 : PSHUFW mmxreg,mmxrm,imm [rmi: np 0f 70 /r ib ] AR2,SB,MMX,KATMAI */ + /* 360 355 001(70) 110 022 : AR2,SB,MMX,KATMAI */ + {I_PSHUFW, 3, {MMXREG,RM_MMX,IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+57924, 380, 2465}, + /* 2736 : PF2IW mmxreg,mmxrm [rm: 0f 0f /r 1c ] AR0-1,SQ,3DNOW,PENT */ + /* 355 001(0f) 110 001(1c) : AR0,AR1,SQ,3DNOW,PENT */ + {I_PF2IW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+57931, 336, 2468}, + /* 2737 : PFNACC mmxreg,mmxrm [rm: 0f 0f /r 8a ] AR0-1,SQ,3DNOW,PENT */ + /* 355 001(0f) 110 001(8a) : AR0,AR1,SQ,3DNOW,PENT */ + {I_PFNACC, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+57938, 336, 2469}, + /* 2738 : PFPNACC mmxreg,mmxrm [rm: 0f 0f /r 8e ] AR0-1,SQ,3DNOW,PENT */ + /* 355 001(0f) 110 001(8e) : AR0,AR1,SQ,3DNOW,PENT */ + {I_PFPNACC, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+57945, 336, 2470}, + /* 2739 : PI2FW mmxreg,mmxrm [rm: 0f 0f /r 0c ] AR0-1,SQ,3DNOW,PENT */ + /* 355 001(0f) 110 001(0c) : AR0,AR1,SQ,3DNOW,PENT */ + {I_PI2FW, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+57952, 336, 2471}, + /* 2740 : PSWAPD mmxreg,mmxrm [rm: 0f 0f /r bb ] AR0-1,SQ,3DNOW,PENT */ + /* 355 001(0f) 110 001(bb) : AR0,AR1,SQ,3DNOW,PENT */ + {I_PSWAPD, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+57959, 336, 2472}, + /* 2741 : MASKMOVDQU xmmreg,xmmreg [rm: 66 0f f7 /r ] SSE2,WILLAMETTE */ + /* 361 355 001(f7) 110 : SSE2,WILLAMETTE */ + {I_MASKMOVDQU, 2, {XMMREG,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+68673, 248, 2475}, + /* 2742 : MOVNTDQ mem,xmmreg [mr: 66 0f e7 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(e7) 101 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_MOVNTDQ, 2, {MEMORY,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+68679, 381, 2476}, + /* 2743 : MOVNTI mem,reg32 [mr: np 0f c3 /r ] AR0-1,SD,WILLAMETTE */ + /* 360 355 001(c3) 101 : AR0,AR1,SD,WILLAMETTE */ + {I_MOVNTI, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+57967, 382, 2477}, + /* 2744 : MOVNTI mem,reg64 [mr: o64 np 0f c3 /r ] AR0-1,SQ,LONG,PROT,X86_64 */ + /* 324 360 355 001(c3) 101 : AR0,AR1,SQ,LONG,PROT,X86_64 */ + {I_MOVNTI, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+57966, 383, 2478}, + /* 2745 : MOVNTPD mem,xmmreg [mr: 66 0f 2b /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(2b) 101 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_MOVNTPD, 2, {MEMORY,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+68685, 381, 2479}, + /* 2746 : LFENCE void [ np 0f ae e8 ] SSE2,WILLAMETTE */ + /* 360 355 002(ae e8) : SSE2,WILLAMETTE */ + {I_LFENCE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67227, 248, 2480}, + /* 2747 : MFENCE void [ np 0f ae f0 ] SSE2,WILLAMETTE */ + /* 360 355 002(ae f0) : SSE2,WILLAMETTE */ + {I_MFENCE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+67233, 248, 2481}, + /* 2748 : MOVD mem,xmmreg [mr: 66 norexw 0f 7e /r ] AR0-1,SD,SSE2,WILLAMETTE */ + /* 361 317 355 001(7e) 101 : AR0,AR1,SD,SSE2,WILLAMETTE */ + {I_MOVD, 2, {MEMORY,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+57973, 384, 2484}, + /* 2749 : MOVD xmmreg,mem [rm: 66 norexw 0f 6e /r ] AR0-1,SD,SSE2,WILLAMETTE */ + /* 361 317 355 001(6e) 110 : AR0,AR1,SD,SSE2,WILLAMETTE */ + {I_MOVD, 2, {XMMREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+57980, 384, 2485}, + /* 2750 : MOVD xmmreg,rm32 [rm: 66 norexw 0f 6e /r ] SSE2,WILLAMETTE */ + /* 361 317 355 001(6e) 110 : SSE2,WILLAMETTE */ + {I_MOVD, 2, {XMMREG,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+57980, 248, 2486}, + /* 2751 : MOVD rm32,xmmreg [mr: 66 norexw 0f 7e /r ] SSE2,WILLAMETTE */ + /* 361 317 355 001(7e) 101 : SSE2,WILLAMETTE */ + {I_MOVD, 2, {RM_GPR|BITS32,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+57973, 248, 2487}, + /* 2752 : MOVDQA xmmreg,xmmrm128 [rm: 66 0f 6f /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(6f) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_MOVDQA, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+68691, 381, 2488}, + /* 2753 : MOVDQA xmmrm128,xmmreg [mr: 66 0f 7f /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(7f) 101 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_MOVDQA, 2, {RM_XMM|BITS128,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+68697, 381, 2489}, + /* 2754 : MOVDQU xmmreg,xmmrm128 [rm: f3 0f 6f /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 333 355 001(6f) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_MOVDQU, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+68703, 381, 2490}, + /* 2755 : MOVDQU xmmrm128,xmmreg [mr: f3 0f 7f /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 333 355 001(7f) 101 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_MOVDQU, 2, {RM_XMM|BITS128,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+68709, 381, 2491}, + /* 2756 : MOVDQ2Q mmxreg,xmmreg [rm: f2 0f d6 /r ] SSE2,WILLAMETTE */ + /* 332 355 001(d6) 110 : SSE2,WILLAMETTE */ + {I_MOVDQ2Q, 2, {MMXREG,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+68715, 248, 2492}, + /* 2757 : MOVQ xmmreg,xmmreg [rm: f3 0f 7e /r ] SSE2,WILLAMETTE */ + /* 333 355 001(7e) 110 : SSE2,WILLAMETTE */ + {I_MOVQ, 2, {XMMREG,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+68721, 248, 2493}, + /* 2758 : MOVQ xmmreg,xmmreg [mr: 66 0f d6 /r ] SSE2,WILLAMETTE */ + /* 361 355 001(d6) 101 : SSE2,WILLAMETTE */ + {I_MOVQ, 2, {XMMREG,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+68727, 248, 2494}, + /* 2759 : MOVQ mem,xmmreg [mr: 66 0f d6 /r ] AR0-1,SQ,SSE2,WILLAMETTE */ + /* 361 355 001(d6) 101 : AR0,AR1,SQ,SSE2,WILLAMETTE */ + {I_MOVQ, 2, {MEMORY,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+68727, 385, 2495}, + /* 2760 : MOVQ xmmreg,mem [rm: f3 0f 7e /r ] AR0-1,SQ,SSE2,WILLAMETTE */ + /* 333 355 001(7e) 110 : AR0,AR1,SQ,SSE2,WILLAMETTE */ + {I_MOVQ, 2, {XMMREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+68721, 385, 2496}, + /* 2761 : MOVQ xmmreg,rm64 [rm: 66 o64 0f 6e /r ] LONG,PROT,SSE2,X86_64 */ + /* 361 324 355 001(6e) 110 : LONG,PROT,SSE2,X86_64 */ + {I_MOVQ, 2, {XMMREG,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+57987, 386, 2497}, + /* 2762 : MOVQ rm64,xmmreg [mr: 66 o64 0f 7e /r ] LONG,PROT,SSE2,X86_64 */ + /* 361 324 355 001(7e) 101 : LONG,PROT,SSE2,X86_64 */ + {I_MOVQ, 2, {RM_GPR|BITS64,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+57994, 386, 2498}, + /* 2763 : MOVQ2DQ xmmreg,mmxreg [rm: f3 0f d6 /r ] SSE2,WILLAMETTE */ + /* 333 355 001(d6) 110 : SSE2,WILLAMETTE */ + {I_MOVQ2DQ, 2, {XMMREG,MMXREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+68733, 248, 2499}, + /* 2764 : PACKSSWB xmmreg,xmmrm [rm: 66 0f 63 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(63) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PACKSSWB, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68739, 381, 2500}, + /* 2765 : PACKSSDW xmmreg,xmmrm [rm: 66 0f 6b /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(6b) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PACKSSDW, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68745, 381, 2501}, + /* 2766 : PACKUSWB xmmreg,xmmrm [rm: 66 0f 67 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(67) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PACKUSWB, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68751, 381, 2502}, + /* 2767 : PADDB xmmreg,xmmrm [rm: 66 0f fc /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(fc) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PADDB, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68757, 381, 2503}, + /* 2768 : PADDW xmmreg,xmmrm [rm: 66 0f fd /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(fd) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PADDW, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68763, 381, 2504}, + /* 2769 : PADDD xmmreg,xmmrm [rm: 66 0f fe /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(fe) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PADDD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68769, 381, 2505}, + /* 2770 : PADDQ mmxreg,mmxrm [rm: np 0f d4 /r ] AR0-1,SQ,MMX,WILLAMETTE */ + /* 360 355 001(d4) 110 : AR0,AR1,SQ,MMX,WILLAMETTE */ + {I_PADDQ, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+68775, 387, 2506}, + /* 2771 : PADDQ xmmreg,xmmrm [rm: 66 0f d4 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(d4) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PADDQ, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68781, 381, 2507}, + /* 2772 : PADDSB xmmreg,xmmrm [rm: 66 0f ec /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(ec) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PADDSB, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68787, 381, 2508}, + /* 2773 : PADDSW xmmreg,xmmrm [rm: 66 0f ed /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(ed) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PADDSW, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68793, 381, 2509}, + /* 2774 : PADDUSB xmmreg,xmmrm [rm: 66 0f dc /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(dc) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PADDUSB, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68799, 381, 2510}, + /* 2775 : PADDUSW xmmreg,xmmrm [rm: 66 0f dd /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(dd) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PADDUSW, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68805, 381, 2511}, + /* 2776 : PAND xmmreg,xmmrm [rm: 66 0f db /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(db) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PAND, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68811, 381, 2512}, + /* 2777 : PANDN xmmreg,xmmrm [rm: 66 0f df /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(df) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PANDN, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68817, 381, 2513}, + /* 2778 : PAVGB xmmreg,xmmrm [rm: 66 0f e0 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(e0) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PAVGB, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68823, 381, 2514}, + /* 2779 : PAVGW xmmreg,xmmrm [rm: 66 0f e3 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(e3) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PAVGW, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68829, 381, 2515}, + /* 2780 : PCMPEQB xmmreg,xmmrm [rm: 66 0f 74 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(74) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PCMPEQB, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68835, 381, 2516}, + /* 2781 : PCMPEQW xmmreg,xmmrm [rm: 66 0f 75 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(75) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PCMPEQW, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68841, 381, 2517}, + /* 2782 : PCMPEQD xmmreg,xmmrm [rm: 66 0f 76 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(76) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PCMPEQD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68847, 381, 2518}, + /* 2783 : PCMPGTB xmmreg,xmmrm [rm: 66 0f 64 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(64) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PCMPGTB, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68853, 381, 2519}, + /* 2784 : PCMPGTW xmmreg,xmmrm [rm: 66 0f 65 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(65) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PCMPGTW, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68859, 381, 2520}, + /* 2785 : PCMPGTD xmmreg,xmmrm [rm: 66 0f 66 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(66) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PCMPGTD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68865, 381, 2521}, + /* 2786 : PEXTRW reg32,xmmreg,imm [rmi: 66 0f c5 /r ib,u ] AR2,SB,SSE2,WILLAMETTE */ + /* 361 355 001(c5) 110 026 : AR2,SB,SSE2,WILLAMETTE */ + {I_PEXTRW, 3, {REG_GPR|BITS32,XMMREG,IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+58001, 388, 2522}, + /* 2787 : PINSRW xmmreg,reg16,imm [rmi: 66 0f c4 /r ib,u ] AR2,SB,SSE2,WILLAMETTE */ + /* 361 355 001(c4) 110 026 : AR2,SB,SSE2,WILLAMETTE */ + {I_PINSRW, 3, {XMMREG,REG_GPR|BITS16,IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+58008, 388, 2524}, + /* 2788 : PINSRW xmmreg,mem,imm [rmi: 66 0f c4 /r ib,u ] AR2,SB,SSE2,WILLAMETTE */ + /* 361 355 001(c4) 110 026 : AR2,SB,SSE2,WILLAMETTE */ + {I_PINSRW, 3, {XMMREG,MEMORY,IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+58008, 388, 2527}, + /* 2789 : PINSRW xmmreg,mem16,imm [rmi: 66 0f c4 /r ib,u ] AR2,SB,SSE2,WILLAMETTE */ + /* 361 355 001(c4) 110 026 : AR2,SB,SSE2,WILLAMETTE */ + {I_PINSRW, 3, {XMMREG,MEMORY|BITS16,IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+58008, 388, 2528}, + /* 2790 : PMADDWD xmmreg,xmmrm [rm: 66 0f f5 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(f5) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PMADDWD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68871, 381, 2529}, + /* 2791 : PMAXSW xmmreg,xmmrm [rm: 66 0f ee /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(ee) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PMAXSW, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68877, 381, 2530}, + /* 2792 : PMAXUB xmmreg,xmmrm [rm: 66 0f de /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(de) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PMAXUB, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68883, 381, 2531}, + /* 2793 : PMINSW xmmreg,xmmrm [rm: 66 0f ea /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(ea) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PMINSW, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68889, 381, 2532}, + /* 2794 : PMINUB xmmreg,xmmrm [rm: 66 0f da /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(da) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PMINUB, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68895, 381, 2533}, + /* 2795 : PMOVMSKB reg32,xmmreg [rm: 66 0f d7 /r ] SSE2,WILLAMETTE */ + /* 361 355 001(d7) 110 : SSE2,WILLAMETTE */ + {I_PMOVMSKB, 2, {REG_GPR|BITS32,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+68901, 248, 2534}, + /* 2796 : PMULHUW xmmreg,xmmrm [rm: 66 0f e4 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(e4) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PMULHUW, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68907, 381, 2535}, + /* 2797 : PMULHW xmmreg,xmmrm [rm: 66 0f e5 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(e5) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PMULHW, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68913, 381, 2536}, + /* 2798 : PMULLW xmmreg,xmmrm [rm: 66 0f d5 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(d5) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PMULLW, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68919, 381, 2537}, + /* 2799 : PMULUDQ mmxreg,mmxrm [rm: np 0f f4 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 360 355 001(f4) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PMULUDQ, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+68925, 381, 2538}, + /* 2800 : PMULUDQ xmmreg,xmmrm [rm: 66 0f f4 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(f4) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PMULUDQ, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68931, 381, 2539}, + /* 2801 : POR xmmreg,xmmrm [rm: 66 0f eb /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(eb) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_POR, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68937, 381, 2540}, + /* 2802 : PSADBW xmmreg,xmmrm [rm: 66 0f f6 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(f6) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PSADBW, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68943, 381, 2541}, + /* 2803 : PSHUFD xmmreg,xmmreg,imm [rmi: 66 0f 70 /r ib ] AR2,SB,SSE2,WILLAMETTE */ + /* 361 355 001(70) 110 022 : AR2,SB,SSE2,WILLAMETTE */ + {I_PSHUFD, 3, {XMMREG,XMMREG,IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+58015, 388, 2542}, + /* 2804 : PSHUFD xmmreg,mem,imm [rmi: 66 0f 70 /r ib ] AR2,SB,SSE2,WILLAMETTE */ + /* 361 355 001(70) 110 022 : AR2,SB,SSE2,WILLAMETTE */ + {I_PSHUFD, 3, {XMMREG,MEMORY,IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+58015, 388, 2543}, + /* 2805 : PSHUFHW xmmreg,xmmreg,imm [rmi: f3 0f 70 /r ib ] AR2,SB,SSE2,WILLAMETTE */ + /* 333 355 001(70) 110 022 : AR2,SB,SSE2,WILLAMETTE */ + {I_PSHUFHW, 3, {XMMREG,XMMREG,IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+58022, 388, 2544}, + /* 2806 : PSHUFHW xmmreg,mem,imm [rmi: f3 0f 70 /r ib ] AR2,SB,SSE2,WILLAMETTE */ + /* 333 355 001(70) 110 022 : AR2,SB,SSE2,WILLAMETTE */ + {I_PSHUFHW, 3, {XMMREG,MEMORY,IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+58022, 388, 2545}, + /* 2807 : PSHUFLW xmmreg,xmmreg,imm [rmi: f2 0f 70 /r ib ] AR2,SB,SSE2,WILLAMETTE */ + /* 332 355 001(70) 110 022 : AR2,SB,SSE2,WILLAMETTE */ + {I_PSHUFLW, 3, {XMMREG,XMMREG,IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+58029, 388, 2546}, + /* 2808 : PSHUFLW xmmreg,mem,imm [rmi: f2 0f 70 /r ib ] AR2,SB,SSE2,WILLAMETTE */ + /* 332 355 001(70) 110 022 : AR2,SB,SSE2,WILLAMETTE */ + {I_PSHUFLW, 3, {XMMREG,MEMORY,IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+58029, 388, 2547}, + /* 2809 : PSLLDQ xmmreg,imm [mi: 66 0f 73 /7 ib,u ] AR1,SB,SSE2,WILLAMETTE */ + /* 361 355 001(73) 207 025 : AR1,SB,SSE2,WILLAMETTE */ + {I_PSLLDQ, 2, {XMMREG,IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+58036, 390, 2548}, + /* 2810 : PSLLW xmmreg,xmmrm [rm: 66 0f f1 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(f1) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PSLLW, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68949, 381, 2549}, + /* 2811 : PSLLW xmmreg,imm [mi: 66 0f 71 /6 ib,u ] AR1,SB,SSE2,WILLAMETTE */ + /* 361 355 001(71) 206 025 : AR1,SB,SSE2,WILLAMETTE */ + {I_PSLLW, 2, {XMMREG,IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+58043, 390, 2550}, + /* 2812 : PSLLD xmmreg,xmmrm [rm: 66 0f f2 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(f2) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PSLLD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68955, 381, 2551}, + /* 2813 : PSLLD xmmreg,imm [mi: 66 0f 72 /6 ib,u ] AR1,SB,SSE2,WILLAMETTE */ + /* 361 355 001(72) 206 025 : AR1,SB,SSE2,WILLAMETTE */ + {I_PSLLD, 2, {XMMREG,IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+58050, 390, 2552}, + /* 2814 : PSLLQ xmmreg,xmmrm [rm: 66 0f f3 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(f3) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PSLLQ, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68961, 381, 2553}, + /* 2815 : PSLLQ xmmreg,imm [mi: 66 0f 73 /6 ib,u ] AR1,SB,SSE2,WILLAMETTE */ + /* 361 355 001(73) 206 025 : AR1,SB,SSE2,WILLAMETTE */ + {I_PSLLQ, 2, {XMMREG,IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+58057, 390, 2554}, + /* 2816 : PSRAW xmmreg,xmmrm [rm: 66 0f e1 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(e1) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PSRAW, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68967, 381, 2555}, + /* 2817 : PSRAW xmmreg,imm [mi: 66 0f 71 /4 ib,u ] AR1,SB,SSE2,WILLAMETTE */ + /* 361 355 001(71) 204 025 : AR1,SB,SSE2,WILLAMETTE */ + {I_PSRAW, 2, {XMMREG,IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+58064, 390, 2556}, + /* 2818 : PSRAD xmmreg,xmmrm [rm: 66 0f e2 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(e2) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PSRAD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68973, 381, 2557}, + /* 2819 : PSRAD xmmreg,imm [mi: 66 0f 72 /4 ib,u ] AR1,SB,SSE2,WILLAMETTE */ + /* 361 355 001(72) 204 025 : AR1,SB,SSE2,WILLAMETTE */ + {I_PSRAD, 2, {XMMREG,IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+58071, 390, 2558}, + /* 2820 : PSRLDQ xmmreg,imm [mi: 66 0f 73 /3 ib,u ] AR1,SB,SSE2,WILLAMETTE */ + /* 361 355 001(73) 203 025 : AR1,SB,SSE2,WILLAMETTE */ + {I_PSRLDQ, 2, {XMMREG,IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+58078, 390, 2559}, + /* 2821 : PSRLW xmmreg,xmmrm [rm: 66 0f d1 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(d1) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PSRLW, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68979, 381, 2560}, + /* 2822 : PSRLW xmmreg,imm [mi: 66 0f 71 /2 ib,u ] AR1,SB,SSE2,WILLAMETTE */ + /* 361 355 001(71) 202 025 : AR1,SB,SSE2,WILLAMETTE */ + {I_PSRLW, 2, {XMMREG,IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+58085, 390, 2561}, + /* 2823 : PSRLD xmmreg,xmmrm [rm: 66 0f d2 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(d2) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PSRLD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68985, 381, 2562}, + /* 2824 : PSRLD xmmreg,imm [mi: 66 0f 72 /2 ib,u ] AR1,SB,SSE2,WILLAMETTE */ + /* 361 355 001(72) 202 025 : AR1,SB,SSE2,WILLAMETTE */ + {I_PSRLD, 2, {XMMREG,IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+58092, 390, 2563}, + /* 2825 : PSRLQ xmmreg,xmmrm [rm: 66 0f d3 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(d3) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PSRLQ, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68991, 381, 2564}, + /* 2826 : PSRLQ xmmreg,imm [mi: 66 0f 73 /2 ib,u ] AR1,SB,SSE2,WILLAMETTE */ + /* 361 355 001(73) 202 025 : AR1,SB,SSE2,WILLAMETTE */ + {I_PSRLQ, 2, {XMMREG,IMM_NORMAL,0,0,0}, NO_DECORATOR, nasm_bytecodes+58099, 390, 2565}, + /* 2827 : PSUBB xmmreg,xmmrm [rm: 66 0f f8 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(f8) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PSUBB, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+68997, 381, 2566}, + /* 2828 : PSUBW xmmreg,xmmrm [rm: 66 0f f9 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(f9) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PSUBW, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69003, 381, 2567}, + /* 2829 : PSUBD xmmreg,xmmrm [rm: 66 0f fa /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(fa) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PSUBD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69009, 381, 2568}, + /* 2830 : PSUBQ mmxreg,mmxrm [rm: np 0f fb /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 360 355 001(fb) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PSUBQ, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+69015, 381, 2569}, + /* 2831 : PSUBQ xmmreg,xmmrm [rm: 66 0f fb /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(fb) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PSUBQ, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69021, 381, 2570}, + /* 2832 : PSUBSB xmmreg,xmmrm [rm: 66 0f e8 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(e8) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PSUBSB, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69027, 381, 2571}, + /* 2833 : PSUBSW xmmreg,xmmrm [rm: 66 0f e9 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(e9) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PSUBSW, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69033, 381, 2572}, + /* 2834 : PSUBUSB xmmreg,xmmrm [rm: 66 0f d8 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(d8) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PSUBUSB, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69039, 381, 2573}, + /* 2835 : PSUBUSW xmmreg,xmmrm [rm: 66 0f d9 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(d9) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PSUBUSW, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69045, 381, 2574}, + /* 2836 : PUNPCKHBW xmmreg,xmmrm [rm: 66 0f 68 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(68) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PUNPCKHBW, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69051, 381, 2575}, + /* 2837 : PUNPCKHWD xmmreg,xmmrm [rm: 66 0f 69 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(69) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PUNPCKHWD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69057, 381, 2576}, + /* 2838 : PUNPCKHDQ xmmreg,xmmrm [rm: 66 0f 6a /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(6a) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PUNPCKHDQ, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69063, 381, 2577}, + /* 2839 : PUNPCKHQDQ xmmreg,xmmrm [rm: 66 0f 6d /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(6d) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PUNPCKHQDQ, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69069, 381, 2578}, + /* 2840 : PUNPCKLBW xmmreg,xmmrm [rm: 66 0f 60 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(60) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PUNPCKLBW, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69075, 381, 2579}, + /* 2841 : PUNPCKLWD xmmreg,xmmrm [rm: 66 0f 61 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(61) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PUNPCKLWD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69081, 381, 2580}, + /* 2842 : PUNPCKLDQ xmmreg,xmmrm [rm: 66 0f 62 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(62) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PUNPCKLDQ, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69087, 381, 2581}, + /* 2843 : PUNPCKLQDQ xmmreg,xmmrm [rm: 66 0f 6c /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(6c) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PUNPCKLQDQ, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69093, 381, 2582}, + /* 2844 : PXOR xmmreg,xmmrm [rm: 66 0f ef /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(ef) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_PXOR, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69099, 381, 2583}, + /* 2845 : ADDPD xmmreg,xmmrm [rm: 66 0f 58 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(58) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_ADDPD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69105, 381, 2586}, + /* 2846 : ADDSD xmmreg,xmmrm [rm: f2 0f 58 /r ] AR0-1,SQ,SSE2,WILLAMETTE */ + /* 332 355 001(58) 110 : AR0,AR1,SQ,SSE2,WILLAMETTE */ + {I_ADDSD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69111, 385, 2587}, + /* 2847 : ANDNPD xmmreg,xmmrm [rm: 66 0f 55 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(55) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_ANDNPD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69117, 381, 2588}, + /* 2848 : ANDPD xmmreg,xmmrm [rm: 66 0f 54 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(54) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_ANDPD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69123, 381, 2589}, + /* 2849 : CMPEQPD xmmreg,xmmrm [rm: 66 0f c2 /r 00 ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(c2) 110 001(00) : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_CMPEQPD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+51531, 381, 2590}, + /* 2850 : CMPEQSD xmmreg,xmmrm [rm: f2 0f c2 /r 00 ] AR0-1,SQ,SSE2,WILLAMETTE */ + /* 332 355 001(c2) 110 001(00) : AR0,AR1,SQ,SSE2,WILLAMETTE */ + {I_CMPEQSD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+51539, 385, 2591}, + /* 2851 : CMPLEPD xmmreg,xmmrm [rm: 66 0f c2 /r 02 ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(c2) 110 001(02) : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_CMPLEPD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+51547, 381, 2592}, + /* 2852 : CMPLESD xmmreg,xmmrm [rm: f2 0f c2 /r 02 ] AR0-1,SQ,SSE2,WILLAMETTE */ + /* 332 355 001(c2) 110 001(02) : AR0,AR1,SQ,SSE2,WILLAMETTE */ + {I_CMPLESD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+51555, 385, 2593}, + /* 2853 : CMPLTPD xmmreg,xmmrm [rm: 66 0f c2 /r 01 ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(c2) 110 001(01) : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_CMPLTPD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+51563, 381, 2594}, + /* 2854 : CMPLTSD xmmreg,xmmrm [rm: f2 0f c2 /r 01 ] AR0-1,SQ,SSE2,WILLAMETTE */ + /* 332 355 001(c2) 110 001(01) : AR0,AR1,SQ,SSE2,WILLAMETTE */ + {I_CMPLTSD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+51571, 385, 2595}, + /* 2855 : CMPNEQPD xmmreg,xmmrm [rm: 66 0f c2 /r 04 ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(c2) 110 001(04) : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_CMPNEQPD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+51579, 381, 2596}, + /* 2856 : CMPNEQSD xmmreg,xmmrm [rm: f2 0f c2 /r 04 ] AR0-1,SQ,SSE2,WILLAMETTE */ + /* 332 355 001(c2) 110 001(04) : AR0,AR1,SQ,SSE2,WILLAMETTE */ + {I_CMPNEQSD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+51587, 385, 2597}, + /* 2857 : CMPNLEPD xmmreg,xmmrm [rm: 66 0f c2 /r 06 ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(c2) 110 001(06) : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_CMPNLEPD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+51595, 381, 2598}, + /* 2858 : CMPNLESD xmmreg,xmmrm [rm: f2 0f c2 /r 06 ] AR0-1,SQ,SSE2,WILLAMETTE */ + /* 332 355 001(c2) 110 001(06) : AR0,AR1,SQ,SSE2,WILLAMETTE */ + {I_CMPNLESD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+51603, 385, 2599}, + /* 2859 : CMPNLTPD xmmreg,xmmrm [rm: 66 0f c2 /r 05 ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(c2) 110 001(05) : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_CMPNLTPD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+51611, 381, 2600}, + /* 2860 : CMPNLTSD xmmreg,xmmrm [rm: f2 0f c2 /r 05 ] AR0-1,SQ,SSE2,WILLAMETTE */ + /* 332 355 001(c2) 110 001(05) : AR0,AR1,SQ,SSE2,WILLAMETTE */ + {I_CMPNLTSD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+51619, 385, 2601}, + /* 2861 : CMPORDPD xmmreg,xmmrm [rm: 66 0f c2 /r 07 ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(c2) 110 001(07) : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_CMPORDPD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+51627, 381, 2602}, + /* 2862 : CMPORDSD xmmreg,xmmrm [rm: f2 0f c2 /r 07 ] AR0-1,SQ,SSE2,WILLAMETTE */ + /* 332 355 001(c2) 110 001(07) : AR0,AR1,SQ,SSE2,WILLAMETTE */ + {I_CMPORDSD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+51635, 385, 2603}, + /* 2863 : CMPUNORDPD xmmreg,xmmrm [rm: 66 0f c2 /r 03 ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(c2) 110 001(03) : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_CMPUNORDPD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+51643, 381, 2604}, + /* 2864 : CMPUNORDSD xmmreg,xmmrm [rm: f2 0f c2 /r 03 ] AR0-1,SQ,SSE2,WILLAMETTE */ + /* 332 355 001(c2) 110 001(03) : AR0,AR1,SQ,SSE2,WILLAMETTE */ + {I_CMPUNORDSD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+51651, 385, 2605}, + /* 2865 : CMPPD xmmreg,xmmrm128,imm8 [rmi: 66 0f c2 /r ib,u ] SSE2,WILLAMETTE */ + /* 361 355 001(c2) 110 026 : SSE2,WILLAMETTE */ + {I_CMPPD, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+58106, 248, 2608}, + /* 2866 : CMPSD xmmreg,xmmrm64,imm8 [rmi: f2 0f c2 /r ib,u ] FL,SSE2,WILLAMETTE */ + /* 332 355 001(c2) 110 026 : FL,SSE2,WILLAMETTE */ + {I_CMPSD, 3, {XMMREG,RM_XMM|BITS64,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+58113, 391, 2609}, + /* 2867 : COMISD xmmreg,xmmrm64 [rm: 66 0f 2f /r ] FL,SSE2,WILLAMETTE */ + /* 361 355 001(2f) 110 : FL,SSE2,WILLAMETTE */ + {I_COMISD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+69129, 391, 2610}, + /* 2868 : CVTDQ2PD xmmreg,xmmrm [rm: f3 0f e6 /r ] AR0-1,SQ,SSE2,WILLAMETTE */ + /* 333 355 001(e6) 110 : AR0,AR1,SQ,SSE2,WILLAMETTE */ + {I_CVTDQ2PD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69135, 385, 2611}, + /* 2869 : CVTDQ2PS xmmreg,xmmrm [rm: np 0f 5b /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 360 355 001(5b) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_CVTDQ2PS, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69141, 381, 2612}, + /* 2870 : CVTPD2DQ xmmreg,xmmrm [rm: f2 0f e6 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 332 355 001(e6) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_CVTPD2DQ, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69147, 381, 2613}, + /* 2871 : CVTPD2PI mmxreg,xmmrm [rm: 66 0f 2d /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(2d) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_CVTPD2PI, 2, {MMXREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69153, 381, 2614}, + /* 2872 : CVTPD2PS xmmreg,xmmrm [rm: 66 0f 5a /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(5a) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_CVTPD2PS, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69159, 381, 2615}, + /* 2873 : CVTPI2PD xmmreg,mmxrm [rm: 66 0f 2a /r ] AR0-1,SQ,SSE2,WILLAMETTE */ + /* 361 355 001(2a) 110 : AR0,AR1,SQ,SSE2,WILLAMETTE */ + {I_CVTPI2PD, 2, {XMMREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+69165, 385, 2616}, + /* 2874 : CVTPS2DQ xmmreg,xmmrm [rm: 66 0f 5b /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(5b) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_CVTPS2DQ, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69171, 381, 2617}, + /* 2875 : CVTPS2PD xmmreg,xmmrm [rm: np 0f 5a /r ] AR0-1,SQ,SSE2,WILLAMETTE */ + /* 360 355 001(5a) 110 : AR0,AR1,SQ,SSE2,WILLAMETTE */ + {I_CVTPS2PD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69177, 385, 2618}, + /* 2876 : CVTSD2SI reg32,xmmrm64 [rm: norexw f2 0f 2d /r ] SSE2,WILLAMETTE */ + /* 317 332 355 001(2d) 110 : SSE2,WILLAMETTE */ + {I_CVTSD2SI, 2, {REG_GPR|BITS32,RM_XMM|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+58120, 248, 2619}, + /* 2877 : CVTSD2SI reg64,xmmrm64 [rm: o64 f2 0f 2d /r ] LONG,PROT,SSE2,X86_64 */ + /* 324 332 355 001(2d) 110 : LONG,PROT,SSE2,X86_64 */ + {I_CVTSD2SI, 2, {REG_GPR|BITS64,RM_XMM|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+58127, 386, 2620}, + /* 2878 : CVTSD2SS xmmreg,xmmrm64 [rm: f2 0f 5a /r ] AR0-1,SQ,SSE2,WILLAMETTE */ + /* 332 355 001(5a) 110 : AR0,AR1,SQ,SSE2,WILLAMETTE */ + {I_CVTSD2SS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+69183, 385, 2621}, + /* 2879 : CVTSI2SD xmmreg,rm32 [rm: norexw f2 0f 2a /r ] SSE2,WILLAMETTE */ + /* 317 332 355 001(2a) 110 : SSE2,WILLAMETTE */ + {I_CVTSI2SD, 2, {XMMREG,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+58134, 248, 2622}, + /* 2880 : CVTSI2SD xmmreg,rm64 [rm: o64 f2 0f 2a /r ] AR1,SX,LONG,PROT,SSE2,X86_64 */ + /* 324 332 355 001(2a) 110 : AR1,SX,LONG,PROT,SSE2,X86_64 */ + {I_CVTSI2SD, 2, {XMMREG,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+58141, 392, 2623}, + /* 2881 : CVTSS2SD xmmreg,xmmrm [rm: f3 0f 5a /r ] AR0-1,SD,SSE2,WILLAMETTE */ + /* 333 355 001(5a) 110 : AR0,AR1,SD,SSE2,WILLAMETTE */ + {I_CVTSS2SD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69189, 384, 2624}, + /* 2882 : CVTTPD2PI mmxreg,xmmrm [rm: 66 0f 2c /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(2c) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_CVTTPD2PI, 2, {MMXREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69195, 381, 2625}, + /* 2883 : CVTTPD2DQ xmmreg,xmmrm [rm: 66 0f e6 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(e6) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_CVTTPD2DQ, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69201, 381, 2626}, + /* 2884 : CVTTPS2DQ xmmreg,xmmrm [rm: f3 0f 5b /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 333 355 001(5b) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_CVTTPS2DQ, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69207, 381, 2627}, + /* 2885 : CVTTSD2SI reg32,xmmrm64 [rm: norexw f2 0f 2c /r ] SSE2,WILLAMETTE */ + /* 317 332 355 001(2c) 110 : SSE2,WILLAMETTE */ + {I_CVTTSD2SI, 2, {REG_GPR|BITS32,RM_XMM|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+58148, 248, 2628}, + /* 2886 : CVTTSD2SI reg64,xmmrm64 [rm: o64 f2 0f 2c /r ] LONG,PROT,SSE2,X86_64 */ + /* 324 332 355 001(2c) 110 : LONG,PROT,SSE2,X86_64 */ + {I_CVTTSD2SI, 2, {REG_GPR|BITS64,RM_XMM|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+58155, 386, 2629}, + /* 2887 : DIVPD xmmreg,xmmrm [rm: 66 0f 5e /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(5e) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_DIVPD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69213, 381, 2630}, + /* 2888 : DIVSD xmmreg,xmmrm [rm: f2 0f 5e /r ] AR0-1,SQ,SSE2,WILLAMETTE */ + /* 332 355 001(5e) 110 : AR0,AR1,SQ,SSE2,WILLAMETTE */ + {I_DIVSD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69219, 385, 2631}, + /* 2889 : MAXPD xmmreg,xmmrm [rm: 66 0f 5f /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(5f) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_MAXPD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69225, 381, 2632}, + /* 2890 : MAXSD xmmreg,xmmrm [rm: f2 0f 5f /r ] AR0-1,SQ,SSE2,WILLAMETTE */ + /* 332 355 001(5f) 110 : AR0,AR1,SQ,SSE2,WILLAMETTE */ + {I_MAXSD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69231, 385, 2633}, + /* 2891 : MINPD xmmreg,xmmrm [rm: 66 0f 5d /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(5d) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_MINPD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69237, 381, 2634}, + /* 2892 : MINSD xmmreg,xmmrm [rm: f2 0f 5d /r ] AR0-1,SQ,SSE2,WILLAMETTE */ + /* 332 355 001(5d) 110 : AR0,AR1,SQ,SSE2,WILLAMETTE */ + {I_MINSD, 2, {XMMREG,RM_XMM,0,0,0}, NO_DECORATOR, nasm_bytecodes+69243, 385, 2635}, + /* 2893 : MOVAPD xmmreg,xmmrm128 [rm: 66 0f 28 /r ] SSE2,WILLAMETTE */ + /* 361 355 001(28) 110 : SSE2,WILLAMETTE */ + {I_MOVAPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+69249, 248, 2636}, + /* 2894 : MOVAPD xmmrm128,xmmreg [mr: 66 0f 29 /r ] SSE2,WILLAMETTE */ + /* 361 355 001(29) 101 : SSE2,WILLAMETTE */ + {I_MOVAPD, 2, {RM_XMM|BITS128,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+69255, 248, 2637}, + /* 2895 : MOVHPD mem64,xmmreg [mr: 66 0f 17 /r ] SSE2,WILLAMETTE */ + /* 361 355 001(17) 101 : SSE2,WILLAMETTE */ + {I_MOVHPD, 2, {MEMORY|BITS64,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+69261, 248, 2638}, + /* 2896 : MOVHPD xmmreg,mem64 [rm: 66 0f 16 /r ] SSE2,WILLAMETTE */ + /* 361 355 001(16) 110 : SSE2,WILLAMETTE */ + {I_MOVHPD, 2, {XMMREG,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+69267, 248, 2639}, + /* 2897 : MOVLPD mem64,xmmreg [mr: 66 0f 13 /r ] SSE2,WILLAMETTE */ + /* 361 355 001(13) 101 : SSE2,WILLAMETTE */ + {I_MOVLPD, 2, {MEMORY|BITS64,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+69273, 248, 2640}, + /* 2898 : MOVLPD xmmreg,mem64 [rm: 66 0f 12 /r ] SSE2,WILLAMETTE */ + /* 361 355 001(12) 110 : SSE2,WILLAMETTE */ + {I_MOVLPD, 2, {XMMREG,MEMORY|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+69279, 248, 2641}, + /* 2899 : MOVMSKPD reg32,xmmreg [rm: 66 0f 50 /r ] SSE2,WILLAMETTE */ + /* 361 355 001(50) 110 : SSE2,WILLAMETTE */ + {I_MOVMSKPD, 2, {REG_GPR|BITS32,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+69285, 248, 2642}, + /* 2900 : MOVMSKPD reg64,xmmreg [rm: 66 o64 0f 50 /r ] LONG,PROT,SSE2,X86_64 */ + /* 361 324 355 001(50) 110 : LONG,PROT,SSE2,X86_64 */ + {I_MOVMSKPD, 2, {REG_GPR|BITS64,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+58162, 386, 2643}, + /* 2901 : MOVSD xmmreg,xmmrm64 [rm: f2 0f 10 /r ] SSE2,WILLAMETTE */ + /* 332 355 001(10) 110 : SSE2,WILLAMETTE */ + {I_MOVSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+69291, 248, 2644}, + /* 2902 : MOVSD xmmrm64,xmmreg [mr: f2 0f 11 /r ] SSE2,WILLAMETTE */ + /* 332 355 001(11) 101 : SSE2,WILLAMETTE */ + {I_MOVSD, 2, {RM_XMM|BITS64,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+69297, 248, 2645}, + /* 2903 : MOVUPD xmmreg,xmmrm128 [rm: 66 0f 10 /r ] SSE2,WILLAMETTE */ + /* 361 355 001(10) 110 : SSE2,WILLAMETTE */ + {I_MOVUPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+69303, 248, 2646}, + /* 2904 : MOVUPD xmmrm128,xmmreg [mr: 66 0f 11 /r ] SSE2,WILLAMETTE */ + /* 361 355 001(11) 101 : SSE2,WILLAMETTE */ + {I_MOVUPD, 2, {RM_XMM|BITS128,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+69309, 248, 2647}, + /* 2905 : MULPD xmmreg,xmmrm128 [rm: 66 0f 59 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(59) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_MULPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+69315, 381, 2648}, + /* 2906 : MULSD xmmreg,xmmrm64 [rm: f2 0f 59 /r ] AR0-1,SQ,SSE2,WILLAMETTE */ + /* 332 355 001(59) 110 : AR0,AR1,SQ,SSE2,WILLAMETTE */ + {I_MULSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+69321, 385, 2649}, + /* 2907 : ORPD xmmreg,xmmrm128 [rm: 66 0f 56 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(56) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_ORPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+69327, 381, 2650}, + /* 2908 : SHUFPD xmmreg,xmmrm128,imm8 [rmi: 66 0f c6 /r ib,u ] SSE2,WILLAMETTE */ + /* 361 355 001(c6) 110 026 : SSE2,WILLAMETTE */ + {I_SHUFPD, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+58169, 248, 2651}, + /* 2909 : SQRTPD xmmreg,xmmrm128 [rm: 66 0f 51 /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(51) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_SQRTPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+69333, 381, 2652}, + /* 2910 : SQRTSD xmmreg,xmmrm64 [rm: f2 0f 51 /r ] SSE2,WILLAMETTE */ + /* 332 355 001(51) 110 : SSE2,WILLAMETTE */ + {I_SQRTSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+69339, 248, 2653}, + /* 2911 : SUBPD xmmreg,xmmrm128 [rm: 66 0f 5c /r ] AR0-1,SO,SSE2,WILLAMETTE */ + /* 361 355 001(5c) 110 : AR0,AR1,SO,SSE2,WILLAMETTE */ + {I_SUBPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+69345, 381, 2654}, + /* 2912 : SUBSD xmmreg,xmmrm64 [rm: f2 0f 5c /r ] SSE2,WILLAMETTE */ + /* 332 355 001(5c) 110 : SSE2,WILLAMETTE */ + {I_SUBSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+69351, 248, 2655}, + /* 2913 : UCOMISD xmmreg,xmmrm64 [rm: 66 0f 2e /r ] FL,SSE2,WILLAMETTE */ + /* 361 355 001(2e) 110 : FL,SSE2,WILLAMETTE */ + {I_UCOMISD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+69357, 391, 2656}, + /* 2914 : UNPCKHPD xmmreg,xmmrm128 [rm: 66 0f 15 /r ] SSE2,WILLAMETTE */ + /* 361 355 001(15) 110 : SSE2,WILLAMETTE */ + {I_UNPCKHPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+69363, 248, 2657}, + /* 2915 : UNPCKLPD xmmreg,xmmrm128 [rm: 66 0f 14 /r ] SSE2,WILLAMETTE */ + /* 361 355 001(14) 110 : SSE2,WILLAMETTE */ + {I_UNPCKLPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+69369, 248, 2658}, + /* 2916 : XORPD xmmreg,xmmrm128 [rm: 66 0f 57 /r ] SSE2,WILLAMETTE */ + /* 361 355 001(57) 110 : SSE2,WILLAMETTE */ + {I_XORPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+69375, 248, 2659}, + /* 2917 : ADDSUBPD xmmreg,xmmrm128 [rm: 66 0f d0 /r ] AR0-1,SO,SSE3,PRESCOTT */ + /* 361 355 001(d0) 110 : AR0,AR1,SO,SSE3,PRESCOTT */ + {I_ADDSUBPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+69381, 393, 2662}, + /* 2918 : ADDSUBPS xmmreg,xmmrm128 [rm: f2 0f d0 /r ] AR0-1,SO,SSE3,PRESCOTT */ + /* 332 355 001(d0) 110 : AR0,AR1,SO,SSE3,PRESCOTT */ + {I_ADDSUBPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+69387, 393, 2663}, + /* 2919 : HADDPD xmmreg,xmmrm128 [rm: 66 0f 7c /r ] AR0-1,SO,SSE3,PRESCOTT */ + /* 361 355 001(7c) 110 : AR0,AR1,SO,SSE3,PRESCOTT */ + {I_HADDPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+69393, 393, 2664}, + /* 2920 : HADDPS xmmreg,xmmrm128 [rm: f2 0f 7c /r ] AR0-1,SO,SSE3,PRESCOTT */ + /* 332 355 001(7c) 110 : AR0,AR1,SO,SSE3,PRESCOTT */ + {I_HADDPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+69399, 393, 2665}, + /* 2921 : HSUBPD xmmreg,xmmrm128 [rm: 66 0f 7d /r ] AR0-1,SO,SSE3,PRESCOTT */ + /* 361 355 001(7d) 110 : AR0,AR1,SO,SSE3,PRESCOTT */ + {I_HSUBPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+69405, 393, 2666}, + /* 2922 : HSUBPS xmmreg,xmmrm128 [rm: f2 0f 7d /r ] AR0-1,SO,SSE3,PRESCOTT */ + /* 332 355 001(7d) 110 : AR0,AR1,SO,SSE3,PRESCOTT */ + {I_HSUBPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+69411, 393, 2667}, + /* 2923 : LDDQU xmmreg,mem128 [rm: f2 0f f0 /r ] AR0-1,SO,SSE3,PRESCOTT */ + /* 332 355 001(f0) 110 : AR0,AR1,SO,SSE3,PRESCOTT */ + {I_LDDQU, 2, {XMMREG,MEMORY|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+69417, 393, 2668}, + /* 2924 : MOVDDUP xmmreg,xmmrm64 [rm: f2 0f 12 /r ] AR0-1,SQ,SSE3,PRESCOTT */ + /* 332 355 001(12) 110 : AR0,AR1,SQ,SSE3,PRESCOTT */ + {I_MOVDDUP, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+69423, 394, 2669}, + /* 2925 : MOVSHDUP xmmreg,xmmrm128 [rm: f3 0f 16 /r ] SSE3,PRESCOTT */ + /* 333 355 001(16) 110 : SSE3,PRESCOTT */ + {I_MOVSHDUP, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+69429, 395, 2670}, + /* 2926 : MOVSLDUP xmmreg,xmmrm128 [rm: f3 0f 12 /r ] SSE3,PRESCOTT */ + /* 333 355 001(12) 110 : SSE3,PRESCOTT */ + {I_MOVSLDUP, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+69435, 395, 2671}, + /* 2927 : CLGI void [ 0f 01 dd ] VMX,FUTURE,AMD */ + /* 355 002(01 dd) : VMX,FUTURE,AMD */ + {I_CLGI, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72464, 396, 2674}, + /* 2928 : STGI void [ 0f 01 dc ] VMX,FUTURE,AMD */ + /* 355 002(01 dc) : VMX,FUTURE,AMD */ + {I_STGI, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72469, 396, 2675}, + /* 2929 : VMCALL void [ 0f 01 c1 ] VMX,FUTURE */ + /* 355 002(01 c1) : VMX,FUTURE */ + {I_VMCALL, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+69478, 397, 2676}, + /* 2930 : VMCLEAR mem [m: 66 0f c7 /6 ] VMX,FUTURE */ + /* 361 355 001(c7) 206 : VMX,FUTURE */ + {I_VMCLEAR, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+69441, 397, 2677}, + /* 2931 : VMFUNC void [ 0f 01 d4 ] VMX,FUTURE */ + /* 355 002(01 d4) : VMX,FUTURE */ + {I_VMFUNC, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72474, 397, 2678}, + /* 2932 : VMLAUNCH void [ 0f 01 c2 ] VMX,FUTURE */ + /* 355 002(01 c2) : VMX,FUTURE */ + {I_VMLAUNCH, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72479, 397, 2679}, + /* 2933 : VMLOAD void [ 0f 01 da ] VMX,FUTURE,AMD */ + /* 355 002(01 da) : VMX,FUTURE,AMD */ + {I_VMLOAD, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72484, 396, 2680}, + /* 2934 : VMMCALL void [ 0f 01 d9 ] VMX,FUTURE,AMD */ + /* 355 002(01 d9) : VMX,FUTURE,AMD */ + {I_VMMCALL, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72489, 396, 2681}, + /* 2935 : VMPTRLD mem [m: np 0f c7 /6 ] VMX,FUTURE */ + /* 360 355 001(c7) 206 : VMX,FUTURE */ + {I_VMPTRLD, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+69447, 397, 2682}, + /* 2936 : VMPTRST mem [m: np 0f c7 /7 ] VMX,FUTURE */ + /* 360 355 001(c7) 207 : VMX,FUTURE */ + {I_VMPTRST, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+69453, 397, 2683}, + /* 2937 : VMREAD rm32,reg32 [mr: np 0f 78 /r ] AR0-1,SD,NOREX,NOAPX,NOLONG,VMX,FUTURE */ + /* 360 355 001(78) 101 : AR0,AR1,SD,NOREX,NOAPX,NOLONG,VMX,FUTURE */ + {I_VMREAD, 2, {RM_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58177, 398, 2684}, + /* 2938 : VMREAD rm64,reg64 [mr: o64nw np 0f 78 /r ] AR0-1,SQ,LONG,PROT,VMX,X86_64 */ + /* 323 360 355 001(78) 101 : AR0,AR1,SQ,NWSIZE,LONG,PROT,VMX,X86_64 */ + {I_VMREAD, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+58176, 399, 2685}, + /* 2939 : VMRESUME void [ 0f 01 c3 ] VMX,FUTURE */ + /* 355 002(01 c3) : VMX,FUTURE */ + {I_VMRESUME, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72494, 397, 2686}, + /* 2940 : VMRUN void [ 0f 01 d8 ] VMX,FUTURE,AMD */ + /* 355 002(01 d8) : VMX,FUTURE,AMD */ + {I_VMRUN, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72499, 396, 2687}, + /* 2941 : VMSAVE void [ 0f 01 db ] VMX,FUTURE,AMD */ + /* 355 002(01 db) : VMX,FUTURE,AMD */ + {I_VMSAVE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72504, 396, 2688}, + /* 2942 : VMWRITE reg32,rm32 [rm: np 0f 79 /r ] AR0-1,SD,NOREX,NOAPX,NOLONG,VMX,FUTURE */ + /* 360 355 001(79) 110 : AR0,AR1,SD,NOREX,NOAPX,NOLONG,VMX,FUTURE */ + {I_VMWRITE, 2, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58184, 398, 2689}, + /* 2943 : VMWRITE reg64,rm64 [rm: o64nw np 0f 79 /r ] AR0-1,SQ,LONG,PROT,VMX,X86_64 */ + /* 323 360 355 001(79) 110 : AR0,AR1,SQ,NWSIZE,LONG,PROT,VMX,X86_64 */ + {I_VMWRITE, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+58183, 399, 2690}, + /* 2944 : VMXOFF void [ 0f 01 c4 ] VMX,FUTURE */ + /* 355 002(01 c4) : VMX,FUTURE */ + {I_VMXOFF, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72509, 397, 2691}, + /* 2945 : VMXON mem [m: f3 0f c7 /6 ] VMX,FUTURE */ + /* 333 355 001(c7) 206 : VMX,FUTURE */ + {I_VMXON, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+66374, 397, 2692}, + /* 2946 : INVEPT reg32,mem [rm: 66 0f38 80 /r ] AR0-1,SO,NOREX,NOAPX,NOLONG,VMX,FUTURE */ + /* 361 356 001(80) 110 : AR0,AR1,SO,NOREX,NOAPX,NOLONG,VMX,FUTURE */ + {I_INVEPT, 2, {REG_GPR|BITS32|RN_L16,MEMORY|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58191, 400, 2694}, + /* 2947 : INVEPT reg64,mem [rm: o64nw 66 0f38 80 /r ] AR0-1,SO,LONG,PROT,VMX,X86_64 */ + /* 323 361 356 001(80) 110 : AR0,AR1,SO,NWSIZE,NOAPX,LONG,PROT,VMX,X86_64 */ + {I_INVEPT, 2, {REG_GPR|BITS64|RN_L16,MEMORY|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58190, 401, 2695}, + /* 2948 : INVEPT reg64,mem128 [rm: evex.nf0.nd0.l0.f3.m4.w1 f0 /r ] AR0-1,SO,LONG,PROT,VMX,APX,X86_64 */ + /* 250(f4 fe 08) 300 001(f0) 110 : AR0,AR1,SO,LONG,EVEX,PROT,VMX,APX,X86_64 */ + {I_INVEPT, 2, {REG_GPR|BITS64,MEMORY|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+25717, 402, 2696}, + /* 2949 : INVVPID reg32,mem [rm: 66 0f38 81 /r ] AR0-1,SO,NOREX,NOAPX,NOLONG,VMX,FUTURE */ + /* 361 356 001(81) 110 : AR0,AR1,SO,NOREX,NOAPX,NOLONG,VMX,FUTURE */ + {I_INVVPID, 2, {REG_GPR|BITS32|RN_L16,MEMORY|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58198, 400, 2697}, + /* 2950 : INVVPID reg64,mem [rm: o64nw 66 0f38 81 /r ] AR0-1,SO,LONG,PROT,VMX,X86_64 */ + /* 323 361 356 001(81) 110 : AR0,AR1,SO,NWSIZE,NOAPX,LONG,PROT,VMX,X86_64 */ + {I_INVVPID, 2, {REG_GPR|BITS64|RN_L16,MEMORY|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58197, 401, 2698}, + /* 2951 : INVVPID reg64,mem128 [rm: evex.nf0.nd0.l0.f3.m4.w1 f1 /r ] AR0-1,SO,LONG,PROT,VMX,APX,X86_64 */ + /* 250(f4 fe 08) 300 001(f1) 110 : AR0,AR1,SO,LONG,EVEX,PROT,VMX,APX,X86_64 */ + {I_INVVPID, 2, {REG_GPR|BITS64,MEMORY|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+25726, 402, 2699}, + /* 2952 : PVALIDATE void [ f2 0f 01 ff ] VMX,FUTURE,AMD */ + /* 332 355 002(01 ff) : VMX,FUTURE,AMD */ + {I_PVALIDATE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+69459, 396, 2701}, + /* 2953 : RMPADJUST void [ f3 0f 01 fe ] VMX,FUTURE,AMD */ + /* 333 355 002(01 fe) : VMX,FUTURE,AMD */ + {I_RMPADJUST, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+69465, 396, 2702}, + /* 2954 : VMGEXIT void [ f2 0f 01 c1 ] VMX,FUTURE,AMD */ + /* 332 355 002(01 c1) : VMX,FUTURE,AMD */ + {I_VMGEXIT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+69471, 396, 2703}, + /* 2955 : VMGEXIT void [ f3 0f 01 c1 ] VMX,FUTURE,AMD */ + /* 333 355 002(01 c1) : VMX,FUTURE,AMD */ + {I_VMGEXIT, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+69477, 396, 2704}, + /* 2956 : PABSB mmxreg,mmxrm [rm: np 0f38 1c /r ] AR0-1,SQ,MMX,SSSE3,FUTURE */ + /* 360 356 001(1c) 110 : AR0,AR1,SQ,NOAPX,MMX,SSSE3,FUTURE */ + {I_PABSB, 2, {MMXREG|RN_L16,RM_MMX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69483, 403, 2707}, + /* 2957 : PABSB xmmreg,xmmrm128 [rm: 66 0f38 1c /r ] SSSE3,FUTURE */ + /* 361 356 001(1c) 110 : NOAPX,SSSE3,FUTURE */ + {I_PABSB, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69489, 404, 2708}, + /* 2958 : PABSW mmxreg,mmxrm [rm: np 0f38 1d /r ] AR0-1,SQ,MMX,SSSE3,FUTURE */ + /* 360 356 001(1d) 110 : AR0,AR1,SQ,NOAPX,MMX,SSSE3,FUTURE */ + {I_PABSW, 2, {MMXREG|RN_L16,RM_MMX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69495, 403, 2709}, + /* 2959 : PABSW xmmreg,xmmrm128 [rm: 66 0f38 1d /r ] SSSE3,FUTURE */ + /* 361 356 001(1d) 110 : NOAPX,SSSE3,FUTURE */ + {I_PABSW, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69501, 404, 2710}, + /* 2960 : PABSD mmxreg,mmxrm [rm: np 0f38 1e /r ] AR0-1,SQ,MMX,SSSE3,FUTURE */ + /* 360 356 001(1e) 110 : AR0,AR1,SQ,NOAPX,MMX,SSSE3,FUTURE */ + {I_PABSD, 2, {MMXREG|RN_L16,RM_MMX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69507, 403, 2711}, + /* 2961 : PABSD xmmreg,xmmrm128 [rm: 66 0f38 1e /r ] SSSE3,FUTURE */ + /* 361 356 001(1e) 110 : NOAPX,SSSE3,FUTURE */ + {I_PABSD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69513, 404, 2712}, + /* 2962 : PALIGNR mmxreg,mmxrm,imm [rmi: np 0f3a 0f /r ib,u ] AR0-2,SQ,MMX,SSSE3,FUTURE */ + /* 360 357 001(0f) 110 026 : AR0,AR1,AR2,SQ,NOAPX,MMX,SSSE3,FUTURE */ + {I_PALIGNR, 3, {MMXREG|RN_L16,RM_MMX|RN_L16,IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+58204, 405, 2713}, + /* 2963 : PALIGNR xmmreg,xmmrm,imm [rmi: 66 0f3a 0f /r ib,u ] SSSE3,FUTURE */ + /* 361 357 001(0f) 110 026 : NOAPX,SSSE3,FUTURE */ + {I_PALIGNR, 3, {XMMREG|RN_L16,RM_XMM|RN_L16,IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+58211, 404, 2714}, + /* 2964 : PHADDW mmxreg,mmxrm [rm: np 0f38 01 /r ] AR0-1,SQ,MMX,SSSE3,FUTURE */ + /* 360 356 001(01) 110 : AR0,AR1,SQ,NOAPX,MMX,SSSE3,FUTURE */ + {I_PHADDW, 2, {MMXREG|RN_L16,RM_MMX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69519, 403, 2715}, + /* 2965 : PHADDW xmmreg,xmmrm128 [rm: 66 0f38 01 /r ] SSSE3,FUTURE */ + /* 361 356 001(01) 110 : NOAPX,SSSE3,FUTURE */ + {I_PHADDW, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69525, 404, 2716}, + /* 2966 : PHADDD mmxreg,mmxrm [rm: np 0f38 02 /r ] AR0-1,SQ,MMX,SSSE3,FUTURE */ + /* 360 356 001(02) 110 : AR0,AR1,SQ,NOAPX,MMX,SSSE3,FUTURE */ + {I_PHADDD, 2, {MMXREG|RN_L16,RM_MMX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69531, 403, 2717}, + /* 2967 : PHADDD xmmreg,xmmrm128 [rm: 66 0f38 02 /r ] SSSE3,FUTURE */ + /* 361 356 001(02) 110 : NOAPX,SSSE3,FUTURE */ + {I_PHADDD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69537, 404, 2718}, + /* 2968 : PHADDSW mmxreg,mmxrm [rm: np 0f38 03 /r ] AR0-1,SQ,MMX,SSSE3,FUTURE */ + /* 360 356 001(03) 110 : AR0,AR1,SQ,NOAPX,MMX,SSSE3,FUTURE */ + {I_PHADDSW, 2, {MMXREG|RN_L16,RM_MMX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69543, 403, 2719}, + /* 2969 : PHADDSW xmmreg,xmmrm128 [rm: 66 0f38 03 /r ] SSSE3,FUTURE */ + /* 361 356 001(03) 110 : NOAPX,SSSE3,FUTURE */ + {I_PHADDSW, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69549, 404, 2720}, + /* 2970 : PHSUBW mmxreg,mmxrm [rm: np 0f38 05 /r ] AR0-1,SQ,MMX,SSSE3,FUTURE */ + /* 360 356 001(05) 110 : AR0,AR1,SQ,NOAPX,MMX,SSSE3,FUTURE */ + {I_PHSUBW, 2, {MMXREG|RN_L16,RM_MMX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69555, 403, 2721}, + /* 2971 : PHSUBW xmmreg,xmmrm128 [rm: 66 0f38 05 /r ] SSSE3,FUTURE */ + /* 361 356 001(05) 110 : NOAPX,SSSE3,FUTURE */ + {I_PHSUBW, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69561, 404, 2722}, + /* 2972 : PHSUBD mmxreg,mmxrm [rm: np 0f38 06 /r ] AR0-1,SQ,MMX,SSSE3,FUTURE */ + /* 360 356 001(06) 110 : AR0,AR1,SQ,NOAPX,MMX,SSSE3,FUTURE */ + {I_PHSUBD, 2, {MMXREG|RN_L16,RM_MMX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69567, 403, 2723}, + /* 2973 : PHSUBD xmmreg,xmmrm128 [rm: 66 0f38 06 /r ] SSSE3,FUTURE */ + /* 361 356 001(06) 110 : NOAPX,SSSE3,FUTURE */ + {I_PHSUBD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69573, 404, 2724}, + /* 2974 : PHSUBSW mmxreg,mmxrm [rm: np 0f38 07 /r ] AR0-1,SQ,MMX,SSSE3,FUTURE */ + /* 360 356 001(07) 110 : AR0,AR1,SQ,NOAPX,MMX,SSSE3,FUTURE */ + {I_PHSUBSW, 2, {MMXREG|RN_L16,RM_MMX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69579, 403, 2725}, + /* 2975 : PHSUBSW xmmreg,xmmrm128 [rm: 66 0f38 07 /r ] SSSE3,FUTURE */ + /* 361 356 001(07) 110 : NOAPX,SSSE3,FUTURE */ + {I_PHSUBSW, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69585, 404, 2726}, + /* 2976 : PMADDUBSW mmxreg,mmxrm [rm: np 0f38 04 /r ] AR0-1,SQ,MMX,SSSE3,FUTURE */ + /* 360 356 001(04) 110 : AR0,AR1,SQ,NOAPX,MMX,SSSE3,FUTURE */ + {I_PMADDUBSW, 2, {MMXREG|RN_L16,RM_MMX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69591, 403, 2727}, + /* 2977 : PMADDUBSW xmmreg,xmmrm128 [rm: 66 0f38 04 /r ] SSSE3,FUTURE */ + /* 361 356 001(04) 110 : NOAPX,SSSE3,FUTURE */ + {I_PMADDUBSW, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69597, 404, 2728}, + /* 2978 : PMULHRSW mmxreg,mmxrm [rm: np 0f38 0b /r ] AR0-1,SQ,MMX,SSSE3,FUTURE */ + /* 360 356 001(0b) 110 : AR0,AR1,SQ,NOAPX,MMX,SSSE3,FUTURE */ + {I_PMULHRSW, 2, {MMXREG|RN_L16,RM_MMX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69603, 403, 2729}, + /* 2979 : PMULHRSW xmmreg,xmmrm128 [rm: 66 0f38 0b /r ] SSSE3,FUTURE */ + /* 361 356 001(0b) 110 : NOAPX,SSSE3,FUTURE */ + {I_PMULHRSW, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69609, 404, 2730}, + /* 2980 : PSHUFB mmxreg,mmxrm [rm: np 0f38 00 /r ] AR0-1,SQ,MMX,SSSE3,FUTURE */ + /* 360 356 001(00) 110 : AR0,AR1,SQ,NOAPX,MMX,SSSE3,FUTURE */ + {I_PSHUFB, 2, {MMXREG|RN_L16,RM_MMX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69615, 403, 2731}, + /* 2981 : PSHUFB xmmreg,xmmrm128 [rm: 66 0f38 00 /r ] SSSE3,FUTURE */ + /* 361 356 001(00) 110 : NOAPX,SSSE3,FUTURE */ + {I_PSHUFB, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69621, 404, 2732}, + /* 2982 : PSIGNB mmxreg,mmxrm [rm: np 0f38 08 /r ] AR0-1,SQ,MMX,SSSE3,FUTURE */ + /* 360 356 001(08) 110 : AR0,AR1,SQ,NOAPX,MMX,SSSE3,FUTURE */ + {I_PSIGNB, 2, {MMXREG|RN_L16,RM_MMX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69627, 403, 2733}, + /* 2983 : PSIGNB xmmreg,xmmrm128 [rm: 66 0f38 08 /r ] SSSE3,FUTURE */ + /* 361 356 001(08) 110 : NOAPX,SSSE3,FUTURE */ + {I_PSIGNB, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69633, 404, 2734}, + /* 2984 : PSIGNW mmxreg,mmxrm [rm: np 0f38 09 /r ] AR0-1,SQ,MMX,SSSE3,FUTURE */ + /* 360 356 001(09) 110 : AR0,AR1,SQ,NOAPX,MMX,SSSE3,FUTURE */ + {I_PSIGNW, 2, {MMXREG|RN_L16,RM_MMX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69639, 403, 2735}, + /* 2985 : PSIGNW xmmreg,xmmrm128 [rm: 66 0f38 09 /r ] SSSE3,FUTURE */ + /* 361 356 001(09) 110 : NOAPX,SSSE3,FUTURE */ + {I_PSIGNW, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69645, 404, 2736}, + /* 2986 : PSIGND mmxreg,mmxrm [rm: np 0f38 0a /r ] AR0-1,SQ,MMX,SSSE3,FUTURE */ + /* 360 356 001(0a) 110 : AR0,AR1,SQ,NOAPX,MMX,SSSE3,FUTURE */ + {I_PSIGND, 2, {MMXREG|RN_L16,RM_MMX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69651, 403, 2737}, + /* 2987 : PSIGND xmmreg,xmmrm128 [rm: 66 0f38 0a /r ] SSSE3,FUTURE */ + /* 361 356 001(0a) 110 : NOAPX,SSSE3,FUTURE */ + {I_PSIGND, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69657, 404, 2738}, + /* 2988 : EXTRQ xmmreg,imm,imm [mij: 66 0f 78 /0 ib,u ib,u ] SSE4A,FUTURE,AMD */ + /* 361 355 001(78) 200 025 026 : SSE4A,FUTURE,AMD */ + {I_EXTRQ, 3, {XMMREG,IMM_NORMAL,IMM_NORMAL,0,0}, NO_DECORATOR, nasm_bytecodes+51659, 406, 2741}, + /* 2989 : EXTRQ xmmreg,xmmreg [rm: 66 0f 79 /r ] SSE4A,FUTURE,AMD */ + /* 361 355 001(79) 110 : SSE4A,FUTURE,AMD */ + {I_EXTRQ, 2, {XMMREG,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+69663, 406, 2742}, + /* 2990 : INSERTQ xmmreg,xmmreg,imm,imm [rmij: f2 0f 78 /r ib,u ib,u ] SSE4A,FUTURE,AMD */ + /* 332 355 001(78) 110 026 027 : SSE4A,FUTURE,AMD */ + {I_INSERTQ, 4, {XMMREG,XMMREG,IMM_NORMAL,IMM_NORMAL,0}, NO_DECORATOR, nasm_bytecodes+51667, 406, 2743}, + /* 2991 : INSERTQ xmmreg,xmmreg [rm: f2 0f 79 /r ] SSE4A,FUTURE,AMD */ + /* 332 355 001(79) 110 : SSE4A,FUTURE,AMD */ + {I_INSERTQ, 2, {XMMREG,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+69669, 406, 2744}, + /* 2992 : MOVNTSD mem64,xmmreg [mr: f2 0f 2b /r ] AR0-1,SQ,SSE4A,FUTURE,AMD */ + /* 332 355 001(2b) 101 : AR0,AR1,SQ,SSE4A,FUTURE,AMD */ + {I_MOVNTSD, 2, {MEMORY|BITS64,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+69675, 407, 2745}, + /* 2993 : MOVNTSS mem32,xmmreg [mr: f3 0f 2b /r ] AR0-1,SD,SSE4A,FUTURE,AMD */ + /* 333 355 001(2b) 101 : AR0,AR1,SD,SSE4A,FUTURE,AMD */ + {I_MOVNTSS, 2, {MEMORY|BITS32,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+69681, 408, 2746}, + /* 2994 : BLENDPD xmmreg,xmmrm128,imm8 [rmi: 66 0f3a 0d /r ib,u ] SSE41,FUTURE */ + /* 361 357 001(0d) 110 026 : NOAPX,SSE41,FUTURE */ + {I_BLENDPD, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+58218, 409, 2751}, + /* 2995 : BLENDPS xmmreg,xmmrm128,imm8 [rmi: 66 0f3a 0c /r ib,u ] SSE41,FUTURE */ + /* 361 357 001(0c) 110 026 : NOAPX,SSE41,FUTURE */ + {I_BLENDPS, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+58225, 409, 2752}, + /* 2996 : BLENDVPD xmmreg,xmmrm128,xmm0 [rm-: 66 0f38 15 /r ] SSE41,FUTURE */ + /* 361 356 001(15) 110 : NOAPX,SSE41,FUTURE */ + {I_BLENDVPD, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_ZERO|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+69687, 409, 2753}, + /* 2997 : BLENDVPD xmmreg,xmmrm128 [rm: 66 0f38 15 /r ] SSE41,FUTURE */ + /* 361 356 001(15) 110 : NOAPX,SSE41,FUTURE */ + {I_BLENDVPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69687, 409, 2754}, + /* 2998 : BLENDVPS xmmreg,xmmrm128,xmm0 [rm-: 66 0f38 14 /r ] SSE41,FUTURE */ + /* 361 356 001(14) 110 : NOAPX,SSE41,FUTURE */ + {I_BLENDVPS, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_ZERO|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+69693, 409, 2755}, + /* 2999 : BLENDVPS xmmreg,xmmrm128 [rm: 66 0f38 14 /r ] SSE41,FUTURE */ + /* 361 356 001(14) 110 : NOAPX,SSE41,FUTURE */ + {I_BLENDVPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69693, 409, 2756}, + /* 3000 : DPPD xmmreg,xmmrm128,imm8 [rmi: 66 0f3a 41 /r ib,u ] SSE41,FUTURE */ + /* 361 357 001(41) 110 026 : NOAPX,SSE41,FUTURE */ + {I_DPPD, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+58232, 409, 2757}, + /* 3001 : DPPS xmmreg,xmmrm128,imm8 [rmi: 66 0f3a 40 /r ib,u ] SSE41,FUTURE */ + /* 361 357 001(40) 110 026 : NOAPX,SSE41,FUTURE */ + {I_DPPS, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+58239, 409, 2758}, + /* 3002 : EXTRACTPS rm32,xmmreg,imm8 [mri: 66 0f3a 17 /r ib,u ] SSE41,FUTURE */ + /* 361 357 001(17) 101 026 : NOAPX,SSE41,FUTURE */ + {I_EXTRACTPS, 3, {RM_GPR|BITS32|RN_L16,XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+51676, 409, 2759}, + /* 3003 : EXTRACTPS reg64,xmmreg,imm8 [mri: o64 66 0f3a 17 /r ib,u ] LONG,PROT,SSE41,X86_64 */ + /* 324 361 357 001(17) 101 026 : NOAPX,LONG,PROT,SSE41,X86_64 */ + {I_EXTRACTPS, 3, {REG_GPR|BITS64|RN_L16,XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+51675, 410, 2760}, + /* 3004 : INSERTPS xmmreg,xmmrm32,imm8 [rmi: 66 0f3a 21 /r ib,u ] SSE41,FUTURE */ + /* 361 357 001(21) 110 026 : NOAPX,SSE41,FUTURE */ + {I_INSERTPS, 3, {XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+58246, 409, 2761}, + /* 3005 : MOVNTDQA xmmreg,mem128 [rm: 66 0f38 2a /r ] SSE41,FUTURE */ + /* 361 356 001(2a) 110 : NOAPX,SSE41,FUTURE */ + {I_MOVNTDQA, 2, {XMMREG|RN_L16,MEMORY|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69699, 409, 2762}, + /* 3006 : MPSADBW xmmreg,xmmrm128,imm8 [rmi: 66 0f3a 42 /r ib,u ] SSE41,FUTURE */ + /* 361 357 001(42) 110 026 : NOAPX,SSE41,FUTURE */ + {I_MPSADBW, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+58253, 409, 2763}, + /* 3007 : PACKUSDW xmmreg,xmmrm128 [rm: 66 0f38 2b /r ] SSE41,FUTURE */ + /* 361 356 001(2b) 110 : NOAPX,SSE41,FUTURE */ + {I_PACKUSDW, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69705, 409, 2764}, + /* 3008 : PBLENDVB xmmreg,xmmrm,xmm0 [rm-: 66 0f38 10 /r ] SSE41,FUTURE */ + /* 361 356 001(10) 110 : NOAPX,SSE41,FUTURE */ + {I_PBLENDVB, 3, {XMMREG|RN_L16,RM_XMM|RN_L16,XMMREG|RN_ZERO|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+69711, 409, 2765}, + /* 3009 : PBLENDVB xmmreg,xmmrm128 [rm: 66 0f38 10 /r ] SSE41,FUTURE */ + /* 361 356 001(10) 110 : NOAPX,SSE41,FUTURE */ + {I_PBLENDVB, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69711, 409, 2766}, + /* 3010 : PBLENDW xmmreg,xmmrm128,imm8 [rmi: 66 0f3a 0e /r ib,u ] SSE41,FUTURE */ + /* 361 357 001(0e) 110 026 : NOAPX,SSE41,FUTURE */ + {I_PBLENDW, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+58260, 409, 2767}, + /* 3011 : PCMPEQQ xmmreg,xmmrm128 [rm: 66 0f38 29 /r ] SSE41,FUTURE */ + /* 361 356 001(29) 110 : NOAPX,SSE41,FUTURE */ + {I_PCMPEQQ, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69717, 409, 2768}, + /* 3012 : PEXTRB reg32,xmmreg,imm8 [mri: 66 0f3a 14 /r ib,u ] SSE41,FUTURE */ + /* 361 357 001(14) 101 026 : NOAPX,SSE41,FUTURE */ + {I_PEXTRB, 3, {REG_GPR|BITS32|RN_L16,XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+51684, 409, 2769}, + /* 3013 : PEXTRB mem8,xmmreg,imm8 [mri: 66 0f3a 14 /r ib,u ] SSE41,FUTURE */ + /* 361 357 001(14) 101 026 : NOAPX,SSE41,FUTURE */ + {I_PEXTRB, 3, {MEMORY|BITS8|RN_L16,XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+51684, 409, 2770}, + /* 3014 : PEXTRB reg64,xmmreg,imm8 [mri: o64nw 66 0f3a 14 /r ib,u ] LONG,PROT,SSE41,X86_64 */ + /* 323 361 357 001(14) 101 026 : NWSIZE,NOAPX,LONG,PROT,SSE41,X86_64 */ + {I_PEXTRB, 3, {REG_GPR|BITS64|RN_L16,XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+51683, 411, 2771}, + /* 3015 : PEXTRD rm32,xmmreg,imm8 [mri: norexw 66 0f3a 16 /r ib,u ] SSE41,FUTURE */ + /* 317 361 357 001(16) 101 026 : NOAPX,SSE41,FUTURE */ + {I_PEXTRD, 3, {RM_GPR|BITS32|RN_L16,XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+51691, 409, 2772}, + /* 3016 : PEXTRQ rm64,xmmreg,imm8 [mri: o64 66 0f3a 16 /r ib,u ] LONG,PROT,SSE41,X86_64 */ + /* 324 361 357 001(16) 101 026 : NOAPX,LONG,PROT,SSE41,X86_64 */ + {I_PEXTRQ, 3, {RM_GPR|BITS64|RN_L16,XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+51699, 410, 2773}, + /* 3017 : PEXTRW reg32,xmmreg,imm8 [mri: 66 0f3a 15 /r ib,u ] SSE41,FUTURE */ + /* 361 357 001(15) 101 026 : NOAPX,SSE41,FUTURE */ + {I_PEXTRW, 3, {REG_GPR|BITS32|RN_L16,XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+51708, 409, 2774}, + /* 3018 : PEXTRW mem16,xmmreg,imm8 [mri: 66 0f3a 15 /r ib,u ] SSE41,FUTURE */ + /* 361 357 001(15) 101 026 : NOAPX,SSE41,FUTURE */ + {I_PEXTRW, 3, {MEMORY|BITS16|RN_L16,XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+51708, 409, 2775}, + /* 3019 : PEXTRW reg64,xmmreg,imm8 [mri: o64 66 0f3a 15 /r ib,u ] LONG,PROT,SSE41,X86_64 */ + /* 324 361 357 001(15) 101 026 : NOAPX,LONG,PROT,SSE41,X86_64 */ + {I_PEXTRW, 3, {REG_GPR|BITS64|RN_L16,XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+51707, 410, 2776}, + /* 3020 : PHMINPOSUW xmmreg,xmmrm128 [rm: 66 0f38 41 /r ] SSE41,FUTURE */ + /* 361 356 001(41) 110 : NOAPX,SSE41,FUTURE */ + {I_PHMINPOSUW, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69723, 409, 2777}, + /* 3021 : PINSRB xmmreg,mem,imm8 [rmi: 66 0f3a 20 /r ib,u ] AR2,SB,SSE41,FUTURE */ + /* 361 357 001(20) 110 026 : AR2,SB,NOAPX,SSE41,FUTURE */ + {I_PINSRB, 3, {XMMREG|RN_L16,MEMORY|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+51716, 412, 2778}, + /* 3022 : PINSRB xmmreg,rm8,imm8 [rmi: nohi 66 0f3a 20 /r ib,u ] AR2,SB,SSE41,FUTURE */ + /* 325 361 357 001(20) 110 026 : AR2,SB,NOAPX,SSE41,FUTURE */ + {I_PINSRB, 3, {XMMREG|RN_L16,RM_GPR|BITS8|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+51715, 412, 2779}, + /* 3023 : PINSRB xmmreg,reg32,imm8 [rmi: 66 0f3a 20 /r ib,u ] AR2,SB,SSE41,FUTURE */ + /* 361 357 001(20) 110 026 : AR2,SB,NOAPX,SSE41,FUTURE */ + {I_PINSRB, 3, {XMMREG|RN_L16,REG_GPR|BITS32|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+51716, 412, 2780}, + /* 3024 : PINSRD xmmreg,rm32,imm8 [rmi: norexw 66 0f3a 22 /r ib,u ] AR2,SB,SSE41,FUTURE */ + /* 317 361 357 001(22) 110 026 : AR2,SB,NOAPX,SSE41,FUTURE */ + {I_PINSRD, 3, {XMMREG|RN_L16,RM_GPR|BITS32|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+51723, 412, 2781}, + /* 3025 : PINSRQ xmmreg,rm64,imm8 [rmi: o64 66 0f3a 22 /r ib,u ] AR2,SB,LONG,PROT,SSE41,X86_64 */ + /* 324 361 357 001(22) 110 026 : AR2,SB,NOAPX,LONG,PROT,SSE41,X86_64 */ + {I_PINSRQ, 3, {XMMREG|RN_L16,RM_GPR|BITS64|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+51731, 413, 2782}, + /* 3026 : PMAXSB xmmreg,xmmrm128 [rm: 66 0f38 3c /r ] SSE41,FUTURE */ + /* 361 356 001(3c) 110 : NOAPX,SSE41,FUTURE */ + {I_PMAXSB, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69729, 409, 2783}, + /* 3027 : PMAXSD xmmreg,xmmrm128 [rm: 66 0f38 3d /r ] SSE41,FUTURE */ + /* 361 356 001(3d) 110 : NOAPX,SSE41,FUTURE */ + {I_PMAXSD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69735, 409, 2784}, + /* 3028 : PMAXUD xmmreg,xmmrm128 [rm: 66 0f38 3f /r ] SSE41,FUTURE */ + /* 361 356 001(3f) 110 : NOAPX,SSE41,FUTURE */ + {I_PMAXUD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69741, 409, 2785}, + /* 3029 : PMAXUW xmmreg,xmmrm128 [rm: 66 0f38 3e /r ] SSE41,FUTURE */ + /* 361 356 001(3e) 110 : NOAPX,SSE41,FUTURE */ + {I_PMAXUW, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69747, 409, 2786}, + /* 3030 : PMINSB xmmreg,xmmrm128 [rm: 66 0f38 38 /r ] SSE41,FUTURE */ + /* 361 356 001(38) 110 : NOAPX,SSE41,FUTURE */ + {I_PMINSB, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69753, 409, 2787}, + /* 3031 : PMINSD xmmreg,xmmrm128 [rm: 66 0f38 39 /r ] SSE41,FUTURE */ + /* 361 356 001(39) 110 : NOAPX,SSE41,FUTURE */ + {I_PMINSD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69759, 409, 2788}, + /* 3032 : PMINUD xmmreg,xmmrm128 [rm: 66 0f38 3b /r ] SSE41,FUTURE */ + /* 361 356 001(3b) 110 : NOAPX,SSE41,FUTURE */ + {I_PMINUD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69765, 409, 2789}, + /* 3033 : PMINUW xmmreg,xmmrm128 [rm: 66 0f38 3a /r ] SSE41,FUTURE */ + /* 361 356 001(3a) 110 : NOAPX,SSE41,FUTURE */ + {I_PMINUW, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69771, 409, 2790}, + /* 3034 : PMOVSXBW xmmreg,xmmrm64 [rm: 66 0f38 20 /r ] AR0-1,SQ,SSE41,FUTURE */ + /* 361 356 001(20) 110 : AR0,AR1,SQ,NOAPX,SSE41,FUTURE */ + {I_PMOVSXBW, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69777, 414, 2791}, + /* 3035 : PMOVSXBD xmmreg,xmmrm32 [rm: 66 0f38 21 /r ] AR0-1,SD,SSE41,FUTURE */ + /* 361 356 001(21) 110 : AR0,AR1,SD,NOAPX,SSE41,FUTURE */ + {I_PMOVSXBD, 2, {XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69783, 415, 2792}, + /* 3036 : PMOVSXBQ xmmreg,xmmrm16 [rm: 66 0f38 22 /r ] AR0-1,SW,SSE41,FUTURE */ + /* 361 356 001(22) 110 : AR0,AR1,SW,NOAPX,SSE41,FUTURE */ + {I_PMOVSXBQ, 2, {XMMREG|RN_L16,RM_XMM|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69789, 416, 2793}, + /* 3037 : PMOVSXWD xmmreg,xmmrm64 [rm: 66 0f38 23 /r ] AR0-1,SQ,SSE41,FUTURE */ + /* 361 356 001(23) 110 : AR0,AR1,SQ,NOAPX,SSE41,FUTURE */ + {I_PMOVSXWD, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69795, 414, 2794}, + /* 3038 : PMOVSXWQ xmmreg,xmmrm32 [rm: 66 0f38 24 /r ] AR0-1,SD,SSE41,FUTURE */ + /* 361 356 001(24) 110 : AR0,AR1,SD,NOAPX,SSE41,FUTURE */ + {I_PMOVSXWQ, 2, {XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69801, 415, 2795}, + /* 3039 : PMOVSXDQ xmmreg,xmmrm64 [rm: 66 0f38 25 /r ] AR0-1,SQ,SSE41,FUTURE */ + /* 361 356 001(25) 110 : AR0,AR1,SQ,NOAPX,SSE41,FUTURE */ + {I_PMOVSXDQ, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69807, 414, 2796}, + /* 3040 : PMOVZXBW xmmreg,xmmrm64 [rm: 66 0f38 30 /r ] AR0-1,SQ,SSE41,FUTURE */ + /* 361 356 001(30) 110 : AR0,AR1,SQ,NOAPX,SSE41,FUTURE */ + {I_PMOVZXBW, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69813, 414, 2797}, + /* 3041 : PMOVZXBD xmmreg,xmmrm32 [rm: 66 0f38 31 /r ] AR0-1,SD,SSE41,FUTURE */ + /* 361 356 001(31) 110 : AR0,AR1,SD,NOAPX,SSE41,FUTURE */ + {I_PMOVZXBD, 2, {XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69819, 415, 2798}, + /* 3042 : PMOVZXBQ xmmreg,xmmrm16 [rm: 66 0f38 32 /r ] AR0-1,SW,SSE41,FUTURE */ + /* 361 356 001(32) 110 : AR0,AR1,SW,NOAPX,SSE41,FUTURE */ + {I_PMOVZXBQ, 2, {XMMREG|RN_L16,RM_XMM|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69825, 416, 2799}, + /* 3043 : PMOVZXWD xmmreg,xmmrm64 [rm: 66 0f38 33 /r ] AR0-1,SQ,SSE41,FUTURE */ + /* 361 356 001(33) 110 : AR0,AR1,SQ,NOAPX,SSE41,FUTURE */ + {I_PMOVZXWD, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69831, 414, 2800}, + /* 3044 : PMOVZXWQ xmmreg,xmmrm32 [rm: 66 0f38 34 /r ] AR0-1,SD,SSE41,FUTURE */ + /* 361 356 001(34) 110 : AR0,AR1,SD,NOAPX,SSE41,FUTURE */ + {I_PMOVZXWQ, 2, {XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69837, 415, 2801}, + /* 3045 : PMOVZXDQ xmmreg,xmmrm64 [rm: 66 0f38 35 /r ] AR0-1,SQ,SSE41,FUTURE */ + /* 361 356 001(35) 110 : AR0,AR1,SQ,NOAPX,SSE41,FUTURE */ + {I_PMOVZXDQ, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69843, 414, 2802}, + /* 3046 : PMULDQ xmmreg,xmmrm128 [rm: 66 0f38 28 /r ] SSE41,FUTURE */ + /* 361 356 001(28) 110 : NOAPX,SSE41,FUTURE */ + {I_PMULDQ, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69849, 409, 2803}, + /* 3047 : PMULLD xmmreg,xmmrm128 [rm: 66 0f38 40 /r ] SSE41,FUTURE */ + /* 361 356 001(40) 110 : NOAPX,SSE41,FUTURE */ + {I_PMULLD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69855, 409, 2804}, + /* 3048 : PTEST xmmreg,xmmrm128 [rm: 66 0f38 17 /r ] SSE41,FUTURE */ + /* 361 356 001(17) 110 : NOAPX,SSE41,FUTURE */ + {I_PTEST, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69861, 409, 2805}, + /* 3049 : ROUNDPD xmmreg,xmmrm128,imm8 [rmi: 66 0f3a 09 /r ib,u ] SSE41,FUTURE */ + /* 361 357 001(09) 110 026 : NOAPX,SSE41,FUTURE */ + {I_ROUNDPD, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+58267, 409, 2806}, + /* 3050 : ROUNDPS xmmreg,xmmrm128,imm8 [rmi: 66 0f3a 08 /r ib,u ] SSE41,FUTURE */ + /* 361 357 001(08) 110 026 : NOAPX,SSE41,FUTURE */ + {I_ROUNDPS, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+58274, 409, 2807}, + /* 3051 : ROUNDSD xmmreg,xmmrm64,imm8 [rmi: 66 0f3a 0b /r ib,u ] SSE41,FUTURE */ + /* 361 357 001(0b) 110 026 : NOAPX,SSE41,FUTURE */ + {I_ROUNDSD, 3, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+58281, 409, 2808}, + /* 3052 : ROUNDSS xmmreg,xmmrm32,imm8 [rmi: 66 0f3a 0a /r ib,u ] SSE41,FUTURE */ + /* 361 357 001(0a) 110 026 : NOAPX,SSE41,FUTURE */ + {I_ROUNDSS, 3, {XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+58288, 409, 2809}, + /* 3053 : CRC32 reg32,rm8 [rm: o8 f2 0f38 f0 /r ] SSE42,FUTURE */ + /* 332 356 001(f0) 110 : NOAPX,SSE42,FUTURE */ + {I_CRC32, 2, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58317, 417, 2812}, + /* 3054 : CRC32 reg32,rm16 [rm: o16 f2 0f38 f1 /r ] SSE42,FUTURE */ + /* 320 332 356 001(f1) 110 : NOAPX,SSE42,FUTURE */ + {I_CRC32, 2, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58295, 417, 2813}, + /* 3055 : CRC32 reg32,rm32 [rm: o32 f2 0f38 f1 /r ] SSE42,FUTURE */ + /* 321 332 356 001(f1) 110 : NOAPX,SSE42,FUTURE */ + {I_CRC32, 2, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58302, 417, 2814}, + /* 3056 : CRC32 reg32,rm8 [rm: evex.l0.m4.o8 f0 /r ] LONG,PROT,SSE42,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(f0) 110 : WIG,LONG,EVEX,PROT,SSE42,APX,X86_64 */ + {I_CRC32, 2, {REG_GPR|BITS32,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+25735, 419, 2816}, + /* 3057 : CRC32 reg32,rm16 [rm: evex.l0.m4.o16 f1 /r ] LONG,PROT,SSE42,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(f1) 110 : LONG,EVEX,PROT,SSE42,APX,X86_64 */ + {I_CRC32, 2, {REG_GPR|BITS32,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+17923, 420, 2817}, + /* 3058 : CRC32 reg32,rm32 [rm: evex.l0.m4.o32 f1 /r ] LONG,PROT,SSE42,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(f1) 110 : WW,LONG,EVEX,PROT,SSE42,APX,X86_64 */ + {I_CRC32, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17933, 421, 2818}, + /* 3059 : CRC32 reg64,rm8 [rm: o8 f2 0f38 f0 /r ] OPT,LONG,PROT,SSE42,X86_64 */ + /* 332 356 001(f0) 110 : OPT,NOAPX,LONG,PROT,SSE42,X86_64 */ + {I_CRC32, 2, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58317, 422, 2820}, + /* 3060 : CRC32 reg64,rm16 [rm: o16 f2 0f38 f1 /r ] LONG,PROT,SSE42,X86_64 */ + /* 320 332 356 001(f1) 110 : NOAPX,LONG,PROT,SSE42,X86_64 */ + {I_CRC32, 2, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58295, 418, 2821}, + /* 3061 : CRC32 reg64,rm32 [rm: o32 f2 0f38 f1 /r ] LONG,PROT,SSE42,X86_64 */ + /* 321 332 356 001(f1) 110 : NOAPX,LONG,PROT,SSE42,X86_64 */ + {I_CRC32, 2, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58302, 418, 2822}, + /* 3062 : CRC32 reg64,rm64 [rm: o64 f2 0f38 f1 /r ] LONG,PROT,SSE42,X86_64 */ + /* 324 332 356 001(f1) 110 : NOAPX,LONG,PROT,SSE42,X86_64 */ + {I_CRC32, 2, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58309, 418, 2823}, + /* 3063 : CRC32 reg64,rm8 [rm: evex.l0.m4.o8 f0 /r ] OPT,LONG,PROT,SSE42,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(f0) 110 : OPT,WIG,LONG,EVEX,PROT,SSE42,APX,X86_64 */ + {I_CRC32, 2, {REG_GPR|BITS64,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+25735, 423, 2824}, + /* 3064 : CRC32 reg64,rm16 [rm: evex.l0.m4.o16 f1 /r ] LONG,PROT,SSE42,APX,X86_64 */ + /* 250(f4 7d 08) 300 320 001(f1) 110 : LONG,EVEX,PROT,SSE42,APX,X86_64 */ + {I_CRC32, 2, {REG_GPR|BITS64,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+17923, 420, 2825}, + /* 3065 : CRC32 reg64,rm32 [rm: evex.l0.m4.o32 f1 /r ] LONG,PROT,SSE42,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(f1) 110 : WW,LONG,EVEX,PROT,SSE42,APX,X86_64 */ + {I_CRC32, 2, {REG_GPR|BITS64,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17933, 421, 2826}, + /* 3066 : CRC32 reg64,rm64 [rm: evex.l0.m4.o64 f1 /r ] LONG,PROT,SSE42,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(f1) 110 : WW,LONG,EVEX,PROT,SSE42,APX,X86_64 */ + {I_CRC32, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17943, 421, 2827}, + /* 3067 : CRC32 reg64,rm8 [rm: o64 f2 0f38 f0 /r ] LONG,SSE42,X86_64,FUTURE */ + /* 324 332 356 001(f0) 110 : NOAPX,LONG,PROT,SSE42,FUTURE */ + {I_CRC32, 2, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58316, 424, 2829}, + /* 3068 : CRC32 reg64,rm8 [rm: evex.l0.m4.o64 f0 /r ] LONG,PROT,SSE42,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(f0) 110 : WW,LONG,EVEX,PROT,SSE42,APX,X86_64 */ + {I_CRC32, 2, {REG_GPR|BITS64,RM_GPR|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+17953, 421, 2830}, + /* 3069 : PCMPESTRI xmmreg,xmmrm128,imm8 [rmi: 66 0f3a 61 /r ib,u ] SSE42,FUTURE */ + /* 361 357 001(61) 110 026 : NOAPX,SSE42,FUTURE */ + {I_PCMPESTRI, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+58323, 417, 2832}, + /* 3070 : PCMPESTRM xmmreg,xmmrm128,imm8 [rmi: 66 0f3a 60 /r ib,u ] SSE42,FUTURE */ + /* 361 357 001(60) 110 026 : NOAPX,SSE42,FUTURE */ + {I_PCMPESTRM, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+58330, 417, 2833}, + /* 3071 : PCMPISTRI xmmreg,xmmrm128,imm8 [rmi: 66 0f3a 63 /r ib,u ] SSE42,FUTURE */ + /* 361 357 001(63) 110 026 : NOAPX,SSE42,FUTURE */ + {I_PCMPISTRI, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+58337, 417, 2834}, + /* 3072 : PCMPISTRM xmmreg,xmmrm128,imm8 [rmi: 66 0f3a 62 /r ib,u ] SSE42,FUTURE */ + /* 361 357 001(62) 110 026 : NOAPX,SSE42,FUTURE */ + {I_PCMPISTRM, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+58344, 417, 2835}, + /* 3073 : PCMPGTQ xmmreg,xmmrm128 [rm: 66 0f38 37 /r ] SSE42,FUTURE */ + /* 361 356 001(37) 110 : NOAPX,SSE42,FUTURE */ + {I_PCMPGTQ, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69867, 417, 2836}, + /* 3074 : POPCNT reg16,rm16 [rm: o16 f3i 0f b8 /r ] AR0-1,SW,FL,NEHALEM */ + /* 320 333 355 001(b8) 110 : AR0,AR1,SW,FL,NEHALEM */ + {I_POPCNT, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58351, 425, 2837}, + /* 3075 : POPCNT reg32,rm32 [rm: o32 f3i 0f b8 /r ] AR0-1,SD,FL,NEHALEM */ + /* 321 333 355 001(b8) 110 : AR0,AR1,SD,FL,NEHALEM */ + {I_POPCNT, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+58358, 426, 2838}, + /* 3076 : POPCNT reg64,rm64 [rm: o64 f3i 0f b8 /r ] AR0-1,SQ,LONG,FL,PROT,X86_64,NEHALEM */ + /* 324 333 355 001(b8) 110 : AR0,AR1,SQ,LONG,FL,PROT,NEHALEM */ + {I_POPCNT, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+58365, 427, 2839}, + /* 3077 : POPCNT reg16,rm16 [rm: evex.nf.nd0.l0.m4.o16 88 /r ] SM0-1,NF,LONG,PROT,APX,X86_64,NEHALEM */ + /* 250(f4 7d 08) 300 320 001(88) 110 : SM0,SM1,NF,NF_E,LONG,EVEX,PROT,APX,NEHALEM */ + {I_POPCNT, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+17963, 428, 2840}, + /* 3078 : POPCNT reg32,rm32 [rm: evex.nf.nd0.l0.m4.o32 88 /r ] SM0-1,NF,LONG,PROT,APX,X86_64,NEHALEM */ + /* 250(f4 7c 08) 300 321 001(88) 110 : SM0,SM1,NF,NF_E,WW,LONG,EVEX,PROT,APX,NEHALEM */ + {I_POPCNT, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+17973, 429, 2841}, + /* 3079 : POPCNT reg64,rm64 [rm: evex.nf.nd0.l0.m4.o64 88 /r ] SM0-1,NF,LONG,PROT,APX,X86_64,NEHALEM */ + /* 250(f4 fc 08) 300 324 001(88) 110 : SM0,SM1,NF,NF_E,WW,LONG,EVEX,PROT,APX,NEHALEM */ + {I_POPCNT, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+17983, 429, 2842}, + /* 3080 : GETSEC void [ 0f 37 ] NOAPX,FL,KATMAI */ + /* 355 001(37) : NOAPX,FL,KATMAI */ + {I_GETSEC, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+73444, 430, 2845}, + /* 3081 : PFRCPV mmxreg,mmxrm [rm: 0f 0f /r 86 ] AR0-1,SQ,3DNOW,PENT,CYRIX */ + /* 355 001(0f) 110 001(86) : AR0,AR1,SQ,3DNOW,PENT,CYRIX */ + {I_PFRCPV, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+58372, 431, 2848}, + /* 3082 : PFRSQRTV mmxreg,mmxrm [rm: 0f 0f /r 87 ] AR0-1,SQ,3DNOW,PENT,CYRIX */ + /* 355 001(0f) 110 001(87) : AR0,AR1,SQ,3DNOW,PENT,CYRIX */ + {I_PFRSQRTV, 2, {MMXREG,RM_MMX,0,0,0}, NO_DECORATOR, nasm_bytecodes+58379, 431, 2849}, + /* 3083 : AESENC xmmreg,xmmrm128 [rm: 66 0f38 dc /r ] SSE,WESTMERE */ + /* 361 356 001(dc) 110 : NOAPX,SSE,WESTMERE */ + {I_AESENC, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69873, 432, 2855}, + /* 3084 : AESENCLAST xmmreg,xmmrm128 [rm: 66 0f38 dd /r ] SSE,WESTMERE */ + /* 361 356 001(dd) 110 : NOAPX,SSE,WESTMERE */ + {I_AESENCLAST, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69879, 432, 2856}, + /* 3085 : AESDEC xmmreg,xmmrm128 [rm: 66 0f38 de /r ] SSE,WESTMERE */ + /* 361 356 001(de) 110 : NOAPX,SSE,WESTMERE */ + {I_AESDEC, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69885, 432, 2857}, + /* 3086 : AESDECLAST xmmreg,xmmrm128 [rm: 66 0f38 df /r ] SSE,WESTMERE */ + /* 361 356 001(df) 110 : NOAPX,SSE,WESTMERE */ + {I_AESDECLAST, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69891, 432, 2858}, + /* 3087 : AESIMC xmmreg,xmmrm128 [rm: 66 0f38 db /r ] SSE,WESTMERE */ + /* 361 356 001(db) 110 : NOAPX,SSE,WESTMERE */ + {I_AESIMC, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69897, 432, 2859}, + /* 3088 : AESKEYGENASSIST xmmreg,xmmrm128,imm8 [rmi: 66 0f3a df /r ib ] SSE,WESTMERE */ + /* 361 357 001(df) 110 022 : NOAPX,SSE,WESTMERE */ + {I_AESKEYGENASSIST, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+58386, 432, 2860}, + /* 3089 : VAESENC xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 dc /r ] AVX,SANDYBRIDGE */ + /* 261(002 001) 001(dc) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VAESENC, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+58393, 433, 2863}, + /* 3090 : VAESENCLAST xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 dd /r ] AVX,SANDYBRIDGE */ + /* 261(002 001) 001(dd) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VAESENCLAST, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+58407, 433, 2864}, + /* 3091 : VAESDEC xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 de /r ] AVX,SANDYBRIDGE */ + /* 261(002 001) 001(de) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VAESDEC, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+58421, 433, 2865}, + /* 3092 : VAESDECLAST xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 df /r ] AVX,SANDYBRIDGE */ + /* 261(002 001) 001(df) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VAESDECLAST, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+58435, 433, 2866}, + /* 3093 : VAESIMC xmmreg,xmmrm128 [rm: vex.128.66.0f38 db /r ] AVX,SANDYBRIDGE */ + /* 270(002 001) 001(db) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VAESIMC, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58449, 433, 2867}, + /* 3094 : VAESKEYGENASSIST xmmreg,xmmrm128,imm8 [rmi: vex.128.66.0f3a df /r ib ] AVX,SANDYBRIDGE */ + /* 270(003 001) 001(df) 110 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VAESKEYGENASSIST, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+51739, 433, 2868}, + /* 3095 : AESDEC128KL xmmreg,mem [rm: f3 0f38 dd /r ] FL,AESKLE,FUTURE */ + /* 333 356 001(dd) 110 : NOAPX,FL,AESKLE,FUTURE */ + {I_AESDEC128KL, 2, {XMMREG|RN_L16,MEMORY|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69903, 434, 2871}, + /* 3096 : AESDEC256KL xmmreg,mem512 [rm: f3 0f38 df /r ] FL,AESKLE,FUTURE */ + /* 333 356 001(df) 110 : NOAPX,FL,AESKLE,FUTURE */ + {I_AESDEC256KL, 2, {XMMREG|RN_L16,MEMORY|BITS512|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69909, 434, 2872}, + /* 3097 : AESENC128KL xmmreg,mem [rm: f3 0f38 dc /r ] FL,AESKLE,FUTURE */ + /* 333 356 001(dc) 110 : NOAPX,FL,AESKLE,FUTURE */ + {I_AESENC128KL, 2, {XMMREG|RN_L16,MEMORY|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69915, 434, 2873}, + /* 3098 : AESENC256KL xmmreg,mem512 [rm: f3 0f38 de /r ] FL,AESKLE,FUTURE */ + /* 333 356 001(de) 110 : NOAPX,FL,AESKLE,FUTURE */ + {I_AESENC256KL, 2, {XMMREG|RN_L16,MEMORY|BITS512|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69921, 434, 2874}, + /* 3099 : ENCODEKEY128 reg32,reg32 [rm: f3 0f38 fa /r ] AESKLE,FUTURE */ + /* 333 356 001(fa) 110 : NOAPX,AESKLE,FUTURE */ + {I_ENCODEKEY128, 2, {REG_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69927, 435, 2875}, + /* 3100 : ENCODEKEY256 reg32,reg32 [rm: f3 0f38 fb /r ] AESKLE,FUTURE */ + /* 333 356 001(fb) 110 : NOAPX,AESKLE,FUTURE */ + {I_ENCODEKEY256, 2, {REG_GPR|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69933, 435, 2876}, + /* 3101 : LOADIWKEY xmmreg,xmmreg [rm: f3 0f38 dc /r ] FL,AESKLE,FUTURE */ + /* 333 356 001(dc) 110 : NOAPX,FL,AESKLE,FUTURE */ + {I_LOADIWKEY, 2, {XMMREG|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+69915, 434, 2877}, + /* 3102 : AESDECWIDE128KL mem [m: f3 0f38 d8 /1 ] FL,AESKLEWIDE_KL,FUTURE */ + /* 333 356 001(d8) 201 : NOAPX,FL,AESKLEWIDE_KL,FUTURE */ + {I_AESDECWIDE128KL, 1, {MEMORY|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+69939, 436, 2878}, + /* 3103 : AESDECWIDE256KL mem512 [m: f3 0f38 d8 /3 ] FL,AESKLEWIDE_KL,FUTURE */ + /* 333 356 001(d8) 203 : NOAPX,FL,AESKLEWIDE_KL,FUTURE */ + {I_AESDECWIDE256KL, 1, {MEMORY|BITS512|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+69945, 436, 2879}, + /* 3104 : AESENCWIDE128KL mem [m: f3 0f38 d8 /0 ] FL,AESKLEWIDE_KL,FUTURE */ + /* 333 356 001(d8) 200 : NOAPX,FL,AESKLEWIDE_KL,FUTURE */ + {I_AESENCWIDE128KL, 1, {MEMORY|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+69951, 436, 2880}, + /* 3105 : AESENCWIDE256KL mem512 [m: f3 0f38 d8 /2 ] FL,AESKLEWIDE_KL,FUTURE */ + /* 333 356 001(d8) 202 : NOAPX,FL,AESKLEWIDE_KL,FUTURE */ + {I_AESENCWIDE256KL, 1, {MEMORY|BITS512|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+69957, 436, 2881}, + /* 3106 : VAESENC ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38.wig dc /r ] VAES,FUTURE */ + /* 261(002 005) 001(dc) 120 : NOAPX,WIG,VEX,VAES,FUTURE */ + {I_VAESENC, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+58456, 437, 2886}, + /* 3107 : VAESENCLAST ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38.wig dd /r ] VAES,FUTURE */ + /* 261(002 005) 001(dd) 120 : NOAPX,WIG,VEX,VAES,FUTURE */ + {I_VAESENCLAST, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+58470, 437, 2887}, + /* 3108 : VAESDEC ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38.wig de /r ] VAES,FUTURE */ + /* 261(002 005) 001(de) 120 : NOAPX,WIG,VEX,VAES,FUTURE */ + {I_VAESDEC, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+58484, 437, 2888}, + /* 3109 : VAESDECLAST ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38.wig df /r ] VAES,FUTURE */ + /* 261(002 005) 001(df) 120 : NOAPX,WIG,VEX,VAES,FUTURE */ + {I_VAESDECLAST, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+58498, 437, 2889}, + /* 3110 : VAESENC xmmreg,xmmreg*,xmmrm128 [rvm:fv: evex.nds.128.66.0f38.wig dc /r ] AVX512,AVX512VL,VAES,FUTURE */ + /* 241(f2 7d 08) 301 001(dc) 120 : WIG,EVEX,PROT,AVX512,AVX512VL,VAES,FUTURE */ + {I_VAESENC, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+25744, 438, 2892}, + /* 3111 : VAESENC ymmreg,ymmreg*,ymmrm256 [rvm:fv: evex.nds.256.66.0f38.wig dc /r ] AVX512,AVX512VL,VAES,FUTURE */ + /* 241(f2 7d 28) 301 001(dc) 120 : WIG,EVEX,PROT,AVX512,AVX512VL,VAES,FUTURE */ + {I_VAESENC, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+25762, 438, 2893}, + /* 3112 : VAESENCLAST xmmreg,xmmreg*,xmmrm128 [rvm:fv: evex.nds.128.66.0f38.wig dd /r ] AVX512,AVX512VL,VAES,FUTURE */ + /* 241(f2 7d 08) 301 001(dd) 120 : WIG,EVEX,PROT,AVX512,AVX512VL,VAES,FUTURE */ + {I_VAESENCLAST, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+25780, 438, 2894}, + /* 3113 : VAESENCLAST ymmreg,ymmreg*,ymmrm256 [rvm:fv: evex.nds.256.66.0f38.wig dd /r ] AVX512,AVX512VL,VAES,FUTURE */ + /* 241(f2 7d 28) 301 001(dd) 120 : WIG,EVEX,PROT,AVX512,AVX512VL,VAES,FUTURE */ + {I_VAESENCLAST, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+25798, 438, 2895}, + /* 3114 : VAESDEC xmmreg,xmmreg*,xmmrm128 [rvm:fv: evex.nds.128.66.0f38.wig de /r ] AVX512,AVX512VL,VAES,FUTURE */ + /* 241(f2 7d 08) 301 001(de) 120 : WIG,EVEX,PROT,AVX512,AVX512VL,VAES,FUTURE */ + {I_VAESDEC, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+25816, 438, 2896}, + /* 3115 : VAESDEC ymmreg,ymmreg*,ymmrm256 [rvm:fv: evex.nds.256.66.0f38.wig de /r ] AVX512,AVX512VL,VAES,FUTURE */ + /* 241(f2 7d 28) 301 001(de) 120 : WIG,EVEX,PROT,AVX512,AVX512VL,VAES,FUTURE */ + {I_VAESDEC, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+25834, 438, 2897}, + /* 3116 : VAESDECLAST xmmreg,xmmreg*,xmmrm128 [rvm:fv: evex.nds.128.66.0f38.wig df /r ] AVX512,AVX512VL,VAES,FUTURE */ + /* 241(f2 7d 08) 301 001(df) 120 : WIG,EVEX,PROT,AVX512,AVX512VL,VAES,FUTURE */ + {I_VAESDECLAST, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+25852, 438, 2898}, + /* 3117 : VAESDECLAST ymmreg,ymmreg*,ymmrm256 [rvm:fv: evex.nds.256.66.0f38.wig df /r ] AVX512,AVX512VL,VAES,FUTURE */ + /* 241(f2 7d 28) 301 001(df) 120 : WIG,EVEX,PROT,AVX512,AVX512VL,VAES,FUTURE */ + {I_VAESDECLAST, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+25870, 438, 2899}, + /* 3118 : VAESENC zmmreg,zmmreg*,zmmrm512 [rvm:fv: evex.nds.512.66.0f38.wig dc /r ] AVX512,VAES,FUTURE */ + /* 241(f2 7d 48) 301 001(dc) 120 : WIG,EVEX,PROT,AVX512,VAES,FUTURE */ + {I_VAESENC, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, NO_DECORATOR, nasm_bytecodes+25888, 439, 2902}, + /* 3119 : VAESENCLAST zmmreg,zmmreg*,zmmrm512 [rvm:fv: evex.nds.512.66.0f38.wig dd /r ] AVX512,VAES,FUTURE */ + /* 241(f2 7d 48) 301 001(dd) 120 : WIG,EVEX,PROT,AVX512,VAES,FUTURE */ + {I_VAESENCLAST, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, NO_DECORATOR, nasm_bytecodes+25906, 439, 2903}, + /* 3120 : VAESDEC zmmreg,zmmreg*,zmmrm512 [rvm:fv: evex.nds.512.66.0f38.wig de /r ] AVX512,VAES,FUTURE */ + /* 241(f2 7d 48) 301 001(de) 120 : WIG,EVEX,PROT,AVX512,VAES,FUTURE */ + {I_VAESDEC, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, NO_DECORATOR, nasm_bytecodes+25924, 439, 2904}, + /* 3121 : VAESDECLAST zmmreg,zmmreg*,zmmrm512 [rvm:fv: evex.nds.512.66.0f38.wig df /r ] AVX512,VAES,FUTURE */ + /* 241(f2 7d 48) 301 001(df) 120 : WIG,EVEX,PROT,AVX512,VAES,FUTURE */ + {I_VAESDECLAST, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, NO_DECORATOR, nasm_bytecodes+25942, 439, 2905}, + /* 3122 : VADDPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 58 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(58) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VADDPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+58512, 433, 2908}, + /* 3123 : VADDPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 58 /r ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(58) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VADDPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+58526, 433, 2909}, + /* 3124 : VADDPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f 58 /r ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(58) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VADDPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+58540, 433, 2910}, + /* 3125 : VADDPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f 58 /r ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(58) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VADDPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+58554, 433, 2911}, + /* 3126 : VADDSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f 58 /r ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(58) 120 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VADDSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+58568, 440, 2912}, + /* 3127 : VADDSS xmmreg,xmmreg*,xmmrm32 [rvm: vex.nds.lig.f3.0f 58 /r ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(58) 120 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VADDSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+58582, 440, 2913}, + /* 3128 : VADDSUBPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f d0 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(d0) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VADDSUBPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+58596, 433, 2914}, + /* 3129 : VADDSUBPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f d0 /r ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(d0) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VADDSUBPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+58610, 433, 2915}, + /* 3130 : VADDSUBPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.f2.0f d0 /r ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(d0) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VADDSUBPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+58624, 433, 2916}, + /* 3131 : VADDSUBPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.f2.0f d0 /r ] AVX,SANDYBRIDGE */ + /* 261(001 007) 001(d0) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VADDSUBPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+58638, 433, 2917}, + /* 3132 : VANDPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 54 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(54) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VANDPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+58652, 433, 2918}, + /* 3133 : VANDPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 54 /r ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(54) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VANDPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+58666, 433, 2919}, + /* 3134 : VANDPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f 54 /r ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(54) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VANDPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+58680, 433, 2920}, + /* 3135 : VANDPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f 54 /r ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(54) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VANDPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+58694, 433, 2921}, + /* 3136 : VANDNPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 55 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(55) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VANDNPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+58708, 433, 2922}, + /* 3137 : VANDNPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 55 /r ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(55) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VANDNPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+58722, 433, 2923}, + /* 3138 : VANDNPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f 55 /r ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(55) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VANDNPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+58736, 433, 2924}, + /* 3139 : VANDNPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f 55 /r ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(55) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VANDNPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+58750, 433, 2925}, + /* 3140 : VBLENDPD xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: vex.nds.128.66.0f3a 0d /r ib ] AVX,SANDYBRIDGE */ + /* 261(003 001) 001(0d) 120 023 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VBLENDPD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+51747, 433, 2926}, + /* 3141 : VBLENDPD ymmreg,ymmreg*,ymmrm256,imm8 [rvmi: vex.nds.256.66.0f3a 0d /r ib ] AVX,SANDYBRIDGE */ + /* 261(003 005) 001(0d) 120 023 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VBLENDPD, 4, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+51763, 433, 2927}, + /* 3142 : VBLENDPS xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: vex.nds.128.66.0f3a 0c /r ib ] AVX,SANDYBRIDGE */ + /* 261(003 001) 001(0c) 120 023 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VBLENDPS, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+51779, 433, 2928}, + /* 3143 : VBLENDPS ymmreg,ymmreg*,ymmrm256,imm8 [rvmi: vex.nds.256.66.0f3a 0c /r ib ] AVX,SANDYBRIDGE */ + /* 261(003 005) 001(0c) 120 023 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VBLENDPS, 4, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+51795, 433, 2929}, + /* 3144 : VBLENDVPD xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: vex.nds.128.66.0f3a.w0 4b /r /is4 ] AVX,SANDYBRIDGE */ + /* 261(003 001) 001(4b) 120 177 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VBLENDVPD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+51811, 441, 2930}, + /* 3145 : VBLENDVPD ymmreg,ymmreg*,ymmrm256,ymmreg [rvms: vex.nds.256.66.0f3a.w0 4b /r /is4 ] AVX,SANDYBRIDGE */ + /* 261(003 005) 001(4b) 120 177 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VBLENDVPD, 4, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,YMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+51827, 441, 2931}, + /* 3146 : VBLENDVPS xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: vex.nds.128.66.0f3a.w0 4a /r /is4 ] AVX,SANDYBRIDGE */ + /* 261(003 001) 001(4a) 120 177 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VBLENDVPS, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+51843, 441, 2932}, + /* 3147 : VBLENDVPS ymmreg,ymmreg*,ymmrm256,ymmreg [rvms: vex.nds.256.66.0f3a.w0 4a /r /is4 ] AVX,SANDYBRIDGE */ + /* 261(003 005) 001(4a) 120 177 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VBLENDVPS, 4, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,YMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+51859, 441, 2933}, + /* 3148 : VBROADCASTSS xmmreg,mem32 [rm: vex.128.66.0f38.w0 18 /r ] AVX,SANDYBRIDGE */ + /* 270(002 001) 001(18) 110 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VBROADCASTSS, 2, {XMMREG|RN_L16,MEMORY|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58764, 441, 2934}, + /* 3149 : VBROADCASTSS ymmreg,mem32 [rm: vex.256.66.0f38.w0 18 /r ] AVX,SANDYBRIDGE */ + /* 270(002 005) 001(18) 110 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VBROADCASTSS, 2, {YMMREG|RN_L16,MEMORY|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58771, 441, 2935}, + /* 3150 : VBROADCASTSD ymmreg,mem64 [rm: vex.256.66.0f38.w0 19 /r ] AVX,SANDYBRIDGE */ + /* 270(002 005) 001(19) 110 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VBROADCASTSD, 2, {YMMREG|RN_L16,MEMORY|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58778, 441, 2936}, + /* 3151 : VBROADCASTF128 ymmreg,mem128 [rm: vex.256.66.0f38.w0 1a /r ] AVX,SANDYBRIDGE */ + /* 270(002 005) 001(1a) 110 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VBROADCASTF128, 2, {YMMREG|RN_L16,MEMORY|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58785, 441, 2937}, + /* 3152 : VCMPEQ_OSPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 10 ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(10) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQ_OSPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+25960, 433, 2939}, + /* 3153 : VCMPEQ_OSPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 10 ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(10) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQ_OSPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+25978, 433, 2940}, + /* 3154 : VCMPEQPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 00 ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(00) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+25996, 433, 2941}, + /* 3155 : VCMPEQPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 00 ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(00) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26014, 433, 2942}, + /* 3156 : VCMPLT_OSPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 01 ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(01) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLT_OSPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26032, 433, 2943}, + /* 3157 : VCMPLT_OSPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 01 ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(01) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLT_OSPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26050, 433, 2944}, + /* 3158 : VCMPLTPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 01 ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(01) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLTPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26032, 433, 2945}, + /* 3159 : VCMPLTPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 01 ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(01) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLTPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26050, 433, 2946}, + /* 3160 : VCMPLE_OSPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 02 ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(02) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLE_OSPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26068, 433, 2947}, + /* 3161 : VCMPLE_OSPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 02 ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(02) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLE_OSPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26086, 433, 2948}, + /* 3162 : VCMPLEPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 02 ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(02) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLEPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26068, 433, 2949}, + /* 3163 : VCMPLEPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 02 ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(02) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLEPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26086, 433, 2950}, + /* 3164 : VCMPUNORD_QPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 03 ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(03) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPUNORD_QPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26104, 433, 2951}, + /* 3165 : VCMPUNORD_QPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 03 ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(03) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPUNORD_QPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26122, 433, 2952}, + /* 3166 : VCMPUNORDPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 03 ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(03) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPUNORDPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26104, 433, 2953}, + /* 3167 : VCMPUNORDPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 03 ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(03) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPUNORDPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26122, 433, 2954}, + /* 3168 : VCMPNEQ_UQPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 04 ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(04) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQ_UQPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26140, 433, 2955}, + /* 3169 : VCMPNEQ_UQPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 04 ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(04) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQ_UQPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26158, 433, 2956}, + /* 3170 : VCMPNEQPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 04 ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(04) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26140, 433, 2957}, + /* 3171 : VCMPNEQPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 04 ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(04) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26158, 433, 2958}, + /* 3172 : VCMPNLT_USPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 05 ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(05) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLT_USPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26176, 433, 2959}, + /* 3173 : VCMPNLT_USPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 05 ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(05) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLT_USPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26194, 433, 2960}, + /* 3174 : VCMPNLTPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 05 ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(05) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLTPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26176, 433, 2961}, + /* 3175 : VCMPNLTPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 05 ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(05) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLTPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26194, 433, 2962}, + /* 3176 : VCMPNLE_USPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 06 ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(06) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLE_USPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26212, 433, 2963}, + /* 3177 : VCMPNLE_USPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 06 ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(06) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLE_USPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26230, 433, 2964}, + /* 3178 : VCMPNLEPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 06 ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(06) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLEPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26212, 433, 2965}, + /* 3179 : VCMPNLEPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 06 ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(06) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLEPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26230, 433, 2966}, + /* 3180 : VCMPORD_QPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 07 ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(07) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPORD_QPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26248, 433, 2967}, + /* 3181 : VCMPORD_QPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 07 ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(07) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPORD_QPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26266, 433, 2968}, + /* 3182 : VCMPORDPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 07 ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(07) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPORDPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26248, 433, 2969}, + /* 3183 : VCMPORDPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 07 ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(07) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPORDPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26266, 433, 2970}, + /* 3184 : VCMPEQ_UQPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 08 ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(08) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQ_UQPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26284, 433, 2971}, + /* 3185 : VCMPEQ_UQPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 08 ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(08) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQ_UQPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26302, 433, 2972}, + /* 3186 : VCMPNGE_USPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 09 ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(09) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGE_USPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26320, 433, 2973}, + /* 3187 : VCMPNGE_USPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 09 ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(09) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGE_USPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26338, 433, 2974}, + /* 3188 : VCMPNGEPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 09 ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(09) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGEPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26320, 433, 2975}, + /* 3189 : VCMPNGEPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 09 ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(09) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGEPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26338, 433, 2976}, + /* 3190 : VCMPNGT_USPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 0a ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(0a) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGT_USPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26356, 433, 2977}, + /* 3191 : VCMPNGT_USPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 0a ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(0a) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGT_USPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26374, 433, 2978}, + /* 3192 : VCMPNGTPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 0a ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(0a) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGTPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26356, 433, 2979}, + /* 3193 : VCMPNGTPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 0a ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(0a) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGTPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26374, 433, 2980}, + /* 3194 : VCMPFALSE_OQPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 0b ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(0b) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPFALSE_OQPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26392, 433, 2981}, + /* 3195 : VCMPFALSE_OQPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 0b ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(0b) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPFALSE_OQPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26410, 433, 2982}, + /* 3196 : VCMPFALSEPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 0b ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(0b) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPFALSEPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26392, 433, 2983}, + /* 3197 : VCMPFALSEPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 0b ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(0b) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPFALSEPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26410, 433, 2984}, + /* 3198 : VCMPNEQ_OQPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 0c ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(0c) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQ_OQPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26428, 433, 2985}, + /* 3199 : VCMPNEQ_OQPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 0c ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(0c) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQ_OQPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26446, 433, 2986}, + /* 3200 : VCMPGE_OSPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 0d ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(0d) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGE_OSPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26464, 433, 2987}, + /* 3201 : VCMPGE_OSPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 0d ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(0d) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGE_OSPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26482, 433, 2988}, + /* 3202 : VCMPGEPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 0d ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(0d) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGEPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26464, 433, 2989}, + /* 3203 : VCMPGEPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 0d ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(0d) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGEPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26482, 433, 2990}, + /* 3204 : VCMPGT_OSPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 0e ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(0e) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGT_OSPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26500, 433, 2991}, + /* 3205 : VCMPGT_OSPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 0e ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(0e) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGT_OSPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26518, 433, 2992}, + /* 3206 : VCMPGTPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 0e ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(0e) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGTPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26500, 433, 2993}, + /* 3207 : VCMPGTPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 0e ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(0e) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGTPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26518, 433, 2994}, + /* 3208 : VCMPTRUE_UQPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 0f ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(0f) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPTRUE_UQPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26536, 433, 2995}, + /* 3209 : VCMPTRUE_UQPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 0f ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(0f) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPTRUE_UQPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26554, 433, 2996}, + /* 3210 : VCMPTRUEPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 0f ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(0f) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPTRUEPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26536, 433, 2997}, + /* 3211 : VCMPTRUEPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 0f ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(0f) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPTRUEPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26554, 433, 2998}, + /* 3212 : VCMPEQ_OSPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 10 ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(10) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQ_OSPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+25960, 433, 2999}, + /* 3213 : VCMPEQ_OSPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 10 ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(10) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQ_OSPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+25978, 433, 3000}, + /* 3214 : VCMPLT_OQPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 11 ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(11) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLT_OQPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26572, 433, 3001}, + /* 3215 : VCMPLT_OQPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 11 ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(11) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLT_OQPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26590, 433, 3002}, + /* 3216 : VCMPLE_OQPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 12 ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(12) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLE_OQPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26608, 433, 3003}, + /* 3217 : VCMPLE_OQPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 12 ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(12) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLE_OQPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26626, 433, 3004}, + /* 3218 : VCMPUNORD_SPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 13 ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(13) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPUNORD_SPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26644, 433, 3005}, + /* 3219 : VCMPUNORD_SPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 13 ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(13) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPUNORD_SPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26662, 433, 3006}, + /* 3220 : VCMPNEQ_USPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 14 ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(14) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQ_USPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26680, 433, 3007}, + /* 3221 : VCMPNEQ_USPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 14 ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(14) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQ_USPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26698, 433, 3008}, + /* 3222 : VCMPNLT_UQPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 15 ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(15) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLT_UQPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26716, 433, 3009}, + /* 3223 : VCMPNLT_UQPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 15 ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(15) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLT_UQPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26734, 433, 3010}, + /* 3224 : VCMPNLE_UQPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 16 ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(16) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLE_UQPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26752, 433, 3011}, + /* 3225 : VCMPNLE_UQPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 16 ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(16) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLE_UQPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26770, 433, 3012}, + /* 3226 : VCMPORD_SPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 17 ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(17) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPORD_SPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26788, 433, 3013}, + /* 3227 : VCMPORD_SPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 17 ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(17) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPORD_SPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26806, 433, 3014}, + /* 3228 : VCMPEQ_USPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 18 ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(18) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQ_USPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26824, 433, 3015}, + /* 3229 : VCMPEQ_USPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 18 ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(18) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQ_USPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26842, 433, 3016}, + /* 3230 : VCMPNGE_UQPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 19 ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(19) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGE_UQPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26860, 433, 3017}, + /* 3231 : VCMPNGE_UQPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 19 ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(19) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGE_UQPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26878, 433, 3018}, + /* 3232 : VCMPNGT_UQPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 1a ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(1a) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGT_UQPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26896, 433, 3019}, + /* 3233 : VCMPNGT_UQPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 1a ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(1a) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGT_UQPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26914, 433, 3020}, + /* 3234 : VCMPFALSE_OSPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 1b ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(1b) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPFALSE_OSPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26932, 433, 3021}, + /* 3235 : VCMPFALSE_OSPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 1b ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(1b) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPFALSE_OSPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26950, 433, 3022}, + /* 3236 : VCMPNEQ_OSPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 1c ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(1c) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQ_OSPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26968, 433, 3023}, + /* 3237 : VCMPNEQ_OSPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 1c ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(1c) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQ_OSPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+26986, 433, 3024}, + /* 3238 : VCMPGE_OQPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 1d ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(1d) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGE_OQPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27004, 433, 3025}, + /* 3239 : VCMPGE_OQPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 1d ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(1d) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGE_OQPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27022, 433, 3026}, + /* 3240 : VCMPGT_OQPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 1e ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(1e) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGT_OQPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27040, 433, 3027}, + /* 3241 : VCMPGT_OQPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 1e ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(1e) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGT_OQPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27058, 433, 3028}, + /* 3242 : VCMPTRUE_USPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 1f ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 001(1f) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPTRUE_USPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27076, 433, 3029}, + /* 3243 : VCMPTRUE_USPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 1f ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 001(1f) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPTRUE_USPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27094, 433, 3030}, + /* 3244 : VCMPPD xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: vex.nds.128.66.0f c2 /r ib ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c2) 120 023 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPPD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+51875, 433, 3031}, + /* 3245 : VCMPPD ymmreg,ymmreg*,ymmrm256,imm8 [rvmi: vex.nds.256.66.0f c2 /r ib ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c2) 120 023 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPPD, 4, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+51891, 433, 3032}, + /* 3246 : VCMPEQ_OSPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 10 ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(10) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQ_OSPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27112, 433, 3034}, + /* 3247 : VCMPEQ_OSPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 10 ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(10) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQ_OSPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27130, 433, 3035}, + /* 3248 : VCMPEQPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 00 ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(00) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27148, 433, 3036}, + /* 3249 : VCMPEQPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 00 ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(00) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27166, 433, 3037}, + /* 3250 : VCMPLT_OSPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 01 ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(01) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLT_OSPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27184, 433, 3038}, + /* 3251 : VCMPLT_OSPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 01 ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(01) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLT_OSPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27202, 433, 3039}, + /* 3252 : VCMPLTPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 01 ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(01) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLTPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27184, 433, 3040}, + /* 3253 : VCMPLTPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 01 ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(01) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLTPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27202, 433, 3041}, + /* 3254 : VCMPLE_OSPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 02 ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(02) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLE_OSPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27220, 433, 3042}, + /* 3255 : VCMPLE_OSPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 02 ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(02) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLE_OSPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27238, 433, 3043}, + /* 3256 : VCMPLEPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 02 ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(02) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLEPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27220, 433, 3044}, + /* 3257 : VCMPLEPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 02 ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(02) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLEPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27238, 433, 3045}, + /* 3258 : VCMPUNORD_QPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 03 ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(03) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPUNORD_QPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27256, 433, 3046}, + /* 3259 : VCMPUNORD_QPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 03 ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(03) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPUNORD_QPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27274, 433, 3047}, + /* 3260 : VCMPUNORDPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 03 ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(03) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPUNORDPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27256, 433, 3048}, + /* 3261 : VCMPUNORDPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 03 ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(03) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPUNORDPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27274, 433, 3049}, + /* 3262 : VCMPNEQ_UQPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 04 ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(04) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQ_UQPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27292, 433, 3050}, + /* 3263 : VCMPNEQ_UQPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 04 ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(04) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQ_UQPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27310, 433, 3051}, + /* 3264 : VCMPNEQPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 04 ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(04) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27292, 433, 3052}, + /* 3265 : VCMPNEQPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 04 ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(04) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27310, 433, 3053}, + /* 3266 : VCMPNLT_USPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 05 ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(05) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLT_USPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27328, 433, 3054}, + /* 3267 : VCMPNLT_USPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 05 ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(05) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLT_USPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27346, 433, 3055}, + /* 3268 : VCMPNLTPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 05 ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(05) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLTPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27328, 433, 3056}, + /* 3269 : VCMPNLTPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 05 ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(05) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLTPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27346, 433, 3057}, + /* 3270 : VCMPNLE_USPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 06 ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(06) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLE_USPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27364, 433, 3058}, + /* 3271 : VCMPNLE_USPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 06 ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(06) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLE_USPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27382, 433, 3059}, + /* 3272 : VCMPNLEPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 06 ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(06) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLEPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27364, 433, 3060}, + /* 3273 : VCMPNLEPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 06 ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(06) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLEPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27382, 433, 3061}, + /* 3274 : VCMPORD_QPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 07 ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(07) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPORD_QPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27400, 433, 3062}, + /* 3275 : VCMPORD_QPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 07 ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(07) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPORD_QPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27418, 433, 3063}, + /* 3276 : VCMPORDPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 07 ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(07) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPORDPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27400, 433, 3064}, + /* 3277 : VCMPORDPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 07 ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(07) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPORDPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27418, 433, 3065}, + /* 3278 : VCMPEQ_UQPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 08 ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(08) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQ_UQPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27436, 433, 3066}, + /* 3279 : VCMPEQ_UQPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 08 ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(08) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQ_UQPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27454, 433, 3067}, + /* 3280 : VCMPNGE_USPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 09 ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(09) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGE_USPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27472, 433, 3068}, + /* 3281 : VCMPNGE_USPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 09 ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(09) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGE_USPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27490, 433, 3069}, + /* 3282 : VCMPNGEPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 09 ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(09) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGEPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27472, 433, 3070}, + /* 3283 : VCMPNGEPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 09 ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(09) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGEPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27490, 433, 3071}, + /* 3284 : VCMPNGT_USPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 0a ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(0a) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGT_USPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27508, 433, 3072}, + /* 3285 : VCMPNGT_USPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 0a ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(0a) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGT_USPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27526, 433, 3073}, + /* 3286 : VCMPNGTPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 0a ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(0a) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGTPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27508, 433, 3074}, + /* 3287 : VCMPNGTPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 0a ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(0a) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGTPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27526, 433, 3075}, + /* 3288 : VCMPFALSE_OQPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 0b ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(0b) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPFALSE_OQPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27544, 433, 3076}, + /* 3289 : VCMPFALSE_OQPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 0b ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(0b) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPFALSE_OQPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27562, 433, 3077}, + /* 3290 : VCMPFALSEPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 0b ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(0b) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPFALSEPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27544, 433, 3078}, + /* 3291 : VCMPFALSEPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 0b ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(0b) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPFALSEPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27562, 433, 3079}, + /* 3292 : VCMPNEQ_OQPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 0c ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(0c) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQ_OQPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27580, 433, 3080}, + /* 3293 : VCMPNEQ_OQPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 0c ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(0c) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQ_OQPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27598, 433, 3081}, + /* 3294 : VCMPGE_OSPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 0d ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(0d) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGE_OSPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27616, 433, 3082}, + /* 3295 : VCMPGE_OSPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 0d ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(0d) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGE_OSPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27634, 433, 3083}, + /* 3296 : VCMPGEPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 0d ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(0d) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGEPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27616, 433, 3084}, + /* 3297 : VCMPGEPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 0d ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(0d) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGEPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27634, 433, 3085}, + /* 3298 : VCMPGT_OSPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 0e ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(0e) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGT_OSPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27652, 433, 3086}, + /* 3299 : VCMPGT_OSPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 0e ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(0e) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGT_OSPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27670, 433, 3087}, + /* 3300 : VCMPGTPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 0e ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(0e) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGTPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27652, 433, 3088}, + /* 3301 : VCMPGTPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 0e ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(0e) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGTPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27670, 433, 3089}, + /* 3302 : VCMPTRUE_UQPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 0f ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(0f) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPTRUE_UQPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27688, 433, 3090}, + /* 3303 : VCMPTRUE_UQPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 0f ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(0f) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPTRUE_UQPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27706, 433, 3091}, + /* 3304 : VCMPTRUEPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 0f ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(0f) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPTRUEPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27688, 433, 3092}, + /* 3305 : VCMPTRUEPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 0f ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(0f) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPTRUEPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27706, 433, 3093}, + /* 3306 : VCMPEQ_OSPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 10 ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(10) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQ_OSPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27112, 433, 3094}, + /* 3307 : VCMPEQ_OSPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 10 ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(10) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQ_OSPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27130, 433, 3095}, + /* 3308 : VCMPLT_OQPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 11 ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(11) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLT_OQPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27724, 433, 3096}, + /* 3309 : VCMPLT_OQPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 11 ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(11) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLT_OQPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27742, 433, 3097}, + /* 3310 : VCMPLE_OQPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 12 ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(12) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLE_OQPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27760, 433, 3098}, + /* 3311 : VCMPLE_OQPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 12 ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(12) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLE_OQPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27778, 433, 3099}, + /* 3312 : VCMPUNORD_SPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 13 ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(13) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPUNORD_SPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27796, 433, 3100}, + /* 3313 : VCMPUNORD_SPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 13 ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(13) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPUNORD_SPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27814, 433, 3101}, + /* 3314 : VCMPNEQ_USPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 14 ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(14) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQ_USPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27832, 433, 3102}, + /* 3315 : VCMPNEQ_USPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 14 ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(14) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQ_USPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27850, 433, 3103}, + /* 3316 : VCMPNLT_UQPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 15 ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(15) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLT_UQPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27868, 433, 3104}, + /* 3317 : VCMPNLT_UQPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 15 ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(15) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLT_UQPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27886, 433, 3105}, + /* 3318 : VCMPNLE_UQPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 16 ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(16) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLE_UQPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27904, 433, 3106}, + /* 3319 : VCMPNLE_UQPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 16 ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(16) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLE_UQPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27922, 433, 3107}, + /* 3320 : VCMPORD_SPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 17 ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(17) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPORD_SPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27940, 433, 3108}, + /* 3321 : VCMPORD_SPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 17 ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(17) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPORD_SPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27958, 433, 3109}, + /* 3322 : VCMPEQ_USPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 18 ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(18) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQ_USPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27976, 433, 3110}, + /* 3323 : VCMPEQ_USPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 18 ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(18) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQ_USPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+27994, 433, 3111}, + /* 3324 : VCMPNGE_UQPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 19 ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(19) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGE_UQPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28012, 433, 3112}, + /* 3325 : VCMPNGE_UQPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 19 ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(19) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGE_UQPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28030, 433, 3113}, + /* 3326 : VCMPNGT_UQPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 1a ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(1a) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGT_UQPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28048, 433, 3114}, + /* 3327 : VCMPNGT_UQPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 1a ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(1a) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGT_UQPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28066, 433, 3115}, + /* 3328 : VCMPFALSE_OSPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 1b ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(1b) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPFALSE_OSPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28084, 433, 3116}, + /* 3329 : VCMPFALSE_OSPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 1b ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(1b) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPFALSE_OSPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28102, 433, 3117}, + /* 3330 : VCMPNEQ_OSPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 1c ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(1c) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQ_OSPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28120, 433, 3118}, + /* 3331 : VCMPNEQ_OSPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 1c ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(1c) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQ_OSPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28138, 433, 3119}, + /* 3332 : VCMPGE_OQPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 1d ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(1d) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGE_OQPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28156, 433, 3120}, + /* 3333 : VCMPGE_OQPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 1d ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(1d) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGE_OQPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28174, 433, 3121}, + /* 3334 : VCMPGT_OQPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 1e ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(1e) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGT_OQPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28192, 433, 3122}, + /* 3335 : VCMPGT_OQPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 1e ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(1e) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGT_OQPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28210, 433, 3123}, + /* 3336 : VCMPTRUE_USPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 1f ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 001(1f) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPTRUE_USPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28228, 433, 3124}, + /* 3337 : VCMPTRUE_USPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 1f ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 001(1f) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPTRUE_USPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28246, 433, 3125}, + /* 3338 : VCMPPS xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: vex.nds.128.0f c2 /r ib ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c2) 120 023 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPPS, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+51907, 433, 3126}, + /* 3339 : VCMPPS ymmreg,ymmreg*,ymmrm256,imm8 [rvmi: vex.nds.256.0f c2 /r ib ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c2) 120 023 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPPS, 4, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+51923, 433, 3127}, + /* 3340 : VCMPEQ_OSSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 10 ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(10) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQ_OSSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28264, 440, 3129}, + /* 3341 : VCMPEQSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 00 ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(00) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28282, 440, 3130}, + /* 3342 : VCMPLT_OSSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 01 ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(01) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLT_OSSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28300, 440, 3131}, + /* 3343 : VCMPLTSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 01 ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(01) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLTSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28300, 440, 3132}, + /* 3344 : VCMPLE_OSSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 02 ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(02) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLE_OSSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28318, 440, 3133}, + /* 3345 : VCMPLESD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 02 ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(02) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLESD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28318, 440, 3134}, + /* 3346 : VCMPUNORD_QSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 03 ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(03) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPUNORD_QSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28336, 440, 3135}, + /* 3347 : VCMPUNORDSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 03 ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(03) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPUNORDSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28336, 440, 3136}, + /* 3348 : VCMPNEQ_UQSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 04 ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(04) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQ_UQSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28354, 440, 3137}, + /* 3349 : VCMPNEQSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 04 ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(04) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28354, 440, 3138}, + /* 3350 : VCMPNLT_USSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 05 ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(05) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLT_USSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28372, 440, 3139}, + /* 3351 : VCMPNLTSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 05 ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(05) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLTSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28372, 440, 3140}, + /* 3352 : VCMPNLE_USSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 06 ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(06) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLE_USSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28390, 440, 3141}, + /* 3353 : VCMPNLESD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 06 ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(06) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLESD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28390, 440, 3142}, + /* 3354 : VCMPORD_QSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 07 ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(07) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPORD_QSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28408, 440, 3143}, + /* 3355 : VCMPORDSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 07 ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(07) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPORDSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28408, 440, 3144}, + /* 3356 : VCMPEQ_UQSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 08 ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(08) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQ_UQSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28426, 440, 3145}, + /* 3357 : VCMPNGE_USSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 09 ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(09) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGE_USSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28444, 440, 3146}, + /* 3358 : VCMPNGESD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 09 ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(09) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGESD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28444, 440, 3147}, + /* 3359 : VCMPNGT_USSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 0a ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(0a) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGT_USSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28462, 440, 3148}, + /* 3360 : VCMPNGTSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 0a ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(0a) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGTSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28462, 440, 3149}, + /* 3361 : VCMPFALSE_OQSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 0b ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(0b) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPFALSE_OQSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28480, 440, 3150}, + /* 3362 : VCMPFALSESD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 0b ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(0b) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPFALSESD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28480, 440, 3151}, + /* 3363 : VCMPNEQ_OQSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 0c ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(0c) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQ_OQSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28498, 440, 3152}, + /* 3364 : VCMPGE_OSSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 0d ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(0d) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGE_OSSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28516, 440, 3153}, + /* 3365 : VCMPGESD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 0d ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(0d) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGESD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28516, 440, 3154}, + /* 3366 : VCMPGT_OSSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 0e ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(0e) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGT_OSSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28534, 440, 3155}, + /* 3367 : VCMPGTSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 0e ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(0e) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGTSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28534, 440, 3156}, + /* 3368 : VCMPTRUE_UQSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 0f ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(0f) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPTRUE_UQSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28552, 440, 3157}, + /* 3369 : VCMPTRUESD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 0f ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(0f) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPTRUESD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28552, 440, 3158}, + /* 3370 : VCMPEQ_OSSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 10 ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(10) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQ_OSSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28264, 440, 3159}, + /* 3371 : VCMPLT_OQSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 11 ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(11) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLT_OQSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28570, 440, 3160}, + /* 3372 : VCMPLE_OQSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 12 ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(12) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLE_OQSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28588, 440, 3161}, + /* 3373 : VCMPUNORD_SSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 13 ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(13) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPUNORD_SSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28606, 440, 3162}, + /* 3374 : VCMPNEQ_USSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 14 ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(14) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQ_USSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28624, 440, 3163}, + /* 3375 : VCMPNLT_UQSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 15 ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(15) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLT_UQSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28642, 440, 3164}, + /* 3376 : VCMPNLE_UQSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 16 ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(16) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLE_UQSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28660, 440, 3165}, + /* 3377 : VCMPORD_SSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 17 ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(17) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPORD_SSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28678, 440, 3166}, + /* 3378 : VCMPEQ_USSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 18 ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(18) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQ_USSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28696, 440, 3167}, + /* 3379 : VCMPNGE_UQSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 19 ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(19) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGE_UQSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28714, 440, 3168}, + /* 3380 : VCMPNGT_UQSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 1a ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(1a) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGT_UQSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28732, 440, 3169}, + /* 3381 : VCMPFALSE_OSSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 1b ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(1b) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPFALSE_OSSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28750, 440, 3170}, + /* 3382 : VCMPNEQ_OSSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 1c ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(1c) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQ_OSSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28768, 440, 3171}, + /* 3383 : VCMPGE_OQSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 1d ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(1d) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGE_OQSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28786, 440, 3172}, + /* 3384 : VCMPGT_OQSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 1e ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(1e) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGT_OQSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28804, 440, 3173}, + /* 3385 : VCMPTRUE_USSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 1f ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 001(1f) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPTRUE_USSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28822, 440, 3174}, + /* 3386 : VCMPSD xmmreg,xmmreg*,xmmrm64,imm8 [rvmi: vex.nds.lig.f2.0f c2 /r ib ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(c2) 120 023 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPSD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+51939, 440, 3175}, + /* 3387 : VCMPEQ_OSSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 10 ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(10) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQ_OSSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28840, 440, 3177}, + /* 3388 : VCMPEQSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 00 ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(00) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28858, 440, 3178}, + /* 3389 : VCMPLT_OSSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 01 ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(01) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLT_OSSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28876, 440, 3179}, + /* 3390 : VCMPLTSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 01 ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(01) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLTSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28876, 440, 3180}, + /* 3391 : VCMPLE_OSSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 02 ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(02) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLE_OSSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28894, 440, 3181}, + /* 3392 : VCMPLESS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 02 ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(02) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLESS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28894, 440, 3182}, + /* 3393 : VCMPUNORD_QSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 03 ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(03) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPUNORD_QSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28912, 440, 3183}, + /* 3394 : VCMPUNORDSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 03 ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(03) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPUNORDSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28912, 440, 3184}, + /* 3395 : VCMPNEQ_UQSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 04 ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(04) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQ_UQSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28930, 440, 3185}, + /* 3396 : VCMPNEQSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 04 ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(04) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28930, 440, 3186}, + /* 3397 : VCMPNLT_USSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 05 ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(05) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLT_USSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28948, 440, 3187}, + /* 3398 : VCMPNLTSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 05 ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(05) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLTSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28948, 440, 3188}, + /* 3399 : VCMPNLE_USSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 06 ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(06) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLE_USSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28966, 440, 3189}, + /* 3400 : VCMPNLESS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 06 ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(06) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLESS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28966, 440, 3190}, + /* 3401 : VCMPORD_QSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 07 ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(07) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPORD_QSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28984, 440, 3191}, + /* 3402 : VCMPORDSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 07 ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(07) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPORDSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28984, 440, 3192}, + /* 3403 : VCMPEQ_UQSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 08 ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(08) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQ_UQSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29002, 440, 3193}, + /* 3404 : VCMPNGE_USSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 09 ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(09) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGE_USSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29020, 440, 3194}, + /* 3405 : VCMPNGESS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 09 ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(09) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGESS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29020, 440, 3195}, + /* 3406 : VCMPNGT_USSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 0a ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(0a) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGT_USSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29038, 440, 3196}, + /* 3407 : VCMPNGTSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 0a ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(0a) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGTSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29038, 440, 3197}, + /* 3408 : VCMPFALSE_OQSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 0b ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(0b) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPFALSE_OQSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29056, 440, 3198}, + /* 3409 : VCMPFALSESS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 0b ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(0b) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPFALSESS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29056, 440, 3199}, + /* 3410 : VCMPNEQ_OQSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 0c ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(0c) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQ_OQSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29074, 440, 3200}, + /* 3411 : VCMPGE_OSSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 0d ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(0d) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGE_OSSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29092, 440, 3201}, + /* 3412 : VCMPGESS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 0d ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(0d) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGESS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29092, 440, 3202}, + /* 3413 : VCMPGT_OSSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 0e ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(0e) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGT_OSSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29110, 440, 3203}, + /* 3414 : VCMPGTSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 0e ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(0e) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGTSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29110, 440, 3204}, + /* 3415 : VCMPTRUE_UQSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 0f ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(0f) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPTRUE_UQSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29128, 440, 3205}, + /* 3416 : VCMPTRUESS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 0f ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(0f) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPTRUESS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29128, 440, 3206}, + /* 3417 : VCMPEQ_OSSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 10 ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(10) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQ_OSSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+28840, 440, 3207}, + /* 3418 : VCMPLT_OQSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 11 ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(11) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLT_OQSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29146, 440, 3208}, + /* 3419 : VCMPLE_OQSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 12 ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(12) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPLE_OQSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29164, 440, 3209}, + /* 3420 : VCMPUNORD_SSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 13 ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(13) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPUNORD_SSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29182, 440, 3210}, + /* 3421 : VCMPNEQ_USSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 14 ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(14) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQ_USSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29200, 440, 3211}, + /* 3422 : VCMPNLT_UQSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 15 ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(15) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLT_UQSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29218, 440, 3212}, + /* 3423 : VCMPNLE_UQSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 16 ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(16) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNLE_UQSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29236, 440, 3213}, + /* 3424 : VCMPORD_SSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 17 ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(17) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPORD_SSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29254, 440, 3214}, + /* 3425 : VCMPEQ_USSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 18 ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(18) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPEQ_USSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29272, 440, 3215}, + /* 3426 : VCMPNGE_UQSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 19 ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(19) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGE_UQSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29290, 440, 3216}, + /* 3427 : VCMPNGT_UQSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 1a ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(1a) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNGT_UQSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29308, 440, 3217}, + /* 3428 : VCMPFALSE_OSSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 1b ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(1b) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPFALSE_OSSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29326, 440, 3218}, + /* 3429 : VCMPNEQ_OSSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 1c ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(1c) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPNEQ_OSSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29344, 440, 3219}, + /* 3430 : VCMPGE_OQSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 1d ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(1d) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGE_OQSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29362, 440, 3220}, + /* 3431 : VCMPGT_OQSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 1e ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(1e) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPGT_OQSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29380, 440, 3221}, + /* 3432 : VCMPTRUE_USSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 1f ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 001(1f) : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPTRUE_USSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29398, 440, 3222}, + /* 3433 : VCMPSS xmmreg,xmmreg*,xmmrm32,imm8 [rvmi: vex.nds.lig.f3.0f c2 /r ib ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(c2) 120 023 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCMPSS, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+51955, 440, 3223}, + /* 3434 : VCOMISD xmmreg,xmmrm64 [rm: vex.lig.66.0f 2f /r ] FL,AVX,SANDYBRIDGE */ + /* 270(001 001) 001(2f) 110 : NOAPX,LIG,WIG,FL,VEX,AVX,SANDYBRIDGE */ + {I_VCOMISD, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58792, 442, 3224}, + /* 3435 : VCOMISS xmmreg,xmmrm32 [rm: vex.lig.0f 2f /r ] FL,AVX,SANDYBRIDGE */ + /* 270(001 000) 001(2f) 110 : NOAPX,LIG,WIG,FL,VEX,AVX,SANDYBRIDGE */ + {I_VCOMISS, 2, {XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58799, 442, 3225}, + /* 3436 : VCVTDQ2PD xmmreg,xmmrm64 [rm: vex.128.f3.0f e6 /r ] AVX,SANDYBRIDGE */ + /* 270(001 002) 001(e6) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCVTDQ2PD, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58806, 433, 3226}, + /* 3437 : VCVTDQ2PD ymmreg,xmmrm128 [rm: vex.256.f3.0f e6 /r ] AVX,SANDYBRIDGE */ + /* 270(001 006) 001(e6) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCVTDQ2PD, 2, {YMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58813, 433, 3227}, + /* 3438 : VCVTDQ2PS xmmreg,xmmrm128 [rm: vex.128.0f 5b /r ] AVX,SANDYBRIDGE */ + /* 270(001 000) 001(5b) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCVTDQ2PS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58820, 433, 3228}, + /* 3439 : VCVTDQ2PS ymmreg,ymmrm256 [rm: vex.256.0f 5b /r ] AVX,SANDYBRIDGE */ + /* 270(001 004) 001(5b) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCVTDQ2PS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58827, 433, 3229}, + /* 3440 : VCVTPD2DQ xmmreg,xmmreg [rm: vex.128.f2.0f e6 /r ] AVX,SANDYBRIDGE */ + /* 270(001 003) 001(e6) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCVTPD2DQ, 2, {XMMREG|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58834, 433, 3230}, + /* 3441 : VCVTPD2DQ xmmreg,mem128 [rm: vex.128.f2.0f e6 /r ] AR0-1,SO,AVX,SANDYBRIDGE */ + /* 270(001 003) 001(e6) 110 : AR0,AR1,SO,NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCVTPD2DQ, 2, {XMMREG|RN_L16,MEMORY|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58834, 443, 3231}, + /* 3442 : VCVTPD2DQ xmmreg,ymmreg [rm: vex.256.f2.0f e6 /r ] AVX,SANDYBRIDGE */ + /* 270(001 007) 001(e6) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCVTPD2DQ, 2, {XMMREG|RN_L16,YMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58841, 433, 3232}, + /* 3443 : VCVTPD2DQ xmmreg,mem256 [rm: vex.256.f2.0f e6 /r ] AR0-1,SY,AVX,SANDYBRIDGE */ + /* 270(001 007) 001(e6) 110 : AR0,AR1,SY,NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCVTPD2DQ, 2, {XMMREG|RN_L16,MEMORY|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58841, 444, 3233}, + /* 3444 : VCVTPD2PS xmmreg,xmmreg [rm: vex.128.66.0f 5a /r ] AVX,SANDYBRIDGE */ + /* 270(001 001) 001(5a) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCVTPD2PS, 2, {XMMREG|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58848, 433, 3234}, + /* 3445 : VCVTPD2PS xmmreg,mem128 [rm: vex.128.66.0f 5a /r ] AR0-1,SO,AVX,SANDYBRIDGE */ + /* 270(001 001) 001(5a) 110 : AR0,AR1,SO,NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCVTPD2PS, 2, {XMMREG|RN_L16,MEMORY|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58848, 443, 3235}, + /* 3446 : VCVTPD2PS xmmreg,ymmreg [rm: vex.256.66.0f 5a /r ] AVX,SANDYBRIDGE */ + /* 270(001 005) 001(5a) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCVTPD2PS, 2, {XMMREG|RN_L16,YMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58855, 433, 3236}, + /* 3447 : VCVTPD2PS xmmreg,mem256 [rm: vex.256.66.0f 5a /r ] AR0-1,SY,AVX,SANDYBRIDGE */ + /* 270(001 005) 001(5a) 110 : AR0,AR1,SY,NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCVTPD2PS, 2, {XMMREG|RN_L16,MEMORY|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58855, 444, 3237}, + /* 3448 : VCVTPS2DQ xmmreg,xmmrm128 [rm: vex.128.66.0f 5b /r ] AVX,SANDYBRIDGE */ + /* 270(001 001) 001(5b) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCVTPS2DQ, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58862, 433, 3238}, + /* 3449 : VCVTPS2DQ ymmreg,ymmrm256 [rm: vex.256.66.0f 5b /r ] AVX,SANDYBRIDGE */ + /* 270(001 005) 001(5b) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCVTPS2DQ, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58869, 433, 3239}, + /* 3450 : VCVTPS2PD xmmreg,xmmrm64 [rm: vex.128.0f 5a /r ] AVX,SANDYBRIDGE */ + /* 270(001 000) 001(5a) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCVTPS2PD, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58876, 433, 3240}, + /* 3451 : VCVTPS2PD ymmreg,xmmrm128 [rm: vex.256.0f 5a /r ] AVX,SANDYBRIDGE */ + /* 270(001 004) 001(5a) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCVTPS2PD, 2, {YMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58883, 433, 3241}, + /* 3452 : VCVTSD2SI reg32,xmmrm64 [rm: vex.lig.f2.0f.w0 2d /r ] AVX,SANDYBRIDGE */ + /* 270(001 003) 001(2d) 110 : NOAPX,LIG,VEX,AVX,SANDYBRIDGE */ + {I_VCVTSD2SI, 2, {REG_GPR|BITS32|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58890, 445, 3242}, + /* 3453 : VCVTSD2SI reg64,xmmrm64 [rm: vex.lig.f2.0f.w1 2d /r ] LONG,PROT,AVX,X86_64,SANDYBRIDGE */ + /* 270(001 203) 001(2d) 110 : NOAPX,LIG,LONG,VEX,PROT,AVX,SANDYBRIDGE */ + {I_VCVTSD2SI, 2, {REG_GPR|BITS64|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58897, 446, 3243}, + /* 3454 : VCVTSD2SS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f 5a /r ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(5a) 120 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCVTSD2SS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+58904, 440, 3244}, + /* 3455 : VCVTSI2SD xmmreg,xmmreg*,rm32 [rvm: vex.nds.lig.f2.0f.w0 2a /r ] AR0,AR1,AR2,SD,AVX,SANDYBRIDGE */ + /* 261(001 003) 001(2a) 120 : AR0,AR1,AR2,SD,NOAPX,LIG,VEX,AVX,SANDYBRIDGE */ + {I_VCVTSI2SD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+58918, 447, 3245}, + /* 3456 : VCVTSI2SD xmmreg,xmmreg*,rm64 [rvm: vex.nds.lig.f2.0f.w1 2a /r ] AR0,AR1,AR2,SQ,LONG,PROT,AVX,X86_64,SANDYBRIDGE */ + /* 261(001 203) 001(2a) 120 : AR0,AR1,AR2,SQ,NOAPX,LIG,LONG,VEX,PROT,AVX,SANDYBRIDGE */ + {I_VCVTSI2SD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+58932, 449, 3247}, + /* 3457 : VCVTSI2SS xmmreg,xmmreg*,rm32 [rvm: vex.nds.lig.f3.0f.w0 2a /r ] AR0,AR1,AR2,SD,AVX,SANDYBRIDGE */ + /* 261(001 002) 001(2a) 120 : AR0,AR1,AR2,SD,NOAPX,LIG,VEX,AVX,SANDYBRIDGE */ + {I_VCVTSI2SS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+58946, 447, 3248}, + /* 3458 : VCVTSI2SS xmmreg,xmmreg*,rm64 [rvm: vex.nds.lig.f3.0f.w1 2a /r ] AR0,AR1,AR2,SQ,LONG,PROT,AVX,X86_64,SANDYBRIDGE */ + /* 261(001 202) 001(2a) 120 : AR0,AR1,AR2,SQ,NOAPX,LIG,LONG,VEX,PROT,AVX,SANDYBRIDGE */ + {I_VCVTSI2SS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_GPR|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+58960, 449, 3250}, + /* 3459 : VCVTSS2SD xmmreg,xmmreg*,xmmrm32 [rvm: vex.nds.lig.f3.0f 5a /r ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(5a) 120 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCVTSS2SD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+58974, 440, 3251}, + /* 3460 : VCVTSS2SI reg32,xmmrm32 [rm: vex.lig.f3.0f.w0 2d /r ] AVX,SANDYBRIDGE */ + /* 270(001 002) 001(2d) 110 : NOAPX,LIG,VEX,AVX,SANDYBRIDGE */ + {I_VCVTSS2SI, 2, {REG_GPR|BITS32|RN_L16,RM_XMM|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58988, 445, 3252}, + /* 3461 : VCVTSS2SI reg64,xmmrm32 [rm: vex.lig.f3.0f.w1 2d /r ] LONG,PROT,AVX,X86_64,SANDYBRIDGE */ + /* 270(001 202) 001(2d) 110 : NOAPX,LIG,LONG,VEX,PROT,AVX,SANDYBRIDGE */ + {I_VCVTSS2SI, 2, {REG_GPR|BITS64|RN_L16,RM_XMM|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58995, 446, 3253}, + /* 3462 : VCVTTPD2DQ xmmreg,xmmreg [rm: vex.128.66.0f e6 /r ] AVX,SANDYBRIDGE */ + /* 270(001 001) 001(e6) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCVTTPD2DQ, 2, {XMMREG|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59002, 433, 3254}, + /* 3463 : VCVTTPD2DQ xmmreg,mem128 [rm: vex.128.66.0f e6 /r ] AR0-1,SO,AVX,SANDYBRIDGE */ + /* 270(001 001) 001(e6) 110 : AR0,AR1,SO,NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCVTTPD2DQ, 2, {XMMREG|RN_L16,MEMORY|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59002, 443, 3255}, + /* 3464 : VCVTTPD2DQ xmmreg,ymmreg [rm: vex.256.66.0f e6 /r ] AVX,SANDYBRIDGE */ + /* 270(001 005) 001(e6) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCVTTPD2DQ, 2, {XMMREG|RN_L16,YMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59009, 433, 3256}, + /* 3465 : VCVTTPD2DQ xmmreg,mem256 [rm: vex.256.66.0f e6 /r ] AR0-1,SY,AVX,SANDYBRIDGE */ + /* 270(001 005) 001(e6) 110 : AR0,AR1,SY,NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCVTTPD2DQ, 2, {XMMREG|RN_L16,MEMORY|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59009, 444, 3257}, + /* 3466 : VCVTTPS2DQ xmmreg,xmmrm128 [rm: vex.128.f3.0f 5b /r ] AVX,SANDYBRIDGE */ + /* 270(001 002) 001(5b) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCVTTPS2DQ, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59016, 433, 3258}, + /* 3467 : VCVTTPS2DQ ymmreg,ymmrm256 [rm: vex.256.f3.0f 5b /r ] AVX,SANDYBRIDGE */ + /* 270(001 006) 001(5b) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VCVTTPS2DQ, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59023, 433, 3259}, + /* 3468 : VCVTTSD2SI reg32,xmmrm64 [rm: vex.lig.f2.0f.w0 2c /r ] AVX,SANDYBRIDGE */ + /* 270(001 003) 001(2c) 110 : NOAPX,LIG,VEX,AVX,SANDYBRIDGE */ + {I_VCVTTSD2SI, 2, {REG_GPR|BITS32|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59030, 445, 3260}, + /* 3469 : VCVTTSD2SI reg64,xmmrm64 [rm: vex.lig.f2.0f.w1 2c /r ] LONG,PROT,AVX,X86_64,SANDYBRIDGE */ + /* 270(001 203) 001(2c) 110 : NOAPX,LIG,LONG,VEX,PROT,AVX,SANDYBRIDGE */ + {I_VCVTTSD2SI, 2, {REG_GPR|BITS64|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59037, 446, 3261}, + /* 3470 : VCVTTSS2SI reg32,xmmrm32 [rm: vex.lig.f3.0f.w0 2c /r ] AVX,SANDYBRIDGE */ + /* 270(001 002) 001(2c) 110 : NOAPX,LIG,VEX,AVX,SANDYBRIDGE */ + {I_VCVTTSS2SI, 2, {REG_GPR|BITS32|RN_L16,RM_XMM|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59044, 445, 3262}, + /* 3471 : VCVTTSS2SI reg64,xmmrm32 [rm: vex.lig.f3.0f.w1 2c /r ] LONG,PROT,AVX,X86_64,SANDYBRIDGE */ + /* 270(001 202) 001(2c) 110 : NOAPX,LIG,LONG,VEX,PROT,AVX,SANDYBRIDGE */ + {I_VCVTTSS2SI, 2, {REG_GPR|BITS64|RN_L16,RM_XMM|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59051, 446, 3263}, + /* 3472 : VDIVPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 5e /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(5e) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VDIVPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59058, 433, 3264}, + /* 3473 : VDIVPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 5e /r ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(5e) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VDIVPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59072, 433, 3265}, + /* 3474 : VDIVPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f 5e /r ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(5e) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VDIVPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59086, 433, 3266}, + /* 3475 : VDIVPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f 5e /r ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(5e) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VDIVPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59100, 433, 3267}, + /* 3476 : VDIVSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f 5e /r ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(5e) 120 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VDIVSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59114, 440, 3268}, + /* 3477 : VDIVSS xmmreg,xmmreg*,xmmrm32 [rvm: vex.nds.lig.f3.0f 5e /r ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(5e) 120 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VDIVSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59128, 440, 3269}, + /* 3478 : VDPPD xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: vex.nds.128.66.0f3a 41 /r ib ] AVX,SANDYBRIDGE */ + /* 261(003 001) 001(41) 120 023 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VDPPD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+51971, 433, 3270}, + /* 3479 : VDPPS xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: vex.nds.128.66.0f3a 40 /r ib ] AVX,SANDYBRIDGE */ + /* 261(003 001) 001(40) 120 023 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VDPPS, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+51987, 433, 3271}, + /* 3480 : VDPPS ymmreg,ymmreg*,ymmrm256,imm8 [rvmi: vex.nds.256.66.0f3a 40 /r ib ] AVX,SANDYBRIDGE */ + /* 261(003 005) 001(40) 120 023 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VDPPS, 4, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+52003, 433, 3272}, + /* 3481 : VEXTRACTF128 xmmrm128,ymmreg,imm8 [mri: vex.256.66.0f3a.w0 19 /r ib ] AVX,SANDYBRIDGE */ + /* 270(003 005) 001(19) 101 022 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VEXTRACTF128, 3, {RM_XMM|BITS128|RN_L16,YMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52019, 441, 3273}, + /* 3482 : VEXTRACTPS rm32,xmmreg,imm8 [mri: vex.128.66.0f3a 17 /r ib ] AVX,SANDYBRIDGE */ + /* 270(003 001) 001(17) 101 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VEXTRACTPS, 3, {RM_GPR|BITS32|RN_L16,XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52027, 433, 3274}, + /* 3483 : VHADDPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 7c /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(7c) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VHADDPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59142, 433, 3275}, + /* 3484 : VHADDPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 7c /r ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(7c) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VHADDPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59156, 433, 3276}, + /* 3485 : VHADDPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.f2.0f 7c /r ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(7c) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VHADDPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59170, 433, 3277}, + /* 3486 : VHADDPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.f2.0f 7c /r ] AVX,SANDYBRIDGE */ + /* 261(001 007) 001(7c) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VHADDPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59184, 433, 3278}, + /* 3487 : VHSUBPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 7d /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(7d) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VHSUBPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59198, 433, 3279}, + /* 3488 : VHSUBPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 7d /r ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(7d) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VHSUBPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59212, 433, 3280}, + /* 3489 : VHSUBPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.f2.0f 7d /r ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(7d) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VHSUBPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59226, 433, 3281}, + /* 3490 : VHSUBPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.f2.0f 7d /r ] AVX,SANDYBRIDGE */ + /* 261(001 007) 001(7d) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VHSUBPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59240, 433, 3282}, + /* 3491 : VINSERTF128 ymmreg,ymmreg*,xmmrm128,imm8 [rvmi: vex.nds.256.66.0f3a.w0 18 /r ib ] AVX,SANDYBRIDGE */ + /* 261(003 005) 001(18) 120 023 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VINSERTF128, 4, {YMMREG|RN_L16,YMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+52035, 441, 3283}, + /* 3492 : VINSERTPS xmmreg,xmmreg*,xmmrm32,imm8 [rvmi: vex.nds.128.66.0f3a 21 /r ib ] AVX,SANDYBRIDGE */ + /* 261(003 001) 001(21) 120 023 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VINSERTPS, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+52051, 433, 3284}, + /* 3493 : VLDDQU xmmreg,mem128 [rm: vex.128.f2.0f f0 /r ] AVX,SANDYBRIDGE */ + /* 270(001 003) 001(f0) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VLDDQU, 2, {XMMREG|RN_L16,MEMORY|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59254, 433, 3285}, + /* 3494 : VLDQQU ymmreg,mem256 [rm: vex.256.f2.0f f0 /r ] AVX,SANDYBRIDGE */ + /* 270(001 007) 001(f0) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VLDQQU, 2, {YMMREG|RN_L16,MEMORY|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59261, 433, 3286}, + /* 3495 : VLDDQU ymmreg,mem256 [rm: vex.256.f2.0f f0 /r ] AVX,SANDYBRIDGE */ + /* 270(001 007) 001(f0) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VLDDQU, 2, {YMMREG|RN_L16,MEMORY|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59261, 433, 3287}, + /* 3496 : VLDMXCSR mem32 [m: vex.lz.0f ae /2 ] AVX,SANDYBRIDGE */ + /* 270(001 000) 001(ae) 202 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VLDMXCSR, 1, {MEMORY|BITS32|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+59268, 433, 3288}, + /* 3497 : VMASKMOVDQU xmmreg,xmmreg [rm: vex.128.66.0f f7 /r ] AVX,SANDYBRIDGE */ + /* 270(001 001) 001(f7) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMASKMOVDQU, 2, {XMMREG|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59275, 433, 3289}, + /* 3498 : VMASKMOVPS xmmreg,xmmreg,mem128 [rvm: vex.nds.128.66.0f38.w0 2c /r ] AVX,SANDYBRIDGE */ + /* 261(002 001) 001(2c) 120 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VMASKMOVPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,MEMORY|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59282, 441, 3290}, + /* 3499 : VMASKMOVPS ymmreg,ymmreg,mem256 [rvm: vex.nds.256.66.0f38.w0 2c /r ] AVX,SANDYBRIDGE */ + /* 261(002 005) 001(2c) 120 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VMASKMOVPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,MEMORY|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59289, 441, 3291}, + /* 3500 : VMASKMOVPS mem128,xmmreg,xmmreg [mvr: vex.nds.128.66.0f38.w0 2e /r ] AR0-2,SO,AVX,SANDYBRIDGE */ + /* 261(002 001) 001(2e) 102 : AR0,AR1,AR2,SO,NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VMASKMOVPS, 3, {MEMORY|BITS128|RN_L16,XMMREG|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59296, 451, 3292}, + /* 3501 : VMASKMOVPS mem256,ymmreg,ymmreg [mvr: vex.nds.256.66.0f38.w0 2e /r ] AR0-2,SY,AVX,SANDYBRIDGE */ + /* 261(002 005) 001(2e) 102 : AR0,AR1,AR2,SY,NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VMASKMOVPS, 3, {MEMORY|BITS256|RN_L16,YMMREG|RN_L16,YMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59303, 452, 3293}, + /* 3502 : VMASKMOVPD xmmreg,xmmreg,mem128 [rvm: vex.nds.128.66.0f38.w0 2d /r ] AVX,SANDYBRIDGE */ + /* 261(002 001) 001(2d) 120 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VMASKMOVPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,MEMORY|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59310, 441, 3294}, + /* 3503 : VMASKMOVPD ymmreg,ymmreg,mem256 [rvm: vex.nds.256.66.0f38.w0 2d /r ] AVX,SANDYBRIDGE */ + /* 261(002 005) 001(2d) 120 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VMASKMOVPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,MEMORY|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59317, 441, 3295}, + /* 3504 : VMASKMOVPD mem128,xmmreg,xmmreg [mvr: vex.nds.128.66.0f38.w0 2f /r ] AVX,SANDYBRIDGE */ + /* 261(002 001) 001(2f) 102 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VMASKMOVPD, 3, {MEMORY|BITS128|RN_L16,XMMREG|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59324, 441, 3296}, + /* 3505 : VMASKMOVPD mem256,ymmreg,ymmreg [mvr: vex.nds.256.66.0f38.w0 2f /r ] AVX,SANDYBRIDGE */ + /* 261(002 005) 001(2f) 102 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VMASKMOVPD, 3, {MEMORY|BITS256|RN_L16,YMMREG|RN_L16,YMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59331, 441, 3297}, + /* 3506 : VMAXPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 5f /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(5f) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMAXPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59338, 433, 3298}, + /* 3507 : VMAXPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 5f /r ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(5f) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMAXPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59352, 433, 3299}, + /* 3508 : VMAXPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f 5f /r ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(5f) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMAXPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59366, 433, 3300}, + /* 3509 : VMAXPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f 5f /r ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(5f) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMAXPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59380, 433, 3301}, + /* 3510 : VMAXSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f 5f /r ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(5f) 120 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMAXSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59394, 440, 3302}, + /* 3511 : VMAXSS xmmreg,xmmreg*,xmmrm32 [rvm: vex.nds.lig.f3.0f 5f /r ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(5f) 120 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMAXSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59408, 440, 3303}, + /* 3512 : VMINPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 5d /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(5d) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMINPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59422, 433, 3304}, + /* 3513 : VMINPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 5d /r ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(5d) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMINPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59436, 433, 3305}, + /* 3514 : VMINPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f 5d /r ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(5d) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMINPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59450, 433, 3306}, + /* 3515 : VMINPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f 5d /r ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(5d) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMINPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59464, 433, 3307}, + /* 3516 : VMINSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f 5d /r ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(5d) 120 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMINSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59478, 440, 3308}, + /* 3517 : VMINSS xmmreg,xmmreg*,xmmrm32 [rvm: vex.nds.lig.f3.0f 5d /r ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(5d) 120 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMINSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59492, 440, 3309}, + /* 3518 : VMOVAPD xmmreg,xmmrm128 [rm: vex.128.66.0f 28 /r ] AVX,SANDYBRIDGE */ + /* 270(001 001) 001(28) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVAPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59506, 433, 3310}, + /* 3519 : VMOVAPD xmmrm128,xmmreg [mr: vex.128.66.0f 29 /r ] AVX,SANDYBRIDGE */ + /* 270(001 001) 001(29) 101 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVAPD, 2, {RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59513, 433, 3311}, + /* 3520 : VMOVAPD ymmreg,ymmrm256 [rm: vex.256.66.0f 28 /r ] AVX,SANDYBRIDGE */ + /* 270(001 005) 001(28) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVAPD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59520, 433, 3312}, + /* 3521 : VMOVAPD ymmrm256,ymmreg [mr: vex.256.66.0f 29 /r ] AVX,SANDYBRIDGE */ + /* 270(001 005) 001(29) 101 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVAPD, 2, {RM_YMM|BITS256|RN_L16,YMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59527, 433, 3313}, + /* 3522 : VMOVAPS xmmreg,xmmrm128 [rm: vex.128.0f 28 /r ] AVX,SANDYBRIDGE */ + /* 270(001 000) 001(28) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVAPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59534, 433, 3314}, + /* 3523 : VMOVAPS xmmrm128,xmmreg [mr: vex.128.0f 29 /r ] AVX,SANDYBRIDGE */ + /* 270(001 000) 001(29) 101 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVAPS, 2, {RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59541, 433, 3315}, + /* 3524 : VMOVAPS ymmreg,ymmrm256 [rm: vex.256.0f 28 /r ] AVX,SANDYBRIDGE */ + /* 270(001 004) 001(28) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVAPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59548, 433, 3316}, + /* 3525 : VMOVAPS ymmrm256,ymmreg [mr: vex.256.0f 29 /r ] AVX,SANDYBRIDGE */ + /* 270(001 004) 001(29) 101 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVAPS, 2, {RM_YMM|BITS256|RN_L16,YMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59555, 433, 3317}, + /* 3526 : VMOVD xmmreg,rm32 [rm: vex.128.66.0f.w0 6e /r ] AVX,SANDYBRIDGE */ + /* 270(001 001) 001(6e) 110 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VMOVD, 2, {XMMREG|RN_L16,RM_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59562, 441, 3318}, + /* 3527 : VMOVD rm32,xmmreg [mr: vex.128.66.0f.w0 7e /r ] AVX,SANDYBRIDGE */ + /* 270(001 001) 001(7e) 101 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VMOVD, 2, {RM_GPR|BITS32|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59569, 441, 3319}, + /* 3528 : VMOVQ xmmreg,xmmrm64 [rm: vex.128.f3.0f 7e /r ] AR0-1,SQ,AVX,SANDYBRIDGE */ + /* 270(001 002) 001(7e) 110 : AR0,AR1,SQ,NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVQ, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59576, 453, 3320}, + /* 3529 : VMOVQ xmmrm64,xmmreg [mr: vex.128.66.0f d6 /r ] AR0-1,SQ,AVX,SANDYBRIDGE */ + /* 270(001 001) 001(d6) 101 : AR0,AR1,SQ,NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVQ, 2, {RM_XMM|BITS64|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59583, 453, 3321}, + /* 3530 : VMOVQ xmmreg,rm64 [rm: vex.128.66.0f.w1 6e /r ] AR0-1,SQ,LONG,PROT,AVX,X86_64,SANDYBRIDGE */ + /* 270(001 201) 001(6e) 110 : AR0,AR1,SQ,NOAPX,LONG,VEX,PROT,AVX,SANDYBRIDGE */ + {I_VMOVQ, 2, {XMMREG|RN_L16,RM_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59590, 454, 3322}, + /* 3531 : VMOVQ rm64,xmmreg [mr: vex.128.66.0f.w1 7e /r ] AR0-1,SQ,LONG,PROT,AVX,X86_64,SANDYBRIDGE */ + /* 270(001 201) 001(7e) 101 : AR0,AR1,SQ,NOAPX,LONG,VEX,PROT,AVX,SANDYBRIDGE */ + {I_VMOVQ, 2, {RM_GPR|BITS64|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59597, 454, 3323}, + /* 3532 : VMOVDDUP xmmreg,xmmrm64 [rm: vex.128.f2.0f 12 /r ] AVX,SANDYBRIDGE */ + /* 270(001 003) 001(12) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVDDUP, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59604, 433, 3324}, + /* 3533 : VMOVDDUP ymmreg,ymmrm256 [rm: vex.256.f2.0f 12 /r ] AVX,SANDYBRIDGE */ + /* 270(001 007) 001(12) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVDDUP, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59611, 433, 3325}, + /* 3534 : VMOVDQA xmmreg,xmmrm128 [rm: vex.128.66.0f 6f /r ] AVX,SANDYBRIDGE */ + /* 270(001 001) 001(6f) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVDQA, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59618, 433, 3326}, + /* 3535 : VMOVDQA xmmrm128,xmmreg [mr: vex.128.66.0f 7f /r ] AVX,SANDYBRIDGE */ + /* 270(001 001) 001(7f) 101 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVDQA, 2, {RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59625, 433, 3327}, + /* 3536 : VMOVQQA ymmreg,ymmrm256 [rm: vex.256.66.0f 6f /r ] AVX,SANDYBRIDGE */ + /* 270(001 005) 001(6f) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVQQA, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59632, 433, 3329}, + /* 3537 : VMOVQQA ymmrm256,ymmreg [mr: vex.256.66.0f 7f /r ] AVX,SANDYBRIDGE */ + /* 270(001 005) 001(7f) 101 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVQQA, 2, {RM_YMM|BITS256|RN_L16,YMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59639, 433, 3330}, + /* 3538 : VMOVDQA ymmreg,ymmrm256 [rm: vex.256.66.0f 6f /r ] AVX,SANDYBRIDGE */ + /* 270(001 005) 001(6f) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVDQA, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59632, 433, 3331}, + /* 3539 : VMOVDQA ymmrm256,ymmreg [mr: vex.256.66.0f 7f /r ] AVX,SANDYBRIDGE */ + /* 270(001 005) 001(7f) 101 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVDQA, 2, {RM_YMM|BITS256|RN_L16,YMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59639, 433, 3332}, + /* 3540 : VMOVDQU xmmreg,xmmrm128 [rm: vex.128.f3.0f 6f /r ] AVX,SANDYBRIDGE */ + /* 270(001 002) 001(6f) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVDQU, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59646, 433, 3333}, + /* 3541 : VMOVDQU xmmrm128,xmmreg [mr: vex.128.f3.0f 7f /r ] AVX,SANDYBRIDGE */ + /* 270(001 002) 001(7f) 101 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVDQU, 2, {RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59653, 433, 3334}, + /* 3542 : VMOVQQU ymmreg,ymmrm256 [rm: vex.256.f3.0f 6f /r ] AVX,SANDYBRIDGE */ + /* 270(001 006) 001(6f) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVQQU, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59660, 433, 3336}, + /* 3543 : VMOVQQU ymmrm256,ymmreg [mr: vex.256.f3.0f 7f /r ] AVX,SANDYBRIDGE */ + /* 270(001 006) 001(7f) 101 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVQQU, 2, {RM_YMM|BITS256|RN_L16,YMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59667, 433, 3337}, + /* 3544 : VMOVDQU ymmreg,ymmrm256 [rm: vex.256.f3.0f 6f /r ] AVX,SANDYBRIDGE */ + /* 270(001 006) 001(6f) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVDQU, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59660, 433, 3338}, + /* 3545 : VMOVDQU ymmrm256,ymmreg [mr: vex.256.f3.0f 7f /r ] AVX,SANDYBRIDGE */ + /* 270(001 006) 001(7f) 101 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVDQU, 2, {RM_YMM|BITS256|RN_L16,YMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59667, 433, 3339}, + /* 3546 : VMOVHLPS xmmreg,xmmreg*,xmmreg [rvm: vex.nds.128.0f 12 /r ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(12) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVHLPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59674, 433, 3340}, + /* 3547 : VMOVHPD xmmreg,xmmreg*,mem64 [rvm: vex.nds.128.66.0f 16 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(16) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVHPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,MEMORY|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59688, 433, 3341}, + /* 3548 : VMOVHPD mem64,xmmreg [mr: vex.128.66.0f 17 /r ] AVX,SANDYBRIDGE */ + /* 270(001 001) 001(17) 101 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVHPD, 2, {MEMORY|BITS64|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59702, 433, 3342}, + /* 3549 : VMOVHPS xmmreg,xmmreg*,mem64 [rvm: vex.nds.128.0f 16 /r ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(16) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVHPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,MEMORY|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59709, 433, 3343}, + /* 3550 : VMOVHPS mem64,xmmreg [mr: vex.128.0f 17 /r ] AVX,SANDYBRIDGE */ + /* 270(001 000) 001(17) 101 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVHPS, 2, {MEMORY|BITS64|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59723, 433, 3344}, + /* 3551 : VMOVLHPS xmmreg,xmmreg*,xmmreg [rvm: vex.nds.128.0f 16 /r ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(16) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVLHPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59709, 433, 3345}, + /* 3552 : VMOVLPD xmmreg,xmmreg*,mem64 [rvm: vex.nds.128.66.0f 12 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(12) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVLPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,MEMORY|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59730, 433, 3346}, + /* 3553 : VMOVLPD mem64,xmmreg [mr: vex.128.66.0f 13 /r ] AVX,SANDYBRIDGE */ + /* 270(001 001) 001(13) 101 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVLPD, 2, {MEMORY|BITS64|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59744, 433, 3347}, + /* 3554 : VMOVLPS xmmreg,xmmreg*,mem64 [rvm: vex.nds.128.0f 12 /r ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(12) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVLPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,MEMORY|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59674, 433, 3348}, + /* 3555 : VMOVLPS mem64,xmmreg [mr: vex.128.0f 13 /r ] AVX,SANDYBRIDGE */ + /* 270(001 000) 001(13) 101 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVLPS, 2, {MEMORY|BITS64|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59751, 433, 3349}, + /* 3556 : VMOVMSKPD reg64,xmmreg [rm: vex.128.66.0f 50 /r ] LONG,PROT,AVX,X86_64,SANDYBRIDGE */ + /* 270(001 001) 001(50) 110 : NOAPX,WIG,LONG,VEX,PROT,AVX,SANDYBRIDGE */ + {I_VMOVMSKPD, 2, {REG_GPR|BITS64|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59758, 455, 3350}, + /* 3557 : VMOVMSKPD reg32,xmmreg [rm: vex.128.66.0f 50 /r ] AVX,SANDYBRIDGE */ + /* 270(001 001) 001(50) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVMSKPD, 2, {REG_GPR|BITS32|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59758, 433, 3351}, + /* 3558 : VMOVMSKPD reg64,ymmreg [rm: vex.256.66.0f 50 /r ] LONG,PROT,AVX,X86_64,SANDYBRIDGE */ + /* 270(001 005) 001(50) 110 : NOAPX,WIG,LONG,VEX,PROT,AVX,SANDYBRIDGE */ + {I_VMOVMSKPD, 2, {REG_GPR|BITS64|RN_L16,YMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59765, 455, 3352}, + /* 3559 : VMOVMSKPD reg32,ymmreg [rm: vex.256.66.0f 50 /r ] AVX,SANDYBRIDGE */ + /* 270(001 005) 001(50) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVMSKPD, 2, {REG_GPR|BITS32|RN_L16,YMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59765, 433, 3353}, + /* 3560 : VMOVMSKPS reg64,xmmreg [rm: vex.128.0f 50 /r ] LONG,PROT,AVX,X86_64,SANDYBRIDGE */ + /* 270(001 000) 001(50) 110 : NOAPX,WIG,LONG,VEX,PROT,AVX,SANDYBRIDGE */ + {I_VMOVMSKPS, 2, {REG_GPR|BITS64|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59772, 455, 3354}, + /* 3561 : VMOVMSKPS reg32,xmmreg [rm: vex.128.0f 50 /r ] AVX,SANDYBRIDGE */ + /* 270(001 000) 001(50) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVMSKPS, 2, {REG_GPR|BITS32|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59772, 433, 3355}, + /* 3562 : VMOVMSKPS reg64,ymmreg [rm: vex.256.0f 50 /r ] LONG,PROT,AVX,X86_64,SANDYBRIDGE */ + /* 270(001 004) 001(50) 110 : NOAPX,WIG,LONG,VEX,PROT,AVX,SANDYBRIDGE */ + {I_VMOVMSKPS, 2, {REG_GPR|BITS64|RN_L16,YMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59779, 455, 3356}, + /* 3563 : VMOVMSKPS reg32,ymmreg [rm: vex.256.0f 50 /r ] AVX,SANDYBRIDGE */ + /* 270(001 004) 001(50) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVMSKPS, 2, {REG_GPR|BITS32|RN_L16,YMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59779, 433, 3357}, + /* 3564 : VMOVNTDQ mem128,xmmreg [mr: vex.128.66.0f e7 /r ] AVX,SANDYBRIDGE */ + /* 270(001 001) 001(e7) 101 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVNTDQ, 2, {MEMORY|BITS128|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59786, 433, 3358}, + /* 3565 : VMOVNTQQ mem256,ymmreg [mr: vex.256.66.0f e7 /r ] AVX,SANDYBRIDGE */ + /* 270(001 005) 001(e7) 101 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVNTQQ, 2, {MEMORY|BITS256|RN_L16,YMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59793, 433, 3360}, + /* 3566 : VMOVNTDQ mem256,ymmreg [mr: vex.256.66.0f e7 /r ] AVX,SANDYBRIDGE */ + /* 270(001 005) 001(e7) 101 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVNTDQ, 2, {MEMORY|BITS256|RN_L16,YMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59793, 433, 3361}, + /* 3567 : VMOVNTDQA xmmreg,mem128 [rm: vex.128.66.0f38 2a /r ] AVX,SANDYBRIDGE */ + /* 270(002 001) 001(2a) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVNTDQA, 2, {XMMREG|RN_L16,MEMORY|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59800, 433, 3362}, + /* 3568 : VMOVNTPD mem128,xmmreg [mr: vex.128.66.0f 2b /r ] AVX,SANDYBRIDGE */ + /* 270(001 001) 001(2b) 101 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVNTPD, 2, {MEMORY|BITS128|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59807, 433, 3363}, + /* 3569 : VMOVNTPD mem256,ymmreg [mr: vex.256.66.0f 2b /r ] AVX,SANDYBRIDGE */ + /* 270(001 005) 001(2b) 101 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVNTPD, 2, {MEMORY|BITS256|RN_L16,YMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59814, 433, 3364}, + /* 3570 : VMOVNTPS mem128,xmmreg [mr: vex.128.0f 2b /r ] AVX,SANDYBRIDGE */ + /* 270(001 000) 001(2b) 101 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVNTPS, 2, {MEMORY|BITS128|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59821, 433, 3365}, + /* 3571 : VMOVNTPS mem256,ymmreg [mr: vex.256.0f 2b /r ] AVX,SANDYBRIDGE */ + /* 270(001 004) 001(2b) 101 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVNTPS, 2, {MEMORY|BITS256|RN_L16,YMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59828, 433, 3366}, + /* 3572 : VMOVSD xmmreg,xmmreg*,xmmreg [rvm: vex.nds.lig.f2.0f 10 /r ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(10) 120 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59835, 440, 3367}, + /* 3573 : VMOVSD xmmreg,mem64 [rm: vex.lig.f2.0f 10 /r ] AVX,SANDYBRIDGE */ + /* 270(001 003) 001(10) 110 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVSD, 2, {XMMREG|RN_L16,MEMORY|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59849, 440, 3368}, + /* 3574 : VMOVSD xmmreg,xmmreg*,xmmreg [mvr: vex.nds.lig.f2.0f 11 /r ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(11) 102 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59856, 440, 3369}, + /* 3575 : VMOVSD mem64,xmmreg [mr: vex.lig.f2.0f 11 /r ] AVX,SANDYBRIDGE */ + /* 270(001 003) 001(11) 101 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVSD, 2, {MEMORY|BITS64|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59870, 440, 3370}, + /* 3576 : VMOVSHDUP xmmreg,xmmrm128 [rm: vex.128.f3.0f 16 /r ] AVX,SANDYBRIDGE */ + /* 270(001 002) 001(16) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVSHDUP, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59877, 433, 3371}, + /* 3577 : VMOVSHDUP ymmreg,ymmrm256 [rm: vex.256.f3.0f 16 /r ] AVX,SANDYBRIDGE */ + /* 270(001 006) 001(16) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVSHDUP, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59884, 433, 3372}, + /* 3578 : VMOVSLDUP xmmreg,xmmrm128 [rm: vex.128.f3.0f 12 /r ] AVX,SANDYBRIDGE */ + /* 270(001 002) 001(12) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVSLDUP, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59891, 433, 3373}, + /* 3579 : VMOVSLDUP ymmreg,ymmrm256 [rm: vex.256.f3.0f 12 /r ] AVX,SANDYBRIDGE */ + /* 270(001 006) 001(12) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVSLDUP, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59898, 433, 3374}, + /* 3580 : VMOVSS xmmreg,xmmreg*,xmmreg [rvm: vex.nds.lig.f3.0f 10 /r ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(10) 120 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59905, 440, 3375}, + /* 3581 : VMOVSS xmmreg,mem32 [rm: vex.lig.f3.0f 10 /r ] AVX,SANDYBRIDGE */ + /* 270(001 002) 001(10) 110 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVSS, 2, {XMMREG|RN_L16,MEMORY|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59919, 440, 3376}, + /* 3582 : VMOVSS xmmreg,xmmreg*,xmmreg [mvr: vex.nds.lig.f3.0f 11 /r ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(11) 102 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+59926, 440, 3377}, + /* 3583 : VMOVSS mem32,xmmreg [mr: vex.lig.f3.0f 11 /r ] AVX,SANDYBRIDGE */ + /* 270(001 002) 001(11) 101 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVSS, 2, {MEMORY|BITS32|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59940, 440, 3378}, + /* 3584 : VMOVUPD xmmreg,xmmrm128 [rm: vex.128.66.0f 10 /r ] AVX,SANDYBRIDGE */ + /* 270(001 001) 001(10) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVUPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59947, 433, 3379}, + /* 3585 : VMOVUPD xmmrm128,xmmreg [mr: vex.128.66.0f 11 /r ] AVX,SANDYBRIDGE */ + /* 270(001 001) 001(11) 101 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVUPD, 2, {RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59954, 433, 3380}, + /* 3586 : VMOVUPD ymmreg,ymmrm256 [rm: vex.256.66.0f 10 /r ] AVX,SANDYBRIDGE */ + /* 270(001 005) 001(10) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVUPD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59961, 433, 3381}, + /* 3587 : VMOVUPD ymmrm256,ymmreg [mr: vex.256.66.0f 11 /r ] AVX,SANDYBRIDGE */ + /* 270(001 005) 001(11) 101 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVUPD, 2, {RM_YMM|BITS256|RN_L16,YMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59968, 433, 3382}, + /* 3588 : VMOVUPS xmmreg,xmmrm128 [rm: vex.128.0f 10 /r ] AVX,SANDYBRIDGE */ + /* 270(001 000) 001(10) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVUPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59975, 433, 3383}, + /* 3589 : VMOVUPS xmmrm128,xmmreg [mr: vex.128.0f 11 /r ] AVX,SANDYBRIDGE */ + /* 270(001 000) 001(11) 101 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVUPS, 2, {RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59982, 433, 3384}, + /* 3590 : VMOVUPS ymmreg,ymmrm256 [rm: vex.256.0f 10 /r ] AVX,SANDYBRIDGE */ + /* 270(001 004) 001(10) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVUPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59989, 433, 3385}, + /* 3591 : VMOVUPS ymmrm256,ymmreg [mr: vex.256.0f 11 /r ] AVX,SANDYBRIDGE */ + /* 270(001 004) 001(11) 101 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMOVUPS, 2, {RM_YMM|BITS256|RN_L16,YMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+59996, 433, 3386}, + /* 3592 : VMPSADBW xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: vex.nds.128.66.0f3a 42 /r ib ] AVX,SANDYBRIDGE */ + /* 261(003 001) 001(42) 120 023 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMPSADBW, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+52067, 433, 3387}, + /* 3593 : VMULPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 59 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(59) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMULPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60003, 433, 3388}, + /* 3594 : VMULPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 59 /r ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(59) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMULPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60017, 433, 3389}, + /* 3595 : VMULPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f 59 /r ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(59) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMULPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60031, 433, 3390}, + /* 3596 : VMULPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f 59 /r ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(59) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMULPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60045, 433, 3391}, + /* 3597 : VMULSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f 59 /r ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(59) 120 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMULSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60059, 440, 3392}, + /* 3598 : VMULSS xmmreg,xmmreg*,xmmrm32 [rvm: vex.nds.lig.f3.0f 59 /r ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(59) 120 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VMULSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60073, 440, 3393}, + /* 3599 : VORPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 56 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(56) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VORPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60087, 433, 3394}, + /* 3600 : VORPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 56 /r ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(56) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VORPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60101, 433, 3395}, + /* 3601 : VORPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f 56 /r ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(56) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VORPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60115, 433, 3396}, + /* 3602 : VORPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f 56 /r ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(56) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VORPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60129, 433, 3397}, + /* 3603 : VPABSB xmmreg,xmmrm128 [rm: vex.128.66.0f38 1c /r ] AVX,SANDYBRIDGE */ + /* 270(002 001) 001(1c) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPABSB, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60143, 433, 3398}, + /* 3604 : VPABSW xmmreg,xmmrm128 [rm: vex.128.66.0f38 1d /r ] AVX,SANDYBRIDGE */ + /* 270(002 001) 001(1d) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPABSW, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60150, 433, 3399}, + /* 3605 : VPABSD xmmreg,xmmrm128 [rm: vex.128.66.0f38 1e /r ] AVX,SANDYBRIDGE */ + /* 270(002 001) 001(1e) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPABSD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60157, 433, 3400}, + /* 3606 : VPACKSSWB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 63 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(63) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPACKSSWB, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60164, 433, 3401}, + /* 3607 : VPACKSSDW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 6b /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(6b) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPACKSSDW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60178, 433, 3402}, + /* 3608 : VPACKUSWB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 67 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(67) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPACKUSWB, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60192, 433, 3403}, + /* 3609 : VPACKUSDW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 2b /r ] AVX,SANDYBRIDGE */ + /* 261(002 001) 001(2b) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPACKUSDW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60206, 433, 3404}, + /* 3610 : VPADDB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f fc /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(fc) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPADDB, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60220, 433, 3405}, + /* 3611 : VPADDW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f fd /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(fd) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPADDW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60234, 433, 3406}, + /* 3612 : VPADDD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f fe /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(fe) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPADDD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60248, 433, 3407}, + /* 3613 : VPADDQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f d4 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(d4) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPADDQ, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60262, 433, 3408}, + /* 3614 : VPADDSB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f ec /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(ec) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPADDSB, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60276, 433, 3409}, + /* 3615 : VPADDSW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f ed /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(ed) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPADDSW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60290, 433, 3410}, + /* 3616 : VPADDUSB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f dc /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(dc) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPADDUSB, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60304, 433, 3411}, + /* 3617 : VPADDUSW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f dd /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(dd) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPADDUSW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60318, 433, 3412}, + /* 3618 : VPALIGNR xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: vex.nds.128.66.0f3a 0f /r ib ] AVX,SANDYBRIDGE */ + /* 261(003 001) 001(0f) 120 023 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPALIGNR, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+52083, 433, 3413}, + /* 3619 : VPAND xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f db /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(db) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPAND, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60332, 433, 3414}, + /* 3620 : VPANDN xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f df /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(df) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPANDN, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60346, 433, 3415}, + /* 3621 : VPAVGB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f e0 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(e0) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPAVGB, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60360, 433, 3416}, + /* 3622 : VPAVGW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f e3 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(e3) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPAVGW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60374, 433, 3417}, + /* 3623 : VPBLENDVB xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: vex.nds.128.66.0f3a.w0 4c /r /is4 ] AVX,SANDYBRIDGE */ + /* 261(003 001) 001(4c) 120 177 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VPBLENDVB, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+52099, 441, 3418}, + /* 3624 : VPBLENDW xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: vex.nds.128.66.0f3a 0e /r ib ] AVX,SANDYBRIDGE */ + /* 261(003 001) 001(0e) 120 023 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPBLENDW, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+52115, 433, 3419}, + /* 3625 : VPCMPESTRI xmmreg,xmmrm128,imm8 [rmi: vex.128.66.0f3a 61 /r ib ] AVX,SANDYBRIDGE */ + /* 270(003 001) 001(61) 110 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPCMPESTRI, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52131, 433, 3420}, + /* 3626 : VPCMPESTRM xmmreg,xmmrm128,imm8 [rmi: vex.128.66.0f3a 60 /r ib ] AVX,SANDYBRIDGE */ + /* 270(003 001) 001(60) 110 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPCMPESTRM, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52139, 433, 3421}, + /* 3627 : VPCMPISTRI xmmreg,xmmrm128,imm8 [rmi: vex.128.66.0f3a 63 /r ib ] AVX,SANDYBRIDGE */ + /* 270(003 001) 001(63) 110 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPCMPISTRI, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52147, 433, 3422}, + /* 3628 : VPCMPISTRM xmmreg,xmmrm128,imm8 [rmi: vex.128.66.0f3a 62 /r ib ] AVX,SANDYBRIDGE */ + /* 270(003 001) 001(62) 110 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPCMPISTRM, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52155, 433, 3423}, + /* 3629 : VPCMPEQB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 74 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(74) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPCMPEQB, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60388, 433, 3424}, + /* 3630 : VPCMPEQW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 75 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(75) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPCMPEQW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60402, 433, 3425}, + /* 3631 : VPCMPEQD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 76 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(76) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPCMPEQD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60416, 433, 3426}, + /* 3632 : VPCMPEQQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 29 /r ] AVX,SANDYBRIDGE */ + /* 261(002 001) 001(29) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPCMPEQQ, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60430, 433, 3427}, + /* 3633 : VPCMPGTB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 64 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(64) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPCMPGTB, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60444, 433, 3428}, + /* 3634 : VPCMPGTW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 65 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(65) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPCMPGTW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60458, 433, 3429}, + /* 3635 : VPCMPGTD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 66 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(66) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPCMPGTD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60472, 433, 3430}, + /* 3636 : VPCMPGTQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 37 /r ] AVX,SANDYBRIDGE */ + /* 261(002 001) 001(37) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPCMPGTQ, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60486, 433, 3431}, + /* 3637 : VPERMILPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38.w0 0d /r ] AVX,SANDYBRIDGE */ + /* 261(002 001) 001(0d) 120 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VPERMILPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60500, 441, 3432}, + /* 3638 : VPERMILPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38.w0 0d /r ] AVX,SANDYBRIDGE */ + /* 261(002 005) 001(0d) 120 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VPERMILPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60514, 441, 3433}, + /* 3639 : VPERMILPD xmmreg,xmmrm128,imm8 [rmi: vex.128.66.0f3a.w0 05 /r ib ] AVX,SANDYBRIDGE */ + /* 270(003 001) 001(05) 110 022 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VPERMILPD, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52163, 441, 3434}, + /* 3640 : VPERMILPD ymmreg,ymmrm256,imm8 [rmi: vex.256.66.0f3a.w0 05 /r ib ] AVX,SANDYBRIDGE */ + /* 270(003 005) 001(05) 110 022 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VPERMILPD, 3, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52171, 441, 3435}, + /* 3641 : VPERMILPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38.w0 0c /r ] AVX,SANDYBRIDGE */ + /* 261(002 001) 001(0c) 120 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VPERMILPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60528, 441, 3436}, + /* 3642 : VPERMILPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38.w0 0c /r ] AVX,SANDYBRIDGE */ + /* 261(002 005) 001(0c) 120 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VPERMILPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60542, 441, 3437}, + /* 3643 : VPERMILPS xmmreg,xmmrm128,imm8 [rmi: vex.128.66.0f3a.w0 04 /r ib ] AVX,SANDYBRIDGE */ + /* 270(003 001) 001(04) 110 022 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VPERMILPS, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52179, 441, 3438}, + /* 3644 : VPERMILPS ymmreg,ymmrm256,imm8 [rmi: vex.256.66.0f3a.w0 04 /r ib ] AVX,SANDYBRIDGE */ + /* 270(003 005) 001(04) 110 022 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VPERMILPS, 3, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52187, 441, 3439}, + /* 3645 : VPERM2F128 ymmreg,ymmreg*,ymmrm256,imm8 [rvmi: vex.nds.256.66.0f3a.w0 06 /r ib ] AVX,SANDYBRIDGE */ + /* 261(003 005) 001(06) 120 023 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VPERM2F128, 4, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+52195, 441, 3440}, + /* 3646 : VPEXTRB reg64,xmmreg,imm8 [mri: vex.128.66.0f3a.w0 14 /r ib ] LONG,PROT,AVX,X86_64,SANDYBRIDGE */ + /* 270(003 001) 001(14) 101 022 : NOAPX,LONG,VEX,PROT,AVX,SANDYBRIDGE */ + {I_VPEXTRB, 3, {REG_GPR|BITS64|RN_L16,XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52211, 456, 3441}, + /* 3647 : VPEXTRB reg32,xmmreg,imm8 [mri: vex.128.66.0f3a.w0 14 /r ib ] AVX,SANDYBRIDGE */ + /* 270(003 001) 001(14) 101 022 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VPEXTRB, 3, {REG_GPR|BITS32|RN_L16,XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52211, 441, 3442}, + /* 3648 : VPEXTRB mem8,xmmreg,imm8 [mri: vex.128.66.0f3a.w0 14 /r ib ] AVX,SANDYBRIDGE */ + /* 270(003 001) 001(14) 101 022 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VPEXTRB, 3, {MEMORY|BITS8|RN_L16,XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52211, 441, 3443}, + /* 3649 : VPEXTRW reg64,xmmreg,imm8 [rmi: vex.128.66.0f.w0 c5 /r ib ] LONG,PROT,AVX,X86_64,SANDYBRIDGE */ + /* 270(001 001) 001(c5) 110 022 : NOAPX,LONG,VEX,PROT,AVX,SANDYBRIDGE */ + {I_VPEXTRW, 3, {REG_GPR|BITS64|RN_L16,XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52219, 456, 3444}, + /* 3650 : VPEXTRW reg32,xmmreg,imm8 [rmi: vex.128.66.0f.w0 c5 /r ib ] AVX,SANDYBRIDGE */ + /* 270(001 001) 001(c5) 110 022 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VPEXTRW, 3, {REG_GPR|BITS32|RN_L16,XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52219, 441, 3445}, + /* 3651 : VPEXTRW reg64,xmmreg,imm8 [mri: vex.128.66.0f3a.w0 15 /r ib ] LONG,PROT,AVX,X86_64,SANDYBRIDGE */ + /* 270(003 001) 001(15) 101 022 : NOAPX,LONG,VEX,PROT,AVX,SANDYBRIDGE */ + {I_VPEXTRW, 3, {REG_GPR|BITS64|RN_L16,XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52227, 456, 3446}, + /* 3652 : VPEXTRW reg32,xmmreg,imm8 [mri: vex.128.66.0f3a.w0 15 /r ib ] AVX,SANDYBRIDGE */ + /* 270(003 001) 001(15) 101 022 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VPEXTRW, 3, {REG_GPR|BITS32|RN_L16,XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52227, 441, 3447}, + /* 3653 : VPEXTRW mem16,xmmreg,imm8 [mri: vex.128.66.0f3a.w0 15 /r ib ] AVX,SANDYBRIDGE */ + /* 270(003 001) 001(15) 101 022 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VPEXTRW, 3, {MEMORY|BITS16|RN_L16,XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52227, 441, 3448}, + /* 3654 : VPEXTRD reg64,xmmreg,imm8 [mri: vex.128.66.0f3a.w0 16 /r ib ] LONG,PROT,AVX,X86_64,SANDYBRIDGE */ + /* 270(003 001) 001(16) 101 022 : NOAPX,LONG,VEX,PROT,AVX,SANDYBRIDGE */ + {I_VPEXTRD, 3, {REG_GPR|BITS64|RN_L16,XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52235, 456, 3449}, + /* 3655 : VPEXTRD rm32,xmmreg,imm8 [mri: vex.128.66.0f3a.w0 16 /r ib ] AVX,SANDYBRIDGE */ + /* 270(003 001) 001(16) 101 022 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VPEXTRD, 3, {RM_GPR|BITS32|RN_L16,XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52235, 441, 3450}, + /* 3656 : VPEXTRQ rm64,xmmreg,imm8 [mri: vex.128.66.0f3a.w1 16 /r ib ] LONG,PROT,AVX,X86_64,SANDYBRIDGE */ + /* 270(003 201) 001(16) 101 022 : NOAPX,LONG,VEX,PROT,AVX,SANDYBRIDGE */ + {I_VPEXTRQ, 3, {RM_GPR|BITS64|RN_L16,XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52243, 456, 3451}, + /* 3657 : VPHADDW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 01 /r ] AVX,SANDYBRIDGE */ + /* 261(002 001) 001(01) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPHADDW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60556, 433, 3452}, + /* 3658 : VPHADDD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 02 /r ] AVX,SANDYBRIDGE */ + /* 261(002 001) 001(02) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPHADDD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60570, 433, 3453}, + /* 3659 : VPHADDSW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 03 /r ] AVX,SANDYBRIDGE */ + /* 261(002 001) 001(03) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPHADDSW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60584, 433, 3454}, + /* 3660 : VPHMINPOSUW xmmreg,xmmrm128 [rm: vex.128.66.0f38 41 /r ] AVX,SANDYBRIDGE */ + /* 270(002 001) 001(41) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPHMINPOSUW, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60598, 433, 3455}, + /* 3661 : VPHSUBW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 05 /r ] AVX,SANDYBRIDGE */ + /* 261(002 001) 001(05) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPHSUBW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60605, 433, 3456}, + /* 3662 : VPHSUBD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 06 /r ] AVX,SANDYBRIDGE */ + /* 261(002 001) 001(06) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPHSUBD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60619, 433, 3457}, + /* 3663 : VPHSUBSW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 07 /r ] AVX,SANDYBRIDGE */ + /* 261(002 001) 001(07) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPHSUBSW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60633, 433, 3458}, + /* 3664 : VPINSRB xmmreg,xmmreg*,mem8,imm8 [rvmi: vex.nds.128.66.0f3a 20 /r ib ] AVX,SANDYBRIDGE */ + /* 261(003 001) 001(20) 120 023 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPINSRB, 4, {XMMREG|RN_L16,XMMREG|RN_L16,MEMORY|BITS8|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+52251, 433, 3459}, + /* 3665 : VPINSRB xmmreg,xmmreg*,rm8,imm8 [rvmi: vex.nds.128.66.0f3a 20 /r ib ] AVX,SANDYBRIDGE */ + /* 261(003 001) 001(20) 120 023 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPINSRB, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_GPR|BITS8|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+52251, 433, 3460}, + /* 3666 : VPINSRB xmmreg,xmmreg*,reg32,imm8 [rvmi: vex.nds.128.66.0f3a 20 /r ib ] AVX,SANDYBRIDGE */ + /* 261(003 001) 001(20) 120 023 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPINSRB, 4, {XMMREG|RN_L16,XMMREG|RN_L16,REG_GPR|BITS32|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+52251, 433, 3461}, + /* 3667 : VPINSRW xmmreg,xmmreg*,mem16,imm8 [rvmi: vex.nds.128.66.0f c4 /r ib ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c4) 120 023 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPINSRW, 4, {XMMREG|RN_L16,XMMREG|RN_L16,MEMORY|BITS16|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+52267, 433, 3462}, + /* 3668 : VPINSRW xmmreg,xmmreg*,rm16,imm8 [rvmi: vex.nds.128.66.0f c4 /r ib ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c4) 120 023 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPINSRW, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_GPR|BITS16|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+52267, 433, 3463}, + /* 3669 : VPINSRW xmmreg,xmmreg*,reg32,imm8 [rvmi: vex.nds.128.66.0f c4 /r ib ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c4) 120 023 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPINSRW, 4, {XMMREG|RN_L16,XMMREG|RN_L16,REG_GPR|BITS32|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+52267, 433, 3464}, + /* 3670 : VPINSRD xmmreg,xmmreg*,mem32,imm8 [rvmi: vex.nds.128.66.0f3a.w0 22 /r ib ] AVX,SANDYBRIDGE */ + /* 261(003 001) 001(22) 120 023 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VPINSRD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,MEMORY|BITS32|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+52283, 441, 3465}, + /* 3671 : VPINSRD xmmreg,xmmreg*,rm32,imm8 [rvmi: vex.nds.128.66.0f3a.w0 22 /r ib ] AVX,SANDYBRIDGE */ + /* 261(003 001) 001(22) 120 023 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VPINSRD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_GPR|BITS32|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+52283, 441, 3466}, + /* 3672 : VPINSRQ xmmreg,xmmreg*,mem64,imm8 [rvmi: vex.nds.128.66.0f3a.w1 22 /r ib ] LONG,PROT,AVX,X86_64,SANDYBRIDGE */ + /* 261(003 201) 001(22) 120 023 : NOAPX,LONG,VEX,PROT,AVX,SANDYBRIDGE */ + {I_VPINSRQ, 4, {XMMREG|RN_L16,XMMREG|RN_L16,MEMORY|BITS64|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+52299, 456, 3467}, + /* 3673 : VPINSRQ xmmreg,xmmreg*,rm64,imm8 [rvmi: vex.nds.128.66.0f3a.w1 22 /r ib ] LONG,PROT,AVX,X86_64,SANDYBRIDGE */ + /* 261(003 201) 001(22) 120 023 : NOAPX,LONG,VEX,PROT,AVX,SANDYBRIDGE */ + {I_VPINSRQ, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_GPR|BITS64|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+52299, 456, 3468}, + /* 3674 : VPMADDWD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f f5 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(f5) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMADDWD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60647, 433, 3469}, + /* 3675 : VPMADDUBSW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 04 /r ] AVX,SANDYBRIDGE */ + /* 261(002 001) 001(04) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMADDUBSW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60661, 433, 3470}, + /* 3676 : VPMAXSB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 3c /r ] AVX,SANDYBRIDGE */ + /* 261(002 001) 001(3c) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMAXSB, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60675, 433, 3471}, + /* 3677 : VPMAXSW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f ee /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(ee) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMAXSW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60689, 433, 3472}, + /* 3678 : VPMAXSD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 3d /r ] AVX,SANDYBRIDGE */ + /* 261(002 001) 001(3d) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMAXSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60703, 433, 3473}, + /* 3679 : VPMAXUB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f de /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(de) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMAXUB, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60717, 433, 3474}, + /* 3680 : VPMAXUW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 3e /r ] AVX,SANDYBRIDGE */ + /* 261(002 001) 001(3e) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMAXUW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60731, 433, 3475}, + /* 3681 : VPMAXUD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 3f /r ] AVX,SANDYBRIDGE */ + /* 261(002 001) 001(3f) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMAXUD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60745, 433, 3476}, + /* 3682 : VPMINSB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 38 /r ] AVX,SANDYBRIDGE */ + /* 261(002 001) 001(38) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMINSB, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60759, 433, 3477}, + /* 3683 : VPMINSW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f ea /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(ea) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMINSW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60773, 433, 3478}, + /* 3684 : VPMINSD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 39 /r ] AVX,SANDYBRIDGE */ + /* 261(002 001) 001(39) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMINSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60787, 433, 3479}, + /* 3685 : VPMINUB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f da /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(da) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMINUB, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60801, 433, 3480}, + /* 3686 : VPMINUW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 3a /r ] AVX,SANDYBRIDGE */ + /* 261(002 001) 001(3a) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMINUW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60815, 433, 3481}, + /* 3687 : VPMINUD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 3b /r ] AVX,SANDYBRIDGE */ + /* 261(002 001) 001(3b) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMINUD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60829, 433, 3482}, + /* 3688 : VPMOVMSKB reg64,xmmreg [rm: vex.128.66.0f d7 /r ] LONG,PROT,AVX,X86_64,SANDYBRIDGE */ + /* 270(001 001) 001(d7) 110 : NOAPX,WIG,LONG,VEX,PROT,AVX,SANDYBRIDGE */ + {I_VPMOVMSKB, 2, {REG_GPR|BITS64|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60843, 455, 3483}, + /* 3689 : VPMOVMSKB reg32,xmmreg [rm: vex.128.66.0f d7 /r ] AVX,SANDYBRIDGE */ + /* 270(001 001) 001(d7) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMOVMSKB, 2, {REG_GPR|BITS32|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60843, 433, 3484}, + /* 3690 : VPMOVSXBW xmmreg,xmmrm64 [rm: vex.128.66.0f38 20 /r ] AVX,SANDYBRIDGE */ + /* 270(002 001) 001(20) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMOVSXBW, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60850, 433, 3485}, + /* 3691 : VPMOVSXBD xmmreg,xmmrm32 [rm: vex.128.66.0f38 21 /r ] AVX,SANDYBRIDGE */ + /* 270(002 001) 001(21) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMOVSXBD, 2, {XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60857, 433, 3486}, + /* 3692 : VPMOVSXBQ xmmreg,xmmrm16 [rm: vex.128.66.0f38 22 /r ] AVX,SANDYBRIDGE */ + /* 270(002 001) 001(22) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMOVSXBQ, 2, {XMMREG|RN_L16,RM_XMM|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60864, 433, 3487}, + /* 3693 : VPMOVSXWD xmmreg,xmmrm64 [rm: vex.128.66.0f38 23 /r ] AVX,SANDYBRIDGE */ + /* 270(002 001) 001(23) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMOVSXWD, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60871, 433, 3488}, + /* 3694 : VPMOVSXWQ xmmreg,xmmrm32 [rm: vex.128.66.0f38 24 /r ] AVX,SANDYBRIDGE */ + /* 270(002 001) 001(24) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMOVSXWQ, 2, {XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60878, 433, 3489}, + /* 3695 : VPMOVSXDQ xmmreg,xmmrm64 [rm: vex.128.66.0f38 25 /r ] AVX,SANDYBRIDGE */ + /* 270(002 001) 001(25) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMOVSXDQ, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60885, 433, 3490}, + /* 3696 : VPMOVZXBW xmmreg,xmmrm64 [rm: vex.128.66.0f38 30 /r ] AVX,SANDYBRIDGE */ + /* 270(002 001) 001(30) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMOVZXBW, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60892, 433, 3491}, + /* 3697 : VPMOVZXBD xmmreg,xmmrm32 [rm: vex.128.66.0f38 31 /r ] AVX,SANDYBRIDGE */ + /* 270(002 001) 001(31) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMOVZXBD, 2, {XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60899, 433, 3492}, + /* 3698 : VPMOVZXBQ xmmreg,xmmrm16 [rm: vex.128.66.0f38 32 /r ] AVX,SANDYBRIDGE */ + /* 270(002 001) 001(32) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMOVZXBQ, 2, {XMMREG|RN_L16,RM_XMM|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60906, 433, 3493}, + /* 3699 : VPMOVZXWD xmmreg,xmmrm64 [rm: vex.128.66.0f38 33 /r ] AVX,SANDYBRIDGE */ + /* 270(002 001) 001(33) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMOVZXWD, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60913, 433, 3494}, + /* 3700 : VPMOVZXWQ xmmreg,xmmrm32 [rm: vex.128.66.0f38 34 /r ] AVX,SANDYBRIDGE */ + /* 270(002 001) 001(34) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMOVZXWQ, 2, {XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60920, 433, 3495}, + /* 3701 : VPMOVZXDQ xmmreg,xmmrm64 [rm: vex.128.66.0f38 35 /r ] AVX,SANDYBRIDGE */ + /* 270(002 001) 001(35) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMOVZXDQ, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+60927, 433, 3496}, + /* 3702 : VPMULHUW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f e4 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(e4) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMULHUW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60934, 433, 3497}, + /* 3703 : VPMULHRSW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 0b /r ] AVX,SANDYBRIDGE */ + /* 261(002 001) 001(0b) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMULHRSW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60948, 433, 3498}, + /* 3704 : VPMULHW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f e5 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(e5) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMULHW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60962, 433, 3499}, + /* 3705 : VPMULLW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f d5 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(d5) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMULLW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60976, 433, 3500}, + /* 3706 : VPMULLD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 40 /r ] AVX,SANDYBRIDGE */ + /* 261(002 001) 001(40) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMULLD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+60990, 433, 3501}, + /* 3707 : VPMULUDQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f f4 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(f4) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMULUDQ, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61004, 433, 3502}, + /* 3708 : VPMULDQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 28 /r ] AVX,SANDYBRIDGE */ + /* 261(002 001) 001(28) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPMULDQ, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61018, 433, 3503}, + /* 3709 : VPOR xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f eb /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(eb) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPOR, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61032, 433, 3504}, + /* 3710 : VPSADBW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f f6 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(f6) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSADBW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61046, 433, 3505}, + /* 3711 : VPSHUFB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 00 /r ] AVX,SANDYBRIDGE */ + /* 261(002 001) 001(00) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSHUFB, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61060, 433, 3506}, + /* 3712 : VPSHUFD xmmreg,xmmrm128,imm8 [rmi: vex.128.66.0f 70 /r ib ] AVX,SANDYBRIDGE */ + /* 270(001 001) 001(70) 110 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSHUFD, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52315, 433, 3507}, + /* 3713 : VPSHUFHW xmmreg,xmmrm128,imm8 [rmi: vex.128.f3.0f 70 /r ib ] AVX,SANDYBRIDGE */ + /* 270(001 002) 001(70) 110 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSHUFHW, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52323, 433, 3508}, + /* 3714 : VPSHUFLW xmmreg,xmmrm128,imm8 [rmi: vex.128.f2.0f 70 /r ib ] AVX,SANDYBRIDGE */ + /* 270(001 003) 001(70) 110 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSHUFLW, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52331, 433, 3509}, + /* 3715 : VPSIGNB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 08 /r ] AVX,SANDYBRIDGE */ + /* 261(002 001) 001(08) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSIGNB, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61074, 433, 3510}, + /* 3716 : VPSIGNW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 09 /r ] AVX,SANDYBRIDGE */ + /* 261(002 001) 001(09) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSIGNW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61088, 433, 3511}, + /* 3717 : VPSIGND xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 0a /r ] AVX,SANDYBRIDGE */ + /* 261(002 001) 001(0a) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSIGND, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61102, 433, 3512}, + /* 3718 : VPSLLDQ xmmreg,xmmreg*,imm8 [vmi: vex.ndd.128.66.0f 73 /7 ib ] AVX,SANDYBRIDGE */ + /* 260(001 001) 001(73) 217 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSLLDQ, 3, {XMMREG|RN_L16,XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52339, 433, 3513}, + /* 3719 : VPSRLDQ xmmreg,xmmreg*,imm8 [vmi: vex.ndd.128.66.0f 73 /3 ib ] AVX,SANDYBRIDGE */ + /* 260(001 001) 001(73) 213 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSRLDQ, 3, {XMMREG|RN_L16,XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52355, 433, 3514}, + /* 3720 : VPSLLW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f f1 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(f1) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSLLW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61116, 433, 3515}, + /* 3721 : VPSLLW xmmreg,xmmreg*,imm8 [vmi: vex.ndd.128.66.0f 71 /6 ib ] AVX,SANDYBRIDGE */ + /* 260(001 001) 001(71) 216 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSLLW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52371, 433, 3516}, + /* 3722 : VPSLLD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f f2 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(f2) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSLLD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61130, 433, 3517}, + /* 3723 : VPSLLD xmmreg,xmmreg*,imm8 [vmi: vex.ndd.128.66.0f 72 /6 ib ] AVX,SANDYBRIDGE */ + /* 260(001 001) 001(72) 216 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSLLD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52387, 433, 3518}, + /* 3724 : VPSLLQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f f3 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(f3) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSLLQ, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61144, 433, 3519}, + /* 3725 : VPSLLQ xmmreg,xmmreg*,imm8 [vmi: vex.ndd.128.66.0f 73 /6 ib ] AVX,SANDYBRIDGE */ + /* 260(001 001) 001(73) 216 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSLLQ, 3, {XMMREG|RN_L16,XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52403, 433, 3520}, + /* 3726 : VPSRAW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f e1 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(e1) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSRAW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61158, 433, 3521}, + /* 3727 : VPSRAW xmmreg,xmmreg*,imm8 [vmi: vex.ndd.128.66.0f 71 /4 ib ] AVX,SANDYBRIDGE */ + /* 260(001 001) 001(71) 214 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSRAW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52419, 433, 3522}, + /* 3728 : VPSRAD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f e2 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(e2) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSRAD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61172, 433, 3523}, + /* 3729 : VPSRAD xmmreg,xmmreg*,imm8 [vmi: vex.ndd.128.66.0f 72 /4 ib ] AVX,SANDYBRIDGE */ + /* 260(001 001) 001(72) 214 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSRAD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52435, 433, 3524}, + /* 3730 : VPSRLW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f d1 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(d1) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSRLW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61186, 433, 3525}, + /* 3731 : VPSRLW xmmreg,xmmreg*,imm8 [vmi: vex.ndd.128.66.0f 71 /2 ib ] AVX,SANDYBRIDGE */ + /* 260(001 001) 001(71) 212 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSRLW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52451, 433, 3526}, + /* 3732 : VPSRLD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f d2 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(d2) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSRLD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61200, 433, 3527}, + /* 3733 : VPSRLD xmmreg,xmmreg*,imm8 [vmi: vex.ndd.128.66.0f 72 /2 ib ] AVX,SANDYBRIDGE */ + /* 260(001 001) 001(72) 212 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSRLD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52467, 433, 3528}, + /* 3734 : VPSRLQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f d3 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(d3) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSRLQ, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61214, 433, 3529}, + /* 3735 : VPSRLQ xmmreg,xmmreg*,imm8 [vmi: vex.ndd.128.66.0f 73 /2 ib ] AVX,SANDYBRIDGE */ + /* 260(001 001) 001(73) 212 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSRLQ, 3, {XMMREG|RN_L16,XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52483, 433, 3530}, + /* 3736 : VPTEST xmmreg,xmmrm128 [rm: vex.128.66.0f38 17 /r ] AVX,SANDYBRIDGE */ + /* 270(002 001) 001(17) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPTEST, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61228, 433, 3531}, + /* 3737 : VPTEST ymmreg,ymmrm256 [rm: vex.256.66.0f38 17 /r ] AVX,SANDYBRIDGE */ + /* 270(002 005) 001(17) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPTEST, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61235, 433, 3532}, + /* 3738 : VPSUBB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f f8 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(f8) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSUBB, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61242, 433, 3533}, + /* 3739 : VPSUBW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f f9 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(f9) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSUBW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61256, 433, 3534}, + /* 3740 : VPSUBD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f fa /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(fa) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSUBD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61270, 433, 3535}, + /* 3741 : VPSUBQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f fb /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(fb) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSUBQ, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61284, 433, 3536}, + /* 3742 : VPSUBSB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f e8 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(e8) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSUBSB, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61298, 433, 3537}, + /* 3743 : VPSUBSW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f e9 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(e9) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSUBSW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61312, 433, 3538}, + /* 3744 : VPSUBUSB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f d8 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(d8) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSUBUSB, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61326, 433, 3539}, + /* 3745 : VPSUBUSW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f d9 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(d9) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPSUBUSW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61340, 433, 3540}, + /* 3746 : VPUNPCKHBW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 68 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(68) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPUNPCKHBW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61354, 433, 3541}, + /* 3747 : VPUNPCKHWD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 69 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(69) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPUNPCKHWD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61368, 433, 3542}, + /* 3748 : VPUNPCKHDQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 6a /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(6a) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPUNPCKHDQ, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61382, 433, 3543}, + /* 3749 : VPUNPCKHQDQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 6d /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(6d) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPUNPCKHQDQ, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61396, 433, 3544}, + /* 3750 : VPUNPCKLBW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 60 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(60) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPUNPCKLBW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61410, 433, 3545}, + /* 3751 : VPUNPCKLWD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 61 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(61) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPUNPCKLWD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61424, 433, 3546}, + /* 3752 : VPUNPCKLDQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 62 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(62) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPUNPCKLDQ, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61438, 433, 3547}, + /* 3753 : VPUNPCKLQDQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 6c /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(6c) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPUNPCKLQDQ, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61452, 433, 3548}, + /* 3754 : VPXOR xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f ef /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(ef) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPXOR, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61466, 433, 3549}, + /* 3755 : VRCPPS xmmreg,xmmrm128 [rm: vex.128.0f 53 /r ] AVX,SANDYBRIDGE */ + /* 270(001 000) 001(53) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VRCPPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61480, 433, 3550}, + /* 3756 : VRCPPS ymmreg,ymmrm256 [rm: vex.256.0f 53 /r ] AVX,SANDYBRIDGE */ + /* 270(001 004) 001(53) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VRCPPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61487, 433, 3551}, + /* 3757 : VRCPSS xmmreg,xmmreg*,xmmrm32 [rvm: vex.nds.lig.f3.0f 53 /r ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(53) 120 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VRCPSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61494, 440, 3552}, + /* 3758 : VRSQRTPS xmmreg,xmmrm128 [rm: vex.128.0f 52 /r ] AVX,SANDYBRIDGE */ + /* 270(001 000) 001(52) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VRSQRTPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61508, 433, 3553}, + /* 3759 : VRSQRTPS ymmreg,ymmrm256 [rm: vex.256.0f 52 /r ] AVX,SANDYBRIDGE */ + /* 270(001 004) 001(52) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VRSQRTPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61515, 433, 3554}, + /* 3760 : VRSQRTSS xmmreg,xmmreg*,xmmrm32 [rvm: vex.nds.lig.f3.0f 52 /r ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(52) 120 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VRSQRTSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61522, 440, 3555}, + /* 3761 : VROUNDPD xmmreg,xmmrm128,imm8 [rmi: vex.128.66.0f3a 09 /r ib ] AVX,SANDYBRIDGE */ + /* 270(003 001) 001(09) 110 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VROUNDPD, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52499, 433, 3556}, + /* 3762 : VROUNDPD ymmreg,ymmrm256,imm8 [rmi: vex.256.66.0f3a 09 /r ib ] AVX,SANDYBRIDGE */ + /* 270(003 005) 001(09) 110 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VROUNDPD, 3, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52507, 433, 3557}, + /* 3763 : VROUNDPS xmmreg,xmmrm128,imm8 [rmi: vex.128.66.0f3a 08 /r ib ] AVX,SANDYBRIDGE */ + /* 270(003 001) 001(08) 110 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VROUNDPS, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52515, 433, 3558}, + /* 3764 : VROUNDPS ymmreg,ymmrm256,imm8 [rmi: vex.256.66.0f3a 08 /r ib ] AVX,SANDYBRIDGE */ + /* 270(003 005) 001(08) 110 022 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VROUNDPS, 3, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52523, 433, 3559}, + /* 3765 : VROUNDSD xmmreg,xmmreg*,xmmrm64,imm8 [rvmi: vex.nds.128.66.0f3a 0b /r ib ] AVX,SANDYBRIDGE */ + /* 261(003 001) 001(0b) 120 023 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VROUNDSD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+52531, 433, 3560}, + /* 3766 : VROUNDSS xmmreg,xmmreg*,xmmrm32,imm8 [rvmi: vex.nds.128.66.0f3a 0a /r ib ] AVX,SANDYBRIDGE */ + /* 261(003 001) 001(0a) 120 023 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VROUNDSS, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+52547, 433, 3561}, + /* 3767 : VSHUFPD xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: vex.nds.128.66.0f c6 /r ib ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(c6) 120 023 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VSHUFPD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+52563, 433, 3562}, + /* 3768 : VSHUFPD ymmreg,ymmreg*,ymmrm256,imm8 [rvmi: vex.nds.256.66.0f c6 /r ib ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(c6) 120 023 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VSHUFPD, 4, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+52579, 433, 3563}, + /* 3769 : VSHUFPS xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: vex.nds.128.0f c6 /r ib ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(c6) 120 023 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VSHUFPS, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+52595, 433, 3564}, + /* 3770 : VSHUFPS ymmreg,ymmreg*,ymmrm256,imm8 [rvmi: vex.nds.256.0f c6 /r ib ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(c6) 120 023 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VSHUFPS, 4, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+52611, 433, 3565}, + /* 3771 : VSQRTPD xmmreg,xmmrm128 [rm: vex.128.66.0f 51 /r ] AVX,SANDYBRIDGE */ + /* 270(001 001) 001(51) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VSQRTPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61536, 433, 3566}, + /* 3772 : VSQRTPD ymmreg,ymmrm256 [rm: vex.256.66.0f 51 /r ] AVX,SANDYBRIDGE */ + /* 270(001 005) 001(51) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VSQRTPD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61543, 433, 3567}, + /* 3773 : VSQRTPS xmmreg,xmmrm128 [rm: vex.128.0f 51 /r ] AVX,SANDYBRIDGE */ + /* 270(001 000) 001(51) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VSQRTPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61550, 433, 3568}, + /* 3774 : VSQRTPS ymmreg,ymmrm256 [rm: vex.256.0f 51 /r ] AVX,SANDYBRIDGE */ + /* 270(001 004) 001(51) 110 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VSQRTPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61557, 433, 3569}, + /* 3775 : VSQRTSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f 51 /r ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(51) 120 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VSQRTSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61564, 440, 3570}, + /* 3776 : VSQRTSS xmmreg,xmmreg*,xmmrm32 [rvm: vex.nds.lig.f3.0f 51 /r ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(51) 120 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VSQRTSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61578, 440, 3571}, + /* 3777 : VSTMXCSR mem32 [m: vex.128.0f ae /3 ] AVX,SANDYBRIDGE */ + /* 270(001 000) 001(ae) 203 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VSTMXCSR, 1, {MEMORY|BITS32|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+61592, 433, 3572}, + /* 3778 : VSUBPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 5c /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(5c) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VSUBPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61599, 433, 3573}, + /* 3779 : VSUBPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 5c /r ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(5c) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VSUBPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61613, 433, 3574}, + /* 3780 : VSUBPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f 5c /r ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(5c) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VSUBPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61627, 433, 3575}, + /* 3781 : VSUBPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f 5c /r ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(5c) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VSUBPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61641, 433, 3576}, + /* 3782 : VSUBSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f 5c /r ] AVX,SANDYBRIDGE */ + /* 261(001 003) 001(5c) 120 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VSUBSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61655, 440, 3577}, + /* 3783 : VSUBSS xmmreg,xmmreg*,xmmrm32 [rvm: vex.nds.lig.f3.0f 5c /r ] AVX,SANDYBRIDGE */ + /* 261(001 002) 001(5c) 120 : NOAPX,LIG,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VSUBSS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61669, 440, 3578}, + /* 3784 : VTESTPS xmmreg,xmmrm128 [rm: vex.128.66.0f38.w0 0e /r ] FL,AVX,SANDYBRIDGE */ + /* 270(002 001) 001(0e) 110 : NOAPX,FL,VEX,AVX,SANDYBRIDGE */ + {I_VTESTPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61683, 457, 3579}, + /* 3785 : VTESTPS ymmreg,ymmrm256 [rm: vex.256.66.0f38.w0 0e /r ] FL,AVX,SANDYBRIDGE */ + /* 270(002 005) 001(0e) 110 : NOAPX,FL,VEX,AVX,SANDYBRIDGE */ + {I_VTESTPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61690, 457, 3580}, + /* 3786 : VTESTPD xmmreg,xmmrm128 [rm: vex.128.66.0f38.w0 0f /r ] AVX,SANDYBRIDGE */ + /* 270(002 001) 001(0f) 110 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VTESTPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61697, 441, 3581}, + /* 3787 : VTESTPD ymmreg,ymmrm256 [rm: vex.256.66.0f38.w0 0f /r ] AVX,SANDYBRIDGE */ + /* 270(002 005) 001(0f) 110 : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VTESTPD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61704, 441, 3582}, + /* 3788 : VUCOMISD xmmreg,xmmrm64 [rm: vex.lig.66.0f 2e /r ] FL,AVX,SANDYBRIDGE */ + /* 270(001 001) 001(2e) 110 : NOAPX,LIG,WIG,FL,VEX,AVX,SANDYBRIDGE */ + {I_VUCOMISD, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61711, 442, 3583}, + /* 3789 : VUCOMISS xmmreg,xmmrm32 [rm: vex.lig.0f 2e /r ] FL,AVX,SANDYBRIDGE */ + /* 270(001 000) 001(2e) 110 : NOAPX,LIG,WIG,FL,VEX,AVX,SANDYBRIDGE */ + {I_VUCOMISS, 2, {XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+61718, 442, 3584}, + /* 3790 : VUNPCKHPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 15 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(15) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VUNPCKHPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61725, 433, 3585}, + /* 3791 : VUNPCKHPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 15 /r ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(15) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VUNPCKHPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61739, 433, 3586}, + /* 3792 : VUNPCKHPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f 15 /r ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(15) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VUNPCKHPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61753, 433, 3587}, + /* 3793 : VUNPCKHPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f 15 /r ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(15) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VUNPCKHPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61767, 433, 3588}, + /* 3794 : VUNPCKLPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 14 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(14) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VUNPCKLPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61781, 433, 3589}, + /* 3795 : VUNPCKLPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 14 /r ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(14) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VUNPCKLPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61795, 433, 3590}, + /* 3796 : VUNPCKLPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f 14 /r ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(14) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VUNPCKLPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61809, 433, 3591}, + /* 3797 : VUNPCKLPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f 14 /r ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(14) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VUNPCKLPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61823, 433, 3592}, + /* 3798 : VXORPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 57 /r ] AVX,SANDYBRIDGE */ + /* 261(001 001) 001(57) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VXORPD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61837, 433, 3593}, + /* 3799 : VXORPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 57 /r ] AVX,SANDYBRIDGE */ + /* 261(001 005) 001(57) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VXORPD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61851, 433, 3594}, + /* 3800 : VXORPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f 57 /r ] AVX,SANDYBRIDGE */ + /* 261(001 000) 001(57) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VXORPS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61865, 433, 3595}, + /* 3801 : VXORPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f 57 /r ] AVX,SANDYBRIDGE */ + /* 261(001 004) 001(57) 120 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VXORPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61879, 433, 3596}, + /* 3802 : VZEROALL void [ vex.256.0f.w0 77 ] AVX,SANDYBRIDGE */ + /* 270(001 004) 001(77) : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VZEROALL, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+69963, 441, 3597}, + /* 3803 : VZEROUPPER void [ vex.128.0f.w0 77 ] AVX,SANDYBRIDGE */ + /* 270(001 000) 001(77) : NOAPX,VEX,AVX,SANDYBRIDGE */ + {I_VZEROUPPER, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+69969, 441, 3598}, + /* 3804 : PCLMULLQLQDQ xmmreg,xmmrm128 [rm: 66 0f3a 44 /r 00 ] SSE,WESTMERE */ + /* 361 357 001(44) 110 001(00) : NOAPX,SSE,WESTMERE */ + {I_PCLMULLQLQDQ, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+52627, 432, 3601}, + /* 3805 : PCLMULHQLQDQ xmmreg,xmmrm128 [rm: 66 0f3a 44 /r 01 ] SSE,WESTMERE */ + /* 361 357 001(44) 110 001(01) : NOAPX,SSE,WESTMERE */ + {I_PCLMULHQLQDQ, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+52635, 432, 3602}, + /* 3806 : PCLMULLQHQDQ xmmreg,xmmrm128 [rm: 66 0f3a 44 /r 10 ] SSE,WESTMERE */ + /* 361 357 001(44) 110 001(10) : NOAPX,SSE,WESTMERE */ + {I_PCLMULLQHQDQ, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+52643, 432, 3603}, + /* 3807 : PCLMULHQHQDQ xmmreg,xmmrm128 [rm: 66 0f3a 44 /r 11 ] SSE,WESTMERE */ + /* 361 357 001(44) 110 001(11) : NOAPX,SSE,WESTMERE */ + {I_PCLMULHQHQDQ, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+52651, 432, 3604}, + /* 3808 : PCLMULQDQ xmmreg,xmmrm128,imm8 [rmi: 66 0f3a 44 /r ib ] SSE,WESTMERE */ + /* 361 357 001(44) 110 022 : NOAPX,SSE,WESTMERE */ + {I_PCLMULQDQ, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+61893, 432, 3605}, + /* 3809 : VPCLMULLQLQDQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f3a 44 /r 00 ] AVX,SANDYBRIDGE */ + /* 261(003 001) 001(44) 120 001(00) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPCLMULLQLQDQ, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29416, 433, 3608}, + /* 3810 : VPCLMULHQLQDQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f3a 44 /r 01 ] AVX,SANDYBRIDGE */ + /* 261(003 001) 001(44) 120 001(01) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPCLMULHQLQDQ, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29434, 433, 3609}, + /* 3811 : VPCLMULLQHQDQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f3a 44 /r 10 ] AVX,SANDYBRIDGE */ + /* 261(003 001) 001(44) 120 001(10) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPCLMULLQHQDQ, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29452, 433, 3610}, + /* 3812 : VPCLMULHQHQDQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f3a 44 /r 11 ] AVX,SANDYBRIDGE */ + /* 261(003 001) 001(44) 120 001(11) : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPCLMULHQHQDQ, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29470, 433, 3611}, + /* 3813 : VPCLMULQDQ xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: vex.nds.128.66.0f3a 44 /r ib ] AVX,SANDYBRIDGE */ + /* 261(003 001) 001(44) 120 023 : NOAPX,WIG,VEX,AVX,SANDYBRIDGE */ + {I_VPCLMULQDQ, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+52659, 433, 3612}, + /* 3814 : VPCLMULLQLQDQ ymmreg,ymmreg*,ymmrm256 [rvm:fv: vex.nds.256.66.0f3a.wig 44 /r 00 ] VPCLMULQDQ,FUTURE */ + /* 261(003 005) 001(44) 120 001(00) : NOAPX,WIG,VEX,VPCLMULQDQ,FUTURE */ + {I_VPCLMULLQLQDQ, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29488, 458, 3615}, + /* 3815 : VPCLMULHQLQDQ ymmreg,ymmreg*,ymmrm256 [rvm:fv: vex.nds.256.66.0f3a.wig 44 /r 01 ] VPCLMULQDQ,FUTURE */ + /* 261(003 005) 001(44) 120 001(01) : NOAPX,WIG,VEX,VPCLMULQDQ,FUTURE */ + {I_VPCLMULHQLQDQ, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29506, 458, 3616}, + /* 3816 : VPCLMULLQHQDQ ymmreg,ymmreg*,ymmrm256 [rvm:fv: vex.nds.256.66.0f3a.wig 44 /r 10 ] VPCLMULQDQ,FUTURE */ + /* 261(003 005) 001(44) 120 001(10) : NOAPX,WIG,VEX,VPCLMULQDQ,FUTURE */ + {I_VPCLMULLQHQDQ, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29524, 458, 3617}, + /* 3817 : VPCLMULHQHQDQ ymmreg,ymmreg*,ymmrm256 [rvm:fv: vex.nds.256.66.0f3a.wig 44 /r 11 ] VPCLMULQDQ,FUTURE */ + /* 261(003 005) 001(44) 120 001(11) : NOAPX,WIG,VEX,VPCLMULQDQ,FUTURE */ + {I_VPCLMULHQHQDQ, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+29542, 458, 3618}, + /* 3818 : VPCLMULQDQ ymmreg,ymmreg*,ymmrm256,imm8 [rvmi:fv: vex.nds.256.66.0f3a.wig 44 /r ib ] VPCLMULQDQ,FUTURE */ + /* 261(003 005) 001(44) 120 023 : NOAPX,WIG,VEX,VPCLMULQDQ,FUTURE */ + {I_VPCLMULQDQ, 4, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+52675, 458, 3619}, + /* 3819 : VPCLMULLQLQDQ xmmreg,xmmreg*,xmmrm128 [rvm:fv: evex.nds.128.66.0f3a.wig 44 /r 00 ] AVX512VL,VPCLMULQDQ,FUTURE */ + /* 241(f3 7d 08) 301 001(44) 120 001(00) : WIG,EVEX,PROT,AVX512VL,VPCLMULQDQ,FUTURE */ + {I_VPCLMULLQLQDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4479, 459, 3622}, + /* 3820 : VPCLMULHQLQDQ xmmreg,xmmreg*,xmmrm128 [rvm:fv: evex.nds.128.66.0f3a.wig 44 /r 01 ] AVX512VL,VPCLMULQDQ,FUTURE */ + /* 241(f3 7d 08) 301 001(44) 120 001(01) : WIG,EVEX,PROT,AVX512VL,VPCLMULQDQ,FUTURE */ + {I_VPCLMULHQLQDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4501, 459, 3623}, + /* 3821 : VPCLMULLQHQDQ xmmreg,xmmreg*,xmmrm128 [rvm:fv: evex.nds.128.66.0f3a.wig 44 /r 10 ] AVX512VL,VPCLMULQDQ,FUTURE */ + /* 241(f3 7d 08) 301 001(44) 120 001(10) : WIG,EVEX,PROT,AVX512VL,VPCLMULQDQ,FUTURE */ + {I_VPCLMULLQHQDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4523, 459, 3624}, + /* 3822 : VPCLMULHQHQDQ xmmreg,xmmreg*,xmmrm128 [rvm:fv: evex.nds.128.66.0f3a.wig 44 /r 11 ] AVX512VL,VPCLMULQDQ,FUTURE */ + /* 241(f3 7d 08) 301 001(44) 120 001(11) : WIG,EVEX,PROT,AVX512VL,VPCLMULQDQ,FUTURE */ + {I_VPCLMULHQHQDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+4545, 459, 3625}, + /* 3823 : VPCLMULQDQ xmmreg,xmmreg*,xmmrm128,imm8 [rvmi:fv: evex.nds.128.66.0f3a.wig 44 /r ib ] AVX512VL,VPCLMULQDQ,FUTURE */ + /* 241(f3 7d 08) 301 001(44) 120 023 : WIG,EVEX,PROT,AVX512VL,VPCLMULQDQ,FUTURE */ + {I_VPCLMULQDQ, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+17993, 459, 3626}, + /* 3824 : VPCLMULLQLQDQ ymmreg,ymmreg*,ymmrm256 [rvm:fv: evex.nds.256.66.0f3a.wig 44 /r 00 ] AVX512VL,VPCLMULQDQ,FUTURE */ + /* 241(f3 7d 28) 301 001(44) 120 001(00) : WIG,EVEX,PROT,AVX512VL,VPCLMULQDQ,FUTURE */ + {I_VPCLMULLQLQDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4567, 459, 3628}, + /* 3825 : VPCLMULHQLQDQ ymmreg,ymmreg*,ymmrm256 [rvm:fv: evex.nds.256.66.0f3a.wig 44 /r 01 ] AVX512VL,VPCLMULQDQ,FUTURE */ + /* 241(f3 7d 28) 301 001(44) 120 001(01) : WIG,EVEX,PROT,AVX512VL,VPCLMULQDQ,FUTURE */ + {I_VPCLMULHQLQDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4589, 459, 3629}, + /* 3826 : VPCLMULLQHQDQ ymmreg,ymmreg*,ymmrm256 [rvm:fv: evex.nds.256.66.0f3a.wig 44 /r 10 ] AVX512VL,VPCLMULQDQ,FUTURE */ + /* 241(f3 7d 28) 301 001(44) 120 001(10) : WIG,EVEX,PROT,AVX512VL,VPCLMULQDQ,FUTURE */ + {I_VPCLMULLQHQDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4611, 459, 3630}, + /* 3827 : VPCLMULHQHQDQ ymmreg,ymmreg*,ymmrm256 [rvm:fv: evex.nds.256.66.0f3a.wig 44 /r 11 ] AVX512VL,VPCLMULQDQ,FUTURE */ + /* 241(f3 7d 28) 301 001(44) 120 001(11) : WIG,EVEX,PROT,AVX512VL,VPCLMULQDQ,FUTURE */ + {I_VPCLMULHQHQDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+4633, 459, 3631}, + /* 3828 : VPCLMULQDQ ymmreg,ymmreg*,ymmrm256,imm8 [rvmi:fv: evex.nds.256.66.0f3a.wig 44 /r ib ] AVX512VL,VPCLMULQDQ,FUTURE */ + /* 241(f3 7d 28) 301 001(44) 120 023 : WIG,EVEX,PROT,AVX512VL,VPCLMULQDQ,FUTURE */ + {I_VPCLMULQDQ, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+18013, 459, 3632}, + /* 3829 : VPCLMULLQLQDQ zmmreg,zmmreg*,zmmrm512 [rvm:fv: evex.nds.512.66.0f3a.wig 44 /r 00 ] AVX512,VPCLMULQDQ,FUTURE */ + /* 241(f3 7d 48) 301 001(44) 120 001(00) : WIG,EVEX,PROT,AVX512,VPCLMULQDQ,FUTURE */ + {I_VPCLMULLQLQDQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, NO_DECORATOR, nasm_bytecodes+4655, 460, 3635}, + /* 3830 : VPCLMULHQLQDQ zmmreg,zmmreg*,zmmrm512 [rvm:fv: evex.nds.512.66.0f3a.wig 44 /r 01 ] AVX512,VPCLMULQDQ,FUTURE */ + /* 241(f3 7d 48) 301 001(44) 120 001(01) : WIG,EVEX,PROT,AVX512,VPCLMULQDQ,FUTURE */ + {I_VPCLMULHQLQDQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, NO_DECORATOR, nasm_bytecodes+4677, 460, 3636}, + /* 3831 : VPCLMULLQHQDQ zmmreg,zmmreg*,zmmrm512 [rvm:fv: evex.nds.512.66.0f3a.wig 44 /r 10 ] AVX512,VPCLMULQDQ,FUTURE */ + /* 241(f3 7d 48) 301 001(44) 120 001(10) : WIG,EVEX,PROT,AVX512,VPCLMULQDQ,FUTURE */ + {I_VPCLMULLQHQDQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, NO_DECORATOR, nasm_bytecodes+4699, 460, 3637}, + /* 3832 : VPCLMULHQHQDQ zmmreg,zmmreg*,zmmrm512 [rvm:fv: evex.nds.512.66.0f3a.wig 44 /r 11 ] AVX512,VPCLMULQDQ,FUTURE */ + /* 241(f3 7d 48) 301 001(44) 120 001(11) : WIG,EVEX,PROT,AVX512,VPCLMULQDQ,FUTURE */ + {I_VPCLMULHQHQDQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, NO_DECORATOR, nasm_bytecodes+4721, 460, 3638}, + /* 3833 : VPCLMULQDQ zmmreg,zmmreg*,zmmrm512,imm8 [rvmi:fv: evex.nds.512.66.0f3a.wig 44 /r ib ] AVX512,VPCLMULQDQ,FUTURE */ + /* 241(f3 7d 48) 301 001(44) 120 023 : WIG,EVEX,PROT,AVX512,VPCLMULQDQ,FUTURE */ + {I_VPCLMULQDQ, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+18033, 460, 3639}, + /* 3834 : VFMADD132PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 98 /r ] FMA,FUTURE */ + /* 261(002 001) 001(98) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADD132PS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61900, 461, 3643}, + /* 3835 : VFMADD132PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 98 /r ] FMA,FUTURE */ + /* 261(002 005) 001(98) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADD132PS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61907, 461, 3644}, + /* 3836 : VFMADD132PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 98 /r ] FMA,FUTURE */ + /* 261(002 201) 001(98) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADD132PD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61914, 461, 3645}, + /* 3837 : VFMADD132PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 98 /r ] FMA,FUTURE */ + /* 261(002 205) 001(98) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADD132PD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61921, 461, 3646}, + /* 3838 : VFMADD312PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 98 /r ] FMA,FUTURE */ + /* 261(002 001) 001(98) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADD312PS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61900, 461, 3647}, + /* 3839 : VFMADD312PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 98 /r ] FMA,FUTURE */ + /* 261(002 005) 001(98) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADD312PS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61907, 461, 3648}, + /* 3840 : VFMADD312PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 98 /r ] FMA,FUTURE */ + /* 261(002 201) 001(98) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADD312PD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61914, 461, 3649}, + /* 3841 : VFMADD312PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 98 /r ] FMA,FUTURE */ + /* 261(002 205) 001(98) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADD312PD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61921, 461, 3650}, + /* 3842 : VFMADD213PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 a8 /r ] FMA,FUTURE */ + /* 261(002 001) 001(a8) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADD213PS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61928, 461, 3651}, + /* 3843 : VFMADD213PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 a8 /r ] FMA,FUTURE */ + /* 261(002 005) 001(a8) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADD213PS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61935, 461, 3652}, + /* 3844 : VFMADD213PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 a8 /r ] FMA,FUTURE */ + /* 261(002 201) 001(a8) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADD213PD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61942, 461, 3653}, + /* 3845 : VFMADD213PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 a8 /r ] FMA,FUTURE */ + /* 261(002 205) 001(a8) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADD213PD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61949, 461, 3654}, + /* 3846 : VFMADD123PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 a8 /r ] FMA,FUTURE */ + /* 261(002 001) 001(a8) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADD123PS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61928, 461, 3655}, + /* 3847 : VFMADD123PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 a8 /r ] FMA,FUTURE */ + /* 261(002 005) 001(a8) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADD123PS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61935, 461, 3656}, + /* 3848 : VFMADD123PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 a8 /r ] FMA,FUTURE */ + /* 261(002 201) 001(a8) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADD123PD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61942, 461, 3657}, + /* 3849 : VFMADD123PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 a8 /r ] FMA,FUTURE */ + /* 261(002 205) 001(a8) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADD123PD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61949, 461, 3658}, + /* 3850 : VFMADD231PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 b8 /r ] FMA,FUTURE */ + /* 261(002 001) 001(b8) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADD231PS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61956, 461, 3659}, + /* 3851 : VFMADD231PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 b8 /r ] FMA,FUTURE */ + /* 261(002 005) 001(b8) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADD231PS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61963, 461, 3660}, + /* 3852 : VFMADD231PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 b8 /r ] FMA,FUTURE */ + /* 261(002 201) 001(b8) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADD231PD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61970, 461, 3661}, + /* 3853 : VFMADD231PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 b8 /r ] FMA,FUTURE */ + /* 261(002 205) 001(b8) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADD231PD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61977, 461, 3662}, + /* 3854 : VFMADD321PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 b8 /r ] FMA,FUTURE */ + /* 261(002 001) 001(b8) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADD321PS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61956, 461, 3663}, + /* 3855 : VFMADD321PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 b8 /r ] FMA,FUTURE */ + /* 261(002 005) 001(b8) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADD321PS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61963, 461, 3664}, + /* 3856 : VFMADD321PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 b8 /r ] FMA,FUTURE */ + /* 261(002 201) 001(b8) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADD321PD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61970, 461, 3665}, + /* 3857 : VFMADD321PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 b8 /r ] FMA,FUTURE */ + /* 261(002 205) 001(b8) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADD321PD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61977, 461, 3666}, + /* 3858 : VFMADDSUB132PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 96 /r ] FMA,FUTURE */ + /* 261(002 001) 001(96) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADDSUB132PS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61984, 461, 3667}, + /* 3859 : VFMADDSUB132PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 96 /r ] FMA,FUTURE */ + /* 261(002 005) 001(96) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADDSUB132PS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61991, 461, 3668}, + /* 3860 : VFMADDSUB132PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 96 /r ] FMA,FUTURE */ + /* 261(002 201) 001(96) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADDSUB132PD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61998, 461, 3669}, + /* 3861 : VFMADDSUB132PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 96 /r ] FMA,FUTURE */ + /* 261(002 205) 001(96) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADDSUB132PD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62005, 461, 3670}, + /* 3862 : VFMADDSUB312PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 96 /r ] FMA,FUTURE */ + /* 261(002 001) 001(96) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADDSUB312PS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61984, 461, 3671}, + /* 3863 : VFMADDSUB312PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 96 /r ] FMA,FUTURE */ + /* 261(002 005) 001(96) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADDSUB312PS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61991, 461, 3672}, + /* 3864 : VFMADDSUB312PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 96 /r ] FMA,FUTURE */ + /* 261(002 201) 001(96) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADDSUB312PD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+61998, 461, 3673}, + /* 3865 : VFMADDSUB312PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 96 /r ] FMA,FUTURE */ + /* 261(002 205) 001(96) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADDSUB312PD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62005, 461, 3674}, + /* 3866 : VFMADDSUB213PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 a6 /r ] FMA,FUTURE */ + /* 261(002 001) 001(a6) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADDSUB213PS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62012, 461, 3675}, + /* 3867 : VFMADDSUB213PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 a6 /r ] FMA,FUTURE */ + /* 261(002 005) 001(a6) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADDSUB213PS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62019, 461, 3676}, + /* 3868 : VFMADDSUB213PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 a6 /r ] FMA,FUTURE */ + /* 261(002 201) 001(a6) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADDSUB213PD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62026, 461, 3677}, + /* 3869 : VFMADDSUB213PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 a6 /r ] FMA,FUTURE */ + /* 261(002 205) 001(a6) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADDSUB213PD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62033, 461, 3678}, + /* 3870 : VFMADDSUB123PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 a6 /r ] FMA,FUTURE */ + /* 261(002 001) 001(a6) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADDSUB123PS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62012, 461, 3679}, + /* 3871 : VFMADDSUB123PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 a6 /r ] FMA,FUTURE */ + /* 261(002 005) 001(a6) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADDSUB123PS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62019, 461, 3680}, + /* 3872 : VFMADDSUB123PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 a6 /r ] FMA,FUTURE */ + /* 261(002 201) 001(a6) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADDSUB123PD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62026, 461, 3681}, + /* 3873 : VFMADDSUB123PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 a6 /r ] FMA,FUTURE */ + /* 261(002 205) 001(a6) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADDSUB123PD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62033, 461, 3682}, + /* 3874 : VFMADDSUB231PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 b6 /r ] FMA,FUTURE */ + /* 261(002 001) 001(b6) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADDSUB231PS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62040, 461, 3683}, + /* 3875 : VFMADDSUB231PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 b6 /r ] FMA,FUTURE */ + /* 261(002 005) 001(b6) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADDSUB231PS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62047, 461, 3684}, + /* 3876 : VFMADDSUB231PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 b6 /r ] FMA,FUTURE */ + /* 261(002 201) 001(b6) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADDSUB231PD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62054, 461, 3685}, + /* 3877 : VFMADDSUB231PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 b6 /r ] FMA,FUTURE */ + /* 261(002 205) 001(b6) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADDSUB231PD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62061, 461, 3686}, + /* 3878 : VFMADDSUB321PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 b6 /r ] FMA,FUTURE */ + /* 261(002 001) 001(b6) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADDSUB321PS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62040, 461, 3687}, + /* 3879 : VFMADDSUB321PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 b6 /r ] FMA,FUTURE */ + /* 261(002 005) 001(b6) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADDSUB321PS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62047, 461, 3688}, + /* 3880 : VFMADDSUB321PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 b6 /r ] FMA,FUTURE */ + /* 261(002 201) 001(b6) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADDSUB321PD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62054, 461, 3689}, + /* 3881 : VFMADDSUB321PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 b6 /r ] FMA,FUTURE */ + /* 261(002 205) 001(b6) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADDSUB321PD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62061, 461, 3690}, + /* 3882 : VFMSUB132PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 9a /r ] FMA,FUTURE */ + /* 261(002 001) 001(9a) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUB132PS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62068, 461, 3691}, + /* 3883 : VFMSUB132PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 9a /r ] FMA,FUTURE */ + /* 261(002 005) 001(9a) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUB132PS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62075, 461, 3692}, + /* 3884 : VFMSUB132PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 9a /r ] FMA,FUTURE */ + /* 261(002 201) 001(9a) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUB132PD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62082, 461, 3693}, + /* 3885 : VFMSUB132PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 9a /r ] FMA,FUTURE */ + /* 261(002 205) 001(9a) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUB132PD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62089, 461, 3694}, + /* 3886 : VFMSUB312PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 9a /r ] FMA,FUTURE */ + /* 261(002 001) 001(9a) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUB312PS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62068, 461, 3695}, + /* 3887 : VFMSUB312PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 9a /r ] FMA,FUTURE */ + /* 261(002 005) 001(9a) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUB312PS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62075, 461, 3696}, + /* 3888 : VFMSUB312PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 9a /r ] FMA,FUTURE */ + /* 261(002 201) 001(9a) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUB312PD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62082, 461, 3697}, + /* 3889 : VFMSUB312PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 9a /r ] FMA,FUTURE */ + /* 261(002 205) 001(9a) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUB312PD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62089, 461, 3698}, + /* 3890 : VFMSUB213PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 aa /r ] FMA,FUTURE */ + /* 261(002 001) 001(aa) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUB213PS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62096, 461, 3699}, + /* 3891 : VFMSUB213PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 aa /r ] FMA,FUTURE */ + /* 261(002 005) 001(aa) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUB213PS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62103, 461, 3700}, + /* 3892 : VFMSUB213PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 aa /r ] FMA,FUTURE */ + /* 261(002 201) 001(aa) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUB213PD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62110, 461, 3701}, + /* 3893 : VFMSUB213PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 aa /r ] FMA,FUTURE */ + /* 261(002 205) 001(aa) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUB213PD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62117, 461, 3702}, + /* 3894 : VFMSUB123PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 aa /r ] FMA,FUTURE */ + /* 261(002 001) 001(aa) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUB123PS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62096, 461, 3703}, + /* 3895 : VFMSUB123PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 aa /r ] FMA,FUTURE */ + /* 261(002 005) 001(aa) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUB123PS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62103, 461, 3704}, + /* 3896 : VFMSUB123PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 aa /r ] FMA,FUTURE */ + /* 261(002 201) 001(aa) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUB123PD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62110, 461, 3705}, + /* 3897 : VFMSUB123PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 aa /r ] FMA,FUTURE */ + /* 261(002 205) 001(aa) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUB123PD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62117, 461, 3706}, + /* 3898 : VFMSUB231PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 ba /r ] FMA,FUTURE */ + /* 261(002 001) 001(ba) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUB231PS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62124, 461, 3707}, + /* 3899 : VFMSUB231PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 ba /r ] FMA,FUTURE */ + /* 261(002 005) 001(ba) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUB231PS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62131, 461, 3708}, + /* 3900 : VFMSUB231PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 ba /r ] FMA,FUTURE */ + /* 261(002 201) 001(ba) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUB231PD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62138, 461, 3709}, + /* 3901 : VFMSUB231PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 ba /r ] FMA,FUTURE */ + /* 261(002 205) 001(ba) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUB231PD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62145, 461, 3710}, + /* 3902 : VFMSUB321PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 ba /r ] FMA,FUTURE */ + /* 261(002 001) 001(ba) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUB321PS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62124, 461, 3711}, + /* 3903 : VFMSUB321PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 ba /r ] FMA,FUTURE */ + /* 261(002 005) 001(ba) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUB321PS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62131, 461, 3712}, + /* 3904 : VFMSUB321PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 ba /r ] FMA,FUTURE */ + /* 261(002 201) 001(ba) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUB321PD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62138, 461, 3713}, + /* 3905 : VFMSUB321PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 ba /r ] FMA,FUTURE */ + /* 261(002 205) 001(ba) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUB321PD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62145, 461, 3714}, + /* 3906 : VFMSUBADD132PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 97 /r ] FMA,FUTURE */ + /* 261(002 001) 001(97) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUBADD132PS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62152, 461, 3715}, + /* 3907 : VFMSUBADD132PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 97 /r ] FMA,FUTURE */ + /* 261(002 005) 001(97) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUBADD132PS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62159, 461, 3716}, + /* 3908 : VFMSUBADD132PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 97 /r ] FMA,FUTURE */ + /* 261(002 201) 001(97) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUBADD132PD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62166, 461, 3717}, + /* 3909 : VFMSUBADD132PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 97 /r ] FMA,FUTURE */ + /* 261(002 205) 001(97) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUBADD132PD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62173, 461, 3718}, + /* 3910 : VFMSUBADD312PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 97 /r ] FMA,FUTURE */ + /* 261(002 001) 001(97) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUBADD312PS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62152, 461, 3719}, + /* 3911 : VFMSUBADD312PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 97 /r ] FMA,FUTURE */ + /* 261(002 005) 001(97) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUBADD312PS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62159, 461, 3720}, + /* 3912 : VFMSUBADD312PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 97 /r ] FMA,FUTURE */ + /* 261(002 201) 001(97) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUBADD312PD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62166, 461, 3721}, + /* 3913 : VFMSUBADD312PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 97 /r ] FMA,FUTURE */ + /* 261(002 205) 001(97) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUBADD312PD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62173, 461, 3722}, + /* 3914 : VFMSUBADD213PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 a7 /r ] FMA,FUTURE */ + /* 261(002 001) 001(a7) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUBADD213PS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62180, 461, 3723}, + /* 3915 : VFMSUBADD213PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 a7 /r ] FMA,FUTURE */ + /* 261(002 005) 001(a7) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUBADD213PS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62187, 461, 3724}, + /* 3916 : VFMSUBADD213PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 a7 /r ] FMA,FUTURE */ + /* 261(002 201) 001(a7) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUBADD213PD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62194, 461, 3725}, + /* 3917 : VFMSUBADD213PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 a7 /r ] FMA,FUTURE */ + /* 261(002 205) 001(a7) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUBADD213PD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62201, 461, 3726}, + /* 3918 : VFMSUBADD123PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 a7 /r ] FMA,FUTURE */ + /* 261(002 001) 001(a7) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUBADD123PS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62180, 461, 3727}, + /* 3919 : VFMSUBADD123PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 a7 /r ] FMA,FUTURE */ + /* 261(002 005) 001(a7) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUBADD123PS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62187, 461, 3728}, + /* 3920 : VFMSUBADD123PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 a7 /r ] FMA,FUTURE */ + /* 261(002 201) 001(a7) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUBADD123PD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62194, 461, 3729}, + /* 3921 : VFMSUBADD123PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 a7 /r ] FMA,FUTURE */ + /* 261(002 205) 001(a7) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUBADD123PD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62201, 461, 3730}, + /* 3922 : VFMSUBADD231PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 b7 /r ] FMA,FUTURE */ + /* 261(002 001) 001(b7) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUBADD231PS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62208, 461, 3731}, + /* 3923 : VFMSUBADD231PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 b7 /r ] FMA,FUTURE */ + /* 261(002 005) 001(b7) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUBADD231PS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62215, 461, 3732}, + /* 3924 : VFMSUBADD231PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 b7 /r ] FMA,FUTURE */ + /* 261(002 201) 001(b7) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUBADD231PD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62222, 461, 3733}, + /* 3925 : VFMSUBADD231PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 b7 /r ] FMA,FUTURE */ + /* 261(002 205) 001(b7) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUBADD231PD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62229, 461, 3734}, + /* 3926 : VFMSUBADD321PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 b7 /r ] FMA,FUTURE */ + /* 261(002 001) 001(b7) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUBADD321PS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62208, 461, 3735}, + /* 3927 : VFMSUBADD321PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 b7 /r ] FMA,FUTURE */ + /* 261(002 005) 001(b7) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUBADD321PS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62215, 461, 3736}, + /* 3928 : VFMSUBADD321PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 b7 /r ] FMA,FUTURE */ + /* 261(002 201) 001(b7) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUBADD321PD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62222, 461, 3737}, + /* 3929 : VFMSUBADD321PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 b7 /r ] FMA,FUTURE */ + /* 261(002 205) 001(b7) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUBADD321PD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62229, 461, 3738}, + /* 3930 : VFNMADD132PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 9c /r ] FMA,FUTURE */ + /* 261(002 001) 001(9c) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMADD132PS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62236, 461, 3739}, + /* 3931 : VFNMADD132PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 9c /r ] FMA,FUTURE */ + /* 261(002 005) 001(9c) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMADD132PS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62243, 461, 3740}, + /* 3932 : VFNMADD132PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 9c /r ] FMA,FUTURE */ + /* 261(002 201) 001(9c) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMADD132PD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62250, 461, 3741}, + /* 3933 : VFNMADD132PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 9c /r ] FMA,FUTURE */ + /* 261(002 205) 001(9c) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMADD132PD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62257, 461, 3742}, + /* 3934 : VFNMADD312PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 9c /r ] FMA,FUTURE */ + /* 261(002 001) 001(9c) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMADD312PS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62236, 461, 3743}, + /* 3935 : VFNMADD312PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 9c /r ] FMA,FUTURE */ + /* 261(002 005) 001(9c) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMADD312PS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62243, 461, 3744}, + /* 3936 : VFNMADD312PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 9c /r ] FMA,FUTURE */ + /* 261(002 201) 001(9c) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMADD312PD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62250, 461, 3745}, + /* 3937 : VFNMADD312PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 9c /r ] FMA,FUTURE */ + /* 261(002 205) 001(9c) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMADD312PD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62257, 461, 3746}, + /* 3938 : VFNMADD213PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 ac /r ] FMA,FUTURE */ + /* 261(002 001) 001(ac) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMADD213PS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62264, 461, 3747}, + /* 3939 : VFNMADD213PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 ac /r ] FMA,FUTURE */ + /* 261(002 005) 001(ac) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMADD213PS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62271, 461, 3748}, + /* 3940 : VFNMADD213PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 ac /r ] FMA,FUTURE */ + /* 261(002 201) 001(ac) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMADD213PD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62278, 461, 3749}, + /* 3941 : VFNMADD213PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 ac /r ] FMA,FUTURE */ + /* 261(002 205) 001(ac) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMADD213PD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62285, 461, 3750}, + /* 3942 : VFNMADD123PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 ac /r ] FMA,FUTURE */ + /* 261(002 001) 001(ac) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMADD123PS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62264, 461, 3751}, + /* 3943 : VFNMADD123PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 ac /r ] FMA,FUTURE */ + /* 261(002 005) 001(ac) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMADD123PS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62271, 461, 3752}, + /* 3944 : VFNMADD123PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 ac /r ] FMA,FUTURE */ + /* 261(002 201) 001(ac) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMADD123PD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62278, 461, 3753}, + /* 3945 : VFNMADD123PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 ac /r ] FMA,FUTURE */ + /* 261(002 205) 001(ac) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMADD123PD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62285, 461, 3754}, + /* 3946 : VFNMADD231PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 bc /r ] FMA,FUTURE */ + /* 261(002 001) 001(bc) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMADD231PS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62292, 461, 3755}, + /* 3947 : VFNMADD231PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 bc /r ] FMA,FUTURE */ + /* 261(002 005) 001(bc) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMADD231PS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62299, 461, 3756}, + /* 3948 : VFNMADD231PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 bc /r ] FMA,FUTURE */ + /* 261(002 201) 001(bc) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMADD231PD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62306, 461, 3757}, + /* 3949 : VFNMADD231PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 bc /r ] FMA,FUTURE */ + /* 261(002 205) 001(bc) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMADD231PD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62313, 461, 3758}, + /* 3950 : VFNMADD321PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 bc /r ] FMA,FUTURE */ + /* 261(002 001) 001(bc) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMADD321PS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62292, 461, 3759}, + /* 3951 : VFNMADD321PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 bc /r ] FMA,FUTURE */ + /* 261(002 005) 001(bc) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMADD321PS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62299, 461, 3760}, + /* 3952 : VFNMADD321PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 bc /r ] FMA,FUTURE */ + /* 261(002 201) 001(bc) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMADD321PD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62306, 461, 3761}, + /* 3953 : VFNMADD321PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 bc /r ] FMA,FUTURE */ + /* 261(002 205) 001(bc) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMADD321PD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62313, 461, 3762}, + /* 3954 : VFNMSUB132PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 9e /r ] FMA,FUTURE */ + /* 261(002 001) 001(9e) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMSUB132PS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62320, 461, 3763}, + /* 3955 : VFNMSUB132PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 9e /r ] FMA,FUTURE */ + /* 261(002 005) 001(9e) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMSUB132PS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62327, 461, 3764}, + /* 3956 : VFNMSUB132PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 9e /r ] FMA,FUTURE */ + /* 261(002 201) 001(9e) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMSUB132PD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62334, 461, 3765}, + /* 3957 : VFNMSUB132PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 9e /r ] FMA,FUTURE */ + /* 261(002 205) 001(9e) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMSUB132PD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62341, 461, 3766}, + /* 3958 : VFNMSUB312PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 9e /r ] FMA,FUTURE */ + /* 261(002 001) 001(9e) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMSUB312PS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62320, 461, 3767}, + /* 3959 : VFNMSUB312PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 9e /r ] FMA,FUTURE */ + /* 261(002 005) 001(9e) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMSUB312PS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62327, 461, 3768}, + /* 3960 : VFNMSUB312PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 9e /r ] FMA,FUTURE */ + /* 261(002 201) 001(9e) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMSUB312PD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62334, 461, 3769}, + /* 3961 : VFNMSUB312PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 9e /r ] FMA,FUTURE */ + /* 261(002 205) 001(9e) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMSUB312PD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62341, 461, 3770}, + /* 3962 : VFNMSUB213PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 ae /r ] FMA,FUTURE */ + /* 261(002 001) 001(ae) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMSUB213PS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62348, 461, 3771}, + /* 3963 : VFNMSUB213PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 ae /r ] FMA,FUTURE */ + /* 261(002 005) 001(ae) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMSUB213PS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62355, 461, 3772}, + /* 3964 : VFNMSUB213PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 ae /r ] FMA,FUTURE */ + /* 261(002 201) 001(ae) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMSUB213PD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62362, 461, 3773}, + /* 3965 : VFNMSUB213PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 ae /r ] FMA,FUTURE */ + /* 261(002 205) 001(ae) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMSUB213PD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62369, 461, 3774}, + /* 3966 : VFNMSUB123PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 ae /r ] FMA,FUTURE */ + /* 261(002 001) 001(ae) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMSUB123PS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62348, 461, 3775}, + /* 3967 : VFNMSUB123PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 ae /r ] FMA,FUTURE */ + /* 261(002 005) 001(ae) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMSUB123PS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62355, 461, 3776}, + /* 3968 : VFNMSUB123PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 ae /r ] FMA,FUTURE */ + /* 261(002 201) 001(ae) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMSUB123PD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62362, 461, 3777}, + /* 3969 : VFNMSUB123PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 ae /r ] FMA,FUTURE */ + /* 261(002 205) 001(ae) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMSUB123PD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62369, 461, 3778}, + /* 3970 : VFNMSUB231PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 be /r ] FMA,FUTURE */ + /* 261(002 001) 001(be) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMSUB231PS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62376, 461, 3779}, + /* 3971 : VFNMSUB231PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 be /r ] FMA,FUTURE */ + /* 261(002 005) 001(be) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMSUB231PS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62383, 461, 3780}, + /* 3972 : VFNMSUB231PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 be /r ] FMA,FUTURE */ + /* 261(002 201) 001(be) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMSUB231PD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62390, 461, 3781}, + /* 3973 : VFNMSUB231PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 be /r ] FMA,FUTURE */ + /* 261(002 205) 001(be) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMSUB231PD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62397, 461, 3782}, + /* 3974 : VFNMSUB321PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 be /r ] FMA,FUTURE */ + /* 261(002 001) 001(be) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMSUB321PS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62376, 461, 3783}, + /* 3975 : VFNMSUB321PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 be /r ] FMA,FUTURE */ + /* 261(002 005) 001(be) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMSUB321PS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62383, 461, 3784}, + /* 3976 : VFNMSUB321PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 be /r ] FMA,FUTURE */ + /* 261(002 201) 001(be) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMSUB321PD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62390, 461, 3785}, + /* 3977 : VFNMSUB321PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 be /r ] FMA,FUTURE */ + /* 261(002 205) 001(be) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMSUB321PD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62397, 461, 3786}, + /* 3978 : VFMADD132SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 99 /r ] FMA,FUTURE */ + /* 261(002 001) 001(99) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADD132SS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62404, 461, 3787}, + /* 3979 : VFMADD132SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 99 /r ] FMA,FUTURE */ + /* 261(002 201) 001(99) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADD132SD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62411, 461, 3788}, + /* 3980 : VFMADD312SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 99 /r ] FMA,FUTURE */ + /* 261(002 001) 001(99) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADD312SS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62404, 461, 3789}, + /* 3981 : VFMADD312SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 99 /r ] FMA,FUTURE */ + /* 261(002 201) 001(99) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADD312SD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62411, 461, 3790}, + /* 3982 : VFMADD213SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 a9 /r ] FMA,FUTURE */ + /* 261(002 001) 001(a9) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADD213SS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62418, 461, 3791}, + /* 3983 : VFMADD213SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 a9 /r ] FMA,FUTURE */ + /* 261(002 201) 001(a9) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADD213SD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62425, 461, 3792}, + /* 3984 : VFMADD123SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 a9 /r ] FMA,FUTURE */ + /* 261(002 001) 001(a9) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADD123SS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62418, 461, 3793}, + /* 3985 : VFMADD123SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 a9 /r ] FMA,FUTURE */ + /* 261(002 201) 001(a9) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADD123SD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62425, 461, 3794}, + /* 3986 : VFMADD231SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 b9 /r ] FMA,FUTURE */ + /* 261(002 001) 001(b9) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADD231SS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62432, 461, 3795}, + /* 3987 : VFMADD231SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 b9 /r ] FMA,FUTURE */ + /* 261(002 201) 001(b9) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADD231SD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62439, 461, 3796}, + /* 3988 : VFMADD321SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 b9 /r ] FMA,FUTURE */ + /* 261(002 001) 001(b9) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADD321SS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62432, 461, 3797}, + /* 3989 : VFMADD321SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 b9 /r ] FMA,FUTURE */ + /* 261(002 201) 001(b9) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMADD321SD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62439, 461, 3798}, + /* 3990 : VFMSUB132SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 9b /r ] FMA,FUTURE */ + /* 261(002 001) 001(9b) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUB132SS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62446, 461, 3799}, + /* 3991 : VFMSUB132SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 9b /r ] FMA,FUTURE */ + /* 261(002 201) 001(9b) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUB132SD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62453, 461, 3800}, + /* 3992 : VFMSUB312SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 9b /r ] FMA,FUTURE */ + /* 261(002 001) 001(9b) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUB312SS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62446, 461, 3801}, + /* 3993 : VFMSUB312SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 9b /r ] FMA,FUTURE */ + /* 261(002 201) 001(9b) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUB312SD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62453, 461, 3802}, + /* 3994 : VFMSUB213SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 ab /r ] FMA,FUTURE */ + /* 261(002 001) 001(ab) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUB213SS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62460, 461, 3803}, + /* 3995 : VFMSUB213SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 ab /r ] FMA,FUTURE */ + /* 261(002 201) 001(ab) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUB213SD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62467, 461, 3804}, + /* 3996 : VFMSUB123SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 ab /r ] FMA,FUTURE */ + /* 261(002 001) 001(ab) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUB123SS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62460, 461, 3805}, + /* 3997 : VFMSUB123SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 ab /r ] FMA,FUTURE */ + /* 261(002 201) 001(ab) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUB123SD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62467, 461, 3806}, + /* 3998 : VFMSUB231SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 bb /r ] FMA,FUTURE */ + /* 261(002 001) 001(bb) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUB231SS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62474, 461, 3807}, + /* 3999 : VFMSUB231SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 bb /r ] FMA,FUTURE */ + /* 261(002 201) 001(bb) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUB231SD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62481, 461, 3808}, + /* 4000 : VFMSUB321SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 bb /r ] FMA,FUTURE */ + /* 261(002 001) 001(bb) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUB321SS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62474, 461, 3809}, + /* 4001 : VFMSUB321SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 bb /r ] FMA,FUTURE */ + /* 261(002 201) 001(bb) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFMSUB321SD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62481, 461, 3810}, + /* 4002 : VFNMADD132SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 9d /r ] FMA,FUTURE */ + /* 261(002 001) 001(9d) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMADD132SS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62488, 461, 3811}, + /* 4003 : VFNMADD132SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 9d /r ] FMA,FUTURE */ + /* 261(002 201) 001(9d) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMADD132SD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62495, 461, 3812}, + /* 4004 : VFNMADD312SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 9d /r ] FMA,FUTURE */ + /* 261(002 001) 001(9d) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMADD312SS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62488, 461, 3813}, + /* 4005 : VFNMADD312SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 9d /r ] FMA,FUTURE */ + /* 261(002 201) 001(9d) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMADD312SD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62495, 461, 3814}, + /* 4006 : VFNMADD213SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 ad /r ] FMA,FUTURE */ + /* 261(002 001) 001(ad) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMADD213SS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62502, 461, 3815}, + /* 4007 : VFNMADD213SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 ad /r ] FMA,FUTURE */ + /* 261(002 201) 001(ad) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMADD213SD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62509, 461, 3816}, + /* 4008 : VFNMADD123SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 ad /r ] FMA,FUTURE */ + /* 261(002 001) 001(ad) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMADD123SS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62502, 461, 3817}, + /* 4009 : VFNMADD123SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 ad /r ] FMA,FUTURE */ + /* 261(002 201) 001(ad) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMADD123SD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62509, 461, 3818}, + /* 4010 : VFNMADD231SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 bd /r ] FMA,FUTURE */ + /* 261(002 001) 001(bd) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMADD231SS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62516, 461, 3819}, + /* 4011 : VFNMADD231SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 bd /r ] FMA,FUTURE */ + /* 261(002 201) 001(bd) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMADD231SD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62523, 461, 3820}, + /* 4012 : VFNMADD321SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 bd /r ] FMA,FUTURE */ + /* 261(002 001) 001(bd) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMADD321SS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62516, 461, 3821}, + /* 4013 : VFNMADD321SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 bd /r ] FMA,FUTURE */ + /* 261(002 201) 001(bd) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMADD321SD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62523, 461, 3822}, + /* 4014 : VFNMSUB132SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 9f /r ] FMA,FUTURE */ + /* 261(002 001) 001(9f) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMSUB132SS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62530, 461, 3823}, + /* 4015 : VFNMSUB132SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 9f /r ] FMA,FUTURE */ + /* 261(002 201) 001(9f) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMSUB132SD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62537, 461, 3824}, + /* 4016 : VFNMSUB312SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 9f /r ] FMA,FUTURE */ + /* 261(002 001) 001(9f) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMSUB312SS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62530, 461, 3825}, + /* 4017 : VFNMSUB312SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 9f /r ] FMA,FUTURE */ + /* 261(002 201) 001(9f) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMSUB312SD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62537, 461, 3826}, + /* 4018 : VFNMSUB213SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 af /r ] FMA,FUTURE */ + /* 261(002 001) 001(af) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMSUB213SS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62544, 461, 3827}, + /* 4019 : VFNMSUB213SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 af /r ] FMA,FUTURE */ + /* 261(002 201) 001(af) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMSUB213SD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62551, 461, 3828}, + /* 4020 : VFNMSUB123SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 af /r ] FMA,FUTURE */ + /* 261(002 001) 001(af) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMSUB123SS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62544, 461, 3829}, + /* 4021 : VFNMSUB123SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 af /r ] FMA,FUTURE */ + /* 261(002 201) 001(af) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMSUB123SD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62551, 461, 3830}, + /* 4022 : VFNMSUB231SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 bf /r ] FMA,FUTURE */ + /* 261(002 001) 001(bf) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMSUB231SS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62558, 461, 3831}, + /* 4023 : VFNMSUB231SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 bf /r ] FMA,FUTURE */ + /* 261(002 201) 001(bf) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMSUB231SD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62565, 461, 3832}, + /* 4024 : VFNMSUB321SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 bf /r ] FMA,FUTURE */ + /* 261(002 001) 001(bf) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMSUB321SS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62558, 461, 3833}, + /* 4025 : VFNMSUB321SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 bf /r ] FMA,FUTURE */ + /* 261(002 201) 001(bf) 120 : NOAPX,VEX,FMA,FUTURE */ + {I_VFNMSUB321SD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62565, 461, 3834}, + /* 4026 : VCVTPH2PS ymmreg,xmmrm128 [rm: vex.256.66.0f38.w0 13 /r ] F16C,FUTURE */ + /* 270(002 005) 001(13) 110 : NOAPX,VEX,F16C,FUTURE */ + {I_VCVTPH2PS, 2, {YMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+62572, 462, 3839}, + /* 4027 : VCVTPH2PS xmmreg,xmmrm64 [rm: vex.128.66.0f38.w0 13 /r ] F16C,FUTURE */ + /* 270(002 001) 001(13) 110 : NOAPX,VEX,F16C,FUTURE */ + {I_VCVTPH2PS, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+62579, 462, 3840}, + /* 4028 : VCVTPS2PH xmmrm128,ymmreg,imm8 [mri: vex.256.66.0f3a.w0 1d /r ib ] F16C,FUTURE */ + /* 270(003 005) 001(1d) 101 022 : NOAPX,VEX,F16C,FUTURE */ + {I_VCVTPS2PH, 3, {RM_XMM|BITS128|RN_L16,YMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52691, 462, 3841}, + /* 4029 : VCVTPS2PH xmmrm64,xmmreg,imm8 [mri: vex.128.66.0f3a.w0 1d /r ib ] F16C,FUTURE */ + /* 270(003 001) 001(1d) 101 022 : NOAPX,VEX,F16C,FUTURE */ + {I_VCVTPS2PH, 3, {RM_XMM|BITS64|RN_L16,XMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+52699, 462, 3842}, + /* 4030 : XSTORE void [ 0f a7 c0 ] PENT,CYRIX */ + /* 355 002(a7 c0) : PENT,CYRIX */ + {I_XSTORE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72514, 463, 3847}, + /* 4031 : XCRYPTECB void [ f3 0f a7 c8 ] PENT,CYRIX */ + /* 333 355 002(a7 c8) : PENT,CYRIX */ + {I_XCRYPTECB, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+69975, 463, 3848}, + /* 4032 : XCRYPTCBC void [ f3 0f a7 d0 ] PENT,CYRIX */ + /* 333 355 002(a7 d0) : PENT,CYRIX */ + {I_XCRYPTCBC, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+69981, 463, 3849}, + /* 4033 : XCRYPTCTR void [ f3 0f a7 d8 ] PENT,CYRIX */ + /* 333 355 002(a7 d8) : PENT,CYRIX */ + {I_XCRYPTCTR, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+69987, 463, 3850}, + /* 4034 : XCRYPTCFB void [ f3 0f a7 e0 ] PENT,CYRIX */ + /* 333 355 002(a7 e0) : PENT,CYRIX */ + {I_XCRYPTCFB, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+69993, 463, 3851}, + /* 4035 : XCRYPTOFB void [ f3 0f a7 e8 ] PENT,CYRIX */ + /* 333 355 002(a7 e8) : PENT,CYRIX */ + {I_XCRYPTOFB, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+69999, 463, 3852}, + /* 4036 : MONTMUL void [ f3 0f a6 c0 ] PENT,CYRIX */ + /* 333 355 002(a6 c0) : PENT,CYRIX */ + {I_MONTMUL, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70005, 463, 3853}, + /* 4037 : XSHA1 void [ f3 0f a6 c8 ] PENT,CYRIX */ + /* 333 355 002(a6 c8) : PENT,CYRIX */ + {I_XSHA1, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70011, 463, 3854}, + /* 4038 : XSHA256 void [ f3 0f a6 d0 ] PENT,CYRIX */ + /* 333 355 002(a6 d0) : PENT,CYRIX */ + {I_XSHA256, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70017, 463, 3855}, + /* 4039 : LLWPCB reg32 [m: xop.m9.w0.l0.p0 12 /0 ] 386,AMD */ + /* 270(111 000) 001(12) 200 : NOAPX,VEX,386,AMD */ + {I_LLWPCB, 1, {REG_GPR|BITS32|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+62586, 464, 3866}, + /* 4040 : LLWPCB reg64 [m: xop.m9.w1.l0.p0 12 /0 ] LONG,PROT,X86_64,AMD */ + /* 270(111 200) 001(12) 200 : NOAPX,LONG,VEX,PROT,X86_64,AMD */ + {I_LLWPCB, 1, {REG_GPR|BITS64|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+62593, 465, 3867}, + /* 4041 : SLWPCB reg32 [m: xop.m9.w0.l0.p0 12 /1 ] 386,AMD */ + /* 270(111 000) 001(12) 201 : NOAPX,VEX,386,AMD */ + {I_SLWPCB, 1, {REG_GPR|BITS32|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+62600, 464, 3869}, + /* 4042 : SLWPCB reg64 [m: xop.m9.w1.l0.p0 12 /1 ] LONG,PROT,X86_64,AMD */ + /* 270(111 200) 001(12) 201 : NOAPX,LONG,VEX,PROT,X86_64,AMD */ + {I_SLWPCB, 1, {REG_GPR|BITS64|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+62607, 465, 3870}, + /* 4043 : LWPVAL reg32,rm32,imm32 [vmi: xop.m10.w0.ndd.l0.p0 12 /1 id ] 386,AMD */ + /* 260(112 000) 001(12) 211 042 : NOAPX,VEX,386,AMD */ + {I_LWPVAL, 3, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+52707, 464, 3872}, + /* 4044 : LWPVAL reg64,rm32,imm32 [vmi: xop.m10.w1.ndd.l0.p0 12 /1 id ] LONG,PROT,X86_64,AMD */ + /* 260(112 200) 001(12) 211 042 : NOAPX,LONG,VEX,PROT,X86_64,AMD */ + {I_LWPVAL, 3, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS32|RN_L16,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+52715, 465, 3873}, + /* 4045 : LWPINS reg32,rm32,imm32 [vmi: xop.m10.w0.ndd.l0.p0 12 /0 id ] 386,AMD */ + /* 260(112 000) 001(12) 210 042 : NOAPX,VEX,386,AMD */ + {I_LWPINS, 3, {REG_GPR|BITS32|RN_L16,RM_GPR|BITS32|RN_L16,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+52723, 464, 3875}, + /* 4046 : LWPINS reg64,rm32,imm32 [vmi: xop.m10.w1.ndd.l0.p0 12 /0 id ] LONG,PROT,X86_64,AMD */ + /* 260(112 200) 001(12) 210 042 : NOAPX,LONG,VEX,PROT,X86_64,AMD */ + {I_LWPINS, 3, {REG_GPR|BITS64|RN_L16,RM_GPR|BITS32|RN_L16,IMM_NORMAL|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+52731, 465, 3876}, + /* 4047 : VFMADDPD xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: vex.m3.w0.nds.l0.p1 69 /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 001) 001(69) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMADDPD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+52739, 466, 3882}, + /* 4048 : VFMADDPD ymmreg,ymmreg*,ymmrm256,ymmreg [rvms: vex.m3.w0.nds.l1.p1 69 /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 005) 001(69) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMADDPD, 4, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,YMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+52755, 466, 3883}, + /* 4049 : VFMADDPD xmmreg,xmmreg*,xmmreg,xmmrm128 [rvsm: vex.m3.w1.nds.l0.p1 69 /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 201) 001(69) 130 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMADDPD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+52771, 466, 3884}, + /* 4050 : VFMADDPD ymmreg,ymmreg*,ymmreg,ymmrm256 [rvsm: vex.m3.w1.nds.l1.p1 69 /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 205) 001(69) 130 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMADDPD, 4, {YMMREG|RN_L16,YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+52787, 466, 3885}, + /* 4051 : VFMADDPS xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: vex.m3.w0.nds.l0.p1 68 /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 001) 001(68) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMADDPS, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+52803, 466, 3887}, + /* 4052 : VFMADDPS ymmreg,ymmreg*,ymmrm256,ymmreg [rvms: vex.m3.w0.nds.l1.p1 68 /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 005) 001(68) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMADDPS, 4, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,YMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+52819, 466, 3888}, + /* 4053 : VFMADDPS xmmreg,xmmreg*,xmmreg,xmmrm128 [rvsm: vex.m3.w1.nds.l0.p1 68 /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 201) 001(68) 130 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMADDPS, 4, {XMMREG|RN_L16,XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+52835, 466, 3889}, + /* 4054 : VFMADDPS ymmreg,ymmreg*,ymmreg,ymmrm256 [rvsm: vex.m3.w1.nds.l1.p1 68 /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 205) 001(68) 130 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMADDPS, 4, {YMMREG|RN_L16,YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+52851, 466, 3890}, + /* 4055 : VFMADDSD xmmreg,xmmreg*,xmmrm64,xmmreg [rvms: vex.m3.w0.nds.l0.p1 6b /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 001) 001(6b) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMADDSD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+52867, 466, 3892}, + /* 4056 : VFMADDSD xmmreg,xmmreg*,xmmreg,xmmrm64 [rvsm: vex.m3.w1.nds.l0.p1 6b /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 201) 001(6b) 130 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMADDSD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+52883, 466, 3893}, + /* 4057 : VFMADDSS xmmreg,xmmreg*,xmmrm32,xmmreg [rvms: vex.m3.w0.nds.l0.p1 6a /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 001) 001(6a) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMADDSS, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+52899, 466, 3895}, + /* 4058 : VFMADDSS xmmreg,xmmreg*,xmmreg,xmmrm32 [rvsm: vex.m3.w1.nds.l0.p1 6a /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 201) 001(6a) 130 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMADDSS, 4, {XMMREG|RN_L16,XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+52915, 466, 3896}, + /* 4059 : VFMADDSUBPD xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: vex.m3.w0.nds.l0.p1 5d /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 001) 001(5d) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMADDSUBPD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+52931, 466, 3898}, + /* 4060 : VFMADDSUBPD ymmreg,ymmreg*,ymmrm256,ymmreg [rvms: vex.m3.w0.nds.l1.p1 5d /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 005) 001(5d) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMADDSUBPD, 4, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,YMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+52947, 466, 3899}, + /* 4061 : VFMADDSUBPD xmmreg,xmmreg*,xmmreg,xmmrm128 [rvsm: vex.m3.w1.nds.l0.p1 5d /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 201) 001(5d) 130 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMADDSUBPD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+52963, 466, 3900}, + /* 4062 : VFMADDSUBPD ymmreg,ymmreg*,ymmreg,ymmrm256 [rvsm: vex.m3.w1.nds.l1.p1 5d /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 205) 001(5d) 130 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMADDSUBPD, 4, {YMMREG|RN_L16,YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+52979, 466, 3901}, + /* 4063 : VFMADDSUBPS xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: vex.m3.w0.nds.l0.p1 5c /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 001) 001(5c) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMADDSUBPS, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+52995, 466, 3903}, + /* 4064 : VFMADDSUBPS ymmreg,ymmreg*,ymmrm256,ymmreg [rvms: vex.m3.w0.nds.l1.p1 5c /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 005) 001(5c) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMADDSUBPS, 4, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,YMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53011, 466, 3904}, + /* 4065 : VFMADDSUBPS xmmreg,xmmreg*,xmmreg,xmmrm128 [rvsm: vex.m3.w1.nds.l0.p1 5c /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 201) 001(5c) 130 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMADDSUBPS, 4, {XMMREG|RN_L16,XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53027, 466, 3905}, + /* 4066 : VFMADDSUBPS ymmreg,ymmreg*,ymmreg,ymmrm256 [rvsm: vex.m3.w1.nds.l1.p1 5c /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 205) 001(5c) 130 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMADDSUBPS, 4, {YMMREG|RN_L16,YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53043, 466, 3906}, + /* 4067 : VFMSUBADDPD xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: vex.m3.w0.nds.l0.p1 5f /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 001) 001(5f) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMSUBADDPD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53059, 466, 3908}, + /* 4068 : VFMSUBADDPD ymmreg,ymmreg*,ymmrm256,ymmreg [rvms: vex.m3.w0.nds.l1.p1 5f /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 005) 001(5f) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMSUBADDPD, 4, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,YMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53075, 466, 3909}, + /* 4069 : VFMSUBADDPD xmmreg,xmmreg*,xmmreg,xmmrm128 [rvsm: vex.m3.w1.nds.l0.p1 5f /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 201) 001(5f) 130 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMSUBADDPD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53091, 466, 3910}, + /* 4070 : VFMSUBADDPD ymmreg,ymmreg*,ymmreg,ymmrm256 [rvsm: vex.m3.w1.nds.l1.p1 5f /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 205) 001(5f) 130 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMSUBADDPD, 4, {YMMREG|RN_L16,YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53107, 466, 3911}, + /* 4071 : VFMSUBADDPS xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: vex.m3.w0.nds.l0.p1 5e /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 001) 001(5e) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMSUBADDPS, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53123, 466, 3913}, + /* 4072 : VFMSUBADDPS ymmreg,ymmreg*,ymmrm256,ymmreg [rvms: vex.m3.w0.nds.l1.p1 5e /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 005) 001(5e) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMSUBADDPS, 4, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,YMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53139, 466, 3914}, + /* 4073 : VFMSUBADDPS xmmreg,xmmreg*,xmmreg,xmmrm128 [rvsm: vex.m3.w1.nds.l0.p1 5e /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 201) 001(5e) 130 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMSUBADDPS, 4, {XMMREG|RN_L16,XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53155, 466, 3915}, + /* 4074 : VFMSUBADDPS ymmreg,ymmreg*,ymmreg,ymmrm256 [rvsm: vex.m3.w1.nds.l1.p1 5e /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 205) 001(5e) 130 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMSUBADDPS, 4, {YMMREG|RN_L16,YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53171, 466, 3916}, + /* 4075 : VFMSUBPD xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: vex.m3.w0.nds.l0.p1 6d /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 001) 001(6d) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMSUBPD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53187, 466, 3918}, + /* 4076 : VFMSUBPD ymmreg,ymmreg*,ymmrm256,ymmreg [rvms: vex.m3.w0.nds.l1.p1 6d /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 005) 001(6d) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMSUBPD, 4, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,YMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53203, 466, 3919}, + /* 4077 : VFMSUBPD xmmreg,xmmreg*,xmmreg,xmmrm128 [rvsm: vex.m3.w1.nds.l0.p1 6d /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 201) 001(6d) 130 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMSUBPD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53219, 466, 3920}, + /* 4078 : VFMSUBPD ymmreg,ymmreg*,ymmreg,ymmrm256 [rvsm: vex.m3.w1.nds.l1.p1 6d /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 205) 001(6d) 130 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMSUBPD, 4, {YMMREG|RN_L16,YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53235, 466, 3921}, + /* 4079 : VFMSUBPS xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: vex.m3.w0.nds.l0.p1 6c /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 001) 001(6c) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMSUBPS, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53251, 466, 3923}, + /* 4080 : VFMSUBPS ymmreg,ymmreg*,ymmrm256,ymmreg [rvms: vex.m3.w0.nds.l1.p1 6c /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 005) 001(6c) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMSUBPS, 4, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,YMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53267, 466, 3924}, + /* 4081 : VFMSUBPS xmmreg,xmmreg*,xmmreg,xmmrm128 [rvsm: vex.m3.w1.nds.l0.p1 6c /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 201) 001(6c) 130 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMSUBPS, 4, {XMMREG|RN_L16,XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53283, 466, 3925}, + /* 4082 : VFMSUBPS ymmreg,ymmreg*,ymmreg,ymmrm256 [rvsm: vex.m3.w1.nds.l1.p1 6c /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 205) 001(6c) 130 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMSUBPS, 4, {YMMREG|RN_L16,YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53299, 466, 3926}, + /* 4083 : VFMSUBSD xmmreg,xmmreg*,xmmrm64,xmmreg [rvms: vex.m3.w0.nds.l0.p1 6f /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 001) 001(6f) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMSUBSD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53315, 466, 3928}, + /* 4084 : VFMSUBSD xmmreg,xmmreg*,xmmreg,xmmrm64 [rvsm: vex.m3.w1.nds.l0.p1 6f /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 201) 001(6f) 130 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMSUBSD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53331, 466, 3929}, + /* 4085 : VFMSUBSS xmmreg,xmmreg*,xmmrm32,xmmreg [rvms: vex.m3.w0.nds.l0.p1 6e /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 001) 001(6e) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMSUBSS, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53347, 466, 3931}, + /* 4086 : VFMSUBSS xmmreg,xmmreg*,xmmreg,xmmrm32 [rvsm: vex.m3.w1.nds.l0.p1 6e /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 201) 001(6e) 130 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFMSUBSS, 4, {XMMREG|RN_L16,XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53363, 466, 3932}, + /* 4087 : VFNMADDPD xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: vex.m3.w0.nds.l0.p1 79 /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 001) 001(79) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFNMADDPD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53379, 466, 3934}, + /* 4088 : VFNMADDPD ymmreg,ymmreg*,ymmrm256,ymmreg [rvms: vex.m3.w0.nds.l1.p1 79 /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 005) 001(79) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFNMADDPD, 4, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,YMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53395, 466, 3935}, + /* 4089 : VFNMADDPD xmmreg,xmmreg*,xmmreg,xmmrm128 [rvsm: vex.m3.w1.nds.l0.p1 79 /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 201) 001(79) 130 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFNMADDPD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53411, 466, 3936}, + /* 4090 : VFNMADDPD ymmreg,ymmreg*,ymmreg,ymmrm256 [rvsm: vex.m3.w1.nds.l1.p1 79 /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 205) 001(79) 130 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFNMADDPD, 4, {YMMREG|RN_L16,YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53427, 466, 3937}, + /* 4091 : VFNMADDPS xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: vex.m3.w0.nds.l0.p1 78 /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 001) 001(78) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFNMADDPS, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53443, 466, 3939}, + /* 4092 : VFNMADDPS ymmreg,ymmreg*,ymmrm256,ymmreg [rvms: vex.m3.w0.nds.l1.p1 78 /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 005) 001(78) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFNMADDPS, 4, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,YMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53459, 466, 3940}, + /* 4093 : VFNMADDPS xmmreg,xmmreg*,xmmreg,xmmrm128 [rvsm: vex.m3.w1.nds.l0.p1 78 /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 201) 001(78) 130 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFNMADDPS, 4, {XMMREG|RN_L16,XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53475, 466, 3941}, + /* 4094 : VFNMADDPS ymmreg,ymmreg*,ymmreg,ymmrm256 [rvsm: vex.m3.w1.nds.l1.p1 78 /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 205) 001(78) 130 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFNMADDPS, 4, {YMMREG|RN_L16,YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53491, 466, 3942}, + /* 4095 : VFNMADDSD xmmreg,xmmreg*,xmmrm64,xmmreg [rvms: vex.m3.w0.nds.l0.p1 7b /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 001) 001(7b) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFNMADDSD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53507, 466, 3944}, + /* 4096 : VFNMADDSD xmmreg,xmmreg*,xmmreg,xmmrm64 [rvsm: vex.m3.w1.nds.l0.p1 7b /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 201) 001(7b) 130 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFNMADDSD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53523, 466, 3945}, + /* 4097 : VFNMADDSS xmmreg,xmmreg*,xmmrm32,xmmreg [rvms: vex.m3.w0.nds.l0.p1 7a /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 001) 001(7a) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFNMADDSS, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53539, 466, 3947}, + /* 4098 : VFNMADDSS xmmreg,xmmreg*,xmmreg,xmmrm32 [rvsm: vex.m3.w1.nds.l0.p1 7a /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 201) 001(7a) 130 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFNMADDSS, 4, {XMMREG|RN_L16,XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53555, 466, 3948}, + /* 4099 : VFNMSUBPD xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: vex.m3.w0.nds.l0.p1 7d /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 001) 001(7d) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFNMSUBPD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53571, 466, 3950}, + /* 4100 : VFNMSUBPD ymmreg,ymmreg*,ymmrm256,ymmreg [rvms: vex.m3.w0.nds.l1.p1 7d /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 005) 001(7d) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFNMSUBPD, 4, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,YMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53587, 466, 3951}, + /* 4101 : VFNMSUBPD xmmreg,xmmreg*,xmmreg,xmmrm128 [rvsm: vex.m3.w1.nds.l0.p1 7d /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 201) 001(7d) 130 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFNMSUBPD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53603, 466, 3952}, + /* 4102 : VFNMSUBPD ymmreg,ymmreg*,ymmreg,ymmrm256 [rvsm: vex.m3.w1.nds.l1.p1 7d /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 205) 001(7d) 130 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFNMSUBPD, 4, {YMMREG|RN_L16,YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53619, 466, 3953}, + /* 4103 : VFNMSUBPS xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: vex.m3.w0.nds.l0.p1 7c /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 001) 001(7c) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFNMSUBPS, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53635, 466, 3955}, + /* 4104 : VFNMSUBPS ymmreg,ymmreg*,ymmrm256,ymmreg [rvms: vex.m3.w0.nds.l1.p1 7c /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 005) 001(7c) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFNMSUBPS, 4, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,YMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53651, 466, 3956}, + /* 4105 : VFNMSUBPS xmmreg,xmmreg*,xmmreg,xmmrm128 [rvsm: vex.m3.w1.nds.l0.p1 7c /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 201) 001(7c) 130 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFNMSUBPS, 4, {XMMREG|RN_L16,XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53667, 466, 3957}, + /* 4106 : VFNMSUBPS ymmreg,ymmreg*,ymmreg,ymmrm256 [rvsm: vex.m3.w1.nds.l1.p1 7c /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 205) 001(7c) 130 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFNMSUBPS, 4, {YMMREG|RN_L16,YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53683, 466, 3958}, + /* 4107 : VFNMSUBSD xmmreg,xmmreg*,xmmrm64,xmmreg [rvms: vex.m3.w0.nds.l0.p1 7f /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 001) 001(7f) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFNMSUBSD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53699, 466, 3960}, + /* 4108 : VFNMSUBSD xmmreg,xmmreg*,xmmreg,xmmrm64 [rvsm: vex.m3.w1.nds.l0.p1 7f /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 201) 001(7f) 130 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFNMSUBSD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53715, 466, 3961}, + /* 4109 : VFNMSUBSS xmmreg,xmmreg*,xmmrm32,xmmreg [rvms: vex.m3.w0.nds.l0.p1 7e /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 001) 001(7e) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFNMSUBSS, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53731, 466, 3963}, + /* 4110 : VFNMSUBSS xmmreg,xmmreg*,xmmreg,xmmrm32 [rvsm: vex.m3.w1.nds.l0.p1 7e /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(003 201) 001(7e) 130 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFNMSUBSS, 4, {XMMREG|RN_L16,XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53747, 466, 3964}, + /* 4111 : VFRCZPD xmmreg,xmmrm128* [rm: xop.m9.w0.l0.p0 81 /r ] SSE5,FUTURE,AMD */ + /* 270(111 000) 001(81) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFRCZPD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+62614, 466, 3966}, + /* 4112 : VFRCZPD ymmreg,ymmrm256* [rm: xop.m9.w0.l1.p0 81 /r ] SSE5,FUTURE,AMD */ + /* 270(111 004) 001(81) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFRCZPD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+62628, 466, 3967}, + /* 4113 : VFRCZPS xmmreg,xmmrm128* [rm: xop.m9.w0.l0.p0 80 /r ] SSE5,FUTURE,AMD */ + /* 270(111 000) 001(80) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFRCZPS, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+62642, 466, 3969}, + /* 4114 : VFRCZPS ymmreg,ymmrm256* [rm: xop.m9.w0.l1.p0 80 /r ] SSE5,FUTURE,AMD */ + /* 270(111 004) 001(80) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFRCZPS, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+62656, 466, 3970}, + /* 4115 : VFRCZSD xmmreg,xmmrm64* [rm: xop.m9.w0.l0.p0 83 /r ] SSE5,FUTURE,AMD */ + /* 270(111 000) 001(83) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFRCZSD, 2, {XMMREG|RN_L16,RM_XMM|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+62670, 466, 3972}, + /* 4116 : VFRCZSS xmmreg,xmmrm32* [rm: xop.m9.w0.l0.p0 82 /r ] SSE5,FUTURE,AMD */ + /* 270(111 000) 001(82) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VFRCZSS, 2, {XMMREG|RN_L16,RM_XMM|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+62684, 466, 3974}, + /* 4117 : VPCMOV xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: xop.m8.w0.nds.l0.p0 a2 /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(110 000) 001(a2) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPCMOV, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53763, 466, 3977}, + /* 4118 : VPCMOV ymmreg,ymmreg*,ymmrm256,ymmreg [rvms: xop.m8.w0.nds.l1.p0 a2 /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(110 004) 001(a2) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPCMOV, 4, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,YMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53779, 466, 3978}, + /* 4119 : VPCMOV xmmreg,xmmreg*,xmmreg,xmmrm128 [rvsm: xop.m8.w1.nds.l0.p0 a2 /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(110 200) 001(a2) 130 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPCMOV, 4, {XMMREG|RN_L16,XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53795, 466, 3979}, + /* 4120 : VPCMOV ymmreg,ymmreg*,ymmreg,ymmrm256 [rvsm: xop.m8.w1.nds.l1.p0 a2 /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(110 204) 001(a2) 130 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPCMOV, 4, {YMMREG|RN_L16,YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53811, 466, 3980}, + /* 4121 : VPCOMB xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: xop.m8.w0.nds.l0.p0 cc /r ib ] SSE5,FUTURE,AMD */ + /* 261(110 000) 001(cc) 120 023 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPCOMB, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+53827, 466, 3982}, + /* 4122 : VPCOMD xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: xop.m8.w0.nds.l0.p0 ce /r ib ] SSE5,FUTURE,AMD */ + /* 261(110 000) 001(ce) 120 023 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPCOMD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+53843, 466, 3983}, + /* 4123 : VPCOMQ xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: xop.m8.w0.nds.l0.p0 cf /r ib ] SSE5,FUTURE,AMD */ + /* 261(110 000) 001(cf) 120 023 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPCOMQ, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+53859, 466, 3984}, + /* 4124 : VPCOMUB xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: xop.m8.w0.nds.l0.p0 ec /r ib ] SSE5,FUTURE,AMD */ + /* 261(110 000) 001(ec) 120 023 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPCOMUB, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+53875, 466, 3987}, + /* 4125 : VPCOMUD xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: xop.m8.w0.nds.l0.p0 ee /r ib ] SSE5,FUTURE,AMD */ + /* 261(110 000) 001(ee) 120 023 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPCOMUD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+53891, 466, 3988}, + /* 4126 : VPCOMUQ xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: xop.m8.w0.nds.l0.p0 ef /r ib ] SSE5,FUTURE,AMD */ + /* 261(110 000) 001(ef) 120 023 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPCOMUQ, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+53907, 466, 3989}, + /* 4127 : VPCOMUW xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: xop.m8.w0.nds.l0.p0 ed /r ib ] SSE5,FUTURE,AMD */ + /* 261(110 000) 001(ed) 120 023 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPCOMUW, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+53923, 466, 3992}, + /* 4128 : VPCOMW xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: xop.m8.w0.nds.l0.p0 cd /r ib ] SSE5,FUTURE,AMD */ + /* 261(110 000) 001(cd) 120 023 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPCOMW, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+53939, 466, 3993}, + /* 4129 : VPHADDBD xmmreg,xmmrm128* [rm: xop.m9.w0.l0.p0 c2 /r ] SSE5,FUTURE,AMD */ + /* 270(111 000) 001(c2) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPHADDBD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+62698, 466, 3995}, + /* 4130 : VPHADDBQ xmmreg,xmmrm128* [rm: xop.m9.w0.l0.p0 c3 /r ] SSE5,FUTURE,AMD */ + /* 270(111 000) 001(c3) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPHADDBQ, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+62712, 466, 3996}, + /* 4131 : VPHADDBW xmmreg,xmmrm128* [rm: xop.m9.w0.l0.p0 c1 /r ] SSE5,FUTURE,AMD */ + /* 270(111 000) 001(c1) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPHADDBW, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+62726, 466, 3997}, + /* 4132 : VPHADDDQ xmmreg,xmmrm128* [rm: xop.m9.w0.l0.p0 cb /r ] SSE5,FUTURE,AMD */ + /* 270(111 000) 001(cb) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPHADDDQ, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+62740, 466, 3998}, + /* 4133 : VPHADDUBD xmmreg,xmmrm128* [rm: xop.m9.w0.l0.p0 d2 /r ] SSE5,FUTURE,AMD */ + /* 270(111 000) 001(d2) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPHADDUBD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+62754, 466, 4001}, + /* 4134 : VPHADDUBQ xmmreg,xmmrm128* [rm: xop.m9.w0.l0.p0 d3 /r ] SSE5,FUTURE,AMD */ + /* 270(111 000) 001(d3) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPHADDUBQ, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+62768, 466, 4002}, + /* 4135 : VPHADDUBW xmmreg,xmmrm128* [rm: xop.m9.w0.l0.p0 d1 /r ] SSE5,FUTURE,AMD */ + /* 270(111 000) 001(d1) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPHADDUBW, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+62782, 466, 4005}, + /* 4136 : VPHADDUDQ xmmreg,xmmrm128* [rm: xop.m9.w0.l0.p0 db /r ] SSE5,FUTURE,AMD */ + /* 270(111 000) 001(db) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPHADDUDQ, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+62796, 466, 4008}, + /* 4137 : VPHADDUWD xmmreg,xmmrm128* [rm: xop.m9.w0.l0.p0 d6 /r ] SSE5,FUTURE,AMD */ + /* 270(111 000) 001(d6) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPHADDUWD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+62810, 466, 4009}, + /* 4138 : VPHADDUWQ xmmreg,xmmrm128* [rm: xop.m9.w0.l0.p0 d7 /r ] SSE5,FUTURE,AMD */ + /* 270(111 000) 001(d7) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPHADDUWQ, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+62824, 466, 4010}, + /* 4139 : VPHADDWD xmmreg,xmmrm128* [rm: xop.m9.w0.l0.p0 c6 /r ] SSE5,FUTURE,AMD */ + /* 270(111 000) 001(c6) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPHADDWD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+62838, 466, 4013}, + /* 4140 : VPHADDWQ xmmreg,xmmrm128* [rm: xop.m9.w0.l0.p0 c7 /r ] SSE5,FUTURE,AMD */ + /* 270(111 000) 001(c7) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPHADDWQ, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+62852, 466, 4016}, + /* 4141 : VPHSUBBW xmmreg,xmmrm128* [rm: xop.m9.w0.l0.p0 e1 /r ] SSE5,FUTURE,AMD */ + /* 270(111 000) 001(e1) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPHSUBBW, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+62866, 466, 4018}, + /* 4142 : VPHSUBDQ xmmreg,xmmrm128* [rm: xop.m9.w0.l0.p0 e3 /r ] SSE5,FUTURE,AMD */ + /* 270(111 000) 001(e3) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPHSUBDQ, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+62880, 466, 4019}, + /* 4143 : VPHSUBWD xmmreg,xmmrm128* [rm: xop.m9.w0.l0.p0 e2 /r ] SSE5,FUTURE,AMD */ + /* 270(111 000) 001(e2) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPHSUBWD, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+62894, 466, 4020}, + /* 4144 : VPMACSDD xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: xop.m8.w0.nds.l0.p0 9e /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(110 000) 001(9e) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPMACSDD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53955, 466, 4022}, + /* 4145 : VPMACSDQH xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: xop.m8.w0.nds.l0.p0 9f /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(110 000) 001(9f) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPMACSDQH, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53971, 466, 4025}, + /* 4146 : VPMACSDQL xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: xop.m8.w0.nds.l0.p0 97 /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(110 000) 001(97) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPMACSDQL, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+53987, 466, 4026}, + /* 4147 : VPMACSSDD xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: xop.m8.w0.nds.l0.p0 8e /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(110 000) 001(8e) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPMACSSDD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+54003, 466, 4027}, + /* 4148 : VPMACSSDQH xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: xop.m8.w0.nds.l0.p0 8f /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(110 000) 001(8f) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPMACSSDQH, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+54019, 466, 4028}, + /* 4149 : VPMACSSDQL xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: xop.m8.w0.nds.l0.p0 87 /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(110 000) 001(87) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPMACSSDQL, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+54035, 466, 4029}, + /* 4150 : VPMACSSWD xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: xop.m8.w0.nds.l0.p0 86 /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(110 000) 001(86) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPMACSSWD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+54051, 466, 4030}, + /* 4151 : VPMACSSWW xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: xop.m8.w0.nds.l0.p0 85 /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(110 000) 001(85) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPMACSSWW, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+54067, 466, 4031}, + /* 4152 : VPMACSWD xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: xop.m8.w0.nds.l0.p0 96 /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(110 000) 001(96) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPMACSWD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+54083, 466, 4032}, + /* 4153 : VPMACSWW xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: xop.m8.w0.nds.l0.p0 95 /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(110 000) 001(95) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPMACSWW, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+54099, 466, 4033}, + /* 4154 : VPMADCSSWD xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: xop.m8.w0.nds.l0.p0 a6 /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(110 000) 001(a6) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPMADCSSWD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+54115, 466, 4034}, + /* 4155 : VPMADCSWD xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: xop.m8.w0.nds.l0.p0 b6 /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(110 000) 001(b6) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPMADCSWD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+54131, 466, 4035}, + /* 4156 : VPPERM xmmreg,xmmreg*,xmmreg,xmmrm128 [rvsm: xop.m8.w1.nds.l0.p0 a3 /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(110 200) 001(a3) 130 176 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPPERM, 4, {XMMREG|RN_L16,XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+54147, 466, 4037}, + /* 4157 : VPPERM xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: xop.m8.w0.nds.l0.p0 a3 /r /is4 ] SSE5,FUTURE,AMD */ + /* 261(110 000) 001(a3) 120 177 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPPERM, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+54163, 466, 4038}, + /* 4158 : VPROTB xmmreg,xmmrm128*,xmmreg [rmv: xop.m9.w0.nds.l0.p0 90 /r ] SSE5,FUTURE,AMD */ + /* 262(111 000) 001(90) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPROTB, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62908, 466, 4040}, + /* 4159 : VPROTB xmmreg,xmmreg*,xmmrm128 [rvm: xop.m9.w1.nds.l0.p0 90 /r ] SSE5,FUTURE,AMD */ + /* 261(111 200) 001(90) 120 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPROTB, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62922, 466, 4041}, + /* 4160 : VPROTB xmmreg,xmmrm128*,imm8 [rmi: xop.m8.w0.l0.p0 c0 /r ib ] SSE5,FUTURE,AMD */ + /* 270(110 000) 001(c0) 110 022 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPROTB, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54179, 466, 4044}, + /* 4161 : VPROTD xmmreg,xmmrm128*,xmmreg [rmv: xop.m9.w0.nds.l0.p0 92 /r ] SSE5,FUTURE,AMD */ + /* 262(111 000) 001(92) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPROTD, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62936, 466, 4046}, + /* 4162 : VPROTD xmmreg,xmmreg*,xmmrm128 [rvm: xop.m9.w1.nds.l0.p0 92 /r ] SSE5,FUTURE,AMD */ + /* 261(111 200) 001(92) 120 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPROTD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62950, 466, 4047}, + /* 4163 : VPROTD xmmreg,xmmrm128*,imm8 [rmi: xop.m8.w0.l0.p0 c2 /r ib ] SSE5,FUTURE,AMD */ + /* 270(110 000) 001(c2) 110 022 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPROTD, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54195, 466, 4050}, + /* 4164 : VPROTQ xmmreg,xmmrm128*,xmmreg [rmv: xop.m9.w0.nds.l0.p0 93 /r ] SSE5,FUTURE,AMD */ + /* 262(111 000) 001(93) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPROTQ, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62964, 466, 4051}, + /* 4165 : VPROTQ xmmreg,xmmreg*,xmmrm128 [rvm: xop.m9.w1.nds.l0.p0 93 /r ] SSE5,FUTURE,AMD */ + /* 261(111 200) 001(93) 120 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPROTQ, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62978, 466, 4052}, + /* 4166 : VPROTQ xmmreg,xmmrm128*,imm8 [rmi: xop.m8.w0.l0.p0 c3 /r ib ] SSE5,FUTURE,AMD */ + /* 270(110 000) 001(c3) 110 022 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPROTQ, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54211, 466, 4055}, + /* 4167 : VPROTW xmmreg,xmmrm128*,xmmreg [rmv: xop.m9.w0.nds.l0.p0 91 /r ] SSE5,FUTURE,AMD */ + /* 262(111 000) 001(91) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPROTW, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+62992, 466, 4056}, + /* 4168 : VPROTW xmmreg,xmmreg*,xmmrm128 [rvm: xop.m9.w1.nds.l0.p0 91 /r ] SSE5,FUTURE,AMD */ + /* 261(111 200) 001(91) 120 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPROTW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63006, 466, 4057}, + /* 4169 : VPROTW xmmreg,xmmrm128*,imm8 [rmi: xop.m8.w0.l0.p0 c1 /r ib ] SSE5,FUTURE,AMD */ + /* 270(110 000) 001(c1) 110 022 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPROTW, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54227, 466, 4058}, + /* 4170 : VPSHAB xmmreg,xmmrm128*,xmmreg [rmv: xop.m9.w0.nds.l0.p0 98 /r ] SSE5,FUTURE,AMD */ + /* 262(111 000) 001(98) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPSHAB, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63020, 466, 4060}, + /* 4171 : VPSHAB xmmreg,xmmreg*,xmmrm128 [rvm: xop.m9.w1.nds.l0.p0 98 /r ] SSE5,FUTURE,AMD */ + /* 261(111 200) 001(98) 120 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPSHAB, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63034, 466, 4061}, + /* 4172 : VPSHAD xmmreg,xmmrm128*,xmmreg [rmv: xop.m9.w0.nds.l0.p0 9a /r ] SSE5,FUTURE,AMD */ + /* 262(111 000) 001(9a) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPSHAD, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63048, 466, 4063}, + /* 4173 : VPSHAD xmmreg,xmmreg*,xmmrm128 [rvm: xop.m9.w1.nds.l0.p0 9a /r ] SSE5,FUTURE,AMD */ + /* 261(111 200) 001(9a) 120 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPSHAD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63062, 466, 4064}, + /* 4174 : VPSHAQ xmmreg,xmmrm128*,xmmreg [rmv: xop.m9.w0.nds.l0.p0 9b /r ] SSE5,FUTURE,AMD */ + /* 262(111 000) 001(9b) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPSHAQ, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63076, 466, 4066}, + /* 4175 : VPSHAQ xmmreg,xmmreg*,xmmrm128 [rvm: xop.m9.w1.nds.l0.p0 9b /r ] SSE5,FUTURE,AMD */ + /* 261(111 200) 001(9b) 120 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPSHAQ, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63090, 466, 4067}, + /* 4176 : VPSHAW xmmreg,xmmrm128*,xmmreg [rmv: xop.m9.w0.nds.l0.p0 99 /r ] SSE5,FUTURE,AMD */ + /* 262(111 000) 001(99) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPSHAW, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63104, 466, 4069}, + /* 4177 : VPSHAW xmmreg,xmmreg*,xmmrm128 [rvm: xop.m9.w1.nds.l0.p0 99 /r ] SSE5,FUTURE,AMD */ + /* 261(111 200) 001(99) 120 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPSHAW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63118, 466, 4070}, + /* 4178 : VPSHLB xmmreg,xmmrm128*,xmmreg [rmv: xop.m9.w0.nds.l0.p0 94 /r ] SSE5,FUTURE,AMD */ + /* 262(111 000) 001(94) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPSHLB, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63132, 466, 4072}, + /* 4179 : VPSHLB xmmreg,xmmreg*,xmmrm128 [rvm: xop.m9.w1.nds.l0.p0 94 /r ] SSE5,FUTURE,AMD */ + /* 261(111 200) 001(94) 120 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPSHLB, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63146, 466, 4073}, + /* 4180 : VPSHLD xmmreg,xmmrm128*,xmmreg [rmv: xop.m9.w0.nds.l0.p0 96 /r ] SSE5,FUTURE,AMD */ + /* 262(111 000) 001(96) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPSHLD, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63160, 466, 4077}, + /* 4181 : VPSHLD xmmreg,xmmreg*,xmmrm128 [rvm: xop.m9.w1.nds.l0.p0 96 /r ] SSE5,FUTURE,AMD */ + /* 261(111 200) 001(96) 120 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPSHLD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63174, 466, 4078}, + /* 4182 : VPSHLQ xmmreg,xmmrm128*,xmmreg [rmv: xop.m9.w0.nds.l0.p0 97 /r ] SSE5,FUTURE,AMD */ + /* 262(111 000) 001(97) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPSHLQ, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63188, 466, 4080}, + /* 4183 : VPSHLQ xmmreg,xmmreg*,xmmrm128 [rvm: xop.m9.w1.nds.l0.p0 97 /r ] SSE5,FUTURE,AMD */ + /* 261(111 200) 001(97) 120 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPSHLQ, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63202, 466, 4081}, + /* 4184 : VPSHLW xmmreg,xmmrm128*,xmmreg [rmv: xop.m9.w0.nds.l0.p0 95 /r ] SSE5,FUTURE,AMD */ + /* 262(111 000) 001(95) 110 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPSHLW, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63216, 466, 4083}, + /* 4185 : VPSHLW xmmreg,xmmreg*,xmmrm128 [rvm: xop.m9.w1.nds.l0.p0 95 /r ] SSE5,FUTURE,AMD */ + /* 261(111 200) 001(95) 120 : NOAPX,VEX,SSE5,FUTURE,AMD */ + {I_VPSHLW, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63230, 466, 4084}, + /* 4186 : VMPSADBW ymmreg,ymmreg*,ymmrm256,imm8 [rvmi: vex.nds.256.66.0f3a 42 /r ib ] AVX2,FUTURE */ + /* 261(003 005) 001(42) 120 023 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VMPSADBW, 4, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+54243, 467, 4090}, + /* 4187 : VPABSB ymmreg,ymmrm256 [rm: vex.256.66.0f38 1c /r ] AVX2,FUTURE */ + /* 270(002 005) 001(1c) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPABSB, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63244, 467, 4091}, + /* 4188 : VPABSW ymmreg,ymmrm256 [rm: vex.256.66.0f38 1d /r ] AVX2,FUTURE */ + /* 270(002 005) 001(1d) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPABSW, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63251, 467, 4092}, + /* 4189 : VPABSD ymmreg,ymmrm256 [rm: vex.256.66.0f38 1e /r ] AVX2,FUTURE */ + /* 270(002 005) 001(1e) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPABSD, 2, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63258, 467, 4093}, + /* 4190 : VPACKSSWB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 63 /r ] AVX2,FUTURE */ + /* 261(001 005) 001(63) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPACKSSWB, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63265, 467, 4094}, + /* 4191 : VPACKSSDW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 6b /r ] AVX2,FUTURE */ + /* 261(001 005) 001(6b) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPACKSSDW, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63279, 467, 4095}, + /* 4192 : VPACKUSDW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 2b /r ] AVX2,FUTURE */ + /* 261(002 005) 001(2b) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPACKUSDW, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63293, 467, 4096}, + /* 4193 : VPACKUSWB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 67 /r ] AVX2,FUTURE */ + /* 261(001 005) 001(67) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPACKUSWB, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63307, 467, 4097}, + /* 4194 : VPADDB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f fc /r ] AVX2,FUTURE */ + /* 261(001 005) 001(fc) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPADDB, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63321, 467, 4098}, + /* 4195 : VPADDW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f fd /r ] AVX2,FUTURE */ + /* 261(001 005) 001(fd) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPADDW, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63335, 467, 4099}, + /* 4196 : VPADDD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f fe /r ] AVX2,FUTURE */ + /* 261(001 005) 001(fe) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPADDD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63349, 467, 4100}, + /* 4197 : VPADDQ ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f d4 /r ] AVX2,FUTURE */ + /* 261(001 005) 001(d4) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPADDQ, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63363, 467, 4101}, + /* 4198 : VPADDSB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f ec /r ] AVX2,FUTURE */ + /* 261(001 005) 001(ec) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPADDSB, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63377, 467, 4102}, + /* 4199 : VPADDSW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f ed /r ] AVX2,FUTURE */ + /* 261(001 005) 001(ed) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPADDSW, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63391, 467, 4103}, + /* 4200 : VPADDUSB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f dc /r ] AVX2,FUTURE */ + /* 261(001 005) 001(dc) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPADDUSB, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63405, 467, 4104}, + /* 4201 : VPADDUSW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f dd /r ] AVX2,FUTURE */ + /* 261(001 005) 001(dd) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPADDUSW, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63419, 467, 4105}, + /* 4202 : VPALIGNR ymmreg,ymmreg*,ymmrm256,imm8 [rvmi: vex.nds.256.66.0f3a 0f /r ib ] AVX2,FUTURE */ + /* 261(003 005) 001(0f) 120 023 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPALIGNR, 4, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+54259, 467, 4106}, + /* 4203 : VPAND ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f db /r ] AVX2,FUTURE */ + /* 261(001 005) 001(db) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPAND, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63433, 467, 4107}, + /* 4204 : VPANDN ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f df /r ] AVX2,FUTURE */ + /* 261(001 005) 001(df) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPANDN, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63447, 467, 4108}, + /* 4205 : VPAVGB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f e0 /r ] AVX2,FUTURE */ + /* 261(001 005) 001(e0) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPAVGB, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63461, 467, 4109}, + /* 4206 : VPAVGW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f e3 /r ] AVX2,FUTURE */ + /* 261(001 005) 001(e3) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPAVGW, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63475, 467, 4110}, + /* 4207 : VPBLENDVB ymmreg,ymmreg*,ymmrm256,ymmreg [rvms: vex.nds.256.66.0f3a 4c /r /is4 ] AVX2,FUTURE */ + /* 261(003 005) 001(4c) 120 177 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPBLENDVB, 4, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,YMMREG|RN_L16,0}, NO_DECORATOR, nasm_bytecodes+54275, 467, 4111}, + /* 4208 : VPBLENDW ymmreg,ymmreg*,ymmrm256,imm8 [rvmi: vex.nds.256.66.0f3a 0e /r ib ] AVX2,FUTURE */ + /* 261(003 005) 001(0e) 120 023 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPBLENDW, 4, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+54291, 467, 4112}, + /* 4209 : VPCMPEQB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 74 /r ] AVX2,FUTURE */ + /* 261(001 005) 001(74) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPCMPEQB, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63489, 467, 4113}, + /* 4210 : VPCMPEQW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 75 /r ] AVX2,FUTURE */ + /* 261(001 005) 001(75) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPCMPEQW, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63503, 467, 4114}, + /* 4211 : VPCMPEQD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 76 /r ] AVX2,FUTURE */ + /* 261(001 005) 001(76) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPCMPEQD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63517, 467, 4115}, + /* 4212 : VPCMPEQQ ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 29 /r ] AVX2,FUTURE */ + /* 261(002 005) 001(29) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPCMPEQQ, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63531, 467, 4116}, + /* 4213 : VPCMPGTB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 64 /r ] AVX2,FUTURE */ + /* 261(001 005) 001(64) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPCMPGTB, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63545, 467, 4117}, + /* 4214 : VPCMPGTW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 65 /r ] AVX2,FUTURE */ + /* 261(001 005) 001(65) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPCMPGTW, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63559, 467, 4118}, + /* 4215 : VPCMPGTD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 66 /r ] AVX2,FUTURE */ + /* 261(001 005) 001(66) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPCMPGTD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63573, 467, 4119}, + /* 4216 : VPCMPGTQ ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 37 /r ] AVX2,FUTURE */ + /* 261(002 005) 001(37) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPCMPGTQ, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63587, 467, 4120}, + /* 4217 : VPHADDW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 01 /r ] AVX2,FUTURE */ + /* 261(002 005) 001(01) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPHADDW, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63601, 467, 4121}, + /* 4218 : VPHADDD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 02 /r ] AVX2,FUTURE */ + /* 261(002 005) 001(02) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPHADDD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63615, 467, 4122}, + /* 4219 : VPHADDSW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 03 /r ] AVX2,FUTURE */ + /* 261(002 005) 001(03) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPHADDSW, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63629, 467, 4123}, + /* 4220 : VPHSUBW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 05 /r ] AVX2,FUTURE */ + /* 261(002 005) 001(05) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPHSUBW, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63643, 467, 4124}, + /* 4221 : VPHSUBD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 06 /r ] AVX2,FUTURE */ + /* 261(002 005) 001(06) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPHSUBD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63657, 467, 4125}, + /* 4222 : VPHSUBSW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 07 /r ] AVX2,FUTURE */ + /* 261(002 005) 001(07) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPHSUBSW, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63671, 467, 4126}, + /* 4223 : VPMADDUBSW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 04 /r ] AVX2,FUTURE */ + /* 261(002 005) 001(04) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMADDUBSW, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63685, 467, 4127}, + /* 4224 : VPMADDWD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f f5 /r ] AVX2,FUTURE */ + /* 261(001 005) 001(f5) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMADDWD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63699, 467, 4128}, + /* 4225 : VPMAXSB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 3c /r ] AVX2,FUTURE */ + /* 261(002 005) 001(3c) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMAXSB, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63713, 467, 4129}, + /* 4226 : VPMAXSW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f ee /r ] AVX2,FUTURE */ + /* 261(001 005) 001(ee) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMAXSW, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63727, 467, 4130}, + /* 4227 : VPMAXSD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 3d /r ] AVX2,FUTURE */ + /* 261(002 005) 001(3d) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMAXSD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63741, 467, 4131}, + /* 4228 : VPMAXUB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f de /r ] AVX2,FUTURE */ + /* 261(001 005) 001(de) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMAXUB, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63755, 467, 4132}, + /* 4229 : VPMAXUW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 3e /r ] AVX2,FUTURE */ + /* 261(002 005) 001(3e) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMAXUW, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63769, 467, 4133}, + /* 4230 : VPMAXUD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 3f /r ] AVX2,FUTURE */ + /* 261(002 005) 001(3f) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMAXUD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63783, 467, 4134}, + /* 4231 : VPMINSB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 38 /r ] AVX2,FUTURE */ + /* 261(002 005) 001(38) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMINSB, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63797, 467, 4135}, + /* 4232 : VPMINSW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f ea /r ] AVX2,FUTURE */ + /* 261(001 005) 001(ea) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMINSW, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63811, 467, 4136}, + /* 4233 : VPMINSD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 39 /r ] AVX2,FUTURE */ + /* 261(002 005) 001(39) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMINSD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63825, 467, 4137}, + /* 4234 : VPMINUB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f da /r ] AVX2,FUTURE */ + /* 261(001 005) 001(da) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMINUB, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63839, 467, 4138}, + /* 4235 : VPMINUW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 3a /r ] AVX2,FUTURE */ + /* 261(002 005) 001(3a) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMINUW, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63853, 467, 4139}, + /* 4236 : VPMINUD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 3b /r ] AVX2,FUTURE */ + /* 261(002 005) 001(3b) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMINUD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63867, 467, 4140}, + /* 4237 : VPMOVMSKB reg32,ymmreg [rm: vex.256.66.0f d7 /r ] AVX2,FUTURE */ + /* 270(001 005) 001(d7) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMOVMSKB, 2, {REG_GPR|BITS32|RN_L16,YMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63881, 467, 4141}, + /* 4238 : VPMOVMSKB reg64,ymmreg [rm: vex.256.66.0f d7 /r ] AVX2,FUTURE */ + /* 270(001 005) 001(d7) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMOVMSKB, 2, {REG_GPR|BITS64|RN_L16,YMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63881, 467, 4142}, + /* 4239 : VPMOVSXBW ymmreg,xmmrm128 [rm: vex.256.66.0f38 20 /r ] AVX2,FUTURE */ + /* 270(002 005) 001(20) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMOVSXBW, 2, {YMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63888, 467, 4143}, + /* 4240 : VPMOVSXBD ymmreg,mem64 [rm: vex.256.66.0f38 21 /r ] AVX2,FUTURE */ + /* 270(002 005) 001(21) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMOVSXBD, 2, {YMMREG|RN_L16,MEMORY|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63895, 467, 4144}, + /* 4241 : VPMOVSXBD ymmreg,xmmreg [rm: vex.256.66.0f38 21 /r ] AVX2,FUTURE */ + /* 270(002 005) 001(21) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMOVSXBD, 2, {YMMREG|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63895, 467, 4145}, + /* 4242 : VPMOVSXBQ ymmreg,mem32 [rm: vex.256.66.0f38 22 /r ] AVX2,FUTURE */ + /* 270(002 005) 001(22) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMOVSXBQ, 2, {YMMREG|RN_L16,MEMORY|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63902, 467, 4146}, + /* 4243 : VPMOVSXBQ ymmreg,xmmreg [rm: vex.256.66.0f38 22 /r ] AVX2,FUTURE */ + /* 270(002 005) 001(22) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMOVSXBQ, 2, {YMMREG|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63902, 467, 4147}, + /* 4244 : VPMOVSXWD ymmreg,xmmrm128 [rm: vex.256.66.0f38 23 /r ] AVX2,FUTURE */ + /* 270(002 005) 001(23) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMOVSXWD, 2, {YMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63909, 467, 4148}, + /* 4245 : VPMOVSXWQ ymmreg,mem64 [rm: vex.256.66.0f38 24 /r ] AVX2,FUTURE */ + /* 270(002 005) 001(24) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMOVSXWQ, 2, {YMMREG|RN_L16,MEMORY|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63916, 467, 4149}, + /* 4246 : VPMOVSXWQ ymmreg,xmmreg [rm: vex.256.66.0f38 24 /r ] AVX2,FUTURE */ + /* 270(002 005) 001(24) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMOVSXWQ, 2, {YMMREG|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63916, 467, 4150}, + /* 4247 : VPMOVSXDQ ymmreg,xmmrm128 [rm: vex.256.66.0f38 25 /r ] AVX2,FUTURE */ + /* 270(002 005) 001(25) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMOVSXDQ, 2, {YMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63923, 467, 4151}, + /* 4248 : VPMOVZXBW ymmreg,xmmrm128 [rm: vex.256.66.0f38 30 /r ] AVX2,FUTURE */ + /* 270(002 005) 001(30) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMOVZXBW, 2, {YMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63930, 467, 4152}, + /* 4249 : VPMOVZXBD ymmreg,mem64 [rm: vex.256.66.0f38 31 /r ] AVX2,FUTURE */ + /* 270(002 005) 001(31) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMOVZXBD, 2, {YMMREG|RN_L16,MEMORY|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63937, 467, 4153}, + /* 4250 : VPMOVZXBD ymmreg,xmmreg [rm: vex.256.66.0f38 31 /r ] AVX2,FUTURE */ + /* 270(002 005) 001(31) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMOVZXBD, 2, {YMMREG|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63937, 467, 4154}, + /* 4251 : VPMOVZXBQ ymmreg,mem32 [rm: vex.256.66.0f38 32 /r ] AVX2,FUTURE */ + /* 270(002 005) 001(32) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMOVZXBQ, 2, {YMMREG|RN_L16,MEMORY|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63944, 467, 4155}, + /* 4252 : VPMOVZXBQ ymmreg,xmmreg [rm: vex.256.66.0f38 32 /r ] AVX2,FUTURE */ + /* 270(002 005) 001(32) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMOVZXBQ, 2, {YMMREG|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63944, 467, 4156}, + /* 4253 : VPMOVZXWD ymmreg,xmmrm128 [rm: vex.256.66.0f38 33 /r ] AVX2,FUTURE */ + /* 270(002 005) 001(33) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMOVZXWD, 2, {YMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63951, 467, 4157}, + /* 4254 : VPMOVZXWQ ymmreg,mem64 [rm: vex.256.66.0f38 34 /r ] AVX2,FUTURE */ + /* 270(002 005) 001(34) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMOVZXWQ, 2, {YMMREG|RN_L16,MEMORY|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63958, 467, 4158}, + /* 4255 : VPMOVZXWQ ymmreg,xmmreg [rm: vex.256.66.0f38 34 /r ] AVX2,FUTURE */ + /* 270(002 005) 001(34) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMOVZXWQ, 2, {YMMREG|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63958, 467, 4159}, + /* 4256 : VPMOVZXDQ ymmreg,xmmrm128 [rm: vex.256.66.0f38 35 /r ] AVX2,FUTURE */ + /* 270(002 005) 001(35) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMOVZXDQ, 2, {YMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+63965, 467, 4160}, + /* 4257 : VPMULDQ ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 28 /r ] AVX2,FUTURE */ + /* 261(002 005) 001(28) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMULDQ, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63972, 467, 4161}, + /* 4258 : VPMULHRSW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 0b /r ] AVX2,FUTURE */ + /* 261(002 005) 001(0b) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMULHRSW, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+63986, 467, 4162}, + /* 4259 : VPMULHUW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f e4 /r ] AVX2,FUTURE */ + /* 261(001 005) 001(e4) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMULHUW, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64000, 467, 4163}, + /* 4260 : VPMULHW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f e5 /r ] AVX2,FUTURE */ + /* 261(001 005) 001(e5) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMULHW, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64014, 467, 4164}, + /* 4261 : VPMULLW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f d5 /r ] AVX2,FUTURE */ + /* 261(001 005) 001(d5) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMULLW, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64028, 467, 4165}, + /* 4262 : VPMULLD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 40 /r ] AVX2,FUTURE */ + /* 261(002 005) 001(40) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMULLD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64042, 467, 4166}, + /* 4263 : VPMULUDQ ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f f4 /r ] AVX2,FUTURE */ + /* 261(001 005) 001(f4) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPMULUDQ, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64056, 467, 4167}, + /* 4264 : VPOR ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f eb /r ] AVX2,FUTURE */ + /* 261(001 005) 001(eb) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPOR, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64070, 467, 4168}, + /* 4265 : VPSADBW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f f6 /r ] AVX2,FUTURE */ + /* 261(001 005) 001(f6) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSADBW, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64084, 467, 4169}, + /* 4266 : VPSHUFB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 00 /r ] AVX2,FUTURE */ + /* 261(002 005) 001(00) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSHUFB, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64098, 467, 4170}, + /* 4267 : VPSHUFD ymmreg,ymmrm256,imm8 [rmi: vex.256.66.0f 70 /r ib ] AVX2,FUTURE */ + /* 270(001 005) 001(70) 110 022 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSHUFD, 3, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54307, 467, 4171}, + /* 4268 : VPSHUFHW ymmreg,ymmrm256,imm8 [rmi: vex.256.f3.0f 70 /r ib ] AVX2,FUTURE */ + /* 270(001 006) 001(70) 110 022 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSHUFHW, 3, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54315, 467, 4172}, + /* 4269 : VPSHUFLW ymmreg,ymmrm256,imm8 [rmi: vex.256.f2.0f 70 /r ib ] AVX2,FUTURE */ + /* 270(001 007) 001(70) 110 022 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSHUFLW, 3, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54323, 467, 4173}, + /* 4270 : VPSIGNB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 08 /r ] AVX2,FUTURE */ + /* 261(002 005) 001(08) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSIGNB, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64112, 467, 4174}, + /* 4271 : VPSIGNW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 09 /r ] AVX2,FUTURE */ + /* 261(002 005) 001(09) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSIGNW, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64126, 467, 4175}, + /* 4272 : VPSIGND ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 0a /r ] AVX2,FUTURE */ + /* 261(002 005) 001(0a) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSIGND, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64140, 467, 4176}, + /* 4273 : VPSLLDQ ymmreg,ymmreg*,imm8 [vmi: vex.ndd.256.66.0f 73 /7 ib ] AVX2,FUTURE */ + /* 260(001 005) 001(73) 217 022 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSLLDQ, 3, {YMMREG|RN_L16,YMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54331, 467, 4177}, + /* 4274 : VPSLLW ymmreg,ymmreg*,xmmrm128 [rvm: vex.nds.256.66.0f f1 /r ] AVX2,FUTURE */ + /* 261(001 005) 001(f1) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSLLW, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64154, 467, 4178}, + /* 4275 : VPSLLW ymmreg,ymmreg*,imm8 [vmi: vex.ndd.256.66.0f 71 /6 ib ] AVX2,FUTURE */ + /* 260(001 005) 001(71) 216 022 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSLLW, 3, {YMMREG|RN_L16,YMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54347, 467, 4179}, + /* 4276 : VPSLLD ymmreg,ymmreg*,xmmrm128 [rvm: vex.nds.256.66.0f f2 /r ] AVX2,FUTURE */ + /* 261(001 005) 001(f2) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSLLD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64168, 467, 4180}, + /* 4277 : VPSLLD ymmreg,ymmreg*,imm8 [vmi: vex.ndd.256.66.0f 72 /6 ib ] AVX2,FUTURE */ + /* 260(001 005) 001(72) 216 022 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSLLD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54363, 467, 4181}, + /* 4278 : VPSLLQ ymmreg,ymmreg*,xmmrm128 [rvm: vex.nds.256.66.0f f3 /r ] AVX2,FUTURE */ + /* 261(001 005) 001(f3) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSLLQ, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64182, 467, 4182}, + /* 4279 : VPSLLQ ymmreg,ymmreg*,imm8 [vmi: vex.ndd.256.66.0f 73 /6 ib ] AVX2,FUTURE */ + /* 260(001 005) 001(73) 216 022 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSLLQ, 3, {YMMREG|RN_L16,YMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54379, 467, 4183}, + /* 4280 : VPSRAW ymmreg,ymmreg*,xmmrm128 [rvm: vex.nds.256.66.0f e1 /r ] AVX2,FUTURE */ + /* 261(001 005) 001(e1) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSRAW, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64196, 467, 4184}, + /* 4281 : VPSRAW ymmreg,ymmreg*,imm8 [vmi: vex.ndd.256.66.0f 71 /4 ib ] AVX2,FUTURE */ + /* 260(001 005) 001(71) 214 022 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSRAW, 3, {YMMREG|RN_L16,YMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54395, 467, 4185}, + /* 4282 : VPSRAD ymmreg,ymmreg*,xmmrm128 [rvm: vex.nds.256.66.0f e2 /r ] AVX2,FUTURE */ + /* 261(001 005) 001(e2) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSRAD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64210, 467, 4186}, + /* 4283 : VPSRAD ymmreg,ymmreg*,imm8 [vmi: vex.ndd.256.66.0f 72 /4 ib ] AVX2,FUTURE */ + /* 260(001 005) 001(72) 214 022 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSRAD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54411, 467, 4187}, + /* 4284 : VPSRLDQ ymmreg,ymmreg*,imm8 [vmi: vex.ndd.256.66.0f 73 /3 ib ] AVX2,FUTURE */ + /* 260(001 005) 001(73) 213 022 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSRLDQ, 3, {YMMREG|RN_L16,YMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54427, 467, 4188}, + /* 4285 : VPSRLW ymmreg,ymmreg*,xmmrm128 [rvm: vex.nds.256.66.0f d1 /r ] AVX2,FUTURE */ + /* 261(001 005) 001(d1) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSRLW, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64224, 467, 4189}, + /* 4286 : VPSRLW ymmreg,ymmreg*,imm8 [vmi: vex.ndd.256.66.0f 71 /2 ib ] AVX2,FUTURE */ + /* 260(001 005) 001(71) 212 022 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSRLW, 3, {YMMREG|RN_L16,YMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54443, 467, 4190}, + /* 4287 : VPSRLD ymmreg,ymmreg*,xmmrm128 [rvm: vex.nds.256.66.0f d2 /r ] AVX2,FUTURE */ + /* 261(001 005) 001(d2) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSRLD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64238, 467, 4191}, + /* 4288 : VPSRLD ymmreg,ymmreg*,imm8 [vmi: vex.ndd.256.66.0f 72 /2 ib ] AVX2,FUTURE */ + /* 260(001 005) 001(72) 212 022 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSRLD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54459, 467, 4192}, + /* 4289 : VPSRLQ ymmreg,ymmreg*,xmmrm128 [rvm: vex.nds.256.66.0f d3 /r ] AVX2,FUTURE */ + /* 261(001 005) 001(d3) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSRLQ, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64252, 467, 4193}, + /* 4290 : VPSRLQ ymmreg,ymmreg*,imm8 [vmi: vex.ndd.256.66.0f.wig 73 /2 ib ] AVX2,FUTURE */ + /* 260(001 005) 001(73) 212 022 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSRLQ, 3, {YMMREG|RN_L16,YMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54475, 467, 4194}, + /* 4291 : VPSUBB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f f8 /r ] AVX2,FUTURE */ + /* 261(001 005) 001(f8) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSUBB, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64266, 467, 4195}, + /* 4292 : VPSUBW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f f9 /r ] AVX2,FUTURE */ + /* 261(001 005) 001(f9) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSUBW, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64280, 467, 4196}, + /* 4293 : VPSUBD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f fa /r ] AVX2,FUTURE */ + /* 261(001 005) 001(fa) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSUBD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64294, 467, 4197}, + /* 4294 : VPSUBQ ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f fb /r ] AVX2,FUTURE */ + /* 261(001 005) 001(fb) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSUBQ, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64308, 467, 4198}, + /* 4295 : VPSUBSB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f e8 /r ] AVX2,FUTURE */ + /* 261(001 005) 001(e8) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSUBSB, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64322, 467, 4199}, + /* 4296 : VPSUBSW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f e9 /r ] AVX2,FUTURE */ + /* 261(001 005) 001(e9) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSUBSW, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64336, 467, 4200}, + /* 4297 : VPSUBUSB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f d8 /r ] AVX2,FUTURE */ + /* 261(001 005) 001(d8) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSUBUSB, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64350, 467, 4201}, + /* 4298 : VPSUBUSW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f d9 /r ] AVX2,FUTURE */ + /* 261(001 005) 001(d9) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPSUBUSW, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64364, 467, 4202}, + /* 4299 : VPUNPCKHBW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 68 /r ] AVX2,FUTURE */ + /* 261(001 005) 001(68) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPUNPCKHBW, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64378, 467, 4203}, + /* 4300 : VPUNPCKHWD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 69 /r ] AVX2,FUTURE */ + /* 261(001 005) 001(69) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPUNPCKHWD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64392, 467, 4204}, + /* 4301 : VPUNPCKHDQ ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 6a /r ] AVX2,FUTURE */ + /* 261(001 005) 001(6a) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPUNPCKHDQ, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64406, 467, 4205}, + /* 4302 : VPUNPCKHQDQ ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 6d /r ] AVX2,FUTURE */ + /* 261(001 005) 001(6d) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPUNPCKHQDQ, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64420, 467, 4206}, + /* 4303 : VPUNPCKLBW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 60 /r ] AVX2,FUTURE */ + /* 261(001 005) 001(60) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPUNPCKLBW, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64434, 467, 4207}, + /* 4304 : VPUNPCKLWD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 61 /r ] AVX2,FUTURE */ + /* 261(001 005) 001(61) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPUNPCKLWD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64448, 467, 4208}, + /* 4305 : VPUNPCKLDQ ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 62 /r ] AVX2,FUTURE */ + /* 261(001 005) 001(62) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPUNPCKLDQ, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64462, 467, 4209}, + /* 4306 : VPUNPCKLQDQ ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 6c /r ] AVX2,FUTURE */ + /* 261(001 005) 001(6c) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPUNPCKLQDQ, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64476, 467, 4210}, + /* 4307 : VPXOR ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f ef /r ] AVX2,FUTURE */ + /* 261(001 005) 001(ef) 120 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VPXOR, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64490, 467, 4211}, + /* 4308 : VMOVNTDQA ymmreg,mem256 [rm: vex.256.66.0f38 2a /r ] AVX2,FUTURE */ + /* 270(002 005) 001(2a) 110 : NOAPX,WIG,VEX,AVX2,FUTURE */ + {I_VMOVNTDQA, 2, {YMMREG|RN_L16,MEMORY|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64504, 467, 4212}, + /* 4309 : VBROADCASTSS xmmreg,xmmreg [rm: vex.128.66.0f38.w0 18 /r ] AVX2,FUTURE */ + /* 270(002 001) 001(18) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VBROADCASTSS, 2, {XMMREG|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58764, 468, 4213}, + /* 4310 : VBROADCASTSS ymmreg,xmmreg [rm: vex.256.66.0f38.w0 18 /r ] AVX2,FUTURE */ + /* 270(002 005) 001(18) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VBROADCASTSS, 2, {YMMREG|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58771, 468, 4214}, + /* 4311 : VBROADCASTSD ymmreg,xmmreg [rm: vex.256.66.0f38.w0 19 /r ] AVX2,FUTURE */ + /* 270(002 005) 001(19) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VBROADCASTSD, 2, {YMMREG|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+58778, 468, 4215}, + /* 4312 : VBROADCASTI128 ymmreg,mem128 [rm: vex.256.66.0f38.w0 5a /r ] AVX2,FUTURE */ + /* 270(002 005) 001(5a) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VBROADCASTI128, 2, {YMMREG|RN_L16,MEMORY|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64511, 468, 4216}, + /* 4313 : VPBLENDD xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: vex.nds.128.66.0f3a.w0 02 /r ib ] AVX2,FUTURE */ + /* 261(003 001) 001(02) 120 023 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPBLENDD, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+54491, 468, 4217}, + /* 4314 : VPBLENDD ymmreg,ymmreg*,ymmrm256,imm8 [rvmi: vex.nds.256.66.0f3a.w0 02 /r ib ] AVX2,FUTURE */ + /* 261(003 005) 001(02) 120 023 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPBLENDD, 4, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+54507, 468, 4218}, + /* 4315 : VPBROADCASTB xmmreg,mem8 [rm: vex.128.66.0f38.w0 78 /r ] AVX2,FUTURE */ + /* 270(002 001) 001(78) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPBROADCASTB, 2, {XMMREG|RN_L16,MEMORY|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64518, 468, 4219}, + /* 4316 : VPBROADCASTB xmmreg,xmmreg [rm: vex.128.66.0f38.w0 78 /r ] AVX2,FUTURE */ + /* 270(002 001) 001(78) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPBROADCASTB, 2, {XMMREG|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64518, 468, 4220}, + /* 4317 : VPBROADCASTB ymmreg,mem8 [rm: vex.256.66.0f38.w0 78 /r ] AVX2,FUTURE */ + /* 270(002 005) 001(78) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPBROADCASTB, 2, {YMMREG|RN_L16,MEMORY|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64525, 468, 4221}, + /* 4318 : VPBROADCASTB ymmreg,xmmreg [rm: vex.256.66.0f38.w0 78 /r ] AVX2,FUTURE */ + /* 270(002 005) 001(78) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPBROADCASTB, 2, {YMMREG|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64525, 468, 4222}, + /* 4319 : VPBROADCASTW xmmreg,mem16 [rm: vex.128.66.0f38.w0 79 /r ] AVX2,FUTURE */ + /* 270(002 001) 001(79) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPBROADCASTW, 2, {XMMREG|RN_L16,MEMORY|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64532, 468, 4223}, + /* 4320 : VPBROADCASTW xmmreg,xmmreg [rm: vex.128.66.0f38.w0 79 /r ] AVX2,FUTURE */ + /* 270(002 001) 001(79) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPBROADCASTW, 2, {XMMREG|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64532, 468, 4224}, + /* 4321 : VPBROADCASTW ymmreg,mem16 [rm: vex.256.66.0f38.w0 79 /r ] AVX2,FUTURE */ + /* 270(002 005) 001(79) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPBROADCASTW, 2, {YMMREG|RN_L16,MEMORY|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64539, 468, 4225}, + /* 4322 : VPBROADCASTW ymmreg,xmmreg [rm: vex.256.66.0f38.w0 79 /r ] AVX2,FUTURE */ + /* 270(002 005) 001(79) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPBROADCASTW, 2, {YMMREG|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64539, 468, 4226}, + /* 4323 : VPBROADCASTD xmmreg,mem32 [rm: vex.128.66.0f38.w0 58 /r ] AVX2,FUTURE */ + /* 270(002 001) 001(58) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPBROADCASTD, 2, {XMMREG|RN_L16,MEMORY|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64546, 468, 4227}, + /* 4324 : VPBROADCASTD xmmreg,xmmreg [rm: vex.128.66.0f38.w0 58 /r ] AVX2,FUTURE */ + /* 270(002 001) 001(58) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPBROADCASTD, 2, {XMMREG|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64546, 468, 4228}, + /* 4325 : VPBROADCASTD ymmreg,mem32 [rm: vex.256.66.0f38.w0 58 /r ] AVX2,FUTURE */ + /* 270(002 005) 001(58) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPBROADCASTD, 2, {YMMREG|RN_L16,MEMORY|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64553, 468, 4229}, + /* 4326 : VPBROADCASTD ymmreg,xmmreg [rm: vex.256.66.0f38.w0 58 /r ] AVX2,FUTURE */ + /* 270(002 005) 001(58) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPBROADCASTD, 2, {YMMREG|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64553, 468, 4230}, + /* 4327 : VPBROADCASTQ xmmreg,mem64 [rm: vex.128.66.0f38.w0 59 /r ] AVX2,FUTURE */ + /* 270(002 001) 001(59) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPBROADCASTQ, 2, {XMMREG|RN_L16,MEMORY|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64560, 468, 4231}, + /* 4328 : VPBROADCASTQ xmmreg,xmmreg [rm: vex.128.66.0f38.w0 59 /r ] AVX2,FUTURE */ + /* 270(002 001) 001(59) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPBROADCASTQ, 2, {XMMREG|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64560, 468, 4232}, + /* 4329 : VPBROADCASTQ ymmreg,mem64 [rm: vex.256.66.0f38.w0 59 /r ] AVX2,FUTURE */ + /* 270(002 005) 001(59) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPBROADCASTQ, 2, {YMMREG|RN_L16,MEMORY|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64567, 468, 4233}, + /* 4330 : VPBROADCASTQ ymmreg,xmmreg [rm: vex.256.66.0f38.w0 59 /r ] AVX2,FUTURE */ + /* 270(002 005) 001(59) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPBROADCASTQ, 2, {YMMREG|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64567, 468, 4234}, + /* 4331 : VPERMD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38.w0 36 /r ] AVX2,FUTURE */ + /* 261(002 005) 001(36) 120 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPERMD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64574, 468, 4236}, + /* 4332 : VPERMPD ymmreg,ymmrm256,imm8 [rmi: vex.256.66.0f3a.w1 01 /r ib ] AVX2,FUTURE */ + /* 270(003 205) 001(01) 110 022 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPERMPD, 3, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54523, 468, 4237}, + /* 4333 : VPERMPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38.w0 16 /r ] AVX2,FUTURE */ + /* 261(002 005) 001(16) 120 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPERMPS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64588, 468, 4238}, + /* 4334 : VPERMQ ymmreg,ymmrm256,imm8 [rmi: vex.256.66.0f3a.w1 00 /r ib ] AVX2,FUTURE */ + /* 270(003 205) 001(00) 110 022 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPERMQ, 3, {YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54531, 468, 4239}, + /* 4335 : VPERM2I128 ymmreg,ymmreg*,ymmrm256,imm8 [rvmi: vex.nds.256.66.0f3a.w0 46 /r ib ] AVX2,FUTURE */ + /* 261(003 005) 001(46) 120 023 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPERM2I128, 4, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+54539, 468, 4240}, + /* 4336 : VEXTRACTI128 xmmrm128,ymmreg,imm8 [mri: vex.256.66.0f3a.w0 39 /r ib ] AVX2,FUTURE */ + /* 270(003 005) 001(39) 101 022 : NOAPX,VEX,AVX2,FUTURE */ + {I_VEXTRACTI128, 3, {RM_XMM|BITS128|RN_L16,YMMREG|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54555, 468, 4241}, + /* 4337 : VINSERTI128 ymmreg,ymmreg*,xmmrm128,imm8 [rvmi: vex.nds.256.66.0f3a.w0 38 /r ib ] AVX2,FUTURE */ + /* 261(003 005) 001(38) 120 023 : NOAPX,VEX,AVX2,FUTURE */ + {I_VINSERTI128, 4, {YMMREG|RN_L16,YMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+54563, 468, 4243}, + /* 4338 : VPMASKMOVD xmmreg,xmmreg*,mem128 [rvm: vex.nds.128.66.0f38.w0 8c /r ] AVX2,FUTURE */ + /* 261(002 001) 001(8c) 120 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPMASKMOVD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,MEMORY|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64602, 468, 4244}, + /* 4339 : VPMASKMOVD ymmreg,ymmreg*,mem256 [rvm: vex.nds.256.66.0f38.w0 8c /r ] AVX2,FUTURE */ + /* 261(002 005) 001(8c) 120 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPMASKMOVD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,MEMORY|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64616, 468, 4245}, + /* 4340 : VPMASKMOVQ xmmreg,xmmreg*,mem128 [rvm: vex.nds.128.66.0f38.w1 8c /r ] AVX2,FUTURE */ + /* 261(002 201) 001(8c) 120 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPMASKMOVQ, 3, {XMMREG|RN_L16,XMMREG|RN_L16,MEMORY|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64630, 468, 4246}, + /* 4341 : VPMASKMOVQ ymmreg,ymmreg*,mem256 [rvm: vex.nds.256.66.0f38.w1 8c /r ] AVX2,FUTURE */ + /* 261(002 205) 001(8c) 120 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPMASKMOVQ, 3, {YMMREG|RN_L16,YMMREG|RN_L16,MEMORY|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64644, 468, 4247}, + /* 4342 : VPMASKMOVD mem128,xmmreg,xmmreg [mvr: vex.nds.128.66.0f38.w0 8e /r ] AVX2,FUTURE */ + /* 261(002 001) 001(8e) 102 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPMASKMOVD, 3, {MEMORY|BITS128|RN_L16,XMMREG|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64658, 468, 4249}, + /* 4343 : VPMASKMOVD mem256,ymmreg,ymmreg [mvr: vex.nds.256.66.0f38.w0 8e /r ] AVX2,FUTURE */ + /* 261(002 005) 001(8e) 102 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPMASKMOVD, 3, {MEMORY|BITS256|RN_L16,YMMREG|RN_L16,YMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64665, 468, 4250}, + /* 4344 : VPMASKMOVQ mem128,xmmreg,xmmreg [mvr: vex.nds.128.66.0f38.w1 8e /r ] AVX2,FUTURE */ + /* 261(002 201) 001(8e) 102 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPMASKMOVQ, 3, {MEMORY|BITS128|RN_L16,XMMREG|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64672, 468, 4251}, + /* 4345 : VPMASKMOVQ mem256,ymmreg,ymmreg [mvr: vex.nds.256.66.0f38.w1 8e /r ] AVX2,FUTURE */ + /* 261(002 205) 001(8e) 102 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPMASKMOVQ, 3, {MEMORY|BITS256|RN_L16,YMMREG|RN_L16,YMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64679, 468, 4252}, + /* 4346 : VPSLLVD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38.w0 47 /r ] AVX2,FUTURE */ + /* 261(002 001) 001(47) 120 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPSLLVD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64686, 468, 4254}, + /* 4347 : VPSLLVQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38.w1 47 /r ] AVX2,FUTURE */ + /* 261(002 201) 001(47) 120 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPSLLVQ, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64700, 468, 4255}, + /* 4348 : VPSLLVD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38.w0 47 /r ] AVX2,FUTURE */ + /* 261(002 005) 001(47) 120 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPSLLVD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64714, 468, 4256}, + /* 4349 : VPSLLVQ ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38.w1 47 /r ] AVX2,FUTURE */ + /* 261(002 205) 001(47) 120 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPSLLVQ, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64728, 468, 4257}, + /* 4350 : VPSRAVD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38.w0 46 /r ] AVX2,FUTURE */ + /* 261(002 001) 001(46) 120 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPSRAVD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64742, 468, 4259}, + /* 4351 : VPSRAVD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38.w0 46 /r ] AVX2,FUTURE */ + /* 261(002 005) 001(46) 120 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPSRAVD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64756, 468, 4260}, + /* 4352 : VPSRLVD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38.w0 45 /r ] AVX2,FUTURE */ + /* 261(002 001) 001(45) 120 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPSRLVD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64770, 468, 4262}, + /* 4353 : VPSRLVQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38.w1 45 /r ] AVX2,FUTURE */ + /* 261(002 201) 001(45) 120 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPSRLVQ, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64784, 468, 4263}, + /* 4354 : VPSRLVD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38.w0 45 /r ] AVX2,FUTURE */ + /* 261(002 005) 001(45) 120 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPSRLVD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64798, 468, 4264}, + /* 4355 : VPSRLVQ ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38.w1 45 /r ] AVX2,FUTURE */ + /* 261(002 205) 001(45) 120 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPSRLVQ, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64812, 468, 4265}, + /* 4356 : VGATHERDPD xmmreg,xmem64,xmmreg [rmv: vm32x vex.dds.128.66.0f38.w1 92 /r] AVX2,FUTURE */ + /* 374 262(002 201) 001(92) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VGATHERDPD, 3, {XMMREG|RN_L16,XMEM|BITS64|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+54579, 468, 4267}, + /* 4357 : VGATHERQPD xmmreg,xmem64,xmmreg [rmv: vm64x vex.dds.128.66.0f38.w1 93 /r] AVX2,FUTURE */ + /* 374 262(002 201) 001(93) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VGATHERQPD, 3, {XMMREG|RN_L16,XMEM|BITS64|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+54587, 468, 4268}, + /* 4358 : VGATHERDPD ymmreg,xmem64,ymmreg [rmv: vm32x vex.dds.256.66.0f38.w1 92 /r] AVX2,FUTURE */ + /* 374 262(002 205) 001(92) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VGATHERDPD, 3, {YMMREG|RN_L16,XMEM|BITS64|RN_L16,YMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+54595, 468, 4269}, + /* 4359 : VGATHERQPD ymmreg,ymem64,ymmreg [rmv: vm64y vex.dds.256.66.0f38.w1 93 /r] AVX2,FUTURE */ + /* 375 262(002 205) 001(93) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VGATHERQPD, 3, {YMMREG|RN_L16,YMEM|BITS64|RN_L16,YMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+54603, 468, 4270}, + /* 4360 : VGATHERDPS xmmreg,xmem32,xmmreg [rmv: vm32x vex.dds.128.66.0f38.w0 92 /r] AVX2,FUTURE */ + /* 374 262(002 001) 001(92) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VGATHERDPS, 3, {XMMREG|RN_L16,XMEM|BITS32|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+54611, 468, 4272}, + /* 4361 : VGATHERQPS xmmreg,xmem32,xmmreg [rmv: vm64x vex.dds.128.66.0f38.w0 93 /r] AVX2,FUTURE */ + /* 374 262(002 001) 001(93) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VGATHERQPS, 3, {XMMREG|RN_L16,XMEM|BITS32|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+54619, 468, 4273}, + /* 4362 : VGATHERDPS ymmreg,ymem32,ymmreg [rmv: vm32y vex.dds.256.66.0f38.w0 92 /r] AVX2,FUTURE */ + /* 375 262(002 005) 001(92) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VGATHERDPS, 3, {YMMREG|RN_L16,YMEM|BITS32|RN_L16,YMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+54627, 468, 4274}, + /* 4363 : VGATHERQPS xmmreg,ymem32,xmmreg [rmv: vm64y vex.dds.256.66.0f38.w0 93 /r] AVX2,FUTURE */ + /* 375 262(002 005) 001(93) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VGATHERQPS, 3, {XMMREG|RN_L16,YMEM|BITS32|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+54635, 468, 4275}, + /* 4364 : VPGATHERDD xmmreg,xmem32,xmmreg [rmv: vm32x vex.dds.128.66.0f38.w0 90 /r] AVX2,FUTURE */ + /* 374 262(002 001) 001(90) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPGATHERDD, 3, {XMMREG|RN_L16,XMEM|BITS32|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+54643, 468, 4277}, + /* 4365 : VPGATHERQD xmmreg,xmem32,xmmreg [rmv: vm64x vex.dds.128.66.0f38.w0 91 /r] AVX2,FUTURE */ + /* 374 262(002 001) 001(91) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPGATHERQD, 3, {XMMREG|RN_L16,XMEM|BITS32|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+54651, 468, 4278}, + /* 4366 : VPGATHERDD ymmreg,ymem32,ymmreg [rmv: vm32y vex.dds.256.66.0f38.w0 90 /r] AVX2,FUTURE */ + /* 375 262(002 005) 001(90) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPGATHERDD, 3, {YMMREG|RN_L16,YMEM|BITS32|RN_L16,YMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+54659, 468, 4279}, + /* 4367 : VPGATHERQD xmmreg,ymem32,xmmreg [rmv: vm64y vex.dds.256.66.0f38.w0 91 /r] AVX2,FUTURE */ + /* 375 262(002 005) 001(91) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPGATHERQD, 3, {XMMREG|RN_L16,YMEM|BITS32|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+54667, 468, 4280}, + /* 4368 : VPGATHERDQ xmmreg,xmem64,xmmreg [rmv: vm32x vex.dds.128.66.0f38.w1 90 /r] AVX2,FUTURE */ + /* 374 262(002 201) 001(90) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPGATHERDQ, 3, {XMMREG|RN_L16,XMEM|BITS64|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+54675, 468, 4282}, + /* 4369 : VPGATHERQQ xmmreg,xmem64,xmmreg [rmv: vm64x vex.dds.128.66.0f38.w1 91 /r] AVX2,FUTURE */ + /* 374 262(002 201) 001(91) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPGATHERQQ, 3, {XMMREG|RN_L16,XMEM|BITS64|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+54683, 468, 4283}, + /* 4370 : VPGATHERDQ ymmreg,xmem64,ymmreg [rmv: vm32x vex.dds.256.66.0f38.w1 90 /r] AVX2,FUTURE */ + /* 374 262(002 205) 001(90) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPGATHERDQ, 3, {YMMREG|RN_L16,XMEM|BITS64|RN_L16,YMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+54691, 468, 4284}, + /* 4371 : VPGATHERQQ ymmreg,ymem64,ymmreg [rmv: vm64y vex.dds.256.66.0f38.w1 91 /r] AVX2,FUTURE */ + /* 375 262(002 205) 001(91) 110 : NOAPX,VEX,AVX2,FUTURE */ + {I_VPGATHERQQ, 3, {YMMREG|RN_L16,YMEM|BITS64|RN_L16,YMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+54699, 468, 4285}, + /* 4372 : XABORT imm8 [i: c6 f8 ib ] RTM,FUTURE */ + /* 002(c6 f8) 020 : RTM,FUTURE */ + {I_XABORT, 1, {IMM_NORMAL|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72519, 469, 4288}, + /* 4373 : XBEGIN imm16|near [i: nw o16 c7 f8 rel ] AR0,OSIZE,NOREX,NOAPX,NOLONG,RTM,FUTURE */ + /* 327 320 002(c7 f8) 064 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,RTM,FUTURE */ + {I_XBEGIN, 1, {IMM_NORMAL|BITS16|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+64826, 470, 4289}, + /* 4374 : XBEGIN imm32|near [i: nw o32 c7 f8 rel ] AR0,OSIZE,NOREX,NOAPX,NOLONG,RTM,FUTURE */ + /* 327 321 002(c7 f8) 064 : AR0,NWSIZE,OSIZE,NOREX,NOAPX,NOLONG,RTM,FUTURE */ + {I_XBEGIN, 1, {IMM_NORMAL|BITS32|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+64833, 470, 4290}, + /* 4375 : XBEGIN imm64|near [i: nw o64 c7 f8 rel ] AR0,OSIZE,LONG,PROT,RTM,X86_64 */ + /* 327 324 002(c7 f8) 064 : AR0,NWSIZE,OSIZE,LONG,PROT,RTM,X86_64 */ + {I_XBEGIN, 1, {IMM_NORMAL|BITS64|NEAR,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+64840, 471, 4291}, + /* 4376 : XEND void [ 0f 01 d5 ] RTM,FUTURE */ + /* 355 002(01 d5) : RTM,FUTURE */ + {I_XEND, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72524, 469, 4293}, + /* 4377 : XTEST void [ 0f 01 d6 ] HLE,FL,RTM,FUTURE */ + /* 355 002(01 d6) : HLE,FL,RTM,FUTURE */ + {I_XTEST, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72529, 473, 4294}, + /* 4378 : PREFETCHWT1 mem8 [m: 0f 0d /2 ] PREFETCHWT1,FUTURE */ + /* 355 001(0d) 202 : PREFETCHWT1,FUTURE */ + {I_PREFETCHWT1, 1, {MEMORY|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+72534, 474, 4296}, + /* 4379 : BNDMK bndreg,mem [rm: f3 0f 1b /r ] MIB,MPX,FUTURE */ + /* 333 355 001(1b) 110 : MIB,MPX,FUTURE */ + {I_BNDMK, 2, {BNDREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+70023, 475, 4299}, + /* 4380 : BNDCL bndreg,mem [rm: f3 0f 1a /r ] MPX,FUTURE */ + /* 333 355 001(1a) 110 : MPX,FUTURE */ + {I_BNDCL, 2, {BNDREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+64848, 476, 4300}, + /* 4381 : BNDCL bndreg,reg32 [rm: f3 0f 1a /r ] NOREX,NOAPX,NOLONG,MPX,FUTURE */ + /* 333 355 001(1a) 110 : NOREX,NOAPX,NOLONG,MPX,FUTURE */ + {I_BNDCL, 2, {BNDREG|RN_L16,REG_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64848, 477, 4301}, + /* 4382 : BNDCL bndreg,reg64 [rm: o64nw f3 0f 1a /r ] LONG,PROT,MPX,X86_64 */ + /* 323 333 355 001(1a) 110 : NWSIZE,LONG,PROT,MPX,X86_64 */ + {I_BNDCL, 2, {BNDREG,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+64847, 478, 4302}, + /* 4383 : BNDCU bndreg,mem [rm: f2 0f 1a /r ] MPX,FUTURE */ + /* 332 355 001(1a) 110 : MPX,FUTURE */ + {I_BNDCU, 2, {BNDREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+64855, 476, 4303}, + /* 4384 : BNDCU bndreg,reg32 [rm: f2 0f 1a /r ] NOREX,NOAPX,NOLONG,MPX,FUTURE */ + /* 332 355 001(1a) 110 : NOREX,NOAPX,NOLONG,MPX,FUTURE */ + {I_BNDCU, 2, {BNDREG|RN_L16,REG_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64855, 477, 4304}, + /* 4385 : BNDCU bndreg,reg64 [rm: o64nw f2 0f 1a /r ] LONG,PROT,MPX,X86_64 */ + /* 323 332 355 001(1a) 110 : NWSIZE,LONG,PROT,MPX,X86_64 */ + {I_BNDCU, 2, {BNDREG,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+64854, 478, 4305}, + /* 4386 : BNDCN bndreg,mem [rm: f2 0f 1b /r ] MPX,FUTURE */ + /* 332 355 001(1b) 110 : MPX,FUTURE */ + {I_BNDCN, 2, {BNDREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+64862, 476, 4306}, + /* 4387 : BNDCN bndreg,reg32 [rm: f2 0f 1b /r ] NOREX,NOAPX,NOLONG,MPX,FUTURE */ + /* 332 355 001(1b) 110 : NOREX,NOAPX,NOLONG,MPX,FUTURE */ + {I_BNDCN, 2, {BNDREG|RN_L16,REG_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64862, 477, 4307}, + /* 4388 : BNDCN bndreg,reg64 [rm: o64nw f2 0f 1b /r ] LONG,PROT,MPX,X86_64 */ + /* 323 332 355 001(1b) 110 : NWSIZE,LONG,PROT,MPX,X86_64 */ + {I_BNDCN, 2, {BNDREG,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+64861, 478, 4308}, + /* 4389 : BNDMOV bndreg,bndreg [rm: 66 0f 1a /r ] MPX,FUTURE */ + /* 361 355 001(1a) 110 : MPX,FUTURE */ + {I_BNDMOV, 2, {BNDREG,BNDREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+70029, 476, 4309}, + /* 4390 : BNDMOV bndreg,mem [rm: 66 0f 1a /r ] MPX,FUTURE */ + /* 361 355 001(1a) 110 : MPX,FUTURE */ + {I_BNDMOV, 2, {BNDREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+70029, 476, 4310}, + /* 4391 : BNDMOV bndreg,bndreg [mr: 66 0f 1b /r ] MPX,FUTURE */ + /* 361 355 001(1b) 101 : MPX,FUTURE */ + {I_BNDMOV, 2, {BNDREG,BNDREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+70035, 476, 4311}, + /* 4392 : BNDMOV mem,bndreg [mr: 66 0f 1b /r ] MPX,FUTURE */ + /* 361 355 001(1b) 101 : MPX,FUTURE */ + {I_BNDMOV, 2, {MEMORY,BNDREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+70035, 476, 4312}, + /* 4393 : BNDLDX bndreg,mem [rm: 0f 1a /r ] MIB,MPX,FUTURE */ + /* 355 001(1a) 110 : MIB,MPX,FUTURE */ + {I_BNDLDX, 2, {BNDREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+70030, 475, 4313}, + /* 4394 : BNDLDX bndreg,mem,reg32 [rmx: 0f 1a /r ] NOREX,NOAPX,NOLONG,MIB,MPX,FUTURE */ + /* 355 001(1a) 016 110 : NOREX,NOAPX,NOLONG,MIB,MPX,FUTURE */ + {I_BNDLDX, 3, {BNDREG|RN_L16,MEMORY|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+70041, 479, 4314}, + /* 4395 : BNDLDX bndreg,mem,reg64 [rmx: 0f 1a /r ] LONG,MIB,PROT,MPX,X86_64 */ + /* 355 001(1a) 016 110 : LONG,MIB,PROT,MPX,X86_64 */ + {I_BNDLDX, 3, {BNDREG,MEMORY,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+70041, 480, 4315}, + /* 4396 : BNDSTX mem,bndreg [mr: 0f 1b /r ] MIB,MPX,FUTURE */ + /* 355 001(1b) 101 : MIB,MPX,FUTURE */ + {I_BNDSTX, 2, {MEMORY,BNDREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+70036, 475, 4316}, + /* 4397 : BNDSTX mem,reg32,bndreg [mxr: 0f 1b /r ] NOREX,NOAPX,NOLONG,MIB,MPX,FUTURE */ + /* 355 001(1b) 015 102 : NOREX,NOAPX,NOLONG,MIB,MPX,FUTURE */ + {I_BNDSTX, 3, {MEMORY|RN_L16,REG_GPR|BITS32|RN_L16,BNDREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+70047, 479, 4317}, + /* 4398 : BNDSTX mem,reg64,bndreg [mxr: 0f 1b /r ] LONG,MIB,PROT,MPX,X86_64 */ + /* 355 001(1b) 015 102 : LONG,MIB,PROT,MPX,X86_64 */ + {I_BNDSTX, 3, {MEMORY,REG_GPR|BITS64,BNDREG,0,0}, NO_DECORATOR, nasm_bytecodes+70047, 480, 4318}, + /* 4399 : BNDSTX mem,bndreg,reg32 [mrx: 0f 1b /r ] NOREX,NOAPX,NOLONG,MIB,MPX,FUTURE */ + /* 355 001(1b) 016 101 : NOREX,NOAPX,NOLONG,MIB,MPX,FUTURE */ + {I_BNDSTX, 3, {MEMORY|RN_L16,BNDREG|RN_L16,REG_GPR|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+70053, 479, 4319}, + /* 4400 : BNDSTX mem,bndreg,reg64 [mrx: 0f 1b /r ] LONG,MIB,PROT,MPX,X86_64 */ + /* 355 001(1b) 016 101 : LONG,MIB,PROT,MPX,X86_64 */ + {I_BNDSTX, 3, {MEMORY,BNDREG,REG_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+70053, 480, 4320}, + /* 4401 : SHA1MSG1 xmmreg,xmmrm128 [rm: 0f38 c9 /r ] SHA,FUTURE */ + /* 356 001(c9) 110 : NOAPX,SHA,FUTURE */ + {I_SHA1MSG1, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+72539, 481, 4323}, + /* 4402 : SHA1MSG2 xmmreg,xmmrm128 [rm: 0f38 ca /r ] SHA,FUTURE */ + /* 356 001(ca) 110 : NOAPX,SHA,FUTURE */ + {I_SHA1MSG2, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+72544, 481, 4324}, + /* 4403 : SHA1NEXTE xmmreg,xmmrm128 [rm: 0f38 c8 /r ] SHA,FUTURE */ + /* 356 001(c8) 110 : NOAPX,SHA,FUTURE */ + {I_SHA1NEXTE, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+72549, 481, 4325}, + /* 4404 : SHA1RNDS4 xmmreg,xmmrm128,imm8 [rmi: 0f3a cc /r ib ] SHA,FUTURE */ + /* 357 001(cc) 110 022 : NOAPX,SHA,FUTURE */ + {I_SHA1RNDS4, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+70059, 481, 4326}, + /* 4405 : SHA256MSG1 xmmreg,xmmrm128 [rm: 0f38 cc /r ] SHA,FUTURE */ + /* 356 001(cc) 110 : NOAPX,SHA,FUTURE */ + {I_SHA256MSG1, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+72554, 481, 4327}, + /* 4406 : SHA256MSG2 xmmreg,xmmrm128 [rm: 0f38 cd /r ] SHA,FUTURE */ + /* 356 001(cd) 110 : NOAPX,SHA,FUTURE */ + {I_SHA256MSG2, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+72559, 481, 4328}, + /* 4407 : SHA256RNDS2 xmmreg,xmmrm128,xmm0 [rm-: 0f38 cb /r ] SHA,FUTURE */ + /* 356 001(cb) 110 : NOAPX,SHA,FUTURE */ + {I_SHA256RNDS2, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,XMMREG|RN_ZERO|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+72564, 481, 4329}, + /* 4408 : SHA256RNDS2 xmmreg,xmmrm128 [rm: 0f38 cb /r ] SHA,FUTURE */ + /* 356 001(cb) 110 : NOAPX,SHA,FUTURE */ + {I_SHA256RNDS2, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+72564, 481, 4330}, + /* 4409 : VSHA512MSG1 ymmreg,xmmreg [rm: vex.256.f2.0f38.w0 cc /r ] AVX,SHA512,FUTURE */ + /* 270(002 007) 001(cc) 110 : NOAPX,VEX,AVX,SHA512,FUTURE */ + {I_VSHA512MSG1, 2, {YMMREG|RN_L16,XMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64868, 482, 4331}, + /* 4410 : VSHA512MSG2 ymmreg,ymmreg [rm: vex.256.f2.0f38.w0 cd /r ] AVX,SHA512,FUTURE */ + /* 270(002 007) 001(cd) 110 : NOAPX,VEX,AVX,SHA512,FUTURE */ + {I_VSHA512MSG2, 2, {YMMREG|RN_L16,YMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64875, 482, 4332}, + /* 4411 : VSHA512RNDS2 ymmreg,ymmreg,xmmreg [rvm: vex.nds.256.f2.0f38.w0 cb /r ] AVX,SHA512,FUTURE */ + /* 261(002 007) 001(cb) 120 : NOAPX,VEX,AVX,SHA512,FUTURE */ + {I_VSHA512RNDS2, 3, {YMMREG|RN_L16,YMMREG|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64882, 482, 4333}, + /* 4412 : VSM3MSG1 xmmreg,xmmreg,xmmreg [rvm: vex.nds.128.p0.0f38.w0 da /r ] AVX,HSM3,FUTURE */ + /* 261(002 000) 001(da) 120 : NOAPX,VEX,AVX,HSM3,FUTURE */ + {I_VSM3MSG1, 3, {XMMREG|RN_L16,XMMREG|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64889, 483, 4336}, + /* 4413 : VSM3MSG2 xmmreg,xmmreg,xmmreg [rvm: vex.nds.128.66.0f38.w0 da /r ] AVX,HSM3,FUTURE */ + /* 261(002 001) 001(da) 120 : NOAPX,VEX,AVX,HSM3,FUTURE */ + {I_VSM3MSG2, 3, {XMMREG|RN_L16,XMMREG|RN_L16,XMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64896, 483, 4337}, + /* 4414 : VSM3RNDS2 xmmreg,xmmreg,xmmreg,imm8 [rvmi: vex.nds.128.66.0f3a.w0 de /r ib ] AVX,HSM3,FUTURE */ + /* 261(003 001) 001(de) 120 023 : NOAPX,VEX,AVX,HSM3,FUTURE */ + {I_VSM3RNDS2, 4, {XMMREG|RN_L16,XMMREG|RN_L16,XMMREG|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+54707, 483, 4338}, + /* 4415 : VSM4KEY4 xmmreg,xmmreg,xmmrm128 [rvm: vex.nds.128.f3.0f38.w0 da /r ] AVX,HSM4,FUTURE */ + /* 261(002 002) 001(da) 120 : NOAPX,VEX,AVX,HSM4,FUTURE */ + {I_VSM4KEY4, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64903, 484, 4341}, + /* 4416 : VSM4KEY4 ymmreg,ymmreg,ymmrm256 [rvm: vex.nds.256.f3.0f38.w0 da /r ] AVX,HSM4,FUTURE */ + /* 261(002 006) 001(da) 120 : NOAPX,VEX,AVX,HSM4,FUTURE */ + {I_VSM4KEY4, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64910, 484, 4342}, + /* 4417 : VSM4KEY4 xmmreg,xmmreg,xmmrm128 [rvm: evex.nds.128.f3.0f38.w0 da /r ] AVX,HSM4,FUTURE */ + /* 241(f2 7e 08) 300 001(da) 120 : EVEX,PROT,AVX,HSM4,FUTURE */ + {I_VSM4KEY4, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+29560, 485, 4343}, + /* 4418 : VSM4KEY4 ymmreg,ymmreg,ymmrm256 [rvm: evex.nds.256.f3.0f38.w0 da /r ] AVX,HSM4,FUTURE */ + /* 241(f2 7e 28) 300 001(da) 120 : EVEX,PROT,AVX,HSM4,FUTURE */ + {I_VSM4KEY4, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+29569, 485, 4344}, + /* 4419 : VSM4KEY4 zmmreg,zmmreg,zmmrm512 [rvm: evex.nds.512.f3.0f38.w0 da /r ] AVX,HSM4,FUTURE */ + /* 241(f2 7e 48) 300 001(da) 120 : EVEX,PROT,AVX,HSM4,FUTURE */ + {I_VSM4KEY4, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, NO_DECORATOR, nasm_bytecodes+29578, 485, 4345}, + /* 4420 : VSM4RNDS4 xmmreg,xmmreg,xmmrm128 [rvm: vex.nds.128.f2.0f38.w0 da /r ] AVX,HSM4,FUTURE */ + /* 261(002 003) 001(da) 120 : NOAPX,VEX,AVX,HSM4,FUTURE */ + {I_VSM4RNDS4, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64917, 484, 4346}, + /* 4421 : VSM4RNDS4 ymmreg,ymmreg,ymmrm256 [rvm: vex.nds.256.f2.0f38.w0 da /r ] AVX,HSM4,FUTURE */ + /* 261(002 007) 001(da) 120 : NOAPX,VEX,AVX,HSM4,FUTURE */ + {I_VSM4RNDS4, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+64924, 484, 4347}, + /* 4422 : VSM4RNDS4 xmmreg,xmmreg,xmmrm128 [rvm: evex.nds.128.f2.0f38.w0 da /r ] AVX,HSM4,FUTURE */ + /* 241(f2 7f 08) 300 001(da) 120 : EVEX,PROT,AVX,HSM4,FUTURE */ + {I_VSM4RNDS4, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+29587, 485, 4348}, + /* 4423 : VSM4RNDS4 ymmreg,ymmreg,ymmrm256 [rvm: evex.nds.256.f2.0f38.w0 da /r ] AVX,HSM4,FUTURE */ + /* 241(f2 7f 28) 300 001(da) 120 : EVEX,PROT,AVX,HSM4,FUTURE */ + {I_VSM4RNDS4, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+29596, 485, 4349}, + /* 4424 : VSM4RNDS4 zmmreg,zmmreg,zmmrm512 [rvm: evex.nds.512.f2.0f38.w0 da /r ] AVX,HSM4,FUTURE */ + /* 241(f2 7f 48) 300 001(da) 120 : EVEX,PROT,AVX,HSM4,FUTURE */ + {I_VSM4RNDS4, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, NO_DECORATOR, nasm_bytecodes+29605, 485, 4350}, + /* 4425 : VBCSTNEBF16PS xmmreg,mem16 [rm: vex.128.f3.0f38.w0 b1 /r ] AR0-1,SW,AVXNECONVERT,FUTURE */ + /* 270(002 002) 001(b1) 110 : AR0,AR1,SW,NOAPX,VEX,AVXNECONVERT,FUTURE */ + {I_VBCSTNEBF16PS, 2, {XMMREG|RN_L16,MEMORY|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64931, 486, 4354}, + /* 4426 : VBCSTNEBF16PS ymmreg,mem16 [rm: vex.256.f3.0f38.w0 b1 /r ] AR0-1,SW,AVXNECONVERT,FUTURE */ + /* 270(002 006) 001(b1) 110 : AR0,AR1,SW,NOAPX,VEX,AVXNECONVERT,FUTURE */ + {I_VBCSTNEBF16PS, 2, {YMMREG|RN_L16,MEMORY|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64938, 486, 4355}, + /* 4427 : VBCSTNEBF162PS xmmreg,mem16 [rm: vex.128.f3.0f38.w0 b1 /r ] AR0-1,SW,AVXNECONVERT,FUTURE */ + /* 270(002 002) 001(b1) 110 : AR0,AR1,SW,NOAPX,VEX,AVXNECONVERT,FUTURE */ + {I_VBCSTNEBF162PS, 2, {XMMREG|RN_L16,MEMORY|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64931, 486, 4356}, + /* 4428 : VBCSTNEBF162PS ymmreg,mem16 [rm: vex.256.f3.0f38.w0 b1 /r ] AR0-1,SW,AVXNECONVERT,FUTURE */ + /* 270(002 006) 001(b1) 110 : AR0,AR1,SW,NOAPX,VEX,AVXNECONVERT,FUTURE */ + {I_VBCSTNEBF162PS, 2, {YMMREG|RN_L16,MEMORY|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64938, 486, 4357}, + /* 4429 : VBCSTNESH2PS xmmreg,mem16 [rm: vex.128.66.0f38.w0 b1 /r ] AR0-1,SW,AVXNECONVERT,FUTURE */ + /* 270(002 001) 001(b1) 110 : AR0,AR1,SW,NOAPX,VEX,AVXNECONVERT,FUTURE */ + {I_VBCSTNESH2PS, 2, {XMMREG|RN_L16,MEMORY|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64945, 486, 4358}, + /* 4430 : VBCSTNESH2PS ymmreg,mem16 [rm: vex.256.66.0f38.w0 b1 /r ] AR0-1,SW,AVXNECONVERT,FUTURE */ + /* 270(002 005) 001(b1) 110 : AR0,AR1,SW,NOAPX,VEX,AVXNECONVERT,FUTURE */ + {I_VBCSTNESH2PS, 2, {YMMREG|RN_L16,MEMORY|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64952, 486, 4359}, + /* 4431 : VCVTNEEBF162PS xmmreg,mem128 [rm: vex.128.f3.0f38.w0 b0 /r ] AR0-1,SO,AVXNECONVERT,FUTURE */ + /* 270(002 002) 001(b0) 110 : AR0,AR1,SO,NOAPX,VEX,AVXNECONVERT,FUTURE */ + {I_VCVTNEEBF162PS, 2, {XMMREG|RN_L16,MEMORY|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64959, 487, 4360}, + /* 4432 : VCVTNEEBF162PS ymmreg,mem256 [rm: vex.256.f3.0f38.w0 b0 /r ] AR0-1,SY,AVXNECONVERT,FUTURE */ + /* 270(002 006) 001(b0) 110 : AR0,AR1,SY,NOAPX,VEX,AVXNECONVERT,FUTURE */ + {I_VCVTNEEBF162PS, 2, {YMMREG|RN_L16,MEMORY|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64966, 488, 4361}, + /* 4433 : VCVTNEEPH2PS xmmreg,mem128 [rm: vex.128.66.0f38.w0 b0 /r ] AR0-1,SO,AVXNECONVERT,FUTURE */ + /* 270(002 001) 001(b0) 110 : AR0,AR1,SO,NOAPX,VEX,AVXNECONVERT,FUTURE */ + {I_VCVTNEEPH2PS, 2, {XMMREG|RN_L16,MEMORY|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64973, 487, 4362}, + /* 4434 : VCVTNEEPH2PS ymmreg,mem256 [rm: vex.256.66.0f38.w0 b0 /r ] AR0-1,SY,AVXNECONVERT,FUTURE */ + /* 270(002 005) 001(b0) 110 : AR0,AR1,SY,NOAPX,VEX,AVXNECONVERT,FUTURE */ + {I_VCVTNEEPH2PS, 2, {YMMREG|RN_L16,MEMORY|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64980, 488, 4363}, + /* 4435 : VCVTNEOBF162PS xmmreg,mem128 [rm: vex.128.f2.0f38.w0 b0 /r ] AR0-1,SO,AVXNECONVERT,FUTURE */ + /* 270(002 003) 001(b0) 110 : AR0,AR1,SO,NOAPX,VEX,AVXNECONVERT,FUTURE */ + {I_VCVTNEOBF162PS, 2, {XMMREG|RN_L16,MEMORY|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64987, 487, 4364}, + /* 4436 : VCVTNEOBF162PS ymmreg,mem256 [rm: vex.256.f2.0f38.w0 b0 /r ] AR0-1,SY,AVXNECONVERT,FUTURE */ + /* 270(002 007) 001(b0) 110 : AR0,AR1,SY,NOAPX,VEX,AVXNECONVERT,FUTURE */ + {I_VCVTNEOBF162PS, 2, {YMMREG|RN_L16,MEMORY|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+64994, 488, 4365}, + /* 4437 : VCVTNEOPH2PS xmmreg,mem128 [rm: vex.128.np.0f38.w0 b0 /r ] AR0-1,SO,AVXNECONVERT,FUTURE */ + /* 270(002 000) 001(b0) 110 : AR0,AR1,SO,NOAPX,VEX,AVXNECONVERT,FUTURE */ + {I_VCVTNEOPH2PS, 2, {XMMREG|RN_L16,MEMORY|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65001, 487, 4366}, + /* 4438 : VCVTNEOPH2PS ymmreg,mem256 [rm: vex.256.np.0f38.w0 b0 /r ] AR0-1,SY,AVXNECONVERT,FUTURE */ + /* 270(002 004) 001(b0) 110 : AR0,AR1,SY,NOAPX,VEX,AVXNECONVERT,FUTURE */ + {I_VCVTNEOPH2PS, 2, {YMMREG|RN_L16,MEMORY|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65008, 488, 4367}, + /* 4439 : VCVTNEPS2BF16 xmmreg,xmmrm128 [rm: vex.128.f3.0f38.w0 72 /r ] AR0-1,SO,LATEVEX,AVXNECONVERT,FUTURE */ + /* 270(002 002) 001(72) 110 : AR0,AR1,SO,LATEVEX,NOAPX,VEX,AVXNECONVERT,FUTURE */ + {I_VCVTNEPS2BF16, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65015, 489, 4368}, + /* 4440 : VCVTNEPS2BF16 xmmreg,ymmrm256 [rm: vex.256.f3.0f38.w0 72 /r ] AR0-1,SY,LATEVEX,AVXNECONVERT,FUTURE */ + /* 270(002 006) 001(72) 110 : AR0,AR1,SY,LATEVEX,NOAPX,VEX,AVXNECONVERT,FUTURE */ + {I_VCVTNEPS2BF16, 2, {XMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65022, 490, 4369}, + /* 4441 : VPDPBUSD xmmreg,xmmreg,xmmrm128 [rvm: vex.128.66.0f38.w0 50 /r ] AR0-2,SO,LATEVEX,AVXVNNI,FUTURE */ + /* 261(002 001) 001(50) 120 : AR0,AR1,AR2,SO,LATEVEX,NOAPX,VEX,AVXVNNI,FUTURE */ + {I_VPDPBUSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65029, 491, 4373}, + /* 4442 : VPDPBUSD ymmreg,ymmreg,ymmrm256 [rvm: vex.256.66.0f38.w0 50 /r ] AR0-2,SY,LATEVEX,AVXVNNI,FUTURE */ + /* 261(002 005) 001(50) 120 : AR0,AR1,AR2,SY,LATEVEX,NOAPX,VEX,AVXVNNI,FUTURE */ + {I_VPDPBUSD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65036, 492, 4374}, + /* 4443 : VPDPBUSDS xmmreg,xmmreg,xmmrm128 [rvm: vex.128.66.0f38.w0 51 /r ] AR0-2,SO,LATEVEX,AVXVNNI,FUTURE */ + /* 261(002 001) 001(51) 120 : AR0,AR1,AR2,SO,LATEVEX,NOAPX,VEX,AVXVNNI,FUTURE */ + {I_VPDPBUSDS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65043, 491, 4375}, + /* 4444 : VPDPBUSDS ymmreg,ymmreg,ymmrm256 [rvm: vex.256.66.0f38.w0 51 /r ] AR0-2,SY,LATEVEX,AVXVNNI,FUTURE */ + /* 261(002 005) 001(51) 120 : AR0,AR1,AR2,SY,LATEVEX,NOAPX,VEX,AVXVNNI,FUTURE */ + {I_VPDPBUSDS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65050, 492, 4376}, + /* 4445 : VPDPWSSD xmmreg,xmmreg,xmmrm128 [rvm: vex.128.66.0f38.w0 52 /r ] AR0-2,SO,LATEVEX,AVXVNNI,FUTURE */ + /* 261(002 001) 001(52) 120 : AR0,AR1,AR2,SO,LATEVEX,NOAPX,VEX,AVXVNNI,FUTURE */ + {I_VPDPWSSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65057, 491, 4377}, + /* 4446 : VPDPWSSD ymmreg,ymmreg,ymmrm256 [rvm: vex.256.66.0f38.w0 52 /r ] AR0-2,SY,LATEVEX,AVXVNNI,FUTURE */ + /* 261(002 005) 001(52) 120 : AR0,AR1,AR2,SY,LATEVEX,NOAPX,VEX,AVXVNNI,FUTURE */ + {I_VPDPWSSD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65064, 492, 4378}, + /* 4447 : VPDPWSSDS xmmreg,xmmreg,xmmrm128 [rvm: vex.128.66.0f38.w0 53 /r ] AR0-2,SO,LATEVEX,AVXVNNI,FUTURE */ + /* 261(002 001) 001(53) 120 : AR0,AR1,AR2,SO,LATEVEX,NOAPX,VEX,AVXVNNI,FUTURE */ + {I_VPDPWSSDS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65071, 491, 4379}, + /* 4448 : VPDPWSSDS ymmreg,ymmreg,ymmrm256 [rvm: vex.256.66.0f38.w0 53 /r ] AR0-2,SY,LATEVEX,AVXVNNI,FUTURE */ + /* 261(002 005) 001(53) 120 : AR0,AR1,AR2,SY,LATEVEX,NOAPX,VEX,AVXVNNI,FUTURE */ + {I_VPDPWSSDS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65078, 492, 4380}, + /* 4449 : VPDPBSSD xmmreg,xmmreg,xmmrm128 [rvm: vex.128.f2.0f38.w0 50 /r ] AR0-2,SO,LATEVEX,AVX,AVXVNNIINT8,FUTURE */ + /* 261(002 003) 001(50) 120 : AR0,AR1,AR2,SO,LATEVEX,NOAPX,VEX,AVX,AVXVNNIINT8,FUTURE */ + {I_VPDPBSSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65085, 493, 4383}, + /* 4450 : VPDPBSSD ymmreg,ymmreg,ymmrm256 [rvm: vex.256.f2.0f38.w0 50 /r ] AR0-2,SY,LATEVEX,AVX,AVXVNNIINT8,FUTURE */ + /* 261(002 007) 001(50) 120 : AR0,AR1,AR2,SY,LATEVEX,NOAPX,VEX,AVX,AVXVNNIINT8,FUTURE */ + {I_VPDPBSSD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65092, 494, 4384}, + /* 4451 : VPDPBSSDS xmmreg,xmmreg,xmmrm128 [rvm: vex.128.f2.0f38.w0 51 /r ] AR0-2,SO,LATEVEX,AVX,AVXVNNIINT8,FUTURE */ + /* 261(002 003) 001(51) 120 : AR0,AR1,AR2,SO,LATEVEX,NOAPX,VEX,AVX,AVXVNNIINT8,FUTURE */ + {I_VPDPBSSDS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65099, 493, 4385}, + /* 4452 : VPDPBSSDS ymmreg,ymmreg,ymmrm256 [rvm: vex.256.f2.0f38.w0 51 /r ] AR0-2,SY,LATEVEX,AVX,AVXVNNIINT8,FUTURE */ + /* 261(002 007) 001(51) 120 : AR0,AR1,AR2,SY,LATEVEX,NOAPX,VEX,AVX,AVXVNNIINT8,FUTURE */ + {I_VPDPBSSDS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65106, 494, 4386}, + /* 4453 : VPDPBSUD xmmreg,xmmreg,xmmrm128 [rvm: vex.128.f3.0f38.w0 50 /r ] AR0-2,SO,LATEVEX,AVX,AVXVNNIINT8,FUTURE */ + /* 261(002 002) 001(50) 120 : AR0,AR1,AR2,SO,LATEVEX,NOAPX,VEX,AVX,AVXVNNIINT8,FUTURE */ + {I_VPDPBSUD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65113, 493, 4387}, + /* 4454 : VPDPBSUD ymmreg,ymmreg,ymmrm256 [rvm: vex.256.f3.0f38.w0 50 /r ] AR0-2,SY,LATEVEX,AVX,AVXVNNIINT8,FUTURE */ + /* 261(002 006) 001(50) 120 : AR0,AR1,AR2,SY,LATEVEX,NOAPX,VEX,AVX,AVXVNNIINT8,FUTURE */ + {I_VPDPBSUD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65120, 494, 4388}, + /* 4455 : VPDPBSUDS xmmreg,xmmreg,xmmrm128 [rvm: vex.128.f3.0f38.w0 51 /r ] AR0-2,SO,LATEVEX,AVX,AVXVNNIINT8,FUTURE */ + /* 261(002 002) 001(51) 120 : AR0,AR1,AR2,SO,LATEVEX,NOAPX,VEX,AVX,AVXVNNIINT8,FUTURE */ + {I_VPDPBSUDS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65127, 493, 4389}, + /* 4456 : VPDPBSUDS ymmreg,ymmreg,ymmrm256 [rvm: vex.256.f3.0f38.w0 51 /r ] AR0-2,SY,LATEVEX,AVX,AVXVNNIINT8,FUTURE */ + /* 261(002 006) 001(51) 120 : AR0,AR1,AR2,SY,LATEVEX,NOAPX,VEX,AVX,AVXVNNIINT8,FUTURE */ + {I_VPDPBSUDS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65134, 494, 4390}, + /* 4457 : VPDPBUUD xmmreg,xmmreg,xmmrm128 [rvm: vex.128.np.0f38.w0 50 /r ] AR0-2,SO,LATEVEX,AVX,AVXVNNIINT8,FUTURE */ + /* 261(002 000) 001(50) 120 : AR0,AR1,AR2,SO,LATEVEX,NOAPX,VEX,AVX,AVXVNNIINT8,FUTURE */ + {I_VPDPBUUD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65141, 493, 4391}, + /* 4458 : VPDPBUUD ymmreg,ymmreg,ymmrm256 [rvm: vex.256.np.0f38.w0 50 /r ] AR0-2,SY,LATEVEX,AVX,AVXVNNIINT8,FUTURE */ + /* 261(002 004) 001(50) 120 : AR0,AR1,AR2,SY,LATEVEX,NOAPX,VEX,AVX,AVXVNNIINT8,FUTURE */ + {I_VPDPBUUD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65148, 494, 4392}, + /* 4459 : VPDPBUUDS xmmreg,xmmreg,xmmrm128 [rvm: vex.128.np.0f38.w0 51 /r ] AR0-2,SO,LATEVEX,AVX,AVXVNNIINT8,FUTURE */ + /* 261(002 000) 001(51) 120 : AR0,AR1,AR2,SO,LATEVEX,NOAPX,VEX,AVX,AVXVNNIINT8,FUTURE */ + {I_VPDPBUUDS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65155, 493, 4393}, + /* 4460 : VPDPBUUDS ymmreg,ymmreg,ymmrm256 [rvm: vex.256.np.0f38.w0 51 /r ] AR0-2,SY,LATEVEX,AVX,AVXVNNIINT8,FUTURE */ + /* 261(002 004) 001(51) 120 : AR0,AR1,AR2,SY,LATEVEX,NOAPX,VEX,AVX,AVXVNNIINT8,FUTURE */ + {I_VPDPBUUDS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65162, 494, 4394}, + /* 4461 : VPDPWSUD xmmreg,xmmreg,xmmrm128 [rvm: vex.128.f3.0f38.w0 d2 /r ] AR0-2,SO,LATEVEX,AVX,AVXVNNIINT16,FUTURE */ + /* 261(002 002) 001(d2) 120 : AR0,AR1,AR2,SO,LATEVEX,NOAPX,VEX,AVX,AVXVNNIINT16,FUTURE */ + {I_VPDPWSUD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65169, 495, 4397}, + /* 4462 : VPDPWSUD ymmreg,ymmreg,ymmrm256 [rvm: vex.256.f3.0f38.w0 d2 /r ] AR0-2,SY,LATEVEX,AVX,AVXVNNIINT16,FUTURE */ + /* 261(002 006) 001(d2) 120 : AR0,AR1,AR2,SY,LATEVEX,NOAPX,VEX,AVX,AVXVNNIINT16,FUTURE */ + {I_VPDPWSUD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65176, 496, 4398}, + /* 4463 : VPDPWSUDS xmmreg,xmmreg,xmmrm128 [rvm: vex.128.f3.0f38.w0 d3 /r ] AR0-2,SO,LATEVEX,AVX,AVXVNNIINT16,FUTURE */ + /* 261(002 002) 001(d3) 120 : AR0,AR1,AR2,SO,LATEVEX,NOAPX,VEX,AVX,AVXVNNIINT16,FUTURE */ + {I_VPDPWSUDS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65183, 495, 4399}, + /* 4464 : VPDPWSUDS ymmreg,ymmreg,ymmrm256 [rvm: vex.256.f3.0f38.w0 d3 /r ] AR0-2,SY,LATEVEX,AVX,AVXVNNIINT16,FUTURE */ + /* 261(002 006) 001(d3) 120 : AR0,AR1,AR2,SY,LATEVEX,NOAPX,VEX,AVX,AVXVNNIINT16,FUTURE */ + {I_VPDPWSUDS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65190, 496, 4400}, + /* 4465 : VPDPWUSD xmmreg,xmmreg,xmmrm128 [rvm: vex.128.66.0f38.w0 d2 /r ] AR0-2,SO,LATEVEX,AVX,AVXVNNIINT16,FUTURE */ + /* 261(002 001) 001(d2) 120 : AR0,AR1,AR2,SO,LATEVEX,NOAPX,VEX,AVX,AVXVNNIINT16,FUTURE */ + {I_VPDPWUSD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65197, 495, 4401}, + /* 4466 : VPDPWUSD ymmreg,ymmreg,ymmrm256 [rvm: vex.256.66.0f38.w0 d2 /r ] AR0-2,SY,LATEVEX,AVX,AVXVNNIINT16,FUTURE */ + /* 261(002 005) 001(d2) 120 : AR0,AR1,AR2,SY,LATEVEX,NOAPX,VEX,AVX,AVXVNNIINT16,FUTURE */ + {I_VPDPWUSD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65204, 496, 4402}, + /* 4467 : VPDPWUSDS xmmreg,xmmreg,xmmrm128 [rvm: vex.128.66.0f38.w0 d3 /r ] AR0-2,SO,LATEVEX,AVX,AVXVNNIINT16,FUTURE */ + /* 261(002 001) 001(d3) 120 : AR0,AR1,AR2,SO,LATEVEX,NOAPX,VEX,AVX,AVXVNNIINT16,FUTURE */ + {I_VPDPWUSDS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65211, 495, 4403}, + /* 4468 : VPDPWUSDS ymmreg,ymmreg,ymmrm256 [rvm: vex.256.66.0f38.w0 d3 /r ] AR0-2,SY,LATEVEX,AVX,AVXVNNIINT16,FUTURE */ + /* 261(002 005) 001(d3) 120 : AR0,AR1,AR2,SY,LATEVEX,NOAPX,VEX,AVX,AVXVNNIINT16,FUTURE */ + {I_VPDPWUSDS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65218, 496, 4404}, + /* 4469 : VPDPWUUD xmmreg,xmmreg,xmmrm128 [rvm: vex.128.np.0f38.w0 d2 /r ] AR0-2,SO,LATEVEX,AVX,AVXVNNIINT16,FUTURE */ + /* 261(002 000) 001(d2) 120 : AR0,AR1,AR2,SO,LATEVEX,NOAPX,VEX,AVX,AVXVNNIINT16,FUTURE */ + {I_VPDPWUUD, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65225, 495, 4405}, + /* 4470 : VPDPWUUD ymmreg,ymmreg,ymmrm256 [rvm: vex.256.np.0f38.w0 d2 /r ] AR0-2,SY,LATEVEX,AVX,AVXVNNIINT16,FUTURE */ + /* 261(002 004) 001(d2) 120 : AR0,AR1,AR2,SY,LATEVEX,NOAPX,VEX,AVX,AVXVNNIINT16,FUTURE */ + {I_VPDPWUUD, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65232, 496, 4406}, + /* 4471 : VPDPWUUDS xmmreg,xmmreg,xmmrm128 [rvm: vex.128.np.0f38.w0 d3 /r ] AR0-2,SO,LATEVEX,AVX,AVXVNNIINT16,FUTURE */ + /* 261(002 000) 001(d3) 120 : AR0,AR1,AR2,SO,LATEVEX,NOAPX,VEX,AVX,AVXVNNIINT16,FUTURE */ + {I_VPDPWUUDS, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65239, 495, 4407}, + /* 4472 : VPDPWUUDS ymmreg,ymmreg,ymmrm256 [rvm: vex.256.np.0f38.w0 d3 /r ] AR0-2,SY,LATEVEX,AVX,AVXVNNIINT16,FUTURE */ + /* 261(002 004) 001(d3) 120 : AR0,AR1,AR2,SY,LATEVEX,NOAPX,VEX,AVX,AVXVNNIINT16,FUTURE */ + {I_VPDPWUUDS, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65246, 496, 4408}, + /* 4473 : VPMADD52HUQ xmmreg,xmmreg,xmmrm128 [rvm: vex.128.66.0f38.w1 b5 /r ] AR0-2,SO,LATEVEX,AVXIFMA,FUTURE */ + /* 261(002 201) 001(b5) 120 : AR0,AR1,AR2,SO,LATEVEX,NOAPX,VEX,AVXIFMA,FUTURE */ + {I_VPMADD52HUQ, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65253, 497, 4412}, + /* 4474 : VPMADD52HUQ ymmreg,ymmreg,ymmrm256 [rvm: vex.256.66.0f38.w1 b5 /r ] AR0-2,SY,LATEVEX,AVXIFMA,FUTURE */ + /* 261(002 205) 001(b5) 120 : AR0,AR1,AR2,SY,LATEVEX,NOAPX,VEX,AVXIFMA,FUTURE */ + {I_VPMADD52HUQ, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65260, 498, 4413}, + /* 4475 : VPMADD52LUQ xmmreg,xmmreg,xmmrm128 [rvm: vex.128.66.0f38.w1 b4 /r ] AR0-2,SO,LATEVEX,AVXIFMA,FUTURE */ + /* 261(002 201) 001(b4) 120 : AR0,AR1,AR2,SO,LATEVEX,NOAPX,VEX,AVXIFMA,FUTURE */ + {I_VPMADD52LUQ, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65267, 497, 4414}, + /* 4476 : VPMADD52LUQ ymmreg,ymmreg,ymmrm256 [rvm: vex.256.66.0f38.w1 b4 /r ] AR0-2,SY,LATEVEX,AVXIFMA,FUTURE */ + /* 261(002 205) 001(b4) 120 : AR0,AR1,AR2,SY,LATEVEX,NOAPX,VEX,AVXIFMA,FUTURE */ + {I_VPMADD52LUQ, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65274, 498, 4415}, + /* 4477 : KMOVB kreg8,krm8 [rm: vex.l0.0f.ko8 90 /r ] ZU,AVX512DQ,FUTURE */ + /* 270(001 001) 001(90) 110 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_KMOVB, 2, {OPMASKREG|BITS8|RN_L16,RM_OPMASK|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65281, 499, 4418}, + /* 4478 : KMOVB kreg8,krm8 [rm: evex.l0.0f.ko8 90 /r ] ZU,AVX512DQ,FUTURE,APX */ + /* 250(f1 7d 08) 300 001(90) 110 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KMOVB, 2, {OPMASKREG|BITS8,RM_OPMASK|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+29614, 500, 4418}, + /* 4479 : KMOVW kreg16,krm16 [rm: vex.l0.0f.ko16 90 /r ] ZU,AVX512F,FUTURE */ + /* 270(001 000) 001(90) 110 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_KMOVW, 2, {OPMASKREG|BITS16|RN_L16,RM_OPMASK|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65288, 501, 4419}, + /* 4480 : KMOVW kreg16,krm16 [rm: evex.l0.0f.ko16 90 /r ] ZU,AVX512F,FUTURE,APX */ + /* 250(f1 7c 08) 300 001(90) 110 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_KMOVW, 2, {OPMASKREG|BITS16,RM_OPMASK|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29623, 502, 4419}, + /* 4481 : KMOVD kreg32,krm32 [rm: vex.l0.0f.ko32 90 /r ] ZU,AVX512BW,FUTURE */ + /* 270(001 201) 001(90) 110 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KMOVD, 2, {OPMASKREG|BITS32|RN_L16,RM_OPMASK|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65295, 503, 4420}, + /* 4482 : KMOVD kreg32,krm32 [rm: evex.l0.0f.ko32 90 /r ] ZU,AVX512BW,FUTURE,APX */ + /* 250(f1 fd 08) 300 001(90) 110 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KMOVD, 2, {OPMASKREG|BITS32,RM_OPMASK|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+29632, 504, 4420}, + /* 4483 : KMOVQ kreg64,krm64 [rm: vex.l0.0f.ko64 90 /r ] ZU,AVX512BW,FUTURE */ + /* 270(001 200) 001(90) 110 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KMOVQ, 2, {OPMASKREG|BITS64|RN_L16,RM_OPMASK|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65302, 503, 4421}, + /* 4484 : KMOVQ kreg64,krm64 [rm: evex.l0.0f.ko64 90 /r ] ZU,AVX512BW,FUTURE,APX */ + /* 250(f1 fc 08) 300 001(90) 110 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KMOVQ, 2, {OPMASKREG|BITS64,RM_OPMASK|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+29641, 504, 4421}, + /* 4485 : KMOVB mem8,kreg8 [mr: vex.l0.0f.ko8 91 /r ] ZU,AVX512DQ,FUTURE */ + /* 270(001 001) 001(91) 101 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_KMOVB, 2, {MEMORY|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65309, 499, 4434}, + /* 4486 : KMOVB mem8,kreg8 [mr: evex.l0.0f.ko8 91 /r ] ZU,AVX512DQ,FUTURE,APX */ + /* 250(f1 7d 08) 300 001(91) 101 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KMOVB, 2, {MEMORY|BITS8,OPMASKREG|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+29650, 500, 4434}, + /* 4487 : KMOVW mem16,kreg16 [mr: vex.l0.0f.ko16 91 /r ] ZU,AVX512DQ,FUTURE */ + /* 270(001 000) 001(91) 101 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_KMOVW, 2, {MEMORY|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65316, 499, 4435}, + /* 4488 : KMOVW mem16,kreg16 [mr: evex.l0.0f.ko16 91 /r ] ZU,AVX512DQ,FUTURE,APX */ + /* 250(f1 7c 08) 300 001(91) 101 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KMOVW, 2, {MEMORY|BITS16,OPMASKREG|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29659, 500, 4435}, + /* 4489 : KMOVD mem32,kreg32 [mr: vex.l0.0f.ko32 91 /r ] ZU,AVX512BW,FUTURE */ + /* 270(001 201) 001(91) 101 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KMOVD, 2, {MEMORY|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65323, 503, 4436}, + /* 4490 : KMOVD mem32,kreg32 [mr: evex.l0.0f.ko32 91 /r ] ZU,AVX512BW,FUTURE,APX */ + /* 250(f1 fd 08) 300 001(91) 101 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KMOVD, 2, {MEMORY|BITS32,OPMASKREG|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+29668, 504, 4436}, + /* 4491 : KMOVQ mem64,kreg64 [mr: vex.l0.0f.ko64 91 /r ] ZU,AVX512BW,FUTURE */ + /* 270(001 200) 001(91) 101 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KMOVQ, 2, {MEMORY|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65330, 503, 4437}, + /* 4492 : KMOVQ mem64,kreg64 [mr: evex.l0.0f.ko64 91 /r ] ZU,AVX512BW,FUTURE,APX */ + /* 250(f1 fc 08) 300 001(91) 101 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KMOVQ, 2, {MEMORY|BITS64,OPMASKREG|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+29677, 504, 4437}, + /* 4493 : KMOVD kreg32,reg32 [rm: vex.l0.0f.f2.w0 92 /r ] ZU,AVX512BW,FUTURE */ + /* 270(001 003) 001(92) 110 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KMOVD, 2, {OPMASKREG|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65337, 503, 4450}, + /* 4494 : KMOVD kreg32,reg32 [rm: evex.l0.0f.f2.w0 92 /r ] ZU,AVX512BW,FUTURE,APX */ + /* 250(f1 7f 08) 300 001(92) 110 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KMOVD, 2, {OPMASKREG|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+29686, 504, 4450}, + /* 4495 : KMOVQ kreg64,reg64 [rm: vex.l0.0f.f2.w1 92 /r ] ZU,LONG,PROT,AVX512BW,X86_64 */ + /* 270(001 203) 001(92) 110 : NOAPX,ZU,LONG,VEX,PROT,AVX512BW,X86_64 */ + {I_KMOVQ, 2, {OPMASKREG|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65344, 505, 4451}, + /* 4496 : KMOVQ kreg64,reg64 [rm: evex.l0.0f.f2.w1 92 /r ] ZU,LONG,PROT,AVX512BW,X86_64,APX */ + /* 250(f1 ff 08) 300 001(92) 110 : ZU,LONG,EVEX,PROT,AVX512BW,APX,X86_64 */ + {I_KMOVQ, 2, {OPMASKREG|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+29695, 506, 4451}, + /* 4497 : KMOVD reg32,kreg32 [rm: vex.l0.0f.f2.w0 93 /r ] ZU,AVX512BW,FUTURE */ + /* 270(001 003) 001(93) 110 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KMOVD, 2, {REG_GPR|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65351, 503, 4458}, + /* 4498 : KMOVD reg32,kreg32 [rm: evex.l0.0f.f2.w0 93 /r ] ZU,AVX512BW,FUTURE,APX */ + /* 250(f1 7f 08) 300 001(93) 110 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KMOVD, 2, {REG_GPR|BITS32,OPMASKREG|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+29704, 504, 4458}, + /* 4499 : KMOVQ reg64,kreg64 [rm: vex.l0.0f.f2.w1 93 /r ] ZU,LONG,PROT,AVX512BW,X86_64 */ + /* 270(001 203) 001(93) 110 : NOAPX,ZU,LONG,VEX,PROT,AVX512BW,X86_64 */ + {I_KMOVQ, 2, {REG_GPR|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65358, 505, 4459}, + /* 4500 : KMOVQ reg64,kreg64 [rm: evex.l0.0f.f2.w1 93 /r ] ZU,LONG,PROT,AVX512BW,X86_64,APX */ + /* 250(f1 ff 08) 300 001(93) 110 : ZU,LONG,EVEX,PROT,AVX512BW,APX,X86_64 */ + {I_KMOVQ, 2, {REG_GPR|BITS64,OPMASKREG|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+29713, 506, 4459}, + /* 4501 : KMOVB kreg8,reg32 [rm: vex.l0.0f.66.w0 92 /r ] ZU,AVX512DQ,FUTURE */ + /* 270(001 001) 001(92) 110 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_KMOVB, 2, {OPMASKREG|BITS8|RN_L16,REG_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65365, 499, 4466}, + /* 4502 : KMOVB kreg8,reg32 [rm: evex.l0.0f.66.w0 92 /r ] ZU,AVX512DQ,FUTURE,APX */ + /* 250(f1 7d 08) 300 001(92) 110 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KMOVB, 2, {OPMASKREG|BITS8,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+29722, 500, 4466}, + /* 4503 : KMOVW kreg16,reg32 [rm: vex.l0.0f.np.w0 92 /r ] ZU,AVX512F,FUTURE */ + /* 270(001 000) 001(92) 110 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_KMOVW, 2, {OPMASKREG|BITS16|RN_L16,REG_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65372, 501, 4474}, + /* 4504 : KMOVW kreg16,reg32 [rm: evex.l0.0f.np.w0 92 /r ] ZU,AVX512F,FUTURE,APX */ + /* 250(f1 7c 08) 300 001(92) 110 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_KMOVW, 2, {OPMASKREG|BITS16,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+29731, 502, 4474}, + /* 4505 : KMOVB reg32,kreg8 [rm: vex.l0.0f.66.w0 93 /r ] ZU,AVX512DQ,FUTURE */ + /* 270(001 001) 001(93) 110 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_KMOVB, 2, {REG_GPR|BITS32|RN_L16,OPMASKREG|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65379, 499, 4482}, + /* 4506 : KMOVB reg32,kreg8 [rm: evex.l0.0f.66.w0 93 /r ] ZU,AVX512DQ,FUTURE,APX */ + /* 250(f1 7d 08) 300 001(93) 110 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KMOVB, 2, {REG_GPR|BITS32,OPMASKREG|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+29740, 500, 4482}, + /* 4507 : KMOVW reg32,kreg16 [rm: vex.l0.0f.np.w0 93 /r ] ZU,AVX512F,FUTURE */ + /* 270(001 000) 001(93) 110 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_KMOVW, 2, {REG_GPR|BITS32|RN_L16,OPMASKREG|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65386, 501, 4486}, + /* 4508 : KMOVW reg32,kreg16 [rm: evex.l0.0f.np.w0 93 /r ] ZU,AVX512F,FUTURE,APX */ + /* 250(f1 7c 08) 300 001(93) 110 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_KMOVW, 2, {REG_GPR|BITS32,OPMASKREG|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29749, 502, 4486}, + /* 4509 : KADDB kreg8,kreg8*,kreg8 [rvm: vex.l1.0f.ko8 4a /r ] ZU,AVX512DQ,FUTURE */ + /* 261(001 005) 001(4a) 120 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_KADDB, 3, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65393, 499, 4491}, + /* 4510 : KADDB kreg8,kreg8*,kreg8 [rvm: evex.l1.0f.ko8 4a /r ] ZU,AVX512DQ,FUTURE,APX */ + /* 241(f1 7d 28) 300 001(4a) 120 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KADDB, 3, {OPMASKREG|BITS8,OPMASKREG|BITS8,OPMASKREG|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+29758, 500, 4491}, + /* 4511 : KADDW kreg16,kreg16*,kreg16 [rvm: vex.l1.0f.ko16 4a /r ] ZU,AVX512DQ,FUTURE */ + /* 261(001 004) 001(4a) 120 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_KADDW, 3, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65407, 499, 4492}, + /* 4512 : KADDW kreg16,kreg16*,kreg16 [rvm: evex.l1.0f.ko16 4a /r ] ZU,AVX512DQ,FUTURE,APX */ + /* 241(f1 7c 28) 300 001(4a) 120 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KADDW, 3, {OPMASKREG|BITS16,OPMASKREG|BITS16,OPMASKREG|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+29776, 500, 4492}, + /* 4513 : KADDD kreg32,kreg32*,kreg32 [rvm: vex.l1.0f.ko32 4a /r ] ZU,AVX512BW,FUTURE */ + /* 261(001 205) 001(4a) 120 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KADDD, 3, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65421, 503, 4493}, + /* 4514 : KADDD kreg32,kreg32*,kreg32 [rvm: evex.l1.0f.ko32 4a /r ] ZU,AVX512BW,FUTURE,APX */ + /* 241(f1 fd 28) 300 001(4a) 120 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KADDD, 3, {OPMASKREG|BITS32,OPMASKREG|BITS32,OPMASKREG|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+29794, 504, 4493}, + /* 4515 : KADDQ kreg64,kreg64*,kreg64 [rvm: vex.l1.0f.ko64 4a /r ] ZU,AVX512BW,FUTURE */ + /* 261(001 204) 001(4a) 120 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KADDQ, 3, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65435, 503, 4494}, + /* 4516 : KADDQ kreg64,kreg64*,kreg64 [rvm: evex.l1.0f.ko64 4a /r ] ZU,AVX512BW,FUTURE,APX */ + /* 241(f1 fc 28) 300 001(4a) 120 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KADDQ, 3, {OPMASKREG|BITS64,OPMASKREG|BITS64,OPMASKREG|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+29812, 504, 4494}, + /* 4517 : KANDB kreg8,kreg8*,kreg8 [rvm: vex.l1.0f.ko8 41 /r ] ZU,AVX512DQ,FUTURE */ + /* 261(001 005) 001(41) 120 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_KANDB, 3, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65449, 499, 4507}, + /* 4518 : KANDB kreg8,kreg8*,kreg8 [rvm: evex.l1.0f.ko8 41 /r ] ZU,AVX512DQ,FUTURE,APX */ + /* 241(f1 7d 28) 300 001(41) 120 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KANDB, 3, {OPMASKREG|BITS8,OPMASKREG|BITS8,OPMASKREG|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+29830, 500, 4507}, + /* 4519 : KANDW kreg16,kreg16*,kreg16 [rvm: vex.l1.0f.ko16 41 /r ] ZU,AVX512F,FUTURE */ + /* 261(001 004) 001(41) 120 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_KANDW, 3, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65463, 501, 4508}, + /* 4520 : KANDW kreg16,kreg16*,kreg16 [rvm: evex.l1.0f.ko16 41 /r ] ZU,AVX512F,FUTURE,APX */ + /* 241(f1 7c 28) 300 001(41) 120 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_KANDW, 3, {OPMASKREG|BITS16,OPMASKREG|BITS16,OPMASKREG|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+29848, 502, 4508}, + /* 4521 : KANDD kreg32,kreg32*,kreg32 [rvm: vex.l1.0f.ko32 41 /r ] ZU,AVX512BW,FUTURE */ + /* 261(001 205) 001(41) 120 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KANDD, 3, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65477, 503, 4509}, + /* 4522 : KANDD kreg32,kreg32*,kreg32 [rvm: evex.l1.0f.ko32 41 /r ] ZU,AVX512BW,FUTURE,APX */ + /* 241(f1 fd 28) 300 001(41) 120 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KANDD, 3, {OPMASKREG|BITS32,OPMASKREG|BITS32,OPMASKREG|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+29866, 504, 4509}, + /* 4523 : KANDQ kreg64,kreg64*,kreg64 [rvm: vex.l1.0f.ko64 41 /r ] ZU,AVX512BW,FUTURE */ + /* 261(001 204) 001(41) 120 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KANDQ, 3, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65491, 503, 4510}, + /* 4524 : KANDQ kreg64,kreg64*,kreg64 [rvm: evex.l1.0f.ko64 41 /r ] ZU,AVX512BW,FUTURE,APX */ + /* 241(f1 fc 28) 300 001(41) 120 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KANDQ, 3, {OPMASKREG|BITS64,OPMASKREG|BITS64,OPMASKREG|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+29884, 504, 4510}, + /* 4525 : KANDNB kreg8,kreg8*,kreg8 [rvm: vex.l1.0f.ko8 42 /r ] ZU,AVX512DQ,FUTURE */ + /* 261(001 005) 001(42) 120 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_KANDNB, 3, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65505, 499, 4523}, + /* 4526 : KANDNB kreg8,kreg8*,kreg8 [rvm: evex.l1.0f.ko8 42 /r ] ZU,AVX512DQ,FUTURE,APX */ + /* 241(f1 7d 28) 300 001(42) 120 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KANDNB, 3, {OPMASKREG|BITS8,OPMASKREG|BITS8,OPMASKREG|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+29902, 500, 4523}, + /* 4527 : KANDNW kreg16,kreg16*,kreg16 [rvm: vex.l1.0f.ko16 42 /r ] ZU,AVX512F,FUTURE */ + /* 261(001 004) 001(42) 120 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_KANDNW, 3, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65519, 501, 4524}, + /* 4528 : KANDNW kreg16,kreg16*,kreg16 [rvm: evex.l1.0f.ko16 42 /r ] ZU,AVX512F,FUTURE,APX */ + /* 241(f1 7c 28) 300 001(42) 120 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_KANDNW, 3, {OPMASKREG|BITS16,OPMASKREG|BITS16,OPMASKREG|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+29920, 502, 4524}, + /* 4529 : KANDND kreg32,kreg32*,kreg32 [rvm: vex.l1.0f.ko32 42 /r ] ZU,AVX512BW,FUTURE */ + /* 261(001 205) 001(42) 120 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KANDND, 3, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65533, 503, 4525}, + /* 4530 : KANDND kreg32,kreg32*,kreg32 [rvm: evex.l1.0f.ko32 42 /r ] ZU,AVX512BW,FUTURE,APX */ + /* 241(f1 fd 28) 300 001(42) 120 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KANDND, 3, {OPMASKREG|BITS32,OPMASKREG|BITS32,OPMASKREG|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+29938, 504, 4525}, + /* 4531 : KANDNQ kreg64,kreg64*,kreg64 [rvm: vex.l1.0f.ko64 42 /r ] ZU,AVX512BW,FUTURE */ + /* 261(001 204) 001(42) 120 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KANDNQ, 3, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65547, 503, 4526}, + /* 4532 : KANDNQ kreg64,kreg64*,kreg64 [rvm: evex.l1.0f.ko64 42 /r ] ZU,AVX512BW,FUTURE,APX */ + /* 241(f1 fc 28) 300 001(42) 120 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KANDNQ, 3, {OPMASKREG|BITS64,OPMASKREG|BITS64,OPMASKREG|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+29956, 504, 4526}, + /* 4533 : KNOTB kreg8,kreg8* [rm: vex.l0.0f.ko8 44 /r ] ZU,AVX512DQ,FUTURE */ + /* 270(001 001) 001(44) 110 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_KNOTB, 2, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65561, 499, 4539}, + /* 4534 : KNOTB kreg8,kreg8* [rm: evex.l0.0f.ko8 44 /r ] ZU,AVX512DQ,FUTURE,APX */ + /* 250(f1 7d 08) 300 001(44) 110 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KNOTB, 2, {OPMASKREG|BITS8,OPMASKREG|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+29974, 500, 4539}, + /* 4535 : KNOTW kreg16,kreg16* [rm: vex.l0.0f.ko16 44 /r ] ZU,AVX512F,FUTURE */ + /* 270(001 000) 001(44) 110 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_KNOTW, 2, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65575, 501, 4540}, + /* 4536 : KNOTW kreg16,kreg16* [rm: evex.l0.0f.ko16 44 /r ] ZU,AVX512F,FUTURE,APX */ + /* 250(f1 7c 08) 300 001(44) 110 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_KNOTW, 2, {OPMASKREG|BITS16,OPMASKREG|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+29992, 502, 4540}, + /* 4537 : KNOTD kreg32,kreg32* [rm: vex.l0.0f.ko32 44 /r ] ZU,AVX512BW,FUTURE */ + /* 270(001 201) 001(44) 110 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KNOTD, 2, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65589, 503, 4541}, + /* 4538 : KNOTD kreg32,kreg32* [rm: evex.l0.0f.ko32 44 /r ] ZU,AVX512BW,FUTURE,APX */ + /* 250(f1 fd 08) 300 001(44) 110 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KNOTD, 2, {OPMASKREG|BITS32,OPMASKREG|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+30010, 504, 4541}, + /* 4539 : KNOTQ kreg64,kreg64* [rm: vex.l0.0f.ko64 44 /r ] ZU,AVX512BW,FUTURE */ + /* 270(001 200) 001(44) 110 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KNOTQ, 2, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65603, 503, 4542}, + /* 4540 : KNOTQ kreg64,kreg64* [rm: evex.l0.0f.ko64 44 /r ] ZU,AVX512BW,FUTURE,APX */ + /* 250(f1 fc 08) 300 001(44) 110 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KNOTQ, 2, {OPMASKREG|BITS64,OPMASKREG|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+30028, 504, 4542}, + /* 4541 : KORB kreg8,kreg8*,kreg8 [rvm: vex.nds.l1.0f.ko8 45 /r ] ZU,AVX512DQ,FUTURE */ + /* 261(001 005) 001(45) 120 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_KORB, 3, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65617, 499, 4555}, + /* 4542 : KORB kreg8,kreg8*,kreg8 [rvm: evex.nds.l1.0f.ko8 45 /r ] ZU,AVX512DQ,FUTURE,APX */ + /* 241(f1 7d 28) 300 001(45) 120 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KORB, 3, {OPMASKREG|BITS8,OPMASKREG|BITS8,OPMASKREG|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+30046, 500, 4555}, + /* 4543 : KORW kreg16,kreg16*,kreg16 [rvm: vex.nds.l1.0f.ko16 45 /r ] ZU,AVX512F,FUTURE */ + /* 261(001 004) 001(45) 120 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_KORW, 3, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65631, 501, 4556}, + /* 4544 : KORW kreg16,kreg16*,kreg16 [rvm: evex.nds.l1.0f.ko16 45 /r ] ZU,AVX512F,FUTURE,APX */ + /* 241(f1 7c 28) 300 001(45) 120 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_KORW, 3, {OPMASKREG|BITS16,OPMASKREG|BITS16,OPMASKREG|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+30064, 502, 4556}, + /* 4545 : KORD kreg32,kreg32*,kreg32 [rvm: vex.nds.l1.0f.ko32 45 /r ] ZU,AVX512BW,FUTURE */ + /* 261(001 205) 001(45) 120 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KORD, 3, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65645, 503, 4557}, + /* 4546 : KORD kreg32,kreg32*,kreg32 [rvm: evex.nds.l1.0f.ko32 45 /r ] ZU,AVX512BW,FUTURE,APX */ + /* 241(f1 fd 28) 300 001(45) 120 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KORD, 3, {OPMASKREG|BITS32,OPMASKREG|BITS32,OPMASKREG|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+30082, 504, 4557}, + /* 4547 : KORQ kreg64,kreg64*,kreg64 [rvm: vex.nds.l1.0f.ko64 45 /r ] ZU,AVX512BW,FUTURE */ + /* 261(001 204) 001(45) 120 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KORQ, 3, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65659, 503, 4558}, + /* 4548 : KORQ kreg64,kreg64*,kreg64 [rvm: evex.nds.l1.0f.ko64 45 /r ] ZU,AVX512BW,FUTURE,APX */ + /* 241(f1 fc 28) 300 001(45) 120 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KORQ, 3, {OPMASKREG|BITS64,OPMASKREG|BITS64,OPMASKREG|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+30100, 504, 4558}, + /* 4549 : KORTESTB kreg8,kreg8 [rm: vex.l0.0f.ko8 98 /r ] ZU,FL,AVX512DQ,FUTURE */ + /* 270(001 001) 001(98) 110 : NOAPX,ZU,FL,VEX,AVX512DQ,FUTURE */ + {I_KORTESTB, 2, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65673, 537, 4571}, + /* 4550 : KORTESTB kreg8,kreg8 [rm: evex.l0.0f.ko8 98 /r ] ZU,FL,AVX512DQ,FUTURE,APX */ + /* 250(f1 7d 08) 300 001(98) 110 : ZU,LONG,FL,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KORTESTB, 2, {OPMASKREG|BITS8,OPMASKREG|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+30118, 538, 4571}, + /* 4551 : KORTESTW kreg16,kreg16 [rm: vex.l0.0f.ko16 98 /r ] ZU,FL,AVX512F,FUTURE */ + /* 270(001 000) 001(98) 110 : NOAPX,ZU,FL,VEX,AVX512F,FUTURE */ + {I_KORTESTW, 2, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65680, 539, 4572}, + /* 4552 : KORTESTW kreg16,kreg16 [rm: evex.l0.0f.ko16 98 /r ] ZU,FL,AVX512F,FUTURE,APX */ + /* 250(f1 7c 08) 300 001(98) 110 : ZU,LONG,FL,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_KORTESTW, 2, {OPMASKREG|BITS16,OPMASKREG|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+30127, 540, 4572}, + /* 4553 : KORTESTD kreg32,kreg32 [rm: vex.l0.0f.ko32 98 /r ] ZU,FL,AVX512BW,FUTURE */ + /* 270(001 201) 001(98) 110 : NOAPX,ZU,FL,VEX,AVX512BW,FUTURE */ + {I_KORTESTD, 2, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65687, 541, 4573}, + /* 4554 : KORTESTD kreg32,kreg32 [rm: evex.l0.0f.ko32 98 /r ] ZU,FL,AVX512BW,FUTURE,APX */ + /* 250(f1 fd 08) 300 001(98) 110 : ZU,LONG,FL,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KORTESTD, 2, {OPMASKREG|BITS32,OPMASKREG|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+30136, 542, 4573}, + /* 4555 : KORTESTQ kreg64,kreg64 [rm: vex.l0.0f.ko64 98 /r ] ZU,FL,AVX512BW,FUTURE */ + /* 270(001 200) 001(98) 110 : NOAPX,ZU,FL,VEX,AVX512BW,FUTURE */ + {I_KORTESTQ, 2, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65694, 541, 4574}, + /* 4556 : KORTESTQ kreg64,kreg64 [rm: evex.l0.0f.ko64 98 /r ] ZU,FL,AVX512BW,FUTURE,APX */ + /* 250(f1 fc 08) 300 001(98) 110 : ZU,LONG,FL,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KORTESTQ, 2, {OPMASKREG|BITS64,OPMASKREG|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+30145, 542, 4574}, + /* 4557 : KSHIFTLB kreg8,kreg8,imm8 [rmi: vex.l0.66.0f3a.w0 32 /r ib ] ZU,AVX512DQ,FUTURE */ + /* 270(003 001) 001(32) 110 022 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_KSHIFTLB, 3, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54715, 499, 4587}, + /* 4558 : KSHIFTLB kreg8,kreg8,imm8 [rmi: evex.l0.66.0f3a.w0 32 /r ib ] ZU,AVX512DQ,FUTURE,APX */ + /* 250(f3 7d 08) 300 001(32) 110 022 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KSHIFTLB, 3, {OPMASKREG|BITS8,OPMASKREG|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18053, 500, 4587}, + /* 4559 : KSHIFTLW kreg16,kreg16,imm8 [rmi: vex.l0.66.0f3a.w1 32 /r ib ] ZU,AVX512F,FUTURE */ + /* 270(003 201) 001(32) 110 022 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_KSHIFTLW, 3, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54723, 501, 4588}, + /* 4560 : KSHIFTLW kreg16,kreg16,imm8 [rmi: evex.l0.66.0f3a.w1 32 /r ib ] ZU,AVX512F,FUTURE,APX */ + /* 250(f3 fd 08) 300 001(32) 110 022 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_KSHIFTLW, 3, {OPMASKREG|BITS16,OPMASKREG|BITS16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18063, 502, 4588}, + /* 4561 : KSHIFTLD kreg32,kreg32,imm8 [rmi: vex.l0.66.0f3a.w0 33 /r ib ] ZU,AVX512BW,FUTURE */ + /* 270(003 001) 001(33) 110 022 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KSHIFTLD, 3, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54731, 503, 4589}, + /* 4562 : KSHIFTLD kreg32,kreg32,imm8 [rmi: evex.l0.66.0f3a.w0 33 /r ib ] ZU,AVX512BW,FUTURE,APX */ + /* 250(f3 7d 08) 300 001(33) 110 022 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KSHIFTLD, 3, {OPMASKREG|BITS32,OPMASKREG|BITS32,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18073, 504, 4589}, + /* 4563 : KSHIFTLQ kreg64,kreg64,imm8 [rmi: vex.l0.66.0f3a.w1 33 /r ib ] ZU,AVX512BW,FUTURE */ + /* 270(003 201) 001(33) 110 022 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KSHIFTLQ, 3, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54739, 503, 4590}, + /* 4564 : KSHIFTLQ kreg64,kreg64,imm8 [rmi: evex.l0.66.0f3a.w1 33 /r ib ] ZU,AVX512BW,FUTURE,APX */ + /* 250(f3 fd 08) 300 001(33) 110 022 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KSHIFTLQ, 3, {OPMASKREG|BITS64,OPMASKREG|BITS64,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18083, 504, 4590}, + /* 4565 : KSHIFTRB kreg8,kreg8,imm8 [rmi: vex.l0.66.0f3a.w0 30 /r ib ] ZU,AVX512DQ,FUTURE */ + /* 270(003 001) 001(30) 110 022 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_KSHIFTRB, 3, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54747, 499, 4619}, + /* 4566 : KSHIFTRB kreg8,kreg8,imm8 [rmi: evex.l0.66.0f3a.w0 30 /r ib ] ZU,AVX512DQ,FUTURE,APX */ + /* 250(f3 7d 08) 300 001(30) 110 022 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KSHIFTRB, 3, {OPMASKREG|BITS8,OPMASKREG|BITS8,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18093, 500, 4619}, + /* 4567 : KSHIFTRW kreg16,kreg16,imm8 [rmi: vex.l0.66.0f3a.w1 30 /r ib ] ZU,AVX512F,FUTURE */ + /* 270(003 201) 001(30) 110 022 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_KSHIFTRW, 3, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54755, 501, 4620}, + /* 4568 : KSHIFTRW kreg16,kreg16,imm8 [rmi: evex.l0.66.0f3a.w1 30 /r ib ] ZU,AVX512F,FUTURE,APX */ + /* 250(f3 fd 08) 300 001(30) 110 022 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_KSHIFTRW, 3, {OPMASKREG|BITS16,OPMASKREG|BITS16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18103, 502, 4620}, + /* 4569 : KSHIFTRD kreg32,kreg32,imm8 [rmi: vex.l0.66.0f3a.w0 31 /r ib ] ZU,AVX512BW,FUTURE */ + /* 270(003 001) 001(31) 110 022 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KSHIFTRD, 3, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54763, 503, 4621}, + /* 4570 : KSHIFTRD kreg32,kreg32,imm8 [rmi: evex.l0.66.0f3a.w0 31 /r ib ] ZU,AVX512BW,FUTURE,APX */ + /* 250(f3 7d 08) 300 001(31) 110 022 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KSHIFTRD, 3, {OPMASKREG|BITS32,OPMASKREG|BITS32,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18113, 504, 4621}, + /* 4571 : KSHIFTRQ kreg64,kreg64,imm8 [rmi: vex.l0.66.0f3a.w1 31 /r ib ] ZU,AVX512BW,FUTURE */ + /* 270(003 201) 001(31) 110 022 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KSHIFTRQ, 3, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+54771, 503, 4622}, + /* 4572 : KSHIFTRQ kreg64,kreg64,imm8 [rmi: evex.l0.66.0f3a.w1 31 /r ib ] ZU,AVX512BW,FUTURE,APX */ + /* 250(f3 fd 08) 300 001(31) 110 022 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KSHIFTRQ, 3, {OPMASKREG|BITS64,OPMASKREG|BITS64,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18123, 504, 4622}, + /* 4573 : KTESTB kreg8,kreg8 [rm: vex.l0.0f.ko8 99 /r ] ZU,FL,AVX512DQ,FUTURE */ + /* 270(001 001) 001(99) 110 : NOAPX,ZU,FL,VEX,AVX512DQ,FUTURE */ + {I_KTESTB, 2, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65701, 537, 4651}, + /* 4574 : KTESTB kreg8,kreg8 [rm: evex.l0.0f.ko8 99 /r ] ZU,FL,AVX512DQ,FUTURE,APX */ + /* 250(f1 7d 08) 300 001(99) 110 : ZU,LONG,FL,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KTESTB, 2, {OPMASKREG|BITS8,OPMASKREG|BITS8,0,0,0}, NO_DECORATOR, nasm_bytecodes+30154, 538, 4651}, + /* 4575 : KTESTW kreg16,kreg16 [rm: vex.l0.0f.ko16 99 /r ] ZU,FL,AVX512DQ,FUTURE */ + /* 270(001 000) 001(99) 110 : NOAPX,ZU,FL,VEX,AVX512DQ,FUTURE */ + {I_KTESTW, 2, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65708, 537, 4652}, + /* 4576 : KTESTW kreg16,kreg16 [rm: evex.l0.0f.ko16 99 /r ] ZU,FL,AVX512DQ,FUTURE,APX */ + /* 250(f1 7c 08) 300 001(99) 110 : ZU,LONG,FL,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KTESTW, 2, {OPMASKREG|BITS16,OPMASKREG|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+30163, 538, 4652}, + /* 4577 : KTESTD kreg32,kreg32 [rm: vex.l0.0f.ko32 99 /r ] ZU,FL,AVX512BW,FUTURE */ + /* 270(001 201) 001(99) 110 : NOAPX,ZU,FL,VEX,AVX512BW,FUTURE */ + {I_KTESTD, 2, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65715, 541, 4653}, + /* 4578 : KTESTD kreg32,kreg32 [rm: evex.l0.0f.ko32 99 /r ] ZU,FL,AVX512BW,FUTURE,APX */ + /* 250(f1 fd 08) 300 001(99) 110 : ZU,LONG,FL,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KTESTD, 2, {OPMASKREG|BITS32,OPMASKREG|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+30172, 542, 4653}, + /* 4579 : KTESTQ kreg64,kreg64 [rm: vex.l0.0f.ko64 99 /r ] ZU,FL,AVX512BW,FUTURE */ + /* 270(001 200) 001(99) 110 : NOAPX,ZU,FL,VEX,AVX512BW,FUTURE */ + {I_KTESTQ, 2, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65722, 541, 4654}, + /* 4580 : KTESTQ kreg64,kreg64 [rm: evex.l0.0f.ko64 99 /r ] ZU,FL,AVX512BW,FUTURE,APX */ + /* 250(f1 fc 08) 300 001(99) 110 : ZU,LONG,FL,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KTESTQ, 2, {OPMASKREG|BITS64,OPMASKREG|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+30181, 542, 4654}, + /* 4581 : KUNPCKBW kreg16,kreg8*,kreg8 [rvm: vex.nds.l1.66.0f.w0 4b /r ] ZU,AVX512F,FUTURE */ + /* 261(001 005) 001(4b) 120 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_KUNPCKBW, 3, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65729, 501, 4667}, + /* 4582 : KUNPCKBW kreg16,kreg8*,kreg8 [rvm: evex.nds.l1.66.0f.w0 4b /r ] ZU,AVX512F,FUTURE,APX */ + /* 241(f1 7d 28) 300 001(4b) 120 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_KUNPCKBW, 3, {OPMASKREG|BITS16,OPMASKREG|BITS8,OPMASKREG|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+30190, 502, 4667}, + /* 4583 : KUNPCKWD kreg32,kreg16*,kreg16 [rvm: vex.nds.l1.0f.w0 4b /r ] ZU,AVX512BW,FUTURE */ + /* 261(001 004) 001(4b) 120 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KUNPCKWD, 3, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65743, 503, 4673}, + /* 4584 : KUNPCKWD kreg32,kreg16*,kreg16 [rvm: evex.nds.l1.0f.w0 4b /r ] ZU,AVX512BW,FUTURE,APX */ + /* 241(f1 7c 28) 300 001(4b) 120 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KUNPCKWD, 3, {OPMASKREG|BITS32,OPMASKREG|BITS16,OPMASKREG|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+30208, 504, 4673}, + /* 4585 : KUNPCKDQ kreg64,kreg32*,kreg32 [rvm: vex.nds.l1.0f.w1 4b /r ] ZU,AVX512BW,FUTURE */ + /* 261(001 204) 001(4b) 120 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KUNPCKDQ, 3, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65757, 503, 4679}, + /* 4586 : KUNPCKDQ kreg64,kreg32*,kreg32 [rvm: evex.nds.l1.0f.w1 4b /r ] ZU,AVX512BW,FUTURE,APX */ + /* 241(f1 fc 28) 300 001(4b) 120 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KUNPCKDQ, 3, {OPMASKREG|BITS64,OPMASKREG|BITS32,OPMASKREG|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+30226, 504, 4679}, + /* 4587 : KXNORB kreg8,kreg8*,kreg8 [rvm: vex.nds.l1.0f.ko8 46 /r ] ZU,AVX512DQ,FUTURE */ + /* 261(001 005) 001(46) 120 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_KXNORB, 3, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65771, 499, 4685}, + /* 4588 : KXNORB kreg8,kreg8*,kreg8 [rvm: evex.nds.l1.0f.ko8 46 /r ] ZU,AVX512DQ,FUTURE,APX */ + /* 241(f1 7d 28) 300 001(46) 120 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KXNORB, 3, {OPMASKREG|BITS8,OPMASKREG|BITS8,OPMASKREG|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+30244, 500, 4685}, + /* 4589 : KXNORW kreg16,kreg16*,kreg16 [rvm: vex.nds.l1.0f.ko16 46 /r ] ZU,AVX512F,FUTURE */ + /* 261(001 004) 001(46) 120 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_KXNORW, 3, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65785, 501, 4686}, + /* 4590 : KXNORW kreg16,kreg16*,kreg16 [rvm: evex.nds.l1.0f.ko16 46 /r ] ZU,AVX512F,FUTURE,APX */ + /* 241(f1 7c 28) 300 001(46) 120 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_KXNORW, 3, {OPMASKREG|BITS16,OPMASKREG|BITS16,OPMASKREG|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+30262, 502, 4686}, + /* 4591 : KXNORD kreg32,kreg32*,kreg32 [rvm: vex.nds.l1.0f.ko32 46 /r ] ZU,AVX512BW,FUTURE */ + /* 261(001 205) 001(46) 120 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KXNORD, 3, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65799, 503, 4687}, + /* 4592 : KXNORD kreg32,kreg32*,kreg32 [rvm: evex.nds.l1.0f.ko32 46 /r ] ZU,AVX512BW,FUTURE,APX */ + /* 241(f1 fd 28) 300 001(46) 120 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KXNORD, 3, {OPMASKREG|BITS32,OPMASKREG|BITS32,OPMASKREG|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+30280, 504, 4687}, + /* 4593 : KXNORQ kreg64,kreg64*,kreg64 [rvm: vex.nds.l1.0f.ko64 46 /r ] ZU,AVX512BW,FUTURE */ + /* 261(001 204) 001(46) 120 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KXNORQ, 3, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65813, 503, 4688}, + /* 4594 : KXNORQ kreg64,kreg64*,kreg64 [rvm: evex.nds.l1.0f.ko64 46 /r ] ZU,AVX512BW,FUTURE,APX */ + /* 241(f1 fc 28) 300 001(46) 120 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KXNORQ, 3, {OPMASKREG|BITS64,OPMASKREG|BITS64,OPMASKREG|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+30298, 504, 4688}, + /* 4595 : KXORB kreg8,kreg8*,kreg8 [rvm: vex.nds.l1.0f.ko8 47 /r ] ZU,AVX512DQ,FUTURE */ + /* 261(001 005) 001(47) 120 : NOAPX,ZU,VEX,AVX512DQ,FUTURE */ + {I_KXORB, 3, {OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,OPMASKREG|BITS8|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65827, 499, 4701}, + /* 4596 : KXORB kreg8,kreg8*,kreg8 [rvm: evex.nds.l1.0f.ko8 47 /r ] ZU,AVX512DQ,FUTURE,APX */ + /* 241(f1 7d 28) 300 001(47) 120 : ZU,LONG,EVEX,PROT,AVX512DQ,APX,FUTURE */ + {I_KXORB, 3, {OPMASKREG|BITS8,OPMASKREG|BITS8,OPMASKREG|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+30316, 500, 4701}, + /* 4597 : KXORW kreg16,kreg16*,kreg16 [rvm: vex.nds.l1.0f.ko16 47 /r ] ZU,AVX512F,FUTURE */ + /* 261(001 004) 001(47) 120 : NOAPX,ZU,VEX,AVX512F,FUTURE */ + {I_KXORW, 3, {OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,OPMASKREG|BITS16|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65841, 501, 4702}, + /* 4598 : KXORW kreg16,kreg16*,kreg16 [rvm: evex.nds.l1.0f.ko16 47 /r ] ZU,AVX512F,FUTURE,APX */ + /* 241(f1 7c 28) 300 001(47) 120 : ZU,LONG,EVEX,PROT,AVX512F,APX,FUTURE */ + {I_KXORW, 3, {OPMASKREG|BITS16,OPMASKREG|BITS16,OPMASKREG|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+30334, 502, 4702}, + /* 4599 : KXORD kreg32,kreg32*,kreg32 [rvm: vex.nds.l1.0f.ko32 47 /r ] ZU,AVX512BW,FUTURE */ + /* 261(001 205) 001(47) 120 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KXORD, 3, {OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,OPMASKREG|BITS32|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65855, 503, 4703}, + /* 4600 : KXORD kreg32,kreg32*,kreg32 [rvm: evex.nds.l1.0f.ko32 47 /r ] ZU,AVX512BW,FUTURE,APX */ + /* 241(f1 fd 28) 300 001(47) 120 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KXORD, 3, {OPMASKREG|BITS32,OPMASKREG|BITS32,OPMASKREG|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+30352, 504, 4703}, + /* 4601 : KXORQ kreg64,kreg64*,kreg64 [rvm: vex.nds.l1.0f.ko64 47 /r ] ZU,AVX512BW,FUTURE */ + /* 261(001 204) 001(47) 120 : NOAPX,ZU,VEX,AVX512BW,FUTURE */ + {I_KXORQ, 3, {OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,OPMASKREG|BITS64|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65869, 503, 4704}, + /* 4602 : KXORQ kreg64,kreg64*,kreg64 [rvm: evex.nds.l1.0f.ko64 47 /r ] ZU,AVX512BW,FUTURE,APX */ + /* 241(f1 fc 28) 300 001(47) 120 : ZU,LONG,EVEX,PROT,AVX512BW,APX,FUTURE */ + {I_KXORQ, 3, {OPMASKREG|BITS64,OPMASKREG|BITS64,OPMASKREG|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+30370, 504, 4704}, + /* 4603 : VADDPD xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f.w1 58 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(58) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VADDPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+30388, 543, 4719}, + /* 4604 : VADDPD ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f.w1 58 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(58) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VADDPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+30406, 543, 4720}, + /* 4605 : VADDPD zmmreg|mask|z,zmmreg*,zmmrm512|b64|er [rvm:fv: evex.nds.512.66.0f.w1 58 /r ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(58) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VADDPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+30424, 544, 4721}, + /* 4606 : VADDPS xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.0f.w0 58 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(58) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VADDPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+30442, 543, 4722}, + /* 4607 : VADDPS ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.0f.w0 58 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(58) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VADDPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+30460, 543, 4723}, + /* 4608 : VADDPS zmmreg|mask|z,zmmreg*,zmmrm512|b32|er [rvm:fv: evex.nds.512.0f.w0 58 /r ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(58) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VADDPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+30478, 544, 4724}, + /* 4609 : VADDSD xmmreg|mask|z,xmmreg*,xmmrm64|er [rvm:t1s: evex.nds.lig.f2.0f.w1 58 /r ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(58) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VADDSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+30496, 545, 4725}, + /* 4610 : VADDSS xmmreg|mask|z,xmmreg*,xmmrm32|er [rvm:t1s: evex.nds.lig.f3.0f.w0 58 /r ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(58) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VADDSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+30514, 545, 4726}, + /* 4611 : VALIGND xmmreg|mask|z,xmmreg*,xmmrm128|b32,imm8 [rvmi:fv: evex.nds.128.66.0f3a.w0 03 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 08) 301 001(03) 120 023 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VALIGND, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18133, 543, 4727}, + /* 4612 : VALIGND ymmreg|mask|z,ymmreg*,ymmrm256|b32,imm8 [rvmi:fv: evex.nds.256.66.0f3a.w0 03 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 28) 301 001(03) 120 023 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VALIGND, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18153, 543, 4728}, + /* 4613 : VALIGND zmmreg|mask|z,zmmreg*,zmmrm512|b32,imm8 [rvmi:fv: evex.nds.512.66.0f3a.w0 03 /r ib ] AVX512,FUTURE */ + /* 241(f3 7d 48) 301 001(03) 120 023 : EVEX,PROT,AVX512,FUTURE */ + {I_VALIGND, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18173, 544, 4729}, + /* 4614 : VALIGNQ xmmreg|mask|z,xmmreg*,xmmrm128|b64,imm8 [rvmi:fv: evex.nds.128.66.0f3a.w1 03 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 08) 301 001(03) 120 023 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VALIGNQ, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18193, 543, 4730}, + /* 4615 : VALIGNQ ymmreg|mask|z,ymmreg*,ymmrm256|b64,imm8 [rvmi:fv: evex.nds.256.66.0f3a.w1 03 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 28) 301 001(03) 120 023 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VALIGNQ, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18213, 543, 4731}, + /* 4616 : VALIGNQ zmmreg|mask|z,zmmreg*,zmmrm512|b64,imm8 [rvmi:fv: evex.nds.512.66.0f3a.w1 03 /r ib ] AVX512,FUTURE */ + /* 241(f3 fd 48) 301 001(03) 120 023 : EVEX,PROT,AVX512,FUTURE */ + {I_VALIGNQ, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18233, 544, 4732}, + /* 4617 : VANDNPD xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f.w1 55 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 241(f1 fd 08) 301 001(55) 120 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VANDNPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+30532, 546, 4733}, + /* 4618 : VANDNPD ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f.w1 55 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 241(f1 fd 28) 301 001(55) 120 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VANDNPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+30550, 546, 4734}, + /* 4619 : VANDNPD zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f.w1 55 /r ] AVX512DQ,FUTURE */ + /* 241(f1 fd 48) 301 001(55) 120 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VANDNPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+30568, 547, 4735}, + /* 4620 : VANDNPS xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.0f.w0 55 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 241(f1 7c 08) 301 001(55) 120 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VANDNPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+30586, 546, 4736}, + /* 4621 : VANDNPS ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.0f.w0 55 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 241(f1 7c 28) 301 001(55) 120 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VANDNPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+30604, 546, 4737}, + /* 4622 : VANDNPS zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.0f.w0 55 /r ] AVX512DQ,FUTURE */ + /* 241(f1 7c 48) 301 001(55) 120 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VANDNPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+30622, 547, 4738}, + /* 4623 : VANDPD xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f.w1 54 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 241(f1 fd 08) 301 001(54) 120 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VANDPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+30640, 546, 4739}, + /* 4624 : VANDPD ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f.w1 54 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 241(f1 fd 28) 301 001(54) 120 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VANDPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+30658, 546, 4740}, + /* 4625 : VANDPD zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f.w1 54 /r ] AVX512DQ,FUTURE */ + /* 241(f1 fd 48) 301 001(54) 120 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VANDPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+30676, 547, 4741}, + /* 4626 : VANDPS xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.0f.w0 54 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 241(f1 7c 08) 301 001(54) 120 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VANDPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+30694, 546, 4742}, + /* 4627 : VANDPS ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.0f.w0 54 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 241(f1 7c 28) 301 001(54) 120 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VANDPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+30712, 546, 4743}, + /* 4628 : VANDPS zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.0f.w0 54 /r ] AVX512DQ,FUTURE */ + /* 241(f1 7c 48) 301 001(54) 120 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VANDPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+30730, 547, 4744}, + /* 4629 : VBLENDMPD xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 65 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(65) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VBLENDMPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+30748, 543, 4745}, + /* 4630 : VBLENDMPD ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 65 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(65) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VBLENDMPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+30757, 543, 4746}, + /* 4631 : VBLENDMPD zmmreg|mask|z,zmmreg,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 65 /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(65) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VBLENDMPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+30766, 544, 4747}, + /* 4632 : VBLENDMPS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 65 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(65) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VBLENDMPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+30775, 543, 4748}, + /* 4633 : VBLENDMPS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 65 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(65) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VBLENDMPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+30784, 543, 4749}, + /* 4634 : VBLENDMPS zmmreg|mask|z,zmmreg,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f38.w0 65 /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(65) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VBLENDMPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+30793, 544, 4750}, + /* 4635 : VBROADCASTF32X2 ymmreg|mask|z,xmmrm64 [rm:t2: evex.256.66.0f38.w0 19 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f2 7d 28) 311 001(19) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VBROADCASTF32X2, 2, {YMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+30802, 546, 4751}, + /* 4636 : VBROADCASTF32X2 zmmreg|mask|z,xmmrm64 [rm:t2: evex.512.66.0f38.w0 19 /r ] AVX512DQ,FUTURE */ + /* 250(f2 7d 48) 311 001(19) 110 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VBROADCASTF32X2, 2, {ZMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+30811, 547, 4752}, + /* 4637 : VBROADCASTF32X4 ymmreg|mask|z,mem128 [rm:t4: evex.256.66.0f38.w0 1a /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 28) 312 001(1a) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VBROADCASTF32X4, 2, {YMMREG,MEMORY|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+30820, 543, 4753}, + /* 4638 : VBROADCASTF32X4 zmmreg|mask|z,mem128 [rm:t4: evex.512.66.0f38.w0 1a /r ] AVX512,FUTURE */ + /* 250(f2 7d 48) 312 001(1a) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VBROADCASTF32X4, 2, {ZMMREG,MEMORY|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+30829, 544, 4754}, + /* 4639 : VBROADCASTF32X8 zmmreg|mask|z,mem256 [rm:t8: evex.512.66.0f38.w0 1b /r ] AVX512DQ,FUTURE */ + /* 250(f2 7d 48) 313 001(1b) 110 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VBROADCASTF32X8, 2, {ZMMREG,MEMORY|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+30838, 547, 4755}, + /* 4640 : VBROADCASTF64X2 ymmreg|mask|z,mem128 [rm:t2: evex.256.66.0f38.w1 1a /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f2 fd 28) 311 001(1a) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VBROADCASTF64X2, 2, {YMMREG,MEMORY|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+30847, 546, 4756}, + /* 4641 : VBROADCASTF64X2 zmmreg|mask|z,mem128 [rm:t2: evex.512.66.0f38.w1 1a /r ] AVX512DQ,FUTURE */ + /* 250(f2 fd 48) 311 001(1a) 110 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VBROADCASTF64X2, 2, {ZMMREG,MEMORY|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+30856, 547, 4757}, + /* 4642 : VBROADCASTF64X4 zmmreg|mask|z,mem256 [rm:t4: evex.512.66.0f38.w1 1b /r ] AVX512,FUTURE */ + /* 250(f2 fd 48) 312 001(1b) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VBROADCASTF64X4, 2, {ZMMREG,MEMORY|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+30865, 544, 4758}, + /* 4643 : VBROADCASTI32X2 xmmreg|mask|z,xmmrm64 [rm:t2: evex.128.66.0f38.w0 59 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f2 7d 08) 311 001(59) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VBROADCASTI32X2, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+30874, 546, 4759}, + /* 4644 : VBROADCASTI32X2 ymmreg|mask|z,xmmrm64 [rm:t2: evex.256.66.0f38.w0 59 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f2 7d 28) 311 001(59) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VBROADCASTI32X2, 2, {YMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+30883, 546, 4760}, + /* 4645 : VBROADCASTI32X2 zmmreg|mask|z,xmmrm64 [rm:t2: evex.512.66.0f38.w0 59 /r ] AVX512DQ,FUTURE */ + /* 250(f2 7d 48) 311 001(59) 110 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VBROADCASTI32X2, 2, {ZMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+30892, 547, 4761}, + /* 4646 : VBROADCASTI32X4 ymmreg|mask|z,mem128 [rm:t4: evex.256.66.0f38.w0 5a /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 28) 312 001(5a) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VBROADCASTI32X4, 2, {YMMREG,MEMORY|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+30901, 543, 4762}, + /* 4647 : VBROADCASTI32X4 zmmreg|mask|z,mem128 [rm:t4: evex.512.66.0f38.w0 5a /r ] AVX512,FUTURE */ + /* 250(f2 7d 48) 312 001(5a) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VBROADCASTI32X4, 2, {ZMMREG,MEMORY|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+30910, 544, 4763}, + /* 4648 : VBROADCASTI32X8 zmmreg|mask|z,mem256 [rm:t8: evex.512.66.0f38.w0 5b /r ] AVX512DQ,FUTURE */ + /* 250(f2 7d 48) 313 001(5b) 110 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VBROADCASTI32X8, 2, {ZMMREG,MEMORY|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+30919, 547, 4764}, + /* 4649 : VBROADCASTI64X2 ymmreg|mask|z,mem128 [rm:t2: evex.256.66.0f38.w1 5a /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f2 fd 28) 311 001(5a) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VBROADCASTI64X2, 2, {YMMREG,MEMORY|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+30928, 546, 4765}, + /* 4650 : VBROADCASTI64X2 zmmreg|mask|z,mem128 [rm:t2: evex.512.66.0f38.w1 5a /r ] AVX512DQ,FUTURE */ + /* 250(f2 fd 48) 311 001(5a) 110 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VBROADCASTI64X2, 2, {ZMMREG,MEMORY|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+30937, 547, 4766}, + /* 4651 : VBROADCASTI64X4 zmmreg|mask|z,mem256 [rm:t4: evex.512.66.0f38.w1 5b /r ] AVX512,FUTURE */ + /* 250(f2 fd 48) 312 001(5b) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VBROADCASTI64X4, 2, {ZMMREG,MEMORY|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+30946, 544, 4767}, + /* 4652 : VBROADCASTSD ymmreg|mask|z,mem64 [rm:t1s: evex.256.66.0f38.w1 19 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 fd 28) 306 001(19) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VBROADCASTSD, 2, {YMMREG,MEMORY|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+30955, 543, 4768}, + /* 4653 : VBROADCASTSD zmmreg|mask|z,mem64 [rm:t1s: evex.512.66.0f38.w1 19 /r ] AVX512,FUTURE */ + /* 250(f2 fd 48) 306 001(19) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VBROADCASTSD, 2, {ZMMREG,MEMORY|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+30964, 544, 4769}, + /* 4654 : VBROADCASTSD ymmreg|mask|z,xmmreg [rm: evex.256.66.0f38.w1 19 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 fd 28) 300 001(19) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VBROADCASTSD, 2, {YMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+30973, 543, 4770}, + /* 4655 : VBROADCASTSD zmmreg|mask|z,xmmreg [rm: evex.512.66.0f38.w1 19 /r ] AVX512,FUTURE */ + /* 250(f2 fd 48) 300 001(19) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VBROADCASTSD, 2, {ZMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+30982, 544, 4771}, + /* 4656 : VBROADCASTSS xmmreg|mask|z,mem32 [rm:t1s: evex.128.66.0f38.w0 18 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 08) 306 001(18) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VBROADCASTSS, 2, {XMMREG,MEMORY|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+30991, 543, 4772}, + /* 4657 : VBROADCASTSS ymmreg|mask|z,mem32 [rm:t1s: evex.256.66.0f38.w0 18 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 28) 306 001(18) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VBROADCASTSS, 2, {YMMREG,MEMORY|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+31000, 543, 4773}, + /* 4658 : VBROADCASTSS zmmreg|mask|z,mem32 [rm:t1s: evex.512.66.0f38.w0 18 /r ] AVX512,FUTURE */ + /* 250(f2 7d 48) 306 001(18) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VBROADCASTSS, 2, {ZMMREG,MEMORY|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+31009, 544, 4774}, + /* 4659 : VBROADCASTSS xmmreg|mask|z,xmmreg [rm: evex.128.66.0f38.w0 18 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 08) 300 001(18) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VBROADCASTSS, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+31018, 543, 4775}, + /* 4660 : VBROADCASTSS ymmreg|mask|z,xmmreg [rm: evex.256.66.0f38.w0 18 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 28) 300 001(18) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VBROADCASTSS, 2, {YMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+31027, 543, 4776}, + /* 4661 : VBROADCASTSS zmmreg|mask|z,xmmreg [rm: evex.512.66.0f38.w0 18 /r ] AVX512,FUTURE */ + /* 250(f2 7d 48) 300 001(18) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VBROADCASTSS, 2, {ZMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+31036, 544, 4777}, + /* 4662 : VCMPEQPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 00 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(00) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPEQPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+4743, 543, 4778}, + /* 4663 : VCMPEQPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 00 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(00) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPEQPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+4754, 543, 4779}, + /* 4664 : VCMPEQPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 00 ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(00) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPEQPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+4765, 544, 4780}, + /* 4665 : VCMPEQPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 00 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(00) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPEQPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+4776, 543, 4781}, + /* 4666 : VCMPEQPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 00 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(00) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPEQPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+4787, 543, 4782}, + /* 4667 : VCMPEQPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 00 ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(00) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPEQPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+4798, 544, 4783}, + /* 4668 : VCMPEQSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 00 ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(00) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPEQSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+4809, 545, 4784}, + /* 4669 : VCMPEQSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 00 ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(00) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPEQSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+4820, 545, 4785}, + /* 4670 : VCMPEQ_OQPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 00 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(00) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPEQ_OQPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+4743, 543, 4786}, + /* 4671 : VCMPEQ_OQPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 00 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(00) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPEQ_OQPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+4754, 543, 4787}, + /* 4672 : VCMPEQ_OQPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 00 ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(00) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPEQ_OQPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+4765, 544, 4788}, + /* 4673 : VCMPEQ_OQPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 00 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(00) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPEQ_OQPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+4776, 543, 4789}, + /* 4674 : VCMPEQ_OQPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 00 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(00) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPEQ_OQPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+4787, 543, 4790}, + /* 4675 : VCMPEQ_OQPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 00 ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(00) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPEQ_OQPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+4798, 544, 4791}, + /* 4676 : VCMPEQ_OQSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 00 ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(00) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPEQ_OQSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+4809, 545, 4792}, + /* 4677 : VCMPEQ_OQSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 00 ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(00) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPEQ_OQSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+4820, 545, 4793}, + /* 4678 : VCMPLTPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 01 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(01) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPLTPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+4831, 543, 4794}, + /* 4679 : VCMPLTPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 01 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(01) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPLTPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+4842, 543, 4795}, + /* 4680 : VCMPLTPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 01 ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(01) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPLTPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+4853, 544, 4796}, + /* 4681 : VCMPLTPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 01 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(01) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPLTPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+4864, 543, 4797}, + /* 4682 : VCMPLTPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 01 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(01) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPLTPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+4875, 543, 4798}, + /* 4683 : VCMPLTPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 01 ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(01) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPLTPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+4886, 544, 4799}, + /* 4684 : VCMPLTSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 01 ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(01) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPLTSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+4897, 545, 4800}, + /* 4685 : VCMPLTSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 01 ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(01) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPLTSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+4908, 545, 4801}, + /* 4686 : VCMPLT_OSPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 01 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(01) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPLT_OSPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+4831, 543, 4802}, + /* 4687 : VCMPLT_OSPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 01 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(01) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPLT_OSPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+4842, 543, 4803}, + /* 4688 : VCMPLT_OSPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 01 ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(01) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPLT_OSPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+4853, 544, 4804}, + /* 4689 : VCMPLT_OSPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 01 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(01) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPLT_OSPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+4864, 543, 4805}, + /* 4690 : VCMPLT_OSPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 01 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(01) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPLT_OSPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+4875, 543, 4806}, + /* 4691 : VCMPLT_OSPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 01 ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(01) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPLT_OSPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+4886, 544, 4807}, + /* 4692 : VCMPLT_OSSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 01 ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(01) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPLT_OSSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+4897, 545, 4808}, + /* 4693 : VCMPLT_OSSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 01 ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(01) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPLT_OSSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+4908, 545, 4809}, + /* 4694 : VCMPLEPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 02 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(02) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPLEPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+4919, 543, 4810}, + /* 4695 : VCMPLEPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 02 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(02) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPLEPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+4930, 543, 4811}, + /* 4696 : VCMPLEPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 02 ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(02) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPLEPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+4941, 544, 4812}, + /* 4697 : VCMPLEPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 02 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(02) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPLEPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+4952, 543, 4813}, + /* 4698 : VCMPLEPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 02 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(02) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPLEPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+4963, 543, 4814}, + /* 4699 : VCMPLEPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 02 ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(02) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPLEPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+4974, 544, 4815}, + /* 4700 : VCMPLESD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 02 ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(02) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPLESD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+4985, 545, 4816}, + /* 4701 : VCMPLESS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 02 ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(02) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPLESS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+4996, 545, 4817}, + /* 4702 : VCMPLE_OSPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 02 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(02) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPLE_OSPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+4919, 543, 4818}, + /* 4703 : VCMPLE_OSPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 02 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(02) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPLE_OSPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+4930, 543, 4819}, + /* 4704 : VCMPLE_OSPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 02 ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(02) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPLE_OSPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+4941, 544, 4820}, + /* 4705 : VCMPLE_OSPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 02 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(02) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPLE_OSPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+4952, 543, 4821}, + /* 4706 : VCMPLE_OSPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 02 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(02) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPLE_OSPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+4963, 543, 4822}, + /* 4707 : VCMPLE_OSPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 02 ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(02) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPLE_OSPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+4974, 544, 4823}, + /* 4708 : VCMPLE_OSSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 02 ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(02) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPLE_OSSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+4985, 545, 4824}, + /* 4709 : VCMPLE_OSSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 02 ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(02) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPLE_OSSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+4996, 545, 4825}, + /* 4710 : VCMPUNORDPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 03 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(03) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPUNORDPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5007, 543, 4826}, + /* 4711 : VCMPUNORDPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 03 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(03) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPUNORDPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5018, 543, 4827}, + /* 4712 : VCMPUNORDPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 03 ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(03) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPUNORDPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+5029, 544, 4828}, + /* 4713 : VCMPUNORDPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 03 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(03) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPUNORDPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5040, 543, 4829}, + /* 4714 : VCMPUNORDPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 03 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(03) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPUNORDPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5051, 543, 4830}, + /* 4715 : VCMPUNORDPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 03 ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(03) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPUNORDPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+5062, 544, 4831}, + /* 4716 : VCMPUNORDSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 03 ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(03) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPUNORDSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5073, 545, 4832}, + /* 4717 : VCMPUNORDSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 03 ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(03) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPUNORDSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5084, 545, 4833}, + /* 4718 : VCMPUNORD_QPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 03 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(03) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPUNORD_QPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5007, 543, 4834}, + /* 4719 : VCMPUNORD_QPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 03 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(03) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPUNORD_QPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5018, 543, 4835}, + /* 4720 : VCMPUNORD_QPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 03 ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(03) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPUNORD_QPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+5029, 544, 4836}, + /* 4721 : VCMPUNORD_QPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 03 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(03) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPUNORD_QPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5040, 543, 4837}, + /* 4722 : VCMPUNORD_QPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 03 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(03) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPUNORD_QPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5051, 543, 4838}, + /* 4723 : VCMPUNORD_QPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 03 ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(03) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPUNORD_QPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+5062, 544, 4839}, + /* 4724 : VCMPUNORD_QSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 03 ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(03) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPUNORD_QSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5073, 545, 4840}, + /* 4725 : VCMPUNORD_QSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 03 ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(03) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPUNORD_QSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5084, 545, 4841}, + /* 4726 : VCMPNEQPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 04 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(04) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNEQPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5095, 543, 4842}, + /* 4727 : VCMPNEQPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 04 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(04) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNEQPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5106, 543, 4843}, + /* 4728 : VCMPNEQPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 04 ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(04) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNEQPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+5117, 544, 4844}, + /* 4729 : VCMPNEQPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 04 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(04) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNEQPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5128, 543, 4845}, + /* 4730 : VCMPNEQPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 04 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(04) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNEQPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5139, 543, 4846}, + /* 4731 : VCMPNEQPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 04 ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(04) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNEQPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+5150, 544, 4847}, + /* 4732 : VCMPNEQSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 04 ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(04) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNEQSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5161, 545, 4848}, + /* 4733 : VCMPNEQSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 04 ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(04) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNEQSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5172, 545, 4849}, + /* 4734 : VCMPNEQ_UQPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 04 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(04) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNEQ_UQPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5095, 543, 4850}, + /* 4735 : VCMPNEQ_UQPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 04 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(04) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNEQ_UQPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5106, 543, 4851}, + /* 4736 : VCMPNEQ_UQPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 04 ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(04) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNEQ_UQPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+5117, 544, 4852}, + /* 4737 : VCMPNEQ_UQPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 04 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(04) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNEQ_UQPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5128, 543, 4853}, + /* 4738 : VCMPNEQ_UQPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 04 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(04) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNEQ_UQPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5139, 543, 4854}, + /* 4739 : VCMPNEQ_UQPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 04 ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(04) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNEQ_UQPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+5150, 544, 4855}, + /* 4740 : VCMPNEQ_UQSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 04 ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(04) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNEQ_UQSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5161, 545, 4856}, + /* 4741 : VCMPNEQ_UQSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 04 ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(04) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNEQ_UQSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5172, 545, 4857}, + /* 4742 : VCMPNLTPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 05 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(05) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNLTPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5183, 543, 4858}, + /* 4743 : VCMPNLTPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 05 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(05) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNLTPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5194, 543, 4859}, + /* 4744 : VCMPNLTPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 05 ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(05) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNLTPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+5205, 544, 4860}, + /* 4745 : VCMPNLTPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 05 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(05) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNLTPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5216, 543, 4861}, + /* 4746 : VCMPNLTPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 05 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(05) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNLTPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5227, 543, 4862}, + /* 4747 : VCMPNLTPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 05 ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(05) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNLTPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+5238, 544, 4863}, + /* 4748 : VCMPNLTSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 05 ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(05) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNLTSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5249, 545, 4864}, + /* 4749 : VCMPNLTSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 05 ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(05) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNLTSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5260, 545, 4865}, + /* 4750 : VCMPNLT_USPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 05 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(05) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNLT_USPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5183, 543, 4866}, + /* 4751 : VCMPNLT_USPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 05 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(05) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNLT_USPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5194, 543, 4867}, + /* 4752 : VCMPNLT_USPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 05 ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(05) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNLT_USPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+5205, 544, 4868}, + /* 4753 : VCMPNLT_USPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 05 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(05) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNLT_USPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5216, 543, 4869}, + /* 4754 : VCMPNLT_USPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 05 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(05) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNLT_USPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5227, 543, 4870}, + /* 4755 : VCMPNLT_USPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 05 ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(05) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNLT_USPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+5238, 544, 4871}, + /* 4756 : VCMPNLT_USSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 05 ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(05) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNLT_USSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5249, 545, 4872}, + /* 4757 : VCMPNLT_USSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 05 ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(05) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNLT_USSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5260, 545, 4873}, + /* 4758 : VCMPNLEPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 06 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(06) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNLEPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5271, 543, 4874}, + /* 4759 : VCMPNLEPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 06 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(06) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNLEPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5282, 543, 4875}, + /* 4760 : VCMPNLEPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 06 ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(06) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNLEPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+5293, 544, 4876}, + /* 4761 : VCMPNLEPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 06 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(06) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNLEPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5304, 543, 4877}, + /* 4762 : VCMPNLEPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 06 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(06) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNLEPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5315, 543, 4878}, + /* 4763 : VCMPNLEPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 06 ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(06) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNLEPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+5326, 544, 4879}, + /* 4764 : VCMPNLESD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 06 ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(06) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNLESD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5337, 545, 4880}, + /* 4765 : VCMPNLESS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 06 ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(06) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNLESS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5348, 545, 4881}, + /* 4766 : VCMPNLE_USPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 06 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(06) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNLE_USPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5271, 543, 4882}, + /* 4767 : VCMPNLE_USPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 06 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(06) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNLE_USPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5282, 543, 4883}, + /* 4768 : VCMPNLE_USPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 06 ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(06) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNLE_USPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+5293, 544, 4884}, + /* 4769 : VCMPNLE_USPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 06 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(06) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNLE_USPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5304, 543, 4885}, + /* 4770 : VCMPNLE_USPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 06 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(06) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNLE_USPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5315, 543, 4886}, + /* 4771 : VCMPNLE_USPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 06 ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(06) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNLE_USPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+5326, 544, 4887}, + /* 4772 : VCMPNLE_USSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 06 ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(06) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNLE_USSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5337, 545, 4888}, + /* 4773 : VCMPNLE_USSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 06 ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(06) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNLE_USSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5348, 545, 4889}, + /* 4774 : VCMPORDPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 07 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(07) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPORDPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5359, 543, 4890}, + /* 4775 : VCMPORDPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 07 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(07) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPORDPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5370, 543, 4891}, + /* 4776 : VCMPORDPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 07 ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(07) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPORDPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+5381, 544, 4892}, + /* 4777 : VCMPORDPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 07 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(07) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPORDPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5392, 543, 4893}, + /* 4778 : VCMPORDPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 07 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(07) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPORDPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5403, 543, 4894}, + /* 4779 : VCMPORDPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 07 ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(07) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPORDPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+5414, 544, 4895}, + /* 4780 : VCMPORDSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 07 ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(07) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPORDSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5425, 545, 4896}, + /* 4781 : VCMPORDSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 07 ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(07) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPORDSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5436, 545, 4897}, + /* 4782 : VCMPORD_QPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 07 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(07) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPORD_QPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5359, 543, 4898}, + /* 4783 : VCMPORD_QPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 07 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(07) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPORD_QPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5370, 543, 4899}, + /* 4784 : VCMPORD_QPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 07 ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(07) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPORD_QPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+5381, 544, 4900}, + /* 4785 : VCMPORD_QPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 07 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(07) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPORD_QPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5392, 543, 4901}, + /* 4786 : VCMPORD_QPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 07 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(07) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPORD_QPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5403, 543, 4902}, + /* 4787 : VCMPORD_QPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 07 ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(07) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPORD_QPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+5414, 544, 4903}, + /* 4788 : VCMPORD_QSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 07 ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(07) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPORD_QSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5425, 545, 4904}, + /* 4789 : VCMPORD_QSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 07 ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(07) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPORD_QSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5436, 545, 4905}, + /* 4790 : VCMPEQ_UQPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 08 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(08) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPEQ_UQPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5447, 543, 4906}, + /* 4791 : VCMPEQ_UQPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 08 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(08) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPEQ_UQPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5458, 543, 4907}, + /* 4792 : VCMPEQ_UQPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 08 ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(08) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPEQ_UQPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+5469, 544, 4908}, + /* 4793 : VCMPEQ_UQPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 08 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(08) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPEQ_UQPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5480, 543, 4909}, + /* 4794 : VCMPEQ_UQPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 08 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(08) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPEQ_UQPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5491, 543, 4910}, + /* 4795 : VCMPEQ_UQPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 08 ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(08) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPEQ_UQPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+5502, 544, 4911}, + /* 4796 : VCMPEQ_UQSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 08 ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(08) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPEQ_UQSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5513, 545, 4912}, + /* 4797 : VCMPEQ_UQSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 08 ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(08) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPEQ_UQSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5524, 545, 4913}, + /* 4798 : VCMPNGEPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 09 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(09) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNGEPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5535, 543, 4914}, + /* 4799 : VCMPNGEPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 09 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(09) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNGEPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5546, 543, 4915}, + /* 4800 : VCMPNGEPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 09 ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(09) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNGEPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+5557, 544, 4916}, + /* 4801 : VCMPNGEPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 09 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(09) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNGEPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5568, 543, 4917}, + /* 4802 : VCMPNGEPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 09 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(09) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNGEPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5579, 543, 4918}, + /* 4803 : VCMPNGEPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 09 ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(09) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNGEPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+5590, 544, 4919}, + /* 4804 : VCMPNGESD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 09 ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(09) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNGESD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5601, 545, 4920}, + /* 4805 : VCMPNGESS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 09 ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(09) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNGESS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5612, 545, 4921}, + /* 4806 : VCMPNGE_USPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 09 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(09) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNGE_USPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5535, 543, 4922}, + /* 4807 : VCMPNGE_USPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 09 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(09) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNGE_USPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5546, 543, 4923}, + /* 4808 : VCMPNGE_USPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 09 ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(09) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNGE_USPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+5557, 544, 4924}, + /* 4809 : VCMPNGE_USPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 09 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(09) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNGE_USPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5568, 543, 4925}, + /* 4810 : VCMPNGE_USPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 09 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(09) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNGE_USPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5579, 543, 4926}, + /* 4811 : VCMPNGE_USPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 09 ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(09) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNGE_USPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+5590, 544, 4927}, + /* 4812 : VCMPNGE_USSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 09 ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(09) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNGE_USSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5601, 545, 4928}, + /* 4813 : VCMPNGE_USSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 09 ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(09) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNGE_USSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5612, 545, 4929}, + /* 4814 : VCMPNGTPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 0a ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(0a) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNGTPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5623, 543, 4930}, + /* 4815 : VCMPNGTPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 0a ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(0a) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNGTPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5634, 543, 4931}, + /* 4816 : VCMPNGTPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 0a ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(0a) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNGTPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+5645, 544, 4932}, + /* 4817 : VCMPNGTPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 0a ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(0a) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNGTPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5656, 543, 4933}, + /* 4818 : VCMPNGTPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 0a ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(0a) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNGTPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5667, 543, 4934}, + /* 4819 : VCMPNGTPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 0a ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(0a) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNGTPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+5678, 544, 4935}, + /* 4820 : VCMPNGTSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 0a ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(0a) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNGTSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5689, 545, 4936}, + /* 4821 : VCMPNGTSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 0a ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(0a) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNGTSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5700, 545, 4937}, + /* 4822 : VCMPNGT_USPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 0a ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(0a) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNGT_USPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5623, 543, 4938}, + /* 4823 : VCMPNGT_USPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 0a ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(0a) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNGT_USPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5634, 543, 4939}, + /* 4824 : VCMPNGT_USPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 0a ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(0a) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNGT_USPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+5645, 544, 4940}, + /* 4825 : VCMPNGT_USPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 0a ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(0a) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNGT_USPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5656, 543, 4941}, + /* 4826 : VCMPNGT_USPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 0a ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(0a) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNGT_USPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5667, 543, 4942}, + /* 4827 : VCMPNGT_USPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 0a ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(0a) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNGT_USPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+5678, 544, 4943}, + /* 4828 : VCMPNGT_USSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 0a ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(0a) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNGT_USSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5689, 545, 4944}, + /* 4829 : VCMPNGT_USSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 0a ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(0a) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNGT_USSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5700, 545, 4945}, + /* 4830 : VCMPFALSEPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 0b ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(0b) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPFALSEPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5711, 543, 4946}, + /* 4831 : VCMPFALSEPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 0b ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(0b) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPFALSEPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5722, 543, 4947}, + /* 4832 : VCMPFALSEPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 0b ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(0b) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPFALSEPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+5733, 544, 4948}, + /* 4833 : VCMPFALSEPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 0b ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(0b) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPFALSEPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5744, 543, 4949}, + /* 4834 : VCMPFALSEPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 0b ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(0b) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPFALSEPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5755, 543, 4950}, + /* 4835 : VCMPFALSEPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 0b ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(0b) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPFALSEPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+5766, 544, 4951}, + /* 4836 : VCMPFALSESD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 0b ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(0b) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPFALSESD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5777, 545, 4952}, + /* 4837 : VCMPFALSESS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 0b ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(0b) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPFALSESS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5788, 545, 4953}, + /* 4838 : VCMPFALSE_OQPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 0b ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(0b) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPFALSE_OQPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5711, 543, 4954}, + /* 4839 : VCMPFALSE_OQPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 0b ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(0b) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPFALSE_OQPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5722, 543, 4955}, + /* 4840 : VCMPFALSE_OQPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 0b ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(0b) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPFALSE_OQPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+5733, 544, 4956}, + /* 4841 : VCMPFALSE_OQPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 0b ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(0b) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPFALSE_OQPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5744, 543, 4957}, + /* 4842 : VCMPFALSE_OQPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 0b ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(0b) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPFALSE_OQPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5755, 543, 4958}, + /* 4843 : VCMPFALSE_OQPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 0b ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(0b) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPFALSE_OQPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+5766, 544, 4959}, + /* 4844 : VCMPFALSE_OQSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 0b ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(0b) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPFALSE_OQSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5777, 545, 4960}, + /* 4845 : VCMPFALSE_OQSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 0b ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(0b) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPFALSE_OQSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5788, 545, 4961}, + /* 4846 : VCMPNEQ_OQPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 0c ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(0c) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNEQ_OQPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5799, 543, 4962}, + /* 4847 : VCMPNEQ_OQPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 0c ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(0c) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNEQ_OQPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5810, 543, 4963}, + /* 4848 : VCMPNEQ_OQPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 0c ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(0c) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNEQ_OQPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+5821, 544, 4964}, + /* 4849 : VCMPNEQ_OQPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 0c ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(0c) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNEQ_OQPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5832, 543, 4965}, + /* 4850 : VCMPNEQ_OQPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 0c ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(0c) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNEQ_OQPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5843, 543, 4966}, + /* 4851 : VCMPNEQ_OQPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 0c ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(0c) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNEQ_OQPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+5854, 544, 4967}, + /* 4852 : VCMPNEQ_OQSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 0c ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(0c) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNEQ_OQSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5865, 545, 4968}, + /* 4853 : VCMPNEQ_OQSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 0c ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(0c) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNEQ_OQSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5876, 545, 4969}, + /* 4854 : VCMPGEPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 0d ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(0d) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPGEPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5887, 543, 4970}, + /* 4855 : VCMPGEPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 0d ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(0d) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPGEPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5898, 543, 4971}, + /* 4856 : VCMPGEPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 0d ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(0d) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPGEPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+5909, 544, 4972}, + /* 4857 : VCMPGEPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 0d ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(0d) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPGEPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5920, 543, 4973}, + /* 4858 : VCMPGEPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 0d ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(0d) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPGEPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5931, 543, 4974}, + /* 4859 : VCMPGEPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 0d ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(0d) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPGEPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+5942, 544, 4975}, + /* 4860 : VCMPGESD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 0d ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(0d) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPGESD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5953, 545, 4976}, + /* 4861 : VCMPGESS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 0d ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(0d) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPGESS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5964, 545, 4977}, + /* 4862 : VCMPGE_OSPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 0d ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(0d) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPGE_OSPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5887, 543, 4978}, + /* 4863 : VCMPGE_OSPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 0d ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(0d) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPGE_OSPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5898, 543, 4979}, + /* 4864 : VCMPGE_OSPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 0d ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(0d) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPGE_OSPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+5909, 544, 4980}, + /* 4865 : VCMPGE_OSPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 0d ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(0d) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPGE_OSPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5920, 543, 4981}, + /* 4866 : VCMPGE_OSPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 0d ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(0d) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPGE_OSPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+5931, 543, 4982}, + /* 4867 : VCMPGE_OSPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 0d ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(0d) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPGE_OSPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+5942, 544, 4983}, + /* 4868 : VCMPGE_OSSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 0d ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(0d) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPGE_OSSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5953, 545, 4984}, + /* 4869 : VCMPGE_OSSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 0d ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(0d) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPGE_OSSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+5964, 545, 4985}, + /* 4870 : VCMPGTPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 0e ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(0e) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPGTPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5975, 543, 4986}, + /* 4871 : VCMPGTPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 0e ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(0e) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPGTPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5986, 543, 4987}, + /* 4872 : VCMPGTPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 0e ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(0e) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPGTPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+5997, 544, 4988}, + /* 4873 : VCMPGTPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 0e ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(0e) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPGTPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+6008, 543, 4989}, + /* 4874 : VCMPGTPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 0e ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(0e) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPGTPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+6019, 543, 4990}, + /* 4875 : VCMPGTPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 0e ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(0e) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPGTPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+6030, 544, 4991}, + /* 4876 : VCMPGTSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 0e ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(0e) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPGTSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+6041, 545, 4992}, + /* 4877 : VCMPGTSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 0e ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(0e) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPGTSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+6052, 545, 4993}, + /* 4878 : VCMPGT_OSPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 0e ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(0e) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPGT_OSPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5975, 543, 4994}, + /* 4879 : VCMPGT_OSPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 0e ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(0e) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPGT_OSPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+5986, 543, 4995}, + /* 4880 : VCMPGT_OSPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 0e ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(0e) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPGT_OSPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+5997, 544, 4996}, + /* 4881 : VCMPGT_OSPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 0e ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(0e) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPGT_OSPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+6008, 543, 4997}, + /* 4882 : VCMPGT_OSPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 0e ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(0e) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPGT_OSPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+6019, 543, 4998}, + /* 4883 : VCMPGT_OSPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 0e ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(0e) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPGT_OSPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+6030, 544, 4999}, + /* 4884 : VCMPGT_OSSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 0e ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(0e) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPGT_OSSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+6041, 545, 5000}, + /* 4885 : VCMPGT_OSSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 0e ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(0e) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPGT_OSSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+6052, 545, 5001}, + /* 4886 : VCMPTRUEPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 0f ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(0f) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPTRUEPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+6063, 543, 5002}, + /* 4887 : VCMPTRUEPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 0f ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(0f) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPTRUEPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+6074, 543, 5003}, + /* 4888 : VCMPTRUEPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 0f ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(0f) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPTRUEPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+6085, 544, 5004}, + /* 4889 : VCMPTRUEPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 0f ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(0f) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPTRUEPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+6096, 543, 5005}, + /* 4890 : VCMPTRUEPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 0f ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(0f) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPTRUEPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+6107, 543, 5006}, + /* 4891 : VCMPTRUEPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 0f ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(0f) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPTRUEPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+6118, 544, 5007}, + /* 4892 : VCMPTRUESD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 0f ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(0f) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPTRUESD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+6129, 545, 5008}, + /* 4893 : VCMPTRUESS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 0f ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(0f) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPTRUESS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+6140, 545, 5009}, + /* 4894 : VCMPTRUE_UQPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 0f ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(0f) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPTRUE_UQPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+6063, 543, 5010}, + /* 4895 : VCMPTRUE_UQPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 0f ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(0f) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPTRUE_UQPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+6074, 543, 5011}, + /* 4896 : VCMPTRUE_UQPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 0f ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(0f) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPTRUE_UQPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+6085, 544, 5012}, + /* 4897 : VCMPTRUE_UQPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 0f ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(0f) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPTRUE_UQPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+6096, 543, 5013}, + /* 4898 : VCMPTRUE_UQPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 0f ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(0f) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPTRUE_UQPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+6107, 543, 5014}, + /* 4899 : VCMPTRUE_UQPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 0f ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(0f) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPTRUE_UQPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+6118, 544, 5015}, + /* 4900 : VCMPTRUE_UQSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 0f ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(0f) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPTRUE_UQSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+6129, 545, 5016}, + /* 4901 : VCMPTRUE_UQSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 0f ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(0f) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPTRUE_UQSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+6140, 545, 5017}, + /* 4902 : VCMPEQ_OSPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 10 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(10) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPEQ_OSPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+6151, 543, 5018}, + /* 4903 : VCMPEQ_OSPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 10 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(10) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPEQ_OSPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+6162, 543, 5019}, + /* 4904 : VCMPEQ_OSPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 10 ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(10) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPEQ_OSPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+6173, 544, 5020}, + /* 4905 : VCMPEQ_OSPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 10 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(10) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPEQ_OSPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+6184, 543, 5021}, + /* 4906 : VCMPEQ_OSPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 10 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(10) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPEQ_OSPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+6195, 543, 5022}, + /* 4907 : VCMPEQ_OSPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 10 ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(10) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPEQ_OSPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+6206, 544, 5023}, + /* 4908 : VCMPEQ_OSSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 10 ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(10) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPEQ_OSSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+6217, 545, 5024}, + /* 4909 : VCMPEQ_OSSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 10 ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(10) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPEQ_OSSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+6228, 545, 5025}, + /* 4910 : VCMPLT_OQPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 11 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(11) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPLT_OQPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+6239, 543, 5026}, + /* 4911 : VCMPLT_OQPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 11 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(11) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPLT_OQPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+6250, 543, 5027}, + /* 4912 : VCMPLT_OQPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 11 ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(11) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPLT_OQPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+6261, 544, 5028}, + /* 4913 : VCMPLT_OQPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 11 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(11) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPLT_OQPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+6272, 543, 5029}, + /* 4914 : VCMPLT_OQPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 11 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(11) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPLT_OQPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+6283, 543, 5030}, + /* 4915 : VCMPLT_OQPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 11 ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(11) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPLT_OQPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+6294, 544, 5031}, + /* 4916 : VCMPLT_OQSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 11 ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(11) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPLT_OQSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+6305, 545, 5032}, + /* 4917 : VCMPLT_OQSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 11 ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(11) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPLT_OQSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+6316, 545, 5033}, + /* 4918 : VCMPLE_OQPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 12 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(12) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPLE_OQPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+6327, 543, 5034}, + /* 4919 : VCMPLE_OQPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 12 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(12) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPLE_OQPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+6338, 543, 5035}, + /* 4920 : VCMPLE_OQPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 12 ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(12) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPLE_OQPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+6349, 544, 5036}, + /* 4921 : VCMPLE_OQPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 12 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(12) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPLE_OQPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+6360, 543, 5037}, + /* 4922 : VCMPLE_OQPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 12 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(12) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPLE_OQPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+6371, 543, 5038}, + /* 4923 : VCMPLE_OQPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 12 ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(12) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPLE_OQPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+6382, 544, 5039}, + /* 4924 : VCMPLE_OQSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 12 ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(12) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPLE_OQSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+6393, 545, 5040}, + /* 4925 : VCMPLE_OQSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 12 ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(12) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPLE_OQSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+6404, 545, 5041}, + /* 4926 : VCMPUNORD_SPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 13 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(13) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPUNORD_SPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+6415, 543, 5042}, + /* 4927 : VCMPUNORD_SPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 13 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(13) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPUNORD_SPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+6426, 543, 5043}, + /* 4928 : VCMPUNORD_SPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 13 ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(13) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPUNORD_SPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+6437, 544, 5044}, + /* 4929 : VCMPUNORD_SPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 13 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(13) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPUNORD_SPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+6448, 543, 5045}, + /* 4930 : VCMPUNORD_SPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 13 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(13) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPUNORD_SPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+6459, 543, 5046}, + /* 4931 : VCMPUNORD_SPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 13 ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(13) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPUNORD_SPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+6470, 544, 5047}, + /* 4932 : VCMPUNORD_SSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 13 ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(13) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPUNORD_SSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+6481, 545, 5048}, + /* 4933 : VCMPUNORD_SSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 13 ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(13) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPUNORD_SSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+6492, 545, 5049}, + /* 4934 : VCMPNEQ_USPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 14 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(14) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNEQ_USPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+6503, 543, 5050}, + /* 4935 : VCMPNEQ_USPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 14 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(14) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNEQ_USPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+6514, 543, 5051}, + /* 4936 : VCMPNEQ_USPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 14 ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(14) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNEQ_USPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+6525, 544, 5052}, + /* 4937 : VCMPNEQ_USPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 14 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(14) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNEQ_USPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+6536, 543, 5053}, + /* 4938 : VCMPNEQ_USPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 14 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(14) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNEQ_USPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+6547, 543, 5054}, + /* 4939 : VCMPNEQ_USPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 14 ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(14) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNEQ_USPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+6558, 544, 5055}, + /* 4940 : VCMPNEQ_USSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 14 ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(14) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNEQ_USSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+6569, 545, 5056}, + /* 4941 : VCMPNEQ_USSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 14 ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(14) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNEQ_USSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+6580, 545, 5057}, + /* 4942 : VCMPNLT_UQPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 15 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(15) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNLT_UQPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+6591, 543, 5058}, + /* 4943 : VCMPNLT_UQPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 15 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(15) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNLT_UQPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+6602, 543, 5059}, + /* 4944 : VCMPNLT_UQPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 15 ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(15) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNLT_UQPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+6613, 544, 5060}, + /* 4945 : VCMPNLT_UQPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 15 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(15) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNLT_UQPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+6624, 543, 5061}, + /* 4946 : VCMPNLT_UQPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 15 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(15) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNLT_UQPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+6635, 543, 5062}, + /* 4947 : VCMPNLT_UQPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 15 ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(15) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNLT_UQPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+6646, 544, 5063}, + /* 4948 : VCMPNLT_UQSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 15 ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(15) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNLT_UQSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+6657, 545, 5064}, + /* 4949 : VCMPNLT_UQSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 15 ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(15) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNLT_UQSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+6668, 545, 5065}, + /* 4950 : VCMPNLE_UQPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 16 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(16) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNLE_UQPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+6679, 543, 5066}, + /* 4951 : VCMPNLE_UQPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 16 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(16) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNLE_UQPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+6690, 543, 5067}, + /* 4952 : VCMPNLE_UQPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 16 ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(16) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNLE_UQPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+6701, 544, 5068}, + /* 4953 : VCMPNLE_UQPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 16 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(16) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNLE_UQPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+6712, 543, 5069}, + /* 4954 : VCMPNLE_UQPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 16 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(16) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNLE_UQPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+6723, 543, 5070}, + /* 4955 : VCMPNLE_UQPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 16 ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(16) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNLE_UQPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+6734, 544, 5071}, + /* 4956 : VCMPNLE_UQSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 16 ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(16) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNLE_UQSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+6745, 545, 5072}, + /* 4957 : VCMPNLE_UQSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 16 ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(16) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNLE_UQSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+6756, 545, 5073}, + /* 4958 : VCMPORD_SPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 17 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(17) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPORD_SPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+6767, 543, 5074}, + /* 4959 : VCMPORD_SPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 17 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(17) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPORD_SPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+6778, 543, 5075}, + /* 4960 : VCMPORD_SPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 17 ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(17) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPORD_SPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+6789, 544, 5076}, + /* 4961 : VCMPORD_SPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 17 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(17) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPORD_SPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+6800, 543, 5077}, + /* 4962 : VCMPORD_SPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 17 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(17) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPORD_SPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+6811, 543, 5078}, + /* 4963 : VCMPORD_SPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 17 ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(17) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPORD_SPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+6822, 544, 5079}, + /* 4964 : VCMPORD_SSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 17 ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(17) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPORD_SSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+6833, 545, 5080}, + /* 4965 : VCMPORD_SSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 17 ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(17) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPORD_SSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+6844, 545, 5081}, + /* 4966 : VCMPEQ_USPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 18 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(18) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPEQ_USPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+6855, 543, 5082}, + /* 4967 : VCMPEQ_USPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 18 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(18) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPEQ_USPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+6866, 543, 5083}, + /* 4968 : VCMPEQ_USPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 18 ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(18) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPEQ_USPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+6877, 544, 5084}, + /* 4969 : VCMPEQ_USPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 18 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(18) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPEQ_USPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+6888, 543, 5085}, + /* 4970 : VCMPEQ_USPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 18 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(18) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPEQ_USPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+6899, 543, 5086}, + /* 4971 : VCMPEQ_USPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 18 ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(18) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPEQ_USPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+6910, 544, 5087}, + /* 4972 : VCMPEQ_USSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 18 ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(18) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPEQ_USSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+6921, 545, 5088}, + /* 4973 : VCMPEQ_USSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 18 ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(18) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPEQ_USSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+6932, 545, 5089}, + /* 4974 : VCMPNGE_UQPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 19 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(19) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNGE_UQPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+6943, 543, 5090}, + /* 4975 : VCMPNGE_UQPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 19 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(19) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNGE_UQPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+6954, 543, 5091}, + /* 4976 : VCMPNGE_UQPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 19 ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(19) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNGE_UQPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+6965, 544, 5092}, + /* 4977 : VCMPNGE_UQPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 19 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(19) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNGE_UQPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+6976, 543, 5093}, + /* 4978 : VCMPNGE_UQPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 19 ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(19) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNGE_UQPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+6987, 543, 5094}, + /* 4979 : VCMPNGE_UQPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 19 ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(19) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNGE_UQPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+6998, 544, 5095}, + /* 4980 : VCMPNGE_UQSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 19 ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(19) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNGE_UQSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+7009, 545, 5096}, + /* 4981 : VCMPNGE_UQSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 19 ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(19) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNGE_UQSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+7020, 545, 5097}, + /* 4982 : VCMPNGT_UQPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 1a ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(1a) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNGT_UQPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+7031, 543, 5098}, + /* 4983 : VCMPNGT_UQPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 1a ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(1a) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNGT_UQPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+7042, 543, 5099}, + /* 4984 : VCMPNGT_UQPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 1a ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(1a) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNGT_UQPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+7053, 544, 5100}, + /* 4985 : VCMPNGT_UQPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 1a ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(1a) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNGT_UQPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+7064, 543, 5101}, + /* 4986 : VCMPNGT_UQPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 1a ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(1a) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNGT_UQPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+7075, 543, 5102}, + /* 4987 : VCMPNGT_UQPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 1a ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(1a) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNGT_UQPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+7086, 544, 5103}, + /* 4988 : VCMPNGT_UQSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 1a ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(1a) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNGT_UQSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+7097, 545, 5104}, + /* 4989 : VCMPNGT_UQSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 1a ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(1a) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNGT_UQSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+7108, 545, 5105}, + /* 4990 : VCMPFALSE_OSPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 1b ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(1b) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPFALSE_OSPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+7119, 543, 5106}, + /* 4991 : VCMPFALSE_OSPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 1b ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(1b) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPFALSE_OSPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+7130, 543, 5107}, + /* 4992 : VCMPFALSE_OSPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 1b ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(1b) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPFALSE_OSPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+7141, 544, 5108}, + /* 4993 : VCMPFALSE_OSPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 1b ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(1b) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPFALSE_OSPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+7152, 543, 5109}, + /* 4994 : VCMPFALSE_OSPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 1b ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(1b) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPFALSE_OSPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+7163, 543, 5110}, + /* 4995 : VCMPFALSE_OSPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 1b ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(1b) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPFALSE_OSPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+7174, 544, 5111}, + /* 4996 : VCMPFALSE_OSSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 1b ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(1b) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPFALSE_OSSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+7185, 545, 5112}, + /* 4997 : VCMPFALSE_OSSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 1b ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(1b) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPFALSE_OSSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+7196, 545, 5113}, + /* 4998 : VCMPNEQ_OSPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 1c ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(1c) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNEQ_OSPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+7207, 543, 5114}, + /* 4999 : VCMPNEQ_OSPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 1c ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(1c) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNEQ_OSPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+7218, 543, 5115}, + /* 5000 : VCMPNEQ_OSPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 1c ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(1c) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNEQ_OSPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+7229, 544, 5116}, + /* 5001 : VCMPNEQ_OSPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 1c ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(1c) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNEQ_OSPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+7240, 543, 5117}, + /* 5002 : VCMPNEQ_OSPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 1c ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(1c) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPNEQ_OSPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+7251, 543, 5118}, + /* 5003 : VCMPNEQ_OSPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 1c ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(1c) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNEQ_OSPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+7262, 544, 5119}, + /* 5004 : VCMPNEQ_OSSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 1c ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(1c) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNEQ_OSSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+7273, 545, 5120}, + /* 5005 : VCMPNEQ_OSSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 1c ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(1c) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPNEQ_OSSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+7284, 545, 5121}, + /* 5006 : VCMPGE_OQPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 1d ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(1d) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPGE_OQPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+7295, 543, 5122}, + /* 5007 : VCMPGE_OQPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 1d ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(1d) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPGE_OQPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+7306, 543, 5123}, + /* 5008 : VCMPGE_OQPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 1d ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(1d) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPGE_OQPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+7317, 544, 5124}, + /* 5009 : VCMPGE_OQPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 1d ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(1d) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPGE_OQPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+7328, 543, 5125}, + /* 5010 : VCMPGE_OQPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 1d ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(1d) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPGE_OQPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+7339, 543, 5126}, + /* 5011 : VCMPGE_OQPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 1d ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(1d) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPGE_OQPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+7350, 544, 5127}, + /* 5012 : VCMPGE_OQSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 1d ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(1d) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPGE_OQSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+7361, 545, 5128}, + /* 5013 : VCMPGE_OQSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 1d ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(1d) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPGE_OQSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+7372, 545, 5129}, + /* 5014 : VCMPGT_OQPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 1e ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(1e) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPGT_OQPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+7383, 543, 5130}, + /* 5015 : VCMPGT_OQPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 1e ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(1e) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPGT_OQPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+7394, 543, 5131}, + /* 5016 : VCMPGT_OQPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 1e ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(1e) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPGT_OQPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+7405, 544, 5132}, + /* 5017 : VCMPGT_OQPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 1e ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(1e) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPGT_OQPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+7416, 543, 5133}, + /* 5018 : VCMPGT_OQPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 1e ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(1e) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPGT_OQPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+7427, 543, 5134}, + /* 5019 : VCMPGT_OQPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 1e ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(1e) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPGT_OQPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+7438, 544, 5135}, + /* 5020 : VCMPGT_OQSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 1e ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(1e) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPGT_OQSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+7449, 545, 5136}, + /* 5021 : VCMPGT_OQSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 1e ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(1e) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPGT_OQSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+7460, 545, 5137}, + /* 5022 : VCMPTRUE_USPD kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r 1f ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 001(1f) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPTRUE_USPD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+7471, 543, 5138}, + /* 5023 : VCMPTRUE_USPD kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r 1f ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 001(1f) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPTRUE_USPD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+7482, 543, 5139}, + /* 5024 : VCMPTRUE_USPD kreg|mask,zmmreg,zmmrm512|b64|sae [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r 1f ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 001(1f) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPTRUE_USPD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+7493, 544, 5140}, + /* 5025 : VCMPTRUE_USPS kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.0f.w0 c2 /r 1f ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 001(1f) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPTRUE_USPS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+7504, 543, 5141}, + /* 5026 : VCMPTRUE_USPS kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.0f.w0 c2 /r 1f ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 001(1f) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPTRUE_USPS, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+7515, 543, 5142}, + /* 5027 : VCMPTRUE_USPS kreg|mask,zmmreg,zmmrm512|b32|sae [rvmi:fv: evex.nds.512.0f.w0 c2 /r 1f ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 001(1f) : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPTRUE_USPS, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+7526, 544, 5143}, + /* 5028 : VCMPTRUE_USSD kreg|mask,xmmreg,xmmrm64|sae [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r 1f ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 001(1f) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPTRUE_USSD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+7537, 545, 5144}, + /* 5029 : VCMPTRUE_USSS kreg|mask,xmmreg,xmmrm32|sae [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r 1f ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 001(1f) : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPTRUE_USSS, 3, {OPMASKREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+7548, 545, 5145}, + /* 5030 : VCMPPD kreg|mask,xmmreg,xmmrm128|b64,imm8 [rvmi:fv: evex.nds.128.66.0f.w1 c2 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c2) 120 023 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPPD, 4, {OPMASKREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK,0,B64,0,0}, nasm_bytecodes+18253, 543, 5146}, + /* 5031 : VCMPPD kreg|mask,ymmreg,ymmrm256|b64,imm8 [rvmi:fv: evex.nds.256.66.0f.w1 c2 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c2) 120 023 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPPD, 4, {OPMASKREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK,0,B64,0,0}, nasm_bytecodes+18263, 543, 5147}, + /* 5032 : VCMPPD kreg|mask,zmmreg,zmmrm512|b64|sae,imm8 [rvmi:fv: evex.nds.512.66.0f.w1 c2 /r ib ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c2) 120 023 : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPPD, 4, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK,0,B64|SAE,0,0}, nasm_bytecodes+18273, 544, 5148}, + /* 5033 : VCMPPS kreg|mask,xmmreg,xmmrm128|b32,imm8 [rvmi:fv: evex.nds.128.0f.w0 c2 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c2) 120 023 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPPS, 4, {OPMASKREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK,0,B32,0,0}, nasm_bytecodes+18283, 543, 5149}, + /* 5034 : VCMPPS kreg|mask,ymmreg,ymmrm256|b32,imm8 [rvmi:fv: evex.nds.256.0f.w0 c2 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c2) 120 023 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCMPPS, 4, {OPMASKREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK,0,B32,0,0}, nasm_bytecodes+18293, 543, 5150}, + /* 5035 : VCMPPS kreg|mask,zmmreg,zmmrm512|b32|sae,imm8 [rvmi:fv: evex.nds.512.0f.w0 c2 /r ib ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c2) 120 023 : EVEX,PROT,AVX512,FUTURE */ + {I_VCMPPS, 4, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK,0,B32|SAE,0,0}, nasm_bytecodes+18303, 544, 5151}, + /* 5036 : VCMPSD kreg|mask,xmmreg,xmmrm64|sae,imm8 [rvmi:t1s: evex.nds.lig.f2.0f.w1 c2 /r ib ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(c2) 120 023 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPSD, 4, {OPMASKREG,XMMREG,RM_XMM|BITS64,IMM_NORMAL|BITS8,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+18313, 545, 5152}, + /* 5037 : VCMPSS kreg|mask,xmmreg,xmmrm32|sae,imm8 [rvmi:t1s: evex.nds.lig.f3.0f.w0 c2 /r ib ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(c2) 120 023 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCMPSS, 4, {OPMASKREG,XMMREG,RM_XMM|BITS32,IMM_NORMAL|BITS8,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+18323, 545, 5153}, + /* 5038 : VCOMISD xmmreg,xmmrm64|sae [rm:t1s: evex.lig.66.0f.w1 2f /r ] FL,AVX512,FUTURE */ + /* 250(f1 fd 08) 306 001(2f) 110 : LIG,FL,EVEX,PROT,AVX512,FUTURE */ + {I_VCOMISD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+31045, 548, 5154}, + /* 5039 : VCOMISS xmmreg,xmmrm32|sae [rm:t1s: evex.lig.0f.w0 2f /r ] FL,AVX512,FUTURE */ + /* 250(f1 7c 08) 306 001(2f) 110 : LIG,FL,EVEX,PROT,AVX512,FUTURE */ + {I_VCOMISS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+31054, 548, 5155}, + /* 5040 : VCOMPRESSPD mem128|mask,xmmreg [mr:t1s: evex.128.66.0f38.w1 8a /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 fd 08) 306 001(8a) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCOMPRESSPD, 2, {MEMORY|BITS128,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+31063, 543, 5156}, + /* 5041 : VCOMPRESSPD mem256|mask,ymmreg [mr:t1s: evex.256.66.0f38.w1 8a /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 fd 28) 306 001(8a) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCOMPRESSPD, 2, {MEMORY|BITS256,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+31072, 543, 5157}, + /* 5042 : VCOMPRESSPD mem512|mask,zmmreg [mr:t1s: evex.512.66.0f38.w1 8a /r ] AVX512,FUTURE */ + /* 250(f2 fd 48) 306 001(8a) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VCOMPRESSPD, 2, {MEMORY|BITS512,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+31081, 544, 5158}, + /* 5043 : VCOMPRESSPD xmmreg|mask|z,xmmreg [mr: evex.128.66.0f38.w1 8a /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 fd 08) 300 001(8a) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCOMPRESSPD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+31090, 543, 5159}, + /* 5044 : VCOMPRESSPD ymmreg|mask|z,ymmreg [mr: evex.256.66.0f38.w1 8a /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 fd 28) 300 001(8a) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCOMPRESSPD, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+31099, 543, 5160}, + /* 5045 : VCOMPRESSPD zmmreg|mask|z,zmmreg [mr: evex.512.66.0f38.w1 8a /r ] AVX512,FUTURE */ + /* 250(f2 fd 48) 300 001(8a) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VCOMPRESSPD, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+31108, 544, 5161}, + /* 5046 : VCOMPRESSPS mem128|mask,xmmreg [mr:t1s: evex.128.66.0f38.w0 8a /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 08) 306 001(8a) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCOMPRESSPS, 2, {MEMORY|BITS128,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+31117, 543, 5162}, + /* 5047 : VCOMPRESSPS mem256|mask,ymmreg [mr:t1s: evex.256.66.0f38.w0 8a /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 28) 306 001(8a) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCOMPRESSPS, 2, {MEMORY|BITS256,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+31126, 543, 5163}, + /* 5048 : VCOMPRESSPS mem512|mask,zmmreg [mr:t1s: evex.512.66.0f38.w0 8a /r ] AVX512,FUTURE */ + /* 250(f2 7d 48) 306 001(8a) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VCOMPRESSPS, 2, {MEMORY|BITS512,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+31135, 544, 5164}, + /* 5049 : VCOMPRESSPS xmmreg|mask|z,xmmreg [mr: evex.128.66.0f38.w0 8a /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 08) 300 001(8a) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCOMPRESSPS, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+31144, 543, 5165}, + /* 5050 : VCOMPRESSPS ymmreg|mask|z,ymmreg [mr: evex.256.66.0f38.w0 8a /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 28) 300 001(8a) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCOMPRESSPS, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+31153, 543, 5166}, + /* 5051 : VCOMPRESSPS zmmreg|mask|z,zmmreg [mr: evex.512.66.0f38.w0 8a /r ] AVX512,FUTURE */ + /* 250(f2 7d 48) 300 001(8a) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VCOMPRESSPS, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+31162, 544, 5167}, + /* 5052 : VCVTDQ2PD xmmreg|mask|z,xmmrm64|b32 [rm:hv: evex.128.f3.0f.w0 e6 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7e 08) 302 001(e6) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTDQ2PD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+31171, 543, 5168}, + /* 5053 : VCVTDQ2PD ymmreg|mask|z,xmmrm128|b32 [rm:hv: evex.256.f3.0f.w0 e6 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7e 28) 302 001(e6) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTDQ2PD, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+31180, 543, 5169}, + /* 5054 : VCVTDQ2PD zmmreg|mask|z,ymmrm256|b32|er [rm:hv: evex.512.f3.0f.w0 e6 /r ] AVX512,FUTURE */ + /* 250(f1 7e 48) 302 001(e6) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VCVTDQ2PD, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+31189, 544, 5170}, + /* 5055 : VCVTDQ2PS xmmreg|mask|z,xmmrm128|b32 [rm:fv: evex.128.0f.w0 5b /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7c 08) 301 001(5b) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTDQ2PS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+31198, 543, 5171}, + /* 5056 : VCVTDQ2PS ymmreg|mask|z,ymmrm256|b32 [rm:fv: evex.256.0f.w0 5b /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7c 28) 301 001(5b) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTDQ2PS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+31207, 543, 5172}, + /* 5057 : VCVTDQ2PS zmmreg|mask|z,zmmrm512|b32|er [rm:fv: evex.512.0f.w0 5b /r ] AVX512,FUTURE */ + /* 250(f1 7c 48) 301 001(5b) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VCVTDQ2PS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+31216, 544, 5173}, + /* 5058 : VCVTPD2DQ xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.f2.0f.w1 e6 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 ff 08) 301 001(e6) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTPD2DQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+31225, 543, 5174}, + /* 5059 : VCVTPD2DQ xmmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.f2.0f.w1 e6 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 ff 28) 301 001(e6) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTPD2DQ, 2, {XMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+31234, 543, 5175}, + /* 5060 : VCVTPD2DQ ymmreg|mask|z,zmmrm512|b64|er [rm:fv: evex.512.f2.0f.w1 e6 /r ] AVX512,FUTURE */ + /* 250(f1 ff 48) 301 001(e6) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VCVTPD2DQ, 2, {YMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+31243, 544, 5176}, + /* 5061 : VCVTPD2PS xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.66.0f.w1 5a /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 fd 08) 301 001(5a) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTPD2PS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+31252, 543, 5177}, + /* 5062 : VCVTPD2PS xmmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.66.0f.w1 5a /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 fd 28) 301 001(5a) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTPD2PS, 2, {XMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+31261, 543, 5178}, + /* 5063 : VCVTPD2PS ymmreg|mask|z,zmmrm512|b64|er [rm:fv: evex.512.66.0f.w1 5a /r ] AVX512,FUTURE */ + /* 250(f1 fd 48) 301 001(5a) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VCVTPD2PS, 2, {YMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+31270, 544, 5179}, + /* 5064 : VCVTPD2QQ xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.66.0f.w1 7b /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f1 fd 08) 301 001(7b) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VCVTPD2QQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+31279, 546, 5180}, + /* 5065 : VCVTPD2QQ ymmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.66.0f.w1 7b /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f1 fd 28) 301 001(7b) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VCVTPD2QQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+31288, 546, 5181}, + /* 5066 : VCVTPD2QQ zmmreg|mask|z,zmmrm512|b64|er [rm:fv: evex.512.66.0f.w1 7b /r ] AVX512DQ,FUTURE */ + /* 250(f1 fd 48) 301 001(7b) 110 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VCVTPD2QQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+31297, 547, 5182}, + /* 5067 : VCVTPD2UDQ xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.0f.w1 79 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 fc 08) 301 001(79) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTPD2UDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+31306, 543, 5183}, + /* 5068 : VCVTPD2UDQ xmmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.0f.w1 79 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 fc 28) 301 001(79) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTPD2UDQ, 2, {XMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+31315, 543, 5184}, + /* 5069 : VCVTPD2UDQ ymmreg|mask|z,zmmrm512|b64|er [rm:fv: evex.512.0f.w1 79 /r ] AVX512,FUTURE */ + /* 250(f1 fc 48) 301 001(79) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VCVTPD2UDQ, 2, {YMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+31324, 544, 5185}, + /* 5070 : VCVTPD2UQQ xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.66.0f.w1 79 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f1 fd 08) 301 001(79) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VCVTPD2UQQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+31333, 546, 5186}, + /* 5071 : VCVTPD2UQQ ymmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.66.0f.w1 79 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f1 fd 28) 301 001(79) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VCVTPD2UQQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+31342, 546, 5187}, + /* 5072 : VCVTPD2UQQ zmmreg|mask|z,zmmrm512|b64|er [rm:fv: evex.512.66.0f.w1 79 /r ] AVX512DQ,FUTURE */ + /* 250(f1 fd 48) 301 001(79) 110 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VCVTPD2UQQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+31351, 547, 5188}, + /* 5073 : VCVTPH2PS xmmreg|mask|z,xmmrm64 [rm:hvm: evex.128.66.0f38.w0 13 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 08) 314 001(13) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTPH2PS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+31360, 543, 5189}, + /* 5074 : VCVTPH2PS ymmreg|mask|z,xmmrm128 [rm:hvm: evex.256.66.0f38.w0 13 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 28) 314 001(13) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTPH2PS, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+31369, 543, 5190}, + /* 5075 : VCVTPH2PS zmmreg|mask|z,ymmrm256|sae [rm:hvm: evex.512.66.0f38.w0 13 /r ] AVX512,FUTURE */ + /* 250(f2 7d 48) 314 001(13) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VCVTPH2PS, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+31378, 544, 5191}, + /* 5076 : VCVTPS2DQ xmmreg|mask|z,xmmrm128|b32 [rm:fv: evex.128.66.0f.w0 5b /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7d 08) 301 001(5b) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTPS2DQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+31387, 543, 5192}, + /* 5077 : VCVTPS2DQ ymmreg|mask|z,ymmrm256|b32 [rm:fv: evex.256.66.0f.w0 5b /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7d 28) 301 001(5b) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTPS2DQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+31396, 543, 5193}, + /* 5078 : VCVTPS2DQ zmmreg|mask|z,zmmrm512|b32|er [rm:fv: evex.512.66.0f.w0 5b /r ] AVX512,FUTURE */ + /* 250(f1 7d 48) 301 001(5b) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VCVTPS2DQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+31405, 544, 5194}, + /* 5079 : VCVTPS2PD xmmreg|mask|z,xmmrm64|b32 [rm:hv: evex.128.0f.w0 5a /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7c 08) 302 001(5a) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTPS2PD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+31414, 543, 5195}, + /* 5080 : VCVTPS2PD ymmreg|mask|z,xmmrm128|b32 [rm:hv: evex.256.0f.w0 5a /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7c 28) 302 001(5a) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTPS2PD, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+31423, 543, 5196}, + /* 5081 : VCVTPS2PD zmmreg|mask|z,ymmrm256|b32|sae [rm:hv: evex.512.0f.w0 5a /r ] AVX512,FUTURE */ + /* 250(f1 7c 48) 302 001(5a) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VCVTPS2PD, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+31432, 544, 5197}, + /* 5082 : VCVTPS2PH xmmreg|mask|z,xmmreg,imm8 [mri:hvm: evex.128.66.0f3a.w0 1d /r ib ] AVX512,AVX512VL,FUTURE */ + /* 250(f3 7d 08) 314 001(1d) 101 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTPS2PH, 3, {XMMREG,XMMREG,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18333, 543, 5198}, + /* 5083 : VCVTPS2PH xmmreg|mask|z,ymmreg,imm8 [mri:hvm: evex.256.66.0f3a.w0 1d /r ib ] AVX512,AVX512VL,FUTURE */ + /* 250(f3 7d 28) 314 001(1d) 101 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTPS2PH, 3, {XMMREG,YMMREG,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18343, 543, 5199}, + /* 5084 : VCVTPS2PH ymmreg|mask|z,zmmreg|sae,imm8 [mri:hvm: evex.512.66.0f3a.w0 1d /r ib ] AVX512,FUTURE */ + /* 250(f3 7d 48) 314 001(1d) 101 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VCVTPS2PH, 3, {YMMREG,ZMMREG,IMM_NORMAL|BITS8,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+18353, 544, 5200}, + /* 5085 : VCVTPS2PH mem64|mask,xmmreg,imm8 [mri:hvm: evex.128.66.0f3a.w0 1d /r ib ] AVX512,AVX512VL,FUTURE */ + /* 250(f3 7d 08) 314 001(1d) 101 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTPS2PH, 3, {MEMORY|BITS64,XMMREG,IMM_NORMAL|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+18333, 543, 5201}, + /* 5086 : VCVTPS2PH mem128|mask,ymmreg,imm8 [mri:hvm: evex.256.66.0f3a.w0 1d /r ib ] AVX512,AVX512VL,FUTURE */ + /* 250(f3 7d 28) 314 001(1d) 101 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTPS2PH, 3, {MEMORY|BITS128,YMMREG,IMM_NORMAL|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+18343, 543, 5202}, + /* 5087 : VCVTPS2PH mem256|mask,zmmreg|sae,imm8 [mri:hvm: evex.512.66.0f3a.w0 1d /r ib ] AVX512,FUTURE */ + /* 250(f3 7d 48) 314 001(1d) 101 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VCVTPS2PH, 3, {MEMORY|BITS256,ZMMREG,IMM_NORMAL|BITS8,0,0}, {MASK,SAE,0,0,0}, nasm_bytecodes+18353, 544, 5203}, + /* 5088 : VCVTPS2QQ xmmreg|mask|z,xmmrm64|b32 [rm:hv: evex.128.66.0f.w0 7b /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f1 7d 08) 302 001(7b) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VCVTPS2QQ, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+31441, 546, 5204}, + /* 5089 : VCVTPS2QQ ymmreg|mask|z,xmmrm128|b32 [rm:hv: evex.256.66.0f.w0 7b /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f1 7d 28) 302 001(7b) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VCVTPS2QQ, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+31450, 546, 5205}, + /* 5090 : VCVTPS2QQ zmmreg|mask|z,ymmrm256|b32|er [rm:hv: evex.512.66.0f.w0 7b /r ] AVX512DQ,FUTURE */ + /* 250(f1 7d 48) 302 001(7b) 110 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VCVTPS2QQ, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+31459, 547, 5206}, + /* 5091 : VCVTPS2UDQ xmmreg|mask|z,xmmrm128|b32 [rm:fv: evex.128.0f.w0 79 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7c 08) 301 001(79) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTPS2UDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+31468, 543, 5207}, + /* 5092 : VCVTPS2UDQ ymmreg|mask|z,ymmrm256|b32 [rm:fv: evex.256.0f.w0 79 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7c 28) 301 001(79) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTPS2UDQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+31477, 543, 5208}, + /* 5093 : VCVTPS2UDQ zmmreg|mask|z,zmmrm512|b32|er [rm:fv: evex.512.0f.w0 79 /r ] AVX512,FUTURE */ + /* 250(f1 7c 48) 301 001(79) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VCVTPS2UDQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+31486, 544, 5209}, + /* 5094 : VCVTPS2UQQ xmmreg|mask|z,xmmrm64|b32 [rm:hv: evex.128.66.0f.w0 79 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f1 7d 08) 302 001(79) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VCVTPS2UQQ, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+31495, 546, 5210}, + /* 5095 : VCVTPS2UQQ ymmreg|mask|z,xmmrm128|b32 [rm:hv: evex.256.66.0f.w0 79 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f1 7d 28) 302 001(79) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VCVTPS2UQQ, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+31504, 546, 5211}, + /* 5096 : VCVTPS2UQQ zmmreg|mask|z,ymmrm256|b32|er [rm:hv: evex.512.66.0f.w0 79 /r ] AVX512DQ,FUTURE */ + /* 250(f1 7d 48) 302 001(79) 110 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VCVTPS2UQQ, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+31513, 547, 5212}, + /* 5097 : VCVTQQ2PD xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.f3.0f.w1 e6 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f1 fe 08) 301 001(e6) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VCVTQQ2PD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+31522, 546, 5213}, + /* 5098 : VCVTQQ2PD ymmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.f3.0f.w1 e6 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f1 fe 28) 301 001(e6) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VCVTQQ2PD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+31531, 546, 5214}, + /* 5099 : VCVTQQ2PD zmmreg|mask|z,zmmrm512|b64|er [rm:fv: evex.512.f3.0f.w1 e6 /r ] AVX512DQ,FUTURE */ + /* 250(f1 fe 48) 301 001(e6) 110 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VCVTQQ2PD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+31540, 547, 5215}, + /* 5100 : VCVTQQ2PS xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.0f.w1 5b /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f1 fc 08) 301 001(5b) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VCVTQQ2PS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+31549, 546, 5216}, + /* 5101 : VCVTQQ2PS xmmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.0f.w1 5b /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f1 fc 28) 301 001(5b) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VCVTQQ2PS, 2, {XMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+31558, 546, 5217}, + /* 5102 : VCVTQQ2PS ymmreg|mask|z,zmmrm512|b64|er [rm:fv: evex.512.0f.w1 5b /r ] AVX512DQ,FUTURE */ + /* 250(f1 fc 48) 301 001(5b) 110 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VCVTQQ2PS, 2, {YMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+31567, 547, 5218}, + /* 5103 : VCVTSD2SI reg32,xmmrm64|er [rm:t1f64: evex.lig.f2.0f.w0 2d /r ] AVX512,FUTURE */ + /* 250(f1 7f 08) 310 001(2d) 110 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCVTSD2SI, 2, {REG_GPR|BITS32,RM_XMM|BITS64,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+31576, 545, 5219}, + /* 5104 : VCVTSD2SI reg64,xmmrm64|er [rm:t1f64: evex.lig.f2.0f.w1 2d /r ] AVX512,FUTURE */ + /* 250(f1 ff 08) 310 001(2d) 110 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCVTSD2SI, 2, {REG_GPR|BITS64,RM_XMM|BITS64,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+31585, 545, 5220}, + /* 5105 : VCVTSD2SS xmmreg|mask|z,xmmreg*,xmmrm64|er [rvm:t1s: evex.nds.lig.f2.0f.w1 5a /r ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(5a) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCVTSD2SS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+31594, 545, 5221}, + /* 5106 : VCVTSD2USI reg32,xmmrm64|er [rm:t1f64: evex.lig.f2.0f.w0 79 /r ] AVX512,FUTURE */ + /* 250(f1 7f 08) 310 001(79) 110 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCVTSD2USI, 2, {REG_GPR|BITS32,RM_XMM|BITS64,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+31612, 545, 5222}, + /* 5107 : VCVTSD2USI reg64,xmmrm64|er [rm:t1f64: evex.lig.f2.0f.w1 79 /r ] AVX512,FUTURE */ + /* 250(f1 ff 08) 310 001(79) 110 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCVTSD2USI, 2, {REG_GPR|BITS64,RM_XMM|BITS64,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+31621, 545, 5223}, + /* 5108 : VCVTSI2SD xmmreg,xmmreg*,rm32 [rvm:t1s: evex.nds.lig.f2.0f.w0 2a /r ] AVX512,FUTURE */ + /* 241(f1 7f 08) 306 001(2a) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCVTSI2SD, 3, {XMMREG,XMMREG,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+31630, 545, 5224}, + /* 5109 : VCVTSI2SD xmmreg,xmmreg*,rm64|er [rvm:t1s: evex.nds.lig.f2.0f.w1 2a /r ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(2a) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCVTSI2SD, 3, {XMMREG,XMMREG,RM_GPR|BITS64,0,0}, {0,0,ER,0,0}, nasm_bytecodes+31648, 545, 5225}, + /* 5110 : VCVTSI2SS xmmreg,xmmreg*,rm32|er [rvm:t1s: evex.nds.lig.f3.0f.w0 2a /r ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(2a) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCVTSI2SS, 3, {XMMREG,XMMREG,RM_GPR|BITS32,0,0}, {0,0,ER,0,0}, nasm_bytecodes+31666, 545, 5226}, + /* 5111 : VCVTSI2SS xmmreg,xmmreg*,rm64|er [rvm:t1s: evex.nds.lig.f3.0f.w1 2a /r ] AVX512,FUTURE */ + /* 241(f1 fe 08) 306 001(2a) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCVTSI2SS, 3, {XMMREG,XMMREG,RM_GPR|BITS64,0,0}, {0,0,ER,0,0}, nasm_bytecodes+31684, 545, 5227}, + /* 5112 : VCVTSS2SD xmmreg|mask|z,xmmreg*,xmmrm32|sae [rvm:t1s: evex.nds.lig.f3.0f.w0 5a /r ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(5a) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCVTSS2SD, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+31702, 545, 5228}, + /* 5113 : VCVTSS2SI reg32,xmmrm32|er [rm:t1f32: evex.lig.f3.0f.w0 2d /r ] AVX512,FUTURE */ + /* 250(f1 7e 08) 307 001(2d) 110 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCVTSS2SI, 2, {REG_GPR|BITS32,RM_XMM|BITS32,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+31720, 545, 5229}, + /* 5114 : VCVTSS2SI reg64,xmmrm32|er [rm:t1f32: evex.lig.f3.0f.w1 2d /r ] AVX512,FUTURE */ + /* 250(f1 fe 08) 307 001(2d) 110 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCVTSS2SI, 2, {REG_GPR|BITS64,RM_XMM|BITS32,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+31729, 545, 5230}, + /* 5115 : VCVTSS2USI reg32,xmmrm32|er [rm:t1f32: evex.lig.f3.0f.w0 79 /r ] AVX512,FUTURE */ + /* 250(f1 7e 08) 307 001(79) 110 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCVTSS2USI, 2, {REG_GPR|BITS32,RM_XMM|BITS32,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+31738, 545, 5231}, + /* 5116 : VCVTSS2USI reg64,xmmrm32|er [rm:t1f32: evex.lig.f3.0f.w1 79 /r ] AVX512,FUTURE */ + /* 250(f1 fe 08) 307 001(79) 110 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCVTSS2USI, 2, {REG_GPR|BITS64,RM_XMM|BITS32,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+31747, 545, 5232}, + /* 5117 : VCVTTPD2DQ xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.66.0f.w1 e6 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 fd 08) 301 001(e6) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTTPD2DQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+31756, 543, 5233}, + /* 5118 : VCVTTPD2DQ xmmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.66.0f.w1 e6 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 fd 28) 301 001(e6) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTTPD2DQ, 2, {XMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+31765, 543, 5234}, + /* 5119 : VCVTTPD2DQ ymmreg|mask|z,zmmrm512|b64|sae [rm:fv: evex.512.66.0f.w1 e6 /r ] AVX512,FUTURE */ + /* 250(f1 fd 48) 301 001(e6) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VCVTTPD2DQ, 2, {YMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+31774, 544, 5235}, + /* 5120 : VCVTTPD2QQ xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.66.0f.w1 7a /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f1 fd 08) 301 001(7a) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VCVTTPD2QQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+31783, 546, 5236}, + /* 5121 : VCVTTPD2QQ ymmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.66.0f.w1 7a /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f1 fd 28) 301 001(7a) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VCVTTPD2QQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+31792, 546, 5237}, + /* 5122 : VCVTTPD2QQ zmmreg|mask|z,zmmrm512|b64|sae [rm:fv: evex.512.66.0f.w1 7a /r ] AVX512DQ,FUTURE */ + /* 250(f1 fd 48) 301 001(7a) 110 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VCVTTPD2QQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+31801, 547, 5238}, + /* 5123 : VCVTTPD2UDQ xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.0f.w1 78 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 fc 08) 301 001(78) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTTPD2UDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+31810, 543, 5239}, + /* 5124 : VCVTTPD2UDQ xmmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.0f.w1 78 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 fc 28) 301 001(78) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTTPD2UDQ, 2, {XMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+31819, 543, 5240}, + /* 5125 : VCVTTPD2UDQ ymmreg|mask|z,zmmrm512|b64|sae [rm:fv: evex.512.0f.w1 78 /r ] AVX512,FUTURE */ + /* 250(f1 fc 48) 301 001(78) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VCVTTPD2UDQ, 2, {YMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+31828, 544, 5241}, + /* 5126 : VCVTTPD2UQQ xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.66.0f.w1 78 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f1 fd 08) 301 001(78) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VCVTTPD2UQQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+31837, 546, 5242}, + /* 5127 : VCVTTPD2UQQ ymmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.66.0f.w1 78 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f1 fd 28) 301 001(78) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VCVTTPD2UQQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+31846, 546, 5243}, + /* 5128 : VCVTTPD2UQQ zmmreg|mask|z,zmmrm512|b64|sae [rm:fv: evex.512.66.0f.w1 78 /r ] AVX512DQ,FUTURE */ + /* 250(f1 fd 48) 301 001(78) 110 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VCVTTPD2UQQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+31855, 547, 5244}, + /* 5129 : VCVTTPS2DQ xmmreg|mask|z,xmmrm128|b32 [rm:fv: evex.128.f3.0f.w0 5b /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7e 08) 301 001(5b) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTTPS2DQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+31864, 543, 5245}, + /* 5130 : VCVTTPS2DQ ymmreg|mask|z,ymmrm256|b32 [rm:fv: evex.256.f3.0f.w0 5b /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7e 28) 301 001(5b) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTTPS2DQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+31873, 543, 5246}, + /* 5131 : VCVTTPS2DQ zmmreg|mask|z,zmmrm512|b32|sae [rm:fv: evex.512.f3.0f.w0 5b /r ] AVX512,FUTURE */ + /* 250(f1 7e 48) 301 001(5b) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VCVTTPS2DQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+31882, 544, 5247}, + /* 5132 : VCVTTPS2QQ xmmreg|mask|z,xmmrm64|b32 [rm:hv: evex.128.66.0f.w0 7a /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f1 7d 08) 302 001(7a) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VCVTTPS2QQ, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+31891, 546, 5248}, + /* 5133 : VCVTTPS2QQ ymmreg|mask|z,xmmrm128|b32 [rm:hv: evex.256.66.0f.w0 7a /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f1 7d 28) 302 001(7a) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VCVTTPS2QQ, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+31900, 546, 5249}, + /* 5134 : VCVTTPS2QQ zmmreg|mask|z,ymmrm256|b32|sae [rm:hv: evex.512.66.0f.w0 7a /r ] AVX512DQ,FUTURE */ + /* 250(f1 7d 48) 302 001(7a) 110 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VCVTTPS2QQ, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+31909, 547, 5250}, + /* 5135 : VCVTTPS2UDQ xmmreg|mask|z,xmmrm128|b32 [rm:fv: evex.128.0f.w0 78 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7c 08) 301 001(78) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTTPS2UDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+31918, 543, 5251}, + /* 5136 : VCVTTPS2UDQ ymmreg|mask|z,ymmrm256|b32 [rm:fv: evex.256.0f.w0 78 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7c 28) 301 001(78) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTTPS2UDQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+31927, 543, 5252}, + /* 5137 : VCVTTPS2UDQ zmmreg|mask|z,zmmrm512|b32|sae [rm:fv: evex.512.0f.w0 78 /r ] AVX512,FUTURE */ + /* 250(f1 7c 48) 301 001(78) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VCVTTPS2UDQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+31936, 544, 5253}, + /* 5138 : VCVTTPS2UQQ xmmreg|mask|z,xmmrm64|b32 [rm:hv: evex.128.66.0f.w0 78 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f1 7d 08) 302 001(78) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VCVTTPS2UQQ, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+31945, 546, 5254}, + /* 5139 : VCVTTPS2UQQ ymmreg|mask|z,xmmrm128|b32 [rm:hv: evex.256.66.0f.w0 78 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f1 7d 28) 302 001(78) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VCVTTPS2UQQ, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+31954, 546, 5255}, + /* 5140 : VCVTTPS2UQQ zmmreg|mask|z,ymmrm256|b32|sae [rm:hv: evex.512.66.0f.w0 78 /r ] AVX512DQ,FUTURE */ + /* 250(f1 7d 48) 302 001(78) 110 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VCVTTPS2UQQ, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+31963, 547, 5256}, + /* 5141 : VCVTTSD2SI reg32,xmmrm64|sae [rm:t1f64: evex.lig.f2.0f.w0 2c /r ] AVX512,FUTURE */ + /* 250(f1 7f 08) 310 001(2c) 110 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCVTTSD2SI, 2, {REG_GPR|BITS32,RM_XMM|BITS64,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+31972, 545, 5257}, + /* 5142 : VCVTTSD2SI reg64,xmmrm64|sae [rm:t1f64: evex.lig.f2.0f.w1 2c /r ] AVX512,FUTURE */ + /* 250(f1 ff 08) 310 001(2c) 110 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCVTTSD2SI, 2, {REG_GPR|BITS64,RM_XMM|BITS64,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+31981, 545, 5258}, + /* 5143 : VCVTTSD2USI reg32,xmmrm64|sae [rm:t1f64: evex.lig.f2.0f.w0 78 /r ] AVX512,FUTURE */ + /* 250(f1 7f 08) 310 001(78) 110 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCVTTSD2USI, 2, {REG_GPR|BITS32,RM_XMM|BITS64,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+31990, 545, 5259}, + /* 5144 : VCVTTSD2USI reg64,xmmrm64|sae [rm:t1f64: evex.lig.f2.0f.w1 78 /r ] AVX512,FUTURE */ + /* 250(f1 ff 08) 310 001(78) 110 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCVTTSD2USI, 2, {REG_GPR|BITS64,RM_XMM|BITS64,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+31999, 545, 5260}, + /* 5145 : VCVTTSS2SI reg32,xmmrm32|sae [rm:t1f32: evex.lig.f3.0f.w0 2c /r ] AVX512,FUTURE */ + /* 250(f1 7e 08) 307 001(2c) 110 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCVTTSS2SI, 2, {REG_GPR|BITS32,RM_XMM|BITS32,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+32008, 545, 5261}, + /* 5146 : VCVTTSS2SI reg64,xmmrm32|sae [rm:t1f32: evex.lig.f3.0f.w1 2c /r ] AVX512,FUTURE */ + /* 250(f1 fe 08) 307 001(2c) 110 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCVTTSS2SI, 2, {REG_GPR|BITS64,RM_XMM|BITS32,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+32017, 545, 5262}, + /* 5147 : VCVTTSS2USI reg32,xmmrm32|sae [rm:t1f32: evex.lig.f3.0f.w0 78 /r ] AVX512,FUTURE */ + /* 250(f1 7e 08) 307 001(78) 110 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCVTTSS2USI, 2, {REG_GPR|BITS32,RM_XMM|BITS32,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+32026, 545, 5263}, + /* 5148 : VCVTTSS2USI reg64,xmmrm32|sae [rm:t1f32: evex.lig.f3.0f.w1 78 /r ] AVX512,FUTURE */ + /* 250(f1 fe 08) 307 001(78) 110 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCVTTSS2USI, 2, {REG_GPR|BITS64,RM_XMM|BITS32,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+32035, 545, 5264}, + /* 5149 : VCVTUDQ2PD xmmreg|mask|z,xmmrm64|b32 [rm:hv: evex.128.f3.0f.w0 7a /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7e 08) 302 001(7a) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTUDQ2PD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+32044, 543, 5265}, + /* 5150 : VCVTUDQ2PD ymmreg|mask|z,xmmrm128|b32 [rm:hv: evex.256.f3.0f.w0 7a /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7e 28) 302 001(7a) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTUDQ2PD, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+32053, 543, 5266}, + /* 5151 : VCVTUDQ2PD zmmreg|mask|z,ymmrm256|b32|er [rm:hv: evex.512.f3.0f.w0 7a /r ] AVX512,FUTURE */ + /* 250(f1 7e 48) 302 001(7a) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VCVTUDQ2PD, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+32062, 544, 5267}, + /* 5152 : VCVTUDQ2PS xmmreg|mask|z,xmmrm128|b32 [rm:fv: evex.128.f2.0f.w0 7a /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7f 08) 301 001(7a) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTUDQ2PS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+32071, 543, 5268}, + /* 5153 : VCVTUDQ2PS ymmreg|mask|z,ymmrm256|b32 [rm:fv: evex.256.f2.0f.w0 7a /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7f 28) 301 001(7a) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTUDQ2PS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+32080, 543, 5269}, + /* 5154 : VCVTUDQ2PS zmmreg|mask|z,zmmrm512|b32|er [rm:fv: evex.512.f2.0f.w0 7a /r ] AVX512,FUTURE */ + /* 250(f1 7f 48) 301 001(7a) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VCVTUDQ2PS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+32089, 544, 5270}, + /* 5155 : VCVTUQQ2PD xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.f3.0f.w1 7a /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f1 fe 08) 301 001(7a) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VCVTUQQ2PD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+32098, 546, 5271}, + /* 5156 : VCVTUQQ2PD ymmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.f3.0f.w1 7a /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f1 fe 28) 301 001(7a) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VCVTUQQ2PD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+32107, 546, 5272}, + /* 5157 : VCVTUQQ2PD zmmreg|mask|z,zmmrm512|b64|er [rm:fv: evex.512.f3.0f.w1 7a /r ] AVX512DQ,FUTURE */ + /* 250(f1 fe 48) 301 001(7a) 110 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VCVTUQQ2PD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+32116, 547, 5273}, + /* 5158 : VCVTUQQ2PS xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.f2.0f.w1 7a /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f1 ff 08) 301 001(7a) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VCVTUQQ2PS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+32125, 546, 5274}, + /* 5159 : VCVTUQQ2PS xmmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.f2.0f.w1 7a /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f1 ff 28) 301 001(7a) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VCVTUQQ2PS, 2, {XMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+32134, 546, 5275}, + /* 5160 : VCVTUQQ2PS ymmreg|mask|z,zmmrm512|b64|er [rm:fv: evex.512.f2.0f.w1 7a /r ] AVX512DQ,FUTURE */ + /* 250(f1 ff 48) 301 001(7a) 110 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VCVTUQQ2PS, 2, {YMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+32143, 547, 5276}, + /* 5161 : VCVTUSI2SD xmmreg,xmmreg*,rm32|er [rvm:t1s: evex.nds.lig.f2.0f.w0 7b /r ] AVX512,FUTURE */ + /* 241(f1 7f 08) 306 001(7b) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCVTUSI2SD, 3, {XMMREG,XMMREG,RM_GPR|BITS32,0,0}, {0,0,ER,0,0}, nasm_bytecodes+32152, 545, 5277}, + /* 5162 : VCVTUSI2SD xmmreg,xmmreg*,rm64|er [rvm:t1s: evex.nds.lig.f2.0f.w1 7b /r ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(7b) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCVTUSI2SD, 3, {XMMREG,XMMREG,RM_GPR|BITS64,0,0}, {0,0,ER,0,0}, nasm_bytecodes+32170, 545, 5278}, + /* 5163 : VCVTUSI2SS xmmreg,xmmreg*,rm32|er [rvm:t1s: evex.nds.lig.f3.0f.w0 7b /r ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(7b) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCVTUSI2SS, 3, {XMMREG,XMMREG,RM_GPR|BITS32,0,0}, {0,0,ER,0,0}, nasm_bytecodes+32188, 545, 5279}, + /* 5164 : VCVTUSI2SS xmmreg,xmmreg*,rm64|er [rvm:t1s: evex.nds.lig.f3.0f.w1 7b /r ] AVX512,FUTURE */ + /* 241(f1 fe 08) 306 001(7b) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VCVTUSI2SS, 3, {XMMREG,XMMREG,RM_GPR|BITS64,0,0}, {0,0,ER,0,0}, nasm_bytecodes+32206, 545, 5280}, + /* 5165 : VDBPSADBW xmmreg|mask|z,xmmreg*,xmmrm128,imm8 [rvmi:fvm: evex.nds.128.66.0f3a.w0 42 /r ib ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 08) 303 001(42) 120 023 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VDBPSADBW, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18363, 549, 5281}, + /* 5166 : VDBPSADBW ymmreg|mask|z,ymmreg*,ymmrm256,imm8 [rvmi:fvm: evex.nds.256.66.0f3a.w0 42 /r ib ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 28) 303 001(42) 120 023 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VDBPSADBW, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18383, 549, 5282}, + /* 5167 : VDBPSADBW zmmreg|mask|z,zmmreg*,zmmrm512,imm8 [rvmi:fvm: evex.nds.512.66.0f3a.w0 42 /r ib ] AVX512BW,FUTURE */ + /* 241(f3 7d 48) 303 001(42) 120 023 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VDBPSADBW, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18403, 550, 5283}, + /* 5168 : VDIVPD xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f.w1 5e /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(5e) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VDIVPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+32224, 543, 5284}, + /* 5169 : VDIVPD ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f.w1 5e /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(5e) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VDIVPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+32242, 543, 5285}, + /* 5170 : VDIVPD zmmreg|mask|z,zmmreg*,zmmrm512|b64|er [rvm:fv: evex.nds.512.66.0f.w1 5e /r ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(5e) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VDIVPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+32260, 544, 5286}, + /* 5171 : VDIVPS xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.0f.w0 5e /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(5e) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VDIVPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+32278, 543, 5287}, + /* 5172 : VDIVPS ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.0f.w0 5e /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(5e) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VDIVPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+32296, 543, 5288}, + /* 5173 : VDIVPS zmmreg|mask|z,zmmreg*,zmmrm512|b32|er [rvm:fv: evex.nds.512.0f.w0 5e /r ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(5e) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VDIVPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+32314, 544, 5289}, + /* 5174 : VDIVSD xmmreg|mask|z,xmmreg*,xmmrm64|er [rvm:t1s: evex.nds.lig.f2.0f.w1 5e /r ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(5e) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VDIVSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+32332, 545, 5290}, + /* 5175 : VDIVSS xmmreg|mask|z,xmmreg*,xmmrm32|er [rvm:t1s: evex.nds.lig.f3.0f.w0 5e /r ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(5e) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VDIVSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+32350, 545, 5291}, + /* 5176 : VEXP2PD zmmreg|mask|z,zmmrm512|b64|sae [rm:fv: evex.512.66.0f38.w1 c8 /r ] AVX512ER,FUTURE */ + /* 250(f2 fd 48) 301 001(c8) 110 : EVEX,PROT,AVX512ER,FUTURE */ + {I_VEXP2PD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+32368, 551, 5292}, + /* 5177 : VEXP2PS zmmreg|mask|z,zmmrm512|b32|sae [rm:fv: evex.512.66.0f38.w0 c8 /r ] AVX512ER,FUTURE */ + /* 250(f2 7d 48) 301 001(c8) 110 : EVEX,PROT,AVX512ER,FUTURE */ + {I_VEXP2PS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+32377, 551, 5293}, + /* 5178 : VEXPANDPD xmmreg|mask|z,mem128 [rm:t1s: evex.128.66.0f38.w1 88 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 fd 08) 306 001(88) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VEXPANDPD, 2, {XMMREG,MEMORY|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+32386, 543, 5294}, + /* 5179 : VEXPANDPD ymmreg|mask|z,mem256 [rm:t1s: evex.256.66.0f38.w1 88 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 fd 28) 306 001(88) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VEXPANDPD, 2, {YMMREG,MEMORY|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+32395, 543, 5295}, + /* 5180 : VEXPANDPD zmmreg|mask|z,mem512 [rm:t1s: evex.512.66.0f38.w1 88 /r ] AVX512,FUTURE */ + /* 250(f2 fd 48) 306 001(88) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VEXPANDPD, 2, {ZMMREG,MEMORY|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+32404, 544, 5296}, + /* 5181 : VEXPANDPD xmmreg|mask|z,xmmreg [rm:t1s: evex.128.66.0f38.w1 88 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 fd 08) 306 001(88) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VEXPANDPD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+32386, 543, 5297}, + /* 5182 : VEXPANDPD ymmreg|mask|z,ymmreg [rm:t1s: evex.256.66.0f38.w1 88 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 fd 28) 306 001(88) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VEXPANDPD, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+32395, 543, 5298}, + /* 5183 : VEXPANDPD zmmreg|mask|z,zmmreg [rm:t1s: evex.512.66.0f38.w1 88 /r ] AVX512,FUTURE */ + /* 250(f2 fd 48) 306 001(88) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VEXPANDPD, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+32404, 544, 5299}, + /* 5184 : VEXPANDPS xmmreg|mask|z,mem128 [rm:t1s: evex.128.66.0f38.w0 88 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 08) 306 001(88) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VEXPANDPS, 2, {XMMREG,MEMORY|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+32413, 543, 5300}, + /* 5185 : VEXPANDPS ymmreg|mask|z,mem256 [rm:t1s: evex.256.66.0f38.w0 88 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 28) 306 001(88) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VEXPANDPS, 2, {YMMREG,MEMORY|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+32422, 543, 5301}, + /* 5186 : VEXPANDPS zmmreg|mask|z,mem512 [rm:t1s: evex.512.66.0f38.w0 88 /r ] AVX512,FUTURE */ + /* 250(f2 7d 48) 306 001(88) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VEXPANDPS, 2, {ZMMREG,MEMORY|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+32431, 544, 5302}, + /* 5187 : VEXPANDPS xmmreg|mask|z,xmmreg [rm:t1s: evex.128.66.0f38.w0 88 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 08) 306 001(88) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VEXPANDPS, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+32413, 543, 5303}, + /* 5188 : VEXPANDPS ymmreg|mask|z,ymmreg [rm:t1s: evex.256.66.0f38.w0 88 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 28) 306 001(88) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VEXPANDPS, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+32422, 543, 5304}, + /* 5189 : VEXPANDPS zmmreg|mask|z,zmmreg [rm:t1s: evex.512.66.0f38.w0 88 /r ] AVX512,FUTURE */ + /* 250(f2 7d 48) 306 001(88) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VEXPANDPS, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+32431, 544, 5305}, + /* 5190 : VEXTRACTF32X4 xmmreg|mask|z,ymmreg,imm8 [mri: evex.256.66.0f3a.w0 19 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 250(f3 7d 28) 300 001(19) 101 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VEXTRACTF32X4, 3, {XMMREG,YMMREG,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18423, 543, 5306}, + /* 5191 : VEXTRACTF32X4 xmmreg|mask|z,zmmreg,imm8 [mri: evex.512.66.0f3a.w0 19 /r ib ] AVX512,FUTURE */ + /* 250(f3 7d 48) 300 001(19) 101 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VEXTRACTF32X4, 3, {XMMREG,ZMMREG,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18433, 544, 5307}, + /* 5192 : VEXTRACTF32X4 mem128|mask,ymmreg,imm8 [mri:t4: evex.256.66.0f3a.w0 19 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 250(f3 7d 28) 312 001(19) 101 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VEXTRACTF32X4, 3, {MEMORY|BITS128,YMMREG,IMM_NORMAL|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+18443, 543, 5308}, + /* 5193 : VEXTRACTF32X4 mem128|mask,zmmreg,imm8 [mri:t4: evex.512.66.0f3a.w0 19 /r ib ] AVX512,FUTURE */ + /* 250(f3 7d 48) 312 001(19) 101 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VEXTRACTF32X4, 3, {MEMORY|BITS128,ZMMREG,IMM_NORMAL|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+18453, 544, 5309}, + /* 5194 : VEXTRACTF32X8 ymmreg|mask|z,zmmreg,imm8 [mri: evex.512.66.0f3a.w0 1b /r ib ] AVX512DQ,FUTURE */ + /* 250(f3 7d 48) 300 001(1b) 101 022 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VEXTRACTF32X8, 3, {YMMREG,ZMMREG,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18463, 547, 5310}, + /* 5195 : VEXTRACTF32X8 mem256|mask,zmmreg,imm8 [mri:t8: evex.512.66.0f3a.w0 1b /r ib ] AVX512DQ,FUTURE */ + /* 250(f3 7d 48) 313 001(1b) 101 022 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VEXTRACTF32X8, 3, {MEMORY|BITS256,ZMMREG,IMM_NORMAL|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+18473, 547, 5311}, + /* 5196 : VEXTRACTF64X2 xmmreg|mask|z,ymmreg,imm8 [mri: evex.256.66.0f3a.w1 19 /r ib ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f3 fd 28) 300 001(19) 101 022 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VEXTRACTF64X2, 3, {XMMREG,YMMREG,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18483, 546, 5312}, + /* 5197 : VEXTRACTF64X2 xmmreg|mask|z,zmmreg,imm8 [mri: evex.512.66.0f3a.w1 19 /r ib ] AVX512DQ,FUTURE */ + /* 250(f3 fd 48) 300 001(19) 101 022 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VEXTRACTF64X2, 3, {XMMREG,ZMMREG,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18493, 547, 5313}, + /* 5198 : VEXTRACTF64X2 mem128|mask,ymmreg,imm8 [mri:t2: evex.256.66.0f3a.w1 19 /r ib ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f3 fd 28) 311 001(19) 101 022 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VEXTRACTF64X2, 3, {MEMORY|BITS128,YMMREG,IMM_NORMAL|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+18503, 546, 5314}, + /* 5199 : VEXTRACTF64X2 mem128|mask,zmmreg,imm8 [mri:t2: evex.512.66.0f3a.w1 19 /r ib ] AVX512DQ,FUTURE */ + /* 250(f3 fd 48) 311 001(19) 101 022 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VEXTRACTF64X2, 3, {MEMORY|BITS128,ZMMREG,IMM_NORMAL|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+18513, 547, 5315}, + /* 5200 : VEXTRACTF64X4 ymmreg|mask|z,zmmreg,imm8 [mri: evex.512.66.0f3a.w1 1b /r ib ] AVX512,FUTURE */ + /* 250(f3 fd 48) 300 001(1b) 101 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VEXTRACTF64X4, 3, {YMMREG,ZMMREG,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18523, 544, 5316}, + /* 5201 : VEXTRACTF64X4 mem256|mask,zmmreg,imm8 [mri:t4: evex.512.66.0f3a.w1 1b /r ib ] AVX512,FUTURE */ + /* 250(f3 fd 48) 312 001(1b) 101 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VEXTRACTF64X4, 3, {MEMORY|BITS256,ZMMREG,IMM_NORMAL|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+18533, 544, 5317}, + /* 5202 : VEXTRACTI32X4 xmmreg|mask|z,ymmreg,imm8 [mri: evex.256.66.0f3a.w0 39 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 250(f3 7d 28) 300 001(39) 101 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VEXTRACTI32X4, 3, {XMMREG,YMMREG,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18543, 543, 5318}, + /* 5203 : VEXTRACTI32X4 xmmreg|mask|z,zmmreg,imm8 [mri: evex.512.66.0f3a.w0 39 /r ib ] AVX512,FUTURE */ + /* 250(f3 7d 48) 300 001(39) 101 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VEXTRACTI32X4, 3, {XMMREG,ZMMREG,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18553, 544, 5319}, + /* 5204 : VEXTRACTI32X4 mem128|mask,ymmreg,imm8 [mri:t4: evex.256.66.0f3a.w0 39 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 250(f3 7d 28) 312 001(39) 101 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VEXTRACTI32X4, 3, {MEMORY|BITS128,YMMREG,IMM_NORMAL|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+18563, 543, 5320}, + /* 5205 : VEXTRACTI32X4 mem128|mask,zmmreg,imm8 [mri:t4: evex.512.66.0f3a.w0 39 /r ib ] AVX512,FUTURE */ + /* 250(f3 7d 48) 312 001(39) 101 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VEXTRACTI32X4, 3, {MEMORY|BITS128,ZMMREG,IMM_NORMAL|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+18573, 544, 5321}, + /* 5206 : VEXTRACTI32X8 ymmreg|mask|z,zmmreg,imm8 [mri: evex.512.66.0f3a.w0 3b /r ib ] AVX512DQ,FUTURE */ + /* 250(f3 7d 48) 300 001(3b) 101 022 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VEXTRACTI32X8, 3, {YMMREG,ZMMREG,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18583, 547, 5322}, + /* 5207 : VEXTRACTI32X8 mem256|mask,zmmreg,imm8 [mri:t8: evex.512.66.0f3a.w0 3b /r ib ] AVX512DQ,FUTURE */ + /* 250(f3 7d 48) 313 001(3b) 101 022 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VEXTRACTI32X8, 3, {MEMORY|BITS256,ZMMREG,IMM_NORMAL|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+18593, 547, 5323}, + /* 5208 : VEXTRACTI64X2 xmmreg|mask|z,ymmreg,imm8 [mri: evex.256.66.0f3a.w1 39 /r ib ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f3 fd 28) 300 001(39) 101 022 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VEXTRACTI64X2, 3, {XMMREG,YMMREG,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18603, 546, 5324}, + /* 5209 : VEXTRACTI64X2 xmmreg|mask|z,zmmreg,imm8 [mri: evex.512.66.0f3a.w1 39 /r ib ] AVX512DQ,FUTURE */ + /* 250(f3 fd 48) 300 001(39) 101 022 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VEXTRACTI64X2, 3, {XMMREG,ZMMREG,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18613, 547, 5325}, + /* 5210 : VEXTRACTI64X2 mem128|mask,ymmreg,imm8 [mri:t2: evex.256.66.0f3a.w1 39 /r ib ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f3 fd 28) 311 001(39) 101 022 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VEXTRACTI64X2, 3, {MEMORY|BITS128,YMMREG,IMM_NORMAL|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+18623, 546, 5326}, + /* 5211 : VEXTRACTI64X2 mem128|mask,zmmreg,imm8 [mri:t2: evex.512.66.0f3a.w1 39 /r ib ] AVX512DQ,FUTURE */ + /* 250(f3 fd 48) 311 001(39) 101 022 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VEXTRACTI64X2, 3, {MEMORY|BITS128,ZMMREG,IMM_NORMAL|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+18633, 547, 5327}, + /* 5212 : VEXTRACTI64X4 ymmreg|mask|z,zmmreg,imm8 [mri: evex.512.66.0f3a.w1 3b /r ib ] AVX512,FUTURE */ + /* 250(f3 fd 48) 300 001(3b) 101 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VEXTRACTI64X4, 3, {YMMREG,ZMMREG,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18643, 544, 5328}, + /* 5213 : VEXTRACTI64X4 mem256|mask,zmmreg,imm8 [mri:t4: evex.512.66.0f3a.w1 3b /r ib ] AVX512,FUTURE */ + /* 250(f3 fd 48) 312 001(3b) 101 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VEXTRACTI64X4, 3, {MEMORY|BITS256,ZMMREG,IMM_NORMAL|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+18653, 544, 5329}, + /* 5214 : VEXTRACTPS reg32,xmmreg,imm8 [mri:t1s: evex.128.66.0f3a.wig 17 /r ib ] AVX512,FUTURE */ + /* 250(f3 7d 08) 306 001(17) 101 022 : WIG,EVEX,PROT,AVX512,FUTURE */ + {I_VEXTRACTPS, 3, {REG_GPR|BITS32,XMMREG,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18663, 552, 5330}, + /* 5215 : VEXTRACTPS reg64,xmmreg,imm8 [mri:t1s: evex.128.66.0f3a.wig 17 /r ib ] AVX512,FUTURE */ + /* 250(f3 7d 08) 306 001(17) 101 022 : WIG,EVEX,PROT,AVX512,FUTURE */ + {I_VEXTRACTPS, 3, {REG_GPR|BITS64,XMMREG,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18663, 552, 5331}, + /* 5216 : VEXTRACTPS mem32,xmmreg,imm8 [mri:t1s: evex.128.66.0f3a.wig 17 /r ib ] AVX512,FUTURE */ + /* 250(f3 7d 08) 306 001(17) 101 022 : WIG,EVEX,PROT,AVX512,FUTURE */ + {I_VEXTRACTPS, 3, {MEMORY|BITS32,XMMREG,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+18663, 552, 5332}, + /* 5217 : VFIXUPIMMPD xmmreg|mask|z,xmmreg*,xmmrm128|b64,imm8 [rvmi:fv: evex.nds.128.66.0f3a.w1 54 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 08) 301 001(54) 120 023 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFIXUPIMMPD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18673, 543, 5333}, + /* 5218 : VFIXUPIMMPD ymmreg|mask|z,ymmreg*,ymmrm256|b64,imm8 [rvmi:fv: evex.nds.256.66.0f3a.w1 54 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 28) 301 001(54) 120 023 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFIXUPIMMPD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+18693, 543, 5334}, + /* 5219 : VFIXUPIMMPD zmmreg|mask|z,zmmreg*,zmmrm512|b64|sae,imm8 [rvmi:fv: evex.nds.512.66.0f3a.w1 54 /r ib ] AVX512,FUTURE */ + /* 241(f3 fd 48) 301 001(54) 120 023 : EVEX,PROT,AVX512,FUTURE */ + {I_VFIXUPIMMPD, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B64|SAE,0,0}, nasm_bytecodes+18713, 544, 5335}, + /* 5220 : VFIXUPIMMPS xmmreg|mask|z,xmmreg*,xmmrm128|b32,imm8 [rvmi:fv: evex.nds.128.66.0f3a.w0 54 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 08) 301 001(54) 120 023 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFIXUPIMMPS, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18733, 543, 5336}, + /* 5221 : VFIXUPIMMPS ymmreg|mask|z,ymmreg*,ymmrm256|b32,imm8 [rvmi:fv: evex.nds.256.66.0f3a.w0 54 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 28) 301 001(54) 120 023 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFIXUPIMMPS, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+18753, 543, 5337}, + /* 5222 : VFIXUPIMMPS zmmreg|mask|z,zmmreg*,zmmrm512|b32|sae,imm8 [rvmi:fv: evex.nds.512.66.0f3a.w0 54 /r ib ] AVX512,FUTURE */ + /* 241(f3 7d 48) 301 001(54) 120 023 : EVEX,PROT,AVX512,FUTURE */ + {I_VFIXUPIMMPS, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B32|SAE,0,0}, nasm_bytecodes+18773, 544, 5338}, + /* 5223 : VFIXUPIMMSD xmmreg|mask|z,xmmreg*,xmmrm64|sae,imm8 [rvmi:t1s: evex.nds.lig.66.0f3a.w1 55 /r ib ] AVX512,FUTURE */ + /* 241(f3 fd 08) 306 001(55) 120 023 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VFIXUPIMMSD, 4, {XMMREG,XMMREG,RM_XMM|BITS64,IMM_NORMAL|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+18793, 545, 5339}, + /* 5224 : VFIXUPIMMSS xmmreg|mask|z,xmmreg*,xmmrm32|sae,imm8 [rvmi:t1s: evex.nds.lig.66.0f3a.w0 55 /r ib ] AVX512,FUTURE */ + /* 241(f3 7d 08) 306 001(55) 120 023 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VFIXUPIMMSS, 4, {XMMREG,XMMREG,RM_XMM|BITS32,IMM_NORMAL|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+18813, 545, 5340}, + /* 5225 : VFMADD132PD xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 98 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(98) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMADD132PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+32440, 543, 5341}, + /* 5226 : VFMADD132PD ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 98 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(98) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMADD132PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+32449, 543, 5342}, + /* 5227 : VFMADD132PD zmmreg|mask|z,zmmreg,zmmrm512|b64|er [rvm:fv: evex.nds.512.66.0f38.w1 98 /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(98) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VFMADD132PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+32458, 544, 5343}, + /* 5228 : VFMADD132PS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 98 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(98) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMADD132PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+32467, 543, 5344}, + /* 5229 : VFMADD132PS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 98 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(98) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMADD132PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+32476, 543, 5345}, + /* 5230 : VFMADD132PS zmmreg|mask|z,zmmreg,zmmrm512|b32|er [rvm:fv: evex.nds.512.66.0f38.w0 98 /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(98) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VFMADD132PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+32485, 544, 5346}, + /* 5231 : VFMADD132SD xmmreg|mask|z,xmmreg,xmmrm64|er [rvm:t1s: evex.nds.lig.66.0f38.w1 99 /r ] AVX512,FUTURE */ + /* 241(f2 fd 08) 306 001(99) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VFMADD132SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+32494, 545, 5347}, + /* 5232 : VFMADD132SS xmmreg|mask|z,xmmreg,xmmrm32|er [rvm:t1s: evex.nds.lig.66.0f38.w0 99 /r ] AVX512,FUTURE */ + /* 241(f2 7d 08) 306 001(99) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VFMADD132SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+32503, 545, 5348}, + /* 5233 : VFMADD213PD xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 a8 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(a8) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMADD213PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+32512, 543, 5349}, + /* 5234 : VFMADD213PD ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 a8 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(a8) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMADD213PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+32521, 543, 5350}, + /* 5235 : VFMADD213PD zmmreg|mask|z,zmmreg,zmmrm512|b64|er [rvm:fv: evex.nds.512.66.0f38.w1 a8 /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(a8) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VFMADD213PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+32530, 544, 5351}, + /* 5236 : VFMADD213PS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 a8 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(a8) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMADD213PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+32539, 543, 5352}, + /* 5237 : VFMADD213PS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 a8 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(a8) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMADD213PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+32548, 543, 5353}, + /* 5238 : VFMADD213PS zmmreg|mask|z,zmmreg,zmmrm512|b32|er [rvm:fv: evex.nds.512.66.0f38.w0 a8 /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(a8) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VFMADD213PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+32557, 544, 5354}, + /* 5239 : VFMADD213SD xmmreg|mask|z,xmmreg,xmmrm64|er [rvm:t1s: evex.nds.lig.66.0f38.w1 a9 /r ] AVX512,FUTURE */ + /* 241(f2 fd 08) 306 001(a9) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VFMADD213SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+32566, 545, 5355}, + /* 5240 : VFMADD213SS xmmreg|mask|z,xmmreg,xmmrm32|er [rvm:t1s: evex.nds.lig.66.0f38.w0 a9 /r ] AVX512,FUTURE */ + /* 241(f2 7d 08) 306 001(a9) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VFMADD213SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+32575, 545, 5356}, + /* 5241 : VFMADD231PD xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 b8 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(b8) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMADD231PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+32584, 543, 5357}, + /* 5242 : VFMADD231PD ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 b8 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(b8) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMADD231PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+32593, 543, 5358}, + /* 5243 : VFMADD231PD zmmreg|mask|z,zmmreg,zmmrm512|b64|er [rvm:fv: evex.nds.512.66.0f38.w1 b8 /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(b8) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VFMADD231PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+32602, 544, 5359}, + /* 5244 : VFMADD231PS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 b8 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(b8) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMADD231PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+32611, 543, 5360}, + /* 5245 : VFMADD231PS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 b8 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(b8) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMADD231PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+32620, 543, 5361}, + /* 5246 : VFMADD231PS zmmreg|mask|z,zmmreg,zmmrm512|b32|er [rvm:fv: evex.nds.512.66.0f38.w0 b8 /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(b8) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VFMADD231PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+32629, 544, 5362}, + /* 5247 : VFMADD231SD xmmreg|mask|z,xmmreg,xmmrm64|er [rvm:t1s: evex.nds.lig.66.0f38.w1 b9 /r ] AVX512,FUTURE */ + /* 241(f2 fd 08) 306 001(b9) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VFMADD231SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+32638, 545, 5363}, + /* 5248 : VFMADD231SS xmmreg|mask|z,xmmreg,xmmrm32|er [rvm:t1s: evex.nds.lig.66.0f38.w0 b9 /r ] AVX512,FUTURE */ + /* 241(f2 7d 08) 306 001(b9) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VFMADD231SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+32647, 545, 5364}, + /* 5249 : VFMADDSUB132PD xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 96 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(96) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMADDSUB132PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+32656, 543, 5365}, + /* 5250 : VFMADDSUB132PD ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 96 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(96) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMADDSUB132PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+32665, 543, 5366}, + /* 5251 : VFMADDSUB132PD zmmreg|mask|z,zmmreg,zmmrm512|b64|er [rvm:fv: evex.nds.512.66.0f38.w1 96 /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(96) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VFMADDSUB132PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+32674, 544, 5367}, + /* 5252 : VFMADDSUB132PS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 96 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(96) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMADDSUB132PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+32683, 543, 5368}, + /* 5253 : VFMADDSUB132PS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 96 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(96) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMADDSUB132PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+32692, 543, 5369}, + /* 5254 : VFMADDSUB132PS zmmreg|mask|z,zmmreg,zmmrm512|b32|er [rvm:fv: evex.nds.512.66.0f38.w0 96 /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(96) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VFMADDSUB132PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+32701, 544, 5370}, + /* 5255 : VFMADDSUB213PD xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 a6 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(a6) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMADDSUB213PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+32710, 543, 5371}, + /* 5256 : VFMADDSUB213PD ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 a6 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(a6) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMADDSUB213PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+32719, 543, 5372}, + /* 5257 : VFMADDSUB213PD zmmreg|mask|z,zmmreg,zmmrm512|b64|er [rvm:fv: evex.nds.512.66.0f38.w1 a6 /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(a6) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VFMADDSUB213PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+32728, 544, 5373}, + /* 5258 : VFMADDSUB213PS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 a6 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(a6) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMADDSUB213PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+32737, 543, 5374}, + /* 5259 : VFMADDSUB213PS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 a6 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(a6) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMADDSUB213PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+32746, 543, 5375}, + /* 5260 : VFMADDSUB213PS zmmreg|mask|z,zmmreg,zmmrm512|b32|er [rvm:fv: evex.nds.512.66.0f38.w0 a6 /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(a6) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VFMADDSUB213PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+32755, 544, 5376}, + /* 5261 : VFMADDSUB231PD xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 b6 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(b6) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMADDSUB231PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+32764, 543, 5377}, + /* 5262 : VFMADDSUB231PD ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 b6 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(b6) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMADDSUB231PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+32773, 543, 5378}, + /* 5263 : VFMADDSUB231PD zmmreg|mask|z,zmmreg,zmmrm512|b64|er [rvm:fv: evex.nds.512.66.0f38.w1 b6 /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(b6) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VFMADDSUB231PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+32782, 544, 5379}, + /* 5264 : VFMADDSUB231PS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 b6 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(b6) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMADDSUB231PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+32791, 543, 5380}, + /* 5265 : VFMADDSUB231PS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 b6 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(b6) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMADDSUB231PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+32800, 543, 5381}, + /* 5266 : VFMADDSUB231PS zmmreg|mask|z,zmmreg,zmmrm512|b32|er [rvm:fv: evex.nds.512.66.0f38.w0 b6 /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(b6) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VFMADDSUB231PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+32809, 544, 5382}, + /* 5267 : VFMSUB132PD xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 9a /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(9a) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMSUB132PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+32818, 543, 5383}, + /* 5268 : VFMSUB132PD ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 9a /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(9a) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMSUB132PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+32827, 543, 5384}, + /* 5269 : VFMSUB132PD zmmreg|mask|z,zmmreg,zmmrm512|b64|er [rvm:fv: evex.nds.512.66.0f38.w1 9a /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(9a) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VFMSUB132PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+32836, 544, 5385}, + /* 5270 : VFMSUB132PS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 9a /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(9a) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMSUB132PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+32845, 543, 5386}, + /* 5271 : VFMSUB132PS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 9a /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(9a) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMSUB132PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+32854, 543, 5387}, + /* 5272 : VFMSUB132PS zmmreg|mask|z,zmmreg,zmmrm512|b32|er [rvm:fv: evex.nds.512.66.0f38.w0 9a /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(9a) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VFMSUB132PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+32863, 544, 5388}, + /* 5273 : VFMSUB132SD xmmreg|mask|z,xmmreg,xmmrm64|er [rvm:t1s: evex.nds.lig.66.0f38.w1 9b /r ] AVX512,FUTURE */ + /* 241(f2 fd 08) 306 001(9b) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VFMSUB132SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+32872, 545, 5389}, + /* 5274 : VFMSUB132SS xmmreg|mask|z,xmmreg,xmmrm32|er [rvm:t1s: evex.nds.lig.66.0f38.w0 9b /r ] AVX512,FUTURE */ + /* 241(f2 7d 08) 306 001(9b) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VFMSUB132SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+32881, 545, 5390}, + /* 5275 : VFMSUB213PD xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 aa /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(aa) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMSUB213PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+32890, 543, 5391}, + /* 5276 : VFMSUB213PD ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 aa /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(aa) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMSUB213PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+32899, 543, 5392}, + /* 5277 : VFMSUB213PD zmmreg|mask|z,zmmreg,zmmrm512|b64|er [rvm:fv: evex.nds.512.66.0f38.w1 aa /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(aa) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VFMSUB213PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+32908, 544, 5393}, + /* 5278 : VFMSUB213PS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 aa /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(aa) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMSUB213PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+32917, 543, 5394}, + /* 5279 : VFMSUB213PS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 aa /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(aa) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMSUB213PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+32926, 543, 5395}, + /* 5280 : VFMSUB213PS zmmreg|mask|z,zmmreg,zmmrm512|b32|er [rvm:fv: evex.nds.512.66.0f38.w0 aa /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(aa) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VFMSUB213PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+32935, 544, 5396}, + /* 5281 : VFMSUB213SD xmmreg|mask|z,xmmreg,xmmrm64|er [rvm:t1s: evex.nds.lig.66.0f38.w1 ab /r ] AVX512,FUTURE */ + /* 241(f2 fd 08) 306 001(ab) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VFMSUB213SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+32944, 545, 5397}, + /* 5282 : VFMSUB213SS xmmreg|mask|z,xmmreg,xmmrm32|er [rvm:t1s: evex.nds.lig.66.0f38.w0 ab /r ] AVX512,FUTURE */ + /* 241(f2 7d 08) 306 001(ab) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VFMSUB213SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+32953, 545, 5398}, + /* 5283 : VFMSUB231PD xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 ba /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(ba) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMSUB231PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+32962, 543, 5399}, + /* 5284 : VFMSUB231PD ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 ba /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(ba) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMSUB231PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+32971, 543, 5400}, + /* 5285 : VFMSUB231PD zmmreg|mask|z,zmmreg,zmmrm512|b64|er [rvm:fv: evex.nds.512.66.0f38.w1 ba /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(ba) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VFMSUB231PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+32980, 544, 5401}, + /* 5286 : VFMSUB231PS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 ba /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(ba) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMSUB231PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+32989, 543, 5402}, + /* 5287 : VFMSUB231PS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 ba /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(ba) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMSUB231PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+32998, 543, 5403}, + /* 5288 : VFMSUB231PS zmmreg|mask|z,zmmreg,zmmrm512|b32|er [rvm:fv: evex.nds.512.66.0f38.w0 ba /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(ba) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VFMSUB231PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+33007, 544, 5404}, + /* 5289 : VFMSUB231SD xmmreg|mask|z,xmmreg,xmmrm64|er [rvm:t1s: evex.nds.lig.66.0f38.w1 bb /r ] AVX512,FUTURE */ + /* 241(f2 fd 08) 306 001(bb) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VFMSUB231SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+33016, 545, 5405}, + /* 5290 : VFMSUB231SS xmmreg|mask|z,xmmreg,xmmrm32|er [rvm:t1s: evex.nds.lig.66.0f38.w0 bb /r ] AVX512,FUTURE */ + /* 241(f2 7d 08) 306 001(bb) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VFMSUB231SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+33025, 545, 5406}, + /* 5291 : VFMSUBADD132PD xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 97 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(97) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMSUBADD132PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+33034, 543, 5407}, + /* 5292 : VFMSUBADD132PD ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 97 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(97) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMSUBADD132PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+33043, 543, 5408}, + /* 5293 : VFMSUBADD132PD zmmreg|mask|z,zmmreg,zmmrm512|b64|er [rvm:fv: evex.nds.512.66.0f38.w1 97 /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(97) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VFMSUBADD132PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+33052, 544, 5409}, + /* 5294 : VFMSUBADD132PS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 97 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(97) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMSUBADD132PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+33061, 543, 5410}, + /* 5295 : VFMSUBADD132PS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 97 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(97) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMSUBADD132PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+33070, 543, 5411}, + /* 5296 : VFMSUBADD132PS zmmreg|mask|z,zmmreg,zmmrm512|b32|er [rvm:fv: evex.nds.512.66.0f38.w0 97 /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(97) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VFMSUBADD132PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+33079, 544, 5412}, + /* 5297 : VFMSUBADD213PD xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 a7 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(a7) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMSUBADD213PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+33088, 543, 5413}, + /* 5298 : VFMSUBADD213PD ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 a7 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(a7) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMSUBADD213PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+33097, 543, 5414}, + /* 5299 : VFMSUBADD213PD zmmreg|mask|z,zmmreg,zmmrm512|b64|er [rvm:fv: evex.nds.512.66.0f38.w1 a7 /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(a7) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VFMSUBADD213PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+33106, 544, 5415}, + /* 5300 : VFMSUBADD213PS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 a7 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(a7) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMSUBADD213PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+33115, 543, 5416}, + /* 5301 : VFMSUBADD213PS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 a7 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(a7) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMSUBADD213PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+33124, 543, 5417}, + /* 5302 : VFMSUBADD213PS zmmreg|mask|z,zmmreg,zmmrm512|b32|er [rvm:fv: evex.nds.512.66.0f38.w0 a7 /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(a7) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VFMSUBADD213PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+33133, 544, 5418}, + /* 5303 : VFMSUBADD231PD xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 b7 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(b7) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMSUBADD231PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+33142, 543, 5419}, + /* 5304 : VFMSUBADD231PD ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 b7 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(b7) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMSUBADD231PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+33151, 543, 5420}, + /* 5305 : VFMSUBADD231PD zmmreg|mask|z,zmmreg,zmmrm512|b64|er [rvm:fv: evex.nds.512.66.0f38.w1 b7 /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(b7) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VFMSUBADD231PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+33160, 544, 5421}, + /* 5306 : VFMSUBADD231PS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 b7 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(b7) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMSUBADD231PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+33169, 543, 5422}, + /* 5307 : VFMSUBADD231PS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 b7 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(b7) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFMSUBADD231PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+33178, 543, 5423}, + /* 5308 : VFMSUBADD231PS zmmreg|mask|z,zmmreg,zmmrm512|b32|er [rvm:fv: evex.nds.512.66.0f38.w0 b7 /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(b7) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VFMSUBADD231PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+33187, 544, 5424}, + /* 5309 : VFNMADD132PD xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 9c /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(9c) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFNMADD132PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+33196, 543, 5425}, + /* 5310 : VFNMADD132PD ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 9c /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(9c) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFNMADD132PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+33205, 543, 5426}, + /* 5311 : VFNMADD132PD zmmreg|mask|z,zmmreg,zmmrm512|b64|er [rvm:fv: evex.nds.512.66.0f38.w1 9c /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(9c) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VFNMADD132PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+33214, 544, 5427}, + /* 5312 : VFNMADD132PS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 9c /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(9c) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFNMADD132PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+33223, 543, 5428}, + /* 5313 : VFNMADD132PS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 9c /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(9c) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFNMADD132PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+33232, 543, 5429}, + /* 5314 : VFNMADD132PS zmmreg|mask|z,zmmreg,zmmrm512|b32|er [rvm:fv: evex.nds.512.66.0f38.w0 9c /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(9c) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VFNMADD132PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+33241, 544, 5430}, + /* 5315 : VFNMADD132SD xmmreg|mask|z,xmmreg,xmmrm64|er [rvm:t1s: evex.nds.lig.66.0f38.w1 9d /r ] AVX512,FUTURE */ + /* 241(f2 fd 08) 306 001(9d) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VFNMADD132SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+33250, 545, 5431}, + /* 5316 : VFNMADD132SS xmmreg|mask|z,xmmreg,xmmrm32|er [rvm:t1s: evex.nds.lig.66.0f38.w0 9d /r ] AVX512,FUTURE */ + /* 241(f2 7d 08) 306 001(9d) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VFNMADD132SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+33259, 545, 5432}, + /* 5317 : VFNMADD213PD xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 ac /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(ac) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFNMADD213PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+33268, 543, 5433}, + /* 5318 : VFNMADD213PD ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 ac /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(ac) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFNMADD213PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+33277, 543, 5434}, + /* 5319 : VFNMADD213PD zmmreg|mask|z,zmmreg,zmmrm512|b64|er [rvm:fv: evex.nds.512.66.0f38.w1 ac /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(ac) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VFNMADD213PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+33286, 544, 5435}, + /* 5320 : VFNMADD213PS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 ac /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(ac) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFNMADD213PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+33295, 543, 5436}, + /* 5321 : VFNMADD213PS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 ac /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(ac) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFNMADD213PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+33304, 543, 5437}, + /* 5322 : VFNMADD213PS zmmreg|mask|z,zmmreg,zmmrm512|b32|er [rvm:fv: evex.nds.512.66.0f38.w0 ac /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(ac) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VFNMADD213PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+33313, 544, 5438}, + /* 5323 : VFNMADD213SD xmmreg|mask|z,xmmreg,xmmrm64|er [rvm:t1s: evex.nds.lig.66.0f38.w1 ad /r ] AVX512,FUTURE */ + /* 241(f2 fd 08) 306 001(ad) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VFNMADD213SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+33322, 545, 5439}, + /* 5324 : VFNMADD213SS xmmreg|mask|z,xmmreg,xmmrm32|er [rvm:t1s: evex.nds.lig.66.0f38.w0 ad /r ] AVX512,FUTURE */ + /* 241(f2 7d 08) 306 001(ad) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VFNMADD213SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+33331, 545, 5440}, + /* 5325 : VFNMADD231PD xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 bc /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(bc) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFNMADD231PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+33340, 543, 5441}, + /* 5326 : VFNMADD231PD ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 bc /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(bc) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFNMADD231PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+33349, 543, 5442}, + /* 5327 : VFNMADD231PD zmmreg|mask|z,zmmreg,zmmrm512|b64|er [rvm:fv: evex.nds.512.66.0f38.w1 bc /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(bc) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VFNMADD231PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+33358, 544, 5443}, + /* 5328 : VFNMADD231PS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 bc /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(bc) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFNMADD231PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+33367, 543, 5444}, + /* 5329 : VFNMADD231PS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 bc /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(bc) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFNMADD231PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+33376, 543, 5445}, + /* 5330 : VFNMADD231PS zmmreg|mask|z,zmmreg,zmmrm512|b32|er [rvm:fv: evex.nds.512.66.0f38.w0 bc /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(bc) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VFNMADD231PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+33385, 544, 5446}, + /* 5331 : VFNMADD231SD xmmreg|mask|z,xmmreg,xmmrm64|er [rvm:t1s: evex.nds.lig.66.0f38.w1 bd /r ] AVX512,FUTURE */ + /* 241(f2 fd 08) 306 001(bd) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VFNMADD231SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+33394, 545, 5447}, + /* 5332 : VFNMADD231SS xmmreg|mask|z,xmmreg,xmmrm32|er [rvm:t1s: evex.nds.lig.66.0f38.w0 bd /r ] AVX512,FUTURE */ + /* 241(f2 7d 08) 306 001(bd) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VFNMADD231SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+33403, 545, 5448}, + /* 5333 : VFNMSUB132PD xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 9e /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(9e) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFNMSUB132PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+33412, 543, 5449}, + /* 5334 : VFNMSUB132PD ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 9e /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(9e) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFNMSUB132PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+33421, 543, 5450}, + /* 5335 : VFNMSUB132PD zmmreg|mask|z,zmmreg,zmmrm512|b64|er [rvm:fv: evex.nds.512.66.0f38.w1 9e /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(9e) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VFNMSUB132PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+33430, 544, 5451}, + /* 5336 : VFNMSUB132PS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 9e /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(9e) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFNMSUB132PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+33439, 543, 5452}, + /* 5337 : VFNMSUB132PS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 9e /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(9e) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFNMSUB132PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+33448, 543, 5453}, + /* 5338 : VFNMSUB132PS zmmreg|mask|z,zmmreg,zmmrm512|b32|er [rvm:fv: evex.nds.512.66.0f38.w0 9e /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(9e) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VFNMSUB132PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+33457, 544, 5454}, + /* 5339 : VFNMSUB132SD xmmreg|mask|z,xmmreg,xmmrm64|er [rvm:t1s: evex.nds.lig.66.0f38.w1 9f /r ] AVX512,FUTURE */ + /* 241(f2 fd 08) 306 001(9f) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VFNMSUB132SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+33466, 545, 5455}, + /* 5340 : VFNMSUB132SS xmmreg|mask|z,xmmreg,xmmrm32|er [rvm:t1s: evex.nds.lig.66.0f38.w0 9f /r ] AVX512,FUTURE */ + /* 241(f2 7d 08) 306 001(9f) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VFNMSUB132SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+33475, 545, 5456}, + /* 5341 : VFNMSUB213PD xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 ae /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(ae) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFNMSUB213PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+33484, 543, 5457}, + /* 5342 : VFNMSUB213PD ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 ae /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(ae) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFNMSUB213PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+33493, 543, 5458}, + /* 5343 : VFNMSUB213PD zmmreg|mask|z,zmmreg,zmmrm512|b64|er [rvm:fv: evex.nds.512.66.0f38.w1 ae /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(ae) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VFNMSUB213PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+33502, 544, 5459}, + /* 5344 : VFNMSUB213PS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 ae /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(ae) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFNMSUB213PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+33511, 543, 5460}, + /* 5345 : VFNMSUB213PS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 ae /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(ae) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFNMSUB213PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+33520, 543, 5461}, + /* 5346 : VFNMSUB213PS zmmreg|mask|z,zmmreg,zmmrm512|b32|er [rvm:fv: evex.nds.512.66.0f38.w0 ae /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(ae) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VFNMSUB213PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+33529, 544, 5462}, + /* 5347 : VFNMSUB213SD xmmreg|mask|z,xmmreg,xmmrm64|er [rvm:t1s: evex.nds.lig.66.0f38.w1 af /r ] AVX512,FUTURE */ + /* 241(f2 fd 08) 306 001(af) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VFNMSUB213SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+33538, 545, 5463}, + /* 5348 : VFNMSUB213SS xmmreg|mask|z,xmmreg,xmmrm32|er [rvm:t1s: evex.nds.lig.66.0f38.w0 af /r ] AVX512,FUTURE */ + /* 241(f2 7d 08) 306 001(af) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VFNMSUB213SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+33547, 545, 5464}, + /* 5349 : VFNMSUB231PD xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 be /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(be) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFNMSUB231PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+33556, 543, 5465}, + /* 5350 : VFNMSUB231PD ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 be /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(be) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFNMSUB231PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+33565, 543, 5466}, + /* 5351 : VFNMSUB231PD zmmreg|mask|z,zmmreg,zmmrm512|b64|er [rvm:fv: evex.nds.512.66.0f38.w1 be /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(be) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VFNMSUB231PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+33574, 544, 5467}, + /* 5352 : VFNMSUB231PS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 be /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(be) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFNMSUB231PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+33583, 543, 5468}, + /* 5353 : VFNMSUB231PS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 be /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(be) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VFNMSUB231PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+33592, 543, 5469}, + /* 5354 : VFNMSUB231PS zmmreg|mask|z,zmmreg,zmmrm512|b32|er [rvm:fv: evex.nds.512.66.0f38.w0 be /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(be) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VFNMSUB231PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+33601, 544, 5470}, + /* 5355 : VFNMSUB231SD xmmreg|mask|z,xmmreg,xmmrm64|er [rvm:t1s: evex.nds.lig.66.0f38.w1 bf /r ] AVX512,FUTURE */ + /* 241(f2 fd 08) 306 001(bf) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VFNMSUB231SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+33610, 545, 5471}, + /* 5356 : VFNMSUB231SS xmmreg|mask|z,xmmreg,xmmrm32|er [rvm:t1s: evex.nds.lig.66.0f38.w0 bf /r ] AVX512,FUTURE */ + /* 241(f2 7d 08) 306 001(bf) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VFNMSUB231SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+33619, 545, 5472}, + /* 5357 : VFPCLASSPD kreg|mask,xmmrm128|b64,imm8 [rmi:fv: evex.128.66.0f3a.w1 66 /r ib ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f3 fd 08) 301 001(66) 110 022 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VFPCLASSPD, 3, {OPMASKREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK,B64,0,0,0}, nasm_bytecodes+18833, 546, 5473}, + /* 5358 : VFPCLASSPD kreg|mask,ymmrm256|b64,imm8 [rmi:fv: evex.256.66.0f3a.w1 66 /r ib ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f3 fd 28) 301 001(66) 110 022 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VFPCLASSPD, 3, {OPMASKREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK,B64,0,0,0}, nasm_bytecodes+18843, 546, 5474}, + /* 5359 : VFPCLASSPD kreg|mask,zmmrm512|b64,imm8 [rmi:fv: evex.512.66.0f3a.w1 66 /r ib ] AVX512DQ,FUTURE */ + /* 250(f3 fd 48) 301 001(66) 110 022 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VFPCLASSPD, 3, {OPMASKREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK,B64,0,0,0}, nasm_bytecodes+18853, 547, 5475}, + /* 5360 : VFPCLASSPS kreg|mask,xmmrm128|b32,imm8 [rmi:fv: evex.128.66.0f3a.w0 66 /r ib ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f3 7d 08) 301 001(66) 110 022 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VFPCLASSPS, 3, {OPMASKREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK,B32,0,0,0}, nasm_bytecodes+18863, 546, 5476}, + /* 5361 : VFPCLASSPS kreg|mask,ymmrm256|b32,imm8 [rmi:fv: evex.256.66.0f3a.w0 66 /r ib ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f3 7d 28) 301 001(66) 110 022 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VFPCLASSPS, 3, {OPMASKREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK,B32,0,0,0}, nasm_bytecodes+18873, 546, 5477}, + /* 5362 : VFPCLASSPS kreg|mask,zmmrm512|b32,imm8 [rmi:fv: evex.512.66.0f3a.w0 66 /r ib ] AVX512DQ,FUTURE */ + /* 250(f3 7d 48) 301 001(66) 110 022 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VFPCLASSPS, 3, {OPMASKREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK,B32,0,0,0}, nasm_bytecodes+18883, 547, 5478}, + /* 5363 : VFPCLASSSD kreg|mask,xmmrm64,imm8 [rmi:t1s: evex.lig.66.0f3a.w1 67 /r ib ] AVX512DQ,FUTURE */ + /* 250(f3 fd 08) 306 001(67) 110 022 : LIG,EVEX,PROT,AVX512DQ,FUTURE */ + {I_VFPCLASSSD, 3, {OPMASKREG,RM_XMM|BITS64,IMM_NORMAL|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+18893, 553, 5479}, + /* 5364 : VFPCLASSSS kreg|mask,xmmrm32,imm8 [rmi:t1s: evex.lig.66.0f3a.w0 67 /r ib ] AVX512DQ,FUTURE */ + /* 250(f3 7d 08) 306 001(67) 110 022 : LIG,EVEX,PROT,AVX512DQ,FUTURE */ + {I_VFPCLASSSS, 3, {OPMASKREG,RM_XMM|BITS32,IMM_NORMAL|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+18903, 553, 5480}, + /* 5365 : VGATHERDPD xmmreg|mask,xmem64 [rm:t1s: vsibx evex.128.66.0f38.w1 92 /r ] AVX512,AVX512VL,FUTURE */ + /* 374 250(f2 fd 08) 306 001(92) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VGATHERDPD, 2, {XMMREG,XMEM|BITS64,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+18913, 543, 5481}, + /* 5366 : VGATHERDPD ymmreg|mask,xmem64 [rm:t1s: vsibx evex.256.66.0f38.w1 92 /r ] AVX512,AVX512VL,FUTURE */ + /* 374 250(f2 fd 28) 306 001(92) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VGATHERDPD, 2, {YMMREG,XMEM|BITS64,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+18923, 543, 5482}, + /* 5367 : VGATHERDPD zmmreg|mask,ymem64 [rm:t1s: vsiby evex.512.66.0f38.w1 92 /r ] AVX512,FUTURE */ + /* 375 250(f2 fd 48) 306 001(92) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VGATHERDPD, 2, {ZMMREG,YMEM|BITS64,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+18933, 544, 5483}, + /* 5368 : VGATHERDPS xmmreg|mask,xmem32 [rm:t1s: vsibx evex.128.66.0f38.w0 92 /r ] AVX512,AVX512VL,FUTURE */ + /* 374 250(f2 7d 08) 306 001(92) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VGATHERDPS, 2, {XMMREG,XMEM|BITS32,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+18943, 543, 5484}, + /* 5369 : VGATHERDPS ymmreg|mask,ymem32 [rm:t1s: vsiby evex.256.66.0f38.w0 92 /r ] AVX512,AVX512VL,FUTURE */ + /* 375 250(f2 7d 28) 306 001(92) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VGATHERDPS, 2, {YMMREG,YMEM|BITS32,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+18953, 543, 5485}, + /* 5370 : VGATHERDPS zmmreg|mask,zmem32 [rm:t1s: vsibz evex.512.66.0f38.w0 92 /r ] AVX512,FUTURE */ + /* 376 250(f2 7d 48) 306 001(92) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VGATHERDPS, 2, {ZMMREG,ZMEM|BITS32,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+18963, 544, 5486}, + /* 5371 : VGATHERPF0DPD ymem64|mask [m:t1s: vsiby evex.512.66.0f38.w1 c6 /1 ] AVX512PF,FUTURE */ + /* 375 250(f2 fd 48) 306 001(c6) 201 : EVEX,PROT,AVX512PF,FUTURE */ + {I_VGATHERPF0DPD, 1, {YMEM|BITS64,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+18973, 554, 5487}, + /* 5372 : VGATHERPF0DPS zmem32|mask [m:t1s: vsibz evex.512.66.0f38.w0 c6 /1 ] AVX512PF,FUTURE */ + /* 376 250(f2 7d 48) 306 001(c6) 201 : EVEX,PROT,AVX512PF,FUTURE */ + {I_VGATHERPF0DPS, 1, {ZMEM|BITS32,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+18983, 554, 5488}, + /* 5373 : VGATHERPF0QPD zmem64|mask [m:t1s: vsibz evex.512.66.0f38.w1 c7 /1 ] AVX512PF,FUTURE */ + /* 376 250(f2 fd 48) 306 001(c7) 201 : EVEX,PROT,AVX512PF,FUTURE */ + {I_VGATHERPF0QPD, 1, {ZMEM|BITS64,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+18993, 554, 5489}, + /* 5374 : VGATHERPF0QPS zmem32|mask [m:t1s: vsibz evex.512.66.0f38.w0 c7 /1 ] AVX512PF,FUTURE */ + /* 376 250(f2 7d 48) 306 001(c7) 201 : EVEX,PROT,AVX512PF,FUTURE */ + {I_VGATHERPF0QPS, 1, {ZMEM|BITS32,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+19003, 554, 5490}, + /* 5375 : VGATHERPF1DPD ymem64|mask [m:t1s: vsiby evex.512.66.0f38.w1 c6 /2 ] AVX512PF,FUTURE */ + /* 375 250(f2 fd 48) 306 001(c6) 202 : EVEX,PROT,AVX512PF,FUTURE */ + {I_VGATHERPF1DPD, 1, {YMEM|BITS64,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+19013, 554, 5491}, + /* 5376 : VGATHERPF1DPS zmem32|mask [m:t1s: vsibz evex.512.66.0f38.w0 c6 /2 ] AVX512PF,FUTURE */ + /* 376 250(f2 7d 48) 306 001(c6) 202 : EVEX,PROT,AVX512PF,FUTURE */ + {I_VGATHERPF1DPS, 1, {ZMEM|BITS32,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+19023, 554, 5492}, + /* 5377 : VGATHERPF1QPD zmem64|mask [m:t1s: vsibz evex.512.66.0f38.w1 c7 /2 ] AVX512PF,FUTURE */ + /* 376 250(f2 fd 48) 306 001(c7) 202 : EVEX,PROT,AVX512PF,FUTURE */ + {I_VGATHERPF1QPD, 1, {ZMEM|BITS64,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+19033, 554, 5493}, + /* 5378 : VGATHERPF1QPS zmem32|mask [m:t1s: vsibz evex.512.66.0f38.w0 c7 /2 ] AVX512PF,FUTURE */ + /* 376 250(f2 7d 48) 306 001(c7) 202 : EVEX,PROT,AVX512PF,FUTURE */ + {I_VGATHERPF1QPS, 1, {ZMEM|BITS32,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+19043, 554, 5494}, + /* 5379 : VGATHERQPD xmmreg|mask,xmem64 [rm:t1s: vsibx evex.128.66.0f38.w1 93 /r ] AVX512,AVX512VL,FUTURE */ + /* 374 250(f2 fd 08) 306 001(93) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VGATHERQPD, 2, {XMMREG,XMEM|BITS64,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+19053, 543, 5495}, + /* 5380 : VGATHERQPD ymmreg|mask,ymem64 [rm:t1s: vsiby evex.256.66.0f38.w1 93 /r ] AVX512,AVX512VL,FUTURE */ + /* 375 250(f2 fd 28) 306 001(93) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VGATHERQPD, 2, {YMMREG,YMEM|BITS64,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+19063, 543, 5496}, + /* 5381 : VGATHERQPD zmmreg|mask,zmem64 [rm:t1s: vsibz evex.512.66.0f38.w1 93 /r ] AVX512,FUTURE */ + /* 376 250(f2 fd 48) 306 001(93) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VGATHERQPD, 2, {ZMMREG,ZMEM|BITS64,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+19073, 544, 5497}, + /* 5382 : VGATHERQPS xmmreg|mask,xmem32 [rm:t1s: vsibx evex.128.66.0f38.w0 93 /r ] AVX512,AVX512VL,FUTURE */ + /* 374 250(f2 7d 08) 306 001(93) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VGATHERQPS, 2, {XMMREG,XMEM|BITS32,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+19083, 543, 5498}, + /* 5383 : VGATHERQPS xmmreg|mask,ymem32 [rm:t1s: vsiby evex.256.66.0f38.w0 93 /r ] AVX512,AVX512VL,FUTURE */ + /* 375 250(f2 7d 28) 306 001(93) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VGATHERQPS, 2, {XMMREG,YMEM|BITS32,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+19093, 543, 5499}, + /* 5384 : VGATHERQPS ymmreg|mask,zmem32 [rm:t1s: vsibz evex.512.66.0f38.w0 93 /r ] AVX512,FUTURE */ + /* 376 250(f2 7d 48) 306 001(93) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VGATHERQPS, 2, {YMMREG,ZMEM|BITS32,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+19103, 544, 5500}, + /* 5385 : VGETEXPPD xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.66.0f38.w1 42 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 fd 08) 301 001(42) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VGETEXPPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+33628, 543, 5501}, + /* 5386 : VGETEXPPD ymmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.66.0f38.w1 42 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 fd 28) 301 001(42) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VGETEXPPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+33637, 543, 5502}, + /* 5387 : VGETEXPPD zmmreg|mask|z,zmmrm512|b64|sae [rm:fv: evex.512.66.0f38.w1 42 /r ] AVX512,FUTURE */ + /* 250(f2 fd 48) 301 001(42) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VGETEXPPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+33646, 544, 5503}, + /* 5388 : VGETEXPPS xmmreg|mask|z,xmmrm128|b32 [rm:fv: evex.128.66.0f38.w0 42 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 08) 301 001(42) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VGETEXPPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+33655, 543, 5504}, + /* 5389 : VGETEXPPS ymmreg|mask|z,ymmrm256|b32 [rm:fv: evex.256.66.0f38.w0 42 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 28) 301 001(42) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VGETEXPPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+33664, 543, 5505}, + /* 5390 : VGETEXPPS zmmreg|mask|z,zmmrm512|b32|sae [rm:fv: evex.512.66.0f38.w0 42 /r ] AVX512,FUTURE */ + /* 250(f2 7d 48) 301 001(42) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VGETEXPPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+33673, 544, 5506}, + /* 5391 : VGETEXPSD xmmreg|mask|z,xmmreg,xmmrm64|sae [rvm:t1s: evex.nds.lig.66.0f38.w1 43 /r ] AVX512,FUTURE */ + /* 241(f2 fd 08) 306 001(43) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VGETEXPSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+33682, 545, 5507}, + /* 5392 : VGETEXPSS xmmreg|mask|z,xmmreg,xmmrm32|sae [rvm:t1s: evex.nds.lig.66.0f38.w0 43 /r ] AVX512,FUTURE */ + /* 241(f2 7d 08) 306 001(43) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VGETEXPSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+33691, 545, 5508}, + /* 5393 : VGETMANTPD xmmreg|mask|z,xmmrm128|b64,imm8 [rmi:fv: evex.128.66.0f3a.w1 26 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 250(f3 fd 08) 301 001(26) 110 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VGETMANTPD, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+19113, 543, 5509}, + /* 5394 : VGETMANTPD ymmreg|mask|z,ymmrm256|b64,imm8 [rmi:fv: evex.256.66.0f3a.w1 26 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 250(f3 fd 28) 301 001(26) 110 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VGETMANTPD, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+19123, 543, 5510}, + /* 5395 : VGETMANTPD zmmreg|mask|z,zmmrm512|b64|sae,imm8 [rmi:fv: evex.512.66.0f3a.w1 26 /r ib ] AVX512,FUTURE */ + /* 250(f3 fd 48) 301 001(26) 110 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VGETMANTPD, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+19133, 544, 5511}, + /* 5396 : VGETMANTPS xmmreg|mask|z,xmmrm128|b32,imm8 [rmi:fv: evex.128.66.0f3a.w0 26 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 250(f3 7d 08) 301 001(26) 110 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VGETMANTPS, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+19143, 543, 5512}, + /* 5397 : VGETMANTPS ymmreg|mask|z,ymmrm256|b32,imm8 [rmi:fv: evex.256.66.0f3a.w0 26 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 250(f3 7d 28) 301 001(26) 110 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VGETMANTPS, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+19153, 543, 5513}, + /* 5398 : VGETMANTPS zmmreg|mask|z,zmmrm512|b32|sae,imm8 [rmi:fv: evex.512.66.0f3a.w0 26 /r ib ] AVX512,FUTURE */ + /* 250(f3 7d 48) 301 001(26) 110 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VGETMANTPS, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+19163, 544, 5514}, + /* 5399 : VGETMANTSD xmmreg|mask|z,xmmreg,xmmrm64|sae,imm8 [rvmi:t1s: evex.nds.lig.66.0f3a.w1 27 /r ib ] AVX512,FUTURE */ + /* 241(f3 fd 08) 306 001(27) 120 023 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VGETMANTSD, 4, {XMMREG,XMMREG,RM_XMM|BITS64,IMM_NORMAL|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+19173, 545, 5515}, + /* 5400 : VGETMANTSS xmmreg|mask|z,xmmreg,xmmrm32|sae,imm8 [rvmi:t1s: evex.nds.lig.66.0f3a.w0 27 /r ib ] AVX512,FUTURE */ + /* 241(f3 7d 08) 306 001(27) 120 023 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VGETMANTSS, 4, {XMMREG,XMMREG,RM_XMM|BITS32,IMM_NORMAL|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+19183, 545, 5516}, + /* 5401 : VINSERTF32X4 ymmreg|mask|z,ymmreg*,xmmrm128,imm8 [rvmi:t4: evex.nds.256.66.0f3a.w0 18 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 28) 312 001(18) 120 023 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VINSERTF32X4, 4, {YMMREG,YMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19193, 543, 5517}, + /* 5402 : VINSERTF32X4 zmmreg|mask|z,zmmreg*,xmmrm128,imm8 [rvmi:t4: evex.nds.512.66.0f3a.w0 18 /r ib ] AVX512,FUTURE */ + /* 241(f3 7d 48) 312 001(18) 120 023 : EVEX,PROT,AVX512,FUTURE */ + {I_VINSERTF32X4, 4, {ZMMREG,ZMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19213, 544, 5518}, + /* 5403 : VINSERTF32X8 zmmreg|mask|z,zmmreg*,ymmrm256,imm8 [rvmi:t8: evex.nds.512.66.0f3a.w0 1a /r ib ] AVX512DQ,FUTURE */ + /* 241(f3 7d 48) 313 001(1a) 120 023 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VINSERTF32X8, 4, {ZMMREG,ZMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19233, 547, 5519}, + /* 5404 : VINSERTF64X2 ymmreg|mask|z,ymmreg*,xmmrm128,imm8 [rvmi:t2: evex.nds.256.66.0f3a.w1 18 /r ib ] AVX512VL,AVX512DQ,FUTURE */ + /* 241(f3 fd 28) 311 001(18) 120 023 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VINSERTF64X2, 4, {YMMREG,YMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19253, 546, 5520}, + /* 5405 : VINSERTF64X2 zmmreg|mask|z,zmmreg*,xmmrm128,imm8 [rvmi:t2: evex.nds.512.66.0f3a.w1 18 /r ib ] AVX512DQ,FUTURE */ + /* 241(f3 fd 48) 311 001(18) 120 023 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VINSERTF64X2, 4, {ZMMREG,ZMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19273, 547, 5521}, + /* 5406 : VINSERTF64X4 zmmreg|mask|z,zmmreg*,ymmrm256,imm8 [rvmi:t4: evex.nds.512.66.0f3a.w1 1a /r ib ] AVX512,FUTURE */ + /* 241(f3 fd 48) 312 001(1a) 120 023 : EVEX,PROT,AVX512,FUTURE */ + {I_VINSERTF64X4, 4, {ZMMREG,ZMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19293, 544, 5522}, + /* 5407 : VINSERTI32X4 ymmreg|mask|z,ymmreg*,xmmrm128,imm8 [rvmi:t4: evex.nds.256.66.0f3a.w0 38 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 28) 312 001(38) 120 023 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VINSERTI32X4, 4, {YMMREG,YMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19313, 543, 5523}, + /* 5408 : VINSERTI32X4 zmmreg|mask|z,zmmreg*,xmmrm128,imm8 [rvmi:t4: evex.nds.512.66.0f3a.w0 38 /r ib ] AVX512,FUTURE */ + /* 241(f3 7d 48) 312 001(38) 120 023 : EVEX,PROT,AVX512,FUTURE */ + {I_VINSERTI32X4, 4, {ZMMREG,ZMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19333, 544, 5524}, + /* 5409 : VINSERTI32X8 zmmreg|mask|z,zmmreg*,ymmrm256,imm8 [rvmi:t8: evex.nds.512.66.0f3a.w0 3a /r ib ] AVX512DQ,FUTURE */ + /* 241(f3 7d 48) 313 001(3a) 120 023 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VINSERTI32X8, 4, {ZMMREG,ZMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19353, 547, 5525}, + /* 5410 : VINSERTI64X2 ymmreg|mask|z,ymmreg*,xmmrm128,imm8 [rvmi:t2: evex.nds.256.66.0f3a.w1 38 /r ib ] AVX512VL,AVX512DQ,FUTURE */ + /* 241(f3 fd 28) 311 001(38) 120 023 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VINSERTI64X2, 4, {YMMREG,YMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19373, 546, 5526}, + /* 5411 : VINSERTI64X2 zmmreg|mask|z,zmmreg*,xmmrm128,imm8 [rvmi:t2: evex.nds.512.66.0f3a.w1 38 /r ib ] AVX512DQ,FUTURE */ + /* 241(f3 fd 48) 311 001(38) 120 023 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VINSERTI64X2, 4, {ZMMREG,ZMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19393, 547, 5527}, + /* 5412 : VINSERTI64X4 zmmreg|mask|z,zmmreg*,ymmrm256,imm8 [rvmi:t4: evex.nds.512.66.0f3a.w1 3a /r ib ] AVX512,FUTURE */ + /* 241(f3 fd 48) 312 001(3a) 120 023 : EVEX,PROT,AVX512,FUTURE */ + {I_VINSERTI64X4, 4, {ZMMREG,ZMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19413, 544, 5528}, + /* 5413 : VINSERTPS xmmreg,xmmreg*,xmmrm32,imm8 [rvmi:t1s: evex.nds.128.66.0f3a.w0 21 /r ib ] AVX512,FUTURE */ + /* 241(f3 7d 08) 306 001(21) 120 023 : EVEX,PROT,AVX512,FUTURE */ + {I_VINSERTPS, 4, {XMMREG,XMMREG,RM_XMM|BITS32,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+19433, 544, 5529}, + /* 5414 : VMAXPD xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f.w1 5f /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(5f) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMAXPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+33700, 543, 5530}, + /* 5415 : VMAXPD ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f.w1 5f /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(5f) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMAXPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+33718, 543, 5531}, + /* 5416 : VMAXPD zmmreg|mask|z,zmmreg*,zmmrm512|b64|sae [rvm:fv: evex.nds.512.66.0f.w1 5f /r ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(5f) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VMAXPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|SAE,0,0}, nasm_bytecodes+33736, 544, 5532}, + /* 5417 : VMAXPS xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.0f.w0 5f /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(5f) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMAXPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+33754, 543, 5533}, + /* 5418 : VMAXPS ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.0f.w0 5f /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(5f) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMAXPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+33772, 543, 5534}, + /* 5419 : VMAXPS zmmreg|mask|z,zmmreg*,zmmrm512|b32|sae [rvm:fv: evex.nds.512.0f.w0 5f /r ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(5f) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VMAXPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|SAE,0,0}, nasm_bytecodes+33790, 544, 5535}, + /* 5420 : VMAXSD xmmreg|mask|z,xmmreg*,xmmrm64|sae [rvm:t1s: evex.nds.lig.f2.0f.w1 5f /r ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(5f) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VMAXSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+33808, 545, 5536}, + /* 5421 : VMAXSS xmmreg|mask|z,xmmreg*,xmmrm32|sae [rvm:t1s: evex.nds.lig.f3.0f.w0 5f /r ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(5f) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VMAXSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+33826, 545, 5537}, + /* 5422 : VMINPD xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f.w1 5d /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(5d) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMINPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+33844, 543, 5538}, + /* 5423 : VMINPD ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f.w1 5d /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(5d) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMINPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+33862, 543, 5539}, + /* 5424 : VMINPD zmmreg|mask|z,zmmreg*,zmmrm512|b64|sae [rvm:fv: evex.nds.512.66.0f.w1 5d /r ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(5d) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VMINPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|SAE,0,0}, nasm_bytecodes+33880, 544, 5540}, + /* 5425 : VMINPS xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.0f.w0 5d /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(5d) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMINPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+33898, 543, 5541}, + /* 5426 : VMINPS ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.0f.w0 5d /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(5d) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMINPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+33916, 543, 5542}, + /* 5427 : VMINPS zmmreg|mask|z,zmmreg*,zmmrm512|b32|sae [rvm:fv: evex.nds.512.0f.w0 5d /r ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(5d) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VMINPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|SAE,0,0}, nasm_bytecodes+33934, 544, 5543}, + /* 5428 : VMINSD xmmreg|mask|z,xmmreg*,xmmrm64|sae [rvm:t1s: evex.nds.lig.f2.0f.w1 5d /r ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(5d) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VMINSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+33952, 545, 5544}, + /* 5429 : VMINSS xmmreg|mask|z,xmmreg*,xmmrm32|sae [rvm:t1s: evex.nds.lig.f3.0f.w0 5d /r ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(5d) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VMINSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+33970, 545, 5545}, + /* 5430 : VMOVAPD xmmreg|mask|z,xmmrm128 [rm:fvm: evex.128.66.0f.w1 28 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 fd 08) 303 001(28) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVAPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+33988, 543, 5546}, + /* 5431 : VMOVAPD ymmreg|mask|z,ymmrm256 [rm:fvm: evex.256.66.0f.w1 28 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 fd 28) 303 001(28) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVAPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+33997, 543, 5547}, + /* 5432 : VMOVAPD zmmreg|mask|z,zmmrm512 [rm:fvm: evex.512.66.0f.w1 28 /r ] AVX512,FUTURE */ + /* 250(f1 fd 48) 303 001(28) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVAPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34006, 544, 5548}, + /* 5433 : VMOVAPD xmmreg|mask|z,xmmreg [mr: evex.128.66.0f.w1 29 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 fd 08) 300 001(29) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVAPD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34015, 543, 5549}, + /* 5434 : VMOVAPD ymmreg|mask|z,ymmreg [mr: evex.256.66.0f.w1 29 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 fd 28) 300 001(29) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVAPD, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34024, 543, 5550}, + /* 5435 : VMOVAPD zmmreg|mask|z,zmmreg [mr: evex.512.66.0f.w1 29 /r ] AVX512,FUTURE */ + /* 250(f1 fd 48) 300 001(29) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVAPD, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34033, 544, 5551}, + /* 5436 : VMOVAPD mem128|mask,xmmreg [mr:fvm: evex.128.66.0f.w1 29 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 fd 08) 303 001(29) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVAPD, 2, {MEMORY|BITS128,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+34042, 543, 5552}, + /* 5437 : VMOVAPD mem256|mask,ymmreg [mr:fvm: evex.256.66.0f.w1 29 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 fd 28) 303 001(29) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVAPD, 2, {MEMORY|BITS256,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+34051, 543, 5553}, + /* 5438 : VMOVAPD mem512|mask,zmmreg [mr:fvm: evex.512.66.0f.w1 29 /r ] AVX512,FUTURE */ + /* 250(f1 fd 48) 303 001(29) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVAPD, 2, {MEMORY|BITS512,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+34060, 544, 5554}, + /* 5439 : VMOVAPS xmmreg|mask|z,xmmrm128 [rm:fvm: evex.128.0f.w0 28 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7c 08) 303 001(28) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVAPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34069, 543, 5555}, + /* 5440 : VMOVAPS ymmreg|mask|z,ymmrm256 [rm:fvm: evex.256.0f.w0 28 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7c 28) 303 001(28) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVAPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34078, 543, 5556}, + /* 5441 : VMOVAPS zmmreg|mask|z,zmmrm512 [rm:fvm: evex.512.0f.w0 28 /r ] AVX512,FUTURE */ + /* 250(f1 7c 48) 303 001(28) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVAPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34087, 544, 5557}, + /* 5442 : VMOVAPS xmmreg|mask|z,xmmreg [mr: evex.128.0f.w0 29 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7c 08) 300 001(29) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVAPS, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34096, 543, 5558}, + /* 5443 : VMOVAPS ymmreg|mask|z,ymmreg [mr: evex.256.0f.w0 29 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7c 28) 300 001(29) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVAPS, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34105, 543, 5559}, + /* 5444 : VMOVAPS zmmreg|mask|z,zmmreg [mr: evex.512.0f.w0 29 /r ] AVX512,FUTURE */ + /* 250(f1 7c 48) 300 001(29) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVAPS, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34114, 544, 5560}, + /* 5445 : VMOVAPS mem128|mask,xmmreg [mr:fvm: evex.128.0f.w0 29 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7c 08) 303 001(29) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVAPS, 2, {MEMORY|BITS128,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+34123, 543, 5561}, + /* 5446 : VMOVAPS mem256|mask,ymmreg [mr:fvm: evex.256.0f.w0 29 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7c 28) 303 001(29) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVAPS, 2, {MEMORY|BITS256,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+34132, 543, 5562}, + /* 5447 : VMOVAPS mem512|mask,zmmreg [mr:fvm: evex.512.0f.w0 29 /r ] AVX512,FUTURE */ + /* 250(f1 7c 48) 303 001(29) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVAPS, 2, {MEMORY|BITS512,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+34141, 544, 5563}, + /* 5448 : VMOVD xmmreg,rm32 [rm:t1s: evex.128.66.0f.w0 6e /r ] AVX512,FUTURE */ + /* 250(f1 7d 08) 306 001(6e) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVD, 2, {XMMREG,RM_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+34150, 544, 5564}, + /* 5449 : VMOVD rm32,xmmreg [mr:t1s: evex.128.66.0f.w0 7e /r ] AVX512,FUTURE */ + /* 250(f1 7d 08) 306 001(7e) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVD, 2, {RM_GPR|BITS32,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+34159, 544, 5565}, + /* 5450 : VMOVDDUP xmmreg|mask|z,xmmrm64 [rm:dup: evex.128.f2.0f.w1 12 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 ff 08) 320 001(12) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVDDUP, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34168, 543, 5566}, + /* 5451 : VMOVDDUP ymmreg|mask|z,ymmrm256 [rm:dup: evex.256.f2.0f.w1 12 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 ff 28) 320 001(12) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVDDUP, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34177, 543, 5567}, + /* 5452 : VMOVDDUP zmmreg|mask|z,zmmrm512 [rm:dup: evex.512.f2.0f.w1 12 /r ] AVX512,FUTURE */ + /* 250(f1 ff 48) 320 001(12) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVDDUP, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34186, 544, 5568}, + /* 5453 : VMOVDQA32 xmmreg|mask|z,xmmrm128 [rm:fvm: evex.128.66.0f.w0 6f /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7d 08) 303 001(6f) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVDQA32, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34195, 543, 5569}, + /* 5454 : VMOVDQA32 ymmreg|mask|z,ymmrm256 [rm:fvm: evex.256.66.0f.w0 6f /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7d 28) 303 001(6f) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVDQA32, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34204, 543, 5570}, + /* 5455 : VMOVDQA32 zmmreg|mask|z,zmmrm512 [rm:fvm: evex.512.66.0f.w0 6f /r ] AVX512,FUTURE */ + /* 250(f1 7d 48) 303 001(6f) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVDQA32, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34213, 544, 5571}, + /* 5456 : VMOVDQA32 xmmrm128|mask|z,xmmreg [mr:fvm: evex.128.66.0f.w0 7f /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7d 08) 303 001(7f) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVDQA32, 2, {RM_XMM|BITS128,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34222, 543, 5572}, + /* 5457 : VMOVDQA32 ymmrm256|mask|z,ymmreg [mr:fvm: evex.256.66.0f.w0 7f /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7d 28) 303 001(7f) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVDQA32, 2, {RM_YMM|BITS256,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34231, 543, 5573}, + /* 5458 : VMOVDQA32 zmmrm512|mask|z,zmmreg [mr:fvm: evex.512.66.0f.w0 7f /r ] AVX512,FUTURE */ + /* 250(f1 7d 48) 303 001(7f) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVDQA32, 2, {RM_ZMM|BITS512,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34240, 544, 5574}, + /* 5459 : VMOVDQA64 xmmreg|mask|z,xmmrm128 [rm:fvm: evex.128.66.0f.w1 6f /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 fd 08) 303 001(6f) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVDQA64, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34249, 543, 5575}, + /* 5460 : VMOVDQA64 ymmreg|mask|z,ymmrm256 [rm:fvm: evex.256.66.0f.w1 6f /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 fd 28) 303 001(6f) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVDQA64, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34258, 543, 5576}, + /* 5461 : VMOVDQA64 zmmreg|mask|z,zmmrm512 [rm:fvm: evex.512.66.0f.w1 6f /r ] AVX512,FUTURE */ + /* 250(f1 fd 48) 303 001(6f) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVDQA64, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34267, 544, 5577}, + /* 5462 : VMOVDQA64 xmmrm128|mask|z,xmmreg [mr:fvm: evex.128.66.0f.w1 7f /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 fd 08) 303 001(7f) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVDQA64, 2, {RM_XMM|BITS128,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34276, 543, 5578}, + /* 5463 : VMOVDQA64 ymmrm256|mask|z,ymmreg [mr:fvm: evex.256.66.0f.w1 7f /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 fd 28) 303 001(7f) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVDQA64, 2, {RM_YMM|BITS256,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34285, 543, 5579}, + /* 5464 : VMOVDQA64 zmmrm512|mask|z,zmmreg [mr:fvm: evex.512.66.0f.w1 7f /r ] AVX512,FUTURE */ + /* 250(f1 fd 48) 303 001(7f) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVDQA64, 2, {RM_ZMM|BITS512,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34294, 544, 5580}, + /* 5465 : VMOVDQU16 xmmreg|mask|z,xmmrm128 [rm:fvm: evex.128.f2.0f.w1 6f /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f1 ff 08) 303 001(6f) 110 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VMOVDQU16, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34303, 549, 5581}, + /* 5466 : VMOVDQU16 ymmreg|mask|z,ymmrm256 [rm:fvm: evex.256.f2.0f.w1 6f /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f1 ff 28) 303 001(6f) 110 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VMOVDQU16, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34312, 549, 5582}, + /* 5467 : VMOVDQU16 zmmreg|mask|z,zmmrm512 [rm:fvm: evex.512.f2.0f.w1 6f /r ] AVX512BW,FUTURE */ + /* 250(f1 ff 48) 303 001(6f) 110 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VMOVDQU16, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34321, 550, 5583}, + /* 5468 : VMOVDQU16 xmmrm128|mask|z,xmmreg [mr:fvm: evex.128.f2.0f.w1 7f /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f1 ff 08) 303 001(7f) 101 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VMOVDQU16, 2, {RM_XMM|BITS128,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34330, 549, 5584}, + /* 5469 : VMOVDQU16 ymmrm256|mask|z,ymmreg [mr:fvm: evex.256.f2.0f.w1 7f /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f1 ff 28) 303 001(7f) 101 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VMOVDQU16, 2, {RM_YMM|BITS256,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34339, 549, 5585}, + /* 5470 : VMOVDQU16 zmmrm512|mask|z,zmmreg [mr:fvm: evex.512.f2.0f.w1 7f /r ] AVX512BW,FUTURE */ + /* 250(f1 ff 48) 303 001(7f) 101 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VMOVDQU16, 2, {RM_ZMM|BITS512,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34348, 550, 5586}, + /* 5471 : VMOVDQU32 xmmreg|mask|z,xmmrm128 [rm:fvm: evex.128.f3.0f.w0 6f /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7e 08) 303 001(6f) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVDQU32, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34357, 543, 5587}, + /* 5472 : VMOVDQU32 ymmreg|mask|z,ymmrm256 [rm:fvm: evex.256.f3.0f.w0 6f /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7e 28) 303 001(6f) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVDQU32, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34366, 543, 5588}, + /* 5473 : VMOVDQU32 zmmreg|mask|z,zmmrm512 [rm:fvm: evex.512.f3.0f.w0 6f /r ] AVX512,FUTURE */ + /* 250(f1 7e 48) 303 001(6f) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVDQU32, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34375, 544, 5589}, + /* 5474 : VMOVDQU32 xmmrm128|mask|z,xmmreg [mr:fvm: evex.128.f3.0f.w0 7f /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7e 08) 303 001(7f) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVDQU32, 2, {RM_XMM|BITS128,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34384, 543, 5590}, + /* 5475 : VMOVDQU32 ymmrm256|mask|z,ymmreg [mr:fvm: evex.256.f3.0f.w0 7f /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7e 28) 303 001(7f) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVDQU32, 2, {RM_YMM|BITS256,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34393, 543, 5591}, + /* 5476 : VMOVDQU32 zmmrm512|mask|z,zmmreg [mr:fvm: evex.512.f3.0f.w0 7f /r ] AVX512,FUTURE */ + /* 250(f1 7e 48) 303 001(7f) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVDQU32, 2, {RM_ZMM|BITS512,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34402, 544, 5592}, + /* 5477 : VMOVDQU64 xmmreg|mask|z,xmmrm128 [rm:fvm: evex.128.f3.0f.w1 6f /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 fe 08) 303 001(6f) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVDQU64, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34411, 543, 5593}, + /* 5478 : VMOVDQU64 ymmreg|mask|z,ymmrm256 [rm:fvm: evex.256.f3.0f.w1 6f /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 fe 28) 303 001(6f) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVDQU64, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34420, 543, 5594}, + /* 5479 : VMOVDQU64 zmmreg|mask|z,zmmrm512 [rm:fvm: evex.512.f3.0f.w1 6f /r ] AVX512,FUTURE */ + /* 250(f1 fe 48) 303 001(6f) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVDQU64, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34429, 544, 5595}, + /* 5480 : VMOVDQU64 xmmrm128|mask|z,xmmreg [mr:fvm: evex.128.f3.0f.w1 7f /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 fe 08) 303 001(7f) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVDQU64, 2, {RM_XMM|BITS128,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34438, 543, 5596}, + /* 5481 : VMOVDQU64 ymmrm256|mask|z,ymmreg [mr:fvm: evex.256.f3.0f.w1 7f /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 fe 28) 303 001(7f) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVDQU64, 2, {RM_YMM|BITS256,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34447, 543, 5597}, + /* 5482 : VMOVDQU64 zmmrm512|mask|z,zmmreg [mr:fvm: evex.512.f3.0f.w1 7f /r ] AVX512,FUTURE */ + /* 250(f1 fe 48) 303 001(7f) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVDQU64, 2, {RM_ZMM|BITS512,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34456, 544, 5598}, + /* 5483 : VMOVDQU8 xmmreg|mask|z,xmmrm128 [rm:fvm: evex.128.f2.0f.w0 6f /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f1 7f 08) 303 001(6f) 110 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VMOVDQU8, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34465, 549, 5599}, + /* 5484 : VMOVDQU8 ymmreg|mask|z,ymmrm256 [rm:fvm: evex.256.f2.0f.w0 6f /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f1 7f 28) 303 001(6f) 110 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VMOVDQU8, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34474, 549, 5600}, + /* 5485 : VMOVDQU8 zmmreg|mask|z,zmmrm512 [rm:fvm: evex.512.f2.0f.w0 6f /r ] AVX512BW,FUTURE */ + /* 250(f1 7f 48) 303 001(6f) 110 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VMOVDQU8, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34483, 550, 5601}, + /* 5486 : VMOVDQU8 xmmrm128|mask|z,xmmreg [mr:fvm: evex.128.f2.0f.w0 7f /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f1 7f 08) 303 001(7f) 101 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VMOVDQU8, 2, {RM_XMM|BITS128,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34492, 549, 5602}, + /* 5487 : VMOVDQU8 ymmrm256|mask|z,ymmreg [mr:fvm: evex.256.f2.0f.w0 7f /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f1 7f 28) 303 001(7f) 101 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VMOVDQU8, 2, {RM_YMM|BITS256,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34501, 549, 5603}, + /* 5488 : VMOVDQU8 zmmrm512|mask|z,zmmreg [mr:fvm: evex.512.f2.0f.w0 7f /r ] AVX512BW,FUTURE */ + /* 250(f1 7f 48) 303 001(7f) 101 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VMOVDQU8, 2, {RM_ZMM|BITS512,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34510, 550, 5604}, + /* 5489 : VMOVHLPS xmmreg,xmmreg*,xmmreg [rvm: evex.nds.128.0f.w0 12 /r ] AVX512,FUTURE */ + /* 241(f1 7c 08) 300 001(12) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVHLPS, 3, {XMMREG,XMMREG,XMMREG,0,0}, NO_DECORATOR, nasm_bytecodes+34519, 544, 5605}, + /* 5490 : VMOVHPD xmmreg,xmmreg*,mem64 [rvm:t1s: evex.nds.128.66.0f.w1 16 /r ] AVX512,FUTURE */ + /* 241(f1 fd 08) 306 001(16) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVHPD, 3, {XMMREG,XMMREG,MEMORY|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+34537, 544, 5606}, + /* 5491 : VMOVHPD mem64,xmmreg [mr:t1s: evex.128.66.0f.w1 17 /r ] AVX512,FUTURE */ + /* 250(f1 fd 08) 306 001(17) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVHPD, 2, {MEMORY|BITS64,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+34555, 544, 5607}, + /* 5492 : VMOVHPS xmmreg,xmmreg*,mem64 [rvm:t2: evex.nds.128.0f.w0 16 /r ] AVX512,FUTURE */ + /* 241(f1 7c 08) 311 001(16) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVHPS, 3, {XMMREG,XMMREG,MEMORY|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+34564, 544, 5608}, + /* 5493 : VMOVHPS mem64,xmmreg [mr:t2: evex.128.0f.w0 17 /r ] AVX512,FUTURE */ + /* 250(f1 7c 08) 311 001(17) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVHPS, 2, {MEMORY|BITS64,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+34582, 544, 5609}, + /* 5494 : VMOVLHPS xmmreg,xmmreg*,xmmreg [rvm: evex.nds.128.0f.w0 16 /r ] AVX512,FUTURE */ + /* 241(f1 7c 08) 300 001(16) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVLHPS, 3, {XMMREG,XMMREG,XMMREG,0,0}, NO_DECORATOR, nasm_bytecodes+34591, 544, 5610}, + /* 5495 : VMOVLPD xmmreg,xmmreg*,mem64 [rvm:t1s: evex.nds.128.66.0f.w1 12 /r ] AVX512,FUTURE */ + /* 241(f1 fd 08) 306 001(12) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVLPD, 3, {XMMREG,XMMREG,MEMORY|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+34609, 544, 5611}, + /* 5496 : VMOVLPD mem64,xmmreg [mr:t1s: evex.128.66.0f.w1 13 /r ] AVX512,FUTURE */ + /* 250(f1 fd 08) 306 001(13) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVLPD, 2, {MEMORY|BITS64,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+34627, 544, 5612}, + /* 5497 : VMOVLPS xmmreg,xmmreg*,mem64 [rvm:t2: evex.nds.128.0f.w0 12 /r ] AVX512,FUTURE */ + /* 241(f1 7c 08) 311 001(12) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVLPS, 3, {XMMREG,XMMREG,MEMORY|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+34636, 544, 5613}, + /* 5498 : VMOVLPS mem64,xmmreg [mr:t2: evex.128.0f.w0 13 /r ] AVX512,FUTURE */ + /* 250(f1 7c 08) 311 001(13) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVLPS, 2, {MEMORY|BITS64,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+34654, 544, 5614}, + /* 5499 : VMOVNTDQ mem128,xmmreg [mr:fvm: evex.128.66.0f.w0 e7 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7d 08) 303 001(e7) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVNTDQ, 2, {MEMORY|BITS128,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+34663, 543, 5615}, + /* 5500 : VMOVNTDQ mem256,ymmreg [mr:fvm: evex.256.66.0f.w0 e7 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7d 28) 303 001(e7) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVNTDQ, 2, {MEMORY|BITS256,YMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+34672, 543, 5616}, + /* 5501 : VMOVNTDQ mem512,zmmreg [mr:fvm: evex.512.66.0f.w0 e7 /r ] AVX512,FUTURE */ + /* 250(f1 7d 48) 303 001(e7) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVNTDQ, 2, {MEMORY|BITS512,ZMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+34681, 544, 5617}, + /* 5502 : VMOVNTDQA xmmreg,mem128 [rm:fvm: evex.128.66.0f38.w0 2a /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 08) 303 001(2a) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVNTDQA, 2, {XMMREG,MEMORY|BITS128,0,0,0}, NO_DECORATOR, nasm_bytecodes+34690, 543, 5618}, + /* 5503 : VMOVNTDQA ymmreg,mem256 [rm:fvm: evex.256.66.0f38.w0 2a /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 28) 303 001(2a) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVNTDQA, 2, {YMMREG,MEMORY|BITS256,0,0,0}, NO_DECORATOR, nasm_bytecodes+34699, 543, 5619}, + /* 5504 : VMOVNTDQA zmmreg,mem512 [rm:fvm: evex.512.66.0f38.w0 2a /r ] AVX512,FUTURE */ + /* 250(f2 7d 48) 303 001(2a) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVNTDQA, 2, {ZMMREG,MEMORY|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+34708, 544, 5620}, + /* 5505 : VMOVNTPD mem128,xmmreg [mr:fvm: evex.128.66.0f.w1 2b /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 fd 08) 303 001(2b) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVNTPD, 2, {MEMORY|BITS128,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+34717, 543, 5621}, + /* 5506 : VMOVNTPD mem256,ymmreg [mr:fvm: evex.256.66.0f.w1 2b /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 fd 28) 303 001(2b) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVNTPD, 2, {MEMORY|BITS256,YMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+34726, 543, 5622}, + /* 5507 : VMOVNTPD mem512,zmmreg [mr:fvm: evex.512.66.0f.w1 2b /r ] AVX512,FUTURE */ + /* 250(f1 fd 48) 303 001(2b) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVNTPD, 2, {MEMORY|BITS512,ZMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+34735, 544, 5623}, + /* 5508 : VMOVNTPS mem128,xmmreg [mr:fvm: evex.128.0f.w0 2b /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7c 08) 303 001(2b) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVNTPS, 2, {MEMORY|BITS128,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+34744, 543, 5624}, + /* 5509 : VMOVNTPS mem256,ymmreg [mr:fvm: evex.256.0f.w0 2b /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7c 28) 303 001(2b) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVNTPS, 2, {MEMORY|BITS256,YMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+34753, 543, 5625}, + /* 5510 : VMOVNTPS mem512,zmmreg [mr:fvm: evex.512.0f.w0 2b /r ] AVX512,FUTURE */ + /* 250(f1 7c 48) 303 001(2b) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVNTPS, 2, {MEMORY|BITS512,ZMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+34762, 544, 5626}, + /* 5511 : VMOVQ xmmreg,rm64 [rm:t1s: evex.128.66.0f.w1 6e /r ] AVX512,FUTURE */ + /* 250(f1 fd 08) 306 001(6e) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVQ, 2, {XMMREG,RM_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+34771, 544, 5627}, + /* 5512 : VMOVQ rm64,xmmreg [mr:t1s: evex.128.66.0f.w1 7e /r ] AVX512,FUTURE */ + /* 250(f1 fd 08) 306 001(7e) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVQ, 2, {RM_GPR|BITS64,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+34780, 544, 5628}, + /* 5513 : VMOVQ xmmreg,xmmrm64 [rm:t1s: evex.128.f3.0f.w1 7e /r ] AVX512,FUTURE */ + /* 250(f1 fe 08) 306 001(7e) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVQ, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+34789, 544, 5629}, + /* 5514 : VMOVQ xmmrm64,xmmreg [mr:t1s: evex.128.66.0f.w1 d6 /r ] AVX512,FUTURE */ + /* 250(f1 fd 08) 306 001(d6) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVQ, 2, {RM_XMM|BITS64,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+34798, 544, 5630}, + /* 5515 : VMOVSD xmmreg|mask|z,mem64 [rm:t1s: evex.lig.f2.0f.w1 10 /r ] AVX512,FUTURE */ + /* 250(f1 ff 08) 306 001(10) 110 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VMOVSD, 2, {XMMREG,MEMORY|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34807, 545, 5631}, + /* 5516 : VMOVSD mem64|mask,xmmreg [mr:t1s: evex.lig.f2.0f.w1 11 /r ] AVX512,FUTURE */ + /* 250(f1 ff 08) 306 001(11) 101 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VMOVSD, 2, {MEMORY|BITS64,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+34816, 545, 5632}, + /* 5517 : VMOVSD xmmreg|mask|z,xmmreg*,xmmreg [rvm: evex.nds.lig.f2.0f.w1 10 /r ] AVX512,FUTURE */ + /* 241(f1 ff 08) 300 001(10) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VMOVSD, 3, {XMMREG,XMMREG,XMMREG,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34825, 545, 5633}, + /* 5518 : VMOVSD xmmreg|mask|z,xmmreg*,xmmreg [mvr: evex.nds.lig.f2.0f.w1 11 /r ] AVX512,FUTURE */ + /* 241(f1 ff 08) 300 001(11) 102 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VMOVSD, 3, {XMMREG,XMMREG,XMMREG,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34843, 545, 5634}, + /* 5519 : VMOVSHDUP xmmreg|mask|z,xmmrm128 [rm:fvm: evex.128.f3.0f.w0 16 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7e 08) 303 001(16) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVSHDUP, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34861, 543, 5635}, + /* 5520 : VMOVSHDUP ymmreg|mask|z,ymmrm256 [rm:fvm: evex.256.f3.0f.w0 16 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7e 28) 303 001(16) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVSHDUP, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34870, 543, 5636}, + /* 5521 : VMOVSHDUP zmmreg|mask|z,zmmrm512 [rm:fvm: evex.512.f3.0f.w0 16 /r ] AVX512,FUTURE */ + /* 250(f1 7e 48) 303 001(16) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVSHDUP, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34879, 544, 5637}, + /* 5522 : VMOVSLDUP xmmreg|mask|z,xmmrm128 [rm:fvm: evex.128.f3.0f.w0 12 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7e 08) 303 001(12) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVSLDUP, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34888, 543, 5638}, + /* 5523 : VMOVSLDUP ymmreg|mask|z,ymmrm256 [rm:fvm: evex.256.f3.0f.w0 12 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7e 28) 303 001(12) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVSLDUP, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34897, 543, 5639}, + /* 5524 : VMOVSLDUP zmmreg|mask|z,zmmrm512 [rm:fvm: evex.512.f3.0f.w0 12 /r ] AVX512,FUTURE */ + /* 250(f1 7e 48) 303 001(12) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVSLDUP, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34906, 544, 5640}, + /* 5525 : VMOVSS xmmreg|mask|z,mem32 [rm:t1s: evex.lig.f3.0f.w0 10 /r ] AVX512,FUTURE */ + /* 250(f1 7e 08) 306 001(10) 110 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VMOVSS, 2, {XMMREG,MEMORY|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34915, 545, 5641}, + /* 5526 : VMOVSS mem32|mask,xmmreg [mr:t1s: evex.lig.f3.0f.w0 11 /r ] AVX512,FUTURE */ + /* 250(f1 7e 08) 306 001(11) 101 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VMOVSS, 2, {MEMORY|BITS32,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+34924, 545, 5642}, + /* 5527 : VMOVSS xmmreg|mask|z,xmmreg*,xmmreg [rvm: evex.nds.lig.f3.0f.w0 10 /r ] AVX512,FUTURE */ + /* 241(f1 7e 08) 300 001(10) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VMOVSS, 3, {XMMREG,XMMREG,XMMREG,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34933, 545, 5643}, + /* 5528 : VMOVSS xmmreg|mask|z,xmmreg*,xmmreg [mvr: evex.nds.lig.f3.0f.w0 11 /r ] AVX512,FUTURE */ + /* 241(f1 7e 08) 300 001(11) 102 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VMOVSS, 3, {XMMREG,XMMREG,XMMREG,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34951, 545, 5644}, + /* 5529 : VMOVUPD xmmreg|mask|z,xmmrm128 [rm:fvm: evex.128.66.0f.w1 10 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 fd 08) 303 001(10) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVUPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34969, 543, 5645}, + /* 5530 : VMOVUPD ymmreg|mask|z,ymmrm256 [rm:fvm: evex.256.66.0f.w1 10 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 fd 28) 303 001(10) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVUPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34978, 543, 5646}, + /* 5531 : VMOVUPD zmmreg|mask|z,zmmrm512 [rm:fvm: evex.512.66.0f.w1 10 /r ] AVX512,FUTURE */ + /* 250(f1 fd 48) 303 001(10) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVUPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34987, 544, 5647}, + /* 5532 : VMOVUPD xmmreg|mask|z,xmmreg [mr: evex.128.66.0f.w1 11 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 fd 08) 300 001(11) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVUPD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+34996, 543, 5648}, + /* 5533 : VMOVUPD ymmreg|mask|z,ymmreg [mr: evex.256.66.0f.w1 11 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 fd 28) 300 001(11) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVUPD, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35005, 543, 5649}, + /* 5534 : VMOVUPD zmmreg|mask|z,zmmreg [mr: evex.512.66.0f.w1 11 /r ] AVX512,FUTURE */ + /* 250(f1 fd 48) 300 001(11) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVUPD, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35014, 544, 5650}, + /* 5535 : VMOVUPD mem128|mask,xmmreg [mr:fvm: evex.128.66.0f.w1 11 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 fd 08) 303 001(11) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVUPD, 2, {MEMORY|BITS128,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+35023, 543, 5651}, + /* 5536 : VMOVUPD mem256|mask,ymmreg [mr:fvm: evex.256.66.0f.w1 11 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 fd 28) 303 001(11) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVUPD, 2, {MEMORY|BITS256,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+35032, 543, 5652}, + /* 5537 : VMOVUPD mem512|mask,zmmreg [mr:fvm: evex.512.66.0f.w1 11 /r ] AVX512,FUTURE */ + /* 250(f1 fd 48) 303 001(11) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVUPD, 2, {MEMORY|BITS512,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+35041, 544, 5653}, + /* 5538 : VMOVUPS xmmreg|mask|z,xmmrm128 [rm:fvm: evex.128.0f.w0 10 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7c 08) 303 001(10) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVUPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35050, 543, 5654}, + /* 5539 : VMOVUPS ymmreg|mask|z,ymmrm256 [rm:fvm: evex.256.0f.w0 10 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7c 28) 303 001(10) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVUPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35059, 543, 5655}, + /* 5540 : VMOVUPS zmmreg|mask|z,zmmrm512 [rm:fvm: evex.512.0f.w0 10 /r ] AVX512,FUTURE */ + /* 250(f1 7c 48) 303 001(10) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVUPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35068, 544, 5656}, + /* 5541 : VMOVUPS xmmreg|mask|z,xmmreg [mr: evex.128.0f.w0 11 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7c 08) 300 001(11) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVUPS, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35077, 543, 5657}, + /* 5542 : VMOVUPS ymmreg|mask|z,ymmreg [mr: evex.256.0f.w0 11 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7c 28) 300 001(11) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVUPS, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35086, 543, 5658}, + /* 5543 : VMOVUPS zmmreg|mask|z,zmmreg [mr: evex.512.0f.w0 11 /r ] AVX512,FUTURE */ + /* 250(f1 7c 48) 300 001(11) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVUPS, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35095, 544, 5659}, + /* 5544 : VMOVUPS mem128|mask,xmmreg [mr:fvm: evex.128.0f.w0 11 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7c 08) 303 001(11) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVUPS, 2, {MEMORY|BITS128,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+35104, 543, 5660}, + /* 5545 : VMOVUPS mem256|mask,ymmreg [mr:fvm: evex.256.0f.w0 11 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7c 28) 303 001(11) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMOVUPS, 2, {MEMORY|BITS256,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+35113, 543, 5661}, + /* 5546 : VMOVUPS mem512|mask,zmmreg [mr:fvm: evex.512.0f.w0 11 /r ] AVX512,FUTURE */ + /* 250(f1 7c 48) 303 001(11) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VMOVUPS, 2, {MEMORY|BITS512,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+35122, 544, 5662}, + /* 5547 : VMULPD xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f.w1 59 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(59) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMULPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+35131, 543, 5663}, + /* 5548 : VMULPD ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f.w1 59 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(59) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMULPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+35149, 543, 5664}, + /* 5549 : VMULPD zmmreg|mask|z,zmmreg*,zmmrm512|b64|er [rvm:fv: evex.nds.512.66.0f.w1 59 /r ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(59) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VMULPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+35167, 544, 5665}, + /* 5550 : VMULPS xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.0f.w0 59 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(59) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMULPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+35185, 543, 5666}, + /* 5551 : VMULPS ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.0f.w0 59 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(59) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VMULPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+35203, 543, 5667}, + /* 5552 : VMULPS zmmreg|mask|z,zmmreg*,zmmrm512|b32|er [rvm:fv: evex.nds.512.0f.w0 59 /r ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(59) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VMULPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+35221, 544, 5668}, + /* 5553 : VMULSD xmmreg|mask|z,xmmreg*,xmmrm64|er [rvm:t1s: evex.nds.lig.f2.0f.w1 59 /r ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(59) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VMULSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+35239, 545, 5669}, + /* 5554 : VMULSS xmmreg|mask|z,xmmreg*,xmmrm32|er [rvm:t1s: evex.nds.lig.f3.0f.w0 59 /r ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(59) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VMULSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+35257, 545, 5670}, + /* 5555 : VORPD xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f.w1 56 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 241(f1 fd 08) 301 001(56) 120 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VORPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+35275, 546, 5671}, + /* 5556 : VORPD ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f.w1 56 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 241(f1 fd 28) 301 001(56) 120 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VORPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+35293, 546, 5672}, + /* 5557 : VORPD zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f.w1 56 /r ] AVX512DQ,FUTURE */ + /* 241(f1 fd 48) 301 001(56) 120 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VORPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+35311, 547, 5673}, + /* 5558 : VORPS xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.0f.w0 56 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 241(f1 7c 08) 301 001(56) 120 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VORPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+35329, 546, 5674}, + /* 5559 : VORPS ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.0f.w0 56 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 241(f1 7c 28) 301 001(56) 120 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VORPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+35347, 546, 5675}, + /* 5560 : VORPS zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.0f.w0 56 /r ] AVX512DQ,FUTURE */ + /* 241(f1 7c 48) 301 001(56) 120 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VORPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+35365, 547, 5676}, + /* 5561 : VPABSB xmmreg|mask|z,xmmrm128 [rm:fvm: evex.128.66.0f38.wig 1c /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7d 08) 303 001(1c) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPABSB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35383, 555, 5677}, + /* 5562 : VPABSB ymmreg|mask|z,ymmrm256 [rm:fvm: evex.256.66.0f38.wig 1c /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7d 28) 303 001(1c) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPABSB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35392, 555, 5678}, + /* 5563 : VPABSB zmmreg|mask|z,zmmrm512 [rm:fvm: evex.512.66.0f38.wig 1c /r ] AVX512BW,FUTURE */ + /* 250(f2 7d 48) 303 001(1c) 110 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPABSB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35401, 556, 5679}, + /* 5564 : VPABSD xmmreg|mask|z,xmmrm128|b32 [rm:fv: evex.128.66.0f38.w0 1e /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 08) 301 001(1e) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPABSD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+35410, 543, 5680}, + /* 5565 : VPABSD ymmreg|mask|z,ymmrm256|b32 [rm:fv: evex.256.66.0f38.w0 1e /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 28) 301 001(1e) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPABSD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+35419, 543, 5681}, + /* 5566 : VPABSD zmmreg|mask|z,zmmrm512|b32 [rm:fv: evex.512.66.0f38.w0 1e /r ] AVX512,FUTURE */ + /* 250(f2 7d 48) 301 001(1e) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPABSD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+35428, 544, 5682}, + /* 5567 : VPABSQ xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.66.0f38.w1 1f /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 fd 08) 301 001(1f) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPABSQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+35437, 543, 5683}, + /* 5568 : VPABSQ ymmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.66.0f38.w1 1f /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 fd 28) 301 001(1f) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPABSQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+35446, 543, 5684}, + /* 5569 : VPABSQ zmmreg|mask|z,zmmrm512|b64 [rm:fv: evex.512.66.0f38.w1 1f /r ] AVX512,FUTURE */ + /* 250(f2 fd 48) 301 001(1f) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPABSQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+35455, 544, 5685}, + /* 5570 : VPABSW xmmreg|mask|z,xmmrm128 [rm:fvm: evex.128.66.0f38.wig 1d /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7d 08) 303 001(1d) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPABSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35464, 555, 5686}, + /* 5571 : VPABSW ymmreg|mask|z,ymmrm256 [rm:fvm: evex.256.66.0f38.wig 1d /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7d 28) 303 001(1d) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPABSW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35473, 555, 5687}, + /* 5572 : VPABSW zmmreg|mask|z,zmmrm512 [rm:fvm: evex.512.66.0f38.wig 1d /r ] AVX512BW,FUTURE */ + /* 250(f2 7d 48) 303 001(1d) 110 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPABSW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35482, 556, 5688}, + /* 5573 : VPACKSSDW xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f.w0 6b /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 301 001(6b) 120 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPACKSSDW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+35491, 549, 5689}, + /* 5574 : VPACKSSDW ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f.w0 6b /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 301 001(6b) 120 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPACKSSDW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+35509, 549, 5690}, + /* 5575 : VPACKSSDW zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f.w0 6b /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 301 001(6b) 120 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPACKSSDW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+35527, 550, 5691}, + /* 5576 : VPACKSSWB xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig 63 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 303 001(63) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPACKSSWB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35545, 555, 5692}, + /* 5577 : VPACKSSWB ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig 63 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 303 001(63) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPACKSSWB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35563, 555, 5693}, + /* 5578 : VPACKSSWB zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig 63 /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 303 001(63) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPACKSSWB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35581, 556, 5694}, + /* 5579 : VPACKUSDW xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 2b /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 7d 08) 301 001(2b) 120 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPACKUSDW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+35599, 549, 5695}, + /* 5580 : VPACKUSDW ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 2b /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 7d 28) 301 001(2b) 120 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPACKUSDW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+35617, 549, 5696}, + /* 5581 : VPACKUSDW zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f38.w0 2b /r ] AVX512BW,FUTURE */ + /* 241(f2 7d 48) 301 001(2b) 120 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPACKUSDW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+35635, 550, 5697}, + /* 5582 : VPACKUSWB xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig 67 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 303 001(67) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPACKUSWB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35653, 555, 5698}, + /* 5583 : VPACKUSWB ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig 67 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 303 001(67) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPACKUSWB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35671, 555, 5699}, + /* 5584 : VPACKUSWB zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig 67 /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 303 001(67) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPACKUSWB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35689, 556, 5700}, + /* 5585 : VPADDB xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig fc /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 303 001(fc) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPADDB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35707, 555, 5701}, + /* 5586 : VPADDB ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig fc /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 303 001(fc) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPADDB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35725, 555, 5702}, + /* 5587 : VPADDB zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig fc /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 303 001(fc) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPADDB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35743, 556, 5703}, + /* 5588 : VPADDD xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f.w0 fe /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7d 08) 301 001(fe) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPADDD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+35761, 543, 5704}, + /* 5589 : VPADDD ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f.w0 fe /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7d 28) 301 001(fe) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPADDD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+35779, 543, 5705}, + /* 5590 : VPADDD zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f.w0 fe /r ] AVX512,FUTURE */ + /* 241(f1 7d 48) 301 001(fe) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPADDD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+35797, 544, 5706}, + /* 5591 : VPADDQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f.w1 d4 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(d4) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPADDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+35815, 543, 5707}, + /* 5592 : VPADDQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f.w1 d4 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(d4) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPADDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+35833, 543, 5708}, + /* 5593 : VPADDQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f.w1 d4 /r ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(d4) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPADDQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+35851, 544, 5709}, + /* 5594 : VPADDSB xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig ec /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 303 001(ec) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPADDSB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35869, 555, 5710}, + /* 5595 : VPADDSB ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig ec /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 303 001(ec) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPADDSB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35887, 555, 5711}, + /* 5596 : VPADDSB zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig ec /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 303 001(ec) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPADDSB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35905, 556, 5712}, + /* 5597 : VPADDSW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig ed /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 303 001(ed) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPADDSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35923, 555, 5713}, + /* 5598 : VPADDSW ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig ed /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 303 001(ed) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPADDSW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35941, 555, 5714}, + /* 5599 : VPADDSW zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig ed /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 303 001(ed) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPADDSW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35959, 556, 5715}, + /* 5600 : VPADDUSB xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig dc /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 303 001(dc) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPADDUSB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35977, 555, 5716}, + /* 5601 : VPADDUSB ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig dc /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 303 001(dc) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPADDUSB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+35995, 555, 5717}, + /* 5602 : VPADDUSB zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig dc /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 303 001(dc) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPADDUSB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36013, 556, 5718}, + /* 5603 : VPADDUSW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig dd /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 303 001(dd) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPADDUSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36031, 555, 5719}, + /* 5604 : VPADDUSW ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig dd /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 303 001(dd) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPADDUSW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36049, 555, 5720}, + /* 5605 : VPADDUSW zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig dd /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 303 001(dd) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPADDUSW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36067, 556, 5721}, + /* 5606 : VPADDW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig fd /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 303 001(fd) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPADDW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36085, 555, 5722}, + /* 5607 : VPADDW ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig fd /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 303 001(fd) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPADDW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36103, 555, 5723}, + /* 5608 : VPADDW zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig fd /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 303 001(fd) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPADDW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36121, 556, 5724}, + /* 5609 : VPALIGNR xmmreg|mask|z,xmmreg*,xmmrm128,imm8 [rvmi:fvm: evex.nds.128.66.0f3a.wig 0f /r ib ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 08) 303 001(0f) 120 023 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPALIGNR, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19453, 555, 5725}, + /* 5610 : VPALIGNR ymmreg|mask|z,ymmreg*,ymmrm256,imm8 [rvmi:fvm: evex.nds.256.66.0f3a.wig 0f /r ib ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 28) 303 001(0f) 120 023 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPALIGNR, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19473, 555, 5726}, + /* 5611 : VPALIGNR zmmreg|mask|z,zmmreg*,zmmrm512,imm8 [rvmi:fvm: evex.nds.512.66.0f3a.wig 0f /r ib ] AVX512BW,FUTURE */ + /* 241(f3 7d 48) 303 001(0f) 120 023 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPALIGNR, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+19493, 556, 5727}, + /* 5612 : VPANDD xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f.w0 db /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7d 08) 301 001(db) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPANDD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+36139, 543, 5728}, + /* 5613 : VPANDD ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f.w0 db /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7d 28) 301 001(db) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPANDD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+36157, 543, 5729}, + /* 5614 : VPANDD zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f.w0 db /r ] AVX512,FUTURE */ + /* 241(f1 7d 48) 301 001(db) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPANDD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+36175, 544, 5730}, + /* 5615 : VPANDND xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f.w0 df /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7d 08) 301 001(df) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPANDND, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+36193, 543, 5731}, + /* 5616 : VPANDND ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f.w0 df /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7d 28) 301 001(df) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPANDND, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+36211, 543, 5732}, + /* 5617 : VPANDND zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f.w0 df /r ] AVX512,FUTURE */ + /* 241(f1 7d 48) 301 001(df) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPANDND, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+36229, 544, 5733}, + /* 5618 : VPANDNQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f.w1 df /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(df) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPANDNQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+36247, 543, 5734}, + /* 5619 : VPANDNQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f.w1 df /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(df) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPANDNQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+36265, 543, 5735}, + /* 5620 : VPANDNQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f.w1 df /r ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(df) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPANDNQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+36283, 544, 5736}, + /* 5621 : VPANDQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f.w1 db /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(db) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPANDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+36301, 543, 5737}, + /* 5622 : VPANDQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f.w1 db /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(db) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPANDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+36319, 543, 5738}, + /* 5623 : VPANDQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f.w1 db /r ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(db) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPANDQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+36337, 544, 5739}, + /* 5624 : VPAVGB xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig e0 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 303 001(e0) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPAVGB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36355, 555, 5740}, + /* 5625 : VPAVGB ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig e0 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 303 001(e0) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPAVGB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36373, 555, 5741}, + /* 5626 : VPAVGB zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig e0 /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 303 001(e0) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPAVGB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36391, 556, 5742}, + /* 5627 : VPAVGW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig e3 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 303 001(e3) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPAVGW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36409, 555, 5743}, + /* 5628 : VPAVGW ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig e3 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 303 001(e3) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPAVGW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36427, 555, 5744}, + /* 5629 : VPAVGW zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig e3 /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 303 001(e3) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPAVGW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36445, 556, 5745}, + /* 5630 : VPBLENDMB xmmreg|mask|z,xmmreg,xmmrm128 [rvm:fvm: evex.nds.128.66.0f38.w0 66 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 7d 08) 303 001(66) 120 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPBLENDMB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36463, 549, 5746}, + /* 5631 : VPBLENDMB ymmreg|mask|z,ymmreg,ymmrm256 [rvm:fvm: evex.nds.256.66.0f38.w0 66 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 7d 28) 303 001(66) 120 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPBLENDMB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36472, 549, 5747}, + /* 5632 : VPBLENDMB zmmreg|mask|z,zmmreg,zmmrm512 [rvm:fvm: evex.nds.512.66.0f38.w0 66 /r ] AVX512BW,FUTURE */ + /* 241(f2 7d 48) 303 001(66) 120 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPBLENDMB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36481, 550, 5748}, + /* 5633 : VPBLENDMD xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 64 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(64) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPBLENDMD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+36490, 543, 5749}, + /* 5634 : VPBLENDMD ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 64 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(64) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPBLENDMD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+36499, 543, 5750}, + /* 5635 : VPBLENDMD zmmreg|mask|z,zmmreg,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f38.w0 64 /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(64) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPBLENDMD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+36508, 544, 5751}, + /* 5636 : VPBLENDMQ xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 64 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(64) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPBLENDMQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+36517, 543, 5752}, + /* 5637 : VPBLENDMQ ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 64 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(64) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPBLENDMQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+36526, 543, 5753}, + /* 5638 : VPBLENDMQ zmmreg|mask|z,zmmreg,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 64 /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(64) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPBLENDMQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+36535, 544, 5754}, + /* 5639 : VPBLENDMW xmmreg|mask|z,xmmreg,xmmrm128 [rvm:fvm: evex.nds.128.66.0f38.w1 66 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 fd 08) 303 001(66) 120 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPBLENDMW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36544, 549, 5755}, + /* 5640 : VPBLENDMW ymmreg|mask|z,ymmreg,ymmrm256 [rvm:fvm: evex.nds.256.66.0f38.w1 66 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 fd 28) 303 001(66) 120 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPBLENDMW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36553, 549, 5756}, + /* 5641 : VPBLENDMW zmmreg|mask|z,zmmreg,zmmrm512 [rvm:fvm: evex.nds.512.66.0f38.w1 66 /r ] AVX512BW,FUTURE */ + /* 241(f2 fd 48) 303 001(66) 120 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPBLENDMW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36562, 550, 5757}, + /* 5642 : VPBROADCASTB xmmreg|mask|z,xmmrm8 [rm:t1s8: evex.128.66.0f38.w0 78 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7d 08) 304 001(78) 110 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPBROADCASTB, 2, {XMMREG,RM_XMM|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36571, 549, 5758}, + /* 5643 : VPBROADCASTB ymmreg|mask|z,xmmrm8 [rm:t1s8: evex.256.66.0f38.w0 78 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7d 28) 304 001(78) 110 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPBROADCASTB, 2, {YMMREG,RM_XMM|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36580, 549, 5759}, + /* 5644 : VPBROADCASTB zmmreg|mask|z,xmmrm8 [rm:t1s8: evex.512.66.0f38.w0 78 /r ] AVX512BW,FUTURE */ + /* 250(f2 7d 48) 304 001(78) 110 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPBROADCASTB, 2, {ZMMREG,RM_XMM|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36589, 550, 5760}, + /* 5645 : VPBROADCASTB xmmreg|mask|z,reg8 [rm: evex.128.66.0f38.w0 7a /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7d 08) 300 001(7a) 110 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPBROADCASTB, 2, {XMMREG,REG_GPR|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36598, 549, 5761}, + /* 5646 : VPBROADCASTB xmmreg|mask|z,reg16 [rm: evex.128.66.0f38.w0 7a /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7d 08) 300 001(7a) 110 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPBROADCASTB, 2, {XMMREG,REG_GPR|BITS16,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36598, 549, 5762}, + /* 5647 : VPBROADCASTB xmmreg|mask|z,reg32 [rm: evex.128.66.0f38.w0 7a /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7d 08) 300 001(7a) 110 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPBROADCASTB, 2, {XMMREG,REG_GPR|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36598, 549, 5763}, + /* 5648 : VPBROADCASTB xmmreg|mask|z,reg64 [rm: evex.128.66.0f38.w0 7a /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7d 08) 300 001(7a) 110 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPBROADCASTB, 2, {XMMREG,REG_GPR|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36598, 549, 5764}, + /* 5649 : VPBROADCASTB ymmreg|mask|z,reg8 [rm: evex.256.66.0f38.w0 7a /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7d 28) 300 001(7a) 110 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPBROADCASTB, 2, {YMMREG,REG_GPR|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36607, 549, 5765}, + /* 5650 : VPBROADCASTB ymmreg|mask|z,reg16 [rm: evex.256.66.0f38.w0 7a /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7d 28) 300 001(7a) 110 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPBROADCASTB, 2, {YMMREG,REG_GPR|BITS16,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36607, 549, 5766}, + /* 5651 : VPBROADCASTB ymmreg|mask|z,reg32 [rm: evex.256.66.0f38.w0 7a /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7d 28) 300 001(7a) 110 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPBROADCASTB, 2, {YMMREG,REG_GPR|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36607, 549, 5767}, + /* 5652 : VPBROADCASTB ymmreg|mask|z,reg64 [rm: evex.256.66.0f38.w0 7a /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7d 28) 300 001(7a) 110 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPBROADCASTB, 2, {YMMREG,REG_GPR|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36607, 549, 5768}, + /* 5653 : VPBROADCASTB zmmreg|mask|z,reg8 [rm: evex.512.66.0f38.w0 7a /r ] AVX512BW,FUTURE */ + /* 250(f2 7d 48) 300 001(7a) 110 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPBROADCASTB, 2, {ZMMREG,REG_GPR|BITS8,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36616, 550, 5769}, + /* 5654 : VPBROADCASTB zmmreg|mask|z,reg16 [rm: evex.512.66.0f38.w0 7a /r ] AVX512BW,FUTURE */ + /* 250(f2 7d 48) 300 001(7a) 110 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPBROADCASTB, 2, {ZMMREG,REG_GPR|BITS16,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36616, 550, 5770}, + /* 5655 : VPBROADCASTB zmmreg|mask|z,reg32 [rm: evex.512.66.0f38.w0 7a /r ] AVX512BW,FUTURE */ + /* 250(f2 7d 48) 300 001(7a) 110 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPBROADCASTB, 2, {ZMMREG,REG_GPR|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36616, 550, 5771}, + /* 5656 : VPBROADCASTB zmmreg|mask|z,reg64 [rm: evex.512.66.0f38.w0 7a /r ] AVX512BW,FUTURE */ + /* 250(f2 7d 48) 300 001(7a) 110 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPBROADCASTB, 2, {ZMMREG,REG_GPR|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36616, 550, 5772}, + /* 5657 : VPBROADCASTD xmmreg|mask|z,mem32 [rm:t1s: evex.128.66.0f38.w0 58 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 08) 306 001(58) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPBROADCASTD, 2, {XMMREG,MEMORY|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36625, 543, 5773}, + /* 5658 : VPBROADCASTD ymmreg|mask|z,mem32 [rm:t1s: evex.256.66.0f38.w0 58 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 28) 306 001(58) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPBROADCASTD, 2, {YMMREG,MEMORY|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36634, 543, 5774}, + /* 5659 : VPBROADCASTD zmmreg|mask|z,mem32 [rm:t1s: evex.512.66.0f38.w0 58 /r ] AVX512,FUTURE */ + /* 250(f2 7d 48) 306 001(58) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPBROADCASTD, 2, {ZMMREG,MEMORY|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36643, 544, 5775}, + /* 5660 : VPBROADCASTD xmmreg|mask|z,xmmreg [rm: evex.128.66.0f38.w0 58 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 08) 300 001(58) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPBROADCASTD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36652, 543, 5776}, + /* 5661 : VPBROADCASTD ymmreg|mask|z,xmmreg [rm: evex.256.66.0f38.w0 58 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 28) 300 001(58) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPBROADCASTD, 2, {YMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36661, 543, 5777}, + /* 5662 : VPBROADCASTD zmmreg|mask|z,xmmreg [rm: evex.512.66.0f38.w0 58 /r ] AVX512,FUTURE */ + /* 250(f2 7d 48) 300 001(58) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPBROADCASTD, 2, {ZMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36670, 544, 5778}, + /* 5663 : VPBROADCASTD xmmreg|mask|z,reg32 [rm: evex.128.66.0f38.w0 7c /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 08) 300 001(7c) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPBROADCASTD, 2, {XMMREG,REG_GPR|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36679, 543, 5779}, + /* 5664 : VPBROADCASTD ymmreg|mask|z,reg32 [rm: evex.256.66.0f38.w0 7c /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 28) 300 001(7c) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPBROADCASTD, 2, {YMMREG,REG_GPR|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36688, 543, 5780}, + /* 5665 : VPBROADCASTD zmmreg|mask|z,reg32 [rm: evex.512.66.0f38.w0 7c /r ] AVX512,FUTURE */ + /* 250(f2 7d 48) 300 001(7c) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPBROADCASTD, 2, {ZMMREG,REG_GPR|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36697, 544, 5781}, + /* 5666 : VPBROADCASTMB2Q xmmreg,kreg [rm: evex.128.f3.0f38.w1 2a /r ] AVX512CD,AVX512VL,FUTURE */ + /* 250(f2 fe 08) 300 001(2a) 110 : EVEX,PROT,AVX512CD,AVX512VL,FUTURE */ + {I_VPBROADCASTMB2Q, 2, {XMMREG,OPMASKREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+36706, 557, 5782}, + /* 5667 : VPBROADCASTMB2Q ymmreg,kreg [rm: evex.256.f3.0f38.w1 2a /r ] AVX512CD,AVX512VL,FUTURE */ + /* 250(f2 fe 28) 300 001(2a) 110 : EVEX,PROT,AVX512CD,AVX512VL,FUTURE */ + {I_VPBROADCASTMB2Q, 2, {YMMREG,OPMASKREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+36715, 557, 5783}, + /* 5668 : VPBROADCASTMB2Q zmmreg,kreg [rm: evex.512.f3.0f38.w1 2a /r ] AVX512CD,FUTURE */ + /* 250(f2 fe 48) 300 001(2a) 110 : EVEX,PROT,AVX512CD,FUTURE */ + {I_VPBROADCASTMB2Q, 2, {ZMMREG,OPMASKREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+36724, 558, 5784}, + /* 5669 : VPBROADCASTMW2D xmmreg,kreg [rm: evex.128.f3.0f38.w0 3a /r ] AVX512CD,AVX512VL,FUTURE */ + /* 250(f2 7e 08) 300 001(3a) 110 : EVEX,PROT,AVX512CD,AVX512VL,FUTURE */ + {I_VPBROADCASTMW2D, 2, {XMMREG,OPMASKREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+36733, 557, 5785}, + /* 5670 : VPBROADCASTMW2D ymmreg,kreg [rm: evex.256.f3.0f38.w0 3a /r ] AVX512CD,AVX512VL,FUTURE */ + /* 250(f2 7e 28) 300 001(3a) 110 : EVEX,PROT,AVX512CD,AVX512VL,FUTURE */ + {I_VPBROADCASTMW2D, 2, {YMMREG,OPMASKREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+36742, 557, 5786}, + /* 5671 : VPBROADCASTMW2D zmmreg,kreg [rm: evex.512.f3.0f38.w0 3a /r ] AVX512CD,FUTURE */ + /* 250(f2 7e 48) 300 001(3a) 110 : EVEX,PROT,AVX512CD,FUTURE */ + {I_VPBROADCASTMW2D, 2, {ZMMREG,OPMASKREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+36751, 558, 5787}, + /* 5672 : VPBROADCASTQ xmmreg|mask|z,mem64 [rm:t1s: evex.128.66.0f38.w1 59 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 fd 08) 306 001(59) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPBROADCASTQ, 2, {XMMREG,MEMORY|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36760, 543, 5788}, + /* 5673 : VPBROADCASTQ ymmreg|mask|z,mem64 [rm:t1s: evex.256.66.0f38.w1 59 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 fd 28) 306 001(59) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPBROADCASTQ, 2, {YMMREG,MEMORY|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36769, 543, 5789}, + /* 5674 : VPBROADCASTQ zmmreg|mask|z,mem64 [rm:t1s: evex.512.66.0f38.w1 59 /r ] AVX512,FUTURE */ + /* 250(f2 fd 48) 306 001(59) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPBROADCASTQ, 2, {ZMMREG,MEMORY|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36778, 544, 5790}, + /* 5675 : VPBROADCASTQ xmmreg|mask|z,xmmreg [rm: evex.128.66.0f38.w1 59 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 fd 08) 300 001(59) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPBROADCASTQ, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36787, 543, 5791}, + /* 5676 : VPBROADCASTQ ymmreg|mask|z,xmmreg [rm: evex.256.66.0f38.w1 59 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 fd 28) 300 001(59) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPBROADCASTQ, 2, {YMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36796, 543, 5792}, + /* 5677 : VPBROADCASTQ zmmreg|mask|z,xmmreg [rm: evex.512.66.0f38.w1 59 /r ] AVX512,FUTURE */ + /* 250(f2 fd 48) 300 001(59) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPBROADCASTQ, 2, {ZMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36805, 544, 5793}, + /* 5678 : VPBROADCASTQ xmmreg|mask|z,reg64 [rm: evex.128.66.0f38.w1 7c /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 fd 08) 300 001(7c) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPBROADCASTQ, 2, {XMMREG,REG_GPR|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36814, 543, 5794}, + /* 5679 : VPBROADCASTQ ymmreg|mask|z,reg64 [rm: evex.256.66.0f38.w1 7c /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 fd 28) 300 001(7c) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPBROADCASTQ, 2, {YMMREG,REG_GPR|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36823, 543, 5795}, + /* 5680 : VPBROADCASTQ zmmreg|mask|z,reg64 [rm: evex.512.66.0f38.w1 7c /r ] AVX512,FUTURE */ + /* 250(f2 fd 48) 300 001(7c) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPBROADCASTQ, 2, {ZMMREG,REG_GPR|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36832, 544, 5796}, + /* 5681 : VPBROADCASTW xmmreg|mask|z,xmmrm16 [rm:t1s16: evex.128.66.0f38.w0 79 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7d 08) 305 001(79) 110 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPBROADCASTW, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36841, 549, 5797}, + /* 5682 : VPBROADCASTW ymmreg|mask|z,xmmrm16 [rm:t1s16: evex.256.66.0f38.w0 79 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7d 28) 305 001(79) 110 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPBROADCASTW, 2, {YMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36850, 549, 5798}, + /* 5683 : VPBROADCASTW zmmreg|mask|z,xmmrm16 [rm:t1s16: evex.512.66.0f38.w0 79 /r ] AVX512BW,FUTURE */ + /* 250(f2 7d 48) 305 001(79) 110 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPBROADCASTW, 2, {ZMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36859, 550, 5799}, + /* 5684 : VPBROADCASTW xmmreg|mask|z,reg16 [rm: evex.128.66.0f38.w0 7b /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7d 08) 300 001(7b) 110 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPBROADCASTW, 2, {XMMREG,REG_GPR|BITS16,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36868, 549, 5800}, + /* 5685 : VPBROADCASTW xmmreg|mask|z,reg32 [rm: evex.128.66.0f38.w0 7b /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7d 08) 300 001(7b) 110 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPBROADCASTW, 2, {XMMREG,REG_GPR|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36868, 549, 5801}, + /* 5686 : VPBROADCASTW xmmreg|mask|z,reg64 [rm: evex.128.66.0f38.w0 7b /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7d 08) 300 001(7b) 110 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPBROADCASTW, 2, {XMMREG,REG_GPR|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36868, 549, 5802}, + /* 5687 : VPBROADCASTW ymmreg|mask|z,reg16 [rm: evex.256.66.0f38.w0 7b /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7d 28) 300 001(7b) 110 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPBROADCASTW, 2, {YMMREG,REG_GPR|BITS16,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36877, 549, 5803}, + /* 5688 : VPBROADCASTW ymmreg|mask|z,reg32 [rm: evex.256.66.0f38.w0 7b /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7d 28) 300 001(7b) 110 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPBROADCASTW, 2, {YMMREG,REG_GPR|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36877, 549, 5804}, + /* 5689 : VPBROADCASTW ymmreg|mask|z,reg64 [rm: evex.256.66.0f38.w0 7b /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7d 28) 300 001(7b) 110 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPBROADCASTW, 2, {YMMREG,REG_GPR|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36877, 549, 5805}, + /* 5690 : VPBROADCASTW zmmreg|mask|z,reg16 [rm: evex.512.66.0f38.w0 7b /r ] AVX512BW,FUTURE */ + /* 250(f2 7d 48) 300 001(7b) 110 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPBROADCASTW, 2, {ZMMREG,REG_GPR|BITS16,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36886, 550, 5806}, + /* 5691 : VPBROADCASTW zmmreg|mask|z,reg32 [rm: evex.512.66.0f38.w0 7b /r ] AVX512BW,FUTURE */ + /* 250(f2 7d 48) 300 001(7b) 110 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPBROADCASTW, 2, {ZMMREG,REG_GPR|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36886, 550, 5807}, + /* 5692 : VPBROADCASTW zmmreg|mask|z,reg64 [rm: evex.512.66.0f38.w0 7b /r ] AVX512BW,FUTURE */ + /* 250(f2 7d 48) 300 001(7b) 110 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPBROADCASTW, 2, {ZMMREG,REG_GPR|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+36886, 550, 5808}, + /* 5693 : VPCMPEQB kreg|mask,xmmreg,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig 74 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 303 001(74) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPEQB, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+36895, 555, 5811}, + /* 5694 : VPCMPEQB kreg|mask,ymmreg,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig 74 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 303 001(74) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPEQB, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+36904, 555, 5812}, + /* 5695 : VPCMPEQB kreg|mask,zmmreg,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig 74 /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 303 001(74) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPEQB, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+36913, 556, 5813}, + /* 5696 : VPCMPEQD kreg|mask,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f.w0 76 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7d 08) 301 001(76) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPEQD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+36922, 543, 5814}, + /* 5697 : VPCMPEQD kreg|mask,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f.w0 76 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7d 28) 301 001(76) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPEQD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+36931, 543, 5815}, + /* 5698 : VPCMPEQD kreg|mask,zmmreg,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f.w0 76 /r ] AVX512,FUTURE */ + /* 241(f1 7d 48) 301 001(76) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPEQD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+36940, 544, 5816}, + /* 5699 : VPCMPEQQ kreg|mask,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 29 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(29) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPEQQ, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+36949, 543, 5817}, + /* 5700 : VPCMPEQQ kreg|mask,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 29 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(29) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPEQQ, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+36958, 543, 5818}, + /* 5701 : VPCMPEQQ kreg|mask,zmmreg,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 29 /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(29) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPEQQ, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+36967, 544, 5819}, + /* 5702 : VPCMPEQW kreg|mask,xmmreg,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig 75 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 303 001(75) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPEQW, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+36976, 555, 5820}, + /* 5703 : VPCMPEQW kreg|mask,ymmreg,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig 75 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 303 001(75) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPEQW, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+36985, 555, 5821}, + /* 5704 : VPCMPEQW kreg|mask,zmmreg,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig 75 /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 303 001(75) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPEQW, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+36994, 556, 5822}, + /* 5705 : VPCMPGTB kreg|mask,xmmreg,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig 64 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 303 001(64) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPGTB, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+37003, 555, 5823}, + /* 5706 : VPCMPGTB kreg|mask,ymmreg,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig 64 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 303 001(64) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPGTB, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+37012, 555, 5824}, + /* 5707 : VPCMPGTB kreg|mask,zmmreg,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig 64 /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 303 001(64) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPGTB, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+37021, 556, 5825}, + /* 5708 : VPCMPGTD kreg|mask,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f.w0 66 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7d 08) 301 001(66) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPGTD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+37030, 543, 5826}, + /* 5709 : VPCMPGTD kreg|mask,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f.w0 66 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7d 28) 301 001(66) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPGTD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+37039, 543, 5827}, + /* 5710 : VPCMPGTD kreg|mask,zmmreg,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f.w0 66 /r ] AVX512,FUTURE */ + /* 241(f1 7d 48) 301 001(66) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPGTD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+37048, 544, 5828}, + /* 5711 : VPCMPGTQ kreg|mask,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 37 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(37) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPGTQ, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+37057, 543, 5829}, + /* 5712 : VPCMPGTQ kreg|mask,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 37 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(37) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPGTQ, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+37066, 543, 5830}, + /* 5713 : VPCMPGTQ kreg|mask,zmmreg,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 37 /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(37) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPGTQ, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+37075, 544, 5831}, + /* 5714 : VPCMPGTW kreg|mask,xmmreg,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig 65 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 303 001(65) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPGTW, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+37084, 555, 5832}, + /* 5715 : VPCMPGTW kreg|mask,ymmreg,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig 65 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 303 001(65) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPGTW, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+37093, 555, 5833}, + /* 5716 : VPCMPGTW kreg|mask,zmmreg,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig 65 /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 303 001(65) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPGTW, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+37102, 556, 5834}, + /* 5717 : VPCMPEQB kreg|mask,xmmreg,xmmrm128 [rvmi:fvm: evex.nds.128.66.0f3a.w0 3f /r 00 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 08) 303 001(3f) 120 001(00) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPEQB, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+7559, 549, 5836}, + /* 5718 : VPCMPEQB kreg|mask,ymmreg,ymmrm256 [rvmi:fvm: evex.nds.256.66.0f3a.w0 3f /r 00 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 28) 303 001(3f) 120 001(00) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPEQB, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+7570, 549, 5837}, + /* 5719 : VPCMPEQB kreg|mask,zmmreg,zmmrm512 [rvmi:fvm: evex.nds.512.66.0f3a.w0 3f /r 00 ] AVX512BW,FUTURE */ + /* 241(f3 7d 48) 303 001(3f) 120 001(00) : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPEQB, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+7581, 550, 5838}, + /* 5720 : VPCMPEQD kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.66.0f3a.w0 1f /r 00 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 08) 301 001(1f) 120 001(00) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPEQD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+7592, 543, 5839}, + /* 5721 : VPCMPEQD kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.66.0f3a.w0 1f /r 00 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 28) 301 001(1f) 120 001(00) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPEQD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+7603, 543, 5840}, + /* 5722 : VPCMPEQD kreg|mask,zmmreg,zmmrm512|b32 [rvmi:fv: evex.nds.512.66.0f3a.w0 1f /r 00 ] AVX512,FUTURE */ + /* 241(f3 7d 48) 301 001(1f) 120 001(00) : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPEQD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+7614, 544, 5841}, + /* 5723 : VPCMPEQQ kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f3a.w1 1f /r 00 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 08) 301 001(1f) 120 001(00) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPEQQ, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+7625, 543, 5842}, + /* 5724 : VPCMPEQQ kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f3a.w1 1f /r 00 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 28) 301 001(1f) 120 001(00) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPEQQ, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+7636, 543, 5843}, + /* 5725 : VPCMPEQQ kreg|mask,zmmreg,zmmrm512|b64 [rvmi:fv: evex.nds.512.66.0f3a.w1 1f /r 00 ] AVX512,FUTURE */ + /* 241(f3 fd 48) 301 001(1f) 120 001(00) : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPEQQ, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+7647, 544, 5844}, + /* 5726 : VPCMPEQUB kreg|mask,xmmreg,xmmrm128 [rvmi:fvm: evex.nds.128.66.0f3a.w0 3e /r 00 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 08) 303 001(3e) 120 001(00) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPEQUB, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+7658, 549, 5845}, + /* 5727 : VPCMPEQUB kreg|mask,ymmreg,ymmrm256 [rvmi:fvm: evex.nds.256.66.0f3a.w0 3e /r 00 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 28) 303 001(3e) 120 001(00) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPEQUB, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+7669, 549, 5846}, + /* 5728 : VPCMPEQUB kreg|mask,zmmreg,zmmrm512 [rvmi:fvm: evex.nds.512.66.0f3a.w0 3e /r 00 ] AVX512BW,FUTURE */ + /* 241(f3 7d 48) 303 001(3e) 120 001(00) : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPEQUB, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+7680, 550, 5847}, + /* 5729 : VPCMPEQUD kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.66.0f3a.w0 1e /r 00 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 08) 301 001(1e) 120 001(00) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPEQUD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+7691, 543, 5848}, + /* 5730 : VPCMPEQUD kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.66.0f3a.w0 1e /r 00 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 28) 301 001(1e) 120 001(00) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPEQUD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+7702, 543, 5849}, + /* 5731 : VPCMPEQUD kreg|mask,zmmreg,zmmrm512|b32 [rvmi:fv: evex.nds.512.66.0f3a.w0 1e /r 00 ] AVX512,FUTURE */ + /* 241(f3 7d 48) 301 001(1e) 120 001(00) : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPEQUD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+7713, 544, 5850}, + /* 5732 : VPCMPEQUQ kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f3a.w1 1e /r 00 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 08) 301 001(1e) 120 001(00) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPEQUQ, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+7724, 543, 5851}, + /* 5733 : VPCMPEQUQ kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f3a.w1 1e /r 00 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 28) 301 001(1e) 120 001(00) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPEQUQ, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+7735, 543, 5852}, + /* 5734 : VPCMPEQUQ kreg|mask,zmmreg,zmmrm512|b64 [rvmi:fv: evex.nds.512.66.0f3a.w1 1e /r 00 ] AVX512,FUTURE */ + /* 241(f3 fd 48) 301 001(1e) 120 001(00) : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPEQUQ, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+7746, 544, 5853}, + /* 5735 : VPCMPEQUW kreg|mask,xmmreg,xmmrm128 [rvmi:fvm: evex.nds.128.66.0f3a.w1 3e /r 00 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 08) 303 001(3e) 120 001(00) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPEQUW, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+7757, 549, 5854}, + /* 5736 : VPCMPEQUW kreg|mask,ymmreg,ymmrm256 [rvmi:fvm: evex.nds.256.66.0f3a.w1 3e /r 00 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 28) 303 001(3e) 120 001(00) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPEQUW, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+7768, 549, 5855}, + /* 5737 : VPCMPEQUW kreg|mask,zmmreg,zmmrm512 [rvmi:fvm: evex.nds.512.66.0f3a.w1 3e /r 00 ] AVX512BW,FUTURE */ + /* 241(f3 fd 48) 303 001(3e) 120 001(00) : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPEQUW, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+7779, 550, 5856}, + /* 5738 : VPCMPEQW kreg|mask,xmmreg,xmmrm128 [rvmi:fvm: evex.nds.128.66.0f3a.w1 3f /r 00 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 08) 303 001(3f) 120 001(00) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPEQW, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+7790, 549, 5857}, + /* 5739 : VPCMPEQW kreg|mask,ymmreg,ymmrm256 [rvmi:fvm: evex.nds.256.66.0f3a.w1 3f /r 00 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 28) 303 001(3f) 120 001(00) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPEQW, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+7801, 549, 5858}, + /* 5740 : VPCMPEQW kreg|mask,zmmreg,zmmrm512 [rvmi:fvm: evex.nds.512.66.0f3a.w1 3f /r 00 ] AVX512BW,FUTURE */ + /* 241(f3 fd 48) 303 001(3f) 120 001(00) : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPEQW, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+7812, 550, 5859}, + /* 5741 : VPCMPGEB kreg|mask,xmmreg,xmmrm128 [rvmi:fvm: evex.nds.128.66.0f3a.w0 3f /r 05 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 08) 303 001(3f) 120 001(05) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPGEB, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+7823, 549, 5860}, + /* 5742 : VPCMPGEB kreg|mask,ymmreg,ymmrm256 [rvmi:fvm: evex.nds.256.66.0f3a.w0 3f /r 05 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 28) 303 001(3f) 120 001(05) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPGEB, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+7834, 549, 5861}, + /* 5743 : VPCMPGEB kreg|mask,zmmreg,zmmrm512 [rvmi:fvm: evex.nds.512.66.0f3a.w0 3f /r 05 ] AVX512BW,FUTURE */ + /* 241(f3 7d 48) 303 001(3f) 120 001(05) : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPGEB, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+7845, 550, 5862}, + /* 5744 : VPCMPGED kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.66.0f3a.w0 1f /r 05 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 08) 301 001(1f) 120 001(05) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPGED, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+7856, 543, 5863}, + /* 5745 : VPCMPGED kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.66.0f3a.w0 1f /r 05 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 28) 301 001(1f) 120 001(05) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPGED, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+7867, 543, 5864}, + /* 5746 : VPCMPGED kreg|mask,zmmreg,zmmrm512|b32 [rvmi:fv: evex.nds.512.66.0f3a.w0 1f /r 05 ] AVX512,FUTURE */ + /* 241(f3 7d 48) 301 001(1f) 120 001(05) : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPGED, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+7878, 544, 5865}, + /* 5747 : VPCMPGEQ kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f3a.w1 1f /r 05 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 08) 301 001(1f) 120 001(05) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPGEQ, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+7889, 543, 5866}, + /* 5748 : VPCMPGEQ kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f3a.w1 1f /r 05 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 28) 301 001(1f) 120 001(05) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPGEQ, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+7900, 543, 5867}, + /* 5749 : VPCMPGEQ kreg|mask,zmmreg,zmmrm512|b64 [rvmi:fv: evex.nds.512.66.0f3a.w1 1f /r 05 ] AVX512,FUTURE */ + /* 241(f3 fd 48) 301 001(1f) 120 001(05) : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPGEQ, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+7911, 544, 5868}, + /* 5750 : VPCMPGEUB kreg|mask,xmmreg,xmmrm128 [rvmi:fvm: evex.nds.128.66.0f3a.w0 3e /r 05 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 08) 303 001(3e) 120 001(05) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPGEUB, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+7922, 549, 5869}, + /* 5751 : VPCMPGEUB kreg|mask,ymmreg,ymmrm256 [rvmi:fvm: evex.nds.256.66.0f3a.w0 3e /r 05 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 28) 303 001(3e) 120 001(05) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPGEUB, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+7933, 549, 5870}, + /* 5752 : VPCMPGEUB kreg|mask,zmmreg,zmmrm512 [rvmi:fvm: evex.nds.512.66.0f3a.w0 3e /r 05 ] AVX512BW,FUTURE */ + /* 241(f3 7d 48) 303 001(3e) 120 001(05) : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPGEUB, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+7944, 550, 5871}, + /* 5753 : VPCMPGEUD kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.66.0f3a.w0 1e /r 05 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 08) 301 001(1e) 120 001(05) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPGEUD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+7955, 543, 5872}, + /* 5754 : VPCMPGEUD kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.66.0f3a.w0 1e /r 05 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 28) 301 001(1e) 120 001(05) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPGEUD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+7966, 543, 5873}, + /* 5755 : VPCMPGEUD kreg|mask,zmmreg,zmmrm512|b32 [rvmi:fv: evex.nds.512.66.0f3a.w0 1e /r 05 ] AVX512,FUTURE */ + /* 241(f3 7d 48) 301 001(1e) 120 001(05) : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPGEUD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+7977, 544, 5874}, + /* 5756 : VPCMPGEUQ kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f3a.w1 1e /r 05 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 08) 301 001(1e) 120 001(05) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPGEUQ, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+7988, 543, 5875}, + /* 5757 : VPCMPGEUQ kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f3a.w1 1e /r 05 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 28) 301 001(1e) 120 001(05) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPGEUQ, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+7999, 543, 5876}, + /* 5758 : VPCMPGEUQ kreg|mask,zmmreg,zmmrm512|b64 [rvmi:fv: evex.nds.512.66.0f3a.w1 1e /r 05 ] AVX512,FUTURE */ + /* 241(f3 fd 48) 301 001(1e) 120 001(05) : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPGEUQ, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8010, 544, 5877}, + /* 5759 : VPCMPGEUW kreg|mask,xmmreg,xmmrm128 [rvmi:fvm: evex.nds.128.66.0f3a.w1 3e /r 05 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 08) 303 001(3e) 120 001(05) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPGEUW, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8021, 549, 5878}, + /* 5760 : VPCMPGEUW kreg|mask,ymmreg,ymmrm256 [rvmi:fvm: evex.nds.256.66.0f3a.w1 3e /r 05 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 28) 303 001(3e) 120 001(05) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPGEUW, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8032, 549, 5879}, + /* 5761 : VPCMPGEUW kreg|mask,zmmreg,zmmrm512 [rvmi:fvm: evex.nds.512.66.0f3a.w1 3e /r 05 ] AVX512BW,FUTURE */ + /* 241(f3 fd 48) 303 001(3e) 120 001(05) : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPGEUW, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8043, 550, 5880}, + /* 5762 : VPCMPGEW kreg|mask,xmmreg,xmmrm128 [rvmi:fvm: evex.nds.128.66.0f3a.w1 3f /r 05 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 08) 303 001(3f) 120 001(05) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPGEW, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8054, 549, 5881}, + /* 5763 : VPCMPGEW kreg|mask,ymmreg,ymmrm256 [rvmi:fvm: evex.nds.256.66.0f3a.w1 3f /r 05 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 28) 303 001(3f) 120 001(05) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPGEW, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8065, 549, 5882}, + /* 5764 : VPCMPGEW kreg|mask,zmmreg,zmmrm512 [rvmi:fvm: evex.nds.512.66.0f3a.w1 3f /r 05 ] AVX512BW,FUTURE */ + /* 241(f3 fd 48) 303 001(3f) 120 001(05) : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPGEW, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8076, 550, 5883}, + /* 5765 : VPCMPGTB kreg|mask,xmmreg,xmmrm128 [rvmi:fvm: evex.nds.128.66.0f3a.w0 3f /r 06 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 08) 303 001(3f) 120 001(06) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPGTB, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8087, 549, 5884}, + /* 5766 : VPCMPGTB kreg|mask,ymmreg,ymmrm256 [rvmi:fvm: evex.nds.256.66.0f3a.w0 3f /r 06 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 28) 303 001(3f) 120 001(06) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPGTB, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8098, 549, 5885}, + /* 5767 : VPCMPGTB kreg|mask,zmmreg,zmmrm512 [rvmi:fvm: evex.nds.512.66.0f3a.w0 3f /r 06 ] AVX512BW,FUTURE */ + /* 241(f3 7d 48) 303 001(3f) 120 001(06) : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPGTB, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8109, 550, 5886}, + /* 5768 : VPCMPGTD kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.66.0f3a.w0 1f /r 06 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 08) 301 001(1f) 120 001(06) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPGTD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+8120, 543, 5887}, + /* 5769 : VPCMPGTD kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.66.0f3a.w0 1f /r 06 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 28) 301 001(1f) 120 001(06) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPGTD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+8131, 543, 5888}, + /* 5770 : VPCMPGTD kreg|mask,zmmreg,zmmrm512|b32 [rvmi:fv: evex.nds.512.66.0f3a.w0 1f /r 06 ] AVX512,FUTURE */ + /* 241(f3 7d 48) 301 001(1f) 120 001(06) : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPGTD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+8142, 544, 5889}, + /* 5771 : VPCMPGTQ kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f3a.w1 1f /r 06 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 08) 301 001(1f) 120 001(06) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPGTQ, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8153, 543, 5890}, + /* 5772 : VPCMPGTQ kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f3a.w1 1f /r 06 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 28) 301 001(1f) 120 001(06) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPGTQ, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8164, 543, 5891}, + /* 5773 : VPCMPGTQ kreg|mask,zmmreg,zmmrm512|b64 [rvmi:fv: evex.nds.512.66.0f3a.w1 1f /r 06 ] AVX512,FUTURE */ + /* 241(f3 fd 48) 301 001(1f) 120 001(06) : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPGTQ, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8175, 544, 5892}, + /* 5774 : VPCMPGTUB kreg|mask,xmmreg,xmmrm128 [rvmi:fvm: evex.nds.128.66.0f3a.w0 3e /r 06 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 08) 303 001(3e) 120 001(06) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPGTUB, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8186, 549, 5893}, + /* 5775 : VPCMPGTUB kreg|mask,ymmreg,ymmrm256 [rvmi:fvm: evex.nds.256.66.0f3a.w0 3e /r 06 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 28) 303 001(3e) 120 001(06) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPGTUB, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8197, 549, 5894}, + /* 5776 : VPCMPGTUB kreg|mask,zmmreg,zmmrm512 [rvmi:fvm: evex.nds.512.66.0f3a.w0 3e /r 06 ] AVX512BW,FUTURE */ + /* 241(f3 7d 48) 303 001(3e) 120 001(06) : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPGTUB, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8208, 550, 5895}, + /* 5777 : VPCMPGTUD kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.66.0f3a.w0 1e /r 06 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 08) 301 001(1e) 120 001(06) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPGTUD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+8219, 543, 5896}, + /* 5778 : VPCMPGTUD kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.66.0f3a.w0 1e /r 06 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 28) 301 001(1e) 120 001(06) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPGTUD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+8230, 543, 5897}, + /* 5779 : VPCMPGTUD kreg|mask,zmmreg,zmmrm512|b32 [rvmi:fv: evex.nds.512.66.0f3a.w0 1e /r 06 ] AVX512,FUTURE */ + /* 241(f3 7d 48) 301 001(1e) 120 001(06) : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPGTUD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+8241, 544, 5898}, + /* 5780 : VPCMPGTUQ kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f3a.w1 1e /r 06 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 08) 301 001(1e) 120 001(06) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPGTUQ, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8252, 543, 5899}, + /* 5781 : VPCMPGTUQ kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f3a.w1 1e /r 06 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 28) 301 001(1e) 120 001(06) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPGTUQ, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8263, 543, 5900}, + /* 5782 : VPCMPGTUQ kreg|mask,zmmreg,zmmrm512|b64 [rvmi:fv: evex.nds.512.66.0f3a.w1 1e /r 06 ] AVX512,FUTURE */ + /* 241(f3 fd 48) 301 001(1e) 120 001(06) : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPGTUQ, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8274, 544, 5901}, + /* 5783 : VPCMPGTUW kreg|mask,xmmreg,xmmrm128 [rvmi:fvm: evex.nds.128.66.0f3a.w1 3e /r 06 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 08) 303 001(3e) 120 001(06) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPGTUW, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8285, 549, 5902}, + /* 5784 : VPCMPGTUW kreg|mask,ymmreg,ymmrm256 [rvmi:fvm: evex.nds.256.66.0f3a.w1 3e /r 06 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 28) 303 001(3e) 120 001(06) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPGTUW, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8296, 549, 5903}, + /* 5785 : VPCMPGTUW kreg|mask,zmmreg,zmmrm512 [rvmi:fvm: evex.nds.512.66.0f3a.w1 3e /r 06 ] AVX512BW,FUTURE */ + /* 241(f3 fd 48) 303 001(3e) 120 001(06) : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPGTUW, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8307, 550, 5904}, + /* 5786 : VPCMPGTW kreg|mask,xmmreg,xmmrm128 [rvmi:fvm: evex.nds.128.66.0f3a.w1 3f /r 06 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 08) 303 001(3f) 120 001(06) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPGTW, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8318, 549, 5905}, + /* 5787 : VPCMPGTW kreg|mask,ymmreg,ymmrm256 [rvmi:fvm: evex.nds.256.66.0f3a.w1 3f /r 06 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 28) 303 001(3f) 120 001(06) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPGTW, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8329, 549, 5906}, + /* 5788 : VPCMPGTW kreg|mask,zmmreg,zmmrm512 [rvmi:fvm: evex.nds.512.66.0f3a.w1 3f /r 06 ] AVX512BW,FUTURE */ + /* 241(f3 fd 48) 303 001(3f) 120 001(06) : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPGTW, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8340, 550, 5907}, + /* 5789 : VPCMPLEB kreg|mask,xmmreg,xmmrm128 [rvmi:fvm: evex.nds.128.66.0f3a.w0 3f /r 02 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 08) 303 001(3f) 120 001(02) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPLEB, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8351, 549, 5908}, + /* 5790 : VPCMPLEB kreg|mask,ymmreg,ymmrm256 [rvmi:fvm: evex.nds.256.66.0f3a.w0 3f /r 02 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 28) 303 001(3f) 120 001(02) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPLEB, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8362, 549, 5909}, + /* 5791 : VPCMPLEB kreg|mask,zmmreg,zmmrm512 [rvmi:fvm: evex.nds.512.66.0f3a.w0 3f /r 02 ] AVX512BW,FUTURE */ + /* 241(f3 7d 48) 303 001(3f) 120 001(02) : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPLEB, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8373, 550, 5910}, + /* 5792 : VPCMPLED kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.66.0f3a.w0 1f /r 02 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 08) 301 001(1f) 120 001(02) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPLED, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+8384, 543, 5911}, + /* 5793 : VPCMPLED kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.66.0f3a.w0 1f /r 02 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 28) 301 001(1f) 120 001(02) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPLED, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+8395, 543, 5912}, + /* 5794 : VPCMPLED kreg|mask,zmmreg,zmmrm512|b32 [rvmi:fv: evex.nds.512.66.0f3a.w0 1f /r 02 ] AVX512,FUTURE */ + /* 241(f3 7d 48) 301 001(1f) 120 001(02) : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPLED, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+8406, 544, 5913}, + /* 5795 : VPCMPLEQ kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f3a.w1 1f /r 02 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 08) 301 001(1f) 120 001(02) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPLEQ, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8417, 543, 5914}, + /* 5796 : VPCMPLEQ kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f3a.w1 1f /r 02 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 28) 301 001(1f) 120 001(02) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPLEQ, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8428, 543, 5915}, + /* 5797 : VPCMPLEQ kreg|mask,zmmreg,zmmrm512|b64 [rvmi:fv: evex.nds.512.66.0f3a.w1 1f /r 02 ] AVX512,FUTURE */ + /* 241(f3 fd 48) 301 001(1f) 120 001(02) : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPLEQ, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8439, 544, 5916}, + /* 5798 : VPCMPLEUB kreg|mask,xmmreg,xmmrm128 [rvmi:fvm: evex.nds.128.66.0f3a.w0 3e /r 02 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 08) 303 001(3e) 120 001(02) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPLEUB, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8450, 549, 5917}, + /* 5799 : VPCMPLEUB kreg|mask,ymmreg,ymmrm256 [rvmi:fvm: evex.nds.256.66.0f3a.w0 3e /r 02 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 28) 303 001(3e) 120 001(02) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPLEUB, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8461, 549, 5918}, + /* 5800 : VPCMPLEUB kreg|mask,zmmreg,zmmrm512 [rvmi:fvm: evex.nds.512.66.0f3a.w0 3e /r 02 ] AVX512BW,FUTURE */ + /* 241(f3 7d 48) 303 001(3e) 120 001(02) : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPLEUB, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8472, 550, 5919}, + /* 5801 : VPCMPLEUD kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.66.0f3a.w0 1e /r 02 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 08) 301 001(1e) 120 001(02) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPLEUD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+8483, 543, 5920}, + /* 5802 : VPCMPLEUD kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.66.0f3a.w0 1e /r 02 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 28) 301 001(1e) 120 001(02) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPLEUD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+8494, 543, 5921}, + /* 5803 : VPCMPLEUD kreg|mask,zmmreg,zmmrm512|b32 [rvmi:fv: evex.nds.512.66.0f3a.w0 1e /r 02 ] AVX512,FUTURE */ + /* 241(f3 7d 48) 301 001(1e) 120 001(02) : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPLEUD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+8505, 544, 5922}, + /* 5804 : VPCMPLEUQ kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f3a.w1 1e /r 02 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 08) 301 001(1e) 120 001(02) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPLEUQ, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8516, 543, 5923}, + /* 5805 : VPCMPLEUQ kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f3a.w1 1e /r 02 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 28) 301 001(1e) 120 001(02) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPLEUQ, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8527, 543, 5924}, + /* 5806 : VPCMPLEUQ kreg|mask,zmmreg,zmmrm512|b64 [rvmi:fv: evex.nds.512.66.0f3a.w1 1e /r 02 ] AVX512,FUTURE */ + /* 241(f3 fd 48) 301 001(1e) 120 001(02) : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPLEUQ, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8538, 544, 5925}, + /* 5807 : VPCMPLEUW kreg|mask,xmmreg,xmmrm128 [rvmi:fvm: evex.nds.128.66.0f3a.w1 3e /r 02 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 08) 303 001(3e) 120 001(02) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPLEUW, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8549, 549, 5926}, + /* 5808 : VPCMPLEUW kreg|mask,ymmreg,ymmrm256 [rvmi:fvm: evex.nds.256.66.0f3a.w1 3e /r 02 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 28) 303 001(3e) 120 001(02) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPLEUW, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8560, 549, 5927}, + /* 5809 : VPCMPLEUW kreg|mask,zmmreg,zmmrm512 [rvmi:fvm: evex.nds.512.66.0f3a.w1 3e /r 02 ] AVX512BW,FUTURE */ + /* 241(f3 fd 48) 303 001(3e) 120 001(02) : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPLEUW, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8571, 550, 5928}, + /* 5810 : VPCMPLEW kreg|mask,xmmreg,xmmrm128 [rvmi:fvm: evex.nds.128.66.0f3a.w1 3f /r 02 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 08) 303 001(3f) 120 001(02) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPLEW, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8582, 549, 5929}, + /* 5811 : VPCMPLEW kreg|mask,ymmreg,ymmrm256 [rvmi:fvm: evex.nds.256.66.0f3a.w1 3f /r 02 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 28) 303 001(3f) 120 001(02) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPLEW, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8593, 549, 5930}, + /* 5812 : VPCMPLEW kreg|mask,zmmreg,zmmrm512 [rvmi:fvm: evex.nds.512.66.0f3a.w1 3f /r 02 ] AVX512BW,FUTURE */ + /* 241(f3 fd 48) 303 001(3f) 120 001(02) : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPLEW, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8604, 550, 5931}, + /* 5813 : VPCMPLTB kreg|mask,xmmreg,xmmrm128 [rvmi:fvm: evex.nds.128.66.0f3a.w0 3f /r 01 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 08) 303 001(3f) 120 001(01) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPLTB, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8615, 549, 5932}, + /* 5814 : VPCMPLTB kreg|mask,ymmreg,ymmrm256 [rvmi:fvm: evex.nds.256.66.0f3a.w0 3f /r 01 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 28) 303 001(3f) 120 001(01) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPLTB, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8626, 549, 5933}, + /* 5815 : VPCMPLTB kreg|mask,zmmreg,zmmrm512 [rvmi:fvm: evex.nds.512.66.0f3a.w0 3f /r 01 ] AVX512BW,FUTURE */ + /* 241(f3 7d 48) 303 001(3f) 120 001(01) : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPLTB, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8637, 550, 5934}, + /* 5816 : VPCMPLTD kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.66.0f3a.w0 1f /r 01 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 08) 301 001(1f) 120 001(01) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPLTD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+8648, 543, 5935}, + /* 5817 : VPCMPLTD kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.66.0f3a.w0 1f /r 01 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 28) 301 001(1f) 120 001(01) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPLTD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+8659, 543, 5936}, + /* 5818 : VPCMPLTD kreg|mask,zmmreg,zmmrm512|b32 [rvmi:fv: evex.nds.512.66.0f3a.w0 1f /r 01 ] AVX512,FUTURE */ + /* 241(f3 7d 48) 301 001(1f) 120 001(01) : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPLTD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+8670, 544, 5937}, + /* 5819 : VPCMPLTQ kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f3a.w1 1f /r 01 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 08) 301 001(1f) 120 001(01) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPLTQ, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8681, 543, 5938}, + /* 5820 : VPCMPLTQ kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f3a.w1 1f /r 01 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 28) 301 001(1f) 120 001(01) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPLTQ, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8692, 543, 5939}, + /* 5821 : VPCMPLTQ kreg|mask,zmmreg,zmmrm512|b64 [rvmi:fv: evex.nds.512.66.0f3a.w1 1f /r 01 ] AVX512,FUTURE */ + /* 241(f3 fd 48) 301 001(1f) 120 001(01) : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPLTQ, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8703, 544, 5940}, + /* 5822 : VPCMPLTUB kreg|mask,xmmreg,xmmrm128 [rvmi:fvm: evex.nds.128.66.0f3a.w0 3e /r 01 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 08) 303 001(3e) 120 001(01) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPLTUB, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8714, 549, 5941}, + /* 5823 : VPCMPLTUB kreg|mask,ymmreg,ymmrm256 [rvmi:fvm: evex.nds.256.66.0f3a.w0 3e /r 01 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 28) 303 001(3e) 120 001(01) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPLTUB, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8725, 549, 5942}, + /* 5824 : VPCMPLTUB kreg|mask,zmmreg,zmmrm512 [rvmi:fvm: evex.nds.512.66.0f3a.w0 3e /r 01 ] AVX512BW,FUTURE */ + /* 241(f3 7d 48) 303 001(3e) 120 001(01) : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPLTUB, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8736, 550, 5943}, + /* 5825 : VPCMPLTUD kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.66.0f3a.w0 1e /r 01 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 08) 301 001(1e) 120 001(01) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPLTUD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+8747, 543, 5944}, + /* 5826 : VPCMPLTUD kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.66.0f3a.w0 1e /r 01 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 28) 301 001(1e) 120 001(01) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPLTUD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+8758, 543, 5945}, + /* 5827 : VPCMPLTUD kreg|mask,zmmreg,zmmrm512|b32 [rvmi:fv: evex.nds.512.66.0f3a.w0 1e /r 01 ] AVX512,FUTURE */ + /* 241(f3 7d 48) 301 001(1e) 120 001(01) : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPLTUD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+8769, 544, 5946}, + /* 5828 : VPCMPLTUQ kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f3a.w1 1e /r 01 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 08) 301 001(1e) 120 001(01) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPLTUQ, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8780, 543, 5947}, + /* 5829 : VPCMPLTUQ kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f3a.w1 1e /r 01 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 28) 301 001(1e) 120 001(01) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPLTUQ, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8791, 543, 5948}, + /* 5830 : VPCMPLTUQ kreg|mask,zmmreg,zmmrm512|b64 [rvmi:fv: evex.nds.512.66.0f3a.w1 1e /r 01 ] AVX512,FUTURE */ + /* 241(f3 fd 48) 301 001(1e) 120 001(01) : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPLTUQ, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8802, 544, 5949}, + /* 5831 : VPCMPLTUW kreg|mask,xmmreg,xmmrm128 [rvmi:fvm: evex.nds.128.66.0f3a.w1 3e /r 01 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 08) 303 001(3e) 120 001(01) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPLTUW, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8813, 549, 5950}, + /* 5832 : VPCMPLTUW kreg|mask,ymmreg,ymmrm256 [rvmi:fvm: evex.nds.256.66.0f3a.w1 3e /r 01 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 28) 303 001(3e) 120 001(01) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPLTUW, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8824, 549, 5951}, + /* 5833 : VPCMPLTUW kreg|mask,zmmreg,zmmrm512 [rvmi:fvm: evex.nds.512.66.0f3a.w1 3e /r 01 ] AVX512BW,FUTURE */ + /* 241(f3 fd 48) 303 001(3e) 120 001(01) : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPLTUW, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8835, 550, 5952}, + /* 5834 : VPCMPLTW kreg|mask,xmmreg,xmmrm128 [rvmi:fvm: evex.nds.128.66.0f3a.w1 3f /r 01 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 08) 303 001(3f) 120 001(01) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPLTW, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8846, 549, 5953}, + /* 5835 : VPCMPLTW kreg|mask,ymmreg,ymmrm256 [rvmi:fvm: evex.nds.256.66.0f3a.w1 3f /r 01 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 28) 303 001(3f) 120 001(01) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPLTW, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8857, 549, 5954}, + /* 5836 : VPCMPLTW kreg|mask,zmmreg,zmmrm512 [rvmi:fvm: evex.nds.512.66.0f3a.w1 3f /r 01 ] AVX512BW,FUTURE */ + /* 241(f3 fd 48) 303 001(3f) 120 001(01) : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPLTW, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8868, 550, 5955}, + /* 5837 : VPCMPNEQB kreg|mask,xmmreg,xmmrm128 [rvmi:fvm: evex.nds.128.66.0f3a.w0 3f /r 04 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 08) 303 001(3f) 120 001(04) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPNEQB, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8879, 549, 5956}, + /* 5838 : VPCMPNEQB kreg|mask,ymmreg,ymmrm256 [rvmi:fvm: evex.nds.256.66.0f3a.w0 3f /r 04 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 28) 303 001(3f) 120 001(04) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPNEQB, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8890, 549, 5957}, + /* 5839 : VPCMPNEQB kreg|mask,zmmreg,zmmrm512 [rvmi:fvm: evex.nds.512.66.0f3a.w0 3f /r 04 ] AVX512BW,FUTURE */ + /* 241(f3 7d 48) 303 001(3f) 120 001(04) : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPNEQB, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8901, 550, 5958}, + /* 5840 : VPCMPNEQD kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.66.0f3a.w0 1f /r 04 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 08) 301 001(1f) 120 001(04) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPNEQD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+8912, 543, 5959}, + /* 5841 : VPCMPNEQD kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.66.0f3a.w0 1f /r 04 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 28) 301 001(1f) 120 001(04) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPNEQD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+8923, 543, 5960}, + /* 5842 : VPCMPNEQD kreg|mask,zmmreg,zmmrm512|b32 [rvmi:fv: evex.nds.512.66.0f3a.w0 1f /r 04 ] AVX512,FUTURE */ + /* 241(f3 7d 48) 301 001(1f) 120 001(04) : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPNEQD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+8934, 544, 5961}, + /* 5843 : VPCMPNEQQ kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f3a.w1 1f /r 04 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 08) 301 001(1f) 120 001(04) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPNEQQ, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8945, 543, 5962}, + /* 5844 : VPCMPNEQQ kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f3a.w1 1f /r 04 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 28) 301 001(1f) 120 001(04) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPNEQQ, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8956, 543, 5963}, + /* 5845 : VPCMPNEQQ kreg|mask,zmmreg,zmmrm512|b64 [rvmi:fv: evex.nds.512.66.0f3a.w1 1f /r 04 ] AVX512,FUTURE */ + /* 241(f3 fd 48) 301 001(1f) 120 001(04) : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPNEQQ, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8967, 544, 5964}, + /* 5846 : VPCMPNEQUB kreg|mask,xmmreg,xmmrm128 [rvmi:fvm: evex.nds.128.66.0f3a.w0 3e /r 04 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 08) 303 001(3e) 120 001(04) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPNEQUB, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8978, 549, 5965}, + /* 5847 : VPCMPNEQUB kreg|mask,ymmreg,ymmrm256 [rvmi:fvm: evex.nds.256.66.0f3a.w0 3e /r 04 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 28) 303 001(3e) 120 001(04) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPNEQUB, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8989, 549, 5966}, + /* 5848 : VPCMPNEQUB kreg|mask,zmmreg,zmmrm512 [rvmi:fvm: evex.nds.512.66.0f3a.w0 3e /r 04 ] AVX512BW,FUTURE */ + /* 241(f3 7d 48) 303 001(3e) 120 001(04) : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPNEQUB, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+9000, 550, 5967}, + /* 5849 : VPCMPNEQUD kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.66.0f3a.w0 1e /r 04 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 08) 301 001(1e) 120 001(04) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPNEQUD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+9011, 543, 5968}, + /* 5850 : VPCMPNEQUD kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.66.0f3a.w0 1e /r 04 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 28) 301 001(1e) 120 001(04) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPNEQUD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+9022, 543, 5969}, + /* 5851 : VPCMPNEQUD kreg|mask,zmmreg,zmmrm512|b32 [rvmi:fv: evex.nds.512.66.0f3a.w0 1e /r 04 ] AVX512,FUTURE */ + /* 241(f3 7d 48) 301 001(1e) 120 001(04) : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPNEQUD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+9033, 544, 5970}, + /* 5852 : VPCMPNEQUQ kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f3a.w1 1e /r 04 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 08) 301 001(1e) 120 001(04) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPNEQUQ, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+9044, 543, 5971}, + /* 5853 : VPCMPNEQUQ kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f3a.w1 1e /r 04 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 28) 301 001(1e) 120 001(04) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPNEQUQ, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+9055, 543, 5972}, + /* 5854 : VPCMPNEQUQ kreg|mask,zmmreg,zmmrm512|b64 [rvmi:fv: evex.nds.512.66.0f3a.w1 1e /r 04 ] AVX512,FUTURE */ + /* 241(f3 fd 48) 301 001(1e) 120 001(04) : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPNEQUQ, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+9066, 544, 5973}, + /* 5855 : VPCMPNEQUW kreg|mask,xmmreg,xmmrm128 [rvmi:fvm: evex.nds.128.66.0f3a.w1 3e /r 04 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 08) 303 001(3e) 120 001(04) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPNEQUW, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+9077, 549, 5974}, + /* 5856 : VPCMPNEQUW kreg|mask,ymmreg,ymmrm256 [rvmi:fvm: evex.nds.256.66.0f3a.w1 3e /r 04 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 28) 303 001(3e) 120 001(04) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPNEQUW, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+9088, 549, 5975}, + /* 5857 : VPCMPNEQUW kreg|mask,zmmreg,zmmrm512 [rvmi:fvm: evex.nds.512.66.0f3a.w1 3e /r 04 ] AVX512BW,FUTURE */ + /* 241(f3 fd 48) 303 001(3e) 120 001(04) : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPNEQUW, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+9099, 550, 5976}, + /* 5858 : VPCMPNEQW kreg|mask,xmmreg,xmmrm128 [rvmi:fvm: evex.nds.128.66.0f3a.w1 3f /r 04 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 08) 303 001(3f) 120 001(04) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPNEQW, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+9110, 549, 5977}, + /* 5859 : VPCMPNEQW kreg|mask,ymmreg,ymmrm256 [rvmi:fvm: evex.nds.256.66.0f3a.w1 3f /r 04 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 28) 303 001(3f) 120 001(04) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPNEQW, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+9121, 549, 5978}, + /* 5860 : VPCMPNEQW kreg|mask,zmmreg,zmmrm512 [rvmi:fvm: evex.nds.512.66.0f3a.w1 3f /r 04 ] AVX512BW,FUTURE */ + /* 241(f3 fd 48) 303 001(3f) 120 001(04) : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPNEQW, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+9132, 550, 5979}, + /* 5861 : VPCMPNGTB kreg|mask,xmmreg,xmmrm128 [rvmi:fvm: evex.nds.128.66.0f3a.w0 3f /r 02 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 08) 303 001(3f) 120 001(02) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPNGTB, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8351, 549, 5980}, + /* 5862 : VPCMPNGTB kreg|mask,ymmreg,ymmrm256 [rvmi:fvm: evex.nds.256.66.0f3a.w0 3f /r 02 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 28) 303 001(3f) 120 001(02) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPNGTB, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8362, 549, 5981}, + /* 5863 : VPCMPNGTB kreg|mask,zmmreg,zmmrm512 [rvmi:fvm: evex.nds.512.66.0f3a.w0 3f /r 02 ] AVX512BW,FUTURE */ + /* 241(f3 7d 48) 303 001(3f) 120 001(02) : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPNGTB, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8373, 550, 5982}, + /* 5864 : VPCMPNGTD kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.66.0f3a.w0 1f /r 02 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 08) 301 001(1f) 120 001(02) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPNGTD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+8384, 543, 5983}, + /* 5865 : VPCMPNGTD kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.66.0f3a.w0 1f /r 02 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 28) 301 001(1f) 120 001(02) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPNGTD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+8395, 543, 5984}, + /* 5866 : VPCMPNGTD kreg|mask,zmmreg,zmmrm512|b32 [rvmi:fv: evex.nds.512.66.0f3a.w0 1f /r 02 ] AVX512,FUTURE */ + /* 241(f3 7d 48) 301 001(1f) 120 001(02) : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPNGTD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+8406, 544, 5985}, + /* 5867 : VPCMPNGTQ kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f3a.w1 1f /r 02 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 08) 301 001(1f) 120 001(02) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPNGTQ, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8417, 543, 5986}, + /* 5868 : VPCMPNGTQ kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f3a.w1 1f /r 02 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 28) 301 001(1f) 120 001(02) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPNGTQ, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8428, 543, 5987}, + /* 5869 : VPCMPNGTQ kreg|mask,zmmreg,zmmrm512|b64 [rvmi:fv: evex.nds.512.66.0f3a.w1 1f /r 02 ] AVX512,FUTURE */ + /* 241(f3 fd 48) 301 001(1f) 120 001(02) : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPNGTQ, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8439, 544, 5988}, + /* 5870 : VPCMPNGTUB kreg|mask,xmmreg,xmmrm128 [rvmi:fvm: evex.nds.128.66.0f3a.w0 3e /r 02 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 08) 303 001(3e) 120 001(02) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPNGTUB, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8450, 549, 5989}, + /* 5871 : VPCMPNGTUB kreg|mask,ymmreg,ymmrm256 [rvmi:fvm: evex.nds.256.66.0f3a.w0 3e /r 02 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 28) 303 001(3e) 120 001(02) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPNGTUB, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8461, 549, 5990}, + /* 5872 : VPCMPNGTUB kreg|mask,zmmreg,zmmrm512 [rvmi:fvm: evex.nds.512.66.0f3a.w0 3e /r 02 ] AVX512BW,FUTURE */ + /* 241(f3 7d 48) 303 001(3e) 120 001(02) : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPNGTUB, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8472, 550, 5991}, + /* 5873 : VPCMPNGTUD kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.66.0f3a.w0 1e /r 02 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 08) 301 001(1e) 120 001(02) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPNGTUD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+8483, 543, 5992}, + /* 5874 : VPCMPNGTUD kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.66.0f3a.w0 1e /r 02 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 28) 301 001(1e) 120 001(02) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPNGTUD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+8494, 543, 5993}, + /* 5875 : VPCMPNGTUD kreg|mask,zmmreg,zmmrm512|b32 [rvmi:fv: evex.nds.512.66.0f3a.w0 1e /r 02 ] AVX512,FUTURE */ + /* 241(f3 7d 48) 301 001(1e) 120 001(02) : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPNGTUD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+8505, 544, 5994}, + /* 5876 : VPCMPNGTUQ kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f3a.w1 1e /r 02 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 08) 301 001(1e) 120 001(02) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPNGTUQ, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8516, 543, 5995}, + /* 5877 : VPCMPNGTUQ kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f3a.w1 1e /r 02 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 28) 301 001(1e) 120 001(02) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPNGTUQ, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8527, 543, 5996}, + /* 5878 : VPCMPNGTUQ kreg|mask,zmmreg,zmmrm512|b64 [rvmi:fv: evex.nds.512.66.0f3a.w1 1e /r 02 ] AVX512,FUTURE */ + /* 241(f3 fd 48) 301 001(1e) 120 001(02) : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPNGTUQ, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8538, 544, 5997}, + /* 5879 : VPCMPNGTUW kreg|mask,xmmreg,xmmrm128 [rvmi:fvm: evex.nds.128.66.0f3a.w1 3e /r 02 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 08) 303 001(3e) 120 001(02) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPNGTUW, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8549, 549, 5998}, + /* 5880 : VPCMPNGTUW kreg|mask,ymmreg,ymmrm256 [rvmi:fvm: evex.nds.256.66.0f3a.w1 3e /r 02 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 28) 303 001(3e) 120 001(02) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPNGTUW, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8560, 549, 5999}, + /* 5881 : VPCMPNGTUW kreg|mask,zmmreg,zmmrm512 [rvmi:fvm: evex.nds.512.66.0f3a.w1 3e /r 02 ] AVX512BW,FUTURE */ + /* 241(f3 fd 48) 303 001(3e) 120 001(02) : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPNGTUW, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8571, 550, 6000}, + /* 5882 : VPCMPNGTW kreg|mask,xmmreg,xmmrm128 [rvmi:fvm: evex.nds.128.66.0f3a.w1 3f /r 02 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 08) 303 001(3f) 120 001(02) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPNGTW, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8582, 549, 6001}, + /* 5883 : VPCMPNGTW kreg|mask,ymmreg,ymmrm256 [rvmi:fvm: evex.nds.256.66.0f3a.w1 3f /r 02 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 28) 303 001(3f) 120 001(02) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPNGTW, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8593, 549, 6002}, + /* 5884 : VPCMPNGTW kreg|mask,zmmreg,zmmrm512 [rvmi:fvm: evex.nds.512.66.0f3a.w1 3f /r 02 ] AVX512BW,FUTURE */ + /* 241(f3 fd 48) 303 001(3f) 120 001(02) : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPNGTW, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8604, 550, 6003}, + /* 5885 : VPCMPNLEB kreg|mask,xmmreg,xmmrm128 [rvmi:fvm: evex.nds.128.66.0f3a.w0 3f /r 06 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 08) 303 001(3f) 120 001(06) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPNLEB, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8087, 549, 6004}, + /* 5886 : VPCMPNLEB kreg|mask,ymmreg,ymmrm256 [rvmi:fvm: evex.nds.256.66.0f3a.w0 3f /r 06 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 28) 303 001(3f) 120 001(06) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPNLEB, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8098, 549, 6005}, + /* 5887 : VPCMPNLEB kreg|mask,zmmreg,zmmrm512 [rvmi:fvm: evex.nds.512.66.0f3a.w0 3f /r 06 ] AVX512BW,FUTURE */ + /* 241(f3 7d 48) 303 001(3f) 120 001(06) : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPNLEB, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8109, 550, 6006}, + /* 5888 : VPCMPNLED kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.66.0f3a.w0 1f /r 06 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 08) 301 001(1f) 120 001(06) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPNLED, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+8120, 543, 6007}, + /* 5889 : VPCMPNLED kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.66.0f3a.w0 1f /r 06 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 28) 301 001(1f) 120 001(06) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPNLED, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+8131, 543, 6008}, + /* 5890 : VPCMPNLED kreg|mask,zmmreg,zmmrm512|b32 [rvmi:fv: evex.nds.512.66.0f3a.w0 1f /r 06 ] AVX512,FUTURE */ + /* 241(f3 7d 48) 301 001(1f) 120 001(06) : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPNLED, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+8142, 544, 6009}, + /* 5891 : VPCMPNLEQ kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f3a.w1 1f /r 06 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 08) 301 001(1f) 120 001(06) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPNLEQ, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8153, 543, 6010}, + /* 5892 : VPCMPNLEQ kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f3a.w1 1f /r 06 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 28) 301 001(1f) 120 001(06) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPNLEQ, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8164, 543, 6011}, + /* 5893 : VPCMPNLEQ kreg|mask,zmmreg,zmmrm512|b64 [rvmi:fv: evex.nds.512.66.0f3a.w1 1f /r 06 ] AVX512,FUTURE */ + /* 241(f3 fd 48) 301 001(1f) 120 001(06) : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPNLEQ, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8175, 544, 6012}, + /* 5894 : VPCMPNLEUB kreg|mask,xmmreg,xmmrm128 [rvmi:fvm: evex.nds.128.66.0f3a.w0 3e /r 06 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 08) 303 001(3e) 120 001(06) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPNLEUB, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8186, 549, 6013}, + /* 5895 : VPCMPNLEUB kreg|mask,ymmreg,ymmrm256 [rvmi:fvm: evex.nds.256.66.0f3a.w0 3e /r 06 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 28) 303 001(3e) 120 001(06) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPNLEUB, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8197, 549, 6014}, + /* 5896 : VPCMPNLEUB kreg|mask,zmmreg,zmmrm512 [rvmi:fvm: evex.nds.512.66.0f3a.w0 3e /r 06 ] AVX512BW,FUTURE */ + /* 241(f3 7d 48) 303 001(3e) 120 001(06) : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPNLEUB, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8208, 550, 6015}, + /* 5897 : VPCMPNLEUD kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.66.0f3a.w0 1e /r 06 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 08) 301 001(1e) 120 001(06) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPNLEUD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+8219, 543, 6016}, + /* 5898 : VPCMPNLEUD kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.66.0f3a.w0 1e /r 06 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 28) 301 001(1e) 120 001(06) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPNLEUD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+8230, 543, 6017}, + /* 5899 : VPCMPNLEUD kreg|mask,zmmreg,zmmrm512|b32 [rvmi:fv: evex.nds.512.66.0f3a.w0 1e /r 06 ] AVX512,FUTURE */ + /* 241(f3 7d 48) 301 001(1e) 120 001(06) : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPNLEUD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+8241, 544, 6018}, + /* 5900 : VPCMPNLEUQ kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f3a.w1 1e /r 06 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 08) 301 001(1e) 120 001(06) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPNLEUQ, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8252, 543, 6019}, + /* 5901 : VPCMPNLEUQ kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f3a.w1 1e /r 06 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 28) 301 001(1e) 120 001(06) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPNLEUQ, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8263, 543, 6020}, + /* 5902 : VPCMPNLEUQ kreg|mask,zmmreg,zmmrm512|b64 [rvmi:fv: evex.nds.512.66.0f3a.w1 1e /r 06 ] AVX512,FUTURE */ + /* 241(f3 fd 48) 301 001(1e) 120 001(06) : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPNLEUQ, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8274, 544, 6021}, + /* 5903 : VPCMPNLEUW kreg|mask,xmmreg,xmmrm128 [rvmi:fvm: evex.nds.128.66.0f3a.w1 3e /r 06 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 08) 303 001(3e) 120 001(06) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPNLEUW, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8285, 549, 6022}, + /* 5904 : VPCMPNLEUW kreg|mask,ymmreg,ymmrm256 [rvmi:fvm: evex.nds.256.66.0f3a.w1 3e /r 06 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 28) 303 001(3e) 120 001(06) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPNLEUW, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8296, 549, 6023}, + /* 5905 : VPCMPNLEUW kreg|mask,zmmreg,zmmrm512 [rvmi:fvm: evex.nds.512.66.0f3a.w1 3e /r 06 ] AVX512BW,FUTURE */ + /* 241(f3 fd 48) 303 001(3e) 120 001(06) : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPNLEUW, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8307, 550, 6024}, + /* 5906 : VPCMPNLEW kreg|mask,xmmreg,xmmrm128 [rvmi:fvm: evex.nds.128.66.0f3a.w1 3f /r 06 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 08) 303 001(3f) 120 001(06) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPNLEW, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8318, 549, 6025}, + /* 5907 : VPCMPNLEW kreg|mask,ymmreg,ymmrm256 [rvmi:fvm: evex.nds.256.66.0f3a.w1 3f /r 06 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 28) 303 001(3f) 120 001(06) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPNLEW, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8329, 549, 6026}, + /* 5908 : VPCMPNLEW kreg|mask,zmmreg,zmmrm512 [rvmi:fvm: evex.nds.512.66.0f3a.w1 3f /r 06 ] AVX512BW,FUTURE */ + /* 241(f3 fd 48) 303 001(3f) 120 001(06) : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPNLEW, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8340, 550, 6027}, + /* 5909 : VPCMPNLTB kreg|mask,xmmreg,xmmrm128 [rvmi:fvm: evex.nds.128.66.0f3a.w0 3f /r 05 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 08) 303 001(3f) 120 001(05) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPNLTB, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+7823, 549, 6028}, + /* 5910 : VPCMPNLTB kreg|mask,ymmreg,ymmrm256 [rvmi:fvm: evex.nds.256.66.0f3a.w0 3f /r 05 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 28) 303 001(3f) 120 001(05) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPNLTB, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+7834, 549, 6029}, + /* 5911 : VPCMPNLTB kreg|mask,zmmreg,zmmrm512 [rvmi:fvm: evex.nds.512.66.0f3a.w0 3f /r 05 ] AVX512BW,FUTURE */ + /* 241(f3 7d 48) 303 001(3f) 120 001(05) : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPNLTB, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+7845, 550, 6030}, + /* 5912 : VPCMPNLTD kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.66.0f3a.w0 1f /r 05 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 08) 301 001(1f) 120 001(05) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPNLTD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+7856, 543, 6031}, + /* 5913 : VPCMPNLTD kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.66.0f3a.w0 1f /r 05 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 28) 301 001(1f) 120 001(05) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPNLTD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+7867, 543, 6032}, + /* 5914 : VPCMPNLTD kreg|mask,zmmreg,zmmrm512|b32 [rvmi:fv: evex.nds.512.66.0f3a.w0 1f /r 05 ] AVX512,FUTURE */ + /* 241(f3 7d 48) 301 001(1f) 120 001(05) : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPNLTD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+7878, 544, 6033}, + /* 5915 : VPCMPNLTQ kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f3a.w1 1f /r 05 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 08) 301 001(1f) 120 001(05) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPNLTQ, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+7889, 543, 6034}, + /* 5916 : VPCMPNLTQ kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f3a.w1 1f /r 05 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 28) 301 001(1f) 120 001(05) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPNLTQ, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+7900, 543, 6035}, + /* 5917 : VPCMPNLTQ kreg|mask,zmmreg,zmmrm512|b64 [rvmi:fv: evex.nds.512.66.0f3a.w1 1f /r 05 ] AVX512,FUTURE */ + /* 241(f3 fd 48) 301 001(1f) 120 001(05) : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPNLTQ, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+7911, 544, 6036}, + /* 5918 : VPCMPNLTUB kreg|mask,xmmreg,xmmrm128 [rvmi:fvm: evex.nds.128.66.0f3a.w0 3e /r 05 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 08) 303 001(3e) 120 001(05) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPNLTUB, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+7922, 549, 6037}, + /* 5919 : VPCMPNLTUB kreg|mask,ymmreg,ymmrm256 [rvmi:fvm: evex.nds.256.66.0f3a.w0 3e /r 05 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 28) 303 001(3e) 120 001(05) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPNLTUB, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+7933, 549, 6038}, + /* 5920 : VPCMPNLTUB kreg|mask,zmmreg,zmmrm512 [rvmi:fvm: evex.nds.512.66.0f3a.w0 3e /r 05 ] AVX512BW,FUTURE */ + /* 241(f3 7d 48) 303 001(3e) 120 001(05) : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPNLTUB, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+7944, 550, 6039}, + /* 5921 : VPCMPNLTUD kreg|mask,xmmreg,xmmrm128|b32 [rvmi:fv: evex.nds.128.66.0f3a.w0 1e /r 05 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 08) 301 001(1e) 120 001(05) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPNLTUD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+7955, 543, 6040}, + /* 5922 : VPCMPNLTUD kreg|mask,ymmreg,ymmrm256|b32 [rvmi:fv: evex.nds.256.66.0f3a.w0 1e /r 05 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 28) 301 001(1e) 120 001(05) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPNLTUD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+7966, 543, 6041}, + /* 5923 : VPCMPNLTUD kreg|mask,zmmreg,zmmrm512|b32 [rvmi:fv: evex.nds.512.66.0f3a.w0 1e /r 05 ] AVX512,FUTURE */ + /* 241(f3 7d 48) 301 001(1e) 120 001(05) : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPNLTUD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+7977, 544, 6042}, + /* 5924 : VPCMPNLTUQ kreg|mask,xmmreg,xmmrm128|b64 [rvmi:fv: evex.nds.128.66.0f3a.w1 1e /r 05 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 08) 301 001(1e) 120 001(05) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPNLTUQ, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+7988, 543, 6043}, + /* 5925 : VPCMPNLTUQ kreg|mask,ymmreg,ymmrm256|b64 [rvmi:fv: evex.nds.256.66.0f3a.w1 1e /r 05 ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 28) 301 001(1e) 120 001(05) : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPNLTUQ, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+7999, 543, 6044}, + /* 5926 : VPCMPNLTUQ kreg|mask,zmmreg,zmmrm512|b64 [rvmi:fv: evex.nds.512.66.0f3a.w1 1e /r 05 ] AVX512,FUTURE */ + /* 241(f3 fd 48) 301 001(1e) 120 001(05) : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPNLTUQ, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+8010, 544, 6045}, + /* 5927 : VPCMPNLTUW kreg|mask,xmmreg,xmmrm128 [rvmi:fvm: evex.nds.128.66.0f3a.w1 3e /r 05 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 08) 303 001(3e) 120 001(05) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPNLTUW, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8021, 549, 6046}, + /* 5928 : VPCMPNLTUW kreg|mask,ymmreg,ymmrm256 [rvmi:fvm: evex.nds.256.66.0f3a.w1 3e /r 05 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 28) 303 001(3e) 120 001(05) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPNLTUW, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8032, 549, 6047}, + /* 5929 : VPCMPNLTUW kreg|mask,zmmreg,zmmrm512 [rvmi:fvm: evex.nds.512.66.0f3a.w1 3e /r 05 ] AVX512BW,FUTURE */ + /* 241(f3 fd 48) 303 001(3e) 120 001(05) : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPNLTUW, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8043, 550, 6048}, + /* 5930 : VPCMPNLTW kreg|mask,xmmreg,xmmrm128 [rvmi:fvm: evex.nds.128.66.0f3a.w1 3f /r 05 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 08) 303 001(3f) 120 001(05) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPNLTW, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8054, 549, 6049}, + /* 5931 : VPCMPNLTW kreg|mask,ymmreg,ymmrm256 [rvmi:fvm: evex.nds.256.66.0f3a.w1 3f /r 05 ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 28) 303 001(3f) 120 001(05) : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPNLTW, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8065, 549, 6050}, + /* 5932 : VPCMPNLTW kreg|mask,zmmreg,zmmrm512 [rvmi:fvm: evex.nds.512.66.0f3a.w1 3f /r 05 ] AVX512BW,FUTURE */ + /* 241(f3 fd 48) 303 001(3f) 120 001(05) : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPNLTW, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+8076, 550, 6051}, + /* 5933 : VPCMPB kreg|mask,xmmreg,xmmrm128,imm8 [rvmi:fvm: evex.nds.128.66.0f3a.w0 3f /r ib ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 08) 303 001(3f) 120 023 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPB, 4, {OPMASKREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK,0,0,0,0}, nasm_bytecodes+19513, 549, 6052}, + /* 5934 : VPCMPB kreg|mask,ymmreg,ymmrm256,imm8 [rvmi:fvm: evex.nds.256.66.0f3a.w0 3f /r ib ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 28) 303 001(3f) 120 023 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPB, 4, {OPMASKREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK,0,0,0,0}, nasm_bytecodes+19523, 549, 6053}, + /* 5935 : VPCMPB kreg|mask,zmmreg,zmmrm512,imm8 [rvmi:fvm: evex.nds.512.66.0f3a.w0 3f /r ib ] AVX512BW,FUTURE */ + /* 241(f3 7d 48) 303 001(3f) 120 023 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPB, 4, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK,0,0,0,0}, nasm_bytecodes+19533, 550, 6054}, + /* 5936 : VPCMPD kreg|mask,xmmreg,xmmrm128|b32,imm8 [rvmi:fv: evex.nds.128.66.0f3a.w0 1f /r ib ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 08) 301 001(1f) 120 023 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPD, 4, {OPMASKREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK,0,B32,0,0}, nasm_bytecodes+19543, 543, 6055}, + /* 5937 : VPCMPD kreg|mask,ymmreg,ymmrm256|b32,imm8 [rvmi:fv: evex.nds.256.66.0f3a.w0 1f /r ib ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 28) 301 001(1f) 120 023 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPD, 4, {OPMASKREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK,0,B32,0,0}, nasm_bytecodes+19553, 543, 6056}, + /* 5938 : VPCMPD kreg|mask,zmmreg,zmmrm512|b32,imm8 [rvmi:fv: evex.nds.512.66.0f3a.w0 1f /r ib ] AVX512,FUTURE */ + /* 241(f3 7d 48) 301 001(1f) 120 023 : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPD, 4, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK,0,B32,0,0}, nasm_bytecodes+19563, 544, 6057}, + /* 5939 : VPCMPQ kreg|mask,xmmreg,xmmrm128|b64,imm8 [rvmi:fv: evex.nds.128.66.0f3a.w1 1f /r ib ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 08) 301 001(1f) 120 023 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPQ, 4, {OPMASKREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK,0,B64,0,0}, nasm_bytecodes+19573, 543, 6058}, + /* 5940 : VPCMPQ kreg|mask,ymmreg,ymmrm256|b64,imm8 [rvmi:fv: evex.nds.256.66.0f3a.w1 1f /r ib ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 28) 301 001(1f) 120 023 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPQ, 4, {OPMASKREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK,0,B64,0,0}, nasm_bytecodes+19583, 543, 6059}, + /* 5941 : VPCMPQ kreg|mask,zmmreg,zmmrm512|b64,imm8 [rvmi:fv: evex.nds.512.66.0f3a.w1 1f /r ib ] AVX512,FUTURE */ + /* 241(f3 fd 48) 301 001(1f) 120 023 : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPQ, 4, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK,0,B64,0,0}, nasm_bytecodes+19593, 544, 6060}, + /* 5942 : VPCMPUB kreg|mask,xmmreg,xmmrm128,imm8 [rvmi:fvm: evex.nds.128.66.0f3a.w0 3e /r ib ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 08) 303 001(3e) 120 023 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPUB, 4, {OPMASKREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK,0,0,0,0}, nasm_bytecodes+19603, 549, 6061}, + /* 5943 : VPCMPUB kreg|mask,ymmreg,ymmrm256,imm8 [rvmi:fvm: evex.nds.256.66.0f3a.w0 3e /r ib ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 7d 28) 303 001(3e) 120 023 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPUB, 4, {OPMASKREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK,0,0,0,0}, nasm_bytecodes+19613, 549, 6062}, + /* 5944 : VPCMPUB kreg|mask,zmmreg,zmmrm512,imm8 [rvmi:fvm: evex.nds.512.66.0f3a.w0 3e /r ib ] AVX512BW,FUTURE */ + /* 241(f3 7d 48) 303 001(3e) 120 023 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPUB, 4, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK,0,0,0,0}, nasm_bytecodes+19623, 550, 6063}, + /* 5945 : VPCMPUD kreg|mask,xmmreg,xmmrm128|b32,imm8 [rvmi:fv: evex.nds.128.66.0f3a.w0 1e /r ib ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 08) 301 001(1e) 120 023 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPUD, 4, {OPMASKREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK,0,B32,0,0}, nasm_bytecodes+19633, 543, 6064}, + /* 5946 : VPCMPUD kreg|mask,ymmreg,ymmrm256|b32,imm8 [rvmi:fv: evex.nds.256.66.0f3a.w0 1e /r ib ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 28) 301 001(1e) 120 023 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPUD, 4, {OPMASKREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK,0,B32,0,0}, nasm_bytecodes+19643, 543, 6065}, + /* 5947 : VPCMPUD kreg|mask,zmmreg,zmmrm512|b32,imm8 [rvmi:fv: evex.nds.512.66.0f3a.w0 1e /r ib ] AVX512,FUTURE */ + /* 241(f3 7d 48) 301 001(1e) 120 023 : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPUD, 4, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK,0,B32,0,0}, nasm_bytecodes+19653, 544, 6066}, + /* 5948 : VPCMPUQ kreg|mask,xmmreg,xmmrm128|b64,imm8 [rvmi:fv: evex.nds.128.66.0f3a.w1 1e /r ib ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 08) 301 001(1e) 120 023 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPUQ, 4, {OPMASKREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK,0,B64,0,0}, nasm_bytecodes+19663, 543, 6067}, + /* 5949 : VPCMPUQ kreg|mask,ymmreg,ymmrm256|b64,imm8 [rvmi:fv: evex.nds.256.66.0f3a.w1 1e /r ib ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 28) 301 001(1e) 120 023 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCMPUQ, 4, {OPMASKREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK,0,B64,0,0}, nasm_bytecodes+19673, 543, 6068}, + /* 5950 : VPCMPUQ kreg|mask,zmmreg,zmmrm512|b64,imm8 [rvmi:fv: evex.nds.512.66.0f3a.w1 1e /r ib ] AVX512,FUTURE */ + /* 241(f3 fd 48) 301 001(1e) 120 023 : EVEX,PROT,AVX512,FUTURE */ + {I_VPCMPUQ, 4, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK,0,B64,0,0}, nasm_bytecodes+19683, 544, 6069}, + /* 5951 : VPCMPUW kreg|mask,xmmreg,xmmrm128,imm8 [rvmi:fvm: evex.nds.128.66.0f3a.w1 3e /r ib ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 08) 303 001(3e) 120 023 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPUW, 4, {OPMASKREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK,0,0,0,0}, nasm_bytecodes+19693, 549, 6070}, + /* 5952 : VPCMPUW kreg|mask,ymmreg,ymmrm256,imm8 [rvmi:fvm: evex.nds.256.66.0f3a.w1 3e /r ib ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 28) 303 001(3e) 120 023 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPUW, 4, {OPMASKREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK,0,0,0,0}, nasm_bytecodes+19703, 549, 6071}, + /* 5953 : VPCMPUW kreg|mask,zmmreg,zmmrm512,imm8 [rvmi:fvm: evex.nds.512.66.0f3a.w1 3e /r ib ] AVX512BW,FUTURE */ + /* 241(f3 fd 48) 303 001(3e) 120 023 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPUW, 4, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK,0,0,0,0}, nasm_bytecodes+19713, 550, 6072}, + /* 5954 : VPCMPW kreg|mask,xmmreg,xmmrm128,imm8 [rvmi:fvm: evex.nds.128.66.0f3a.w1 3f /r ib ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 08) 303 001(3f) 120 023 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPW, 4, {OPMASKREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK,0,0,0,0}, nasm_bytecodes+19723, 549, 6073}, + /* 5955 : VPCMPW kreg|mask,ymmreg,ymmrm256,imm8 [rvmi:fvm: evex.nds.256.66.0f3a.w1 3f /r ib ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f3 fd 28) 303 001(3f) 120 023 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPCMPW, 4, {OPMASKREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK,0,0,0,0}, nasm_bytecodes+19733, 549, 6074}, + /* 5956 : VPCMPW kreg|mask,zmmreg,zmmrm512,imm8 [rvmi:fvm: evex.nds.512.66.0f3a.w1 3f /r ib ] AVX512BW,FUTURE */ + /* 241(f3 fd 48) 303 001(3f) 120 023 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPCMPW, 4, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK,0,0,0,0}, nasm_bytecodes+19743, 550, 6075}, + /* 5957 : VPCOMPRESSD mem128|mask,xmmreg [mr:t1s: evex.128.66.0f38.w0 8b /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 08) 306 001(8b) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCOMPRESSD, 2, {MEMORY|BITS128,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+37111, 543, 6076}, + /* 5958 : VPCOMPRESSD mem256|mask,ymmreg [mr:t1s: evex.256.66.0f38.w0 8b /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 28) 306 001(8b) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCOMPRESSD, 2, {MEMORY|BITS256,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+37120, 543, 6077}, + /* 5959 : VPCOMPRESSD mem512|mask,zmmreg [mr:t1s: evex.512.66.0f38.w0 8b /r ] AVX512,FUTURE */ + /* 250(f2 7d 48) 306 001(8b) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPCOMPRESSD, 2, {MEMORY|BITS512,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+37129, 544, 6078}, + /* 5960 : VPCOMPRESSD xmmreg|mask|z,xmmreg [mr: evex.128.66.0f38.w0 8b /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 08) 300 001(8b) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCOMPRESSD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37138, 543, 6079}, + /* 5961 : VPCOMPRESSD ymmreg|mask|z,ymmreg [mr: evex.256.66.0f38.w0 8b /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 28) 300 001(8b) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCOMPRESSD, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37147, 543, 6080}, + /* 5962 : VPCOMPRESSD zmmreg|mask|z,zmmreg [mr: evex.512.66.0f38.w0 8b /r ] AVX512,FUTURE */ + /* 250(f2 7d 48) 300 001(8b) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPCOMPRESSD, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37156, 544, 6081}, + /* 5963 : VPCOMPRESSQ mem128|mask,xmmreg [mr:t1s: evex.128.66.0f38.w1 8b /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 fd 08) 306 001(8b) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCOMPRESSQ, 2, {MEMORY|BITS128,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+37165, 543, 6082}, + /* 5964 : VPCOMPRESSQ mem256|mask,ymmreg [mr:t1s: evex.256.66.0f38.w1 8b /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 fd 28) 306 001(8b) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCOMPRESSQ, 2, {MEMORY|BITS256,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+37174, 543, 6083}, + /* 5965 : VPCOMPRESSQ mem512|mask,zmmreg [mr:t1s: evex.512.66.0f38.w1 8b /r ] AVX512,FUTURE */ + /* 250(f2 fd 48) 306 001(8b) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPCOMPRESSQ, 2, {MEMORY|BITS512,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+37183, 544, 6084}, + /* 5966 : VPCOMPRESSQ xmmreg|mask|z,xmmreg [mr: evex.128.66.0f38.w1 8b /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 fd 08) 300 001(8b) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCOMPRESSQ, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37192, 543, 6085}, + /* 5967 : VPCOMPRESSQ ymmreg|mask|z,ymmreg [mr: evex.256.66.0f38.w1 8b /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 fd 28) 300 001(8b) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPCOMPRESSQ, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37201, 543, 6086}, + /* 5968 : VPCOMPRESSQ zmmreg|mask|z,zmmreg [mr: evex.512.66.0f38.w1 8b /r ] AVX512,FUTURE */ + /* 250(f2 fd 48) 300 001(8b) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPCOMPRESSQ, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37210, 544, 6087}, + /* 5969 : VPCONFLICTD xmmreg|mask|z,xmmrm128|b32 [rm:fv: evex.128.66.0f38.w0 c4 /r ] AVX512CD,AVX512VL,FUTURE */ + /* 250(f2 7d 08) 301 001(c4) 110 : EVEX,PROT,AVX512CD,AVX512VL,FUTURE */ + {I_VPCONFLICTD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+37219, 557, 6088}, + /* 5970 : VPCONFLICTD ymmreg|mask|z,ymmrm256|b32 [rm:fv: evex.256.66.0f38.w0 c4 /r ] AVX512CD,AVX512VL,FUTURE */ + /* 250(f2 7d 28) 301 001(c4) 110 : EVEX,PROT,AVX512CD,AVX512VL,FUTURE */ + {I_VPCONFLICTD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+37228, 557, 6089}, + /* 5971 : VPCONFLICTD zmmreg|mask|z,zmmrm512|b32 [rm:fv: evex.512.66.0f38.w0 c4 /r ] AVX512CD,FUTURE */ + /* 250(f2 7d 48) 301 001(c4) 110 : EVEX,PROT,AVX512CD,FUTURE */ + {I_VPCONFLICTD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+37237, 558, 6090}, + /* 5972 : VPCONFLICTQ xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.66.0f38.w1 c4 /r ] AVX512CD,AVX512VL,FUTURE */ + /* 250(f2 fd 08) 301 001(c4) 110 : EVEX,PROT,AVX512CD,AVX512VL,FUTURE */ + {I_VPCONFLICTQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+37246, 557, 6091}, + /* 5973 : VPCONFLICTQ ymmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.66.0f38.w1 c4 /r ] AVX512CD,AVX512VL,FUTURE */ + /* 250(f2 fd 28) 301 001(c4) 110 : EVEX,PROT,AVX512CD,AVX512VL,FUTURE */ + {I_VPCONFLICTQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+37255, 557, 6092}, + /* 5974 : VPCONFLICTQ zmmreg|mask|z,zmmrm512|b64 [rm:fv: evex.512.66.0f38.w1 c4 /r ] AVX512CD,FUTURE */ + /* 250(f2 fd 48) 301 001(c4) 110 : EVEX,PROT,AVX512CD,FUTURE */ + {I_VPCONFLICTQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+37264, 558, 6093}, + /* 5975 : VPERMB xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f38.w0 8d /r ] AVX512VL,AVX512VBMI,FUTURE */ + /* 241(f2 7d 08) 303 001(8d) 120 : EVEX,PROT,AVX512VL,AVX512VBMI,FUTURE */ + {I_VPERMB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37273, 559, 6094}, + /* 5976 : VPERMB ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f38.w0 8d /r ] AVX512VL,AVX512VBMI,FUTURE */ + /* 241(f2 7d 28) 303 001(8d) 120 : EVEX,PROT,AVX512VL,AVX512VBMI,FUTURE */ + {I_VPERMB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37291, 559, 6095}, + /* 5977 : VPERMB zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f38.w0 8d /r ] AVX512VBMI,FUTURE */ + /* 241(f2 7d 48) 303 001(8d) 120 : EVEX,PROT,AVX512VBMI,FUTURE */ + {I_VPERMB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37309, 560, 6096}, + /* 5978 : VPERMD ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 36 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(36) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPERMD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+37327, 543, 6097}, + /* 5979 : VPERMD zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f38.w0 36 /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(36) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPERMD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+37345, 544, 6098}, + /* 5980 : VPERMI2B xmmreg|mask|z,xmmreg,xmmrm128 [rvm:fvm: evex.nds.128.66.0f38.w0 75 /r ] AVX512VL,AVX512VBMI,FUTURE */ + /* 241(f2 7d 08) 303 001(75) 120 : EVEX,PROT,AVX512VL,AVX512VBMI,FUTURE */ + {I_VPERMI2B, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37363, 559, 6099}, + /* 5981 : VPERMI2B ymmreg|mask|z,ymmreg,ymmrm256 [rvm:fvm: evex.nds.256.66.0f38.w0 75 /r ] AVX512VL,AVX512VBMI,FUTURE */ + /* 241(f2 7d 28) 303 001(75) 120 : EVEX,PROT,AVX512VL,AVX512VBMI,FUTURE */ + {I_VPERMI2B, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37372, 559, 6100}, + /* 5982 : VPERMI2B zmmreg|mask|z,zmmreg,zmmrm512 [rvm:fvm: evex.nds.512.66.0f38.w0 75 /r ] AVX512VBMI,FUTURE */ + /* 241(f2 7d 48) 303 001(75) 120 : EVEX,PROT,AVX512VBMI,FUTURE */ + {I_VPERMI2B, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37381, 560, 6101}, + /* 5983 : VPERMI2D xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 76 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(76) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPERMI2D, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+37390, 543, 6102}, + /* 5984 : VPERMI2D ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 76 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(76) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPERMI2D, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+37399, 543, 6103}, + /* 5985 : VPERMI2D zmmreg|mask|z,zmmreg,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f38.w0 76 /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(76) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPERMI2D, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+37408, 544, 6104}, + /* 5986 : VPERMI2PD xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 77 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(77) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPERMI2PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+37417, 543, 6105}, + /* 5987 : VPERMI2PD ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 77 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(77) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPERMI2PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+37426, 543, 6106}, + /* 5988 : VPERMI2PD zmmreg|mask|z,zmmreg,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 77 /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(77) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPERMI2PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+37435, 544, 6107}, + /* 5989 : VPERMI2PS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 77 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(77) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPERMI2PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+37444, 543, 6108}, + /* 5990 : VPERMI2PS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 77 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(77) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPERMI2PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+37453, 543, 6109}, + /* 5991 : VPERMI2PS zmmreg|mask|z,zmmreg,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f38.w0 77 /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(77) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPERMI2PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+37462, 544, 6110}, + /* 5992 : VPERMI2Q xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 76 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(76) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPERMI2Q, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+37471, 543, 6111}, + /* 5993 : VPERMI2Q ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 76 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(76) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPERMI2Q, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+37480, 543, 6112}, + /* 5994 : VPERMI2Q zmmreg|mask|z,zmmreg,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 76 /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(76) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPERMI2Q, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+37489, 544, 6113}, + /* 5995 : VPERMI2W xmmreg|mask|z,xmmreg,xmmrm128 [rvm:fvm: evex.nds.128.66.0f38.w1 75 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 fd 08) 303 001(75) 120 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPERMI2W, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37498, 549, 6114}, + /* 5996 : VPERMI2W ymmreg|mask|z,ymmreg,ymmrm256 [rvm:fvm: evex.nds.256.66.0f38.w1 75 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 fd 28) 303 001(75) 120 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPERMI2W, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37507, 549, 6115}, + /* 5997 : VPERMI2W zmmreg|mask|z,zmmreg,zmmrm512 [rvm:fvm: evex.nds.512.66.0f38.w1 75 /r ] AVX512BW,FUTURE */ + /* 241(f2 fd 48) 303 001(75) 120 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPERMI2W, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37516, 550, 6116}, + /* 5998 : VPERMILPD xmmreg|mask|z,xmmrm128|b64,imm8 [rmi:fv: evex.128.66.0f3a.w1 05 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 250(f3 fd 08) 301 001(05) 110 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPERMILPD, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+19753, 543, 6117}, + /* 5999 : VPERMILPD ymmreg|mask|z,ymmrm256|b64,imm8 [rmi:fv: evex.256.66.0f3a.w1 05 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 250(f3 fd 28) 301 001(05) 110 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPERMILPD, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+19763, 543, 6118}, + /* 6000 : VPERMILPD zmmreg|mask|z,zmmrm512|b64,imm8 [rmi:fv: evex.512.66.0f3a.w1 05 /r ib ] AVX512,FUTURE */ + /* 250(f3 fd 48) 301 001(05) 110 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VPERMILPD, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+19773, 544, 6119}, + /* 6001 : VPERMILPD xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 0d /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(0d) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPERMILPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+37525, 543, 6120}, + /* 6002 : VPERMILPD ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 0d /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(0d) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPERMILPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+37543, 543, 6121}, + /* 6003 : VPERMILPD zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 0d /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(0d) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPERMILPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+37561, 544, 6122}, + /* 6004 : VPERMILPS xmmreg|mask|z,xmmrm128|b32,imm8 [rmi:fv: evex.128.66.0f3a.w0 04 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 250(f3 7d 08) 301 001(04) 110 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPERMILPS, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+19783, 543, 6123}, + /* 6005 : VPERMILPS ymmreg|mask|z,ymmrm256|b32,imm8 [rmi:fv: evex.256.66.0f3a.w0 04 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 250(f3 7d 28) 301 001(04) 110 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPERMILPS, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+19793, 543, 6124}, + /* 6006 : VPERMILPS zmmreg|mask|z,zmmrm512|b32,imm8 [rmi:fv: evex.512.66.0f3a.w0 04 /r ib ] AVX512,FUTURE */ + /* 250(f3 7d 48) 301 001(04) 110 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VPERMILPS, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+19803, 544, 6125}, + /* 6007 : VPERMILPS xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 0c /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(0c) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPERMILPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+37579, 543, 6126}, + /* 6008 : VPERMILPS ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 0c /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(0c) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPERMILPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+37597, 543, 6127}, + /* 6009 : VPERMILPS zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f38.w0 0c /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(0c) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPERMILPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+37615, 544, 6128}, + /* 6010 : VPERMPD ymmreg|mask|z,ymmrm256|b64,imm8 [rmi:fv: evex.256.66.0f3a.w1 01 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 250(f3 fd 28) 301 001(01) 110 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPERMPD, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+19813, 543, 6129}, + /* 6011 : VPERMPD zmmreg|mask|z,zmmrm512|b64,imm8 [rmi:fv: evex.512.66.0f3a.w1 01 /r ib ] AVX512,FUTURE */ + /* 250(f3 fd 48) 301 001(01) 110 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VPERMPD, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+19823, 544, 6130}, + /* 6012 : VPERMPD ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 16 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(16) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPERMPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+37633, 543, 6131}, + /* 6013 : VPERMPD zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 16 /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(16) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPERMPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+37651, 544, 6132}, + /* 6014 : VPERMPS ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 16 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(16) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPERMPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+37669, 543, 6133}, + /* 6015 : VPERMPS zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f38.w0 16 /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(16) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPERMPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+37687, 544, 6134}, + /* 6016 : VPERMQ ymmreg|mask|z,ymmrm256|b64,imm8 [rmi:fv: evex.256.66.0f3a.w1 00 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 250(f3 fd 28) 301 001(00) 110 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPERMQ, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+19833, 543, 6135}, + /* 6017 : VPERMQ zmmreg|mask|z,zmmrm512|b64,imm8 [rmi:fv: evex.512.66.0f3a.w1 00 /r ib ] AVX512,FUTURE */ + /* 250(f3 fd 48) 301 001(00) 110 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VPERMQ, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+19843, 544, 6136}, + /* 6018 : VPERMQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 36 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(36) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPERMQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+37705, 543, 6137}, + /* 6019 : VPERMQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 36 /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(36) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPERMQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+37723, 544, 6138}, + /* 6020 : VPERMT2B xmmreg|mask|z,xmmreg,xmmrm128 [rvm:fvm: evex.nds.128.66.0f38.w0 7d /r ] AVX512VL,AVX512VBMI,FUTURE */ + /* 241(f2 7d 08) 303 001(7d) 120 : EVEX,PROT,AVX512VL,AVX512VBMI,FUTURE */ + {I_VPERMT2B, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37741, 559, 6139}, + /* 6021 : VPERMT2B ymmreg|mask|z,ymmreg,ymmrm256 [rvm:fvm: evex.nds.256.66.0f38.w0 7d /r ] AVX512VL,AVX512VBMI,FUTURE */ + /* 241(f2 7d 28) 303 001(7d) 120 : EVEX,PROT,AVX512VL,AVX512VBMI,FUTURE */ + {I_VPERMT2B, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37750, 559, 6140}, + /* 6022 : VPERMT2B zmmreg|mask|z,zmmreg,zmmrm512 [rvm:fvm: evex.nds.512.66.0f38.w0 7d /r ] AVX512VBMI,FUTURE */ + /* 241(f2 7d 48) 303 001(7d) 120 : EVEX,PROT,AVX512VBMI,FUTURE */ + {I_VPERMT2B, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37759, 560, 6141}, + /* 6023 : VPERMT2D xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 7e /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(7e) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPERMT2D, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+37768, 543, 6142}, + /* 6024 : VPERMT2D ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 7e /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(7e) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPERMT2D, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+37777, 543, 6143}, + /* 6025 : VPERMT2D zmmreg|mask|z,zmmreg,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f38.w0 7e /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(7e) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPERMT2D, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+37786, 544, 6144}, + /* 6026 : VPERMT2PD xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 7f /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(7f) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPERMT2PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+37795, 543, 6145}, + /* 6027 : VPERMT2PD ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 7f /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(7f) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPERMT2PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+37804, 543, 6146}, + /* 6028 : VPERMT2PD zmmreg|mask|z,zmmreg,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 7f /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(7f) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPERMT2PD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+37813, 544, 6147}, + /* 6029 : VPERMT2PS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 7f /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(7f) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPERMT2PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+37822, 543, 6148}, + /* 6030 : VPERMT2PS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 7f /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(7f) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPERMT2PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+37831, 543, 6149}, + /* 6031 : VPERMT2PS zmmreg|mask|z,zmmreg,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f38.w0 7f /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(7f) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPERMT2PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+37840, 544, 6150}, + /* 6032 : VPERMT2Q xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 7e /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(7e) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPERMT2Q, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+37849, 543, 6151}, + /* 6033 : VPERMT2Q ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 7e /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(7e) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPERMT2Q, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+37858, 543, 6152}, + /* 6034 : VPERMT2Q zmmreg|mask|z,zmmreg,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 7e /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(7e) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPERMT2Q, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+37867, 544, 6153}, + /* 6035 : VPERMT2W xmmreg|mask|z,xmmreg,xmmrm128 [rvm:fvm: evex.nds.128.66.0f38.w1 7d /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 fd 08) 303 001(7d) 120 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPERMT2W, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37876, 549, 6154}, + /* 6036 : VPERMT2W ymmreg|mask|z,ymmreg,ymmrm256 [rvm:fvm: evex.nds.256.66.0f38.w1 7d /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 fd 28) 303 001(7d) 120 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPERMT2W, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37885, 549, 6155}, + /* 6037 : VPERMT2W zmmreg|mask|z,zmmreg,zmmrm512 [rvm:fvm: evex.nds.512.66.0f38.w1 7d /r ] AVX512BW,FUTURE */ + /* 241(f2 fd 48) 303 001(7d) 120 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPERMT2W, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37894, 550, 6156}, + /* 6038 : VPERMW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f38.w1 8d /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 fd 08) 303 001(8d) 120 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPERMW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37903, 549, 6157}, + /* 6039 : VPERMW ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f38.w1 8d /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 fd 28) 303 001(8d) 120 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPERMW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37921, 549, 6158}, + /* 6040 : VPERMW zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f38.w1 8d /r ] AVX512BW,FUTURE */ + /* 241(f2 fd 48) 303 001(8d) 120 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPERMW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37939, 550, 6159}, + /* 6041 : VPEXPANDD xmmreg|mask|z,mem128 [rm:t1s: evex.128.66.0f38.w0 89 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 08) 306 001(89) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPEXPANDD, 2, {XMMREG,MEMORY|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37957, 543, 6160}, + /* 6042 : VPEXPANDD ymmreg|mask|z,mem256 [rm:t1s: evex.256.66.0f38.w0 89 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 28) 306 001(89) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPEXPANDD, 2, {YMMREG,MEMORY|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37966, 543, 6161}, + /* 6043 : VPEXPANDD zmmreg|mask|z,mem512 [rm:t1s: evex.512.66.0f38.w0 89 /r ] AVX512,FUTURE */ + /* 250(f2 7d 48) 306 001(89) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPEXPANDD, 2, {ZMMREG,MEMORY|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37975, 544, 6162}, + /* 6044 : VPEXPANDD xmmreg|mask|z,xmmreg [rm:t1s: evex.128.66.0f38.w0 89 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 08) 306 001(89) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPEXPANDD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37957, 543, 6163}, + /* 6045 : VPEXPANDD ymmreg|mask|z,ymmreg [rm:t1s: evex.256.66.0f38.w0 89 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 28) 306 001(89) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPEXPANDD, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37966, 543, 6164}, + /* 6046 : VPEXPANDD zmmreg|mask|z,zmmreg [rm:t1s: evex.512.66.0f38.w0 89 /r ] AVX512,FUTURE */ + /* 250(f2 7d 48) 306 001(89) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPEXPANDD, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37975, 544, 6165}, + /* 6047 : VPEXPANDQ xmmreg|mask|z,mem128 [rm:t1s: evex.128.66.0f38.w1 89 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 fd 08) 306 001(89) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPEXPANDQ, 2, {XMMREG,MEMORY|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37984, 543, 6166}, + /* 6048 : VPEXPANDQ ymmreg|mask|z,mem256 [rm:t1s: evex.256.66.0f38.w1 89 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 fd 28) 306 001(89) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPEXPANDQ, 2, {YMMREG,MEMORY|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37993, 543, 6167}, + /* 6049 : VPEXPANDQ zmmreg|mask|z,mem512 [rm:t1s: evex.512.66.0f38.w1 89 /r ] AVX512,FUTURE */ + /* 250(f2 fd 48) 306 001(89) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPEXPANDQ, 2, {ZMMREG,MEMORY|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38002, 544, 6168}, + /* 6050 : VPEXPANDQ xmmreg|mask|z,xmmreg [rm:t1s: evex.128.66.0f38.w1 89 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 fd 08) 306 001(89) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPEXPANDQ, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37984, 543, 6169}, + /* 6051 : VPEXPANDQ ymmreg|mask|z,ymmreg [rm:t1s: evex.256.66.0f38.w1 89 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 fd 28) 306 001(89) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPEXPANDQ, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+37993, 543, 6170}, + /* 6052 : VPEXPANDQ zmmreg|mask|z,zmmreg [rm:t1s: evex.512.66.0f38.w1 89 /r ] AVX512,FUTURE */ + /* 250(f2 fd 48) 306 001(89) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPEXPANDQ, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38002, 544, 6171}, + /* 6053 : VPEXTRB reg8,xmmreg,imm8 [mri:t1s8: evex.128.66.0f3a.wig 14 /r ib ] AVX512BW,FUTURE */ + /* 250(f3 7d 08) 304 001(14) 101 022 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPEXTRB, 3, {REG_GPR|BITS8,XMMREG,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+19853, 556, 6172}, + /* 6054 : VPEXTRB reg16,xmmreg,imm8 [mri:t1s8: evex.128.66.0f3a.wig 14 /r ib ] AVX512BW,FUTURE */ + /* 250(f3 7d 08) 304 001(14) 101 022 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPEXTRB, 3, {REG_GPR|BITS16,XMMREG,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+19853, 556, 6173}, + /* 6055 : VPEXTRB reg32,xmmreg,imm8 [mri:t1s8: evex.128.66.0f3a.wig 14 /r ib ] AVX512BW,FUTURE */ + /* 250(f3 7d 08) 304 001(14) 101 022 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPEXTRB, 3, {REG_GPR|BITS32,XMMREG,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+19853, 556, 6174}, + /* 6056 : VPEXTRB reg64,xmmreg,imm8 [mri:t1s8: evex.128.66.0f3a.wig 14 /r ib ] AVX512BW,FUTURE */ + /* 250(f3 7d 08) 304 001(14) 101 022 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPEXTRB, 3, {REG_GPR|BITS64,XMMREG,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+19853, 556, 6175}, + /* 6057 : VPEXTRB mem8,xmmreg,imm8 [mri:t1s8: evex.128.66.0f3a.wig 14 /r ib ] AVX512BW,FUTURE */ + /* 250(f3 7d 08) 304 001(14) 101 022 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPEXTRB, 3, {MEMORY|BITS8,XMMREG,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+19853, 556, 6176}, + /* 6058 : VPEXTRD rm32,xmmreg,imm8 [mri:t1s: evex.128.66.0f3a.w0 16 /r ib ] AVX512DQ,FUTURE */ + /* 250(f3 7d 08) 306 001(16) 101 022 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VPEXTRD, 3, {RM_GPR|BITS32,XMMREG,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+19863, 547, 6177}, + /* 6059 : VPEXTRQ rm64,xmmreg,imm8 [mri:t1s: evex.128.66.0f3a.w1 16 /r ib ] AVX512DQ,FUTURE */ + /* 250(f3 fd 08) 306 001(16) 101 022 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VPEXTRQ, 3, {RM_GPR|BITS64,XMMREG,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+19873, 547, 6178}, + /* 6060 : VPEXTRW reg16,xmmreg,imm8 [mri:t1s16:evex.128.66.0f3a.wig 15 /r ib ] AVX512BW,FUTURE */ + /* 250(f3 7d 08) 305 001(15) 101 022 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPEXTRW, 3, {REG_GPR|BITS16,XMMREG,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+19883, 556, 6179}, + /* 6061 : VPEXTRW reg32,xmmreg,imm8 [mri:t1s16:evex.128.66.0f3a.wig 15 /r ib ] AVX512BW,FUTURE */ + /* 250(f3 7d 08) 305 001(15) 101 022 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPEXTRW, 3, {REG_GPR|BITS32,XMMREG,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+19883, 556, 6180}, + /* 6062 : VPEXTRW reg64,xmmreg,imm8 [mri:t1s16:evex.128.66.0f3a.wig 15 /r ib ] AVX512BW,FUTURE */ + /* 250(f3 7d 08) 305 001(15) 101 022 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPEXTRW, 3, {REG_GPR|BITS64,XMMREG,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+19883, 556, 6181}, + /* 6063 : VPEXTRW mem16,xmmreg,imm8 [mri:t1s16:evex.128.66.0f3a.wig 15 /r ib ] AVX512BW,FUTURE */ + /* 250(f3 7d 08) 305 001(15) 101 022 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPEXTRW, 3, {MEMORY|BITS16,XMMREG,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+19883, 556, 6182}, + /* 6064 : VPEXTRW reg16,xmmreg,imm8 [rmi: evex.128.66.0f.wig c5 /r ib ] AVX512BW,FUTURE */ + /* 250(f1 7d 08) 300 001(c5) 110 022 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPEXTRW, 3, {REG_GPR|BITS16,XMMREG,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+19893, 556, 6183}, + /* 6065 : VPEXTRW reg32,xmmreg,imm8 [rmi: evex.128.66.0f.wig c5 /r ib ] AVX512BW,FUTURE */ + /* 250(f1 7d 08) 300 001(c5) 110 022 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPEXTRW, 3, {REG_GPR|BITS32,XMMREG,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+19893, 556, 6184}, + /* 6066 : VPEXTRW reg64,xmmreg,imm8 [rmi: evex.128.66.0f.wig c5 /r ib ] AVX512BW,FUTURE */ + /* 250(f1 7d 08) 300 001(c5) 110 022 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPEXTRW, 3, {REG_GPR|BITS64,XMMREG,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+19893, 556, 6185}, + /* 6067 : VPGATHERDD xmmreg|mask,xmem32 [rm:t1s: vsibx evex.128.66.0f38.w0 90 /r ] AVX512,AVX512VL,FUTURE */ + /* 374 250(f2 7d 08) 306 001(90) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPGATHERDD, 2, {XMMREG,XMEM|BITS32,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+19903, 543, 6186}, + /* 6068 : VPGATHERDD ymmreg|mask,ymem32 [rm:t1s: vsiby evex.256.66.0f38.w0 90 /r ] AVX512,AVX512VL,FUTURE */ + /* 375 250(f2 7d 28) 306 001(90) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPGATHERDD, 2, {YMMREG,YMEM|BITS32,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+19913, 543, 6187}, + /* 6069 : VPGATHERDD zmmreg|mask,zmem32 [rm:t1s: vsibz evex.512.66.0f38.w0 90 /r ] AVX512,FUTURE */ + /* 376 250(f2 7d 48) 306 001(90) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPGATHERDD, 2, {ZMMREG,ZMEM|BITS32,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+19923, 544, 6188}, + /* 6070 : VPGATHERDQ xmmreg|mask,xmem64 [rm:t1s: vsibx evex.128.66.0f38.w1 90 /r ] AVX512,AVX512VL,FUTURE */ + /* 374 250(f2 fd 08) 306 001(90) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPGATHERDQ, 2, {XMMREG,XMEM|BITS64,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+19933, 543, 6189}, + /* 6071 : VPGATHERDQ ymmreg|mask,xmem64 [rm:t1s: vsibx evex.256.66.0f38.w1 90 /r ] AVX512,AVX512VL,FUTURE */ + /* 374 250(f2 fd 28) 306 001(90) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPGATHERDQ, 2, {YMMREG,XMEM|BITS64,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+19943, 543, 6190}, + /* 6072 : VPGATHERDQ zmmreg|mask,ymem64 [rm:t1s: vsiby evex.512.66.0f38.w1 90 /r ] AVX512,FUTURE */ + /* 375 250(f2 fd 48) 306 001(90) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPGATHERDQ, 2, {ZMMREG,YMEM|BITS64,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+19953, 544, 6191}, + /* 6073 : VPGATHERQD xmmreg|mask,xmem32 [rm:t1s: vsibx evex.128.66.0f38.w0 91 /r ] AVX512,AVX512VL,FUTURE */ + /* 374 250(f2 7d 08) 306 001(91) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPGATHERQD, 2, {XMMREG,XMEM|BITS32,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+19963, 543, 6192}, + /* 6074 : VPGATHERQD xmmreg|mask,ymem32 [rm:t1s: vsiby evex.256.66.0f38.w0 91 /r ] AVX512,AVX512VL,FUTURE */ + /* 375 250(f2 7d 28) 306 001(91) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPGATHERQD, 2, {XMMREG,YMEM|BITS32,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+19973, 543, 6193}, + /* 6075 : VPGATHERQD ymmreg|mask,zmem32 [rm:t1s: vsibz evex.512.66.0f38.w0 91 /r ] AVX512,FUTURE */ + /* 376 250(f2 7d 48) 306 001(91) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPGATHERQD, 2, {YMMREG,ZMEM|BITS32,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+19983, 544, 6194}, + /* 6076 : VPGATHERQQ xmmreg|mask,xmem64 [rm:t1s: vsibx evex.128.66.0f38.w1 91 /r ] AVX512,AVX512VL,FUTURE */ + /* 374 250(f2 fd 08) 306 001(91) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPGATHERQQ, 2, {XMMREG,XMEM|BITS64,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+19993, 543, 6195}, + /* 6077 : VPGATHERQQ ymmreg|mask,ymem64 [rm:t1s: vsiby evex.256.66.0f38.w1 91 /r ] AVX512,AVX512VL,FUTURE */ + /* 375 250(f2 fd 28) 306 001(91) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPGATHERQQ, 2, {YMMREG,YMEM|BITS64,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+20003, 543, 6196}, + /* 6078 : VPGATHERQQ zmmreg|mask,zmem64 [rm:t1s: vsibz evex.512.66.0f38.w1 91 /r ] AVX512,FUTURE */ + /* 376 250(f2 fd 48) 306 001(91) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPGATHERQQ, 2, {ZMMREG,ZMEM|BITS64,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+20013, 544, 6197}, + /* 6079 : VPINSRB xmmreg,xmmreg*,reg32,imm8 [rvmi:t1s8:evex.nds.128.66.0f3a.wig 20 /r ib ] AVX512BW,FUTURE */ + /* 241(f3 7d 08) 304 001(20) 120 023 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPINSRB, 4, {XMMREG,XMMREG,REG_GPR|BITS32,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+20023, 556, 6198}, + /* 6080 : VPINSRB xmmreg,xmmreg*,mem8,imm8 [rvmi:t1s8:evex.nds.128.66.0f3a.wig 20 /r ib ] AVX512BW,FUTURE */ + /* 241(f3 7d 08) 304 001(20) 120 023 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPINSRB, 4, {XMMREG,XMMREG,MEMORY|BITS8,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+20023, 556, 6199}, + /* 6081 : VPINSRD xmmreg,xmmreg*,rm32,imm8 [rvmi:t1s: evex.nds.128.66.0f3a.w0 22 /r ib ] AVX512DQ,FUTURE */ + /* 241(f3 7d 08) 306 001(22) 120 023 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VPINSRD, 4, {XMMREG,XMMREG,RM_GPR|BITS32,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+20043, 547, 6200}, + /* 6082 : VPINSRQ xmmreg,xmmreg*,rm64,imm8 [rvmi:t1s: evex.nds.128.66.0f3a.w1 22 /r ib ] AVX512DQ,FUTURE */ + /* 241(f3 fd 08) 306 001(22) 120 023 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VPINSRQ, 4, {XMMREG,XMMREG,RM_GPR|BITS64,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+20063, 547, 6201}, + /* 6083 : VPINSRW xmmreg,xmmreg*,reg32,imm8 [rvmi:t1s16:evex.nds.128.66.0f.wig c4 /r ib ] AVX512BW,FUTURE */ + /* 241(f1 7d 08) 305 001(c4) 120 023 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPINSRW, 4, {XMMREG,XMMREG,REG_GPR|BITS32,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+20083, 556, 6202}, + /* 6084 : VPINSRW xmmreg,xmmreg*,mem16,imm8 [rvmi:t1s16:evex.nds.128.66.0f.wig c4 /r ib ] AVX512BW,FUTURE */ + /* 241(f1 7d 08) 305 001(c4) 120 023 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPINSRW, 4, {XMMREG,XMMREG,MEMORY|BITS16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+20083, 556, 6203}, + /* 6085 : VPLZCNTD xmmreg|mask|z,xmmrm128|b32 [rm:fv: evex.128.66.0f38.w0 44 /r ] AVX512CD,AVX512VL,FUTURE */ + /* 250(f2 7d 08) 301 001(44) 110 : EVEX,PROT,AVX512CD,AVX512VL,FUTURE */ + {I_VPLZCNTD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+38011, 557, 6204}, + /* 6086 : VPLZCNTD ymmreg|mask|z,ymmrm256|b32 [rm:fv: evex.256.66.0f38.w0 44 /r ] AVX512CD,AVX512VL,FUTURE */ + /* 250(f2 7d 28) 301 001(44) 110 : EVEX,PROT,AVX512CD,AVX512VL,FUTURE */ + {I_VPLZCNTD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+38020, 557, 6205}, + /* 6087 : VPLZCNTD zmmreg|mask|z,zmmrm512|b32 [rm:fv: evex.512.66.0f38.w0 44 /r ] AVX512CD,FUTURE */ + /* 250(f2 7d 48) 301 001(44) 110 : EVEX,PROT,AVX512CD,FUTURE */ + {I_VPLZCNTD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+38029, 558, 6206}, + /* 6088 : VPLZCNTQ xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.66.0f38.w1 44 /r ] AVX512CD,AVX512VL,FUTURE */ + /* 250(f2 fd 08) 301 001(44) 110 : EVEX,PROT,AVX512CD,AVX512VL,FUTURE */ + {I_VPLZCNTQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+38038, 557, 6207}, + /* 6089 : VPLZCNTQ ymmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.66.0f38.w1 44 /r ] AVX512CD,AVX512VL,FUTURE */ + /* 250(f2 fd 28) 301 001(44) 110 : EVEX,PROT,AVX512CD,AVX512VL,FUTURE */ + {I_VPLZCNTQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+38047, 557, 6208}, + /* 6090 : VPLZCNTQ zmmreg|mask|z,zmmrm512|b64 [rm:fv: evex.512.66.0f38.w1 44 /r ] AVX512CD,FUTURE */ + /* 250(f2 fd 48) 301 001(44) 110 : EVEX,PROT,AVX512CD,FUTURE */ + {I_VPLZCNTQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+38056, 558, 6209}, + /* 6091 : VPMADD52HUQ xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 b5 /r ] AVX512VL,AVX512IFMA,FUTURE */ + /* 241(f2 fd 08) 301 001(b5) 120 : EVEX,PROT,AVX512VL,AVX512IFMA,FUTURE */ + {I_VPMADD52HUQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+38065, 561, 6210}, + /* 6092 : VPMADD52HUQ ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 b5 /r ] AVX512VL,AVX512IFMA,FUTURE */ + /* 241(f2 fd 28) 301 001(b5) 120 : EVEX,PROT,AVX512VL,AVX512IFMA,FUTURE */ + {I_VPMADD52HUQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+38074, 561, 6211}, + /* 6093 : VPMADD52HUQ zmmreg|mask|z,zmmreg,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 b5 /r ] AVX512IFMA,FUTURE */ + /* 241(f2 fd 48) 301 001(b5) 120 : EVEX,PROT,AVX512IFMA,FUTURE */ + {I_VPMADD52HUQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+38083, 562, 6212}, + /* 6094 : VPMADD52LUQ xmmreg|mask|z,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 b4 /r ] AVX512VL,AVX512IFMA,FUTURE */ + /* 241(f2 fd 08) 301 001(b4) 120 : EVEX,PROT,AVX512VL,AVX512IFMA,FUTURE */ + {I_VPMADD52LUQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+38092, 561, 6213}, + /* 6095 : VPMADD52LUQ ymmreg|mask|z,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 b4 /r ] AVX512VL,AVX512IFMA,FUTURE */ + /* 241(f2 fd 28) 301 001(b4) 120 : EVEX,PROT,AVX512VL,AVX512IFMA,FUTURE */ + {I_VPMADD52LUQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+38101, 561, 6214}, + /* 6096 : VPMADD52LUQ zmmreg|mask|z,zmmreg,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 b4 /r ] AVX512IFMA,FUTURE */ + /* 241(f2 fd 48) 301 001(b4) 120 : EVEX,PROT,AVX512IFMA,FUTURE */ + {I_VPMADD52LUQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+38110, 562, 6215}, + /* 6097 : VPMADDUBSW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f38.wig 04 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 7d 08) 303 001(04) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMADDUBSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38119, 555, 6216}, + /* 6098 : VPMADDUBSW ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f38.wig 04 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 7d 28) 303 001(04) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMADDUBSW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38137, 555, 6217}, + /* 6099 : VPMADDUBSW zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f38.wig 04 /r ] AVX512BW,FUTURE */ + /* 241(f2 7d 48) 303 001(04) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPMADDUBSW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38155, 556, 6218}, + /* 6100 : VPMADDWD xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig f5 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 303 001(f5) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMADDWD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38173, 555, 6219}, + /* 6101 : VPMADDWD ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig f5 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 303 001(f5) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMADDWD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38191, 555, 6220}, + /* 6102 : VPMADDWD zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig f5 /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 303 001(f5) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPMADDWD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38209, 556, 6221}, + /* 6103 : VPMAXSB xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f38.wig 3c /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 7d 08) 303 001(3c) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMAXSB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38227, 555, 6222}, + /* 6104 : VPMAXSB ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f38.wig 3c /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 7d 28) 303 001(3c) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMAXSB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38245, 555, 6223}, + /* 6105 : VPMAXSB zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f38.wig 3c /r ] AVX512BW,FUTURE */ + /* 241(f2 7d 48) 303 001(3c) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPMAXSB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38263, 556, 6224}, + /* 6106 : VPMAXSD xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 3d /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(3d) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMAXSD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+38281, 543, 6225}, + /* 6107 : VPMAXSD ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 3d /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(3d) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMAXSD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+38299, 543, 6226}, + /* 6108 : VPMAXSD zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f38.w0 3d /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(3d) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMAXSD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+38317, 544, 6227}, + /* 6109 : VPMAXSQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 3d /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(3d) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMAXSQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+38335, 543, 6228}, + /* 6110 : VPMAXSQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 3d /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(3d) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMAXSQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+38353, 543, 6229}, + /* 6111 : VPMAXSQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 3d /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(3d) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMAXSQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+38371, 544, 6230}, + /* 6112 : VPMAXSW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig ee /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 303 001(ee) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMAXSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38389, 555, 6231}, + /* 6113 : VPMAXSW ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig ee /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 303 001(ee) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMAXSW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38407, 555, 6232}, + /* 6114 : VPMAXSW zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig ee /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 303 001(ee) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPMAXSW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38425, 556, 6233}, + /* 6115 : VPMAXUB xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig de /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 303 001(de) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMAXUB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38443, 555, 6234}, + /* 6116 : VPMAXUB ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig de /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 303 001(de) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMAXUB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38461, 555, 6235}, + /* 6117 : VPMAXUB zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig de /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 303 001(de) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPMAXUB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38479, 556, 6236}, + /* 6118 : VPMAXUD xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 3f /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(3f) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMAXUD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+38497, 543, 6237}, + /* 6119 : VPMAXUD ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 3f /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(3f) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMAXUD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+38515, 543, 6238}, + /* 6120 : VPMAXUD zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f38.w0 3f /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(3f) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMAXUD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+38533, 544, 6239}, + /* 6121 : VPMAXUQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 3f /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(3f) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMAXUQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+38551, 543, 6240}, + /* 6122 : VPMAXUQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 3f /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(3f) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMAXUQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+38569, 543, 6241}, + /* 6123 : VPMAXUQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 3f /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(3f) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMAXUQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+38587, 544, 6242}, + /* 6124 : VPMAXUW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f38.wig 3e /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 7d 08) 303 001(3e) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMAXUW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38605, 555, 6243}, + /* 6125 : VPMAXUW ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f38.wig 3e /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 7d 28) 303 001(3e) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMAXUW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38623, 555, 6244}, + /* 6126 : VPMAXUW zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f38.wig 3e /r ] AVX512BW,FUTURE */ + /* 241(f2 7d 48) 303 001(3e) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPMAXUW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38641, 556, 6245}, + /* 6127 : VPMINSB xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f38.wig 38 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 7d 08) 303 001(38) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMINSB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38659, 555, 6246}, + /* 6128 : VPMINSB ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f38.wig 38 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 7d 28) 303 001(38) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMINSB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38677, 555, 6247}, + /* 6129 : VPMINSB zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f38.wig 38 /r ] AVX512BW,FUTURE */ + /* 241(f2 7d 48) 303 001(38) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPMINSB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38695, 556, 6248}, + /* 6130 : VPMINSD xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 39 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(39) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMINSD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+38713, 543, 6249}, + /* 6131 : VPMINSD ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 39 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(39) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMINSD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+38731, 543, 6250}, + /* 6132 : VPMINSD zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f38.w0 39 /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(39) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMINSD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+38749, 544, 6251}, + /* 6133 : VPMINSQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 39 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(39) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMINSQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+38767, 543, 6252}, + /* 6134 : VPMINSQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 39 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(39) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMINSQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+38785, 543, 6253}, + /* 6135 : VPMINSQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 39 /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(39) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMINSQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+38803, 544, 6254}, + /* 6136 : VPMINSW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig ea /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 303 001(ea) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMINSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38821, 555, 6255}, + /* 6137 : VPMINSW ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig ea /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 303 001(ea) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMINSW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38839, 555, 6256}, + /* 6138 : VPMINSW zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig ea /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 303 001(ea) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPMINSW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38857, 556, 6257}, + /* 6139 : VPMINUB xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig da /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 303 001(da) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMINUB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38875, 555, 6258}, + /* 6140 : VPMINUB ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig da /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 303 001(da) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMINUB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38893, 555, 6259}, + /* 6141 : VPMINUB zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig da /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 303 001(da) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPMINUB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+38911, 556, 6260}, + /* 6142 : VPMINUD xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 3b /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(3b) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMINUD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+38929, 543, 6261}, + /* 6143 : VPMINUD ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 3b /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(3b) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMINUD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+38947, 543, 6262}, + /* 6144 : VPMINUD zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f38.w0 3b /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(3b) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMINUD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+38965, 544, 6263}, + /* 6145 : VPMINUQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 3b /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(3b) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMINUQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+38983, 543, 6264}, + /* 6146 : VPMINUQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 3b /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(3b) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMINUQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+39001, 543, 6265}, + /* 6147 : VPMINUQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 3b /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(3b) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMINUQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+39019, 544, 6266}, + /* 6148 : VPMINUW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f38.wig 3a /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 7d 08) 303 001(3a) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMINUW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39037, 555, 6267}, + /* 6149 : VPMINUW ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f38.wig 3a /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 7d 28) 303 001(3a) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMINUW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39055, 555, 6268}, + /* 6150 : VPMINUW zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f38.wig 3a /r ] AVX512BW,FUTURE */ + /* 241(f2 7d 48) 303 001(3a) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPMINUW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39073, 556, 6269}, + /* 6151 : VPMOVB2M kreg,xmmreg [rm: evex.128.f3.0f38.w0 29 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7e 08) 300 001(29) 110 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMOVB2M, 2, {OPMASKREG,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+39091, 549, 6270}, + /* 6152 : VPMOVB2M kreg,ymmreg [rm: evex.256.f3.0f38.w0 29 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7e 28) 300 001(29) 110 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMOVB2M, 2, {OPMASKREG,YMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+39100, 549, 6271}, + /* 6153 : VPMOVB2M kreg,zmmreg [rm: evex.512.f3.0f38.w0 29 /r ] AVX512BW,FUTURE */ + /* 250(f2 7e 48) 300 001(29) 110 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPMOVB2M, 2, {OPMASKREG,ZMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+39109, 550, 6272}, + /* 6154 : VPMOVD2M kreg,xmmreg [rm: evex.128.f3.0f38.w0 39 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f2 7e 08) 300 001(39) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VPMOVD2M, 2, {OPMASKREG,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+39118, 546, 6273}, + /* 6155 : VPMOVD2M kreg,ymmreg [rm: evex.256.f3.0f38.w0 39 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f2 7e 28) 300 001(39) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VPMOVD2M, 2, {OPMASKREG,YMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+39127, 546, 6274}, + /* 6156 : VPMOVD2M kreg,zmmreg [rm: evex.512.f3.0f38.w0 39 /r ] AVX512DQ,FUTURE */ + /* 250(f2 7e 48) 300 001(39) 110 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VPMOVD2M, 2, {OPMASKREG,ZMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+39136, 547, 6275}, + /* 6157 : VPMOVDB xmmreg|mask|z,xmmreg [mr: evex.128.f3.0f38.w0 31 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 08) 300 001(31) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVDB, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39145, 543, 6276}, + /* 6158 : VPMOVDB xmmreg|mask|z,ymmreg [mr: evex.256.f3.0f38.w0 31 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 28) 300 001(31) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVDB, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39154, 543, 6277}, + /* 6159 : VPMOVDB xmmreg|mask|z,zmmreg [mr: evex.512.f3.0f38.w0 31 /r ] AVX512,FUTURE */ + /* 250(f2 7e 48) 300 001(31) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVDB, 2, {XMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39163, 544, 6278}, + /* 6160 : VPMOVDB mem32|mask,xmmreg [mr:qvm: evex.128.f3.0f38.w0 31 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 08) 315 001(31) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVDB, 2, {MEMORY|BITS32,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+39172, 543, 6279}, + /* 6161 : VPMOVDB mem64|mask,ymmreg [mr:qvm: evex.256.f3.0f38.w0 31 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 28) 315 001(31) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVDB, 2, {MEMORY|BITS64,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+39181, 543, 6280}, + /* 6162 : VPMOVDB mem128|mask,zmmreg [mr:qvm: evex.512.f3.0f38.w0 31 /r ] AVX512,FUTURE */ + /* 250(f2 7e 48) 315 001(31) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVDB, 2, {MEMORY|BITS128,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+39190, 544, 6281}, + /* 6163 : VPMOVDW xmmreg|mask|z,xmmreg [mr: evex.128.f3.0f38.w0 33 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 08) 300 001(33) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVDW, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39199, 543, 6282}, + /* 6164 : VPMOVDW xmmreg|mask|z,ymmreg [mr: evex.256.f3.0f38.w0 33 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 28) 300 001(33) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVDW, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39208, 543, 6283}, + /* 6165 : VPMOVDW ymmreg|mask|z,zmmreg [mr: evex.512.f3.0f38.w0 33 /r ] AVX512,FUTURE */ + /* 250(f2 7e 48) 300 001(33) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVDW, 2, {YMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39217, 544, 6284}, + /* 6166 : VPMOVDW mem64|mask,xmmreg [mr:hvm: evex.128.f3.0f38.w0 33 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 08) 314 001(33) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVDW, 2, {MEMORY|BITS64,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+39226, 543, 6285}, + /* 6167 : VPMOVDW mem128|mask,ymmreg [mr:hvm: evex.256.f3.0f38.w0 33 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 28) 314 001(33) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVDW, 2, {MEMORY|BITS128,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+39235, 543, 6286}, + /* 6168 : VPMOVDW mem256|mask,zmmreg [mr:hvm: evex.512.f3.0f38.w0 33 /r ] AVX512,FUTURE */ + /* 250(f2 7e 48) 314 001(33) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVDW, 2, {MEMORY|BITS256,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+39244, 544, 6287}, + /* 6169 : VPMOVM2B xmmreg,kreg [rm: evex.128.f3.0f38.w0 28 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7e 08) 300 001(28) 110 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMOVM2B, 2, {XMMREG,OPMASKREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+39253, 549, 6288}, + /* 6170 : VPMOVM2B ymmreg,kreg [rm: evex.256.f3.0f38.w0 28 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7e 28) 300 001(28) 110 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMOVM2B, 2, {YMMREG,OPMASKREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+39262, 549, 6289}, + /* 6171 : VPMOVM2B zmmreg,kreg [rm: evex.512.f3.0f38.w0 28 /r ] AVX512BW,FUTURE */ + /* 250(f2 7e 48) 300 001(28) 110 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPMOVM2B, 2, {ZMMREG,OPMASKREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+39271, 550, 6290}, + /* 6172 : VPMOVM2D xmmreg,kreg [rm: evex.128.f3.0f38.w0 38 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f2 7e 08) 300 001(38) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VPMOVM2D, 2, {XMMREG,OPMASKREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+39280, 546, 6291}, + /* 6173 : VPMOVM2D ymmreg,kreg [rm: evex.256.f3.0f38.w0 38 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f2 7e 28) 300 001(38) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VPMOVM2D, 2, {YMMREG,OPMASKREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+39289, 546, 6292}, + /* 6174 : VPMOVM2D zmmreg,kreg [rm: evex.512.f3.0f38.w0 38 /r ] AVX512DQ,FUTURE */ + /* 250(f2 7e 48) 300 001(38) 110 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VPMOVM2D, 2, {ZMMREG,OPMASKREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+39298, 547, 6293}, + /* 6175 : VPMOVM2Q xmmreg,kreg [rm: evex.128.f3.0f38.w1 38 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f2 fe 08) 300 001(38) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VPMOVM2Q, 2, {XMMREG,OPMASKREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+39307, 546, 6294}, + /* 6176 : VPMOVM2Q ymmreg,kreg [rm: evex.256.f3.0f38.w1 38 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f2 fe 28) 300 001(38) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VPMOVM2Q, 2, {YMMREG,OPMASKREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+39316, 546, 6295}, + /* 6177 : VPMOVM2Q zmmreg,kreg [rm: evex.512.f3.0f38.w1 38 /r ] AVX512DQ,FUTURE */ + /* 250(f2 fe 48) 300 001(38) 110 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VPMOVM2Q, 2, {ZMMREG,OPMASKREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+39325, 547, 6296}, + /* 6178 : VPMOVM2W xmmreg,kreg [rm: evex.128.f3.0f38.w1 28 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 fe 08) 300 001(28) 110 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMOVM2W, 2, {XMMREG,OPMASKREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+39334, 549, 6297}, + /* 6179 : VPMOVM2W ymmreg,kreg [rm: evex.256.f3.0f38.w1 28 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 fe 28) 300 001(28) 110 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMOVM2W, 2, {YMMREG,OPMASKREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+39343, 549, 6298}, + /* 6180 : VPMOVM2W zmmreg,kreg [rm: evex.512.f3.0f38.w1 28 /r ] AVX512BW,FUTURE */ + /* 250(f2 fe 48) 300 001(28) 110 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPMOVM2W, 2, {ZMMREG,OPMASKREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+39352, 550, 6299}, + /* 6181 : VPMOVQ2M kreg,xmmreg [rm: evex.128.f3.0f38.w1 39 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f2 fe 08) 300 001(39) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VPMOVQ2M, 2, {OPMASKREG,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+39361, 546, 6300}, + /* 6182 : VPMOVQ2M kreg,ymmreg [rm: evex.256.f3.0f38.w1 39 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f2 fe 28) 300 001(39) 110 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VPMOVQ2M, 2, {OPMASKREG,YMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+39370, 546, 6301}, + /* 6183 : VPMOVQ2M kreg,zmmreg [rm: evex.512.f3.0f38.w1 39 /r ] AVX512DQ,FUTURE */ + /* 250(f2 fe 48) 300 001(39) 110 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VPMOVQ2M, 2, {OPMASKREG,ZMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+39379, 547, 6302}, + /* 6184 : VPMOVQB xmmreg|mask|z,xmmreg [mr: evex.128.f3.0f38.w0 32 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 08) 300 001(32) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVQB, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39388, 543, 6303}, + /* 6185 : VPMOVQB xmmreg|mask|z,ymmreg [mr: evex.256.f3.0f38.w0 32 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 28) 300 001(32) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVQB, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39397, 543, 6304}, + /* 6186 : VPMOVQB xmmreg|mask|z,zmmreg [mr: evex.512.f3.0f38.w0 32 /r ] AVX512,FUTURE */ + /* 250(f2 7e 48) 300 001(32) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVQB, 2, {XMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39406, 544, 6305}, + /* 6187 : VPMOVQB mem16|mask,xmmreg [mr:ovm: evex.128.f3.0f38.w0 32 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 08) 316 001(32) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVQB, 2, {MEMORY|BITS16,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+39415, 543, 6306}, + /* 6188 : VPMOVQB mem32|mask,ymmreg [mr:ovm: evex.256.f3.0f38.w0 32 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 28) 316 001(32) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVQB, 2, {MEMORY|BITS32,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+39424, 543, 6307}, + /* 6189 : VPMOVQB mem64|mask,zmmreg [mr:ovm: evex.512.f3.0f38.w0 32 /r ] AVX512,FUTURE */ + /* 250(f2 7e 48) 316 001(32) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVQB, 2, {MEMORY|BITS64,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+39433, 544, 6308}, + /* 6190 : VPMOVQD xmmreg|mask|z,xmmreg [mr: evex.128.f3.0f38.w0 35 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 08) 300 001(35) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVQD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39442, 543, 6309}, + /* 6191 : VPMOVQD xmmreg|mask|z,ymmreg [mr: evex.256.f3.0f38.w0 35 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 28) 300 001(35) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVQD, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39451, 543, 6310}, + /* 6192 : VPMOVQD ymmreg|mask|z,zmmreg [mr: evex.512.f3.0f38.w0 35 /r ] AVX512,FUTURE */ + /* 250(f2 7e 48) 300 001(35) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVQD, 2, {YMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39460, 544, 6311}, + /* 6193 : VPMOVQD mem64|mask,xmmreg [mr:hvm: evex.128.f3.0f38.w0 35 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 08) 314 001(35) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVQD, 2, {MEMORY|BITS64,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+39469, 543, 6312}, + /* 6194 : VPMOVQD mem128|mask,ymmreg [mr:hvm: evex.256.f3.0f38.w0 35 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 28) 314 001(35) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVQD, 2, {MEMORY|BITS128,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+39478, 543, 6313}, + /* 6195 : VPMOVQD mem256|mask,zmmreg [mr:hvm: evex.512.f3.0f38.w0 35 /r ] AVX512,FUTURE */ + /* 250(f2 7e 48) 314 001(35) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVQD, 2, {MEMORY|BITS256,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+39487, 544, 6314}, + /* 6196 : VPMOVQW xmmreg|mask|z,xmmreg [mr: evex.128.f3.0f38.w0 34 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 08) 300 001(34) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVQW, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39496, 543, 6315}, + /* 6197 : VPMOVQW xmmreg|mask|z,ymmreg [mr: evex.256.f3.0f38.w0 34 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 28) 300 001(34) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVQW, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39505, 543, 6316}, + /* 6198 : VPMOVQW xmmreg|mask|z,zmmreg [mr: evex.512.f3.0f38.w0 34 /r ] AVX512,FUTURE */ + /* 250(f2 7e 48) 300 001(34) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVQW, 2, {XMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39514, 544, 6317}, + /* 6199 : VPMOVQW mem32|mask,xmmreg [mr:qvm: evex.128.f3.0f38.w0 34 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 08) 315 001(34) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVQW, 2, {MEMORY|BITS32,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+39523, 543, 6318}, + /* 6200 : VPMOVQW mem64|mask,ymmreg [mr:qvm: evex.256.f3.0f38.w0 34 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 28) 315 001(34) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVQW, 2, {MEMORY|BITS64,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+39532, 543, 6319}, + /* 6201 : VPMOVQW mem128|mask,zmmreg [mr:qvm: evex.512.f3.0f38.w0 34 /r ] AVX512,FUTURE */ + /* 250(f2 7e 48) 315 001(34) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVQW, 2, {MEMORY|BITS128,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+39541, 544, 6320}, + /* 6202 : VPMOVSDB xmmreg|mask|z,xmmreg [mr: evex.128.f3.0f38.w0 21 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 08) 300 001(21) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVSDB, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39550, 543, 6321}, + /* 6203 : VPMOVSDB xmmreg|mask|z,ymmreg [mr: evex.256.f3.0f38.w0 21 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 28) 300 001(21) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVSDB, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39559, 543, 6322}, + /* 6204 : VPMOVSDB xmmreg|mask|z,zmmreg [mr: evex.512.f3.0f38.w0 21 /r ] AVX512,FUTURE */ + /* 250(f2 7e 48) 300 001(21) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVSDB, 2, {XMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39568, 544, 6323}, + /* 6205 : VPMOVSDB mem32|mask,xmmreg [mr:qvm: evex.128.f3.0f38.w0 21 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 08) 315 001(21) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVSDB, 2, {MEMORY|BITS32,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+39577, 543, 6324}, + /* 6206 : VPMOVSDB mem64|mask,ymmreg [mr:qvm: evex.256.f3.0f38.w0 21 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 28) 315 001(21) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVSDB, 2, {MEMORY|BITS64,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+39586, 543, 6325}, + /* 6207 : VPMOVSDB mem128|mask,zmmreg [mr:qvm: evex.512.f3.0f38.w0 21 /r ] AVX512,FUTURE */ + /* 250(f2 7e 48) 315 001(21) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVSDB, 2, {MEMORY|BITS128,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+39595, 544, 6326}, + /* 6208 : VPMOVSDW xmmreg|mask|z,xmmreg [mr: evex.128.f3.0f38.w0 23 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 08) 300 001(23) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVSDW, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39604, 543, 6327}, + /* 6209 : VPMOVSDW xmmreg|mask|z,ymmreg [mr: evex.256.f3.0f38.w0 23 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 28) 300 001(23) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVSDW, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39613, 543, 6328}, + /* 6210 : VPMOVSDW ymmreg|mask|z,zmmreg [mr: evex.512.f3.0f38.w0 23 /r ] AVX512,FUTURE */ + /* 250(f2 7e 48) 300 001(23) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVSDW, 2, {YMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39622, 544, 6329}, + /* 6211 : VPMOVSDW mem64|mask,xmmreg [mr:hvm: evex.128.f3.0f38.w0 23 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 08) 314 001(23) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVSDW, 2, {MEMORY|BITS64,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+39631, 543, 6330}, + /* 6212 : VPMOVSDW mem128|mask,ymmreg [mr:hvm: evex.256.f3.0f38.w0 23 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 28) 314 001(23) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVSDW, 2, {MEMORY|BITS128,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+39640, 543, 6331}, + /* 6213 : VPMOVSDW mem256|mask,zmmreg [mr:hvm: evex.512.f3.0f38.w0 23 /r ] AVX512,FUTURE */ + /* 250(f2 7e 48) 314 001(23) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVSDW, 2, {MEMORY|BITS256,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+39649, 544, 6332}, + /* 6214 : VPMOVSQB xmmreg|mask|z,xmmreg [mr: evex.128.f3.0f38.w0 22 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 08) 300 001(22) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVSQB, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39658, 543, 6333}, + /* 6215 : VPMOVSQB xmmreg|mask|z,ymmreg [mr: evex.256.f3.0f38.w0 22 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 28) 300 001(22) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVSQB, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39667, 543, 6334}, + /* 6216 : VPMOVSQB xmmreg|mask|z,zmmreg [mr: evex.512.f3.0f38.w0 22 /r ] AVX512,FUTURE */ + /* 250(f2 7e 48) 300 001(22) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVSQB, 2, {XMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39676, 544, 6335}, + /* 6217 : VPMOVSQB mem16|mask,xmmreg [mr:ovm: evex.128.f3.0f38.w0 22 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 08) 316 001(22) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVSQB, 2, {MEMORY|BITS16,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+39685, 543, 6336}, + /* 6218 : VPMOVSQB mem32|mask,ymmreg [mr:ovm: evex.256.f3.0f38.w0 22 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 28) 316 001(22) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVSQB, 2, {MEMORY|BITS32,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+39694, 543, 6337}, + /* 6219 : VPMOVSQB mem64|mask,zmmreg [mr:ovm: evex.512.f3.0f38.w0 22 /r ] AVX512,FUTURE */ + /* 250(f2 7e 48) 316 001(22) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVSQB, 2, {MEMORY|BITS64,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+39703, 544, 6338}, + /* 6220 : VPMOVSQD xmmreg|mask|z,xmmreg [mr: evex.128.f3.0f38.w0 25 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 08) 300 001(25) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVSQD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39712, 543, 6339}, + /* 6221 : VPMOVSQD xmmreg|mask|z,ymmreg [mr: evex.256.f3.0f38.w0 25 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 28) 300 001(25) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVSQD, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39721, 543, 6340}, + /* 6222 : VPMOVSQD ymmreg|mask|z,zmmreg [mr: evex.512.f3.0f38.w0 25 /r ] AVX512,FUTURE */ + /* 250(f2 7e 48) 300 001(25) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVSQD, 2, {YMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39730, 544, 6341}, + /* 6223 : VPMOVSQD mem64|mask,xmmreg [mr:hvm: evex.128.f3.0f38.w0 25 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 08) 314 001(25) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVSQD, 2, {MEMORY|BITS64,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+39739, 543, 6342}, + /* 6224 : VPMOVSQD mem128|mask,ymmreg [mr:hvm: evex.256.f3.0f38.w0 25 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 28) 314 001(25) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVSQD, 2, {MEMORY|BITS128,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+39748, 543, 6343}, + /* 6225 : VPMOVSQD mem256|mask,zmmreg [mr:hvm: evex.512.f3.0f38.w0 25 /r ] AVX512,FUTURE */ + /* 250(f2 7e 48) 314 001(25) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVSQD, 2, {MEMORY|BITS256,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+39757, 544, 6344}, + /* 6226 : VPMOVSQW xmmreg|mask|z,xmmreg [mr: evex.128.f3.0f38.w0 24 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 08) 300 001(24) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVSQW, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39766, 543, 6345}, + /* 6227 : VPMOVSQW xmmreg|mask|z,ymmreg [mr: evex.256.f3.0f38.w0 24 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 28) 300 001(24) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVSQW, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39775, 543, 6346}, + /* 6228 : VPMOVSQW xmmreg|mask|z,zmmreg [mr: evex.512.f3.0f38.w0 24 /r ] AVX512,FUTURE */ + /* 250(f2 7e 48) 300 001(24) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVSQW, 2, {XMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39784, 544, 6347}, + /* 6229 : VPMOVSQW mem32|mask,xmmreg [mr:qvm: evex.128.f3.0f38.w0 24 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 08) 315 001(24) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVSQW, 2, {MEMORY|BITS32,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+39793, 543, 6348}, + /* 6230 : VPMOVSQW mem64|mask,ymmreg [mr:qvm: evex.256.f3.0f38.w0 24 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 28) 315 001(24) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVSQW, 2, {MEMORY|BITS64,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+39802, 543, 6349}, + /* 6231 : VPMOVSQW mem128|mask,zmmreg [mr:qvm: evex.512.f3.0f38.w0 24 /r ] AVX512,FUTURE */ + /* 250(f2 7e 48) 315 001(24) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVSQW, 2, {MEMORY|BITS128,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+39811, 544, 6350}, + /* 6232 : VPMOVSWB xmmreg|mask|z,xmmreg [mr: evex.128.f3.0f38.w0 20 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7e 08) 300 001(20) 101 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMOVSWB, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39820, 549, 6351}, + /* 6233 : VPMOVSWB xmmreg|mask|z,ymmreg [mr: evex.256.f3.0f38.w0 20 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7e 28) 300 001(20) 101 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMOVSWB, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39829, 549, 6352}, + /* 6234 : VPMOVSWB ymmreg|mask|z,zmmreg [mr: evex.512.f3.0f38.w0 20 /r ] AVX512BW,FUTURE */ + /* 250(f2 7e 48) 300 001(20) 101 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPMOVSWB, 2, {YMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39838, 550, 6353}, + /* 6235 : VPMOVSWB mem64|mask,xmmreg [mr:hvm: evex.128.f3.0f38.w0 20 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7e 08) 314 001(20) 101 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMOVSWB, 2, {MEMORY|BITS64,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+39847, 549, 6354}, + /* 6236 : VPMOVSWB mem128|mask,ymmreg [mr:hvm: evex.256.f3.0f38.w0 20 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7e 28) 314 001(20) 101 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMOVSWB, 2, {MEMORY|BITS128,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+39856, 549, 6355}, + /* 6237 : VPMOVSWB mem256|mask,zmmreg [mr:hvm: evex.512.f3.0f38.w0 20 /r ] AVX512BW,FUTURE */ + /* 250(f2 7e 48) 314 001(20) 101 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPMOVSWB, 2, {MEMORY|BITS256,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+39865, 550, 6356}, + /* 6238 : VPMOVSXBD xmmreg|mask|z,xmmrm32 [rm:qvm: evex.128.66.0f38.wig 21 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 08) 315 001(21) 110 : WIG,EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVSXBD, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39874, 563, 6357}, + /* 6239 : VPMOVSXBD ymmreg|mask|z,xmmrm64 [rm:qvm: evex.256.66.0f38.wig 21 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 28) 315 001(21) 110 : WIG,EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVSXBD, 2, {YMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39883, 563, 6358}, + /* 6240 : VPMOVSXBD zmmreg|mask|z,xmmrm128 [rm:qvm: evex.512.66.0f38.wig 21 /r ] AVX512,FUTURE */ + /* 250(f2 7d 48) 315 001(21) 110 : WIG,EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVSXBD, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39892, 552, 6359}, + /* 6241 : VPMOVSXBQ xmmreg|mask|z,xmmrm16 [rm:ovm: evex.128.66.0f38.wig 22 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 08) 316 001(22) 110 : WIG,EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVSXBQ, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39901, 563, 6360}, + /* 6242 : VPMOVSXBQ ymmreg|mask|z,xmmrm32 [rm:ovm: evex.256.66.0f38.wig 22 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 28) 316 001(22) 110 : WIG,EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVSXBQ, 2, {YMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39910, 563, 6361}, + /* 6243 : VPMOVSXBQ zmmreg|mask|z,xmmrm64 [rm:ovm: evex.512.66.0f38.wig 22 /r ] AVX512,FUTURE */ + /* 250(f2 7d 48) 316 001(22) 110 : WIG,EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVSXBQ, 2, {ZMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39919, 552, 6362}, + /* 6244 : VPMOVSXBW xmmreg|mask|z,xmmrm64 [rm:hvm: evex.128.66.0f38.wig 20 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7d 08) 314 001(20) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMOVSXBW, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39928, 555, 6363}, + /* 6245 : VPMOVSXBW ymmreg|mask|z,xmmrm128 [rm:hvm: evex.256.66.0f38.wig 20 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7d 28) 314 001(20) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMOVSXBW, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39937, 555, 6364}, + /* 6246 : VPMOVSXBW zmmreg|mask|z,ymmrm256 [rm:hvm: evex.512.66.0f38.wig 20 /r ] AVX512BW,FUTURE */ + /* 250(f2 7d 48) 314 001(20) 110 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPMOVSXBW, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39946, 556, 6365}, + /* 6247 : VPMOVSXDQ xmmreg|mask|z,xmmrm64 [rm:hvm: evex.128.66.0f38.w0 25 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 08) 314 001(25) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVSXDQ, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39955, 543, 6366}, + /* 6248 : VPMOVSXDQ ymmreg|mask|z,xmmrm128 [rm:hvm: evex.256.66.0f38.w0 25 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 28) 314 001(25) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVSXDQ, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39964, 543, 6367}, + /* 6249 : VPMOVSXDQ zmmreg|mask|z,ymmrm256 [rm:hvm: evex.512.66.0f38.w0 25 /r ] AVX512,FUTURE */ + /* 250(f2 7d 48) 314 001(25) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVSXDQ, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39973, 544, 6368}, + /* 6250 : VPMOVSXWD xmmreg|mask|z,xmmrm64 [rm:hvm: evex.128.66.0f38.wig 23 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 08) 314 001(23) 110 : WIG,EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVSXWD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39982, 563, 6369}, + /* 6251 : VPMOVSXWD ymmreg|mask|z,xmmrm128 [rm:hvm: evex.256.66.0f38.wig 23 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 28) 314 001(23) 110 : WIG,EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVSXWD, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+39991, 563, 6370}, + /* 6252 : VPMOVSXWD zmmreg|mask|z,ymmrm256 [rm:hvm: evex.512.66.0f38.wig 23 /r ] AVX512,FUTURE */ + /* 250(f2 7d 48) 314 001(23) 110 : WIG,EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVSXWD, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40000, 552, 6371}, + /* 6253 : VPMOVSXWQ xmmreg|mask|z,xmmrm32 [rm:qvm: evex.128.66.0f38.wig 24 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 08) 315 001(24) 110 : WIG,EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVSXWQ, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40009, 563, 6372}, + /* 6254 : VPMOVSXWQ ymmreg|mask|z,xmmrm64 [rm:qvm: evex.256.66.0f38.wig 24 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 28) 315 001(24) 110 : WIG,EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVSXWQ, 2, {YMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40018, 563, 6373}, + /* 6255 : VPMOVSXWQ zmmreg|mask|z,xmmrm128 [rm:qvm: evex.512.66.0f38.wig 24 /r ] AVX512,FUTURE */ + /* 250(f2 7d 48) 315 001(24) 110 : WIG,EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVSXWQ, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40027, 552, 6374}, + /* 6256 : VPMOVUSDB xmmreg|mask|z,xmmreg [mr: evex.128.f3.0f38.w0 11 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 08) 300 001(11) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVUSDB, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40036, 543, 6375}, + /* 6257 : VPMOVUSDB xmmreg|mask|z,ymmreg [mr: evex.256.f3.0f38.w0 11 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 28) 300 001(11) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVUSDB, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40045, 543, 6376}, + /* 6258 : VPMOVUSDB xmmreg|mask|z,zmmreg [mr: evex.512.f3.0f38.w0 11 /r ] AVX512,FUTURE */ + /* 250(f2 7e 48) 300 001(11) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVUSDB, 2, {XMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40054, 544, 6377}, + /* 6259 : VPMOVUSDB mem32|mask,xmmreg [mr:qvm: evex.128.f3.0f38.w0 11 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 08) 315 001(11) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVUSDB, 2, {MEMORY|BITS32,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+40063, 543, 6378}, + /* 6260 : VPMOVUSDB mem64|mask,ymmreg [mr:qvm: evex.256.f3.0f38.w0 11 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 28) 315 001(11) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVUSDB, 2, {MEMORY|BITS64,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+40072, 543, 6379}, + /* 6261 : VPMOVUSDB mem128|mask,zmmreg [mr:qvm: evex.512.f3.0f38.w0 11 /r ] AVX512,FUTURE */ + /* 250(f2 7e 48) 315 001(11) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVUSDB, 2, {MEMORY|BITS128,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+40081, 544, 6380}, + /* 6262 : VPMOVUSDW xmmreg|mask|z,xmmreg [mr: evex.128.f3.0f38.w0 13 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 08) 300 001(13) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVUSDW, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40090, 543, 6381}, + /* 6263 : VPMOVUSDW xmmreg|mask|z,ymmreg [mr: evex.256.f3.0f38.w0 13 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 28) 300 001(13) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVUSDW, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40099, 543, 6382}, + /* 6264 : VPMOVUSDW ymmreg|mask|z,zmmreg [mr: evex.512.f3.0f38.w0 13 /r ] AVX512,FUTURE */ + /* 250(f2 7e 48) 300 001(13) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVUSDW, 2, {YMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40108, 544, 6383}, + /* 6265 : VPMOVUSDW mem64|mask,xmmreg [mr:hvm: evex.128.f3.0f38.w0 13 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 08) 314 001(13) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVUSDW, 2, {MEMORY|BITS64,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+40117, 543, 6384}, + /* 6266 : VPMOVUSDW mem128|mask,ymmreg [mr:hvm: evex.256.f3.0f38.w0 13 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 28) 314 001(13) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVUSDW, 2, {MEMORY|BITS128,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+40126, 543, 6385}, + /* 6267 : VPMOVUSDW mem256|mask,zmmreg [mr:hvm: evex.512.f3.0f38.w0 13 /r ] AVX512,FUTURE */ + /* 250(f2 7e 48) 314 001(13) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVUSDW, 2, {MEMORY|BITS256,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+40135, 544, 6386}, + /* 6268 : VPMOVUSQB xmmreg|mask|z,xmmreg [mr: evex.128.f3.0f38.w0 12 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 08) 300 001(12) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVUSQB, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40144, 543, 6387}, + /* 6269 : VPMOVUSQB xmmreg|mask|z,ymmreg [mr: evex.256.f3.0f38.w0 12 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 28) 300 001(12) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVUSQB, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40153, 543, 6388}, + /* 6270 : VPMOVUSQB xmmreg|mask|z,zmmreg [mr: evex.512.f3.0f38.w0 12 /r ] AVX512,FUTURE */ + /* 250(f2 7e 48) 300 001(12) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVUSQB, 2, {XMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40162, 544, 6389}, + /* 6271 : VPMOVUSQB mem16|mask,xmmreg [mr:ovm: evex.128.f3.0f38.w0 12 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 08) 316 001(12) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVUSQB, 2, {MEMORY|BITS16,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+40171, 543, 6390}, + /* 6272 : VPMOVUSQB mem32|mask,ymmreg [mr:ovm: evex.256.f3.0f38.w0 12 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 28) 316 001(12) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVUSQB, 2, {MEMORY|BITS32,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+40180, 543, 6391}, + /* 6273 : VPMOVUSQB mem64|mask,zmmreg [mr:ovm: evex.512.f3.0f38.w0 12 /r ] AVX512,FUTURE */ + /* 250(f2 7e 48) 316 001(12) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVUSQB, 2, {MEMORY|BITS64,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+40189, 544, 6392}, + /* 6274 : VPMOVUSQD xmmreg|mask|z,xmmreg [mr: evex.128.f3.0f38.w0 15 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 08) 300 001(15) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVUSQD, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40198, 543, 6393}, + /* 6275 : VPMOVUSQD xmmreg|mask|z,ymmreg [mr: evex.256.f3.0f38.w0 15 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 28) 300 001(15) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVUSQD, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40207, 543, 6394}, + /* 6276 : VPMOVUSQD ymmreg|mask|z,zmmreg [mr: evex.512.f3.0f38.w0 15 /r ] AVX512,FUTURE */ + /* 250(f2 7e 48) 300 001(15) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVUSQD, 2, {YMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40216, 544, 6395}, + /* 6277 : VPMOVUSQD mem64|mask,xmmreg [mr:hvm: evex.128.f3.0f38.w0 15 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 08) 314 001(15) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVUSQD, 2, {MEMORY|BITS64,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+40225, 543, 6396}, + /* 6278 : VPMOVUSQD mem128|mask,ymmreg [mr:hvm: evex.256.f3.0f38.w0 15 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 28) 314 001(15) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVUSQD, 2, {MEMORY|BITS128,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+40234, 543, 6397}, + /* 6279 : VPMOVUSQD mem256|mask,zmmreg [mr:hvm: evex.512.f3.0f38.w0 15 /r ] AVX512,FUTURE */ + /* 250(f2 7e 48) 314 001(15) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVUSQD, 2, {MEMORY|BITS256,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+40243, 544, 6398}, + /* 6280 : VPMOVUSQW xmmreg|mask|z,xmmreg [mr: evex.128.f3.0f38.w0 14 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 08) 300 001(14) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVUSQW, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40252, 543, 6399}, + /* 6281 : VPMOVUSQW xmmreg|mask|z,ymmreg [mr: evex.256.f3.0f38.w0 14 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 28) 300 001(14) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVUSQW, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40261, 543, 6400}, + /* 6282 : VPMOVUSQW xmmreg|mask|z,zmmreg [mr: evex.512.f3.0f38.w0 14 /r ] AVX512,FUTURE */ + /* 250(f2 7e 48) 300 001(14) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVUSQW, 2, {XMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40270, 544, 6401}, + /* 6283 : VPMOVUSQW mem32|mask,xmmreg [mr:qvm: evex.128.f3.0f38.w0 14 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 08) 315 001(14) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVUSQW, 2, {MEMORY|BITS32,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+40279, 543, 6402}, + /* 6284 : VPMOVUSQW mem64|mask,ymmreg [mr:qvm: evex.256.f3.0f38.w0 14 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7e 28) 315 001(14) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVUSQW, 2, {MEMORY|BITS64,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+40288, 543, 6403}, + /* 6285 : VPMOVUSQW mem128|mask,zmmreg [mr:qvm: evex.512.f3.0f38.w0 14 /r ] AVX512,FUTURE */ + /* 250(f2 7e 48) 315 001(14) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVUSQW, 2, {MEMORY|BITS128,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+40297, 544, 6404}, + /* 6286 : VPMOVUSWB xmmreg|mask|z,xmmreg [mr: evex.128.f3.0f38.w0 10 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7e 08) 300 001(10) 101 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMOVUSWB, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40306, 549, 6405}, + /* 6287 : VPMOVUSWB xmmreg|mask|z,ymmreg [mr: evex.256.f3.0f38.w0 10 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7e 28) 300 001(10) 101 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMOVUSWB, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40315, 549, 6406}, + /* 6288 : VPMOVUSWB ymmreg|mask|z,zmmreg [mr: evex.512.f3.0f38.w0 10 /r ] AVX512BW,FUTURE */ + /* 250(f2 7e 48) 300 001(10) 101 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPMOVUSWB, 2, {YMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40324, 550, 6407}, + /* 6289 : VPMOVUSWB mem64|mask,xmmreg [mr:hvm: evex.128.f3.0f38.w0 10 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7e 08) 314 001(10) 101 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMOVUSWB, 2, {MEMORY|BITS64,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+40333, 549, 6408}, + /* 6290 : VPMOVUSWB mem128|mask,ymmreg [mr:hvm: evex.256.f3.0f38.w0 10 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7e 28) 314 001(10) 101 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMOVUSWB, 2, {MEMORY|BITS128,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+40342, 549, 6409}, + /* 6291 : VPMOVUSWB mem256|mask,zmmreg [mr:hvm: evex.512.f3.0f38.w0 10 /r ] AVX512BW,FUTURE */ + /* 250(f2 7e 48) 314 001(10) 101 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPMOVUSWB, 2, {MEMORY|BITS256,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+40351, 550, 6410}, + /* 6292 : VPMOVW2M kreg,xmmreg [rm: evex.128.f3.0f38.w1 29 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 fe 08) 300 001(29) 110 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMOVW2M, 2, {OPMASKREG,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+40360, 549, 6411}, + /* 6293 : VPMOVW2M kreg,ymmreg [rm: evex.256.f3.0f38.w1 29 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 fe 28) 300 001(29) 110 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMOVW2M, 2, {OPMASKREG,YMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+40369, 549, 6412}, + /* 6294 : VPMOVW2M kreg,zmmreg [rm: evex.512.f3.0f38.w1 29 /r ] AVX512BW,FUTURE */ + /* 250(f2 fe 48) 300 001(29) 110 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPMOVW2M, 2, {OPMASKREG,ZMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+40378, 550, 6413}, + /* 6295 : VPMOVWB xmmreg|mask|z,xmmreg [mr: evex.128.f3.0f38.w0 30 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7e 08) 300 001(30) 101 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMOVWB, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40387, 549, 6414}, + /* 6296 : VPMOVWB xmmreg|mask|z,ymmreg [mr: evex.256.f3.0f38.w0 30 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7e 28) 300 001(30) 101 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMOVWB, 2, {XMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40396, 549, 6415}, + /* 6297 : VPMOVWB ymmreg|mask|z,zmmreg [mr: evex.512.f3.0f38.w0 30 /r ] AVX512BW,FUTURE */ + /* 250(f2 7e 48) 300 001(30) 101 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPMOVWB, 2, {YMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40405, 550, 6416}, + /* 6298 : VPMOVWB mem64|mask,xmmreg [mr:hvm: evex.128.f3.0f38.w0 30 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7e 08) 314 001(30) 101 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMOVWB, 2, {MEMORY|BITS64,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+40414, 549, 6417}, + /* 6299 : VPMOVWB mem128|mask,ymmreg [mr:hvm: evex.256.f3.0f38.w0 30 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7e 28) 314 001(30) 101 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMOVWB, 2, {MEMORY|BITS128,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+40423, 549, 6418}, + /* 6300 : VPMOVWB mem256|mask,zmmreg [mr:hvm: evex.512.f3.0f38.w0 30 /r ] AVX512BW,FUTURE */ + /* 250(f2 7e 48) 314 001(30) 101 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPMOVWB, 2, {MEMORY|BITS256,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+40432, 550, 6419}, + /* 6301 : VPMOVZXBD xmmreg|mask|z,xmmrm32 [rm:qvm: evex.128.66.0f38.wig 31 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 08) 315 001(31) 110 : WIG,EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVZXBD, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40441, 563, 6420}, + /* 6302 : VPMOVZXBD ymmreg|mask|z,xmmrm64 [rm:qvm: evex.256.66.0f38.wig 31 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 28) 315 001(31) 110 : WIG,EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVZXBD, 2, {YMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40450, 563, 6421}, + /* 6303 : VPMOVZXBD zmmreg|mask|z,xmmrm128 [rm:qvm: evex.512.66.0f38.wig 31 /r ] AVX512,FUTURE */ + /* 250(f2 7d 48) 315 001(31) 110 : WIG,EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVZXBD, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40459, 552, 6422}, + /* 6304 : VPMOVZXBQ xmmreg|mask|z,xmmrm16 [rm:ovm: evex.128.66.0f38.wig 32 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 08) 316 001(32) 110 : WIG,EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVZXBQ, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40468, 563, 6423}, + /* 6305 : VPMOVZXBQ ymmreg|mask|z,xmmrm32 [rm:ovm: evex.256.66.0f38.wig 32 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 28) 316 001(32) 110 : WIG,EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVZXBQ, 2, {YMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40477, 563, 6424}, + /* 6306 : VPMOVZXBQ zmmreg|mask|z,xmmrm64 [rm:ovm: evex.512.66.0f38.wig 32 /r ] AVX512,FUTURE */ + /* 250(f2 7d 48) 316 001(32) 110 : WIG,EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVZXBQ, 2, {ZMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40486, 552, 6425}, + /* 6307 : VPMOVZXBW xmmreg|mask|z,xmmrm64 [rm:hvm: evex.128.66.0f38.wig 30 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7d 08) 314 001(30) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMOVZXBW, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40495, 555, 6426}, + /* 6308 : VPMOVZXBW ymmreg|mask|z,xmmrm128 [rm:hvm: evex.256.66.0f38.wig 30 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f2 7d 28) 314 001(30) 110 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMOVZXBW, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40504, 555, 6427}, + /* 6309 : VPMOVZXBW zmmreg|mask|z,ymmrm256 [rm:hvm: evex.512.66.0f38.wig 30 /r ] AVX512BW,FUTURE */ + /* 250(f2 7d 48) 314 001(30) 110 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPMOVZXBW, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40513, 556, 6428}, + /* 6310 : VPMOVZXDQ xmmreg|mask|z,xmmrm64 [rm:hvm: evex.128.66.0f38.w0 35 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 08) 314 001(35) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVZXDQ, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40522, 543, 6429}, + /* 6311 : VPMOVZXDQ ymmreg|mask|z,xmmrm128 [rm:hvm: evex.256.66.0f38.w0 35 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 28) 314 001(35) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVZXDQ, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40531, 543, 6430}, + /* 6312 : VPMOVZXDQ zmmreg|mask|z,ymmrm256 [rm:hvm: evex.512.66.0f38.w0 35 /r ] AVX512,FUTURE */ + /* 250(f2 7d 48) 314 001(35) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVZXDQ, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40540, 544, 6431}, + /* 6313 : VPMOVZXWD xmmreg|mask|z,xmmrm64 [rm:hvm: evex.128.66.0f38.wig 33 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 08) 314 001(33) 110 : WIG,EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVZXWD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40549, 563, 6432}, + /* 6314 : VPMOVZXWD ymmreg|mask|z,xmmrm128 [rm:hvm: evex.256.66.0f38.wig 33 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 28) 314 001(33) 110 : WIG,EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVZXWD, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40558, 563, 6433}, + /* 6315 : VPMOVZXWD zmmreg|mask|z,ymmrm256 [rm:hvm: evex.512.66.0f38.wig 33 /r ] AVX512,FUTURE */ + /* 250(f2 7d 48) 314 001(33) 110 : WIG,EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVZXWD, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40567, 552, 6434}, + /* 6316 : VPMOVZXWQ xmmreg|mask|z,xmmrm32 [rm:qvm: evex.128.66.0f38.wig 34 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 08) 315 001(34) 110 : WIG,EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVZXWQ, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40576, 563, 6435}, + /* 6317 : VPMOVZXWQ ymmreg|mask|z,xmmrm64 [rm:qvm: evex.256.66.0f38.wig 34 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 28) 315 001(34) 110 : WIG,EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMOVZXWQ, 2, {YMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40585, 563, 6436}, + /* 6318 : VPMOVZXWQ zmmreg|mask|z,xmmrm128 [rm:qvm: evex.512.66.0f38.wig 34 /r ] AVX512,FUTURE */ + /* 250(f2 7d 48) 315 001(34) 110 : WIG,EVEX,PROT,AVX512,FUTURE */ + {I_VPMOVZXWQ, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40594, 552, 6437}, + /* 6319 : VPMULDQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 28 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(28) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMULDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+40603, 543, 6438}, + /* 6320 : VPMULDQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 28 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(28) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMULDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+40621, 543, 6439}, + /* 6321 : VPMULDQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 28 /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(28) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMULDQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+40639, 544, 6440}, + /* 6322 : VPMULHRSW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f38.wig 0b /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 7d 08) 303 001(0b) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMULHRSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40657, 555, 6441}, + /* 6323 : VPMULHRSW ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f38.wig 0b /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 7d 28) 303 001(0b) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMULHRSW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40675, 555, 6442}, + /* 6324 : VPMULHRSW zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f38.wig 0b /r ] AVX512BW,FUTURE */ + /* 241(f2 7d 48) 303 001(0b) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPMULHRSW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40693, 556, 6443}, + /* 6325 : VPMULHUW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig e4 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 303 001(e4) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMULHUW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40711, 555, 6444}, + /* 6326 : VPMULHUW ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig e4 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 303 001(e4) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMULHUW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40729, 555, 6445}, + /* 6327 : VPMULHUW zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig e4 /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 303 001(e4) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPMULHUW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40747, 556, 6446}, + /* 6328 : VPMULHW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig e5 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 303 001(e5) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMULHW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40765, 555, 6447}, + /* 6329 : VPMULHW ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig e5 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 303 001(e5) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMULHW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40783, 555, 6448}, + /* 6330 : VPMULHW zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig e5 /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 303 001(e5) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPMULHW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40801, 556, 6449}, + /* 6331 : VPMULLD xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 40 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(40) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMULLD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+40819, 543, 6450}, + /* 6332 : VPMULLD ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 40 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(40) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMULLD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+40837, 543, 6451}, + /* 6333 : VPMULLD zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f38.w0 40 /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(40) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMULLD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+40855, 544, 6452}, + /* 6334 : VPMULLQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 40 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 241(f2 fd 08) 301 001(40) 120 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VPMULLQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+40873, 546, 6453}, + /* 6335 : VPMULLQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 40 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 241(f2 fd 28) 301 001(40) 120 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VPMULLQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+40891, 546, 6454}, + /* 6336 : VPMULLQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 40 /r ] AVX512DQ,FUTURE */ + /* 241(f2 fd 48) 301 001(40) 120 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VPMULLQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+40909, 547, 6455}, + /* 6337 : VPMULLW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig d5 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 303 001(d5) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMULLW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40927, 555, 6456}, + /* 6338 : VPMULLW ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig d5 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 303 001(d5) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPMULLW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40945, 555, 6457}, + /* 6339 : VPMULLW zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig d5 /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 303 001(d5) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPMULLW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+40963, 556, 6458}, + /* 6340 : VPMULTISHIFTQB xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 83 /r ] AVX512VL,AVX512VBMI,FUTURE */ + /* 241(f2 fd 08) 301 001(83) 120 : EVEX,PROT,AVX512VL,AVX512VBMI,FUTURE */ + {I_VPMULTISHIFTQB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+40981, 559, 6459}, + /* 6341 : VPMULTISHIFTQB ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 83 /r ] AVX512VL,AVX512VBMI,FUTURE */ + /* 241(f2 fd 28) 301 001(83) 120 : EVEX,PROT,AVX512VL,AVX512VBMI,FUTURE */ + {I_VPMULTISHIFTQB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+40999, 559, 6460}, + /* 6342 : VPMULTISHIFTQB zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 83 /r ] AVX512VBMI,FUTURE */ + /* 241(f2 fd 48) 301 001(83) 120 : EVEX,PROT,AVX512VBMI,FUTURE */ + {I_VPMULTISHIFTQB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+41017, 560, 6461}, + /* 6343 : VPMULUDQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f.w1 f4 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(f4) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMULUDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+41035, 543, 6462}, + /* 6344 : VPMULUDQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f.w1 f4 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(f4) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPMULUDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+41053, 543, 6463}, + /* 6345 : VPMULUDQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f.w1 f4 /r ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(f4) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPMULUDQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+41071, 544, 6464}, + /* 6346 : VPORD xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f.w0 eb /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7d 08) 301 001(eb) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPORD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+41089, 543, 6465}, + /* 6347 : VPORD ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f.w0 eb /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7d 28) 301 001(eb) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPORD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+41107, 543, 6466}, + /* 6348 : VPORD zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f.w0 eb /r ] AVX512,FUTURE */ + /* 241(f1 7d 48) 301 001(eb) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPORD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+41125, 544, 6467}, + /* 6349 : VPORQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f.w1 eb /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(eb) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPORQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+41143, 543, 6468}, + /* 6350 : VPORQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f.w1 eb /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(eb) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPORQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+41161, 543, 6469}, + /* 6351 : VPORQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f.w1 eb /r ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(eb) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPORQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+41179, 544, 6470}, + /* 6352 : VPROLD xmmreg|mask|z,xmmrm128|b32*,imm8 [vmi:fv: evex.nds.128.66.0f.w0 72 /1 ib ] AVX512,AVX512VL,FUTURE */ + /* 240(f1 7d 08) 301 001(72) 211 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPROLD, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20103, 543, 6471}, + /* 6353 : VPROLD ymmreg|mask|z,ymmrm256|b32*,imm8 [vmi:fv: evex.nds.256.66.0f.w0 72 /1 ib ] AVX512,AVX512VL,FUTURE */ + /* 240(f1 7d 28) 301 001(72) 211 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPROLD, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20123, 543, 6472}, + /* 6354 : VPROLD zmmreg|mask|z,zmmrm512|b32*,imm8 [vmi:fv: evex.nds.512.66.0f.w0 72 /1 ib ] AVX512,FUTURE */ + /* 240(f1 7d 48) 301 001(72) 211 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VPROLD, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20143, 544, 6473}, + /* 6355 : VPROLQ xmmreg|mask|z,xmmrm128|b64*,imm8 [vmi:fv: evex.nds.128.66.0f.w1 72 /1 ib ] AVX512,AVX512VL,FUTURE */ + /* 240(f1 fd 08) 301 001(72) 211 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPROLQ, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+20163, 543, 6474}, + /* 6356 : VPROLQ ymmreg|mask|z,ymmrm256|b64*,imm8 [vmi:fv: evex.nds.256.66.0f.w1 72 /1 ib ] AVX512,AVX512VL,FUTURE */ + /* 240(f1 fd 28) 301 001(72) 211 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPROLQ, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+20183, 543, 6475}, + /* 6357 : VPROLQ zmmreg|mask|z,zmmrm512|b64*,imm8 [vmi:fv: evex.nds.512.66.0f.w1 72 /1 ib ] AVX512,FUTURE */ + /* 240(f1 fd 48) 301 001(72) 211 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VPROLQ, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+20203, 544, 6476}, + /* 6358 : VPROLVD xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 15 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(15) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPROLVD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+41197, 543, 6477}, + /* 6359 : VPROLVD ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 15 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(15) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPROLVD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+41215, 543, 6478}, + /* 6360 : VPROLVD zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f38.w0 15 /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(15) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPROLVD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+41233, 544, 6479}, + /* 6361 : VPROLVQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 15 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(15) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPROLVQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+41251, 543, 6480}, + /* 6362 : VPROLVQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 15 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(15) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPROLVQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+41269, 543, 6481}, + /* 6363 : VPROLVQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 15 /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(15) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPROLVQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+41287, 544, 6482}, + /* 6364 : VPRORD xmmreg|mask|z,xmmrm128|b32*,imm8 [vmi:fv: evex.nds.128.66.0f.w0 72 /0 ib ] AVX512,AVX512VL,FUTURE */ + /* 240(f1 7d 08) 301 001(72) 210 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPRORD, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20223, 543, 6483}, + /* 6365 : VPRORD ymmreg|mask|z,ymmrm256|b32*,imm8 [vmi:fv: evex.nds.256.66.0f.w0 72 /0 ib ] AVX512,AVX512VL,FUTURE */ + /* 240(f1 7d 28) 301 001(72) 210 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPRORD, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20243, 543, 6484}, + /* 6366 : VPRORD zmmreg|mask|z,zmmrm512|b32*,imm8 [vmi:fv: evex.nds.512.66.0f.w0 72 /0 ib ] AVX512,FUTURE */ + /* 240(f1 7d 48) 301 001(72) 210 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VPRORD, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20263, 544, 6485}, + /* 6367 : VPRORQ xmmreg|mask|z,xmmrm128|b64*,imm8 [vmi:fv: evex.nds.128.66.0f.w1 72 /0 ib ] AVX512,AVX512VL,FUTURE */ + /* 240(f1 fd 08) 301 001(72) 210 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPRORQ, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+20283, 543, 6486}, + /* 6368 : VPRORQ ymmreg|mask|z,ymmrm256|b64*,imm8 [vmi:fv: evex.nds.256.66.0f.w1 72 /0 ib ] AVX512,AVX512VL,FUTURE */ + /* 240(f1 fd 28) 301 001(72) 210 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPRORQ, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+20303, 543, 6487}, + /* 6369 : VPRORQ zmmreg|mask|z,zmmrm512|b64*,imm8 [vmi:fv: evex.nds.512.66.0f.w1 72 /0 ib ] AVX512,FUTURE */ + /* 240(f1 fd 48) 301 001(72) 210 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VPRORQ, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+20323, 544, 6488}, + /* 6370 : VPRORVD xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 14 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(14) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPRORVD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+41305, 543, 6489}, + /* 6371 : VPRORVD ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 14 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(14) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPRORVD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+41323, 543, 6490}, + /* 6372 : VPRORVD zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f38.w0 14 /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(14) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPRORVD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+41341, 544, 6491}, + /* 6373 : VPRORVQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 14 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(14) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPRORVQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+41359, 543, 6492}, + /* 6374 : VPRORVQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 14 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(14) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPRORVQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+41377, 543, 6493}, + /* 6375 : VPRORVQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 14 /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(14) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPRORVQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+41395, 544, 6494}, + /* 6376 : VPSADBW xmmreg,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig f6 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 303 001(f6) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSADBW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, NO_DECORATOR, nasm_bytecodes+41413, 555, 6495}, + /* 6377 : VPSADBW ymmreg,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig f6 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 303 001(f6) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSADBW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+41431, 555, 6496}, + /* 6378 : VPSADBW zmmreg,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig f6 /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 303 001(f6) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPSADBW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, NO_DECORATOR, nasm_bytecodes+41449, 556, 6497}, + /* 6379 : VPSCATTERDD xmem32|mask,xmmreg [mr:t1s: vsibx evex.128.66.0f38.w0 a0 /r ] AVX512,AVX512VL,FUTURE */ + /* 374 250(f2 7d 08) 306 001(a0) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSCATTERDD, 2, {XMEM|BITS32,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+20343, 543, 6498}, + /* 6380 : VPSCATTERDD ymem32|mask,ymmreg [mr:t1s: vsiby evex.256.66.0f38.w0 a0 /r ] AVX512,AVX512VL,FUTURE */ + /* 375 250(f2 7d 28) 306 001(a0) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSCATTERDD, 2, {YMEM|BITS32,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+20353, 543, 6499}, + /* 6381 : VPSCATTERDD zmem32|mask,zmmreg [mr:t1s: vsibz evex.512.66.0f38.w0 a0 /r ] AVX512,FUTURE */ + /* 376 250(f2 7d 48) 306 001(a0) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPSCATTERDD, 2, {ZMEM|BITS32,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+20363, 544, 6500}, + /* 6382 : VPSCATTERDQ xmem64|mask,xmmreg [mr:t1s: vsibx evex.128.66.0f38.w1 a0 /r ] AVX512,AVX512VL,FUTURE */ + /* 374 250(f2 fd 08) 306 001(a0) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSCATTERDQ, 2, {XMEM|BITS64,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+20373, 543, 6501}, + /* 6383 : VPSCATTERDQ xmem64|mask,ymmreg [mr:t1s: vsibx evex.256.66.0f38.w1 a0 /r ] AVX512,AVX512VL,FUTURE */ + /* 374 250(f2 fd 28) 306 001(a0) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSCATTERDQ, 2, {XMEM|BITS64,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+20383, 543, 6502}, + /* 6384 : VPSCATTERDQ ymem64|mask,zmmreg [mr:t1s: vsiby evex.512.66.0f38.w1 a0 /r ] AVX512,FUTURE */ + /* 375 250(f2 fd 48) 306 001(a0) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPSCATTERDQ, 2, {YMEM|BITS64,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+20393, 544, 6503}, + /* 6385 : VPSCATTERQD xmem32|mask,xmmreg [mr:t1s: vsibx evex.128.66.0f38.w0 a1 /r ] AVX512,AVX512VL,FUTURE */ + /* 374 250(f2 7d 08) 306 001(a1) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSCATTERQD, 2, {XMEM|BITS32,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+20403, 543, 6504}, + /* 6386 : VPSCATTERQD ymem32|mask,xmmreg [mr:t1s: vsiby evex.256.66.0f38.w0 a1 /r ] AVX512,AVX512VL,FUTURE */ + /* 375 250(f2 7d 28) 306 001(a1) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSCATTERQD, 2, {YMEM|BITS32,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+20413, 543, 6505}, + /* 6387 : VPSCATTERQD zmem32|mask,ymmreg [mr:t1s: vsibz evex.512.66.0f38.w0 a1 /r ] AVX512,FUTURE */ + /* 376 250(f2 7d 48) 306 001(a1) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPSCATTERQD, 2, {ZMEM|BITS32,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+20423, 544, 6506}, + /* 6388 : VPSCATTERQQ xmem64|mask,xmmreg [mr:t1s: vsibx evex.128.66.0f38.w1 a1 /r ] AVX512,AVX512VL,FUTURE */ + /* 374 250(f2 fd 08) 306 001(a1) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSCATTERQQ, 2, {XMEM|BITS64,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+20433, 543, 6507}, + /* 6389 : VPSCATTERQQ ymem64|mask,ymmreg [mr:t1s: vsiby evex.256.66.0f38.w1 a1 /r ] AVX512,AVX512VL,FUTURE */ + /* 375 250(f2 fd 28) 306 001(a1) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSCATTERQQ, 2, {YMEM|BITS64,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+20443, 543, 6508}, + /* 6390 : VPSCATTERQQ zmem64|mask,zmmreg [mr:t1s: vsibz evex.512.66.0f38.w1 a1 /r ] AVX512,FUTURE */ + /* 376 250(f2 fd 48) 306 001(a1) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VPSCATTERQQ, 2, {ZMEM|BITS64,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+20453, 544, 6509}, + /* 6391 : VPSHUFB xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f38.wig 00 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 7d 08) 303 001(00) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSHUFB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+41467, 555, 6510}, + /* 6392 : VPSHUFB ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f38.wig 00 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 7d 28) 303 001(00) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSHUFB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+41485, 555, 6511}, + /* 6393 : VPSHUFB zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f38.wig 00 /r ] AVX512BW,FUTURE */ + /* 241(f2 7d 48) 303 001(00) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPSHUFB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+41503, 556, 6512}, + /* 6394 : VPSHUFD xmmreg|mask|z,xmmrm128|b32,imm8 [rmi:fv: evex.128.66.0f.w0 70 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7d 08) 301 001(70) 110 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSHUFD, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20463, 543, 6513}, + /* 6395 : VPSHUFD ymmreg|mask|z,ymmrm256|b32,imm8 [rmi:fv: evex.256.66.0f.w0 70 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7d 28) 301 001(70) 110 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSHUFD, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20473, 543, 6514}, + /* 6396 : VPSHUFD zmmreg|mask|z,zmmrm512|b32,imm8 [rmi:fv: evex.512.66.0f.w0 70 /r ib ] AVX512,FUTURE */ + /* 250(f1 7d 48) 301 001(70) 110 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VPSHUFD, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20483, 544, 6515}, + /* 6397 : VPSHUFHW xmmreg|mask|z,xmmrm128,imm8 [rmi:fvm: evex.128.f3.0f.wig 70 /r ib ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f1 7e 08) 303 001(70) 110 022 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSHUFHW, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20493, 555, 6516}, + /* 6398 : VPSHUFHW ymmreg|mask|z,ymmrm256,imm8 [rmi:fvm: evex.256.f3.0f.wig 70 /r ib ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f1 7e 28) 303 001(70) 110 022 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSHUFHW, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20503, 555, 6517}, + /* 6399 : VPSHUFHW zmmreg|mask|z,zmmrm512,imm8 [rmi:fvm: evex.512.f3.0f.wig 70 /r ib ] AVX512BW,FUTURE */ + /* 250(f1 7e 48) 303 001(70) 110 022 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPSHUFHW, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20513, 556, 6518}, + /* 6400 : VPSHUFLW xmmreg|mask|z,xmmrm128,imm8 [rmi:fvm: evex.128.f2.0f.wig 70 /r ib ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f1 7f 08) 303 001(70) 110 022 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSHUFLW, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20523, 555, 6519}, + /* 6401 : VPSHUFLW ymmreg|mask|z,ymmrm256,imm8 [rmi:fvm: evex.256.f2.0f.wig 70 /r ib ] AVX512VL,AVX512BW,FUTURE */ + /* 250(f1 7f 28) 303 001(70) 110 022 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSHUFLW, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20533, 555, 6520}, + /* 6402 : VPSHUFLW zmmreg|mask|z,zmmrm512,imm8 [rmi:fvm: evex.512.f2.0f.wig 70 /r ib ] AVX512BW,FUTURE */ + /* 250(f1 7f 48) 303 001(70) 110 022 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPSHUFLW, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20543, 556, 6521}, + /* 6403 : VPSLLD xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:m128: evex.nds.128.66.0f.w0 f2 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7d 08) 317 001(f2) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSLLD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+41521, 543, 6522}, + /* 6404 : VPSLLD ymmreg|mask|z,ymmreg*,xmmrm128 [rvm:m128: evex.nds.256.66.0f.w0 f2 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7d 28) 317 001(f2) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSLLD, 3, {YMMREG,YMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+41539, 543, 6523}, + /* 6405 : VPSLLD zmmreg|mask|z,zmmreg*,xmmrm128 [rvm:m128: evex.nds.512.66.0f.w0 f2 /r ] AVX512,FUTURE */ + /* 241(f1 7d 48) 317 001(f2) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPSLLD, 3, {ZMMREG,ZMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+41557, 544, 6524}, + /* 6406 : VPSLLD xmmreg|mask|z,xmmrm128|b32*,imm8 [vmi:fv: evex.nds.128.66.0f.w0 72 /6 ib ] AVX512,AVX512VL,FUTURE */ + /* 240(f1 7d 08) 301 001(72) 216 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSLLD, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20553, 543, 6525}, + /* 6407 : VPSLLD ymmreg|mask|z,ymmrm256|b32*,imm8 [vmi:fv: evex.nds.256.66.0f.w0 72 /6 ib ] AVX512,AVX512VL,FUTURE */ + /* 240(f1 7d 28) 301 001(72) 216 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSLLD, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20573, 543, 6526}, + /* 6408 : VPSLLD zmmreg|mask|z,zmmrm512|b32*,imm8 [vmi:fv: evex.nds.512.66.0f.w0 72 /6 ib ] AVX512,FUTURE */ + /* 240(f1 7d 48) 301 001(72) 216 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VPSLLD, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20593, 544, 6527}, + /* 6409 : VPSLLDQ xmmreg,xmmrm128*,imm8 [vmi:fvm: evex.nds.128.66.0f.wig 73 /7 ib ] AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 08) 303 001(73) 217 022 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSLLDQ, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+20613, 555, 6528}, + /* 6410 : VPSLLDQ ymmreg,ymmrm256*,imm8 [vmi:fvm: evex.nds.256.66.0f.wig 73 /7 ib ] AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 28) 303 001(73) 217 022 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSLLDQ, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+20633, 555, 6529}, + /* 6411 : VPSLLDQ zmmreg,zmmrm512*,imm8 [vmi:fvm: evex.nds.512.66.0f.wig 73 /7 ib ] AVX512BW,FUTURE */ + /* 240(f1 7d 48) 303 001(73) 217 022 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPSLLDQ, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+20653, 556, 6530}, + /* 6412 : VPSLLQ xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:m128: evex.nds.128.66.0f.w1 f3 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 317 001(f3) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSLLQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+41575, 543, 6531}, + /* 6413 : VPSLLQ ymmreg|mask|z,ymmreg*,xmmrm128 [rvm:m128: evex.nds.256.66.0f.w1 f3 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 317 001(f3) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSLLQ, 3, {YMMREG,YMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+41593, 543, 6532}, + /* 6414 : VPSLLQ zmmreg|mask|z,zmmreg*,xmmrm128 [rvm:m128: evex.nds.512.66.0f.w1 f3 /r ] AVX512,FUTURE */ + /* 241(f1 fd 48) 317 001(f3) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPSLLQ, 3, {ZMMREG,ZMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+41611, 544, 6533}, + /* 6415 : VPSLLQ xmmreg|mask|z,xmmrm128|b64*,imm8 [vmi:fv: evex.nds.128.66.0f.w1 73 /6 ib ] AVX512,AVX512VL,FUTURE */ + /* 240(f1 fd 08) 301 001(73) 216 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSLLQ, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+20673, 543, 6534}, + /* 6416 : VPSLLQ ymmreg|mask|z,ymmrm256|b64*,imm8 [vmi:fv: evex.nds.256.66.0f.w1 73 /6 ib ] AVX512,AVX512VL,FUTURE */ + /* 240(f1 fd 28) 301 001(73) 216 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSLLQ, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+20693, 543, 6535}, + /* 6417 : VPSLLQ zmmreg|mask|z,zmmrm512|b64*,imm8 [vmi:fv: evex.nds.512.66.0f.w1 73 /6 ib ] AVX512,FUTURE */ + /* 240(f1 fd 48) 301 001(73) 216 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VPSLLQ, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+20713, 544, 6536}, + /* 6418 : VPSLLVD xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 47 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(47) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSLLVD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+41629, 543, 6537}, + /* 6419 : VPSLLVD ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 47 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(47) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSLLVD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+41647, 543, 6538}, + /* 6420 : VPSLLVD zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f38.w0 47 /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(47) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPSLLVD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+41665, 544, 6539}, + /* 6421 : VPSLLVQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 47 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(47) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSLLVQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+41683, 543, 6540}, + /* 6422 : VPSLLVQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 47 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(47) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSLLVQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+41701, 543, 6541}, + /* 6423 : VPSLLVQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 47 /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(47) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPSLLVQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+41719, 544, 6542}, + /* 6424 : VPSLLVW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f38.w1 12 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 fd 08) 303 001(12) 120 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSLLVW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+41737, 549, 6543}, + /* 6425 : VPSLLVW ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f38.w1 12 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 fd 28) 303 001(12) 120 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSLLVW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+41755, 549, 6544}, + /* 6426 : VPSLLVW zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f38.w1 12 /r ] AVX512BW,FUTURE */ + /* 241(f2 fd 48) 303 001(12) 120 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPSLLVW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+41773, 550, 6545}, + /* 6427 : VPSLLW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:m128: evex.nds.128.66.0f.wig f1 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 317 001(f1) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSLLW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+41791, 555, 6546}, + /* 6428 : VPSLLW ymmreg|mask|z,ymmreg*,xmmrm128 [rvm:m128: evex.nds.256.66.0f.wig f1 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 317 001(f1) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSLLW, 3, {YMMREG,YMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+41809, 555, 6547}, + /* 6429 : VPSLLW zmmreg|mask|z,zmmreg*,xmmrm128 [rvm:m128: evex.nds.512.66.0f.wig f1 /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 317 001(f1) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPSLLW, 3, {ZMMREG,ZMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+41827, 556, 6548}, + /* 6430 : VPSLLW xmmreg|mask|z,xmmrm128*,imm8 [vmi:fvm: evex.nds.128.66.0f.wig 71 /6 ib ] AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 08) 303 001(71) 216 022 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSLLW, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20733, 555, 6549}, + /* 6431 : VPSLLW ymmreg|mask|z,ymmrm256*,imm8 [vmi:fvm: evex.nds.256.66.0f.wig 71 /6 ib ] AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 28) 303 001(71) 216 022 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSLLW, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20753, 555, 6550}, + /* 6432 : VPSLLW zmmreg|mask|z,zmmrm512*,imm8 [vmi:fvm: evex.nds.512.66.0f.wig 71 /6 ib ] AVX512BW,FUTURE */ + /* 240(f1 7d 48) 303 001(71) 216 022 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPSLLW, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20773, 556, 6551}, + /* 6433 : VPSRAD xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:m128: evex.nds.128.66.0f.w0 e2 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7d 08) 317 001(e2) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSRAD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+41845, 543, 6552}, + /* 6434 : VPSRAD ymmreg|mask|z,ymmreg*,xmmrm128 [rvm:m128: evex.nds.256.66.0f.w0 e2 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7d 28) 317 001(e2) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSRAD, 3, {YMMREG,YMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+41863, 543, 6553}, + /* 6435 : VPSRAD zmmreg|mask|z,zmmreg*,xmmrm128 [rvm:m128: evex.nds.512.66.0f.w0 e2 /r ] AVX512,FUTURE */ + /* 241(f1 7d 48) 317 001(e2) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPSRAD, 3, {ZMMREG,ZMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+41881, 544, 6554}, + /* 6436 : VPSRAD xmmreg|mask|z,xmmrm128|b32*,imm8 [vmi:fv: evex.nds.128.66.0f.w0 72 /4 ib ] AVX512,AVX512VL,FUTURE */ + /* 240(f1 7d 08) 301 001(72) 214 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSRAD, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20793, 543, 6555}, + /* 6437 : VPSRAD ymmreg|mask|z,ymmrm256|b32*,imm8 [vmi:fv: evex.nds.256.66.0f.w0 72 /4 ib ] AVX512,AVX512VL,FUTURE */ + /* 240(f1 7d 28) 301 001(72) 214 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSRAD, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20813, 543, 6556}, + /* 6438 : VPSRAD zmmreg|mask|z,zmmrm512|b32*,imm8 [vmi:fv: evex.nds.512.66.0f.w0 72 /4 ib ] AVX512,FUTURE */ + /* 240(f1 7d 48) 301 001(72) 214 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VPSRAD, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20833, 544, 6557}, + /* 6439 : VPSRAQ xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:m128: evex.nds.128.66.0f.w1 e2 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 317 001(e2) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSRAQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+41899, 543, 6558}, + /* 6440 : VPSRAQ ymmreg|mask|z,ymmreg*,xmmrm128 [rvm:m128: evex.nds.256.66.0f.w1 e2 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 317 001(e2) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSRAQ, 3, {YMMREG,YMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+41917, 543, 6559}, + /* 6441 : VPSRAQ zmmreg|mask|z,zmmreg*,xmmrm128 [rvm:m128: evex.nds.512.66.0f.w1 e2 /r ] AVX512,FUTURE */ + /* 241(f1 fd 48) 317 001(e2) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPSRAQ, 3, {ZMMREG,ZMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+41935, 544, 6560}, + /* 6442 : VPSRAQ xmmreg|mask|z,xmmrm128|b64*,imm8 [vmi:fv: evex.nds.128.66.0f.w1 72 /4 ib ] AVX512,AVX512VL,FUTURE */ + /* 240(f1 fd 08) 301 001(72) 214 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSRAQ, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+20853, 543, 6561}, + /* 6443 : VPSRAQ ymmreg|mask|z,ymmrm256|b64*,imm8 [vmi:fv: evex.nds.256.66.0f.w1 72 /4 ib ] AVX512,AVX512VL,FUTURE */ + /* 240(f1 fd 28) 301 001(72) 214 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSRAQ, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+20873, 543, 6562}, + /* 6444 : VPSRAQ zmmreg|mask|z,zmmrm512|b64*,imm8 [vmi:fv: evex.nds.512.66.0f.w1 72 /4 ib ] AVX512,FUTURE */ + /* 240(f1 fd 48) 301 001(72) 214 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VPSRAQ, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+20893, 544, 6563}, + /* 6445 : VPSRAVD xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 46 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(46) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSRAVD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+41953, 543, 6564}, + /* 6446 : VPSRAVD ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 46 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(46) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSRAVD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+41971, 543, 6565}, + /* 6447 : VPSRAVD zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f38.w0 46 /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(46) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPSRAVD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+41989, 544, 6566}, + /* 6448 : VPSRAVQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 46 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(46) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSRAVQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+42007, 543, 6567}, + /* 6449 : VPSRAVQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 46 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(46) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSRAVQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+42025, 543, 6568}, + /* 6450 : VPSRAVQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 46 /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(46) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPSRAVQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+42043, 544, 6569}, + /* 6451 : VPSRAVW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f38.w1 11 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 fd 08) 303 001(11) 120 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSRAVW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42061, 549, 6570}, + /* 6452 : VPSRAVW ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f38.w1 11 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 fd 28) 303 001(11) 120 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSRAVW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42079, 549, 6571}, + /* 6453 : VPSRAVW zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f38.w1 11 /r ] AVX512BW,FUTURE */ + /* 241(f2 fd 48) 303 001(11) 120 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPSRAVW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42097, 550, 6572}, + /* 6454 : VPSRAW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:m128: evex.nds.128.66.0f.wig e1 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 317 001(e1) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSRAW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42115, 555, 6573}, + /* 6455 : VPSRAW ymmreg|mask|z,ymmreg*,xmmrm128 [rvm:m128: evex.nds.256.66.0f.wig e1 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 317 001(e1) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSRAW, 3, {YMMREG,YMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42133, 555, 6574}, + /* 6456 : VPSRAW zmmreg|mask|z,zmmreg*,xmmrm128 [rvm:m128: evex.nds.512.66.0f.wig e1 /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 317 001(e1) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPSRAW, 3, {ZMMREG,ZMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42151, 556, 6575}, + /* 6457 : VPSRAW xmmreg|mask|z,xmmrm128*,imm8 [vmi:fvm: evex.nds.128.66.0f.wig 71 /4 ib ] AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 08) 303 001(71) 214 022 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSRAW, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20913, 555, 6576}, + /* 6458 : VPSRAW ymmreg|mask|z,ymmrm256*,imm8 [vmi:fvm: evex.nds.256.66.0f.wig 71 /4 ib ] AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 28) 303 001(71) 214 022 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSRAW, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20933, 555, 6577}, + /* 6459 : VPSRAW zmmreg|mask|z,zmmrm512*,imm8 [vmi:fvm: evex.nds.512.66.0f.wig 71 /4 ib ] AVX512BW,FUTURE */ + /* 240(f1 7d 48) 303 001(71) 214 022 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPSRAW, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+20953, 556, 6578}, + /* 6460 : VPSRLD xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:m128: evex.nds.128.66.0f.w0 d2 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7d 08) 317 001(d2) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSRLD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42169, 543, 6579}, + /* 6461 : VPSRLD ymmreg|mask|z,ymmreg*,xmmrm128 [rvm:m128: evex.nds.256.66.0f.w0 d2 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7d 28) 317 001(d2) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSRLD, 3, {YMMREG,YMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42187, 543, 6580}, + /* 6462 : VPSRLD zmmreg|mask|z,zmmreg*,xmmrm128 [rvm:m128: evex.nds.512.66.0f.w0 d2 /r ] AVX512,FUTURE */ + /* 241(f1 7d 48) 317 001(d2) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPSRLD, 3, {ZMMREG,ZMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42205, 544, 6581}, + /* 6463 : VPSRLD xmmreg|mask|z,xmmrm128|b32*,imm8 [vmi:fv: evex.nds.128.66.0f.w0 72 /2 ib ] AVX512,AVX512VL,FUTURE */ + /* 240(f1 7d 08) 301 001(72) 212 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSRLD, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20973, 543, 6582}, + /* 6464 : VPSRLD ymmreg|mask|z,ymmrm256|b32*,imm8 [vmi:fv: evex.nds.256.66.0f.w0 72 /2 ib ] AVX512,AVX512VL,FUTURE */ + /* 240(f1 7d 28) 301 001(72) 212 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSRLD, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+20993, 543, 6583}, + /* 6465 : VPSRLD zmmreg|mask|z,zmmrm512|b32*,imm8 [vmi:fv: evex.nds.512.66.0f.w0 72 /2 ib ] AVX512,FUTURE */ + /* 240(f1 7d 48) 301 001(72) 212 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VPSRLD, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+21013, 544, 6584}, + /* 6466 : VPSRLDQ xmmreg,xmmrm128*,imm8 [vmi:fvm: evex.nds.128.66.0f.wig 73 /3 ib ] AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 08) 303 001(73) 213 022 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSRLDQ, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+21033, 555, 6585}, + /* 6467 : VPSRLDQ ymmreg,ymmrm256*,imm8 [vmi:fvm: evex.nds.256.66.0f.wig 73 /3 ib ] AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 28) 303 001(73) 213 022 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSRLDQ, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+21053, 555, 6586}, + /* 6468 : VPSRLDQ zmmreg,zmmrm512*,imm8 [vmi:fvm: evex.nds.512.66.0f.wig 73 /3 ib ] AVX512BW,FUTURE */ + /* 240(f1 7d 48) 303 001(73) 213 022 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPSRLDQ, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+21073, 556, 6587}, + /* 6469 : VPSRLQ xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:m128: evex.nds.128.66.0f.w1 d3 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 317 001(d3) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSRLQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42223, 543, 6588}, + /* 6470 : VPSRLQ ymmreg|mask|z,ymmreg*,xmmrm128 [rvm:m128: evex.nds.256.66.0f.w1 d3 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 317 001(d3) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSRLQ, 3, {YMMREG,YMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42241, 543, 6589}, + /* 6471 : VPSRLQ zmmreg|mask|z,zmmreg*,xmmrm128 [rvm:m128: evex.nds.512.66.0f.w1 d3 /r ] AVX512,FUTURE */ + /* 241(f1 fd 48) 317 001(d3) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPSRLQ, 3, {ZMMREG,ZMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42259, 544, 6590}, + /* 6472 : VPSRLQ xmmreg|mask|z,xmmrm128|b64*,imm8 [vmi:fv: evex.nds.128.66.0f.w1 73 /2 ib ] AVX512,AVX512VL,FUTURE */ + /* 240(f1 fd 08) 301 001(73) 212 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSRLQ, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+21093, 543, 6591}, + /* 6473 : VPSRLQ ymmreg|mask|z,ymmrm256|b64*,imm8 [vmi:fv: evex.nds.256.66.0f.w1 73 /2 ib ] AVX512,AVX512VL,FUTURE */ + /* 240(f1 fd 28) 301 001(73) 212 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSRLQ, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+21113, 543, 6592}, + /* 6474 : VPSRLQ zmmreg|mask|z,zmmrm512|b64*,imm8 [vmi:fv: evex.nds.512.66.0f.w1 73 /2 ib ] AVX512,FUTURE */ + /* 240(f1 fd 48) 301 001(73) 212 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VPSRLQ, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+21133, 544, 6593}, + /* 6475 : VPSRLVD xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 45 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(45) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSRLVD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+42277, 543, 6594}, + /* 6476 : VPSRLVD ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 45 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(45) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSRLVD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+42295, 543, 6595}, + /* 6477 : VPSRLVD zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f38.w0 45 /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(45) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPSRLVD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+42313, 544, 6596}, + /* 6478 : VPSRLVQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 45 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(45) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSRLVQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+42331, 543, 6597}, + /* 6479 : VPSRLVQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 45 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(45) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSRLVQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+42349, 543, 6598}, + /* 6480 : VPSRLVQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 45 /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(45) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPSRLVQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+42367, 544, 6599}, + /* 6481 : VPSRLVW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f38.w1 10 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 fd 08) 303 001(10) 120 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSRLVW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42385, 549, 6600}, + /* 6482 : VPSRLVW ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f38.w1 10 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 fd 28) 303 001(10) 120 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSRLVW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42403, 549, 6601}, + /* 6483 : VPSRLVW zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f38.w1 10 /r ] AVX512BW,FUTURE */ + /* 241(f2 fd 48) 303 001(10) 120 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPSRLVW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42421, 550, 6602}, + /* 6484 : VPSRLW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:m128: evex.nds.128.66.0f.wig d1 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 317 001(d1) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSRLW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42439, 555, 6603}, + /* 6485 : VPSRLW ymmreg|mask|z,ymmreg*,xmmrm128 [rvm:m128: evex.nds.256.66.0f.wig d1 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 317 001(d1) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSRLW, 3, {YMMREG,YMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42457, 555, 6604}, + /* 6486 : VPSRLW zmmreg|mask|z,zmmreg*,xmmrm128 [rvm:m128: evex.nds.512.66.0f.wig d1 /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 317 001(d1) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPSRLW, 3, {ZMMREG,ZMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42475, 556, 6605}, + /* 6487 : VPSRLW xmmreg|mask|z,xmmrm128*,imm8 [vmi:fvm: evex.nds.128.66.0f.wig 71 /2 ib ] AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 08) 303 001(71) 212 022 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSRLW, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21153, 555, 6606}, + /* 6488 : VPSRLW ymmreg|mask|z,ymmrm256*,imm8 [vmi:fvm: evex.nds.256.66.0f.wig 71 /2 ib ] AVX512VL,AVX512BW,FUTURE */ + /* 240(f1 7d 28) 303 001(71) 212 022 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSRLW, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21173, 555, 6607}, + /* 6489 : VPSRLW zmmreg|mask|z,zmmrm512*,imm8 [vmi:fvm: evex.nds.512.66.0f.wig 71 /2 ib ] AVX512BW,FUTURE */ + /* 240(f1 7d 48) 303 001(71) 212 022 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPSRLW, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+21193, 556, 6608}, + /* 6490 : VPSUBB xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig f8 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 303 001(f8) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSUBB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42493, 555, 6609}, + /* 6491 : VPSUBB ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig f8 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 303 001(f8) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSUBB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42511, 555, 6610}, + /* 6492 : VPSUBB zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig f8 /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 303 001(f8) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPSUBB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42529, 556, 6611}, + /* 6493 : VPSUBD xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f.w0 fa /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7d 08) 301 001(fa) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSUBD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+42547, 543, 6612}, + /* 6494 : VPSUBD ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f.w0 fa /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7d 28) 301 001(fa) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSUBD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+42565, 543, 6613}, + /* 6495 : VPSUBD zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f.w0 fa /r ] AVX512,FUTURE */ + /* 241(f1 7d 48) 301 001(fa) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPSUBD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+42583, 544, 6614}, + /* 6496 : VPSUBQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f.w1 fb /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(fb) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSUBQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+42601, 543, 6615}, + /* 6497 : VPSUBQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f.w1 fb /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(fb) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPSUBQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+42619, 543, 6616}, + /* 6498 : VPSUBQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f.w1 fb /r ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(fb) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPSUBQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+42637, 544, 6617}, + /* 6499 : VPSUBSB xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig e8 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 303 001(e8) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSUBSB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42655, 555, 6618}, + /* 6500 : VPSUBSB ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig e8 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 303 001(e8) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSUBSB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42673, 555, 6619}, + /* 6501 : VPSUBSB zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig e8 /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 303 001(e8) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPSUBSB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42691, 556, 6620}, + /* 6502 : VPSUBSW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig e9 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 303 001(e9) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSUBSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42709, 555, 6621}, + /* 6503 : VPSUBSW ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig e9 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 303 001(e9) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSUBSW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42727, 555, 6622}, + /* 6504 : VPSUBSW zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig e9 /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 303 001(e9) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPSUBSW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42745, 556, 6623}, + /* 6505 : VPSUBUSB xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig d8 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 303 001(d8) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSUBUSB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42763, 555, 6624}, + /* 6506 : VPSUBUSB ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig d8 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 303 001(d8) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSUBUSB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42781, 555, 6625}, + /* 6507 : VPSUBUSB zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig d8 /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 303 001(d8) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPSUBUSB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42799, 556, 6626}, + /* 6508 : VPSUBUSW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig d9 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 303 001(d9) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSUBUSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42817, 555, 6627}, + /* 6509 : VPSUBUSW ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig d9 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 303 001(d9) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSUBUSW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42835, 555, 6628}, + /* 6510 : VPSUBUSW zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig d9 /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 303 001(d9) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPSUBUSW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42853, 556, 6629}, + /* 6511 : VPSUBW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig f9 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 303 001(f9) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSUBW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42871, 555, 6630}, + /* 6512 : VPSUBW ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig f9 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 303 001(f9) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPSUBW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42889, 555, 6631}, + /* 6513 : VPSUBW zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig f9 /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 303 001(f9) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPSUBW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+42907, 556, 6632}, + /* 6514 : VPTERNLOGD xmmreg|mask|z,xmmreg,xmmrm128|b32,imm8 [rvmi:fv: evex.nds.128.66.0f3a.w0 25 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 08) 301 001(25) 120 023 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPTERNLOGD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+21213, 543, 6633}, + /* 6515 : VPTERNLOGD ymmreg|mask|z,ymmreg,ymmrm256|b32,imm8 [rvmi:fv: evex.nds.256.66.0f3a.w0 25 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 28) 301 001(25) 120 023 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPTERNLOGD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+21223, 543, 6634}, + /* 6516 : VPTERNLOGD zmmreg|mask|z,zmmreg,zmmrm512|b32,imm8 [rvmi:fv: evex.nds.512.66.0f3a.w0 25 /r ib ] AVX512,FUTURE */ + /* 241(f3 7d 48) 301 001(25) 120 023 : EVEX,PROT,AVX512,FUTURE */ + {I_VPTERNLOGD, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+21233, 544, 6635}, + /* 6517 : VPTERNLOGQ xmmreg|mask|z,xmmreg,xmmrm128|b64,imm8 [rvmi:fv: evex.nds.128.66.0f3a.w1 25 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 08) 301 001(25) 120 023 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPTERNLOGQ, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+21243, 543, 6636}, + /* 6518 : VPTERNLOGQ ymmreg|mask|z,ymmreg,ymmrm256|b64,imm8 [rvmi:fv: evex.nds.256.66.0f3a.w1 25 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 28) 301 001(25) 120 023 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPTERNLOGQ, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+21253, 543, 6637}, + /* 6519 : VPTERNLOGQ zmmreg|mask|z,zmmreg,zmmrm512|b64,imm8 [rvmi:fv: evex.nds.512.66.0f3a.w1 25 /r ib ] AVX512,FUTURE */ + /* 241(f3 fd 48) 301 001(25) 120 023 : EVEX,PROT,AVX512,FUTURE */ + {I_VPTERNLOGQ, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+21263, 544, 6638}, + /* 6520 : VPTESTMB kreg|mask,xmmreg,xmmrm128 [rvm:fvm: evex.nds.128.66.0f38.w0 26 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 7d 08) 303 001(26) 120 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPTESTMB, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+42925, 549, 6639}, + /* 6521 : VPTESTMB kreg|mask,ymmreg,ymmrm256 [rvm:fvm: evex.nds.256.66.0f38.w0 26 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 7d 28) 303 001(26) 120 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPTESTMB, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+42934, 549, 6640}, + /* 6522 : VPTESTMB kreg|mask,zmmreg,zmmrm512 [rvm:fvm: evex.nds.512.66.0f38.w0 26 /r ] AVX512BW,FUTURE */ + /* 241(f2 7d 48) 303 001(26) 120 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPTESTMB, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+42943, 550, 6641}, + /* 6523 : VPTESTMD kreg|mask,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 27 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(27) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPTESTMD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+42952, 543, 6642}, + /* 6524 : VPTESTMD kreg|mask,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 27 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(27) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPTESTMD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+42961, 543, 6643}, + /* 6525 : VPTESTMD kreg|mask,zmmreg,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f38.w0 27 /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(27) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPTESTMD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+42970, 544, 6644}, + /* 6526 : VPTESTMQ kreg|mask,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 27 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(27) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPTESTMQ, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+42979, 543, 6645}, + /* 6527 : VPTESTMQ kreg|mask,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 27 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(27) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPTESTMQ, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+42988, 543, 6646}, + /* 6528 : VPTESTMQ kreg|mask,zmmreg,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f38.w1 27 /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(27) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPTESTMQ, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+42997, 544, 6647}, + /* 6529 : VPTESTMW kreg|mask,xmmreg,xmmrm128 [rvm:fvm: evex.nds.128.66.0f38.w1 26 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 fd 08) 303 001(26) 120 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPTESTMW, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+43006, 549, 6648}, + /* 6530 : VPTESTMW kreg|mask,ymmreg,ymmrm256 [rvm:fvm: evex.nds.256.66.0f38.w1 26 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 fd 28) 303 001(26) 120 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPTESTMW, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+43015, 549, 6649}, + /* 6531 : VPTESTMW kreg|mask,zmmreg,zmmrm512 [rvm:fvm: evex.nds.512.66.0f38.w1 26 /r ] AVX512BW,FUTURE */ + /* 241(f2 fd 48) 303 001(26) 120 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPTESTMW, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+43024, 550, 6650}, + /* 6532 : VPTESTNMB kreg|mask,xmmreg,xmmrm128 [rvm:fvm: evex.nds.128.f3.0f38.w0 26 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 7e 08) 303 001(26) 120 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPTESTNMB, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+43033, 549, 6651}, + /* 6533 : VPTESTNMB kreg|mask,ymmreg,ymmrm256 [rvm:fvm: evex.nds.256.f3.0f38.w0 26 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 7e 28) 303 001(26) 120 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPTESTNMB, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+43042, 549, 6652}, + /* 6534 : VPTESTNMB kreg|mask,zmmreg,zmmrm512 [rvm:fvm: evex.nds.512.f3.0f38.w0 26 /r ] AVX512BW,FUTURE */ + /* 241(f2 7e 48) 303 001(26) 120 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPTESTNMB, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+43051, 550, 6653}, + /* 6535 : VPTESTNMD kreg|mask,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.f3.0f38.w0 27 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7e 08) 301 001(27) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPTESTNMD, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+43060, 543, 6654}, + /* 6536 : VPTESTNMD kreg|mask,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.f3.0f38.w0 27 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7e 28) 301 001(27) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPTESTNMD, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+43069, 543, 6655}, + /* 6537 : VPTESTNMD kreg|mask,zmmreg,zmmrm512|b32 [rvm:fv: evex.nds.512.f3.0f38.w0 27 /r ] AVX512,FUTURE */ + /* 241(f2 7e 48) 301 001(27) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPTESTNMD, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B32,0,0}, nasm_bytecodes+43078, 544, 6656}, + /* 6538 : VPTESTNMQ kreg|mask,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.f3.0f38.w1 27 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fe 08) 301 001(27) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPTESTNMQ, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+43087, 543, 6657}, + /* 6539 : VPTESTNMQ kreg|mask,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.f3.0f38.w1 27 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fe 28) 301 001(27) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPTESTNMQ, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+43096, 543, 6658}, + /* 6540 : VPTESTNMQ kreg|mask,zmmreg,zmmrm512|b64 [rvm:fv: evex.nds.512.f3.0f38.w1 27 /r ] AVX512,FUTURE */ + /* 241(f2 fe 48) 301 001(27) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPTESTNMQ, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,B64,0,0}, nasm_bytecodes+43105, 544, 6659}, + /* 6541 : VPTESTNMW kreg|mask,xmmreg,xmmrm128 [rvm:fvm: evex.nds.128.f3.0f38.w1 26 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 fe 08) 303 001(26) 120 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPTESTNMW, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+43114, 549, 6660}, + /* 6542 : VPTESTNMW kreg|mask,ymmreg,ymmrm256 [rvm:fvm: evex.nds.256.f3.0f38.w1 26 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f2 fe 28) 303 001(26) 120 : EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPTESTNMW, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+43123, 549, 6661}, + /* 6543 : VPTESTNMW kreg|mask,zmmreg,zmmrm512 [rvm:fvm: evex.nds.512.f3.0f38.w1 26 /r ] AVX512BW,FUTURE */ + /* 241(f2 fe 48) 303 001(26) 120 : EVEX,PROT,AVX512BW,FUTURE */ + {I_VPTESTNMW, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+43132, 550, 6662}, + /* 6544 : VPUNPCKHBW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig 68 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 303 001(68) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPUNPCKHBW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+43141, 555, 6663}, + /* 6545 : VPUNPCKHBW ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig 68 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 303 001(68) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPUNPCKHBW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+43159, 555, 6664}, + /* 6546 : VPUNPCKHBW zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig 68 /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 303 001(68) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPUNPCKHBW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+43177, 556, 6665}, + /* 6547 : VPUNPCKHDQ xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f.w0 6a /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7d 08) 301 001(6a) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPUNPCKHDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+43195, 543, 6666}, + /* 6548 : VPUNPCKHDQ ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f.w0 6a /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7d 28) 301 001(6a) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPUNPCKHDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+43213, 543, 6667}, + /* 6549 : VPUNPCKHDQ zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f.w0 6a /r ] AVX512,FUTURE */ + /* 241(f1 7d 48) 301 001(6a) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPUNPCKHDQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+43231, 544, 6668}, + /* 6550 : VPUNPCKHQDQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f.w1 6d /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(6d) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPUNPCKHQDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+43249, 543, 6669}, + /* 6551 : VPUNPCKHQDQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f.w1 6d /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(6d) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPUNPCKHQDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+43267, 543, 6670}, + /* 6552 : VPUNPCKHQDQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f.w1 6d /r ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(6d) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPUNPCKHQDQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+43285, 544, 6671}, + /* 6553 : VPUNPCKHWD xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig 69 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 303 001(69) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPUNPCKHWD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+43303, 555, 6672}, + /* 6554 : VPUNPCKHWD ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig 69 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 303 001(69) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPUNPCKHWD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+43321, 555, 6673}, + /* 6555 : VPUNPCKHWD zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig 69 /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 303 001(69) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPUNPCKHWD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+43339, 556, 6674}, + /* 6556 : VPUNPCKLBW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig 60 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 303 001(60) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPUNPCKLBW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+43357, 555, 6675}, + /* 6557 : VPUNPCKLBW ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig 60 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 303 001(60) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPUNPCKLBW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+43375, 555, 6676}, + /* 6558 : VPUNPCKLBW zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig 60 /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 303 001(60) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPUNPCKLBW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+43393, 556, 6677}, + /* 6559 : VPUNPCKLDQ xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f.w0 62 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7d 08) 301 001(62) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPUNPCKLDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+43411, 543, 6678}, + /* 6560 : VPUNPCKLDQ ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f.w0 62 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7d 28) 301 001(62) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPUNPCKLDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+43429, 543, 6679}, + /* 6561 : VPUNPCKLDQ zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f.w0 62 /r ] AVX512,FUTURE */ + /* 241(f1 7d 48) 301 001(62) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPUNPCKLDQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+43447, 544, 6680}, + /* 6562 : VPUNPCKLQDQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f.w1 6c /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(6c) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPUNPCKLQDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+43465, 543, 6681}, + /* 6563 : VPUNPCKLQDQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f.w1 6c /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(6c) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPUNPCKLQDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+43483, 543, 6682}, + /* 6564 : VPUNPCKLQDQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f.w1 6c /r ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(6c) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPUNPCKLQDQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+43501, 544, 6683}, + /* 6565 : VPUNPCKLWD xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f.wig 61 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 08) 303 001(61) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPUNPCKLWD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+43519, 555, 6684}, + /* 6566 : VPUNPCKLWD ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f.wig 61 /r ] AVX512VL,AVX512BW,FUTURE */ + /* 241(f1 7d 28) 303 001(61) 120 : WIG,EVEX,PROT,AVX512VL,AVX512BW,FUTURE */ + {I_VPUNPCKLWD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+43537, 555, 6685}, + /* 6567 : VPUNPCKLWD zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f.wig 61 /r ] AVX512BW,FUTURE */ + /* 241(f1 7d 48) 303 001(61) 120 : WIG,EVEX,PROT,AVX512BW,FUTURE */ + {I_VPUNPCKLWD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+43555, 556, 6686}, + /* 6568 : VPXORD xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f.w0 ef /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7d 08) 301 001(ef) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPXORD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+43573, 543, 6687}, + /* 6569 : VPXORD ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f.w0 ef /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7d 28) 301 001(ef) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPXORD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+43591, 543, 6688}, + /* 6570 : VPXORD zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.66.0f.w0 ef /r ] AVX512,FUTURE */ + /* 241(f1 7d 48) 301 001(ef) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPXORD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+43609, 544, 6689}, + /* 6571 : VPXORQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f.w1 ef /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(ef) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPXORQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+43627, 543, 6690}, + /* 6572 : VPXORQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f.w1 ef /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(ef) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VPXORQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+43645, 543, 6691}, + /* 6573 : VPXORQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f.w1 ef /r ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(ef) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VPXORQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+43663, 544, 6692}, + /* 6574 : VRANGEPD xmmreg|mask|z,xmmreg*,xmmrm128|b64,imm8 [rvmi:fv: evex.nds.128.66.0f3a.w1 50 /r ib ] AVX512VL,AVX512DQ,FUTURE */ + /* 241(f3 fd 08) 301 001(50) 120 023 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VRANGEPD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+21273, 546, 6693}, + /* 6575 : VRANGEPD ymmreg|mask|z,ymmreg*,ymmrm256|b64,imm8 [rvmi:fv: evex.nds.256.66.0f3a.w1 50 /r ib ] AVX512VL,AVX512DQ,FUTURE */ + /* 241(f3 fd 28) 301 001(50) 120 023 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VRANGEPD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+21293, 546, 6694}, + /* 6576 : VRANGEPD zmmreg|mask|z,zmmreg*,zmmrm512|b64|sae,imm8 [rvmi:fv: evex.nds.512.66.0f3a.w1 50 /r ib ] AVX512DQ,FUTURE */ + /* 241(f3 fd 48) 301 001(50) 120 023 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VRANGEPD, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B64|SAE,0,0}, nasm_bytecodes+21313, 547, 6695}, + /* 6577 : VRANGEPS xmmreg|mask|z,xmmreg*,xmmrm128|b32,imm8 [rvmi:fv: evex.nds.128.66.0f3a.w0 50 /r ib ] AVX512VL,AVX512DQ,FUTURE */ + /* 241(f3 7d 08) 301 001(50) 120 023 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VRANGEPS, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+21333, 546, 6696}, + /* 6578 : VRANGEPS ymmreg|mask|z,ymmreg*,ymmrm256|b32,imm8 [rvmi:fv: evex.nds.256.66.0f3a.w0 50 /r ib ] AVX512VL,AVX512DQ,FUTURE */ + /* 241(f3 7d 28) 301 001(50) 120 023 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VRANGEPS, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+21353, 546, 6697}, + /* 6579 : VRANGEPS zmmreg|mask|z,zmmreg*,zmmrm512|b32|sae,imm8 [rvmi:fv: evex.nds.512.66.0f3a.w0 50 /r ib ] AVX512DQ,FUTURE */ + /* 241(f3 7d 48) 301 001(50) 120 023 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VRANGEPS, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B32|SAE,0,0}, nasm_bytecodes+21373, 547, 6698}, + /* 6580 : VRANGESD xmmreg|mask|z,xmmreg*,xmmrm64|sae,imm8 [rvmi:t1s: evex.nds.lig.66.0f3a.w1 51 /r ib ] AVX512DQ,FUTURE */ + /* 241(f3 fd 08) 306 001(51) 120 023 : LIG,EVEX,PROT,AVX512DQ,FUTURE */ + {I_VRANGESD, 4, {XMMREG,XMMREG,RM_XMM|BITS64,IMM_NORMAL|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+21393, 553, 6699}, + /* 6581 : VRANGESS xmmreg|mask|z,xmmreg*,xmmrm32|sae,imm8 [rvmi:t1s: evex.nds.lig.66.0f3a.w0 51 /r ib ] AVX512DQ,FUTURE */ + /* 241(f3 7d 08) 306 001(51) 120 023 : LIG,EVEX,PROT,AVX512DQ,FUTURE */ + {I_VRANGESS, 4, {XMMREG,XMMREG,RM_XMM|BITS32,IMM_NORMAL|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+21413, 553, 6700}, + /* 6582 : VRCP14PD xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.66.0f38.w1 4c /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 fd 08) 301 001(4c) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VRCP14PD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+43681, 543, 6701}, + /* 6583 : VRCP14PD ymmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.66.0f38.w1 4c /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 fd 28) 301 001(4c) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VRCP14PD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+43690, 543, 6702}, + /* 6584 : VRCP14PD zmmreg|mask|z,zmmrm512|b64 [rm:fv: evex.512.66.0f38.w1 4c /r ] AVX512,FUTURE */ + /* 250(f2 fd 48) 301 001(4c) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VRCP14PD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+43699, 544, 6703}, + /* 6585 : VRCP14PS xmmreg|mask|z,xmmrm128|b32 [rm:fv: evex.128.66.0f38.w0 4c /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 08) 301 001(4c) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VRCP14PS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+43708, 543, 6704}, + /* 6586 : VRCP14PS ymmreg|mask|z,ymmrm256|b32 [rm:fv: evex.256.66.0f38.w0 4c /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 28) 301 001(4c) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VRCP14PS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+43717, 543, 6705}, + /* 6587 : VRCP14PS zmmreg|mask|z,zmmrm512|b32 [rm:fv: evex.512.66.0f38.w0 4c /r ] AVX512,FUTURE */ + /* 250(f2 7d 48) 301 001(4c) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VRCP14PS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+43726, 544, 6706}, + /* 6588 : VRCP14SD xmmreg|mask|z,xmmreg*,xmmrm64 [rvm:t1s: evex.nds.lig.66.0f38.w1 4d /r ] AVX512,FUTURE */ + /* 241(f2 fd 08) 306 001(4d) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VRCP14SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+43735, 545, 6707}, + /* 6589 : VRCP14SS xmmreg|mask|z,xmmreg*,xmmrm32 [rvm:t1s: evex.nds.lig.66.0f38.w0 4d /r ] AVX512,FUTURE */ + /* 241(f2 7d 08) 306 001(4d) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VRCP14SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+43753, 545, 6708}, + /* 6590 : VRCP28PD zmmreg|mask|z,zmmrm512|b64|sae [rm:fv: evex.512.66.0f38.w1 ca /r ] AVX512ER,FUTURE */ + /* 250(f2 fd 48) 301 001(ca) 110 : EVEX,PROT,AVX512ER,FUTURE */ + {I_VRCP28PD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+43771, 551, 6709}, + /* 6591 : VRCP28PS zmmreg|mask|z,zmmrm512|b32|sae [rm:fv: evex.512.66.0f38.w0 ca /r ] AVX512ER,FUTURE */ + /* 250(f2 7d 48) 301 001(ca) 110 : EVEX,PROT,AVX512ER,FUTURE */ + {I_VRCP28PS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+43780, 551, 6710}, + /* 6592 : VRCP28SD xmmreg|mask|z,xmmreg*,xmmrm64|sae [rvm:t1s: evex.nds.lig.66.0f38.w1 cb /r ] AVX512ER,FUTURE */ + /* 241(f2 fd 08) 306 001(cb) 120 : LIG,EVEX,PROT,AVX512ER,FUTURE */ + {I_VRCP28SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+43789, 564, 6711}, + /* 6593 : VRCP28SS xmmreg|mask|z,xmmreg*,xmmrm32|sae [rvm:t1s: evex.nds.lig.66.0f38.w0 cb /r ] AVX512ER,FUTURE */ + /* 241(f2 7d 08) 306 001(cb) 120 : LIG,EVEX,PROT,AVX512ER,FUTURE */ + {I_VRCP28SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+43807, 564, 6712}, + /* 6594 : VREDUCEPD xmmreg|mask|z,xmmrm128|b64,imm8 [rmi:fv: evex.128.66.0f3a.w1 56 /r ib ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f3 fd 08) 301 001(56) 110 022 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VREDUCEPD, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+21433, 546, 6713}, + /* 6595 : VREDUCEPD ymmreg|mask|z,ymmrm256|b64,imm8 [rmi:fv: evex.256.66.0f3a.w1 56 /r ib ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f3 fd 28) 301 001(56) 110 022 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VREDUCEPD, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+21443, 546, 6714}, + /* 6596 : VREDUCEPD zmmreg|mask|z,zmmrm512|b64|sae,imm8 [rmi:fv: evex.512.66.0f3a.w1 56 /r ib ] AVX512DQ,FUTURE */ + /* 250(f3 fd 48) 301 001(56) 110 022 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VREDUCEPD, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+21453, 547, 6715}, + /* 6597 : VREDUCEPS xmmreg|mask|z,xmmrm128|b32,imm8 [rmi:fv: evex.128.66.0f3a.w0 56 /r ib ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f3 7d 08) 301 001(56) 110 022 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VREDUCEPS, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+21463, 546, 6716}, + /* 6598 : VREDUCEPS ymmreg|mask|z,ymmrm256|b32,imm8 [rmi:fv: evex.256.66.0f3a.w0 56 /r ib ] AVX512VL,AVX512DQ,FUTURE */ + /* 250(f3 7d 28) 301 001(56) 110 022 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VREDUCEPS, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+21473, 546, 6717}, + /* 6599 : VREDUCEPS zmmreg|mask|z,zmmrm512|b32|sae,imm8 [rmi:fv: evex.512.66.0f3a.w0 56 /r ib ] AVX512DQ,FUTURE */ + /* 250(f3 7d 48) 301 001(56) 110 022 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VREDUCEPS, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+21483, 547, 6718}, + /* 6600 : VREDUCESD xmmreg|mask|z,xmmreg*,xmmrm64|sae,imm8 [rvmi:t1s: evex.nds.lig.66.0f3a.w1 57 /r ib ] AVX512DQ,FUTURE */ + /* 241(f3 fd 08) 306 001(57) 120 023 : LIG,EVEX,PROT,AVX512DQ,FUTURE */ + {I_VREDUCESD, 4, {XMMREG,XMMREG,RM_XMM|BITS64,IMM_NORMAL|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+21493, 553, 6719}, + /* 6601 : VREDUCESS xmmreg|mask|z,xmmreg*,xmmrm32|sae,imm8 [rvmi:t1s: evex.nds.lig.66.0f3a.w0 57 /r ib ] AVX512DQ,FUTURE */ + /* 241(f3 7d 08) 306 001(57) 120 023 : LIG,EVEX,PROT,AVX512DQ,FUTURE */ + {I_VREDUCESS, 4, {XMMREG,XMMREG,RM_XMM|BITS32,IMM_NORMAL|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+21513, 553, 6720}, + /* 6602 : VRNDSCALEPD xmmreg|mask|z,xmmrm128|b64,imm8 [rmi:fv: evex.128.66.0f3a.w1 09 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 250(f3 fd 08) 301 001(09) 110 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VRNDSCALEPD, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+21533, 543, 6721}, + /* 6603 : VRNDSCALEPD ymmreg|mask|z,ymmrm256|b64,imm8 [rmi:fv: evex.256.66.0f3a.w1 09 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 250(f3 fd 28) 301 001(09) 110 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VRNDSCALEPD, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+21543, 543, 6722}, + /* 6604 : VRNDSCALEPD zmmreg|mask|z,zmmrm512|b64|sae,imm8 [rmi:fv: evex.512.66.0f3a.w1 09 /r ib ] AVX512,FUTURE */ + /* 250(f3 fd 48) 301 001(09) 110 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VRNDSCALEPD, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+21553, 544, 6723}, + /* 6605 : VRNDSCALEPH xmmreg|mask|z,xmmrm128|b16,imm8 [rmi:fv: evex.128.np.0f3a.w0 08 /r ib ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f3 7c 08) 301 001(08) 110 022 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VRNDSCALEPH, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+21563, 565, 6724}, + /* 6606 : VRNDSCALEPH ymmreg|mask|z,ymmrm256|b16,imm8 [rmi:fv: evex.256.np.0f3a.w0 08 /r ib ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f3 7c 28) 301 001(08) 110 022 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VRNDSCALEPH, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+21573, 565, 6725}, + /* 6607 : VRNDSCALEPH zmmreg|mask|z,zmmrm512|b16|sae,imm8 [rmi:fv: evex.512.np.0f3a.w0 08 /r ib ] AVX512FP16,FUTURE */ + /* 250(f3 7c 48) 301 001(08) 110 022 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VRNDSCALEPH, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+21583, 566, 6726}, + /* 6608 : VRNDSCALEPS xmmreg|mask|z,xmmrm128|b32,imm8 [rmi:fv: evex.128.66.0f3a.w0 08 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 250(f3 7d 08) 301 001(08) 110 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VRNDSCALEPS, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+21593, 543, 6727}, + /* 6609 : VRNDSCALEPS ymmreg|mask|z,ymmrm256|b32,imm8 [rmi:fv: evex.256.66.0f3a.w0 08 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 250(f3 7d 28) 301 001(08) 110 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VRNDSCALEPS, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+21603, 543, 6728}, + /* 6610 : VRNDSCALEPS zmmreg|mask|z,zmmrm512|b32|sae,imm8 [rmi:fv: evex.512.66.0f3a.w0 08 /r ib ] AVX512,FUTURE */ + /* 250(f3 7d 48) 301 001(08) 110 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VRNDSCALEPS, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+21613, 544, 6729}, + /* 6611 : VRNDSCALESD xmmreg|mask|z,xmmreg*,xmmrm64|sae,imm8 [rvmi:t1s: evex.nds.lig.66.0f3a.w1 0b /r ib ] AVX512,FUTURE */ + /* 241(f3 fd 08) 306 001(0b) 120 023 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VRNDSCALESD, 4, {XMMREG,XMMREG,RM_XMM|BITS64,IMM_NORMAL|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+21623, 545, 6730}, + /* 6612 : VRNDSCALESH xmmreg|mask|z,xmmreg*,xmmrm16|sae,imm8 [rvmi:t1s: evex.nds.lig.np.0f3a.w0 0a /r ib ] AVX512FP16,FUTURE */ + /* 241(f3 7c 08) 306 001(0a) 120 023 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VRNDSCALESH, 4, {XMMREG,XMMREG,RM_XMM|BITS16,IMM_NORMAL|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+21643, 567, 6731}, + /* 6613 : VRNDSCALESS xmmreg|mask|z,xmmreg*,xmmrm32|sae,imm8 [rvmi:t1s: evex.nds.lig.66.0f3a.w0 0a /r ib ] AVX512,FUTURE */ + /* 241(f3 7d 08) 306 001(0a) 120 023 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VRNDSCALESS, 4, {XMMREG,XMMREG,RM_XMM|BITS32,IMM_NORMAL|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+21663, 545, 6732}, + /* 6614 : VRSQRT14PD xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.66.0f38.w1 4e /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 fd 08) 301 001(4e) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VRSQRT14PD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+43825, 543, 6733}, + /* 6615 : VRSQRT14PD ymmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.66.0f38.w1 4e /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 fd 28) 301 001(4e) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VRSQRT14PD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+43834, 543, 6734}, + /* 6616 : VRSQRT14PD zmmreg|mask|z,zmmrm512|b64 [rm:fv: evex.512.66.0f38.w1 4e /r ] AVX512,FUTURE */ + /* 250(f2 fd 48) 301 001(4e) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VRSQRT14PD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+43843, 544, 6735}, + /* 6617 : VRSQRT14PS xmmreg|mask|z,xmmrm128|b32 [rm:fv: evex.128.66.0f38.w0 4e /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 08) 301 001(4e) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VRSQRT14PS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+43852, 543, 6736}, + /* 6618 : VRSQRT14PS ymmreg|mask|z,ymmrm256|b32 [rm:fv: evex.256.66.0f38.w0 4e /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 28) 301 001(4e) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VRSQRT14PS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+43861, 543, 6737}, + /* 6619 : VRSQRT14PS zmmreg|mask|z,zmmrm512|b32 [rm:fv: evex.512.66.0f38.w0 4e /r ] AVX512,FUTURE */ + /* 250(f2 7d 48) 301 001(4e) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VRSQRT14PS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+43870, 544, 6738}, + /* 6620 : VRSQRT14SD xmmreg|mask|z,xmmreg*,xmmrm64 [rvm:t1s: evex.nds.lig.66.0f38.w1 4f /r ] AVX512,FUTURE */ + /* 241(f2 fd 08) 306 001(4f) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VRSQRT14SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+43879, 545, 6739}, + /* 6621 : VRSQRT14SS xmmreg|mask|z,xmmreg*,xmmrm32 [rvm:t1s: evex.nds.lig.66.0f38.w0 4f /r ] AVX512,FUTURE */ + /* 241(f2 7d 08) 306 001(4f) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VRSQRT14SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+43897, 545, 6740}, + /* 6622 : VRSQRT28PD zmmreg|mask|z,zmmrm512|b64|sae [rm:fv: evex.512.66.0f38.w1 cc /r ] AVX512ER,FUTURE */ + /* 250(f2 fd 48) 301 001(cc) 110 : EVEX,PROT,AVX512ER,FUTURE */ + {I_VRSQRT28PD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+43915, 551, 6741}, + /* 6623 : VRSQRT28PS zmmreg|mask|z,zmmrm512|b32|sae [rm:fv: evex.512.66.0f38.w0 cc /r ] AVX512ER,FUTURE */ + /* 250(f2 7d 48) 301 001(cc) 110 : EVEX,PROT,AVX512ER,FUTURE */ + {I_VRSQRT28PS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+43924, 551, 6742}, + /* 6624 : VRSQRT28SD xmmreg|mask|z,xmmreg*,xmmrm64|sae [rvm:t1s: evex.nds.lig.66.0f38.w1 cd /r ] AVX512ER,FUTURE */ + /* 241(f2 fd 08) 306 001(cd) 120 : LIG,EVEX,PROT,AVX512ER,FUTURE */ + {I_VRSQRT28SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+43933, 564, 6743}, + /* 6625 : VRSQRT28SS xmmreg|mask|z,xmmreg*,xmmrm32|sae [rvm:t1s: evex.nds.lig.66.0f38.w0 cd /r ] AVX512ER,FUTURE */ + /* 241(f2 7d 08) 306 001(cd) 120 : LIG,EVEX,PROT,AVX512ER,FUTURE */ + {I_VRSQRT28SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+43951, 564, 6744}, + /* 6626 : VSCALEFPD xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f38.w1 2c /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 08) 301 001(2c) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VSCALEFPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+43969, 543, 6745}, + /* 6627 : VSCALEFPD ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f38.w1 2c /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 fd 28) 301 001(2c) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VSCALEFPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+43987, 543, 6746}, + /* 6628 : VSCALEFPD zmmreg|mask|z,zmmreg*,zmmrm512|b64|er [rvm:fv: evex.nds.512.66.0f38.w1 2c /r ] AVX512,FUTURE */ + /* 241(f2 fd 48) 301 001(2c) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VSCALEFPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+44005, 544, 6747}, + /* 6629 : VSCALEFPS xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.66.0f38.w0 2c /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 08) 301 001(2c) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VSCALEFPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+44023, 543, 6748}, + /* 6630 : VSCALEFPS ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.66.0f38.w0 2c /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f2 7d 28) 301 001(2c) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VSCALEFPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+44041, 543, 6749}, + /* 6631 : VSCALEFPS zmmreg|mask|z,zmmreg*,zmmrm512|b32|er [rvm:fv: evex.nds.512.66.0f38.w0 2c /r ] AVX512,FUTURE */ + /* 241(f2 7d 48) 301 001(2c) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VSCALEFPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+44059, 544, 6750}, + /* 6632 : VSCALEFSD xmmreg|mask|z,xmmreg*,xmmrm64|er [rvm:t1s: evex.nds.lig.66.0f38.w1 2d /r ] AVX512,FUTURE */ + /* 241(f2 fd 08) 306 001(2d) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VSCALEFSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+44077, 545, 6751}, + /* 6633 : VSCALEFSS xmmreg|mask|z,xmmreg*,xmmrm32|er [rvm:t1s: evex.nds.lig.66.0f38.w0 2d /r ] AVX512,FUTURE */ + /* 241(f2 7d 08) 306 001(2d) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VSCALEFSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+44095, 545, 6752}, + /* 6634 : VSCATTERDPD xmem64|mask,xmmreg [mr:t1s: vsibx evex.128.66.0f38.w1 a2 /r ] AVX512,AVX512VL,FUTURE */ + /* 374 250(f2 fd 08) 306 001(a2) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VSCATTERDPD, 2, {XMEM|BITS64,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+21683, 543, 6753}, + /* 6635 : VSCATTERDPD xmem64|mask,ymmreg [mr:t1s: vsibx evex.256.66.0f38.w1 a2 /r ] AVX512,AVX512VL,FUTURE */ + /* 374 250(f2 fd 28) 306 001(a2) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VSCATTERDPD, 2, {XMEM|BITS64,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+21693, 543, 6754}, + /* 6636 : VSCATTERDPD ymem64|mask,zmmreg [mr:t1s: vsiby evex.512.66.0f38.w1 a2 /r ] AVX512,FUTURE */ + /* 375 250(f2 fd 48) 306 001(a2) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VSCATTERDPD, 2, {YMEM|BITS64,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+21703, 544, 6755}, + /* 6637 : VSCATTERDPS xmem32|mask,xmmreg [mr:t1s: vsibx evex.128.66.0f38.w0 a2 /r ] AVX512,AVX512VL,FUTURE */ + /* 374 250(f2 7d 08) 306 001(a2) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VSCATTERDPS, 2, {XMEM|BITS32,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+21713, 543, 6756}, + /* 6638 : VSCATTERDPS ymem32|mask,ymmreg [mr:t1s: vsiby evex.256.66.0f38.w0 a2 /r ] AVX512,AVX512VL,FUTURE */ + /* 375 250(f2 7d 28) 306 001(a2) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VSCATTERDPS, 2, {YMEM|BITS32,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+21723, 543, 6757}, + /* 6639 : VSCATTERDPS zmem32|mask,zmmreg [mr:t1s: vsibz evex.512.66.0f38.w0 a2 /r ] AVX512,FUTURE */ + /* 376 250(f2 7d 48) 306 001(a2) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VSCATTERDPS, 2, {ZMEM|BITS32,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+21733, 544, 6758}, + /* 6640 : VSCATTERPF0DPD ymem64|mask [m:t1s: vsiby evex.512.66.0f38.w1 c6 /5 ] AVX512PF,FUTURE */ + /* 375 250(f2 fd 48) 306 001(c6) 205 : EVEX,PROT,AVX512PF,FUTURE */ + {I_VSCATTERPF0DPD, 1, {YMEM|BITS64,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+21743, 554, 6759}, + /* 6641 : VSCATTERPF0DPS zmem32|mask [m:t1s: vsibz evex.512.66.0f38.w0 c6 /5 ] AVX512PF,FUTURE */ + /* 376 250(f2 7d 48) 306 001(c6) 205 : EVEX,PROT,AVX512PF,FUTURE */ + {I_VSCATTERPF0DPS, 1, {ZMEM|BITS32,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+21753, 554, 6760}, + /* 6642 : VSCATTERPF0QPD zmem64|mask [m:t1s: vsibz evex.512.66.0f38.w1 c7 /5 ] AVX512PF,FUTURE */ + /* 376 250(f2 fd 48) 306 001(c7) 205 : EVEX,PROT,AVX512PF,FUTURE */ + {I_VSCATTERPF0QPD, 1, {ZMEM|BITS64,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+21763, 554, 6761}, + /* 6643 : VSCATTERPF0QPS zmem32|mask [m:t1s: vsibz evex.512.66.0f38.w0 c7 /5 ] AVX512PF,FUTURE */ + /* 376 250(f2 7d 48) 306 001(c7) 205 : EVEX,PROT,AVX512PF,FUTURE */ + {I_VSCATTERPF0QPS, 1, {ZMEM|BITS32,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+21773, 554, 6762}, + /* 6644 : VSCATTERPF1DPD ymem64|mask [m:t1s: vsiby evex.512.66.0f38.w1 c6 /6 ] AVX512PF,FUTURE */ + /* 375 250(f2 fd 48) 306 001(c6) 206 : EVEX,PROT,AVX512PF,FUTURE */ + {I_VSCATTERPF1DPD, 1, {YMEM|BITS64,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+21783, 554, 6763}, + /* 6645 : VSCATTERPF1DPS zmem32|mask [m:t1s: vsibz evex.512.66.0f38.w0 c6 /6 ] AVX512PF,FUTURE */ + /* 376 250(f2 7d 48) 306 001(c6) 206 : EVEX,PROT,AVX512PF,FUTURE */ + {I_VSCATTERPF1DPS, 1, {ZMEM|BITS32,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+21793, 554, 6764}, + /* 6646 : VSCATTERPF1QPD zmem64|mask [m:t1s: vsibz evex.512.66.0f38.w1 c7 /6 ] AVX512PF,FUTURE */ + /* 376 250(f2 fd 48) 306 001(c7) 206 : EVEX,PROT,AVX512PF,FUTURE */ + {I_VSCATTERPF1QPD, 1, {ZMEM|BITS64,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+21803, 554, 6765}, + /* 6647 : VSCATTERPF1QPS zmem32|mask [m:t1s: vsibz evex.512.66.0f38.w0 c7 /6 ] AVX512PF,FUTURE */ + /* 376 250(f2 7d 48) 306 001(c7) 206 : EVEX,PROT,AVX512PF,FUTURE */ + {I_VSCATTERPF1QPS, 1, {ZMEM|BITS32,0,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+21813, 554, 6766}, + /* 6648 : VSCATTERQPD xmem64|mask,xmmreg [mr:t1s: vsibx evex.128.66.0f38.w1 a3 /r ] AVX512,AVX512VL,FUTURE */ + /* 374 250(f2 fd 08) 306 001(a3) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VSCATTERQPD, 2, {XMEM|BITS64,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+21823, 543, 6767}, + /* 6649 : VSCATTERQPD ymem64|mask,ymmreg [mr:t1s: vsiby evex.256.66.0f38.w1 a3 /r ] AVX512,AVX512VL,FUTURE */ + /* 375 250(f2 fd 28) 306 001(a3) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VSCATTERQPD, 2, {YMEM|BITS64,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+21833, 543, 6768}, + /* 6650 : VSCATTERQPD zmem64|mask,zmmreg [mr:t1s: vsibz evex.512.66.0f38.w1 a3 /r ] AVX512,FUTURE */ + /* 376 250(f2 fd 48) 306 001(a3) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VSCATTERQPD, 2, {ZMEM|BITS64,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+21843, 544, 6769}, + /* 6651 : VSCATTERQPS xmem32|mask,xmmreg [mr:t1s: vsibx evex.128.66.0f38.w0 a3 /r ] AVX512,AVX512VL,FUTURE */ + /* 374 250(f2 7d 08) 306 001(a3) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VSCATTERQPS, 2, {XMEM|BITS32,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+21853, 543, 6770}, + /* 6652 : VSCATTERQPS ymem32|mask,xmmreg [mr:t1s: vsiby evex.256.66.0f38.w0 a3 /r ] AVX512,AVX512VL,FUTURE */ + /* 375 250(f2 7d 28) 306 001(a3) 101 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VSCATTERQPS, 2, {YMEM|BITS32,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+21863, 543, 6771}, + /* 6653 : VSCATTERQPS zmem32|mask,ymmreg [mr:t1s: vsibz evex.512.66.0f38.w0 a3 /r ] AVX512,FUTURE */ + /* 376 250(f2 7d 48) 306 001(a3) 101 : EVEX,PROT,AVX512,FUTURE */ + {I_VSCATTERQPS, 2, {ZMEM|BITS32,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+21873, 544, 6772}, + /* 6654 : VSHUFF32X4 ymmreg|mask|z,ymmreg*,ymmrm256|b32,imm8 [rvmi:fv: evex.nds.256.66.0f3a.w0 23 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 28) 301 001(23) 120 023 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VSHUFF32X4, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+21883, 543, 6773}, + /* 6655 : VSHUFF32X4 zmmreg|mask|z,zmmreg*,zmmrm512|b32,imm8 [rvmi:fv: evex.nds.512.66.0f3a.w0 23 /r ib ] AVX512,FUTURE */ + /* 241(f3 7d 48) 301 001(23) 120 023 : EVEX,PROT,AVX512,FUTURE */ + {I_VSHUFF32X4, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+21903, 544, 6774}, + /* 6656 : VSHUFF64X2 ymmreg|mask|z,ymmreg*,ymmrm256|b64,imm8 [rvmi:fv: evex.nds.256.66.0f3a.w1 23 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 28) 301 001(23) 120 023 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VSHUFF64X2, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+21923, 543, 6775}, + /* 6657 : VSHUFF64X2 zmmreg|mask|z,zmmreg*,zmmrm512|b64,imm8 [rvmi:fv: evex.nds.512.66.0f3a.w1 23 /r ib ] AVX512,FUTURE */ + /* 241(f3 fd 48) 301 001(23) 120 023 : EVEX,PROT,AVX512,FUTURE */ + {I_VSHUFF64X2, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+21943, 544, 6776}, + /* 6658 : VSHUFI32X4 ymmreg|mask|z,ymmreg*,ymmrm256|b32,imm8 [rvmi:fv: evex.nds.256.66.0f3a.w0 43 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 7d 28) 301 001(43) 120 023 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VSHUFI32X4, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+21963, 543, 6777}, + /* 6659 : VSHUFI32X4 zmmreg|mask|z,zmmreg*,zmmrm512|b32,imm8 [rvmi:fv: evex.nds.512.66.0f3a.w0 43 /r ib ] AVX512,FUTURE */ + /* 241(f3 7d 48) 301 001(43) 120 023 : EVEX,PROT,AVX512,FUTURE */ + {I_VSHUFI32X4, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+21983, 544, 6778}, + /* 6660 : VSHUFI64X2 ymmreg|mask|z,ymmreg*,ymmrm256|b64,imm8 [rvmi:fv: evex.nds.256.66.0f3a.w1 43 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 241(f3 fd 28) 301 001(43) 120 023 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VSHUFI64X2, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22003, 543, 6779}, + /* 6661 : VSHUFI64X2 zmmreg|mask|z,zmmreg*,zmmrm512|b64,imm8 [rvmi:fv: evex.nds.512.66.0f3a.w1 43 /r ib ] AVX512,FUTURE */ + /* 241(f3 fd 48) 301 001(43) 120 023 : EVEX,PROT,AVX512,FUTURE */ + {I_VSHUFI64X2, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22023, 544, 6780}, + /* 6662 : VSHUFPD xmmreg|mask|z,xmmreg*,xmmrm128|b64,imm8 [rvmi:fv: evex.nds.128.66.0f.w1 c6 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(c6) 120 023 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VSHUFPD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22043, 543, 6781}, + /* 6663 : VSHUFPD ymmreg|mask|z,ymmreg*,ymmrm256|b64,imm8 [rvmi:fv: evex.nds.256.66.0f.w1 c6 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(c6) 120 023 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VSHUFPD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22063, 543, 6782}, + /* 6664 : VSHUFPD zmmreg|mask|z,zmmreg*,zmmrm512|b64,imm8 [rvmi:fv: evex.nds.512.66.0f.w1 c6 /r ib ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(c6) 120 023 : EVEX,PROT,AVX512,FUTURE */ + {I_VSHUFPD, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22083, 544, 6783}, + /* 6665 : VSHUFPS xmmreg|mask|z,xmmreg*,xmmrm128|b32,imm8 [rvmi:fv: evex.nds.128.0f.w0 c6 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(c6) 120 023 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VSHUFPS, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22103, 543, 6784}, + /* 6666 : VSHUFPS ymmreg|mask|z,ymmreg*,ymmrm256|b32,imm8 [rvmi:fv: evex.nds.256.0f.w0 c6 /r ib ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(c6) 120 023 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VSHUFPS, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22123, 543, 6785}, + /* 6667 : VSHUFPS zmmreg|mask|z,zmmreg*,zmmrm512|b32,imm8 [rvmi:fv: evex.nds.512.0f.w0 c6 /r ib ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(c6) 120 023 : EVEX,PROT,AVX512,FUTURE */ + {I_VSHUFPS, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22143, 544, 6786}, + /* 6668 : VSQRTPD xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.66.0f.w1 51 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 fd 08) 301 001(51) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VSQRTPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+44113, 543, 6787}, + /* 6669 : VSQRTPD ymmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.66.0f.w1 51 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 fd 28) 301 001(51) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VSQRTPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+44122, 543, 6788}, + /* 6670 : VSQRTPD zmmreg|mask|z,zmmrm512|b64|er [rm:fv: evex.512.66.0f.w1 51 /r ] AVX512,FUTURE */ + /* 250(f1 fd 48) 301 001(51) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VSQRTPD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+44131, 544, 6789}, + /* 6671 : VSQRTPS xmmreg|mask|z,xmmrm128|b32 [rm:fv: evex.128.0f.w0 51 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7c 08) 301 001(51) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VSQRTPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+44140, 543, 6790}, + /* 6672 : VSQRTPS ymmreg|mask|z,ymmrm256|b32 [rm:fv: evex.256.0f.w0 51 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f1 7c 28) 301 001(51) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VSQRTPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+44149, 543, 6791}, + /* 6673 : VSQRTPS zmmreg|mask|z,zmmrm512|b32|er [rm:fv: evex.512.0f.w0 51 /r ] AVX512,FUTURE */ + /* 250(f1 7c 48) 301 001(51) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VSQRTPS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+44158, 544, 6792}, + /* 6674 : VSQRTSD xmmreg|mask|z,xmmreg*,xmmrm64|er [rvm:t1s: evex.nds.lig.f2.0f.w1 51 /r ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(51) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VSQRTSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+44167, 545, 6793}, + /* 6675 : VSQRTSS xmmreg|mask|z,xmmreg*,xmmrm32|er [rvm:t1s: evex.nds.lig.f3.0f.w0 51 /r ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(51) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VSQRTSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+44185, 545, 6794}, + /* 6676 : VSUBPD xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f.w1 5c /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(5c) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VSUBPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+44203, 543, 6795}, + /* 6677 : VSUBPD ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f.w1 5c /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(5c) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VSUBPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+44221, 543, 6796}, + /* 6678 : VSUBPD zmmreg|mask|z,zmmreg*,zmmrm512|b64|er [rvm:fv: evex.nds.512.66.0f.w1 5c /r ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(5c) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VSUBPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64|ER,0,0}, nasm_bytecodes+44239, 544, 6797}, + /* 6679 : VSUBPS xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.0f.w0 5c /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(5c) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VSUBPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+44257, 543, 6798}, + /* 6680 : VSUBPS ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.0f.w0 5c /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(5c) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VSUBPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+44275, 543, 6799}, + /* 6681 : VSUBPS zmmreg|mask|z,zmmreg*,zmmrm512|b32|er [rvm:fv: evex.nds.512.0f.w0 5c /r ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(5c) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VSUBPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+44293, 544, 6800}, + /* 6682 : VSUBSD xmmreg|mask|z,xmmreg*,xmmrm64|er [rvm:t1s: evex.nds.lig.f2.0f.w1 5c /r ] AVX512,FUTURE */ + /* 241(f1 ff 08) 306 001(5c) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VSUBSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+44311, 545, 6801}, + /* 6683 : VSUBSS xmmreg|mask|z,xmmreg*,xmmrm32|er [rvm:t1s: evex.nds.lig.f3.0f.w0 5c /r ] AVX512,FUTURE */ + /* 241(f1 7e 08) 306 001(5c) 120 : LIG,EVEX,PROT,AVX512,FUTURE */ + {I_VSUBSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+44329, 545, 6802}, + /* 6684 : VUCOMISD xmmreg,xmmrm64|sae [rm:t1s: evex.lig.66.0f.w1 2e /r ] FL,AVX512,FUTURE */ + /* 250(f1 fd 08) 306 001(2e) 110 : LIG,FL,EVEX,PROT,AVX512,FUTURE */ + {I_VUCOMISD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+44347, 548, 6803}, + /* 6685 : VUCOMISS xmmreg,xmmrm32|sae [rm:t1s: evex.lig.0f.w0 2e /r ] FL,AVX512,FUTURE */ + /* 250(f1 7c 08) 306 001(2e) 110 : LIG,FL,EVEX,PROT,AVX512,FUTURE */ + {I_VUCOMISS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+44356, 548, 6804}, + /* 6686 : VUNPCKHPD xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f.w1 15 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(15) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VUNPCKHPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+44365, 543, 6805}, + /* 6687 : VUNPCKHPD ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f.w1 15 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(15) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VUNPCKHPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+44383, 543, 6806}, + /* 6688 : VUNPCKHPD zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f.w1 15 /r ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(15) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VUNPCKHPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+44401, 544, 6807}, + /* 6689 : VUNPCKHPS xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.0f.w0 15 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(15) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VUNPCKHPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+44419, 543, 6808}, + /* 6690 : VUNPCKHPS ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.0f.w0 15 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(15) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VUNPCKHPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+44437, 543, 6809}, + /* 6691 : VUNPCKHPS zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.0f.w0 15 /r ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(15) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VUNPCKHPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+44455, 544, 6810}, + /* 6692 : VUNPCKLPD xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f.w1 14 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 08) 301 001(14) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VUNPCKLPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+44473, 543, 6811}, + /* 6693 : VUNPCKLPD ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f.w1 14 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 fd 28) 301 001(14) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VUNPCKLPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+44491, 543, 6812}, + /* 6694 : VUNPCKLPD zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f.w1 14 /r ] AVX512,FUTURE */ + /* 241(f1 fd 48) 301 001(14) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VUNPCKLPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+44509, 544, 6813}, + /* 6695 : VUNPCKLPS xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.0f.w0 14 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 08) 301 001(14) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VUNPCKLPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+44527, 543, 6814}, + /* 6696 : VUNPCKLPS ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.0f.w0 14 /r ] AVX512,AVX512VL,FUTURE */ + /* 241(f1 7c 28) 301 001(14) 120 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VUNPCKLPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+44545, 543, 6815}, + /* 6697 : VUNPCKLPS zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.0f.w0 14 /r ] AVX512,FUTURE */ + /* 241(f1 7c 48) 301 001(14) 120 : EVEX,PROT,AVX512,FUTURE */ + {I_VUNPCKLPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+44563, 544, 6816}, + /* 6698 : VXORPD xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.nds.128.66.0f.w1 57 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 241(f1 fd 08) 301 001(57) 120 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VXORPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+44581, 546, 6817}, + /* 6699 : VXORPD ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.nds.256.66.0f.w1 57 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 241(f1 fd 28) 301 001(57) 120 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VXORPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+44599, 546, 6818}, + /* 6700 : VXORPD zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.nds.512.66.0f.w1 57 /r ] AVX512DQ,FUTURE */ + /* 241(f1 fd 48) 301 001(57) 120 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VXORPD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+44617, 547, 6819}, + /* 6701 : VXORPS xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.0f.w0 57 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 241(f1 7c 08) 301 001(57) 120 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VXORPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+44635, 546, 6820}, + /* 6702 : VXORPS ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.0f.w0 57 /r ] AVX512VL,AVX512DQ,FUTURE */ + /* 241(f1 7c 28) 301 001(57) 120 : EVEX,PROT,AVX512VL,AVX512DQ,FUTURE */ + {I_VXORPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+44653, 546, 6821}, + /* 6703 : VXORPS zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.0f.w0 57 /r ] AVX512DQ,FUTURE */ + /* 241(f1 7c 48) 301 001(57) 120 : EVEX,PROT,AVX512DQ,FUTURE */ + {I_VXORPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+44671, 547, 6822}, + /* 6704 : RDPKRU void [ 0f 01 ee ] LONG,PROT,PKU,X86_64 */ + /* 355 002(01 ee) : LONG,PROT,PKU,X86_64 */ + {I_RDPKRU, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70162, 568, 6826}, + /* 6705 : WRPKRU void [ 0f 01 ef ] LONG,PROT,PKU,X86_64 */ + /* 355 002(01 ef) : LONG,PROT,PKU,X86_64 */ + {I_WRPKRU, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70168, 568, 6827}, + /* 6706 : PTWRITE rm32 [m: f3 o32 0f ae /4 ] PTWRITE,FUTURE */ + /* 333 321 355 001(ae) 204 : PTWRITE,FUTURE */ + {I_PTWRITE, 1, {RM_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+65883, 569, 6833}, + /* 6707 : PTWRITE rm64 [m: f3 o64 0f ae /4 ] AR0,SX,LONG,PROT,PTWRITE,X86_64 */ + /* 333 324 355 001(ae) 204 : AR0,SX,LONG,PROT,PTWRITE,X86_64 */ + {I_PTWRITE, 1, {RM_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+65890, 570, 6834}, + /* 6708 : CLDEMOTE mem [m: np 0f 1c /0 ] CLDEMOTE,FUTURE */ + /* 360 355 001(1c) 200 : CLDEMOTE,FUTURE */ + {I_CLDEMOTE, 1, {MEMORY,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70065, 571, 6838}, + /* 6709 : MOVDIRI mem32,reg32 [mr: np o32 0f38 f9 /r ] MOVDIRI,FUTURE */ + /* 360 321 356 001(f9) 101 : NOAPX,MOVDIRI,FUTURE */ + {I_MOVDIRI, 2, {MEMORY|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65897, 572, 6839}, + /* 6710 : MOVDIRI mem64,reg64 [mr: np o64 0f38 f9 /r ] LONG,PROT,MOVDIRI,X86_64 */ + /* 360 324 356 001(f9) 101 : NOAPX,LONG,PROT,MOVDIRI,X86_64 */ + {I_MOVDIRI, 2, {MEMORY|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65904, 573, 6840}, + /* 6711 : MOVDIRI mem32,reg32 [mr: evex.nd0.nf0.np.l0.m4.w0 f9 /r ] LONG,PROT,APX,MOVDIRI,X86_64 */ + /* 250(f4 7c 08) 300 001(f9) 101 : LONG,EVEX,PROT,APX,MOVDIRI,X86_64 */ + {I_MOVDIRI, 2, {MEMORY|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+44689, 574, 6841}, + /* 6712 : MOVDIRI mem64,reg64 [mr: evex.nd0.nf0.np.l0.m4.w1 f9 /r ] LONG,PROT,APX,MOVDIRI,X86_64 */ + /* 250(f4 fc 08) 300 001(f9) 101 : LONG,EVEX,PROT,APX,MOVDIRI,X86_64 */ + {I_MOVDIRI, 2, {MEMORY|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+44698, 574, 6842}, + /* 6713 : MOVDIR64B reg16,mem512 [rm: a16 66 0f38 f8 /r ] NOLONG,MOVDIR64B,FUTURE */ + /* 310 361 356 001(f8) 110 : NOREX,NOAPX,NOLONG,MOVDIR64B,FUTURE */ + {I_MOVDIR64B, 2, {REG_GPR|BITS16|RN_L16,MEMORY|BITS512|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65911, 575, 6843}, + /* 6714 : MOVDIR64B reg32,mem512 [rm: a32 66 0f38 f8 /r ] MOVDIR64B,FUTURE */ + /* 311 361 356 001(f8) 110 : NOAPX,MOVDIR64B,FUTURE */ + {I_MOVDIR64B, 2, {REG_GPR|BITS32|RN_L16,MEMORY|BITS512|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65918, 576, 6844}, + /* 6715 : MOVDIR64B reg64,mem512 [rm: a64 66 0f38 f8 /r ] LONG,PROT,MOVDIR64B,X86_64 */ + /* 313 361 356 001(f8) 110 : NOAPX,LONG,PROT,MOVDIR64B,X86_64 */ + {I_MOVDIR64B, 2, {REG_GPR|BITS64|RN_L16,MEMORY|BITS512|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+65925, 577, 6845}, + /* 6716 : MOVDIR64B reg64,mem512 [rm: evex.nd0.nf0.66.l0.m4.w1 f8 /r ] LONG,PROT,APX,MOVDIR64B,X86_64 */ + /* 250(f4 fd 08) 300 001(f8) 110 : LONG,EVEX,PROT,APX,MOVDIR64B,X86_64 */ + {I_MOVDIR64B, 2, {REG_GPR|BITS64,MEMORY|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+44707, 578, 6846}, + /* 6717 : PCONFIG void [ np 0f 01 c5 ] FL,PCONFIG,FUTURE */ + /* 360 355 002(01 c5) : FL,PCONFIG,FUTURE */ + {I_PCONFIG, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70071, 579, 6847}, + /* 6718 : PBNDKB void [ np 0f 01 c7 ] PBNDKB,FUTURE */ + /* 360 355 002(01 c7) : PBNDKB,FUTURE */ + {I_PBNDKB, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70077, 580, 6850}, + /* 6719 : PREFETCHRST2 mem8 [m: 0f 18 /4 ] MOVRS,FUTURE */ + /* 355 001(18) 204 : MOVRS,FUTURE */ + {I_PREFETCHRST2, 1, {MEMORY|BITS8,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70270, 581, 6851}, + /* 6720 : GF2P8AFFINEINVQB xmmreg,xmmrm128,imm8 [rmi: 66 0f3a cf /r ib ] SSE,GFNI,FUTURE */ + /* 361 357 001(cf) 110 022 : NOAPX,SSE,GFNI,FUTURE */ + {I_GF2P8AFFINEINVQB, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+65932, 582, 6855}, + /* 6721 : VGF2P8AFFINEINVQB xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: vex.nds.128.66.0f3a.w1 cf /r ib ] AVX,GFNI,FUTURE */ + /* 261(003 201) 001(cf) 120 023 : NOAPX,VEX,AVX,GFNI,FUTURE */ + {I_VGF2P8AFFINEINVQB, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+54779, 583, 6856}, + /* 6722 : VGF2P8AFFINEINVQB ymmreg,ymmreg*,ymmrm256,imm8 [rvmi: vex.nds.256.66.0f3a.w1 cf /r ib ] AVX,GFNI,FUTURE */ + /* 261(003 205) 001(cf) 120 023 : NOAPX,VEX,AVX,GFNI,FUTURE */ + {I_VGF2P8AFFINEINVQB, 4, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+54795, 583, 6857}, + /* 6723 : VGF2P8AFFINEINVQB xmmreg|mask|z,xmmreg*,xmmrm128|b64,imm8 [rvmi:fv: evex.nds.128.66.0f3a.w1 cf /r ib ] AVX512VL,GFNI,FUTURE */ + /* 241(f3 fd 08) 301 001(cf) 120 023 : EVEX,PROT,AVX512VL,GFNI,FUTURE */ + {I_VGF2P8AFFINEINVQB, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22163, 584, 6858}, + /* 6724 : VGF2P8AFFINEINVQB ymmreg|mask|z,ymmreg*,ymmrm256|b64,imm8 [rvmi:fv: evex.nds.256.66.0f3a.w1 cf /r ib ] AVX512VL,GFNI,FUTURE */ + /* 241(f3 fd 28) 301 001(cf) 120 023 : EVEX,PROT,AVX512VL,GFNI,FUTURE */ + {I_VGF2P8AFFINEINVQB, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22183, 584, 6859}, + /* 6725 : VGF2P8AFFINEINVQB zmmreg|mask|z,zmmreg*,zmmrm512|b64,imm8 [rvmi:fv: evex.nds.512.66.0f3a.w1 cf /r ib ] AVX512,GFNI,FUTURE */ + /* 241(f3 fd 48) 301 001(cf) 120 023 : EVEX,PROT,AVX512,GFNI,FUTURE */ + {I_VGF2P8AFFINEINVQB, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22203, 585, 6860}, + /* 6726 : GF2P8AFFINEQB xmmreg,xmmrm128,imm8 [rmi: 66 0f3a ce /r ib ] SSE,GFNI,FUTURE */ + /* 361 357 001(ce) 110 022 : NOAPX,SSE,GFNI,FUTURE */ + {I_GF2P8AFFINEQB, 3, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+65939, 582, 6861}, + /* 6727 : VGF2P8AFFINEQB xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: vex.nds.128.66.0f3a.w1 ce /r ib ] AVX,GFNI,FUTURE */ + /* 261(003 201) 001(ce) 120 023 : NOAPX,VEX,AVX,GFNI,FUTURE */ + {I_VGF2P8AFFINEQB, 4, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+54811, 583, 6862}, + /* 6728 : VGF2P8AFFINEQB ymmreg,ymmreg*,ymmrm256,imm8 [rvmi: vex.nds.256.66.0f3a.w1 ce /r ib ] AVX,GFNI,FUTURE */ + /* 261(003 205) 001(ce) 120 023 : NOAPX,VEX,AVX,GFNI,FUTURE */ + {I_VGF2P8AFFINEQB, 4, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,IMM_NORMAL|BITS8,0}, NO_DECORATOR, nasm_bytecodes+54827, 583, 6863}, + /* 6729 : VGF2P8AFFINEQB xmmreg|mask|z,xmmreg*,xmmrm128|b64,imm8 [rvmi:fv: evex.nds.128.66.0f3a.w1 ce /r ib ] AVX512VL,GFNI,FUTURE */ + /* 241(f3 fd 08) 301 001(ce) 120 023 : EVEX,PROT,AVX512VL,GFNI,FUTURE */ + {I_VGF2P8AFFINEQB, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22223, 584, 6864}, + /* 6730 : VGF2P8AFFINEQB ymmreg|mask|z,ymmreg*,ymmrm256|b64,imm8 [rvmi:fv: evex.nds.256.66.0f3a.w1 ce /r ib ] AVX512VL,GFNI,FUTURE */ + /* 241(f3 fd 28) 301 001(ce) 120 023 : EVEX,PROT,AVX512VL,GFNI,FUTURE */ + {I_VGF2P8AFFINEQB, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22243, 584, 6865}, + /* 6731 : VGF2P8AFFINEQB zmmreg|mask|z,zmmreg*,zmmrm512|b64,imm8 [rvmi:fv: evex.nds.512.66.0f3a.w1 ce /r ib ] AVX512,GFNI,FUTURE */ + /* 241(f3 fd 48) 301 001(ce) 120 023 : EVEX,PROT,AVX512,GFNI,FUTURE */ + {I_VGF2P8AFFINEQB, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22263, 585, 6866}, + /* 6732 : GF2P8MULB xmmreg,xmmrm128 [rm: 66 0f38 cf /r ] SSE,GFNI,FUTURE */ + /* 361 356 001(cf) 110 : NOAPX,SSE,GFNI,FUTURE */ + {I_GF2P8MULB, 2, {XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+70083, 582, 6867}, + /* 6733 : VGF2P8MULB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38.w0 cf /r ] AVX,GFNI,FUTURE */ + /* 261(002 001) 001(cf) 120 : NOAPX,VEX,AVX,GFNI,FUTURE */ + {I_VGF2P8MULB, 3, {XMMREG|RN_L16,XMMREG|RN_L16,RM_XMM|BITS128|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65946, 583, 6868}, + /* 6734 : VGF2P8MULB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38.w0 cf /r ] AVX,GFNI,FUTURE */ + /* 261(002 005) 001(cf) 120 : NOAPX,VEX,AVX,GFNI,FUTURE */ + {I_VGF2P8MULB, 3, {YMMREG|RN_L16,YMMREG|RN_L16,RM_YMM|BITS256|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+65960, 583, 6869}, + /* 6735 : VGF2P8MULB xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f38.w0 cf /r ] AVX512VL,GFNI,FUTURE */ + /* 241(f2 7d 08) 303 001(cf) 120 : EVEX,PROT,AVX512VL,GFNI,FUTURE */ + {I_VGF2P8MULB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+44716, 584, 6870}, + /* 6736 : VGF2P8MULB ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f38.w0 cf /r ] AVX512VL,GFNI,FUTURE */ + /* 241(f2 7d 28) 303 001(cf) 120 : EVEX,PROT,AVX512VL,GFNI,FUTURE */ + {I_VGF2P8MULB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+44734, 584, 6871}, + /* 6737 : VGF2P8MULB zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f38.w0 cf /r ] AVX512,GFNI,FUTURE */ + /* 241(f2 7d 48) 303 001(cf) 120 : EVEX,PROT,AVX512,GFNI,FUTURE */ + {I_VGF2P8MULB, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+44752, 585, 6872}, + /* 6738 : VPCOMPRESSB mem128|mask,xmmreg [mr:t1s8: evex.128.66.0f38.w0 63 /r ] AVX512VL,AVX512VBMI2,FUTURE */ + /* 250(f2 7d 08) 304 001(63) 101 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPCOMPRESSB, 2, {MEMORY|BITS128,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+44770, 586, 6875}, + /* 6739 : VPCOMPRESSB mem256|mask,ymmreg [mr:t1s8: evex.256.66.0f38.w0 63 /r ] AVX512VL,AVX512VBMI2,FUTURE */ + /* 250(f2 7d 28) 304 001(63) 101 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPCOMPRESSB, 2, {MEMORY|BITS256,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+44779, 586, 6876}, + /* 6740 : VPCOMPRESSB mem512|mask,zmmreg [mr:t1s8: evex.512.66.0f38.w0 63 /r ] AVX512VBMI2,FUTURE */ + /* 250(f2 7d 48) 304 001(63) 101 : EVEX,PROT,AVX512VBMI2,FUTURE */ + {I_VPCOMPRESSB, 2, {MEMORY|BITS512,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+44788, 587, 6877}, + /* 6741 : VPCOMPRESSB xmmreg|mask|z,xmmreg [mr: evex.128.66.0f38.w0 63 /r ] AVX512VL,AVX512VBMI2,FUTURE */ + /* 250(f2 7d 08) 300 001(63) 101 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPCOMPRESSB, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+44797, 586, 6878}, + /* 6742 : VPCOMPRESSB ymmreg|mask|z,ymmreg [mr: evex.256.66.0f38.w0 63 /r ] AVX512VL,AVX512VBMI2,FUTURE */ + /* 250(f2 7d 28) 300 001(63) 101 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPCOMPRESSB, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+44806, 586, 6879}, + /* 6743 : VPCOMPRESSB zmmreg|mask|z,zmmreg [mr: evex.512.66.0f38.w0 63 /r ] AVX512VBMI2,FUTURE */ + /* 250(f2 7d 48) 300 001(63) 101 : EVEX,PROT,AVX512VBMI2,FUTURE */ + {I_VPCOMPRESSB, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+44815, 587, 6880}, + /* 6744 : VPCOMPRESSW mem128|mask,xmmreg [mr:t1s16: evex.128.66.0f38.w1 63 /r ] AVX512VL,AVX512VBMI2,FUTURE */ + /* 250(f2 fd 08) 305 001(63) 101 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPCOMPRESSW, 2, {MEMORY|BITS128,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+44824, 586, 6881}, + /* 6745 : VPCOMPRESSW mem256|mask,ymmreg [mr:t1s16: evex.256.66.0f38.w1 63 /r ] AVX512VL,AVX512VBMI2,FUTURE */ + /* 250(f2 fd 28) 305 001(63) 101 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPCOMPRESSW, 2, {MEMORY|BITS256,YMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+44833, 586, 6882}, + /* 6746 : VPCOMPRESSW mem512|mask,zmmreg [mr:t1s16: evex.512.66.0f38.w1 63 /r ] AVX512VBMI2,FUTURE */ + /* 250(f2 fd 48) 305 001(63) 101 : EVEX,PROT,AVX512VBMI2,FUTURE */ + {I_VPCOMPRESSW, 2, {MEMORY|BITS512,ZMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+44842, 587, 6883}, + /* 6747 : VPCOMPRESSW xmmreg|mask|z,xmmreg [mr: evex.128.66.0f38.w1 63 /r ] AVX512VL,AVX512VBMI2,FUTURE */ + /* 250(f2 fd 08) 300 001(63) 101 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPCOMPRESSW, 2, {XMMREG,XMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+44851, 586, 6884}, + /* 6748 : VPCOMPRESSW ymmreg|mask|z,ymmreg [mr: evex.256.66.0f38.w1 63 /r ] AVX512VL,AVX512VBMI2,FUTURE */ + /* 250(f2 fd 28) 300 001(63) 101 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPCOMPRESSW, 2, {YMMREG,YMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+44860, 586, 6885}, + /* 6749 : VPCOMPRESSW zmmreg|mask|z,zmmreg [mr: evex.512.66.0f38.w1 63 /r ] AVX512VBMI2,FUTURE */ + /* 250(f2 fd 48) 300 001(63) 101 : EVEX,PROT,AVX512VBMI2,FUTURE */ + {I_VPCOMPRESSW, 2, {ZMMREG,ZMMREG,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+44869, 587, 6886}, + /* 6750 : VPEXPANDB xmmreg|mask|z,xmmrm128 [rm:t1s8: evex.128.66.0f38.w0 62 /r ] AVX512VL,AVX512VBMI2,FUTURE */ + /* 250(f2 7d 08) 304 001(62) 110 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPEXPANDB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+44878, 586, 6887}, + /* 6751 : VPEXPANDB ymmreg|mask|z,ymmrm256 [rm:t1s8: evex.256.66.0f38.w0 62 /r ] AVX512VL,AVX512VBMI2,FUTURE */ + /* 250(f2 7d 28) 304 001(62) 110 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPEXPANDB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+44887, 586, 6888}, + /* 6752 : VPEXPANDB zmmreg|mask|z,zmmrm512 [rm:t1s8: evex.512.66.0f38.w0 62 /r ] AVX512VBMI2,FUTURE */ + /* 250(f2 7d 48) 304 001(62) 110 : EVEX,PROT,AVX512VBMI2,FUTURE */ + {I_VPEXPANDB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+44896, 587, 6889}, + /* 6753 : VPEXPANDW xmmreg|mask|z,xmmrm128 [rm:t1s16: evex.128.66.0f38.w1 62 /r ] AVX512VL,AVX512VBMI2,FUTURE */ + /* 250(f2 fd 08) 305 001(62) 110 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPEXPANDW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+44905, 586, 6890}, + /* 6754 : VPEXPANDW ymmreg|mask|z,ymmrm256 [rm:t1s16: evex.256.66.0f38.w1 62 /r ] AVX512VL,AVX512VBMI2,FUTURE */ + /* 250(f2 fd 28) 305 001(62) 110 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPEXPANDW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+44914, 586, 6891}, + /* 6755 : VPEXPANDW zmmreg|mask|z,zmmrm512 [rm:t1s16: evex.512.66.0f38.w1 62 /r ] AVX512VBMI2,FUTURE */ + /* 250(f2 fd 48) 305 001(62) 110 : EVEX,PROT,AVX512VBMI2,FUTURE */ + {I_VPEXPANDW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+44923, 587, 6892}, + /* 6756 : VPSHLDW xmmreg|mask|z,xmmreg*,xmmrm128,imm8 [rvmi:fvm: evex.nds.128.66.0f3a.w1 70 /r ib ] AVX512VL,AVX512VBMI2,FUTURE */ + /* 241(f3 fd 08) 303 001(70) 120 023 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPSHLDW, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22283, 586, 6893}, + /* 6757 : VPSHLDW ymmreg|mask|z,ymmreg*,ymmrm256,imm8 [rvmi:fvm: evex.nds.256.66.0f3a.w1 70 /r ib ] AVX512VL,AVX512VBMI2,FUTURE */ + /* 241(f3 fd 28) 303 001(70) 120 023 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPSHLDW, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22303, 586, 6894}, + /* 6758 : VPSHLDW zmmreg|mask|z,zmmreg*,zmmrm512,imm8 [rvmi:fvm: evex.nds.512.66.0f3a.w1 70 /r ib ] AVX512VBMI2,FUTURE */ + /* 241(f3 fd 48) 303 001(70) 120 023 : EVEX,PROT,AVX512VBMI2,FUTURE */ + {I_VPSHLDW, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22323, 587, 6895}, + /* 6759 : VPSHLDD xmmreg|mask|z,xmmreg*,xmmrm128|b32,imm8 [rvmi:fv: evex.nds.128.66.0f3a.w0 71 /r ib ] AVX512VL,AVX512VBMI2,FUTURE */ + /* 241(f3 7d 08) 301 001(71) 120 023 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPSHLDD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22343, 586, 6896}, + /* 6760 : VPSHLDD ymmreg|mask|z,ymmreg*,ymmrm256|b32,imm8 [rvmi:fv: evex.nds.256.66.0f3a.w0 71 /r ib ] AVX512VL,AVX512VBMI2,FUTURE */ + /* 241(f3 7d 28) 301 001(71) 120 023 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPSHLDD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22363, 586, 6897}, + /* 6761 : VPSHLDD zmmreg|mask|z,zmmreg*,zmmrm512|b32,imm8 [rvmi:fv: evex.nds.512.66.0f3a.w0 71 /r ib ] AVX512VBMI2,FUTURE */ + /* 241(f3 7d 48) 301 001(71) 120 023 : EVEX,PROT,AVX512VBMI2,FUTURE */ + {I_VPSHLDD, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22383, 587, 6898}, + /* 6762 : VPSHLDQ xmmreg|mask|z,xmmreg*,xmmrm128|b64,imm8 [rvmi:fv: evex.nds.128.66.0f3a.w1 71 /r ib ] AVX512VL,AVX512VBMI2,FUTURE */ + /* 241(f3 fd 08) 301 001(71) 120 023 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPSHLDQ, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22403, 586, 6899}, + /* 6763 : VPSHLDQ ymmreg|mask|z,ymmreg*,ymmrm256|b64,imm8 [rvmi:fv: evex.nds.256.66.0f3a.w1 71 /r ib ] AVX512VL,AVX512VBMI2,FUTURE */ + /* 241(f3 fd 28) 301 001(71) 120 023 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPSHLDQ, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22423, 586, 6900}, + /* 6764 : VPSHLDQ zmmreg|mask|z,zmmreg*,zmmrm512|b64,imm8 [rvmi:fv: evex.nds.512.66.0f3a.w1 71 /r ib ] AVX512VBMI2,FUTURE */ + /* 241(f3 fd 48) 301 001(71) 120 023 : EVEX,PROT,AVX512VBMI2,FUTURE */ + {I_VPSHLDQ, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22443, 587, 6901}, + /* 6765 : VPSHLDVW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.dds.128.66.0f38.w1 70 /r ] AVX512VL,AVX512VBMI2,FUTURE */ + /* 241(f2 fd 08) 303 001(70) 120 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPSHLDVW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+44932, 586, 6902}, + /* 6766 : VPSHLDVW ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.dds.256.66.0f38.w1 70 /r ] AVX512VL,AVX512VBMI2,FUTURE */ + /* 241(f2 fd 28) 303 001(70) 120 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPSHLDVW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+44950, 586, 6903}, + /* 6767 : VPSHLDVW zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.dds.512.66.0f38.w1 70 /r ] AVX512VBMI2,FUTURE */ + /* 241(f2 fd 48) 303 001(70) 120 : EVEX,PROT,AVX512VBMI2,FUTURE */ + {I_VPSHLDVW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+44968, 587, 6904}, + /* 6768 : VPSHLDVD xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.dds.128.66.0f38.w0 71 /r ] AVX512VL,AVX512VBMI2,FUTURE */ + /* 241(f2 7d 08) 301 001(71) 120 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPSHLDVD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+44986, 586, 6905}, + /* 6769 : VPSHLDVD ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.dds.256.66.0f38.w0 71 /r ] AVX512VL,AVX512VBMI2,FUTURE */ + /* 241(f2 7d 28) 301 001(71) 120 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPSHLDVD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+45004, 586, 6906}, + /* 6770 : VPSHLDVD zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.dds.512.66.0f38.w0 71 /r ] AVX512VBMI2,FUTURE */ + /* 241(f2 7d 48) 301 001(71) 120 : EVEX,PROT,AVX512VBMI2,FUTURE */ + {I_VPSHLDVD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+45022, 587, 6907}, + /* 6771 : VPSHLDVQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.dds.128.66.0f38.w1 71 /r ] AVX512VL,AVX512VBMI2,FUTURE */ + /* 241(f2 fd 08) 301 001(71) 120 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPSHLDVQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+45040, 586, 6908}, + /* 6772 : VPSHLDVQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.dds.256.66.0f38.w1 71 /r ] AVX512VL,AVX512VBMI2,FUTURE */ + /* 241(f2 fd 28) 301 001(71) 120 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPSHLDVQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+45058, 586, 6909}, + /* 6773 : VPSHLDVQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.dds.512.66.0f38.w1 71 /r ] AVX512VBMI2,FUTURE */ + /* 241(f2 fd 48) 301 001(71) 120 : EVEX,PROT,AVX512VBMI2,FUTURE */ + {I_VPSHLDVQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+45076, 587, 6910}, + /* 6774 : VPSHRDW xmmreg|mask|z,xmmreg*,xmmrm128,imm8 [rvmi:fvm: evex.nds.128.66.0f3a.w1 72 /r ib ] AVX512VL,AVX512VBMI2,FUTURE */ + /* 241(f3 fd 08) 303 001(72) 120 023 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPSHRDW, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22463, 586, 6911}, + /* 6775 : VPSHRDW ymmreg|mask|z,ymmreg*,ymmrm256,imm8 [rvmi:fvm: evex.nds.256.66.0f3a.w1 72 /r ib ] AVX512VL,AVX512VBMI2,FUTURE */ + /* 241(f3 fd 28) 303 001(72) 120 023 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPSHRDW, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22483, 586, 6912}, + /* 6776 : VPSHRDW zmmreg|mask|z,zmmreg*,zmmrm512,imm8 [rvmi:fvm: evex.nds.512.66.0f3a.w1 72 /r ib ] AVX512VBMI2,FUTURE */ + /* 241(f3 fd 48) 303 001(72) 120 023 : EVEX,PROT,AVX512VBMI2,FUTURE */ + {I_VPSHRDW, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+22503, 587, 6913}, + /* 6777 : VPSHRDD xmmreg|mask|z,xmmreg*,xmmrm128|b32,imm8 [rvmi:fv: evex.nds.128.66.0f3a.w0 73 /r ib ] AVX512VL,AVX512VBMI2,FUTURE */ + /* 241(f3 7d 08) 301 001(73) 120 023 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPSHRDD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22523, 586, 6914}, + /* 6778 : VPSHRDD ymmreg|mask|z,ymmreg*,ymmrm256|b32,imm8 [rvmi:fv: evex.nds.256.66.0f3a.w0 73 /r ib ] AVX512VL,AVX512VBMI2,FUTURE */ + /* 241(f3 7d 28) 301 001(73) 120 023 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPSHRDD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22543, 586, 6915}, + /* 6779 : VPSHRDD zmmreg|mask|z,zmmreg*,zmmrm512|b32,imm8 [rvmi:fv: evex.nds.512.66.0f3a.w0 73 /r ib ] AVX512VBMI2,FUTURE */ + /* 241(f3 7d 48) 301 001(73) 120 023 : EVEX,PROT,AVX512VBMI2,FUTURE */ + {I_VPSHRDD, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+22563, 587, 6916}, + /* 6780 : VPSHRDQ xmmreg|mask|z,xmmreg*,xmmrm128|b64,imm8 [rvmi:fv: evex.nds.128.66.0f3a.w1 73 /r ib ] AVX512VL,AVX512VBMI2,FUTURE */ + /* 241(f3 fd 08) 301 001(73) 120 023 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPSHRDQ, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22583, 586, 6917}, + /* 6781 : VPSHRDQ ymmreg|mask|z,ymmreg*,ymmrm256|b64,imm8 [rvmi:fv: evex.nds.256.66.0f3a.w1 73 /r ib ] AVX512VL,AVX512VBMI2,FUTURE */ + /* 241(f3 fd 28) 301 001(73) 120 023 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPSHRDQ, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22603, 586, 6918}, + /* 6782 : VPSHRDQ zmmreg|mask|z,zmmreg*,zmmrm512|b64,imm8 [rvmi:fv: evex.nds.512.66.0f3a.w1 73 /r ib ] AVX512VBMI2,FUTURE */ + /* 241(f3 fd 48) 301 001(73) 120 023 : EVEX,PROT,AVX512VBMI2,FUTURE */ + {I_VPSHRDQ, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+22623, 587, 6919}, + /* 6783 : VPSHRDVW xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.dds.128.66.0f38.w1 72 /r ] AVX512VL,AVX512VBMI2,FUTURE */ + /* 241(f2 fd 08) 303 001(72) 120 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPSHRDVW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+45094, 586, 6920}, + /* 6784 : VPSHRDVW ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.dds.256.66.0f38.w1 72 /r ] AVX512VL,AVX512VBMI2,FUTURE */ + /* 241(f2 fd 28) 303 001(72) 120 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPSHRDVW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+45112, 586, 6921}, + /* 6785 : VPSHRDVW zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.dds.512.66.0f38.w1 72 /r ] AVX512VBMI2,FUTURE */ + /* 241(f2 fd 48) 303 001(72) 120 : EVEX,PROT,AVX512VBMI2,FUTURE */ + {I_VPSHRDVW, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+45130, 587, 6922}, + /* 6786 : VPSHRDVD xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.dds.128.66.0f38.w0 73 /r ] AVX512VL,AVX512VBMI2,FUTURE */ + /* 241(f2 7d 08) 301 001(73) 120 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPSHRDVD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+45148, 586, 6923}, + /* 6787 : VPSHRDVD ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.dds.256.66.0f38.w0 73 /r ] AVX512VL,AVX512VBMI2,FUTURE */ + /* 241(f2 7d 28) 301 001(73) 120 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPSHRDVD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+45166, 586, 6924}, + /* 6788 : VPSHRDVD zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.dds.512.66.0f38.w0 73 /r ] AVX512VBMI2,FUTURE */ + /* 241(f2 7d 48) 301 001(73) 120 : EVEX,PROT,AVX512VBMI2,FUTURE */ + {I_VPSHRDVD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+45184, 587, 6925}, + /* 6789 : VPSHRDVQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvm:fv: evex.dds.128.66.0f38.w1 73 /r ] AVX512VL,AVX512VBMI2,FUTURE */ + /* 241(f2 fd 08) 301 001(73) 120 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPSHRDVQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+45202, 586, 6926}, + /* 6790 : VPSHRDVQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvm:fv: evex.dds.256.66.0f38.w1 73 /r ] AVX512VL,AVX512VBMI2,FUTURE */ + /* 241(f2 fd 28) 301 001(73) 120 : EVEX,PROT,AVX512VL,AVX512VBMI2,FUTURE */ + {I_VPSHRDVQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+45220, 586, 6927}, + /* 6791 : VPSHRDVQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvm:fv: evex.dds.512.66.0f38.w1 73 /r ] AVX512VBMI2,FUTURE */ + /* 241(f2 fd 48) 301 001(73) 120 : EVEX,PROT,AVX512VBMI2,FUTURE */ + {I_VPSHRDVQ, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+45238, 587, 6928}, + /* 6792 : VPDPBUSD xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.dds.128.66.0f38.w0 50 /r ] AVX512VL,AVX512VNNI,FUTURE */ + /* 241(f2 7d 08) 301 001(50) 120 : EVEX,PROT,AVX512VL,AVX512VNNI,FUTURE */ + {I_VPDPBUSD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+45256, 588, 6931}, + /* 6793 : VPDPBUSD ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.dds.256.66.0f38.w0 50 /r ] AVX512VL,AVX512VNNI,FUTURE */ + /* 241(f2 7d 28) 301 001(50) 120 : EVEX,PROT,AVX512VL,AVX512VNNI,FUTURE */ + {I_VPDPBUSD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+45274, 588, 6932}, + /* 6794 : VPDPBUSD zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.dds.512.66.0f38.w0 50 /r ] AVX512VNNI,FUTURE */ + /* 241(f2 7d 48) 301 001(50) 120 : EVEX,PROT,AVX512VNNI,FUTURE */ + {I_VPDPBUSD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+45292, 589, 6933}, + /* 6795 : VPDPBUSDS xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.dds.128.66.0f38.w0 51 /r ] AVX512VL,AVX512VNNI,FUTURE */ + /* 241(f2 7d 08) 301 001(51) 120 : EVEX,PROT,AVX512VL,AVX512VNNI,FUTURE */ + {I_VPDPBUSDS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+45310, 588, 6934}, + /* 6796 : VPDPBUSDS ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.dds.256.66.0f38.w0 51 /r ] AVX512VL,AVX512VNNI,FUTURE */ + /* 241(f2 7d 28) 301 001(51) 120 : EVEX,PROT,AVX512VL,AVX512VNNI,FUTURE */ + {I_VPDPBUSDS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+45328, 588, 6935}, + /* 6797 : VPDPBUSDS zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.dds.512.66.0f38.w0 51 /r ] AVX512VNNI,FUTURE */ + /* 241(f2 7d 48) 301 001(51) 120 : EVEX,PROT,AVX512VNNI,FUTURE */ + {I_VPDPBUSDS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+45346, 589, 6936}, + /* 6798 : VPDPWSSD xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.dds.128.66.0f38.w0 52 /r ] AVX512VL,AVX512VNNI,FUTURE */ + /* 241(f2 7d 08) 301 001(52) 120 : EVEX,PROT,AVX512VL,AVX512VNNI,FUTURE */ + {I_VPDPWSSD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+45364, 588, 6937}, + /* 6799 : VPDPWSSD ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.dds.256.66.0f38.w0 52 /r ] AVX512VL,AVX512VNNI,FUTURE */ + /* 241(f2 7d 28) 301 001(52) 120 : EVEX,PROT,AVX512VL,AVX512VNNI,FUTURE */ + {I_VPDPWSSD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+45382, 588, 6938}, + /* 6800 : VPDPWSSD zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.dds.512.66.0f38.w0 52 /r ] AVX512VNNI,FUTURE */ + /* 241(f2 7d 48) 301 001(52) 120 : EVEX,PROT,AVX512VNNI,FUTURE */ + {I_VPDPWSSD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+45400, 589, 6939}, + /* 6801 : VPDPWSSDS xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.dds.128.66.0f38.w0 53 /r ] AVX512VL,AVX512VNNI,FUTURE */ + /* 241(f2 7d 08) 301 001(53) 120 : EVEX,PROT,AVX512VL,AVX512VNNI,FUTURE */ + {I_VPDPWSSDS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+45418, 588, 6940}, + /* 6802 : VPDPWSSDS ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.dds.256.66.0f38.w0 53 /r ] AVX512VL,AVX512VNNI,FUTURE */ + /* 241(f2 7d 28) 301 001(53) 120 : EVEX,PROT,AVX512VL,AVX512VNNI,FUTURE */ + {I_VPDPWSSDS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+45436, 588, 6941}, + /* 6803 : VPDPWSSDS zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.dds.512.66.0f38.w0 53 /r ] AVX512VNNI,FUTURE */ + /* 241(f2 7d 48) 301 001(53) 120 : EVEX,PROT,AVX512VNNI,FUTURE */ + {I_VPDPWSSDS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+45454, 589, 6942}, + /* 6804 : VPOPCNTB xmmreg|mask|z,xmmrm128 [rm:fvm: evex.128.66.0f38.w0 54 /r ] AVX512VL,AVX512BITALG,FUTURE */ + /* 250(f2 7d 08) 303 001(54) 110 : EVEX,PROT,AVX512VL,AVX512BITALG,FUTURE */ + {I_VPOPCNTB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+45472, 590, 6945}, + /* 6805 : VPOPCNTB ymmreg|mask|z,ymmrm256 [rm:fvm: evex.256.66.0f38.w0 54 /r ] AVX512VL,AVX512BITALG,FUTURE */ + /* 250(f2 7d 28) 303 001(54) 110 : EVEX,PROT,AVX512VL,AVX512BITALG,FUTURE */ + {I_VPOPCNTB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+45481, 590, 6946}, + /* 6806 : VPOPCNTB zmmreg|mask|z,zmmrm512 [rm:fvm: evex.512.66.0f38.w0 54 /r ] AVX512BITALG,FUTURE */ + /* 250(f2 7d 48) 303 001(54) 110 : EVEX,PROT,AVX512BITALG,FUTURE */ + {I_VPOPCNTB, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+45490, 591, 6947}, + /* 6807 : VPOPCNTW xmmreg|mask|z,xmmrm128 [rm:fvm: evex.128.66.0f38.w1 54 /r ] AVX512VL,AVX512BITALG,FUTURE */ + /* 250(f2 fd 08) 303 001(54) 110 : EVEX,PROT,AVX512VL,AVX512BITALG,FUTURE */ + {I_VPOPCNTW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+45499, 590, 6948}, + /* 6808 : VPOPCNTW ymmreg|mask|z,ymmrm256 [rm:fvm: evex.256.66.0f38.w1 54 /r ] AVX512VL,AVX512BITALG,FUTURE */ + /* 250(f2 fd 28) 303 001(54) 110 : EVEX,PROT,AVX512VL,AVX512BITALG,FUTURE */ + {I_VPOPCNTW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+45508, 590, 6949}, + /* 6809 : VPOPCNTW zmmreg|mask|z,zmmrm512 [rm:fvm: evex.512.66.0f38.w1 54 /r ] AVX512BITALG,FUTURE */ + /* 250(f2 fd 48) 303 001(54) 110 : EVEX,PROT,AVX512BITALG,FUTURE */ + {I_VPOPCNTW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+45517, 591, 6950}, + /* 6810 : VPOPCNTD xmmreg|mask|z,xmmrm128 [rm:fv: evex.128.66.0f38.w0 55 /r ] AVX512VL,AVX512VPOPCNTDQ,FUTURE */ + /* 250(f2 7d 08) 301 001(55) 110 : EVEX,PROT,AVX512VL,AVX512VPOPCNTDQ,FUTURE */ + {I_VPOPCNTD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+45526, 592, 6951}, + /* 6811 : VPOPCNTD ymmreg|mask|z,ymmrm256 [rm:fv: evex.256.66.0f38.w0 55 /r ] AVX512VL,AVX512VPOPCNTDQ,FUTURE */ + /* 250(f2 7d 28) 301 001(55) 110 : EVEX,PROT,AVX512VL,AVX512VPOPCNTDQ,FUTURE */ + {I_VPOPCNTD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+45535, 592, 6952}, + /* 6812 : VPOPCNTD zmmreg|mask|z,zmmrm512 [rm:fv: evex.512.66.0f38.w0 55 /r ] AVX512VPOPCNTDQ,FUTURE */ + /* 250(f2 7d 48) 301 001(55) 110 : EVEX,PROT,AVX512VPOPCNTDQ,FUTURE */ + {I_VPOPCNTD, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+45544, 593, 6953}, + /* 6813 : VPOPCNTQ xmmreg|mask|z,xmmrm128 [rm:fv: evex.128.66.0f38.w1 55 /r ] AVX512VL,AVX512VPOPCNTDQ,FUTURE */ + /* 250(f2 fd 08) 301 001(55) 110 : EVEX,PROT,AVX512VL,AVX512VPOPCNTDQ,FUTURE */ + {I_VPOPCNTQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+45553, 592, 6954}, + /* 6814 : VPOPCNTQ ymmreg|mask|z,ymmrm256 [rm:fv: evex.256.66.0f38.w1 55 /r ] AVX512VL,AVX512VPOPCNTDQ,FUTURE */ + /* 250(f2 fd 28) 301 001(55) 110 : EVEX,PROT,AVX512VL,AVX512VPOPCNTDQ,FUTURE */ + {I_VPOPCNTQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+45562, 592, 6955}, + /* 6815 : VPOPCNTQ zmmreg|mask|z,zmmrm512 [rm:fv: evex.512.66.0f38.w1 55 /r ] AVX512VPOPCNTDQ,FUTURE */ + /* 250(f2 fd 48) 301 001(55) 110 : EVEX,PROT,AVX512VPOPCNTDQ,FUTURE */ + {I_VPOPCNTQ, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+45571, 593, 6956}, + /* 6816 : VPSHUFBITQMB kreg|mask,xmmreg,xmmrm128 [rvm:fvm: evex.nds.128.66.0f38.w0 8f /r ] AVX512VL,AVX512BITALG,FUTURE */ + /* 241(f2 7d 08) 303 001(8f) 120 : EVEX,PROT,AVX512VL,AVX512BITALG,FUTURE */ + {I_VPSHUFBITQMB, 3, {OPMASKREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+45580, 590, 6957}, + /* 6817 : VPSHUFBITQMB kreg|mask,ymmreg,ymmrm256 [rvm:fvm: evex.nds.256.66.0f38.w0 8f /r ] AVX512VL,AVX512BITALG,FUTURE */ + /* 241(f2 7d 28) 303 001(8f) 120 : EVEX,PROT,AVX512VL,AVX512BITALG,FUTURE */ + {I_VPSHUFBITQMB, 3, {OPMASKREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+45589, 590, 6958}, + /* 6818 : VPSHUFBITQMB kreg|mask,zmmreg,zmmrm512 [rvm:fvm: evex.nds.512.66.0f38.w0 8f /r ] AVX512BITALG,FUTURE */ + /* 241(f2 7d 48) 303 001(8f) 120 : EVEX,PROT,AVX512BITALG,FUTURE */ + {I_VPSHUFBITQMB, 3, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+45598, 591, 6959}, + /* 6819 : V4FMADDPS zmmreg|mask|z,zmmreg|rs4,mem [rvm:m128: evex.dds.512.f2.0f38.w0 9a /r ] AR0-2,SO,AVX5124FMAPS,FUTURE */ + /* 241(f2 7f 48) 317 001(9a) 120 : AR0,AR1,AR2,SO,EVEX,PROT,AVX5124FMAPS,FUTURE */ + {I_V4FMADDPS, 3, {ZMMREG,ZMMREG|RS4,MEMORY,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+45607, 594, 6962}, + /* 6820 : V4FNMADDPS zmmreg|mask|z,zmmreg|rs4,mem [rvm:m128: evex.dds.512.f2.0f38.w0 aa /r ] AR0-2,SO,AVX5124FMAPS,FUTURE */ + /* 241(f2 7f 48) 317 001(aa) 120 : AR0,AR1,AR2,SO,EVEX,PROT,AVX5124FMAPS,FUTURE */ + {I_V4FNMADDPS, 3, {ZMMREG,ZMMREG|RS4,MEMORY,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+45616, 594, 6963}, + /* 6821 : V4FMADDSS xmmreg|mask|z,xmmreg|rs4,mem [rvm:m128: evex.dds.lig.f2.0f38.w0 9b /r ] AR0-2,SO,AVX5124FMAPS,FUTURE */ + /* 241(f2 7f 08) 317 001(9b) 120 : AR0,AR1,AR2,SO,LIG,EVEX,PROT,AVX5124FMAPS,FUTURE */ + {I_V4FMADDSS, 3, {XMMREG,XMMREG|RS4,MEMORY,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+45625, 595, 6964}, + /* 6822 : V4FNMADDSS xmmreg|mask|z,xmmreg|rs4,mem [rvm:m128: evex.dds.lig.f2.0f38.w0 ab /r ] AR0-2,SO,AVX5124FMAPS,FUTURE */ + /* 241(f2 7f 08) 317 001(ab) 120 : AR0,AR1,AR2,SO,LIG,EVEX,PROT,AVX5124FMAPS,FUTURE */ + {I_V4FNMADDSS, 3, {XMMREG,XMMREG|RS4,MEMORY,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+45634, 595, 6965}, + /* 6823 : VP4DPWSSDS zmmreg|mask|z,zmmreg|rs4,mem [rvm:m128: evex.dds.512.f2.0f38.w0 53 /r ] AR0-2,SO,AVX5124VNNIW,FUTURE */ + /* 241(f2 7f 48) 317 001(53) 120 : AR0,AR1,AR2,SO,EVEX,PROT,AVX5124VNNIW,FUTURE */ + {I_VP4DPWSSDS, 3, {ZMMREG,ZMMREG|RS4,MEMORY,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+45643, 596, 6968}, + /* 6824 : VP4DPWSSD zmmreg|mask|z,zmmreg|rs4,mem [rvm:m128: evex.dds.512.f2.0f38.w0 52 /r ] AR0-2,SO,AVX5124VNNIW,FUTURE */ + /* 241(f2 7f 48) 317 001(52) 120 : AR0,AR1,AR2,SO,EVEX,PROT,AVX5124VNNIW,FUTURE */ + {I_VP4DPWSSD, 3, {ZMMREG,ZMMREG|RS4,MEMORY,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+45652, 596, 6969}, + /* 6825 : ENCLS void [ np 0f 01 cf ] SGX,FUTURE */ + /* 360 355 002(01 cf) : SGX,FUTURE */ + {I_ENCLS, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70089, 597, 6972}, + /* 6826 : ENCLU void [ np 0f 01 d7 ] SGX,FUTURE */ + /* 360 355 002(01 d7) : SGX,FUTURE */ + {I_ENCLU, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70095, 597, 6973}, + /* 6827 : ENCLV void [ np 0f 01 c0 ] SGX,FUTURE */ + /* 360 355 002(01 c0) : SGX,FUTURE */ + {I_ENCLV, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70101, 597, 6974}, + /* 6828 : CLRSSBSY mem64 [m: f3 0f ae /6 ] FL,CET,FUTURE */ + /* 333 355 001(ae) 206 : FL,CET,FUTURE */ + {I_CLRSSBSY, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+57106, 598, 6977}, + /* 6829 : ENDBR32 void [ f3 0f 1e fb ] CET,FUTURE */ + /* 333 355 002(1e fb) : CET,FUTURE */ + {I_ENDBR32, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70107, 599, 6978}, + /* 6830 : ENDBR64 void [ f3 0f 1e fa ] CET,FUTURE */ + /* 333 355 002(1e fa) : CET,FUTURE */ + {I_ENDBR64, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70113, 599, 6979}, + /* 6831 : INCSSPD reg32 [m: o32 f3 0f ae /5 ] CET,FUTURE */ + /* 321 333 355 001(ae) 205 : CET,FUTURE */ + {I_INCSSPD, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+65974, 599, 6980}, + /* 6832 : INCSSPQ reg64 [m: o64 f3 0f ae /5 ] LONG,PROT,CET,X86_64 */ + /* 324 333 355 001(ae) 205 : LONG,PROT,CET,X86_64 */ + {I_INCSSPQ, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+65981, 600, 6981}, + /* 6833 : RDSSPD reg32 [m: o32 f3 0f 1e /1 ] CET,FUTURE */ + /* 321 333 355 001(1e) 201 : CET,FUTURE */ + {I_RDSSPD, 1, {REG_GPR|BITS32,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+65988, 599, 6982}, + /* 6834 : RDSSPQ reg64 [m: o64 f3 0f 1e /1 ] LONG,PROT,CET,X86_64 */ + /* 324 333 355 001(1e) 201 : LONG,PROT,CET,X86_64 */ + {I_RDSSPQ, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+65995, 600, 6983}, + /* 6835 : RSTORSSP mem64 [m: f3 0f 01 /5 ] CET,FUTURE */ + /* 333 355 001(01) 205 : CET,FUTURE */ + {I_RSTORSSP, 1, {MEMORY|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70119, 599, 6984}, + /* 6836 : SAVEPREVSSP void [ f3 0f 01 ea ] CET,FUTURE */ + /* 333 355 002(01 ea) : CET,FUTURE */ + {I_SAVEPREVSSP, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70125, 599, 6985}, + /* 6837 : SETSSBSY void [ f3 0f 01 e8 ] CET,FUTURE */ + /* 333 355 002(01 e8) : CET,FUTURE */ + {I_SETSSBSY, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70131, 599, 6986}, + /* 6838 : WRUSSD mem32,reg32 [mr: o32 66 0f38 f5 /r ] CET,FUTURE */ + /* 321 361 356 001(f5) 101 : NOAPX,CET,FUTURE */ + {I_WRUSSD, 2, {MEMORY|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66002, 601, 6987}, + /* 6839 : WRUSSD mem32,reg32 [mr: evex.nf0.nd0.l0.66.m4.w0 65 /r ] LONG,PROT,CET,APX,X86_64 */ + /* 250(f4 7d 08) 300 001(65) 101 : LONG,EVEX,PROT,CET,APX,X86_64 */ + {I_WRUSSD, 2, {MEMORY|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+45661, 602, 6988}, + /* 6840 : WRUSSQ mem64,reg64 [mr: o64 66 0f38 f5 /r ] LONG,PROT,CET,X86_64 */ + /* 324 361 356 001(f5) 101 : NOAPX,LONG,PROT,CET,X86_64 */ + {I_WRUSSQ, 2, {MEMORY|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66009, 603, 6989}, + /* 6841 : WRUSSQ mem64,reg64 [mr: evex.nf0.nd0.l0.66.m4.w1 65 /r ] LONG,PROT,CET,APX,X86_64 */ + /* 250(f4 fd 08) 300 001(65) 101 : LONG,EVEX,PROT,CET,APX,X86_64 */ + {I_WRUSSQ, 2, {MEMORY|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+45670, 602, 6990}, + /* 6842 : WRSSD mem32,reg32 [mr: o32 0f38 f6 /r ] CET,FUTURE */ + /* 321 356 001(f6) 101 : NOAPX,CET,FUTURE */ + {I_WRSSD, 2, {MEMORY|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+70137, 601, 6991}, + /* 6843 : WRSSD mem32,reg32 [mr: evex.nf0.nd0.l0.m4.w0 66 /r ] LONG,PROT,CET,APX,X86_64 */ + /* 250(f4 7c 08) 300 001(66) 101 : LONG,EVEX,PROT,CET,APX,X86_64 */ + {I_WRSSD, 2, {MEMORY|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+45679, 602, 6992}, + /* 6844 : WRSSQ mem64,reg64 [mr: o64 0f38 f6 /r ] LONG,PROT,CET,X86_64 */ + /* 324 356 001(f6) 101 : NOAPX,LONG,PROT,CET,X86_64 */ + {I_WRSSQ, 2, {MEMORY|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+70143, 603, 6993}, + /* 6845 : WRSSQ mem64,reg64 [mr: evex.nf0.nd0.l0.m4.w1 66 /r ] LONG,PROT,CET,APX,X86_64 */ + /* 250(f4 fc 08) 300 001(66) 101 : LONG,EVEX,PROT,CET,APX,X86_64 */ + {I_WRSSQ, 2, {MEMORY|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+45688, 602, 6994}, + /* 6846 : ENQCMD reg16,mem512 [rm: a16 f2 0f38 f8 /r ] AR0-1,SZ,NOREX,NOAPX,NOLONG,FL,ENQCMD,FUTURE */ + /* 310 332 356 001(f8) 110 : AR0,AR1,SZ,NOREX,NOAPX,NOLONG,FL,ENQCMD,FUTURE */ + {I_ENQCMD, 2, {REG_GPR|BITS16|RN_L16,MEMORY|BITS512|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66016, 604, 6997}, + /* 6847 : ENQCMD reg32,mem512 [rm: a32 f2 0f38 f8 /r ] AR0-1,SZ,FL,ENQCMD,FUTURE */ + /* 311 332 356 001(f8) 110 : AR0,AR1,SZ,NOAPX,FL,ENQCMD,FUTURE */ + {I_ENQCMD, 2, {REG_GPR|BITS32|RN_L16,MEMORY|BITS512|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66023, 605, 6999}, + /* 6848 : ENQCMD reg64,mem512 [rm: a64 f2 0f38 f8 /r ] AR0-1,SZ,LONG,FL,PROT,ENQCMD,X86_64 */ + /* 313 332 356 001(f8) 110 : AR0,AR1,SZ,NOAPX,LONG,FL,PROT,ENQCMD,X86_64 */ + {I_ENQCMD, 2, {REG_GPR|BITS64|RN_L16,MEMORY|BITS512|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66030, 606, 7000}, + /* 6849 : ENQCMD reg64,mem512 [rm: evex.nf0.nd0.l0.f2.m4.w1 f8 /r ] AR0-1,SZ,LONG,FL,PRIV,PROT,ENQCMD,APX,X86_64 */ + /* 250(f4 ff 08) 300 001(f8) 110 : AR0,AR1,SZ,LONG,FL,EVEX,PRIV,PROT,ENQCMD,APX,X86_64 */ + {I_ENQCMD, 2, {REG_GPR|BITS64,MEMORY|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+45697, 607, 7001}, + /* 6850 : ENQCMDS reg16,mem512 [rm: a16 f3 0f38 f8 /r ] AR0-1,SZ,NOREX,NOAPX,NOLONG,FL,PRIV,ENQCMD,FUTURE */ + /* 310 333 356 001(f8) 110 : AR0,AR1,SZ,NOREX,NOAPX,NOLONG,FL,PRIV,ENQCMD,FUTURE */ + {I_ENQCMDS, 2, {REG_GPR|BITS16|RN_L16,MEMORY|BITS512|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66037, 608, 7002}, + /* 6851 : ENQCMDS reg32,mem512 [rm: a32 f3 0f38 f8 /r ] AR0-1,SZ,FL,PRIV,ENQCMD,FUTURE */ + /* 311 333 356 001(f8) 110 : AR0,AR1,SZ,NOAPX,FL,PRIV,ENQCMD,FUTURE */ + {I_ENQCMDS, 2, {REG_GPR|BITS32|RN_L16,MEMORY|BITS512|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66044, 609, 7004}, + /* 6852 : ENQCMDS reg64,mem512 [rm: a64 f3 0f38 f8 /r ] AR0-1,SZ,LONG,FL,PRIV,PROT,ENQCMD,X86_64 */ + /* 313 333 356 001(f8) 110 : AR0,AR1,SZ,NOAPX,LONG,FL,PRIV,PROT,ENQCMD,X86_64 */ + {I_ENQCMDS, 2, {REG_GPR|BITS64|RN_L16,MEMORY|BITS512|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66051, 610, 7005}, + /* 6853 : ENQCMDS reg64,mem512 [rm: evex.nf0.nd0.l0.f3.m4.w1 f8 /r ] AR0-1,SZ,LONG,FL,PRIV,PROT,ENQCMD,APX,X86_64 */ + /* 250(f4 fe 08) 300 001(f8) 110 : AR0,AR1,SZ,LONG,FL,EVEX,PRIV,PROT,ENQCMD,APX,X86_64 */ + {I_ENQCMDS, 2, {REG_GPR|BITS64,MEMORY|BITS512,0,0,0}, NO_DECORATOR, nasm_bytecodes+45706, 607, 7006}, + /* 6854 : PCONFIG void [ np 0f 01 c5 ] FL,PRIV,PCONFIG,FUTURE */ + /* 360 355 002(01 c5) : FL,PRIV,PCONFIG,FUTURE */ + {I_PCONFIG, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70071, 611, 7007}, + /* 6855 : XRESLDTRK void [ f2 0f 01 e9 ] TSXLDTRK,FUTURE */ + /* 332 355 002(01 e9) : TSXLDTRK,FUTURE */ + {I_XRESLDTRK, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70149, 612, 7008}, + /* 6856 : XSUSLDTRK void [ f2 0f 01 e8 ] TSXLDTRK,FUTURE */ + /* 332 355 002(01 e8) : TSXLDTRK,FUTURE */ + {I_XSUSLDTRK, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70155, 612, 7009}, + /* 6857 : VCVTNE2PS2BF16 xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.128.f2.0f38.w0 72 /r ] AVX512VL,AVX512BF16,FUTURE */ + /* 241(f2 7f 08) 301 001(72) 120 : EVEX,PROT,AVX512VL,AVX512BF16,FUTURE */ + {I_VCVTNE2PS2BF16, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+45715, 613, 7012}, + /* 6858 : VCVTNE2PS2BF16 ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.256.f2.0f38.w0 72 /r ] AVX512VL,AVX512BF16,FUTURE */ + /* 241(f2 7f 28) 301 001(72) 120 : EVEX,PROT,AVX512VL,AVX512BF16,FUTURE */ + {I_VCVTNE2PS2BF16, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+45733, 613, 7013}, + /* 6859 : VCVTNE2PS2BF16 zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.512.f2.0f38.w0 72 /r ] AVX512BF16,FUTURE */ + /* 241(f2 7f 48) 301 001(72) 120 : EVEX,PROT,AVX512BF16,FUTURE */ + {I_VCVTNE2PS2BF16, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+45751, 614, 7014}, + /* 6860 : VCVTNEPS2BF16 xmmreg|mask|z,xmmrm128|b32 [rm:fv: evex.128.f3.0f38.w0 72 /r ] AVX512VL,AVX512BF16,FUTURE */ + /* 250(f2 7e 08) 301 001(72) 110 : EVEX,PROT,AVX512VL,AVX512BF16,FUTURE */ + {I_VCVTNEPS2BF16, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+45769, 613, 7015}, + /* 6861 : VCVTNEPS2BF16 xmmreg|mask|z,ymmrm256|b32 [rm:fv: evex.256.f3.0f38.w0 72 /r ] AVX512VL,AVX512BF16,FUTURE */ + /* 250(f2 7e 28) 301 001(72) 110 : EVEX,PROT,AVX512VL,AVX512BF16,FUTURE */ + {I_VCVTNEPS2BF16, 2, {XMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+45778, 613, 7016}, + /* 6862 : VCVTNEPS2BF16 ymmreg|mask|z,zmmrm512|b32 [rm:fv: evex.512.f3.0f38.w0 72 /r ] AVX512BF16,FUTURE */ + /* 250(f2 7e 48) 301 001(72) 110 : EVEX,PROT,AVX512BF16,FUTURE */ + {I_VCVTNEPS2BF16, 2, {YMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+45787, 614, 7017}, + /* 6863 : VDPBF16PS xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.128.f3.0f38.w0 52 /r ] AVX512VL,AVX512BF16,FUTURE */ + /* 241(f2 7e 08) 301 001(52) 120 : EVEX,PROT,AVX512VL,AVX512BF16,FUTURE */ + {I_VDPBF16PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+45796, 613, 7018}, + /* 6864 : VDPBF16PS ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.256.f3.0f38.w0 52 /r ] AVX512VL,AVX512BF16,FUTURE */ + /* 241(f2 7e 28) 301 001(52) 120 : EVEX,PROT,AVX512VL,AVX512BF16,FUTURE */ + {I_VDPBF16PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+45814, 613, 7019}, + /* 6865 : VDPBF16PS zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.512.f3.0f38.w0 52 /r ] AVX512BF16,FUTURE */ + /* 241(f2 7e 48) 301 001(52) 120 : EVEX,PROT,AVX512BF16,FUTURE */ + {I_VDPBF16PS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+45832, 614, 7020}, + /* 6866 : VP2INTERSECTD kreg|rs2,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.f2.0f38.w0 68 /r ] AVX512VL,AVX512VP2INTERSECT,FUTURE */ + /* 241(f2 7f 08) 301 001(68) 120 : EVEX,PROT,AVX512VL,AVX512VP2INTERSECT,FUTURE */ + {I_VP2INTERSECTD, 3, {OPMASKREG|RS2,XMMREG,RM_XMM|BITS128,0,0}, {0,0,B32,0,0}, nasm_bytecodes+45850, 615, 7023}, + /* 6867 : VP2INTERSECTD kreg|rs2,ymmreg,ymmrm256|b32 [rvm:fv: evex.nds.256.f2.0f38.w0 68 /r ] AVX512VL,AVX512VP2INTERSECT,FUTURE */ + /* 241(f2 7f 28) 301 001(68) 120 : EVEX,PROT,AVX512VL,AVX512VP2INTERSECT,FUTURE */ + {I_VP2INTERSECTD, 3, {OPMASKREG|RS2,YMMREG,RM_YMM|BITS256,0,0}, {0,0,B32,0,0}, nasm_bytecodes+45859, 615, 7024}, + /* 6868 : VP2INTERSECTD kreg|rs2,zmmreg,zmmrm512|b32 [rvm:fv: evex.nds.512.f2.0f38.w0 68 /r ] AVX512F,AVX512VP2INTERSECT,FUTURE */ + /* 241(f2 7f 48) 301 001(68) 120 : EVEX,PROT,AVX512F,AVX512VP2INTERSECT,FUTURE */ + {I_VP2INTERSECTD, 3, {OPMASKREG|RS2,ZMMREG,RM_ZMM|BITS512,0,0}, {0,0,B32,0,0}, nasm_bytecodes+45868, 616, 7025}, + /* 6869 : VP2INTERSECTQ kreg|rs2,xmmreg,xmmrm128|b64 [rvm:fv: evex.nds.128.f2.0f38.w1 68 /r ] AVX512VL,AVX512VP2INTERSECT,FUTURE */ + /* 241(f2 ff 08) 301 001(68) 120 : EVEX,PROT,AVX512VL,AVX512VP2INTERSECT,FUTURE */ + {I_VP2INTERSECTQ, 3, {OPMASKREG|RS2,XMMREG,RM_XMM|BITS128,0,0}, {0,0,B64,0,0}, nasm_bytecodes+45877, 615, 7026}, + /* 6870 : VP2INTERSECTQ kreg|rs2,ymmreg,ymmrm256|b64 [rvm:fv: evex.nds.256.f2.0f38.w1 68 /r ] AVX512VL,AVX512VP2INTERSECT,FUTURE */ + /* 241(f2 ff 28) 301 001(68) 120 : EVEX,PROT,AVX512VL,AVX512VP2INTERSECT,FUTURE */ + {I_VP2INTERSECTQ, 3, {OPMASKREG|RS2,YMMREG,RM_YMM|BITS256,0,0}, {0,0,B64,0,0}, nasm_bytecodes+45886, 615, 7027}, + /* 6871 : VP2INTERSECTQ kreg|rs2,zmmreg,zmmrm512|b64 [rvm:fv: evex.nds.512.f2.0f38.w1 68 /r ] AVX512F,AVX512VP2INTERSECT,FUTURE */ + /* 241(f2 ff 48) 301 001(68) 120 : EVEX,PROT,AVX512F,AVX512VP2INTERSECT,FUTURE */ + {I_VP2INTERSECTQ, 3, {OPMASKREG|RS2,ZMMREG,RM_ZMM|BITS512,0,0}, {0,0,B64,0,0}, nasm_bytecodes+45895, 616, 7028}, + /* 6872 : LDTILECFG mem512 [m: vex.128.np.0f38.w0 49 /0 ] AR0,SZ,LONG,PROT,AMXTILE,X86_64 */ + /* 270(002 000) 001(49) 200 : AR0,SZ,NOAPX,LONG,VEX,PROT,AMXTILE,X86_64 */ + {I_LDTILECFG, 1, {MEMORY|BITS512|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+66058, 617, 7032}, + /* 6873 : LDTILECFG mem512 [m: evex.128.np.0f38.w0 49 /0 ] AR0,SZ,LONG,PROT,AMXTILE,X86_64,APX */ + /* 250(f2 7c 08) 300 001(49) 200 : AR0,SZ,LONG,EVEX,PROT,AMXTILE,APX,X86_64 */ + {I_LDTILECFG, 1, {MEMORY|BITS512,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45904, 618, 7032}, + /* 6874 : STTILECFG mem512 [m: vex.128.66.0f38.w0 49 /0 ] AR0,SZ,LONG,PROT,AMXTILE,X86_64 */ + /* 270(002 001) 001(49) 200 : AR0,SZ,NOAPX,LONG,VEX,PROT,AMXTILE,X86_64 */ + {I_STTILECFG, 1, {MEMORY|BITS512|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+66065, 617, 7033}, + /* 6875 : STTILECFG mem512 [m: evex.128.66.0f38.w0 49 /0 ] AR0,SZ,LONG,PROT,AMXTILE,X86_64,APX */ + /* 250(f2 7d 08) 300 001(49) 200 : AR0,SZ,LONG,EVEX,PROT,AMXTILE,APX,X86_64 */ + {I_STTILECFG, 1, {MEMORY|BITS512,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+45913, 618, 7033}, + /* 6876 : TDPBF16PS tmmreg,tmmreg,tmmreg [rmv: vex.128.f3.0f38.w0 5c /r ] LONG,PROT,AMXBF16,X86_64 */ + /* 262(002 002) 001(5c) 110 : NOAPX,LONG,VEX,PROT,AMXBF16,X86_64 */ + {I_TDPBF16PS, 3, {TMMREG|RN_L16,TMMREG|RN_L16,TMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+66072, 619, 7034}, + /* 6877 : TDPFP16PS tmmreg,tmmreg,tmmreg [rmv: vex.128.f2.0f38.w0 5c /r ] LONG,PROT,AMXFP16,X86_64 */ + /* 262(002 003) 001(5c) 110 : NOAPX,LONG,VEX,PROT,AMXFP16,X86_64 */ + {I_TDPFP16PS, 3, {TMMREG|RN_L16,TMMREG|RN_L16,TMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+66079, 620, 7035}, + /* 6878 : TCMMIMFP16PS tmmreg,tmmreg,tmmreg [rmv: vex.128.66.0f38.w0 6c /r ] LONG,PROT,AMXCOMPLEX,X86_64 */ + /* 262(002 001) 001(6c) 110 : NOAPX,LONG,VEX,PROT,AMXCOMPLEX,X86_64 */ + {I_TCMMIMFP16PS, 3, {TMMREG|RN_L16,TMMREG|RN_L16,TMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+66086, 621, 7036}, + /* 6879 : TCMMRLFP16PS tmmreg,tmmreg,tmmreg [rmv: vex.128.np.0f38.w0 6c /r ] LONG,PROT,AMXCOMPLEX,X86_64 */ + /* 262(002 000) 001(6c) 110 : NOAPX,LONG,VEX,PROT,AMXCOMPLEX,X86_64 */ + {I_TCMMRLFP16PS, 3, {TMMREG|RN_L16,TMMREG|RN_L16,TMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+66093, 621, 7037}, + /* 6880 : TDPBSSD tmmreg,tmmreg,tmmreg [rmv: vex.128.f2.0f38.w0 5e /r ] LONG,PROT,AMXINT8,X86_64 */ + /* 262(002 003) 001(5e) 110 : NOAPX,LONG,VEX,PROT,AMXINT8,X86_64 */ + {I_TDPBSSD, 3, {TMMREG|RN_L16,TMMREG|RN_L16,TMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+66100, 622, 7038}, + /* 6881 : TDPBSUD tmmreg,tmmreg,tmmreg [rmv: vex.128.f3.0f38.w0 5e /r ] LONG,PROT,AMXINT8,X86_64 */ + /* 262(002 002) 001(5e) 110 : NOAPX,LONG,VEX,PROT,AMXINT8,X86_64 */ + {I_TDPBSUD, 3, {TMMREG|RN_L16,TMMREG|RN_L16,TMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+66107, 622, 7039}, + /* 6882 : TDPBUSD tmmreg,tmmreg,tmmreg [rmv: vex.128.66.0f38.w0 5e /r ] LONG,PROT,AMXINT8,X86_64 */ + /* 262(002 001) 001(5e) 110 : NOAPX,LONG,VEX,PROT,AMXINT8,X86_64 */ + {I_TDPBUSD, 3, {TMMREG|RN_L16,TMMREG|RN_L16,TMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+66114, 622, 7040}, + /* 6883 : TDPBUUD tmmreg,tmmreg,tmmreg [rmv: vex.128.np.0f38.w0 5e /r ] LONG,PROT,AMXINT8,X86_64 */ + /* 262(002 000) 001(5e) 110 : NOAPX,LONG,VEX,PROT,AMXINT8,X86_64 */ + {I_TDPBUUD, 3, {TMMREG|RN_L16,TMMREG|RN_L16,TMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+66121, 622, 7041}, + /* 6884 : TILELOADD tmmreg,mem [rm: vex.128.f2.0f38.w0 4b /r ] AR1,ANYSIZE,SIB,LONG,MIB,PROT,AMXTILE,APX,X86_64 */ + /* 270(002 003) 001(4b) 110 : AR1,ANYSIZE,NOAPX,SIB,LONG,MIB,VEX,PROT,AMXTILE,APX,X86_64 */ + {I_TILELOADD, 2, {TMMREG|RN_L16,MEMORY|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66128, 623, 7042}, + /* 6885 : TILELOADD tmmreg,mem [rm: evex.128.f2.0f38.w0 4b /r ] AR1,ANYSIZE,SIB,LONG,MIB,PROT,AMXTILE,APX,X86_64,APX */ + /* 250(f2 7f 08) 300 001(4b) 110 : AR1,ANYSIZE,SIB,LONG,MIB,EVEX,PROT,AMXTILE,APX,X86_64 */ + {I_TILELOADD, 2, {TMMREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+45922, 624, 7042}, + /* 6886 : TILELOADDT1 tmmreg,mem [rm: vex.128.66.0f38.w0 4b /r ] AR1,ANYSIZE,SIB,LONG,MIB,PROT,AMXTILE,APX,X86_64 */ + /* 270(002 001) 001(4b) 110 : AR1,ANYSIZE,NOAPX,SIB,LONG,MIB,VEX,PROT,AMXTILE,APX,X86_64 */ + {I_TILELOADDT1, 2, {TMMREG|RN_L16,MEMORY|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66135, 623, 7043}, + /* 6887 : TILELOADDT1 tmmreg,mem [rm: evex.128.66.0f38.w0 4b /r ] AR1,ANYSIZE,SIB,LONG,MIB,PROT,AMXTILE,APX,X86_64,APX */ + /* 250(f2 7d 08) 300 001(4b) 110 : AR1,ANYSIZE,SIB,LONG,MIB,EVEX,PROT,AMXTILE,APX,X86_64 */ + {I_TILELOADDT1, 2, {TMMREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+45931, 624, 7043}, + /* 6888 : TILERELEASE void [ vex.128.np.0f38.w0 49 c0 ] LONG,PROT,AMXTILE,X86_64 */ + /* 270(002 000) 002(49 c0) : NOAPX,LONG,VEX,PROT,AMXTILE,X86_64 */ + {I_TILERELEASE, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+66142, 625, 7044}, + /* 6889 : TILESTORED mem,tmmreg [mr: vex.128.f3.0f38.w0 4b /r ] AR0,ANYSIZE,SIB,LONG,MIB,PROT,AMXTILE,APX,X86_64 */ + /* 270(002 002) 001(4b) 101 : AR0,ANYSIZE,NOAPX,SIB,LONG,MIB,VEX,PROT,AMXTILE,APX,X86_64 */ + {I_TILESTORED, 2, {MEMORY|RN_L16,TMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66149, 626, 7045}, + /* 6890 : TILESTORED mem,tmmreg [mr: evex.128.f3.0f38.w0 4b /r ] AR0,ANYSIZE,SIB,LONG,MIB,PROT,AMXTILE,APX,X86_64,APX */ + /* 250(f2 7e 08) 300 001(4b) 101 : AR0,ANYSIZE,SIB,LONG,MIB,EVEX,PROT,AMXTILE,APX,X86_64 */ + {I_TILESTORED, 2, {MEMORY,TMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+45940, 627, 7045}, + /* 6891 : TILEZERO tmmreg [r: vex.128.f2.0f38.w0 49 /3r0 ] LONG,PROT,AMXTILE,X86_64 */ + /* 270(002 003) 001(49) 171(300) : NOAPX,LONG,VEX,PROT,AMXTILE,X86_64 */ + {I_TILEZERO, 1, {TMMREG|RN_L16,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+54843, 625, 7046}, + /* 6892 : TILELOADDRS tmmreg,mem [rm: vex.128.f2.0f38.w0 4a /r ] AR1,ANYSIZE,SIB,LONG,MIB,PROT,AMXTILE,AMXMOVRS,APX,X86_64,FUTURE */ + /* 270(002 003) 001(4a) 110 : AR1,ANYSIZE,NOAPX,SIB,LONG,MIB,VEX,PROT,AMXTILE,AMXMOVRS,APX,FUTURE */ + {I_TILELOADDRS, 2, {TMMREG|RN_L16,MEMORY|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66156, 628, 7048}, + /* 6893 : TILELOADDRS tmmreg,mem [rm: evex.128.f2.0f38.w0 4a /r ] AR1,ANYSIZE,SIB,LONG,MIB,PROT,AMXTILE,AMXMOVRS,APX,X86_64,FUTURE,APX */ + /* 250(f2 7f 08) 300 001(4a) 110 : AR1,ANYSIZE,SIB,LONG,MIB,EVEX,PROT,AMXTILE,AMXMOVRS,APX,FUTURE */ + {I_TILELOADDRS, 2, {TMMREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+45949, 629, 7048}, + /* 6894 : TILELOADDRST1 tmmreg,mem [rm: vex.128.66.0f38.w0 4a /r ] AR1,ANYSIZE,SIB,LONG,MIB,PROT,AMXTILE,AMXMOVRS,APX,X86_64,FUTURE */ + /* 270(002 001) 001(4a) 110 : AR1,ANYSIZE,NOAPX,SIB,LONG,MIB,VEX,PROT,AMXTILE,AMXMOVRS,APX,FUTURE */ + {I_TILELOADDRST1, 2, {TMMREG|RN_L16,MEMORY|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66163, 628, 7049}, + /* 6895 : TILELOADDRST1 tmmreg,mem [rm: evex.128.66.0f38.w0 4a /r ] AR1,ANYSIZE,SIB,LONG,MIB,PROT,AMXTILE,AMXMOVRS,APX,X86_64,FUTURE,APX */ + /* 250(f2 7d 08) 300 001(4a) 110 : AR1,ANYSIZE,SIB,LONG,MIB,EVEX,PROT,AMXTILE,AMXMOVRS,APX,FUTURE */ + {I_TILELOADDRST1, 2, {TMMREG,MEMORY,0,0,0}, NO_DECORATOR, nasm_bytecodes+45958, 629, 7049}, + /* 6896 : T2RPNTLVWZ0 tmmreg,mem [rm: vex.128.np.0f38.w0 6e /r ] SIB,AMXTRANSPOSE,OBSOLETE,NEVER,FUTURE */ + /* 270(002 000) 001(6e) 110 : NOAPX,SIB,VEX,AMXTRANSPOSE,OBSOLETE,NEVER,FUTURE */ + {I_T2RPNTLVWZ0, 2, {TMMREG|RN_L16,MEMORY|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66170, 630, 7051}, + /* 6897 : T2RPNTLVWZ0T1 tmmreg,mem [rm: vex.128.np.0f38.w0 6f /r ] SIB,AMXTRANSPOSE,OBSOLETE,NEVER,FUTURE */ + /* 270(002 000) 001(6f) 110 : NOAPX,SIB,VEX,AMXTRANSPOSE,OBSOLETE,NEVER,FUTURE */ + {I_T2RPNTLVWZ0T1, 2, {TMMREG|RN_L16,MEMORY|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66177, 630, 7052}, + /* 6898 : T2RPNTLVWZ1 tmmreg,mem [rm: vex.128.66.0f38.w0 6e /r ] SIB,AMXTRANSPOSE,OBSOLETE,NEVER,FUTURE */ + /* 270(002 001) 001(6e) 110 : NOAPX,SIB,VEX,AMXTRANSPOSE,OBSOLETE,NEVER,FUTURE */ + {I_T2RPNTLVWZ1, 2, {TMMREG|RN_L16,MEMORY|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66184, 630, 7053}, + /* 6899 : T2RPNTLVWZ1T1 tmmreg,mem [rm: vex.128.66.0f38.w0 6f /r ] SIB,AMXTRANSPOSE,OBSOLETE,NEVER,FUTURE */ + /* 270(002 001) 001(6f) 110 : NOAPX,SIB,VEX,AMXTRANSPOSE,OBSOLETE,NEVER,FUTURE */ + {I_T2RPNTLVWZ1T1, 2, {TMMREG|RN_L16,MEMORY|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66191, 630, 7054}, + /* 6900 : T2RPNTLVWZ0RS tmmreg,mem [rm: vex.128.np.map5.w0 f8 /r ] SIB,AMXTRANSPOSE,OBSOLETE,NEVER,FUTURE */ + /* 270(005 000) 001(f8) 110 : NOAPX,SIB,VEX,AMXTRANSPOSE,OBSOLETE,NEVER,FUTURE */ + {I_T2RPNTLVWZ0RS, 2, {TMMREG|RN_L16,MEMORY|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66198, 630, 7055}, + /* 6901 : T2RPNTLVWZ0RST1 tmmreg,mem [rm: vex.128.np.map5.w0 f9 /r ] SIB,AMXTRANSPOSE,OBSOLETE,NEVER,FUTURE */ + /* 270(005 000) 001(f9) 110 : NOAPX,SIB,VEX,AMXTRANSPOSE,OBSOLETE,NEVER,FUTURE */ + {I_T2RPNTLVWZ0RST1, 2, {TMMREG|RN_L16,MEMORY|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66205, 630, 7056}, + /* 6902 : T2RPNTLVWZ1RS tmmreg,mem [rm: vex.128.66.map5.w0 f8 /r ] SIB,AMXTRANSPOSE,OBSOLETE,NEVER,FUTURE */ + /* 270(005 001) 001(f8) 110 : NOAPX,SIB,VEX,AMXTRANSPOSE,OBSOLETE,NEVER,FUTURE */ + {I_T2RPNTLVWZ1RS, 2, {TMMREG|RN_L16,MEMORY|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66212, 630, 7057}, + /* 6903 : T2RPNTLVWZ1RST1 tmmreg,mem [rm: vex.128.66.map5.w0 f9 /r ] SIB,AMXTRANSPOSE,OBSOLETE,NEVER,FUTURE */ + /* 270(005 001) 001(f9) 110 : NOAPX,SIB,VEX,AMXTRANSPOSE,OBSOLETE,NEVER,FUTURE */ + {I_T2RPNTLVWZ1RST1, 2, {TMMREG|RN_L16,MEMORY|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66219, 630, 7058}, + /* 6904 : TCONJTCMMIMFP16PS tmmreg,tmmreg,tmmreg [rmv: vex.128.np.0f38.w0 6b /r ] AMXTRANSPOSE,OBSOLETE,NEVER,FUTURE */ + /* 262(002 000) 001(6b) 110 : NOAPX,VEX,AMXTRANSPOSE,OBSOLETE,NEVER,FUTURE */ + {I_TCONJTCMMIMFP16PS, 3, {TMMREG|RN_L16,TMMREG|RN_L16,TMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+66226, 631, 7059}, + /* 6905 : TCONJTFP16 tmmreg,tmmreg [rm: vex.128.66.0f38.w0 6b /r ] AMXTRANSPOSE,OBSOLETE,NEVER,FUTURE */ + /* 270(002 001) 001(6b) 110 : NOAPX,VEX,AMXTRANSPOSE,OBSOLETE,NEVER,FUTURE */ + {I_TCONJTFP16, 2, {TMMREG|RN_L16,TMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66233, 631, 7060}, + /* 6906 : TCVTROWD2PS zmmreg,tmmreg,reg32 [rmv: evex.512.f3.0f38.w0 4a /r ] AMXAVX512,FUTURE */ + /* 242(f2 7e 48) 300 001(4a) 110 : EVEX,PROT,AMXAVX512,FUTURE */ + {I_TCVTROWD2PS, 3, {ZMMREG,TMMREG,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+45967, 632, 7061}, + /* 6907 : TCVTROWD2PS zmmreg,tmmreg,imm8 [rmi: evex.512.f3.0f3a.w0 07 /r ib ] AMXAVX512,FUTURE */ + /* 250(f3 7e 48) 300 001(07) 110 022 : EVEX,PROT,AMXAVX512,FUTURE */ + {I_TCVTROWD2PS, 3, {ZMMREG,TMMREG,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+22643, 632, 7062}, + /* 6908 : TCVTROWPS2BF16H zmmreg,tmmreg,reg32 [rmv: evex.512.f2.0f38.w0 6d /r ] AMXAVX512,FUTURE */ + /* 242(f2 7f 48) 300 001(6d) 110 : EVEX,PROT,AMXAVX512,FUTURE */ + {I_TCVTROWPS2BF16H, 3, {ZMMREG,TMMREG,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+45976, 632, 7063}, + /* 6909 : TCVTROWPS2BF16H zmmreg,tmmreg,imm8 [rmi: evex.512.f2.0f3a.w0 07 /r ib ] AMXAVX512,FUTURE */ + /* 250(f3 7f 48) 300 001(07) 110 022 : EVEX,PROT,AMXAVX512,FUTURE */ + {I_TCVTROWPS2BF16H, 3, {ZMMREG,TMMREG,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+22653, 632, 7064}, + /* 6910 : TCVTROWPS2BF16L zmmreg,tmmreg,reg32 [rmv: evex.512.f3.0f38.w0 6d /r ] AMXAVX512,FUTURE */ + /* 242(f2 7e 48) 300 001(6d) 110 : EVEX,PROT,AMXAVX512,FUTURE */ + {I_TCVTROWPS2BF16L, 3, {ZMMREG,TMMREG,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+45985, 632, 7065}, + /* 6911 : TCVTROWPS2BF16L zmmreg,tmmreg,imm8 [rmi: evex.512.f3.0f3a.w0 77 /r ib ] AMXAVX512,FUTURE */ + /* 250(f3 7e 48) 300 001(77) 110 022 : EVEX,PROT,AMXAVX512,FUTURE */ + {I_TCVTROWPS2BF16L, 3, {ZMMREG,TMMREG,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+22663, 632, 7066}, + /* 6912 : TCVTROWPS2PHH zmmreg,tmmreg,reg32 [rmv: evex.512.np.0f38.w0 6d /r ] AMXAVX512,FUTURE */ + /* 242(f2 7c 48) 300 001(6d) 110 : EVEX,PROT,AMXAVX512,FUTURE */ + {I_TCVTROWPS2PHH, 3, {ZMMREG,TMMREG,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+45994, 632, 7067}, + /* 6913 : TCVTROWPS2PHH zmmreg,tmmreg,imm8 [rmi: evex.512.np.0f3a.w0 07 /r ib ] AMXAVX512,FUTURE */ + /* 250(f3 7c 48) 300 001(07) 110 022 : EVEX,PROT,AMXAVX512,FUTURE */ + {I_TCVTROWPS2PHH, 3, {ZMMREG,TMMREG,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+22673, 632, 7068}, + /* 6914 : TCVTROWPS2PHL zmmreg,tmmreg,reg32 [rmv: evex.512.66.0f38.w0 6d /r ] AMXAVX512,FUTURE */ + /* 242(f2 7d 48) 300 001(6d) 110 : EVEX,PROT,AMXAVX512,FUTURE */ + {I_TCVTROWPS2PHL, 3, {ZMMREG,TMMREG,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+46003, 632, 7069}, + /* 6915 : TCVTROWPS2PHL zmmreg,tmmreg,imm8 [rmi: evex.512.f2.0f3a.w0 77 /r ib ] AMXAVX512,FUTURE */ + /* 250(f3 7f 48) 300 001(77) 110 022 : EVEX,PROT,AMXAVX512,FUTURE */ + {I_TCVTROWPS2PHL, 3, {ZMMREG,TMMREG,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+22683, 632, 7070}, + /* 6916 : TDPBF8PS tmmreg,tmmreg,tmmreg [rmv: vex.128.np.map5.w0 fd /r ] AMXFP8,FUTURE */ + /* 262(005 000) 001(fd) 110 : NOAPX,VEX,AMXFP8,FUTURE */ + {I_TDPBF8PS, 3, {TMMREG|RN_L16,TMMREG|RN_L16,TMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+66240, 633, 7071}, + /* 6917 : TDPBHF8PS tmmreg,tmmreg,tmmreg [rmv: vex.128.f2.map5.w0 fd /r ] AMXFP8,FUTURE */ + /* 262(005 003) 001(fd) 110 : NOAPX,VEX,AMXFP8,FUTURE */ + {I_TDPBHF8PS, 3, {TMMREG|RN_L16,TMMREG|RN_L16,TMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+66247, 633, 7072}, + /* 6918 : TDPHBF8PS tmmreg,tmmreg,tmmreg [rmv: vex.128.f3.map5.w0 fd /r ] AMXFP8,FUTURE */ + /* 262(005 002) 001(fd) 110 : NOAPX,VEX,AMXFP8,FUTURE */ + {I_TDPHBF8PS, 3, {TMMREG|RN_L16,TMMREG|RN_L16,TMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+66254, 633, 7073}, + /* 6919 : TDPHF8PS tmmreg,tmmreg,tmmreg [rmv: vex.128.66.map5.w0 fd /r ] AMXFP8,FUTURE */ + /* 262(005 001) 001(fd) 110 : NOAPX,VEX,AMXFP8,FUTURE */ + {I_TDPHF8PS, 3, {TMMREG|RN_L16,TMMREG|RN_L16,TMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+66261, 633, 7074}, + /* 6920 : TILEMOVROW zmmreg,tmmreg,imm8 [rmi: evex.512.66.0f3a.w0 07 /r ib ] AMXAVX512,FUTURE */ + /* 250(f3 7d 48) 300 001(07) 110 022 : EVEX,PROT,AMXAVX512,FUTURE */ + {I_TILEMOVROW, 3, {ZMMREG,TMMREG,IMM_NORMAL|BITS8,0,0}, NO_DECORATOR, nasm_bytecodes+22693, 632, 7075}, + /* 6921 : TILEMOVROW zmmreg,tmmreg,reg32 [rmv: evex.512.66.0f38.w0 4a /r ] AMXAVX512,FUTURE */ + /* 242(f2 7d 48) 300 001(4a) 110 : EVEX,PROT,AMXAVX512,FUTURE */ + {I_TILEMOVROW, 3, {ZMMREG,TMMREG,REG_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+46012, 632, 7076}, + /* 6922 : TMMULTF32PS tmmreg,tmmreg,tmmreg [rmv: vex.128.66.0f38.w0 48 /r ] AMXTF32,OBSOLETE,NEVER,FUTURE */ + /* 262(002 001) 001(48) 110 : NOAPX,VEX,AMXTF32,OBSOLETE,NEVER,FUTURE */ + {I_TMMULTF32PS, 3, {TMMREG|RN_L16,TMMREG|RN_L16,TMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+66268, 634, 7077}, + /* 6923 : TTCMMIMFP16PS tmmreg,tmmreg,tmmreg [rmv: vex.128.f2.0f38.w0 6b /r ] AMXTRANSPOSE,OBSOLETE,NEVER,FUTURE */ + /* 262(002 003) 001(6b) 110 : NOAPX,VEX,AMXTRANSPOSE,OBSOLETE,NEVER,FUTURE */ + {I_TTCMMIMFP16PS, 3, {TMMREG|RN_L16,TMMREG|RN_L16,TMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+66275, 631, 7078}, + /* 6924 : TTCMMRLFP16PS tmmreg,tmmreg,tmmreg [rmv: vex.128.f3.0f38.w0 6b /r ] AMXTRANSPOSE,OBSOLETE,NEVER,FUTURE */ + /* 262(002 002) 001(6b) 110 : NOAPX,VEX,AMXTRANSPOSE,OBSOLETE,NEVER,FUTURE */ + {I_TTCMMRLFP16PS, 3, {TMMREG|RN_L16,TMMREG|RN_L16,TMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+66282, 631, 7079}, + /* 6925 : TTDPBF16PS tmmreg,tmmreg,tmmreg [rmv: vex.128.f3.0f38.w0 6c /r ] AMXTRANSPOSE,OBSOLETE,NEVER,FUTURE */ + /* 262(002 002) 001(6c) 110 : NOAPX,VEX,AMXTRANSPOSE,OBSOLETE,NEVER,FUTURE */ + {I_TTDPBF16PS, 3, {TMMREG|RN_L16,TMMREG|RN_L16,TMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+66289, 631, 7080}, + /* 6926 : TTDPFP16PS tmmreg,tmmreg,tmmreg [rmv: vex.128.f2.0f38.w0 6c /r ] AMXTRANSPOSE,OBSOLETE,NEVER,FUTURE */ + /* 262(002 003) 001(6c) 110 : NOAPX,VEX,AMXTRANSPOSE,OBSOLETE,NEVER,FUTURE */ + {I_TTDPFP16PS, 3, {TMMREG|RN_L16,TMMREG|RN_L16,TMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+66296, 631, 7081}, + /* 6927 : TTMMULTF32PS tmmreg,tmmreg,tmmreg [rmv: vex.128.np.0f38.w0 48 /r ] AMXTRANSPOSE,OBSOLETE,NEVER,FUTURE */ + /* 262(002 000) 001(48) 110 : NOAPX,VEX,AMXTRANSPOSE,OBSOLETE,NEVER,FUTURE */ + {I_TTMMULTF32PS, 3, {TMMREG|RN_L16,TMMREG|RN_L16,TMMREG|RN_L16,0,0}, NO_DECORATOR, nasm_bytecodes+66303, 631, 7082}, + /* 6928 : TTRANSPOSED tmmreg,tmmreg [rm: vex.128.f3.0f38.w0 5f /r ] AMXTRANSPOSE,OBSOLETE,NEVER,FUTURE */ + /* 270(002 002) 001(5f) 110 : NOAPX,VEX,AMXTRANSPOSE,OBSOLETE,NEVER,FUTURE */ + {I_TTRANSPOSED, 2, {TMMREG|RN_L16,TMMREG|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66310, 631, 7083}, + /* 6929 : VADDPH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.nds.128.np.map5.w0 58 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f5 7c 08) 301 001(58) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VADDPH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+46021, 565, 7086}, + /* 6930 : VADDPH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.nds.256.np.map5.w0 58 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f5 7c 28) 301 001(58) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VADDPH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+46039, 565, 7087}, + /* 6931 : VADDPH zmmreg|mask|z,zmmreg*,zmmrm512|b16|er [rvm:fv: evex.nds.512.np.map5.w0 58 /r ] AVX512FP16,FUTURE */ + /* 241(f5 7c 48) 301 001(58) 120 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VADDPH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+46057, 566, 7088}, + /* 6932 : VADDSH xmmreg|mask|z,xmmreg*,xmmrm16|er [rvm:t1s16:evex.nds.lig.f3.map5.w0 58 /r ] AVX512FP16,FUTURE */ + /* 241(f5 7e 08) 305 001(58) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VADDSH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+46075, 567, 7089}, + /* 6933 : VCMPPH kreg|mask,xmmreg*,xmmrm128|b16,imm8 [rvmi:fv: evex.nds.128.np.0f3a.w0 C2 /r ib ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f3 7c 08) 301 001(c2) 120 023 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCMPPH, 4, {OPMASKREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK,0,B16,0,0}, nasm_bytecodes+22703, 565, 7090}, + /* 6934 : VCMPPH kreg|mask,ymmreg*,ymmrm256|b16,imm8 [rvmi:fv: evex.nds.256.np.0f3a.w0 C2 /r ib ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f3 7c 28) 301 001(c2) 120 023 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCMPPH, 4, {OPMASKREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK,0,B16,0,0}, nasm_bytecodes+22723, 565, 7091}, + /* 6935 : VCMPPH kreg|mask,zmmreg*,zmmrm512|b16|sae,imm8 [rvmi:fv: evex.nds.512.np.0f3a.w0 C2 /r ib ] AVX512FP16,FUTURE */ + /* 241(f3 7c 48) 301 001(c2) 120 023 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCMPPH, 4, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK,0,B16|SAE,0,0}, nasm_bytecodes+22743, 566, 7092}, + /* 6936 : VCMPSH kreg|mask,xmmreg*,xmmrm16|sae,imm8 [rvmi:t1s16:evex.nds.lig.f3.0f3a.w0 C2 /r ib ] AVX512FP16,FUTURE */ + /* 241(f3 7e 08) 305 001(c2) 120 023 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCMPSH, 4, {OPMASKREG,XMMREG,RM_XMM|BITS16,IMM_NORMAL|BITS8,0}, {MASK,0,SAE,0,0}, nasm_bytecodes+22763, 567, 7093}, + /* 6937 : VCOMISH xmmreg,xmmrm16|sae [rm:fv: evex.lig.np.map5.w0 2F /r ] FL,AVX512FP16,FUTURE */ + /* 250(f5 7c 08) 301 001(2f) 110 : LIG,FL,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCOMISH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+46093, 635, 7094}, + /* 6938 : VCVTDQ2PH xmmreg|mask|z,xmmrm128|b32 [rm:fv: evex.128.np.map5.w0 5B /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7c 08) 301 001(5b) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTDQ2PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+46102, 565, 7095}, + /* 6939 : VCVTDQ2PH xmmreg|mask|z,ymmrm256|b32 [rm:fv: evex.256.np.map5.w0 5B /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7c 28) 301 001(5b) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTDQ2PH, 2, {XMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+46111, 565, 7096}, + /* 6940 : VCVTDQ2PH ymmreg|mask|z,zmmrm512|b32|er [rm:fv: evex.512.np.map5.w0 5B /r ] AVX512FP16,FUTURE */ + /* 250(f5 7c 48) 301 001(5b) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTDQ2PH, 2, {YMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+46120, 566, 7097}, + /* 6941 : VCVTPD2PH xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.66.map5.w1 5a /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 fd 08) 301 001(5a) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTPD2PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+46129, 565, 7098}, + /* 6942 : VCVTPD2PH xmmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.66.map5.w1 5a /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 fd 28) 301 001(5a) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTPD2PH, 2, {XMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+46138, 565, 7099}, + /* 6943 : VCVTPD2PH xmmreg|mask|z,zmmrm512|b64|er [rm:fv: evex.512.66.map5.w1 5a /r ] AVX512FP16,FUTURE */ + /* 250(f5 fd 48) 301 001(5a) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTPD2PH, 2, {XMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+46147, 566, 7100}, + /* 6944 : VCVTPH2DQ xmmreg|mask|z,xmmrm64|b16 [rm:hv: evex.128.66.map5.w0 5B /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7d 08) 302 001(5b) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTPH2DQ, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+46156, 565, 7101}, + /* 6945 : VCVTPH2DQ ymmreg|mask|z,xmmrm128|b16 [rm:hv: evex.256.66.map5.w0 5B /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7d 28) 302 001(5b) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTPH2DQ, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+46165, 565, 7102}, + /* 6946 : VCVTPH2DQ zmmreg|mask|z,ymmrm256|b16|er [rm:hv: evex.512.66.map5.w0 5B /r ] AVX512FP16,FUTURE */ + /* 250(f5 7d 48) 302 001(5b) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTPH2DQ, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+46174, 566, 7103}, + /* 6947 : VCVTPH2PD xmmreg|mask|z,xmmrm32|b16 [rm:qvm: evex.128.np.map5.w0 5A /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7c 08) 315 001(5a) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTPH2PD, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+46183, 565, 7104}, + /* 6948 : VCVTPH2PD ymmreg|mask|z,xmmrm64|b16 [rm:qvm: evex.256.np.map5.w0 5A /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7c 28) 315 001(5a) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTPH2PD, 2, {YMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+46192, 565, 7105}, + /* 6949 : VCVTPH2PD zmmreg|mask|z,xmmrm128|b16|sae [rm:qvm: evex.512.np.map5.w0 5A /r ] AVX512FP16,FUTURE */ + /* 250(f5 7c 48) 315 001(5a) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTPH2PD, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+46201, 566, 7106}, + /* 6950 : VCVTPH2PS xmmreg|mask|z,xmmrm64 [rm:hvm: evex.128.66.0f38.w0 13 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 08) 314 001(13) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTPH2PS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+31360, 543, 7107}, + /* 6951 : VCVTPH2PS ymmreg|mask|z,xmmrm128 [rm:hvm: evex.256.66.0f38.w0 13 /r ] AVX512,AVX512VL,FUTURE */ + /* 250(f2 7d 28) 314 001(13) 110 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTPH2PS, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+31369, 543, 7108}, + /* 6952 : VCVTPH2PS zmmreg|mask|z,ymmrm256|sae [rm:hvm: evex.512.66.0f38.w0 13 /r ] AVX512,FUTURE */ + /* 250(f2 7d 48) 314 001(13) 110 : EVEX,PROT,AVX512,FUTURE */ + {I_VCVTPH2PS, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+31378, 544, 7109}, + /* 6953 : VCVTPH2PSX xmmreg|mask|z,xmmrm64|b16 [rm:hv: evex.128.66.map6.w0 13 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f6 7d 08) 302 001(13) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTPH2PSX, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+46210, 565, 7110}, + /* 6954 : VCVTPH2PSX ymmreg|mask|z,xmmrm128|b16 [rm:hv: evex.256.66.map6.w0 13 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f6 7d 28) 302 001(13) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTPH2PSX, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+46219, 565, 7111}, + /* 6955 : VCVTPH2PSX zmmreg|mask|z,ymmrm256|b16|sae [rm:hv: evex.512.66.map6.w0 13 /r ] AVX512FP16,FUTURE */ + /* 250(f6 7d 48) 302 001(13) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTPH2PSX, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+46228, 566, 7112}, + /* 6956 : VCVTPH2QQ xmmreg|mask|z,xmmrm32|b16 [rm:qvm: evex.128.66.map5.w0 7b /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7d 08) 315 001(7b) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTPH2QQ, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+46237, 565, 7113}, + /* 6957 : VCVTPH2QQ ymmreg|mask|z,xmmrm64|b16 [rm:qvm: evex.256.66.map5.w0 7b /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7d 28) 315 001(7b) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTPH2QQ, 2, {YMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+46246, 565, 7114}, + /* 6958 : VCVTPH2QQ zmmreg|mask|z,xmmrm128|b16|er [rm:qvm: evex.512.66.map5.w0 7b /r ] AVX512FP16,FUTURE */ + /* 250(f5 7d 48) 315 001(7b) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTPH2QQ, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+46255, 566, 7115}, + /* 6959 : VCVTPH2UDQ xmmreg|mask|z,xmmrm64|b16 [rm:hv: evex.128.map5.w0 79 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7c 08) 302 001(79) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTPH2UDQ, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+46264, 565, 7116}, + /* 6960 : VCVTPH2UDQ ymmreg|mask|z,xmmrm128|b16 [rm:hv: evex.256.map5.w0 79 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7c 28) 302 001(79) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTPH2UDQ, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+46273, 565, 7117}, + /* 6961 : VCVTPH2UDQ zmmreg|mask|z,ymmrm256|b16|er [rm:hv: evex.512.map5.w0 79 /r ] AVX512FP16,FUTURE */ + /* 250(f5 7c 48) 302 001(79) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTPH2UDQ, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+46282, 566, 7118}, + /* 6962 : VCVTPH2UQQ xmmreg|mask|z,xmmrm32|b16 [rm:qvm: evex.128.66.map5.w0 79 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7d 08) 315 001(79) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTPH2UQQ, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+46291, 565, 7119}, + /* 6963 : VCVTPH2UQQ ymmreg|mask|z,xmmrm64|b16 [rm:qvm: evex.256.66.map5.w0 79 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7d 28) 315 001(79) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTPH2UQQ, 2, {YMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+46300, 565, 7120}, + /* 6964 : VCVTPH2UQQ zmmreg|mask|z,xmmrm128|b16|er [rm:qvm: evex.512.66.map5.w0 79 /r ] AVX512FP16,FUTURE */ + /* 250(f5 7d 48) 315 001(79) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTPH2UQQ, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+46309, 566, 7121}, + /* 6965 : VCVTPH2UW xmmreg|mask|z,xmmrm128|b16 [rm:fv: evex.128.np.map5.w0 7d /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7c 08) 301 001(7d) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTPH2UW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+46318, 565, 7122}, + /* 6966 : VCVTPH2UW ymmreg|mask|z,ymmrm256|b16 [rm:fv: evex.256.np.map5.w0 7d /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7c 28) 301 001(7d) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTPH2UW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+46327, 565, 7123}, + /* 6967 : VCVTPH2UW zmmreg|mask|z,zmmrm512|b16|er [rm:fv: evex.512.np.map5.w0 7d /r ] AVX512FP16,FUTURE */ + /* 250(f5 7c 48) 301 001(7d) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTPH2UW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+46336, 566, 7124}, + /* 6968 : VCVTPH2W xmmreg|mask|z,xmmrm128|b16 [rm:fv: evex.128.66.map5.w0 7d /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7d 08) 301 001(7d) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTPH2W, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+46345, 565, 7125}, + /* 6969 : VCVTPH2W ymmreg|mask|z,ymmrm256|b16 [rm:fv: evex.256.66.map5.w0 7d /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7d 28) 301 001(7d) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTPH2W, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+46354, 565, 7126}, + /* 6970 : VCVTPH2W zmmreg|mask|z,zmmrm512|b16|er [rm:fv: evex.512.66.map5.w0 7d /r ] AVX512FP16,FUTURE */ + /* 250(f5 7d 48) 301 001(7d) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTPH2W, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+46363, 566, 7127}, + /* 6971 : VCVTPS2PH xmmreg|mask|z,xmmreg,imm8 [mri:hvm: evex.128.66.0f3a.w0 1d /r ib ] AVX512,AVX512VL,FUTURE */ + /* 250(f3 7d 08) 314 001(1d) 101 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTPS2PH, 3, {XMMREG,XMMREG,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18333, 543, 7128}, + /* 6972 : VCVTPS2PH mem64|mask,xmmreg,imm8 [mri:hvm: evex.128.66.0f3a.w0 1d /r ib ] AVX512,AVX512VL,FUTURE */ + /* 250(f3 7d 08) 314 001(1d) 101 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTPS2PH, 3, {MEMORY|BITS64,XMMREG,IMM_NORMAL|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+18333, 543, 7129}, + /* 6973 : VCVTPS2PH xmmreg|mask|z,ymmreg,imm8 [mri:hvm: evex.256.66.0f3a.w0 1d /r ib ] AVX512,AVX512VL,FUTURE */ + /* 250(f3 7d 28) 314 001(1d) 101 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTPS2PH, 3, {XMMREG,YMMREG,IMM_NORMAL|BITS8,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+18343, 543, 7130}, + /* 6974 : VCVTPS2PH mem128|mask,ymmreg,imm8 [mri:hvm: evex.256.66.0f3a.w0 1d /r ib ] AVX512,AVX512VL,FUTURE */ + /* 250(f3 7d 28) 314 001(1d) 101 022 : EVEX,PROT,AVX512,AVX512VL,FUTURE */ + {I_VCVTPS2PH, 3, {MEMORY|BITS128,YMMREG,IMM_NORMAL|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+18343, 543, 7131}, + /* 6975 : VCVTPS2PH ymmreg|mask|z,zmmreg|sae,imm8 [mri:hvm: evex.512.66.0f3a.w0 1d /r ib ] AVX512,FUTURE */ + /* 250(f3 7d 48) 314 001(1d) 101 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VCVTPS2PH, 3, {YMMREG,ZMMREG,IMM_NORMAL|BITS8,0,0}, {MASK|Z,SAE,0,0,0}, nasm_bytecodes+18353, 544, 7132}, + /* 6976 : VCVTPS2PH mem256|mask,zmmreg|sae,imm8 [mri:hvm: evex.512.66.0f3a.w0 1d /r ib ] AVX512,FUTURE */ + /* 250(f3 7d 48) 314 001(1d) 101 022 : EVEX,PROT,AVX512,FUTURE */ + {I_VCVTPS2PH, 3, {MEMORY|BITS256,ZMMREG,IMM_NORMAL|BITS8,0,0}, {MASK,SAE,0,0,0}, nasm_bytecodes+18353, 544, 7133}, + /* 6977 : VCVTPS2PHX xmmreg|mask|z,xmmrm128|b32 [rm:fv: evex.128.66.map5.w0 1d /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7d 08) 301 001(1d) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTPS2PHX, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+46372, 565, 7134}, + /* 6978 : VCVTPS2PHX xmmreg|mask|z,ymmrm256|b32 [rm:fv: evex.256.66.map5.w0 1d /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7d 28) 301 001(1d) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTPS2PHX, 2, {XMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+46381, 565, 7135}, + /* 6979 : VCVTPS2PHX ymmreg|mask|z,zmmrm512|b32|er [rm:fv: evex.512.66.map5.w0 1d /r ] AVX512FP16,FUTURE */ + /* 250(f5 7d 48) 301 001(1d) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTPS2PHX, 2, {YMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+46390, 566, 7136}, + /* 6980 : VCVTQQ2PH xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.np.map5.w1 5b /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 fc 08) 301 001(5b) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTQQ2PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+46399, 565, 7137}, + /* 6981 : VCVTQQ2PH xmmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.np.map5.w1 5b /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 fc 28) 301 001(5b) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTQQ2PH, 2, {XMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+46408, 565, 7138}, + /* 6982 : VCVTQQ2PH xmmreg|mask|z,zmmrm512|b64|er [rm:fv: evex.512.np.map5.w1 5b /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 fc 48) 301 001(5b) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTQQ2PH, 2, {XMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|ER,0,0,0}, nasm_bytecodes+46417, 565, 7139}, + /* 6983 : VCVTSD2SH xmmreg|mask|z,xmmreg*,xmmrm64|er [rvm:t1s: evex.nds.lig.f2.map5.w1 5a /r ] AVX512FP16,FUTURE */ + /* 241(f5 ff 08) 306 001(5a) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTSD2SH, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+46426, 567, 7140}, + /* 6984 : VCVTSH2SD xmmreg,xmmreg*,xmmrm16|sae [rvm:t1s: evex.nds.lig.f3.map5.w0 5a /r ] AVX512FP16,FUTURE */ + /* 241(f5 7e 08) 306 001(5a) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTSH2SD, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {0,0,SAE,0,0}, nasm_bytecodes+46444, 567, 7141}, + /* 6985 : VCVTSH2SI reg32,xmmrm16|er [rm:t1s: evex.lig.f3.map5.w0 2d /r ] AVX512FP16,FUTURE */ + /* 250(f5 7e 08) 306 001(2d) 110 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTSH2SI, 2, {REG_GPR|BITS32,RM_XMM|BITS16,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+46462, 567, 7142}, + /* 6986 : VCVTSH2SI reg64,xmmrm16|er [rm:t1s: evex.lig.f3.map5.w1 2d /r ] AVX512FP16,FUTURE */ + /* 250(f5 fe 08) 306 001(2d) 110 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTSH2SI, 2, {REG_GPR|BITS64,RM_XMM|BITS16,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+46471, 567, 7143}, + /* 6987 : VCVTSH2SS xmmreg|mask|z,xmmreg*,xmmrm16|sae [rvm:t1s: evex.nds.lig.map6.w0 13 /r ] AVX512FP16,FUTURE */ + /* 241(f6 7c 08) 306 001(13) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTSH2SS, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+46480, 567, 7144}, + /* 6988 : VCVTSH2USI reg32,xmmrm16|er [rm:t1s: evex.lig.f3.map5.w0 79 /r ] AVX512FP16,FUTURE */ + /* 250(f5 7e 08) 306 001(79) 110 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTSH2USI, 2, {REG_GPR|BITS32,RM_XMM|BITS16,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+46498, 567, 7145}, + /* 6989 : VCVTSH2USI reg64,xmmrm16|er [rm:t1s: evex.lig.f3.map5.w1 79 /r ] AVX512FP16,FUTURE */ + /* 250(f5 fe 08) 306 001(79) 110 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTSH2USI, 2, {REG_GPR|BITS64,RM_XMM|BITS16,0,0,0}, {0,ER,0,0,0}, nasm_bytecodes+46507, 567, 7146}, + /* 6990 : VCVTSI2SH xmmreg,xmmreg*,rm32|er [rvm:t1s: evex.nds.lig.f3.map5.w0 2a /r ] AVX512FP16,FUTURE */ + /* 241(f5 7e 08) 306 001(2a) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTSI2SH, 3, {XMMREG,XMMREG,RM_GPR|BITS32,0,0}, {0,0,ER,0,0}, nasm_bytecodes+46516, 567, 7147}, + /* 6991 : VCVTSI2SH xmmreg,xmmreg*,rm64|er [rvm:t1s: evex.nds.lig.f3.map5.w1 2a /r ] AVX512FP16,FUTURE */ + /* 241(f5 fe 08) 306 001(2a) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTSI2SH, 3, {XMMREG,XMMREG,RM_GPR|BITS64,0,0}, {0,0,ER,0,0}, nasm_bytecodes+46534, 567, 7148}, + /* 6992 : VCVTSS2SH xmmreg,xmmreg*,xmmrm32|er [rvm:t1s: evex.nds.lig.np.map5 1d /r ] AVX512FP16,FUTURE */ + /* 241(f5 7c 08) 306 001(1d) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTSS2SH, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {0,0,ER,0,0}, nasm_bytecodes+46552, 567, 7149}, + /* 6993 : VCVTTPH2DQ xmmreg|mask|z,xmmrm64|b16 [rm:hv: evex.128.f3.map5.w0 5b /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7e 08) 302 001(5b) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTTPH2DQ, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+46570, 565, 7150}, + /* 6994 : VCVTTPH2DQ ymmreg|mask|z,xmmrm128|b16 [rm:hv: evex.256.f3.map5.w0 5b /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7e 28) 302 001(5b) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTTPH2DQ, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+46579, 565, 7151}, + /* 6995 : VCVTTPH2DQ zmmreg|mask|z,ymmrm256|b16|sae [rm:hv: evex.512.f3.map5.w0 5b /r ] AVX512FP16,FUTURE */ + /* 250(f5 7e 48) 302 001(5b) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTTPH2DQ, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+46588, 566, 7152}, + /* 6996 : VCVTTPH2QQ xmmreg|mask|z,xmmrm32|b16 [rm:t1s: evex.128.66.map5.w0 7a /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7d 08) 306 001(7a) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTTPH2QQ, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+46597, 565, 7153}, + /* 6997 : VCVTTPH2QQ ymmreg|mask|z,xmmrm64|b16 [rm:t1s: evex.256.66.map5.w0 7a /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7d 28) 306 001(7a) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTTPH2QQ, 2, {YMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+46606, 565, 7154}, + /* 6998 : VCVTTPH2QQ zmmreg|mask|z,xmmrm128|b16|sae [rm:t1s: evex.512.66.map5.w0 7a /r ] AVX512FP16,FUTURE */ + /* 250(f5 7d 48) 306 001(7a) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTTPH2QQ, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+46615, 566, 7155}, + /* 6999 : VCVTTPH2UDQ xmmreg|mask|z,xmmrm64|b16 [rm:hv: evex.128.np.map5.w0 78 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7c 08) 302 001(78) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTTPH2UDQ, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+46624, 565, 7156}, + /* 7000 : VCVTTPH2UDQ ymmreg|mask|z,xmmrm128|b16 [rm:hv: evex.256.np.map5.w0 78 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7c 28) 302 001(78) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTTPH2UDQ, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+46633, 565, 7157}, + /* 7001 : VCVTTPH2UDQ zmmreg|mask|z,ymmrm256|b16|sae [rm:hv: evex.512.np.map5.w0 78 /r ] AVX512FP16,FUTURE */ + /* 250(f5 7c 48) 302 001(78) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTTPH2UDQ, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+46642, 566, 7158}, + /* 7002 : VCVTTPH2UQQ xmmreg|mask|z,xmmrm32|b16 [rm:t1s: evex.128.66.map5.w0 78 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7d 08) 306 001(78) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTTPH2UQQ, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+46651, 565, 7159}, + /* 7003 : VCVTTPH2UQQ ymmreg|mask|z,xmmrm64|b16 [rm:t1s: evex.256.66.map5.w0 78 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7d 28) 306 001(78) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTTPH2UQQ, 2, {YMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+46660, 565, 7160}, + /* 7004 : VCVTTPH2UQQ zmmreg|mask|z,xmmrm128|b16|sae [rm:t1s: evex.512.66.map5.w0 78 /r ] AVX512FP16,FUTURE */ + /* 250(f5 7d 48) 306 001(78) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTTPH2UQQ, 2, {ZMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+46669, 566, 7161}, + /* 7005 : VCVTTPH2UW xmmreg|mask|z,xmmrm128|b16 [rm:fv: evex.128.np.map5.w0 7c /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7c 08) 301 001(7c) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTTPH2UW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+46678, 565, 7162}, + /* 7006 : VCVTTPH2UW ymmreg|mask|z,ymmrm256|b16 [rm:fv: evex.256.np.map5.w0 7c /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7c 28) 301 001(7c) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTTPH2UW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+46687, 565, 7163}, + /* 7007 : VCVTTPH2UW zmmreg|mask|z,zmmrm512|b16|sae [rm:fv: evex.512.np.map5.w0 7c /r ] AVX512FP16,FUTURE */ + /* 250(f5 7c 48) 301 001(7c) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTTPH2UW, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+46696, 566, 7164}, + /* 7008 : VCVTTPH2W xmmreg|mask|z,xmmrm128|b16 [rm:fv: evex.128.66.map5.w0 7c /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7d 08) 301 001(7c) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTTPH2W, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+46705, 565, 7165}, + /* 7009 : VCVTTPH2W ymmreg|mask|z,ymmrm256|b16 [rm:fv: evex.256.66.map5.w0 7c /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7d 28) 301 001(7c) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTTPH2W, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+46714, 565, 7166}, + /* 7010 : VCVTTPH2W zmmreg|mask|z,zmmrm512|b16|sae [rm:fv: evex.512.66.map5.w0 7c /r ] AVX512FP16,FUTURE */ + /* 250(f5 7d 48) 301 001(7c) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTTPH2W, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+46723, 566, 7167}, + /* 7011 : VCVTTSH2SI reg32,xmmrm16|sae [rm:t1s: evex.lig.f3.map5.w0 2c /r ] AVX512FP16,FUTURE */ + /* 250(f5 7e 08) 306 001(2c) 110 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTTSH2SI, 2, {REG_GPR|BITS32,RM_XMM|BITS16,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+46732, 567, 7168}, + /* 7012 : VCVTTSH2SI reg64,xmmrm16|sae [rm:t1s: evex.lig.f3.map5.w1 2c /r ] AVX512FP16,FUTURE */ + /* 250(f5 fe 08) 306 001(2c) 110 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTTSH2SI, 2, {REG_GPR|BITS64,RM_XMM|BITS16,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+46741, 567, 7169}, + /* 7013 : VCVTTSH2USI reg32,xmmrm16|sae [rm:t1s: evex.lig.f3.map5.w0 78 /r ] AVX512FP16,FUTURE */ + /* 250(f5 7e 08) 306 001(78) 110 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTTSH2USI, 2, {REG_GPR|BITS32,RM_XMM|BITS16,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+46750, 567, 7170}, + /* 7014 : VCVTTSH2USI reg64,xmmrm16|sae [rm:t1s: evex.lig.f3.map5.w1 78 /r ] AVX512FP16,FUTURE */ + /* 250(f5 fe 08) 306 001(78) 110 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTTSH2USI, 2, {REG_GPR|BITS64,RM_XMM|BITS16,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+46759, 567, 7171}, + /* 7015 : VCVTUDQ2PH xmmreg|mask|z,xmmrm128|b32 [rm:fv: evex.128.f2.map5.w0 7a /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7f 08) 301 001(7a) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTUDQ2PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+46768, 565, 7172}, + /* 7016 : VCVTUDQ2PH xmmreg|mask|z,ymmrm256|b32 [rm:fv: evex.256.f2.map5.w0 7a /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7f 28) 301 001(7a) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTUDQ2PH, 2, {XMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+46777, 565, 7173}, + /* 7017 : VCVTUDQ2PH ymmreg|mask|z,zmmrm512|b32 [rm:fv: evex.512.f2.map5.w0 7a /r ] AVX512FP16,FUTURE */ + /* 250(f5 7f 48) 301 001(7a) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTUDQ2PH, 2, {YMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+46786, 566, 7174}, + /* 7018 : VCVTUQQ2PH xmmreg|mask|z,xmmrm128|b32 [rm:fv: evex.128.f2.map5.w1 7a /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 ff 08) 301 001(7a) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTUQQ2PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+46795, 565, 7175}, + /* 7019 : VCVTUQQ2PH xmmreg|mask|z,ymmrm256|b32 [rm:fv: evex.256.f2.map5.w1 7a /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 ff 28) 301 001(7a) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTUQQ2PH, 2, {XMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+46804, 565, 7176}, + /* 7020 : VCVTUQQ2PH xmmreg|mask|z,zmmrm512|b32 [rm:fv: evex.512.f2.map5.w1 7a /r ] AVX512FP16,FUTURE */ + /* 250(f5 ff 48) 301 001(7a) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTUQQ2PH, 2, {XMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+46813, 566, 7177}, + /* 7021 : VCVTUSI2SH xmmreg,xmmreg*,rm32|er [rvm:t1s: evex.nds.lig.f3.map5.w0 7b /r ] AVX512FP16,FUTURE */ + /* 241(f5 7e 08) 306 001(7b) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTUSI2SH, 3, {XMMREG,XMMREG,RM_GPR|BITS32,0,0}, {0,0,ER,0,0}, nasm_bytecodes+46822, 567, 7178}, + /* 7022 : VCVTUSI2SH xmmreg,xmmreg*,rm64|er [rvm:t1s: evex.nds.lig.f3.map5.w1 7b /r ] AVX512FP16,FUTURE */ + /* 241(f5 fe 08) 306 001(7b) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTUSI2SH, 3, {XMMREG,XMMREG,RM_GPR|BITS64,0,0}, {0,0,ER,0,0}, nasm_bytecodes+46840, 567, 7179}, + /* 7023 : VCVTUW2PH xmmreg|mask|z,xmmrm128|b16 [rm:fv: evex.128.f2.map5.w0 7d /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7f 08) 301 001(7d) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTUW2PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+46858, 565, 7180}, + /* 7024 : VCVTUW2PH ymmreg|mask|z,ymmrm256|b16 [rm:fv: evex.256.f2.map5.w0 7d /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7f 28) 301 001(7d) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTUW2PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+46867, 565, 7181}, + /* 7025 : VCVTUW2PH zmmreg|mask|z,zmmrm512|b16|er [rm:fv: evex.512.f2.map5.w0 7d /r ] AVX512FP16,FUTURE */ + /* 250(f5 7f 48) 301 001(7d) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTUW2PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+46876, 566, 7182}, + /* 7026 : VCVTW2PH xmmreg|mask|z,xmmrm128|b16 [rm:fv: evex.128.f3.map5.w0 7d /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7e 08) 301 001(7d) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTW2PH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+46885, 565, 7183}, + /* 7027 : VCVTW2PH ymmreg|mask|z,ymmrm256|b16 [rm:fv: evex.256.f3.map5.w0 7d /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7e 28) 301 001(7d) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VCVTW2PH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+46894, 565, 7184}, + /* 7028 : VCVTW2PH zmmreg|mask|z,zmmrm512|b16|er [rm:fv: evex.512.f3.map5.w0 7d /r ] AVX512FP16,FUTURE */ + /* 250(f5 7e 48) 301 001(7d) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VCVTW2PH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+46903, 566, 7185}, + /* 7029 : VDIVPH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.nds.128.np.map5 5e /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f5 7c 08) 301 001(5e) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VDIVPH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+46912, 565, 7186}, + /* 7030 : VDIVPH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.nds.256.np.map5 5e /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f5 7c 28) 301 001(5e) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VDIVPH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+46930, 565, 7187}, + /* 7031 : VDIVPH zmmreg|mask|z,zmmreg*,zmmrm512|b16|er [rvm:fv: evex.nds.512.np.map5 5e /r ] AVX512FP16,FUTURE */ + /* 241(f5 7c 48) 301 001(5e) 120 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VDIVPH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+46948, 566, 7188}, + /* 7032 : VDIVSH xmmreg|mask|z,xmmreg*,xmmrm16|er [rvm:t1s16:evex.nds.lig.f3.map5 5e /r ] AVX512FP16,FUTURE */ + /* 241(f5 7e 08) 305 001(5e) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VDIVSH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+46966, 567, 7189}, + /* 7033 : VFCMADDCPH xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.f2.map6.w0 56 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7f 08) 301 001(56) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFCMADDCPH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+46984, 565, 7190}, + /* 7034 : VFCMADDCPH ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.f2.map6.w0 56 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7f 28) 301 001(56) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFCMADDCPH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+47002, 565, 7191}, + /* 7035 : VFCMADDCPH zmmreg|mask|z,zmmreg*,zmmrm512|b32|er [rvm:fv: evex.nds.512.f2.map6.w0 56 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7f 48) 301 001(56) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFCMADDCPH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+47020, 565, 7192}, + /* 7036 : VFMADDCPH xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.f3.map6.w0 56 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7e 08) 301 001(56) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMADDCPH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+47038, 565, 7193}, + /* 7037 : VFMADDCPH ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.f3.map6.w0 56 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7e 28) 301 001(56) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMADDCPH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+47056, 565, 7194}, + /* 7038 : VFMADDCPH zmmreg|mask|z,zmmreg*,zmmrm512|b32|er [rvm:fv: evex.nds.512.f3.map6.w0 56 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7e 48) 301 001(56) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMADDCPH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+47074, 565, 7195}, + /* 7039 : VFCMADDCSH xmmreg|mask|z,xmmreg*,xmmrm32|er [rvm:t1s: evex.nds.lig.f2.map6.w0 57 /r ] AVX512FP16,FUTURE */ + /* 241(f6 7f 08) 306 001(57) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFCMADDCSH, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+47092, 567, 7196}, + /* 7040 : VFMADDCSH xmmreg|mask|z,xmmreg*,xmmrm32|er [rvm:t1s: evex.nds.lig.f3.map6.w0 57 /r ] AVX512FP16,FUTURE */ + /* 241(f6 7e 08) 306 001(57) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFMADDCSH, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+47110, 567, 7197}, + /* 7041 : VFCMULCPH xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.f2.map6.w0 d6 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7f 08) 301 001(d6) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFCMULCPH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+47128, 565, 7198}, + /* 7042 : VFCMULCPH ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.f2.map6.w0 d6 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7f 28) 301 001(d6) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFCMULCPH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+47146, 565, 7199}, + /* 7043 : VFCMULCPH zmmreg|mask|z,zmmreg*,zmmrm512|b32|er [rvm:fv: evex.nds.512.f2.map6.w0 d6 /r ] AVX512FP16,FUTURE */ + /* 241(f6 7f 48) 301 001(d6) 120 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFCMULCPH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+47164, 566, 7200}, + /* 7044 : VFMULCPH xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.nds.128.f3.map6.w0 d6 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7e 08) 301 001(d6) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMULCPH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+47182, 565, 7201}, + /* 7045 : VFMULCPH ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.nds.256.f3.map6.w0 d6 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7e 28) 301 001(d6) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMULCPH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+47200, 565, 7202}, + /* 7046 : VFMULCPH zmmreg|mask|z,zmmreg*,zmmrm512|b32|er [rvm:fv: evex.nds.512.f3.map6.w0 d6 /r ] AVX512FP16,FUTURE */ + /* 241(f6 7e 48) 301 001(d6) 120 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFMULCPH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32|ER,0,0}, nasm_bytecodes+47218, 566, 7203}, + /* 7047 : VFCMULCSH xmmreg|mask|z,xmmreg*,xmmrm32|er [rvm:t1s: evex.nds.lig.f2.map6.w0 d7 /r ] AVX512FP16,FUTURE */ + /* 241(f6 7f 08) 306 001(d7) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFCMULCSH, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+47236, 567, 7204}, + /* 7048 : VFMULCSH xmmreg|mask|z,xmmreg*,xmmrm32|er [rvm:t1s: evex.nds.lig.f3.map6.w0 d7 /r ] AVX512FP16,FUTURE */ + /* 241(f6 7e 08) 306 001(d7) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFMULCSH, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+47254, 567, 7205}, + /* 7049 : VFMADDSUB132PH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.nds.128.66.map6.w0 96 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 08) 301 001(96) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMADDSUB132PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+47272, 565, 7206}, + /* 7050 : VFMADDSUB132PH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.nds.256.66.map6.w0 96 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 28) 301 001(96) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMADDSUB132PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+47290, 565, 7207}, + /* 7051 : VFMADDSUB132PH zmmreg|mask|z,zmmreg*,zmmrm512|b16|er [rvm:fv: evex.nds.512.66.map6.w0 96 /r ] AVX512FP16,FUTURE */ + /* 241(f6 7d 48) 301 001(96) 120 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFMADDSUB132PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+47308, 566, 7208}, + /* 7052 : VFMADDSUB213PH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.nds.128.66.map6.w0 a6 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 08) 301 001(a6) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMADDSUB213PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+47326, 565, 7209}, + /* 7053 : VFMADDSUB213PH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.nds.256.66.map6.w0 a6 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 28) 301 001(a6) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMADDSUB213PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+47344, 565, 7210}, + /* 7054 : VFMADDSUB213PH zmmreg|mask|z,zmmreg*,zmmrm512|b16|er [rvm:fv: evex.nds.512.66.map6.w0 a6 /r ] AVX512FP16,FUTURE */ + /* 241(f6 7d 48) 301 001(a6) 120 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFMADDSUB213PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+47362, 566, 7211}, + /* 7055 : VFMADDSUB231PH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.nds.128.66.map6.w0 b6 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 08) 301 001(b6) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMADDSUB231PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+47380, 565, 7212}, + /* 7056 : VFMADDSUB231PH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.nds.256.66.map6.w0 b6 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 28) 301 001(b6) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMADDSUB231PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+47398, 565, 7213}, + /* 7057 : VFMADDSUB231PH zmmreg|mask|z,zmmreg*,zmmrm512|b16|er [rvm:fv: evex.nds.512.66.map6.w0 b6 /r ] AVX512FP16,FUTURE */ + /* 241(f6 7d 48) 301 001(b6) 120 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFMADDSUB231PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+47416, 566, 7214}, + /* 7058 : VFMSUBADD132PH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.nds.128.66.map6.w0 97 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 08) 301 001(97) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMSUBADD132PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+47434, 565, 7215}, + /* 7059 : VFMSUBADD132PH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.nds.256.66.map6.w0 97 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 28) 301 001(97) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMSUBADD132PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+47452, 565, 7216}, + /* 7060 : VFMSUBADD132PH zmmreg|mask|z,zmmreg*,zmmrm512|b16|er [rvm:fv: evex.nds.512.66.map6.w0 97 /r ] AVX512FP16,FUTURE */ + /* 241(f6 7d 48) 301 001(97) 120 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFMSUBADD132PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+47470, 566, 7217}, + /* 7061 : VFMSUBADD213PH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.nds.128.66.map6.w0 a7 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 08) 301 001(a7) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMSUBADD213PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+47488, 565, 7218}, + /* 7062 : VFMSUBADD213PH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.nds.256.66.map6.w0 a7 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 28) 301 001(a7) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMSUBADD213PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+47506, 565, 7219}, + /* 7063 : VFMSUBADD213PH zmmreg|mask|z,zmmreg*,zmmrm512|b16|er [rvm:fv: evex.nds.512.66.map6.w0 a7 /r ] AVX512FP16,FUTURE */ + /* 241(f6 7d 48) 301 001(a7) 120 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFMSUBADD213PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+47524, 566, 7220}, + /* 7064 : VFMSUBADD231PH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.nds.128.66.map6.w0 b7 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 08) 301 001(b7) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMSUBADD231PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+47542, 565, 7221}, + /* 7065 : VFMSUBADD231PH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.nds.256.66.map6.w0 b7 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 28) 301 001(b7) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMSUBADD231PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+47560, 565, 7222}, + /* 7066 : VFMSUBADD231PH zmmreg|mask|z,zmmreg*,zmmrm512|b16|er [rvm:fv: evex.nds.512.66.map6.w0 b7 /r ] AVX512FP16,FUTURE */ + /* 241(f6 7d 48) 301 001(b7) 120 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFMSUBADD231PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+47578, 566, 7223}, + /* 7067 : VFMADD132PH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.nds.128.66.map6.w0 98 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 08) 301 001(98) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMADD132PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+47596, 565, 7224}, + /* 7068 : VFMADD132PH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.nds.256.66.map6.w0 98 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 28) 301 001(98) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMADD132PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+47614, 565, 7225}, + /* 7069 : VFMADD132PH zmmreg|mask|z,zmmreg*,zmmrm512|b16|er [rvm:fv: evex.nds.512.66.map6.w0 98 /r ] AVX512FP16,FUTURE */ + /* 241(f6 7d 48) 301 001(98) 120 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFMADD132PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+47632, 566, 7226}, + /* 7070 : VFMADD213PH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.nds.128.66.map6.w0 a8 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 08) 301 001(a8) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMADD213PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+47650, 565, 7227}, + /* 7071 : VFMADD213PH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.nds.256.66.map6.w0 a8 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 28) 301 001(a8) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMADD213PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+47668, 565, 7228}, + /* 7072 : VFMADD213PH zmmreg|mask|z,zmmreg*,zmmrm512|b16|er [rvm:fv: evex.nds.512.66.map6.w0 a8 /r ] AVX512FP16,FUTURE */ + /* 241(f6 7d 48) 301 001(a8) 120 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFMADD213PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+47686, 566, 7229}, + /* 7073 : VFMADD231PH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.nds.128.66.map6.w0 b8 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 08) 301 001(b8) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMADD231PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+47704, 565, 7230}, + /* 7074 : VFMADD231PH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.nds.256.66.map6.w0 b8 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 28) 301 001(b8) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMADD231PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+47722, 565, 7231}, + /* 7075 : VFMADD231PH zmmreg|mask|z,zmmreg*,zmmrm512|b16|er [rvm:fv: evex.nds.512.66.map6.w0 b8 /r ] AVX512FP16,FUTURE */ + /* 241(f6 7d 48) 301 001(b8) 120 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFMADD231PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+47740, 566, 7232}, + /* 7076 : VFNMADD132PH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.nds.128.66.map6.w0 9c /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 08) 301 001(9c) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFNMADD132PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+47758, 565, 7233}, + /* 7077 : VFNMADD132PH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.nds.256.66.map6.w0 9c /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 28) 301 001(9c) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFNMADD132PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+47776, 565, 7234}, + /* 7078 : VFNMADD132PH zmmreg|mask|z,zmmreg*,zmmrm512|b16|er [rvm:fv: evex.nds.512.66.map6.w0 9c /r ] AVX512FP16,FUTURE */ + /* 241(f6 7d 48) 301 001(9c) 120 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFNMADD132PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+47794, 566, 7235}, + /* 7079 : VFNMADD213PH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.nds.128.66.map6.w0 ac /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 08) 301 001(ac) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFNMADD213PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+47812, 565, 7236}, + /* 7080 : VFNMADD213PH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.nds.256.66.map6.w0 ac /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 28) 301 001(ac) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFNMADD213PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+47830, 565, 7237}, + /* 7081 : VFNMADD213PH zmmreg|mask|z,zmmreg*,zmmrm512|b16|er [rvm:fv: evex.nds.512.66.map6.w0 ac /r ] AVX512FP16,FUTURE */ + /* 241(f6 7d 48) 301 001(ac) 120 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFNMADD213PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+47848, 566, 7238}, + /* 7082 : VFNMADD231PH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.nds.128.66.map6.w0 bc /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 08) 301 001(bc) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFNMADD231PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+47866, 565, 7239}, + /* 7083 : VFNMADD231PH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.nds.256.66.map6.w0 bc /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 28) 301 001(bc) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFNMADD231PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+47884, 565, 7240}, + /* 7084 : VFNMADD231PH zmmreg|mask|z,zmmreg*,zmmrm512|b16|er [rvm:fv: evex.nds.512.66.map6.w0 bc /r ] AVX512FP16,FUTURE */ + /* 241(f6 7d 48) 301 001(bc) 120 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFNMADD231PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+47902, 566, 7241}, + /* 7085 : VFMADD132SH xmmreg|mask|z,xmmreg*,xmmrm16|er [rvm:t1s: evex.nds.lig.66.map6.w0 99 /r ] AVX512FP16,FUTURE */ + /* 241(f6 7d 08) 306 001(99) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFMADD132SH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+47920, 567, 7242}, + /* 7086 : VFMADD213SH xmmreg|mask|z,xmmreg*,xmmrm16|er [rvm:t1s: evex.nds.lig.66.map6.w0 a9 /r ] AVX512FP16,FUTURE */ + /* 241(f6 7d 08) 306 001(a9) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFMADD213SH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+47938, 567, 7243}, + /* 7087 : VFMADD231SH xmmreg|mask|z,xmmreg*,xmmrm16|er [rvm:t1s: evex.nds.lig.66.map6.w0 b9 /r ] AVX512FP16,FUTURE */ + /* 241(f6 7d 08) 306 001(b9) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFMADD231SH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+47956, 567, 7244}, + /* 7088 : VFNMADD132SH xmmreg|mask|z,xmmreg*,xmmrm16|er [rvm:t1s: evex.nds.lig.66.map6.w0 9d /r ] AVX512FP16,FUTURE */ + /* 241(f6 7d 08) 306 001(9d) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFNMADD132SH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+47974, 567, 7245}, + /* 7089 : VFNMADD213SH xmmreg|mask|z,xmmreg*,xmmrm16|er [rvm:t1s: evex.nds.lig.66.map6.w0 ad /r ] AVX512FP16,FUTURE */ + /* 241(f6 7d 08) 306 001(ad) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFNMADD213SH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+47992, 567, 7246}, + /* 7090 : VFNMADD231SH xmmreg|mask|z,xmmreg*,xmmrm16|er [rvm:t1s: evex.nds.lig.66.map6.w0 bd /r ] AVX512FP16,FUTURE */ + /* 241(f6 7d 08) 306 001(bd) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFNMADD231SH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+48010, 567, 7247}, + /* 7091 : VFMSUB132PH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.nds.128.66.map6.w0 9a /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 08) 301 001(9a) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMSUB132PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+48028, 565, 7248}, + /* 7092 : VFMSUB132PH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.nds.256.66.map6.w0 9a /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 28) 301 001(9a) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMSUB132PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+48046, 565, 7249}, + /* 7093 : VFMSUB132PH zmmreg|mask|z,zmmreg*,zmmrm512|b16|er [rvm:fv: evex.nds.512.66.map6.w0 9a /r ] AVX512FP16,FUTURE */ + /* 241(f6 7d 48) 301 001(9a) 120 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFMSUB132PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+48064, 566, 7250}, + /* 7094 : VFMSUB213PH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.nds.128.66.map6.w0 aa /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 08) 301 001(aa) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMSUB213PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+48082, 565, 7251}, + /* 7095 : VFMSUB213PH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.nds.256.66.map6.w0 aa /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 28) 301 001(aa) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMSUB213PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+48100, 565, 7252}, + /* 7096 : VFMSUB213PH zmmreg|mask|z,zmmreg*,zmmrm512|b16|er [rvm:fv: evex.nds.512.66.map6.w0 aa /r ] AVX512FP16,FUTURE */ + /* 241(f6 7d 48) 301 001(aa) 120 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFMSUB213PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+48118, 566, 7253}, + /* 7097 : VFMSUB231PH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.nds.128.66.map6.w0 ba /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 08) 301 001(ba) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMSUB231PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+48136, 565, 7254}, + /* 7098 : VFMSUB231PH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.nds.256.66.map6.w0 ba /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 28) 301 001(ba) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFMSUB231PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+48154, 565, 7255}, + /* 7099 : VFMSUB231PH zmmreg|mask|z,zmmreg*,zmmrm512|b16|er [rvm:fv: evex.nds.512.66.map6.w0 ba /r ] AVX512FP16,FUTURE */ + /* 241(f6 7d 48) 301 001(ba) 120 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFMSUB231PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+48172, 566, 7256}, + /* 7100 : VFNMSUB132PH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.nds.128.66.map6.w0 9e /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 08) 301 001(9e) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFNMSUB132PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+48190, 565, 7257}, + /* 7101 : VFNMSUB132PH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.nds.256.66.map6.w0 9e /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 28) 301 001(9e) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFNMSUB132PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+48208, 565, 7258}, + /* 7102 : VFNMSUB132PH zmmreg|mask|z,zmmreg*,zmmrm512|b16|er [rvm:fv: evex.nds.512.66.map6.w0 9e /r ] AVX512FP16,FUTURE */ + /* 241(f6 7d 48) 301 001(9e) 120 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFNMSUB132PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+48226, 566, 7259}, + /* 7103 : VFNMSUB213PH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.nds.128.66.map6.w0 ae /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 08) 301 001(ae) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFNMSUB213PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+48244, 565, 7260}, + /* 7104 : VFNMSUB213PH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.nds.256.66.map6.w0 ae /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 28) 301 001(ae) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFNMSUB213PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+48262, 565, 7261}, + /* 7105 : VFNMSUB213PH zmmreg|mask|z,zmmreg*,zmmrm512|b16|er [rvm:fv: evex.nds.512.66.map6.w0 ae /r ] AVX512FP16,FUTURE */ + /* 241(f6 7d 48) 301 001(ae) 120 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFNMSUB213PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+48280, 566, 7262}, + /* 7106 : VFNMSUB231PH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.nds.128.66.map6.w0 be /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 08) 301 001(be) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFNMSUB231PH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+48298, 565, 7263}, + /* 7107 : VFNMSUB231PH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.nds.256.66.map6.w0 be /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 28) 301 001(be) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFNMSUB231PH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+48316, 565, 7264}, + /* 7108 : VFNMSUB231PH zmmreg|mask|z,zmmreg*,zmmrm512|b16|er [rvm:fv: evex.nds.512.66.map6.w0 be /r ] AVX512FP16,FUTURE */ + /* 241(f6 7d 48) 301 001(be) 120 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFNMSUB231PH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+48334, 566, 7265}, + /* 7109 : VFMSUB132SH xmmreg|mask|z,xmmreg*,xmmrm16|er [rvm:t1s: evex.nds.lig.66.map6.w0 9b /r ] AVX512FP16,FUTURE */ + /* 241(f6 7d 08) 306 001(9b) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFMSUB132SH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+48352, 567, 7266}, + /* 7110 : VFMSUB213SH xmmreg|mask|z,xmmreg*,xmmrm16|er [rvm:t1s: evex.nds.lig.66.map6.w0 ab /r ] AVX512FP16,FUTURE */ + /* 241(f6 7d 08) 306 001(ab) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFMSUB213SH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+48370, 567, 7267}, + /* 7111 : VFMSUB231SH xmmreg|mask|z,xmmreg*,xmmrm16|er [rvm:t1s: evex.nds.lig.66.map6.w0 bb /r ] AVX512FP16,FUTURE */ + /* 241(f6 7d 08) 306 001(bb) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFMSUB231SH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+48388, 567, 7268}, + /* 7112 : VFNMSUB132SH xmmreg|mask|z,xmmreg*,xmmrm16|er [rvm:t1s: evex.nds.lig.66.map6.w0 9f /r ] AVX512FP16,FUTURE */ + /* 241(f6 7d 08) 306 001(9f) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFNMSUB132SH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+48406, 567, 7269}, + /* 7113 : VFNMSUB213SH xmmreg|mask|z,xmmreg*,xmmrm16|er [rvm:t1s: evex.nds.lig.66.map6.w0 af /r ] AVX512FP16,FUTURE */ + /* 241(f6 7d 08) 306 001(af) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFNMSUB213SH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+48424, 567, 7270}, + /* 7114 : VFNMSUB231SH xmmreg|mask|z,xmmreg*,xmmrm16|er [rvm:t1s: evex.nds.lig.66.map6.w0 bf /r ] AVX512FP16,FUTURE */ + /* 241(f6 7d 08) 306 001(bf) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFNMSUB231SH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+48442, 567, 7271}, + /* 7115 : VFPCLASSPH kreg|mask,xmmrm128|b16,imm8 [rmi:fv: evex.128.np.0f3a.w0 66 /r ib ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f3 7c 08) 301 001(66) 110 022 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFPCLASSPH, 3, {OPMASKREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK,B16,0,0,0}, nasm_bytecodes+22783, 565, 7272}, + /* 7116 : VFPCLASSPH kreg|mask,ymmrm256|b16,imm8 [rmi:fv: evex.256.np.0f3a.w0 66 /r ib ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f3 7c 28) 301 001(66) 110 022 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VFPCLASSPH, 3, {OPMASKREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK,B16,0,0,0}, nasm_bytecodes+22793, 565, 7273}, + /* 7117 : VFPCLASSPH kreg|mask,zmmrm512|b16,imm8 [rmi:fv: evex.512.np.0f3a.w0 66 /r ib ] AVX512FP16,FUTURE */ + /* 250(f3 7c 48) 301 001(66) 110 022 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFPCLASSPH, 3, {OPMASKREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK,B16,0,0,0}, nasm_bytecodes+22803, 566, 7274}, + /* 7118 : VFPCLASSSH kreg|mask,xmmrm16,imm8 [rmi:t1s: evex.lig.np.0f3a.w0 67 /r ib ] AVX512FP16,FUTURE */ + /* 250(f3 7c 08) 306 001(67) 110 022 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VFPCLASSSH, 3, {OPMASKREG,RM_XMM|BITS16,IMM_NORMAL|BITS8,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+22813, 567, 7275}, + /* 7119 : VGETEXPPH xmmreg|mask|z,xmmrm128|b16 [rm:fv: evex.128.66.map6.w0 42 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f6 7d 08) 301 001(42) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VGETEXPPH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+48460, 565, 7276}, + /* 7120 : VGETEXPPH ymmreg|mask|z,ymmrm256|b16 [rm:fv: evex.256.66.map6.w0 42 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f6 7d 28) 301 001(42) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VGETEXPPH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+48469, 565, 7277}, + /* 7121 : VGETEXPPH zmmreg|mask|z,zmmrm512|b16|sae [rm:fv: evex.512.66.map6.w0 42 /r ] AVX512FP16,FUTURE */ + /* 250(f6 7d 48) 301 001(42) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VGETEXPPH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+48478, 566, 7278}, + /* 7122 : VGETEXPSH xmmreg|mask|z,xmmreg,xmmrm16|sae [rvm:t1s: evex.lig.66.map6.w0 43 /r ] AVX512FP16,FUTURE */ + /* 241(f6 7d 08) 306 001(43) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VGETEXPSH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+48487, 567, 7279}, + /* 7123 : VGETMANTPH xmmreg|mask|z,xmmrm128|b16,imm8 [rmi:fv: evex.128.np.0f3a.w0 26 /r ib ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f3 7c 08) 301 001(26) 110 022 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VGETMANTPH, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+22823, 565, 7280}, + /* 7124 : VGETMANTPH ymmreg|mask|z,ymmrm256|b16,imm8 [rmi:fv: evex.256.np.0f3a.w0 26 /r ib ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f3 7c 28) 301 001(26) 110 022 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VGETMANTPH, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+22833, 565, 7281}, + /* 7125 : VGETMANTPH zmmreg|mask|z,zmmrm512|b16|sae,imm8 [rmi:fv: evex.512.np.0f3a.w0 26 /r ib ] AVX512FP16,FUTURE */ + /* 250(f3 7c 48) 301 001(26) 110 022 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VGETMANTPH, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+22843, 566, 7282}, + /* 7126 : VGETMANTSH xmmreg|mask|z,xmmreg,xmmrm16|sae,imm8 [rvmi:t1s: evex.lig.np.0f3a.w0 27 /r ib ] AVX512FP16,FUTURE */ + /* 241(f3 7c 08) 306 001(27) 120 023 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VGETMANTSH, 4, {XMMREG,XMMREG,RM_XMM|BITS16,IMM_NORMAL|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+22853, 567, 7283}, + /* 7127 : VMAXPH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.128.np.map5.w0 5f /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f5 7c 08) 301 001(5f) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VMAXPH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+48496, 565, 7284}, + /* 7128 : VMAXPH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.256.np.map5.w0 5f /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f5 7c 28) 301 001(5f) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VMAXPH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+48514, 565, 7285}, + /* 7129 : VMAXPH zmmreg|mask|z,zmmreg*,zmmrm512|b16|sae [rvm:fv: evex.512.np.map5.w0 5f /r ] AVX512FP16,FUTURE */ + /* 241(f5 7c 48) 301 001(5f) 120 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VMAXPH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|SAE,0,0}, nasm_bytecodes+48532, 566, 7286}, + /* 7130 : VMAXSH xmmreg|mask|z,xmmreg,xmmrm16|sae [rvm:t1s: evex.lig.f3.map5.w0 5f /r ] AVX512FP16,FUTURE */ + /* 241(f5 7e 08) 306 001(5f) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VMAXSH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+48550, 567, 7287}, + /* 7131 : VMINPH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.128.np.map5.w0 5d /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f5 7c 08) 301 001(5d) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VMINPH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+48559, 565, 7288}, + /* 7132 : VMINPH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.256.np.map5.w0 5d /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f5 7c 28) 301 001(5d) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VMINPH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+48577, 565, 7289}, + /* 7133 : VMINPH zmmreg|mask|z,zmmreg*,zmmrm512|b16|sae [rvm:fv: evex.512.np.map5.w0 5d /r ] AVX512FP16,FUTURE */ + /* 241(f5 7c 48) 301 001(5d) 120 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VMINPH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|SAE,0,0}, nasm_bytecodes+48595, 566, 7290}, + /* 7134 : VMINSH xmmreg|mask|z,xmmreg,xmmrm16|sae [rvm:t1s: evex.lig.f3.map5.w0 5d /r ] AVX512FP16,FUTURE */ + /* 241(f5 7e 08) 306 001(5d) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VMINSH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+48613, 567, 7291}, + /* 7135 : VMOVSH xmmreg|mask|z,mem16 [rm:t1s16: evex.lig.f3.map5.w0 10 /r ] AVX512FP16,FUTURE */ + /* 250(f5 7e 08) 305 001(10) 110 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VMOVSH, 2, {XMMREG,MEMORY|BITS16,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+48622, 567, 7292}, + /* 7136 : VMOVSH mem16|mask,xmmreg [mr:t1s16: evex.lig.f3.map5.w0 11 /r ] AVX512FP16,FUTURE */ + /* 250(f5 7e 08) 305 001(11) 101 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VMOVSH, 2, {MEMORY|BITS16,XMMREG,0,0,0}, {MASK,0,0,0,0}, nasm_bytecodes+48631, 567, 7293}, + /* 7137 : VMOVSH xmmreg|mask|z,xmmreg*,xmmreg [rvm: evex.nds.lig.f3.map5.w0 10 /r ] AVX512FP16,FUTURE */ + /* 241(f5 7e 08) 300 001(10) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VMOVSH, 3, {XMMREG,XMMREG,XMMREG,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+48640, 567, 7294}, + /* 7138 : VMOVSH xmmreg|mask|z,xmmreg*,xmmreg [rvm: evex.nds.lig.f3.map5.w0 11 /r ] AVX512FP16,FUTURE */ + /* 241(f5 7e 08) 300 001(11) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VMOVSH, 3, {XMMREG,XMMREG,XMMREG,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+48658, 567, 7295}, + /* 7139 : VMOVW xmmreg|mask|z,rm16 [rm:t1s: evex.128.66.map5.wig 6e /r ] AVX512FP16,FUTURE */ + /* 250(f5 7d 08) 306 001(6e) 110 : WIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VMOVW, 2, {XMMREG,RM_GPR|BITS16,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+48676, 636, 7296}, + /* 7140 : VMOVW rm16,xmmreg [mr:t1s: evex.128.66.map5.wig 7e /r ] AVX512FP16,FUTURE */ + /* 250(f5 7d 08) 306 001(7e) 101 : WIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VMOVW, 2, {RM_GPR|BITS16,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+48685, 636, 7297}, + /* 7141 : VMULPH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.nds.128.np.map5.w0 59 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f5 7c 08) 301 001(59) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VMULPH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+48694, 565, 7298}, + /* 7142 : VMULPH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.nds.256.np.map5.w0 59 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f5 7c 28) 301 001(59) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VMULPH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+48712, 565, 7299}, + /* 7143 : VMULPH zmmreg|mask|z,zmmreg*,zmmrm512|b16 [rvm:fv: evex.nds.512.np.map5.w0 59 /r ] AVX512FP16,FUTURE */ + /* 241(f5 7c 48) 301 001(59) 120 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VMULPH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+48730, 566, 7300}, + /* 7144 : VMULSH xmmreg|mask|z,xmmreg*,xmmrm16|er [rvm:t1s16:evex.nds.lig.f3.map5.w0 59 /r ] AVX512FP16,FUTURE */ + /* 241(f5 7e 08) 305 001(59) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VMULSH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+48748, 567, 7301}, + /* 7145 : VRCPPH xmmreg|mask|z,xmmrm128|b16 [rm:fv: evex.128.66.map6.w0 4c /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f6 7d 08) 301 001(4c) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VRCPPH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+48766, 565, 7302}, + /* 7146 : VRCPPH ymmreg|mask|z,ymmrm256|b16 [rm:fv: evex.256.66.map6.w0 4c /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f6 7d 28) 301 001(4c) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VRCPPH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+48775, 565, 7303}, + /* 7147 : VRCPPH zmmreg|mask|z,zmmrm512|b16 [rm:fv: evex.512.66.map6.w0 4c /r ] AVX512FP16,FUTURE */ + /* 250(f6 7d 48) 301 001(4c) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VRCPPH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+48784, 566, 7304}, + /* 7148 : VRCPSH xmmreg|mask|z,xmmreg*,xmmrm16|sae [rvm:t1s: evex.nds.lig.66.map6.w0 4d /r ] AVX512FP16,FUTURE */ + /* 241(f6 7d 08) 306 001(4d) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VRCPSH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+48793, 567, 7305}, + /* 7149 : VREDUCEPH xmmreg|mask|z,xmmrm128|b16,imm8 [rmi:fv: evex.128.np.0f3a.w0 56 /r ib ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f3 7c 08) 301 001(56) 110 022 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VREDUCEPH, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+22863, 565, 7306}, + /* 7150 : VREDUCEPH ymmreg|mask|z,ymmrm256|b16,imm8 [rmi:fv: evex.256.np.0f3a.w0 56 /r ib ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f3 7c 28) 301 001(56) 110 022 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VREDUCEPH, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+22873, 565, 7307}, + /* 7151 : VREDUCEPH zmmreg|mask|z,zmmrm512|b16|sae,imm8 [rmi:fv: evex.512.np.0f3a.w0 56 /r ib ] AVX512FP16,FUTURE */ + /* 250(f3 7c 48) 301 001(56) 110 022 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VREDUCEPH, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+22883, 566, 7308}, + /* 7152 : VREDUCESH xmmreg|mask|z,xmmreg*,xmmrm16|sae,imm8 [rvmi:t1s: evex.nds.lig.np.0f3a.w0 57 /r ib ] AVX512FP16,FUTURE */ + /* 241(f3 7c 08) 306 001(57) 120 023 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VREDUCESH, 4, {XMMREG,XMMREG,RM_XMM|BITS16,IMM_NORMAL|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+22893, 567, 7309}, + /* 7153 : VENDSCALEPH xmmreg|mask|z,xmmrm128|b16,imm8 [rmi:fv: evex.128.np.0f3a.w0 08 /r ib ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f3 7c 08) 301 001(08) 110 022 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VENDSCALEPH, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+21563, 565, 7310}, + /* 7154 : VENDSCALEPH ymmreg|mask|z,ymmrm256|b16,imm8 [rmi:fv: evex.256.np.0f3a.w0 08 /r ib ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f3 7c 28) 301 001(08) 110 022 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VENDSCALEPH, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+21573, 565, 7311}, + /* 7155 : VENDSCALEPH zmmreg|mask|z,zmmrm512|b16|sae,imm8 [rmi:fv: evex.512.np.0f3a.w0 08 /r ib ] AVX512FP16,FUTURE */ + /* 250(f3 7c 48) 301 001(08) 110 022 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VENDSCALEPH, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+21583, 566, 7312}, + /* 7156 : VENDSCALESH xmmreg|mask|z,xmmreg*,xmmrm16|sae,imm8 [rvmi:t1s: evex.nds.lig.np.0f3a.w0 0a /r ib ] AVX512FP16,FUTURE */ + /* 241(f3 7c 08) 306 001(0a) 120 023 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VENDSCALESH, 4, {XMMREG,XMMREG,RM_XMM|BITS16,IMM_NORMAL|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+21643, 567, 7313}, + /* 7157 : VRSQRTPH xmmreg|mask|z,xmmrm128|b16 [rm:fv: evex.128.66.map6.w0 4e /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f6 7d 08) 301 001(4e) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VRSQRTPH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+48811, 565, 7314}, + /* 7158 : VRSQRTPH ymmreg|mask|z,ymmrm256|b16 [rm:fv: evex.256.66.map6.w0 4e /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f6 7d 28) 301 001(4e) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VRSQRTPH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+48820, 565, 7315}, + /* 7159 : VRSQRTPH zmmreg|mask|z,zmmrm512|b16|sae [rm:fv: evex.512.66.map6.w0 4e /r ] AVX512FP16,FUTURE */ + /* 250(f6 7d 48) 301 001(4e) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VRSQRTPH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+48829, 566, 7316}, + /* 7160 : VRSQRTSH xmmreg|mask|z,xmmreg*,xmmrm16|sae [rvm:t1s: evex.nds.lig.66.map6.w0 4f /r ] AVX512FP16,FUTURE */ + /* 241(f6 7d 08) 306 001(4f) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VRSQRTSH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+48838, 567, 7317}, + /* 7161 : VSCALEFPH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.nds.128.66.map6.w0 2c /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 08) 301 001(2c) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VSCALEFPH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+48856, 565, 7318}, + /* 7162 : VSCALEFPH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.nds.256.66.map6.w0 2c /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f6 7d 28) 301 001(2c) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VSCALEFPH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+48874, 565, 7319}, + /* 7163 : VSCALEFPH zmmreg|mask|z,zmmreg*,zmmrm512|b16|er [rvm:fv: evex.nds.512.66.map6.w0 2c /r ] AVX512FP16,FUTURE */ + /* 241(f6 7d 48) 301 001(2c) 120 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VSCALEFPH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+48892, 566, 7320}, + /* 7164 : VSCALEFSH xmmreg|mask|z,xmmreg*,xmmrm16|er [rvm:t1s: evex.nds.lig.66.map6.w0 2d /r ] AVX512FP16,FUTURE */ + /* 241(f6 7d 08) 306 001(2d) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VSCALEFSH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+48910, 567, 7321}, + /* 7165 : VSQRTPH xmmreg|mask|z,xmmrm128|b16 [rm:fv: evex.128.np.map5.w0 51 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7c 08) 301 001(51) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VSQRTPH, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+48928, 565, 7322}, + /* 7166 : VSQRTPH ymmreg|mask|z,ymmrm256|b16 [rm:fv: evex.256.np.map5.w0 51 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 250(f5 7c 28) 301 001(51) 110 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VSQRTPH, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+48937, 565, 7323}, + /* 7167 : VSQRTPH zmmreg|mask|z,zmmrm512|b16|er [rm:fv: evex.512.np.map5.w0 51 /r ] AVX512FP16,FUTURE */ + /* 250(f5 7c 48) 301 001(51) 110 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VSQRTPH, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+48946, 566, 7324}, + /* 7168 : VSQRTSH xmmreg|mask|z,xmmreg*,xmmrm16|er [rvm:t1s: evex.nds.lig.f3.map5.w0 51 /r ] AVX512FP16,FUTURE */ + /* 241(f5 7e 08) 306 001(51) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VSQRTSH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+48955, 567, 7325}, + /* 7169 : VSUBPH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.nds.128.np.map5.w0 5c /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f5 7c 08) 301 001(5c) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VSUBPH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+48973, 565, 7326}, + /* 7170 : VSUBPH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.nds.256.np.map5.w0 5c /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f5 7c 28) 301 001(5c) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VSUBPH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+48991, 565, 7327}, + /* 7171 : VSUBPH zmmreg|mask|z,zmmreg*,zmmrm512|b16|er [rvm:fv: evex.nds.512.np.map5.w0 5c /r ] AVX512FP16,FUTURE */ + /* 241(f5 7c 48) 301 001(5c) 120 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VSUBPH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|ER,0,0}, nasm_bytecodes+49009, 566, 7328}, + /* 7172 : VSUBSH xmmreg|mask|z,xmmreg*,xmmrm16|er [rvm:t1s16:evex.nds.lig.f3.map5.w0 5c /r ] AVX512FP16,FUTURE */ + /* 241(f5 7e 08) 305 001(5c) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VSUBSH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,ER,0,0}, nasm_bytecodes+49027, 567, 7329}, + /* 7173 : VUCOMISH xmmreg,xmmrm16|sae [rm:t1s: evex.lig.np.map5.w0 2e /r ] FL,AVX512FP16,FUTURE */ + /* 250(f5 7c 08) 306 001(2e) 110 : LIG,FL,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VUCOMISH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+49045, 635, 7330}, + /* 7174 : VMINPH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.128.np.map5.w0 5d /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f5 7c 08) 301 001(5d) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VMINPH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+48559, 565, 7331}, + /* 7175 : VMINPH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.256.np.map5.w0 5d /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f5 7c 28) 301 001(5d) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VMINPH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+48577, 565, 7332}, + /* 7176 : VMINPH zmmreg|mask|z,zmmreg*,zmmrm512|b16|sae [rvm:fv: evex.512.np.map5.w0 5d /r ] AVX512FP16,FUTURE */ + /* 241(f5 7c 48) 301 001(5d) 120 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VMINPH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|SAE,0,0}, nasm_bytecodes+48595, 566, 7333}, + /* 7177 : VMINSH xmmreg|mask|z,xmmreg*,xmmrm16|sae [rvm:t1s: evex.lig.f3.map5.w0 5d /r ] AVX512FP16,FUTURE */ + /* 241(f5 7e 08) 306 001(5d) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VMINSH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+48613, 567, 7334}, + /* 7178 : VMAXPH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.128.np.map5.w0 57 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f5 7c 08) 301 001(57) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VMAXPH, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49063, 565, 7335}, + /* 7179 : VMAXPH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.256.np.map5.w0 57 /r ] AVX512VL,AVX512FP16,FUTURE */ + /* 241(f5 7c 28) 301 001(57) 120 : EVEX,PROT,AVX512VL,AVX512FP16,FUTURE */ + {I_VMAXPH, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49081, 565, 7336}, + /* 7180 : VMAXPH zmmreg|mask|z,zmmreg*,zmmrm512|b16|sae [rvm:fv: evex.512.np.map5.w0 57 /r ] AVX512FP16,FUTURE */ + /* 241(f5 7c 48) 301 001(57) 120 : EVEX,PROT,AVX512FP16,FUTURE */ + {I_VMAXPH, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16|SAE,0,0}, nasm_bytecodes+49099, 566, 7337}, + /* 7181 : VMAXSH xmmreg|mask|z,xmmreg*,xmmrm16|sae [rvm:t1s: evex.lig.f3.map5.w0 57 /r ] AVX512FP16,FUTURE */ + /* 241(f5 7e 08) 306 001(57) 120 : LIG,EVEX,PROT,AVX512FP16,FUTURE */ + {I_VMAXSH, 3, {XMMREG,XMMREG,RM_XMM|BITS16,0,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+49117, 567, 7338}, + /* 7182 : AADD mem32,reg32 [mr: o32 np 0f38 fc /r ] AR0-1,SQ,LONG,PROT,RAOINT,X86_64 */ + /* 321 360 356 001(fc) 101 : AR0,AR1,SQ,NOAPX,LONG,PROT,RAOINT,X86_64 */ + {I_AADD, 2, {MEMORY|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66317, 637, 7341}, + /* 7183 : AADD mem64,reg64 [mr: o64 np 0f38 fc /r ] AR0-1,SQ,LONG,PROT,RAOINT,X86_64 */ + /* 324 360 356 001(fc) 101 : AR0,AR1,SQ,NOAPX,LONG,PROT,RAOINT,X86_64 */ + {I_AADD, 2, {MEMORY|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66324, 637, 7342}, + /* 7184 : AADD mem32,reg32 [mr: evex.nf0.nd0.l0.np.m4.o32 fc /r ] AR0-1,SQ,LONG,PROT,RAOINT,APX,X86_64 */ + /* 250(f4 7c 08) 300 321 001(fc) 101 : AR0,AR1,SQ,WW,LONG,EVEX,PROT,RAOINT,APX,X86_64 */ + {I_AADD, 2, {MEMORY|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+22913, 638, 7343}, + /* 7185 : AADD mem64,reg64 [mr: evex.nf0.nd0.l0.np.m4.o64 fc /r ] AR0-1,SQ,LONG,PROT,RAOINT,APX,X86_64 */ + /* 250(f4 fc 08) 300 324 001(fc) 101 : AR0,AR1,SQ,WW,LONG,EVEX,PROT,RAOINT,APX,X86_64 */ + {I_AADD, 2, {MEMORY|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+22923, 638, 7344}, + /* 7186 : AAND mem32,reg32 [mr: o32 66 0f38 fc /r ] AR0-1,SQ,LONG,PROT,RAOINT,X86_64 */ + /* 321 361 356 001(fc) 101 : AR0,AR1,SQ,NOAPX,LONG,PROT,RAOINT,X86_64 */ + {I_AAND, 2, {MEMORY|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66331, 637, 7345}, + /* 7187 : AAND mem64,reg64 [mr: o64 66 0f38 fc /r ] AR0-1,SQ,LONG,PROT,RAOINT,X86_64 */ + /* 324 361 356 001(fc) 101 : AR0,AR1,SQ,NOAPX,LONG,PROT,RAOINT,X86_64 */ + {I_AAND, 2, {MEMORY|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66338, 637, 7346}, + /* 7188 : AAND mem32,reg32 [mr: evex.nf0.nd0.l0.66.m4.o32 fc /r ] AR0-1,SQ,LONG,PROT,RAOINT,APX,X86_64 */ + /* 250(f4 7d 08) 300 321 001(fc) 101 : AR0,AR1,SQ,WW,LONG,EVEX,PROT,RAOINT,APX,X86_64 */ + {I_AAND, 2, {MEMORY|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+22933, 638, 7347}, + /* 7189 : AAND mem64,reg64 [mr: evex.nf0.nd0.l0.66.m4.o64 fc /r ] AR0-1,SQ,LONG,PROT,RAOINT,APX,X86_64 */ + /* 250(f4 fd 08) 300 324 001(fc) 101 : AR0,AR1,SQ,WW,LONG,EVEX,PROT,RAOINT,APX,X86_64 */ + {I_AAND, 2, {MEMORY|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+22943, 638, 7348}, + /* 7190 : AOR mem32,reg32 [mr: o32 f2 0f38 fc /r ] AR0-1,SQ,LONG,PROT,RAOINT,X86_64 */ + /* 321 332 356 001(fc) 101 : AR0,AR1,SQ,NOAPX,LONG,PROT,RAOINT,X86_64 */ + {I_AOR, 2, {MEMORY|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66345, 637, 7349}, + /* 7191 : AOR mem64,reg64 [mr: o64 f2 0f38 fc /r ] AR0-1,SQ,LONG,PROT,RAOINT,X86_64 */ + /* 324 332 356 001(fc) 101 : AR0,AR1,SQ,NOAPX,LONG,PROT,RAOINT,X86_64 */ + {I_AOR, 2, {MEMORY|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66352, 637, 7350}, + /* 7192 : AOR mem32,reg32 [mr: evex.nf0.nd0.l0.f2.m4.o32 fc /r ] AR0-1,SQ,LONG,PROT,RAOINT,APX,X86_64 */ + /* 250(f4 7f 08) 300 321 001(fc) 101 : AR0,AR1,SQ,WW,LONG,EVEX,PROT,RAOINT,APX,X86_64 */ + {I_AOR, 2, {MEMORY|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+22953, 638, 7351}, + /* 7193 : AOR mem64,reg64 [mr: evex.nf0.nd0.l0.f2.m4.o64 fc /r ] AR0-1,SQ,LONG,PROT,RAOINT,APX,X86_64 */ + /* 250(f4 ff 08) 300 324 001(fc) 101 : AR0,AR1,SQ,WW,LONG,EVEX,PROT,RAOINT,APX,X86_64 */ + {I_AOR, 2, {MEMORY|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+22963, 638, 7352}, + /* 7194 : AXOR mem32,reg32 [mr: o32 f3 0f38 fc /r ] AR0-1,SQ,LONG,PROT,RAOINT,X86_64 */ + /* 321 333 356 001(fc) 101 : AR0,AR1,SQ,NOAPX,LONG,PROT,RAOINT,X86_64 */ + {I_AXOR, 2, {MEMORY|BITS32|RN_L16,REG_GPR|BITS32|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66359, 637, 7353}, + /* 7195 : AXOR mem64,reg64 [mr: o64 f3 0f38 fc /r ] AR0-1,SQ,LONG,PROT,RAOINT,X86_64 */ + /* 324 333 356 001(fc) 101 : AR0,AR1,SQ,NOAPX,LONG,PROT,RAOINT,X86_64 */ + {I_AXOR, 2, {MEMORY|BITS64|RN_L16,REG_GPR|BITS64|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66366, 637, 7354}, + /* 7196 : AXOR mem32,reg32 [mr: evex.nf0.nd0.l0.f3.m4.o32 fc /r ] AR0-1,SQ,LONG,PROT,RAOINT,APX,X86_64 */ + /* 250(f4 7e 08) 300 321 001(fc) 101 : AR0,AR1,SQ,WW,LONG,EVEX,PROT,RAOINT,APX,X86_64 */ + {I_AXOR, 2, {MEMORY|BITS32,REG_GPR|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+22973, 638, 7355}, + /* 7197 : AXOR mem64,reg64 [mr: evex.nf0.nd0.l0.f3.m4.o64 fc /r ] AR0-1,SQ,LONG,PROT,RAOINT,APX,X86_64 */ + /* 250(f4 fe 08) 300 324 001(fc) 101 : AR0,AR1,SQ,WW,LONG,EVEX,PROT,RAOINT,APX,X86_64 */ + {I_AXOR, 2, {MEMORY|BITS64,REG_GPR|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+22983, 638, 7356}, + /* 7198 : CLUI void [ f3 0f 01 ee ] LONG,PROT,UINTR,X86_64 */ + /* 333 355 002(01 ee) : LONG,PROT,UINTR,X86_64 */ + {I_CLUI, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70161, 639, 7359}, + /* 7199 : SENDUIPI reg64 [m: o64nw f3 0f c7 /6 ] LONG,PROT,UINTR,X86_64 */ + /* 323 333 355 001(c7) 206 : NWSIZE,LONG,PROT,UINTR,X86_64 */ + {I_SENDUIPI, 1, {REG_GPR|BITS64,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+66373, 640, 7360}, + /* 7200 : STUI void [ f3 0f 01 ef ] LONG,PROT,UINTR,X86_64 */ + /* 333 355 002(01 ef) : LONG,PROT,UINTR,X86_64 */ + {I_STUI, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70167, 639, 7361}, + /* 7201 : TESTUI void [ f3 0f 01 ed ] LONG,FL,PROT,UINTR,X86_64 */ + /* 333 355 002(01 ed) : LONG,FL,PROT,UINTR,X86_64 */ + {I_TESTUI, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70173, 641, 7362}, + /* 7202 : UIRET void [ f3 0f 01 ec ] LONG,FL,PROT,UINTR,X86_64 */ + /* 333 355 002(01 ec) : LONG,FL,PROT,UINTR,X86_64 */ + {I_UIRET, 0, {0,0,0,0,0}, NO_DECORATOR, nasm_bytecodes+70179, 641, 7363}, + /* 7203 : HRESET imm,reg_eax [i-: f3 0f3a f0 c0 ib ] AR0-1,SB,PRIV,HRESET,FUTURE */ + /* 333 357 002(f0 c0) 020 : AR0,AR1,SB,NOAPX,PRIV,HRESET,FUTURE */ + {I_HRESET, 2, {IMM_NORMAL,REG_EAX|RN_L16,0,0,0}, NO_DECORATOR, nasm_bytecodes+66380, 642, 7368}, + /* 7204 : VADDBF16 xmmreg|mask|z,xmmreg,xmmrm128|b16 [rvm:fv: evex.128.66.map5.w0 58 /r ] AVX10_2,FUTURE */ + /* 241(f5 7d 08) 301 001(58) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VADDBF16, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49135, 644, 7372}, + /* 7205 : VADDBF16 ymmreg|mask|z,ymmreg,ymmrm256|b16 [rvm:fv: evex.256.66.map5.w0 58 /r ] AVX10_2,FUTURE */ + /* 241(f5 7d 28) 301 001(58) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VADDBF16, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49144, 644, 7373}, + /* 7206 : VADDBF16 zmmreg|mask|z,zmmreg,zmmrm512|b16 [rvm:fv: evex.512.66.map5.w0 58 /r ] AVX10_2,FUTURE */ + /* 241(f5 7d 48) 301 001(58) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VADDBF16, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49153, 644, 7374}, + /* 7207 : VCMPBF16 kreg|mask,xmmreg,xmmrm128|b16,imm8 [rvmi:fv: evex.128.f2.0f3a.w0 c2 /r ib ] AVX10_2,FUTURE */ + /* 241(f3 7f 08) 301 001(c2) 120 023 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCMPBF16, 4, {OPMASKREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK,0,B16,0,0}, nasm_bytecodes+22993, 644, 7375}, + /* 7208 : VCMPBF16 kreg|mask,ymmreg,ymmrm256|b16,imm8 [rvmi:fv: evex.256.f2.0f3a.w0 c2 /r ib ] AVX10_2,FUTURE */ + /* 241(f3 7f 28) 301 001(c2) 120 023 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCMPBF16, 4, {OPMASKREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK,0,B16,0,0}, nasm_bytecodes+23003, 644, 7376}, + /* 7209 : VCMPBF16 kreg|mask,zmmreg,zmmrm512|b16,imm8 [rvmi:fv: evex.512.f2.0f3a.w0 c2 /r ib ] AVX10_2,FUTURE */ + /* 241(f3 7f 48) 301 001(c2) 120 023 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCMPBF16, 4, {OPMASKREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK,0,B16,0,0}, nasm_bytecodes+23013, 644, 7377}, + /* 7210 : VCOMISBF16 xmmreg,xmmrm16 [rm:t1s: evex.lig.66.map5.w0 2f /r ] AVX10_2,FUTURE */ + /* 250(f5 7d 08) 306 001(2f) 110 : LIG,EVEX,PROT,AVX10_2,FUTURE */ + {I_VCOMISBF16, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+49162, 645, 7378}, + /* 7211 : VDIVBF16 xmmreg|mask|z,xmmreg,xmmrm128|b16 [rvm:fv: evex.128.66.map5.w0 5e /r ] AVX10_2,FUTURE */ + /* 241(f5 7d 08) 301 001(5e) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VDIVBF16, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49171, 644, 7379}, + /* 7212 : VDIVBF16 ymmreg|mask|z,ymmreg,ymmrm256|b16 [rvm:fv: evex.256.66.map5.w0 5e /r ] AVX10_2,FUTURE */ + /* 241(f5 7d 28) 301 001(5e) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VDIVBF16, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49180, 644, 7380}, + /* 7213 : VDIVBF16 zmmreg|mask|z,zmmreg,zmmrm512|b16 [rvm:fv: evex.512.66.map5.w0 5e /r ] AVX10_2,FUTURE */ + /* 241(f5 7d 48) 301 001(5e) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VDIVBF16, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49189, 644, 7381}, + /* 7214 : VFMADD132BF16 xmmreg|mask|z,xmmreg,xmmrm128|b16 [rvm:fv: evex.128.np.map6.w0 98 /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 08) 301 001(98) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFMADD132BF16, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49198, 644, 7382}, + /* 7215 : VFMADD132BF16 ymmreg|mask|z,ymmreg,ymmrm256|b16 [rvm:fv: evex.256.np.map6.w0 98 /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 28) 301 001(98) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFMADD132BF16, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49207, 644, 7383}, + /* 7216 : VFMADD132BF16 zmmreg|mask|z,zmmreg,zmmrm512|b16 [rvm:fv: evex.512.np.map6.w0 98 /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 48) 301 001(98) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFMADD132BF16, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49216, 644, 7384}, + /* 7217 : VFMADD213BF16 xmmreg|mask|z,xmmreg,xmmrm128|b16 [rvm:fv: evex.128.np.map6.w0 a8 /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 08) 301 001(a8) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFMADD213BF16, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49225, 644, 7385}, + /* 7218 : VFMADD213BF16 ymmreg|mask|z,ymmreg,ymmrm256|b16 [rvm:fv: evex.256.np.map6.w0 a8 /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 28) 301 001(a8) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFMADD213BF16, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49234, 644, 7386}, + /* 7219 : VFMADD213BF16 zmmreg|mask|z,zmmreg,zmmrm512|b16 [rvm:fv: evex.512.np.map6.w0 a8 /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 48) 301 001(a8) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFMADD213BF16, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49243, 644, 7387}, + /* 7220 : VFMADD231BF16 xmmreg|mask|z,xmmreg,xmmrm128|b16 [rvm:fv: evex.128.np.map6.w0 b8 /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 08) 301 001(b8) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFMADD231BF16, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49252, 644, 7388}, + /* 7221 : VFMADD231BF16 ymmreg|mask|z,ymmreg,ymmrm256|b16 [rvm:fv: evex.256.np.map6.w0 b8 /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 28) 301 001(b8) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFMADD231BF16, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49261, 644, 7389}, + /* 7222 : VFMADD231BF16 zmmreg|mask|z,zmmreg,zmmrm512|b16 [rvm:fv: evex.512.np.map6.w0 b8 /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 48) 301 001(b8) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFMADD231BF16, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49270, 644, 7390}, + /* 7223 : VFMSUB132BF16 xmmreg|mask|z,xmmreg,xmmrm128|b16 [rvm:fv: evex.128.np.map6.w0 9a /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 08) 301 001(9a) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFMSUB132BF16, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49279, 644, 7391}, + /* 7224 : VFMSUB132BF16 ymmreg|mask|z,ymmreg,ymmrm256|b16 [rvm:fv: evex.256.np.map6.w0 9a /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 28) 301 001(9a) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFMSUB132BF16, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49288, 644, 7392}, + /* 7225 : VFMSUB132BF16 zmmreg|mask|z,zmmreg,zmmrm512|b16 [rvm:fv: evex.512.np.map6.w0 9a /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 48) 301 001(9a) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFMSUB132BF16, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49297, 644, 7393}, + /* 7226 : VFMSUB213BF16 xmmreg|mask|z,xmmreg,xmmrm128|b16 [rvm:fv: evex.128.np.map6.w0 aa /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 08) 301 001(aa) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFMSUB213BF16, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49306, 644, 7394}, + /* 7227 : VFMSUB213BF16 ymmreg|mask|z,ymmreg,ymmrm256|b16 [rvm:fv: evex.256.np.map6.w0 aa /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 28) 301 001(aa) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFMSUB213BF16, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49315, 644, 7395}, + /* 7228 : VFMSUB213BF16 zmmreg|mask|z,zmmreg,zmmrm512|b16 [rvm:fv: evex.512.np.map6.w0 aa /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 48) 301 001(aa) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFMSUB213BF16, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49324, 644, 7396}, + /* 7229 : VFMSUB231BF16 xmmreg|mask|z,xmmreg,xmmrm128|b16 [rvm:fv: evex.128.np.map6.w0 ba /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 08) 301 001(ba) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFMSUB231BF16, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49333, 644, 7397}, + /* 7230 : VFMSUB231BF16 ymmreg|mask|z,ymmreg,ymmrm256|b16 [rvm:fv: evex.256.np.map6.w0 ba /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 28) 301 001(ba) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFMSUB231BF16, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49342, 644, 7398}, + /* 7231 : VFMSUB231BF16 zmmreg|mask|z,zmmreg,zmmrm512|b16 [rvm:fv: evex.512.np.map6.w0 ba /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 48) 301 001(ba) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFMSUB231BF16, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49351, 644, 7399}, + /* 7232 : VFNMADD132BF16 xmmreg|mask|z,xmmreg,xmmrm128|b16 [rvm:fv: evex.128.np.map6.w0 9c /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 08) 301 001(9c) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFNMADD132BF16, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49360, 644, 7400}, + /* 7233 : VFNMADD132BF16 ymmreg|mask|z,ymmreg,ymmrm256|b16 [rvm:fv: evex.256.np.map6.w0 9c /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 28) 301 001(9c) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFNMADD132BF16, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49369, 644, 7401}, + /* 7234 : VFNMADD132BF16 zmmreg|mask|z,zmmreg,zmmrm512|b16 [rvm:fv: evex.512.np.map6.w0 9c /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 48) 301 001(9c) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFNMADD132BF16, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49378, 644, 7402}, + /* 7235 : VFNMADD213BF16 xmmreg|mask|z,xmmreg,xmmrm128|b16 [rvm:fv: evex.128.np.map6.w0 ac /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 08) 301 001(ac) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFNMADD213BF16, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49387, 644, 7403}, + /* 7236 : VFNMADD213BF16 ymmreg|mask|z,ymmreg,ymmrm256|b16 [rvm:fv: evex.256.np.map6.w0 ac /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 28) 301 001(ac) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFNMADD213BF16, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49396, 644, 7404}, + /* 7237 : VFNMADD213BF16 zmmreg|mask|z,zmmreg,zmmrm512|b16 [rvm:fv: evex.512.np.map6.w0 ac /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 48) 301 001(ac) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFNMADD213BF16, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49405, 644, 7405}, + /* 7238 : VFNMADD231BF16 xmmreg|mask|z,xmmreg,xmmrm128|b16 [rvm:fv: evex.128.np.map6.w0 bc /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 08) 301 001(bc) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFNMADD231BF16, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49414, 644, 7406}, + /* 7239 : VFNMADD231BF16 ymmreg|mask|z,ymmreg,ymmrm256|b16 [rvm:fv: evex.256.np.map6.w0 bc /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 28) 301 001(bc) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFNMADD231BF16, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49423, 644, 7407}, + /* 7240 : VFNMADD231BF16 zmmreg|mask|z,zmmreg,zmmrm512|b16 [rvm:fv: evex.512.np.map6.w0 bc /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 48) 301 001(bc) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFNMADD231BF16, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49432, 644, 7408}, + /* 7241 : VFNMSUB132BF16 xmmreg|mask|z,xmmreg,xmmrm128|b16 [rvm:fv: evex.128.np.map6.w0 9e /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 08) 301 001(9e) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFNMSUB132BF16, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49441, 644, 7409}, + /* 7242 : VFNMSUB132BF16 ymmreg|mask|z,ymmreg,ymmrm256|b16 [rvm:fv: evex.256.np.map6.w0 9e /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 28) 301 001(9e) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFNMSUB132BF16, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49450, 644, 7410}, + /* 7243 : VFNMSUB132BF16 zmmreg|mask|z,zmmreg,zmmrm512|b16 [rvm:fv: evex.512.np.map6.w0 9e /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 48) 301 001(9e) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFNMSUB132BF16, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49459, 644, 7411}, + /* 7244 : VFNMSUB213BF16 xmmreg|mask|z,xmmreg,xmmrm128|b16 [rvm:fv: evex.128.np.map6.w0 ae /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 08) 301 001(ae) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFNMSUB213BF16, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49468, 644, 7412}, + /* 7245 : VFNMSUB213BF16 ymmreg|mask|z,ymmreg,ymmrm256|b16 [rvm:fv: evex.256.np.map6.w0 ae /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 28) 301 001(ae) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFNMSUB213BF16, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49477, 644, 7413}, + /* 7246 : VFNMSUB213BF16 zmmreg|mask|z,zmmreg,zmmrm512|b16 [rvm:fv: evex.512.np.map6.w0 ae /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 48) 301 001(ae) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFNMSUB213BF16, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49486, 644, 7414}, + /* 7247 : VFNMSUB231BF16 xmmreg|mask|z,xmmreg,xmmrm128|b16 [rvm:fv: evex.128.np.map6.w0 be /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 08) 301 001(be) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFNMSUB231BF16, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49495, 644, 7415}, + /* 7248 : VFNMSUB231BF16 ymmreg|mask|z,ymmreg,ymmrm256|b16 [rvm:fv: evex.256.np.map6.w0 be /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 28) 301 001(be) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFNMSUB231BF16, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49504, 644, 7416}, + /* 7249 : VFNMSUB231BF16 zmmreg|mask|z,zmmreg,zmmrm512|b16 [rvm:fv: evex.512.np.map6.w0 be /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 48) 301 001(be) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFNMSUB231BF16, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49513, 644, 7417}, + /* 7250 : VFPCLASSBF16 kreg|mask,xmmrm128|b16,imm8 [rmi:fv: evex.128.f2.0f3a.w0 66 /r ib ] AVX10_2,FUTURE */ + /* 250(f3 7f 08) 301 001(66) 110 022 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFPCLASSBF16, 3, {OPMASKREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK,B16,0,0,0}, nasm_bytecodes+23023, 644, 7418}, + /* 7251 : VFPCLASSBF16 kreg|mask,ymmrm256|b16,imm8 [rmi:fv: evex.256.f2.0f3a.w0 66 /r ib ] AVX10_2,FUTURE */ + /* 250(f3 7f 28) 301 001(66) 110 022 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFPCLASSBF16, 3, {OPMASKREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK,B16,0,0,0}, nasm_bytecodes+23033, 644, 7419}, + /* 7252 : VFPCLASSBF16 kreg|mask,zmmrm512|b16,imm8 [rmi:fv: evex.512.f2.0f3a.w0 66 /r ib ] AVX10_2,FUTURE */ + /* 250(f3 7f 48) 301 001(66) 110 022 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VFPCLASSBF16, 3, {OPMASKREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK,B16,0,0,0}, nasm_bytecodes+23043, 644, 7420}, + /* 7253 : VGETEXPBF16 xmmreg|mask|z,xmmrm128|b16 [rm:fv: evex.128.np.map6.w0 42 /r ] AVX10_2,FUTURE */ + /* 250(f6 7c 08) 301 001(42) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VGETEXPBF16, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+49522, 644, 7421}, + /* 7254 : VGETEXPBF16 ymmreg|mask|z,ymmrm256|b16 [rm:fv: evex.256.np.map6.w0 42 /r ] AVX10_2,FUTURE */ + /* 250(f6 7c 28) 301 001(42) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VGETEXPBF16, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+49531, 644, 7422}, + /* 7255 : VGETEXPBF16 zmmreg|mask|z,zmmrm512|b16 [rm:fv: evex.512.np.map6.w0 42 /r ] AVX10_2,FUTURE */ + /* 250(f6 7c 48) 301 001(42) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VGETEXPBF16, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+49540, 644, 7423}, + /* 7256 : VGETMANTBF16 xmmreg|mask|z,xmmrm128|b16,imm8 [rmi:fv: evex.128.f2.0f3a.w0 26 /r ib ] AVX10_2,FUTURE */ + /* 250(f3 7f 08) 301 001(26) 110 022 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VGETMANTBF16, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+23053, 644, 7424}, + /* 7257 : VGETMANTBF16 ymmreg|mask|z,ymmrm256|b16,imm8 [rmi:fv: evex.256.f2.0f3a.w0 26 /r ib ] AVX10_2,FUTURE */ + /* 250(f3 7f 28) 301 001(26) 110 022 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VGETMANTBF16, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+23063, 644, 7425}, + /* 7258 : VGETMANTBF16 zmmreg|mask|z,zmmrm512|b16,imm8 [rmi:fv: evex.512.f2.0f3a.w0 26 /r ib ] AVX10_2,FUTURE */ + /* 250(f3 7f 48) 301 001(26) 110 022 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VGETMANTBF16, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+23073, 644, 7426}, + /* 7259 : VMAXBF16 xmmreg|mask|z,xmmreg,xmmrm128|b16 [rvm:fv: evex.128.66.map5.w0 5f /r ] AVX10_2,FUTURE */ + /* 241(f5 7d 08) 301 001(5f) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VMAXBF16, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49549, 644, 7427}, + /* 7260 : VMAXBF16 ymmreg|mask|z,ymmreg,ymmrm256|b16 [rvm:fv: evex.256.66.map5.w0 5f /r ] AVX10_2,FUTURE */ + /* 241(f5 7d 28) 301 001(5f) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VMAXBF16, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49558, 644, 7428}, + /* 7261 : VMAXBF16 zmmreg|mask|z,zmmreg,zmmrm512|b16 [rvm:fv: evex.512.66.map5.w0 5f /r ] AVX10_2,FUTURE */ + /* 241(f5 7d 48) 301 001(5f) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VMAXBF16, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49567, 644, 7429}, + /* 7262 : VMINBF16 xmmreg|mask|z,xmmreg,xmmrm128|b16 [rvm:fv: evex.128.66.map5.w0 5d /r ] AVX10_2,FUTURE */ + /* 241(f5 7d 08) 301 001(5d) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VMINBF16, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49576, 644, 7430}, + /* 7263 : VMINBF16 ymmreg|mask|z,ymmreg,ymmrm256|b16 [rvm:fv: evex.256.66.map5.w0 5d /r ] AVX10_2,FUTURE */ + /* 241(f5 7d 28) 301 001(5d) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VMINBF16, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49585, 644, 7431}, + /* 7264 : VMINBF16 zmmreg|mask|z,zmmreg,zmmrm512|b16 [rvm:fv: evex.512.66.map5.w0 5d /r ] AVX10_2,FUTURE */ + /* 241(f5 7d 48) 301 001(5d) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VMINBF16, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49594, 644, 7432}, + /* 7265 : VMULBF16 xmmreg|mask|z,xmmreg,xmmrm128|b16 [rvm:fv: evex.128.66.map5.w0 59 /r ] AVX10_2,FUTURE */ + /* 241(f5 7d 08) 301 001(59) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VMULBF16, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49603, 644, 7433}, + /* 7266 : VMULBF16 ymmreg|mask|z,ymmreg,ymmrm256|b16 [rvm:fv: evex.256.66.map5.w0 59 /r ] AVX10_2,FUTURE */ + /* 241(f5 7d 28) 301 001(59) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VMULBF16, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49612, 644, 7434}, + /* 7267 : VMULBF16 zmmreg|mask|z,zmmreg,zmmrm512|b16 [rvm:fv: evex.512.66.map5.w0 59 /r ] AVX10_2,FUTURE */ + /* 241(f5 7d 48) 301 001(59) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VMULBF16, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49621, 644, 7435}, + /* 7268 : VRCPBF16 xmmreg|mask|z,xmmrm128|b16 [rm:fv: evex.128.np.map6.w0 4c /r ] AVX10_2,FUTURE */ + /* 250(f6 7c 08) 301 001(4c) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VRCPBF16, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+49630, 644, 7436}, + /* 7269 : VRCPBF16 ymmreg|mask|z,ymmrm256|b16 [rm:fv: evex.256.np.map6.w0 4c /r ] AVX10_2,FUTURE */ + /* 250(f6 7c 28) 301 001(4c) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VRCPBF16, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+49639, 644, 7437}, + /* 7270 : VRCPBF16 zmmreg|mask|z,zmmrm512|b16 [rm:fv: evex.512.np.map6.w0 4c /r ] AVX10_2,FUTURE */ + /* 250(f6 7c 48) 301 001(4c) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VRCPBF16, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+49648, 644, 7438}, + /* 7271 : VREDUCEBF16 xmmreg|mask|z,xmmrm128|b16,imm8 [rmi:fv: evex.128.f2.0f3a.w0 56 /r ib ] AVX10_2,FUTURE */ + /* 250(f3 7f 08) 301 001(56) 110 022 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VREDUCEBF16, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+23083, 644, 7439}, + /* 7272 : VREDUCEBF16 ymmreg|mask|z,ymmrm256|b16,imm8 [rmi:fv: evex.256.f2.0f3a.w0 56 /r ib ] AVX10_2,FUTURE */ + /* 250(f3 7f 28) 301 001(56) 110 022 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VREDUCEBF16, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+23093, 644, 7440}, + /* 7273 : VREDUCEBF16 zmmreg|mask|z,zmmrm512|b16,imm8 [rmi:fv: evex.512.f2.0f3a.w0 56 /r ib ] AVX10_2,FUTURE */ + /* 250(f3 7f 48) 301 001(56) 110 022 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VREDUCEBF16, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+23103, 644, 7441}, + /* 7274 : VRNDSCALEBF16 xmmreg|mask|z,xmmrm128|b16,imm8 [rmi:fv: evex.128.f2.0f3a.w0 08 /r ib ] AVX10_2,FUTURE */ + /* 250(f3 7f 08) 301 001(08) 110 022 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VRNDSCALEBF16, 3, {XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+23113, 644, 7442}, + /* 7275 : VRNDSCALEBF16 ymmreg|mask|z,ymmrm256|b16,imm8 [rmi:fv: evex.256.f2.0f3a.w0 08 /r ib ] AVX10_2,FUTURE */ + /* 250(f3 7f 28) 301 001(08) 110 022 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VRNDSCALEBF16, 3, {YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+23123, 644, 7443}, + /* 7276 : VRNDSCALEBF16 zmmreg|mask|z,zmmrm512|b16,imm8 [rmi:fv: evex.512.f2.0f3a.w0 08 /r ib ] AVX10_2,FUTURE */ + /* 250(f3 7f 48) 301 001(08) 110 022 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VRNDSCALEBF16, 3, {ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+23133, 644, 7444}, + /* 7277 : VRSQRTBF16 xmmreg|mask|z,xmmrm128|b16 [rm:fv: evex.128.np.map6.w0 4e /r ] AVX10_2,FUTURE */ + /* 250(f6 7c 08) 301 001(4e) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VRSQRTBF16, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+49657, 644, 7445}, + /* 7278 : VRSQRTBF16 ymmreg|mask|z,ymmrm256|b16 [rm:fv: evex.256.np.map6.w0 4e /r ] AVX10_2,FUTURE */ + /* 250(f6 7c 28) 301 001(4e) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VRSQRTBF16, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+49666, 644, 7446}, + /* 7279 : VRSQRTBF16 zmmreg|mask|z,zmmrm512|b16 [rm:fv: evex.512.np.map6.w0 4e /r ] AVX10_2,FUTURE */ + /* 250(f6 7c 48) 301 001(4e) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VRSQRTBF16, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+49675, 644, 7447}, + /* 7280 : VSCALEFBF16 xmmreg|mask|z,xmmreg,xmmrm128|b16 [rvm:fv: evex.128.np.map6.w0 2c /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 08) 301 001(2c) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VSCALEFBF16, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49684, 644, 7448}, + /* 7281 : VSCALEFBF16 ymmreg|mask|z,ymmreg,ymmrm256|b16 [rvm:fv: evex.256.np.map6.w0 2c /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 28) 301 001(2c) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VSCALEFBF16, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49693, 644, 7449}, + /* 7282 : VSCALEFBF16 zmmreg|mask|z,zmmreg,zmmrm512|b16 [rvm:fv: evex.512.np.map6.w0 2c /r ] AVX10_2,FUTURE */ + /* 241(f6 7c 48) 301 001(2c) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VSCALEFBF16, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49702, 644, 7450}, + /* 7283 : VSQRTBF16 xmmreg|mask|z,xmmrm128|b16 [rm:fv: evex.128.66.map5.w0 51 /r ] AVX10_2,FUTURE */ + /* 250(f5 7d 08) 301 001(51) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VSQRTBF16, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+49711, 644, 7451}, + /* 7284 : VSQRTBF16 ymmreg|mask|z,ymmrm256|b16 [rm:fv: evex.256.66.map5.w0 51 /r ] AVX10_2,FUTURE */ + /* 250(f5 7d 28) 301 001(51) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VSQRTBF16, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+49720, 644, 7452}, + /* 7285 : VSQRTBF16 zmmreg|mask|z,zmmrm512|b16 [rm:fv: evex.512.66.map5.w0 51 /r ] AVX10_2,FUTURE */ + /* 250(f5 7d 48) 301 001(51) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VSQRTBF16, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+49729, 644, 7453}, + /* 7286 : VSUBBF16 xmmreg|mask|z,xmmreg,xmmrm128|b16 [rvm:fv: evex.128.66.map5.w0 5c /r ] AVX10_2,FUTURE */ + /* 241(f5 7d 08) 301 001(5c) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VSUBBF16, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49738, 644, 7454}, + /* 7287 : VSUBBF16 ymmreg|mask|z,ymmreg,ymmrm256|b16 [rvm:fv: evex.256.66.map5.w0 5c /r ] AVX10_2,FUTURE */ + /* 241(f5 7d 28) 301 001(5c) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VSUBBF16, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49747, 644, 7455}, + /* 7288 : VSUBBF16 zmmreg|mask|z,zmmreg,zmmrm512|b16 [rvm:fv: evex.512.66.map5.w0 5c /r ] AVX10_2,FUTURE */ + /* 241(f5 7d 48) 301 001(5c) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VSUBBF16, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49756, 644, 7456}, + /* 7289 : VCOMXSD xmmreg,xmmrm64|sae [rm:t1s: evex.lig.f2.0f.w1 2f /r ] AVX10_2,FUTURE */ + /* 250(f1 ff 08) 306 001(2f) 110 : LIG,EVEX,PROT,AVX10_2,FUTURE */ + {I_VCOMXSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+49765, 645, 7459}, + /* 7290 : VCOMXSH xmmreg,xmmrm16|sae [rm:t1s: evex.lig.f3.map5.w0 2f /r ] AVX10_2,FUTURE */ + /* 250(f5 7e 08) 306 001(2f) 110 : LIG,EVEX,PROT,AVX10_2,FUTURE */ + {I_VCOMXSH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+49774, 645, 7460}, + /* 7291 : VCOMXSS xmmreg,xmmrm32|sae [rm:t1s: evex.lig.f3.0f.w0 2f /r ] AVX10_2,FUTURE */ + /* 250(f1 7e 08) 306 001(2f) 110 : LIG,EVEX,PROT,AVX10_2,FUTURE */ + {I_VCOMXSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+49783, 645, 7461}, + /* 7292 : VUCOMXSD xmmreg,xmmrm64|sae [rm:t1s: evex.lig.f2.0f.w1 2e /r ] AVX10_2,FUTURE */ + /* 250(f1 ff 08) 306 001(2e) 110 : LIG,EVEX,PROT,AVX10_2,FUTURE */ + {I_VUCOMXSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+49792, 645, 7462}, + /* 7293 : VUCOMXSH xmmreg,xmmrm16|sae [rm:t1s: evex.lig.f3.map5.w0 2e /r ] AVX10_2,FUTURE */ + /* 250(f5 7e 08) 306 001(2e) 110 : LIG,EVEX,PROT,AVX10_2,FUTURE */ + {I_VUCOMXSH, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+49801, 645, 7463}, + /* 7294 : VUCOMXSS xmmreg,xmmrm32|sae [rm:t1s: evex.lig.f3.0f.w0 2e /r ] AVX10_2,FUTURE */ + /* 250(f1 7e 08) 306 001(2e) 110 : LIG,EVEX,PROT,AVX10_2,FUTURE */ + {I_VUCOMXSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+49810, 645, 7464}, + /* 7295 : VCVT2PH2BF8 xmmreg|mask|z,xmmreg,xmmrm128|b16 [rvm:fv: evex.128.f2.0f38.w0 74 /r ] AVX10_2,FUTURE */ + /* 241(f2 7f 08) 301 001(74) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVT2PH2BF8, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49819, 644, 7467}, + /* 7296 : VCVT2PH2BF8 ymmreg|mask|z,ymmreg,ymmrm256|b16 [rvm:fv: evex.256.f2.0f38.w0 74 /r ] AVX10_2,FUTURE */ + /* 241(f2 7f 28) 301 001(74) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVT2PH2BF8, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49828, 644, 7468}, + /* 7297 : VCVT2PH2BF8 zmmreg|mask|z,zmmreg,zmmrm512|b16 [rvm:fv: evex.512.f2.0f38.w0 74 /r ] AVX10_2,FUTURE */ + /* 241(f2 7f 48) 301 001(74) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVT2PH2BF8, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49837, 644, 7469}, + /* 7298 : VCVT2PH2BF8S xmmreg|mask|z,xmmreg,xmmrm128|b16 [rvm:fv: evex.128.f2.map5.w0 74 /r ] AVX10_2,FUTURE */ + /* 241(f5 7f 08) 301 001(74) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVT2PH2BF8S, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49846, 644, 7470}, + /* 7299 : VCVT2PH2BF8S ymmreg|mask|z,ymmreg,ymmrm256|b16 [rvm:fv: evex.256.f2.map5.w0 74 /r ] AVX10_2,FUTURE */ + /* 241(f5 7f 28) 301 001(74) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVT2PH2BF8S, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49855, 644, 7471}, + /* 7300 : VCVT2PH2BF8S zmmreg|mask|z,zmmreg,zmmrm512|b16 [rvm:fv: evex.512.f2.map5.w0 74 /r ] AVX10_2,FUTURE */ + /* 241(f5 7f 48) 301 001(74) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVT2PH2BF8S, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49864, 644, 7472}, + /* 7301 : VCVT2PH2HF8 xmmreg|mask|z,xmmreg,xmmrm128|b16 [rvm:fv: evex.128.f2.map5.w0 18 /r ] AVX10_2,FUTURE */ + /* 241(f5 7f 08) 301 001(18) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVT2PH2HF8, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49873, 644, 7473}, + /* 7302 : VCVT2PH2HF8 ymmreg|mask|z,ymmreg,ymmrm256|b16 [rvm:fv: evex.256.f2.map5.w0 18 /r ] AVX10_2,FUTURE */ + /* 241(f5 7f 28) 301 001(18) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVT2PH2HF8, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49882, 644, 7474}, + /* 7303 : VCVT2PH2HF8 zmmreg|mask|z,zmmreg,zmmrm512|b16 [rvm:fv: evex.512.f2.map5.w0 18 /r ] AVX10_2,FUTURE */ + /* 241(f5 7f 48) 301 001(18) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVT2PH2HF8, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49891, 644, 7475}, + /* 7304 : VCVT2PH2HF8S xmmreg|mask|z,xmmreg,xmmrm128|b16 [rvm:fv: evex.128.f2.map5.w0 1b /r ] AVX10_2,FUTURE */ + /* 241(f5 7f 08) 301 001(1b) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVT2PH2HF8S, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49900, 644, 7476}, + /* 7305 : VCVT2PH2HF8S ymmreg|mask|z,ymmreg,ymmrm256|b16 [rvm:fv: evex.256.f2.map5.w0 1b /r ] AVX10_2,FUTURE */ + /* 241(f5 7f 28) 301 001(1b) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVT2PH2HF8S, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49909, 644, 7477}, + /* 7306 : VCVT2PH2HF8S zmmreg|mask|z,zmmreg,zmmrm512|b16 [rvm:fv: evex.512.f2.map5.w0 1b /r ] AVX10_2,FUTURE */ + /* 241(f5 7f 48) 301 001(1b) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVT2PH2HF8S, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+49918, 644, 7478}, + /* 7307 : VCVTPH2BF8 xmmreg|mask|z,xmmrm128|b16 [rm:fv: evex.128.f3.0f38.w0 74 /r ] AVX10_2,FUTURE */ + /* 250(f2 7e 08) 301 001(74) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTPH2BF8, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+49927, 644, 7479}, + /* 7308 : VCVTPH2BF8 xmmreg|mask|z,ymmrm256|b16 [rm:fv: evex.256.f3.0f38.w0 74 /r ] AVX10_2,FUTURE */ + /* 250(f2 7e 28) 301 001(74) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTPH2BF8, 2, {XMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+49936, 644, 7480}, + /* 7309 : VCVTPH2BF8 ymmreg|mask|z,zmmrm512|b16 [rm:fv: evex.512.f3.0f38.w0 74 /r ] AVX10_2,FUTURE */ + /* 250(f2 7e 48) 301 001(74) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTPH2BF8, 2, {YMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+49945, 644, 7481}, + /* 7310 : VCVTPH2BF8S xmmreg|mask|z,xmmrm128|b16 [rm:fv: evex.128.f3.map5.w0 74 /r ] AVX10_2,FUTURE */ + /* 250(f5 7e 08) 301 001(74) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTPH2BF8S, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+49954, 644, 7482}, + /* 7311 : VCVTPH2BF8S xmmreg|mask|z,ymmrm256|b16 [rm:fv: evex.256.f3.map5.w0 74 /r ] AVX10_2,FUTURE */ + /* 250(f5 7e 28) 301 001(74) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTPH2BF8S, 2, {XMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+49963, 644, 7483}, + /* 7312 : VCVTPH2BF8S ymmreg|mask|z,zmmrm512|b16 [rm:fv: evex.512.f3.map5.w0 74 /r ] AVX10_2,FUTURE */ + /* 250(f5 7e 48) 301 001(74) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTPH2BF8S, 2, {YMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+49972, 644, 7484}, + /* 7313 : VCVTPH2HF8 xmmreg|mask|z,xmmrm128|b16 [rm:fv: evex.128.f3.map5.w0 18 /r ] AVX10_2,FUTURE */ + /* 250(f5 7e 08) 301 001(18) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTPH2HF8, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+49981, 644, 7485}, + /* 7314 : VCVTPH2HF8 xmmreg|mask|z,ymmrm256|b16 [rm:fv: evex.256.f3.map5.w0 18 /r ] AVX10_2,FUTURE */ + /* 250(f5 7e 28) 301 001(18) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTPH2HF8, 2, {XMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+49990, 644, 7486}, + /* 7315 : VCVTPH2HF8 ymmreg|mask|z,zmmrm512|b16 [rm:fv: evex.512.f3.map5.w0 18 /r ] AVX10_2,FUTURE */ + /* 250(f5 7e 48) 301 001(18) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTPH2HF8, 2, {YMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+49999, 644, 7487}, + /* 7316 : VCVTPH2HF8S xmmreg|mask|z,xmmrm128|b16 [rm:fv: evex.128.f3.map5.w0 1b /r ] AVX10_2,FUTURE */ + /* 250(f5 7e 08) 301 001(1b) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTPH2HF8S, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+50008, 644, 7488}, + /* 7317 : VCVTPH2HF8S xmmreg|mask|z,ymmrm256|b16 [rm:fv: evex.256.f3.map5.w0 1b /r ] AVX10_2,FUTURE */ + /* 250(f5 7e 28) 301 001(1b) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTPH2HF8S, 2, {XMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+50017, 644, 7489}, + /* 7318 : VCVTPH2HF8S ymmreg|mask|z,zmmrm512|b16 [rm:fv: evex.512.f3.map5.w0 1b /r ] AVX10_2,FUTURE */ + /* 250(f5 7e 48) 301 001(1b) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTPH2HF8S, 2, {YMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+50026, 644, 7490}, + /* 7319 : VCVT2PS2PHX xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.128.66.0f38.w0 67 /r ] AVX10_2,FUTURE */ + /* 241(f2 7d 08) 301 001(67) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVT2PS2PHX, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50035, 644, 7491}, + /* 7320 : VCVT2PS2PHX ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.256.66.0f38.w0 67 /r ] AVX10_2,FUTURE */ + /* 241(f2 7d 28) 301 001(67) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVT2PS2PHX, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50044, 644, 7492}, + /* 7321 : VCVT2PS2PHX zmmreg|mask|z,zmmreg,zmmrm512|b32 [rvm:fv: evex.512.66.0f38.w0 67 /r ] AVX10_2,FUTURE */ + /* 241(f2 7d 48) 301 001(67) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVT2PS2PHX, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50053, 644, 7493}, + /* 7322 : VCVTBIASPH2BF8 xmmreg|mask|z,xmmreg,xmmrm128|b16 [rvm:fv: evex.128.np.0f38.w0 74 /r ] AVX10_2,FUTURE */ + /* 241(f2 7c 08) 301 001(74) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTBIASPH2BF8, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+50062, 644, 7494}, + /* 7323 : VCVTBIASPH2BF8 xmmreg|mask|z,ymmreg,ymmrm256|b16 [rvm:fv: evex.256.np.0f38.w0 74 /r ] AVX10_2,FUTURE */ + /* 241(f2 7c 28) 301 001(74) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTBIASPH2BF8, 3, {XMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+50071, 644, 7495}, + /* 7324 : VCVTBIASPH2BF8 ymmreg|mask|z,zmmreg,zmmrm512|b16 [rvm:fv: evex.512.np.0f38.w0 74 /r ] AVX10_2,FUTURE */ + /* 241(f2 7c 48) 301 001(74) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTBIASPH2BF8, 3, {YMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+50080, 644, 7496}, + /* 7325 : VCVTBIASPH2BF8S xmmreg|mask|z,xmmreg,xmmrm128|b16 [rvm:fv: evex.128.np.map5.w0 74 /r ] AVX10_2,FUTURE */ + /* 241(f5 7c 08) 301 001(74) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTBIASPH2BF8S, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+50089, 644, 7497}, + /* 7326 : VCVTBIASPH2BF8S xmmreg|mask|z,ymmreg,ymmrm256|b16 [rvm:fv: evex.256.np.map5.w0 74 /r ] AVX10_2,FUTURE */ + /* 241(f5 7c 28) 301 001(74) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTBIASPH2BF8S, 3, {XMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+50098, 644, 7498}, + /* 7327 : VCVTBIASPH2BF8S ymmreg|mask|z,zmmreg,zmmrm512|b16 [rvm:fv: evex.512.np.map5.w0 74 /r ] AVX10_2,FUTURE */ + /* 241(f5 7c 48) 301 001(74) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTBIASPH2BF8S, 3, {YMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+50107, 644, 7499}, + /* 7328 : VCVTBIASPH2HF8 xmmreg|mask|z,xmmreg,xmmrm128|b16 [rvm:fv: evex.128.np.map5.w0 18 /r ] AVX10_2,FUTURE */ + /* 241(f5 7c 08) 301 001(18) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTBIASPH2HF8, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+50116, 644, 7500}, + /* 7329 : VCVTBIASPH2HF8 xmmreg|mask|z,ymmreg,ymmrm256|b16 [rvm:fv: evex.256.np.map5.w0 18 /r ] AVX10_2,FUTURE */ + /* 241(f5 7c 28) 301 001(18) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTBIASPH2HF8, 3, {XMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+50125, 644, 7501}, + /* 7330 : VCVTBIASPH2HF8 ymmreg|mask|z,zmmreg,zmmrm512|b16 [rvm:fv: evex.512.np.map5.w0 18 /r ] AVX10_2,FUTURE */ + /* 241(f5 7c 48) 301 001(18) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTBIASPH2HF8, 3, {YMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+50134, 644, 7502}, + /* 7331 : VCVTBIASPH2HF8S xmmreg|mask|z,xmmreg,xmmrm128|b16 [rvm:fv: evex.128.np.map5.w0 1b /r ] AVX10_2,FUTURE */ + /* 241(f5 7c 08) 301 001(1b) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTBIASPH2HF8S, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+50143, 644, 7503}, + /* 7332 : VCVTBIASPH2HF8S xmmreg|mask|z,ymmreg,ymmrm256|b16 [rvm:fv: evex.256.np.map5.w0 1b /r ] AVX10_2,FUTURE */ + /* 241(f5 7c 28) 301 001(1b) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTBIASPH2HF8S, 3, {XMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+50152, 644, 7504}, + /* 7333 : VCVTBIASPH2HF8S ymmreg|mask|z,zmmreg,zmmrm512|b16 [rvm:fv: evex.512.np.map5.w0 1b /r ] AVX10_2,FUTURE */ + /* 241(f5 7c 48) 301 001(1b) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTBIASPH2HF8S, 3, {YMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+50161, 644, 7505}, + /* 7334 : VCVTHF82PH xmmreg|mask|z,xmmrm64 [rm:hv: evex.128.f2.map5.w0 1e /r ] AVX10_2,FUTURE */ + /* 250(f5 7f 08) 302 001(1e) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTHF82PH, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+50170, 644, 7506}, + /* 7335 : VCVTHF82PH ymmreg|mask|z,xmmrm128 [rm:hv: evex.256.f2.map5.w0 1e /r ] AVX10_2,FUTURE */ + /* 250(f5 7f 28) 302 001(1e) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTHF82PH, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+50179, 644, 7507}, + /* 7336 : VCVTHF82PH zmmreg|mask|z,ymmrm256 [rm:hv: evex.512.f2.map5.w0 1e /r ] AVX10_2,FUTURE */ + /* 250(f5 7f 48) 302 001(1e) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTHF82PH, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+50188, 644, 7508}, + /* 7337 : VDPPHPS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.128.np.0f38.w0 52 /r ] AVX10_2,FUTURE */ + /* 241(f2 7c 08) 301 001(52) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VDPPHPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50197, 644, 7511}, + /* 7338 : VDPPHPS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.256.np.0f38.w0 52 /r ] AVX10_2,FUTURE */ + /* 241(f2 7c 28) 301 001(52) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VDPPHPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50206, 644, 7512}, + /* 7339 : VDPPHPS zmmreg|mask|z,zmmreg,zmmrm512|b32 [rvm:fv: evex.512.np.0f38.w0 52 /r ] AVX10_2,FUTURE */ + /* 241(f2 7c 48) 301 001(52) 120 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VDPPHPS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50215, 644, 7513}, + /* 7340 : VMPSADBW xmmreg|mask|z,xmmreg,xmmrm128,imm8 [rvmi:fvm: evex.128.f3.0f3a.w0 42 /r ib ] AVX10_2,FUTURE */ + /* 241(f3 7e 08) 303 001(42) 120 023 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VMPSADBW, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23143, 644, 7514}, + /* 7341 : VMPSADBW ymmreg|mask|z,ymmreg,ymmrm256,imm8 [rvmi:fvm: evex.256.f3.0f3a.w0 42 /r ib ] AVX10_2,FUTURE */ + /* 241(f3 7e 28) 303 001(42) 120 023 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VMPSADBW, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23153, 644, 7515}, + /* 7342 : VMPSADBW zmmreg|mask|z,zmmreg,zmmrm512,imm8 [rvmi:fvm: evex.512.f3.0f3a.w0 42 /r ib ] AVX10_2,FUTURE */ + /* 241(f3 7e 48) 303 001(42) 120 023 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VMPSADBW, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+23163, 644, 7516}, + /* 7343 : VPDPBSSD xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.128.f2.0f38.w0 50 /r ] AVX10_2,AVX10_VNNIINT,FUTURE */ + /* 241(f2 7f 08) 301 001(50) 120 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {I_VPDPBSSD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50224, 646, 7517}, + /* 7344 : VPDPBSSD ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.256.f2.0f38.w0 50 /r ] AVX10_2,AVX10_VNNIINT,FUTURE */ + /* 241(f2 7f 28) 301 001(50) 120 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {I_VPDPBSSD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50233, 646, 7518}, + /* 7345 : VPDPBSSD zmmreg|mask|z,zmmreg,zmmrm512|b32 [rvm:fv: evex.512.f2.0f38.w0 50 /r ] AVX10_2,AVX10_VNNIINT,FUTURE */ + /* 241(f2 7f 48) 301 001(50) 120 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {I_VPDPBSSD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50242, 646, 7519}, + /* 7346 : VPDPBSSDS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.128.f2.0f38.w0 51 /r ] AVX10_2,AVX10_VNNIINT,FUTURE */ + /* 241(f2 7f 08) 301 001(51) 120 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {I_VPDPBSSDS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50251, 646, 7520}, + /* 7347 : VPDPBSSDS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.256.f2.0f38.w0 51 /r ] AVX10_2,AVX10_VNNIINT,FUTURE */ + /* 241(f2 7f 28) 301 001(51) 120 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {I_VPDPBSSDS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50260, 646, 7521}, + /* 7348 : VPDPBSSDS zmmreg|mask|z,zmmreg,zmmrm512|b32 [rvm:fv: evex.512.f2.0f38.w0 51 /r ] AVX10_2,AVX10_VNNIINT,FUTURE */ + /* 241(f2 7f 48) 301 001(51) 120 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {I_VPDPBSSDS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50269, 646, 7522}, + /* 7349 : VPDPBSUD xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.128.f3.0f38.w0 50 /r ] AVX10_2,AVX10_VNNIINT,FUTURE */ + /* 241(f2 7e 08) 301 001(50) 120 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {I_VPDPBSUD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50278, 646, 7523}, + /* 7350 : VPDPBSUD ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.256.f3.0f38.w0 50 /r ] AVX10_2,AVX10_VNNIINT,FUTURE */ + /* 241(f2 7e 28) 301 001(50) 120 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {I_VPDPBSUD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50287, 646, 7524}, + /* 7351 : VPDPBSUD zmmreg|mask|z,zmmreg,zmmrm512|b32 [rvm:fv: evex.512.f3.0f38.w0 50 /r ] AVX10_2,AVX10_VNNIINT,FUTURE */ + /* 241(f2 7e 48) 301 001(50) 120 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {I_VPDPBSUD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50296, 646, 7525}, + /* 7352 : VPDPBSUDS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.128.f3.0f38.w0 51 /r ] AVX10_2,AVX10_VNNIINT,FUTURE */ + /* 241(f2 7e 08) 301 001(51) 120 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {I_VPDPBSUDS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50305, 646, 7526}, + /* 7353 : VPDPBSUDS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.256.f3.0f38.w0 51 /r ] AVX10_2,AVX10_VNNIINT,FUTURE */ + /* 241(f2 7e 28) 301 001(51) 120 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {I_VPDPBSUDS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50314, 646, 7527}, + /* 7354 : VPDPBSUDS zmmreg|mask|z,zmmreg,zmmrm512|b32 [rvm:fv: evex.512.f3.0f38.w0 51 /r ] AVX10_2,AVX10_VNNIINT,FUTURE */ + /* 241(f2 7e 48) 301 001(51) 120 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {I_VPDPBSUDS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50323, 646, 7528}, + /* 7355 : VPDPBUUD xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.128.np.0f38.w0 50 /r ] AVX10_2,AVX10_VNNIINT,FUTURE */ + /* 241(f2 7c 08) 301 001(50) 120 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {I_VPDPBUUD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50332, 646, 7529}, + /* 7356 : VPDPBUUD ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.256.np.0f38.w0 50 /r ] AVX10_2,AVX10_VNNIINT,FUTURE */ + /* 241(f2 7c 28) 301 001(50) 120 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {I_VPDPBUUD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50341, 646, 7530}, + /* 7357 : VPDPBUUD zmmreg|mask|z,zmmreg,zmmrm512|b32 [rvm:fv: evex.512.np.0f38.w0 50 /r ] AVX10_2,AVX10_VNNIINT,FUTURE */ + /* 241(f2 7c 48) 301 001(50) 120 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {I_VPDPBUUD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50350, 646, 7531}, + /* 7358 : VPDPBUUDS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.128.np.0f38.w0 51 /r ] AVX10_2,AVX10_VNNIINT,FUTURE */ + /* 241(f2 7c 08) 301 001(51) 120 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {I_VPDPBUUDS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50359, 646, 7532}, + /* 7359 : VPDPBUUDS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.256.np.0f38.w0 51 /r ] AVX10_2,AVX10_VNNIINT,FUTURE */ + /* 241(f2 7c 28) 301 001(51) 120 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {I_VPDPBUUDS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50368, 646, 7533}, + /* 7360 : VPDPBUUDS zmmreg|mask|z,zmmreg,zmmrm512|b32 [rvm:fv: evex.512.np.0f38.w0 51 /r ] AVX10_2,AVX10_VNNIINT,FUTURE */ + /* 241(f2 7c 48) 301 001(51) 120 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {I_VPDPBUUDS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50377, 646, 7534}, + /* 7361 : VPDPWSUD xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.128.f3.0f38.w0 d2 /r ] AVX10_2,AVX10_VNNIINT,FUTURE */ + /* 241(f2 7e 08) 301 001(d2) 120 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {I_VPDPWSUD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50386, 646, 7535}, + /* 7362 : VPDPWSUD ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.256.f3.0f38.w0 d2 /r ] AVX10_2,AVX10_VNNIINT,FUTURE */ + /* 241(f2 7e 28) 301 001(d2) 120 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {I_VPDPWSUD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50395, 646, 7536}, + /* 7363 : VPDPWSUD zmmreg|mask|z,zmmreg,zmmrm512|b32 [rvm:fv: evex.512.f3.0f38.w0 d2 /r ] AVX10_2,AVX10_VNNIINT,FUTURE */ + /* 241(f2 7e 48) 301 001(d2) 120 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {I_VPDPWSUD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50404, 646, 7537}, + /* 7364 : VPDPWSUDS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.128.f3.0f38.w0 d3 /r ] AVX10_2,AVX10_VNNIINT,FUTURE */ + /* 241(f2 7e 08) 301 001(d3) 120 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {I_VPDPWSUDS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50413, 646, 7538}, + /* 7365 : VPDPWSUDS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.256.f3.0f38.w0 d3 /r ] AVX10_2,AVX10_VNNIINT,FUTURE */ + /* 241(f2 7e 28) 301 001(d3) 120 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {I_VPDPWSUDS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50422, 646, 7539}, + /* 7366 : VPDPWSUDS zmmreg|mask|z,zmmreg,zmmrm512|b32 [rvm:fv: evex.512.f3.0f38.w0 d3 /r ] AVX10_2,AVX10_VNNIINT,FUTURE */ + /* 241(f2 7e 48) 301 001(d3) 120 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {I_VPDPWSUDS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50431, 646, 7540}, + /* 7367 : VPDPWUSD xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.128.66.0f38.w0 d2 /r ] AVX10_2,AVX10_VNNIINT,FUTURE */ + /* 241(f2 7d 08) 301 001(d2) 120 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {I_VPDPWUSD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50440, 646, 7541}, + /* 7368 : VPDPWUSD ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.256.66.0f38.w0 d2 /r ] AVX10_2,AVX10_VNNIINT,FUTURE */ + /* 241(f2 7d 28) 301 001(d2) 120 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {I_VPDPWUSD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50449, 646, 7542}, + /* 7369 : VPDPWUSD zmmreg|mask|z,zmmreg,zmmrm512|b32 [rvm:fv: evex.512.66.0f38.w0 d2 /r ] AVX10_2,AVX10_VNNIINT,FUTURE */ + /* 241(f2 7d 48) 301 001(d2) 120 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {I_VPDPWUSD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50458, 646, 7543}, + /* 7370 : VPDPWUSDS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.128.66.0f38.w0 d3 /r ] AVX10_2,AVX10_VNNIINT,FUTURE */ + /* 241(f2 7d 08) 301 001(d3) 120 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {I_VPDPWUSDS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50467, 646, 7544}, + /* 7371 : VPDPWUSDS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.256.66.0f38.w0 d3 /r ] AVX10_2,AVX10_VNNIINT,FUTURE */ + /* 241(f2 7d 28) 301 001(d3) 120 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {I_VPDPWUSDS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50476, 646, 7545}, + /* 7372 : VPDPWUSDS zmmreg|mask|z,zmmreg,zmmrm512|b32 [rvm:fv: evex.512.66.0f38.w0 d3 /r ] AVX10_2,AVX10_VNNIINT,FUTURE */ + /* 241(f2 7d 48) 301 001(d3) 120 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {I_VPDPWUSDS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50485, 646, 7546}, + /* 7373 : VPDPWUUD xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.128.np.0f38.w0 d2 /r ] AVX10_2,AVX10_VNNIINT,FUTURE */ + /* 241(f2 7c 08) 301 001(d2) 120 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {I_VPDPWUUD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50494, 646, 7547}, + /* 7374 : VPDPWUUD ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.256.np.0f38.w0 d2 /r ] AVX10_2,AVX10_VNNIINT,FUTURE */ + /* 241(f2 7c 28) 301 001(d2) 120 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {I_VPDPWUUD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50503, 646, 7548}, + /* 7375 : VPDPWUUD zmmreg|mask|z,zmmreg,zmmrm512|b32 [rvm:fv: evex.512.np.0f38.w0 d2 /r ] AVX10_2,AVX10_VNNIINT,FUTURE */ + /* 241(f2 7c 48) 301 001(d2) 120 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {I_VPDPWUUD, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50512, 646, 7549}, + /* 7376 : VPDPWUUDS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.128.np.0f38.w0 d3 /r ] AVX10_2,AVX10_VNNIINT,FUTURE */ + /* 241(f2 7c 08) 301 001(d3) 120 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {I_VPDPWUUDS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50521, 646, 7550}, + /* 7377 : VPDPWUUDS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.256.np.0f38.w0 d3 /r ] AVX10_2,AVX10_VNNIINT,FUTURE */ + /* 241(f2 7c 28) 301 001(d3) 120 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {I_VPDPWUUDS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50530, 646, 7551}, + /* 7378 : VPDPWUUDS zmmreg|mask|z,zmmreg,zmmrm512|b32 [rvm:fv: evex.512.np.0f38.w0 d3 /r ] AVX10_2,AVX10_VNNIINT,FUTURE */ + /* 241(f2 7c 48) 301 001(d3) 120 : EVEX,PROT,AVX10_2,AVX10_VNNIINT,FUTURE */ + {I_VPDPWUUDS, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+50539, 646, 7552}, + /* 7379 : VMINMAXBF16 xmmreg|mask|z,xmmreg,xmmrm128|b16,imm8 [rvmi:fv: evex.128.f2.0f3a.w0 52 /r ib ] AVX10_2,FUTURE */ + /* 241(f3 7f 08) 301 001(52) 120 023 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VMINMAXBF16, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+23173, 644, 7555}, + /* 7380 : VMINMAXBF16 ymmreg|mask|z,ymmreg,ymmrm256|b16,imm8 [rvmi:fv: evex.256.f2.0f3a.w0 52 /r ib ] AVX10_2,FUTURE */ + /* 241(f3 7f 28) 301 001(52) 120 023 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VMINMAXBF16, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+23183, 644, 7556}, + /* 7381 : VMINMAXBF16 zmmreg|mask|z,zmmreg,zmmrm512|b16,imm8 [rvmi:fv: evex.512.f2.0f3a.w0 52 /r ib ] AVX10_2,FUTURE */ + /* 241(f3 7f 48) 301 001(52) 120 023 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VMINMAXBF16, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+23193, 644, 7557}, + /* 7382 : VMINMAXPD xmmreg|mask|z,xmmreg,xmmrm128|b64,imm8 [rvmi:fv: evex.128.66.0f3a.w1 52 /r ib ] AVX10_2,FUTURE */ + /* 241(f3 fd 08) 301 001(52) 120 023 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VMINMAXPD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+23203, 644, 7558}, + /* 7383 : VMINMAXPD ymmreg|mask|z,ymmreg,ymmrm256|b64,imm8 [rvmi:fv: evex.256.66.0f3a.w1 52 /r ib ] AVX10_2,FUTURE */ + /* 241(f3 fd 28) 301 001(52) 120 023 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VMINMAXPD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B64,0,0}, nasm_bytecodes+23213, 644, 7559}, + /* 7384 : VMINMAXPD zmmreg|mask|z,zmmreg,zmmrm512|b64|sae,imm8 [rvmi:fv: evex.512.66.0f3a.w1 52 /r ib ] AVX10_2,FUTURE */ + /* 241(f3 fd 48) 301 001(52) 120 023 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VMINMAXPD, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B64|SAE,0,0}, nasm_bytecodes+23223, 644, 7560}, + /* 7385 : VMINMAXPH xmmreg|mask|z,xmmreg,xmmrm128|b16,imm8 [rvmi:fv: evex.128.np.0f3a.w0 52 /r ib ] AVX10_2,FUTURE */ + /* 241(f3 7c 08) 301 001(52) 120 023 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VMINMAXPH, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+23233, 644, 7561}, + /* 7386 : VMINMAXPH ymmreg|mask|z,ymmreg,ymmrm256|b16,imm8 [rvmi:fv: evex.256.np.0f3a.w0 52 /r ib ] AVX10_2,FUTURE */ + /* 241(f3 7c 28) 301 001(52) 120 023 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VMINMAXPH, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B16,0,0}, nasm_bytecodes+23243, 644, 7562}, + /* 7387 : VMINMAXPH zmmreg|mask|z,zmmreg,zmmrm512|b16|sae,imm8 [rvmi:fv: evex.512.np.0f3a.w0 52 /r ib ] AVX10_2,FUTURE */ + /* 241(f3 7c 48) 301 001(52) 120 023 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VMINMAXPH, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B16|SAE,0,0}, nasm_bytecodes+23253, 644, 7563}, + /* 7388 : VMINMAXPS xmmreg|mask|z,xmmreg,xmmrm128|b32,imm8 [rvmi:fv: evex.128.66.0f3a.w0 52 /r ib ] AVX10_2,FUTURE */ + /* 241(f3 7d 08) 301 001(52) 120 023 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VMINMAXPS, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+23263, 644, 7564}, + /* 7389 : VMINMAXPS ymmreg|mask|z,ymmreg,ymmrm256|b32,imm8 [rvmi:fv: evex.256.66.0f3a.w0 52 /r ib ] AVX10_2,FUTURE */ + /* 241(f3 7d 28) 301 001(52) 120 023 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VMINMAXPS, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B32,0,0}, nasm_bytecodes+23273, 644, 7565}, + /* 7390 : VMINMAXPS zmmreg|mask|z,zmmreg,zmmrm512|b32|sae,imm8 [rvmi:fv: evex.512.66.0f3a.w0 52 /r ib ] AVX10_2,FUTURE */ + /* 241(f3 7d 48) 301 001(52) 120 023 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VMINMAXPS, 4, {ZMMREG,ZMMREG,RM_ZMM|BITS512,IMM_NORMAL|BITS8,0}, {MASK|Z,0,B32|SAE,0,0}, nasm_bytecodes+23283, 644, 7566}, + /* 7391 : VMINMAXSD xmmreg|mask|z,xmmreg,xmmrm64|sae,imm8 [rvmi:t1s: evex.lig.66.0f3a.w1 53 /r ib ] AVX10_2,FUTURE */ + /* 241(f3 fd 08) 306 001(53) 120 023 : LIG,EVEX,PROT,AVX10_2,FUTURE */ + {I_VMINMAXSD, 4, {XMMREG,XMMREG,RM_XMM|BITS64,IMM_NORMAL|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+23293, 645, 7567}, + /* 7392 : VMINMAXSH xmmreg|mask|z,xmmreg,xmmrm16|sae,imm8 [rvmi:t1s: evex.lig.np.0f3a.w0 53 /r ib ] AVX10_2,FUTURE */ + /* 241(f3 7c 08) 306 001(53) 120 023 : LIG,EVEX,PROT,AVX10_2,FUTURE */ + {I_VMINMAXSH, 4, {XMMREG,XMMREG,RM_XMM|BITS16,IMM_NORMAL|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+23303, 645, 7568}, + /* 7393 : VMINMAXSS xmmreg|mask|z,xmmreg,xmmrm32|sae,imm8 [rvmi:t1s: evex.lig.66.0f3a.w0 53 /r ib ] AVX10_2,FUTURE */ + /* 241(f3 7d 08) 306 001(53) 120 023 : LIG,EVEX,PROT,AVX10_2,FUTURE */ + {I_VMINMAXSS, 4, {XMMREG,XMMREG,RM_XMM|BITS32,IMM_NORMAL|BITS8,0}, {MASK|Z,0,SAE,0,0}, nasm_bytecodes+23313, 645, 7569}, + /* 7394 : VCVTBF162IBS xmmreg|mask|z,xmmrm128|b16 [rm:fv: evex.128.f2.map5.w0 69 /r ] AVX10_2,FUTURE */ + /* 250(f5 7f 08) 301 001(69) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTBF162IBS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+50548, 644, 7572}, + /* 7395 : VCVTBF162IBS ymmreg|mask|z,ymmrm256|b16 [rm:fv: evex.256.f2.map5.w0 69 /r ] AVX10_2,FUTURE */ + /* 250(f5 7f 28) 301 001(69) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTBF162IBS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+50557, 644, 7573}, + /* 7396 : VCVTBF162IBS zmmreg|mask|z,zmmrm512|b16 [rm:fv: evex.512.f2.map5.w0 69 /r ] AVX10_2,FUTURE */ + /* 250(f5 7f 48) 301 001(69) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTBF162IBS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+50566, 644, 7574}, + /* 7397 : VCVTBF162IUBS xmmreg|mask|z,xmmrm128|b16 [rm:fv: evex.128.f2.map5.w0 6b /r ] AVX10_2,FUTURE */ + /* 250(f5 7f 08) 301 001(6b) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTBF162IUBS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+50575, 644, 7575}, + /* 7398 : VCVTBF162IUBS ymmreg|mask|z,ymmrm256|b16 [rm:fv: evex.256.f2.map5.w0 6b /r ] AVX10_2,FUTURE */ + /* 250(f5 7f 28) 301 001(6b) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTBF162IUBS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+50584, 644, 7576}, + /* 7399 : VCVTBF162IUBS zmmreg|mask|z,zmmrm512|b16 [rm:fv: evex.512.f2.map5.w0 6b /r ] AVX10_2,FUTURE */ + /* 250(f5 7f 48) 301 001(6b) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTBF162IUBS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+50593, 644, 7577}, + /* 7400 : VCVTTBF162IBS xmmreg|mask|z,xmmrm128|b16 [rm:fv: evex.128.f2.map5.w0 68 /r ] AVX10_2,FUTURE */ + /* 250(f5 7f 08) 301 001(68) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTBF162IBS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+50602, 644, 7578}, + /* 7401 : VCVTTBF162IBS ymmreg|mask|z,ymmrm256|b16 [rm:fv: evex.256.f2.map5.w0 68 /r ] AVX10_2,FUTURE */ + /* 250(f5 7f 28) 301 001(68) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTBF162IBS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+50611, 644, 7579}, + /* 7402 : VCVTTBF162IBS zmmreg|mask|z,zmmrm512|b16 [rm:fv: evex.512.f2.map5.w0 68 /r ] AVX10_2,FUTURE */ + /* 250(f5 7f 48) 301 001(68) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTBF162IBS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+50620, 644, 7580}, + /* 7403 : VCVTTBF162IUBS xmmreg|mask|z,xmmrm128|b16 [rm:fv: evex.128.f2.map5.w0 6a /r ] AVX10_2,FUTURE */ + /* 250(f5 7f 08) 301 001(6a) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTBF162IUBS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+50629, 644, 7581}, + /* 7404 : VCVTTBF162IUBS ymmreg|mask|z,ymmrm256|b16 [rm:fv: evex.256.f2.map5.w0 6a /r ] AVX10_2,FUTURE */ + /* 250(f5 7f 28) 301 001(6a) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTBF162IUBS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+50638, 644, 7582}, + /* 7405 : VCVTTBF162IUBS zmmreg|mask|z,zmmrm512|b16 [rm:fv: evex.512.f2.map5.w0 6a /r ] AVX10_2,FUTURE */ + /* 250(f5 7f 48) 301 001(6a) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTBF162IUBS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+50647, 644, 7583}, + /* 7406 : VCVTTPD2DQS xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.np.map5.w1 6d /r ] AVX10_2,FUTURE */ + /* 250(f5 fc 08) 301 001(6d) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTPD2DQS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+50656, 644, 7584}, + /* 7407 : VCVTTPD2DQS xmmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.np.map5.w1 6d /r ] AVX10_2,FUTURE */ + /* 250(f5 fc 28) 301 001(6d) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTPD2DQS, 2, {XMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+50665, 644, 7585}, + /* 7408 : VCVTTPD2DQS ymmreg|mask|z,zmmrm512|b64|sae [rm:fv: evex.512.np.map5.w1 6d /r ] AVX10_2,FUTURE */ + /* 250(f5 fc 48) 301 001(6d) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTPD2DQS, 2, {YMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+50674, 644, 7586}, + /* 7409 : VCVTTPD2QQS xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.66.map5.w1 6d /r ] AVX10_2,FUTURE */ + /* 250(f5 fd 08) 301 001(6d) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTPD2QQS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+50683, 644, 7587}, + /* 7410 : VCVTTPD2QQS ymmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.66.map5.w1 6d /r ] AVX10_2,FUTURE */ + /* 250(f5 fd 28) 301 001(6d) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTPD2QQS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+50692, 644, 7588}, + /* 7411 : VCVTTPD2QQS zmmreg|mask|z,zmmrm512|b64|sae [rm:fv: evex.512.66.map5.w1 6d /r ] AVX10_2,FUTURE */ + /* 250(f5 fd 48) 301 001(6d) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTPD2QQS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+50701, 644, 7589}, + /* 7412 : VCVTTPD2UDQS xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.np.map5.w1 6c /r ] AVX10_2,FUTURE */ + /* 250(f5 fc 08) 301 001(6c) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTPD2UDQS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+50710, 644, 7590}, + /* 7413 : VCVTTPD2UDQS xmmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.np.map5.w1 6c /r ] AVX10_2,FUTURE */ + /* 250(f5 fc 28) 301 001(6c) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTPD2UDQS, 2, {XMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+50719, 644, 7591}, + /* 7414 : VCVTTPD2UDQS ymmreg|mask|z,zmmrm512|b64|sae [rm:fv: evex.512.np.map5.w1 6c /r ] AVX10_2,FUTURE */ + /* 250(f5 fc 48) 301 001(6c) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTPD2UDQS, 2, {YMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+50728, 644, 7592}, + /* 7415 : VCVTTPD2UQQS xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.66.map5.w1 6c /r ] AVX10_2,FUTURE */ + /* 250(f5 fd 08) 301 001(6c) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTPD2UQQS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+50737, 644, 7593}, + /* 7416 : VCVTTPD2UQQS ymmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.66.map5.w1 6c /r ] AVX10_2,FUTURE */ + /* 250(f5 fd 28) 301 001(6c) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTPD2UQQS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B64,0,0,0}, nasm_bytecodes+50746, 644, 7594}, + /* 7417 : VCVTTPD2UQQS zmmreg|mask|z,zmmrm512|b64|sae [rm:fv: evex.512.66.map5.w1 6c /r ] AVX10_2,FUTURE */ + /* 250(f5 fd 48) 301 001(6c) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTPD2UQQS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B64|SAE,0,0,0}, nasm_bytecodes+50755, 644, 7595}, + /* 7418 : VCVTPH2IBS xmmreg|mask|z,xmmrm128|b16 [rm:fv: evex.128.np.map5.w0 69 /r ] AVX10_2,FUTURE */ + /* 250(f5 7c 08) 301 001(69) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTPH2IBS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+50764, 644, 7596}, + /* 7419 : VCVTPH2IBS ymmreg|mask|z,ymmrm256|b16 [rm:fv: evex.256.np.map5.w0 69 /r ] AVX10_2,FUTURE */ + /* 250(f5 7c 28) 301 001(69) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTPH2IBS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+50773, 644, 7597}, + /* 7420 : VCVTPH2IBS zmmreg|mask|z,zmmrm512|b16|er [rm:fv: evex.512.np.map5.w0 69 /r ] AVX10_2,FUTURE */ + /* 250(f5 7c 48) 301 001(69) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTPH2IBS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+50782, 644, 7598}, + /* 7421 : VCVTPH2IUBS xmmreg|mask|z,xmmrm128|b16 [rm:fv: evex.128.np.map5.w0 6b /r ] AVX10_2,FUTURE */ + /* 250(f5 7c 08) 301 001(6b) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTPH2IUBS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+50791, 644, 7599}, + /* 7422 : VCVTPH2IUBS ymmreg|mask|z,ymmrm256|b16 [rm:fv: evex.256.np.map5.w0 6b /r ] AVX10_2,FUTURE */ + /* 250(f5 7c 28) 301 001(6b) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTPH2IUBS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+50800, 644, 7600}, + /* 7423 : VCVTPH2IUBS zmmreg|mask|z,zmmrm512|b16|er [rm:fv: evex.512.np.map5.w0 6b /r ] AVX10_2,FUTURE */ + /* 250(f5 7c 48) 301 001(6b) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTPH2IUBS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|ER,0,0,0}, nasm_bytecodes+50809, 644, 7601}, + /* 7424 : VCVTTPH2IBS xmmreg|mask|z,xmmrm128|b16 [rm:fv: evex.128.np.map5.w0 68 /r ] AVX10_2,FUTURE */ + /* 250(f5 7c 08) 301 001(68) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTPH2IBS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+50818, 644, 7602}, + /* 7425 : VCVTTPH2IBS ymmreg|mask|z,ymmrm256|b16 [rm:fv: evex.256.np.map5.w0 68 /r ] AVX10_2,FUTURE */ + /* 250(f5 7c 28) 301 001(68) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTPH2IBS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+50827, 644, 7603}, + /* 7426 : VCVTTPH2IBS zmmreg|mask|z,zmmrm512|b16|sae [rm:fv: evex.512.np.map5.w0 68 /r ] AVX10_2,FUTURE */ + /* 250(f5 7c 48) 301 001(68) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTPH2IBS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+50836, 644, 7604}, + /* 7427 : VCVTTPH2IUBS xmmreg|mask|z,xmmrm128|b16 [rm:fv: evex.128.np.map5.w0 6a /r ] AVX10_2,FUTURE */ + /* 250(f5 7c 08) 301 001(6a) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTPH2IUBS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+50845, 644, 7605}, + /* 7428 : VCVTTPH2IUBS ymmreg|mask|z,ymmrm256|b16 [rm:fv: evex.256.np.map5.w0 6a /r ] AVX10_2,FUTURE */ + /* 250(f5 7c 28) 301 001(6a) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTPH2IUBS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B16,0,0,0}, nasm_bytecodes+50854, 644, 7606}, + /* 7429 : VCVTTPH2IUBS zmmreg|mask|z,zmmrm512|b16|sae [rm:fv: evex.512.np.map5.w0 6a /r ] AVX10_2,FUTURE */ + /* 250(f5 7c 48) 301 001(6a) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTPH2IUBS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B16|SAE,0,0,0}, nasm_bytecodes+50863, 644, 7607}, + /* 7430 : VCVTTPS2DQS xmmreg|mask|z,xmmrm128|b32 [rm:fv: evex.128.np.map5.w0 6d /r ] AVX10_2,FUTURE */ + /* 250(f5 7c 08) 301 001(6d) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTPS2DQS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+50872, 644, 7608}, + /* 7431 : VCVTTPS2DQS ymmreg|mask|z,ymmrm256|b32 [rm:fv: evex.256.np.map5.w0 6d /r ] AVX10_2,FUTURE */ + /* 250(f5 7c 28) 301 001(6d) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTPS2DQS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+50881, 644, 7609}, + /* 7432 : VCVTTPS2DQS zmmreg|mask|z,zmmrm512|b32|sae [rm:fv: evex.512.np.map5.w0 6d /r ] AVX10_2,FUTURE */ + /* 250(f5 7c 48) 301 001(6d) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTPS2DQS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+50890, 644, 7610}, + /* 7433 : VCVTPS2IBS xmmreg|mask|z,xmmrm128|b32 [rm:fv: evex.128.66.map5.w0 69 /r ] AVX10_2,FUTURE */ + /* 250(f5 7d 08) 301 001(69) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTPS2IBS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+50899, 644, 7611}, + /* 7434 : VCVTPS2IBS ymmreg|mask|z,ymmrm256|b32 [rm:fv: evex.256.66.map5.w0 69 /r ] AVX10_2,FUTURE */ + /* 250(f5 7d 28) 301 001(69) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTPS2IBS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+50908, 644, 7612}, + /* 7435 : VCVTPS2IBS zmmreg|mask|z,zmmrm512|b32|er [rm:fv: evex.512.66.map5.w0 69 /r ] AVX10_2,FUTURE */ + /* 250(f5 7d 48) 301 001(69) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTPS2IBS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+50917, 644, 7613}, + /* 7436 : VCVTPS2IUBS xmmreg|mask|z,xmmrm128|b32 [rm:fv: evex.128.66.map5.w0 6b /r ] AVX10_2,FUTURE */ + /* 250(f5 7d 08) 301 001(6b) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTPS2IUBS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+50926, 644, 7614}, + /* 7437 : VCVTPS2IUBS ymmreg|mask|z,ymmrm256|b32 [rm:fv: evex.256.66.map5.w0 6b /r ] AVX10_2,FUTURE */ + /* 250(f5 7d 28) 301 001(6b) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTPS2IUBS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+50935, 644, 7615}, + /* 7438 : VCVTPS2IUBS zmmreg|mask|z,zmmrm512|b32|er [rm:fv: evex.512.66.map5.w0 6b /r ] AVX10_2,FUTURE */ + /* 250(f5 7d 48) 301 001(6b) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTPS2IUBS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|ER,0,0,0}, nasm_bytecodes+50944, 644, 7616}, + /* 7439 : VCVTTPS2IBS xmmreg|mask|z,xmmrm128|b32 [rm:fv: evex.128.66.map5.w0 68 /r ] AVX10_2,FUTURE */ + /* 250(f5 7d 08) 301 001(68) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTPS2IBS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+50953, 644, 7617}, + /* 7440 : VCVTTPS2IBS ymmreg|mask|z,ymmrm256|b32 [rm:fv: evex.256.66.map5.w0 68 /r ] AVX10_2,FUTURE */ + /* 250(f5 7d 28) 301 001(68) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTPS2IBS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+50962, 644, 7618}, + /* 7441 : VCVTTPS2IBS zmmreg|mask|z,zmmrm512|b32|sae [rm:fv: evex.512.66.map5.w0 68 /r ] AVX10_2,FUTURE */ + /* 250(f5 7d 48) 301 001(68) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTPS2IBS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+50971, 644, 7619}, + /* 7442 : VCVTTPS2IUBS xmmreg|mask|z,xmmrm128|b32 [rm:fv: evex.128.66.map5.w0 6a /r ] AVX10_2,FUTURE */ + /* 250(f5 7d 08) 301 001(6a) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTPS2IUBS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+50980, 644, 7620}, + /* 7443 : VCVTTPS2IUBS ymmreg|mask|z,ymmrm256|b32 [rm:fv: evex.256.66.map5.w0 6a /r ] AVX10_2,FUTURE */ + /* 250(f5 7d 28) 301 001(6a) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTPS2IUBS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+50989, 644, 7621}, + /* 7444 : VCVTTPS2IUBS zmmreg|mask|z,zmmrm512|b32|sae [rm:fv: evex.512.66.map5.w0 6a /r ] AVX10_2,FUTURE */ + /* 250(f5 7d 48) 301 001(6a) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTPS2IUBS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+50998, 644, 7622}, + /* 7445 : VCVTTPS2QQS xmmreg|mask|z,xmmrm64|b32 [rm:hv: evex.128.66.map5.w0 6d /r ] AVX10_2,FUTURE */ + /* 250(f5 7d 08) 302 001(6d) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTPS2QQS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+51007, 644, 7623}, + /* 7446 : VCVTTPS2QQS ymmreg|mask|z,xmmrm128|b32 [rm:hv: evex.256.66.map5.w0 6d /r ] AVX10_2,FUTURE */ + /* 250(f5 7d 28) 302 001(6d) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTPS2QQS, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+51016, 644, 7624}, + /* 7447 : VCVTTPS2QQS zmmreg|mask|z,ymmrm256|b32|sae [rm:hv: evex.512.66.map5.w0 6d /r ] AVX10_2,FUTURE */ + /* 250(f5 7d 48) 302 001(6d) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTPS2QQS, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+51025, 644, 7625}, + /* 7448 : VCVTTPS2UDQS xmmreg|mask|z,xmmrm128|b32 [rm:fv: evex.128.np.map5.w0 6c /r ] AVX10_2,FUTURE */ + /* 250(f5 7c 08) 301 001(6c) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTPS2UDQS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+51034, 644, 7626}, + /* 7449 : VCVTTPS2UDQS ymmreg|mask|z,ymmrm256|b32 [rm:fv: evex.256.np.map5.w0 6c /r ] AVX10_2,FUTURE */ + /* 250(f5 7c 28) 301 001(6c) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTPS2UDQS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+51043, 644, 7627}, + /* 7450 : VCVTTPS2UDQS zmmreg|mask|z,zmmrm512|b32|sae [rm:fv: evex.512.np.map5.w0 6c /r ] AVX10_2,FUTURE */ + /* 250(f5 7c 48) 301 001(6c) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTPS2UDQS, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+51052, 644, 7628}, + /* 7451 : VCVTTPS2UQQS xmmreg|mask|z,xmmrm64|b32 [rm:hv: evex.128.66.map5.w0 6c /r ] AVX10_2,FUTURE */ + /* 250(f5 7d 08) 302 001(6c) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTPS2UQQS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+51061, 644, 7629}, + /* 7452 : VCVTTPS2UQQS ymmreg|mask|z,xmmrm128|b32 [rm:hv: evex.256.66.map5.w0 6c /r ] AVX10_2,FUTURE */ + /* 250(f5 7d 28) 302 001(6c) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTPS2UQQS, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,B32,0,0,0}, nasm_bytecodes+51070, 644, 7630}, + /* 7453 : VCVTTPS2UQQS zmmreg|mask|z,ymmrm256|b32|sae [rm:hv: evex.512.66.map5.w0 6c /r ] AVX10_2,FUTURE */ + /* 250(f5 7d 48) 302 001(6c) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTPS2UQQS, 2, {ZMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,B32|SAE,0,0,0}, nasm_bytecodes+51079, 644, 7631}, + /* 7454 : VCVTTSD2SIS reg32,xmmrm64|sae [rm:t1s: evex.lig.f2.map5.w0 6d /r ] AVX10_2,FUTURE */ + /* 250(f5 7f 08) 306 001(6d) 110 : LIG,EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTSD2SIS, 2, {REG_GPR|BITS32,RM_XMM|BITS64,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+51088, 645, 7632}, + /* 7455 : VCVTTSD2SIS reg64,xmmrm64|sae [rm:t1s: evex.lig.f2.map5.w1 6d /r ] LONG,PROT,AVX10_2,X86_64 */ + /* 250(f5 ff 08) 306 001(6d) 110 : LIG,LONG,EVEX,PROT,AVX10_2,X86_64 */ + {I_VCVTTSD2SIS, 2, {REG_GPR|BITS64,RM_XMM|BITS64,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+51097, 647, 7633}, + /* 7456 : VCVTTSD2USIS reg32,xmmrm64|sae [rm:t1s: evex.lig.f2.map5.w0 6c /r ] AVX10_2,FUTURE */ + /* 250(f5 7f 08) 306 001(6c) 110 : LIG,EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTSD2USIS, 2, {REG_GPR|BITS32,RM_XMM|BITS64,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+51106, 645, 7634}, + /* 7457 : VCVTTSD2USIS reg64,xmmrm64|sae [rm:t1s: evex.lig.f2.map5.w1 6c /r ] LONG,PROT,AVX10_2,X86_64 */ + /* 250(f5 ff 08) 306 001(6c) 110 : LIG,LONG,EVEX,PROT,AVX10_2,X86_64 */ + {I_VCVTTSD2USIS, 2, {REG_GPR|BITS64,RM_XMM|BITS64,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+51115, 647, 7635}, + /* 7458 : VCVTTSS2SIS reg32,xmmrm32|sae [rm:t1s: evex.lig.f3.map5.w0 6d /r ] AVX10_2,FUTURE */ + /* 250(f5 7e 08) 306 001(6d) 110 : LIG,EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTSS2SIS, 2, {REG_GPR|BITS32,RM_XMM|BITS32,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+51124, 645, 7636}, + /* 7459 : VCVTTSS2SIS reg64,xmmrm32|sae [rm:t1s: evex.lig.f3.map5.w1 6d /r ] LONG,PROT,AVX10_2,X86_64 */ + /* 250(f5 fe 08) 306 001(6d) 110 : LIG,LONG,EVEX,PROT,AVX10_2,X86_64 */ + {I_VCVTTSS2SIS, 2, {REG_GPR|BITS64,RM_XMM|BITS32,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+51133, 647, 7637}, + /* 7460 : VCVTTSS2USIS reg32,xmmrm32|sae [rm:t1s: evex.lig.f3.map5.w0 6c /r ] AVX10_2,FUTURE */ + /* 250(f5 7e 08) 306 001(6c) 110 : LIG,EVEX,PROT,AVX10_2,FUTURE */ + {I_VCVTTSS2USIS, 2, {REG_GPR|BITS32,RM_XMM|BITS32,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+51142, 645, 7638}, + /* 7461 : VCVTTSS2USIS reg64,xmmrm32|sae [rm:t1s: evex.lig.f3.map5.w1 6c /r ] LONG,PROT,AVX10_2,X86_64 */ + /* 250(f5 fe 08) 306 001(6c) 110 : LIG,LONG,EVEX,PROT,AVX10_2,X86_64 */ + {I_VCVTTSS2USIS, 2, {REG_GPR|BITS64,RM_XMM|BITS32,0,0,0}, {0,SAE,0,0,0}, nasm_bytecodes+51151, 647, 7639}, + /* 7462 : VMOVD xmmreg,xmmrm32 [rm:t1s: evex.128.f3.0f.w0 7e /r ] AVX10_2,FUTURE */ + /* 250(f1 7e 08) 306 001(7e) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VMOVD, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, NO_DECORATOR, nasm_bytecodes+51160, 644, 7642}, + /* 7463 : VMOVD xmmrm32,xmmreg [mr:t1s: evex.128.66.0f.w0 d6 /r ] AVX10_2,FUTURE */ + /* 250(f1 7d 08) 306 001(d6) 101 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VMOVD, 2, {RM_XMM|BITS32,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+51169, 644, 7643}, + /* 7464 : VMOVW xmmreg,xmmrm16 [rm:t1s: evex.128.f3.map5.w0 6e /r ] AVX10_2,FUTURE */ + /* 250(f5 7e 08) 306 001(6e) 110 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VMOVW, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, NO_DECORATOR, nasm_bytecodes+51178, 644, 7644}, + /* 7465 : VMOVW xmmrm16,xmmreg [mr:t1s: evex.128.f3.map5.w0 7e /r ] AVX10_2,FUTURE */ + /* 250(f5 7e 08) 306 001(7e) 101 : EVEX,PROT,AVX10_2,FUTURE */ + {I_VMOVW, 2, {RM_XMM|BITS16,XMMREG,0,0,0}, NO_DECORATOR, nasm_bytecodes+51187, 644, 7645}, + /* 7466 : VBMACOR16X16X16 ymmreg,ymmreg,ymmrm256 [rvm:fv: evex.256.np.map6.w0 80 /r ] AVX512BMM,FUTURE */ + /* 241(f6 7c 28) 301 001(80) 120 : EVEX,PROT,AVX512BMM,FUTURE */ + {I_VBMACOR16X16X16, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+51196, 648, 7648}, + /* 7467 : VBMACOR16X16X16 zmmreg,zmmreg,zmmrm512 [rvm:fv: evex.512.np.map6.w0 80 /r ] AVX512BMM,FUTURE */ + /* 241(f6 7c 48) 301 001(80) 120 : EVEX,PROT,AVX512BMM,FUTURE */ + {I_VBMACOR16X16X16, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, NO_DECORATOR, nasm_bytecodes+51205, 648, 7649}, + /* 7468 : VBMACXOR16X16X16 ymmreg,ymmreg,ymmrm256 [rvm:fv: evex.256.np.map6.w1 80 /r ] AVX512BMM,FUTURE */ + /* 241(f6 fc 28) 301 001(80) 120 : EVEX,PROT,AVX512BMM,FUTURE */ + {I_VBMACXOR16X16X16, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, NO_DECORATOR, nasm_bytecodes+51214, 648, 7650}, + /* 7469 : VBMACXOR16X16X16 zmmreg,zmmreg,zmmrm512 [rvm:fv: evex.512.np.map6.w1 80 /r ] AVX512BMM,FUTURE */ + /* 241(f6 fc 48) 301 001(80) 120 : EVEX,PROT,AVX512BMM,FUTURE */ + {I_VBMACXOR16X16X16, 3, {ZMMREG,ZMMREG,RM_ZMM|BITS512,0,0}, NO_DECORATOR, nasm_bytecodes+51223, 648, 7651}, + /* 7470 : VBITREV xmmreg|mask|z,xmmrm128 [rm:fv: evex.128.np.map6.w0 81 /r ] AVX512BMM,FUTURE */ + /* 250(f6 7c 08) 301 001(81) 110 : EVEX,PROT,AVX512BMM,FUTURE */ + {I_VBITREV, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+51232, 648, 7652}, + /* 7471 : VBITREV ymmreg|mask|z,ymmrm256 [rm:fv: evex.256.np.map6.w0 81 /r ] AVX512BMM,FUTURE */ + /* 250(f6 7c 28) 301 001(81) 110 : EVEX,PROT,AVX512BMM,FUTURE */ + {I_VBITREV, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+51241, 648, 7653}, + /* 7472 : VBITREV zmmreg|mask|z,zmmrm512 [rm:fv: evex.512.np.map6.w0 81 /r ] AVX512BMM,FUTURE */ + /* 250(f6 7c 48) 301 001(81) 110 : EVEX,PROT,AVX512BMM,FUTURE */ + {I_VBITREV, 2, {ZMMREG,RM_ZMM|BITS512,0,0,0}, {MASK|Z,0,0,0,0}, nasm_bytecodes+51250, 648, 7654}, + /* 7473 : NOP imm,reg16,rm16 [irm: o16 0f ibn /r ] SM1-2,UNDOC,P6 */ + /* 320 355 300 121 : SM1,SM2,UNDOC,P6 */ + {I_NOP, 3, {IMM_NORMAL,REG_GPR|BITS16,RM_GPR|BITS16,0,0}, NO_DECORATOR, nasm_bytecodes+72569, 649, 7658}, + /* 7474 : NOP imm,reg32,rm32 [irm: o32 0f ibn /r ] SM1-2,UNDOC,P6 */ + /* 321 355 300 121 : SM1,SM2,UNDOC,P6 */ + {I_NOP, 3, {IMM_NORMAL,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, NO_DECORATOR, nasm_bytecodes+72574, 649, 7659}, + /* 7475 : NOP imm,reg64,rm64 [irm: o64 0f ibn /r ] SM1-2,LONG,PROT,UNDOC,X86_64 */ + /* 324 355 300 121 : SM1,SM2,LONG,PROT,UNDOC,X86_64 */ + {I_NOP, 3, {IMM_NORMAL,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, NO_DECORATOR, nasm_bytecodes+72579, 650, 7660}, +}; + +static const struct itemplate * const itbl_novex_map0_00[] = { + instrux + 39, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_01[] = { + instrux + 40, + instrux + 41, + instrux + 42, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_02[] = { + instrux + 43, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_03[] = { + instrux + 44, + instrux + 45, + instrux + 46, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_04[] = { + instrux + 47, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_05[] = { + instrux + 50, + instrux + 53, + instrux + 56, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_06[] = { + instrux + 1401, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_07[] = { + instrux + 1407, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_08[] = { + instrux + 88, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_09[] = { + instrux + 89, + instrux + 90, + instrux + 91, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_0a[] = { + instrux + 92, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_0b[] = { + instrux + 93, + instrux + 94, + instrux + 95, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_0c[] = { + instrux + 96, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_0d[] = { + instrux + 99, + instrux + 102, + instrux + 105, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_0e[] = { + instrux + 1402, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_10[] = { + instrux + 137, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_11[] = { + instrux + 138, + instrux + 139, + instrux + 140, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_12[] = { + instrux + 141, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_13[] = { + instrux + 142, + instrux + 143, + instrux + 144, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_14[] = { + instrux + 145, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_15[] = { + instrux + 148, + instrux + 151, + instrux + 154, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_16[] = { + instrux + 1403, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_17[] = { + instrux + 1408, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_18[] = { + instrux + 186, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_19[] = { + instrux + 187, + instrux + 188, + instrux + 189, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_1a[] = { + instrux + 190, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_1b[] = { + instrux + 191, + instrux + 192, + instrux + 193, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_1c[] = { + instrux + 194, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_1d[] = { + instrux + 197, + instrux + 200, + instrux + 203, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_1e[] = { + instrux + 1404, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_1f[] = { + instrux + 1409, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_20[] = { + instrux + 235, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_21[] = { + instrux + 236, + instrux + 237, + instrux + 238, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_22[] = { + instrux + 239, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_23[] = { + instrux + 240, + instrux + 241, + instrux + 242, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_24[] = { + instrux + 243, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_25[] = { + instrux + 246, + instrux + 249, + instrux + 252, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_27[] = { + instrux + 974, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_28[] = { + instrux + 284, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_29[] = { + instrux + 285, + instrux + 286, + instrux + 287, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_2a[] = { + instrux + 288, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_2b[] = { + instrux + 289, + instrux + 290, + instrux + 291, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_2c[] = { + instrux + 292, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_2d[] = { + instrux + 295, + instrux + 298, + instrux + 301, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_2f[] = { + instrux + 975, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_30[] = { + instrux + 333, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_31[] = { + instrux + 334, + instrux + 335, + instrux + 336, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_32[] = { + instrux + 337, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_33[] = { + instrux + 338, + instrux + 339, + instrux + 340, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_34[] = { + instrux + 341, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_35[] = { + instrux + 344, + instrux + 347, + instrux + 350, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_37[] = { + instrux + 968, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_38[] = { + instrux + 382, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_39[] = { + instrux + 383, + instrux + 384, + instrux + 385, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_3a[] = { + instrux + 386, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_3b[] = { + instrux + 387, + instrux + 388, + instrux + 389, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_3c[] = { + instrux + 390, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_3d[] = { + instrux + 393, + instrux + 396, + instrux + 399, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_3f[] = { + instrux + 973, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_40[] = { + instrux + 717, + instrux + 718, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_41[] = { + instrux + 717, + instrux + 718, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_42[] = { + instrux + 717, + instrux + 718, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_43[] = { + instrux + 717, + instrux + 718, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_44[] = { + instrux + 717, + instrux + 718, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_45[] = { + instrux + 717, + instrux + 718, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_46[] = { + instrux + 717, + instrux + 718, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_47[] = { + instrux + 717, + instrux + 718, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_48[] = { + instrux + 731, + instrux + 732, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_49[] = { + instrux + 731, + instrux + 732, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_4a[] = { + instrux + 731, + instrux + 732, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_4b[] = { + instrux + 731, + instrux + 732, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_4c[] = { + instrux + 731, + instrux + 732, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_4d[] = { + instrux + 731, + instrux + 732, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_4e[] = { + instrux + 731, + instrux + 732, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_4f[] = { + instrux + 731, + instrux + 732, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_50[] = { + instrux + 1737, + instrux + 1738, + instrux + 1739, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_51[] = { + instrux + 1737, + instrux + 1738, + instrux + 1739, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_52[] = { + instrux + 1737, + instrux + 1738, + instrux + 1739, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_53[] = { + instrux + 1737, + instrux + 1738, + instrux + 1739, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_54[] = { + instrux + 1737, + instrux + 1738, + instrux + 1739, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_55[] = { + instrux + 1737, + instrux + 1738, + instrux + 1739, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_56[] = { + instrux + 1737, + instrux + 1738, + instrux + 1739, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_57[] = { + instrux + 1737, + instrux + 1738, + instrux + 1739, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_58[] = { + instrux + 1749, + instrux + 1750, + instrux + 1751, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_59[] = { + instrux + 1749, + instrux + 1750, + instrux + 1751, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_5a[] = { + instrux + 1749, + instrux + 1750, + instrux + 1751, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_5b[] = { + instrux + 1749, + instrux + 1750, + instrux + 1751, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_5c[] = { + instrux + 1749, + instrux + 1750, + instrux + 1751, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_5d[] = { + instrux + 1749, + instrux + 1750, + instrux + 1751, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_5e[] = { + instrux + 1749, + instrux + 1750, + instrux + 1751, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_5f[] = { + instrux + 1749, + instrux + 1750, + instrux + 1751, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_60[] = { + instrux + 1755, + instrux + 1756, + instrux + 1757, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_61[] = { + instrux + 1758, + instrux + 1759, + instrux + 1760, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_62[] = { + instrux + 1769, + instrux + 1770, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_63[] = { + instrux + 1002, + instrux + 1003, + instrux + 1004, + instrux + 1420, + instrux + 1421, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_68[] = { + instrux + 1746, + instrux + 1747, + instrux + 1748, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_69[] = { + instrux + 759, + instrux + 760, + instrux + 761, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_6a[] = { + instrux + 1743, + instrux + 1744, + instrux + 1745, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_6b[] = { + instrux + 756, + instrux + 757, + instrux + 758, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_6c[] = { + instrux + 1280, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_6d[] = { + instrux + 1281, + instrux + 1282, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_6e[] = { + instrux + 1283, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_6f[] = { + instrux + 1284, + instrux + 1285, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_70[] = { + instrux + 1057, + instrux + 1073, + instrux + 1089, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_71[] = { + instrux + 1054, + instrux + 1070, + instrux + 1086, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_72[] = { + instrux + 1047, + instrux + 1063, + instrux + 1079, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_73[] = { + instrux + 1051, + instrux + 1067, + instrux + 1083, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_74[] = { + instrux + 1061, + instrux + 1077, + instrux + 1093, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_75[] = { + instrux + 1056, + instrux + 1072, + instrux + 1088, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_76[] = { + instrux + 1050, + instrux + 1066, + instrux + 1082, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_77[] = { + instrux + 1046, + instrux + 1062, + instrux + 1078, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_78[] = { + instrux + 1060, + instrux + 1076, + instrux + 1092, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_79[] = { + instrux + 1055, + instrux + 1071, + instrux + 1087, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_7a[] = { + instrux + 1058, + instrux + 1074, + instrux + 1090, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_7b[] = { + instrux + 1059, + instrux + 1075, + instrux + 1091, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_7c[] = { + instrux + 1049, + instrux + 1065, + instrux + 1081, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_7d[] = { + instrux + 1053, + instrux + 1069, + instrux + 1085, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_7e[] = { + instrux + 1052, + instrux + 1068, + instrux + 1084, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_7f[] = { + instrux + 1048, + instrux + 1064, + instrux + 1080, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_80[] = { + instrux + 48, + instrux + 97, + instrux + 146, + instrux + 195, + instrux + 244, + instrux + 293, + instrux + 342, + instrux + 391, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_81[] = { + instrux + 51, + instrux + 54, + instrux + 57, + instrux + 100, + instrux + 103, + instrux + 106, + instrux + 149, + instrux + 152, + instrux + 155, + instrux + 198, + instrux + 201, + instrux + 204, + instrux + 247, + instrux + 250, + instrux + 253, + instrux + 296, + instrux + 299, + instrux + 302, + instrux + 345, + instrux + 348, + instrux + 351, + instrux + 394, + instrux + 397, + instrux + 400, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_83[] = { + instrux + 49, + instrux + 52, + instrux + 55, + instrux + 98, + instrux + 101, + instrux + 104, + instrux + 147, + instrux + 150, + instrux + 153, + instrux + 196, + instrux + 199, + instrux + 202, + instrux + 245, + instrux + 248, + instrux + 251, + instrux + 294, + instrux + 297, + instrux + 300, + instrux + 343, + instrux + 346, + instrux + 349, + instrux + 392, + instrux + 395, + instrux + 398, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_84[] = { + instrux + 401, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_85[] = { + instrux + 402, + instrux + 403, + instrux + 404, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_86[] = { + instrux + 1024, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_87[] = { + instrux + 1025, + instrux + 1026, + instrux + 1027, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_88[] = { + instrux + 12, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_89[] = { + instrux + 13, + instrux + 14, + instrux + 15, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_8a[] = { + instrux + 16, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_8b[] = { + instrux + 17, + instrux + 18, + instrux + 19, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_8c[] = { + instrux + 1380, + instrux + 1381, + instrux + 1382, + instrux + 1383, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_8d[] = { + instrux + 36, + instrux + 37, + instrux + 38, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_8e[] = { + instrux + 1384, + instrux + 1385, + instrux + 1386, + instrux + 1387, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_8f[] = { + instrux + 1752, + instrux + 1753, + instrux + 1754, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_90[] = { + instrux + 0, + instrux + 1021, + instrux + 1022, + instrux + 1023, + instrux + 1352, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_91[] = { + instrux + 1021, + instrux + 1022, + instrux + 1023, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_92[] = { + instrux + 1021, + instrux + 1022, + instrux + 1023, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_93[] = { + instrux + 1021, + instrux + 1022, + instrux + 1023, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_94[] = { + instrux + 1021, + instrux + 1022, + instrux + 1023, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_95[] = { + instrux + 1021, + instrux + 1022, + instrux + 1023, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_96[] = { + instrux + 1021, + instrux + 1022, + instrux + 1023, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_97[] = { + instrux + 1021, + instrux + 1022, + instrux + 1023, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_98[] = { + instrux + 990, + instrux + 992, + instrux + 995, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_99[] = { + instrux + 991, + instrux + 993, + instrux + 994, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_9a[] = { + instrux + 1202, + instrux + 1203, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_9c[] = { + instrux + 1252, + instrux + 1253, + instrux + 1254, + instrux + 1255, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_9d[] = { + instrux + 1256, + instrux + 1257, + instrux + 1258, + instrux + 1259, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_9e[] = { + instrux + 1250, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_9f[] = { + instrux + 1249, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_a0[] = { + instrux + 4, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_a1[] = { + instrux + 5, + instrux + 6, + instrux + 7, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_a2[] = { + instrux + 8, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_a3[] = { + instrux + 9, + instrux + 10, + instrux + 11, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_a4[] = { + instrux + 1268, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_a5[] = { + instrux + 1269, + instrux + 1270, + instrux + 1271, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_a6[] = { + instrux + 1260, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_a7[] = { + instrux + 1261, + instrux + 1262, + instrux + 1263, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_a8[] = { + instrux + 405, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_a9[] = { + instrux + 406, + instrux + 407, + instrux + 408, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_aa[] = { + instrux + 1272, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_ab[] = { + instrux + 1273, + instrux + 1274, + instrux + 1275, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_ac[] = { + instrux + 1264, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_ad[] = { + instrux + 1265, + instrux + 1266, + instrux + 1267, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_ae[] = { + instrux + 1276, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_af[] = { + instrux + 1277, + instrux + 1278, + instrux + 1279, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_b0[] = { + instrux + 20, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_b1[] = { + instrux + 20, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_b2[] = { + instrux + 20, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_b3[] = { + instrux + 20, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_b4[] = { + instrux + 20, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_b5[] = { + instrux + 20, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_b6[] = { + instrux + 20, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_b7[] = { + instrux + 20, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_b8[] = { + instrux + 21, + instrux + 22, + instrux + 23, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_b9[] = { + instrux + 21, + instrux + 22, + instrux + 23, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_ba[] = { + instrux + 21, + instrux + 22, + instrux + 23, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_bb[] = { + instrux + 21, + instrux + 22, + instrux + 23, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_bc[] = { + instrux + 21, + instrux + 22, + instrux + 23, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_bd[] = { + instrux + 21, + instrux + 22, + instrux + 23, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_be[] = { + instrux + 21, + instrux + 22, + instrux + 23, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_bf[] = { + instrux + 21, + instrux + 22, + instrux + 23, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_c0[] = { + instrux + 421, + instrux + 433, + instrux + 445, + instrux + 457, + instrux + 469, + instrux + 481, + instrux + 493, + instrux + 505, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_c1[] = { + instrux + 422, + instrux + 423, + instrux + 424, + instrux + 434, + instrux + 435, + instrux + 436, + instrux + 446, + instrux + 447, + instrux + 448, + instrux + 458, + instrux + 459, + instrux + 460, + instrux + 470, + instrux + 471, + instrux + 472, + instrux + 482, + instrux + 483, + instrux + 484, + instrux + 494, + instrux + 495, + instrux + 496, + instrux + 506, + instrux + 507, + instrux + 508, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_c2[] = { + instrux + 1214, + instrux + 1215, + instrux + 1216, + instrux + 1217, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_c3[] = { + instrux + 1210, + instrux + 1211, + instrux + 1212, + instrux + 1213, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_c4[] = { + instrux + 1390, + instrux + 1391, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_c5[] = { + instrux + 1388, + instrux + 1389, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_c6[] = { + instrux + 24, + instrux + 4372, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_c7[] = { + instrux + 25, + instrux + 26, + instrux + 27, + instrux + 4373, + instrux + 4374, + instrux + 4375, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_c8[] = { + instrux + 1761, + instrux + 1762, + instrux + 1763, + instrux + 1764, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_c9[] = { + instrux + 1765, + instrux + 1766, + instrux + 1767, + instrux + 1768, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_ca[] = { + instrux + 1222, + instrux + 1223, + instrux + 1224, + instrux + 1225, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_cb[] = { + instrux + 1218, + instrux + 1219, + instrux + 1220, + instrux + 1221, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_cc[] = { + instrux + 1228, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_cd[] = { + instrux + 1226, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_ce[] = { + instrux + 1229, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_cf[] = { + instrux + 1234, + instrux + 1235, + instrux + 1236, + instrux + 1237, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_d0[] = { + instrux + 413, + instrux + 425, + instrux + 437, + instrux + 449, + instrux + 461, + instrux + 473, + instrux + 485, + instrux + 497, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_d1[] = { + instrux + 414, + instrux + 415, + instrux + 416, + instrux + 426, + instrux + 427, + instrux + 428, + instrux + 438, + instrux + 439, + instrux + 440, + instrux + 450, + instrux + 451, + instrux + 452, + instrux + 462, + instrux + 463, + instrux + 464, + instrux + 474, + instrux + 475, + instrux + 476, + instrux + 486, + instrux + 487, + instrux + 488, + instrux + 498, + instrux + 499, + instrux + 500, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_d2[] = { + instrux + 417, + instrux + 429, + instrux + 441, + instrux + 453, + instrux + 465, + instrux + 477, + instrux + 489, + instrux + 501, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_d3[] = { + instrux + 418, + instrux + 419, + instrux + 420, + instrux + 430, + instrux + 431, + instrux + 432, + instrux + 442, + instrux + 443, + instrux + 444, + instrux + 454, + instrux + 455, + instrux + 456, + instrux + 466, + instrux + 467, + instrux + 468, + instrux + 478, + instrux + 479, + instrux + 480, + instrux + 490, + instrux + 491, + instrux + 492, + instrux + 502, + instrux + 503, + instrux + 504, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_d4[] = { + instrux + 971, + instrux + 972, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_d5[] = { + instrux + 969, + instrux + 970, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_d6[] = { + instrux + 1251, + instrux + 1788, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_d7[] = { + instrux + 1791, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_d8[] = { + instrux + 1462, + instrux + 1465, + instrux + 1467, + instrux + 1492, + instrux + 1494, + instrux + 1495, + instrux + 1500, + instrux + 1502, + instrux + 1503, + instrux + 1508, + instrux + 1511, + instrux + 1513, + instrux + 1516, + instrux + 1520, + instrux + 1521, + instrux + 1572, + instrux + 1576, + instrux + 1577, + instrux + 1613, + instrux + 1617, + instrux + 1618, + instrux + 1621, + instrux + 1625, + instrux + 1626, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_d9[] = { + instrux + 1460, + instrux + 1461, + instrux + 1474, + instrux + 1505, + instrux + 1506, + instrux + 1545, + instrux + 1559, + instrux + 1562, + instrux + 1563, + instrux + 1564, + instrux + 1565, + instrux + 1566, + instrux + 1567, + instrux + 1568, + instrux + 1569, + instrux + 1570, + instrux + 1571, + instrux + 1584, + instrux + 1586, + instrux + 1587, + instrux + 1590, + instrux + 1591, + instrux + 1592, + instrux + 1593, + instrux + 1594, + instrux + 1597, + instrux + 1599, + instrux + 1600, + instrux + 1601, + instrux + 1602, + instrux + 1605, + instrux + 1606, + instrux + 1607, + instrux + 1629, + instrux + 1639, + instrux + 1640, + instrux + 1641, + instrux + 1642, + instrux + 1643, + instrux + 1644, + instrux + 1645, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_da[] = { + instrux + 1476, + instrux + 1477, + instrux + 1478, + instrux + 1479, + instrux + 1480, + instrux + 1481, + instrux + 1490, + instrux + 1491, + instrux + 1530, + instrux + 1532, + instrux + 1534, + instrux + 1536, + instrux + 1538, + instrux + 1543, + instrux + 1555, + instrux + 1557, + instrux + 1638, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_db[] = { + instrux + 1475, + instrux + 1482, + instrux + 1483, + instrux + 1484, + instrux + 1485, + instrux + 1486, + instrux + 1487, + instrux + 1488, + instrux + 1489, + instrux + 1496, + instrux + 1497, + instrux + 1507, + instrux + 1525, + instrux + 1540, + instrux + 1546, + instrux + 1547, + instrux + 1549, + instrux + 1553, + instrux + 1561, + instrux + 1580, + instrux + 1581, + instrux + 1582, + instrux + 1583, + instrux + 1598, + instrux + 1609, + instrux + 1632, + instrux + 1633, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_dc[] = { + instrux + 1463, + instrux + 1464, + instrux + 1466, + instrux + 1493, + instrux + 1501, + instrux + 1509, + instrux + 1510, + instrux + 1512, + instrux + 1517, + instrux + 1518, + instrux + 1519, + instrux + 1573, + instrux + 1574, + instrux + 1575, + instrux + 1614, + instrux + 1615, + instrux + 1616, + instrux + 1622, + instrux + 1623, + instrux + 1624, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_dd[] = { + instrux + 1526, + instrux + 1527, + instrux + 1554, + instrux + 1560, + instrux + 1585, + instrux + 1588, + instrux + 1595, + instrux + 1596, + instrux + 1603, + instrux + 1604, + instrux + 1608, + instrux + 1610, + instrux + 1611, + instrux + 1630, + instrux + 1631, + instrux + 1636, + instrux + 1637, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_de[] = { + instrux + 1468, + instrux + 1469, + instrux + 1504, + instrux + 1514, + instrux + 1515, + instrux + 1522, + instrux + 1523, + instrux + 1531, + instrux + 1533, + instrux + 1535, + instrux + 1537, + instrux + 1539, + instrux + 1544, + instrux + 1556, + instrux + 1558, + instrux + 1578, + instrux + 1579, + instrux + 1619, + instrux + 1620, + instrux + 1627, + instrux + 1628, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_df[] = { + instrux + 1470, + instrux + 1471, + instrux + 1472, + instrux + 1473, + instrux + 1498, + instrux + 1499, + instrux + 1528, + instrux + 1529, + instrux + 1541, + instrux + 1542, + instrux + 1548, + instrux + 1550, + instrux + 1551, + instrux + 1552, + instrux + 1589, + instrux + 1612, + instrux + 1634, + instrux + 1635, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_e0[] = { + instrux + 1154, + instrux + 1155, + instrux + 1156, + instrux + 1169, + instrux + 1170, + instrux + 1171, + instrux + 1172, + instrux + 1173, + instrux + 1174, + instrux + 1181, + instrux + 1182, + instrux + 1183, + instrux + 1184, + instrux + 1185, + instrux + 1186, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_e1[] = { + instrux + 1151, + instrux + 1152, + instrux + 1153, + instrux + 1163, + instrux + 1164, + instrux + 1165, + instrux + 1166, + instrux + 1167, + instrux + 1168, + instrux + 1175, + instrux + 1176, + instrux + 1177, + instrux + 1178, + instrux + 1179, + instrux + 1180, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_e2[] = { + instrux + 1148, + instrux + 1149, + instrux + 1150, + instrux + 1157, + instrux + 1158, + instrux + 1159, + instrux + 1160, + instrux + 1161, + instrux + 1162, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_e3[] = { + instrux + 1142, + instrux + 1143, + instrux + 1144, + instrux + 1145, + instrux + 1146, + instrux + 1147, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_e4[] = { + instrux + 1368, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_e5[] = { + instrux + 1369, + instrux + 1370, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_e6[] = { + instrux + 1374, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_e7[] = { + instrux + 1375, + instrux + 1376, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_e8[] = { + instrux + 1196, + instrux + 1197, + instrux + 1198, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_e9[] = { + instrux + 1032, + instrux + 1033, + instrux + 1034, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_ea[] = { + instrux + 1038, + instrux + 1039, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_eb[] = { + instrux + 1029, + instrux + 1030, + instrux + 1031, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_ec[] = { + instrux + 1371, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_ed[] = { + instrux + 1372, + instrux + 1373, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_ee[] = { + instrux + 1377, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_ef[] = { + instrux + 1378, + instrux + 1379, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_f1[] = { + instrux + 1227, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_f4[] = { + instrux + 1351, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_f5[] = { + instrux + 1248, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_f6[] = { + instrux + 409, + instrux + 745, + instrux + 774, + instrux + 786, + instrux + 794, + instrux + 802, + instrux + 814, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_f7[] = { + instrux + 410, + instrux + 411, + instrux + 412, + instrux + 746, + instrux + 747, + instrux + 748, + instrux + 775, + instrux + 776, + instrux + 777, + instrux + 787, + instrux + 788, + instrux + 789, + instrux + 795, + instrux + 796, + instrux + 797, + instrux + 803, + instrux + 804, + instrux + 805, + instrux + 815, + instrux + 816, + instrux + 817, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_f8[] = { + instrux + 1240, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_f9[] = { + instrux + 1244, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_fa[] = { + instrux + 1242, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_fb[] = { + instrux + 1246, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_fc[] = { + instrux + 1241, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_fd[] = { + instrux + 1245, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_fe[] = { + instrux + 719, + instrux + 733, + NULL +}; + +static const struct itemplate * const itbl_novex_map0_ff[] = { + instrux + 720, + instrux + 721, + instrux + 722, + instrux + 734, + instrux + 735, + instrux + 736, + instrux + 1035, + instrux + 1036, + instrux + 1037, + instrux + 1040, + instrux + 1041, + instrux + 1042, + instrux + 1043, + instrux + 1044, + instrux + 1045, + instrux + 1199, + instrux + 1200, + instrux + 1201, + instrux + 1204, + instrux + 1205, + instrux + 1206, + instrux + 1207, + instrux + 1208, + instrux + 1209, + instrux + 1740, + instrux + 1741, + instrux + 1742, + instrux + 1789, + NULL +}; + +static const struct itemplate * const * const itbl_novex_map0[256] = { + itbl_novex_map0_00, + itbl_novex_map0_01, + itbl_novex_map0_02, + itbl_novex_map0_03, + itbl_novex_map0_04, + itbl_novex_map0_05, + itbl_novex_map0_06, + itbl_novex_map0_07, + itbl_novex_map0_08, + itbl_novex_map0_09, + itbl_novex_map0_0a, + itbl_novex_map0_0b, + itbl_novex_map0_0c, + itbl_novex_map0_0d, + itbl_novex_map0_0e, + NULL, + itbl_novex_map0_10, + itbl_novex_map0_11, + itbl_novex_map0_12, + itbl_novex_map0_13, + itbl_novex_map0_14, + itbl_novex_map0_15, + itbl_novex_map0_16, + itbl_novex_map0_17, + itbl_novex_map0_18, + itbl_novex_map0_19, + itbl_novex_map0_1a, + itbl_novex_map0_1b, + itbl_novex_map0_1c, + itbl_novex_map0_1d, + itbl_novex_map0_1e, + itbl_novex_map0_1f, + itbl_novex_map0_20, + itbl_novex_map0_21, + itbl_novex_map0_22, + itbl_novex_map0_23, + itbl_novex_map0_24, + itbl_novex_map0_25, + NULL, + itbl_novex_map0_27, + itbl_novex_map0_28, + itbl_novex_map0_29, + itbl_novex_map0_2a, + itbl_novex_map0_2b, + itbl_novex_map0_2c, + itbl_novex_map0_2d, + NULL, + itbl_novex_map0_2f, + itbl_novex_map0_30, + itbl_novex_map0_31, + itbl_novex_map0_32, + itbl_novex_map0_33, + itbl_novex_map0_34, + itbl_novex_map0_35, + NULL, + itbl_novex_map0_37, + itbl_novex_map0_38, + itbl_novex_map0_39, + itbl_novex_map0_3a, + itbl_novex_map0_3b, + itbl_novex_map0_3c, + itbl_novex_map0_3d, + NULL, + itbl_novex_map0_3f, + itbl_novex_map0_40, + itbl_novex_map0_41, + itbl_novex_map0_42, + itbl_novex_map0_43, + itbl_novex_map0_44, + itbl_novex_map0_45, + itbl_novex_map0_46, + itbl_novex_map0_47, + itbl_novex_map0_48, + itbl_novex_map0_49, + itbl_novex_map0_4a, + itbl_novex_map0_4b, + itbl_novex_map0_4c, + itbl_novex_map0_4d, + itbl_novex_map0_4e, + itbl_novex_map0_4f, + itbl_novex_map0_50, + itbl_novex_map0_51, + itbl_novex_map0_52, + itbl_novex_map0_53, + itbl_novex_map0_54, + itbl_novex_map0_55, + itbl_novex_map0_56, + itbl_novex_map0_57, + itbl_novex_map0_58, + itbl_novex_map0_59, + itbl_novex_map0_5a, + itbl_novex_map0_5b, + itbl_novex_map0_5c, + itbl_novex_map0_5d, + itbl_novex_map0_5e, + itbl_novex_map0_5f, + itbl_novex_map0_60, + itbl_novex_map0_61, + itbl_novex_map0_62, + itbl_novex_map0_63, + NULL, + NULL, + NULL, + NULL, + itbl_novex_map0_68, + itbl_novex_map0_69, + itbl_novex_map0_6a, + itbl_novex_map0_6b, + itbl_novex_map0_6c, + itbl_novex_map0_6d, + itbl_novex_map0_6e, + itbl_novex_map0_6f, + itbl_novex_map0_70, + itbl_novex_map0_71, + itbl_novex_map0_72, + itbl_novex_map0_73, + itbl_novex_map0_74, + itbl_novex_map0_75, + itbl_novex_map0_76, + itbl_novex_map0_77, + itbl_novex_map0_78, + itbl_novex_map0_79, + itbl_novex_map0_7a, + itbl_novex_map0_7b, + itbl_novex_map0_7c, + itbl_novex_map0_7d, + itbl_novex_map0_7e, + itbl_novex_map0_7f, + itbl_novex_map0_80, + itbl_novex_map0_81, + NULL, + itbl_novex_map0_83, + itbl_novex_map0_84, + itbl_novex_map0_85, + itbl_novex_map0_86, + itbl_novex_map0_87, + itbl_novex_map0_88, + itbl_novex_map0_89, + itbl_novex_map0_8a, + itbl_novex_map0_8b, + itbl_novex_map0_8c, + itbl_novex_map0_8d, + itbl_novex_map0_8e, + itbl_novex_map0_8f, + itbl_novex_map0_90, + itbl_novex_map0_91, + itbl_novex_map0_92, + itbl_novex_map0_93, + itbl_novex_map0_94, + itbl_novex_map0_95, + itbl_novex_map0_96, + itbl_novex_map0_97, + itbl_novex_map0_98, + itbl_novex_map0_99, + itbl_novex_map0_9a, + NULL, + itbl_novex_map0_9c, + itbl_novex_map0_9d, + itbl_novex_map0_9e, + itbl_novex_map0_9f, + itbl_novex_map0_a0, + itbl_novex_map0_a1, + itbl_novex_map0_a2, + itbl_novex_map0_a3, + itbl_novex_map0_a4, + itbl_novex_map0_a5, + itbl_novex_map0_a6, + itbl_novex_map0_a7, + itbl_novex_map0_a8, + itbl_novex_map0_a9, + itbl_novex_map0_aa, + itbl_novex_map0_ab, + itbl_novex_map0_ac, + itbl_novex_map0_ad, + itbl_novex_map0_ae, + itbl_novex_map0_af, + itbl_novex_map0_b0, + itbl_novex_map0_b1, + itbl_novex_map0_b2, + itbl_novex_map0_b3, + itbl_novex_map0_b4, + itbl_novex_map0_b5, + itbl_novex_map0_b6, + itbl_novex_map0_b7, + itbl_novex_map0_b8, + itbl_novex_map0_b9, + itbl_novex_map0_ba, + itbl_novex_map0_bb, + itbl_novex_map0_bc, + itbl_novex_map0_bd, + itbl_novex_map0_be, + itbl_novex_map0_bf, + itbl_novex_map0_c0, + itbl_novex_map0_c1, + itbl_novex_map0_c2, + itbl_novex_map0_c3, + itbl_novex_map0_c4, + itbl_novex_map0_c5, + itbl_novex_map0_c6, + itbl_novex_map0_c7, + itbl_novex_map0_c8, + itbl_novex_map0_c9, + itbl_novex_map0_ca, + itbl_novex_map0_cb, + itbl_novex_map0_cc, + itbl_novex_map0_cd, + itbl_novex_map0_ce, + itbl_novex_map0_cf, + itbl_novex_map0_d0, + itbl_novex_map0_d1, + itbl_novex_map0_d2, + itbl_novex_map0_d3, + itbl_novex_map0_d4, + itbl_novex_map0_d5, + itbl_novex_map0_d6, + itbl_novex_map0_d7, + itbl_novex_map0_d8, + itbl_novex_map0_d9, + itbl_novex_map0_da, + itbl_novex_map0_db, + itbl_novex_map0_dc, + itbl_novex_map0_dd, + itbl_novex_map0_de, + itbl_novex_map0_df, + itbl_novex_map0_e0, + itbl_novex_map0_e1, + itbl_novex_map0_e2, + itbl_novex_map0_e3, + itbl_novex_map0_e4, + itbl_novex_map0_e5, + itbl_novex_map0_e6, + itbl_novex_map0_e7, + itbl_novex_map0_e8, + itbl_novex_map0_e9, + itbl_novex_map0_ea, + itbl_novex_map0_eb, + itbl_novex_map0_ec, + itbl_novex_map0_ed, + itbl_novex_map0_ee, + itbl_novex_map0_ef, + NULL, + itbl_novex_map0_f1, + NULL, + NULL, + itbl_novex_map0_f4, + itbl_novex_map0_f5, + itbl_novex_map0_f6, + itbl_novex_map0_f7, + itbl_novex_map0_f8, + itbl_novex_map0_f9, + itbl_novex_map0_fa, + itbl_novex_map0_fb, + itbl_novex_map0_fc, + itbl_novex_map0_fd, + itbl_novex_map0_fe, + itbl_novex_map0_ff, +}; + +static const struct itemplate * const itbl_novex_map1_00[] = { + instrux + 1190, + instrux + 1191, + instrux + 1192, + instrux + 1193, + instrux + 1194, + instrux + 1195, + instrux + 1428, + instrux + 1429, + instrux + 1431, + instrux + 1438, + instrux + 1439, + instrux + 1440, + instrux + 1441, + instrux + 1442, + instrux + 1443, + instrux + 1444, + instrux + 1445, + instrux + 1452, + instrux + 1453, + instrux + 1454, + instrux + 1455, + instrux + 1456, + instrux + 1457, + instrux + 1458, + instrux + 1459, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_01[] = { + instrux + 1238, + instrux + 1239, + instrux + 1243, + instrux + 1247, + instrux + 1289, + instrux + 1294, + instrux + 1295, + instrux + 1296, + instrux + 1303, + instrux + 1304, + instrux + 1305, + instrux + 1306, + instrux + 1309, + instrux + 1320, + instrux + 1321, + instrux + 1322, + instrux + 1323, + instrux + 1324, + instrux + 1337, + instrux + 1340, + instrux + 1341, + instrux + 1353, + instrux + 1354, + instrux + 1355, + instrux + 1356, + instrux + 1357, + instrux + 1358, + instrux + 1359, + instrux + 1360, + instrux + 1361, + instrux + 1362, + instrux + 1430, + instrux + 1432, + instrux + 1433, + instrux + 1434, + instrux + 1435, + instrux + 1436, + instrux + 1437, + instrux + 1446, + instrux + 1447, + instrux + 1448, + instrux + 1449, + instrux + 1450, + instrux + 1451, + instrux + 1778, + instrux + 2699, + instrux + 2700, + instrux + 2927, + instrux + 2928, + instrux + 2929, + instrux + 2931, + instrux + 2932, + instrux + 2933, + instrux + 2934, + instrux + 2939, + instrux + 2940, + instrux + 2941, + instrux + 2944, + instrux + 2952, + instrux + 2953, + instrux + 2954, + instrux + 2955, + instrux + 4376, + instrux + 4377, + instrux + 6704, + instrux + 6705, + instrux + 6717, + instrux + 6718, + instrux + 6825, + instrux + 6826, + instrux + 6827, + instrux + 6835, + instrux + 6836, + instrux + 6837, + instrux + 6854, + instrux + 6855, + instrux + 6856, + instrux + 7198, + instrux + 7200, + instrux + 7201, + instrux + 7202, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_02[] = { + instrux + 1422, + instrux + 1423, + instrux + 1424, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_03[] = { + instrux + 1425, + instrux + 1426, + instrux + 1427, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_05[] = { + instrux + 1230, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_06[] = { + instrux + 1318, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_07[] = { + instrux + 1233, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_08[] = { + instrux + 1297, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_09[] = { + instrux + 1298, + instrux + 1299, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_0b[] = { + instrux + 1787, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_0d[] = { + instrux + 1705, + instrux + 1706, + instrux + 4378, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_0e[] = { + instrux + 1524, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_0f[] = { + instrux + 1667, + instrux + 1675, + instrux + 1676, + instrux + 1677, + instrux + 1678, + instrux + 1679, + instrux + 1680, + instrux + 1681, + instrux + 1682, + instrux + 1683, + instrux + 1684, + instrux + 1685, + instrux + 1686, + instrux + 1687, + instrux + 1688, + instrux + 1689, + instrux + 1690, + instrux + 1691, + instrux + 1696, + instrux + 2736, + instrux + 2737, + instrux + 2738, + instrux + 2739, + instrux + 2740, + instrux + 3081, + instrux + 3082, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_10[] = { + instrux + 2674, + instrux + 2676, + instrux + 2901, + instrux + 2903, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_11[] = { + instrux + 2675, + instrux + 2677, + instrux + 2902, + instrux + 2904, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_12[] = { + instrux + 2668, + instrux + 2670, + instrux + 2898, + instrux + 2924, + instrux + 2926, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_13[] = { + instrux + 2669, + instrux + 2897, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_14[] = { + instrux + 2693, + instrux + 2915, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_15[] = { + instrux + 2692, + instrux + 2914, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_16[] = { + instrux + 2665, + instrux + 2667, + instrux + 2896, + instrux + 2925, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_17[] = { + instrux + 2666, + instrux + 2895, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_18[] = { + instrux + 2713, + instrux + 2714, + instrux + 2715, + instrux + 2716, + instrux + 2717, + instrux + 2718, + instrux + 6719, + instrux + 7473, + instrux + 7474, + instrux + 7475, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_19[] = { + instrux + 7473, + instrux + 7474, + instrux + 7475, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_1a[] = { + instrux + 4380, + instrux + 4381, + instrux + 4382, + instrux + 4383, + instrux + 4384, + instrux + 4385, + instrux + 4389, + instrux + 4390, + instrux + 4393, + instrux + 4394, + instrux + 4395, + instrux + 7473, + instrux + 7474, + instrux + 7475, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_1b[] = { + instrux + 4379, + instrux + 4386, + instrux + 4387, + instrux + 4388, + instrux + 4391, + instrux + 4392, + instrux + 4396, + instrux + 4397, + instrux + 4398, + instrux + 4399, + instrux + 4400, + instrux + 7473, + instrux + 7474, + instrux + 7475, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_1c[] = { + instrux + 6708, + instrux + 7473, + instrux + 7474, + instrux + 7475, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_1d[] = { + instrux + 7473, + instrux + 7474, + instrux + 7475, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_1e[] = { + instrux + 6829, + instrux + 6830, + instrux + 6833, + instrux + 6834, + instrux + 7473, + instrux + 7474, + instrux + 7475, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_1f[] = { + instrux + 1, + instrux + 2, + instrux + 3, + instrux + 7473, + instrux + 7474, + instrux + 7475, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_20[] = { + instrux + 1325, + instrux + 1327, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_21[] = { + instrux + 1329, + instrux + 1331, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_22[] = { + instrux + 1326, + instrux + 1328, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_23[] = { + instrux + 1330, + instrux + 1332, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_28[] = { + instrux + 2663, + instrux + 2893, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_29[] = { + instrux + 2664, + instrux + 2894, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_2a[] = { + instrux + 2647, + instrux + 2649, + instrux + 2650, + instrux + 2873, + instrux + 2879, + instrux + 2880, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_2b[] = { + instrux + 2673, + instrux + 2745, + instrux + 2992, + instrux + 2993, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_2c[] = { + instrux + 2653, + instrux + 2654, + instrux + 2655, + instrux + 2882, + instrux + 2885, + instrux + 2886, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_2d[] = { + instrux + 2648, + instrux + 2651, + instrux + 2652, + instrux + 2871, + instrux + 2876, + instrux + 2877, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_2e[] = { + instrux + 2691, + instrux + 2913, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_2f[] = { + instrux + 2646, + instrux + 2867, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_30[] = { + instrux + 1333, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_31[] = { + instrux + 1308, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_32[] = { + instrux + 1334, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_33[] = { + instrux + 1307, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_34[] = { + instrux + 1231, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_35[] = { + instrux + 1232, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_37[] = { + instrux + 3080, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_38[] = { + instrux + 1342, + instrux + 1346, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_40[] = { + instrux + 2235, + instrux + 2251, + instrux + 2267, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_41[] = { + instrux + 2232, + instrux + 2248, + instrux + 2264, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_42[] = { + instrux + 2225, + instrux + 2241, + instrux + 2257, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_43[] = { + instrux + 2229, + instrux + 2245, + instrux + 2261, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_44[] = { + instrux + 2239, + instrux + 2255, + instrux + 2271, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_45[] = { + instrux + 2234, + instrux + 2250, + instrux + 2266, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_46[] = { + instrux + 2228, + instrux + 2244, + instrux + 2260, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_47[] = { + instrux + 2224, + instrux + 2240, + instrux + 2256, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_48[] = { + instrux + 2238, + instrux + 2254, + instrux + 2270, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_49[] = { + instrux + 2233, + instrux + 2249, + instrux + 2265, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_4a[] = { + instrux + 2236, + instrux + 2252, + instrux + 2268, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_4b[] = { + instrux + 2237, + instrux + 2253, + instrux + 2269, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_4c[] = { + instrux + 2227, + instrux + 2243, + instrux + 2259, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_4d[] = { + instrux + 2231, + instrux + 2247, + instrux + 2263, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_4e[] = { + instrux + 2230, + instrux + 2246, + instrux + 2262, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_4f[] = { + instrux + 2226, + instrux + 2242, + instrux + 2258, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_50[] = { + instrux + 1666, + instrux + 2671, + instrux + 2672, + instrux + 2899, + instrux + 2900, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_51[] = { + instrux + 1659, + instrux + 2686, + instrux + 2687, + instrux + 2909, + instrux + 2910, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_52[] = { + instrux + 1694, + instrux + 2683, + instrux + 2684, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_53[] = { + instrux + 2681, + instrux + 2682, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_54[] = { + instrux + 1674, + instrux + 2627, + instrux + 2848, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_55[] = { + instrux + 1726, + instrux + 2626, + instrux + 2847, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_56[] = { + instrux + 2680, + instrux + 2907, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_57[] = { + instrux + 2694, + instrux + 2916, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_58[] = { + instrux + 1703, + instrux + 2624, + instrux + 2625, + instrux + 2845, + instrux + 2846, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_59[] = { + instrux + 1697, + instrux + 2678, + instrux + 2679, + instrux + 2905, + instrux + 2906, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_5a[] = { + instrux + 1702, + instrux + 2872, + instrux + 2875, + instrux + 2878, + instrux + 2881, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_5b[] = { + instrux + 1701, + instrux + 2869, + instrux + 2874, + instrux + 2884, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_5c[] = { + instrux + 1700, + instrux + 2689, + instrux + 2690, + instrux + 2911, + instrux + 2912, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_5d[] = { + instrux + 1695, + instrux + 2661, + instrux + 2662, + instrux + 2891, + instrux + 2892, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_5e[] = { + instrux + 1692, + instrux + 2656, + instrux + 2657, + instrux + 2887, + instrux + 2888, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_5f[] = { + instrux + 2659, + instrux + 2660, + instrux + 2889, + instrux + 2890, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_60[] = { + instrux + 1734, + instrux + 2840, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_61[] = { + instrux + 1736, + instrux + 2841, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_62[] = { + instrux + 1735, + instrux + 2842, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_63[] = { + instrux + 1654, + instrux + 2764, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_64[] = { + instrux + 1671, + instrux + 2783, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_65[] = { + instrux + 1673, + instrux + 2784, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_66[] = { + instrux + 1672, + instrux + 2785, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_67[] = { + instrux + 1655, + instrux + 2766, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_68[] = { + instrux + 1731, + instrux + 2836, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_69[] = { + instrux + 1733, + instrux + 2837, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_6a[] = { + instrux + 1732, + instrux + 2838, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_6b[] = { + instrux + 1653, + instrux + 2765, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_6c[] = { + instrux + 2843, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_6d[] = { + instrux + 2839, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_6e[] = { + instrux + 1647, + instrux + 1651, + instrux + 2749, + instrux + 2750, + instrux + 2761, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_6f[] = { + instrux + 1649, + instrux + 2752, + instrux + 2754, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_70[] = { + instrux + 2735, + instrux + 2803, + instrux + 2804, + instrux + 2805, + instrux + 2806, + instrux + 2807, + instrux + 2808, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_71[] = { + instrux + 1712, + instrux + 1716, + instrux + 1722, + instrux + 2811, + instrux + 2817, + instrux + 2822, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_72[] = { + instrux + 1708, + instrux + 1714, + instrux + 1718, + instrux + 2813, + instrux + 2819, + instrux + 2824, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_73[] = { + instrux + 1710, + instrux + 1720, + instrux + 2809, + instrux + 2815, + instrux + 2820, + instrux + 2826, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_74[] = { + instrux + 1668, + instrux + 2780, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_75[] = { + instrux + 1670, + instrux + 2781, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_76[] = { + instrux + 1669, + instrux + 2782, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_77[] = { + instrux + 1646, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_78[] = { + instrux + 2937, + instrux + 2938, + instrux + 2988, + instrux + 2990, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_79[] = { + instrux + 2942, + instrux + 2943, + instrux + 2989, + instrux + 2991, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_7c[] = { + instrux + 2919, + instrux + 2920, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_7d[] = { + instrux + 2921, + instrux + 2922, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_7e[] = { + instrux + 1648, + instrux + 1652, + instrux + 2748, + instrux + 2751, + instrux + 2757, + instrux + 2760, + instrux + 2762, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_7f[] = { + instrux + 1650, + instrux + 2753, + instrux + 2755, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_80[] = { + instrux + 1105, + instrux + 1121, + instrux + 1137, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_81[] = { + instrux + 1102, + instrux + 1118, + instrux + 1134, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_82[] = { + instrux + 1095, + instrux + 1111, + instrux + 1127, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_83[] = { + instrux + 1099, + instrux + 1115, + instrux + 1131, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_84[] = { + instrux + 1109, + instrux + 1125, + instrux + 1141, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_85[] = { + instrux + 1104, + instrux + 1120, + instrux + 1136, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_86[] = { + instrux + 1098, + instrux + 1114, + instrux + 1130, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_87[] = { + instrux + 1094, + instrux + 1110, + instrux + 1126, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_88[] = { + instrux + 1108, + instrux + 1124, + instrux + 1140, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_89[] = { + instrux + 1103, + instrux + 1119, + instrux + 1135, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_8a[] = { + instrux + 1106, + instrux + 1122, + instrux + 1138, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_8b[] = { + instrux + 1107, + instrux + 1123, + instrux + 1139, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_8c[] = { + instrux + 1097, + instrux + 1113, + instrux + 1129, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_8d[] = { + instrux + 1101, + instrux + 1117, + instrux + 1133, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_8e[] = { + instrux + 1100, + instrux + 1116, + instrux + 1132, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_8f[] = { + instrux + 1096, + instrux + 1112, + instrux + 1128, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_90[] = { + instrux + 2523, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_91[] = { + instrux + 2520, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_92[] = { + instrux + 2513, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_93[] = { + instrux + 2517, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_94[] = { + instrux + 2527, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_95[] = { + instrux + 2522, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_96[] = { + instrux + 2516, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_97[] = { + instrux + 2512, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_98[] = { + instrux + 2526, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_99[] = { + instrux + 2521, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_9a[] = { + instrux + 2524, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_9b[] = { + instrux + 2525, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_9c[] = { + instrux + 2515, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_9d[] = { + instrux + 2519, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_9e[] = { + instrux + 2518, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_9f[] = { + instrux + 2514, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_a0[] = { + instrux + 1405, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_a1[] = { + instrux + 1410, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_a2[] = { + instrux + 1319, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_a3[] = { + instrux + 874, + instrux + 875, + instrux + 876, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_a4[] = { + instrux + 838, + instrux + 839, + instrux + 840, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_a5[] = { + instrux + 841, + instrux + 842, + instrux + 843, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_a6[] = { + instrux + 4036, + instrux + 4037, + instrux + 4038, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_a7[] = { + instrux + 4030, + instrux + 4031, + instrux + 4032, + instrux + 4033, + instrux + 4034, + instrux + 4035, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_a8[] = { + instrux + 1406, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_a9[] = { + instrux + 1411, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_aa[] = { + instrux + 1350, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_ab[] = { + instrux + 892, + instrux + 893, + instrux + 894, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_ac[] = { + instrux + 856, + instrux + 857, + instrux + 858, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_ad[] = { + instrux + 859, + instrux + 860, + instrux + 861, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_ae[] = { + instrux + 1286, + instrux + 1287, + instrux + 1288, + instrux + 1290, + instrux + 1291, + instrux + 1292, + instrux + 1293, + instrux + 1363, + instrux + 1364, + instrux + 1365, + instrux + 1366, + instrux + 1367, + instrux + 1412, + instrux + 1413, + instrux + 1414, + instrux + 1415, + instrux + 1416, + instrux + 1417, + instrux + 1418, + instrux + 1419, + instrux + 2658, + instrux + 2688, + instrux + 2695, + instrux + 2696, + instrux + 2697, + instrux + 2698, + instrux + 2701, + instrux + 2702, + instrux + 2705, + instrux + 2706, + instrux + 2709, + instrux + 2710, + instrux + 2719, + instrux + 2746, + instrux + 2747, + instrux + 6706, + instrux + 6707, + instrux + 6828, + instrux + 6831, + instrux + 6832, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_af[] = { + instrux + 753, + instrux + 754, + instrux + 755, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_b0[] = { + instrux + 1011, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_b1[] = { + instrux + 1012, + instrux + 1013, + instrux + 1014, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_b2[] = { + instrux + 1398, + instrux + 1399, + instrux + 1400, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_b3[] = { + instrux + 886, + instrux + 887, + instrux + 888, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_b4[] = { + instrux + 1392, + instrux + 1393, + instrux + 1394, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_b5[] = { + instrux + 1395, + instrux + 1396, + instrux + 1397, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_b6[] = { + instrux + 1005, + instrux + 1006, + instrux + 1007, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_b7[] = { + instrux + 1008, + instrux + 1009, + instrux + 1010, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_b8[] = { + instrux + 1187, + instrux + 1188, + instrux + 1189, + instrux + 3074, + instrux + 3075, + instrux + 3076, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_b9[] = { + instrux + 1783, + instrux + 1784, + instrux + 1785, + instrux + 1786, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_ba[] = { + instrux + 877, + instrux + 878, + instrux + 879, + instrux + 883, + instrux + 884, + instrux + 885, + instrux + 889, + instrux + 890, + instrux + 891, + instrux + 895, + instrux + 896, + instrux + 897, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_bb[] = { + instrux + 880, + instrux + 881, + instrux + 882, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_bc[] = { + instrux + 898, + instrux + 899, + instrux + 900, + instrux + 910, + instrux + 911, + instrux + 912, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_bd[] = { + instrux + 901, + instrux + 902, + instrux + 903, + instrux + 904, + instrux + 905, + instrux + 906, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_be[] = { + instrux + 996, + instrux + 997, + instrux + 998, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_bf[] = { + instrux + 999, + instrux + 1000, + instrux + 1001, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_c0[] = { + instrux + 1017, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_c1[] = { + instrux + 1018, + instrux + 1019, + instrux + 1020, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_c2[] = { + instrux + 2628, + instrux + 2629, + instrux + 2630, + instrux + 2631, + instrux + 2632, + instrux + 2633, + instrux + 2634, + instrux + 2635, + instrux + 2636, + instrux + 2637, + instrux + 2638, + instrux + 2639, + instrux + 2640, + instrux + 2641, + instrux + 2642, + instrux + 2643, + instrux + 2644, + instrux + 2645, + instrux + 2849, + instrux + 2850, + instrux + 2851, + instrux + 2852, + instrux + 2853, + instrux + 2854, + instrux + 2855, + instrux + 2856, + instrux + 2857, + instrux + 2858, + instrux + 2859, + instrux + 2860, + instrux + 2861, + instrux + 2862, + instrux + 2863, + instrux + 2864, + instrux + 2865, + instrux + 2866, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_c3[] = { + instrux + 2743, + instrux + 2744, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_c4[] = { + instrux + 2725, + instrux + 2726, + instrux + 2727, + instrux + 2787, + instrux + 2788, + instrux + 2789, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_c5[] = { + instrux + 2724, + instrux + 2786, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_c6[] = { + instrux + 2685, + instrux + 2908, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_c7[] = { + instrux + 1015, + instrux + 1016, + instrux + 1310, + instrux + 1311, + instrux + 1312, + instrux + 1313, + instrux + 1314, + instrux + 1315, + instrux + 1316, + instrux + 1317, + instrux + 2703, + instrux + 2704, + instrux + 2707, + instrux + 2708, + instrux + 2711, + instrux + 2712, + instrux + 2930, + instrux + 2935, + instrux + 2936, + instrux + 2945, + instrux + 7199, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_c8[] = { + instrux + 976, + instrux + 977, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_c9[] = { + instrux + 976, + instrux + 977, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_ca[] = { + instrux + 976, + instrux + 977, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_cb[] = { + instrux + 976, + instrux + 977, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_cc[] = { + instrux + 976, + instrux + 977, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_cd[] = { + instrux + 976, + instrux + 977, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_ce[] = { + instrux + 976, + instrux + 977, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_cf[] = { + instrux + 976, + instrux + 977, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_d0[] = { + instrux + 2917, + instrux + 2918, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_d1[] = { + instrux + 1721, + instrux + 2821, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_d2[] = { + instrux + 1717, + instrux + 2823, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_d3[] = { + instrux + 1719, + instrux + 2825, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_d4[] = { + instrux + 2770, + instrux + 2771, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_d5[] = { + instrux + 1699, + instrux + 2798, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_d6[] = { + instrux + 2756, + instrux + 2758, + instrux + 2759, + instrux + 2763, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_d7[] = { + instrux + 2732, + instrux + 2795, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_d8[] = { + instrux + 1728, + instrux + 2834, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_d9[] = { + instrux + 1729, + instrux + 2835, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_da[] = { + instrux + 2731, + instrux + 2794, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_db[] = { + instrux + 1664, + instrux + 2776, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_dc[] = { + instrux + 1661, + instrux + 2774, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_dd[] = { + instrux + 1662, + instrux + 2775, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_de[] = { + instrux + 2729, + instrux + 2792, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_df[] = { + instrux + 1665, + instrux + 2777, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_e0[] = { + instrux + 2722, + instrux + 2778, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_e1[] = { + instrux + 1715, + instrux + 2816, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_e2[] = { + instrux + 1713, + instrux + 2818, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_e3[] = { + instrux + 2723, + instrux + 2779, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_e4[] = { + instrux + 2733, + instrux + 2796, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_e5[] = { + instrux + 1698, + instrux + 2797, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_e6[] = { + instrux + 2868, + instrux + 2870, + instrux + 2883, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_e7[] = { + instrux + 2721, + instrux + 2742, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_e8[] = { + instrux + 1725, + instrux + 2832, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_e9[] = { + instrux + 1727, + instrux + 2833, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_ea[] = { + instrux + 2730, + instrux + 2793, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_eb[] = { + instrux + 1704, + instrux + 2801, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_ec[] = { + instrux + 1658, + instrux + 2772, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_ed[] = { + instrux + 1660, + instrux + 2773, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_ee[] = { + instrux + 2728, + instrux + 2791, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_ef[] = { + instrux + 1777, + instrux + 2844, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_f0[] = { + instrux + 2923, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_f1[] = { + instrux + 1711, + instrux + 2810, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_f2[] = { + instrux + 1707, + instrux + 2812, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_f3[] = { + instrux + 1709, + instrux + 2814, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_f4[] = { + instrux + 2799, + instrux + 2800, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_f5[] = { + instrux + 1693, + instrux + 2790, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_f6[] = { + instrux + 2734, + instrux + 2802, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_f7[] = { + instrux + 2720, + instrux + 2741, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_f8[] = { + instrux + 1723, + instrux + 2827, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_f9[] = { + instrux + 1730, + instrux + 2828, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_fa[] = { + instrux + 1724, + instrux + 2829, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_fb[] = { + instrux + 2830, + instrux + 2831, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_fc[] = { + instrux + 1656, + instrux + 2767, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_fd[] = { + instrux + 1663, + instrux + 2768, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_fe[] = { + instrux + 1657, + instrux + 2769, + NULL +}; + +static const struct itemplate * const itbl_novex_map1_ff[] = { + instrux + 1779, + instrux + 1780, + instrux + 1781, + instrux + 1782, + NULL +}; + +static const struct itemplate * const * const itbl_novex_map1[256] = { + itbl_novex_map1_00, + itbl_novex_map1_01, + itbl_novex_map1_02, + itbl_novex_map1_03, + NULL, + itbl_novex_map1_05, + itbl_novex_map1_06, + itbl_novex_map1_07, + itbl_novex_map1_08, + itbl_novex_map1_09, + NULL, + itbl_novex_map1_0b, + NULL, + itbl_novex_map1_0d, + itbl_novex_map1_0e, + itbl_novex_map1_0f, + itbl_novex_map1_10, + itbl_novex_map1_11, + itbl_novex_map1_12, + itbl_novex_map1_13, + itbl_novex_map1_14, + itbl_novex_map1_15, + itbl_novex_map1_16, + itbl_novex_map1_17, + itbl_novex_map1_18, + itbl_novex_map1_19, + itbl_novex_map1_1a, + itbl_novex_map1_1b, + itbl_novex_map1_1c, + itbl_novex_map1_1d, + itbl_novex_map1_1e, + itbl_novex_map1_1f, + itbl_novex_map1_20, + itbl_novex_map1_21, + itbl_novex_map1_22, + itbl_novex_map1_23, + NULL, + NULL, + NULL, + NULL, + itbl_novex_map1_28, + itbl_novex_map1_29, + itbl_novex_map1_2a, + itbl_novex_map1_2b, + itbl_novex_map1_2c, + itbl_novex_map1_2d, + itbl_novex_map1_2e, + itbl_novex_map1_2f, + itbl_novex_map1_30, + itbl_novex_map1_31, + itbl_novex_map1_32, + itbl_novex_map1_33, + itbl_novex_map1_34, + itbl_novex_map1_35, + NULL, + itbl_novex_map1_37, + itbl_novex_map1_38, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_novex_map1_40, + itbl_novex_map1_41, + itbl_novex_map1_42, + itbl_novex_map1_43, + itbl_novex_map1_44, + itbl_novex_map1_45, + itbl_novex_map1_46, + itbl_novex_map1_47, + itbl_novex_map1_48, + itbl_novex_map1_49, + itbl_novex_map1_4a, + itbl_novex_map1_4b, + itbl_novex_map1_4c, + itbl_novex_map1_4d, + itbl_novex_map1_4e, + itbl_novex_map1_4f, + itbl_novex_map1_50, + itbl_novex_map1_51, + itbl_novex_map1_52, + itbl_novex_map1_53, + itbl_novex_map1_54, + itbl_novex_map1_55, + itbl_novex_map1_56, + itbl_novex_map1_57, + itbl_novex_map1_58, + itbl_novex_map1_59, + itbl_novex_map1_5a, + itbl_novex_map1_5b, + itbl_novex_map1_5c, + itbl_novex_map1_5d, + itbl_novex_map1_5e, + itbl_novex_map1_5f, + itbl_novex_map1_60, + itbl_novex_map1_61, + itbl_novex_map1_62, + itbl_novex_map1_63, + itbl_novex_map1_64, + itbl_novex_map1_65, + itbl_novex_map1_66, + itbl_novex_map1_67, + itbl_novex_map1_68, + itbl_novex_map1_69, + itbl_novex_map1_6a, + itbl_novex_map1_6b, + itbl_novex_map1_6c, + itbl_novex_map1_6d, + itbl_novex_map1_6e, + itbl_novex_map1_6f, + itbl_novex_map1_70, + itbl_novex_map1_71, + itbl_novex_map1_72, + itbl_novex_map1_73, + itbl_novex_map1_74, + itbl_novex_map1_75, + itbl_novex_map1_76, + itbl_novex_map1_77, + itbl_novex_map1_78, + itbl_novex_map1_79, + NULL, + NULL, + itbl_novex_map1_7c, + itbl_novex_map1_7d, + itbl_novex_map1_7e, + itbl_novex_map1_7f, + itbl_novex_map1_80, + itbl_novex_map1_81, + itbl_novex_map1_82, + itbl_novex_map1_83, + itbl_novex_map1_84, + itbl_novex_map1_85, + itbl_novex_map1_86, + itbl_novex_map1_87, + itbl_novex_map1_88, + itbl_novex_map1_89, + itbl_novex_map1_8a, + itbl_novex_map1_8b, + itbl_novex_map1_8c, + itbl_novex_map1_8d, + itbl_novex_map1_8e, + itbl_novex_map1_8f, + itbl_novex_map1_90, + itbl_novex_map1_91, + itbl_novex_map1_92, + itbl_novex_map1_93, + itbl_novex_map1_94, + itbl_novex_map1_95, + itbl_novex_map1_96, + itbl_novex_map1_97, + itbl_novex_map1_98, + itbl_novex_map1_99, + itbl_novex_map1_9a, + itbl_novex_map1_9b, + itbl_novex_map1_9c, + itbl_novex_map1_9d, + itbl_novex_map1_9e, + itbl_novex_map1_9f, + itbl_novex_map1_a0, + itbl_novex_map1_a1, + itbl_novex_map1_a2, + itbl_novex_map1_a3, + itbl_novex_map1_a4, + itbl_novex_map1_a5, + itbl_novex_map1_a6, + itbl_novex_map1_a7, + itbl_novex_map1_a8, + itbl_novex_map1_a9, + itbl_novex_map1_aa, + itbl_novex_map1_ab, + itbl_novex_map1_ac, + itbl_novex_map1_ad, + itbl_novex_map1_ae, + itbl_novex_map1_af, + itbl_novex_map1_b0, + itbl_novex_map1_b1, + itbl_novex_map1_b2, + itbl_novex_map1_b3, + itbl_novex_map1_b4, + itbl_novex_map1_b5, + itbl_novex_map1_b6, + itbl_novex_map1_b7, + itbl_novex_map1_b8, + itbl_novex_map1_b9, + itbl_novex_map1_ba, + itbl_novex_map1_bb, + itbl_novex_map1_bc, + itbl_novex_map1_bd, + itbl_novex_map1_be, + itbl_novex_map1_bf, + itbl_novex_map1_c0, + itbl_novex_map1_c1, + itbl_novex_map1_c2, + itbl_novex_map1_c3, + itbl_novex_map1_c4, + itbl_novex_map1_c5, + itbl_novex_map1_c6, + itbl_novex_map1_c7, + itbl_novex_map1_c8, + itbl_novex_map1_c9, + itbl_novex_map1_ca, + itbl_novex_map1_cb, + itbl_novex_map1_cc, + itbl_novex_map1_cd, + itbl_novex_map1_ce, + itbl_novex_map1_cf, + itbl_novex_map1_d0, + itbl_novex_map1_d1, + itbl_novex_map1_d2, + itbl_novex_map1_d3, + itbl_novex_map1_d4, + itbl_novex_map1_d5, + itbl_novex_map1_d6, + itbl_novex_map1_d7, + itbl_novex_map1_d8, + itbl_novex_map1_d9, + itbl_novex_map1_da, + itbl_novex_map1_db, + itbl_novex_map1_dc, + itbl_novex_map1_dd, + itbl_novex_map1_de, + itbl_novex_map1_df, + itbl_novex_map1_e0, + itbl_novex_map1_e1, + itbl_novex_map1_e2, + itbl_novex_map1_e3, + itbl_novex_map1_e4, + itbl_novex_map1_e5, + itbl_novex_map1_e6, + itbl_novex_map1_e7, + itbl_novex_map1_e8, + itbl_novex_map1_e9, + itbl_novex_map1_ea, + itbl_novex_map1_eb, + itbl_novex_map1_ec, + itbl_novex_map1_ed, + itbl_novex_map1_ee, + itbl_novex_map1_ef, + itbl_novex_map1_f0, + itbl_novex_map1_f1, + itbl_novex_map1_f2, + itbl_novex_map1_f3, + itbl_novex_map1_f4, + itbl_novex_map1_f5, + itbl_novex_map1_f6, + itbl_novex_map1_f7, + itbl_novex_map1_f8, + itbl_novex_map1_f9, + itbl_novex_map1_fa, + itbl_novex_map1_fb, + itbl_novex_map1_fc, + itbl_novex_map1_fd, + itbl_novex_map1_fe, + itbl_novex_map1_ff, +}; + +static const struct itemplate * const itbl_novex_map2_00[] = { + instrux + 2980, + instrux + 2981, + NULL +}; + +static const struct itemplate * const itbl_novex_map2_01[] = { + instrux + 2964, + instrux + 2965, + NULL +}; + +static const struct itemplate * const itbl_novex_map2_02[] = { + instrux + 2966, + instrux + 2967, + NULL +}; + +static const struct itemplate * const itbl_novex_map2_03[] = { + instrux + 2968, + instrux + 2969, + NULL +}; + +static const struct itemplate * const itbl_novex_map2_04[] = { + instrux + 2976, + instrux + 2977, + NULL +}; + +static const struct itemplate * const itbl_novex_map2_05[] = { + instrux + 2970, + instrux + 2971, + NULL +}; + +static const struct itemplate * const itbl_novex_map2_06[] = { + instrux + 2972, + instrux + 2973, + NULL +}; + +static const struct itemplate * const itbl_novex_map2_07[] = { + instrux + 2974, + instrux + 2975, + NULL +}; + +static const struct itemplate * const itbl_novex_map2_08[] = { + instrux + 2982, + instrux + 2983, + NULL +}; + +static const struct itemplate * const itbl_novex_map2_09[] = { + instrux + 2984, + instrux + 2985, + NULL +}; + +static const struct itemplate * const itbl_novex_map2_0a[] = { + instrux + 2986, + instrux + 2987, + NULL +}; + +static const struct itemplate * const itbl_novex_map2_0b[] = { + instrux + 2978, + instrux + 2979, + NULL +}; + +static const struct itemplate * const itbl_novex_map2_10[] = { + instrux + 3008, + instrux + 3009, + NULL +}; + +static const struct itemplate * const itbl_novex_map2_14[] = { + instrux + 2998, + instrux + 2999, + NULL +}; + +static const struct itemplate * const itbl_novex_map2_15[] = { + instrux + 2996, + instrux + 2997, + NULL +}; + +static const struct itemplate * const itbl_novex_map2_17[] = { + instrux + 3048, + NULL +}; + +static const struct itemplate * const itbl_novex_map2_1c[] = { + instrux + 2956, + instrux + 2957, + NULL +}; + +static const struct itemplate * const itbl_novex_map2_1d[] = { + instrux + 2958, + instrux + 2959, + NULL +}; + +static const struct itemplate * const itbl_novex_map2_1e[] = { + instrux + 2960, + instrux + 2961, + NULL +}; + +static const struct itemplate * const itbl_novex_map2_20[] = { + instrux + 3034, + NULL +}; + +static const struct itemplate * const itbl_novex_map2_21[] = { + instrux + 3035, + NULL +}; + +static const struct itemplate * const itbl_novex_map2_22[] = { + instrux + 3036, + NULL +}; + +static const struct itemplate * const itbl_novex_map2_23[] = { + instrux + 3037, + NULL +}; + +static const struct itemplate * const itbl_novex_map2_24[] = { + instrux + 3038, + NULL +}; + +static const struct itemplate * const itbl_novex_map2_25[] = { + instrux + 3039, + NULL +}; + +static const struct itemplate * const itbl_novex_map2_28[] = { + instrux + 3046, + NULL +}; + +static const struct itemplate * const itbl_novex_map2_29[] = { + instrux + 3011, + NULL +}; + +static const struct itemplate * const itbl_novex_map2_2a[] = { + instrux + 3005, + NULL +}; + +static const struct itemplate * const itbl_novex_map2_2b[] = { + instrux + 3007, + NULL +}; + +static const struct itemplate * const itbl_novex_map2_30[] = { + instrux + 3040, + NULL +}; + +static const struct itemplate * const itbl_novex_map2_31[] = { + instrux + 3041, + NULL +}; + +static const struct itemplate * const itbl_novex_map2_32[] = { + instrux + 3042, + NULL +}; + +static const struct itemplate * const itbl_novex_map2_33[] = { + instrux + 3043, + NULL +}; + +static const struct itemplate * const itbl_novex_map2_34[] = { + instrux + 3044, + NULL +}; + +static const struct itemplate * const itbl_novex_map2_35[] = { + instrux + 3045, + NULL +}; + +static const struct itemplate * const itbl_novex_map2_37[] = { + instrux + 3073, + NULL +}; + +static const struct itemplate * const itbl_novex_map2_38[] = { + instrux + 3030, + NULL +}; + +static const struct itemplate * const itbl_novex_map2_39[] = { + instrux + 3031, + NULL +}; + +static const struct itemplate * const itbl_novex_map2_3a[] = { + instrux + 3033, + NULL +}; + +static const struct itemplate * const itbl_novex_map2_3b[] = { + instrux + 3032, + NULL +}; + +static const struct itemplate * const itbl_novex_map2_3c[] = { + instrux + 3026, + NULL +}; + +static const struct itemplate * const itbl_novex_map2_3d[] = { + instrux + 3027, + NULL +}; + +static const struct itemplate * const itbl_novex_map2_3e[] = { + instrux + 3029, + NULL +}; + +static const struct itemplate * const itbl_novex_map2_3f[] = { + instrux + 3028, + NULL +}; + +static const struct itemplate * const itbl_novex_map2_40[] = { + instrux + 3047, + NULL +}; + +static const struct itemplate * const itbl_novex_map2_41[] = { + instrux + 3020, + NULL +}; + +static const struct itemplate * const itbl_novex_map2_80[] = { + instrux + 2946, + instrux + 2947, + NULL +}; + +static const struct itemplate * const itbl_novex_map2_81[] = { + instrux + 2949, + instrux + 2950, + NULL +}; + +static const struct itemplate * const itbl_novex_map2_82[] = { + instrux + 1300, + instrux + 1301, + NULL +}; + +static const struct itemplate * const itbl_novex_map2_8a[] = { + instrux + 28, + NULL +}; + +static const struct itemplate * const itbl_novex_map2_8b[] = { + instrux + 29, + instrux + 30, + instrux + 31, + NULL +}; + +static const struct itemplate * const itbl_novex_map2_c8[] = { + instrux + 4403, + NULL +}; + +static const struct itemplate * const itbl_novex_map2_c9[] = { + instrux + 4401, + NULL +}; + +static const struct itemplate * const itbl_novex_map2_ca[] = { + instrux + 4402, + NULL +}; + +static const struct itemplate * const itbl_novex_map2_cb[] = { + instrux + 4407, + instrux + 4408, + NULL +}; + +static const struct itemplate * const itbl_novex_map2_cc[] = { + instrux + 4405, + NULL +}; + +static const struct itemplate * const itbl_novex_map2_cd[] = { + instrux + 4406, + NULL +}; + +static const struct itemplate * const itbl_novex_map2_cf[] = { + instrux + 6732, + NULL +}; + +static const struct itemplate * const itbl_novex_map2_d8[] = { + instrux + 3102, + instrux + 3103, + instrux + 3104, + instrux + 3105, + NULL +}; + +static const struct itemplate * const itbl_novex_map2_db[] = { + instrux + 3087, + NULL +}; + +static const struct itemplate * const itbl_novex_map2_dc[] = { + instrux + 3083, + instrux + 3097, + instrux + 3101, + NULL +}; + +static const struct itemplate * const itbl_novex_map2_dd[] = { + instrux + 3084, + instrux + 3095, + NULL +}; + +static const struct itemplate * const itbl_novex_map2_de[] = { + instrux + 3085, + instrux + 3098, + NULL +}; + +static const struct itemplate * const itbl_novex_map2_df[] = { + instrux + 3086, + instrux + 3096, + NULL +}; + +static const struct itemplate * const itbl_novex_map2_f0[] = { + instrux + 978, + instrux + 979, + instrux + 980, + instrux + 3053, + instrux + 3059, + instrux + 3067, + NULL +}; + +static const struct itemplate * const itbl_novex_map2_f1[] = { + instrux + 981, + instrux + 982, + instrux + 983, + instrux + 3054, + instrux + 3055, + instrux + 3060, + instrux + 3061, + instrux + 3062, + NULL +}; + +static const struct itemplate * const itbl_novex_map2_f5[] = { + instrux + 6838, + instrux + 6840, + NULL +}; + +static const struct itemplate * const itbl_novex_map2_f6[] = { + instrux + 826, + instrux + 827, + instrux + 832, + instrux + 833, + instrux + 6842, + instrux + 6844, + NULL +}; + +static const struct itemplate * const itbl_novex_map2_f8[] = { + instrux + 6713, + instrux + 6714, + instrux + 6715, + instrux + 6846, + instrux + 6847, + instrux + 6848, + instrux + 6850, + instrux + 6851, + instrux + 6852, + NULL +}; + +static const struct itemplate * const itbl_novex_map2_f9[] = { + instrux + 6709, + instrux + 6710, + NULL +}; + +static const struct itemplate * const itbl_novex_map2_fa[] = { + instrux + 3099, + NULL +}; + +static const struct itemplate * const itbl_novex_map2_fb[] = { + instrux + 3100, + NULL +}; + +static const struct itemplate * const itbl_novex_map2_fc[] = { + instrux + 7182, + instrux + 7183, + instrux + 7186, + instrux + 7187, + instrux + 7190, + instrux + 7191, + instrux + 7194, + instrux + 7195, + NULL +}; + +static const struct itemplate * const * const itbl_novex_map2[256] = { + itbl_novex_map2_00, + itbl_novex_map2_01, + itbl_novex_map2_02, + itbl_novex_map2_03, + itbl_novex_map2_04, + itbl_novex_map2_05, + itbl_novex_map2_06, + itbl_novex_map2_07, + itbl_novex_map2_08, + itbl_novex_map2_09, + itbl_novex_map2_0a, + itbl_novex_map2_0b, + NULL, + NULL, + NULL, + NULL, + itbl_novex_map2_10, + NULL, + NULL, + NULL, + itbl_novex_map2_14, + itbl_novex_map2_15, + NULL, + itbl_novex_map2_17, + NULL, + NULL, + NULL, + NULL, + itbl_novex_map2_1c, + itbl_novex_map2_1d, + itbl_novex_map2_1e, + NULL, + itbl_novex_map2_20, + itbl_novex_map2_21, + itbl_novex_map2_22, + itbl_novex_map2_23, + itbl_novex_map2_24, + itbl_novex_map2_25, + NULL, + NULL, + itbl_novex_map2_28, + itbl_novex_map2_29, + itbl_novex_map2_2a, + itbl_novex_map2_2b, + NULL, + NULL, + NULL, + NULL, + itbl_novex_map2_30, + itbl_novex_map2_31, + itbl_novex_map2_32, + itbl_novex_map2_33, + itbl_novex_map2_34, + itbl_novex_map2_35, + NULL, + itbl_novex_map2_37, + itbl_novex_map2_38, + itbl_novex_map2_39, + itbl_novex_map2_3a, + itbl_novex_map2_3b, + itbl_novex_map2_3c, + itbl_novex_map2_3d, + itbl_novex_map2_3e, + itbl_novex_map2_3f, + itbl_novex_map2_40, + itbl_novex_map2_41, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_novex_map2_80, + itbl_novex_map2_81, + itbl_novex_map2_82, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_novex_map2_8a, + itbl_novex_map2_8b, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_novex_map2_c8, + itbl_novex_map2_c9, + itbl_novex_map2_ca, + itbl_novex_map2_cb, + itbl_novex_map2_cc, + itbl_novex_map2_cd, + NULL, + itbl_novex_map2_cf, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_novex_map2_d8, + NULL, + NULL, + itbl_novex_map2_db, + itbl_novex_map2_dc, + itbl_novex_map2_dd, + itbl_novex_map2_de, + itbl_novex_map2_df, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_novex_map2_f0, + itbl_novex_map2_f1, + NULL, + NULL, + NULL, + itbl_novex_map2_f5, + itbl_novex_map2_f6, + NULL, + itbl_novex_map2_f8, + itbl_novex_map2_f9, + itbl_novex_map2_fa, + itbl_novex_map2_fb, + itbl_novex_map2_fc, + NULL, + NULL, + NULL, +}; + +static const struct itemplate * const itbl_novex_map3_08[] = { + instrux + 3050, + NULL +}; + +static const struct itemplate * const itbl_novex_map3_09[] = { + instrux + 3049, + NULL +}; + +static const struct itemplate * const itbl_novex_map3_0a[] = { + instrux + 3052, + NULL +}; + +static const struct itemplate * const itbl_novex_map3_0b[] = { + instrux + 3051, + NULL +}; + +static const struct itemplate * const itbl_novex_map3_0c[] = { + instrux + 2995, + NULL +}; + +static const struct itemplate * const itbl_novex_map3_0d[] = { + instrux + 2994, + NULL +}; + +static const struct itemplate * const itbl_novex_map3_0e[] = { + instrux + 3010, + NULL +}; + +static const struct itemplate * const itbl_novex_map3_0f[] = { + instrux + 2962, + instrux + 2963, + NULL +}; + +static const struct itemplate * const itbl_novex_map3_14[] = { + instrux + 3012, + instrux + 3013, + instrux + 3014, + NULL +}; + +static const struct itemplate * const itbl_novex_map3_15[] = { + instrux + 3017, + instrux + 3018, + instrux + 3019, + NULL +}; + +static const struct itemplate * const itbl_novex_map3_16[] = { + instrux + 3015, + instrux + 3016, + NULL +}; + +static const struct itemplate * const itbl_novex_map3_17[] = { + instrux + 3002, + instrux + 3003, + NULL +}; + +static const struct itemplate * const itbl_novex_map3_20[] = { + instrux + 3021, + instrux + 3022, + instrux + 3023, + NULL +}; + +static const struct itemplate * const itbl_novex_map3_21[] = { + instrux + 3004, + NULL +}; + +static const struct itemplate * const itbl_novex_map3_22[] = { + instrux + 3024, + instrux + 3025, + NULL +}; + +static const struct itemplate * const itbl_novex_map3_40[] = { + instrux + 3001, + NULL +}; + +static const struct itemplate * const itbl_novex_map3_41[] = { + instrux + 3000, + NULL +}; + +static const struct itemplate * const itbl_novex_map3_42[] = { + instrux + 3006, + NULL +}; + +static const struct itemplate * const itbl_novex_map3_44[] = { + instrux + 3804, + instrux + 3805, + instrux + 3806, + instrux + 3807, + instrux + 3808, + NULL +}; + +static const struct itemplate * const itbl_novex_map3_60[] = { + instrux + 3070, + NULL +}; + +static const struct itemplate * const itbl_novex_map3_61[] = { + instrux + 3069, + NULL +}; + +static const struct itemplate * const itbl_novex_map3_62[] = { + instrux + 3072, + NULL +}; + +static const struct itemplate * const itbl_novex_map3_63[] = { + instrux + 3071, + NULL +}; + +static const struct itemplate * const itbl_novex_map3_cc[] = { + instrux + 4404, + NULL +}; + +static const struct itemplate * const itbl_novex_map3_ce[] = { + instrux + 6726, + NULL +}; + +static const struct itemplate * const itbl_novex_map3_cf[] = { + instrux + 6720, + NULL +}; + +static const struct itemplate * const itbl_novex_map3_df[] = { + instrux + 3088, + NULL +}; + +static const struct itemplate * const itbl_novex_map3_f0[] = { + instrux + 7203, + NULL +}; + +static const struct itemplate * const * const itbl_novex_map3[256] = { + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_novex_map3_08, + itbl_novex_map3_09, + itbl_novex_map3_0a, + itbl_novex_map3_0b, + itbl_novex_map3_0c, + itbl_novex_map3_0d, + itbl_novex_map3_0e, + itbl_novex_map3_0f, + NULL, + NULL, + NULL, + NULL, + itbl_novex_map3_14, + itbl_novex_map3_15, + itbl_novex_map3_16, + itbl_novex_map3_17, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_novex_map3_20, + itbl_novex_map3_21, + itbl_novex_map3_22, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_novex_map3_40, + itbl_novex_map3_41, + itbl_novex_map3_42, + NULL, + itbl_novex_map3_44, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_novex_map3_60, + itbl_novex_map3_61, + itbl_novex_map3_62, + itbl_novex_map3_63, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_novex_map3_cc, + NULL, + itbl_novex_map3_ce, + itbl_novex_map3_cf, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_novex_map3_df, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_novex_map3_f0, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, +}; + +static const struct itemplate * const itbl_vex_map1_10[] = { + instrux + 3572, + instrux + 3573, + instrux + 3580, + instrux + 3581, + instrux + 3584, + instrux + 3586, + instrux + 3588, + instrux + 3590, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_11[] = { + instrux + 3574, + instrux + 3575, + instrux + 3582, + instrux + 3583, + instrux + 3585, + instrux + 3587, + instrux + 3589, + instrux + 3591, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_12[] = { + instrux + 3532, + instrux + 3533, + instrux + 3546, + instrux + 3552, + instrux + 3554, + instrux + 3578, + instrux + 3579, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_13[] = { + instrux + 3553, + instrux + 3555, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_14[] = { + instrux + 3794, + instrux + 3795, + instrux + 3796, + instrux + 3797, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_15[] = { + instrux + 3790, + instrux + 3791, + instrux + 3792, + instrux + 3793, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_16[] = { + instrux + 3547, + instrux + 3549, + instrux + 3551, + instrux + 3576, + instrux + 3577, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_17[] = { + instrux + 3548, + instrux + 3550, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_28[] = { + instrux + 3518, + instrux + 3520, + instrux + 3522, + instrux + 3524, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_29[] = { + instrux + 3519, + instrux + 3521, + instrux + 3523, + instrux + 3525, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_2a[] = { + instrux + 3455, + instrux + 3456, + instrux + 3457, + instrux + 3458, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_2b[] = { + instrux + 3568, + instrux + 3569, + instrux + 3570, + instrux + 3571, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_2c[] = { + instrux + 3468, + instrux + 3469, + instrux + 3470, + instrux + 3471, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_2d[] = { + instrux + 3452, + instrux + 3453, + instrux + 3460, + instrux + 3461, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_2e[] = { + instrux + 3788, + instrux + 3789, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_2f[] = { + instrux + 3434, + instrux + 3435, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_41[] = { + instrux + 4517, + instrux + 4519, + instrux + 4521, + instrux + 4523, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_42[] = { + instrux + 4525, + instrux + 4527, + instrux + 4529, + instrux + 4531, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_44[] = { + instrux + 4533, + instrux + 4535, + instrux + 4537, + instrux + 4539, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_45[] = { + instrux + 4541, + instrux + 4543, + instrux + 4545, + instrux + 4547, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_46[] = { + instrux + 4587, + instrux + 4589, + instrux + 4591, + instrux + 4593, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_47[] = { + instrux + 4595, + instrux + 4597, + instrux + 4599, + instrux + 4601, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_4a[] = { + instrux + 4509, + instrux + 4511, + instrux + 4513, + instrux + 4515, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_4b[] = { + instrux + 4581, + instrux + 4583, + instrux + 4585, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_50[] = { + instrux + 3556, + instrux + 3557, + instrux + 3558, + instrux + 3559, + instrux + 3560, + instrux + 3561, + instrux + 3562, + instrux + 3563, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_51[] = { + instrux + 3771, + instrux + 3772, + instrux + 3773, + instrux + 3774, + instrux + 3775, + instrux + 3776, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_52[] = { + instrux + 3758, + instrux + 3759, + instrux + 3760, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_53[] = { + instrux + 3755, + instrux + 3756, + instrux + 3757, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_54[] = { + instrux + 3132, + instrux + 3133, + instrux + 3134, + instrux + 3135, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_55[] = { + instrux + 3136, + instrux + 3137, + instrux + 3138, + instrux + 3139, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_56[] = { + instrux + 3599, + instrux + 3600, + instrux + 3601, + instrux + 3602, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_57[] = { + instrux + 3798, + instrux + 3799, + instrux + 3800, + instrux + 3801, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_58[] = { + instrux + 3122, + instrux + 3123, + instrux + 3124, + instrux + 3125, + instrux + 3126, + instrux + 3127, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_59[] = { + instrux + 3593, + instrux + 3594, + instrux + 3595, + instrux + 3596, + instrux + 3597, + instrux + 3598, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_5a[] = { + instrux + 3444, + instrux + 3445, + instrux + 3446, + instrux + 3447, + instrux + 3450, + instrux + 3451, + instrux + 3454, + instrux + 3459, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_5b[] = { + instrux + 3438, + instrux + 3439, + instrux + 3448, + instrux + 3449, + instrux + 3466, + instrux + 3467, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_5c[] = { + instrux + 3778, + instrux + 3779, + instrux + 3780, + instrux + 3781, + instrux + 3782, + instrux + 3783, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_5d[] = { + instrux + 3512, + instrux + 3513, + instrux + 3514, + instrux + 3515, + instrux + 3516, + instrux + 3517, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_5e[] = { + instrux + 3472, + instrux + 3473, + instrux + 3474, + instrux + 3475, + instrux + 3476, + instrux + 3477, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_5f[] = { + instrux + 3506, + instrux + 3507, + instrux + 3508, + instrux + 3509, + instrux + 3510, + instrux + 3511, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_60[] = { + instrux + 3750, + instrux + 4303, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_61[] = { + instrux + 3751, + instrux + 4304, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_62[] = { + instrux + 3752, + instrux + 4305, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_63[] = { + instrux + 3606, + instrux + 4190, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_64[] = { + instrux + 3633, + instrux + 4213, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_65[] = { + instrux + 3634, + instrux + 4214, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_66[] = { + instrux + 3635, + instrux + 4215, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_67[] = { + instrux + 3608, + instrux + 4193, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_68[] = { + instrux + 3746, + instrux + 4299, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_69[] = { + instrux + 3747, + instrux + 4300, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_6a[] = { + instrux + 3748, + instrux + 4301, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_6b[] = { + instrux + 3607, + instrux + 4191, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_6c[] = { + instrux + 3753, + instrux + 4306, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_6d[] = { + instrux + 3749, + instrux + 4302, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_6e[] = { + instrux + 3526, + instrux + 3530, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_6f[] = { + instrux + 3534, + instrux + 3536, + instrux + 3538, + instrux + 3540, + instrux + 3542, + instrux + 3544, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_70[] = { + instrux + 3712, + instrux + 3713, + instrux + 3714, + instrux + 4267, + instrux + 4268, + instrux + 4269, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_71[] = { + instrux + 3721, + instrux + 3727, + instrux + 3731, + instrux + 4275, + instrux + 4281, + instrux + 4286, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_72[] = { + instrux + 3723, + instrux + 3729, + instrux + 3733, + instrux + 4277, + instrux + 4283, + instrux + 4288, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_73[] = { + instrux + 3718, + instrux + 3719, + instrux + 3725, + instrux + 3735, + instrux + 4273, + instrux + 4279, + instrux + 4284, + instrux + 4290, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_74[] = { + instrux + 3629, + instrux + 4209, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_75[] = { + instrux + 3630, + instrux + 4210, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_76[] = { + instrux + 3631, + instrux + 4211, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_77[] = { + instrux + 3802, + instrux + 3803, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_7c[] = { + instrux + 3483, + instrux + 3484, + instrux + 3485, + instrux + 3486, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_7d[] = { + instrux + 3487, + instrux + 3488, + instrux + 3489, + instrux + 3490, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_7e[] = { + instrux + 3527, + instrux + 3528, + instrux + 3531, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_7f[] = { + instrux + 3535, + instrux + 3537, + instrux + 3539, + instrux + 3541, + instrux + 3543, + instrux + 3545, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_90[] = { + instrux + 4477, + instrux + 4479, + instrux + 4481, + instrux + 4483, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_91[] = { + instrux + 4485, + instrux + 4487, + instrux + 4489, + instrux + 4491, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_92[] = { + instrux + 4493, + instrux + 4495, + instrux + 4501, + instrux + 4503, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_93[] = { + instrux + 4497, + instrux + 4499, + instrux + 4505, + instrux + 4507, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_98[] = { + instrux + 4549, + instrux + 4551, + instrux + 4553, + instrux + 4555, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_99[] = { + instrux + 4573, + instrux + 4575, + instrux + 4577, + instrux + 4579, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_ae[] = { + instrux + 3496, + instrux + 3777, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_c2[] = { + instrux + 3152, + instrux + 3153, + instrux + 3154, + instrux + 3155, + instrux + 3156, + instrux + 3157, + instrux + 3158, + instrux + 3159, + instrux + 3160, + instrux + 3161, + instrux + 3162, + instrux + 3163, + instrux + 3164, + instrux + 3165, + instrux + 3166, + instrux + 3167, + instrux + 3168, + instrux + 3169, + instrux + 3170, + instrux + 3171, + instrux + 3172, + instrux + 3173, + instrux + 3174, + instrux + 3175, + instrux + 3176, + instrux + 3177, + instrux + 3178, + instrux + 3179, + instrux + 3180, + instrux + 3181, + instrux + 3182, + instrux + 3183, + instrux + 3184, + instrux + 3185, + instrux + 3186, + instrux + 3187, + instrux + 3188, + instrux + 3189, + instrux + 3190, + instrux + 3191, + instrux + 3192, + instrux + 3193, + instrux + 3194, + instrux + 3195, + instrux + 3196, + instrux + 3197, + instrux + 3198, + instrux + 3199, + instrux + 3200, + instrux + 3201, + instrux + 3202, + instrux + 3203, + instrux + 3204, + instrux + 3205, + instrux + 3206, + instrux + 3207, + instrux + 3208, + instrux + 3209, + instrux + 3210, + instrux + 3211, + instrux + 3212, + instrux + 3213, + instrux + 3214, + instrux + 3215, + instrux + 3216, + instrux + 3217, + instrux + 3218, + instrux + 3219, + instrux + 3220, + instrux + 3221, + instrux + 3222, + instrux + 3223, + instrux + 3224, + instrux + 3225, + instrux + 3226, + instrux + 3227, + instrux + 3228, + instrux + 3229, + instrux + 3230, + instrux + 3231, + instrux + 3232, + instrux + 3233, + instrux + 3234, + instrux + 3235, + instrux + 3236, + instrux + 3237, + instrux + 3238, + instrux + 3239, + instrux + 3240, + instrux + 3241, + instrux + 3242, + instrux + 3243, + instrux + 3244, + instrux + 3245, + instrux + 3246, + instrux + 3247, + instrux + 3248, + instrux + 3249, + instrux + 3250, + instrux + 3251, + instrux + 3252, + instrux + 3253, + instrux + 3254, + instrux + 3255, + instrux + 3256, + instrux + 3257, + instrux + 3258, + instrux + 3259, + instrux + 3260, + instrux + 3261, + instrux + 3262, + instrux + 3263, + instrux + 3264, + instrux + 3265, + instrux + 3266, + instrux + 3267, + instrux + 3268, + instrux + 3269, + instrux + 3270, + instrux + 3271, + instrux + 3272, + instrux + 3273, + instrux + 3274, + instrux + 3275, + instrux + 3276, + instrux + 3277, + instrux + 3278, + instrux + 3279, + instrux + 3280, + instrux + 3281, + instrux + 3282, + instrux + 3283, + instrux + 3284, + instrux + 3285, + instrux + 3286, + instrux + 3287, + instrux + 3288, + instrux + 3289, + instrux + 3290, + instrux + 3291, + instrux + 3292, + instrux + 3293, + instrux + 3294, + instrux + 3295, + instrux + 3296, + instrux + 3297, + instrux + 3298, + instrux + 3299, + instrux + 3300, + instrux + 3301, + instrux + 3302, + instrux + 3303, + instrux + 3304, + instrux + 3305, + instrux + 3306, + instrux + 3307, + instrux + 3308, + instrux + 3309, + instrux + 3310, + instrux + 3311, + instrux + 3312, + instrux + 3313, + instrux + 3314, + instrux + 3315, + instrux + 3316, + instrux + 3317, + instrux + 3318, + instrux + 3319, + instrux + 3320, + instrux + 3321, + instrux + 3322, + instrux + 3323, + instrux + 3324, + instrux + 3325, + instrux + 3326, + instrux + 3327, + instrux + 3328, + instrux + 3329, + instrux + 3330, + instrux + 3331, + instrux + 3332, + instrux + 3333, + instrux + 3334, + instrux + 3335, + instrux + 3336, + instrux + 3337, + instrux + 3338, + instrux + 3339, + instrux + 3340, + instrux + 3341, + instrux + 3342, + instrux + 3343, + instrux + 3344, + instrux + 3345, + instrux + 3346, + instrux + 3347, + instrux + 3348, + instrux + 3349, + instrux + 3350, + instrux + 3351, + instrux + 3352, + instrux + 3353, + instrux + 3354, + instrux + 3355, + instrux + 3356, + instrux + 3357, + instrux + 3358, + instrux + 3359, + instrux + 3360, + instrux + 3361, + instrux + 3362, + instrux + 3363, + instrux + 3364, + instrux + 3365, + instrux + 3366, + instrux + 3367, + instrux + 3368, + instrux + 3369, + instrux + 3370, + instrux + 3371, + instrux + 3372, + instrux + 3373, + instrux + 3374, + instrux + 3375, + instrux + 3376, + instrux + 3377, + instrux + 3378, + instrux + 3379, + instrux + 3380, + instrux + 3381, + instrux + 3382, + instrux + 3383, + instrux + 3384, + instrux + 3385, + instrux + 3386, + instrux + 3387, + instrux + 3388, + instrux + 3389, + instrux + 3390, + instrux + 3391, + instrux + 3392, + instrux + 3393, + instrux + 3394, + instrux + 3395, + instrux + 3396, + instrux + 3397, + instrux + 3398, + instrux + 3399, + instrux + 3400, + instrux + 3401, + instrux + 3402, + instrux + 3403, + instrux + 3404, + instrux + 3405, + instrux + 3406, + instrux + 3407, + instrux + 3408, + instrux + 3409, + instrux + 3410, + instrux + 3411, + instrux + 3412, + instrux + 3413, + instrux + 3414, + instrux + 3415, + instrux + 3416, + instrux + 3417, + instrux + 3418, + instrux + 3419, + instrux + 3420, + instrux + 3421, + instrux + 3422, + instrux + 3423, + instrux + 3424, + instrux + 3425, + instrux + 3426, + instrux + 3427, + instrux + 3428, + instrux + 3429, + instrux + 3430, + instrux + 3431, + instrux + 3432, + instrux + 3433, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_c4[] = { + instrux + 3667, + instrux + 3668, + instrux + 3669, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_c5[] = { + instrux + 3649, + instrux + 3650, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_c6[] = { + instrux + 3767, + instrux + 3768, + instrux + 3769, + instrux + 3770, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_d0[] = { + instrux + 3128, + instrux + 3129, + instrux + 3130, + instrux + 3131, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_d1[] = { + instrux + 3730, + instrux + 4285, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_d2[] = { + instrux + 3732, + instrux + 4287, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_d3[] = { + instrux + 3734, + instrux + 4289, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_d4[] = { + instrux + 3613, + instrux + 4197, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_d5[] = { + instrux + 3705, + instrux + 4261, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_d6[] = { + instrux + 3529, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_d7[] = { + instrux + 3688, + instrux + 3689, + instrux + 4237, + instrux + 4238, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_d8[] = { + instrux + 3744, + instrux + 4297, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_d9[] = { + instrux + 3745, + instrux + 4298, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_da[] = { + instrux + 3685, + instrux + 4234, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_db[] = { + instrux + 3619, + instrux + 4203, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_dc[] = { + instrux + 3616, + instrux + 4200, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_dd[] = { + instrux + 3617, + instrux + 4201, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_de[] = { + instrux + 3679, + instrux + 4228, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_df[] = { + instrux + 3620, + instrux + 4204, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_e0[] = { + instrux + 3621, + instrux + 4205, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_e1[] = { + instrux + 3726, + instrux + 4280, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_e2[] = { + instrux + 3728, + instrux + 4282, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_e3[] = { + instrux + 3622, + instrux + 4206, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_e4[] = { + instrux + 3702, + instrux + 4259, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_e5[] = { + instrux + 3704, + instrux + 4260, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_e6[] = { + instrux + 3436, + instrux + 3437, + instrux + 3440, + instrux + 3441, + instrux + 3442, + instrux + 3443, + instrux + 3462, + instrux + 3463, + instrux + 3464, + instrux + 3465, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_e7[] = { + instrux + 3564, + instrux + 3565, + instrux + 3566, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_e8[] = { + instrux + 3742, + instrux + 4295, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_e9[] = { + instrux + 3743, + instrux + 4296, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_ea[] = { + instrux + 3683, + instrux + 4232, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_eb[] = { + instrux + 3709, + instrux + 4264, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_ec[] = { + instrux + 3614, + instrux + 4198, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_ed[] = { + instrux + 3615, + instrux + 4199, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_ee[] = { + instrux + 3677, + instrux + 4226, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_ef[] = { + instrux + 3754, + instrux + 4307, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_f0[] = { + instrux + 3493, + instrux + 3494, + instrux + 3495, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_f1[] = { + instrux + 3720, + instrux + 4274, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_f2[] = { + instrux + 3722, + instrux + 4276, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_f3[] = { + instrux + 3724, + instrux + 4278, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_f4[] = { + instrux + 3707, + instrux + 4263, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_f5[] = { + instrux + 3674, + instrux + 4224, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_f6[] = { + instrux + 3710, + instrux + 4265, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_f7[] = { + instrux + 3497, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_f8[] = { + instrux + 3738, + instrux + 4291, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_f9[] = { + instrux + 3739, + instrux + 4292, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_fa[] = { + instrux + 3740, + instrux + 4293, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_fb[] = { + instrux + 3741, + instrux + 4294, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_fc[] = { + instrux + 3610, + instrux + 4194, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_fd[] = { + instrux + 3611, + instrux + 4195, + NULL +}; + +static const struct itemplate * const itbl_vex_map1_fe[] = { + instrux + 3612, + instrux + 4196, + NULL +}; + +static const struct itemplate * const * const itbl_vex_map1[256] = { + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_vex_map1_10, + itbl_vex_map1_11, + itbl_vex_map1_12, + itbl_vex_map1_13, + itbl_vex_map1_14, + itbl_vex_map1_15, + itbl_vex_map1_16, + itbl_vex_map1_17, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_vex_map1_28, + itbl_vex_map1_29, + itbl_vex_map1_2a, + itbl_vex_map1_2b, + itbl_vex_map1_2c, + itbl_vex_map1_2d, + itbl_vex_map1_2e, + itbl_vex_map1_2f, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_vex_map1_41, + itbl_vex_map1_42, + NULL, + itbl_vex_map1_44, + itbl_vex_map1_45, + itbl_vex_map1_46, + itbl_vex_map1_47, + NULL, + NULL, + itbl_vex_map1_4a, + itbl_vex_map1_4b, + NULL, + NULL, + NULL, + NULL, + itbl_vex_map1_50, + itbl_vex_map1_51, + itbl_vex_map1_52, + itbl_vex_map1_53, + itbl_vex_map1_54, + itbl_vex_map1_55, + itbl_vex_map1_56, + itbl_vex_map1_57, + itbl_vex_map1_58, + itbl_vex_map1_59, + itbl_vex_map1_5a, + itbl_vex_map1_5b, + itbl_vex_map1_5c, + itbl_vex_map1_5d, + itbl_vex_map1_5e, + itbl_vex_map1_5f, + itbl_vex_map1_60, + itbl_vex_map1_61, + itbl_vex_map1_62, + itbl_vex_map1_63, + itbl_vex_map1_64, + itbl_vex_map1_65, + itbl_vex_map1_66, + itbl_vex_map1_67, + itbl_vex_map1_68, + itbl_vex_map1_69, + itbl_vex_map1_6a, + itbl_vex_map1_6b, + itbl_vex_map1_6c, + itbl_vex_map1_6d, + itbl_vex_map1_6e, + itbl_vex_map1_6f, + itbl_vex_map1_70, + itbl_vex_map1_71, + itbl_vex_map1_72, + itbl_vex_map1_73, + itbl_vex_map1_74, + itbl_vex_map1_75, + itbl_vex_map1_76, + itbl_vex_map1_77, + NULL, + NULL, + NULL, + NULL, + itbl_vex_map1_7c, + itbl_vex_map1_7d, + itbl_vex_map1_7e, + itbl_vex_map1_7f, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_vex_map1_90, + itbl_vex_map1_91, + itbl_vex_map1_92, + itbl_vex_map1_93, + NULL, + NULL, + NULL, + NULL, + itbl_vex_map1_98, + itbl_vex_map1_99, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_vex_map1_ae, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_vex_map1_c2, + NULL, + itbl_vex_map1_c4, + itbl_vex_map1_c5, + itbl_vex_map1_c6, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_vex_map1_d0, + itbl_vex_map1_d1, + itbl_vex_map1_d2, + itbl_vex_map1_d3, + itbl_vex_map1_d4, + itbl_vex_map1_d5, + itbl_vex_map1_d6, + itbl_vex_map1_d7, + itbl_vex_map1_d8, + itbl_vex_map1_d9, + itbl_vex_map1_da, + itbl_vex_map1_db, + itbl_vex_map1_dc, + itbl_vex_map1_dd, + itbl_vex_map1_de, + itbl_vex_map1_df, + itbl_vex_map1_e0, + itbl_vex_map1_e1, + itbl_vex_map1_e2, + itbl_vex_map1_e3, + itbl_vex_map1_e4, + itbl_vex_map1_e5, + itbl_vex_map1_e6, + itbl_vex_map1_e7, + itbl_vex_map1_e8, + itbl_vex_map1_e9, + itbl_vex_map1_ea, + itbl_vex_map1_eb, + itbl_vex_map1_ec, + itbl_vex_map1_ed, + itbl_vex_map1_ee, + itbl_vex_map1_ef, + itbl_vex_map1_f0, + itbl_vex_map1_f1, + itbl_vex_map1_f2, + itbl_vex_map1_f3, + itbl_vex_map1_f4, + itbl_vex_map1_f5, + itbl_vex_map1_f6, + itbl_vex_map1_f7, + itbl_vex_map1_f8, + itbl_vex_map1_f9, + itbl_vex_map1_fa, + itbl_vex_map1_fb, + itbl_vex_map1_fc, + itbl_vex_map1_fd, + itbl_vex_map1_fe, + NULL, +}; + +static const struct itemplate * const itbl_vex_map2_00[] = { + instrux + 3711, + instrux + 4266, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_01[] = { + instrux + 3657, + instrux + 4217, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_02[] = { + instrux + 3658, + instrux + 4218, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_03[] = { + instrux + 3659, + instrux + 4219, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_04[] = { + instrux + 3675, + instrux + 4223, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_05[] = { + instrux + 3661, + instrux + 4220, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_06[] = { + instrux + 3662, + instrux + 4221, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_07[] = { + instrux + 3663, + instrux + 4222, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_08[] = { + instrux + 3715, + instrux + 4270, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_09[] = { + instrux + 3716, + instrux + 4271, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_0a[] = { + instrux + 3717, + instrux + 4272, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_0b[] = { + instrux + 3703, + instrux + 4258, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_0c[] = { + instrux + 3641, + instrux + 3642, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_0d[] = { + instrux + 3637, + instrux + 3638, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_0e[] = { + instrux + 3784, + instrux + 3785, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_0f[] = { + instrux + 3786, + instrux + 3787, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_13[] = { + instrux + 4026, + instrux + 4027, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_16[] = { + instrux + 4333, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_17[] = { + instrux + 3736, + instrux + 3737, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_18[] = { + instrux + 3148, + instrux + 3149, + instrux + 4309, + instrux + 4310, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_19[] = { + instrux + 3150, + instrux + 4311, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_1a[] = { + instrux + 3151, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_1c[] = { + instrux + 3603, + instrux + 4187, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_1d[] = { + instrux + 3604, + instrux + 4188, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_1e[] = { + instrux + 3605, + instrux + 4189, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_20[] = { + instrux + 3690, + instrux + 4239, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_21[] = { + instrux + 3691, + instrux + 4240, + instrux + 4241, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_22[] = { + instrux + 3692, + instrux + 4242, + instrux + 4243, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_23[] = { + instrux + 3693, + instrux + 4244, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_24[] = { + instrux + 3694, + instrux + 4245, + instrux + 4246, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_25[] = { + instrux + 3695, + instrux + 4247, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_28[] = { + instrux + 3708, + instrux + 4257, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_29[] = { + instrux + 3632, + instrux + 4212, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_2a[] = { + instrux + 3567, + instrux + 4308, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_2b[] = { + instrux + 3609, + instrux + 4192, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_2c[] = { + instrux + 3498, + instrux + 3499, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_2d[] = { + instrux + 3502, + instrux + 3503, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_2e[] = { + instrux + 3500, + instrux + 3501, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_2f[] = { + instrux + 3504, + instrux + 3505, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_30[] = { + instrux + 3696, + instrux + 4248, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_31[] = { + instrux + 3697, + instrux + 4249, + instrux + 4250, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_32[] = { + instrux + 3698, + instrux + 4251, + instrux + 4252, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_33[] = { + instrux + 3699, + instrux + 4253, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_34[] = { + instrux + 3700, + instrux + 4254, + instrux + 4255, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_35[] = { + instrux + 3701, + instrux + 4256, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_36[] = { + instrux + 4331, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_37[] = { + instrux + 3636, + instrux + 4216, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_38[] = { + instrux + 3682, + instrux + 4231, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_39[] = { + instrux + 3684, + instrux + 4233, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_3a[] = { + instrux + 3686, + instrux + 4235, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_3b[] = { + instrux + 3687, + instrux + 4236, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_3c[] = { + instrux + 3676, + instrux + 4225, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_3d[] = { + instrux + 3678, + instrux + 4227, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_3e[] = { + instrux + 3680, + instrux + 4229, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_3f[] = { + instrux + 3681, + instrux + 4230, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_40[] = { + instrux + 3706, + instrux + 4262, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_41[] = { + instrux + 3660, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_45[] = { + instrux + 4352, + instrux + 4353, + instrux + 4354, + instrux + 4355, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_46[] = { + instrux + 4350, + instrux + 4351, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_47[] = { + instrux + 4346, + instrux + 4347, + instrux + 4348, + instrux + 4349, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_48[] = { + instrux + 6922, + instrux + 6927, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_49[] = { + instrux + 6872, + instrux + 6874, + instrux + 6888, + instrux + 6891, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_4a[] = { + instrux + 6892, + instrux + 6894, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_4b[] = { + instrux + 6884, + instrux + 6886, + instrux + 6889, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_50[] = { + instrux + 4441, + instrux + 4442, + instrux + 4449, + instrux + 4450, + instrux + 4453, + instrux + 4454, + instrux + 4457, + instrux + 4458, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_51[] = { + instrux + 4443, + instrux + 4444, + instrux + 4451, + instrux + 4452, + instrux + 4455, + instrux + 4456, + instrux + 4459, + instrux + 4460, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_52[] = { + instrux + 4445, + instrux + 4446, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_53[] = { + instrux + 4447, + instrux + 4448, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_58[] = { + instrux + 4323, + instrux + 4324, + instrux + 4325, + instrux + 4326, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_59[] = { + instrux + 4327, + instrux + 4328, + instrux + 4329, + instrux + 4330, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_5a[] = { + instrux + 4312, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_5c[] = { + instrux + 6876, + instrux + 6877, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_5e[] = { + instrux + 6880, + instrux + 6881, + instrux + 6882, + instrux + 6883, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_5f[] = { + instrux + 6928, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_6b[] = { + instrux + 6904, + instrux + 6905, + instrux + 6923, + instrux + 6924, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_6c[] = { + instrux + 6878, + instrux + 6879, + instrux + 6925, + instrux + 6926, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_6e[] = { + instrux + 6896, + instrux + 6898, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_6f[] = { + instrux + 6897, + instrux + 6899, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_72[] = { + instrux + 4439, + instrux + 4440, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_78[] = { + instrux + 4315, + instrux + 4316, + instrux + 4317, + instrux + 4318, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_79[] = { + instrux + 4319, + instrux + 4320, + instrux + 4321, + instrux + 4322, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_8c[] = { + instrux + 4338, + instrux + 4339, + instrux + 4340, + instrux + 4341, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_8e[] = { + instrux + 4342, + instrux + 4343, + instrux + 4344, + instrux + 4345, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_90[] = { + instrux + 4364, + instrux + 4366, + instrux + 4368, + instrux + 4370, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_91[] = { + instrux + 4365, + instrux + 4367, + instrux + 4369, + instrux + 4371, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_92[] = { + instrux + 4356, + instrux + 4358, + instrux + 4360, + instrux + 4362, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_93[] = { + instrux + 4357, + instrux + 4359, + instrux + 4361, + instrux + 4363, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_96[] = { + instrux + 3858, + instrux + 3859, + instrux + 3860, + instrux + 3861, + instrux + 3862, + instrux + 3863, + instrux + 3864, + instrux + 3865, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_97[] = { + instrux + 3906, + instrux + 3907, + instrux + 3908, + instrux + 3909, + instrux + 3910, + instrux + 3911, + instrux + 3912, + instrux + 3913, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_98[] = { + instrux + 3834, + instrux + 3835, + instrux + 3836, + instrux + 3837, + instrux + 3838, + instrux + 3839, + instrux + 3840, + instrux + 3841, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_99[] = { + instrux + 3978, + instrux + 3979, + instrux + 3980, + instrux + 3981, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_9a[] = { + instrux + 3882, + instrux + 3883, + instrux + 3884, + instrux + 3885, + instrux + 3886, + instrux + 3887, + instrux + 3888, + instrux + 3889, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_9b[] = { + instrux + 3990, + instrux + 3991, + instrux + 3992, + instrux + 3993, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_9c[] = { + instrux + 3930, + instrux + 3931, + instrux + 3932, + instrux + 3933, + instrux + 3934, + instrux + 3935, + instrux + 3936, + instrux + 3937, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_9d[] = { + instrux + 4002, + instrux + 4003, + instrux + 4004, + instrux + 4005, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_9e[] = { + instrux + 3954, + instrux + 3955, + instrux + 3956, + instrux + 3957, + instrux + 3958, + instrux + 3959, + instrux + 3960, + instrux + 3961, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_9f[] = { + instrux + 4014, + instrux + 4015, + instrux + 4016, + instrux + 4017, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_a6[] = { + instrux + 3866, + instrux + 3867, + instrux + 3868, + instrux + 3869, + instrux + 3870, + instrux + 3871, + instrux + 3872, + instrux + 3873, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_a7[] = { + instrux + 3914, + instrux + 3915, + instrux + 3916, + instrux + 3917, + instrux + 3918, + instrux + 3919, + instrux + 3920, + instrux + 3921, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_a8[] = { + instrux + 3842, + instrux + 3843, + instrux + 3844, + instrux + 3845, + instrux + 3846, + instrux + 3847, + instrux + 3848, + instrux + 3849, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_a9[] = { + instrux + 3982, + instrux + 3983, + instrux + 3984, + instrux + 3985, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_aa[] = { + instrux + 3890, + instrux + 3891, + instrux + 3892, + instrux + 3893, + instrux + 3894, + instrux + 3895, + instrux + 3896, + instrux + 3897, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_ab[] = { + instrux + 3994, + instrux + 3995, + instrux + 3996, + instrux + 3997, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_ac[] = { + instrux + 3938, + instrux + 3939, + instrux + 3940, + instrux + 3941, + instrux + 3942, + instrux + 3943, + instrux + 3944, + instrux + 3945, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_ad[] = { + instrux + 4006, + instrux + 4007, + instrux + 4008, + instrux + 4009, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_ae[] = { + instrux + 3962, + instrux + 3963, + instrux + 3964, + instrux + 3965, + instrux + 3966, + instrux + 3967, + instrux + 3968, + instrux + 3969, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_af[] = { + instrux + 4018, + instrux + 4019, + instrux + 4020, + instrux + 4021, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_b0[] = { + instrux + 4431, + instrux + 4432, + instrux + 4433, + instrux + 4434, + instrux + 4435, + instrux + 4436, + instrux + 4437, + instrux + 4438, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_b1[] = { + instrux + 4425, + instrux + 4426, + instrux + 4427, + instrux + 4428, + instrux + 4429, + instrux + 4430, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_b4[] = { + instrux + 4475, + instrux + 4476, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_b5[] = { + instrux + 4473, + instrux + 4474, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_b6[] = { + instrux + 3874, + instrux + 3875, + instrux + 3876, + instrux + 3877, + instrux + 3878, + instrux + 3879, + instrux + 3880, + instrux + 3881, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_b7[] = { + instrux + 3922, + instrux + 3923, + instrux + 3924, + instrux + 3925, + instrux + 3926, + instrux + 3927, + instrux + 3928, + instrux + 3929, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_b8[] = { + instrux + 3850, + instrux + 3851, + instrux + 3852, + instrux + 3853, + instrux + 3854, + instrux + 3855, + instrux + 3856, + instrux + 3857, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_b9[] = { + instrux + 3986, + instrux + 3987, + instrux + 3988, + instrux + 3989, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_ba[] = { + instrux + 3898, + instrux + 3899, + instrux + 3900, + instrux + 3901, + instrux + 3902, + instrux + 3903, + instrux + 3904, + instrux + 3905, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_bb[] = { + instrux + 3998, + instrux + 3999, + instrux + 4000, + instrux + 4001, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_bc[] = { + instrux + 3946, + instrux + 3947, + instrux + 3948, + instrux + 3949, + instrux + 3950, + instrux + 3951, + instrux + 3952, + instrux + 3953, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_bd[] = { + instrux + 4010, + instrux + 4011, + instrux + 4012, + instrux + 4013, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_be[] = { + instrux + 3970, + instrux + 3971, + instrux + 3972, + instrux + 3973, + instrux + 3974, + instrux + 3975, + instrux + 3976, + instrux + 3977, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_bf[] = { + instrux + 4022, + instrux + 4023, + instrux + 4024, + instrux + 4025, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_cb[] = { + instrux + 4411, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_cc[] = { + instrux + 4409, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_cd[] = { + instrux + 4410, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_cf[] = { + instrux + 6733, + instrux + 6734, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_d2[] = { + instrux + 4461, + instrux + 4462, + instrux + 4465, + instrux + 4466, + instrux + 4469, + instrux + 4470, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_d3[] = { + instrux + 4463, + instrux + 4464, + instrux + 4467, + instrux + 4468, + instrux + 4471, + instrux + 4472, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_da[] = { + instrux + 4412, + instrux + 4413, + instrux + 4415, + instrux + 4416, + instrux + 4420, + instrux + 4421, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_db[] = { + instrux + 3093, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_dc[] = { + instrux + 3089, + instrux + 3106, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_dd[] = { + instrux + 3090, + instrux + 3107, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_de[] = { + instrux + 3091, + instrux + 3108, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_df[] = { + instrux + 3092, + instrux + 3109, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_e0[] = { + instrux + 2571, + instrux + 2587, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_e1[] = { + instrux + 2568, + instrux + 2584, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_e2[] = { + instrux + 2561, + instrux + 2577, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_e3[] = { + instrux + 2565, + instrux + 2581, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_e4[] = { + instrux + 2575, + instrux + 2591, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_e5[] = { + instrux + 2570, + instrux + 2586, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_e6[] = { + instrux + 2564, + instrux + 2580, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_e7[] = { + instrux + 2560, + instrux + 2576, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_e8[] = { + instrux + 2574, + instrux + 2590, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_e9[] = { + instrux + 2569, + instrux + 2585, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_ea[] = { + instrux + 2572, + instrux + 2588, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_eb[] = { + instrux + 2573, + instrux + 2589, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_ec[] = { + instrux + 2563, + instrux + 2579, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_ed[] = { + instrux + 2567, + instrux + 2583, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_ee[] = { + instrux + 2566, + instrux + 2582, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_ef[] = { + instrux + 2562, + instrux + 2578, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_f2[] = { + instrux + 916, + instrux + 917, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_f3[] = { + instrux + 924, + instrux + 925, + instrux + 928, + instrux + 929, + instrux + 932, + instrux + 933, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_f5[] = { + instrux + 936, + instrux + 937, + instrux + 940, + instrux + 942, + instrux + 944, + instrux + 946, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_f6[] = { + instrux + 778, + instrux + 780, + NULL +}; + +static const struct itemplate * const itbl_vex_map2_f7[] = { + instrux + 510, + instrux + 511, + instrux + 512, + instrux + 514, + instrux + 515, + instrux + 516, + instrux + 920, + instrux + 921, + NULL +}; + +static const struct itemplate * const * const itbl_vex_map2[256] = { + itbl_vex_map2_00, + itbl_vex_map2_01, + itbl_vex_map2_02, + itbl_vex_map2_03, + itbl_vex_map2_04, + itbl_vex_map2_05, + itbl_vex_map2_06, + itbl_vex_map2_07, + itbl_vex_map2_08, + itbl_vex_map2_09, + itbl_vex_map2_0a, + itbl_vex_map2_0b, + itbl_vex_map2_0c, + itbl_vex_map2_0d, + itbl_vex_map2_0e, + itbl_vex_map2_0f, + NULL, + NULL, + NULL, + itbl_vex_map2_13, + NULL, + NULL, + itbl_vex_map2_16, + itbl_vex_map2_17, + itbl_vex_map2_18, + itbl_vex_map2_19, + itbl_vex_map2_1a, + NULL, + itbl_vex_map2_1c, + itbl_vex_map2_1d, + itbl_vex_map2_1e, + NULL, + itbl_vex_map2_20, + itbl_vex_map2_21, + itbl_vex_map2_22, + itbl_vex_map2_23, + itbl_vex_map2_24, + itbl_vex_map2_25, + NULL, + NULL, + itbl_vex_map2_28, + itbl_vex_map2_29, + itbl_vex_map2_2a, + itbl_vex_map2_2b, + itbl_vex_map2_2c, + itbl_vex_map2_2d, + itbl_vex_map2_2e, + itbl_vex_map2_2f, + itbl_vex_map2_30, + itbl_vex_map2_31, + itbl_vex_map2_32, + itbl_vex_map2_33, + itbl_vex_map2_34, + itbl_vex_map2_35, + itbl_vex_map2_36, + itbl_vex_map2_37, + itbl_vex_map2_38, + itbl_vex_map2_39, + itbl_vex_map2_3a, + itbl_vex_map2_3b, + itbl_vex_map2_3c, + itbl_vex_map2_3d, + itbl_vex_map2_3e, + itbl_vex_map2_3f, + itbl_vex_map2_40, + itbl_vex_map2_41, + NULL, + NULL, + NULL, + itbl_vex_map2_45, + itbl_vex_map2_46, + itbl_vex_map2_47, + itbl_vex_map2_48, + itbl_vex_map2_49, + itbl_vex_map2_4a, + itbl_vex_map2_4b, + NULL, + NULL, + NULL, + NULL, + itbl_vex_map2_50, + itbl_vex_map2_51, + itbl_vex_map2_52, + itbl_vex_map2_53, + NULL, + NULL, + NULL, + NULL, + itbl_vex_map2_58, + itbl_vex_map2_59, + itbl_vex_map2_5a, + NULL, + itbl_vex_map2_5c, + NULL, + itbl_vex_map2_5e, + itbl_vex_map2_5f, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_vex_map2_6b, + itbl_vex_map2_6c, + NULL, + itbl_vex_map2_6e, + itbl_vex_map2_6f, + NULL, + NULL, + itbl_vex_map2_72, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_vex_map2_78, + itbl_vex_map2_79, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_vex_map2_8c, + NULL, + itbl_vex_map2_8e, + NULL, + itbl_vex_map2_90, + itbl_vex_map2_91, + itbl_vex_map2_92, + itbl_vex_map2_93, + NULL, + NULL, + itbl_vex_map2_96, + itbl_vex_map2_97, + itbl_vex_map2_98, + itbl_vex_map2_99, + itbl_vex_map2_9a, + itbl_vex_map2_9b, + itbl_vex_map2_9c, + itbl_vex_map2_9d, + itbl_vex_map2_9e, + itbl_vex_map2_9f, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_vex_map2_a6, + itbl_vex_map2_a7, + itbl_vex_map2_a8, + itbl_vex_map2_a9, + itbl_vex_map2_aa, + itbl_vex_map2_ab, + itbl_vex_map2_ac, + itbl_vex_map2_ad, + itbl_vex_map2_ae, + itbl_vex_map2_af, + itbl_vex_map2_b0, + itbl_vex_map2_b1, + NULL, + NULL, + itbl_vex_map2_b4, + itbl_vex_map2_b5, + itbl_vex_map2_b6, + itbl_vex_map2_b7, + itbl_vex_map2_b8, + itbl_vex_map2_b9, + itbl_vex_map2_ba, + itbl_vex_map2_bb, + itbl_vex_map2_bc, + itbl_vex_map2_bd, + itbl_vex_map2_be, + itbl_vex_map2_bf, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_vex_map2_cb, + itbl_vex_map2_cc, + itbl_vex_map2_cd, + NULL, + itbl_vex_map2_cf, + NULL, + NULL, + itbl_vex_map2_d2, + itbl_vex_map2_d3, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_vex_map2_da, + itbl_vex_map2_db, + itbl_vex_map2_dc, + itbl_vex_map2_dd, + itbl_vex_map2_de, + itbl_vex_map2_df, + itbl_vex_map2_e0, + itbl_vex_map2_e1, + itbl_vex_map2_e2, + itbl_vex_map2_e3, + itbl_vex_map2_e4, + itbl_vex_map2_e5, + itbl_vex_map2_e6, + itbl_vex_map2_e7, + itbl_vex_map2_e8, + itbl_vex_map2_e9, + itbl_vex_map2_ea, + itbl_vex_map2_eb, + itbl_vex_map2_ec, + itbl_vex_map2_ed, + itbl_vex_map2_ee, + itbl_vex_map2_ef, + NULL, + NULL, + itbl_vex_map2_f2, + itbl_vex_map2_f3, + NULL, + itbl_vex_map2_f5, + itbl_vex_map2_f6, + itbl_vex_map2_f7, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, +}; + +static const struct itemplate * const itbl_vex_map3_00[] = { + instrux + 4334, + NULL +}; + +static const struct itemplate * const itbl_vex_map3_01[] = { + instrux + 4332, + NULL +}; + +static const struct itemplate * const itbl_vex_map3_02[] = { + instrux + 4313, + instrux + 4314, + NULL +}; + +static const struct itemplate * const itbl_vex_map3_04[] = { + instrux + 3643, + instrux + 3644, + NULL +}; + +static const struct itemplate * const itbl_vex_map3_05[] = { + instrux + 3639, + instrux + 3640, + NULL +}; + +static const struct itemplate * const itbl_vex_map3_06[] = { + instrux + 3645, + NULL +}; + +static const struct itemplate * const itbl_vex_map3_08[] = { + instrux + 3763, + instrux + 3764, + NULL +}; + +static const struct itemplate * const itbl_vex_map3_09[] = { + instrux + 3761, + instrux + 3762, + NULL +}; + +static const struct itemplate * const itbl_vex_map3_0a[] = { + instrux + 3766, + NULL +}; + +static const struct itemplate * const itbl_vex_map3_0b[] = { + instrux + 3765, + NULL +}; + +static const struct itemplate * const itbl_vex_map3_0c[] = { + instrux + 3142, + instrux + 3143, + NULL +}; + +static const struct itemplate * const itbl_vex_map3_0d[] = { + instrux + 3140, + instrux + 3141, + NULL +}; + +static const struct itemplate * const itbl_vex_map3_0e[] = { + instrux + 3624, + instrux + 4208, + NULL +}; + +static const struct itemplate * const itbl_vex_map3_0f[] = { + instrux + 3618, + instrux + 4202, + NULL +}; + +static const struct itemplate * const itbl_vex_map3_14[] = { + instrux + 3646, + instrux + 3647, + instrux + 3648, + NULL +}; + +static const struct itemplate * const itbl_vex_map3_15[] = { + instrux + 3651, + instrux + 3652, + instrux + 3653, + NULL +}; + +static const struct itemplate * const itbl_vex_map3_16[] = { + instrux + 3654, + instrux + 3655, + instrux + 3656, + NULL +}; + +static const struct itemplate * const itbl_vex_map3_17[] = { + instrux + 3482, + NULL +}; + +static const struct itemplate * const itbl_vex_map3_18[] = { + instrux + 3491, + NULL +}; + +static const struct itemplate * const itbl_vex_map3_19[] = { + instrux + 3481, + NULL +}; + +static const struct itemplate * const itbl_vex_map3_1d[] = { + instrux + 4028, + instrux + 4029, + NULL +}; + +static const struct itemplate * const itbl_vex_map3_20[] = { + instrux + 3664, + instrux + 3665, + instrux + 3666, + NULL +}; + +static const struct itemplate * const itbl_vex_map3_21[] = { + instrux + 3492, + NULL +}; + +static const struct itemplate * const itbl_vex_map3_22[] = { + instrux + 3670, + instrux + 3671, + instrux + 3672, + instrux + 3673, + NULL +}; + +static const struct itemplate * const itbl_vex_map3_30[] = { + instrux + 4565, + instrux + 4567, + NULL +}; + +static const struct itemplate * const itbl_vex_map3_31[] = { + instrux + 4569, + instrux + 4571, + NULL +}; + +static const struct itemplate * const itbl_vex_map3_32[] = { + instrux + 4557, + instrux + 4559, + NULL +}; + +static const struct itemplate * const itbl_vex_map3_33[] = { + instrux + 4561, + instrux + 4563, + NULL +}; + +static const struct itemplate * const itbl_vex_map3_38[] = { + instrux + 4337, + NULL +}; + +static const struct itemplate * const itbl_vex_map3_39[] = { + instrux + 4336, + NULL +}; + +static const struct itemplate * const itbl_vex_map3_40[] = { + instrux + 3479, + instrux + 3480, + NULL +}; + +static const struct itemplate * const itbl_vex_map3_41[] = { + instrux + 3478, + NULL +}; + +static const struct itemplate * const itbl_vex_map3_42[] = { + instrux + 3592, + instrux + 4186, + NULL +}; + +static const struct itemplate * const itbl_vex_map3_44[] = { + instrux + 3809, + instrux + 3810, + instrux + 3811, + instrux + 3812, + instrux + 3813, + instrux + 3814, + instrux + 3815, + instrux + 3816, + instrux + 3817, + instrux + 3818, + NULL +}; + +static const struct itemplate * const itbl_vex_map3_46[] = { + instrux + 4335, + NULL +}; + +static const struct itemplate * const itbl_vex_map3_4a[] = { + instrux + 3146, + instrux + 3147, + NULL +}; + +static const struct itemplate * const itbl_vex_map3_4b[] = { + instrux + 3144, + instrux + 3145, + NULL +}; + +static const struct itemplate * const itbl_vex_map3_4c[] = { + instrux + 3623, + instrux + 4207, + NULL +}; + +static const struct itemplate * const itbl_vex_map3_5c[] = { + instrux + 4063, + instrux + 4064, + instrux + 4065, + instrux + 4066, + NULL +}; + +static const struct itemplate * const itbl_vex_map3_5d[] = { + instrux + 4059, + instrux + 4060, + instrux + 4061, + instrux + 4062, + NULL +}; + +static const struct itemplate * const itbl_vex_map3_5e[] = { + instrux + 4071, + instrux + 4072, + instrux + 4073, + instrux + 4074, + NULL +}; + +static const struct itemplate * const itbl_vex_map3_5f[] = { + instrux + 4067, + instrux + 4068, + instrux + 4069, + instrux + 4070, + NULL +}; + +static const struct itemplate * const itbl_vex_map3_60[] = { + instrux + 3626, + NULL +}; + +static const struct itemplate * const itbl_vex_map3_61[] = { + instrux + 3625, + NULL +}; + +static const struct itemplate * const itbl_vex_map3_62[] = { + instrux + 3628, + NULL +}; + +static const struct itemplate * const itbl_vex_map3_63[] = { + instrux + 3627, + NULL +}; + +static const struct itemplate * const itbl_vex_map3_68[] = { + instrux + 4051, + instrux + 4052, + instrux + 4053, + instrux + 4054, + NULL +}; + +static const struct itemplate * const itbl_vex_map3_69[] = { + instrux + 4047, + instrux + 4048, + instrux + 4049, + instrux + 4050, + NULL +}; + +static const struct itemplate * const itbl_vex_map3_6a[] = { + instrux + 4057, + instrux + 4058, + NULL +}; + +static const struct itemplate * const itbl_vex_map3_6b[] = { + instrux + 4055, + instrux + 4056, + NULL +}; + +static const struct itemplate * const itbl_vex_map3_6c[] = { + instrux + 4079, + instrux + 4080, + instrux + 4081, + instrux + 4082, + NULL +}; + +static const struct itemplate * const itbl_vex_map3_6d[] = { + instrux + 4075, + instrux + 4076, + instrux + 4077, + instrux + 4078, + NULL +}; + +static const struct itemplate * const itbl_vex_map3_6e[] = { + instrux + 4085, + instrux + 4086, + NULL +}; + +static const struct itemplate * const itbl_vex_map3_6f[] = { + instrux + 4083, + instrux + 4084, + NULL +}; + +static const struct itemplate * const itbl_vex_map3_78[] = { + instrux + 4091, + instrux + 4092, + instrux + 4093, + instrux + 4094, + NULL +}; + +static const struct itemplate * const itbl_vex_map3_79[] = { + instrux + 4087, + instrux + 4088, + instrux + 4089, + instrux + 4090, + NULL +}; + +static const struct itemplate * const itbl_vex_map3_7a[] = { + instrux + 4097, + instrux + 4098, + NULL +}; + +static const struct itemplate * const itbl_vex_map3_7b[] = { + instrux + 4095, + instrux + 4096, + NULL +}; + +static const struct itemplate * const itbl_vex_map3_7c[] = { + instrux + 4103, + instrux + 4104, + instrux + 4105, + instrux + 4106, + NULL +}; + +static const struct itemplate * const itbl_vex_map3_7d[] = { + instrux + 4099, + instrux + 4100, + instrux + 4101, + instrux + 4102, + NULL +}; + +static const struct itemplate * const itbl_vex_map3_7e[] = { + instrux + 4109, + instrux + 4110, + NULL +}; + +static const struct itemplate * const itbl_vex_map3_7f[] = { + instrux + 4107, + instrux + 4108, + NULL +}; + +static const struct itemplate * const itbl_vex_map3_ce[] = { + instrux + 6727, + instrux + 6728, + NULL +}; + +static const struct itemplate * const itbl_vex_map3_cf[] = { + instrux + 6721, + instrux + 6722, + NULL +}; + +static const struct itemplate * const itbl_vex_map3_de[] = { + instrux + 4414, + NULL +}; + +static const struct itemplate * const itbl_vex_map3_df[] = { + instrux + 3094, + NULL +}; + +static const struct itemplate * const itbl_vex_map3_f0[] = { + instrux + 509, + instrux + 513, + NULL +}; + +static const struct itemplate * const * const itbl_vex_map3[256] = { + itbl_vex_map3_00, + itbl_vex_map3_01, + itbl_vex_map3_02, + NULL, + itbl_vex_map3_04, + itbl_vex_map3_05, + itbl_vex_map3_06, + NULL, + itbl_vex_map3_08, + itbl_vex_map3_09, + itbl_vex_map3_0a, + itbl_vex_map3_0b, + itbl_vex_map3_0c, + itbl_vex_map3_0d, + itbl_vex_map3_0e, + itbl_vex_map3_0f, + NULL, + NULL, + NULL, + NULL, + itbl_vex_map3_14, + itbl_vex_map3_15, + itbl_vex_map3_16, + itbl_vex_map3_17, + itbl_vex_map3_18, + itbl_vex_map3_19, + NULL, + NULL, + NULL, + itbl_vex_map3_1d, + NULL, + NULL, + itbl_vex_map3_20, + itbl_vex_map3_21, + itbl_vex_map3_22, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_vex_map3_30, + itbl_vex_map3_31, + itbl_vex_map3_32, + itbl_vex_map3_33, + NULL, + NULL, + NULL, + NULL, + itbl_vex_map3_38, + itbl_vex_map3_39, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_vex_map3_40, + itbl_vex_map3_41, + itbl_vex_map3_42, + NULL, + itbl_vex_map3_44, + NULL, + itbl_vex_map3_46, + NULL, + NULL, + NULL, + itbl_vex_map3_4a, + itbl_vex_map3_4b, + itbl_vex_map3_4c, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_vex_map3_5c, + itbl_vex_map3_5d, + itbl_vex_map3_5e, + itbl_vex_map3_5f, + itbl_vex_map3_60, + itbl_vex_map3_61, + itbl_vex_map3_62, + itbl_vex_map3_63, + NULL, + NULL, + NULL, + NULL, + itbl_vex_map3_68, + itbl_vex_map3_69, + itbl_vex_map3_6a, + itbl_vex_map3_6b, + itbl_vex_map3_6c, + itbl_vex_map3_6d, + itbl_vex_map3_6e, + itbl_vex_map3_6f, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_vex_map3_78, + itbl_vex_map3_79, + itbl_vex_map3_7a, + itbl_vex_map3_7b, + itbl_vex_map3_7c, + itbl_vex_map3_7d, + itbl_vex_map3_7e, + itbl_vex_map3_7f, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_vex_map3_ce, + itbl_vex_map3_cf, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_vex_map3_de, + itbl_vex_map3_df, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_vex_map3_f0, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, +}; + +static const struct itemplate * const itbl_vex_map5_f8[] = { + instrux + 6900, + instrux + 6902, + NULL +}; + +static const struct itemplate * const itbl_vex_map5_f9[] = { + instrux + 6901, + instrux + 6903, + NULL +}; + +static const struct itemplate * const itbl_vex_map5_fd[] = { + instrux + 6916, + instrux + 6917, + instrux + 6918, + instrux + 6919, + NULL +}; + +static const struct itemplate * const * const itbl_vex_map5[256] = { + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_vex_map5_f8, + itbl_vex_map5_f9, + NULL, + NULL, + NULL, + itbl_vex_map5_fd, + NULL, + NULL, +}; + +static const struct itemplate * const itbl_vex_map7_f6[] = { + instrux + 1335, + instrux + 1338, + NULL +}; + +static const struct itemplate * const itbl_vex_map7_f8[] = { + instrux + 1344, + instrux + 1348, + NULL +}; + +static const struct itemplate * const * const itbl_vex_map7[256] = { + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_vex_map7_f6, + NULL, + itbl_vex_map7_f8, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, +}; + +static const struct itemplate * const itbl_xop_map8_85[] = { + instrux + 4151, + NULL +}; + +static const struct itemplate * const itbl_xop_map8_86[] = { + instrux + 4150, + NULL +}; + +static const struct itemplate * const itbl_xop_map8_87[] = { + instrux + 4149, + NULL +}; + +static const struct itemplate * const itbl_xop_map8_8e[] = { + instrux + 4147, + NULL +}; + +static const struct itemplate * const itbl_xop_map8_8f[] = { + instrux + 4148, + NULL +}; + +static const struct itemplate * const itbl_xop_map8_95[] = { + instrux + 4153, + NULL +}; + +static const struct itemplate * const itbl_xop_map8_96[] = { + instrux + 4152, + NULL +}; + +static const struct itemplate * const itbl_xop_map8_97[] = { + instrux + 4146, + NULL +}; + +static const struct itemplate * const itbl_xop_map8_9e[] = { + instrux + 4144, + NULL +}; + +static const struct itemplate * const itbl_xop_map8_9f[] = { + instrux + 4145, + NULL +}; + +static const struct itemplate * const itbl_xop_map8_a2[] = { + instrux + 4117, + instrux + 4118, + instrux + 4119, + instrux + 4120, + NULL +}; + +static const struct itemplate * const itbl_xop_map8_a3[] = { + instrux + 4156, + instrux + 4157, + NULL +}; + +static const struct itemplate * const itbl_xop_map8_a6[] = { + instrux + 4154, + NULL +}; + +static const struct itemplate * const itbl_xop_map8_b6[] = { + instrux + 4155, + NULL +}; + +static const struct itemplate * const itbl_xop_map8_c0[] = { + instrux + 4160, + NULL +}; + +static const struct itemplate * const itbl_xop_map8_c1[] = { + instrux + 4169, + NULL +}; + +static const struct itemplate * const itbl_xop_map8_c2[] = { + instrux + 4163, + NULL +}; + +static const struct itemplate * const itbl_xop_map8_c3[] = { + instrux + 4166, + NULL +}; + +static const struct itemplate * const itbl_xop_map8_cc[] = { + instrux + 4121, + NULL +}; + +static const struct itemplate * const itbl_xop_map8_cd[] = { + instrux + 4128, + NULL +}; + +static const struct itemplate * const itbl_xop_map8_ce[] = { + instrux + 4122, + NULL +}; + +static const struct itemplate * const itbl_xop_map8_cf[] = { + instrux + 4123, + NULL +}; + +static const struct itemplate * const itbl_xop_map8_ec[] = { + instrux + 4124, + NULL +}; + +static const struct itemplate * const itbl_xop_map8_ed[] = { + instrux + 4127, + NULL +}; + +static const struct itemplate * const itbl_xop_map8_ee[] = { + instrux + 4125, + NULL +}; + +static const struct itemplate * const itbl_xop_map8_ef[] = { + instrux + 4126, + NULL +}; + +static const struct itemplate * const * const itbl_xop_map8[256] = { + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_xop_map8_85, + itbl_xop_map8_86, + itbl_xop_map8_87, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_xop_map8_8e, + itbl_xop_map8_8f, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_xop_map8_95, + itbl_xop_map8_96, + itbl_xop_map8_97, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_xop_map8_9e, + itbl_xop_map8_9f, + NULL, + NULL, + itbl_xop_map8_a2, + itbl_xop_map8_a3, + NULL, + NULL, + itbl_xop_map8_a6, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_xop_map8_b6, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_xop_map8_c0, + itbl_xop_map8_c1, + itbl_xop_map8_c2, + itbl_xop_map8_c3, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_xop_map8_cc, + itbl_xop_map8_cd, + itbl_xop_map8_ce, + itbl_xop_map8_cf, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_xop_map8_ec, + itbl_xop_map8_ed, + itbl_xop_map8_ee, + itbl_xop_map8_ef, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, +}; + +static const struct itemplate * const itbl_xop_map9_01[] = { + instrux + 952, + instrux + 953, + instrux + 954, + instrux + 955, + instrux + 956, + instrux + 957, + instrux + 958, + instrux + 959, + instrux + 962, + instrux + 963, + instrux + 964, + instrux + 965, + instrux + 966, + instrux + 967, + NULL +}; + +static const struct itemplate * const itbl_xop_map9_02[] = { + instrux + 950, + instrux + 951, + instrux + 960, + instrux + 961, + NULL +}; + +static const struct itemplate * const itbl_xop_map9_12[] = { + instrux + 4039, + instrux + 4040, + instrux + 4041, + instrux + 4042, + NULL +}; + +static const struct itemplate * const itbl_xop_map9_80[] = { + instrux + 4113, + instrux + 4114, + NULL +}; + +static const struct itemplate * const itbl_xop_map9_81[] = { + instrux + 4111, + instrux + 4112, + NULL +}; + +static const struct itemplate * const itbl_xop_map9_82[] = { + instrux + 4116, + NULL +}; + +static const struct itemplate * const itbl_xop_map9_83[] = { + instrux + 4115, + NULL +}; + +static const struct itemplate * const itbl_xop_map9_90[] = { + instrux + 4158, + instrux + 4159, + NULL +}; + +static const struct itemplate * const itbl_xop_map9_91[] = { + instrux + 4167, + instrux + 4168, + NULL +}; + +static const struct itemplate * const itbl_xop_map9_92[] = { + instrux + 4161, + instrux + 4162, + NULL +}; + +static const struct itemplate * const itbl_xop_map9_93[] = { + instrux + 4164, + instrux + 4165, + NULL +}; + +static const struct itemplate * const itbl_xop_map9_94[] = { + instrux + 4178, + instrux + 4179, + NULL +}; + +static const struct itemplate * const itbl_xop_map9_95[] = { + instrux + 4184, + instrux + 4185, + NULL +}; + +static const struct itemplate * const itbl_xop_map9_96[] = { + instrux + 4180, + instrux + 4181, + NULL +}; + +static const struct itemplate * const itbl_xop_map9_97[] = { + instrux + 4182, + instrux + 4183, + NULL +}; + +static const struct itemplate * const itbl_xop_map9_98[] = { + instrux + 4170, + instrux + 4171, + NULL +}; + +static const struct itemplate * const itbl_xop_map9_99[] = { + instrux + 4176, + instrux + 4177, + NULL +}; + +static const struct itemplate * const itbl_xop_map9_9a[] = { + instrux + 4172, + instrux + 4173, + NULL +}; + +static const struct itemplate * const itbl_xop_map9_9b[] = { + instrux + 4174, + instrux + 4175, + NULL +}; + +static const struct itemplate * const itbl_xop_map9_c1[] = { + instrux + 4131, + NULL +}; + +static const struct itemplate * const itbl_xop_map9_c2[] = { + instrux + 4129, + NULL +}; + +static const struct itemplate * const itbl_xop_map9_c3[] = { + instrux + 4130, + NULL +}; + +static const struct itemplate * const itbl_xop_map9_c6[] = { + instrux + 4139, + NULL +}; + +static const struct itemplate * const itbl_xop_map9_c7[] = { + instrux + 4140, + NULL +}; + +static const struct itemplate * const itbl_xop_map9_cb[] = { + instrux + 4132, + NULL +}; + +static const struct itemplate * const itbl_xop_map9_d1[] = { + instrux + 4135, + NULL +}; + +static const struct itemplate * const itbl_xop_map9_d2[] = { + instrux + 4133, + NULL +}; + +static const struct itemplate * const itbl_xop_map9_d3[] = { + instrux + 4134, + NULL +}; + +static const struct itemplate * const itbl_xop_map9_d6[] = { + instrux + 4137, + NULL +}; + +static const struct itemplate * const itbl_xop_map9_d7[] = { + instrux + 4138, + NULL +}; + +static const struct itemplate * const itbl_xop_map9_db[] = { + instrux + 4136, + NULL +}; + +static const struct itemplate * const itbl_xop_map9_e1[] = { + instrux + 4141, + NULL +}; + +static const struct itemplate * const itbl_xop_map9_e2[] = { + instrux + 4143, + NULL +}; + +static const struct itemplate * const itbl_xop_map9_e3[] = { + instrux + 4142, + NULL +}; + +static const struct itemplate * const * const itbl_xop_map9[256] = { + NULL, + itbl_xop_map9_01, + itbl_xop_map9_02, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_xop_map9_12, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_xop_map9_80, + itbl_xop_map9_81, + itbl_xop_map9_82, + itbl_xop_map9_83, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_xop_map9_90, + itbl_xop_map9_91, + itbl_xop_map9_92, + itbl_xop_map9_93, + itbl_xop_map9_94, + itbl_xop_map9_95, + itbl_xop_map9_96, + itbl_xop_map9_97, + itbl_xop_map9_98, + itbl_xop_map9_99, + itbl_xop_map9_9a, + itbl_xop_map9_9b, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_xop_map9_c1, + itbl_xop_map9_c2, + itbl_xop_map9_c3, + NULL, + NULL, + itbl_xop_map9_c6, + itbl_xop_map9_c7, + NULL, + NULL, + NULL, + itbl_xop_map9_cb, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_xop_map9_d1, + itbl_xop_map9_d2, + itbl_xop_map9_d3, + NULL, + NULL, + itbl_xop_map9_d6, + itbl_xop_map9_d7, + NULL, + NULL, + NULL, + itbl_xop_map9_db, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_xop_map9_e1, + itbl_xop_map9_e2, + itbl_xop_map9_e3, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, +}; + +static const struct itemplate * const itbl_xop_map10_10[] = { + instrux + 948, + instrux + 949, + NULL +}; + +static const struct itemplate * const itbl_xop_map10_12[] = { + instrux + 4043, + instrux + 4044, + instrux + 4045, + instrux + 4046, + NULL +}; + +static const struct itemplate * const * const itbl_xop_map10[256] = { + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_xop_map10_10, + NULL, + itbl_xop_map10_12, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, +}; + +static const struct itemplate * const itbl_evex_map1_10[] = { + instrux + 5515, + instrux + 5517, + instrux + 5525, + instrux + 5527, + instrux + 5529, + instrux + 5530, + instrux + 5531, + instrux + 5538, + instrux + 5539, + instrux + 5540, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_11[] = { + instrux + 5516, + instrux + 5518, + instrux + 5526, + instrux + 5528, + instrux + 5532, + instrux + 5533, + instrux + 5534, + instrux + 5535, + instrux + 5536, + instrux + 5537, + instrux + 5541, + instrux + 5542, + instrux + 5543, + instrux + 5544, + instrux + 5545, + instrux + 5546, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_12[] = { + instrux + 5450, + instrux + 5451, + instrux + 5452, + instrux + 5489, + instrux + 5495, + instrux + 5497, + instrux + 5522, + instrux + 5523, + instrux + 5524, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_13[] = { + instrux + 5496, + instrux + 5498, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_14[] = { + instrux + 6692, + instrux + 6693, + instrux + 6694, + instrux + 6695, + instrux + 6696, + instrux + 6697, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_15[] = { + instrux + 6686, + instrux + 6687, + instrux + 6688, + instrux + 6689, + instrux + 6690, + instrux + 6691, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_16[] = { + instrux + 5490, + instrux + 5492, + instrux + 5494, + instrux + 5519, + instrux + 5520, + instrux + 5521, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_17[] = { + instrux + 5491, + instrux + 5493, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_28[] = { + instrux + 5430, + instrux + 5431, + instrux + 5432, + instrux + 5439, + instrux + 5440, + instrux + 5441, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_29[] = { + instrux + 5433, + instrux + 5434, + instrux + 5435, + instrux + 5436, + instrux + 5437, + instrux + 5438, + instrux + 5442, + instrux + 5443, + instrux + 5444, + instrux + 5445, + instrux + 5446, + instrux + 5447, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_2a[] = { + instrux + 5108, + instrux + 5109, + instrux + 5110, + instrux + 5111, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_2b[] = { + instrux + 5505, + instrux + 5506, + instrux + 5507, + instrux + 5508, + instrux + 5509, + instrux + 5510, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_2c[] = { + instrux + 5141, + instrux + 5142, + instrux + 5145, + instrux + 5146, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_2d[] = { + instrux + 5103, + instrux + 5104, + instrux + 5113, + instrux + 5114, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_2e[] = { + instrux + 6684, + instrux + 6685, + instrux + 7292, + instrux + 7294, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_2f[] = { + instrux + 5038, + instrux + 5039, + instrux + 7289, + instrux + 7291, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_41[] = { + instrux + 4518, + instrux + 4520, + instrux + 4522, + instrux + 4524, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_42[] = { + instrux + 4526, + instrux + 4528, + instrux + 4530, + instrux + 4532, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_44[] = { + instrux + 4534, + instrux + 4536, + instrux + 4538, + instrux + 4540, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_45[] = { + instrux + 4542, + instrux + 4544, + instrux + 4546, + instrux + 4548, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_46[] = { + instrux + 4588, + instrux + 4590, + instrux + 4592, + instrux + 4594, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_47[] = { + instrux + 4596, + instrux + 4598, + instrux + 4600, + instrux + 4602, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_4a[] = { + instrux + 4510, + instrux + 4512, + instrux + 4514, + instrux + 4516, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_4b[] = { + instrux + 4582, + instrux + 4584, + instrux + 4586, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_51[] = { + instrux + 6668, + instrux + 6669, + instrux + 6670, + instrux + 6671, + instrux + 6672, + instrux + 6673, + instrux + 6674, + instrux + 6675, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_54[] = { + instrux + 4623, + instrux + 4624, + instrux + 4625, + instrux + 4626, + instrux + 4627, + instrux + 4628, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_55[] = { + instrux + 4617, + instrux + 4618, + instrux + 4619, + instrux + 4620, + instrux + 4621, + instrux + 4622, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_56[] = { + instrux + 5555, + instrux + 5556, + instrux + 5557, + instrux + 5558, + instrux + 5559, + instrux + 5560, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_57[] = { + instrux + 6698, + instrux + 6699, + instrux + 6700, + instrux + 6701, + instrux + 6702, + instrux + 6703, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_58[] = { + instrux + 4603, + instrux + 4604, + instrux + 4605, + instrux + 4606, + instrux + 4607, + instrux + 4608, + instrux + 4609, + instrux + 4610, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_59[] = { + instrux + 5547, + instrux + 5548, + instrux + 5549, + instrux + 5550, + instrux + 5551, + instrux + 5552, + instrux + 5553, + instrux + 5554, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_5a[] = { + instrux + 5061, + instrux + 5062, + instrux + 5063, + instrux + 5079, + instrux + 5080, + instrux + 5081, + instrux + 5105, + instrux + 5112, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_5b[] = { + instrux + 5055, + instrux + 5056, + instrux + 5057, + instrux + 5076, + instrux + 5077, + instrux + 5078, + instrux + 5100, + instrux + 5101, + instrux + 5102, + instrux + 5129, + instrux + 5130, + instrux + 5131, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_5c[] = { + instrux + 6676, + instrux + 6677, + instrux + 6678, + instrux + 6679, + instrux + 6680, + instrux + 6681, + instrux + 6682, + instrux + 6683, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_5d[] = { + instrux + 5422, + instrux + 5423, + instrux + 5424, + instrux + 5425, + instrux + 5426, + instrux + 5427, + instrux + 5428, + instrux + 5429, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_5e[] = { + instrux + 5168, + instrux + 5169, + instrux + 5170, + instrux + 5171, + instrux + 5172, + instrux + 5173, + instrux + 5174, + instrux + 5175, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_5f[] = { + instrux + 5414, + instrux + 5415, + instrux + 5416, + instrux + 5417, + instrux + 5418, + instrux + 5419, + instrux + 5420, + instrux + 5421, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_60[] = { + instrux + 6556, + instrux + 6557, + instrux + 6558, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_61[] = { + instrux + 6565, + instrux + 6566, + instrux + 6567, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_62[] = { + instrux + 6559, + instrux + 6560, + instrux + 6561, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_63[] = { + instrux + 5576, + instrux + 5577, + instrux + 5578, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_64[] = { + instrux + 5705, + instrux + 5706, + instrux + 5707, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_65[] = { + instrux + 5714, + instrux + 5715, + instrux + 5716, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_66[] = { + instrux + 5708, + instrux + 5709, + instrux + 5710, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_67[] = { + instrux + 5582, + instrux + 5583, + instrux + 5584, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_68[] = { + instrux + 6544, + instrux + 6545, + instrux + 6546, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_69[] = { + instrux + 6553, + instrux + 6554, + instrux + 6555, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_6a[] = { + instrux + 6547, + instrux + 6548, + instrux + 6549, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_6b[] = { + instrux + 5573, + instrux + 5574, + instrux + 5575, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_6c[] = { + instrux + 6562, + instrux + 6563, + instrux + 6564, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_6d[] = { + instrux + 6550, + instrux + 6551, + instrux + 6552, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_6e[] = { + instrux + 5448, + instrux + 5511, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_6f[] = { + instrux + 5453, + instrux + 5454, + instrux + 5455, + instrux + 5459, + instrux + 5460, + instrux + 5461, + instrux + 5465, + instrux + 5466, + instrux + 5467, + instrux + 5471, + instrux + 5472, + instrux + 5473, + instrux + 5477, + instrux + 5478, + instrux + 5479, + instrux + 5483, + instrux + 5484, + instrux + 5485, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_70[] = { + instrux + 6394, + instrux + 6395, + instrux + 6396, + instrux + 6397, + instrux + 6398, + instrux + 6399, + instrux + 6400, + instrux + 6401, + instrux + 6402, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_71[] = { + instrux + 6430, + instrux + 6431, + instrux + 6432, + instrux + 6457, + instrux + 6458, + instrux + 6459, + instrux + 6487, + instrux + 6488, + instrux + 6489, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_72[] = { + instrux + 6352, + instrux + 6353, + instrux + 6354, + instrux + 6355, + instrux + 6356, + instrux + 6357, + instrux + 6364, + instrux + 6365, + instrux + 6366, + instrux + 6367, + instrux + 6368, + instrux + 6369, + instrux + 6406, + instrux + 6407, + instrux + 6408, + instrux + 6436, + instrux + 6437, + instrux + 6438, + instrux + 6442, + instrux + 6443, + instrux + 6444, + instrux + 6463, + instrux + 6464, + instrux + 6465, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_73[] = { + instrux + 6409, + instrux + 6410, + instrux + 6411, + instrux + 6415, + instrux + 6416, + instrux + 6417, + instrux + 6466, + instrux + 6467, + instrux + 6468, + instrux + 6472, + instrux + 6473, + instrux + 6474, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_74[] = { + instrux + 5693, + instrux + 5694, + instrux + 5695, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_75[] = { + instrux + 5702, + instrux + 5703, + instrux + 5704, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_76[] = { + instrux + 5696, + instrux + 5697, + instrux + 5698, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_78[] = { + instrux + 5123, + instrux + 5124, + instrux + 5125, + instrux + 5126, + instrux + 5127, + instrux + 5128, + instrux + 5135, + instrux + 5136, + instrux + 5137, + instrux + 5138, + instrux + 5139, + instrux + 5140, + instrux + 5143, + instrux + 5144, + instrux + 5147, + instrux + 5148, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_79[] = { + instrux + 5067, + instrux + 5068, + instrux + 5069, + instrux + 5070, + instrux + 5071, + instrux + 5072, + instrux + 5091, + instrux + 5092, + instrux + 5093, + instrux + 5094, + instrux + 5095, + instrux + 5096, + instrux + 5106, + instrux + 5107, + instrux + 5115, + instrux + 5116, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_7a[] = { + instrux + 5120, + instrux + 5121, + instrux + 5122, + instrux + 5132, + instrux + 5133, + instrux + 5134, + instrux + 5149, + instrux + 5150, + instrux + 5151, + instrux + 5152, + instrux + 5153, + instrux + 5154, + instrux + 5155, + instrux + 5156, + instrux + 5157, + instrux + 5158, + instrux + 5159, + instrux + 5160, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_7b[] = { + instrux + 5064, + instrux + 5065, + instrux + 5066, + instrux + 5088, + instrux + 5089, + instrux + 5090, + instrux + 5161, + instrux + 5162, + instrux + 5163, + instrux + 5164, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_7e[] = { + instrux + 5449, + instrux + 5512, + instrux + 5513, + instrux + 7462, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_7f[] = { + instrux + 5456, + instrux + 5457, + instrux + 5458, + instrux + 5462, + instrux + 5463, + instrux + 5464, + instrux + 5468, + instrux + 5469, + instrux + 5470, + instrux + 5474, + instrux + 5475, + instrux + 5476, + instrux + 5480, + instrux + 5481, + instrux + 5482, + instrux + 5486, + instrux + 5487, + instrux + 5488, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_90[] = { + instrux + 4478, + instrux + 4480, + instrux + 4482, + instrux + 4484, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_91[] = { + instrux + 4486, + instrux + 4488, + instrux + 4490, + instrux + 4492, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_92[] = { + instrux + 4494, + instrux + 4496, + instrux + 4502, + instrux + 4504, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_93[] = { + instrux + 4498, + instrux + 4500, + instrux + 4506, + instrux + 4508, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_98[] = { + instrux + 4550, + instrux + 4552, + instrux + 4554, + instrux + 4556, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_99[] = { + instrux + 4574, + instrux + 4576, + instrux + 4578, + instrux + 4580, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_c2[] = { + instrux + 4662, + instrux + 4663, + instrux + 4664, + instrux + 4665, + instrux + 4666, + instrux + 4667, + instrux + 4668, + instrux + 4669, + instrux + 4670, + instrux + 4671, + instrux + 4672, + instrux + 4673, + instrux + 4674, + instrux + 4675, + instrux + 4676, + instrux + 4677, + instrux + 4678, + instrux + 4679, + instrux + 4680, + instrux + 4681, + instrux + 4682, + instrux + 4683, + instrux + 4684, + instrux + 4685, + instrux + 4686, + instrux + 4687, + instrux + 4688, + instrux + 4689, + instrux + 4690, + instrux + 4691, + instrux + 4692, + instrux + 4693, + instrux + 4694, + instrux + 4695, + instrux + 4696, + instrux + 4697, + instrux + 4698, + instrux + 4699, + instrux + 4700, + instrux + 4701, + instrux + 4702, + instrux + 4703, + instrux + 4704, + instrux + 4705, + instrux + 4706, + instrux + 4707, + instrux + 4708, + instrux + 4709, + instrux + 4710, + instrux + 4711, + instrux + 4712, + instrux + 4713, + instrux + 4714, + instrux + 4715, + instrux + 4716, + instrux + 4717, + instrux + 4718, + instrux + 4719, + instrux + 4720, + instrux + 4721, + instrux + 4722, + instrux + 4723, + instrux + 4724, + instrux + 4725, + instrux + 4726, + instrux + 4727, + instrux + 4728, + instrux + 4729, + instrux + 4730, + instrux + 4731, + instrux + 4732, + instrux + 4733, + instrux + 4734, + instrux + 4735, + instrux + 4736, + instrux + 4737, + instrux + 4738, + instrux + 4739, + instrux + 4740, + instrux + 4741, + instrux + 4742, + instrux + 4743, + instrux + 4744, + instrux + 4745, + instrux + 4746, + instrux + 4747, + instrux + 4748, + instrux + 4749, + instrux + 4750, + instrux + 4751, + instrux + 4752, + instrux + 4753, + instrux + 4754, + instrux + 4755, + instrux + 4756, + instrux + 4757, + instrux + 4758, + instrux + 4759, + instrux + 4760, + instrux + 4761, + instrux + 4762, + instrux + 4763, + instrux + 4764, + instrux + 4765, + instrux + 4766, + instrux + 4767, + instrux + 4768, + instrux + 4769, + instrux + 4770, + instrux + 4771, + instrux + 4772, + instrux + 4773, + instrux + 4774, + instrux + 4775, + instrux + 4776, + instrux + 4777, + instrux + 4778, + instrux + 4779, + instrux + 4780, + instrux + 4781, + instrux + 4782, + instrux + 4783, + instrux + 4784, + instrux + 4785, + instrux + 4786, + instrux + 4787, + instrux + 4788, + instrux + 4789, + instrux + 4790, + instrux + 4791, + instrux + 4792, + instrux + 4793, + instrux + 4794, + instrux + 4795, + instrux + 4796, + instrux + 4797, + instrux + 4798, + instrux + 4799, + instrux + 4800, + instrux + 4801, + instrux + 4802, + instrux + 4803, + instrux + 4804, + instrux + 4805, + instrux + 4806, + instrux + 4807, + instrux + 4808, + instrux + 4809, + instrux + 4810, + instrux + 4811, + instrux + 4812, + instrux + 4813, + instrux + 4814, + instrux + 4815, + instrux + 4816, + instrux + 4817, + instrux + 4818, + instrux + 4819, + instrux + 4820, + instrux + 4821, + instrux + 4822, + instrux + 4823, + instrux + 4824, + instrux + 4825, + instrux + 4826, + instrux + 4827, + instrux + 4828, + instrux + 4829, + instrux + 4830, + instrux + 4831, + instrux + 4832, + instrux + 4833, + instrux + 4834, + instrux + 4835, + instrux + 4836, + instrux + 4837, + instrux + 4838, + instrux + 4839, + instrux + 4840, + instrux + 4841, + instrux + 4842, + instrux + 4843, + instrux + 4844, + instrux + 4845, + instrux + 4846, + instrux + 4847, + instrux + 4848, + instrux + 4849, + instrux + 4850, + instrux + 4851, + instrux + 4852, + instrux + 4853, + instrux + 4854, + instrux + 4855, + instrux + 4856, + instrux + 4857, + instrux + 4858, + instrux + 4859, + instrux + 4860, + instrux + 4861, + instrux + 4862, + instrux + 4863, + instrux + 4864, + instrux + 4865, + instrux + 4866, + instrux + 4867, + instrux + 4868, + instrux + 4869, + instrux + 4870, + instrux + 4871, + instrux + 4872, + instrux + 4873, + instrux + 4874, + instrux + 4875, + instrux + 4876, + instrux + 4877, + instrux + 4878, + instrux + 4879, + instrux + 4880, + instrux + 4881, + instrux + 4882, + instrux + 4883, + instrux + 4884, + instrux + 4885, + instrux + 4886, + instrux + 4887, + instrux + 4888, + instrux + 4889, + instrux + 4890, + instrux + 4891, + instrux + 4892, + instrux + 4893, + instrux + 4894, + instrux + 4895, + instrux + 4896, + instrux + 4897, + instrux + 4898, + instrux + 4899, + instrux + 4900, + instrux + 4901, + instrux + 4902, + instrux + 4903, + instrux + 4904, + instrux + 4905, + instrux + 4906, + instrux + 4907, + instrux + 4908, + instrux + 4909, + instrux + 4910, + instrux + 4911, + instrux + 4912, + instrux + 4913, + instrux + 4914, + instrux + 4915, + instrux + 4916, + instrux + 4917, + instrux + 4918, + instrux + 4919, + instrux + 4920, + instrux + 4921, + instrux + 4922, + instrux + 4923, + instrux + 4924, + instrux + 4925, + instrux + 4926, + instrux + 4927, + instrux + 4928, + instrux + 4929, + instrux + 4930, + instrux + 4931, + instrux + 4932, + instrux + 4933, + instrux + 4934, + instrux + 4935, + instrux + 4936, + instrux + 4937, + instrux + 4938, + instrux + 4939, + instrux + 4940, + instrux + 4941, + instrux + 4942, + instrux + 4943, + instrux + 4944, + instrux + 4945, + instrux + 4946, + instrux + 4947, + instrux + 4948, + instrux + 4949, + instrux + 4950, + instrux + 4951, + instrux + 4952, + instrux + 4953, + instrux + 4954, + instrux + 4955, + instrux + 4956, + instrux + 4957, + instrux + 4958, + instrux + 4959, + instrux + 4960, + instrux + 4961, + instrux + 4962, + instrux + 4963, + instrux + 4964, + instrux + 4965, + instrux + 4966, + instrux + 4967, + instrux + 4968, + instrux + 4969, + instrux + 4970, + instrux + 4971, + instrux + 4972, + instrux + 4973, + instrux + 4974, + instrux + 4975, + instrux + 4976, + instrux + 4977, + instrux + 4978, + instrux + 4979, + instrux + 4980, + instrux + 4981, + instrux + 4982, + instrux + 4983, + instrux + 4984, + instrux + 4985, + instrux + 4986, + instrux + 4987, + instrux + 4988, + instrux + 4989, + instrux + 4990, + instrux + 4991, + instrux + 4992, + instrux + 4993, + instrux + 4994, + instrux + 4995, + instrux + 4996, + instrux + 4997, + instrux + 4998, + instrux + 4999, + instrux + 5000, + instrux + 5001, + instrux + 5002, + instrux + 5003, + instrux + 5004, + instrux + 5005, + instrux + 5006, + instrux + 5007, + instrux + 5008, + instrux + 5009, + instrux + 5010, + instrux + 5011, + instrux + 5012, + instrux + 5013, + instrux + 5014, + instrux + 5015, + instrux + 5016, + instrux + 5017, + instrux + 5018, + instrux + 5019, + instrux + 5020, + instrux + 5021, + instrux + 5022, + instrux + 5023, + instrux + 5024, + instrux + 5025, + instrux + 5026, + instrux + 5027, + instrux + 5028, + instrux + 5029, + instrux + 5030, + instrux + 5031, + instrux + 5032, + instrux + 5033, + instrux + 5034, + instrux + 5035, + instrux + 5036, + instrux + 5037, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_c4[] = { + instrux + 6083, + instrux + 6084, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_c5[] = { + instrux + 6064, + instrux + 6065, + instrux + 6066, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_c6[] = { + instrux + 6662, + instrux + 6663, + instrux + 6664, + instrux + 6665, + instrux + 6666, + instrux + 6667, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_d1[] = { + instrux + 6484, + instrux + 6485, + instrux + 6486, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_d2[] = { + instrux + 6460, + instrux + 6461, + instrux + 6462, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_d3[] = { + instrux + 6469, + instrux + 6470, + instrux + 6471, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_d4[] = { + instrux + 5591, + instrux + 5592, + instrux + 5593, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_d5[] = { + instrux + 6337, + instrux + 6338, + instrux + 6339, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_d6[] = { + instrux + 5514, + instrux + 7463, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_d8[] = { + instrux + 6505, + instrux + 6506, + instrux + 6507, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_d9[] = { + instrux + 6508, + instrux + 6509, + instrux + 6510, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_da[] = { + instrux + 6139, + instrux + 6140, + instrux + 6141, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_db[] = { + instrux + 5612, + instrux + 5613, + instrux + 5614, + instrux + 5621, + instrux + 5622, + instrux + 5623, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_dc[] = { + instrux + 5600, + instrux + 5601, + instrux + 5602, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_dd[] = { + instrux + 5603, + instrux + 5604, + instrux + 5605, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_de[] = { + instrux + 6115, + instrux + 6116, + instrux + 6117, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_df[] = { + instrux + 5615, + instrux + 5616, + instrux + 5617, + instrux + 5618, + instrux + 5619, + instrux + 5620, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_e0[] = { + instrux + 5624, + instrux + 5625, + instrux + 5626, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_e1[] = { + instrux + 6454, + instrux + 6455, + instrux + 6456, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_e2[] = { + instrux + 6433, + instrux + 6434, + instrux + 6435, + instrux + 6439, + instrux + 6440, + instrux + 6441, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_e3[] = { + instrux + 5627, + instrux + 5628, + instrux + 5629, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_e4[] = { + instrux + 6325, + instrux + 6326, + instrux + 6327, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_e5[] = { + instrux + 6328, + instrux + 6329, + instrux + 6330, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_e6[] = { + instrux + 5052, + instrux + 5053, + instrux + 5054, + instrux + 5058, + instrux + 5059, + instrux + 5060, + instrux + 5097, + instrux + 5098, + instrux + 5099, + instrux + 5117, + instrux + 5118, + instrux + 5119, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_e7[] = { + instrux + 5499, + instrux + 5500, + instrux + 5501, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_e8[] = { + instrux + 6499, + instrux + 6500, + instrux + 6501, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_e9[] = { + instrux + 6502, + instrux + 6503, + instrux + 6504, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_ea[] = { + instrux + 6136, + instrux + 6137, + instrux + 6138, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_eb[] = { + instrux + 6346, + instrux + 6347, + instrux + 6348, + instrux + 6349, + instrux + 6350, + instrux + 6351, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_ec[] = { + instrux + 5594, + instrux + 5595, + instrux + 5596, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_ed[] = { + instrux + 5597, + instrux + 5598, + instrux + 5599, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_ee[] = { + instrux + 6112, + instrux + 6113, + instrux + 6114, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_ef[] = { + instrux + 6568, + instrux + 6569, + instrux + 6570, + instrux + 6571, + instrux + 6572, + instrux + 6573, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_f1[] = { + instrux + 6427, + instrux + 6428, + instrux + 6429, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_f2[] = { + instrux + 6403, + instrux + 6404, + instrux + 6405, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_f3[] = { + instrux + 6412, + instrux + 6413, + instrux + 6414, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_f4[] = { + instrux + 6343, + instrux + 6344, + instrux + 6345, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_f5[] = { + instrux + 6100, + instrux + 6101, + instrux + 6102, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_f6[] = { + instrux + 6376, + instrux + 6377, + instrux + 6378, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_f8[] = { + instrux + 6490, + instrux + 6491, + instrux + 6492, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_f9[] = { + instrux + 6511, + instrux + 6512, + instrux + 6513, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_fa[] = { + instrux + 6493, + instrux + 6494, + instrux + 6495, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_fb[] = { + instrux + 6496, + instrux + 6497, + instrux + 6498, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_fc[] = { + instrux + 5585, + instrux + 5586, + instrux + 5587, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_fd[] = { + instrux + 5606, + instrux + 5607, + instrux + 5608, + NULL +}; + +static const struct itemplate * const itbl_evex_map1_fe[] = { + instrux + 5588, + instrux + 5589, + instrux + 5590, + NULL +}; + +static const struct itemplate * const * const itbl_evex_map1[256] = { + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_evex_map1_10, + itbl_evex_map1_11, + itbl_evex_map1_12, + itbl_evex_map1_13, + itbl_evex_map1_14, + itbl_evex_map1_15, + itbl_evex_map1_16, + itbl_evex_map1_17, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_evex_map1_28, + itbl_evex_map1_29, + itbl_evex_map1_2a, + itbl_evex_map1_2b, + itbl_evex_map1_2c, + itbl_evex_map1_2d, + itbl_evex_map1_2e, + itbl_evex_map1_2f, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_evex_map1_41, + itbl_evex_map1_42, + NULL, + itbl_evex_map1_44, + itbl_evex_map1_45, + itbl_evex_map1_46, + itbl_evex_map1_47, + NULL, + NULL, + itbl_evex_map1_4a, + itbl_evex_map1_4b, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_evex_map1_51, + NULL, + NULL, + itbl_evex_map1_54, + itbl_evex_map1_55, + itbl_evex_map1_56, + itbl_evex_map1_57, + itbl_evex_map1_58, + itbl_evex_map1_59, + itbl_evex_map1_5a, + itbl_evex_map1_5b, + itbl_evex_map1_5c, + itbl_evex_map1_5d, + itbl_evex_map1_5e, + itbl_evex_map1_5f, + itbl_evex_map1_60, + itbl_evex_map1_61, + itbl_evex_map1_62, + itbl_evex_map1_63, + itbl_evex_map1_64, + itbl_evex_map1_65, + itbl_evex_map1_66, + itbl_evex_map1_67, + itbl_evex_map1_68, + itbl_evex_map1_69, + itbl_evex_map1_6a, + itbl_evex_map1_6b, + itbl_evex_map1_6c, + itbl_evex_map1_6d, + itbl_evex_map1_6e, + itbl_evex_map1_6f, + itbl_evex_map1_70, + itbl_evex_map1_71, + itbl_evex_map1_72, + itbl_evex_map1_73, + itbl_evex_map1_74, + itbl_evex_map1_75, + itbl_evex_map1_76, + NULL, + itbl_evex_map1_78, + itbl_evex_map1_79, + itbl_evex_map1_7a, + itbl_evex_map1_7b, + NULL, + NULL, + itbl_evex_map1_7e, + itbl_evex_map1_7f, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_evex_map1_90, + itbl_evex_map1_91, + itbl_evex_map1_92, + itbl_evex_map1_93, + NULL, + NULL, + NULL, + NULL, + itbl_evex_map1_98, + itbl_evex_map1_99, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_evex_map1_c2, + NULL, + itbl_evex_map1_c4, + itbl_evex_map1_c5, + itbl_evex_map1_c6, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_evex_map1_d1, + itbl_evex_map1_d2, + itbl_evex_map1_d3, + itbl_evex_map1_d4, + itbl_evex_map1_d5, + itbl_evex_map1_d6, + NULL, + itbl_evex_map1_d8, + itbl_evex_map1_d9, + itbl_evex_map1_da, + itbl_evex_map1_db, + itbl_evex_map1_dc, + itbl_evex_map1_dd, + itbl_evex_map1_de, + itbl_evex_map1_df, + itbl_evex_map1_e0, + itbl_evex_map1_e1, + itbl_evex_map1_e2, + itbl_evex_map1_e3, + itbl_evex_map1_e4, + itbl_evex_map1_e5, + itbl_evex_map1_e6, + itbl_evex_map1_e7, + itbl_evex_map1_e8, + itbl_evex_map1_e9, + itbl_evex_map1_ea, + itbl_evex_map1_eb, + itbl_evex_map1_ec, + itbl_evex_map1_ed, + itbl_evex_map1_ee, + itbl_evex_map1_ef, + NULL, + itbl_evex_map1_f1, + itbl_evex_map1_f2, + itbl_evex_map1_f3, + itbl_evex_map1_f4, + itbl_evex_map1_f5, + itbl_evex_map1_f6, + NULL, + itbl_evex_map1_f8, + itbl_evex_map1_f9, + itbl_evex_map1_fa, + itbl_evex_map1_fb, + itbl_evex_map1_fc, + itbl_evex_map1_fd, + itbl_evex_map1_fe, + NULL, +}; + +static const struct itemplate * const itbl_evex_map2_00[] = { + instrux + 6391, + instrux + 6392, + instrux + 6393, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_04[] = { + instrux + 6097, + instrux + 6098, + instrux + 6099, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_0b[] = { + instrux + 6322, + instrux + 6323, + instrux + 6324, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_0c[] = { + instrux + 6007, + instrux + 6008, + instrux + 6009, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_0d[] = { + instrux + 6001, + instrux + 6002, + instrux + 6003, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_10[] = { + instrux + 6286, + instrux + 6287, + instrux + 6288, + instrux + 6289, + instrux + 6290, + instrux + 6291, + instrux + 6481, + instrux + 6482, + instrux + 6483, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_11[] = { + instrux + 6256, + instrux + 6257, + instrux + 6258, + instrux + 6259, + instrux + 6260, + instrux + 6261, + instrux + 6451, + instrux + 6452, + instrux + 6453, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_12[] = { + instrux + 6268, + instrux + 6269, + instrux + 6270, + instrux + 6271, + instrux + 6272, + instrux + 6273, + instrux + 6424, + instrux + 6425, + instrux + 6426, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_13[] = { + instrux + 5073, + instrux + 5074, + instrux + 5075, + instrux + 6262, + instrux + 6263, + instrux + 6264, + instrux + 6265, + instrux + 6266, + instrux + 6267, + instrux + 6950, + instrux + 6951, + instrux + 6952, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_14[] = { + instrux + 6280, + instrux + 6281, + instrux + 6282, + instrux + 6283, + instrux + 6284, + instrux + 6285, + instrux + 6370, + instrux + 6371, + instrux + 6372, + instrux + 6373, + instrux + 6374, + instrux + 6375, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_15[] = { + instrux + 6274, + instrux + 6275, + instrux + 6276, + instrux + 6277, + instrux + 6278, + instrux + 6279, + instrux + 6358, + instrux + 6359, + instrux + 6360, + instrux + 6361, + instrux + 6362, + instrux + 6363, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_16[] = { + instrux + 6012, + instrux + 6013, + instrux + 6014, + instrux + 6015, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_18[] = { + instrux + 4656, + instrux + 4657, + instrux + 4658, + instrux + 4659, + instrux + 4660, + instrux + 4661, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_19[] = { + instrux + 4635, + instrux + 4636, + instrux + 4652, + instrux + 4653, + instrux + 4654, + instrux + 4655, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_1a[] = { + instrux + 4637, + instrux + 4638, + instrux + 4640, + instrux + 4641, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_1b[] = { + instrux + 4639, + instrux + 4642, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_1c[] = { + instrux + 5561, + instrux + 5562, + instrux + 5563, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_1d[] = { + instrux + 5570, + instrux + 5571, + instrux + 5572, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_1e[] = { + instrux + 5564, + instrux + 5565, + instrux + 5566, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_1f[] = { + instrux + 5567, + instrux + 5568, + instrux + 5569, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_20[] = { + instrux + 6232, + instrux + 6233, + instrux + 6234, + instrux + 6235, + instrux + 6236, + instrux + 6237, + instrux + 6244, + instrux + 6245, + instrux + 6246, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_21[] = { + instrux + 6202, + instrux + 6203, + instrux + 6204, + instrux + 6205, + instrux + 6206, + instrux + 6207, + instrux + 6238, + instrux + 6239, + instrux + 6240, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_22[] = { + instrux + 6214, + instrux + 6215, + instrux + 6216, + instrux + 6217, + instrux + 6218, + instrux + 6219, + instrux + 6241, + instrux + 6242, + instrux + 6243, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_23[] = { + instrux + 6208, + instrux + 6209, + instrux + 6210, + instrux + 6211, + instrux + 6212, + instrux + 6213, + instrux + 6250, + instrux + 6251, + instrux + 6252, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_24[] = { + instrux + 6226, + instrux + 6227, + instrux + 6228, + instrux + 6229, + instrux + 6230, + instrux + 6231, + instrux + 6253, + instrux + 6254, + instrux + 6255, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_25[] = { + instrux + 6220, + instrux + 6221, + instrux + 6222, + instrux + 6223, + instrux + 6224, + instrux + 6225, + instrux + 6247, + instrux + 6248, + instrux + 6249, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_26[] = { + instrux + 6520, + instrux + 6521, + instrux + 6522, + instrux + 6529, + instrux + 6530, + instrux + 6531, + instrux + 6532, + instrux + 6533, + instrux + 6534, + instrux + 6541, + instrux + 6542, + instrux + 6543, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_27[] = { + instrux + 6523, + instrux + 6524, + instrux + 6525, + instrux + 6526, + instrux + 6527, + instrux + 6528, + instrux + 6535, + instrux + 6536, + instrux + 6537, + instrux + 6538, + instrux + 6539, + instrux + 6540, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_28[] = { + instrux + 6169, + instrux + 6170, + instrux + 6171, + instrux + 6178, + instrux + 6179, + instrux + 6180, + instrux + 6319, + instrux + 6320, + instrux + 6321, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_29[] = { + instrux + 5699, + instrux + 5700, + instrux + 5701, + instrux + 6151, + instrux + 6152, + instrux + 6153, + instrux + 6292, + instrux + 6293, + instrux + 6294, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_2a[] = { + instrux + 5502, + instrux + 5503, + instrux + 5504, + instrux + 5666, + instrux + 5667, + instrux + 5668, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_2b[] = { + instrux + 5579, + instrux + 5580, + instrux + 5581, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_2c[] = { + instrux + 6626, + instrux + 6627, + instrux + 6628, + instrux + 6629, + instrux + 6630, + instrux + 6631, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_2d[] = { + instrux + 6632, + instrux + 6633, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_30[] = { + instrux + 6295, + instrux + 6296, + instrux + 6297, + instrux + 6298, + instrux + 6299, + instrux + 6300, + instrux + 6307, + instrux + 6308, + instrux + 6309, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_31[] = { + instrux + 6157, + instrux + 6158, + instrux + 6159, + instrux + 6160, + instrux + 6161, + instrux + 6162, + instrux + 6301, + instrux + 6302, + instrux + 6303, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_32[] = { + instrux + 6184, + instrux + 6185, + instrux + 6186, + instrux + 6187, + instrux + 6188, + instrux + 6189, + instrux + 6304, + instrux + 6305, + instrux + 6306, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_33[] = { + instrux + 6163, + instrux + 6164, + instrux + 6165, + instrux + 6166, + instrux + 6167, + instrux + 6168, + instrux + 6313, + instrux + 6314, + instrux + 6315, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_34[] = { + instrux + 6196, + instrux + 6197, + instrux + 6198, + instrux + 6199, + instrux + 6200, + instrux + 6201, + instrux + 6316, + instrux + 6317, + instrux + 6318, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_35[] = { + instrux + 6190, + instrux + 6191, + instrux + 6192, + instrux + 6193, + instrux + 6194, + instrux + 6195, + instrux + 6310, + instrux + 6311, + instrux + 6312, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_36[] = { + instrux + 5978, + instrux + 5979, + instrux + 6018, + instrux + 6019, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_37[] = { + instrux + 5711, + instrux + 5712, + instrux + 5713, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_38[] = { + instrux + 6127, + instrux + 6128, + instrux + 6129, + instrux + 6172, + instrux + 6173, + instrux + 6174, + instrux + 6175, + instrux + 6176, + instrux + 6177, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_39[] = { + instrux + 6130, + instrux + 6131, + instrux + 6132, + instrux + 6133, + instrux + 6134, + instrux + 6135, + instrux + 6154, + instrux + 6155, + instrux + 6156, + instrux + 6181, + instrux + 6182, + instrux + 6183, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_3a[] = { + instrux + 5669, + instrux + 5670, + instrux + 5671, + instrux + 6148, + instrux + 6149, + instrux + 6150, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_3b[] = { + instrux + 6142, + instrux + 6143, + instrux + 6144, + instrux + 6145, + instrux + 6146, + instrux + 6147, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_3c[] = { + instrux + 6103, + instrux + 6104, + instrux + 6105, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_3d[] = { + instrux + 6106, + instrux + 6107, + instrux + 6108, + instrux + 6109, + instrux + 6110, + instrux + 6111, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_3e[] = { + instrux + 6124, + instrux + 6125, + instrux + 6126, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_3f[] = { + instrux + 6118, + instrux + 6119, + instrux + 6120, + instrux + 6121, + instrux + 6122, + instrux + 6123, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_40[] = { + instrux + 6331, + instrux + 6332, + instrux + 6333, + instrux + 6334, + instrux + 6335, + instrux + 6336, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_42[] = { + instrux + 5385, + instrux + 5386, + instrux + 5387, + instrux + 5388, + instrux + 5389, + instrux + 5390, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_43[] = { + instrux + 5391, + instrux + 5392, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_44[] = { + instrux + 6085, + instrux + 6086, + instrux + 6087, + instrux + 6088, + instrux + 6089, + instrux + 6090, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_45[] = { + instrux + 6475, + instrux + 6476, + instrux + 6477, + instrux + 6478, + instrux + 6479, + instrux + 6480, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_46[] = { + instrux + 6445, + instrux + 6446, + instrux + 6447, + instrux + 6448, + instrux + 6449, + instrux + 6450, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_47[] = { + instrux + 6418, + instrux + 6419, + instrux + 6420, + instrux + 6421, + instrux + 6422, + instrux + 6423, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_49[] = { + instrux + 6873, + instrux + 6875, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_4a[] = { + instrux + 6893, + instrux + 6895, + instrux + 6906, + instrux + 6921, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_4b[] = { + instrux + 6885, + instrux + 6887, + instrux + 6890, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_4c[] = { + instrux + 6582, + instrux + 6583, + instrux + 6584, + instrux + 6585, + instrux + 6586, + instrux + 6587, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_4d[] = { + instrux + 6588, + instrux + 6589, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_4e[] = { + instrux + 6614, + instrux + 6615, + instrux + 6616, + instrux + 6617, + instrux + 6618, + instrux + 6619, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_4f[] = { + instrux + 6620, + instrux + 6621, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_50[] = { + instrux + 6792, + instrux + 6793, + instrux + 6794, + instrux + 7343, + instrux + 7344, + instrux + 7345, + instrux + 7349, + instrux + 7350, + instrux + 7351, + instrux + 7355, + instrux + 7356, + instrux + 7357, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_51[] = { + instrux + 6795, + instrux + 6796, + instrux + 6797, + instrux + 7346, + instrux + 7347, + instrux + 7348, + instrux + 7352, + instrux + 7353, + instrux + 7354, + instrux + 7358, + instrux + 7359, + instrux + 7360, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_52[] = { + instrux + 6798, + instrux + 6799, + instrux + 6800, + instrux + 6824, + instrux + 6863, + instrux + 6864, + instrux + 6865, + instrux + 7337, + instrux + 7338, + instrux + 7339, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_53[] = { + instrux + 6801, + instrux + 6802, + instrux + 6803, + instrux + 6823, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_54[] = { + instrux + 6804, + instrux + 6805, + instrux + 6806, + instrux + 6807, + instrux + 6808, + instrux + 6809, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_55[] = { + instrux + 6810, + instrux + 6811, + instrux + 6812, + instrux + 6813, + instrux + 6814, + instrux + 6815, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_58[] = { + instrux + 5657, + instrux + 5658, + instrux + 5659, + instrux + 5660, + instrux + 5661, + instrux + 5662, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_59[] = { + instrux + 4643, + instrux + 4644, + instrux + 4645, + instrux + 5672, + instrux + 5673, + instrux + 5674, + instrux + 5675, + instrux + 5676, + instrux + 5677, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_5a[] = { + instrux + 4646, + instrux + 4647, + instrux + 4649, + instrux + 4650, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_5b[] = { + instrux + 4648, + instrux + 4651, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_62[] = { + instrux + 6750, + instrux + 6751, + instrux + 6752, + instrux + 6753, + instrux + 6754, + instrux + 6755, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_63[] = { + instrux + 6738, + instrux + 6739, + instrux + 6740, + instrux + 6741, + instrux + 6742, + instrux + 6743, + instrux + 6744, + instrux + 6745, + instrux + 6746, + instrux + 6747, + instrux + 6748, + instrux + 6749, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_64[] = { + instrux + 5633, + instrux + 5634, + instrux + 5635, + instrux + 5636, + instrux + 5637, + instrux + 5638, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_65[] = { + instrux + 4629, + instrux + 4630, + instrux + 4631, + instrux + 4632, + instrux + 4633, + instrux + 4634, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_66[] = { + instrux + 5630, + instrux + 5631, + instrux + 5632, + instrux + 5639, + instrux + 5640, + instrux + 5641, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_67[] = { + instrux + 7319, + instrux + 7320, + instrux + 7321, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_68[] = { + instrux + 6866, + instrux + 6867, + instrux + 6868, + instrux + 6869, + instrux + 6870, + instrux + 6871, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_6d[] = { + instrux + 6908, + instrux + 6910, + instrux + 6912, + instrux + 6914, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_70[] = { + instrux + 6765, + instrux + 6766, + instrux + 6767, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_71[] = { + instrux + 6768, + instrux + 6769, + instrux + 6770, + instrux + 6771, + instrux + 6772, + instrux + 6773, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_72[] = { + instrux + 6783, + instrux + 6784, + instrux + 6785, + instrux + 6857, + instrux + 6858, + instrux + 6859, + instrux + 6860, + instrux + 6861, + instrux + 6862, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_73[] = { + instrux + 6786, + instrux + 6787, + instrux + 6788, + instrux + 6789, + instrux + 6790, + instrux + 6791, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_74[] = { + instrux + 7295, + instrux + 7296, + instrux + 7297, + instrux + 7307, + instrux + 7308, + instrux + 7309, + instrux + 7322, + instrux + 7323, + instrux + 7324, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_75[] = { + instrux + 5980, + instrux + 5981, + instrux + 5982, + instrux + 5995, + instrux + 5996, + instrux + 5997, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_76[] = { + instrux + 5983, + instrux + 5984, + instrux + 5985, + instrux + 5992, + instrux + 5993, + instrux + 5994, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_77[] = { + instrux + 5986, + instrux + 5987, + instrux + 5988, + instrux + 5989, + instrux + 5990, + instrux + 5991, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_78[] = { + instrux + 5642, + instrux + 5643, + instrux + 5644, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_79[] = { + instrux + 5681, + instrux + 5682, + instrux + 5683, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_7a[] = { + instrux + 5645, + instrux + 5646, + instrux + 5647, + instrux + 5648, + instrux + 5649, + instrux + 5650, + instrux + 5651, + instrux + 5652, + instrux + 5653, + instrux + 5654, + instrux + 5655, + instrux + 5656, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_7b[] = { + instrux + 5684, + instrux + 5685, + instrux + 5686, + instrux + 5687, + instrux + 5688, + instrux + 5689, + instrux + 5690, + instrux + 5691, + instrux + 5692, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_7c[] = { + instrux + 5663, + instrux + 5664, + instrux + 5665, + instrux + 5678, + instrux + 5679, + instrux + 5680, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_7d[] = { + instrux + 6020, + instrux + 6021, + instrux + 6022, + instrux + 6035, + instrux + 6036, + instrux + 6037, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_7e[] = { + instrux + 6023, + instrux + 6024, + instrux + 6025, + instrux + 6032, + instrux + 6033, + instrux + 6034, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_7f[] = { + instrux + 6026, + instrux + 6027, + instrux + 6028, + instrux + 6029, + instrux + 6030, + instrux + 6031, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_83[] = { + instrux + 6340, + instrux + 6341, + instrux + 6342, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_88[] = { + instrux + 5178, + instrux + 5179, + instrux + 5180, + instrux + 5181, + instrux + 5182, + instrux + 5183, + instrux + 5184, + instrux + 5185, + instrux + 5186, + instrux + 5187, + instrux + 5188, + instrux + 5189, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_89[] = { + instrux + 6041, + instrux + 6042, + instrux + 6043, + instrux + 6044, + instrux + 6045, + instrux + 6046, + instrux + 6047, + instrux + 6048, + instrux + 6049, + instrux + 6050, + instrux + 6051, + instrux + 6052, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_8a[] = { + instrux + 5040, + instrux + 5041, + instrux + 5042, + instrux + 5043, + instrux + 5044, + instrux + 5045, + instrux + 5046, + instrux + 5047, + instrux + 5048, + instrux + 5049, + instrux + 5050, + instrux + 5051, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_8b[] = { + instrux + 5957, + instrux + 5958, + instrux + 5959, + instrux + 5960, + instrux + 5961, + instrux + 5962, + instrux + 5963, + instrux + 5964, + instrux + 5965, + instrux + 5966, + instrux + 5967, + instrux + 5968, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_8d[] = { + instrux + 5975, + instrux + 5976, + instrux + 5977, + instrux + 6038, + instrux + 6039, + instrux + 6040, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_8f[] = { + instrux + 6816, + instrux + 6817, + instrux + 6818, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_90[] = { + instrux + 6067, + instrux + 6068, + instrux + 6069, + instrux + 6070, + instrux + 6071, + instrux + 6072, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_91[] = { + instrux + 6073, + instrux + 6074, + instrux + 6075, + instrux + 6076, + instrux + 6077, + instrux + 6078, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_92[] = { + instrux + 5365, + instrux + 5366, + instrux + 5367, + instrux + 5368, + instrux + 5369, + instrux + 5370, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_93[] = { + instrux + 5379, + instrux + 5380, + instrux + 5381, + instrux + 5382, + instrux + 5383, + instrux + 5384, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_96[] = { + instrux + 5249, + instrux + 5250, + instrux + 5251, + instrux + 5252, + instrux + 5253, + instrux + 5254, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_97[] = { + instrux + 5291, + instrux + 5292, + instrux + 5293, + instrux + 5294, + instrux + 5295, + instrux + 5296, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_98[] = { + instrux + 5225, + instrux + 5226, + instrux + 5227, + instrux + 5228, + instrux + 5229, + instrux + 5230, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_99[] = { + instrux + 5231, + instrux + 5232, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_9a[] = { + instrux + 5267, + instrux + 5268, + instrux + 5269, + instrux + 5270, + instrux + 5271, + instrux + 5272, + instrux + 6819, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_9b[] = { + instrux + 5273, + instrux + 5274, + instrux + 6821, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_9c[] = { + instrux + 5309, + instrux + 5310, + instrux + 5311, + instrux + 5312, + instrux + 5313, + instrux + 5314, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_9d[] = { + instrux + 5315, + instrux + 5316, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_9e[] = { + instrux + 5333, + instrux + 5334, + instrux + 5335, + instrux + 5336, + instrux + 5337, + instrux + 5338, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_9f[] = { + instrux + 5339, + instrux + 5340, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_a0[] = { + instrux + 6379, + instrux + 6380, + instrux + 6381, + instrux + 6382, + instrux + 6383, + instrux + 6384, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_a1[] = { + instrux + 6385, + instrux + 6386, + instrux + 6387, + instrux + 6388, + instrux + 6389, + instrux + 6390, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_a2[] = { + instrux + 6634, + instrux + 6635, + instrux + 6636, + instrux + 6637, + instrux + 6638, + instrux + 6639, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_a3[] = { + instrux + 6648, + instrux + 6649, + instrux + 6650, + instrux + 6651, + instrux + 6652, + instrux + 6653, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_a6[] = { + instrux + 5255, + instrux + 5256, + instrux + 5257, + instrux + 5258, + instrux + 5259, + instrux + 5260, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_a7[] = { + instrux + 5297, + instrux + 5298, + instrux + 5299, + instrux + 5300, + instrux + 5301, + instrux + 5302, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_a8[] = { + instrux + 5233, + instrux + 5234, + instrux + 5235, + instrux + 5236, + instrux + 5237, + instrux + 5238, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_a9[] = { + instrux + 5239, + instrux + 5240, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_aa[] = { + instrux + 5275, + instrux + 5276, + instrux + 5277, + instrux + 5278, + instrux + 5279, + instrux + 5280, + instrux + 6820, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_ab[] = { + instrux + 5281, + instrux + 5282, + instrux + 6822, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_ac[] = { + instrux + 5317, + instrux + 5318, + instrux + 5319, + instrux + 5320, + instrux + 5321, + instrux + 5322, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_ad[] = { + instrux + 5323, + instrux + 5324, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_ae[] = { + instrux + 5341, + instrux + 5342, + instrux + 5343, + instrux + 5344, + instrux + 5345, + instrux + 5346, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_af[] = { + instrux + 5347, + instrux + 5348, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_b4[] = { + instrux + 6094, + instrux + 6095, + instrux + 6096, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_b5[] = { + instrux + 6091, + instrux + 6092, + instrux + 6093, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_b6[] = { + instrux + 5261, + instrux + 5262, + instrux + 5263, + instrux + 5264, + instrux + 5265, + instrux + 5266, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_b7[] = { + instrux + 5303, + instrux + 5304, + instrux + 5305, + instrux + 5306, + instrux + 5307, + instrux + 5308, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_b8[] = { + instrux + 5241, + instrux + 5242, + instrux + 5243, + instrux + 5244, + instrux + 5245, + instrux + 5246, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_b9[] = { + instrux + 5247, + instrux + 5248, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_ba[] = { + instrux + 5283, + instrux + 5284, + instrux + 5285, + instrux + 5286, + instrux + 5287, + instrux + 5288, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_bb[] = { + instrux + 5289, + instrux + 5290, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_bc[] = { + instrux + 5325, + instrux + 5326, + instrux + 5327, + instrux + 5328, + instrux + 5329, + instrux + 5330, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_bd[] = { + instrux + 5331, + instrux + 5332, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_be[] = { + instrux + 5349, + instrux + 5350, + instrux + 5351, + instrux + 5352, + instrux + 5353, + instrux + 5354, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_bf[] = { + instrux + 5355, + instrux + 5356, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_c4[] = { + instrux + 5969, + instrux + 5970, + instrux + 5971, + instrux + 5972, + instrux + 5973, + instrux + 5974, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_c6[] = { + instrux + 5371, + instrux + 5372, + instrux + 5375, + instrux + 5376, + instrux + 6640, + instrux + 6641, + instrux + 6644, + instrux + 6645, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_c7[] = { + instrux + 5373, + instrux + 5374, + instrux + 5377, + instrux + 5378, + instrux + 6642, + instrux + 6643, + instrux + 6646, + instrux + 6647, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_c8[] = { + instrux + 5176, + instrux + 5177, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_ca[] = { + instrux + 6590, + instrux + 6591, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_cb[] = { + instrux + 6592, + instrux + 6593, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_cc[] = { + instrux + 6622, + instrux + 6623, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_cd[] = { + instrux + 6624, + instrux + 6625, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_cf[] = { + instrux + 6735, + instrux + 6736, + instrux + 6737, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_d2[] = { + instrux + 7361, + instrux + 7362, + instrux + 7363, + instrux + 7367, + instrux + 7368, + instrux + 7369, + instrux + 7373, + instrux + 7374, + instrux + 7375, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_d3[] = { + instrux + 7364, + instrux + 7365, + instrux + 7366, + instrux + 7370, + instrux + 7371, + instrux + 7372, + instrux + 7376, + instrux + 7377, + instrux + 7378, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_da[] = { + instrux + 4417, + instrux + 4418, + instrux + 4419, + instrux + 4422, + instrux + 4423, + instrux + 4424, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_dc[] = { + instrux + 3110, + instrux + 3111, + instrux + 3118, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_dd[] = { + instrux + 3112, + instrux + 3113, + instrux + 3119, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_de[] = { + instrux + 3114, + instrux + 3115, + instrux + 3120, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_df[] = { + instrux + 3116, + instrux + 3117, + instrux + 3121, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_e0[] = { + instrux + 2603, + instrux + 2619, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_e1[] = { + instrux + 2600, + instrux + 2616, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_e2[] = { + instrux + 2593, + instrux + 2609, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_e3[] = { + instrux + 2597, + instrux + 2613, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_e4[] = { + instrux + 2607, + instrux + 2623, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_e5[] = { + instrux + 2602, + instrux + 2618, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_e6[] = { + instrux + 2596, + instrux + 2612, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_e7[] = { + instrux + 2592, + instrux + 2608, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_e8[] = { + instrux + 2606, + instrux + 2622, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_e9[] = { + instrux + 2601, + instrux + 2617, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_ea[] = { + instrux + 2604, + instrux + 2620, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_eb[] = { + instrux + 2605, + instrux + 2621, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_ec[] = { + instrux + 2595, + instrux + 2611, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_ed[] = { + instrux + 2599, + instrux + 2615, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_ee[] = { + instrux + 2598, + instrux + 2614, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_ef[] = { + instrux + 2594, + instrux + 2610, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_f2[] = { + instrux + 918, + instrux + 919, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_f3[] = { + instrux + 926, + instrux + 927, + instrux + 930, + instrux + 931, + instrux + 934, + instrux + 935, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_f5[] = { + instrux + 938, + instrux + 939, + instrux + 941, + instrux + 943, + instrux + 945, + instrux + 947, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_f6[] = { + instrux + 779, + instrux + 781, + NULL +}; + +static const struct itemplate * const itbl_evex_map2_f7[] = { + instrux + 710, + instrux + 711, + instrux + 712, + instrux + 714, + instrux + 715, + instrux + 716, + instrux + 922, + instrux + 923, + NULL +}; + +static const struct itemplate * const * const itbl_evex_map2[256] = { + itbl_evex_map2_00, + NULL, + NULL, + NULL, + itbl_evex_map2_04, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_evex_map2_0b, + itbl_evex_map2_0c, + itbl_evex_map2_0d, + NULL, + NULL, + itbl_evex_map2_10, + itbl_evex_map2_11, + itbl_evex_map2_12, + itbl_evex_map2_13, + itbl_evex_map2_14, + itbl_evex_map2_15, + itbl_evex_map2_16, + NULL, + itbl_evex_map2_18, + itbl_evex_map2_19, + itbl_evex_map2_1a, + itbl_evex_map2_1b, + itbl_evex_map2_1c, + itbl_evex_map2_1d, + itbl_evex_map2_1e, + itbl_evex_map2_1f, + itbl_evex_map2_20, + itbl_evex_map2_21, + itbl_evex_map2_22, + itbl_evex_map2_23, + itbl_evex_map2_24, + itbl_evex_map2_25, + itbl_evex_map2_26, + itbl_evex_map2_27, + itbl_evex_map2_28, + itbl_evex_map2_29, + itbl_evex_map2_2a, + itbl_evex_map2_2b, + itbl_evex_map2_2c, + itbl_evex_map2_2d, + NULL, + NULL, + itbl_evex_map2_30, + itbl_evex_map2_31, + itbl_evex_map2_32, + itbl_evex_map2_33, + itbl_evex_map2_34, + itbl_evex_map2_35, + itbl_evex_map2_36, + itbl_evex_map2_37, + itbl_evex_map2_38, + itbl_evex_map2_39, + itbl_evex_map2_3a, + itbl_evex_map2_3b, + itbl_evex_map2_3c, + itbl_evex_map2_3d, + itbl_evex_map2_3e, + itbl_evex_map2_3f, + itbl_evex_map2_40, + NULL, + itbl_evex_map2_42, + itbl_evex_map2_43, + itbl_evex_map2_44, + itbl_evex_map2_45, + itbl_evex_map2_46, + itbl_evex_map2_47, + NULL, + itbl_evex_map2_49, + itbl_evex_map2_4a, + itbl_evex_map2_4b, + itbl_evex_map2_4c, + itbl_evex_map2_4d, + itbl_evex_map2_4e, + itbl_evex_map2_4f, + itbl_evex_map2_50, + itbl_evex_map2_51, + itbl_evex_map2_52, + itbl_evex_map2_53, + itbl_evex_map2_54, + itbl_evex_map2_55, + NULL, + NULL, + itbl_evex_map2_58, + itbl_evex_map2_59, + itbl_evex_map2_5a, + itbl_evex_map2_5b, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_evex_map2_62, + itbl_evex_map2_63, + itbl_evex_map2_64, + itbl_evex_map2_65, + itbl_evex_map2_66, + itbl_evex_map2_67, + itbl_evex_map2_68, + NULL, + NULL, + NULL, + NULL, + itbl_evex_map2_6d, + NULL, + NULL, + itbl_evex_map2_70, + itbl_evex_map2_71, + itbl_evex_map2_72, + itbl_evex_map2_73, + itbl_evex_map2_74, + itbl_evex_map2_75, + itbl_evex_map2_76, + itbl_evex_map2_77, + itbl_evex_map2_78, + itbl_evex_map2_79, + itbl_evex_map2_7a, + itbl_evex_map2_7b, + itbl_evex_map2_7c, + itbl_evex_map2_7d, + itbl_evex_map2_7e, + itbl_evex_map2_7f, + NULL, + NULL, + NULL, + itbl_evex_map2_83, + NULL, + NULL, + NULL, + NULL, + itbl_evex_map2_88, + itbl_evex_map2_89, + itbl_evex_map2_8a, + itbl_evex_map2_8b, + NULL, + itbl_evex_map2_8d, + NULL, + itbl_evex_map2_8f, + itbl_evex_map2_90, + itbl_evex_map2_91, + itbl_evex_map2_92, + itbl_evex_map2_93, + NULL, + NULL, + itbl_evex_map2_96, + itbl_evex_map2_97, + itbl_evex_map2_98, + itbl_evex_map2_99, + itbl_evex_map2_9a, + itbl_evex_map2_9b, + itbl_evex_map2_9c, + itbl_evex_map2_9d, + itbl_evex_map2_9e, + itbl_evex_map2_9f, + itbl_evex_map2_a0, + itbl_evex_map2_a1, + itbl_evex_map2_a2, + itbl_evex_map2_a3, + NULL, + NULL, + itbl_evex_map2_a6, + itbl_evex_map2_a7, + itbl_evex_map2_a8, + itbl_evex_map2_a9, + itbl_evex_map2_aa, + itbl_evex_map2_ab, + itbl_evex_map2_ac, + itbl_evex_map2_ad, + itbl_evex_map2_ae, + itbl_evex_map2_af, + NULL, + NULL, + NULL, + NULL, + itbl_evex_map2_b4, + itbl_evex_map2_b5, + itbl_evex_map2_b6, + itbl_evex_map2_b7, + itbl_evex_map2_b8, + itbl_evex_map2_b9, + itbl_evex_map2_ba, + itbl_evex_map2_bb, + itbl_evex_map2_bc, + itbl_evex_map2_bd, + itbl_evex_map2_be, + itbl_evex_map2_bf, + NULL, + NULL, + NULL, + NULL, + itbl_evex_map2_c4, + NULL, + itbl_evex_map2_c6, + itbl_evex_map2_c7, + itbl_evex_map2_c8, + NULL, + itbl_evex_map2_ca, + itbl_evex_map2_cb, + itbl_evex_map2_cc, + itbl_evex_map2_cd, + NULL, + itbl_evex_map2_cf, + NULL, + NULL, + itbl_evex_map2_d2, + itbl_evex_map2_d3, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_evex_map2_da, + NULL, + itbl_evex_map2_dc, + itbl_evex_map2_dd, + itbl_evex_map2_de, + itbl_evex_map2_df, + itbl_evex_map2_e0, + itbl_evex_map2_e1, + itbl_evex_map2_e2, + itbl_evex_map2_e3, + itbl_evex_map2_e4, + itbl_evex_map2_e5, + itbl_evex_map2_e6, + itbl_evex_map2_e7, + itbl_evex_map2_e8, + itbl_evex_map2_e9, + itbl_evex_map2_ea, + itbl_evex_map2_eb, + itbl_evex_map2_ec, + itbl_evex_map2_ed, + itbl_evex_map2_ee, + itbl_evex_map2_ef, + NULL, + NULL, + itbl_evex_map2_f2, + itbl_evex_map2_f3, + NULL, + itbl_evex_map2_f5, + itbl_evex_map2_f6, + itbl_evex_map2_f7, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, +}; + +static const struct itemplate * const itbl_evex_map3_00[] = { + instrux + 6016, + instrux + 6017, + NULL +}; + +static const struct itemplate * const itbl_evex_map3_01[] = { + instrux + 6010, + instrux + 6011, + NULL +}; + +static const struct itemplate * const itbl_evex_map3_03[] = { + instrux + 4611, + instrux + 4612, + instrux + 4613, + instrux + 4614, + instrux + 4615, + instrux + 4616, + NULL +}; + +static const struct itemplate * const itbl_evex_map3_04[] = { + instrux + 6004, + instrux + 6005, + instrux + 6006, + NULL +}; + +static const struct itemplate * const itbl_evex_map3_05[] = { + instrux + 5998, + instrux + 5999, + instrux + 6000, + NULL +}; + +static const struct itemplate * const itbl_evex_map3_07[] = { + instrux + 6907, + instrux + 6909, + instrux + 6913, + instrux + 6920, + NULL +}; + +static const struct itemplate * const itbl_evex_map3_08[] = { + instrux + 6605, + instrux + 6606, + instrux + 6607, + instrux + 6608, + instrux + 6609, + instrux + 6610, + instrux + 7153, + instrux + 7154, + instrux + 7155, + instrux + 7274, + instrux + 7275, + instrux + 7276, + NULL +}; + +static const struct itemplate * const itbl_evex_map3_09[] = { + instrux + 6602, + instrux + 6603, + instrux + 6604, + NULL +}; + +static const struct itemplate * const itbl_evex_map3_0a[] = { + instrux + 6612, + instrux + 6613, + instrux + 7156, + NULL +}; + +static const struct itemplate * const itbl_evex_map3_0b[] = { + instrux + 6611, + NULL +}; + +static const struct itemplate * const itbl_evex_map3_0f[] = { + instrux + 5609, + instrux + 5610, + instrux + 5611, + NULL +}; + +static const struct itemplate * const itbl_evex_map3_14[] = { + instrux + 6053, + instrux + 6054, + instrux + 6055, + instrux + 6056, + instrux + 6057, + NULL +}; + +static const struct itemplate * const itbl_evex_map3_15[] = { + instrux + 6060, + instrux + 6061, + instrux + 6062, + instrux + 6063, + NULL +}; + +static const struct itemplate * const itbl_evex_map3_16[] = { + instrux + 6058, + instrux + 6059, + NULL +}; + +static const struct itemplate * const itbl_evex_map3_17[] = { + instrux + 5214, + instrux + 5215, + instrux + 5216, + NULL +}; + +static const struct itemplate * const itbl_evex_map3_18[] = { + instrux + 5401, + instrux + 5402, + instrux + 5404, + instrux + 5405, + NULL +}; + +static const struct itemplate * const itbl_evex_map3_19[] = { + instrux + 5190, + instrux + 5191, + instrux + 5192, + instrux + 5193, + instrux + 5196, + instrux + 5197, + instrux + 5198, + instrux + 5199, + NULL +}; + +static const struct itemplate * const itbl_evex_map3_1a[] = { + instrux + 5403, + instrux + 5406, + NULL +}; + +static const struct itemplate * const itbl_evex_map3_1b[] = { + instrux + 5194, + instrux + 5195, + instrux + 5200, + instrux + 5201, + NULL +}; + +static const struct itemplate * const itbl_evex_map3_1d[] = { + instrux + 5082, + instrux + 5083, + instrux + 5084, + instrux + 5085, + instrux + 5086, + instrux + 5087, + instrux + 6971, + instrux + 6972, + instrux + 6973, + instrux + 6974, + instrux + 6975, + instrux + 6976, + NULL +}; + +static const struct itemplate * const itbl_evex_map3_1e[] = { + instrux + 5729, + instrux + 5730, + instrux + 5731, + instrux + 5732, + instrux + 5733, + instrux + 5734, + instrux + 5753, + instrux + 5754, + instrux + 5755, + instrux + 5756, + instrux + 5757, + instrux + 5758, + instrux + 5777, + instrux + 5778, + instrux + 5779, + instrux + 5780, + instrux + 5781, + instrux + 5782, + instrux + 5801, + instrux + 5802, + instrux + 5803, + instrux + 5804, + instrux + 5805, + instrux + 5806, + instrux + 5825, + instrux + 5826, + instrux + 5827, + instrux + 5828, + instrux + 5829, + instrux + 5830, + instrux + 5849, + instrux + 5850, + instrux + 5851, + instrux + 5852, + instrux + 5853, + instrux + 5854, + instrux + 5873, + instrux + 5874, + instrux + 5875, + instrux + 5876, + instrux + 5877, + instrux + 5878, + instrux + 5897, + instrux + 5898, + instrux + 5899, + instrux + 5900, + instrux + 5901, + instrux + 5902, + instrux + 5921, + instrux + 5922, + instrux + 5923, + instrux + 5924, + instrux + 5925, + instrux + 5926, + instrux + 5945, + instrux + 5946, + instrux + 5947, + instrux + 5948, + instrux + 5949, + instrux + 5950, + NULL +}; + +static const struct itemplate * const itbl_evex_map3_1f[] = { + instrux + 5720, + instrux + 5721, + instrux + 5722, + instrux + 5723, + instrux + 5724, + instrux + 5725, + instrux + 5744, + instrux + 5745, + instrux + 5746, + instrux + 5747, + instrux + 5748, + instrux + 5749, + instrux + 5768, + instrux + 5769, + instrux + 5770, + instrux + 5771, + instrux + 5772, + instrux + 5773, + instrux + 5792, + instrux + 5793, + instrux + 5794, + instrux + 5795, + instrux + 5796, + instrux + 5797, + instrux + 5816, + instrux + 5817, + instrux + 5818, + instrux + 5819, + instrux + 5820, + instrux + 5821, + instrux + 5840, + instrux + 5841, + instrux + 5842, + instrux + 5843, + instrux + 5844, + instrux + 5845, + instrux + 5864, + instrux + 5865, + instrux + 5866, + instrux + 5867, + instrux + 5868, + instrux + 5869, + instrux + 5888, + instrux + 5889, + instrux + 5890, + instrux + 5891, + instrux + 5892, + instrux + 5893, + instrux + 5912, + instrux + 5913, + instrux + 5914, + instrux + 5915, + instrux + 5916, + instrux + 5917, + instrux + 5936, + instrux + 5937, + instrux + 5938, + instrux + 5939, + instrux + 5940, + instrux + 5941, + NULL +}; + +static const struct itemplate * const itbl_evex_map3_20[] = { + instrux + 6079, + instrux + 6080, + NULL +}; + +static const struct itemplate * const itbl_evex_map3_21[] = { + instrux + 5413, + NULL +}; + +static const struct itemplate * const itbl_evex_map3_22[] = { + instrux + 6081, + instrux + 6082, + NULL +}; + +static const struct itemplate * const itbl_evex_map3_23[] = { + instrux + 6654, + instrux + 6655, + instrux + 6656, + instrux + 6657, + NULL +}; + +static const struct itemplate * const itbl_evex_map3_25[] = { + instrux + 6514, + instrux + 6515, + instrux + 6516, + instrux + 6517, + instrux + 6518, + instrux + 6519, + NULL +}; + +static const struct itemplate * const itbl_evex_map3_26[] = { + instrux + 5393, + instrux + 5394, + instrux + 5395, + instrux + 5396, + instrux + 5397, + instrux + 5398, + instrux + 7123, + instrux + 7124, + instrux + 7125, + instrux + 7256, + instrux + 7257, + instrux + 7258, + NULL +}; + +static const struct itemplate * const itbl_evex_map3_27[] = { + instrux + 5399, + instrux + 5400, + instrux + 7126, + NULL +}; + +static const struct itemplate * const itbl_evex_map3_30[] = { + instrux + 4566, + instrux + 4568, + NULL +}; + +static const struct itemplate * const itbl_evex_map3_31[] = { + instrux + 4570, + instrux + 4572, + NULL +}; + +static const struct itemplate * const itbl_evex_map3_32[] = { + instrux + 4558, + instrux + 4560, + NULL +}; + +static const struct itemplate * const itbl_evex_map3_33[] = { + instrux + 4562, + instrux + 4564, + NULL +}; + +static const struct itemplate * const itbl_evex_map3_38[] = { + instrux + 5407, + instrux + 5408, + instrux + 5410, + instrux + 5411, + NULL +}; + +static const struct itemplate * const itbl_evex_map3_39[] = { + instrux + 5202, + instrux + 5203, + instrux + 5204, + instrux + 5205, + instrux + 5208, + instrux + 5209, + instrux + 5210, + instrux + 5211, + NULL +}; + +static const struct itemplate * const itbl_evex_map3_3a[] = { + instrux + 5409, + instrux + 5412, + NULL +}; + +static const struct itemplate * const itbl_evex_map3_3b[] = { + instrux + 5206, + instrux + 5207, + instrux + 5212, + instrux + 5213, + NULL +}; + +static const struct itemplate * const itbl_evex_map3_3e[] = { + instrux + 5726, + instrux + 5727, + instrux + 5728, + instrux + 5735, + instrux + 5736, + instrux + 5737, + instrux + 5750, + instrux + 5751, + instrux + 5752, + instrux + 5759, + instrux + 5760, + instrux + 5761, + instrux + 5774, + instrux + 5775, + instrux + 5776, + instrux + 5783, + instrux + 5784, + instrux + 5785, + instrux + 5798, + instrux + 5799, + instrux + 5800, + instrux + 5807, + instrux + 5808, + instrux + 5809, + instrux + 5822, + instrux + 5823, + instrux + 5824, + instrux + 5831, + instrux + 5832, + instrux + 5833, + instrux + 5846, + instrux + 5847, + instrux + 5848, + instrux + 5855, + instrux + 5856, + instrux + 5857, + instrux + 5870, + instrux + 5871, + instrux + 5872, + instrux + 5879, + instrux + 5880, + instrux + 5881, + instrux + 5894, + instrux + 5895, + instrux + 5896, + instrux + 5903, + instrux + 5904, + instrux + 5905, + instrux + 5918, + instrux + 5919, + instrux + 5920, + instrux + 5927, + instrux + 5928, + instrux + 5929, + instrux + 5942, + instrux + 5943, + instrux + 5944, + instrux + 5951, + instrux + 5952, + instrux + 5953, + NULL +}; + +static const struct itemplate * const itbl_evex_map3_3f[] = { + instrux + 5717, + instrux + 5718, + instrux + 5719, + instrux + 5738, + instrux + 5739, + instrux + 5740, + instrux + 5741, + instrux + 5742, + instrux + 5743, + instrux + 5762, + instrux + 5763, + instrux + 5764, + instrux + 5765, + instrux + 5766, + instrux + 5767, + instrux + 5786, + instrux + 5787, + instrux + 5788, + instrux + 5789, + instrux + 5790, + instrux + 5791, + instrux + 5810, + instrux + 5811, + instrux + 5812, + instrux + 5813, + instrux + 5814, + instrux + 5815, + instrux + 5834, + instrux + 5835, + instrux + 5836, + instrux + 5837, + instrux + 5838, + instrux + 5839, + instrux + 5858, + instrux + 5859, + instrux + 5860, + instrux + 5861, + instrux + 5862, + instrux + 5863, + instrux + 5882, + instrux + 5883, + instrux + 5884, + instrux + 5885, + instrux + 5886, + instrux + 5887, + instrux + 5906, + instrux + 5907, + instrux + 5908, + instrux + 5909, + instrux + 5910, + instrux + 5911, + instrux + 5930, + instrux + 5931, + instrux + 5932, + instrux + 5933, + instrux + 5934, + instrux + 5935, + instrux + 5954, + instrux + 5955, + instrux + 5956, + NULL +}; + +static const struct itemplate * const itbl_evex_map3_42[] = { + instrux + 5165, + instrux + 5166, + instrux + 5167, + instrux + 7340, + instrux + 7341, + instrux + 7342, + NULL +}; + +static const struct itemplate * const itbl_evex_map3_43[] = { + instrux + 6658, + instrux + 6659, + instrux + 6660, + instrux + 6661, + NULL +}; + +static const struct itemplate * const itbl_evex_map3_44[] = { + instrux + 3819, + instrux + 3820, + instrux + 3821, + instrux + 3822, + instrux + 3823, + instrux + 3824, + instrux + 3825, + instrux + 3826, + instrux + 3827, + instrux + 3828, + instrux + 3829, + instrux + 3830, + instrux + 3831, + instrux + 3832, + instrux + 3833, + NULL +}; + +static const struct itemplate * const itbl_evex_map3_50[] = { + instrux + 6574, + instrux + 6575, + instrux + 6576, + instrux + 6577, + instrux + 6578, + instrux + 6579, + NULL +}; + +static const struct itemplate * const itbl_evex_map3_51[] = { + instrux + 6580, + instrux + 6581, + NULL +}; + +static const struct itemplate * const itbl_evex_map3_52[] = { + instrux + 7379, + instrux + 7380, + instrux + 7381, + instrux + 7382, + instrux + 7383, + instrux + 7384, + instrux + 7385, + instrux + 7386, + instrux + 7387, + instrux + 7388, + instrux + 7389, + instrux + 7390, + NULL +}; + +static const struct itemplate * const itbl_evex_map3_53[] = { + instrux + 7391, + instrux + 7392, + instrux + 7393, + NULL +}; + +static const struct itemplate * const itbl_evex_map3_54[] = { + instrux + 5217, + instrux + 5218, + instrux + 5219, + instrux + 5220, + instrux + 5221, + instrux + 5222, + NULL +}; + +static const struct itemplate * const itbl_evex_map3_55[] = { + instrux + 5223, + instrux + 5224, + NULL +}; + +static const struct itemplate * const itbl_evex_map3_56[] = { + instrux + 6594, + instrux + 6595, + instrux + 6596, + instrux + 6597, + instrux + 6598, + instrux + 6599, + instrux + 7149, + instrux + 7150, + instrux + 7151, + instrux + 7271, + instrux + 7272, + instrux + 7273, + NULL +}; + +static const struct itemplate * const itbl_evex_map3_57[] = { + instrux + 6600, + instrux + 6601, + instrux + 7152, + NULL +}; + +static const struct itemplate * const itbl_evex_map3_66[] = { + instrux + 5357, + instrux + 5358, + instrux + 5359, + instrux + 5360, + instrux + 5361, + instrux + 5362, + instrux + 7115, + instrux + 7116, + instrux + 7117, + instrux + 7250, + instrux + 7251, + instrux + 7252, + NULL +}; + +static const struct itemplate * const itbl_evex_map3_67[] = { + instrux + 5363, + instrux + 5364, + instrux + 7118, + NULL +}; + +static const struct itemplate * const itbl_evex_map3_70[] = { + instrux + 6756, + instrux + 6757, + instrux + 6758, + NULL +}; + +static const struct itemplate * const itbl_evex_map3_71[] = { + instrux + 6759, + instrux + 6760, + instrux + 6761, + instrux + 6762, + instrux + 6763, + instrux + 6764, + NULL +}; + +static const struct itemplate * const itbl_evex_map3_72[] = { + instrux + 6774, + instrux + 6775, + instrux + 6776, + NULL +}; + +static const struct itemplate * const itbl_evex_map3_73[] = { + instrux + 6777, + instrux + 6778, + instrux + 6779, + instrux + 6780, + instrux + 6781, + instrux + 6782, + NULL +}; + +static const struct itemplate * const itbl_evex_map3_77[] = { + instrux + 6911, + instrux + 6915, + NULL +}; + +static const struct itemplate * const itbl_evex_map3_c2[] = { + instrux + 6933, + instrux + 6934, + instrux + 6935, + instrux + 6936, + instrux + 7207, + instrux + 7208, + instrux + 7209, + NULL +}; + +static const struct itemplate * const itbl_evex_map3_ce[] = { + instrux + 6729, + instrux + 6730, + instrux + 6731, + NULL +}; + +static const struct itemplate * const itbl_evex_map3_cf[] = { + instrux + 6723, + instrux + 6724, + instrux + 6725, + NULL +}; + +static const struct itemplate * const itbl_evex_map3_f0[] = { + instrux + 709, + instrux + 713, + NULL +}; + +static const struct itemplate * const * const itbl_evex_map3[256] = { + itbl_evex_map3_00, + itbl_evex_map3_01, + NULL, + itbl_evex_map3_03, + itbl_evex_map3_04, + itbl_evex_map3_05, + NULL, + itbl_evex_map3_07, + itbl_evex_map3_08, + itbl_evex_map3_09, + itbl_evex_map3_0a, + itbl_evex_map3_0b, + NULL, + NULL, + NULL, + itbl_evex_map3_0f, + NULL, + NULL, + NULL, + NULL, + itbl_evex_map3_14, + itbl_evex_map3_15, + itbl_evex_map3_16, + itbl_evex_map3_17, + itbl_evex_map3_18, + itbl_evex_map3_19, + itbl_evex_map3_1a, + itbl_evex_map3_1b, + NULL, + itbl_evex_map3_1d, + itbl_evex_map3_1e, + itbl_evex_map3_1f, + itbl_evex_map3_20, + itbl_evex_map3_21, + itbl_evex_map3_22, + itbl_evex_map3_23, + NULL, + itbl_evex_map3_25, + itbl_evex_map3_26, + itbl_evex_map3_27, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_evex_map3_30, + itbl_evex_map3_31, + itbl_evex_map3_32, + itbl_evex_map3_33, + NULL, + NULL, + NULL, + NULL, + itbl_evex_map3_38, + itbl_evex_map3_39, + itbl_evex_map3_3a, + itbl_evex_map3_3b, + NULL, + NULL, + itbl_evex_map3_3e, + itbl_evex_map3_3f, + NULL, + NULL, + itbl_evex_map3_42, + itbl_evex_map3_43, + itbl_evex_map3_44, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_evex_map3_50, + itbl_evex_map3_51, + itbl_evex_map3_52, + itbl_evex_map3_53, + itbl_evex_map3_54, + itbl_evex_map3_55, + itbl_evex_map3_56, + itbl_evex_map3_57, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_evex_map3_66, + itbl_evex_map3_67, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_evex_map3_70, + itbl_evex_map3_71, + itbl_evex_map3_72, + itbl_evex_map3_73, + NULL, + NULL, + NULL, + itbl_evex_map3_77, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_evex_map3_c2, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_evex_map3_ce, + itbl_evex_map3_cf, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_evex_map3_f0, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, +}; + +static const struct itemplate * const itbl_evex_map4_00[] = { + instrux + 66, + instrux + 67, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_01[] = { + instrux + 68, + instrux + 69, + instrux + 70, + instrux + 71, + instrux + 72, + instrux + 73, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_02[] = { + instrux + 58, + instrux + 59, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_03[] = { + instrux + 60, + instrux + 61, + instrux + 62, + instrux + 63, + instrux + 64, + instrux + 65, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_08[] = { + instrux + 115, + instrux + 116, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_09[] = { + instrux + 117, + instrux + 118, + instrux + 119, + instrux + 120, + instrux + 121, + instrux + 122, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_0a[] = { + instrux + 107, + instrux + 108, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_0b[] = { + instrux + 109, + instrux + 110, + instrux + 111, + instrux + 112, + instrux + 113, + instrux + 114, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_10[] = { + instrux + 164, + instrux + 165, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_11[] = { + instrux + 166, + instrux + 167, + instrux + 168, + instrux + 169, + instrux + 170, + instrux + 171, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_12[] = { + instrux + 156, + instrux + 157, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_13[] = { + instrux + 158, + instrux + 159, + instrux + 160, + instrux + 161, + instrux + 162, + instrux + 163, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_18[] = { + instrux + 213, + instrux + 214, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_19[] = { + instrux + 215, + instrux + 216, + instrux + 217, + instrux + 218, + instrux + 219, + instrux + 220, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_1a[] = { + instrux + 205, + instrux + 206, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_1b[] = { + instrux + 207, + instrux + 208, + instrux + 209, + instrux + 210, + instrux + 211, + instrux + 212, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_20[] = { + instrux + 262, + instrux + 263, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_21[] = { + instrux + 264, + instrux + 265, + instrux + 266, + instrux + 267, + instrux + 268, + instrux + 269, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_22[] = { + instrux + 254, + instrux + 255, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_23[] = { + instrux + 256, + instrux + 257, + instrux + 258, + instrux + 259, + instrux + 260, + instrux + 261, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_24[] = { + instrux + 844, + instrux + 845, + instrux + 846, + instrux + 847, + instrux + 848, + instrux + 849, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_28[] = { + instrux + 311, + instrux + 312, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_29[] = { + instrux + 313, + instrux + 314, + instrux + 315, + instrux + 316, + instrux + 317, + instrux + 318, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_2a[] = { + instrux + 303, + instrux + 304, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_2b[] = { + instrux + 305, + instrux + 306, + instrux + 307, + instrux + 308, + instrux + 309, + instrux + 310, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_2c[] = { + instrux + 862, + instrux + 863, + instrux + 864, + instrux + 865, + instrux + 866, + instrux + 867, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_30[] = { + instrux + 360, + instrux + 361, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_31[] = { + instrux + 362, + instrux + 363, + instrux + 364, + instrux + 365, + instrux + 366, + instrux + 367, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_32[] = { + instrux + 352, + instrux + 353, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_33[] = { + instrux + 354, + instrux + 355, + instrux + 356, + instrux + 357, + instrux + 358, + instrux + 359, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_38[] = { + instrux + 1792, + instrux + 1793, + instrux + 1794, + instrux + 1795, + instrux + 1796, + instrux + 1797, + instrux + 1798, + instrux + 1799, + instrux + 1800, + instrux + 1801, + instrux + 1802, + instrux + 1803, + instrux + 1804, + instrux + 1805, + instrux + 1806, + instrux + 1807, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_39[] = { + instrux + 1808, + instrux + 1809, + instrux + 1810, + instrux + 1811, + instrux + 1812, + instrux + 1813, + instrux + 1814, + instrux + 1815, + instrux + 1816, + instrux + 1817, + instrux + 1818, + instrux + 1819, + instrux + 1820, + instrux + 1821, + instrux + 1822, + instrux + 1823, + instrux + 1824, + instrux + 1825, + instrux + 1826, + instrux + 1827, + instrux + 1828, + instrux + 1829, + instrux + 1830, + instrux + 1831, + instrux + 1832, + instrux + 1833, + instrux + 1834, + instrux + 1835, + instrux + 1836, + instrux + 1837, + instrux + 1838, + instrux + 1839, + instrux + 1840, + instrux + 1841, + instrux + 1842, + instrux + 1843, + instrux + 1844, + instrux + 1845, + instrux + 1846, + instrux + 1847, + instrux + 1848, + instrux + 1849, + instrux + 1850, + instrux + 1851, + instrux + 1852, + instrux + 1853, + instrux + 1854, + instrux + 1855, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_3a[] = { + instrux + 1856, + instrux + 1857, + instrux + 1858, + instrux + 1859, + instrux + 1860, + instrux + 1861, + instrux + 1862, + instrux + 1863, + instrux + 1864, + instrux + 1865, + instrux + 1866, + instrux + 1867, + instrux + 1868, + instrux + 1869, + instrux + 1870, + instrux + 1871, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_3b[] = { + instrux + 1872, + instrux + 1873, + instrux + 1874, + instrux + 1875, + instrux + 1876, + instrux + 1877, + instrux + 1878, + instrux + 1879, + instrux + 1880, + instrux + 1881, + instrux + 1882, + instrux + 1883, + instrux + 1884, + instrux + 1885, + instrux + 1886, + instrux + 1887, + instrux + 1888, + instrux + 1889, + instrux + 1890, + instrux + 1891, + instrux + 1892, + instrux + 1893, + instrux + 1894, + instrux + 1895, + instrux + 1896, + instrux + 1897, + instrux + 1898, + instrux + 1899, + instrux + 1900, + instrux + 1901, + instrux + 1902, + instrux + 1903, + instrux + 1904, + instrux + 1905, + instrux + 1906, + instrux + 1907, + instrux + 1908, + instrux + 1909, + instrux + 1910, + instrux + 1911, + instrux + 1912, + instrux + 1913, + instrux + 1914, + instrux + 1915, + instrux + 1916, + instrux + 1917, + instrux + 1918, + instrux + 1919, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_40[] = { + instrux + 2283, + instrux + 2299, + instrux + 2315, + instrux + 2331, + instrux + 2347, + instrux + 2363, + instrux + 2379, + instrux + 2395, + instrux + 2411, + instrux + 2427, + instrux + 2443, + instrux + 2459, + instrux + 2475, + instrux + 2491, + instrux + 2507, + instrux + 2539, + instrux + 2555, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_41[] = { + instrux + 2280, + instrux + 2296, + instrux + 2312, + instrux + 2328, + instrux + 2344, + instrux + 2360, + instrux + 2376, + instrux + 2392, + instrux + 2408, + instrux + 2424, + instrux + 2440, + instrux + 2456, + instrux + 2472, + instrux + 2488, + instrux + 2504, + instrux + 2536, + instrux + 2552, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_42[] = { + instrux + 2273, + instrux + 2289, + instrux + 2305, + instrux + 2321, + instrux + 2337, + instrux + 2353, + instrux + 2369, + instrux + 2385, + instrux + 2401, + instrux + 2417, + instrux + 2433, + instrux + 2449, + instrux + 2465, + instrux + 2481, + instrux + 2497, + instrux + 2529, + instrux + 2545, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_43[] = { + instrux + 2277, + instrux + 2293, + instrux + 2309, + instrux + 2325, + instrux + 2341, + instrux + 2357, + instrux + 2373, + instrux + 2389, + instrux + 2405, + instrux + 2421, + instrux + 2437, + instrux + 2453, + instrux + 2469, + instrux + 2485, + instrux + 2501, + instrux + 2533, + instrux + 2549, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_44[] = { + instrux + 2287, + instrux + 2303, + instrux + 2319, + instrux + 2335, + instrux + 2351, + instrux + 2367, + instrux + 2383, + instrux + 2399, + instrux + 2415, + instrux + 2431, + instrux + 2447, + instrux + 2463, + instrux + 2479, + instrux + 2495, + instrux + 2511, + instrux + 2543, + instrux + 2559, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_45[] = { + instrux + 2282, + instrux + 2298, + instrux + 2314, + instrux + 2330, + instrux + 2346, + instrux + 2362, + instrux + 2378, + instrux + 2394, + instrux + 2410, + instrux + 2426, + instrux + 2442, + instrux + 2458, + instrux + 2474, + instrux + 2490, + instrux + 2506, + instrux + 2538, + instrux + 2554, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_46[] = { + instrux + 2276, + instrux + 2292, + instrux + 2308, + instrux + 2324, + instrux + 2340, + instrux + 2356, + instrux + 2372, + instrux + 2388, + instrux + 2404, + instrux + 2420, + instrux + 2436, + instrux + 2452, + instrux + 2468, + instrux + 2484, + instrux + 2500, + instrux + 2532, + instrux + 2548, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_47[] = { + instrux + 2272, + instrux + 2288, + instrux + 2304, + instrux + 2320, + instrux + 2336, + instrux + 2352, + instrux + 2368, + instrux + 2384, + instrux + 2400, + instrux + 2416, + instrux + 2432, + instrux + 2448, + instrux + 2464, + instrux + 2480, + instrux + 2496, + instrux + 2528, + instrux + 2544, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_48[] = { + instrux + 2286, + instrux + 2302, + instrux + 2318, + instrux + 2334, + instrux + 2350, + instrux + 2366, + instrux + 2382, + instrux + 2398, + instrux + 2414, + instrux + 2430, + instrux + 2446, + instrux + 2462, + instrux + 2478, + instrux + 2494, + instrux + 2510, + instrux + 2542, + instrux + 2558, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_49[] = { + instrux + 2281, + instrux + 2297, + instrux + 2313, + instrux + 2329, + instrux + 2345, + instrux + 2361, + instrux + 2377, + instrux + 2393, + instrux + 2409, + instrux + 2425, + instrux + 2441, + instrux + 2457, + instrux + 2473, + instrux + 2489, + instrux + 2505, + instrux + 2537, + instrux + 2553, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_4a[] = { + instrux + 2284, + instrux + 2300, + instrux + 2316, + instrux + 2332, + instrux + 2348, + instrux + 2364, + instrux + 2380, + instrux + 2396, + instrux + 2412, + instrux + 2428, + instrux + 2444, + instrux + 2460, + instrux + 2476, + instrux + 2492, + instrux + 2508, + instrux + 2540, + instrux + 2556, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_4b[] = { + instrux + 2285, + instrux + 2301, + instrux + 2317, + instrux + 2333, + instrux + 2349, + instrux + 2365, + instrux + 2381, + instrux + 2397, + instrux + 2413, + instrux + 2429, + instrux + 2445, + instrux + 2461, + instrux + 2477, + instrux + 2493, + instrux + 2509, + instrux + 2541, + instrux + 2557, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_4c[] = { + instrux + 2275, + instrux + 2291, + instrux + 2307, + instrux + 2323, + instrux + 2339, + instrux + 2355, + instrux + 2371, + instrux + 2387, + instrux + 2403, + instrux + 2419, + instrux + 2435, + instrux + 2451, + instrux + 2467, + instrux + 2483, + instrux + 2499, + instrux + 2531, + instrux + 2547, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_4d[] = { + instrux + 2279, + instrux + 2295, + instrux + 2311, + instrux + 2327, + instrux + 2343, + instrux + 2359, + instrux + 2375, + instrux + 2391, + instrux + 2407, + instrux + 2423, + instrux + 2439, + instrux + 2455, + instrux + 2471, + instrux + 2487, + instrux + 2503, + instrux + 2535, + instrux + 2551, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_4e[] = { + instrux + 2278, + instrux + 2294, + instrux + 2310, + instrux + 2326, + instrux + 2342, + instrux + 2358, + instrux + 2374, + instrux + 2390, + instrux + 2406, + instrux + 2422, + instrux + 2438, + instrux + 2454, + instrux + 2470, + instrux + 2486, + instrux + 2502, + instrux + 2534, + instrux + 2550, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_4f[] = { + instrux + 2274, + instrux + 2290, + instrux + 2306, + instrux + 2322, + instrux + 2338, + instrux + 2354, + instrux + 2370, + instrux + 2386, + instrux + 2402, + instrux + 2418, + instrux + 2434, + instrux + 2450, + instrux + 2466, + instrux + 2482, + instrux + 2498, + instrux + 2530, + instrux + 2546, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_60[] = { + instrux + 984, + instrux + 985, + instrux + 986, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_61[] = { + instrux + 987, + instrux + 988, + instrux + 989, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_65[] = { + instrux + 6839, + instrux + 6841, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_66[] = { + instrux + 828, + instrux + 829, + instrux + 830, + instrux + 831, + instrux + 834, + instrux + 835, + instrux + 836, + instrux + 837, + instrux + 6843, + instrux + 6845, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_69[] = { + instrux + 771, + instrux + 772, + instrux + 773, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_6b[] = { + instrux + 768, + instrux + 769, + instrux + 770, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_80[] = { + instrux + 80, + instrux + 81, + instrux + 129, + instrux + 130, + instrux + 178, + instrux + 179, + instrux + 227, + instrux + 228, + instrux + 276, + instrux + 277, + instrux + 325, + instrux + 326, + instrux + 374, + instrux + 375, + instrux + 1968, + instrux + 1969, + instrux + 1970, + instrux + 1971, + instrux + 1972, + instrux + 1973, + instrux + 1974, + instrux + 1975, + instrux + 1976, + instrux + 1977, + instrux + 1978, + instrux + 1979, + instrux + 1980, + instrux + 1981, + instrux + 1982, + instrux + 1983, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_81[] = { + instrux + 82, + instrux + 83, + instrux + 84, + instrux + 85, + instrux + 86, + instrux + 87, + instrux + 131, + instrux + 132, + instrux + 133, + instrux + 134, + instrux + 135, + instrux + 136, + instrux + 180, + instrux + 181, + instrux + 182, + instrux + 183, + instrux + 184, + instrux + 185, + instrux + 229, + instrux + 230, + instrux + 231, + instrux + 232, + instrux + 233, + instrux + 234, + instrux + 278, + instrux + 279, + instrux + 280, + instrux + 281, + instrux + 282, + instrux + 283, + instrux + 327, + instrux + 328, + instrux + 329, + instrux + 330, + instrux + 331, + instrux + 332, + instrux + 376, + instrux + 377, + instrux + 378, + instrux + 379, + instrux + 380, + instrux + 381, + instrux + 1984, + instrux + 1985, + instrux + 1986, + instrux + 1987, + instrux + 1988, + instrux + 1989, + instrux + 1990, + instrux + 1991, + instrux + 1992, + instrux + 1993, + instrux + 1994, + instrux + 1995, + instrux + 1996, + instrux + 1997, + instrux + 1998, + instrux + 1999, + instrux + 2000, + instrux + 2001, + instrux + 2002, + instrux + 2003, + instrux + 2004, + instrux + 2005, + instrux + 2006, + instrux + 2007, + instrux + 2008, + instrux + 2009, + instrux + 2010, + instrux + 2011, + instrux + 2012, + instrux + 2013, + instrux + 2014, + instrux + 2015, + instrux + 2016, + instrux + 2017, + instrux + 2018, + instrux + 2019, + instrux + 2020, + instrux + 2021, + instrux + 2022, + instrux + 2023, + instrux + 2024, + instrux + 2025, + instrux + 2026, + instrux + 2027, + instrux + 2028, + instrux + 2029, + instrux + 2030, + instrux + 2031, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_83[] = { + instrux + 74, + instrux + 75, + instrux + 76, + instrux + 77, + instrux + 78, + instrux + 79, + instrux + 123, + instrux + 124, + instrux + 125, + instrux + 126, + instrux + 127, + instrux + 128, + instrux + 172, + instrux + 173, + instrux + 174, + instrux + 175, + instrux + 176, + instrux + 177, + instrux + 221, + instrux + 222, + instrux + 223, + instrux + 224, + instrux + 225, + instrux + 226, + instrux + 270, + instrux + 271, + instrux + 272, + instrux + 273, + instrux + 274, + instrux + 275, + instrux + 319, + instrux + 320, + instrux + 321, + instrux + 322, + instrux + 323, + instrux + 324, + instrux + 368, + instrux + 369, + instrux + 370, + instrux + 371, + instrux + 372, + instrux + 373, + instrux + 1920, + instrux + 1921, + instrux + 1922, + instrux + 1923, + instrux + 1924, + instrux + 1925, + instrux + 1926, + instrux + 1927, + instrux + 1928, + instrux + 1929, + instrux + 1930, + instrux + 1931, + instrux + 1932, + instrux + 1933, + instrux + 1934, + instrux + 1935, + instrux + 1936, + instrux + 1937, + instrux + 1938, + instrux + 1939, + instrux + 1940, + instrux + 1941, + instrux + 1942, + instrux + 1943, + instrux + 1944, + instrux + 1945, + instrux + 1946, + instrux + 1947, + instrux + 1948, + instrux + 1949, + instrux + 1950, + instrux + 1951, + instrux + 1952, + instrux + 1953, + instrux + 1954, + instrux + 1955, + instrux + 1956, + instrux + 1957, + instrux + 1958, + instrux + 1959, + instrux + 1960, + instrux + 1961, + instrux + 1962, + instrux + 1963, + instrux + 1964, + instrux + 1965, + instrux + 1966, + instrux + 1967, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_84[] = { + instrux + 2032, + instrux + 2033, + instrux + 2034, + instrux + 2035, + instrux + 2036, + instrux + 2037, + instrux + 2038, + instrux + 2039, + instrux + 2040, + instrux + 2041, + instrux + 2042, + instrux + 2043, + instrux + 2044, + instrux + 2045, + instrux + 2046, + instrux + 2047, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_85[] = { + instrux + 2048, + instrux + 2049, + instrux + 2050, + instrux + 2051, + instrux + 2052, + instrux + 2053, + instrux + 2054, + instrux + 2055, + instrux + 2056, + instrux + 2057, + instrux + 2058, + instrux + 2059, + instrux + 2060, + instrux + 2061, + instrux + 2062, + instrux + 2063, + instrux + 2064, + instrux + 2065, + instrux + 2066, + instrux + 2067, + instrux + 2068, + instrux + 2069, + instrux + 2070, + instrux + 2071, + instrux + 2072, + instrux + 2073, + instrux + 2074, + instrux + 2075, + instrux + 2076, + instrux + 2077, + instrux + 2078, + instrux + 2079, + instrux + 2080, + instrux + 2081, + instrux + 2082, + instrux + 2083, + instrux + 2084, + instrux + 2085, + instrux + 2086, + instrux + 2087, + instrux + 2088, + instrux + 2089, + instrux + 2090, + instrux + 2091, + instrux + 2092, + instrux + 2093, + instrux + 2094, + instrux + 2095, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_88[] = { + instrux + 3077, + instrux + 3078, + instrux + 3079, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_8a[] = { + instrux + 32, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_8b[] = { + instrux + 33, + instrux + 34, + instrux + 35, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_8f[] = { + instrux + 1775, + instrux + 1776, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_a5[] = { + instrux + 850, + instrux + 851, + instrux + 852, + instrux + 853, + instrux + 854, + instrux + 855, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_ad[] = { + instrux + 868, + instrux + 869, + instrux + 870, + instrux + 871, + instrux + 872, + instrux + 873, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_af[] = { + instrux + 762, + instrux + 763, + instrux + 764, + instrux + 765, + instrux + 766, + instrux + 767, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_c0[] = { + instrux + 533, + instrux + 534, + instrux + 557, + instrux + 558, + instrux + 581, + instrux + 582, + instrux + 605, + instrux + 606, + instrux + 629, + instrux + 630, + instrux + 653, + instrux + 654, + instrux + 677, + instrux + 678, + instrux + 701, + instrux + 702, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_c1[] = { + instrux + 535, + instrux + 536, + instrux + 537, + instrux + 538, + instrux + 539, + instrux + 540, + instrux + 559, + instrux + 560, + instrux + 561, + instrux + 562, + instrux + 563, + instrux + 564, + instrux + 583, + instrux + 584, + instrux + 585, + instrux + 586, + instrux + 587, + instrux + 588, + instrux + 607, + instrux + 608, + instrux + 609, + instrux + 610, + instrux + 611, + instrux + 612, + instrux + 631, + instrux + 632, + instrux + 633, + instrux + 634, + instrux + 635, + instrux + 636, + instrux + 655, + instrux + 656, + instrux + 657, + instrux + 658, + instrux + 659, + instrux + 660, + instrux + 679, + instrux + 680, + instrux + 681, + instrux + 682, + instrux + 683, + instrux + 684, + instrux + 703, + instrux + 704, + instrux + 705, + instrux + 706, + instrux + 707, + instrux + 708, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_d0[] = { + instrux + 517, + instrux + 518, + instrux + 541, + instrux + 542, + instrux + 565, + instrux + 566, + instrux + 589, + instrux + 590, + instrux + 613, + instrux + 614, + instrux + 637, + instrux + 638, + instrux + 661, + instrux + 662, + instrux + 685, + instrux + 686, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_d1[] = { + instrux + 519, + instrux + 520, + instrux + 521, + instrux + 522, + instrux + 523, + instrux + 524, + instrux + 543, + instrux + 544, + instrux + 545, + instrux + 546, + instrux + 547, + instrux + 548, + instrux + 567, + instrux + 568, + instrux + 569, + instrux + 570, + instrux + 571, + instrux + 572, + instrux + 591, + instrux + 592, + instrux + 593, + instrux + 594, + instrux + 595, + instrux + 596, + instrux + 615, + instrux + 616, + instrux + 617, + instrux + 618, + instrux + 619, + instrux + 620, + instrux + 639, + instrux + 640, + instrux + 641, + instrux + 642, + instrux + 643, + instrux + 644, + instrux + 663, + instrux + 664, + instrux + 665, + instrux + 666, + instrux + 667, + instrux + 668, + instrux + 687, + instrux + 688, + instrux + 689, + instrux + 690, + instrux + 691, + instrux + 692, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_d2[] = { + instrux + 525, + instrux + 526, + instrux + 549, + instrux + 550, + instrux + 573, + instrux + 574, + instrux + 597, + instrux + 598, + instrux + 621, + instrux + 622, + instrux + 645, + instrux + 646, + instrux + 669, + instrux + 670, + instrux + 693, + instrux + 694, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_d3[] = { + instrux + 527, + instrux + 528, + instrux + 529, + instrux + 530, + instrux + 531, + instrux + 532, + instrux + 551, + instrux + 552, + instrux + 553, + instrux + 554, + instrux + 555, + instrux + 556, + instrux + 575, + instrux + 576, + instrux + 577, + instrux + 578, + instrux + 579, + instrux + 580, + instrux + 599, + instrux + 600, + instrux + 601, + instrux + 602, + instrux + 603, + instrux + 604, + instrux + 623, + instrux + 624, + instrux + 625, + instrux + 626, + instrux + 627, + instrux + 628, + instrux + 647, + instrux + 648, + instrux + 649, + instrux + 650, + instrux + 651, + instrux + 652, + instrux + 671, + instrux + 672, + instrux + 673, + instrux + 674, + instrux + 675, + instrux + 676, + instrux + 695, + instrux + 696, + instrux + 697, + instrux + 698, + instrux + 699, + instrux + 700, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_f0[] = { + instrux + 2948, + instrux + 3056, + instrux + 3063, + instrux + 3068, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_f1[] = { + instrux + 2951, + instrux + 3057, + instrux + 3058, + instrux + 3064, + instrux + 3065, + instrux + 3066, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_f2[] = { + instrux + 1302, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_f4[] = { + instrux + 913, + instrux + 914, + instrux + 915, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_f5[] = { + instrux + 907, + instrux + 908, + instrux + 909, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_f6[] = { + instrux + 749, + instrux + 782, + instrux + 790, + instrux + 798, + instrux + 806, + instrux + 807, + instrux + 818, + instrux + 819, + instrux + 2096, + instrux + 2097, + instrux + 2098, + instrux + 2099, + instrux + 2100, + instrux + 2101, + instrux + 2102, + instrux + 2103, + instrux + 2104, + instrux + 2105, + instrux + 2106, + instrux + 2107, + instrux + 2108, + instrux + 2109, + instrux + 2110, + instrux + 2111, + instrux + 2160, + instrux + 2161, + instrux + 2162, + instrux + 2163, + instrux + 2164, + instrux + 2165, + instrux + 2166, + instrux + 2167, + instrux + 2168, + instrux + 2169, + instrux + 2170, + instrux + 2171, + instrux + 2172, + instrux + 2173, + instrux + 2174, + instrux + 2175, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_f7[] = { + instrux + 750, + instrux + 751, + instrux + 752, + instrux + 783, + instrux + 784, + instrux + 785, + instrux + 791, + instrux + 792, + instrux + 793, + instrux + 799, + instrux + 800, + instrux + 801, + instrux + 808, + instrux + 809, + instrux + 810, + instrux + 811, + instrux + 812, + instrux + 813, + instrux + 820, + instrux + 821, + instrux + 822, + instrux + 823, + instrux + 824, + instrux + 825, + instrux + 2112, + instrux + 2113, + instrux + 2114, + instrux + 2115, + instrux + 2116, + instrux + 2117, + instrux + 2118, + instrux + 2119, + instrux + 2120, + instrux + 2121, + instrux + 2122, + instrux + 2123, + instrux + 2124, + instrux + 2125, + instrux + 2126, + instrux + 2127, + instrux + 2128, + instrux + 2129, + instrux + 2130, + instrux + 2131, + instrux + 2132, + instrux + 2133, + instrux + 2134, + instrux + 2135, + instrux + 2136, + instrux + 2137, + instrux + 2138, + instrux + 2139, + instrux + 2140, + instrux + 2141, + instrux + 2142, + instrux + 2143, + instrux + 2144, + instrux + 2145, + instrux + 2146, + instrux + 2147, + instrux + 2148, + instrux + 2149, + instrux + 2150, + instrux + 2151, + instrux + 2152, + instrux + 2153, + instrux + 2154, + instrux + 2155, + instrux + 2156, + instrux + 2157, + instrux + 2158, + instrux + 2159, + instrux + 2176, + instrux + 2177, + instrux + 2178, + instrux + 2179, + instrux + 2180, + instrux + 2181, + instrux + 2182, + instrux + 2183, + instrux + 2184, + instrux + 2185, + instrux + 2186, + instrux + 2187, + instrux + 2188, + instrux + 2189, + instrux + 2190, + instrux + 2191, + instrux + 2192, + instrux + 2193, + instrux + 2194, + instrux + 2195, + instrux + 2196, + instrux + 2197, + instrux + 2198, + instrux + 2199, + instrux + 2200, + instrux + 2201, + instrux + 2202, + instrux + 2203, + instrux + 2204, + instrux + 2205, + instrux + 2206, + instrux + 2207, + instrux + 2208, + instrux + 2209, + instrux + 2210, + instrux + 2211, + instrux + 2212, + instrux + 2213, + instrux + 2214, + instrux + 2215, + instrux + 2216, + instrux + 2217, + instrux + 2218, + instrux + 2219, + instrux + 2220, + instrux + 2221, + instrux + 2222, + instrux + 2223, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_f8[] = { + instrux + 1343, + instrux + 1347, + instrux + 6716, + instrux + 6849, + instrux + 6853, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_f9[] = { + instrux + 6711, + instrux + 6712, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_fc[] = { + instrux + 7184, + instrux + 7185, + instrux + 7188, + instrux + 7189, + instrux + 7192, + instrux + 7193, + instrux + 7196, + instrux + 7197, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_fe[] = { + instrux + 723, + instrux + 724, + instrux + 737, + instrux + 738, + NULL +}; + +static const struct itemplate * const itbl_evex_map4_ff[] = { + instrux + 725, + instrux + 726, + instrux + 727, + instrux + 728, + instrux + 729, + instrux + 730, + instrux + 739, + instrux + 740, + instrux + 741, + instrux + 742, + instrux + 743, + instrux + 744, + instrux + 1773, + instrux + 1774, + NULL +}; + +static const struct itemplate * const * const itbl_evex_map4[256] = { + itbl_evex_map4_00, + itbl_evex_map4_01, + itbl_evex_map4_02, + itbl_evex_map4_03, + NULL, + NULL, + NULL, + NULL, + itbl_evex_map4_08, + itbl_evex_map4_09, + itbl_evex_map4_0a, + itbl_evex_map4_0b, + NULL, + NULL, + NULL, + NULL, + itbl_evex_map4_10, + itbl_evex_map4_11, + itbl_evex_map4_12, + itbl_evex_map4_13, + NULL, + NULL, + NULL, + NULL, + itbl_evex_map4_18, + itbl_evex_map4_19, + itbl_evex_map4_1a, + itbl_evex_map4_1b, + NULL, + NULL, + NULL, + NULL, + itbl_evex_map4_20, + itbl_evex_map4_21, + itbl_evex_map4_22, + itbl_evex_map4_23, + itbl_evex_map4_24, + NULL, + NULL, + NULL, + itbl_evex_map4_28, + itbl_evex_map4_29, + itbl_evex_map4_2a, + itbl_evex_map4_2b, + itbl_evex_map4_2c, + NULL, + NULL, + NULL, + itbl_evex_map4_30, + itbl_evex_map4_31, + itbl_evex_map4_32, + itbl_evex_map4_33, + NULL, + NULL, + NULL, + NULL, + itbl_evex_map4_38, + itbl_evex_map4_39, + itbl_evex_map4_3a, + itbl_evex_map4_3b, + NULL, + NULL, + NULL, + NULL, + itbl_evex_map4_40, + itbl_evex_map4_41, + itbl_evex_map4_42, + itbl_evex_map4_43, + itbl_evex_map4_44, + itbl_evex_map4_45, + itbl_evex_map4_46, + itbl_evex_map4_47, + itbl_evex_map4_48, + itbl_evex_map4_49, + itbl_evex_map4_4a, + itbl_evex_map4_4b, + itbl_evex_map4_4c, + itbl_evex_map4_4d, + itbl_evex_map4_4e, + itbl_evex_map4_4f, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_evex_map4_60, + itbl_evex_map4_61, + NULL, + NULL, + NULL, + itbl_evex_map4_65, + itbl_evex_map4_66, + NULL, + NULL, + itbl_evex_map4_69, + NULL, + itbl_evex_map4_6b, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_evex_map4_80, + itbl_evex_map4_81, + NULL, + itbl_evex_map4_83, + itbl_evex_map4_84, + itbl_evex_map4_85, + NULL, + NULL, + itbl_evex_map4_88, + NULL, + itbl_evex_map4_8a, + itbl_evex_map4_8b, + NULL, + NULL, + NULL, + itbl_evex_map4_8f, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_evex_map4_a5, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_evex_map4_ad, + NULL, + itbl_evex_map4_af, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_evex_map4_c0, + itbl_evex_map4_c1, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_evex_map4_d0, + itbl_evex_map4_d1, + itbl_evex_map4_d2, + itbl_evex_map4_d3, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_evex_map4_f0, + itbl_evex_map4_f1, + itbl_evex_map4_f2, + NULL, + itbl_evex_map4_f4, + itbl_evex_map4_f5, + itbl_evex_map4_f6, + itbl_evex_map4_f7, + itbl_evex_map4_f8, + itbl_evex_map4_f9, + NULL, + NULL, + itbl_evex_map4_fc, + NULL, + itbl_evex_map4_fe, + itbl_evex_map4_ff, +}; + +static const struct itemplate * const itbl_evex_map5_10[] = { + instrux + 7135, + instrux + 7137, + NULL +}; + +static const struct itemplate * const itbl_evex_map5_11[] = { + instrux + 7136, + instrux + 7138, + NULL +}; + +static const struct itemplate * const itbl_evex_map5_18[] = { + instrux + 7301, + instrux + 7302, + instrux + 7303, + instrux + 7313, + instrux + 7314, + instrux + 7315, + instrux + 7328, + instrux + 7329, + instrux + 7330, + NULL +}; + +static const struct itemplate * const itbl_evex_map5_1b[] = { + instrux + 7304, + instrux + 7305, + instrux + 7306, + instrux + 7316, + instrux + 7317, + instrux + 7318, + instrux + 7331, + instrux + 7332, + instrux + 7333, + NULL +}; + +static const struct itemplate * const itbl_evex_map5_1d[] = { + instrux + 6977, + instrux + 6978, + instrux + 6979, + instrux + 6992, + NULL +}; + +static const struct itemplate * const itbl_evex_map5_1e[] = { + instrux + 7334, + instrux + 7335, + instrux + 7336, + NULL +}; + +static const struct itemplate * const itbl_evex_map5_2a[] = { + instrux + 6990, + instrux + 6991, + NULL +}; + +static const struct itemplate * const itbl_evex_map5_2c[] = { + instrux + 7011, + instrux + 7012, + NULL +}; + +static const struct itemplate * const itbl_evex_map5_2d[] = { + instrux + 6985, + instrux + 6986, + NULL +}; + +static const struct itemplate * const itbl_evex_map5_2e[] = { + instrux + 7173, + instrux + 7293, + NULL +}; + +static const struct itemplate * const itbl_evex_map5_2f[] = { + instrux + 6937, + instrux + 7210, + instrux + 7290, + NULL +}; + +static const struct itemplate * const itbl_evex_map5_51[] = { + instrux + 7165, + instrux + 7166, + instrux + 7167, + instrux + 7168, + instrux + 7283, + instrux + 7284, + instrux + 7285, + NULL +}; + +static const struct itemplate * const itbl_evex_map5_57[] = { + instrux + 7178, + instrux + 7179, + instrux + 7180, + instrux + 7181, + NULL +}; + +static const struct itemplate * const itbl_evex_map5_58[] = { + instrux + 6929, + instrux + 6930, + instrux + 6931, + instrux + 6932, + instrux + 7204, + instrux + 7205, + instrux + 7206, + NULL +}; + +static const struct itemplate * const itbl_evex_map5_59[] = { + instrux + 7141, + instrux + 7142, + instrux + 7143, + instrux + 7144, + instrux + 7265, + instrux + 7266, + instrux + 7267, + NULL +}; + +static const struct itemplate * const itbl_evex_map5_5a[] = { + instrux + 6941, + instrux + 6942, + instrux + 6943, + instrux + 6947, + instrux + 6948, + instrux + 6949, + instrux + 6983, + instrux + 6984, + NULL +}; + +static const struct itemplate * const itbl_evex_map5_5b[] = { + instrux + 6938, + instrux + 6939, + instrux + 6940, + instrux + 6944, + instrux + 6945, + instrux + 6946, + instrux + 6980, + instrux + 6981, + instrux + 6982, + instrux + 6993, + instrux + 6994, + instrux + 6995, + NULL +}; + +static const struct itemplate * const itbl_evex_map5_5c[] = { + instrux + 7169, + instrux + 7170, + instrux + 7171, + instrux + 7172, + instrux + 7286, + instrux + 7287, + instrux + 7288, + NULL +}; + +static const struct itemplate * const itbl_evex_map5_5d[] = { + instrux + 7131, + instrux + 7132, + instrux + 7133, + instrux + 7134, + instrux + 7174, + instrux + 7175, + instrux + 7176, + instrux + 7177, + instrux + 7262, + instrux + 7263, + instrux + 7264, + NULL +}; + +static const struct itemplate * const itbl_evex_map5_5e[] = { + instrux + 7029, + instrux + 7030, + instrux + 7031, + instrux + 7032, + instrux + 7211, + instrux + 7212, + instrux + 7213, + NULL +}; + +static const struct itemplate * const itbl_evex_map5_5f[] = { + instrux + 7127, + instrux + 7128, + instrux + 7129, + instrux + 7130, + instrux + 7259, + instrux + 7260, + instrux + 7261, + NULL +}; + +static const struct itemplate * const itbl_evex_map5_68[] = { + instrux + 7400, + instrux + 7401, + instrux + 7402, + instrux + 7424, + instrux + 7425, + instrux + 7426, + instrux + 7439, + instrux + 7440, + instrux + 7441, + NULL +}; + +static const struct itemplate * const itbl_evex_map5_69[] = { + instrux + 7394, + instrux + 7395, + instrux + 7396, + instrux + 7418, + instrux + 7419, + instrux + 7420, + instrux + 7433, + instrux + 7434, + instrux + 7435, + NULL +}; + +static const struct itemplate * const itbl_evex_map5_6a[] = { + instrux + 7403, + instrux + 7404, + instrux + 7405, + instrux + 7427, + instrux + 7428, + instrux + 7429, + instrux + 7442, + instrux + 7443, + instrux + 7444, + NULL +}; + +static const struct itemplate * const itbl_evex_map5_6b[] = { + instrux + 7397, + instrux + 7398, + instrux + 7399, + instrux + 7421, + instrux + 7422, + instrux + 7423, + instrux + 7436, + instrux + 7437, + instrux + 7438, + NULL +}; + +static const struct itemplate * const itbl_evex_map5_6c[] = { + instrux + 7412, + instrux + 7413, + instrux + 7414, + instrux + 7415, + instrux + 7416, + instrux + 7417, + instrux + 7448, + instrux + 7449, + instrux + 7450, + instrux + 7451, + instrux + 7452, + instrux + 7453, + instrux + 7456, + instrux + 7457, + instrux + 7460, + instrux + 7461, + NULL +}; + +static const struct itemplate * const itbl_evex_map5_6d[] = { + instrux + 7406, + instrux + 7407, + instrux + 7408, + instrux + 7409, + instrux + 7410, + instrux + 7411, + instrux + 7430, + instrux + 7431, + instrux + 7432, + instrux + 7445, + instrux + 7446, + instrux + 7447, + instrux + 7454, + instrux + 7455, + instrux + 7458, + instrux + 7459, + NULL +}; + +static const struct itemplate * const itbl_evex_map5_6e[] = { + instrux + 7139, + instrux + 7464, + NULL +}; + +static const struct itemplate * const itbl_evex_map5_74[] = { + instrux + 7298, + instrux + 7299, + instrux + 7300, + instrux + 7310, + instrux + 7311, + instrux + 7312, + instrux + 7325, + instrux + 7326, + instrux + 7327, + NULL +}; + +static const struct itemplate * const itbl_evex_map5_78[] = { + instrux + 6999, + instrux + 7000, + instrux + 7001, + instrux + 7002, + instrux + 7003, + instrux + 7004, + instrux + 7013, + instrux + 7014, + NULL +}; + +static const struct itemplate * const itbl_evex_map5_79[] = { + instrux + 6959, + instrux + 6960, + instrux + 6961, + instrux + 6962, + instrux + 6963, + instrux + 6964, + instrux + 6988, + instrux + 6989, + NULL +}; + +static const struct itemplate * const itbl_evex_map5_7a[] = { + instrux + 6996, + instrux + 6997, + instrux + 6998, + instrux + 7015, + instrux + 7016, + instrux + 7017, + instrux + 7018, + instrux + 7019, + instrux + 7020, + NULL +}; + +static const struct itemplate * const itbl_evex_map5_7b[] = { + instrux + 6956, + instrux + 6957, + instrux + 6958, + instrux + 7021, + instrux + 7022, + NULL +}; + +static const struct itemplate * const itbl_evex_map5_7c[] = { + instrux + 7005, + instrux + 7006, + instrux + 7007, + instrux + 7008, + instrux + 7009, + instrux + 7010, + NULL +}; + +static const struct itemplate * const itbl_evex_map5_7d[] = { + instrux + 6965, + instrux + 6966, + instrux + 6967, + instrux + 6968, + instrux + 6969, + instrux + 6970, + instrux + 7023, + instrux + 7024, + instrux + 7025, + instrux + 7026, + instrux + 7027, + instrux + 7028, + NULL +}; + +static const struct itemplate * const itbl_evex_map5_7e[] = { + instrux + 7140, + instrux + 7465, + NULL +}; + +static const struct itemplate * const * const itbl_evex_map5[256] = { + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_evex_map5_10, + itbl_evex_map5_11, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_evex_map5_18, + NULL, + NULL, + itbl_evex_map5_1b, + NULL, + itbl_evex_map5_1d, + itbl_evex_map5_1e, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_evex_map5_2a, + NULL, + itbl_evex_map5_2c, + itbl_evex_map5_2d, + itbl_evex_map5_2e, + itbl_evex_map5_2f, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_evex_map5_51, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_evex_map5_57, + itbl_evex_map5_58, + itbl_evex_map5_59, + itbl_evex_map5_5a, + itbl_evex_map5_5b, + itbl_evex_map5_5c, + itbl_evex_map5_5d, + itbl_evex_map5_5e, + itbl_evex_map5_5f, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_evex_map5_68, + itbl_evex_map5_69, + itbl_evex_map5_6a, + itbl_evex_map5_6b, + itbl_evex_map5_6c, + itbl_evex_map5_6d, + itbl_evex_map5_6e, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_evex_map5_74, + NULL, + NULL, + NULL, + itbl_evex_map5_78, + itbl_evex_map5_79, + itbl_evex_map5_7a, + itbl_evex_map5_7b, + itbl_evex_map5_7c, + itbl_evex_map5_7d, + itbl_evex_map5_7e, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, +}; + +static const struct itemplate * const itbl_evex_map6_13[] = { + instrux + 6953, + instrux + 6954, + instrux + 6955, + instrux + 6987, + NULL +}; + +static const struct itemplate * const itbl_evex_map6_2c[] = { + instrux + 7161, + instrux + 7162, + instrux + 7163, + instrux + 7280, + instrux + 7281, + instrux + 7282, + NULL +}; + +static const struct itemplate * const itbl_evex_map6_2d[] = { + instrux + 7164, + NULL +}; + +static const struct itemplate * const itbl_evex_map6_42[] = { + instrux + 7119, + instrux + 7120, + instrux + 7121, + instrux + 7253, + instrux + 7254, + instrux + 7255, + NULL +}; + +static const struct itemplate * const itbl_evex_map6_43[] = { + instrux + 7122, + NULL +}; + +static const struct itemplate * const itbl_evex_map6_4c[] = { + instrux + 7145, + instrux + 7146, + instrux + 7147, + instrux + 7268, + instrux + 7269, + instrux + 7270, + NULL +}; + +static const struct itemplate * const itbl_evex_map6_4d[] = { + instrux + 7148, + NULL +}; + +static const struct itemplate * const itbl_evex_map6_4e[] = { + instrux + 7157, + instrux + 7158, + instrux + 7159, + instrux + 7277, + instrux + 7278, + instrux + 7279, + NULL +}; + +static const struct itemplate * const itbl_evex_map6_4f[] = { + instrux + 7160, + NULL +}; + +static const struct itemplate * const itbl_evex_map6_56[] = { + instrux + 7033, + instrux + 7034, + instrux + 7035, + instrux + 7036, + instrux + 7037, + instrux + 7038, + NULL +}; + +static const struct itemplate * const itbl_evex_map6_57[] = { + instrux + 7039, + instrux + 7040, + NULL +}; + +static const struct itemplate * const itbl_evex_map6_80[] = { + instrux + 7466, + instrux + 7467, + instrux + 7468, + instrux + 7469, + NULL +}; + +static const struct itemplate * const itbl_evex_map6_81[] = { + instrux + 7470, + instrux + 7471, + instrux + 7472, + NULL +}; + +static const struct itemplate * const itbl_evex_map6_96[] = { + instrux + 7049, + instrux + 7050, + instrux + 7051, + NULL +}; + +static const struct itemplate * const itbl_evex_map6_97[] = { + instrux + 7058, + instrux + 7059, + instrux + 7060, + NULL +}; + +static const struct itemplate * const itbl_evex_map6_98[] = { + instrux + 7067, + instrux + 7068, + instrux + 7069, + instrux + 7214, + instrux + 7215, + instrux + 7216, + NULL +}; + +static const struct itemplate * const itbl_evex_map6_99[] = { + instrux + 7085, + NULL +}; + +static const struct itemplate * const itbl_evex_map6_9a[] = { + instrux + 7091, + instrux + 7092, + instrux + 7093, + instrux + 7223, + instrux + 7224, + instrux + 7225, + NULL +}; + +static const struct itemplate * const itbl_evex_map6_9b[] = { + instrux + 7109, + NULL +}; + +static const struct itemplate * const itbl_evex_map6_9c[] = { + instrux + 7076, + instrux + 7077, + instrux + 7078, + instrux + 7232, + instrux + 7233, + instrux + 7234, + NULL +}; + +static const struct itemplate * const itbl_evex_map6_9d[] = { + instrux + 7088, + NULL +}; + +static const struct itemplate * const itbl_evex_map6_9e[] = { + instrux + 7100, + instrux + 7101, + instrux + 7102, + instrux + 7241, + instrux + 7242, + instrux + 7243, + NULL +}; + +static const struct itemplate * const itbl_evex_map6_9f[] = { + instrux + 7112, + NULL +}; + +static const struct itemplate * const itbl_evex_map6_a6[] = { + instrux + 7052, + instrux + 7053, + instrux + 7054, + NULL +}; + +static const struct itemplate * const itbl_evex_map6_a7[] = { + instrux + 7061, + instrux + 7062, + instrux + 7063, + NULL +}; + +static const struct itemplate * const itbl_evex_map6_a8[] = { + instrux + 7070, + instrux + 7071, + instrux + 7072, + instrux + 7217, + instrux + 7218, + instrux + 7219, + NULL +}; + +static const struct itemplate * const itbl_evex_map6_a9[] = { + instrux + 7086, + NULL +}; + +static const struct itemplate * const itbl_evex_map6_aa[] = { + instrux + 7094, + instrux + 7095, + instrux + 7096, + instrux + 7226, + instrux + 7227, + instrux + 7228, + NULL +}; + +static const struct itemplate * const itbl_evex_map6_ab[] = { + instrux + 7110, + NULL +}; + +static const struct itemplate * const itbl_evex_map6_ac[] = { + instrux + 7079, + instrux + 7080, + instrux + 7081, + instrux + 7235, + instrux + 7236, + instrux + 7237, + NULL +}; + +static const struct itemplate * const itbl_evex_map6_ad[] = { + instrux + 7089, + NULL +}; + +static const struct itemplate * const itbl_evex_map6_ae[] = { + instrux + 7103, + instrux + 7104, + instrux + 7105, + instrux + 7244, + instrux + 7245, + instrux + 7246, + NULL +}; + +static const struct itemplate * const itbl_evex_map6_af[] = { + instrux + 7113, + NULL +}; + +static const struct itemplate * const itbl_evex_map6_b6[] = { + instrux + 7055, + instrux + 7056, + instrux + 7057, + NULL +}; + +static const struct itemplate * const itbl_evex_map6_b7[] = { + instrux + 7064, + instrux + 7065, + instrux + 7066, + NULL +}; + +static const struct itemplate * const itbl_evex_map6_b8[] = { + instrux + 7073, + instrux + 7074, + instrux + 7075, + instrux + 7220, + instrux + 7221, + instrux + 7222, + NULL +}; + +static const struct itemplate * const itbl_evex_map6_b9[] = { + instrux + 7087, + NULL +}; + +static const struct itemplate * const itbl_evex_map6_ba[] = { + instrux + 7097, + instrux + 7098, + instrux + 7099, + instrux + 7229, + instrux + 7230, + instrux + 7231, + NULL +}; + +static const struct itemplate * const itbl_evex_map6_bb[] = { + instrux + 7111, + NULL +}; + +static const struct itemplate * const itbl_evex_map6_bc[] = { + instrux + 7082, + instrux + 7083, + instrux + 7084, + instrux + 7238, + instrux + 7239, + instrux + 7240, + NULL +}; + +static const struct itemplate * const itbl_evex_map6_bd[] = { + instrux + 7090, + NULL +}; + +static const struct itemplate * const itbl_evex_map6_be[] = { + instrux + 7106, + instrux + 7107, + instrux + 7108, + instrux + 7247, + instrux + 7248, + instrux + 7249, + NULL +}; + +static const struct itemplate * const itbl_evex_map6_bf[] = { + instrux + 7114, + NULL +}; + +static const struct itemplate * const itbl_evex_map6_d6[] = { + instrux + 7041, + instrux + 7042, + instrux + 7043, + instrux + 7044, + instrux + 7045, + instrux + 7046, + NULL +}; + +static const struct itemplate * const itbl_evex_map6_d7[] = { + instrux + 7047, + instrux + 7048, + NULL +}; + +static const struct itemplate * const * const itbl_evex_map6[256] = { + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_evex_map6_13, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_evex_map6_2c, + itbl_evex_map6_2d, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_evex_map6_42, + itbl_evex_map6_43, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_evex_map6_4c, + itbl_evex_map6_4d, + itbl_evex_map6_4e, + itbl_evex_map6_4f, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_evex_map6_56, + itbl_evex_map6_57, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_evex_map6_80, + itbl_evex_map6_81, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_evex_map6_96, + itbl_evex_map6_97, + itbl_evex_map6_98, + itbl_evex_map6_99, + itbl_evex_map6_9a, + itbl_evex_map6_9b, + itbl_evex_map6_9c, + itbl_evex_map6_9d, + itbl_evex_map6_9e, + itbl_evex_map6_9f, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_evex_map6_a6, + itbl_evex_map6_a7, + itbl_evex_map6_a8, + itbl_evex_map6_a9, + itbl_evex_map6_aa, + itbl_evex_map6_ab, + itbl_evex_map6_ac, + itbl_evex_map6_ad, + itbl_evex_map6_ae, + itbl_evex_map6_af, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_evex_map6_b6, + itbl_evex_map6_b7, + itbl_evex_map6_b8, + itbl_evex_map6_b9, + itbl_evex_map6_ba, + itbl_evex_map6_bb, + itbl_evex_map6_bc, + itbl_evex_map6_bd, + itbl_evex_map6_be, + itbl_evex_map6_bf, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_evex_map6_d6, + itbl_evex_map6_d7, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, +}; + +static const struct itemplate * const itbl_evex_map7_f6[] = { + instrux + 1336, + instrux + 1339, + NULL +}; + +static const struct itemplate * const itbl_evex_map7_f8[] = { + instrux + 1345, + instrux + 1349, + NULL +}; + +static const struct itemplate * const * const itbl_evex_map7[256] = { + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_evex_map7_f6, + NULL, + itbl_evex_map7_f8, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, +}; + +static const struct itemplate * const itbl_rex2_map0_00[] = { + instrux + 39, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_01[] = { + instrux + 40, + instrux + 41, + instrux + 42, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_02[] = { + instrux + 43, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_03[] = { + instrux + 44, + instrux + 45, + instrux + 46, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_04[] = { + instrux + 47, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_05[] = { + instrux + 50, + instrux + 53, + instrux + 56, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_08[] = { + instrux + 88, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_09[] = { + instrux + 89, + instrux + 90, + instrux + 91, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_0a[] = { + instrux + 92, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_0b[] = { + instrux + 93, + instrux + 94, + instrux + 95, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_0c[] = { + instrux + 96, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_0d[] = { + instrux + 99, + instrux + 102, + instrux + 105, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_10[] = { + instrux + 137, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_11[] = { + instrux + 138, + instrux + 139, + instrux + 140, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_12[] = { + instrux + 141, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_13[] = { + instrux + 142, + instrux + 143, + instrux + 144, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_14[] = { + instrux + 145, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_15[] = { + instrux + 148, + instrux + 151, + instrux + 154, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_18[] = { + instrux + 186, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_19[] = { + instrux + 187, + instrux + 188, + instrux + 189, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_1a[] = { + instrux + 190, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_1b[] = { + instrux + 191, + instrux + 192, + instrux + 193, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_1c[] = { + instrux + 194, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_1d[] = { + instrux + 197, + instrux + 200, + instrux + 203, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_20[] = { + instrux + 235, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_21[] = { + instrux + 236, + instrux + 237, + instrux + 238, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_22[] = { + instrux + 239, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_23[] = { + instrux + 240, + instrux + 241, + instrux + 242, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_24[] = { + instrux + 243, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_25[] = { + instrux + 246, + instrux + 249, + instrux + 252, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_28[] = { + instrux + 284, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_29[] = { + instrux + 285, + instrux + 286, + instrux + 287, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_2a[] = { + instrux + 288, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_2b[] = { + instrux + 289, + instrux + 290, + instrux + 291, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_2c[] = { + instrux + 292, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_2d[] = { + instrux + 295, + instrux + 298, + instrux + 301, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_30[] = { + instrux + 333, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_31[] = { + instrux + 334, + instrux + 335, + instrux + 336, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_32[] = { + instrux + 337, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_33[] = { + instrux + 338, + instrux + 339, + instrux + 340, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_34[] = { + instrux + 341, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_35[] = { + instrux + 344, + instrux + 347, + instrux + 350, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_38[] = { + instrux + 382, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_39[] = { + instrux + 383, + instrux + 384, + instrux + 385, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_3a[] = { + instrux + 386, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_3b[] = { + instrux + 387, + instrux + 388, + instrux + 389, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_3c[] = { + instrux + 390, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_3d[] = { + instrux + 393, + instrux + 396, + instrux + 399, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_50[] = { + instrux + 1737, + instrux + 1738, + instrux + 1739, + instrux + 1771, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_51[] = { + instrux + 1737, + instrux + 1738, + instrux + 1739, + instrux + 1771, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_52[] = { + instrux + 1737, + instrux + 1738, + instrux + 1739, + instrux + 1771, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_53[] = { + instrux + 1737, + instrux + 1738, + instrux + 1739, + instrux + 1771, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_54[] = { + instrux + 1737, + instrux + 1738, + instrux + 1739, + instrux + 1771, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_55[] = { + instrux + 1737, + instrux + 1738, + instrux + 1739, + instrux + 1771, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_56[] = { + instrux + 1737, + instrux + 1738, + instrux + 1739, + instrux + 1771, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_57[] = { + instrux + 1737, + instrux + 1738, + instrux + 1739, + instrux + 1771, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_58[] = { + instrux + 1749, + instrux + 1750, + instrux + 1751, + instrux + 1772, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_59[] = { + instrux + 1749, + instrux + 1750, + instrux + 1751, + instrux + 1772, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_5a[] = { + instrux + 1749, + instrux + 1750, + instrux + 1751, + instrux + 1772, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_5b[] = { + instrux + 1749, + instrux + 1750, + instrux + 1751, + instrux + 1772, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_5c[] = { + instrux + 1749, + instrux + 1750, + instrux + 1751, + instrux + 1772, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_5d[] = { + instrux + 1749, + instrux + 1750, + instrux + 1751, + instrux + 1772, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_5e[] = { + instrux + 1749, + instrux + 1750, + instrux + 1751, + instrux + 1772, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_5f[] = { + instrux + 1749, + instrux + 1750, + instrux + 1751, + instrux + 1772, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_63[] = { + instrux + 1002, + instrux + 1003, + instrux + 1004, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_68[] = { + instrux + 1746, + instrux + 1748, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_69[] = { + instrux + 759, + instrux + 760, + instrux + 761, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_6a[] = { + instrux + 1743, + instrux + 1744, + instrux + 1745, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_6b[] = { + instrux + 756, + instrux + 757, + instrux + 758, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_6c[] = { + instrux + 1280, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_6d[] = { + instrux + 1281, + instrux + 1282, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_6e[] = { + instrux + 1283, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_6f[] = { + instrux + 1284, + instrux + 1285, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_80[] = { + instrux + 48, + instrux + 97, + instrux + 146, + instrux + 195, + instrux + 244, + instrux + 293, + instrux + 342, + instrux + 391, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_81[] = { + instrux + 51, + instrux + 54, + instrux + 57, + instrux + 100, + instrux + 103, + instrux + 106, + instrux + 149, + instrux + 152, + instrux + 155, + instrux + 198, + instrux + 201, + instrux + 204, + instrux + 247, + instrux + 250, + instrux + 253, + instrux + 296, + instrux + 299, + instrux + 302, + instrux + 345, + instrux + 348, + instrux + 351, + instrux + 394, + instrux + 397, + instrux + 400, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_83[] = { + instrux + 49, + instrux + 52, + instrux + 55, + instrux + 98, + instrux + 101, + instrux + 104, + instrux + 147, + instrux + 150, + instrux + 153, + instrux + 196, + instrux + 199, + instrux + 202, + instrux + 245, + instrux + 248, + instrux + 251, + instrux + 294, + instrux + 297, + instrux + 300, + instrux + 343, + instrux + 346, + instrux + 349, + instrux + 392, + instrux + 395, + instrux + 398, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_84[] = { + instrux + 401, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_85[] = { + instrux + 402, + instrux + 403, + instrux + 404, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_86[] = { + instrux + 1024, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_87[] = { + instrux + 1025, + instrux + 1026, + instrux + 1027, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_88[] = { + instrux + 12, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_89[] = { + instrux + 13, + instrux + 14, + instrux + 15, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_8a[] = { + instrux + 16, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_8b[] = { + instrux + 17, + instrux + 18, + instrux + 19, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_8c[] = { + instrux + 1380, + instrux + 1381, + instrux + 1382, + instrux + 1383, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_8d[] = { + instrux + 36, + instrux + 37, + instrux + 38, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_8e[] = { + instrux + 1384, + instrux + 1385, + instrux + 1386, + instrux + 1387, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_8f[] = { + instrux + 1752, + instrux + 1753, + instrux + 1754, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_90[] = { + instrux + 0, + instrux + 1021, + instrux + 1022, + instrux + 1023, + instrux + 1352, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_91[] = { + instrux + 1021, + instrux + 1022, + instrux + 1023, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_92[] = { + instrux + 1021, + instrux + 1022, + instrux + 1023, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_93[] = { + instrux + 1021, + instrux + 1022, + instrux + 1023, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_94[] = { + instrux + 1021, + instrux + 1022, + instrux + 1023, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_95[] = { + instrux + 1021, + instrux + 1022, + instrux + 1023, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_96[] = { + instrux + 1021, + instrux + 1022, + instrux + 1023, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_97[] = { + instrux + 1021, + instrux + 1022, + instrux + 1023, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_98[] = { + instrux + 990, + instrux + 992, + instrux + 995, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_99[] = { + instrux + 991, + instrux + 993, + instrux + 994, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_9c[] = { + instrux + 1252, + instrux + 1253, + instrux + 1254, + instrux + 1255, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_9d[] = { + instrux + 1256, + instrux + 1257, + instrux + 1258, + instrux + 1259, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_9e[] = { + instrux + 1250, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_9f[] = { + instrux + 1249, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_a1[] = { + instrux + 1028, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_b0[] = { + instrux + 20, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_b1[] = { + instrux + 20, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_b2[] = { + instrux + 20, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_b3[] = { + instrux + 20, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_b4[] = { + instrux + 20, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_b5[] = { + instrux + 20, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_b6[] = { + instrux + 20, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_b7[] = { + instrux + 20, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_b8[] = { + instrux + 21, + instrux + 22, + instrux + 23, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_b9[] = { + instrux + 21, + instrux + 22, + instrux + 23, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_ba[] = { + instrux + 21, + instrux + 22, + instrux + 23, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_bb[] = { + instrux + 21, + instrux + 22, + instrux + 23, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_bc[] = { + instrux + 21, + instrux + 22, + instrux + 23, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_bd[] = { + instrux + 21, + instrux + 22, + instrux + 23, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_be[] = { + instrux + 21, + instrux + 22, + instrux + 23, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_bf[] = { + instrux + 21, + instrux + 22, + instrux + 23, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_c0[] = { + instrux + 421, + instrux + 433, + instrux + 445, + instrux + 457, + instrux + 469, + instrux + 481, + instrux + 493, + instrux + 505, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_c1[] = { + instrux + 422, + instrux + 423, + instrux + 424, + instrux + 434, + instrux + 435, + instrux + 436, + instrux + 446, + instrux + 447, + instrux + 448, + instrux + 458, + instrux + 459, + instrux + 460, + instrux + 470, + instrux + 471, + instrux + 472, + instrux + 482, + instrux + 483, + instrux + 484, + instrux + 494, + instrux + 495, + instrux + 496, + instrux + 506, + instrux + 507, + instrux + 508, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_c2[] = { + instrux + 1214, + instrux + 1215, + instrux + 1217, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_c3[] = { + instrux + 1210, + instrux + 1211, + instrux + 1213, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_c6[] = { + instrux + 24, + instrux + 4372, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_c7[] = { + instrux + 25, + instrux + 26, + instrux + 27, + instrux + 4375, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_c8[] = { + instrux + 1761, + instrux + 1762, + instrux + 1763, + instrux + 1764, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_c9[] = { + instrux + 1765, + instrux + 1766, + instrux + 1767, + instrux + 1768, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_ca[] = { + instrux + 1222, + instrux + 1223, + instrux + 1224, + instrux + 1225, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_cb[] = { + instrux + 1218, + instrux + 1219, + instrux + 1220, + instrux + 1221, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_cc[] = { + instrux + 1228, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_cd[] = { + instrux + 1226, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_cf[] = { + instrux + 1234, + instrux + 1235, + instrux + 1236, + instrux + 1237, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_d0[] = { + instrux + 413, + instrux + 425, + instrux + 437, + instrux + 449, + instrux + 461, + instrux + 473, + instrux + 485, + instrux + 497, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_d1[] = { + instrux + 414, + instrux + 415, + instrux + 416, + instrux + 426, + instrux + 427, + instrux + 428, + instrux + 438, + instrux + 439, + instrux + 440, + instrux + 450, + instrux + 451, + instrux + 452, + instrux + 462, + instrux + 463, + instrux + 464, + instrux + 474, + instrux + 475, + instrux + 476, + instrux + 486, + instrux + 487, + instrux + 488, + instrux + 498, + instrux + 499, + instrux + 500, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_d2[] = { + instrux + 417, + instrux + 429, + instrux + 441, + instrux + 453, + instrux + 465, + instrux + 477, + instrux + 489, + instrux + 501, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_d3[] = { + instrux + 418, + instrux + 419, + instrux + 420, + instrux + 430, + instrux + 431, + instrux + 432, + instrux + 442, + instrux + 443, + instrux + 444, + instrux + 454, + instrux + 455, + instrux + 456, + instrux + 466, + instrux + 467, + instrux + 468, + instrux + 478, + instrux + 479, + instrux + 480, + instrux + 490, + instrux + 491, + instrux + 492, + instrux + 502, + instrux + 503, + instrux + 504, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_d6[] = { + instrux + 1788, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_d7[] = { + instrux + 1791, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_d8[] = { + instrux + 1462, + instrux + 1465, + instrux + 1467, + instrux + 1492, + instrux + 1494, + instrux + 1495, + instrux + 1500, + instrux + 1502, + instrux + 1503, + instrux + 1508, + instrux + 1511, + instrux + 1513, + instrux + 1516, + instrux + 1520, + instrux + 1521, + instrux + 1572, + instrux + 1576, + instrux + 1577, + instrux + 1613, + instrux + 1617, + instrux + 1618, + instrux + 1621, + instrux + 1625, + instrux + 1626, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_d9[] = { + instrux + 1460, + instrux + 1461, + instrux + 1474, + instrux + 1505, + instrux + 1506, + instrux + 1545, + instrux + 1559, + instrux + 1562, + instrux + 1563, + instrux + 1564, + instrux + 1565, + instrux + 1566, + instrux + 1567, + instrux + 1568, + instrux + 1569, + instrux + 1570, + instrux + 1571, + instrux + 1584, + instrux + 1586, + instrux + 1587, + instrux + 1590, + instrux + 1591, + instrux + 1592, + instrux + 1593, + instrux + 1594, + instrux + 1597, + instrux + 1599, + instrux + 1600, + instrux + 1601, + instrux + 1602, + instrux + 1605, + instrux + 1606, + instrux + 1607, + instrux + 1629, + instrux + 1639, + instrux + 1640, + instrux + 1641, + instrux + 1642, + instrux + 1643, + instrux + 1644, + instrux + 1645, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_da[] = { + instrux + 1476, + instrux + 1477, + instrux + 1478, + instrux + 1479, + instrux + 1480, + instrux + 1481, + instrux + 1490, + instrux + 1491, + instrux + 1530, + instrux + 1532, + instrux + 1534, + instrux + 1536, + instrux + 1538, + instrux + 1543, + instrux + 1555, + instrux + 1557, + instrux + 1638, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_db[] = { + instrux + 1475, + instrux + 1482, + instrux + 1483, + instrux + 1484, + instrux + 1485, + instrux + 1486, + instrux + 1487, + instrux + 1488, + instrux + 1489, + instrux + 1496, + instrux + 1497, + instrux + 1507, + instrux + 1525, + instrux + 1540, + instrux + 1546, + instrux + 1547, + instrux + 1549, + instrux + 1553, + instrux + 1561, + instrux + 1580, + instrux + 1581, + instrux + 1582, + instrux + 1583, + instrux + 1598, + instrux + 1609, + instrux + 1632, + instrux + 1633, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_dc[] = { + instrux + 1463, + instrux + 1464, + instrux + 1466, + instrux + 1493, + instrux + 1501, + instrux + 1509, + instrux + 1510, + instrux + 1512, + instrux + 1517, + instrux + 1518, + instrux + 1519, + instrux + 1573, + instrux + 1574, + instrux + 1575, + instrux + 1614, + instrux + 1615, + instrux + 1616, + instrux + 1622, + instrux + 1623, + instrux + 1624, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_dd[] = { + instrux + 1526, + instrux + 1527, + instrux + 1554, + instrux + 1560, + instrux + 1585, + instrux + 1588, + instrux + 1595, + instrux + 1596, + instrux + 1603, + instrux + 1604, + instrux + 1608, + instrux + 1610, + instrux + 1611, + instrux + 1630, + instrux + 1631, + instrux + 1636, + instrux + 1637, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_de[] = { + instrux + 1468, + instrux + 1469, + instrux + 1504, + instrux + 1514, + instrux + 1515, + instrux + 1522, + instrux + 1523, + instrux + 1531, + instrux + 1533, + instrux + 1535, + instrux + 1537, + instrux + 1539, + instrux + 1544, + instrux + 1556, + instrux + 1558, + instrux + 1578, + instrux + 1579, + instrux + 1619, + instrux + 1620, + instrux + 1627, + instrux + 1628, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_df[] = { + instrux + 1470, + instrux + 1471, + instrux + 1472, + instrux + 1473, + instrux + 1498, + instrux + 1499, + instrux + 1528, + instrux + 1529, + instrux + 1541, + instrux + 1542, + instrux + 1548, + instrux + 1550, + instrux + 1551, + instrux + 1552, + instrux + 1589, + instrux + 1612, + instrux + 1634, + instrux + 1635, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_e9[] = { + instrux + 1034, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_f1[] = { + instrux + 1227, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_f4[] = { + instrux + 1351, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_f5[] = { + instrux + 1248, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_f6[] = { + instrux + 409, + instrux + 745, + instrux + 774, + instrux + 786, + instrux + 794, + instrux + 802, + instrux + 814, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_f7[] = { + instrux + 410, + instrux + 411, + instrux + 412, + instrux + 746, + instrux + 747, + instrux + 748, + instrux + 775, + instrux + 776, + instrux + 777, + instrux + 787, + instrux + 788, + instrux + 789, + instrux + 795, + instrux + 796, + instrux + 797, + instrux + 803, + instrux + 804, + instrux + 805, + instrux + 815, + instrux + 816, + instrux + 817, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_f8[] = { + instrux + 1240, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_f9[] = { + instrux + 1244, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_fa[] = { + instrux + 1242, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_fb[] = { + instrux + 1246, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_fc[] = { + instrux + 1241, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_fd[] = { + instrux + 1245, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_fe[] = { + instrux + 719, + instrux + 733, + NULL +}; + +static const struct itemplate * const itbl_rex2_map0_ff[] = { + instrux + 720, + instrux + 721, + instrux + 722, + instrux + 734, + instrux + 735, + instrux + 736, + instrux + 1037, + instrux + 1041, + instrux + 1042, + instrux + 1045, + instrux + 1201, + instrux + 1205, + instrux + 1206, + instrux + 1209, + instrux + 1740, + instrux + 1741, + instrux + 1742, + instrux + 1789, + NULL +}; + +static const struct itemplate * const * const itbl_rex2_map0[256] = { + itbl_rex2_map0_00, + itbl_rex2_map0_01, + itbl_rex2_map0_02, + itbl_rex2_map0_03, + itbl_rex2_map0_04, + itbl_rex2_map0_05, + NULL, + NULL, + itbl_rex2_map0_08, + itbl_rex2_map0_09, + itbl_rex2_map0_0a, + itbl_rex2_map0_0b, + itbl_rex2_map0_0c, + itbl_rex2_map0_0d, + NULL, + NULL, + itbl_rex2_map0_10, + itbl_rex2_map0_11, + itbl_rex2_map0_12, + itbl_rex2_map0_13, + itbl_rex2_map0_14, + itbl_rex2_map0_15, + NULL, + NULL, + itbl_rex2_map0_18, + itbl_rex2_map0_19, + itbl_rex2_map0_1a, + itbl_rex2_map0_1b, + itbl_rex2_map0_1c, + itbl_rex2_map0_1d, + NULL, + NULL, + itbl_rex2_map0_20, + itbl_rex2_map0_21, + itbl_rex2_map0_22, + itbl_rex2_map0_23, + itbl_rex2_map0_24, + itbl_rex2_map0_25, + NULL, + NULL, + itbl_rex2_map0_28, + itbl_rex2_map0_29, + itbl_rex2_map0_2a, + itbl_rex2_map0_2b, + itbl_rex2_map0_2c, + itbl_rex2_map0_2d, + NULL, + NULL, + itbl_rex2_map0_30, + itbl_rex2_map0_31, + itbl_rex2_map0_32, + itbl_rex2_map0_33, + itbl_rex2_map0_34, + itbl_rex2_map0_35, + NULL, + NULL, + itbl_rex2_map0_38, + itbl_rex2_map0_39, + itbl_rex2_map0_3a, + itbl_rex2_map0_3b, + itbl_rex2_map0_3c, + itbl_rex2_map0_3d, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_rex2_map0_50, + itbl_rex2_map0_51, + itbl_rex2_map0_52, + itbl_rex2_map0_53, + itbl_rex2_map0_54, + itbl_rex2_map0_55, + itbl_rex2_map0_56, + itbl_rex2_map0_57, + itbl_rex2_map0_58, + itbl_rex2_map0_59, + itbl_rex2_map0_5a, + itbl_rex2_map0_5b, + itbl_rex2_map0_5c, + itbl_rex2_map0_5d, + itbl_rex2_map0_5e, + itbl_rex2_map0_5f, + NULL, + NULL, + NULL, + itbl_rex2_map0_63, + NULL, + NULL, + NULL, + NULL, + itbl_rex2_map0_68, + itbl_rex2_map0_69, + itbl_rex2_map0_6a, + itbl_rex2_map0_6b, + itbl_rex2_map0_6c, + itbl_rex2_map0_6d, + itbl_rex2_map0_6e, + itbl_rex2_map0_6f, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_rex2_map0_80, + itbl_rex2_map0_81, + NULL, + itbl_rex2_map0_83, + itbl_rex2_map0_84, + itbl_rex2_map0_85, + itbl_rex2_map0_86, + itbl_rex2_map0_87, + itbl_rex2_map0_88, + itbl_rex2_map0_89, + itbl_rex2_map0_8a, + itbl_rex2_map0_8b, + itbl_rex2_map0_8c, + itbl_rex2_map0_8d, + itbl_rex2_map0_8e, + itbl_rex2_map0_8f, + itbl_rex2_map0_90, + itbl_rex2_map0_91, + itbl_rex2_map0_92, + itbl_rex2_map0_93, + itbl_rex2_map0_94, + itbl_rex2_map0_95, + itbl_rex2_map0_96, + itbl_rex2_map0_97, + itbl_rex2_map0_98, + itbl_rex2_map0_99, + NULL, + NULL, + itbl_rex2_map0_9c, + itbl_rex2_map0_9d, + itbl_rex2_map0_9e, + itbl_rex2_map0_9f, + NULL, + itbl_rex2_map0_a1, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_rex2_map0_b0, + itbl_rex2_map0_b1, + itbl_rex2_map0_b2, + itbl_rex2_map0_b3, + itbl_rex2_map0_b4, + itbl_rex2_map0_b5, + itbl_rex2_map0_b6, + itbl_rex2_map0_b7, + itbl_rex2_map0_b8, + itbl_rex2_map0_b9, + itbl_rex2_map0_ba, + itbl_rex2_map0_bb, + itbl_rex2_map0_bc, + itbl_rex2_map0_bd, + itbl_rex2_map0_be, + itbl_rex2_map0_bf, + itbl_rex2_map0_c0, + itbl_rex2_map0_c1, + itbl_rex2_map0_c2, + itbl_rex2_map0_c3, + NULL, + NULL, + itbl_rex2_map0_c6, + itbl_rex2_map0_c7, + itbl_rex2_map0_c8, + itbl_rex2_map0_c9, + itbl_rex2_map0_ca, + itbl_rex2_map0_cb, + itbl_rex2_map0_cc, + itbl_rex2_map0_cd, + NULL, + itbl_rex2_map0_cf, + itbl_rex2_map0_d0, + itbl_rex2_map0_d1, + itbl_rex2_map0_d2, + itbl_rex2_map0_d3, + NULL, + NULL, + itbl_rex2_map0_d6, + itbl_rex2_map0_d7, + itbl_rex2_map0_d8, + itbl_rex2_map0_d9, + itbl_rex2_map0_da, + itbl_rex2_map0_db, + itbl_rex2_map0_dc, + itbl_rex2_map0_dd, + itbl_rex2_map0_de, + itbl_rex2_map0_df, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_rex2_map0_e9, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_rex2_map0_f1, + NULL, + NULL, + itbl_rex2_map0_f4, + itbl_rex2_map0_f5, + itbl_rex2_map0_f6, + itbl_rex2_map0_f7, + itbl_rex2_map0_f8, + itbl_rex2_map0_f9, + itbl_rex2_map0_fa, + itbl_rex2_map0_fb, + itbl_rex2_map0_fc, + itbl_rex2_map0_fd, + itbl_rex2_map0_fe, + itbl_rex2_map0_ff, +}; + +static const struct itemplate * const itbl_rex2_map1_00[] = { + instrux + 1190, + instrux + 1191, + instrux + 1192, + instrux + 1193, + instrux + 1194, + instrux + 1195, + instrux + 1428, + instrux + 1429, + instrux + 1431, + instrux + 1438, + instrux + 1439, + instrux + 1440, + instrux + 1441, + instrux + 1442, + instrux + 1443, + instrux + 1444, + instrux + 1445, + instrux + 1452, + instrux + 1453, + instrux + 1454, + instrux + 1455, + instrux + 1456, + instrux + 1457, + instrux + 1458, + instrux + 1459, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_01[] = { + instrux + 1238, + instrux + 1239, + instrux + 1243, + instrux + 1247, + instrux + 1289, + instrux + 1294, + instrux + 1295, + instrux + 1296, + instrux + 1303, + instrux + 1304, + instrux + 1305, + instrux + 1306, + instrux + 1309, + instrux + 1320, + instrux + 1321, + instrux + 1322, + instrux + 1323, + instrux + 1324, + instrux + 1337, + instrux + 1340, + instrux + 1341, + instrux + 1353, + instrux + 1354, + instrux + 1355, + instrux + 1356, + instrux + 1357, + instrux + 1358, + instrux + 1359, + instrux + 1360, + instrux + 1361, + instrux + 1362, + instrux + 1430, + instrux + 1432, + instrux + 1433, + instrux + 1434, + instrux + 1435, + instrux + 1436, + instrux + 1437, + instrux + 1446, + instrux + 1447, + instrux + 1448, + instrux + 1449, + instrux + 1450, + instrux + 1451, + instrux + 1778, + instrux + 2699, + instrux + 2700, + instrux + 2927, + instrux + 2928, + instrux + 2929, + instrux + 2931, + instrux + 2932, + instrux + 2933, + instrux + 2934, + instrux + 2939, + instrux + 2940, + instrux + 2941, + instrux + 2944, + instrux + 2952, + instrux + 2953, + instrux + 2954, + instrux + 2955, + instrux + 4376, + instrux + 4377, + instrux + 6704, + instrux + 6705, + instrux + 6717, + instrux + 6718, + instrux + 6825, + instrux + 6826, + instrux + 6827, + instrux + 6835, + instrux + 6836, + instrux + 6837, + instrux + 6854, + instrux + 6855, + instrux + 6856, + instrux + 7198, + instrux + 7200, + instrux + 7201, + instrux + 7202, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_02[] = { + instrux + 1422, + instrux + 1423, + instrux + 1424, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_03[] = { + instrux + 1425, + instrux + 1426, + instrux + 1427, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_05[] = { + instrux + 1230, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_06[] = { + instrux + 1318, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_07[] = { + instrux + 1233, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_08[] = { + instrux + 1297, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_09[] = { + instrux + 1298, + instrux + 1299, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_0b[] = { + instrux + 1787, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_0d[] = { + instrux + 1705, + instrux + 1706, + instrux + 4378, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_0e[] = { + instrux + 1524, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_0f[] = { + instrux + 1667, + instrux + 1675, + instrux + 1676, + instrux + 1677, + instrux + 1678, + instrux + 1679, + instrux + 1680, + instrux + 1681, + instrux + 1682, + instrux + 1683, + instrux + 1684, + instrux + 1685, + instrux + 1686, + instrux + 1687, + instrux + 1688, + instrux + 1689, + instrux + 1690, + instrux + 1691, + instrux + 1696, + instrux + 2736, + instrux + 2737, + instrux + 2738, + instrux + 2739, + instrux + 2740, + instrux + 3081, + instrux + 3082, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_10[] = { + instrux + 2674, + instrux + 2676, + instrux + 2901, + instrux + 2903, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_11[] = { + instrux + 2675, + instrux + 2677, + instrux + 2902, + instrux + 2904, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_12[] = { + instrux + 2668, + instrux + 2670, + instrux + 2898, + instrux + 2924, + instrux + 2926, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_13[] = { + instrux + 2669, + instrux + 2897, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_14[] = { + instrux + 2693, + instrux + 2915, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_15[] = { + instrux + 2692, + instrux + 2914, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_16[] = { + instrux + 2665, + instrux + 2667, + instrux + 2896, + instrux + 2925, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_17[] = { + instrux + 2666, + instrux + 2895, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_18[] = { + instrux + 2713, + instrux + 2714, + instrux + 2715, + instrux + 2716, + instrux + 2717, + instrux + 2718, + instrux + 6719, + instrux + 7473, + instrux + 7474, + instrux + 7475, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_19[] = { + instrux + 7473, + instrux + 7474, + instrux + 7475, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_1a[] = { + instrux + 4380, + instrux + 4382, + instrux + 4383, + instrux + 4385, + instrux + 4389, + instrux + 4390, + instrux + 4393, + instrux + 4395, + instrux + 7473, + instrux + 7474, + instrux + 7475, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_1b[] = { + instrux + 4379, + instrux + 4386, + instrux + 4388, + instrux + 4391, + instrux + 4392, + instrux + 4396, + instrux + 4398, + instrux + 4400, + instrux + 7473, + instrux + 7474, + instrux + 7475, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_1c[] = { + instrux + 6708, + instrux + 7473, + instrux + 7474, + instrux + 7475, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_1d[] = { + instrux + 7473, + instrux + 7474, + instrux + 7475, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_1e[] = { + instrux + 6829, + instrux + 6830, + instrux + 6833, + instrux + 6834, + instrux + 7473, + instrux + 7474, + instrux + 7475, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_1f[] = { + instrux + 1, + instrux + 2, + instrux + 3, + instrux + 7473, + instrux + 7474, + instrux + 7475, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_20[] = { + instrux + 1327, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_21[] = { + instrux + 1331, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_22[] = { + instrux + 1328, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_23[] = { + instrux + 1332, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_28[] = { + instrux + 2663, + instrux + 2893, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_29[] = { + instrux + 2664, + instrux + 2894, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_2a[] = { + instrux + 2647, + instrux + 2649, + instrux + 2650, + instrux + 2873, + instrux + 2879, + instrux + 2880, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_2b[] = { + instrux + 2673, + instrux + 2745, + instrux + 2992, + instrux + 2993, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_2c[] = { + instrux + 2653, + instrux + 2654, + instrux + 2655, + instrux + 2882, + instrux + 2885, + instrux + 2886, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_2d[] = { + instrux + 2648, + instrux + 2651, + instrux + 2652, + instrux + 2871, + instrux + 2876, + instrux + 2877, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_2e[] = { + instrux + 2691, + instrux + 2913, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_2f[] = { + instrux + 2646, + instrux + 2867, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_40[] = { + instrux + 2235, + instrux + 2251, + instrux + 2267, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_41[] = { + instrux + 2232, + instrux + 2248, + instrux + 2264, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_42[] = { + instrux + 2225, + instrux + 2241, + instrux + 2257, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_43[] = { + instrux + 2229, + instrux + 2245, + instrux + 2261, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_44[] = { + instrux + 2239, + instrux + 2255, + instrux + 2271, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_45[] = { + instrux + 2234, + instrux + 2250, + instrux + 2266, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_46[] = { + instrux + 2228, + instrux + 2244, + instrux + 2260, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_47[] = { + instrux + 2224, + instrux + 2240, + instrux + 2256, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_48[] = { + instrux + 2238, + instrux + 2254, + instrux + 2270, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_49[] = { + instrux + 2233, + instrux + 2249, + instrux + 2265, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_4a[] = { + instrux + 2236, + instrux + 2252, + instrux + 2268, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_4b[] = { + instrux + 2237, + instrux + 2253, + instrux + 2269, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_4c[] = { + instrux + 2227, + instrux + 2243, + instrux + 2259, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_4d[] = { + instrux + 2231, + instrux + 2247, + instrux + 2263, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_4e[] = { + instrux + 2230, + instrux + 2246, + instrux + 2262, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_4f[] = { + instrux + 2226, + instrux + 2242, + instrux + 2258, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_50[] = { + instrux + 1666, + instrux + 2671, + instrux + 2672, + instrux + 2899, + instrux + 2900, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_51[] = { + instrux + 1659, + instrux + 2686, + instrux + 2687, + instrux + 2909, + instrux + 2910, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_52[] = { + instrux + 1694, + instrux + 2683, + instrux + 2684, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_53[] = { + instrux + 2681, + instrux + 2682, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_54[] = { + instrux + 1674, + instrux + 2627, + instrux + 2848, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_55[] = { + instrux + 1726, + instrux + 2626, + instrux + 2847, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_56[] = { + instrux + 2680, + instrux + 2907, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_57[] = { + instrux + 2694, + instrux + 2916, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_58[] = { + instrux + 1703, + instrux + 2624, + instrux + 2625, + instrux + 2845, + instrux + 2846, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_59[] = { + instrux + 1697, + instrux + 2678, + instrux + 2679, + instrux + 2905, + instrux + 2906, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_5a[] = { + instrux + 1702, + instrux + 2872, + instrux + 2875, + instrux + 2878, + instrux + 2881, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_5b[] = { + instrux + 1701, + instrux + 2869, + instrux + 2874, + instrux + 2884, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_5c[] = { + instrux + 1700, + instrux + 2689, + instrux + 2690, + instrux + 2911, + instrux + 2912, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_5d[] = { + instrux + 1695, + instrux + 2661, + instrux + 2662, + instrux + 2891, + instrux + 2892, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_5e[] = { + instrux + 1692, + instrux + 2656, + instrux + 2657, + instrux + 2887, + instrux + 2888, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_5f[] = { + instrux + 2659, + instrux + 2660, + instrux + 2889, + instrux + 2890, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_60[] = { + instrux + 1734, + instrux + 2840, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_61[] = { + instrux + 1736, + instrux + 2841, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_62[] = { + instrux + 1735, + instrux + 2842, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_63[] = { + instrux + 1654, + instrux + 2764, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_64[] = { + instrux + 1671, + instrux + 2783, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_65[] = { + instrux + 1673, + instrux + 2784, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_66[] = { + instrux + 1672, + instrux + 2785, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_67[] = { + instrux + 1655, + instrux + 2766, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_68[] = { + instrux + 1731, + instrux + 2836, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_69[] = { + instrux + 1733, + instrux + 2837, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_6a[] = { + instrux + 1732, + instrux + 2838, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_6b[] = { + instrux + 1653, + instrux + 2765, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_6c[] = { + instrux + 2843, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_6d[] = { + instrux + 2839, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_6e[] = { + instrux + 1647, + instrux + 1651, + instrux + 2749, + instrux + 2750, + instrux + 2761, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_6f[] = { + instrux + 1649, + instrux + 2752, + instrux + 2754, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_70[] = { + instrux + 2735, + instrux + 2803, + instrux + 2804, + instrux + 2805, + instrux + 2806, + instrux + 2807, + instrux + 2808, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_71[] = { + instrux + 1712, + instrux + 1716, + instrux + 1722, + instrux + 2811, + instrux + 2817, + instrux + 2822, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_72[] = { + instrux + 1708, + instrux + 1714, + instrux + 1718, + instrux + 2813, + instrux + 2819, + instrux + 2824, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_73[] = { + instrux + 1710, + instrux + 1720, + instrux + 2809, + instrux + 2815, + instrux + 2820, + instrux + 2826, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_74[] = { + instrux + 1668, + instrux + 2780, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_75[] = { + instrux + 1670, + instrux + 2781, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_76[] = { + instrux + 1669, + instrux + 2782, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_77[] = { + instrux + 1646, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_78[] = { + instrux + 2938, + instrux + 2988, + instrux + 2990, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_79[] = { + instrux + 2943, + instrux + 2989, + instrux + 2991, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_7c[] = { + instrux + 2919, + instrux + 2920, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_7d[] = { + instrux + 2921, + instrux + 2922, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_7e[] = { + instrux + 1648, + instrux + 1652, + instrux + 2748, + instrux + 2751, + instrux + 2757, + instrux + 2760, + instrux + 2762, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_7f[] = { + instrux + 1650, + instrux + 2753, + instrux + 2755, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_90[] = { + instrux + 2523, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_91[] = { + instrux + 2520, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_92[] = { + instrux + 2513, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_93[] = { + instrux + 2517, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_94[] = { + instrux + 2527, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_95[] = { + instrux + 2522, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_96[] = { + instrux + 2516, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_97[] = { + instrux + 2512, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_98[] = { + instrux + 2526, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_99[] = { + instrux + 2521, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_9a[] = { + instrux + 2524, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_9b[] = { + instrux + 2525, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_9c[] = { + instrux + 2515, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_9d[] = { + instrux + 2519, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_9e[] = { + instrux + 2518, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_9f[] = { + instrux + 2514, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_a0[] = { + instrux + 1405, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_a1[] = { + instrux + 1410, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_a2[] = { + instrux + 1319, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_a3[] = { + instrux + 874, + instrux + 875, + instrux + 876, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_a4[] = { + instrux + 838, + instrux + 839, + instrux + 840, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_a5[] = { + instrux + 841, + instrux + 842, + instrux + 843, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_a6[] = { + instrux + 4036, + instrux + 4037, + instrux + 4038, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_a7[] = { + instrux + 4030, + instrux + 4031, + instrux + 4032, + instrux + 4033, + instrux + 4034, + instrux + 4035, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_a8[] = { + instrux + 1406, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_a9[] = { + instrux + 1411, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_aa[] = { + instrux + 1350, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_ab[] = { + instrux + 892, + instrux + 893, + instrux + 894, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_ac[] = { + instrux + 856, + instrux + 857, + instrux + 858, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_ad[] = { + instrux + 859, + instrux + 860, + instrux + 861, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_ae[] = { + instrux + 1286, + instrux + 1287, + instrux + 1288, + instrux + 1290, + instrux + 1291, + instrux + 1292, + instrux + 1293, + instrux + 1363, + instrux + 1364, + instrux + 1365, + instrux + 1366, + instrux + 1367, + instrux + 1412, + instrux + 1413, + instrux + 1414, + instrux + 1415, + instrux + 1416, + instrux + 1417, + instrux + 1418, + instrux + 1419, + instrux + 2658, + instrux + 2688, + instrux + 2695, + instrux + 2696, + instrux + 2697, + instrux + 2698, + instrux + 2719, + instrux + 2746, + instrux + 2747, + instrux + 6706, + instrux + 6707, + instrux + 6828, + instrux + 6831, + instrux + 6832, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_af[] = { + instrux + 753, + instrux + 754, + instrux + 755, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_b0[] = { + instrux + 1011, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_b1[] = { + instrux + 1012, + instrux + 1013, + instrux + 1014, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_b2[] = { + instrux + 1398, + instrux + 1399, + instrux + 1400, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_b3[] = { + instrux + 886, + instrux + 887, + instrux + 888, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_b4[] = { + instrux + 1392, + instrux + 1393, + instrux + 1394, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_b5[] = { + instrux + 1395, + instrux + 1396, + instrux + 1397, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_b6[] = { + instrux + 1005, + instrux + 1006, + instrux + 1007, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_b7[] = { + instrux + 1008, + instrux + 1009, + instrux + 1010, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_b8[] = { + instrux + 1187, + instrux + 1188, + instrux + 1189, + instrux + 3074, + instrux + 3075, + instrux + 3076, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_b9[] = { + instrux + 1783, + instrux + 1784, + instrux + 1785, + instrux + 1786, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_ba[] = { + instrux + 877, + instrux + 878, + instrux + 879, + instrux + 883, + instrux + 884, + instrux + 885, + instrux + 889, + instrux + 890, + instrux + 891, + instrux + 895, + instrux + 896, + instrux + 897, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_bb[] = { + instrux + 880, + instrux + 881, + instrux + 882, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_bc[] = { + instrux + 898, + instrux + 899, + instrux + 900, + instrux + 910, + instrux + 911, + instrux + 912, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_bd[] = { + instrux + 901, + instrux + 902, + instrux + 903, + instrux + 904, + instrux + 905, + instrux + 906, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_be[] = { + instrux + 996, + instrux + 997, + instrux + 998, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_bf[] = { + instrux + 999, + instrux + 1000, + instrux + 1001, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_c0[] = { + instrux + 1017, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_c1[] = { + instrux + 1018, + instrux + 1019, + instrux + 1020, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_c2[] = { + instrux + 2628, + instrux + 2629, + instrux + 2630, + instrux + 2631, + instrux + 2632, + instrux + 2633, + instrux + 2634, + instrux + 2635, + instrux + 2636, + instrux + 2637, + instrux + 2638, + instrux + 2639, + instrux + 2640, + instrux + 2641, + instrux + 2642, + instrux + 2643, + instrux + 2644, + instrux + 2645, + instrux + 2849, + instrux + 2850, + instrux + 2851, + instrux + 2852, + instrux + 2853, + instrux + 2854, + instrux + 2855, + instrux + 2856, + instrux + 2857, + instrux + 2858, + instrux + 2859, + instrux + 2860, + instrux + 2861, + instrux + 2862, + instrux + 2863, + instrux + 2864, + instrux + 2865, + instrux + 2866, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_c3[] = { + instrux + 2743, + instrux + 2744, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_c4[] = { + instrux + 2725, + instrux + 2726, + instrux + 2727, + instrux + 2787, + instrux + 2788, + instrux + 2789, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_c5[] = { + instrux + 2724, + instrux + 2786, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_c6[] = { + instrux + 2685, + instrux + 2908, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_c7[] = { + instrux + 1015, + instrux + 1016, + instrux + 1310, + instrux + 1311, + instrux + 1312, + instrux + 1313, + instrux + 1314, + instrux + 1315, + instrux + 1316, + instrux + 1317, + instrux + 2930, + instrux + 2935, + instrux + 2936, + instrux + 2945, + instrux + 7199, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_c8[] = { + instrux + 976, + instrux + 977, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_c9[] = { + instrux + 976, + instrux + 977, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_ca[] = { + instrux + 976, + instrux + 977, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_cb[] = { + instrux + 976, + instrux + 977, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_cc[] = { + instrux + 976, + instrux + 977, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_cd[] = { + instrux + 976, + instrux + 977, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_ce[] = { + instrux + 976, + instrux + 977, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_cf[] = { + instrux + 976, + instrux + 977, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_d0[] = { + instrux + 2917, + instrux + 2918, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_d1[] = { + instrux + 1721, + instrux + 2821, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_d2[] = { + instrux + 1717, + instrux + 2823, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_d3[] = { + instrux + 1719, + instrux + 2825, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_d4[] = { + instrux + 2770, + instrux + 2771, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_d5[] = { + instrux + 1699, + instrux + 2798, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_d6[] = { + instrux + 2756, + instrux + 2758, + instrux + 2759, + instrux + 2763, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_d7[] = { + instrux + 2732, + instrux + 2795, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_d8[] = { + instrux + 1728, + instrux + 2834, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_d9[] = { + instrux + 1729, + instrux + 2835, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_da[] = { + instrux + 2731, + instrux + 2794, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_db[] = { + instrux + 1664, + instrux + 2776, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_dc[] = { + instrux + 1661, + instrux + 2774, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_dd[] = { + instrux + 1662, + instrux + 2775, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_de[] = { + instrux + 2729, + instrux + 2792, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_df[] = { + instrux + 1665, + instrux + 2777, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_e0[] = { + instrux + 2722, + instrux + 2778, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_e1[] = { + instrux + 1715, + instrux + 2816, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_e2[] = { + instrux + 1713, + instrux + 2818, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_e3[] = { + instrux + 2723, + instrux + 2779, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_e4[] = { + instrux + 2733, + instrux + 2796, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_e5[] = { + instrux + 1698, + instrux + 2797, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_e6[] = { + instrux + 2868, + instrux + 2870, + instrux + 2883, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_e7[] = { + instrux + 2721, + instrux + 2742, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_e8[] = { + instrux + 1725, + instrux + 2832, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_e9[] = { + instrux + 1727, + instrux + 2833, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_ea[] = { + instrux + 2730, + instrux + 2793, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_eb[] = { + instrux + 1704, + instrux + 2801, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_ec[] = { + instrux + 1658, + instrux + 2772, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_ed[] = { + instrux + 1660, + instrux + 2773, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_ee[] = { + instrux + 2728, + instrux + 2791, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_ef[] = { + instrux + 1777, + instrux + 2844, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_f0[] = { + instrux + 2923, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_f1[] = { + instrux + 1711, + instrux + 2810, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_f2[] = { + instrux + 1707, + instrux + 2812, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_f3[] = { + instrux + 1709, + instrux + 2814, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_f4[] = { + instrux + 2799, + instrux + 2800, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_f5[] = { + instrux + 1693, + instrux + 2790, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_f6[] = { + instrux + 2734, + instrux + 2802, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_f7[] = { + instrux + 2720, + instrux + 2741, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_f8[] = { + instrux + 1723, + instrux + 2827, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_f9[] = { + instrux + 1730, + instrux + 2828, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_fa[] = { + instrux + 1724, + instrux + 2829, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_fb[] = { + instrux + 2830, + instrux + 2831, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_fc[] = { + instrux + 1656, + instrux + 2767, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_fd[] = { + instrux + 1663, + instrux + 2768, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_fe[] = { + instrux + 1657, + instrux + 2769, + NULL +}; + +static const struct itemplate * const itbl_rex2_map1_ff[] = { + instrux + 1779, + instrux + 1780, + instrux + 1781, + instrux + 1782, + NULL +}; + +static const struct itemplate * const * const itbl_rex2_map1[256] = { + itbl_rex2_map1_00, + itbl_rex2_map1_01, + itbl_rex2_map1_02, + itbl_rex2_map1_03, + NULL, + itbl_rex2_map1_05, + itbl_rex2_map1_06, + itbl_rex2_map1_07, + itbl_rex2_map1_08, + itbl_rex2_map1_09, + NULL, + itbl_rex2_map1_0b, + NULL, + itbl_rex2_map1_0d, + itbl_rex2_map1_0e, + itbl_rex2_map1_0f, + itbl_rex2_map1_10, + itbl_rex2_map1_11, + itbl_rex2_map1_12, + itbl_rex2_map1_13, + itbl_rex2_map1_14, + itbl_rex2_map1_15, + itbl_rex2_map1_16, + itbl_rex2_map1_17, + itbl_rex2_map1_18, + itbl_rex2_map1_19, + itbl_rex2_map1_1a, + itbl_rex2_map1_1b, + itbl_rex2_map1_1c, + itbl_rex2_map1_1d, + itbl_rex2_map1_1e, + itbl_rex2_map1_1f, + itbl_rex2_map1_20, + itbl_rex2_map1_21, + itbl_rex2_map1_22, + itbl_rex2_map1_23, + NULL, + NULL, + NULL, + NULL, + itbl_rex2_map1_28, + itbl_rex2_map1_29, + itbl_rex2_map1_2a, + itbl_rex2_map1_2b, + itbl_rex2_map1_2c, + itbl_rex2_map1_2d, + itbl_rex2_map1_2e, + itbl_rex2_map1_2f, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_rex2_map1_40, + itbl_rex2_map1_41, + itbl_rex2_map1_42, + itbl_rex2_map1_43, + itbl_rex2_map1_44, + itbl_rex2_map1_45, + itbl_rex2_map1_46, + itbl_rex2_map1_47, + itbl_rex2_map1_48, + itbl_rex2_map1_49, + itbl_rex2_map1_4a, + itbl_rex2_map1_4b, + itbl_rex2_map1_4c, + itbl_rex2_map1_4d, + itbl_rex2_map1_4e, + itbl_rex2_map1_4f, + itbl_rex2_map1_50, + itbl_rex2_map1_51, + itbl_rex2_map1_52, + itbl_rex2_map1_53, + itbl_rex2_map1_54, + itbl_rex2_map1_55, + itbl_rex2_map1_56, + itbl_rex2_map1_57, + itbl_rex2_map1_58, + itbl_rex2_map1_59, + itbl_rex2_map1_5a, + itbl_rex2_map1_5b, + itbl_rex2_map1_5c, + itbl_rex2_map1_5d, + itbl_rex2_map1_5e, + itbl_rex2_map1_5f, + itbl_rex2_map1_60, + itbl_rex2_map1_61, + itbl_rex2_map1_62, + itbl_rex2_map1_63, + itbl_rex2_map1_64, + itbl_rex2_map1_65, + itbl_rex2_map1_66, + itbl_rex2_map1_67, + itbl_rex2_map1_68, + itbl_rex2_map1_69, + itbl_rex2_map1_6a, + itbl_rex2_map1_6b, + itbl_rex2_map1_6c, + itbl_rex2_map1_6d, + itbl_rex2_map1_6e, + itbl_rex2_map1_6f, + itbl_rex2_map1_70, + itbl_rex2_map1_71, + itbl_rex2_map1_72, + itbl_rex2_map1_73, + itbl_rex2_map1_74, + itbl_rex2_map1_75, + itbl_rex2_map1_76, + itbl_rex2_map1_77, + itbl_rex2_map1_78, + itbl_rex2_map1_79, + NULL, + NULL, + itbl_rex2_map1_7c, + itbl_rex2_map1_7d, + itbl_rex2_map1_7e, + itbl_rex2_map1_7f, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + itbl_rex2_map1_90, + itbl_rex2_map1_91, + itbl_rex2_map1_92, + itbl_rex2_map1_93, + itbl_rex2_map1_94, + itbl_rex2_map1_95, + itbl_rex2_map1_96, + itbl_rex2_map1_97, + itbl_rex2_map1_98, + itbl_rex2_map1_99, + itbl_rex2_map1_9a, + itbl_rex2_map1_9b, + itbl_rex2_map1_9c, + itbl_rex2_map1_9d, + itbl_rex2_map1_9e, + itbl_rex2_map1_9f, + itbl_rex2_map1_a0, + itbl_rex2_map1_a1, + itbl_rex2_map1_a2, + itbl_rex2_map1_a3, + itbl_rex2_map1_a4, + itbl_rex2_map1_a5, + itbl_rex2_map1_a6, + itbl_rex2_map1_a7, + itbl_rex2_map1_a8, + itbl_rex2_map1_a9, + itbl_rex2_map1_aa, + itbl_rex2_map1_ab, + itbl_rex2_map1_ac, + itbl_rex2_map1_ad, + itbl_rex2_map1_ae, + itbl_rex2_map1_af, + itbl_rex2_map1_b0, + itbl_rex2_map1_b1, + itbl_rex2_map1_b2, + itbl_rex2_map1_b3, + itbl_rex2_map1_b4, + itbl_rex2_map1_b5, + itbl_rex2_map1_b6, + itbl_rex2_map1_b7, + itbl_rex2_map1_b8, + itbl_rex2_map1_b9, + itbl_rex2_map1_ba, + itbl_rex2_map1_bb, + itbl_rex2_map1_bc, + itbl_rex2_map1_bd, + itbl_rex2_map1_be, + itbl_rex2_map1_bf, + itbl_rex2_map1_c0, + itbl_rex2_map1_c1, + itbl_rex2_map1_c2, + itbl_rex2_map1_c3, + itbl_rex2_map1_c4, + itbl_rex2_map1_c5, + itbl_rex2_map1_c6, + itbl_rex2_map1_c7, + itbl_rex2_map1_c8, + itbl_rex2_map1_c9, + itbl_rex2_map1_ca, + itbl_rex2_map1_cb, + itbl_rex2_map1_cc, + itbl_rex2_map1_cd, + itbl_rex2_map1_ce, + itbl_rex2_map1_cf, + itbl_rex2_map1_d0, + itbl_rex2_map1_d1, + itbl_rex2_map1_d2, + itbl_rex2_map1_d3, + itbl_rex2_map1_d4, + itbl_rex2_map1_d5, + itbl_rex2_map1_d6, + itbl_rex2_map1_d7, + itbl_rex2_map1_d8, + itbl_rex2_map1_d9, + itbl_rex2_map1_da, + itbl_rex2_map1_db, + itbl_rex2_map1_dc, + itbl_rex2_map1_dd, + itbl_rex2_map1_de, + itbl_rex2_map1_df, + itbl_rex2_map1_e0, + itbl_rex2_map1_e1, + itbl_rex2_map1_e2, + itbl_rex2_map1_e3, + itbl_rex2_map1_e4, + itbl_rex2_map1_e5, + itbl_rex2_map1_e6, + itbl_rex2_map1_e7, + itbl_rex2_map1_e8, + itbl_rex2_map1_e9, + itbl_rex2_map1_ea, + itbl_rex2_map1_eb, + itbl_rex2_map1_ec, + itbl_rex2_map1_ed, + itbl_rex2_map1_ee, + itbl_rex2_map1_ef, + itbl_rex2_map1_f0, + itbl_rex2_map1_f1, + itbl_rex2_map1_f2, + itbl_rex2_map1_f3, + itbl_rex2_map1_f4, + itbl_rex2_map1_f5, + itbl_rex2_map1_f6, + itbl_rex2_map1_f7, + itbl_rex2_map1_f8, + itbl_rex2_map1_f9, + itbl_rex2_map1_fa, + itbl_rex2_map1_fb, + itbl_rex2_map1_fc, + itbl_rex2_map1_fd, + itbl_rex2_map1_fe, + itbl_rex2_map1_ff, +}; + +const struct itemplate * const * const * const +ndisasm_itable[] = { + /* ---- novex ---- */ + /* 0 */ itbl_novex_map0, + /* 1 */ itbl_novex_map1, + /* 2 */ itbl_novex_map2, + /* 3 */ itbl_novex_map3, + /* ---- vex ---- */ + /* 0 */ NULL, + /* 1 */ itbl_vex_map1, + /* 2 */ itbl_vex_map2, + /* 3 */ itbl_vex_map3, + /* 4 */ NULL, + /* 5 */ itbl_vex_map5, + /* 6 */ NULL, + /* 7 */ itbl_vex_map7, + /* 8 */ NULL, + /* 9 */ NULL, + /* 10 */ NULL, + /* 11 */ NULL, + /* 12 */ NULL, + /* 13 */ NULL, + /* 14 */ NULL, + /* 15 */ NULL, + /* 16 */ NULL, + /* 17 */ NULL, + /* 18 */ NULL, + /* 19 */ NULL, + /* 20 */ NULL, + /* 21 */ NULL, + /* 22 */ NULL, + /* 23 */ NULL, + /* 24 */ NULL, + /* 25 */ NULL, + /* 26 */ NULL, + /* 27 */ NULL, + /* 28 */ NULL, + /* 29 */ NULL, + /* 30 */ NULL, + /* 31 */ NULL, + /* ---- xop ---- */ + /* 8 */ itbl_xop_map8, + /* 9 */ itbl_xop_map9, + /* 10 */ itbl_xop_map10, + /* 11 */ NULL, + /* 12 */ NULL, + /* 13 */ NULL, + /* 14 */ NULL, + /* 15 */ NULL, + /* 16 */ NULL, + /* 17 */ NULL, + /* 18 */ NULL, + /* 19 */ NULL, + /* 20 */ NULL, + /* 21 */ NULL, + /* 22 */ NULL, + /* 23 */ NULL, + /* 24 */ NULL, + /* 25 */ NULL, + /* 26 */ NULL, + /* 27 */ NULL, + /* 28 */ NULL, + /* 29 */ NULL, + /* 30 */ NULL, + /* 31 */ NULL, + /* ---- evex ---- */ + /* 0 */ NULL, + /* 1 */ itbl_evex_map1, + /* 2 */ itbl_evex_map2, + /* 3 */ itbl_evex_map3, + /* 4 */ itbl_evex_map4, + /* 5 */ itbl_evex_map5, + /* 6 */ itbl_evex_map6, + /* 7 */ itbl_evex_map7, + /* ---- rex2 ---- */ + /* 0 */ itbl_rex2_map0, + /* 1 */ itbl_rex2_map1, +}; diff --git a/src/x86/insnsn.c b/src/x86/insnsn.c new file mode 100644 index 0000000..dd9434e --- /dev/null +++ b/src/x86/insnsn.c @@ -0,0 +1,2646 @@ +/* This file is auto-generated from insns.dat by insns.pl - don't edit it */ + +#include "tables.h" + +const char * const nasm_insn_names[] = { + "db", + "dw", + "dd", + "dq", + "dt", + "do", + "dy", + "dz", + "resb", + "resw", + "resd", + "resq", + "rest", + "reso", + "resy", + "resz", + "incbin", + "equ", + "nop", + "nop2", + "mov", + "movabs", + "movrs", + "lea", + "add", + "or", + "adc", + "sbb", + "and", + "sub", + "xor", + "cmp", + "test", + "rol", + "ror", + "rcl", + "rcr", + "shl", + "sal", + "shr", + "sar", + "rorx", + "rolx", + "shlx", + "salx", + "sarx", + "shrx", + "inc", + "dec", + "imul", + "mul", + "mulx", + "idiv", + "div", + "neg", + "not", + "adcx", + "adox", + "shld", + "shrd", + "bt", + "btc", + "btr", + "bts", + "bsf", + "bsr", + "ibts", + "xbts", + "lzcnt", + "tzcnt", + "andn", + "bextr", + "blsmsk", + "blsr", + "blsi", + "bzhi", + "pdep", + "pext", + "blci", + "blcic", + "blsic", + "blcfill", + "blsfill", + "blcmsk", + "blcs", + "tzmsk", + "t1mskc", + "aaa", + "aad", + "aam", + "aas", + "daa", + "das", + "bswap", + "movbe", + "cbw", + "cdq", + "cdqe", + "cqo", + "cwd", + "cwde", + "movsx", + "movsxb", + "movsxw", + "movsxd", + "movzx", + "movzxb", + "movzxw", + "movzxd", + "cmpxchg", + "cmpxchg8b", + "cmpxchg16b", + "xadd", + "xchg", + "cmpxchg486", + "jmpabs", + "jmp", + "ja", + "jae", + "jb", + "jbe", + "jc", + "je", + "jg", + "jge", + "jl", + "jle", + "jna", + "jnae", + "jnb", + "jnbe", + "jnc", + "jne", + "jng", + "jnge", + "jnl", + "jnle", + "jno", + "jnp", + "jns", + "jnz", + "jo", + "jp", + "jpe", + "jpo", + "js", + "jz", + "jcxz", + "jecxz", + "jrcxz", + "loop", + "loopw", + "loopd", + "loopq", + "loope", + "loopew", + "looped", + "loopeq", + "loopne", + "loopnew", + "loopned", + "loopneq", + "loopz", + "loopzw", + "loopzd", + "loopzq", + "loopnz", + "loopnzw", + "loopnzd", + "loopnzq", + "jmpe", + "call", + "ret", + "retw", + "retd", + "retq", + "retf", + "retfw", + "retfd", + "retfq", + "retn", + "retnw", + "retnd", + "retnq", + "int", + "int1", + "int01", + "icebp", + "int3", + "int03", + "brkpt", + "into", + "syscall", + "sysenter", + "sysexit", + "sysret", + "iret", + "iretw", + "iretd", + "iretq", + "erets", + "eretu", + "clc", + "cld", + "cli", + "clac", + "stc", + "std", + "sti", + "stac", + "cmc", + "lahf", + "sahf", + "salc", + "pushf", + "pushfw", + "pushfd", + "pushfq", + "popf", + "popfw", + "popfd", + "popfq", + "cmpsb", + "cmpsw", + "cmpsd", + "cmpsq", + "lodsb", + "lodsw", + "lodsd", + "lodsq", + "movsb", + "movsw", + "movsd", + "movsq", + "stosb", + "stosw", + "stosd", + "stosq", + "scasb", + "scasw", + "scasd", + "scasq", + "insb", + "insw", + "insd", + "outsb", + "outsw", + "outsd", + "lfence", + "mfence", + "sfence", + "serialize", + "clflush", + "clflushopt", + "clwb", + "pcommit", + "clzero", + "invd", + "wbinvd", + "wbnoinvd", + "invpcid", + "invlpg", + "invlpga", + "rdpmc", + "rdtsc", + "rdtscp", + "rdrand", + "rdseed", + "rdpid", + "clts", + "cpuid", + "lmsw", + "smsw", + "wrmsr", + "rdmsr", + "wrmsrns", + "rdmsrlist", + "wrmsrlist", + "urdmsr", + "uwrmsr", + "umov", + "bb0_reset", + "bb1_reset", + "cpu_read", + "cpu_write", + "dmint", + "rdm", + "smint", + "smintold", + "rsm", + "wrshr", + "rdshr", + "rsdc", + "rsldt", + "rsts", + "svdc", + "svldt", + "svts", + "hlt", + "pause", + "monitor", + "monitorw", + "monitord", + "monitorq", + "mwait", + "monitorx", + "mwaitx", + "tpause", + "umonitor", + "umwait", + "in", + "out", + "lds", + "les", + "lfs", + "lgs", + "lss", + "push", + "pop", + "rdfsbase", + "rdgsbase", + "wrfsbase", + "wrgsbase", + "arpl", + "lar", + "lsl", + "verr", + "verw", + "swapgs", + "lkgs", + "lgdt", + "lidt", + "lldt", + "ltr", + "sgdt", + "sidt", + "sldt", + "str", + "loadall", + "loadall286", + "f2xm1", + "fabs", + "fadd", + "faddp", + "fbld", + "fbstp", + "fchs", + "fclex", + "fcmovb", + "fcmovbe", + "fcmove", + "fcmovnb", + "fcmovnbe", + "fcmovne", + "fcmovnu", + "fcmovu", + "fcom", + "fcomi", + "fcomip", + "fcomp", + "fcompp", + "fcos", + "fdecstp", + "fdisi", + "fdiv", + "fdivp", + "fdivr", + "fdivrp", + "femms", + "feni", + "ffree", + "ffreep", + "fiadd", + "ficom", + "ficomp", + "fidiv", + "fidivr", + "fild", + "fimul", + "fincstp", + "finit", + "fist", + "fistp", + "fisttp", + "fisub", + "fisubr", + "fld", + "fld1", + "fldcw", + "fldenv", + "fldl2e", + "fldl2t", + "fldlg2", + "fldln2", + "fldpi", + "fldz", + "fmul", + "fmulp", + "fnclex", + "fndisi", + "fneni", + "fninit", + "fnop", + "fnsave", + "fnstcw", + "fnstenv", + "fnstsw", + "fpatan", + "fprem", + "fprem1", + "fptan", + "frndint", + "frstor", + "fsave", + "fscale", + "fsetpm", + "fsin", + "fsincos", + "fsqrt", + "fst", + "fstcw", + "fstenv", + "fstp", + "fstsw", + "fsub", + "fsubp", + "fsubr", + "fsubrp", + "ftst", + "fucom", + "fucomi", + "fucomip", + "fucomp", + "fucompp", + "fxam", + "fxch", + "fxtract", + "fyl2x", + "fyl2xp1", + "emms", + "movd", + "movq", + "packssdw", + "packsswb", + "packuswb", + "paddb", + "paddd", + "paddsb", + "paddsiw", + "paddsw", + "paddusb", + "paddusw", + "paddw", + "pand", + "pandn", + "paveb", + "pavgusb", + "pcmpeqb", + "pcmpeqd", + "pcmpeqw", + "pcmpgtb", + "pcmpgtd", + "pcmpgtw", + "pdistib", + "pf2id", + "pfacc", + "pfadd", + "pfcmpeq", + "pfcmpge", + "pfcmpgt", + "pfmax", + "pfmin", + "pfmul", + "pfrcp", + "pfrcpit1", + "pfrcpit2", + "pfrsqit1", + "pfrsqrt", + "pfsub", + "pfsubr", + "pi2fd", + "pmachriw", + "pmaddwd", + "pmagw", + "pmulhriw", + "pmulhrwa", + "pmulhrwc", + "pmulhw", + "pmullw", + "pmvgezb", + "pmvlzb", + "pmvnzb", + "pmvzb", + "por", + "prefetch", + "prefetchw", + "pslld", + "psllq", + "psllw", + "psrad", + "psraw", + "psrld", + "psrlq", + "psrlw", + "psubb", + "psubd", + "psubsb", + "psubsiw", + "psubsw", + "psubusb", + "psubusw", + "psubw", + "punpckhbw", + "punpckhdq", + "punpckhwd", + "punpcklbw", + "punpckldq", + "punpcklwd", + "pusha", + "pushaw", + "pushad", + "popa", + "popaw", + "popad", + "enter", + "enterw", + "enterd", + "enterq", + "leave", + "leavew", + "leaved", + "leaveq", + "bound", + "pushp", + "popp", + "push2", + "push2p", + "pop2", + "pop2p", + "pxor", + "skinit", + "ud0", + "ud1", + "ud2b", + "ud2", + "ud2a", + "udb", + "udw", + "fwait", + "xlatb", + "xlat", + "ccmp", + "ccmpa", + "ccmpae", + "ccmpb", + "ccmpbe", + "ccmpc", + "ccmpe", + "ccmpf", + "ccmpg", + "ccmpge", + "ccmpl", + "ccmple", + "ccmpna", + "ccmpnae", + "ccmpnb", + "ccmpnbe", + "ccmpnc", + "ccmpne", + "ccmpng", + "ccmpnge", + "ccmpnl", + "ccmpnle", + "ccmpno", + "ccmpns", + "ccmpnz", + "ccmpo", + "ccmps", + "ccmpt", + "ccmpz", + "ctest", + "ctesta", + "ctestae", + "ctestb", + "ctestbe", + "ctestc", + "cteste", + "ctestf", + "ctestg", + "ctestge", + "ctestl", + "ctestle", + "ctestna", + "ctestnae", + "ctestnb", + "ctestnbe", + "ctestnc", + "ctestne", + "ctestng", + "ctestnge", + "ctestnl", + "ctestnle", + "ctestno", + "ctestns", + "ctestnz", + "ctesto", + "ctests", + "ctestt", + "ctestz", + "cmova", + "cmovae", + "cmovb", + "cmovbe", + "cmovc", + "cmove", + "cmovg", + "cmovge", + "cmovl", + "cmovle", + "cmovna", + "cmovnae", + "cmovnb", + "cmovnbe", + "cmovnc", + "cmovne", + "cmovng", + "cmovnge", + "cmovnl", + "cmovnle", + "cmovno", + "cmovnp", + "cmovns", + "cmovnz", + "cmovo", + "cmovp", + "cmovpe", + "cmovpo", + "cmovs", + "cmovz", + "cfcmova", + "cfcmovae", + "cfcmovb", + "cfcmovbe", + "cfcmovc", + "cfcmove", + "cfcmovg", + "cfcmovge", + "cfcmovl", + "cfcmovle", + "cfcmovna", + "cfcmovnae", + "cfcmovnb", + "cfcmovnbe", + "cfcmovnc", + "cfcmovne", + "cfcmovng", + "cfcmovnge", + "cfcmovnl", + "cfcmovnle", + "cfcmovno", + "cfcmovnp", + "cfcmovns", + "cfcmovnz", + "cfcmovo", + "cfcmovp", + "cfcmovpe", + "cfcmovpo", + "cfcmovs", + "cfcmovz", + "seta", + "setae", + "setb", + "setbe", + "setc", + "sete", + "setg", + "setge", + "setl", + "setle", + "setna", + "setnae", + "setnb", + "setnbe", + "setnc", + "setne", + "setng", + "setnge", + "setnl", + "setnle", + "setno", + "setnp", + "setns", + "setnz", + "seto", + "setp", + "setpe", + "setpo", + "sets", + "setz", + "setazu", + "setaezu", + "setbzu", + "setbezu", + "setczu", + "setezu", + "setgzu", + "setgezu", + "setlzu", + "setlezu", + "setnazu", + "setnaezu", + "setnbzu", + "setnbezu", + "setnczu", + "setnezu", + "setngzu", + "setngezu", + "setnlzu", + "setnlezu", + "setnozu", + "setnpzu", + "setnszu", + "setnzzu", + "setozu", + "setpzu", + "setpezu", + "setpozu", + "setszu", + "setzzu", + "cmpaxadd", + "cmpaexadd", + "cmpbxadd", + "cmpbexadd", + "cmpcxadd", + "cmpexadd", + "cmpgxadd", + "cmpgexadd", + "cmplxadd", + "cmplexadd", + "cmpnaxadd", + "cmpnaexadd", + "cmpnbxadd", + "cmpnbexadd", + "cmpncxadd", + "cmpnexadd", + "cmpngxadd", + "cmpngexadd", + "cmpnlxadd", + "cmpnlexadd", + "cmpnoxadd", + "cmpnpxadd", + "cmpnsxadd", + "cmpnzxadd", + "cmpoxadd", + "cmppxadd", + "cmppexadd", + "cmppoxadd", + "cmpsxadd", + "cmpzxadd", + "addps", + "addss", + "andnps", + "andps", + "cmpeqps", + "cmpeqss", + "cmpleps", + "cmpless", + "cmpltps", + "cmpltss", + "cmpneqps", + "cmpneqss", + "cmpnleps", + "cmpnless", + "cmpnltps", + "cmpnltss", + "cmpordps", + "cmpordss", + "cmpunordps", + "cmpunordss", + "cmpps", + "cmpss", + "comiss", + "cvtpi2ps", + "cvtps2pi", + "cvtsi2ss", + "cvtss2si", + "cvttps2pi", + "cvttss2si", + "divps", + "divss", + "ldmxcsr", + "maxps", + "maxss", + "minps", + "minss", + "movaps", + "movhps", + "movlhps", + "movlps", + "movhlps", + "movmskps", + "movntps", + "movss", + "movups", + "mulps", + "mulss", + "orps", + "rcpps", + "rcpss", + "rsqrtps", + "rsqrtss", + "shufps", + "sqrtps", + "sqrtss", + "stmxcsr", + "subps", + "subss", + "ucomiss", + "unpckhps", + "unpcklps", + "xorps", + "fxrstor", + "fxrstor64", + "fxsave", + "fxsave64", + "xgetbv", + "xsetbv", + "xsave", + "xsave64", + "xsavec", + "xsavec64", + "xsaveopt", + "xsaveopt64", + "xsaves", + "xsaves64", + "xrstor", + "xrstor64", + "xrstors", + "xrstors64", + "prefetchnta", + "prefetcht0", + "prefetcht1", + "prefetcht2", + "prefetchit0", + "prefetchit1", + "maskmovq", + "movntq", + "pavgb", + "pavgw", + "pextrw", + "pinsrw", + "pmaxsw", + "pmaxub", + "pminsw", + "pminub", + "pmovmskb", + "pmulhuw", + "psadbw", + "pshufw", + "pf2iw", + "pfnacc", + "pfpnacc", + "pi2fw", + "pswapd", + "maskmovdqu", + "movntdq", + "movnti", + "movntpd", + "movdqa", + "movdqu", + "movdq2q", + "movq2dq", + "paddq", + "pmuludq", + "pshufd", + "pshufhw", + "pshuflw", + "pslldq", + "psrldq", + "psubq", + "punpckhqdq", + "punpcklqdq", + "addpd", + "addsd", + "andnpd", + "andpd", + "cmpeqpd", + "cmpeqsd", + "cmplepd", + "cmplesd", + "cmpltpd", + "cmpltsd", + "cmpneqpd", + "cmpneqsd", + "cmpnlepd", + "cmpnlesd", + "cmpnltpd", + "cmpnltsd", + "cmpordpd", + "cmpordsd", + "cmpunordpd", + "cmpunordsd", + "cmppd", + "comisd", + "cvtdq2pd", + "cvtdq2ps", + "cvtpd2dq", + "cvtpd2pi", + "cvtpd2ps", + "cvtpi2pd", + "cvtps2dq", + "cvtps2pd", + "cvtsd2si", + "cvtsd2ss", + "cvtsi2sd", + "cvtss2sd", + "cvttpd2pi", + "cvttpd2dq", + "cvttps2dq", + "cvttsd2si", + "divpd", + "divsd", + "maxpd", + "maxsd", + "minpd", + "minsd", + "movapd", + "movhpd", + "movlpd", + "movmskpd", + "movupd", + "mulpd", + "mulsd", + "orpd", + "shufpd", + "sqrtpd", + "sqrtsd", + "subpd", + "subsd", + "ucomisd", + "unpckhpd", + "unpcklpd", + "xorpd", + "addsubpd", + "addsubps", + "haddpd", + "haddps", + "hsubpd", + "hsubps", + "lddqu", + "movddup", + "movshdup", + "movsldup", + "clgi", + "stgi", + "vmcall", + "vmclear", + "vmfunc", + "vmlaunch", + "vmload", + "vmmcall", + "vmptrld", + "vmptrst", + "vmread", + "vmresume", + "vmrun", + "vmsave", + "vmwrite", + "vmxoff", + "vmxon", + "invept", + "invvpid", + "pvalidate", + "rmpadjust", + "vmgexit", + "pabsb", + "pabsw", + "pabsd", + "palignr", + "phaddw", + "phaddd", + "phaddsw", + "phsubw", + "phsubd", + "phsubsw", + "pmaddubsw", + "pmulhrsw", + "pshufb", + "psignb", + "psignw", + "psignd", + "extrq", + "insertq", + "movntsd", + "movntss", + "blendpd", + "blendps", + "blendvpd", + "blendvps", + "dppd", + "dpps", + "extractps", + "insertps", + "movntdqa", + "mpsadbw", + "packusdw", + "pblendvb", + "pblendw", + "pcmpeqq", + "pextrb", + "pextrd", + "pextrq", + "phminposuw", + "pinsrb", + "pinsrd", + "pinsrq", + "pmaxsb", + "pmaxsd", + "pmaxud", + "pmaxuw", + "pminsb", + "pminsd", + "pminud", + "pminuw", + "pmovsxbw", + "pmovsxbd", + "pmovsxbq", + "pmovsxwd", + "pmovsxwq", + "pmovsxdq", + "pmovzxbw", + "pmovzxbd", + "pmovzxbq", + "pmovzxwd", + "pmovzxwq", + "pmovzxdq", + "pmuldq", + "pmulld", + "ptest", + "roundpd", + "roundps", + "roundsd", + "roundss", + "crc32", + "pcmpestri", + "pcmpestrm", + "pcmpistri", + "pcmpistrm", + "pcmpgtq", + "popcnt", + "getsec", + "pfrcpv", + "pfrsqrtv", + "aesenc", + "aesenclast", + "aesdec", + "aesdeclast", + "aesimc", + "aeskeygenassist", + "vaesenc", + "vaesenclast", + "vaesdec", + "vaesdeclast", + "vaesimc", + "vaeskeygenassist", + "aesdec128kl", + "aesdec256kl", + "aesenc128kl", + "aesenc256kl", + "encodekey128", + "encodekey256", + "loadiwkey", + "aesdecwide128kl", + "aesdecwide256kl", + "aesencwide128kl", + "aesencwide256kl", + "vaddpd", + "vaddps", + "vaddsd", + "vaddss", + "vaddsubpd", + "vaddsubps", + "vandpd", + "vandps", + "vandnpd", + "vandnps", + "vblendpd", + "vblendps", + "vblendvpd", + "vblendvps", + "vbroadcastss", + "vbroadcastsd", + "vbroadcastf128", + "vcmpeq_ospd", + "vcmpeqpd", + "vcmplt_ospd", + "vcmpltpd", + "vcmple_ospd", + "vcmplepd", + "vcmpunord_qpd", + "vcmpunordpd", + "vcmpneq_uqpd", + "vcmpneqpd", + "vcmpnlt_uspd", + "vcmpnltpd", + "vcmpnle_uspd", + "vcmpnlepd", + "vcmpord_qpd", + "vcmpordpd", + "vcmpeq_uqpd", + "vcmpnge_uspd", + "vcmpngepd", + "vcmpngt_uspd", + "vcmpngtpd", + "vcmpfalse_oqpd", + "vcmpfalsepd", + "vcmpneq_oqpd", + "vcmpge_ospd", + "vcmpgepd", + "vcmpgt_ospd", + "vcmpgtpd", + "vcmptrue_uqpd", + "vcmptruepd", + "vcmplt_oqpd", + "vcmple_oqpd", + "vcmpunord_spd", + "vcmpneq_uspd", + "vcmpnlt_uqpd", + "vcmpnle_uqpd", + "vcmpord_spd", + "vcmpeq_uspd", + "vcmpnge_uqpd", + "vcmpngt_uqpd", + "vcmpfalse_ospd", + "vcmpneq_ospd", + "vcmpge_oqpd", + "vcmpgt_oqpd", + "vcmptrue_uspd", + "vcmppd", + "vcmpeq_osps", + "vcmpeqps", + "vcmplt_osps", + "vcmpltps", + "vcmple_osps", + "vcmpleps", + "vcmpunord_qps", + "vcmpunordps", + "vcmpneq_uqps", + "vcmpneqps", + "vcmpnlt_usps", + "vcmpnltps", + "vcmpnle_usps", + "vcmpnleps", + "vcmpord_qps", + "vcmpordps", + "vcmpeq_uqps", + "vcmpnge_usps", + "vcmpngeps", + "vcmpngt_usps", + "vcmpngtps", + "vcmpfalse_oqps", + "vcmpfalseps", + "vcmpneq_oqps", + "vcmpge_osps", + "vcmpgeps", + "vcmpgt_osps", + "vcmpgtps", + "vcmptrue_uqps", + "vcmptrueps", + "vcmplt_oqps", + "vcmple_oqps", + "vcmpunord_sps", + "vcmpneq_usps", + "vcmpnlt_uqps", + "vcmpnle_uqps", + "vcmpord_sps", + "vcmpeq_usps", + "vcmpnge_uqps", + "vcmpngt_uqps", + "vcmpfalse_osps", + "vcmpneq_osps", + "vcmpge_oqps", + "vcmpgt_oqps", + "vcmptrue_usps", + "vcmpps", + "vcmpeq_ossd", + "vcmpeqsd", + "vcmplt_ossd", + "vcmpltsd", + "vcmple_ossd", + "vcmplesd", + "vcmpunord_qsd", + "vcmpunordsd", + "vcmpneq_uqsd", + "vcmpneqsd", + "vcmpnlt_ussd", + "vcmpnltsd", + "vcmpnle_ussd", + "vcmpnlesd", + "vcmpord_qsd", + "vcmpordsd", + "vcmpeq_uqsd", + "vcmpnge_ussd", + "vcmpngesd", + "vcmpngt_ussd", + "vcmpngtsd", + "vcmpfalse_oqsd", + "vcmpfalsesd", + "vcmpneq_oqsd", + "vcmpge_ossd", + "vcmpgesd", + "vcmpgt_ossd", + "vcmpgtsd", + "vcmptrue_uqsd", + "vcmptruesd", + "vcmplt_oqsd", + "vcmple_oqsd", + "vcmpunord_ssd", + "vcmpneq_ussd", + "vcmpnlt_uqsd", + "vcmpnle_uqsd", + "vcmpord_ssd", + "vcmpeq_ussd", + "vcmpnge_uqsd", + "vcmpngt_uqsd", + "vcmpfalse_ossd", + "vcmpneq_ossd", + "vcmpge_oqsd", + "vcmpgt_oqsd", + "vcmptrue_ussd", + "vcmpsd", + "vcmpeq_osss", + "vcmpeqss", + "vcmplt_osss", + "vcmpltss", + "vcmple_osss", + "vcmpless", + "vcmpunord_qss", + "vcmpunordss", + "vcmpneq_uqss", + "vcmpneqss", + "vcmpnlt_usss", + "vcmpnltss", + "vcmpnle_usss", + "vcmpnless", + "vcmpord_qss", + "vcmpordss", + "vcmpeq_uqss", + "vcmpnge_usss", + "vcmpngess", + "vcmpngt_usss", + "vcmpngtss", + "vcmpfalse_oqss", + "vcmpfalsess", + "vcmpneq_oqss", + "vcmpge_osss", + "vcmpgess", + "vcmpgt_osss", + "vcmpgtss", + "vcmptrue_uqss", + "vcmptruess", + "vcmplt_oqss", + "vcmple_oqss", + "vcmpunord_sss", + "vcmpneq_usss", + "vcmpnlt_uqss", + "vcmpnle_uqss", + "vcmpord_sss", + "vcmpeq_usss", + "vcmpnge_uqss", + "vcmpngt_uqss", + "vcmpfalse_osss", + "vcmpneq_osss", + "vcmpge_oqss", + "vcmpgt_oqss", + "vcmptrue_usss", + "vcmpss", + "vcomisd", + "vcomiss", + "vcvtdq2pd", + "vcvtdq2ps", + "vcvtpd2dq", + "vcvtpd2ps", + "vcvtps2dq", + "vcvtps2pd", + "vcvtsd2si", + "vcvtsd2ss", + "vcvtsi2sd", + "vcvtsi2ss", + "vcvtss2sd", + "vcvtss2si", + "vcvttpd2dq", + "vcvttps2dq", + "vcvttsd2si", + "vcvttss2si", + "vdivpd", + "vdivps", + "vdivsd", + "vdivss", + "vdppd", + "vdpps", + "vextractf128", + "vextractps", + "vhaddpd", + "vhaddps", + "vhsubpd", + "vhsubps", + "vinsertf128", + "vinsertps", + "vlddqu", + "vldqqu", + "vldmxcsr", + "vmaskmovdqu", + "vmaskmovps", + "vmaskmovpd", + "vmaxpd", + "vmaxps", + "vmaxsd", + "vmaxss", + "vminpd", + "vminps", + "vminsd", + "vminss", + "vmovapd", + "vmovaps", + "vmovd", + "vmovq", + "vmovddup", + "vmovdqa", + "vmovqqa", + "vmovdqu", + "vmovqqu", + "vmovhlps", + "vmovhpd", + "vmovhps", + "vmovlhps", + "vmovlpd", + "vmovlps", + "vmovmskpd", + "vmovmskps", + "vmovntdq", + "vmovntqq", + "vmovntdqa", + "vmovntpd", + "vmovntps", + "vmovsd", + "vmovshdup", + "vmovsldup", + "vmovss", + "vmovupd", + "vmovups", + "vmpsadbw", + "vmulpd", + "vmulps", + "vmulsd", + "vmulss", + "vorpd", + "vorps", + "vpabsb", + "vpabsw", + "vpabsd", + "vpacksswb", + "vpackssdw", + "vpackuswb", + "vpackusdw", + "vpaddb", + "vpaddw", + "vpaddd", + "vpaddq", + "vpaddsb", + "vpaddsw", + "vpaddusb", + "vpaddusw", + "vpalignr", + "vpand", + "vpandn", + "vpavgb", + "vpavgw", + "vpblendvb", + "vpblendw", + "vpcmpestri", + "vpcmpestrm", + "vpcmpistri", + "vpcmpistrm", + "vpcmpeqb", + "vpcmpeqw", + "vpcmpeqd", + "vpcmpeqq", + "vpcmpgtb", + "vpcmpgtw", + "vpcmpgtd", + "vpcmpgtq", + "vpermilpd", + "vpermilps", + "vperm2f128", + "vpextrb", + "vpextrw", + "vpextrd", + "vpextrq", + "vphaddw", + "vphaddd", + "vphaddsw", + "vphminposuw", + "vphsubw", + "vphsubd", + "vphsubsw", + "vpinsrb", + "vpinsrw", + "vpinsrd", + "vpinsrq", + "vpmaddwd", + "vpmaddubsw", + "vpmaxsb", + "vpmaxsw", + "vpmaxsd", + "vpmaxub", + "vpmaxuw", + "vpmaxud", + "vpminsb", + "vpminsw", + "vpminsd", + "vpminub", + "vpminuw", + "vpminud", + "vpmovmskb", + "vpmovsxbw", + "vpmovsxbd", + "vpmovsxbq", + "vpmovsxwd", + "vpmovsxwq", + "vpmovsxdq", + "vpmovzxbw", + "vpmovzxbd", + "vpmovzxbq", + "vpmovzxwd", + "vpmovzxwq", + "vpmovzxdq", + "vpmulhuw", + "vpmulhrsw", + "vpmulhw", + "vpmullw", + "vpmulld", + "vpmuludq", + "vpmuldq", + "vpor", + "vpsadbw", + "vpshufb", + "vpshufd", + "vpshufhw", + "vpshuflw", + "vpsignb", + "vpsignw", + "vpsignd", + "vpslldq", + "vpsrldq", + "vpsllw", + "vpslld", + "vpsllq", + "vpsraw", + "vpsrad", + "vpsrlw", + "vpsrld", + "vpsrlq", + "vptest", + "vpsubb", + "vpsubw", + "vpsubd", + "vpsubq", + "vpsubsb", + "vpsubsw", + "vpsubusb", + "vpsubusw", + "vpunpckhbw", + "vpunpckhwd", + "vpunpckhdq", + "vpunpckhqdq", + "vpunpcklbw", + "vpunpcklwd", + "vpunpckldq", + "vpunpcklqdq", + "vpxor", + "vrcpps", + "vrcpss", + "vrsqrtps", + "vrsqrtss", + "vroundpd", + "vroundps", + "vroundsd", + "vroundss", + "vshufpd", + "vshufps", + "vsqrtpd", + "vsqrtps", + "vsqrtsd", + "vsqrtss", + "vstmxcsr", + "vsubpd", + "vsubps", + "vsubsd", + "vsubss", + "vtestps", + "vtestpd", + "vucomisd", + "vucomiss", + "vunpckhpd", + "vunpckhps", + "vunpcklpd", + "vunpcklps", + "vxorpd", + "vxorps", + "vzeroall", + "vzeroupper", + "pclmullqlqdq", + "pclmulhqlqdq", + "pclmullqhqdq", + "pclmulhqhqdq", + "pclmulqdq", + "vpclmullqlqdq", + "vpclmulhqlqdq", + "vpclmullqhqdq", + "vpclmulhqhqdq", + "vpclmulqdq", + "vfmadd132ps", + "vfmadd132pd", + "vfmadd312ps", + "vfmadd312pd", + "vfmadd213ps", + "vfmadd213pd", + "vfmadd123ps", + "vfmadd123pd", + "vfmadd231ps", + "vfmadd231pd", + "vfmadd321ps", + "vfmadd321pd", + "vfmaddsub132ps", + "vfmaddsub132pd", + "vfmaddsub312ps", + "vfmaddsub312pd", + "vfmaddsub213ps", + "vfmaddsub213pd", + "vfmaddsub123ps", + "vfmaddsub123pd", + "vfmaddsub231ps", + "vfmaddsub231pd", + "vfmaddsub321ps", + "vfmaddsub321pd", + "vfmsub132ps", + "vfmsub132pd", + "vfmsub312ps", + "vfmsub312pd", + "vfmsub213ps", + "vfmsub213pd", + "vfmsub123ps", + "vfmsub123pd", + "vfmsub231ps", + "vfmsub231pd", + "vfmsub321ps", + "vfmsub321pd", + "vfmsubadd132ps", + "vfmsubadd132pd", + "vfmsubadd312ps", + "vfmsubadd312pd", + "vfmsubadd213ps", + "vfmsubadd213pd", + "vfmsubadd123ps", + "vfmsubadd123pd", + "vfmsubadd231ps", + "vfmsubadd231pd", + "vfmsubadd321ps", + "vfmsubadd321pd", + "vfnmadd132ps", + "vfnmadd132pd", + "vfnmadd312ps", + "vfnmadd312pd", + "vfnmadd213ps", + "vfnmadd213pd", + "vfnmadd123ps", + "vfnmadd123pd", + "vfnmadd231ps", + "vfnmadd231pd", + "vfnmadd321ps", + "vfnmadd321pd", + "vfnmsub132ps", + "vfnmsub132pd", + "vfnmsub312ps", + "vfnmsub312pd", + "vfnmsub213ps", + "vfnmsub213pd", + "vfnmsub123ps", + "vfnmsub123pd", + "vfnmsub231ps", + "vfnmsub231pd", + "vfnmsub321ps", + "vfnmsub321pd", + "vfmadd132ss", + "vfmadd132sd", + "vfmadd312ss", + "vfmadd312sd", + "vfmadd213ss", + "vfmadd213sd", + "vfmadd123ss", + "vfmadd123sd", + "vfmadd231ss", + "vfmadd231sd", + "vfmadd321ss", + "vfmadd321sd", + "vfmsub132ss", + "vfmsub132sd", + "vfmsub312ss", + "vfmsub312sd", + "vfmsub213ss", + "vfmsub213sd", + "vfmsub123ss", + "vfmsub123sd", + "vfmsub231ss", + "vfmsub231sd", + "vfmsub321ss", + "vfmsub321sd", + "vfnmadd132ss", + "vfnmadd132sd", + "vfnmadd312ss", + "vfnmadd312sd", + "vfnmadd213ss", + "vfnmadd213sd", + "vfnmadd123ss", + "vfnmadd123sd", + "vfnmadd231ss", + "vfnmadd231sd", + "vfnmadd321ss", + "vfnmadd321sd", + "vfnmsub132ss", + "vfnmsub132sd", + "vfnmsub312ss", + "vfnmsub312sd", + "vfnmsub213ss", + "vfnmsub213sd", + "vfnmsub123ss", + "vfnmsub123sd", + "vfnmsub231ss", + "vfnmsub231sd", + "vfnmsub321ss", + "vfnmsub321sd", + "vcvtph2ps", + "vcvtps2ph", + "xstore", + "xcryptecb", + "xcryptcbc", + "xcryptctr", + "xcryptcfb", + "xcryptofb", + "montmul", + "xsha1", + "xsha256", + "llwpcb", + "slwpcb", + "lwpval", + "lwpins", + "vfmaddpd", + "vfmaddps", + "vfmaddsd", + "vfmaddss", + "vfmaddsubpd", + "vfmaddsubps", + "vfmsubaddpd", + "vfmsubaddps", + "vfmsubpd", + "vfmsubps", + "vfmsubsd", + "vfmsubss", + "vfnmaddpd", + "vfnmaddps", + "vfnmaddsd", + "vfnmaddss", + "vfnmsubpd", + "vfnmsubps", + "vfnmsubsd", + "vfnmsubss", + "vfrczpd", + "vfrczps", + "vfrczsd", + "vfrczss", + "vpcmov", + "vpcomb", + "vpcomd", + "vpcomq", + "vpcomub", + "vpcomud", + "vpcomuq", + "vpcomuw", + "vpcomw", + "vphaddbd", + "vphaddbq", + "vphaddbw", + "vphadddq", + "vphaddubd", + "vphaddubq", + "vphaddubw", + "vphaddudq", + "vphadduwd", + "vphadduwq", + "vphaddwd", + "vphaddwq", + "vphsubbw", + "vphsubdq", + "vphsubwd", + "vpmacsdd", + "vpmacsdqh", + "vpmacsdql", + "vpmacssdd", + "vpmacssdqh", + "vpmacssdql", + "vpmacsswd", + "vpmacssww", + "vpmacswd", + "vpmacsww", + "vpmadcsswd", + "vpmadcswd", + "vpperm", + "vprotb", + "vprotd", + "vprotq", + "vprotw", + "vpshab", + "vpshad", + "vpshaq", + "vpshaw", + "vpshlb", + "vpshld", + "vpshlq", + "vpshlw", + "vbroadcasti128", + "vpblendd", + "vpbroadcastb", + "vpbroadcastw", + "vpbroadcastd", + "vpbroadcastq", + "vpermd", + "vpermpd", + "vpermps", + "vpermq", + "vperm2i128", + "vextracti128", + "vinserti128", + "vpmaskmovd", + "vpmaskmovq", + "vpsllvd", + "vpsllvq", + "vpsravd", + "vpsrlvd", + "vpsrlvq", + "vgatherdpd", + "vgatherqpd", + "vgatherdps", + "vgatherqps", + "vpgatherdd", + "vpgatherqd", + "vpgatherdq", + "vpgatherqq", + "xabort", + "xbegin", + "xend", + "xtest", + "prefetchwt1", + "bndmk", + "bndcl", + "bndcu", + "bndcn", + "bndmov", + "bndldx", + "bndstx", + "sha1msg1", + "sha1msg2", + "sha1nexte", + "sha1rnds4", + "sha256msg1", + "sha256msg2", + "sha256rnds2", + "vsha512msg1", + "vsha512msg2", + "vsha512rnds2", + "vsm3msg1", + "vsm3msg2", + "vsm3rnds2", + "vsm4key4", + "vsm4rnds4", + "vbcstnebf16ps", + "vbcstnebf162ps", + "vbcstnesh2ps", + "vcvtneebf162ps", + "vcvtneeph2ps", + "vcvtneobf162ps", + "vcvtneoph2ps", + "vcvtneps2bf16", + "vpdpbusd", + "vpdpbusds", + "vpdpwssd", + "vpdpwssds", + "vpdpbssd", + "vpdpbssds", + "vpdpbsud", + "vpdpbsuds", + "vpdpbuud", + "vpdpbuuds", + "vpdpwsud", + "vpdpwsuds", + "vpdpwusd", + "vpdpwusds", + "vpdpwuud", + "vpdpwuuds", + "vpmadd52huq", + "vpmadd52luq", + "kmovb", + "kmovw", + "kmovd", + "kmovq", + "kmov", + "movb", + "movw", + "kaddb", + "kaddw", + "kaddd", + "kaddq", + "kadd", + "addb", + "addw", + "addd", + "addq", + "kandb", + "kandw", + "kandd", + "kandq", + "kand", + "andb", + "andw", + "andd", + "andq", + "kandnb", + "kandnw", + "kandnd", + "kandnq", + "kandn", + "andnb", + "andnw", + "andnd", + "andnq", + "knotb", + "knotw", + "knotd", + "knotq", + "knot", + "notb", + "notw", + "notd", + "notq", + "korb", + "korw", + "kord", + "korq", + "kor", + "orb", + "orw", + "ord", + "orq", + "kortestb", + "kortestw", + "kortestd", + "kortestq", + "kortest", + "ortestb", + "ortestw", + "ortestd", + "ortestq", + "ortest", + "kshiftlb", + "kshiftlw", + "kshiftld", + "kshiftlq", + "kshiftl", + "shiftlb", + "shiftlw", + "shiftld", + "shiftlq", + "shiftl", + "kshlb", + "kshlw", + "kshld", + "kshlq", + "kshl", + "shlb", + "shlw", + "shlq", + "kshiftrb", + "kshiftrw", + "kshiftrd", + "kshiftrq", + "kshiftr", + "shiftrb", + "shiftrw", + "shiftrd", + "shiftrq", + "shiftr", + "kshrb", + "kshrw", + "kshrd", + "kshrq", + "kshr", + "shrb", + "shrw", + "shrq", + "ktestb", + "ktestw", + "ktestd", + "ktestq", + "ktest", + "testb", + "testw", + "testd", + "testq", + "kunpckbw", + "kunpckw", + "kunpck", + "unpckbw", + "unpckw", + "unpck", + "kunpckwd", + "kunpckd", + "unpckwd", + "unpckd", + "kunpckdq", + "kunpckq", + "unpckdq", + "unpckq", + "kxnorb", + "kxnorw", + "kxnord", + "kxnorq", + "kxnor", + "xnorb", + "xnorw", + "xnord", + "xnorq", + "xnor", + "kxorb", + "kxorw", + "kxord", + "kxorq", + "kxor", + "xorb", + "xorw", + "xord", + "xorq", + "valignd", + "valignq", + "vblendmpd", + "vblendmps", + "vbroadcastf32x2", + "vbroadcastf32x4", + "vbroadcastf32x8", + "vbroadcastf64x2", + "vbroadcastf64x4", + "vbroadcasti32x2", + "vbroadcasti32x4", + "vbroadcasti32x8", + "vbroadcasti64x2", + "vbroadcasti64x4", + "vcmpeq_oqpd", + "vcmpeq_oqps", + "vcmpeq_oqsd", + "vcmpeq_oqss", + "vcompresspd", + "vcompressps", + "vcvtpd2qq", + "vcvtpd2udq", + "vcvtpd2uqq", + "vcvtps2qq", + "vcvtps2udq", + "vcvtps2uqq", + "vcvtqq2pd", + "vcvtqq2ps", + "vcvtsd2usi", + "vcvtss2usi", + "vcvttpd2qq", + "vcvttpd2udq", + "vcvttpd2uqq", + "vcvttps2qq", + "vcvttps2udq", + "vcvttps2uqq", + "vcvttsd2usi", + "vcvttss2usi", + "vcvtudq2pd", + "vcvtudq2ps", + "vcvtuqq2pd", + "vcvtuqq2ps", + "vcvtusi2sd", + "vcvtusi2ss", + "vdbpsadbw", + "vexp2pd", + "vexp2ps", + "vexpandpd", + "vexpandps", + "vextractf32x4", + "vextractf32x8", + "vextractf64x2", + "vextractf64x4", + "vextracti32x4", + "vextracti32x8", + "vextracti64x2", + "vextracti64x4", + "vfixupimmpd", + "vfixupimmps", + "vfixupimmsd", + "vfixupimmss", + "vfpclasspd", + "vfpclassps", + "vfpclasssd", + "vfpclassss", + "vgatherpf0dpd", + "vgatherpf0dps", + "vgatherpf0qpd", + "vgatherpf0qps", + "vgatherpf1dpd", + "vgatherpf1dps", + "vgatherpf1qpd", + "vgatherpf1qps", + "vgetexppd", + "vgetexpps", + "vgetexpsd", + "vgetexpss", + "vgetmantpd", + "vgetmantps", + "vgetmantsd", + "vgetmantss", + "vinsertf32x4", + "vinsertf32x8", + "vinsertf64x2", + "vinsertf64x4", + "vinserti32x4", + "vinserti32x8", + "vinserti64x2", + "vinserti64x4", + "vmovdqa32", + "vmovdqa64", + "vmovdqu16", + "vmovdqu32", + "vmovdqu64", + "vmovdqu8", + "vpabsq", + "vpandd", + "vpandnd", + "vpandnq", + "vpandq", + "vpblendmb", + "vpblendmd", + "vpblendmq", + "vpblendmw", + "vpbroadcastmb2q", + "vpbroadcastmw2d", + "vpcmpequb", + "vpcmpequd", + "vpcmpequq", + "vpcmpequw", + "vpcmpgeb", + "vpcmpged", + "vpcmpgeq", + "vpcmpgeub", + "vpcmpgeud", + "vpcmpgeuq", + "vpcmpgeuw", + "vpcmpgew", + "vpcmpgtub", + "vpcmpgtud", + "vpcmpgtuq", + "vpcmpgtuw", + "vpcmpleb", + "vpcmpled", + "vpcmpleq", + "vpcmpleub", + "vpcmpleud", + "vpcmpleuq", + "vpcmpleuw", + "vpcmplew", + "vpcmpltb", + "vpcmpltd", + "vpcmpltq", + "vpcmpltub", + "vpcmpltud", + "vpcmpltuq", + "vpcmpltuw", + "vpcmpltw", + "vpcmpneqb", + "vpcmpneqd", + "vpcmpneqq", + "vpcmpnequb", + "vpcmpnequd", + "vpcmpnequq", + "vpcmpnequw", + "vpcmpneqw", + "vpcmpngtb", + "vpcmpngtd", + "vpcmpngtq", + "vpcmpngtub", + "vpcmpngtud", + "vpcmpngtuq", + "vpcmpngtuw", + "vpcmpngtw", + "vpcmpnleb", + "vpcmpnled", + "vpcmpnleq", + "vpcmpnleub", + "vpcmpnleud", + "vpcmpnleuq", + "vpcmpnleuw", + "vpcmpnlew", + "vpcmpnltb", + "vpcmpnltd", + "vpcmpnltq", + "vpcmpnltub", + "vpcmpnltud", + "vpcmpnltuq", + "vpcmpnltuw", + "vpcmpnltw", + "vpcmpb", + "vpcmpd", + "vpcmpq", + "vpcmpub", + "vpcmpud", + "vpcmpuq", + "vpcmpuw", + "vpcmpw", + "vpcompressd", + "vpcompressq", + "vpconflictd", + "vpconflictq", + "vpermb", + "vpermi2b", + "vpermi2d", + "vpermi2pd", + "vpermi2ps", + "vpermi2q", + "vpermi2w", + "vpermt2b", + "vpermt2d", + "vpermt2pd", + "vpermt2ps", + "vpermt2q", + "vpermt2w", + "vpermw", + "vpexpandd", + "vpexpandq", + "vplzcntd", + "vplzcntq", + "vpmaxsq", + "vpmaxuq", + "vpminsq", + "vpminuq", + "vpmovb2m", + "vpmovd2m", + "vpmovdb", + "vpmovdw", + "vpmovm2b", + "vpmovm2d", + "vpmovm2q", + "vpmovm2w", + "vpmovq2m", + "vpmovqb", + "vpmovqd", + "vpmovqw", + "vpmovsdb", + "vpmovsdw", + "vpmovsqb", + "vpmovsqd", + "vpmovsqw", + "vpmovswb", + "vpmovusdb", + "vpmovusdw", + "vpmovusqb", + "vpmovusqd", + "vpmovusqw", + "vpmovuswb", + "vpmovw2m", + "vpmovwb", + "vpmullq", + "vpmultishiftqb", + "vpord", + "vporq", + "vprold", + "vprolq", + "vprolvd", + "vprolvq", + "vprord", + "vprorq", + "vprorvd", + "vprorvq", + "vpscatterdd", + "vpscatterdq", + "vpscatterqd", + "vpscatterqq", + "vpsllvw", + "vpsraq", + "vpsravq", + "vpsravw", + "vpsrlvw", + "vpternlogd", + "vpternlogq", + "vptestmb", + "vptestmd", + "vptestmq", + "vptestmw", + "vptestnmb", + "vptestnmd", + "vptestnmq", + "vptestnmw", + "vpxord", + "vpxorq", + "vrangepd", + "vrangeps", + "vrangesd", + "vrangess", + "vrcp14pd", + "vrcp14ps", + "vrcp14sd", + "vrcp14ss", + "vrcp28pd", + "vrcp28ps", + "vrcp28sd", + "vrcp28ss", + "vreducepd", + "vreduceps", + "vreducesd", + "vreducess", + "vrndscalepd", + "vrndscaleph", + "vrndscaleps", + "vrndscalesd", + "vrndscalesh", + "vrndscaless", + "vrsqrt14pd", + "vrsqrt14ps", + "vrsqrt14sd", + "vrsqrt14ss", + "vrsqrt28pd", + "vrsqrt28ps", + "vrsqrt28sd", + "vrsqrt28ss", + "vscalefpd", + "vscalefps", + "vscalefsd", + "vscalefss", + "vscatterdpd", + "vscatterdps", + "vscatterpf0dpd", + "vscatterpf0dps", + "vscatterpf0qpd", + "vscatterpf0qps", + "vscatterpf1dpd", + "vscatterpf1dps", + "vscatterpf1qpd", + "vscatterpf1qps", + "vscatterqpd", + "vscatterqps", + "vshuff32x4", + "vshuff64x2", + "vshufi32x4", + "vshufi64x2", + "rdpkru", + "wrpkru", + "ptwrite", + "cldemote", + "movdiri", + "movdir64b", + "pconfig", + "pbndkb", + "prefetchrst2", + "gf2p8affineinvqb", + "vgf2p8affineinvqb", + "gf2p8affineqb", + "vgf2p8affineqb", + "gf2p8mulb", + "vgf2p8mulb", + "vpcompressb", + "vpcompressw", + "vpexpandb", + "vpexpandw", + "vpshldw", + "vpshldd", + "vpshldq", + "vpshldvw", + "vpshldvd", + "vpshldvq", + "vpshrdw", + "vpshrdd", + "vpshrdq", + "vpshrdvw", + "vpshrdvd", + "vpshrdvq", + "vpopcntb", + "vpopcntw", + "vpopcntd", + "vpopcntq", + "vpshufbitqmb", + "v4fmaddps", + "v4fnmaddps", + "v4fmaddss", + "v4fnmaddss", + "vp4dpwssds", + "vp4dpwssd", + "encls", + "enclu", + "enclv", + "clrssbsy", + "endbr32", + "endbr64", + "incsspd", + "incsspq", + "rdsspd", + "rdsspq", + "rstorssp", + "saveprevssp", + "setssbsy", + "wrussd", + "wrussq", + "wrssd", + "wrssq", + "enqcmd", + "enqcmds", + "xresldtrk", + "xsusldtrk", + "vcvtne2ps2bf16", + "vdpbf16ps", + "vp2intersectd", + "vp2intersectq", + "ldtilecfg", + "sttilecfg", + "tdpbf16ps", + "tdpfp16ps", + "tcmmimfp16ps", + "tcmmrlfp16ps", + "tdpbssd", + "tdpbsud", + "tdpbusd", + "tdpbuud", + "tileloadd", + "tileloaddt1", + "tilerelease", + "tilestored", + "tilezero", + "tileloaddrs", + "tileloaddrst1", + "t2rpntlvwz0", + "t2rpntlvwz0t1", + "t2rpntlvwz1", + "t2rpntlvwz1t1", + "t2rpntlvwz0rs", + "t2rpntlvwz0rst1", + "t2rpntlvwz1rs", + "t2rpntlvwz1rst1", + "tconjtcmmimfp16ps", + "tconjtfp16", + "tcvtrowd2ps", + "tcvtrowps2bf16h", + "tcvtrowps2bf16l", + "tcvtrowps2phh", + "tcvtrowps2phl", + "tdpbf8ps", + "tdpbhf8ps", + "tdphbf8ps", + "tdphf8ps", + "tilemovrow", + "tmmultf32ps", + "ttcmmimfp16ps", + "ttcmmrlfp16ps", + "ttdpbf16ps", + "ttdpfp16ps", + "ttmmultf32ps", + "ttransposed", + "vaddph", + "vaddsh", + "vcmpph", + "vcmpsh", + "vcomish", + "vcvtdq2ph", + "vcvtpd2ph", + "vcvtph2dq", + "vcvtph2pd", + "vcvtph2psx", + "vcvtph2qq", + "vcvtph2udq", + "vcvtph2uqq", + "vcvtph2uw", + "vcvtph2w", + "vcvtps2phx", + "vcvtqq2ph", + "vcvtsd2sh", + "vcvtsh2sd", + "vcvtsh2si", + "vcvtsh2ss", + "vcvtsh2usi", + "vcvtsi2sh", + "vcvtss2sh", + "vcvttph2dq", + "vcvttph2qq", + "vcvttph2udq", + "vcvttph2uqq", + "vcvttph2uw", + "vcvttph2w", + "vcvttsh2si", + "vcvttsh2usi", + "vcvtudq2ph", + "vcvtuqq2ph", + "vcvtusi2sh", + "vcvtuw2ph", + "vcvtw2ph", + "vdivph", + "vdivsh", + "vfcmaddcph", + "vfmaddcph", + "vfcmaddcsh", + "vfmaddcsh", + "vfcmulcph", + "vfmulcph", + "vfcmulcsh", + "vfmulcsh", + "vfmaddsub132ph", + "vfmaddsub213ph", + "vfmaddsub231ph", + "vfmsubadd132ph", + "vfmsubadd213ph", + "vfmsubadd231ph", + "vfmadd132ph", + "vfmadd213ph", + "vfmadd231ph", + "vfnmadd132ph", + "vfnmadd213ph", + "vfnmadd231ph", + "vfmadd132sh", + "vfmadd213sh", + "vfmadd231sh", + "vfnmadd132sh", + "vfnmadd213sh", + "vfnmadd231sh", + "vfmsub132ph", + "vfmsub213ph", + "vfmsub231ph", + "vfnmsub132ph", + "vfnmsub213ph", + "vfnmsub231ph", + "vfmsub132sh", + "vfmsub213sh", + "vfmsub231sh", + "vfnmsub132sh", + "vfnmsub213sh", + "vfnmsub231sh", + "vfpclassph", + "vfpclasssh", + "vgetexpph", + "vgetexpsh", + "vgetmantph", + "vgetmantsh", + "vmaxph", + "vmaxsh", + "vminph", + "vminsh", + "vmovsh", + "vmovw", + "vmulph", + "vmulsh", + "vrcpph", + "vrcpsh", + "vreduceph", + "vreducesh", + "vendscaleph", + "vendscalesh", + "vrsqrtph", + "vrsqrtsh", + "vscalefph", + "vscalefsh", + "vsqrtph", + "vsqrtsh", + "vsubph", + "vsubsh", + "vucomish", + "aadd", + "aand", + "aor", + "axor", + "clui", + "senduipi", + "stui", + "testui", + "uiret", + "hreset", + "vaddbf16", + "vcmpbf16", + "vcomisbf16", + "vdivbf16", + "vfmadd132bf16", + "vfmadd213bf16", + "vfmadd231bf16", + "vfmsub132bf16", + "vfmsub213bf16", + "vfmsub231bf16", + "vfnmadd132bf16", + "vfnmadd213bf16", + "vfnmadd231bf16", + "vfnmsub132bf16", + "vfnmsub213bf16", + "vfnmsub231bf16", + "vfpclassbf16", + "vgetexpbf16", + "vgetmantbf16", + "vmaxbf16", + "vminbf16", + "vmulbf16", + "vrcpbf16", + "vreducebf16", + "vrndscalebf16", + "vrsqrtbf16", + "vscalefbf16", + "vsqrtbf16", + "vsubbf16", + "vcomxsd", + "vcomxsh", + "vcomxss", + "vucomxsd", + "vucomxsh", + "vucomxss", + "vcvt2ph2bf8", + "vcvt2ph2bf8s", + "vcvt2ph2hf8", + "vcvt2ph2hf8s", + "vcvtph2bf8", + "vcvtph2bf8s", + "vcvtph2hf8", + "vcvtph2hf8s", + "vcvt2ps2phx", + "vcvtbiasph2bf8", + "vcvtbiasph2bf8s", + "vcvtbiasph2hf8", + "vcvtbiasph2hf8s", + "vcvthf82ph", + "vdpphps", + "vminmaxbf16", + "vminmaxpd", + "vminmaxph", + "vminmaxps", + "vminmaxsd", + "vminmaxsh", + "vminmaxss", + "vcvtbf162ibs", + "vcvtbf162iubs", + "vcvttbf162ibs", + "vcvttbf162iubs", + "vcvttpd2dqs", + "vcvttpd2qqs", + "vcvttpd2udqs", + "vcvttpd2uqqs", + "vcvtph2ibs", + "vcvtph2iubs", + "vcvttph2ibs", + "vcvttph2iubs", + "vcvttps2dqs", + "vcvtps2ibs", + "vcvtps2iubs", + "vcvttps2ibs", + "vcvttps2iubs", + "vcvttps2qqs", + "vcvttps2udqs", + "vcvttps2uqqs", + "vcvttsd2sis", + "vcvttsd2usis", + "vcvttss2sis", + "vcvttss2usis", + "vbmacor16x16x16", + "vbmacxor16x16x16", + "vbitrev", + "hint_nop", + "hint_nop0", + "hint_nop1", + "hint_nop2", + "hint_nop3", + "hint_nop4", + "hint_nop5", + "hint_nop6", + "hint_nop7", + "hint_nop8", + "hint_nop9", + "hint_nop10", + "hint_nop11", + "hint_nop12", + "hint_nop13", + "hint_nop14", + "hint_nop15", + "hint_nop16", + "hint_nop17", + "hint_nop18", + "hint_nop19", + "hint_nop20", + "hint_nop21", + "hint_nop22", + "hint_nop23", + "hint_nop24", + "hint_nop25", + "hint_nop26", + "hint_nop27", + "hint_nop28", + "hint_nop29", + "hint_nop30", + "hint_nop31", + "hint_nop32", + "hint_nop33", + "hint_nop34", + "hint_nop35", + "hint_nop36", + "hint_nop37", + "hint_nop38", + "hint_nop39", + "hint_nop40", + "hint_nop41", + "hint_nop42", + "hint_nop43", + "hint_nop44", + "hint_nop45", + "hint_nop46", + "hint_nop47", + "hint_nop48", + "hint_nop49", + "hint_nop50", + "hint_nop51", + "hint_nop52", + "hint_nop53", + "hint_nop54", + "hint_nop55", + "hint_nop56", + "hint_nop57", + "hint_nop58", + "hint_nop59", + "hint_nop60", + "hint_nop61", + "hint_nop62", + "hint_nop63", +}; diff --git a/src/x86/regdis.c b/src/x86/regdis.c new file mode 100644 index 0000000..3fbbd68 --- /dev/null +++ b/src/x86/regdis.c @@ -0,0 +1,106 @@ +/* automatically generated from ./x86/regs.dat - do not edit */ + +#include "regdis.h" + +const enum reg_enum nasm_rd_bndreg[DISREGTBLSZ] = { + R_BND0, R_BND1, R_BND2, R_BND3, 0, 0, 0, 0, + R_BND0, R_BND1, R_BND2, R_BND3, 0, 0, 0, 0, + R_BND0, R_BND1, R_BND2, R_BND3, 0, 0, 0, 0, + R_BND0, R_BND1, R_BND2, R_BND3, 0, 0, 0, 0 +}; +const enum reg_enum nasm_rd_creg[DISREGTBLSZ] = { + R_CR0, R_CR1, R_CR2, R_CR3, R_CR4, R_CR5, R_CR6, R_CR7, + R_CR8, R_CR9, R_CR10, R_CR11, R_CR12, R_CR13, R_CR14, R_CR15, + R_CR16, R_CR17, R_CR18, R_CR19, R_CR20, R_CR21, R_CR22, R_CR23, + R_CR24, R_CR25, R_CR26, R_CR27, R_CR28, R_CR29, R_CR30, R_CR31 +}; +const enum reg_enum nasm_rd_dreg[DISREGTBLSZ] = { + R_DR0, R_DR1, R_DR2, R_DR3, R_DR4, R_DR5, R_DR6, R_DR7, + R_DR8, R_DR9, R_DR10, R_DR11, R_DR12, R_DR13, R_DR14, R_DR15, + R_DR16, R_DR17, R_DR18, R_DR19, R_DR20, R_DR21, R_DR22, R_DR23, + R_DR24, R_DR25, R_DR26, R_DR27, R_DR28, R_DR29, R_DR30, R_DR31 +}; +const enum reg_enum nasm_rd_fpureg[DISREGTBLSZ] = { + R_ST0, R_ST1, R_ST2, R_ST3, R_ST4, R_ST5, R_ST6, R_ST7, + R_ST0, R_ST1, R_ST2, R_ST3, R_ST4, R_ST5, R_ST6, R_ST7, + R_ST0, R_ST1, R_ST2, R_ST3, R_ST4, R_ST5, R_ST6, R_ST7, + R_ST0, R_ST1, R_ST2, R_ST3, R_ST4, R_ST5, R_ST6, R_ST7 +}; +const enum reg_enum nasm_rd_mmxreg[DISREGTBLSZ] = { + R_MM0, R_MM1, R_MM2, R_MM3, R_MM4, R_MM5, R_MM6, R_MM7, + R_MM0, R_MM1, R_MM2, R_MM3, R_MM4, R_MM5, R_MM6, R_MM7, + R_MM0, R_MM1, R_MM2, R_MM3, R_MM4, R_MM5, R_MM6, R_MM7, + R_MM0, R_MM1, R_MM2, R_MM3, R_MM4, R_MM5, R_MM6, R_MM7 +}; +const enum reg_enum nasm_rd_opmaskreg[DISREGTBLSZ] = { + R_K0, R_K1, R_K2, R_K3, R_K4, R_K5, R_K6, R_K7, + R_K0, R_K1, R_K2, R_K3, R_K4, R_K5, R_K6, R_K7, + R_K0, R_K1, R_K2, R_K3, R_K4, R_K5, R_K6, R_K7, + R_K0, R_K1, R_K2, R_K3, R_K4, R_K5, R_K6, R_K7 +}; +const enum reg_enum nasm_rd_reg16[DISREGTBLSZ] = { + R_AX, R_CX, R_DX, R_BX, R_SP, R_BP, R_SI, R_DI, + R_R8W, R_R9W, R_R10W, R_R11W, R_R12W, R_R13W, R_R14W, R_R15W, + R_R16W, R_R17W, R_R18W, R_R19W, R_R20W, R_R21W, R_R22W, R_R23W, + R_R24W, R_R25W, R_R26W, R_R27W, R_R28W, R_R29W, R_R30W, R_R31W +}; +const enum reg_enum nasm_rd_reg32[DISREGTBLSZ] = { + R_EAX, R_ECX, R_EDX, R_EBX, R_ESP, R_EBP, R_ESI, R_EDI, + R_R8D, R_R9D, R_R10D, R_R11D, R_R12D, R_R13D, R_R14D, R_R15D, + R_R16D, R_R17D, R_R18D, R_R19D, R_R20D, R_R21D, R_R22D, R_R23D, + R_R24D, R_R25D, R_R26D, R_R27D, R_R28D, R_R29D, R_R30D, R_R31D +}; +const enum reg_enum nasm_rd_reg64[DISREGTBLSZ] = { + R_RAX, R_RCX, R_RDX, R_RBX, R_RSP, R_RBP, R_RSI, R_RDI, + R_R8, R_R9, R_R10, R_R11, R_R12, R_R13, R_R14, R_R15, + R_R16, R_R17, R_R18, R_R19, R_R20, R_R21, R_R22, R_R23, + R_R24, R_R25, R_R26, R_R27, R_R28, R_R29, R_R30, R_R31 +}; +const enum reg_enum nasm_rd_reg8[DISREGTBLSZ] = { + R_AL, R_CL, R_DL, R_BL, R_AH, R_CH, R_DH, R_BH, + 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0 +}; +const enum reg_enum nasm_rd_reg8_rex[DISREGTBLSZ] = { + R_AL, R_CL, R_DL, R_BL, R_SPL, R_BPL, R_SIL, R_DIL, + R_R8B, R_R9B, R_R10B, R_R11B, R_R12B, R_R13B, R_R14B, R_R15B, + R_R16B, R_R17B, R_R18B, R_R19B, R_R20B, R_R21B, R_R22B, R_R23B, + R_R24B, R_R25B, R_R26B, R_R27B, R_R28B, R_R29B, R_R30B, R_R31B +}; +const enum reg_enum nasm_rd_sreg[DISREGTBLSZ] = { + R_ES, R_CS, R_SS, R_DS, R_FS, R_GS, R_SEGR6, R_SEGR7, + R_ES, R_CS, R_SS, R_DS, R_FS, R_GS, R_SEGR6, R_SEGR7, + R_ES, R_CS, R_SS, R_DS, R_FS, R_GS, R_SEGR6, R_SEGR7, + R_ES, R_CS, R_SS, R_DS, R_FS, R_GS, R_SEGR6, R_SEGR7 +}; +const enum reg_enum nasm_rd_tmmreg[DISREGTBLSZ] = { + R_TMM0, R_TMM1, R_TMM2, R_TMM3, R_TMM4, R_TMM5, R_TMM6, R_TMM7, + R_TMM0, R_TMM1, R_TMM2, R_TMM3, R_TMM4, R_TMM5, R_TMM6, R_TMM7, + R_TMM0, R_TMM1, R_TMM2, R_TMM3, R_TMM4, R_TMM5, R_TMM6, R_TMM7, + R_TMM0, R_TMM1, R_TMM2, R_TMM3, R_TMM4, R_TMM5, R_TMM6, R_TMM7 +}; +const enum reg_enum nasm_rd_treg[DISREGTBLSZ] = { + R_TR0, R_TR1, R_TR2, R_TR3, R_TR4, R_TR5, R_TR6, R_TR7, + R_TR0, R_TR1, R_TR2, R_TR3, R_TR4, R_TR5, R_TR6, R_TR7, + R_TR0, R_TR1, R_TR2, R_TR3, R_TR4, R_TR5, R_TR6, R_TR7, + R_TR0, R_TR1, R_TR2, R_TR3, R_TR4, R_TR5, R_TR6, R_TR7 +}; +const enum reg_enum nasm_rd_xmmreg[DISREGTBLSZ] = { + R_XMM0, R_XMM1, R_XMM2, R_XMM3, R_XMM4, R_XMM5, R_XMM6, R_XMM7, + R_XMM8, R_XMM9, R_XMM10, R_XMM11, R_XMM12, R_XMM13, R_XMM14, R_XMM15, + R_XMM16, R_XMM17, R_XMM18, R_XMM19, R_XMM20, R_XMM21, R_XMM22, R_XMM23, + R_XMM24, R_XMM25, R_XMM26, R_XMM27, R_XMM28, R_XMM29, R_XMM30, R_XMM31 +}; +const enum reg_enum nasm_rd_ymmreg[DISREGTBLSZ] = { + R_YMM0, R_YMM1, R_YMM2, R_YMM3, R_YMM4, R_YMM5, R_YMM6, R_YMM7, + R_YMM8, R_YMM9, R_YMM10, R_YMM11, R_YMM12, R_YMM13, R_YMM14, R_YMM15, + R_YMM16, R_YMM17, R_YMM18, R_YMM19, R_YMM20, R_YMM21, R_YMM22, R_YMM23, + R_YMM24, R_YMM25, R_YMM26, R_YMM27, R_YMM28, R_YMM29, R_YMM30, R_YMM31 +}; +const enum reg_enum nasm_rd_zmmreg[DISREGTBLSZ] = { + R_ZMM0, R_ZMM1, R_ZMM2, R_ZMM3, R_ZMM4, R_ZMM5, R_ZMM6, R_ZMM7, + R_ZMM8, R_ZMM9, R_ZMM10, R_ZMM11, R_ZMM12, R_ZMM13, R_ZMM14, R_ZMM15, + R_ZMM16, R_ZMM17, R_ZMM18, R_ZMM19, R_ZMM20, R_ZMM21, R_ZMM22, R_ZMM23, + R_ZMM24, R_ZMM25, R_ZMM26, R_ZMM27, R_ZMM28, R_ZMM29, R_ZMM30, R_ZMM31 +}; diff --git a/src/x86/regflags.c b/src/x86/regflags.c new file mode 100644 index 0000000..db0d2d5 --- /dev/null +++ b/src/x86/regflags.c @@ -0,0 +1,352 @@ +/* automatically generated from ./x86/regs.dat - do not edit */ + +#include "tables.h" +#include "nasm.h" + +const opflags_t nasm_reg_flags[] = { + 0, + /* ah */ RN_FLAGS( 4) | REG_HIGH, + /* al */ RN_FLAGS( 0) | REG_AL, + /* ax */ RN_FLAGS( 0) | REG_AX, + /* bh */ RN_FLAGS( 7) | REG_HIGH, + /* bl */ RN_FLAGS( 3) | REG_BL, + /* bnd0 */ RN_FLAGS( 0) | BNDREG, + /* bnd1 */ RN_FLAGS( 1) | BNDREG, + /* bnd2 */ RN_FLAGS( 2) | BNDREG, + /* bnd3 */ RN_FLAGS( 3) | BNDREG, + /* bp */ RN_FLAGS( 5) | REG16, + /* bpl */ RN_FLAGS( 5) | REG8, + /* bx */ RN_FLAGS( 3) | REG_BX, + /* ch */ RN_FLAGS( 5) | REG_HIGH, + /* cl */ RN_FLAGS( 1) | REG_CL, + /* cr0 */ RN_FLAGS( 0) | REG_CREG, + /* cr1 */ RN_FLAGS( 1) | REG_CREG, + /* cr10 */ RN_FLAGS(10) | REG_CREG, + /* cr11 */ RN_FLAGS(11) | REG_CREG, + /* cr12 */ RN_FLAGS(12) | REG_CREG, + /* cr13 */ RN_FLAGS(13) | REG_CREG, + /* cr14 */ RN_FLAGS(14) | REG_CREG, + /* cr15 */ RN_FLAGS(15) | REG_CREG, + /* cr16 */ RN_FLAGS(16) | REG_CREG, + /* cr17 */ RN_FLAGS(17) | REG_CREG, + /* cr18 */ RN_FLAGS(18) | REG_CREG, + /* cr19 */ RN_FLAGS(19) | REG_CREG, + /* cr2 */ RN_FLAGS( 2) | REG_CREG, + /* cr20 */ RN_FLAGS(20) | REG_CREG, + /* cr21 */ RN_FLAGS(21) | REG_CREG, + /* cr22 */ RN_FLAGS(22) | REG_CREG, + /* cr23 */ RN_FLAGS(23) | REG_CREG, + /* cr24 */ RN_FLAGS(24) | REG_CREG, + /* cr25 */ RN_FLAGS(25) | REG_CREG, + /* cr26 */ RN_FLAGS(26) | REG_CREG, + /* cr27 */ RN_FLAGS(27) | REG_CREG, + /* cr28 */ RN_FLAGS(28) | REG_CREG, + /* cr29 */ RN_FLAGS(29) | REG_CREG, + /* cr3 */ RN_FLAGS( 3) | REG_CREG, + /* cr30 */ RN_FLAGS(30) | REG_CREG, + /* cr31 */ RN_FLAGS(31) | REG_CREG, + /* cr4 */ RN_FLAGS( 4) | REG_CREG, + /* cr5 */ RN_FLAGS( 5) | REG_CREG, + /* cr6 */ RN_FLAGS( 6) | REG_CREG, + /* cr7 */ RN_FLAGS( 7) | REG_CREG, + /* cr8 */ RN_FLAGS( 8) | REG_CREG, + /* cr9 */ RN_FLAGS( 9) | REG_CREG, + /* cs */ RN_FLAGS( 1) | REG_CS, + /* cx */ RN_FLAGS( 1) | REG_CX, + /* dh */ RN_FLAGS( 6) | REG_HIGH, + /* di */ RN_FLAGS( 7) | REG16, + /* dil */ RN_FLAGS( 7) | REG8, + /* dl */ RN_FLAGS( 2) | REG_DL, + /* dr0 */ RN_FLAGS( 0) | REG_DREG, + /* dr1 */ RN_FLAGS( 1) | REG_DREG, + /* dr10 */ RN_FLAGS(10) | REG_DREG, + /* dr11 */ RN_FLAGS(11) | REG_DREG, + /* dr12 */ RN_FLAGS(12) | REG_DREG, + /* dr13 */ RN_FLAGS(13) | REG_DREG, + /* dr14 */ RN_FLAGS(14) | REG_DREG, + /* dr15 */ RN_FLAGS(15) | REG_DREG, + /* dr16 */ RN_FLAGS(16) | REG_DREG, + /* dr17 */ RN_FLAGS(17) | REG_DREG, + /* dr18 */ RN_FLAGS(18) | REG_DREG, + /* dr19 */ RN_FLAGS(19) | REG_DREG, + /* dr2 */ RN_FLAGS( 2) | REG_DREG, + /* dr20 */ RN_FLAGS(20) | REG_DREG, + /* dr21 */ RN_FLAGS(21) | REG_DREG, + /* dr22 */ RN_FLAGS(22) | REG_DREG, + /* dr23 */ RN_FLAGS(23) | REG_DREG, + /* dr24 */ RN_FLAGS(24) | REG_DREG, + /* dr25 */ RN_FLAGS(25) | REG_DREG, + /* dr26 */ RN_FLAGS(26) | REG_DREG, + /* dr27 */ RN_FLAGS(27) | REG_DREG, + /* dr28 */ RN_FLAGS(28) | REG_DREG, + /* dr29 */ RN_FLAGS(29) | REG_DREG, + /* dr3 */ RN_FLAGS( 3) | REG_DREG, + /* dr30 */ RN_FLAGS(30) | REG_DREG, + /* dr31 */ RN_FLAGS(31) | REG_DREG, + /* dr4 */ RN_FLAGS( 4) | REG_DREG, + /* dr5 */ RN_FLAGS( 5) | REG_DREG, + /* dr6 */ RN_FLAGS( 6) | REG_DREG, + /* dr7 */ RN_FLAGS( 7) | REG_DREG, + /* dr8 */ RN_FLAGS( 8) | REG_DREG, + /* dr9 */ RN_FLAGS( 9) | REG_DREG, + /* ds */ RN_FLAGS( 3) | REG_DS, + /* dx */ RN_FLAGS( 2) | REG_DX, + /* eax */ RN_FLAGS( 0) | REG_EAX, + /* ebp */ RN_FLAGS( 5) | REG32, + /* ebx */ RN_FLAGS( 3) | REG_EBX, + /* ecx */ RN_FLAGS( 1) | REG_ECX, + /* edi */ RN_FLAGS( 7) | REG32, + /* edx */ RN_FLAGS( 2) | REG_EDX, + /* es */ RN_FLAGS( 0) | REG_ES, + /* esi */ RN_FLAGS( 6) | REG32, + /* esp */ RN_FLAGS( 4) | REG32, + /* fs */ RN_FLAGS( 4) | REG_FS, + /* gs */ RN_FLAGS( 5) | REG_GS, + /* k0 */ RN_FLAGS( 0) | OPMASKREG, + /* k1 */ RN_FLAGS( 1) | OPMASKREG, + /* k2 */ RN_FLAGS( 2) | OPMASKREG, + /* k3 */ RN_FLAGS( 3) | OPMASKREG, + /* k4 */ RN_FLAGS( 4) | OPMASKREG, + /* k5 */ RN_FLAGS( 5) | OPMASKREG, + /* k6 */ RN_FLAGS( 6) | OPMASKREG, + /* k7 */ RN_FLAGS( 7) | OPMASKREG, + /* mm0 */ RN_FLAGS( 0) | MMXREG, + /* mm1 */ RN_FLAGS( 1) | MMXREG, + /* mm2 */ RN_FLAGS( 2) | MMXREG, + /* mm3 */ RN_FLAGS( 3) | MMXREG, + /* mm4 */ RN_FLAGS( 4) | MMXREG, + /* mm5 */ RN_FLAGS( 5) | MMXREG, + /* mm6 */ RN_FLAGS( 6) | MMXREG, + /* mm7 */ RN_FLAGS( 7) | MMXREG, + /* r10 */ RN_FLAGS(10) | REG64, + /* r10b */ RN_FLAGS(10) | REG8, + /* r10d */ RN_FLAGS(10) | REG32, + /* r10w */ RN_FLAGS(10) | REG16, + /* r11 */ RN_FLAGS(11) | REG64, + /* r11b */ RN_FLAGS(11) | REG8, + /* r11d */ RN_FLAGS(11) | REG32, + /* r11w */ RN_FLAGS(11) | REG16, + /* r12 */ RN_FLAGS(12) | REG64, + /* r12b */ RN_FLAGS(12) | REG8, + /* r12d */ RN_FLAGS(12) | REG32, + /* r12w */ RN_FLAGS(12) | REG16, + /* r13 */ RN_FLAGS(13) | REG64, + /* r13b */ RN_FLAGS(13) | REG8, + /* r13d */ RN_FLAGS(13) | REG32, + /* r13w */ RN_FLAGS(13) | REG16, + /* r14 */ RN_FLAGS(14) | REG64, + /* r14b */ RN_FLAGS(14) | REG8, + /* r14d */ RN_FLAGS(14) | REG32, + /* r14w */ RN_FLAGS(14) | REG16, + /* r15 */ RN_FLAGS(15) | REG64, + /* r15b */ RN_FLAGS(15) | REG8, + /* r15d */ RN_FLAGS(15) | REG32, + /* r15w */ RN_FLAGS(15) | REG16, + /* r16 */ RN_FLAGS(16) | REG64, + /* r16b */ RN_FLAGS(16) | REG8, + /* r16d */ RN_FLAGS(16) | REG32, + /* r16w */ RN_FLAGS(16) | REG16, + /* r17 */ RN_FLAGS(17) | REG64, + /* r17b */ RN_FLAGS(17) | REG8, + /* r17d */ RN_FLAGS(17) | REG32, + /* r17w */ RN_FLAGS(17) | REG16, + /* r18 */ RN_FLAGS(18) | REG64, + /* r18b */ RN_FLAGS(18) | REG8, + /* r18d */ RN_FLAGS(18) | REG32, + /* r18w */ RN_FLAGS(18) | REG16, + /* r19 */ RN_FLAGS(19) | REG64, + /* r19b */ RN_FLAGS(19) | REG8, + /* r19d */ RN_FLAGS(19) | REG32, + /* r19w */ RN_FLAGS(19) | REG16, + /* r20 */ RN_FLAGS(20) | REG64, + /* r20b */ RN_FLAGS(20) | REG8, + /* r20d */ RN_FLAGS(20) | REG32, + /* r20w */ RN_FLAGS(20) | REG16, + /* r21 */ RN_FLAGS(21) | REG64, + /* r21b */ RN_FLAGS(21) | REG8, + /* r21d */ RN_FLAGS(21) | REG32, + /* r21w */ RN_FLAGS(21) | REG16, + /* r22 */ RN_FLAGS(22) | REG64, + /* r22b */ RN_FLAGS(22) | REG8, + /* r22d */ RN_FLAGS(22) | REG32, + /* r22w */ RN_FLAGS(22) | REG16, + /* r23 */ RN_FLAGS(23) | REG64, + /* r23b */ RN_FLAGS(23) | REG8, + /* r23d */ RN_FLAGS(23) | REG32, + /* r23w */ RN_FLAGS(23) | REG16, + /* r24 */ RN_FLAGS(24) | REG64, + /* r24b */ RN_FLAGS(24) | REG8, + /* r24d */ RN_FLAGS(24) | REG32, + /* r24w */ RN_FLAGS(24) | REG16, + /* r25 */ RN_FLAGS(25) | REG64, + /* r25b */ RN_FLAGS(25) | REG8, + /* r25d */ RN_FLAGS(25) | REG32, + /* r25w */ RN_FLAGS(25) | REG16, + /* r26 */ RN_FLAGS(26) | REG64, + /* r26b */ RN_FLAGS(26) | REG8, + /* r26d */ RN_FLAGS(26) | REG32, + /* r26w */ RN_FLAGS(26) | REG16, + /* r27 */ RN_FLAGS(27) | REG64, + /* r27b */ RN_FLAGS(27) | REG8, + /* r27d */ RN_FLAGS(27) | REG32, + /* r27w */ RN_FLAGS(27) | REG16, + /* r28 */ RN_FLAGS(28) | REG64, + /* r28b */ RN_FLAGS(28) | REG8, + /* r28d */ RN_FLAGS(28) | REG32, + /* r28w */ RN_FLAGS(28) | REG16, + /* r29 */ RN_FLAGS(29) | REG64, + /* r29b */ RN_FLAGS(29) | REG8, + /* r29d */ RN_FLAGS(29) | REG32, + /* r29w */ RN_FLAGS(29) | REG16, + /* r30 */ RN_FLAGS(30) | REG64, + /* r30b */ RN_FLAGS(30) | REG8, + /* r30d */ RN_FLAGS(30) | REG32, + /* r30w */ RN_FLAGS(30) | REG16, + /* r31 */ RN_FLAGS(31) | REG64, + /* r31b */ RN_FLAGS(31) | REG8, + /* r31d */ RN_FLAGS(31) | REG32, + /* r31w */ RN_FLAGS(31) | REG16, + /* r8 */ RN_FLAGS( 8) | REG64, + /* r8b */ RN_FLAGS( 8) | REG8, + /* r8d */ RN_FLAGS( 8) | REG32, + /* r8w */ RN_FLAGS( 8) | REG16, + /* r9 */ RN_FLAGS( 9) | REG64, + /* r9b */ RN_FLAGS( 9) | REG8, + /* r9d */ RN_FLAGS( 9) | REG32, + /* r9w */ RN_FLAGS( 9) | REG16, + /* rax */ RN_FLAGS( 0) | REG_RAX, + /* rbp */ RN_FLAGS( 5) | REG64, + /* rbx */ RN_FLAGS( 3) | REG_RBX, + /* rcx */ RN_FLAGS( 1) | REG_RCX, + /* rdi */ RN_FLAGS( 7) | REG64, + /* rdx */ RN_FLAGS( 2) | REG_RDX, + /* rsi */ RN_FLAGS( 6) | REG64, + /* rsp */ RN_FLAGS( 4) | REG64, + /* segr6 */ RN_FLAGS( 6) | REG_SEG67, + /* segr7 */ RN_FLAGS( 7) | REG_SEG67, + /* si */ RN_FLAGS( 6) | REG16, + /* sil */ RN_FLAGS( 6) | REG8, + /* sp */ RN_FLAGS( 4) | REG16, + /* spl */ RN_FLAGS( 4) | REG8, + /* ss */ RN_FLAGS( 2) | REG_SS, + /* st0 */ RN_FLAGS( 0) | FPUREG, + /* st1 */ RN_FLAGS( 1) | FPUREG, + /* st2 */ RN_FLAGS( 2) | FPUREG, + /* st3 */ RN_FLAGS( 3) | FPUREG, + /* st4 */ RN_FLAGS( 4) | FPUREG, + /* st5 */ RN_FLAGS( 5) | FPUREG, + /* st6 */ RN_FLAGS( 6) | FPUREG, + /* st7 */ RN_FLAGS( 7) | FPUREG, + /* tmm0 */ RN_FLAGS( 0) | TMMREG, + /* tmm1 */ RN_FLAGS( 1) | TMMREG, + /* tmm2 */ RN_FLAGS( 2) | TMMREG, + /* tmm3 */ RN_FLAGS( 3) | TMMREG, + /* tmm4 */ RN_FLAGS( 4) | TMMREG, + /* tmm5 */ RN_FLAGS( 5) | TMMREG, + /* tmm6 */ RN_FLAGS( 6) | TMMREG, + /* tmm7 */ RN_FLAGS( 7) | TMMREG, + /* tr0 */ RN_FLAGS( 0) | REG_TREG, + /* tr1 */ RN_FLAGS( 1) | REG_TREG, + /* tr2 */ RN_FLAGS( 2) | REG_TREG, + /* tr3 */ RN_FLAGS( 3) | REG_TREG, + /* tr4 */ RN_FLAGS( 4) | REG_TREG, + /* tr5 */ RN_FLAGS( 5) | REG_TREG, + /* tr6 */ RN_FLAGS( 6) | REG_TREG, + /* tr7 */ RN_FLAGS( 7) | REG_TREG, + /* xmm0 */ RN_FLAGS( 0) | XMMREG, + /* xmm1 */ RN_FLAGS( 1) | XMMREG, + /* xmm10 */ RN_FLAGS(10) | XMMREG, + /* xmm11 */ RN_FLAGS(11) | XMMREG, + /* xmm12 */ RN_FLAGS(12) | XMMREG, + /* xmm13 */ RN_FLAGS(13) | XMMREG, + /* xmm14 */ RN_FLAGS(14) | XMMREG, + /* xmm15 */ RN_FLAGS(15) | XMMREG, + /* xmm16 */ RN_FLAGS(16) | XMMREG, + /* xmm17 */ RN_FLAGS(17) | XMMREG, + /* xmm18 */ RN_FLAGS(18) | XMMREG, + /* xmm19 */ RN_FLAGS(19) | XMMREG, + /* xmm2 */ RN_FLAGS( 2) | XMMREG, + /* xmm20 */ RN_FLAGS(20) | XMMREG, + /* xmm21 */ RN_FLAGS(21) | XMMREG, + /* xmm22 */ RN_FLAGS(22) | XMMREG, + /* xmm23 */ RN_FLAGS(23) | XMMREG, + /* xmm24 */ RN_FLAGS(24) | XMMREG, + /* xmm25 */ RN_FLAGS(25) | XMMREG, + /* xmm26 */ RN_FLAGS(26) | XMMREG, + /* xmm27 */ RN_FLAGS(27) | XMMREG, + /* xmm28 */ RN_FLAGS(28) | XMMREG, + /* xmm29 */ RN_FLAGS(29) | XMMREG, + /* xmm3 */ RN_FLAGS( 3) | XMMREG, + /* xmm30 */ RN_FLAGS(30) | XMMREG, + /* xmm31 */ RN_FLAGS(31) | XMMREG, + /* xmm4 */ RN_FLAGS( 4) | XMMREG, + /* xmm5 */ RN_FLAGS( 5) | XMMREG, + /* xmm6 */ RN_FLAGS( 6) | XMMREG, + /* xmm7 */ RN_FLAGS( 7) | XMMREG, + /* xmm8 */ RN_FLAGS( 8) | XMMREG, + /* xmm9 */ RN_FLAGS( 9) | XMMREG, + /* ymm0 */ RN_FLAGS( 0) | YMMREG, + /* ymm1 */ RN_FLAGS( 1) | YMMREG, + /* ymm10 */ RN_FLAGS(10) | YMMREG, + /* ymm11 */ RN_FLAGS(11) | YMMREG, + /* ymm12 */ RN_FLAGS(12) | YMMREG, + /* ymm13 */ RN_FLAGS(13) | YMMREG, + /* ymm14 */ RN_FLAGS(14) | YMMREG, + /* ymm15 */ RN_FLAGS(15) | YMMREG, + /* ymm16 */ RN_FLAGS(16) | YMMREG, + /* ymm17 */ RN_FLAGS(17) | YMMREG, + /* ymm18 */ RN_FLAGS(18) | YMMREG, + /* ymm19 */ RN_FLAGS(19) | YMMREG, + /* ymm2 */ RN_FLAGS( 2) | YMMREG, + /* ymm20 */ RN_FLAGS(20) | YMMREG, + /* ymm21 */ RN_FLAGS(21) | YMMREG, + /* ymm22 */ RN_FLAGS(22) | YMMREG, + /* ymm23 */ RN_FLAGS(23) | YMMREG, + /* ymm24 */ RN_FLAGS(24) | YMMREG, + /* ymm25 */ RN_FLAGS(25) | YMMREG, + /* ymm26 */ RN_FLAGS(26) | YMMREG, + /* ymm27 */ RN_FLAGS(27) | YMMREG, + /* ymm28 */ RN_FLAGS(28) | YMMREG, + /* ymm29 */ RN_FLAGS(29) | YMMREG, + /* ymm3 */ RN_FLAGS( 3) | YMMREG, + /* ymm30 */ RN_FLAGS(30) | YMMREG, + /* ymm31 */ RN_FLAGS(31) | YMMREG, + /* ymm4 */ RN_FLAGS( 4) | YMMREG, + /* ymm5 */ RN_FLAGS( 5) | YMMREG, + /* ymm6 */ RN_FLAGS( 6) | YMMREG, + /* ymm7 */ RN_FLAGS( 7) | YMMREG, + /* ymm8 */ RN_FLAGS( 8) | YMMREG, + /* ymm9 */ RN_FLAGS( 9) | YMMREG, + /* zmm0 */ RN_FLAGS( 0) | ZMMREG, + /* zmm1 */ RN_FLAGS( 1) | ZMMREG, + /* zmm10 */ RN_FLAGS(10) | ZMMREG, + /* zmm11 */ RN_FLAGS(11) | ZMMREG, + /* zmm12 */ RN_FLAGS(12) | ZMMREG, + /* zmm13 */ RN_FLAGS(13) | ZMMREG, + /* zmm14 */ RN_FLAGS(14) | ZMMREG, + /* zmm15 */ RN_FLAGS(15) | ZMMREG, + /* zmm16 */ RN_FLAGS(16) | ZMMREG, + /* zmm17 */ RN_FLAGS(17) | ZMMREG, + /* zmm18 */ RN_FLAGS(18) | ZMMREG, + /* zmm19 */ RN_FLAGS(19) | ZMMREG, + /* zmm2 */ RN_FLAGS( 2) | ZMMREG, + /* zmm20 */ RN_FLAGS(20) | ZMMREG, + /* zmm21 */ RN_FLAGS(21) | ZMMREG, + /* zmm22 */ RN_FLAGS(22) | ZMMREG, + /* zmm23 */ RN_FLAGS(23) | ZMMREG, + /* zmm24 */ RN_FLAGS(24) | ZMMREG, + /* zmm25 */ RN_FLAGS(25) | ZMMREG, + /* zmm26 */ RN_FLAGS(26) | ZMMREG, + /* zmm27 */ RN_FLAGS(27) | ZMMREG, + /* zmm28 */ RN_FLAGS(28) | ZMMREG, + /* zmm29 */ RN_FLAGS(29) | ZMMREG, + /* zmm3 */ RN_FLAGS( 3) | ZMMREG, + /* zmm30 */ RN_FLAGS(30) | ZMMREG, + /* zmm31 */ RN_FLAGS(31) | ZMMREG, + /* zmm4 */ RN_FLAGS( 4) | ZMMREG, + /* zmm5 */ RN_FLAGS( 5) | ZMMREG, + /* zmm6 */ RN_FLAGS( 6) | ZMMREG, + /* zmm7 */ RN_FLAGS( 7) | ZMMREG, + /* zmm8 */ RN_FLAGS( 8) | ZMMREG, + /* zmm9 */ RN_FLAGS( 9) | ZMMREG, +}; diff --git a/src/x86/regs.c b/src/x86/regs.c new file mode 100644 index 0000000..2d9cc40 --- /dev/null +++ b/src/x86/regs.c @@ -0,0 +1,350 @@ +/* automatically generated from ./x86/regs.dat - do not edit */ + +#include "tables.h" + +const char * const nasm_reg_names[] = { + "ah", + "al", + "ax", + "bh", + "bl", + "bnd0", + "bnd1", + "bnd2", + "bnd3", + "bp", + "bpl", + "bx", + "ch", + "cl", + "cr0", + "cr1", + "cr10", + "cr11", + "cr12", + "cr13", + "cr14", + "cr15", + "cr16", + "cr17", + "cr18", + "cr19", + "cr2", + "cr20", + "cr21", + "cr22", + "cr23", + "cr24", + "cr25", + "cr26", + "cr27", + "cr28", + "cr29", + "cr3", + "cr30", + "cr31", + "cr4", + "cr5", + "cr6", + "cr7", + "cr8", + "cr9", + "cs", + "cx", + "dh", + "di", + "dil", + "dl", + "dr0", + "dr1", + "dr10", + "dr11", + "dr12", + "dr13", + "dr14", + "dr15", + "dr16", + "dr17", + "dr18", + "dr19", + "dr2", + "dr20", + "dr21", + "dr22", + "dr23", + "dr24", + "dr25", + "dr26", + "dr27", + "dr28", + "dr29", + "dr3", + "dr30", + "dr31", + "dr4", + "dr5", + "dr6", + "dr7", + "dr8", + "dr9", + "ds", + "dx", + "eax", + "ebp", + "ebx", + "ecx", + "edi", + "edx", + "es", + "esi", + "esp", + "fs", + "gs", + "k0", + "k1", + "k2", + "k3", + "k4", + "k5", + "k6", + "k7", + "mm0", + "mm1", + "mm2", + "mm3", + "mm4", + "mm5", + "mm6", + "mm7", + "r10", + "r10b", + "r10d", + "r10w", + "r11", + "r11b", + "r11d", + "r11w", + "r12", + "r12b", + "r12d", + "r12w", + "r13", + "r13b", + "r13d", + "r13w", + "r14", + "r14b", + "r14d", + "r14w", + "r15", + "r15b", + "r15d", + "r15w", + "r16", + "r16b", + "r16d", + "r16w", + "r17", + "r17b", + "r17d", + "r17w", + "r18", + "r18b", + "r18d", + "r18w", + "r19", + "r19b", + "r19d", + "r19w", + "r20", + "r20b", + "r20d", + "r20w", + "r21", + "r21b", + "r21d", + "r21w", + "r22", + "r22b", + "r22d", + "r22w", + "r23", + "r23b", + "r23d", + "r23w", + "r24", + "r24b", + "r24d", + "r24w", + "r25", + "r25b", + "r25d", + "r25w", + "r26", + "r26b", + "r26d", + "r26w", + "r27", + "r27b", + "r27d", + "r27w", + "r28", + "r28b", + "r28d", + "r28w", + "r29", + "r29b", + "r29d", + "r29w", + "r30", + "r30b", + "r30d", + "r30w", + "r31", + "r31b", + "r31d", + "r31w", + "r8", + "r8b", + "r8d", + "r8w", + "r9", + "r9b", + "r9d", + "r9w", + "rax", + "rbp", + "rbx", + "rcx", + "rdi", + "rdx", + "rsi", + "rsp", + "segr6", + "segr7", + "si", + "sil", + "sp", + "spl", + "ss", + "st0", + "st1", + "st2", + "st3", + "st4", + "st5", + "st6", + "st7", + "tmm0", + "tmm1", + "tmm2", + "tmm3", + "tmm4", + "tmm5", + "tmm6", + "tmm7", + "tr0", + "tr1", + "tr2", + "tr3", + "tr4", + "tr5", + "tr6", + "tr7", + "xmm0", + "xmm1", + "xmm10", + "xmm11", + "xmm12", + "xmm13", + "xmm14", + "xmm15", + "xmm16", + "xmm17", + "xmm18", + "xmm19", + "xmm2", + "xmm20", + "xmm21", + "xmm22", + "xmm23", + "xmm24", + "xmm25", + "xmm26", + "xmm27", + "xmm28", + "xmm29", + "xmm3", + "xmm30", + "xmm31", + "xmm4", + "xmm5", + "xmm6", + "xmm7", + "xmm8", + "xmm9", + "ymm0", + "ymm1", + "ymm10", + "ymm11", + "ymm12", + "ymm13", + "ymm14", + "ymm15", + "ymm16", + "ymm17", + "ymm18", + "ymm19", + "ymm2", + "ymm20", + "ymm21", + "ymm22", + "ymm23", + "ymm24", + "ymm25", + "ymm26", + "ymm27", + "ymm28", + "ymm29", + "ymm3", + "ymm30", + "ymm31", + "ymm4", + "ymm5", + "ymm6", + "ymm7", + "ymm8", + "ymm9", + "zmm0", + "zmm1", + "zmm10", + "zmm11", + "zmm12", + "zmm13", + "zmm14", + "zmm15", + "zmm16", + "zmm17", + "zmm18", + "zmm19", + "zmm2", + "zmm20", + "zmm21", + "zmm22", + "zmm23", + "zmm24", + "zmm25", + "zmm26", + "zmm27", + "zmm28", + "zmm29", + "zmm3", + "zmm30", + "zmm31", + "zmm4", + "zmm5", + "zmm6", + "zmm7", + "zmm8", + "zmm9" +}; diff --git a/src/x86/regvals.c b/src/x86/regvals.c new file mode 100644 index 0000000..638e5c6 --- /dev/null +++ b/src/x86/regvals.c @@ -0,0 +1,351 @@ +/* automatically generated from ./x86/regs.dat - do not edit */ + +#include "tables.h" + +const int nasm_regvals[] = { + -1, + 4, /* ah */ + 0, /* al */ + 0, /* ax */ + 7, /* bh */ + 3, /* bl */ + 0, /* bnd0 */ + 1, /* bnd1 */ + 2, /* bnd2 */ + 3, /* bnd3 */ + 5, /* bp */ + 5, /* bpl */ + 3, /* bx */ + 5, /* ch */ + 1, /* cl */ + 0, /* cr0 */ + 1, /* cr1 */ + 10, /* cr10 */ + 11, /* cr11 */ + 12, /* cr12 */ + 13, /* cr13 */ + 14, /* cr14 */ + 15, /* cr15 */ + 16, /* cr16 */ + 17, /* cr17 */ + 18, /* cr18 */ + 19, /* cr19 */ + 2, /* cr2 */ + 20, /* cr20 */ + 21, /* cr21 */ + 22, /* cr22 */ + 23, /* cr23 */ + 24, /* cr24 */ + 25, /* cr25 */ + 26, /* cr26 */ + 27, /* cr27 */ + 28, /* cr28 */ + 29, /* cr29 */ + 3, /* cr3 */ + 30, /* cr30 */ + 31, /* cr31 */ + 4, /* cr4 */ + 5, /* cr5 */ + 6, /* cr6 */ + 7, /* cr7 */ + 8, /* cr8 */ + 9, /* cr9 */ + 1, /* cs */ + 1, /* cx */ + 6, /* dh */ + 7, /* di */ + 7, /* dil */ + 2, /* dl */ + 0, /* dr0 */ + 1, /* dr1 */ + 10, /* dr10 */ + 11, /* dr11 */ + 12, /* dr12 */ + 13, /* dr13 */ + 14, /* dr14 */ + 15, /* dr15 */ + 16, /* dr16 */ + 17, /* dr17 */ + 18, /* dr18 */ + 19, /* dr19 */ + 2, /* dr2 */ + 20, /* dr20 */ + 21, /* dr21 */ + 22, /* dr22 */ + 23, /* dr23 */ + 24, /* dr24 */ + 25, /* dr25 */ + 26, /* dr26 */ + 27, /* dr27 */ + 28, /* dr28 */ + 29, /* dr29 */ + 3, /* dr3 */ + 30, /* dr30 */ + 31, /* dr31 */ + 4, /* dr4 */ + 5, /* dr5 */ + 6, /* dr6 */ + 7, /* dr7 */ + 8, /* dr8 */ + 9, /* dr9 */ + 3, /* ds */ + 2, /* dx */ + 0, /* eax */ + 5, /* ebp */ + 3, /* ebx */ + 1, /* ecx */ + 7, /* edi */ + 2, /* edx */ + 0, /* es */ + 6, /* esi */ + 4, /* esp */ + 4, /* fs */ + 5, /* gs */ + 0, /* k0 */ + 1, /* k1 */ + 2, /* k2 */ + 3, /* k3 */ + 4, /* k4 */ + 5, /* k5 */ + 6, /* k6 */ + 7, /* k7 */ + 0, /* mm0 */ + 1, /* mm1 */ + 2, /* mm2 */ + 3, /* mm3 */ + 4, /* mm4 */ + 5, /* mm5 */ + 6, /* mm6 */ + 7, /* mm7 */ + 10, /* r10 */ + 10, /* r10b */ + 10, /* r10d */ + 10, /* r10w */ + 11, /* r11 */ + 11, /* r11b */ + 11, /* r11d */ + 11, /* r11w */ + 12, /* r12 */ + 12, /* r12b */ + 12, /* r12d */ + 12, /* r12w */ + 13, /* r13 */ + 13, /* r13b */ + 13, /* r13d */ + 13, /* r13w */ + 14, /* r14 */ + 14, /* r14b */ + 14, /* r14d */ + 14, /* r14w */ + 15, /* r15 */ + 15, /* r15b */ + 15, /* r15d */ + 15, /* r15w */ + 16, /* r16 */ + 16, /* r16b */ + 16, /* r16d */ + 16, /* r16w */ + 17, /* r17 */ + 17, /* r17b */ + 17, /* r17d */ + 17, /* r17w */ + 18, /* r18 */ + 18, /* r18b */ + 18, /* r18d */ + 18, /* r18w */ + 19, /* r19 */ + 19, /* r19b */ + 19, /* r19d */ + 19, /* r19w */ + 20, /* r20 */ + 20, /* r20b */ + 20, /* r20d */ + 20, /* r20w */ + 21, /* r21 */ + 21, /* r21b */ + 21, /* r21d */ + 21, /* r21w */ + 22, /* r22 */ + 22, /* r22b */ + 22, /* r22d */ + 22, /* r22w */ + 23, /* r23 */ + 23, /* r23b */ + 23, /* r23d */ + 23, /* r23w */ + 24, /* r24 */ + 24, /* r24b */ + 24, /* r24d */ + 24, /* r24w */ + 25, /* r25 */ + 25, /* r25b */ + 25, /* r25d */ + 25, /* r25w */ + 26, /* r26 */ + 26, /* r26b */ + 26, /* r26d */ + 26, /* r26w */ + 27, /* r27 */ + 27, /* r27b */ + 27, /* r27d */ + 27, /* r27w */ + 28, /* r28 */ + 28, /* r28b */ + 28, /* r28d */ + 28, /* r28w */ + 29, /* r29 */ + 29, /* r29b */ + 29, /* r29d */ + 29, /* r29w */ + 30, /* r30 */ + 30, /* r30b */ + 30, /* r30d */ + 30, /* r30w */ + 31, /* r31 */ + 31, /* r31b */ + 31, /* r31d */ + 31, /* r31w */ + 8, /* r8 */ + 8, /* r8b */ + 8, /* r8d */ + 8, /* r8w */ + 9, /* r9 */ + 9, /* r9b */ + 9, /* r9d */ + 9, /* r9w */ + 0, /* rax */ + 5, /* rbp */ + 3, /* rbx */ + 1, /* rcx */ + 7, /* rdi */ + 2, /* rdx */ + 6, /* rsi */ + 4, /* rsp */ + 6, /* segr6 */ + 7, /* segr7 */ + 6, /* si */ + 6, /* sil */ + 4, /* sp */ + 4, /* spl */ + 2, /* ss */ + 0, /* st0 */ + 1, /* st1 */ + 2, /* st2 */ + 3, /* st3 */ + 4, /* st4 */ + 5, /* st5 */ + 6, /* st6 */ + 7, /* st7 */ + 0, /* tmm0 */ + 1, /* tmm1 */ + 2, /* tmm2 */ + 3, /* tmm3 */ + 4, /* tmm4 */ + 5, /* tmm5 */ + 6, /* tmm6 */ + 7, /* tmm7 */ + 0, /* tr0 */ + 1, /* tr1 */ + 2, /* tr2 */ + 3, /* tr3 */ + 4, /* tr4 */ + 5, /* tr5 */ + 6, /* tr6 */ + 7, /* tr7 */ + 0, /* xmm0 */ + 1, /* xmm1 */ + 10, /* xmm10 */ + 11, /* xmm11 */ + 12, /* xmm12 */ + 13, /* xmm13 */ + 14, /* xmm14 */ + 15, /* xmm15 */ + 16, /* xmm16 */ + 17, /* xmm17 */ + 18, /* xmm18 */ + 19, /* xmm19 */ + 2, /* xmm2 */ + 20, /* xmm20 */ + 21, /* xmm21 */ + 22, /* xmm22 */ + 23, /* xmm23 */ + 24, /* xmm24 */ + 25, /* xmm25 */ + 26, /* xmm26 */ + 27, /* xmm27 */ + 28, /* xmm28 */ + 29, /* xmm29 */ + 3, /* xmm3 */ + 30, /* xmm30 */ + 31, /* xmm31 */ + 4, /* xmm4 */ + 5, /* xmm5 */ + 6, /* xmm6 */ + 7, /* xmm7 */ + 8, /* xmm8 */ + 9, /* xmm9 */ + 0, /* ymm0 */ + 1, /* ymm1 */ + 10, /* ymm10 */ + 11, /* ymm11 */ + 12, /* ymm12 */ + 13, /* ymm13 */ + 14, /* ymm14 */ + 15, /* ymm15 */ + 16, /* ymm16 */ + 17, /* ymm17 */ + 18, /* ymm18 */ + 19, /* ymm19 */ + 2, /* ymm2 */ + 20, /* ymm20 */ + 21, /* ymm21 */ + 22, /* ymm22 */ + 23, /* ymm23 */ + 24, /* ymm24 */ + 25, /* ymm25 */ + 26, /* ymm26 */ + 27, /* ymm27 */ + 28, /* ymm28 */ + 29, /* ymm29 */ + 3, /* ymm3 */ + 30, /* ymm30 */ + 31, /* ymm31 */ + 4, /* ymm4 */ + 5, /* ymm5 */ + 6, /* ymm6 */ + 7, /* ymm7 */ + 8, /* ymm8 */ + 9, /* ymm9 */ + 0, /* zmm0 */ + 1, /* zmm1 */ + 10, /* zmm10 */ + 11, /* zmm11 */ + 12, /* zmm12 */ + 13, /* zmm13 */ + 14, /* zmm14 */ + 15, /* zmm15 */ + 16, /* zmm16 */ + 17, /* zmm17 */ + 18, /* zmm18 */ + 19, /* zmm19 */ + 2, /* zmm2 */ + 20, /* zmm20 */ + 21, /* zmm21 */ + 22, /* zmm22 */ + 23, /* zmm23 */ + 24, /* zmm24 */ + 25, /* zmm25 */ + 26, /* zmm26 */ + 27, /* zmm27 */ + 28, /* zmm28 */ + 29, /* zmm29 */ + 3, /* zmm3 */ + 30, /* zmm30 */ + 31, /* zmm31 */ + 4, /* zmm4 */ + 5, /* zmm5 */ + 6, /* zmm6 */ + 7, /* zmm7 */ + 8, /* zmm8 */ + 9, /* zmm9 */ +}; diff --git a/src/zamenyator.c b/src/zamenyator.c new file mode 100644 index 0000000..0294a78 --- /dev/null +++ b/src/zamenyator.c @@ -0,0 +1,284 @@ +#include "zamenyator.h" +#include +#include + +// === ТАБЛИЦА ПЕРЕВОДА МНЕМОНИК (из kvs_data.py) === +typedef struct { + const char *en; // Английская мнемоника + const char *ru; // Русская мнемоника +} mnemonic_map_t; + +static const mnemonic_map_t MNEMONICS[] = { + // === Инструкции перемещения данных === + {"mov", "переместить"}, + {"movzx", "переместить_с_нулями"}, + {"movsx", "переместить_со_знаком"}, + {"lea", "загрузить_адрес"}, + {"xchg", "обменять"}, + + // === Инструкции сравнения === + {"cmp", "сравнить"}, + {"test", "проверить"}, + + // === Арифметические инструкции === + {"add", "прибавить"}, + {"sub", "вычесть"}, + {"inc", "увеличить"}, + {"dec", "уменьшить"}, + {"mul", "умножить"}, + {"imul", "умножить_знаковое"}, + {"div", "разделить"}, + {"idiv", "разделить_знаковое"}, + {"neg", "отрицать"}, + {"not", "инвертировать"}, + + // === Логические инструкции === + {"and", "и"}, + {"or", "или"}, + {"xor", "исключающее_или"}, + + // === Инструкции переходов === + {"jmp", "переход"}, + {"je", "переход_если_равно"}, + {"jz", "переход_если_ноль"}, + {"jne", "переход_если_неравно"}, + {"jnz", "переход_если_не_ноль"}, + {"jl", "переход_если_меньше"}, + {"jg", "переход_если_больше"}, + {"jle", "переход_если_меньше_или_равно"}, + {"jge", "переход_если_больше_или_равно"}, + {"jc", "переход_если_перенос"}, + {"jnc", "переход_если_нет_переноса"}, + + // === Вызовы и возвраты === + {"call", "вызвать"}, + {"ret", "вернуться"}, + + // === Строковые инструкции === + {"movsb", "переместить_байт"}, + {"movsw", "переместить_слово"}, + {"cmpsb", "сравнить_байты"}, + {"scasb", "сканировать_байт"}, + + // === Работа с флагами === + {"stc", "установить_перенос"}, + {"clc", "сбросить_перенос"}, + {"std", "установить_направление"}, + {"cld", "сбросить_направление"}, + {"pushf", "втолкнуть_флаги"}, + {"popf", "вытолкнуть_флаги"}, + + // === Системные инструкции === + {"syscall", "вызов_системы"}, + {"int", "прервать"}, + {"sysenter", "войти_в_систему"}, + {"hlt", "остановить"}, + {"cpuid", "идентифицировать_процессор"}, + {"rdtsc", "прочитать_счётчик"}, + + // === Отладочные инструкции === + {"nop", "нет_операции"}, + {"int3", "отладка"}, + + // === Инструкции ввода-вывода === + {"in", "ввод_байта"}, + {"out", "вывод_байта"}, + + // === Циклы === + {"loop", "цикл"}, + + // === Стековые инструкции === + {"push", "втолкнуть"}, + {"pop", "вытолкнуть"}, +}; + +// === ТАБЛИЦА ПЕРЕВОДА РЕГИСТРОВ (из kvs_data.py) === +typedef struct { + const char *en; // Английское имя регистра + const char *ru; // Русское имя регистра +} register_map_t; + +static const register_map_t REGISTERS[] = { + // 64-битные регистры + {"rax", "раикс"}, + {"rcx", "рсикс"}, + {"rdx", "рдикс"}, + {"rbx", "рбикс"}, + {"rsp", "рсипи"}, + {"rbp", "рбипи"}, + {"rsi", "рсиай"}, + {"rdi", "рдиай"}, + {"r8", "р8"}, + {"r9", "р9"}, + {"r10", "р10"}, + {"r11", "р11"}, + {"r12", "р12"}, + {"r13", "р13"}, + {"r14", "р14"}, + {"r15", "р15"}, + + // 32-битные регистры + {"eax", "еаикс"}, + {"ecx", "есикс"}, + {"edx", "едикс"}, + {"ebx", "ебикс"}, + {"esp", "есипи"}, + {"ebp", "ебипи"}, + {"esi", "есиай"}, + {"edi", "едиай"}, + {"r8d", "р8д"}, + {"r9d", "р9д"}, + {"r10d", "р10д"}, + {"r11d", "р11д"}, + {"r12d", "р12д"}, + {"r13d", "р13д"}, + {"r14d", "р14д"}, + {"r15d", "р15д"}, + + // 16-битные регистры + {"ax", "аикс"}, + {"cx", "сикс"}, + {"dx", "дикс"}, + {"bx", "бикс"}, + {"sp", "эсп"}, + {"bp", "бипи"}, + {"si", "эс"}, + {"di", "ди"}, + {"r8w", "р8в"}, + {"r9w", "р9в"}, + {"r10w", "р10в"}, + {"r11w", "р11в"}, + {"r12w", "р12в"}, + {"r13w", "р13в"}, + {"r14w", "р14в"}, + {"r15w", "р15в"}, + + // 8-битные регистры (младшие) + {"al", "ал"}, + {"cl", "кл"}, + {"dl", "дл"}, + {"bl", "бл"}, + {"spl", "спл"}, + {"bpl", "бпл"}, + {"sil", "сил"}, + {"dil", "дил"}, + {"r8b", "р8б"}, + {"r9b", "р9б"}, + {"r10b", "р10б"}, + {"r11b", "р11б"}, + {"r12b", "р12б"}, + {"r13b", "р13б"}, + {"r14b", "р14б"}, + {"r15b", "р15б"}, + + // 8-битные регистры (старшие) + {"ah", "аш"}, + {"ch", "чш"}, + {"dh", "дш"}, + {"bh", "бш"}, +}; + +// === ФУНКЦИИ ПОИСКА === +static const char *find_translation(const void *table, size_t size, + size_t elem_size, const char *key, + const char *(*get_key)(const void *), + const char *(*get_value)(const void *)) +{ + const char *ptr = (const char *)table; + for (size_t i = 0; i < size; i++) { + const void *elem = ptr + i * elem_size; + if (strcmp(get_key(elem), key) == 0) { + return get_value(elem); + } + } + return NULL; +} + +static const char *get_mnemonic_key(const void *elem) { + return ((const mnemonic_map_t *)elem)->en; +} +static const char *get_mnemonic_value(const void *elem) { + return ((const mnemonic_map_t *)elem)->ru; +} + +static const char *get_register_key(const void *elem) { + return ((const register_map_t *)elem)->en; +} +static const char *get_register_value(const void *elem) { + return ((const register_map_t *)elem)->ru; +} + +// === ГЛАВНАЯ ФУНКЦИЯ ПЕРЕВОДА === +const char *translate_insn(const char *insn) +{ + static char result[512]; + const char *p = insn; + char word[64]; + int word_len = 0; + int is_number; + const char *translation; + + result[0] = '\0'; + + while (*p) { + // Сохраняем разделители + while (*p == ' ' || *p == ',' || *p == '[' || *p == ']' || + *p == '(' || *p == ')' || *p == '*' || *p == '+' || *p == '-') { + strncat(result, p, 1); + p++; + } + + if (!*p) break; + + // Читаем слово + word_len = 0; + while (*p && !(*p == ' ' || *p == ',' || *p == '[' || *p == ']' || + *p == '(' || *p == ')' || *p == '*' || *p == '+' || *p == '-')) { + word[word_len++] = *p++; + } + word[word_len] = '\0'; + + // Проверяем, является ли слово числом + is_number = 1; + if (word[0] == '0' && (word[1] == 'x' || word[1] == 'X')) { + for (int i = 2; i < word_len; i++) { + if (!((word[i] >= '0' && word[i] <= '9') || + (word[i] >= 'a' && word[i] <= 'f') || + (word[i] >= 'A' && word[i] <= 'F'))) { + is_number = 0; + break; + } + } + } else { + for (int i = 0; i < word_len; i++) { + if (!(word[i] >= '0' && word[i] <= '9')) { + is_number = 0; + break; + } + } + } + + if (is_number) { + strcat(result, word); + } else { + // Сначала ищем в таблице мнемоник, затем в таблице регистров + translation = find_translation(MNEMONICS, sizeof(MNEMONICS)/sizeof(MNEMONICS[0]), + sizeof(mnemonic_map_t), word, + get_mnemonic_key, get_mnemonic_value); + + if (!translation) { + translation = find_translation(REGISTERS, sizeof(REGISTERS)/sizeof(REGISTERS[0]), + sizeof(register_map_t), word, + get_register_key, get_register_value); + } + + if (translation) { + strcat(result, translation); + } else { + strcat(result, word); // Не нашли перевод — оставляем как есть + } + } + } + + return result; +} \ No newline at end of file